Radiation effect of doping and bias conditions on NPN bipolar junction transistors

International Nuclear Information System (INIS)

Xi Shanbin; Wang Yiyuan; Xu Fayue; Zhou Dong; Li Ming; Wang Fei; Wang Zhikuan; Yang Yonghui; Lu Wu

2011-01-01

In this paper,we investigate 60 Co γ-ray irradiation effects and annealing behaviors of NPN bipolar junction transistors of the same manufacturing technology but different doping concentrations. The transistors of different doping concentrations differ in responses of the radiation effect. More degradation was observed with the transistors of low concentration-doped NPN transistors than the high concentration-doped NPN transistors. The results also demonstrate that reverse-biased transistors are more sensitive to radiation than the forward-biased ones. Mechanisms of the radiation responses are analyzed. (authors)

Photovoltaic Cells Improvised With Used Bipolar Junction Transistors

International Nuclear Information System (INIS)

Akintayo, J. A

2002-01-01

The understanding of the underlying principle that the solar cell consists of a p-n junction is exploited to adapt the basic NPN or PNP Bipolar Junction Transistors (BJT) to serve as solar cells. In this mode the in improvised solar cell have employed just the emitter and the base sections with an intact emitter/base junction as the active PN area. The improvised devices tested screened and sorted are wired up in strings, blocks and modules. The photovoltaic modules realised tested as close replica of solar cells with output voltage following insolation level. Further work need be done on the modules to make them generate usable levels of output voltage and current

Test simulation of neutron damage to electronic components using accelerator facilities

Energy Technology Data Exchange (ETDEWEB)

King, D.B., E-mail: dbking@sandia.gov; Fleming, R.M.; Bielejec, E.S.; McDonald, J.K.; Vizkelethy, G.

2015-12-15

The purpose of this work is to demonstrate equivalent bipolar transistor damage response to neutrons and silicon ions. We report on irradiation tests performed at the White Sands Missile Range Fast Burst Reactor, the Sandia National Laboratories (SNL) Annular Core Research Reactor, the SNL SPHINX accelerator, and the SNL Ion Beam Laboratory using commercial silicon npn bipolar junction transistors (BJTs) and III–V Npn heterojunction bipolar transistors (HBTs). Late time and early time gain metrics as well as defect spectra measurements are reported.

Electrical characterization of commercial NPN bipolar junction transistors under neutron and gamma irradiation

Directory of Open Access Journals (Sweden)

OO Myo Min

2014-01-01

Full Text Available Electronics components such as bipolar junction transistors, diodes, etc. which are used in deep space mission are required to be tolerant to extensive exposure to energetic neutrons and ionizing radiation. This paper examines neutron radiation with pneumatic transfer system of TRIGA Mark-II reactor at the Malaysian Nuclear Agency. The effects of the gamma radiation from Co-60 on silicon NPN bipolar junction transistors is also be examined. Analyses on irradiated transistors were performed in terms of the electrical characteristics such as current gain, collector current and base current. Experimental results showed that the current gain on the devices degraded significantly after neutron and gamma radiations. Neutron radiation can cause displacement damage in the bulk layer of the transistor structure and gamma radiation can induce ionizing damage in the oxide layer of emitter-base depletion layer. The current gain degradation is believed to be governed by the increasing recombination current in the base-emitter depletion region.

SHI induced damage in electrical properties of silicon NPN BJTs

Energy Technology Data Exchange (ETDEWEB)

Kumar, M. Vinay, E-mail: vkm288@gmail.com; Krishnaveni, S. [Department of studies in Physics, University of Mysore, Mysore (India); Kumar, Santhosh [Department of Physics, Regional Institute of Education, Mysore (India); Yashoda, T. [Department of Physics, AVK College for Women, Hassan (India)

2016-05-23

The investigation of radiation damage in Si microelectronic circuitry and devices are being carried out by various research groups globally. In particular the Si Bipolar junction transistors are very sensitive to high energetic radiation. In the present study, radiation response of NPN Bipolar junction transistor (2N3773) has been examined for 60 MeV B{sup 4+} ion. Key electrical properties like Gummel, dc current gain and capacitance – voltage (C-V) characteristics of 60 MeV B{sup 4+} ion irradiated transistor were studied before and after irradiation. Ion irradiation and subsequent electrical characterizations were performed at room temperature. Current voltage (I-V) measurements showed the increase in collector current for V{sub BE} ≤ 0.4 V as a function of fluence, which is due to B{sup 4+} ion induced surface leakage currents. Base current is observed to be more sensitive than collector current and gain appears to be degraded with ion fluence. Also, C-V measurements shows that both built in potential and doping concentration increased significantly after irradiation.

Effect of 1MeV electron beam on transistors and circuits

International Nuclear Information System (INIS)

Lee, Tae Hoon

1998-02-01

It has been known that semiconductor devices operating in a radiation environment exhibited significant alterations of their electrical responses. Since an electron beam bombardment produces lattice damage in Si and charged defects in SiO 2 , several electrical parameters of transistors exhibit significant changes. Those parameters are the current gain of BJT (Bipolar Junction Transistor) and the threshold voltage of MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The degradation of transistors brings about that of circuits. This paper presents the results of experiments and simulations performed to study the effects of 1MeV electron beam irradiation on selected silicon transistors and circuits. For BJTs, the current gains of npn (2N3904) and pnp (2N3906) linearly decreased as the irradiation dose increased, and from this result, the damage constants, Ks were obtained as 13.65 for 2N3904 and 22.52 for 2N3906 in MGy, indicating a more stable operation in the electron radiation environment for pnp than that for npn. The decrease of current gain was due to that of minority-carrier lifetime in the base region. For MOSFETs (CD4007s), the threshold voltages of NMOS and PMOS shifted to the lower values, which was resulted from the accumulation of charge in SiO 2 . The charges could be categorized into fixed oxide charge and interfacial trap charge. From experimental results, the amounts of the induced charges could be quantitatively estimated. These degradations of transistors brought about the decrease in the voltage gain of CE (Common Emitter) amplifier and the shifts in the inverting voltage of inverter. Additionally, PSpice simulations of these circuits were carried out by modeling of irradiated transistors. The comparison of simulation with experiment showed the relatively good agreement of simulation for the degradation of circuits after irradiation

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

Science.gov (United States)

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.

2012-06-01

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

Understanding the failure mechanisms of microwave bipolar transistors caused by electrostatic discharge

Science.gov (United States)

Jin, Liu; Yongguang, Chen; Zhiliang, Tan; Jie, Yang; Xijun, Zhang; Zhenxing, Wang

2011-10-01

Electrostatic discharge (ESD) phenomena involve both electrical and thermal effects, and a direct electrostatic discharge to an electronic device is one of the most severe threats to component reliability. Therefore, the electrical and thermal stability of multifinger microwave bipolar transistors (BJTs) under ESD conditions has been investigated theoretically and experimentally. 100 samples have been tested for multiple pulses until a failure occurred. Meanwhile, the distributions of electric field, current density and lattice temperature have also been analyzed by use of the two-dimensional device simulation tool Medici. There is a good agreement between the simulated results and failure analysis. In the case of a thermal couple, the avalanche current distribution in the fingers is in general spatially unstable and results in the formation of current crowding effects and crystal defects. The experimental results indicate that a collector-base junction is more sensitive to ESD than an emitter-base junction based on the special device structure. When the ESD level increased to 1.3 kV, the collector-base junction has been burnt out first. The analysis has also demonstrated that ESD failures occur generally by upsetting the breakdown voltage of the dielectric or overheating of the aluminum-silicon eutectic. In addition, fatigue phenomena are observed during ESD testing, with devices that still function after repeated low-intensity ESDs but whose performances have been severely degraded.

Neutron Radiation Effect On 2N2222 And NTE 123 NPN Silicon Bipolar Junction Transistors

International Nuclear Information System (INIS)

Oo, Myo Min; Rashid, N K A Md; Hasbullah, N F; Karim, J Abdul; Zin, M R Mohamed

2013-01-01

This paper examines neutron radiation with PTS (Pneumatic Transfer System) effect on silicon NPN bipolar junction transistors (2N2222 and NTE 123) and analysis of the transistors in terms of electrical characterization such as current gain after neutron radiation. The key parameters are measured with Keithley 4200SCS. Experiment results show that the current gain degradation of the transistors is very sensitive to neutron radiation. The neutron radiation can cause displacement damage in the bulk layer of the transistor structure. The current degradation is believed to be governed by increasing recombination current between the base and emitter depletion region

High total dose proton irradiation effects on silicon NPN rf power transistors

International Nuclear Information System (INIS)

Bharathi, M. N.; Praveen, K. C.; Prakash, A. P. Gnana; Pushpa, N.

2014-01-01

The effects of 3 MeV proton irradiation on the I-V characteristics of NPN rf power transistors were studied in the dose range of 100 Krad to 100 Mrad. The different electrical characteristics like Gummel, current gain and output characteristics were systematically studied before and after irradiation. The recovery in the I-V characteristics of irradiated NPN BJTs were studied by isochronal and isothermal annealing methods

High total dose proton irradiation effects on silicon NPN rf power transistors

Energy Technology Data Exchange (ETDEWEB)

Bharathi, M. N.; Praveen, K. C.; Prakash, A. P. Gnana, E-mail: gnanaprakash@physics.uni-mysore.ac.in [Department of Studies in Physics, University of Mysore, Manasagangotri, Mysore-570006, Karnataka (India); Pushpa, N. [Department of PG Studies in Physics, JSS College, Ooty Road, Mysore-570025, Karnataka (India)

2014-04-24

The effects of 3 MeV proton irradiation on the I-V characteristics of NPN rf power transistors were studied in the dose range of 100 Krad to 100 Mrad. The different electrical characteristics like Gummel, current gain and output characteristics were systematically studied before and after irradiation. The recovery in the I-V characteristics of irradiated NPN BJTs were studied by isochronal and isothermal annealing methods.

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

Science.gov (United States)

Schwarze, G. E.; Frasca, A. J.

1991-01-01

The effects of neutron and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10(exp 13) n/sq cm and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are presented. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

Neutron and gamma irradiation effects on power semiconductor switches

Science.gov (United States)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

An improved bipolar junction transistor model for electrical and radiation effects

International Nuclear Information System (INIS)

Kleiner, C.T.; Messenger, G.C.

1982-01-01

The use of bipolar technology in hardened electronic design requires an in-depth understanding of how the Bipolar Junction Transistor (BJT) behaves under normal electrical and radiation environments. Significant improvements in BJT process technology have been reported, and the successful use of sophisticated Computer Aided Design (CAD) tools has aided implementation with respect to specific families of hardened devices. The most advanced BJT model used to date is the Improved Gummel-Poon (IGP) model which is used in CAA programs such as the SPICE II and SLICE programs. The earlier Ebers-Moll model (ref 1 and 2) has also been updated to compare with the older Gummel-Poon model. This paper describes an adaptation of an existing computer model which incorporates the best features of both models into a new, more accurate model called the Improved Bipolar Junction Transistor model. This paper also describes a unique approach to data reduction for the B(I /SUB c/) and V /SUB BE/(ACT) vs I /SUB c/characterizations which has been successfully programmed in Basic using a Commodore PET computer. This model is described in the following sections

Performance comparison between p–i–n and p–n junction tunneling field-effect transistors

Science.gov (United States)

Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man

2018-06-01

In this study, we investigated the direct-current (DC) and radio-frequency (RF) performances of p–i–n and p–n junction tunneling field-effect transistors (TFETs). Compared to the p–i–n junction TFET, the p–n junction TFET exhibited higher on-state current (I on) because the channel formation mechanism of the p–n junction TFET resulted in a narrower tunneling barrier and an expanded tunneling area. Further, the reduction of I on of the p–n junction TFET by the interface trap was smaller. Moreover, the p–n junction TFET exhibited lower gate-to-drain capacitance (C gd) because a depletion capacitance (C gd,dep) was formed by the depletion region under gate dielectric. Consequently, the p–n junction TFET achieved an improvement of cut-off frequency (f T) and intrinsic delay time (τ), which are related to the current performance and total gate capacitance (C gg). We confirmed the enhancement of device performances in terms of I on, f T, and τ by the conduction mechanism of the p–n junction TFET.

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

International Nuclear Information System (INIS)

Schwarze, G.E.; Frasca, A.J.

1994-01-01

The effects of neutrons and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10 13 n/cm 2 and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are given in this paper. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

KAUST Repository

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, Husam N.

2012-01-01

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility

Monolithic junction field-effect transistor charge preamplifier for calorimetry at high luminosity hadron colliders

International Nuclear Information System (INIS)

Radeka, V.; Rescia, S.; Rehn, L.A.; Manfredi, P.F.; Speziali, V.

1991-11-01

The outstanding noise and radiation hardness characteristics of epitaxial-channel junction field-effect transistors (JFET) suggest that a monolithic preamplifier based upon them may be able to meet the strict specifications for calorimetry at high luminosity colliders. Results obtained so far with a buried layer planar technology, among them an entire monolithic charge-sensitive preamplifier, are described

The free electron gas primary thermometer using an ordinary bipolar junction transistor approaches ppm accuracy

Science.gov (United States)

Mimila-Arroyo, J.

2017-06-01

In this paper, it is demonstrated that the free electron gas primary thermometer based on a bipolar junction transistor is able to provide the temperature with an accuracy of a few parts per million. Its simple functioning principle exploits the behavior of the collector current when properly biased to extract the temperature. Using general purpose silicon transistors at the water triple point (273.16 K) and gallium melting point (302.9146), an accuracy of a few parts per million has been reached, constituting the simplest and the easiest to operate primary thermometer, that might be considered even for the redefinition of Kelvin.

Photodetection in p–n junctions formed by electrolyte-gated transistors of two-dimensional crystals

KAUST Repository

Kozawa, Daichi

2016-11-16

Transition metal dichalcogenide monolayers have attracted much attention due to their strong light absorption and excellent electronic properties. These advantages make this type of two-dimensional crystal a promising one for optoelectronic device applications. In the case of photoelectric conversion devices such as photodetectors and photovoltaic cells, p–n junctions are one of the most important devices. Here, we demonstrate photodetection with WSe2 monolayer films. We prepare the electrolyte-gated ambipolar transistors and electrostatic p–n junctions are formed by the electrolyte-gating technique at 270 K. These p-n junctions are cooled down to fix the ion motion (and p-n junctions) and we observed the reasonable photocurrent spectra without the external bias, indicating the formation of p-n junctions. Very interestingly, two-terminal devices exhibit higher photoresponsivity than that of three-terminal ones, suggesting the formation of highly balanced anion and cation layers. The maximum photoresponsivity reaches 5 mA/W in resonance with the first excitonic peak. Our technique provides important evidence for optoelectronics in atomically thin crystals.

Photodetection in p–n junctions formed by electrolyte-gated transistors of two-dimensional crystals

KAUST Repository

Kozawa, Daichi; Pu, Jiang; Shimizu, Ryo; Kimura, Shota; Chiu, Ming-Hui; Matsuki, Keiichiro; Wada, Yoshifumi; Sakanoue, Tomo; Iwasa, Yoshihiro; Li, Lain-Jong; Takenobu, Taishi

2016-01-01

Transition metal dichalcogenide monolayers have attracted much attention due to their strong light absorption and excellent electronic properties. These advantages make this type of two-dimensional crystal a promising one for optoelectronic device applications. In the case of photoelectric conversion devices such as photodetectors and photovoltaic cells, p–n junctions are one of the most important devices. Here, we demonstrate photodetection with WSe2 monolayer films. We prepare the electrolyte-gated ambipolar transistors and electrostatic p–n junctions are formed by the electrolyte-gating technique at 270 K. These p-n junctions are cooled down to fix the ion motion (and p-n junctions) and we observed the reasonable photocurrent spectra without the external bias, indicating the formation of p-n junctions. Very interestingly, two-terminal devices exhibit higher photoresponsivity than that of three-terminal ones, suggesting the formation of highly balanced anion and cation layers. The maximum photoresponsivity reaches 5 mA/W in resonance with the first excitonic peak. Our technique provides important evidence for optoelectronics in atomically thin crystals.

Enchanced total dose damage in junction field effect transistors and related linear integrated circuits

International Nuclear Information System (INIS)

Flament, O.; Autran, J.L.; Roche, P.; Leray, J.L.; Musseau, O.

1996-01-01

Enhanced total dose damage of Junction Field-effect Transistors (JFETs) due to low dose rate and/or elevated temperature has been investigated for elementary p-channel structures fabricated on bulk and SOI substrates as well as for related linear integrated circuits. All these devices were fabricated with conventional junction isolation (field oxide). Large increases in damage have been revealed by performing high temperature and/or low dose rate irradiations. These results are consistent with previous studies concerning bipolar field oxides under low-field conditions. They suggest that the transport of radiation-induced holes through the oxide is the underlying mechanism. Such an enhanced degradation must be taken into account for low dose rate effects on linear integrated circuits

Effects induced by γ-radiation on the noise in junction field-effect transistors belonging to monolithic processes

International Nuclear Information System (INIS)

Manfredi, P.F.; Re, V.; Manfredi, P.F.; Speziali, V.; Re, V.; Manfredi, P.F.; Speziali, V.

1999-01-01

The effects of γ-rays on the noise characteristics of junction field-effect transistors belonging to three monolithic technologies have been investigated. A substantially different behavior of the radiation-induced noise in N and P -channel JFETs was observed. This may result in interesting design considerations. (authors)

Electrical responses by effects of molecular adsorption on channel and junctions of carbon nanotube field effect transistors

International Nuclear Information System (INIS)

Kang, Donghun; Park, Wanjun

2008-01-01

We report the adsorption effect on the electrical transport of nanotube field effect transistors. The source-drain current is monitored separately for the nanotube channel and the metal-nanotube junction under different pressures of ambient air with a blocking passivation. The metal-nanotube junction shows a significant change from p-type to ambipolar upon vacuum pumping, while the nanotube channel changes modestly. The metal-nanotube junction is found to be far more sensitive to the environment than the nanotube channel. We suggest that the adsorption states underneath the blocking layer do not desorb, and thus the positive carriers would not be diluted upon the vacuum pumping. This result is interpreted as the formation of an i-p-i and p-i-p junction with charge transfer by oxygen molecules. (fast track communication)

The Complete Semiconductor Transistor and Its Incomplete Forms

International Nuclear Information System (INIS)

Jie Binbin; Sah, C.-T.

2009-01-01

This paper describes the definition of the complete transistor. For semiconductor devices, the complete transistor is always bipolar, namely, its electrical characteristics contain both electron and hole currents controlled by their spatial charge distributions. Partially complete or incomplete transistors, via coined names or/and designed physical geometries, included the 1949 Shockley p/n junction transistor (later called Bipolar Junction Transistor, BJT), the 1952 Shockley unipolar 'field-effect' transistor (FET, later called the p/n Junction Gate FET or JGFET), as well as the field-effect transistors introduced by later investigators. Similarities between the surface-channel MOS-gate FET (MOSFET) and the volume-channel BJT are illustrated. The bipolar currents, identified by us in a recent nanometer FET with 2-MOS-gates on thin and nearly pure silicon base, led us to the recognition of the physical makeup and electrical current and charge compositions of a complete transistor and its extension to other three or more terminal signal processing devices, and also the importance of the terminal contacts.

Unijunction transistors

International Nuclear Information System (INIS)

1981-01-01

The electrical characteristics of unijunction transistors can be modified by irradiation with electron beams in excess of 400 KeV and at a dose rate of 10 13 to 10 16 e/cm 2 . Examples are given of the effect of exposing the emitter-base junctions of transistors to such lattice defect causing radiation for a time sufficient to change the valley current of the transistor. (U.K.)

Characterization of vertical GaN p-n diodes and junction field-effect transistors on bulk GaN down to cryogenic temperatures

Science.gov (United States)

Kizilyalli, I. C.; Aktas, O.

2015-12-01

There is great interest in wide-bandgap semiconductor devices and most recently in vertical GaN structures for power electronic applications such as power supplies, solar inverters and motor drives. In this paper the temperature-dependent electrical behavior of vertical GaN p-n diodes and vertical junction field-effect transistors fabricated on bulk GaN substrates of low defect density (104 to 106 cm-2) is described. Homoepitaxial MOCVD growth of GaN on its native substrate and the ability to control the doping in the drift layers in GaN have allowed the realization of vertical device architectures with drift layer thicknesses of 6 to 40 μm and net carrier electron concentrations as low as 1 × 1015 cm-3. This parameter range is suitable for applications requiring breakdown voltages of 1.2 kV to 5 kV. Mg, which is used as a p-type dopant in GaN, is a relatively deep acceptor (E A ≈ 0.18 eV) and susceptible to freeze-out at temperatures below 200 K. The loss of holes in p-GaN has a deleterious effect on p-n junction behavior, p-GaN contacts and channel control in junction field-effect transistors at temperatures below 200 K. Impact ionization-based avalanche breakdown (BV > 1200 V) in GaN p-n junctions is characterized between 77 K and 423 K for the first time. At higher temperatures the p-n junction breakdown voltage improves due to increased phonon scattering. A positive temperature coefficient in the breakdown voltage is demonstrated down to 77 K; however, the device breakdown characteristics are not as abrupt at temperatures below 200 K. On the other hand, contact resistance to p-GaN is reduced dramatically above room temperature, improving the overall device performance in GaN p-n diodes in all cases except where the n-type drift region resistance dominates the total forward resistance. In this case, the electron mobility can be deconvolved and is found to decrease with T -3/2, consistent with a phonon scattering model. Also, normally-on vertical junction

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

KAUST Repository

Nayak, Pradipta K.

2012-06-22

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin filmtransistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectrictransistors, which is very promising for low-power non-volatile memory applications.

Superconducting transistor

International Nuclear Information System (INIS)

Gray, K.E.

1978-01-01

A three film superconducting tunneling device, analogous to a semiconductor transistor, is presented, including a theoretical description and experimental results showing a current gain of four. Much larger current gains are shown to be feasible. Such a development is particularly interesting because of its novelty and the striking analogies with the semiconductor junction transistor

Neutron and gamma irradiation effects on power semiconductor switches

International Nuclear Information System (INIS)

Schwarze, G.E.; Frasca, A.J.

1990-01-01

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN bipolar junction transistors (BJTs), and metal-oxide-semiconductor field effect transistors (MOSFETs)

Characterization of vertical GaN p–n diodes and junction field-effect transistors on bulk GaN down to cryogenic temperatures

International Nuclear Information System (INIS)

Kizilyalli, I C; Aktas, O

2015-01-01

There is great interest in wide-bandgap semiconductor devices and most recently in vertical GaN structures for power electronic applications such as power supplies, solar inverters and motor drives. In this paper the temperature-dependent electrical behavior of vertical GaN p–n diodes and vertical junction field-effect transistors fabricated on bulk GaN substrates of low defect density (10 4 to 10 6 cm −2 ) is described. Homoepitaxial MOCVD growth of GaN on its native substrate and the ability to control the doping in the drift layers in GaN have allowed the realization of vertical device architectures with drift layer thicknesses of 6 to 40 μm and net carrier electron concentrations as low as 1 × 10 15 cm −3 . This parameter range is suitable for applications requiring breakdown voltages of 1.2 kV to 5 kV. Mg, which is used as a p-type dopant in GaN, is a relatively deep acceptor (E A  ≈ 0.18 eV) and susceptible to freeze-out at temperatures below 200 K. The loss of holes in p-GaN has a deleterious effect on p–n junction behavior, p-GaN contacts and channel control in junction field-effect transistors at temperatures below 200 K. Impact ionization-based avalanche breakdown (BV > 1200 V) in GaN p–n junctions is characterized between 77 K and 423 K for the first time. At higher temperatures the p–n junction breakdown voltage improves due to increased phonon scattering. A positive temperature coefficient in the breakdown voltage is demonstrated down to 77 K; however, the device breakdown characteristics are not as abrupt at temperatures below 200 K. On the other hand, contact resistance to p-GaN is reduced dramatically above room temperature, improving the overall device performance in GaN p–n diodes in all cases except where the n-type drift region resistance dominates the total forward resistance. In this case, the electron mobility can be deconvolved and is found to decrease with T −3/2 , consistent with a phonon scattering model. Also

Analysis of different tunneling mechanisms of InxGa1−xAs/AlGaAs tunnel junction light-emitting transistors

International Nuclear Information System (INIS)

Wu, Cheng-Han; Wu, Chao-Hsin

2014-01-01

The electrical and optical characteristics of tunnel junction light-emitting transistors (TJLETs) with different indium mole fractions (x = 5% and 2.5%) of the In x Ga 1−x As base-collector tunnel junctions have been investigated. Two electron tunneling mechanisms (photon-assisted or direct tunneling) provide additional currents to electrical output and resupply holes back to the base region, resulting in the upward slope of I-V curves and enhanced optical output under forward-active operation. The larger direct tunneling probability and stronger Franz-Keldysh absorption for 5% TJLET lead to higher collector current slope and less optical intensity enhancement when base-collector junction is under reverse-biased.

Radiation effect of gate controlled lateral PNP BJTs

International Nuclear Information System (INIS)

Xi Shanbin; Zhou Dong; Lu Wu; Ren Diyuan; Wen Lin; Sun Jing; Wang Zhikuan

2012-01-01

Design and fabricate a new test structure of bipolar device: the gate controlled later PNP bipolar transistor (GCLPNP BJT), then sealed it together with the normal lateral PNP bipolar transistor which is made under the same manufacture process. Then 60 Co-γ radiation effects and annealing behaviors of these two structures are investigated. The results show that the response about base current, collector current, access base current and normalized current gain of GCLPNP bipolar transistor are almost identical to the normal one. Radiation induced defects in the GCLPNP bipolar transistor is separated quantitatively. Studying on the quantitative change of radiation induced defects in the domestic gate controlled bipolar transistor should be a useful way to research the change of radiation induced charges of normal PNP bipolar transistor. (authors)

Distributed amplifier using Josephson vortex flow transistors

International Nuclear Information System (INIS)

McGinnis, D.P.; Beyer, J.B.; Nordman, J.E.

1986-01-01

A wide-band traveling wave amplifier using vortex flow transistors is proposed. A vortex flow transistor is a long Josephson junction used as a current controlled voltage source. The dual nature of this device to the field effect transistor is exploited. A circuit model of this device is proposed and a distributed amplifier utilizing 50 vortex flow transistors is predicted to have useful gain to 100 GHz

Synergetic effects of radiation stress and hot-carrier stress on the current gain of npn bipolar junction transistors

International Nuclear Information System (INIS)

Witczak, S.C.; Kosier, S.L.; Schrimpf, R.D.; Galloway, K.F.

1994-01-01

The combined effects of ionizing radiation and hot-carrier stress on the current gain of npn bipolar junction transistors were investigated. The analysis was carried out experimentally by examining the consequences of interchanging the order in which the two stress types were applied to identical transistors which were stressed to various levels of damage. The results indicate that the hot-carrier response of the transistor is improved by radiation damage, whereas hot-carrier damage has little effect on subsequent radiation stress. Characterization of the temporal progression of hot-carrier effects revealed that hot-carrier stress acts initially to reduce excess base current and improve current gain in irradiated transistors. PISCES simulations show that the magnitude of the peak electric-field within the emitter-base depletion region is reduced significantly by net positive oxide charges induced by radiation. The interaction of the two stress types is explained in a qualitative model based on the probability of hot-carrier injection determined by radiation damage and on the neutralization and compensation of radiation-induced positive oxide charges by injected electrons. The result imply that a bound on damage due to the combined stress types is achieved when hot-carrier stress precedes any irradiation

Black Phosphorus-Zinc Oxide Nanomaterial Heterojunction for p-n Diode and Junction Field-Effect Transistor.

Science.gov (United States)

Jeon, Pyo Jin; Lee, Young Tack; Lim, June Yeong; Kim, Jin Sung; Hwang, Do Kyung; Im, Seongil

2016-02-10

Black phosphorus (BP) nanosheet is two-dimensional (2D) semiconductor with distinct band gap and attracting recent attention from researches because it has some similarity to gapless 2D semiconductor graphene in the following two aspects: single element (P) for its composition and quite high mobilities depending on its fabrication conditions. Apart from several electronic applications reported with BP nanosheet, here we report for the first time BP nanosheet-ZnO nanowire 2D-1D heterojunction applications for p-n diodes and BP-gated junction field effect transistors (JFETs) with n-ZnO channel on glass. For these nanodevices, we take advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO. As a result, our BP-ZnO nanodimension p-n diode displays a high ON/OFF ratio of ∼10(4) in static rectification and shows kilohertz dynamic rectification as well while ZnO nanowire channel JFET operations are nicely demonstrated by BP gate switching in both electrostatics and kilohertz dynamics.

Current-Induced Transistor Sensorics with Electrogenic Cells

Directory of Open Access Journals (Sweden)

Peter Fromherz

2016-04-01

Full Text Available The concepts of transistor recording of electroactive cells are considered, when the response is determined by a current-induced voltage in the electrolyte due to cellular activity. The relationship to traditional transistor recording, with an interface-induced response due to interactions with the open gate oxide, is addressed. For the geometry of a cell-substrate junction, the theory of a planar core-coat conductor is described with a one-compartment approximation. The fast electrical relaxation of the junction and the slow change of ion concentrations are pointed out. On that basis, various recording situations are considered and documented by experiments. For voltage-gated ion channels under voltage clamp, the effects of a changing extracellular ion concentration and the enhancement/depletion of ion conductances in the adherent membrane are addressed. Inhomogeneous ion conductances are crucial for transistor recording of neuronal action potentials. For a propagating action potential, the effects of an axon-substrate junction and the surrounding volume conductor are distinguished. Finally, a receptor-transistor-sensor is described, where the inhomogeneity of a ligand–activated ion conductance is achieved by diffusion of the agonist and inactivation of the conductance. Problems with regard to a development of reliable biosensors are mentioned.

Analytical modeling of split-gate junction-less transistor for a biosensor application

Directory of Open Access Journals (Sweden)

Shradhya Singh

2018-04-01

Full Text Available This paper represents the analytical modeling of split-gate Dielectric Modulated Junction Less Transistor (JLT for label free electrical detection of bio molecules. Some part of the channel region is opened for providing the binding sites for the bio molecules unlike conventional MOSFET which is enclosed with the gate electrode. Due to this open area, the surface potential of this region affected by the charged and neutral bio molecules immobilized to the open region of channel. Surface potential of the channel region obtained by solving two-Dimensional Poisson's equation by potential profile having parabolic nature through channel region using technique called conformal mapping. By deriving the surface potential model, derivation of threshold model can also be done. For the detection of bio molecule, variation in to the threshold voltage due to binding of bio molecule in the gate underlap region is the sensing metric.

Photonuclear and Radiation Effects Testing with a Refurbished 20 MeV Medical Electron Linac

CERN Document Server

Webb, Timothy; Beezhold, Wendland; De Veaux, Linda C; Harmon, Frank; Petrisko, Jill E; Spaulding, Randy

2005-01-01

An S-band 20 MeV electron linear accelerator formerly used for medical applications has been recommissioned to provide a wide range of photonuclear activation studies as well as various radiation effects on biological and microelectronic systems. Four radiation effect applications involving the electron/photon beams are described. Photonuclear activation of a stable isotope of oxygen provides an active means of characterizing polymer degradation. Biological irradiations of microorganisms including bacteria were used to study total dose and dose rate effects on survivability and the adaptation of these organisms to repeated exposures. Microelectronic devices including bipolar junction transistors (BJTs) and diodes were irradiated to study photocurrent from these devices as a function of peak dose rate with comparisons to computer modeling results. In addition, the 20 MeV linac may easily be converted to a medium energy neutron source which has been used to study neutron damage effects on transistors.

Radiation-stimulated processes in transistor temperature sensors

International Nuclear Information System (INIS)

Pavlyk, B. V.; Grypa, A. S.

2016-01-01

The features of the radiation-stimulated changes in the I–V and C–V characteristics of the emitter–base junction in KT3117 transistors are considered. It is shown that an increase in the current through the emitter junction is observed at the initial stage of irradiation (at doses of D < 4000 Gy for the “passive” irradiation mode and D < 5200 Gy for the “active” mode), which is caused by the effect of radiation-stimulated ordering of the defect-containing structure of the p–n junction. It is also shown that the X-ray irradiation (D < 14000 Gy), the subsequent relaxation (96 h), and thermal annealing (2 h at 400 K) of the transistor temperature sensors under investigation result in an increase in their radiation resistance.

Multiplication in Silicon p-n Junctions

DEFF Research Database (Denmark)

Moll, John L.

1965-01-01

Multiplication values were measured in the collector junctions of silicon p-n-p and n-p-n transistors before and after bombardment by 1016 neutrons/cm2. Within experimental error there was no change either in junction fields, as deduced from capacitance measurements, or in multiplication values i...

MOSFET-BJT hybrid mode of the gated lateral bipolar junction transistor for C-reactive protein detection.

Science.gov (United States)

Yuan, Heng; Kwon, Hyurk-Choon; Yeom, Se-Hyuk; Kwon, Dae-Hyuk; Kang, Shin-Won

2011-10-15

In this study, we propose a novel biosensor based on a gated lateral bipolar junction transistor (BJT) for biomaterial detection. The gated lateral BJT can function as both a BJT and a metal-oxide-semiconductor field-effect transistor (MOSFET) with both the emitter and source, and the collector and drain, coupled. C-reactive protein (CRP), which is an important disease marker in clinical examinations, can be detected using the proposed device. In the MOSFET-BJT hybrid mode, the sensitivity, selectivity, and reproducibility of the gated lateral BJT for biosensors were evaluated in this study. According to the results, in the MOSFET-BJT hybrid mode, the gated lateral BJT shows good selectivity and reproducibility. Changes in the emitter (source) current of the device for CRP antigen detection were approximately 0.65, 0.72, and 0.80 μA/decade at base currents of -50, -30, and -10 μA, respectively. The proposed device has significant application in the detection of certain biomaterials that require a dilution process using a common biosensor, such as a MOSFET-based biosensor. Copyright © 2011 Elsevier B.V. All rights reserved.

A Novel Subnanosecond Monocycle Pulse Generator for UWB Radar Applications

Directory of Open Access Journals (Sweden)

Xinfan Xia

2014-01-01

Full Text Available A novel ultra-wideband (UWB monocycle pulse generator with good performance is designed and demonstrated in this paper. It contains a power supply circuit, a pulse drive circuit, a unique pulse forming circuit, and a novel monopolar-to-monocycle pulse transition circuit. The drive circuit employs wideband bipolar junction transistors (BJTs and linear power amplifier transistor to produce a high amplitude drive pulse, and the pulse forming circuit uses the transition characteristics of step recovery diode (SRD effectively to produce a negative narrow pulse. At last, the monocycle pulse forming circuit utilizes a novel inductance L short-circuited stub to generate the monocycle pulse directly. Measurement results show that the waveform of the generated monocycle pulses is over 76 V in peak-to-peak amplitude and 3.2 ns in pulse full-width. These characteristics of the monocycle pulse are advantageous for obtaining long detection range and high resolution, when it is applied to ultra-wideband radar applications.

Junctionless Cooper pair transistor

Energy Technology Data Exchange (ETDEWEB)

Arutyunov, K. Yu., E-mail: konstantin.yu.arutyunov@jyu.fi [National Research University Higher School of Economics , Moscow Institute of Electronics and Mathematics, 101000 Moscow (Russian Federation); P.L. Kapitza Institute for Physical Problems RAS , Moscow 119334 (Russian Federation); Lehtinen, J.S. [VTT Technical Research Centre of Finland Ltd., Centre for Metrology MIKES, P.O. Box 1000, FI-02044 VTT (Finland)

2017-02-15

Highlights: • Junctionless Cooper pair box. • Quantum phase slips. • Coulomb blockade and gate modulation of the Coulomb gap. - Abstract: Quantum phase slip (QPS) is the topological singularity of the complex order parameter of a quasi-one-dimensional superconductor: momentary zeroing of the modulus and simultaneous 'slip' of the phase by ±2π. The QPS event(s) are the dynamic equivalent of tunneling through a conventional Josephson junction containing static in space and time weak link(s). Here we demonstrate the operation of a superconducting single electron transistor (Cooper pair transistor) without any tunnel junctions. Instead a pair of thin superconducting titanium wires in QPS regime was used. The current–voltage characteristics demonstrate the clear Coulomb blockade with magnitude of the Coulomb gap modulated by the gate potential. The Coulomb blockade disappears above the critical temperature, and at low temperatures can be suppressed by strong magnetic field.

Technique for electronic measurement of semi-reduction layer using bipolar transistor of junction

International Nuclear Information System (INIS)

Santos, Luiz A.P.; Barros, Fabio R.; Santos, Marcus A.P.; Monte, David S.; Santos, Jose A.P.

2014-01-01

Recommendations of the International Commission on Radiological Protection (ICRP), the World Health Organization (WHO) and also of the International Atomic Energy Agency (IAEA) suggest equipment for X-rays diagnosis are checked for conformance to their parameters, such as Layer Semi-Reduction (CSR). The importance of verification of diagnostic radiology in parameters is because of have records that forces patients undergoing radiation doses in some clinics, up to 300% the reference values suggested by international agencies which doses are considered unnecessary, and even harmful, either because of physical or variable greatness of being out of control nominal specification, or the fact of having to repeat the radiographs. In this context, the purpose of this study was an innovative methodology that is the use of bipolar transistor junction (TBJ) to measure the aluminum CSR in diagnostic X-ray equipment beams. Although the TBJ be a device invented in the last century, only in recent years have explored their potential as X-ray sensor applied to diagnosis. The study indicates that the tested device can operating the detection of X-rays is properly polarized with electrical signals that can detect interference of the interaction of X-ray photons with the PN junction formed by the base and emitter terminals. The result of the developed technique was compared to CSR measurements obtained with detection systems standards and it was found that the BJT provides values for aluminum CSR relative errors less than 5%

Superconducting β-ZrNClx probed by scanning-tunnelling and break-junction spectroscopy

International Nuclear Information System (INIS)

Ekino, Toshikazu; Sugimoto, Akira; Gabovich, Alexander M.; Zheng, Zhanfeng; Yamanaka, Shoji

2013-01-01

Highlights: •STM/STS combined with break-junction tunnelling spectroscopy (BJTS) on β-ZrNCl. •STM image on the ab plane shows triangular atomic lattice spots with a period of 0.36 nm. •The gap peaks are widely distributed (Δ p–p = 9–28 meV)over the area of 100 nm 2 . •Average gap ratio 2Δ/k B T c ∼ 10 is confirmed by both STS and BJTS. -- Abstract: Superconducting layered compound β-ZrNCl x (x = 0.7) with the critical temperature T c = 13–14 K was investigated by means of scanning tunnelling microscopy/spectroscopy. The single-crystal domain facet of ∼100 μm 2 in the c-axis-oriented polycrystal was used as a probing surface. The STM image at 4.9 K shows triangular atomic lattice spots with the period of ∼0.36 nm, which agrees with the X-ray diffraction measurements. The STS measurements of the local conductance, dI/dV, exhibit broadened gap structures with a substantial distribution of the gap-edge values. Most frequently observed peak-to-peak value of ∼20 mV is remarkably similar to the superconducting gap edge of the isostructural β-HfNCl x with T c = 24 K. Temperature, T, dependence of the dI/dV shows that the gap structure disappears above T c ∼ 13 K. Fitting of the dI/dV curve by the broadened BCS density of states leads to the superconducting gap of 2Δ(4.9 K) = 11–13 meV. This is in accordance with our former break-junction data confirming the intrinsic character of the previously obtained extremely large gap to T c ratio 2Δ(0)/k B T c ≈ 10 (k B is the Boltzmann constant), thereby pointing to the unusual superconducting properties of this compound

Gap features of layered iron-selenium-tellurium compound below and above the superconducting transition temperature by break-junction spectroscopy combined with STS

Science.gov (United States)

Ekino, T.; Sugimoto, A.; Gabovich, A. M.

2018-05-01

We studied correlations between the superconducting gap features of Te-substituted FeSe observed by scanning tunnelling spectroscopy (STS) and break-junction tunnelling spectroscopy (BJTS). At bias voltages outside the superconducting gap-energy range, the broad gap structure exists, which becomes the normal-state gap above the critical temperature, T c. Such behaviour is consistent with the model of the partially gapped density-wave superconductor involving both superconducting gaps and pseudogaps, which has been applied by us earlier to high-Tc cuprates. The similarity suggests that the parent electronic spectrum features should have much in common for these classes of materials.

Electrical pulse burnout of transistors in intense ionizing radiation

International Nuclear Information System (INIS)

Hartman, E.F.; Evans, D.C.

1975-01-01

Tests examining possible synergistic effects of electrical pulses and ionizing radiation on transistors were performed and energy/power thresholds for transistor burnout determined. The effect of ionizing radiation on burnout thresholds was found to be minimal, indicating that electrical pulse testing in the absence of radiation produces burnout-threshold results which are applicable to IEMP studies. The conditions of ionized transistor junctions and radiation induced current surges at semiconductor device terminals are inherent in IEMP studies of electrical circuits

Radiation effects on JFETS, MOSFETS, and bipolar transistors, as related to SSC circuit design

Energy Technology Data Exchange (ETDEWEB)

Kennedy, E J; Gray, B; Wu, A [Dept. of Electrical and Computer Engineering, Univ. of Tennessee, Knoxville, TN (United States); Alley, G T; Britton, Jr, C L [Oak Ridge National Lab., TN (United States); Skubic, P L [Univ. of Oklahoma, Dept. of Physics and Astronomy, Norman, OK (United States)

1991-10-01

Some results of radiation effects on selected junction field-effect transistors, MOS field-effect transistors, and bipolar junction transistors are presented. The evaluations include dc parameters, as well as capacitive variations and noise evaluations. The tests are made at the low current and voltage levels (in particular at currents {<=} 1 mA) that are essential for the low-power regimes required by SSC circuitry. Detailed noise data are presented both before and after 5-Mrad (gamma) total-dose exposure. SPICE radiation models for three high-frequency bipolar processes are compared for a typical charge-sensitive preamplifier. (orig.).

Performance Enhancement of Power Transistors and Radiation effect

International Nuclear Information System (INIS)

Hassn, Th.A.A.

2012-01-01

The main objective of this scientific research is studying the characteristic of bipolar junction transistor device and its performance under radiation fields and temperature effect as a control element in many power circuits. In this work we present the results of experimental measurements and analytical simulation of gamma – radiation effects on the electrical characteristics and operation of power transistor types 2N3773, 2N3055(as complementary silicon power transistor are designed for general-purpose switching and amplifier applications), three samples of each type were irradiated by gamma radiation with doses, 1 K rad, 5 K rad, 10 K rad, 30 K rad, and 10 Mrad, the experimental data are utilized to establish an analytical relation between the total absorbed dose of gamma irradiation and corresponding to effective density of generated charge in the internal structure of transistor, the electrical parameters which can be measured to estimate the generated defects in the power transistor are current gain, collector current and collected emitter leakage current , these changes cause the circuit to case proper functioning. Collector current and transconductance of each device are calibrated as a function of irradiated dose. Also the threshold voltage and transistor gain can be affected and also calibrated as a function of dose. A silicon NPN power transistor type 2N3773 intended for general purpose applications, were used in this work. It was designed for medium current and high power circuits. Performance and characteristic were discusses under temperature and gamma radiation doses. Also the internal junction thermal system of the transistor represented in terms of a junction thermal resistance (Rjth). The thermal resistance changed by ΔRjth, due to the external intended, also due to the gamma doses intended. The final result from the model analysis reveals that the emitter-bias configuration is quite stable by resistance ratio RB/RE. Also the current

Tunnel field-effect transistors with germanium/strained-silicon hetero-junctions for low power applications

International Nuclear Information System (INIS)

Kim, Minsoo; Kim, Younghyun; Yokoyama, Masafumi; Nakane, Ryosho; Kim, SangHyeon; Takenaka, Mitsuru; Takagi, Shinichi

2014-01-01

We have studied a simple structure n-channel tunnel field-effect transistor with a pure-Ge/strained-Si hetero-junction. The device operation was demonstrated for the devices fabricated by combining epitaxially-grown Ge on strained-silicon-on-insulator substrates. Atomic-layer-deposition-Al 2 O 3 -based gate stacks were formed with electron cyclotron resonance plasma post oxidation to ensure the high quality metal–oxide–semiconductor interface between the high-k insulator and Ge. While the gate leakage current and drain current saturation are well controlled, relatively higher minimum subthreshold swing of 125 mV/dec and lower I ON /I OFF ratio of 10 3 –10 4 were obtained. It is expected that these device characteristics can be improved by further process optimization. - Highlights: • Layer by layer growth of Ge • Uniform interface between Ge and the insulator • Gate leakage current and drain current saturation seem to be well controlled. • The output characteristics show good saturation

The physical analysis on electrical junction of junctionless FET

Directory of Open Access Journals (Sweden)

Lun-Chun Chen

2017-02-01

Full Text Available We propose the concept of the electrical junction in a junctionless (JL field-effect-transistor (FET to illustrate the transfer characteristics of the JL FET. In this work, nanowire (NW junctionless poly-Si thin-film transistors are used to demonstrate this conception of the electrical junction. Though the dopant and the dosage of the source, of the drain, and of the channel are exactly the same in the JL FET, the transfer characteristics of the JL FET is similar to these of the conventional inversion-mode FET rather than these of a resistor, which is because of the electrical junction at the boundary of the gate and the drain in the JL FET. The electrical junction helps us to understand the JL FET, and also to explain the superior transfer characteristic of the JL FET with the gated raised S/D (Gout structure which reveals low drain-induced-barrier-lowering (DIBL and low breakdown voltage of ion impact ionization.

Research on design feasibility of high-power light-weight dc-to-dc converters for space power applications

Science.gov (United States)

Wilson, T. G.

1981-01-01

Utilizing knowledge gained from past experience with experimental current-or-voltage step-up dc-to-dc converter power stages operating at output powers up to and in excess of 2 kW, a new experimental current-or-voltage step-up power stage using paralleled bipolar junction transistors (BJTs) as the controlled power switch, was constructed during the current reporting period. The major motivation behind the construction of this new experimental power stage was to improve the circuit layout so as to reduce the effects of stray circuit parasitic inductances resulting from excess circuit lead lengths and circuit loops, and to take advantage of the layout improvements which could be made when some recently-available power components, particularly power diodes and polypropylene filter capacitors, were incorporated into the design.

Fast turn-off of high voltage 4H–SiC npn BJTs from the saturation on-state regime

International Nuclear Information System (INIS)

Ivanov, P A; Levinshtein, M E; Palmour, J W; Agarwal, A K; Zhang, J

2010-01-01

Fast turn-off of high-voltage (breakdown voltage ≥ 3 kV) 4H–SiC npn bipolar junction transistors driven in a deeply saturated regime has been reported. In the conventional turn-off mode (base current break), the turn-off delay and current fall times are 80 ns and 100 ns, respectively. It is shown that these times can be made as short as 20 and 4 ns, respectively, if a reverse base current pulse of appropriate amplitude is applied to sweep out minority carriers from the base. The experimental values of delay and turn-off times well coincide with those calculated in terms of the charge control model

Oscillation of Critical Current by Gate Voltage in Cooper Pair Transistor

International Nuclear Information System (INIS)

Kim, N.; Cheong, Y.; Song, W.

2010-01-01

We measured the critical current of a Cooper pair transistor consisting of two Josephson junctions and a gate electrode. The Cooper pair transistors were fabricated by using electron-beam lithography and double-angle evaporation technique. The Gate voltage dependence of critical current was measured by observing voltage jumps at various gate voltages while sweeping bias current. The observed oscillation was 2e-periodic, which shows the Cooper pair transistor had low level of quasiparticle poisoning.

Highly Crumpled All-Carbon Transistors for Brain Activity Recording.

Science.gov (United States)

Yang, Long; Zhao, Yan; Xu, Wenjing; Shi, Enzheng; Wei, Wenjing; Li, Xinming; Cao, Anyuan; Cao, Yanping; Fang, Ying

2017-01-11

Neural probes based on graphene field-effect transistors have been demonstrated. Yet, the minimum detectable signal of graphene transistor-based probes is inversely proportional to the square root of the active graphene area. This fundamentally limits the scaling of graphene transistor-based neural probes for improved spatial resolution in brain activity recording. Here, we address this challenge using highly crumpled all-carbon transistors formed by compressing down to 16% of its initial area. All-carbon transistors, chemically synthesized by seamless integration of graphene channels and hybrid graphene/carbon nanotube electrodes, maintained structural integrity and stable electronic properties under large mechanical deformation, whereas stress-induced cracking and junction failure occurred in conventional graphene/metal transistors. Flexible, highly crumpled all-carbon transistors were further verified for in vivo recording of brain activity in rats. These results highlight the importance of advanced material and device design concepts to make improvements in neuroelectronics.

Low-frequency noise in single electron tunneling transistor

DEFF Research Database (Denmark)

Tavkhelidze, A.N.; Mygind, Jesper

1998-01-01

The noise in current biased aluminium single electron tunneling (SET) transistors has been investigated in the frequency range of 5 mHz ..., we find the same input charge noise, typically QN = 5 × 10–4 e/Hz1/2 at 10 Hz, with and without the HF shielding. At lower frequencies, the noise is due to charge trapping, and the voltage noise pattern superimposed on the V(Vg) curve (voltage across transistor versus gate voltage) strongly depends...... when ramping the junction voltage. Dynamic trapping may limit the high frequency applications of the SET transistor. Also reported on are the effects of rf irradiation and the dependence of the SET transistor noise on bias voltage. ©1998 American Institute of Physics....

Theoretical results on the tandem junction solar cell based on its Ebers-Moll transistor model

Science.gov (United States)

Goradia, C.; Vaughn, J.; Baraona, C. R.

1980-01-01

A one-dimensional theoretical model of the tandem junction solar cell (TJC) with base resistivity greater than about 1 ohm-cm and under low level injection has been derived. This model extends a previously published conceptual model which treats the TJC as an npn transistor. The model gives theoretical expressions for each of the Ebers-Moll type currents of the illuminated TJC and allows for the calculation of the spectral response, I(sc), V(oc), FF and eta under variation of one or more of the geometrical and material parameters and 1MeV electron fluence. Results of computer calculations based on this model are presented and discussed. These results indicate that for space applications, both a high beginning of life efficiency, greater than 15% AM0, and a high radiation tolerance can be achieved only with thin (less than 50 microns) TJC's with high base resistivity (greater than 10 ohm-cm).

Development and characterization of vertical double-gate MOS field-effect transistors

International Nuclear Information System (INIS)

Trellenkamp, S.

2004-07-01

Planar MOS-field-effect transistors are common devices today used by the computer industry. When their miniaturization reaches its limit, alternate transistor concepts become necessary. In this thesis the development of vertical Double-Gate-MOS-field-effect transistors is presented. These types of transistors have a vertically aligned p-n-p junction (or n-p-n junction, respectively). Consequently, the source-drain current flows perpendicular with respect to the surface of the wafer. A Double-Gate-field-effect transistor is characterized by a very thin channel region framed by two parallel gates. Due to the symmetry of the structure and less bulk volume better gate control and hence better short channel behavior is expected, as well as an improved scaling potential. Nanostructuring of the transistor's active region is very challenging. Approximately 300 nm high and down to 30 nm wide silicon ridges are requisite. They can be realized using hydrogen silsesquioxane (HSQ) as inorganic high resolution resist for electron beam lithography. Structures defined in HSQ are then transferred with high anisotropy and selectivity into silicon using ICP-RIE (reactive ion etching with inductive coupled plasma). 25 nm wide and 330 nm high silicon ridges are achieved. Different transistor layouts are realized. The channel length is defined by epitaxial growth of doped silicon layers before or by ion implantation after nanostructuring, respectively. The transistors show source-drain currents up to 380 μA/μm and transconductances up to 480 μS/μm. Improved short channel behavior for decreasing width of the silicon ridges is demonstrated. (orig.)

Tunnel field-effect transistors with germanium/strained-silicon hetero-junctions for low power applications

Energy Technology Data Exchange (ETDEWEB)

Kim, Minsoo, E-mail: minsoo@mosfet.t.u-tokyo.ac.jp; Kim, Younghyun; Yokoyama, Masafumi; Nakane, Ryosho; Kim, SangHyeon; Takenaka, Mitsuru; Takagi, Shinichi

2014-04-30

We have studied a simple structure n-channel tunnel field-effect transistor with a pure-Ge/strained-Si hetero-junction. The device operation was demonstrated for the devices fabricated by combining epitaxially-grown Ge on strained-silicon-on-insulator substrates. Atomic-layer-deposition-Al{sub 2}O{sub 3}-based gate stacks were formed with electron cyclotron resonance plasma post oxidation to ensure the high quality metal–oxide–semiconductor interface between the high-k insulator and Ge. While the gate leakage current and drain current saturation are well controlled, relatively higher minimum subthreshold swing of 125 mV/dec and lower I{sub ON}/I{sub OFF} ratio of 10{sup 3}–10{sup 4} were obtained. It is expected that these device characteristics can be improved by further process optimization. - Highlights: • Layer by layer growth of Ge • Uniform interface between Ge and the insulator • Gate leakage current and drain current saturation seem to be well controlled. • The output characteristics show good saturation.

Optimizing switching frequency of the soliton transistor by numerical simulation

Energy Technology Data Exchange (ETDEWEB)

Izadyar, S., E-mail: S_izadyar@yahoo.co [Department of Electronics, Khaje Nasir Toosi University of Technology, Shariati Ave., Tehran (Iran, Islamic Republic of); Niazzadeh, M.; Raissi, F. [Department of Electronics, Khaje Nasir Toosi University of Technology, Shariati Ave., Tehran (Iran, Islamic Republic of)

2009-10-15

In this paper, by numerical simulations we have examined different ways to increase the soliton transistor's switching frequency. Speed of the solitons in a soliton transistor depends on various parameters such as the loss of the junction, the applied bias current, and the transmission line characteristics. Three different ways have been examined; (i) decreasing the size of the transistor without losing transistor effect. (ii) Decreasing the amount of loss of the junction to increase the soliton speed. (iii) Optimizing the bias current to obtain maximum possible speed. We have obtained the shortest possible length to have at least one working soliton inside the transistor. The dimension of the soliton can be decreased by changing the inductance of the transmission line, causing a further decrease in the size of the transistor, however, a trade off between the size and the inductance is needed to obtain the optimum switching speed. Decreasing the amount of loss can be accomplished by increasing the characteristic tunneling resistance of the device, however, a trade off is again needed to make soliton and antisoliton annihilation possible. By increasing the bias current, the forces acting the solitons increases and so does their speed. Due to nonuniform application of bias current a self induced magnetic field is created which can result in creation of unwanted solitons. Optimum bias current application can result in larger bias currents and larger soliton speed. Simulations have provided us with such an arrangement of bias current paths.

Optimizing switching frequency of the soliton transistor by numerical simulation

International Nuclear Information System (INIS)

Izadyar, S.; Niazzadeh, M.; Raissi, F.

2009-01-01

In this paper, by numerical simulations we have examined different ways to increase the soliton transistor's switching frequency. Speed of the solitons in a soliton transistor depends on various parameters such as the loss of the junction, the applied bias current, and the transmission line characteristics. Three different ways have been examined; (i) decreasing the size of the transistor without losing transistor effect. (ii) Decreasing the amount of loss of the junction to increase the soliton speed. (iii) Optimizing the bias current to obtain maximum possible speed. We have obtained the shortest possible length to have at least one working soliton inside the transistor. The dimension of the soliton can be decreased by changing the inductance of the transmission line, causing a further decrease in the size of the transistor, however, a trade off between the size and the inductance is needed to obtain the optimum switching speed. Decreasing the amount of loss can be accomplished by increasing the characteristic tunneling resistance of the device, however, a trade off is again needed to make soliton and antisoliton annihilation possible. By increasing the bias current, the forces acting the solitons increases and so does their speed. Due to nonuniform application of bias current a self induced magnetic field is created which can result in creation of unwanted solitons. Optimum bias current application can result in larger bias currents and larger soliton speed. Simulations have provided us with such an arrangement of bias current paths.

Total dose effects on elementary transistors of a comparator in bipolar technology

International Nuclear Information System (INIS)

Sarrabayrouse, G.; Guerre, F.X.

1995-01-01

In the present work we investigate elementary transistors behaviour of an Integrated Circuit using junction isolation bipolar technology. Polarization conditions and dose rate effects on the main elementary transistor types are analysed. Furthermore, the IC electronic function degradations are studied. Finally, a comparison between the function degradations and the elementary component ones is attempted. (author)

Magnetic Vortex Based Transistor Operations

Science.gov (United States)

Kumar, D.; Barman, S.; Barman, A.

2014-01-01

Transistors constitute the backbone of modern day electronics. Since their advent, researchers have been seeking ways to make smaller and more efficient transistors. Here, we demonstrate a sustained amplification of magnetic vortex core gyration in coupled two and three vortices by controlling their relative core polarities. This amplification is mediated by a cascade of antivortex solitons travelling through the dynamic stray field. We further demonstrated that the amplification can be controlled by switching the polarity of the middle vortex in a three vortex sequence and the gain can be controlled by the input signal amplitude. An attempt to show fan–out operation yielded gain for one of the symmetrically placed branches which can be reversed by switching the core polarity of all the vortices in the network. The above observations promote the magnetic vortices as suitable candidates to work as stable bipolar junction transistors (BJT). PMID:24531235

Research of the voltage and current stabilization processes by using the silicon field-effect transistor

International Nuclear Information System (INIS)

Karimov, A.V.; Yodgorova, D.M.; Kamanov, B.M.; Giyasova, F.A.; Yakudov, A.A.

2012-01-01

The silicon field-effect transistors were investigated to use in circuits for stabilization of current and voltage. As in gallium arsenide field-effect transistors, in silicon field-effect transistors with p-n-junction a new mechanism of saturation of the drain current is experimentally found out due to both transverse and longitudinal compression of channel by additional resistance between the source and the gate of the transistor. The criteria for evaluating the coefficients of stabilization of transient current suppressors and voltage stabilizator based on the field-effect transistor are considered. (authors)

Planar transistors and impatt diodes with ion implantation

International Nuclear Information System (INIS)

Dorendorf, H.; Glawischnig, H.; Grasser, L.; Hammerschmitt, J.

1975-03-01

Low frequency planar npn and pnp transistors have been developed in which the base and emitter have been fabricated using ion implantation of boron and phosphorus by a drive-in diffusion. Electrical parameters of the transistors are comparable with conventionally produced transistors; the noise figure was improved and production tolerances were significantly reduced. Silicon-impatt diodes for the microwave range were also fabricated with implanted pn junctions and tested for their high frequency characteristics. These diodes, made in an improved upside down technology, delivered output power up to 40 mW (burn out power) at 30 GHz. Reverse leakage current and current carrying capability of these diodes were comparable to diffused structures. (orig.) 891 ORU 892 MB [de

High Accuracy Transistor Compact Model Calibrations

Energy Technology Data Exchange (ETDEWEB)

Hembree, Charles E. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Mar, Alan [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Robertson, Perry J. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)

2015-09-01

Typically, transistors are modeled by the application of calibrated nominal and range models. These models consists of differing parameter values that describe the location and the upper and lower limits of a distribution of some transistor characteristic such as current capacity. Correspond- ingly, when using this approach, high degrees of accuracy of the transistor models are not expected since the set of models is a surrogate for a statistical description of the devices. The use of these types of models describes expected performances considering the extremes of process or transistor deviations. In contrast, circuits that have very stringent accuracy requirements require modeling techniques with higher accuracy. Since these accurate models have low error in transistor descriptions, these models can be used to describe part to part variations as well as an accurate description of a single circuit instance. Thus, models that meet these stipulations also enable the calculation of quantifi- cation of margins with respect to a functional threshold and uncertainties in these margins. Given this need, new model high accuracy calibration techniques for bipolar junction transis- tors have been developed and are described in this report.

Non-classical polycrystalline silicon thin-film transistor with embedded block-oxide for suppressing the short channel effect

International Nuclear Information System (INIS)

Lin, Jyi-Tsong; Huang, Kuo-Dong; Hu, Shu-Fen

2008-01-01

In this paper, a polycrystalline silicon (polysilicon) thin-film transistor with a block oxide enclosing body, BTFT, is fabricated and investigated. By utilizing the block-oxide structure of thin-film transistors, the BTFT is shown to suppress the short channel effect. This proposed structure is formed by burying self-aligned oxide spacers along the sidewalls of the source and drain junctions, which reduces the P–N junction area, thereby reducing the junction capacitance and leakage current. Measurements demonstrate that the BTFT eliminates the punch-through effect even down to gate lengths of 1.5 µm, whereas the conventional TFT suffers serious short channel effects at this gate length

Extreme Temperature Performance of Automotive-Grade Small Signal Bipolar Junction Transistors

Science.gov (United States)

Boomer, Kristen; Damron, Benny; Gray, Josh; Hammoud, Ahmad

2018-01-01

Electronics designed for space exploration missions must display efficient and reliable operation under extreme temperature conditions. For example, lunar outposts, Mars rovers and landers, James Webb Space Telescope, Europa orbiter, and deep space probes represent examples of missions where extreme temperatures and thermal cycling are encountered. Switching transistors, small signal as well as power level devices, are widely used in electronic controllers, data instrumentation, and power management and distribution systems. Little is known, however, about their performance in extreme temperature environments beyond their specified operating range; in particular under cryogenic conditions. This report summarizes preliminary results obtained on the evaluation of commercial-off-the-shelf (COTS) automotive-grade NPN small signal transistors over a wide temperature range and thermal cycling. The investigations were carried out to establish a baseline on functionality of these transistors and to determine suitability for use outside their recommended temperature limits.

Applications, Prospects and Challenges of Silicon Carbide Junction Field Effect Transistor (SIC JFET

Directory of Open Access Journals (Sweden)

Frederick Ojiemhende Ehiagwina

2016-09-01

Full Text Available Properties of Silicon Carbide Junction Field Effect Transistor (SiC JFET such as high switching speed, low forward voltage drop and high temperature operation have attracted the interest of power electronic researchers and technologists, who for many years developed devices based on Silicon (Si.  A number of power system Engineers have made efforts to develop more robust equipment including circuits or modules with higher power density. However, it was realized that several available power semiconductor devices were approaching theoretical limits offered by Si material with respect to capability to block high voltage, provide low on-state voltage drop and switch at high frequencies. This paper presents an overview of the current applications of SiC JFET in circuits such as inverters, rectifiers and amplifiers. Other areas of application reviewed include; usage of the SiC JFET in pulse signal circuits and boost converters. Efforts directed toward mitigating the observed increase in electromagnetic interference were also discussed. It also presented some areas for further research, such as having more applications of SiC JFET in harsh, high temperature environment. More work is needed with regards to SiC JFET drivers so as to ensure stable and reliable operation, and reduction in the prices of SiC JFETs through mass production by industries.

Principles of transistor circuits introduction to the design of amplifiers, receivers and digital circuits

CERN Document Server

Amos, S W

1990-01-01

Principles of Transistor Circuits, Seventh Edition discusses the fundamental concepts of transistor circuits. The book is comprised of 16 chapters that cover amplifiers, oscillators, and generators. Chapter 1 discusses semiconductors and junction nodes, while Chapter 2 covers the basic principles of transistors. The subsequent chapters focus on amplifiers, where one of the chapters discusses bias and D.C. The book also talks about sinusoidal oscillators and covers modulators, demodulators, mixers, and receivers. Chapters 13 and 14 discuss pulse generators and sawtooth generators, respectively.

Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

Science.gov (United States)

Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

2008-11-01

In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

DC characteristics and parameters of silicon carbide high-voltage power BJTs

International Nuclear Information System (INIS)

Patrzyk, Joanna; Zarębski, Janusz; Bisewski, Damian

2016-01-01

The paper shows the static characteristics and operating parameters of the bipolar power transistors made of silicon carbide and for comparison their equivalents made of classical silicon technology. The characteristics and values of selected operating parameters with special emphasis on the effect of temperature and operating point of considered devices are discussed. Quantitative as well as qualitative differences between the characteristics of the transistor made of silicon and silicon carbide are indicated as well

Planar edge Schottky barrier-tunneling transistors using epitaxial graphene/SiC junctions.

Science.gov (United States)

Kunc, Jan; Hu, Yike; Palmer, James; Guo, Zelei; Hankinson, John; Gamal, Salah H; Berger, Claire; de Heer, Walt A

2014-09-10

A purely planar graphene/SiC field effect transistor is presented here. The horizontal current flow over one-dimensional tunneling barrier between planar graphene contact and coplanar two-dimensional SiC channel exhibits superior on/off ratio compared to conventional transistors employing vertical electron transport. Multilayer epitaxial graphene (MEG) grown on SiC(0001̅) was adopted as the transistor source and drain. The channel is formed by the accumulation layer at the interface of semi-insulating SiC and a surface silicate that forms after high vacuum high temperature annealing. Electronic bands between the graphene edge and SiC accumulation layer form a thin Schottky barrier, which is dominated by tunneling at low temperatures. A thermionic emission prevails over tunneling at high temperatures. We show that neglecting tunneling effectively causes the temperature dependence of the Schottky barrier height. The channel can support current densities up to 35 A/m.

Modeling of transient ionizing radiation effects in bipolar devices at high dose-rates

International Nuclear Information System (INIS)

FJELDLY, T.A.; DENG, Y.; SHUR, M.S.; HJALMARSON, HAROLD P.; MUYSHONDT, ARNOLDO

2000-01-01

To optimally design circuits for operation at high intensities of ionizing radiation, and to accurately predict their a behavior under radiation, precise device models are needed that include both stationary and dynamic effects of such radiation. Depending on the type and intensity of the ionizing radiation, different degradation mechanisms, such as photoelectric effect, total dose effect, or single even upset might be dominant. In this paper, the authors consider the photoelectric effect associated with the generation of electron-hole pairs in the semiconductor. The effects of low radiation intensity on p-II diodes and bipolar junction transistors (BJTs) were described by low-injection theory in the classical paper by Wirth and Rogers. However, in BJTs compatible with modem integrated circuit technology, high-resistivity regions are often used to enhance device performance, either as a substrate or as an epitaxial layer such as the low-doped n-type collector region of the device. Using low-injection theory, the transient response of epitaxial BJTs was discussed by Florian et al., who mainly concentrated on the effects of the Hi-Lo (high doping - low doping) epilayer/substrate junction of the collector, and on geometrical effects of realistic devices. For devices with highly resistive regions, the assumption of low-level injection is often inappropriate, even at moderate radiation intensities, and a more complete theory for high-injection levels was needed. In the dynamic photocurrent model by Enlow and Alexander. p-n junctions exposed to high-intensity radiation were considered. In their work, the variation of the minority carrier lifetime with excess carrier density, and the effects of the ohmic electric field in the quasi-neutral (q-n) regions were included in a simplified manner. Later, Wunsch and Axness presented a more comprehensive model for the transient radiation response of p-n and p-i-n diode geometries. A stationary model for high-level injection in p

Junction depth measurement using carrier illumination

International Nuclear Information System (INIS)

Borden, Peter

2001-01-01

Carrier Illumination [trade mark] (CI) is a new method recently developed to meet the need for a non-destructive, high throughput junction depth measurement on patterned wafers. A laser beam creates a quasi-static excess carrier profile in the semiconductor underlying the activated junction. The excess carrier profile is fairly constant below the junction, and drops rapidly in the junction, creating a steep index of refraction gradient at the junction edge. Interference with light reflected from this index gradient provides a signal that is analyzed to determine the junction depth. The paper summarizes evaluation of performance in full NMOS and PMOS process flows, on both bare and patterned wafers. The aims have been to validate (1) performance in the presence of underlying layers typically found at the source/drain (S/D) process steps and (2) measurement on patterned wafers. Correlation of CI measurements to SIMS and transistor drive current are shown. The data were obtained from NMOS structures using As S/D and LDD implants. Correlations to SRP, SIMS and sheet resistance are shown for PMOS structures using B 11 LDD implants. Gage capability measurements are also presented

Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

Science.gov (United States)

Mookerjea, Saurabh A.

Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SSswitching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.

Single-Molecule Electrochemical Transistor Utilizing a Nickel-Pyridyl Spinterface

DEFF Research Database (Denmark)

Brooke, Richard J.; Jin, Chengjun; Szumski, Doug S.

2015-01-01

Using a scanning tunnelling microscope break-junction technique, we produce 4,4′-bipyridine (44BP) single-molecule junctions with Ni and Au contacts. Electrochemical control is used to prevent Ni oxidation and to modulate the conductance of the devices via nonredox gating - the first time this has...... been shown using non-Au contacts. Remarkably the conductance and gain of the resulting Ni-44BP-Ni electrochemical transistors is significantly higher than analogous Au-based devices. Ab-initio calculations reveal that this behavior arises because charge transport is mediated by spin-polarized Ni d...

Noise characteristics of single-walled carbon nanotube network transistors

International Nuclear Information System (INIS)

Kim, Un Jeong; Kim, Kang Hyun; Kim, Kyu Tae; Min, Yo-Sep; Park, Wanjun

2008-01-01

The noise characteristics of randomly networked single-walled carbon nanotubes grown directly by plasma enhanced chemical vapor deposition (PECVD) are studied with field effect transistors (FETs). Due to the geometrical complexity of nanotube networks in the channel area and the large number of tube-tube/tube-metal junctions, the inverse frequency, 1/f, dependence of the noise shows a similar level to that of a single single-walled carbon nanotube transistor. Detailed analysis is performed with the parameters of number of mobile carriers and mobility in the different environment. This shows that the change in the number of mobile carriers resulting in the mobility change due to adsorption and desorption of gas molecules (mostly oxygen molecules) to the tube surface is a key factor in the 1/f noise level for carbon nanotube network transistors

LTS junction technology for RSFQ and qubit circuit applications

International Nuclear Information System (INIS)

Buchholz, F.-Im.; Balashov, D.V.; Dolata, R.; Hagedorn, D.; Khabipov, M.I.; Kohlmann, J.; Zorin, A.B.; Niemeyer, J.

2006-01-01

The potentials of LTS junction technology and electronics offer innovative solutions for the processing of quantum information in RSFQ and qubit circuits. We discuss forthcoming approaches based on standard SIS technology and addressed to the development of new superconducting device concepts. The challenging problem of reducing back action noise of the RSFQ circuits deteriorating coherent properties of the qubit is currently solved by implementing Josephson junctions with non-linear shunts based on LTS SIS-SIN technology. Upgraded NbAlO x trilayer technology enables the fabrication of high-quality mesoscopic Josephson junction transistors down to the nanometer range suitable for a qubit-operation regime. As applications, circuit concepts are presented which combine superconducting devices of different nature

Three-terminal heterojunction bipolar transistor solar cell for high-efficiency photovoltaic conversion.

Science.gov (United States)

Martí, A; Luque, A

2015-04-22

Here we propose, for the first time, a solar cell characterized by a semiconductor transistor structure (n/p/n or p/n/p) where the base-emitter junction is made of a high-bandgap semiconductor and the collector is made of a low-bandgap semiconductor. We calculate its detailed-balance efficiency limit and prove that it is the same one than that of a double-junction solar cell. The practical importance of this result relies on the simplicity of the structure that reduces the number of layers that are required to match the limiting efficiency of dual-junction solar cells without using tunnel junctions. The device naturally emerges as a three-terminal solar cell and can also be used as building block of multijunction solar cells with an increased number of junctions.

Sub-50 nm gate length SOI transistor development for high performance microprocessors

International Nuclear Information System (INIS)

Horstmann, M.; Greenlaw, D.; Feudel, Th.; Wei, A.; Frohberg, K.; Burbach, G.; Gerhardt, M.; Lenski, M.; Stephan, R.; Wieczorek, K.; Schaller, M.; Hohage, J.; Ruelke, H.; Klais, J.; Huebler, P.; Luning, S.; Bentum, R. van; Grasshoff, G.; Schwan, C.; Cheek, J.; Buller, J.; Krishnan, S.; Raab, M.; Kepler, N.

2004-01-01

Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI transistors into volume manufacturing for high-speed microprocessors. The key innovations developed for this transistor in order to overcome classical gate oxide and L GATE scaling is an unique differential triple spacer structure, stressed overlayer films inducing strain in the Silicon channel and optimized junctions. This transistor structure yields an outstanding ring oscillator speed with an unloaded inverter delay of 5.5 ps. The found improvements are highly manufacturable and scaleable for future device technologies like FD SOI

Two-dimensional non-volatile programmable p-n junctions

Science.gov (United States)

Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M.; Zhang, Zengxing

2017-09-01

Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 104 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

Electrical characterisation of SiGe heterojunction bipolar transistors and Si pseudo-HBTS

Science.gov (United States)

De Barros, O.; Le Tron, B.; Woods, R. C.; Giroult-Matlakowski, G.; Vincent, G.; Brémond, G.

1996-08-01

This paper reports an electrical characterisation of the emitter-base junction of Si pseudo-HBTs and SiGe HBTs fabricated in a CMOS compatible single polysilicon self-aligned process. From the reverse characteristics it appears that the definition of the emitter-base junction by plasma etching induces peripheral defects that increase the base current of the transistors. Deep level transient spectroscopy measurements show a deep level in the case of SiGe base, whose spatial origin is not fully determinate up to now.

Sidewall GaAs tunnel junctions fabricated using molecular layer epitaxy

Directory of Open Access Journals (Sweden)

Takeo Ohno and Yutaka Oyama

2012-01-01

Full Text Available In this article we review the fundamental properties and applications of sidewall GaAs tunnel junctions. Heavily impurity-doped GaAs epitaxial layers were prepared using molecular layer epitaxy (MLE, in which intermittent injections of precursors in ultrahigh vacuum were applied, and sidewall tunnel junctions were fabricated using a combination of device mesa wet etching of the GaAs MLE layer and low-temperature area-selective regrowth. The fabricated tunnel junctions on the GaAs sidewall with normal mesa orientation showed a record peak current density of 35 000 A cm-2. They can potentially be used as terahertz devices such as a tunnel injection transit time effect diode or an ideal static induction transistor.

Effects of emitter junction and passive base region on low dose rate effect in bipolar devices

International Nuclear Information System (INIS)

Pershenkov, V.S.; Cherepko, S.V.; Maslov, V.B.; Belyakov, V.V.; Sogoyan, A.V.; Ulimov, N.; Emelianov, V.V.

1999-01-01

Low dose rate effect in bipolar devices consists in the increase of peripheral surface recombination current with dose rate decrease. This is due to the more rapid positive oxide charge and interface trap density build-up as the dose rate becomes lower. High dose rate elevated temperature irradiation is proposed for simulation if the low dose rate effect. In the present we tried to separate the effect of radiation-induced charge in the thick passivation oxide over the emitter junction and passive base regions of npn bipolar transistor. Its goal is to improve bipolar device design for use in space environments and nuclear installations. Three experiments were made during this work. 1. Experiment on radiation-induced charge neutralization (RICN) effect under elevated temperature was performed to show transistor degradation dependence on emitter-base bias. 2. High dose rate elevated and room temperature irradiation of bipolar transistors were performed to separate effects of emitter-junction and passive base regions. 3. Pre- and post- irradiation hydrogen ambient storage was used to investigate its effect on radiation-induced charge build-up over the passive base region. All experiments were performed with npn and pnp transistors. (authors)

Principles of an atomtronic transistor

International Nuclear Information System (INIS)

Caliga, Seth C; Anderson, Dana Z; Straatsma, Cameron J E; Zozulya, Alex A

2016-01-01

A semiclassical formalism is used to investigate the transistor-like behavior of ultracold atoms in a triple-well potential. Atom current flows from the source well, held at fixed chemical potential and temperature, into an empty drain well. In steady-state, the gate well located between the source and drain is shown to acquire a well-defined chemical potential and temperature, which are controlled by the relative height of the barriers separating the three wells. It is shown that the gate chemical potential can exceed that of the source and have a lower temperature. In electronics terminology, the source–gate junction can be reverse-biased. As a result, the device exhibits regimes of negative resistance and transresistance, indicating the presence of gain. Given an external current input to the gate, transistor-like behavior is characterized both in terms of the current gain, which can be greater than unity, and the power output of the device. (paper)

Mechanisms of ionizing-radiation-induced gain degradation in lateral PNP BJTs

International Nuclear Information System (INIS)

Schmidt, D.M.; Wu, A.; Schrimpf, R.D.; Pease, R.L.; Combs, W.E.

1996-01-01

The physical mechanisms for gain degradation in laterals PNP bipolar transistors are examined experimentally and through simulation. The effect of increased surface recombination velocity at the base surface is moderated by positive oxide charge

Flexible Graphene Transistor Architecture for Optical Sensor Technology

Science.gov (United States)

Ordonez, Richard Christopher

The unique electrical and optoelectronic properties of graphene allow tunable conductivity and broadband electromagnetic absorption that spans the ultraviolet and infrared regimes. However, in the current state-of-art graphene sensor architectures, junction resistance and doping concentration are predominant factors that affect signal strength and sensitivity. Unfortunately, graphene produces high contact resistances with standard electrode materials ( few kilo-ohms), therefore, signal is weak and large carrier concentrations are required to probe sensitivity. Moreover, the atomic thickness of graphene enables the potential for flexible electronics, but there has not been a successful graphene sensor architecture that demonstrates stable operation on flexible substrates and with minimal fabrication cost. In this study, the author explores a novel 3-terminal transistor architecture that integrates twodimensional graphene, liquid metal, and electrolytic gate dielectrics (LM-GFETs: Liquid Metal and Graphene Field-Effect Transistors ). The goal is to deliver a sensitive, flexible, and lightweight transistor architecture that will improve sensor technology and maneuverability. The reported high thermal conductivity of graphene provides potential for room-temperature thermal management without the need of thermal-electric and gas cooling systems that are standard in sensor platforms. Liquid metals provide a unique opportunity for conformal electrodes that maximize surface area contact, therefore, enable flexibility, lower contact resistance, and reduce damage to the graphene materials involved. Lastly, electrolytic gate dielectrics provide conformability and high capacitances needed for high on/off rations and electrostatic gating. Results demonstrated that with minimal fabrication steps the proposed flexible graphene transistor architecture demonstrated ambipolar current-voltage transfer characteristics that are comparable to the current state-of-the-art. An additional

Principles of transistor circuits introduction to the design of amplifiers, receivers and digital circuits

CERN Document Server

Amos, S W

2013-01-01

Principles of Transistor Circuits: Sixth Edition discusses the principles, concepts, and practices involved integrated circuits. The current edition includes up-to-date circuits, the section on thyristors has been revised to give more information on modern types, and dated information has been eliminated. The book covers related topics such as semiconductors and junction diodes; the principles behind transistors; and common amplifiers. The book also covers bias and DC stabilization; large-signal and small-signal AF amplifiers; DC and pulse amplifiers; sinusoidal oscillators; pulse and sawtooth

Magnetometry with Low-Resistance Proximity Josephson Junction

Science.gov (United States)

Jabdaraghi, R. N.; Peltonen, J. T.; Golubev, D. S.; Pekola, J. P.

2018-06-01

We characterize a niobium-based superconducting quantum interference proximity transistor (Nb-SQUIPT) and its key constituent formed by a Nb-Cu-Nb SNS weak link. The Nb-SQUIPT and SNS devices are fabricated simultaneously in two separate lithography and deposition steps, relying on Ar ion cleaning of the Nb contact surfaces. The quality of the Nb-Cu interface is characterized by measuring the temperature-dependent equilibrium critical supercurrent of the SNS junction. In the Nb-SQUIPT device, we observe a maximum flux-to-current transfer function value of about 55 nA/Φ_0 in the sub-gap regime of bias voltages. This results in suppression of power dissipation down to a few fW. Low-bias operation of the device with a relatively low probe junction resistance decreases the dissipation by up to two orders of magnitude compared to a conventional device based on an Al-Cu-Al SNS junction and an Al tunnel probe (Al-SQUIPT).

Multilayer Graphene–WSe2 Heterostructures for WSe2 Transistors

KAUST Repository

Tang, Hao-Ling

2017-11-29

Two-dimensional (2D) materials are drawing growing attention for next-generation electronics and optoelectronics owing to its atomic thickness and unique physical properties. One of the challenges posed by 2D materials is the large source/drain (S/D) series resistance due to their thinness, which may be resolved by thickening the source and drain regions. Recently explored lateral graphene–MoS21−3 and graphene–WS21,4 heterostructures shed light on resolving the mentioned issues owing to their superior ohmic contact behaviors. However, recently reported field-effect transistors (FETs) based on graphene–TMD heterostructures have only shown n-type characteristics. The lack of p-type transistor limits their applications in complementary metal-oxide semiconductor electronics. In this work, we demonstrate p-type FETs based on graphene–WSe2 lateral heterojunctions grown with the scalable CVD technique. Few-layer WSe2 is overlapped with the multilayer graphene (MLG) at MLG–WSe2 junctions such that the contact resistance is reduced. Importantly, the few-layer WSe2 only forms at the junction region while the channel is still maintained as a WSe2 monolayer for transistor operation. Furthermore, by imposing doping to graphene S/D, 2 orders of magnitude enhancement in Ion/Ioff ratio to ∼108 and the unipolar p-type characteristics are obtained regardless of the work function of the metal in ambient air condition. The MLG is proposed to serve as a 2D version of emerging raised source/drain approach in electronics.

Evolution of the MOS transistor - From conception to VLSI

International Nuclear Information System (INIS)

Sah, C.T.

1988-01-01

Historical developments of the metal-oxide-semiconductor field-effect-transistor (MOSFET) during the last sixty years are reviewed, from the 1928 patent disclosures of the field-effect conductivity modulation concept and the semiconductor triodes structures proposed by Lilienfeld to the 1947 Shockley-originated efforts which led to the laboratory demonstration of the modern silicon MOSFET thirty years later in 1960. A survey is then made of the milestones of the past thirty years leading to the latest submicron silicon logic CMOS (Complementary MOS) and BICMOS (Bipolar-Junction-Transistor CMOS combined) arrays and the three-dimensional and ferroelectric extensions of Dennard's one-transistor dynamic random access memory (DRAM) cell. Status of the submicron lithographic technologies (deep ultra-violet light, X-ray, electron-beam) are summarized. Future trends of memory cell density and logic gate speed are projected. Comparisons of the switching speed of the silicon MOSFET with that of silicon bipolar and GaAs field-effect transistors are reviewed. Use of high-temperature superconducting wires and GaAs-on-Si monolithic semiconductor optical clocks to break the interconnect-wiring delay barrier is discussed. Further needs in basic research and mathematical modeling on the failure mechanisms in submicron silicon transistors at high electric fields (hot electron effects) and in interconnection conductors at high current densities and low as well as high electric fields (electromigration) are indicated

Nanowire field effect transistors principles and applications

CERN Document Server

Jeong, Yoon-Ha

2014-01-01

“Nanowire Field Effect Transistor: Basic Principles and Applications” places an emphasis on the application aspects of nanowire field effect transistors (NWFET). Device physics and electronics are discussed in a compact manner, together with the p-n junction diode and MOSFET, the former as an essential element in NWFET and the latter as a general background of the FET. During this discussion, the photo-diode, solar cell, LED, LD, DRAM, flash EEPROM and sensors are highlighted to pave the way for similar applications of NWFET. Modeling is discussed in close analogy and comparison with MOSFETs. Contributors focus on processing, electrostatic discharge (ESD) and application of NWFET. This includes coverage of solar and memory cells, biological and chemical sensors, displays and atomic scale light emitting diodes. Appropriate for scientists and engineers interested in acquiring a working knowledge of NWFET as well as graduate students specializing in this subject.

Is there a relationship between curvature and inductance in the Josephson junction?

Science.gov (United States)

Dobrowolski, T.; Jarmoliński, A.

2018-03-01

A Josephson junction is a device made of two superconducting electrodes separated by a very thin layer of isolator or normal metal. This relatively simple device has found a variety of technical applications in the form of Superconducting Quantum Interference Devices (SQUIDs) and Single Electron Transistors (SETs). One can expect that in the near future the Josephson junction will find applications in digital electronics technology RSFQ (Rapid Single Flux Quantum) and in the more distant future in construction of quantum computers. Here we concentrate on the relation of the curvature of the Josephson junction with its inductance. We apply a simple Capacitively Shunted Junction (CSJ) model in order to find condition which guarantees consistency of this model with prediction based on the Maxwell and London equations with Landau-Ginzburg current of Cooper pairs. This condition can find direct experimental verification.

Effect of quantum well position on the distortion characteristics of transistor laser

Science.gov (United States)

Piramasubramanian, S.; Ganesh Madhan, M.; Radha, V.; Shajithaparveen, S. M. S.; Nivetha, G.

2018-05-01

The effect of quantum well position on the modulation and distortion characteristics of a 1300 nm transistor laser is analyzed in this paper. Standard three level rate equations are numerically solved to study this characteristics. Modulation depth, second order harmonic and third order intermodulation distortion of the transistor laser are evaluated for different quantum well positions for a 900 MHz RF signal modulation. From the DC analysis, it is observed that optical power is maximum, when the quantum well is positioned near base-emitter interface. The threshold current of the device is found to increase with increasing the distance between the quantum well and the base-emitter junction. A maximum modulation depth of 0.81 is predicted, when the quantum well is placed at 10 nm from the base-emitter junction, under RF modulation. The magnitude of harmonic and intermodulation distortion are found to decrease with increasing current and with an increase in quantum well distance from the emitter base junction. A minimum second harmonic distortion magnitude of -25.96 dBc is predicted for quantum well position (230 nm) near to the base-collector interface for 900 MHz modulation frequency at a bias current of 20 Ibth. Similarly, a minimum third order intermodulation distortion of -38.2 dBc is obtained for the same position and similar biasing conditions.

Conduction gap in graphene strain junctions: direction dependence

International Nuclear Information System (INIS)

Nguyen, M Chung; Nguyen, V Hung; Dollfus, P; Nguyen, Huy-Viet

2014-01-01

It has been shown in a recent study (Nguyen et al 2014 Nanotechnology 25 165201) that unstrained/strained graphene junctions are promising candidates to improve the performance of graphene transistors which is usually hindered by the gapless nature of graphene. Although the energy bandgap of strained graphene still remains zero, the shift of Dirac points in the k-space due to strain-induced deformation of graphene lattice can lead to the appearance of a finite conduction gap of several hundred meV in strained junctions with a strain of only a few per cent. However, since it depends essentially on the magnitude of the Dirac point shift, this conduction gap strongly depends on the direction of applied strain and the transport direction. In this work, a systematic study of conduction-gap properties with respect to these quantities is presented and the results are carefully analyzed. Our study provides useful information for further investigations to exploit graphene-strained junctions in electronic applications and strain sensors. (paper)

Novel Resistorless First-Order Current-Mode Universal Filter Employing a Grounded Capacitor

Directory of Open Access Journals (Sweden)

R. Arslanalp

2011-09-01

Full Text Available In this paper, a new bipolar junction transistor (BJT based configuration for providing first-order resistorless current-mode (CM all-pass, low-pass and high-pass filter responses from the same configuration is suggested. The proposed circuit called as a first-order universal filter possesses some important advantages such as consisting of a few BJTs and a grounded capacitor, consuming very low power and having electronic tunability property of its pole frequency. Additionally, types of filter response can be obtained only by changing the values of current sources. The suggested circuit does not suffer from disadvantages of use of the resistors in IC process. The presented first-order universal filter topology does not need any passive element matching constraints. Moreover, as an application example, a second-order band-pass filter is obtained by cascading two proposed filter structures which are operating as low-pass filter and high-pass one. Simulations by means of PSpice program are accomplished to demonstrate the performance and effectiveness of the developed first-order universal filter.

Theoretical investigation of GaAsBi/GaAsN tunneling field-effect transistors with type-II staggered tunneling junction

Science.gov (United States)

Wang, Yibo; Liu, Yan; Han, Genquan; Wang, Hongjuan; Zhang, Chunfu; Zhang, Jincheng; Hao, Yue

2017-06-01

We investigate GaAsBi/GaAsN system for the design of type-II staggered hetero tunneling field-effect transistor (hetero-TFET). Strain-symmetrized GaAsBi/GaAsN with effective lattice match to GaAs exhibits a type-II band lineup, and the effective bandgap EG,eff at interface is significantly reduced with the incorporation of Bi and N elements. The band-to-band tunneling (BTBT) rate and drive current of GaAsBi/GaAsN hetero-TFETs are boosted due to the utilizing of the type-II staggered tunneling junction with the reduced EG,eff. Numerical simulation shows that the drive current and subthreshold swing (SS) characteristics of GaAsBi/GaAsN hetero-TFETs are remarkably improved by increasing Bi and N compositions. The dilute content GaAs0.85Bi0.15/GaAs0.92N0.08 staggered hetero-nTFET achieves 7.8 and 550 times higher ION compared to InAs and In0.53Ga0.47As homo-TFETs, respectively, at the supply voltage of 0.3 V. GaAsBi/GaAsN heterostructure is a potential candidate for high performance TFET.

Universal tunneling behavior in technologically relevant P/N junction diodes

International Nuclear Information System (INIS)

Solomon, Paul M.; Jopling, Jason; Frank, David J.; D'Emic, Chris; Dokumaci, O.; Ronsheim, P.; Haensch, W.E.

2004-01-01

Band-to-band tunneling was studied in ion-implanted P/N junction diodes with profiles representative of present and future silicon complementary metal-oxide-silicon (CMOS) field effect transistors. Measurements were done over a wide range of temperatures and implant parameters. Profile parameters were derived from analysis of capacitance versus voltage characteristics, and compared to secondary-ion mass spectroscopy analysis. When the tunneling current was plotted against the effective tunneling distance (tunneling distance corrected for band curvature) a quasi-universal exponential reduction of tunneling current versus, tunneling distance was found with an attenuation length of 0.38 nm, corresponding to a tunneling effective mass of 0.29 times the free electron mass (m 0 ), and an extrapolated tunneling current at zero tunnel distance of 5.3x10 7 A/cm 2 at 300 K. These results are directly applicable for predicting drain to substrate currents in CMOS transistors on bulk silicon, and body currents in CMOS transistors in silicon-on-insulator

Industrial and scientific technology research and development project in fiscal 1997 commissioned by the New Energy and Industrial Technology Development Organization. Research and development of superconducting materials and transistors (report on overall investigation of superconductive devices); 1997 nendo sangyo kagaku gijutsu kenkyu kaihatsu jigyo Shin energy Sangyo Gijutsu Sogo Kaihatsu Kiko itaku. Chodendo zairyo chodendo soshi no kenkyu kaihatsu (chodendo soshika gijutsu kaihatsu seika hokokusho)

Energy Technology Data Exchange (ETDEWEB)

NONE

1998-03-01

This paper describes development of superconducting new function transistors. Fiscal 1997 as the final year of the project advanced improvement in such transistor-using processes as formation and micro-processing of superconducting thin films to show enhancement in characteristics of high-temperature superconducting transistors and possibility of their application utilizing their high speed motions. Furthermore, fundamental technologies were studied with an aim on junction transistors to be applied as circuits. For field effect transistors, evaluation was performed on critical current distribution of step-type particle boundary junction to make it possible to evaluate characteristics of hundreds of transistors. At the same time, a magnetic flux quantum parametron gate with three-layer structure was fabricated to identify its operation. In superconducting-base transistors, strong reflection was recognized on temperature dependence of permittivity of an Nb-doped strontium titanate substrate used for collectors, by which barrier height was reduced. In the junction transistor and circuit technology, isotropic ramp-edge junctions were fabricated, and so was a frequency divider circuit with single magnetic flux quantum mode operation for evaluating high-speed response characteristics. High time resolution current was observed successfully by using a high-temperature superconducting sampler system. 148 refs., 127 figs., 4 tabs.

Epitaxial growth of a monolayer WSe2-MoS2 lateral p-n junction with an atomically sharp interface

KAUST Repository

Li, Ming Yang; Shi, Yumeng; Cheng, Chia Chin; Lu, Li Syuan; Lin, Yung Chang; Tang, Hao-Ling; Tsai, Meng Lin; Chu, Chih Wei; Wei, Kung Hwa; He, Jr-Hau; Chang, Wen Hao; Suenaga, Kazu; Li, Lain-Jong

2015-01-01

. Spatially connected TMDC lateral heterojunctions are key components for constructing monolayer p-n rectifying diodes, light-emitting diodes, photovoltaic devices, and bipolar junction transistors. However, such structures are not readily prepared via

Variability study of Si nanowire FETs with different junction gradients

Directory of Open Access Journals (Sweden)

Jun-Sik Yoon

2016-01-01

Full Text Available Random dopant fluctuation effects of gate-all-around Si nanowire field-effect transistors (FETs are investigated in terms of different diameters and junction gradients. The nanowire FETs with smaller diameters or shorter junction gradients increase relative variations of the drain currents and the mismatch of the drain currents between source-drain and drain-source bias change in the saturation regime. Smaller diameters decreased current drivability critically compared to standard deviations of the drain currents, thus inducing greater relative variations of the drain currents. Shorter junction gradients form high potential barriers in the source-side lightly-doped extension regions at on-state, which determines the magnitude of the drain currents and fluctuates the drain currents greatly under thermionic-emission mechanism. On the other hand, longer junction gradients affect lateral field to fluctuate the drain currents greatly. These physical phenomena coincide with correlations of the variations between drain currents and electrical parameters such as threshold voltages and parasitic resistances. The nanowire FETs with relatively-larger diameters and longer junction gradients without degrading short channel characteristics are suggested to minimize the relative variations and the mismatch of the drain currents.

Design of a Negative Differential Resistance Circuit Element Using Single-Electron Transistors

Science.gov (United States)

Dixon, D. C.; Heij, C. P.; Hadley, P.; Mooij, J. E.

1998-03-01

Electronic circuit elements displaying negative differential resistance (NDR), such as tunnel diodes, have a wide variety of device applications, including oscillators, amplifiers, logic, and memory. We present a two-terminal device using two single-electron transistors (SET's) that demonstrates an NDR profile tuneable with gate voltages. If the capacitive coupling between the SET's is sufficiently larger than the junction capacitances, the device exhibits multiply-peaked NDR, allowing its use as a multi-valued digital element. We will also report recent experimental progress in measurements of such a device, fabricated using standard Al tunnel junctions, but with an additional overlap capacitor to allow the required inter-SET coupling.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

Science.gov (United States)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Transport properties and device-design of Z-shaped MoS2 nanoribbon planar junctions

Science.gov (United States)

Zhang, Hua; Zhou, Wenzhe; Liu, Qi; Yang, Zhixiong; Pan, Jiangling; Ouyang, Fangping; Xu, Hui

2017-09-01

Based on MoS2 nanoribbons, metal-semiconductor-metal planar junction devices were constructed. The electronic and transport properties of the devices were studied by using density function theory (DFT) and nonequilibrium Green's functions (NEGF). It is found that a band gap about 0.4 eV occurs in the planar junction. The electron and hole transmissions of the devices are mainly contributed by the Mo atomic orbitals. The electron transport channel is located at the edge of armchair MoS2 nanoribbon, while the hole transport channel is delocalized in the channel region. The I-V curve of the two-probe device shows typical transport behavior of Schottky barrier, and the threshold voltage is of about 0.2 V. The field effect transistors (FET) based on the planar junction turn out to be good bipolar transistors, the maximum current on/off ratio can reach up to 1 × 104, and the subthreshold swing is 243 mV/dec. It is found that the off-state current is dependent on the length and width of the channel, while the on-state current is almost unaffected. The switching performance of the FET is improved with increasing the length of the channel, and shows oscillation behavior with the change of the channel width.

Transistor Effect in Improperly Connected Transistors.

Science.gov (United States)

Luzader, Stephen; Sanchez-Velasco, Eduardo

1996-01-01

Discusses the differences between the standard representation and a realistic representation of a transistor. Presents an experiment that helps clarify the explanation of the transistor effect and shows why transistors should be connected properly. (JRH)

Strain-enhanced tunneling magnetoresistance in MgO magnetic tunnel junctions

OpenAIRE

Loong, Li Ming; Qiu, Xuepeng; Neo, Zhi Peng; Deorani, Praveen; Wu, Yang; Bhatia, Charanjit S.; Saeys, Mark; Yang, Hyunsoo

2014-01-01

While the effects of lattice mismatch-induced strain, mechanical strain, as well as the intrinsic strain of thin films are sometimes detrimental, resulting in mechanical deformation and failure, strain can also be usefully harnessed for applications such as data storage, transistors, solar cells, and strain gauges, among other things. Here, we demonstrate that quantum transport across magnetic tunnel junctions (MTJs) can be significantly affected by the introduction of controllable mechanical...

Investigation of neutron-produced defects in silicon by transconductance measurements of junction field-effect transistors

International Nuclear Information System (INIS)

Tokuda, Y.; Usami, A.

1976-01-01

Defects introduced in silicon by neutron irradiation were investigated by measuring the phase angle theta of the small-signal transconductance of the junction field-effect transistors (JFET). Measurements of theta as a function of frequency allowed the determination of the time constant for each defect. From the temperature dependence of the time constant, assuming that capture cross sections are independent of temperature, the energy levels of E/sub v/+0.19 and E/sub v/+0.35 eV in p-type silicon and E/sub c/-0.16, E/sub c/-0.19, and E/sub c/-0.44 eV in n-type silicon were obtained. For these defects, calculations gave majority-carrier capture cross-section values of 2.8 x 10 -15 and 1.1 x 10 -14 cm 2 in p-type silicon, and 3.9 x 10 -14 , 1.6 x 10 -16 , and 2.3 x 10 -14 cm 2 in n-type silicon, respectively. Comparing with other published data, it was found that the energy level of E/sub c/-0.44 eV showed the value between the previously reported energy levels of E/sub c/-0.4 and E/sub c/-0.5 eV correlated with the doubly negative charge state and singly negative charge state of the divacancy, respectively. Thus, it is believed that a total of six energy levels are introduced in silicon by neutron irradiation. The energy levels of E/sub c/-0.16 and E/sub v/+0.35 eV were found to be correlated with the A center and the divacancy, respectively

About influence of buffer porous layers between epitaxial layers of heterostructure on distributions of concentrations of dopants in heterobipolar transistors

Directory of Open Access Journals (Sweden)

E Pankratov

2016-10-01

Full Text Available In this paper we introduce an approach to manufacture a heterobipolar transistors. Framework this approach we consider doping by diffusion or by ion implantation of required parts of a heterostructure with special configuration and optimization of annealing of dopant and/or radiation defects. In this case one have possibility to manufacture bipolar transistors, which include into itself p-n-junctions with higher sharpness and smaller dimensions. We also consider influence of presents of buffer porous layers between epitaxial layers of heterostructure on distributions of concentrations of dopants in the considered transistors. An approach to decrease value of mismatch-induced stress has been considered.

SOI Transistor measurement techniques using body contacted transistors

International Nuclear Information System (INIS)

Worley, E.R.; Williams, R.

1989-01-01

Measurements of body contacted SOI transistors are used to isolate parameters of the back channel and island edge transistor. Properties of the edge and back channel transistor have been measured before and after X-ray irradiation (ARACOR). The unique properties of the edge transistor are shown to be a result of edge geometry as confirmed by a two dimensional transistor simulator

Transistor data book

International Nuclear Information System (INIS)

1988-03-01

It introduces how to use this book. It lists transistor data and index, which are Type No, Cross index, Germanium PNP low power transistors, silicon NPN low power transistors, Germanium PNP high power transistors, Switching transistors, transistor arrays, Miscellaneous transistors, types with U.S military specifications, direct replacement transistors, suggested replacement transistors, schematic drawings, outline drawings, device number keys and manufacturer's logos.

Optimization of Vertical Double-Diffused Metal-Oxide Semiconductor (VDMOS) Power Transistor Structure for Use in High Frequencies and Medical Devices.

Science.gov (United States)

Farhadi, Rozita; Farhadi, Bita

2014-01-01

Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines.

Studies of annealing of neutron-produced defects in silicon by transconductance measurements of junction field-effect transistors

International Nuclear Information System (INIS)

Tokuda, Y.; Usami, A.

1978-01-01

Annealing behavior of neutron-produced defects in silicon was studied by measuring the phase angle theta of the small-signal transconductance of the junction field-effect transistors (JFET's). Three deep levels (N-1, N-2, and N-3 levels) in n-type silicon and two deep levels (P-1 and P-2 levels) in p-type silicon, introduced by irradiation, annealed gradually. Their energy levels and capture cross sections have been already reported by us. Three deep levels (P-3, P-4, and P-5 levels) were observed in annealed p-type silicon in the temperature range 150--300 0 C. For these defects, theta was measured as a function of frequency to obtain the time constant. From the temperature dependence of the time constant, assuming that capture cross sections are independent of temperature, the energy levels of P-3, P-4, and P-5 were estimated to be E/sub v/+0.21, E/sub v/+0.40, and E/sub v/+0.30 eV, respectively. The calculated hole capture cross sections of these levels were 2.2 x 10 -15 , 8.7 x 10 -14 , and 1.2 x 10 -14 cm 2 , respectively. Comparison with other published data was made. It was found that N-3 and P-2 levels corresponded to the divacancy. Furthermore, it seemed that P-3, P-4, and P-5 levels corresponded to the high-order vacancy defects

Photojunction Field-Effect Transistor Based on a Colloidal Quantum Dot Absorber Channel Layer

KAUST Repository

Adinolfi, Valerio

2015-01-27

© 2015 American Chemical Society. The performance of photodetectors is judged via high responsivity, fast speed of response, and low background current. Many previously reported photodetectors based on size-tuned colloidal quantum dots (CQDs) have relied either on photodiodes, which, since they are primary photocarrier devices, lack gain; or photoconductors, which provide gain but at the expense of slow response (due to delayed charge carrier escape from sensitizing centers) and an inherent dark current vs responsivity trade-off. Here we report a photojunction field-effect transistor (photoJFET), which provides gain while breaking prior photoconductors\\' response/speed/dark current trade-off. This is achieved by ensuring that, in the dark, the channel is fully depleted due to a rectifying junction between a deep-work-function transparent conductive top contact (MoO3) and a moderately n-type CQD film (iodine treated PbS CQDs). We characterize the rectifying behavior of the junction and the linearity of the channel characteristics under illumination, and we observe a 10 μs rise time, a record for a gain-providing, low-dark-current CQD photodetector. We prove, using an analytical model validated using experimental measurements, that for a given response time the device provides a two-orders-of-magnitude improvement in photocurrent-to-dark-current ratio compared to photoconductors. The photoJFET, which relies on a junction gate-effect, enriches the growing family of CQD photosensitive transistors.

Van der Waals epitaxial growth and optoelectronics of large-scale WSe2/SnS2 vertical bilayer p-n junctions.

Science.gov (United States)

Yang, Tiefeng; Zheng, Biyuan; Wang, Zhen; Xu, Tao; Pan, Chen; Zou, Juan; Zhang, Xuehong; Qi, Zhaoyang; Liu, Hongjun; Feng, Yexin; Hu, Weida; Miao, Feng; Sun, Litao; Duan, Xiangfeng; Pan, Anlian

2017-12-04

High-quality two-dimensional atomic layered p-n heterostructures are essential for high-performance integrated optoelectronics. The studies to date have been largely limited to exfoliated and restacked flakes, and the controlled growth of such heterostructures remains a significant challenge. Here we report the direct van der Waals epitaxial growth of large-scale WSe 2 /SnS 2 vertical bilayer p-n junctions on SiO 2 /Si substrates, with the lateral sizes reaching up to millimeter scale. Multi-electrode field-effect transistors have been integrated on a single heterostructure bilayer. Electrical transport measurements indicate that the field-effect transistors of the junction show an ultra-low off-state leakage current of 10 -14 A and a highest on-off ratio of up to 10 7 . Optoelectronic characterizations show prominent photoresponse, with a fast response time of 500 μs, faster than all the directly grown vertical 2D heterostructures. The direct growth of high-quality van der Waals junctions marks an important step toward high-performance integrated optoelectronic devices and systems.

Atomic-Monolayer Two-Dimensional Lateral Quasi-Heterojunction Bipolar Transistors with Resonant Tunneling Phenomenon

KAUST Repository

Lin, Che-Yu

2017-10-04

High-frequency operation with ultra-thin, lightweight and extremely flexible semiconducting electronics are highly desirable for the development of mobile devices, wearable electronic systems and defense technologies. In this work, the first experimental observation of quasi-heterojunction bipolar transistors utilizing a monolayer of the lateral WSe2-MoS2 junctions as the conducting p-n channel is demonstrated. Both lateral n-p-n and p-n-p heterojunction bipolar transistors are fabricated to exhibit the output characteristics and current gain. A maximum common-emitter current gain of around 3 is obtained in our prototype two-dimensional quasi-heterojunction bipolar transistors. Interestingly, we also observe the negative differential resistance in the electrical characteristics. A potential mechanism is that the negative differential resistance is induced by resonant tunneling phenomenon due to the formation of quantum well under applying high bias voltages. Our results open the door to two-dimensional materials for high-frequency, high-speed, high-density and flexible electronics.

Atomic-Monolayer Two-Dimensional Lateral Quasi-Heterojunction Bipolar Transistors with Resonant Tunneling Phenomenon

KAUST Repository

Lin, Che-Yu; Zhu, Xiaodan; Tsai, Shin-Hung; Tsai, Shiao-Po; Lei, Sidong; Li, Ming-Yang; Shi, Yumeng; Li, Lain-Jong; Huang, Shyh-Jer; Wu, Wen-Fa; Yeh, Wen-Kuan; Su, Yan-Kuin; Wang, Kang L.; Lan, Yann-Wen

2017-01-01

High-frequency operation with ultra-thin, lightweight and extremely flexible semiconducting electronics are highly desirable for the development of mobile devices, wearable electronic systems and defense technologies. In this work, the first experimental observation of quasi-heterojunction bipolar transistors utilizing a monolayer of the lateral WSe2-MoS2 junctions as the conducting p-n channel is demonstrated. Both lateral n-p-n and p-n-p heterojunction bipolar transistors are fabricated to exhibit the output characteristics and current gain. A maximum common-emitter current gain of around 3 is obtained in our prototype two-dimensional quasi-heterojunction bipolar transistors. Interestingly, we also observe the negative differential resistance in the electrical characteristics. A potential mechanism is that the negative differential resistance is induced by resonant tunneling phenomenon due to the formation of quantum well under applying high bias voltages. Our results open the door to two-dimensional materials for high-frequency, high-speed, high-density and flexible electronics.

Atomic-Monolayer Two-Dimensional Lateral Quasi-Heterojunction Bipolar Transistors with Resonant Tunneling Phenomenon.

Science.gov (United States)

Lin, Che-Yu; Zhu, Xiaodan; Tsai, Shin-Hung; Tsai, Shiao-Po; Lei, Sidong; Shi, Yumeng; Li, Lain-Jong; Huang, Shyh-Jer; Wu, Wen-Fa; Yeh, Wen-Kuan; Su, Yan-Kuin; Wang, Kang L; Lan, Yann-Wen

2017-11-28

High-frequency operation with ultrathin, lightweight, and extremely flexible semiconducting electronics is highly desirable for the development of mobile devices, wearable electronic systems, and defense technologies. In this work, the experimental observation of quasi-heterojunction bipolar transistors utilizing a monolayer of the lateral WSe 2 -MoS 2 junctions as the conducting p-n channel is demonstrated. Both lateral n-p-n and p-n-p heterojunction bipolar transistors are fabricated to exhibit the output characteristics and current gain. A maximum common-emitter current gain of around 3 is obtained in our prototype two-dimensional quasi-heterojunction bipolar transistors. Interestingly, we also observe the negative differential resistance in the electrical characteristics. A potential mechanism is that the negative differential resistance is induced by resonant tunneling phenomenon due to the formation of quantum well under applying high bias voltages. Our results open the door to two-dimensional materials for high-frequency, high-speed, high-density, and flexible electronics.

InAs/Si Hetero-Junction Nanotube Tunnel Transistors

KAUST Repository

Hanna, Amir; Fahad, Hossain M.; Hussain, Muhammad Mustafa

2015-01-01

Hetero-structure tunnel junctions in non-planar gate-all-around nanowire (GAA NW) tunnel FETs (TFETs) have shown significant enhancement in ‘ON’ state tunnel current over their all-silicon counterpart. Here we show the unique concept of nanotube TFET in a hetero-structure configuration that is capable of much higher drive current as opposed to that of GAA NW TFETs.Through the use of inner/outer core-shell gates, a single III-V hetero-structured nanotube TFET leverages physically larger tunneling area while achieving higher driver current (ION) and saving real estates by eliminating arraying requirement. Numerical simulations has shown that a 10 nm thin nanotube TFET with a 100 nm core gate has a 5×normalized output current compared to a 10 nm diameter GAA NW TFET.

InAs/Si Hetero-Junction Nanotube Tunnel Transistors

KAUST Repository

Hanna, Amir

2015-04-29

Hetero-structure tunnel junctions in non-planar gate-all-around nanowire (GAA NW) tunnel FETs (TFETs) have shown significant enhancement in ‘ON’ state tunnel current over their all-silicon counterpart. Here we show the unique concept of nanotube TFET in a hetero-structure configuration that is capable of much higher drive current as opposed to that of GAA NW TFETs.Through the use of inner/outer core-shell gates, a single III-V hetero-structured nanotube TFET leverages physically larger tunneling area while achieving higher driver current (ION) and saving real estates by eliminating arraying requirement. Numerical simulations has shown that a 10 nm thin nanotube TFET with a 100 nm core gate has a 5×normalized output current compared to a 10 nm diameter GAA NW TFET.

Theoretical calculation of performance enhancement in lattice-matched SiGeSn/GeSn p-channel tunneling field-effect transistor with type-II staggered tunneling junction

Science.gov (United States)

Wang, Hongjuan; Han, Genquan; Wang, Yibo; Peng, Yue; Liu, Yan; Zhang, Chunfu; Zhang, Jincheng; Hu, Shengdong; Hao, Yue

2016-04-01

In this work, a lattice-matched SiGeSn/GeSn heterostructure p-channel tunneling field-effect transistor (hetero-PTFET) with a type-II staggered tunneling junction (TJ) is investigated theoretically. Lattice matching and type-II band alignment at the Γ-point is obtained at the SiGeSn/GeSn interface by tuning Sn and Si compositions. A steeper subthreshold swing (SS) and a higher on state current (I ON) are demonstrated in SiGeSn/GeSn hetero-PTFET than in GeSn homo-PTFET. Si0.31Ge0.49Sn0.20/Ge0.88Sn0.12 hetero-PTFET achieves a 2.3-fold higher I ON than Ge0.88Sn0.12 homo-PTFET at V DD of 0.3 V. Hetero-PTFET achieves a more abrupt hole profile and a higher carrier density near TJ than the homo-PTFET, which contributes to the significantly enhanced band-to-band tunneling (BTBT) rate and tunneling current in hetero-PTFET.

Atypical transistor-based chaotic oscillators: Design, realization, and diversity

Science.gov (United States)

Minati, Ludovico; Frasca, Mattia; OświÈ©cimka, Paweł; Faes, Luca; DroŻdŻ, Stanisław

2017-07-01

In this paper, we show that novel autonomous chaotic oscillators based on one or two bipolar junction transistors and a limited number of passive components can be obtained via random search with suitable heuristics. Chaos is a pervasive occurrence in these circuits, particularly after manual adjustment of a variable resistor placed in series with the supply voltage source. Following this approach, 49 unique circuits generating chaotic signals when physically realized were designed, representing the largest collection of circuits of this kind to date. These circuits are atypical as they do not trivially map onto known topologies or variations thereof. They feature diverse spectra and predominantly anti-persistent monofractal dynamics. Notably, we recurrently found a circuit comprising one resistor, one transistor, two inductors, and one capacitor, which generates a range of attractors depending on the parameter values. We also found a circuit yielding an irregular quantized spike-train resembling some aspects of neural discharge and another one generating a double-scroll attractor, which represent the smallest known transistor-based embodiments of these behaviors. Through three representative examples, we additionally show that diffusive coupling of heterogeneous oscillators of this kind may give rise to complex entrainment, such as lag synchronization with directed information transfer and generalized synchronization. The replicability and reproducibility of the experimental findings are good.

Performance of Solution Processed Carbon Nanotube Field Effect Transistors with Graphene Electrodes

OpenAIRE

Gangavarapu, P R Yasasvi; Lokesh, Punith Chikkahalli; Bhat, K N; Naik, A K

2016-01-01

This work evaluates the performance of carbon nanotube field effect transistors (CNTFET) using few layer graphene as the contact electrode material. We present the experimental results obtained on the barrier height at CNT graphene junction using temperature dependent IV measurements. The estimated barrier height in our devices for both holes and electrons is close to zero or slightly negative indicating the Ohmic contact of graphene with the valence and conduction bands of CNTs. In addition,...

Quantitative analysis of Josephson-quasiparticle current in superconducting single-electron transistors

International Nuclear Information System (INIS)

Nakamura, Y.; Chen, C.D.; Tsai, J.S.

1996-01-01

We have investigated Josephson-quasiparticle (JQP) current in superconducting single-electron transistors in which charging energy E C was larger than superconducting gap energy Δ and junction resistances were much larger than R Q ≡h/4e 2 . We found that not only the shapes of the JQP peaks but also their absolute height were reproduced quantitatively with a theory by Averin and Aleshkin using a Josephson energy of Ambegaokar-Baratoff close-quote s value. copyright 1996 The American Physical Society

Evaluation of Enhanced Low Dose Rate Sensitivity in Discrete Bipolar Junction Transistors

Science.gov (United States)

Chen, Dakai; Ladbury Raymond; LaBel, Kenneth; Topper, Alyson; Ladbury, Raymond; Triggs, Brian; Kazmakites, Tony

2012-01-01

We evaluate the low dose rate sensitivity in several families of discrete bipolar transistors across device parameter, quality assurance level, and irradiation bias configuration. The 2N2222 showed the most significant low dose rate sensitivity, with low dose rate enhancement factor of 3.91 after 100 krad(Si). The 2N2907 also showed critical degradation levels. The devices irradiated at 10 mrad(Si)/s exceeded specifications after 40 and 50 krad(Si) for the 2N2222 and 2N2907 devices, respectively.

Dual origin of room temperature sub-terahertz photoresponse in graphene field effect transistors

Science.gov (United States)

Bandurin, D. A.; Gayduchenko, I.; Cao, Y.; Moskotin, M.; Principi, A.; Grigorieva, I. V.; Goltsman, G.; Fedorov, G.; Svintsov, D.

2018-04-01

Graphene is considered as a promising platform for detectors of high-frequency radiation up to the terahertz (THz) range due to its superior electron mobility. Previously, it has been shown that graphene field effect transistors (FETs) exhibit room temperature broadband photoresponse to incoming THz radiation, thanks to the thermoelectric and/or plasma wave rectification. Both effects exhibit similar functional dependences on the gate voltage, and therefore, it was difficult to disentangle these contributions in previous studies. In this letter, we report on combined experimental and theoretical studies of sub-THz response in graphene field-effect transistors analyzed at different temperatures. This temperature-dependent study allowed us to reveal the role of the photo-thermoelectric effect, p-n junction rectification, and plasmonic rectification in the sub-THz photoresponse of graphene FETs.

An optically controlled SiC lateral power transistor based on SiC/SiCGe super junction structure

International Nuclear Information System (INIS)

Pu Hongbin; Cao Lin; Ren Jie; Chen Zhiming; Nan Yagong

2010-01-01

An optically controlled SiC/SiCGe lateral power transistor based on superjunction structure has been proposed, in which n-SiCGe/p-SiC superjunction structure is employed to improve device figure of merit. Performance of the novel optically controlled power transistor was simulated using Silvaco Atlas tools, which has shown that the device has a very good response to the visible light and the near infrared light. The optoelectronic responsivities of the device at 0.5 μm and 0.7 μm are 330 mA/W and 76.2 mA/W at 2 V based voltage, respectively. (semiconductor devices)

An optically controlled SiC lateral power transistor based on SiC/SiCGe super junction structure

Energy Technology Data Exchange (ETDEWEB)

Pu Hongbin; Cao Lin; Ren Jie; Chen Zhiming; Nan Yagong, E-mail: puhongbin@xaut.edu.c [Xi' an University of Technology, Xi' an 710048 (China)

2010-04-15

An optically controlled SiC/SiCGe lateral power transistor based on superjunction structure has been proposed, in which n-SiCGe/p-SiC superjunction structure is employed to improve device figure of merit. Performance of the novel optically controlled power transistor was simulated using Silvaco Atlas tools, which has shown that the device has a very good response to the visible light and the near infrared light. The optoelectronic responsivities of the device at 0.5 {mu}m and 0.7 {mu}m are 330 mA/W and 76.2 mA/W at 2 V based voltage, respectively. (semiconductor devices)

Single Molecule Nanoelectrochemistry in Electrical Junctions.

Science.gov (United States)

Nichols, Richard J; Higgins, Simon J

2016-11-15

gating. This has been referred to as to a "single molecule transistor configuration" with the gate voltage being provided by the controllable potential achieved through the electrochemical double layer. It is shown how the electrolyte medium can control such gating, with ionic liquids providing more efficient gate coupling than aqueous electrolytes. Control of the conductance of viologen molecular wires can also be achieved by encapsulating the viologen redox moiety within a molecular cage, thereby controlling its immediate environment. Molecular conductance can also be gated through multiple redox states. This has been shown for the redox moiety pyrrolo-tetrathiafulvalene, which undergoes single molecule electrochemical transistor gating through three redox states in molecular junctions. Charge transport through this junction follows a two-step hopping mechanism, demonstrating the role of the redox center in electron transfer across the molecular bridge. Recent electrolyte gating studies of rigid, conjugated redox-active metal complexes with tailored terpyridine coordinating ligands and anchors are also presented. These aforementioned studies have all been performed with gold electrode contacts. The Account concludes with recent data showing that it is now possible to study single molecule electrochemical gating with nickel electrodes. This opens up new perspectives for studying interfacial charge transfer with a wide variety of other electrode materials including semiconductor electrodes and also points toward future opportunities for coupling molecular spintronics and nanoelectrochemistry.

Room-temperature current blockade in atomically defined single-cluster junctions

Science.gov (United States)

Lovat, Giacomo; Choi, Bonnie; Paley, Daniel W.; Steigerwald, Michael L.; Venkataraman, Latha; Roy, Xavier

2017-11-01

Fabricating nanoscopic devices capable of manipulating and processing single units of charge is an essential step towards creating functional devices where quantum effects dominate transport characteristics. The archetypal single-electron transistor comprises a small conducting or semiconducting island separated from two metallic reservoirs by insulating barriers. By enabling the transfer of a well-defined number of charge carriers between the island and the reservoirs, such a device may enable discrete single-electron operations. Here, we describe a single-molecule junction comprising a redox-active, atomically precise cobalt chalcogenide cluster wired between two nanoscopic electrodes. We observe current blockade at room temperature in thousands of single-cluster junctions. Below a threshold voltage, charge transfer across the junction is suppressed. The device is turned on when the temporary occupation of the core states by a transiting carrier is energetically enabled, resulting in a sequential tunnelling process and an increase in current by a factor of ∼600. We perform in situ and ex situ cyclic voltammetry as well as density functional theory calculations to unveil a two-step process mediated by an orbital localized on the core of the cluster in which charge carriers reside before tunnelling to the collector reservoir. As the bias window of the junction is opened wide enough to include one of the cluster frontier orbitals, the current blockade is lifted and charge carriers can tunnel sequentially across the junction.

A miniature microcontroller curve tracing circuit for space flight testing transistors.

Science.gov (United States)

Prokop, N; Greer, L; Krasowski, M; Flatico, J; Spina, D

2015-02-01

This paper describes a novel miniature microcontroller based curve tracing circuit, which was designed to monitor the environmental effects on Silicon Carbide Junction Field Effect Transistor (SiC JFET) device performance, while exposed to the low earth orbit environment onboard the International Space Station (ISS) as a resident experiment on the 7th Materials on the International Space Station Experiment (MISSE7). Specifically, the microcontroller circuit was designed to operate autonomously and was flown on the external structure of the ISS for over a year. This curve tracing circuit is capable of measuring current vs. voltage (I-V) characteristics of transistors and diodes. The circuit is current limited for low current devices and is specifically designed to test high temperature, high drain-to-source resistance SiC JFETs. The results of each I-V data set are transmitted serially to an external telemetered communication interface. This paper discusses the circuit architecture, its design, and presents example results.

Floating-Gate Manipulated Graphene-Black Phosphorus Heterojunction for Nonvolatile Ambipolar Schottky Junction Memories, Memory Inverter Circuits, and Logic Rectifiers.

Science.gov (United States)

Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing

2017-10-11

The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.

Self-limited plasmonic welding of silver nanowire junctions

KAUST Repository

Garnett, Erik C.

2012-02-05

Nanoscience provides many strategies to construct high-performance materials and devices, including solar cells, thermoelectrics, sensors, transistors, and transparent electrodes. Bottom-up fabrication facilitates large-scale chemical synthesis without the need for patterning and etching processes that waste material and create surface defects. However, assembly and contacting procedures still require further development. Here, we demonstrate a light-induced plasmonic nanowelding technique to assemble metallic nanowires into large interconnected networks. The small gaps that form naturally at nanowire junctions enable effective light concentration and heating at the point where the wires need to be joined together. The extreme sensitivity of the heating efficiency on the junction geometry causes the welding process to self-limit when a physical connection between the wires is made. The localized nature of the heating prevents damage to low-thermal-budget substrates such as plastics and polymer solar cells. This work opens new avenues to control light, heat and mass transport at the nanoscale. © 2012 Macmillan Publishers Limited. All rights reserved.

Steering of quantum waves: Demonstration of Y-junction transistors using InAs quantum wires

Science.gov (United States)

Jones, Gregory M.; Qin, Jie; Yang, Chia-Hung; Yang, Ming-Jey

2005-06-01

In this paper we demonstrate using an InAs quantum wire Y-branch switch that the electron wave can be switched to exit from the two drains by a lateral gate bias. The gating modifies the electron wave functions as well as their interference pattern, causing the anti-correlated, oscillatory transconductances. Our result suggests a new transistor function in a multiple-lead ballistic quantum wire system.

AlGaN Channel Transistors for Power Management and Distribution

Science.gov (United States)

VanHove, James M.

1996-01-01

Contained within is the Final report of a Phase 1 SBIR program to develop AlGaN channel junction field effect transistors (JFET). The report summarizes our work to design, deposit, and fabricate JFETS using molecular beam epitaxy growth AlGaN. Nitride growth is described using a RF atomic nitrogen plasma source. Processing steps needed to fabricate the device such as ohmic source-drain contacts, reactive ion etching, gate formation, and air bride fabrication are documented. SEM photographs of fabricated power FETS are shown. Recommendations are made to continue the effort in a Phase 2 Program.

Doped Organic Transistors.

Science.gov (United States)

Lüssem, Björn; Keum, Chang-Min; Kasemann, Daniel; Naab, Ben; Bao, Zhenan; Leo, Karl

2016-11-23

Organic field-effect transistors hold the promise of enabling low-cost and flexible electronics. Following its success in organic optoelectronics, the organic doping technology is also used increasingly in organic field-effect transistors. Doping not only increases device performance, but it also provides a way to fine-control the transistor behavior, to develop new transistor concepts, and even improve the stability of organic transistors. This Review summarizes the latest progress made in the understanding of the doping technology and its application to organic transistors. It presents the most successful doping models and an overview of the wide variety of materials used as dopants. Further, the influence of doping on charge transport in the most relevant polycrystalline organic semiconductors is reviewed, and a concise overview on the influence of doping on transistor behavior and performance is given. In particular, recent progress in the understanding of contact doping and channel doping is summarized.

Research Update: Molecular electronics: The single-molecule switch and transistor

Directory of Open Access Journals (Sweden)

Kai Sotthewes

2014-01-01

Full Text Available In order to design and realize single-molecule devices it is essential to have a good understanding of the properties of an individual molecule. For electronic applications, the most important property of a molecule is its conductance. Here we show how a single octanethiol molecule can be connected to macroscopic leads and how the transport properties of the molecule can be measured. Based on this knowledge we have realized two single-molecule devices: a molecular switch and a molecular transistor. The switch can be opened and closed at will by carefully adjusting the separation between the electrical contacts and the voltage drop across the contacts. This single-molecular switch operates in a broad temperature range from cryogenic temperatures all the way up to room temperature. Via mechanical gating, i.e., compressing or stretching of the octanethiol molecule, by varying the contact's interspace, we are able to systematically adjust the conductance of the electrode-octanethiol-electrode junction. This two-terminal single-molecule transistor is very robust, but the amplification factor is rather limited.

Total dose and dose rate models for bipolar transistors in circuit simulation.

Energy Technology Data Exchange (ETDEWEB)

Campbell, Phillip Montgomery; Wix, Steven D.

2013-05-01

The objective of this work is to develop a model for total dose effects in bipolar junction transistors for use in circuit simulation. The components of the model are an electrical model of device performance that includes the effects of trapped charge on device behavior, and a model that calculates the trapped charge densities in a specific device structure as a function of radiation dose and dose rate. Simulations based on this model are found to agree well with measurements on a number of devices for which data are available.

EDITORIAL: Reigniting innovation in the transistor Reigniting innovation in the transistor

Science.gov (United States)

Demming, Anna

2012-09-01

Today the transistor is integral to the electronic circuitry that wires our lives. When Bardeen and Brattain first observed an amplified signal by connecting electrodes to a germanium crystal they saw that their 'semiconductor triode' could prove a useful alternative to the more cumbersome vacuum tubes used at the time [1]. But it was perhaps William Schottky who recognized the extent of the transistor's potential. A basic transistor has three or more terminals and current across one pair of terminals can switch or amplify current through another pair. Bardeen, Brattain and Schottky were jointly awarded a Nobel Prize in 1956 'for their researches on semiconductors and their discovery of the transistor effect' [2]. Since then many new forms of the transistor have been developed and understanding of the underlying properties is constantly advancing. In this issue Chen and Shih and colleagues at Taiwan National University and Drexel University report a pyroelectrics transistor. They show how a novel optothermal gating mechanism can modulate the current, allowing a range of developments in nanoscale optoelectronics and wireless devices [3]. The explosion of interest in nanoscale devices in the 1990s inspired electronics researchers to look for new systems that can act as transistors, such as carbon nanotube [4] and silicon nanowire [5] transistors. Generally these transistors function by raising and lowering an energy barrier of kBT -1, but researchers in the US and Canada have demonstrated that the quantum interference between two electronic pathways through aromatic molecules can also modulate the current flow [6]. The device has advantages for further miniaturization where energy dissipation in conventional systems may eventually cause complications. Interest in transistor technology has also led to advances in fabrication techniques for achieving high production quantities, such as printing [7]. Researchers in Florida in the US demonstrated field effect transistor

Modulation and Control of Charge Transport Through Single-Molecule Junctions.

Science.gov (United States)

Wang, Kun; Xu, Bingqian

2017-02-01

The ability to modulate and control charge transport though single-molecule junction devices is crucial to achieving the ultimate goal of molecular electronics: constructing real-world-applicable electronic components from single molecules. This review aims to highlight the progress made in single-molecule electronics, emphasizing the development of molecular junction electronics in recent years. Among many techniques that attempt to wire a molecule to metallic electrodes, the single-molecule break junction (SMBJ) technique is one of the most reliable and tunable experimental platforms for achieving metal-molecule-metal configurations. It also provides great freedom to tune charge transport through the junction. Soon after the SMBJ technique was introduced, it was extensively used to measure the conductances of individual molecules; however, different conductances were obtained for the same molecule, and it proved difficult to interpret this wide distribution of experimental data. This phenomenon was later found to be mainly due to a lack of precise experimental control and advanced data analysis methods. In recent years, researchers have directed considerable effort into advancing the SMBJ technique by gaining a deeper physical understanding of charge transport through single molecules and thus enhancing its potential applicability in functional molecular-scale electronic devices, such as molecular diodes and molecular transistors. In parallel with that research, novel data analysis methods and approaches that enable the discovery of hidden yet important features in the data are being developed. This review discusses various aspects of molecular junction electronics, from the initial goal of molecular electronics, the development of experimental techniques for creating single-molecule junctions and determining single-molecule conductance, to the characterization of functional current-voltage features and the investigation of physical properties other than charge

Measurement and Analysis of Multiple Output Transient Propagation in BJT Analog Circuits

Science.gov (United States)

Roche, Nicolas J.-H.; Khachatrian, A.; Warner, J. H.; Buchner, S. P.; McMorrow, D.; Clymer, D. A.

2016-08-01

The propagation of Analog Single Event Transients (ASETs) to multiple outputs of Bipolar Junction Transistor (BJTs) Integrated Circuits (ICs) is reported for the first time. The results demonstrate that ASETs can appear at several outputs of a BJT amplifier or comparator as a result of a single ion or single laser pulse strike at a single physical location on the chip of a large-scale integrated BJT analog circuit. This is independent of interconnect cross-talk or charge-sharing effects. Laser experiments, together with SPICE simulations and analysis of the ASET's propagation in the s-domain are used to explain how multiple-output transients (MOTs) are generated and propagate in the device. This study demonstrates that both the charge collection associated with an ASET and the ASET's shape, commonly used to characterize the propagation of SETs in devices and systems, are unable to explain quantitatively how MOTs propagate through an integrated analog circuit. The analysis methodology adopted here involves combining the Fourier transform of the propagating signal and the current-source transfer function in the s-domain. This approach reveals the mechanisms involved in the transient signal propagation from its point of generation to one or more outputs without the signal following a continuous interconnect path.

A new spin-functional MOSFET based on magnetic tunnel junction technology: pseudo-spin-MOSFET

OpenAIRE

Shuto, Yusuke; Nakane, Ryosho; Wang, Wenhong; Sukegawa, Hiroaki; Yamamoto, Shuu'ichirou; Tanaka, Masaaki; Inomata, Koichiro; Sugahara, Satoshi

2009-01-01

We fabricated and characterized a new spin-functional MOSFET referred to as a pseudo-spin-MOSFET (PS-MOSFET). The PS-MOSFET is a circuit using an ordinary MOSFET and magnetic tunnel junction (MTJ) for reproducing functions of spin-transistors. Device integration techniques for a bottom gate MOSFET using a silicon-on-insulator (SOI) substrate and for an MTJ with a full-Heusler alloy electrode and MgO tunnel barrier were developed. The fabricated PS-MOSFET exhibited high and low transconductanc...

Image charge effects in single-molecule junctions: Breaking of symmetries and negative-differential resistance in a benzene single-electron transistor

DEFF Research Database (Denmark)

Kaasbjerg, Kristen; Flensberg, K.

2011-01-01

and molecular symmetries remain unclear. Using a theoretical framework developed for semiconductor-nanostructure-based single-electron transistors (SETs), we demonstrate that the image charge interaction breaks the molecular symmetries in a benzene-based single-molecule transistor operating in the Coulomb...... blockade regime. This results in the appearance of a so-called blocking state, which gives rise to negative-differential resistance (NDR). We show that the appearance of NDR and its magnitude in the symmetry-broken benzene SET depends in a complicated way on the interplay between the many-body matrix...

Sub-parts per million NO2 chemi-transistor sensors based on composite porous silicon/gold nanostructures prepared by metal-assisted etching.

Science.gov (United States)

Sainato, Michela; Strambini, Lucanos Marsilio; Rella, Simona; Mazzotta, Elisabetta; Barillaro, Giuseppe

2015-04-08

Surface doping of nano/mesostructured materials with metal nanoparticles to promote and optimize chemi-transistor sensing performance represents the most advanced research trend in the field of solid-state chemical sensing. In spite of the promising results emerging from metal-doping of a number of nanostructured semiconductors, its applicability to silicon-based chemi-transistor sensors has been hindered so far by the difficulties in integrating the composite metal-silicon nanostructures using the complementary metal-oxide-semiconductor (CMOS) technology. Here we propose a facile and effective top-down method for the high-yield fabrication of chemi-transistor sensors making use of composite porous silicon/gold nanostructures (cSiAuNs) acting as sensing gate. In particular, we investigate the integration of cSiAuNs synthesized by metal-assisted etching (MAE), using gold nanoparticles (NPs) as catalyst, in solid-state junction-field-effect transistors (JFETs), aimed at the detection of NO2 down to 100 parts per billion (ppb). The chemi-transistor sensors, namely cSiAuJFETs, are CMOS compatible, operate at room temperature, and are reliable, sensitive, and fully recoverable for the detection of NO2 at concentrations between 100 and 500 ppb, up to 48 h of continuous operation.

Practical approach to determining charge collected in multi-junction structures due to the ion shunt effect

International Nuclear Information System (INIS)

Brown, A.O.; Bhuva, B.; Kerns, S.E.

1993-01-01

In order to design semiconductor devices so that they are resistant to single event upsets, a designer needs to know how much charge would be collected at various junctions in the semiconductor structure. For over a decade researchers have studied the physics of charge collection in semiconductor structures, focusing primarily on the charge collected between the p and n regions of a pn junction by drift and diffusion effects -- a process called funneling. However, when an energetic ion penetrates more than one pn junction, funneling is not the only charge collection mechanism. Simulations and experiments on multi-junction structures have shown dramatic change in the charge collected when an ion penetrates two pn junctions. This charge transport between two regions of like conductivity that are ''bridged'' together by the ion track is called the ion shunt effect -- an effect investigated and experimentally proven by Hauser, et al. and Knudson, et al. This paper will present the algorithms and results of a computer program used to determine the charge collected on silicon semiconductor transistors due to the ion shunt effect. The program is unique because it is quick and simple to use and because it uses a general algorithm to determine an accurate initial electron-hole pair distribution in the ion track

0-π phase-controllable thermal Josephson junction

Science.gov (United States)

Fornieri, Antonio; Timossi, Giuliano; Virtanen, Pauli; Solinas, Paolo; Giazotto, Francesco

2017-05-01

Two superconductors coupled by a weak link support an equilibrium Josephson electrical current that depends on the phase difference ϕ between the superconducting condensates. Yet, when a temperature gradient is imposed across the junction, the Josephson effect manifests itself through a coherent component of the heat current that flows opposite to the thermal gradient for |ϕ| heat currents can be inverted by adding a π shift to ϕ. In the static electrical case, this effect has been obtained in a few systems, for example via a ferromagnetic coupling or a non-equilibrium distribution in the weak link. These structures opened new possibilities for superconducting quantum logic and ultralow-power superconducting computers. Here, we report the first experimental realization of a thermal Josephson junction whose phase bias can be controlled from 0 to π. This is obtained thanks to a superconducting quantum interferometer that allows full control of the direction of the coherent energy transfer through the junction. This possibility, in conjunction with the completely superconducting nature of our system, provides temperature modulations with an unprecedented amplitude of ∼100 mK and transfer coefficients exceeding 1 K per flux quantum at 25 mK. Then, this quantum structure represents a fundamental step towards the realization of caloritronic logic components such as thermal transistors, switches and memory devices. These elements, combined with heat interferometers and diodes, would complete the thermal conversion of the most important phase-coherent electronic devices and benefit cryogenic microcircuits requiring energy management, such as quantum computing architectures and radiation sensors.

Theoretical evaluation of two dimensional electron gas characteristics of quaternary AlxInyGa1-x-yN/GaN hetero-junctions

Science.gov (United States)

Rahbardar Mojaver, Hassan; Manouchehri, Farzin; Valizadeh, Pouya

2016-04-01

The two dimensional electron gas (2DEG) characteristics of gated metal-face wurtzite AlInGaN/GaN hetero-junctions including positions of subband energy levels, fermi energy level, and the 2DEG concentration as functions of physical and compositional properties of the hetero-junction (i.e., barrier thickness and metal mole-fractions) are theoretically evaluated using the variational method. The calculated values of the 2DEG concentration are in good agreement with the sparsely available experimental data reported in the literature. According to our simulation results, a considerable shift in the positive direction of threshold voltage of AlInGaN/GaN hetero-junction field-effect transistors can be achieved by engineering both the spontaneous and the piezoelectric polarizations using a quaternary AlInGaN barrier-layer of appropriate mole-fractions.

Analysis of collector-emitter offset voltage of InGaP/GaAs composite collector double heterojunction bipolar transistor

Science.gov (United States)

Lew, K. L.; Yoon, S. F.

2002-04-01

The Ebers-Moll-like terminal current expressions of a composite collector double heterojunction bipolar transistor (DHBT), which takes the recombination effect into account, have been formulated and an expression for collector-emitter offset voltage [VCE(offset)] has been derived. Factors affecting the VCE(offset) of a composite collector DHBT are investigated and good agreement between the calculated and reported experimental results is shown. Analytical results showed that the transmission coefficient of the base-collector (B-C) junction does not have a considerable effect on the VCE(offset), provided that the B-C junction is of good quality. Thus, despite its asymmetric structure, the VCE(offset) of an optimally designed composite collector DHBT could be as low as that of a conventional DHBT. Hence a composite collector DHBT with low saturation voltage and negligible VCE(offset) is possible if the two conditions: (i) good quality B-C junction, (ii) base transport factor, α≈1, are fulfilled.

Coulomb Blockade and Multiple Andreev Reflection in a Superconducting Single-Electron Transistor

Science.gov (United States)

Lorenz, Thomas; Sprenger, Susanne; Scheer, Elke

2018-06-01

In superconducting quantum point contacts, multiple Andreev reflection (MAR), which describes the coherent transport of m quasiparticles each carrying an electron charge with m≥3, sets in at voltage thresholds eV = 2Δ /m. In single-electron transistors, Coulomb blockade, however, suppresses the current at low voltage. The required voltage for charge transport increases with the square of the effective charge eV∝ ( me) ^2. Thus, studying the charge transport in all-superconducting single-electron transistors (SSETs) sets these two phenomena into competition. In this article, we present the fabrication as well as a measurement scheme and transport data for a SSET with one junction in which the transmission and thereby the MAR contributions can be continuously tuned. All regimes from weak to strong coupling are addressed. We extend the Orthodox theory by incorporating MAR processes to describe the observed data qualitatively. We detect a new transport process the nature of which is unclear at present. Furthermore, we observe a renormalization of the charging energy when approaching the strong coupling regime.

Modeling nanowire and double-gate junctionless field-effect transistors

CERN Document Server

Jazaeri, Farzan

2018-01-01

The first book on the topic, this is a comprehensive introduction to the modeling and design of junctionless field effect transistors (FETs). Beginning with a discussion of the advantages and limitations of the technology, the authors also provide a thorough overview of published analytical models for double-gate and nanowire configurations, before offering a general introduction to the EPFL charge-based model of junctionless FETs. Important features are introduced gradually, including nanowire versus double-gate equivalence, technological design space, junctionless FET performances, short channel effects, transcapacitances, asymmetric operation, thermal noise, interface traps, and the junction FET. Additional features compatible with biosensor applications are also discussed. This is a valuable resource for students and researchers looking to understand more about this new and fast developing field.

Ge-on-insulator tunneling FET with abrupt source junction formed by utilizing snowplow effect of NiGe

Science.gov (United States)

Matsumura, Ryo; Katoh, Takumi; Takaguchi, Ryotaro; Takenaka, Mitsuru; Takagi, Shinichi

2018-04-01

Tunneling field-effect transistors (TFETs) attract much attention for use in realizing next-generation low-power processors. In particular, Ge-on-insulator (GOI) TFETs are expected to realize low power operation with a high on-current/off-current (I on/I off) ratio, owing to their narrow bandgap. Here, to improve the performance of GOI-TFETs, a source junction with a high doping concentration and an abrupt impurity profile is essential. In this study, a snowplow effect of NiGe combined with low-energy BF2 + implantation has been investigated to realize an abrupt p+/n Ge junction for GOI n-channel TFETs. By optimizing the Ni thickness to form NiGe (thickness: 4 nm), an abrupt junction with a B profile abruptness of ˜5 nm/dec has been realized with a high doping concentration of around 1021 cm-3. The operation of GOI n-TFETs with this source junction having the abrupt B profile has been demonstrated, and the improvement of TFET properties such as the I on/I off ratio from 311 to 743 and the subthreshold slope from 368 to 239 mV/dec has been observed. This junction formation technology is attractive for enhancing the TFET performance.

Towards high frequency heterojunction transistors: Electrical characterization of N-doped amorphous silicon-graphene diodes

Science.gov (United States)

Strobel, C.; Chavarin, C. A.; Kitzmann, J.; Lupina, G.; Wenger, Ch.; Albert, M.; Bartha, J. W.

2017-06-01

N-type doped amorphous hydrogenated silicon (a-Si:H) is deposited on top of graphene (Gr) by means of very high frequency (VHF) and radio frequency plasma-enhanced chemical vapor deposition (PECVD). In order to preserve the structural integrity of the monolayer graphene, a plasma excitation frequency of 140 MHz was successfully applied during the a-Si:H VHF-deposition. Raman spectroscopy results indicate the absence of a defect peak in the graphene spectrum after the VHF-PECVD of (n)-a-Si:H. The diode junction between (n)-a-Si:H and graphene was characterized using temperature dependent current-voltage (IV) and capacitance-voltage measurements, respectively. We demonstrate that the current at the (n)-a-Si:H-graphene interface is dominated by thermionic emission and recombination in the space charge region. The Schottky barrier height (qΦB), derived by temperature dependent IV-characteristics, is about 0.49 eV. The junction properties strongly depend on the applied deposition method of (n)-a-Si:H with a clear advantage of the VHF(140 MHz)-technology. We have demonstrated that (n)-a-Si:H-graphene junctions are a promising technology approach for high frequency heterojunction transistors.

Copper atomic-scale transistors.

Science.gov (United States)

Xie, Fangqing; Kavalenka, Maryna N; Röger, Moritz; Albrecht, Daniel; Hölscher, Hendrik; Leuthold, Jürgen; Schimmel, Thomas

2017-01-01

We investigated copper as a working material for metallic atomic-scale transistors and confirmed that copper atomic-scale transistors can be fabricated and operated electrochemically in a copper electrolyte (CuSO 4 + H 2 SO 4 ) in bi-distilled water under ambient conditions with three microelectrodes (source, drain and gate). The electrochemical switching-on potential of the atomic-scale transistor is below 350 mV, and the switching-off potential is between 0 and -170 mV. The switching-on current is above 1 μA, which is compatible with semiconductor transistor devices. Both sign and amplitude of the voltage applied across the source and drain electrodes ( U bias ) influence the switching rate of the transistor and the copper deposition on the electrodes, and correspondingly shift the electrochemical operation potential. The copper atomic-scale transistors can be switched using a function generator without a computer-controlled feedback switching mechanism. The copper atomic-scale transistors, with only one or two atoms at the narrowest constriction, were realized to switch between 0 and 1 G 0 ( G 0 = 2e 2 /h; with e being the electron charge, and h being Planck's constant) or 2 G 0 by the function generator. The switching rate can reach up to 10 Hz. The copper atomic-scale transistor demonstrates volatile/non-volatile dual functionalities. Such an optimal merging of the logic with memory may open a perspective for processor-in-memory and logic-in-memory architectures, using copper as an alternative working material besides silver for fully metallic atomic-scale transistors.

Ultra-low switching energy and scaling in electric-field-controlled nanoscale magnetic tunnel junctions with high resistance-area product

Energy Technology Data Exchange (ETDEWEB)

Grezes, C.; Alzate, J. G.; Cai, X.; Wang, K. L. [Department of Electrical Engineering, University of California, Los Angeles, California 90095 (United States); Ebrahimi, F.; Khalili Amiri, P. [Department of Electrical Engineering, University of California, Los Angeles, California 90095 (United States); Inston, Inc., Los Angeles, California 90024 (United States); Katine, J. A. [HGST, Inc., San Jose, California 95135 (United States); Langer, J.; Ocker, B. [Singulus Technologies AG, Kahl am Main 63796 (Germany)

2016-01-04

We report electric-field-induced switching with write energies down to 6 fJ/bit for switching times of 0.5 ns, in nanoscale perpendicular magnetic tunnel junctions (MTJs) with high resistance-area product and diameters down to 50 nm. The ultra-low switching energy is made possible by a thick MgO barrier that ensures negligible spin-transfer torque contributions, along with a reduction of the Ohmic dissipation. We find that the switching voltage and time are insensitive to the junction diameter for high-resistance MTJs, a result accounted for by a macrospin model of purely voltage-induced switching. The measured performance enables integration with same-size CMOS transistors in compact memory and logic integrated circuits.

Degradation Mechanisms for GaN and GaAs High Speed Transistors

Directory of Open Access Journals (Sweden)

Fan Ren

2012-11-01

Full Text Available We present a review of reliability issues in AlGaN/GaN and AlGaAs/GaAs high electron mobility transistors (HEMTs as well as Heterojunction Bipolar Transistors (HBTs in the AlGaAs/GaAs materials systems. Because of the complex nature and multi-faceted operation modes of these devices, reliability studies must go beyond the typical Arrhenius accelerated life tests. We review the electric field driven degradation in devices with different gate metallization, device dimensions, electric field mitigation techniques (such as source field plate, and the effect of device fabrication processes for both DC and RF stress conditions. We summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported, but differ in the two device technologies: For HEMTs, the layers are thin and relatively lightly doped compared to HBT structures and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only Ohmic contacts. This leads to different degradation mechanisms for the two types of devices.

Degradation Mechanisms for GaN and GaAs High Speed Transistors

Science.gov (United States)

Cheney, David J.; Douglas, Erica A.; Liu, Lu; Lo, Chien-Fong; Gila, Brent P.; Ren, Fan; Pearton, Stephen J.

2012-01-01

We present a review of reliability issues in AlGaN/GaN and AlGaAs/GaAs high electron mobility transistors (HEMTs) as well as Heterojunction Bipolar Transistors (HBTs) in the AlGaAs/GaAs materials systems. Because of the complex nature and multi-faceted operation modes of these devices, reliability studies must go beyond the typical Arrhenius accelerated life tests. We review the electric field driven degradation in devices with different gate metallization, device dimensions, electric field mitigation techniques (such as source field plate), and the effect of device fabrication processes for both DC and RF stress conditions. We summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported, but differ in the two device technologies: For HEMTs, the layers are thin and relatively lightly doped compared to HBT structures and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only Ohmic contacts. This leads to different degradation mechanisms for the two types of devices.

Electron and hole photoemission detection for band offset determination of tunnel field-effect transistor heterojunctions

International Nuclear Information System (INIS)

Li, Wei; Zhang, Qin; Kirillov, Oleg A.; Levin, Igor; Richter, Curt A.; Gundlach, David J.; Nguyen, N. V.; Bijesh, R.; Datta, S.; Liang, Yiran; Peng, Lian-Mao; Liang, Xuelei

2014-01-01

We report experimental methods to ascertain a complete energy band alignment of a broken-gap tunnel field-effect transistor based on an InAs/GaSb hetero-junction. By using graphene as an optically transparent electrode, both the electron and hole barrier heights at the InAs/GaSb interface can be quantified. For a Al 2 O 3 /InAs/GaSb layer structure, the barrier height from the top of the InAs and GaSb valence bands to the bottom of the Al 2 O 3 conduction band is inferred from electron emission whereas hole emissions reveal the barrier height from the top of the Al 2 O 3 valence band to the bottom of the InAs and GaSb conduction bands. Subsequently, the offset parameter at the broken gap InAs/GaSb interface is extracted and thus can be used to facilitate the development of predicted models of electron quantum tunneling efficiency and transistor performance

Silicon heterojunction transistor

International Nuclear Information System (INIS)

Matsushita, T.; Oh-uchi, N.; Hayashi, H.; Yamoto, H.

1979-01-01

SIPOS (Semi-insulating polycrystalline silicon) which is used as a surface passivation layer for highly reliable silicon devices constitutes a good heterojunction for silicon. P- or B-doped SIPOS has been used as the emitter material of a heterojunction transistor with the base and collector of silicon. An npn SIPOS-Si heterojunction transistor showing 50 times the current gain of an npn silicon homojunction transistor has been realized by high-temperature treatments in nitrogen and low-temperature annealing in hydrogen or forming gas

Accelerating the life of transistors

International Nuclear Information System (INIS)

Qi Haochun; Lü Changzhi; Zhang Xiaoling; Xie Xuesong

2013-01-01

Choosing small and medium power switching transistors of the NPN type in a 3DK set as the study object, the test of accelerating life is conducted in constant temperature and humidity, and then the data are statistically analyzed with software developed by ourselves. According to degradations of such sensitive parameters as the reverse leakage current of transistors, the lifetime order of transistors is about more than 10 4 at 100 °C and 100% relative humidity (RH) conditions. By corrosion fracture of transistor outer leads and other failure modes, with the failure truncated testing, the average lifetime rank of transistors in different distributions is extrapolated about 10 3 . Failure mechanism analyses of degradation of electrical parameters, outer lead fracture and other reasons that affect transistor lifetime are conducted. The findings show that the impact of external stress of outer leads on transistor reliability is more serious than that of parameter degradation. (semiconductor devices)

Effect of low and staggered gap quantum wells inserted in GaAs tunnel junctions

Science.gov (United States)

Louarn, K.; Claveau, Y.; Marigo-Lombart, L.; Fontaine, C.; Arnoult, A.; Piquemal, F.; Bounouh, A.; Cavassilas, N.; Almuneau, G.

2018-04-01

In this article, we investigate the impact of the insertion of either a type I InGaAs or a type II InGaAs/GaAsSb quantum well on the performances of MBE-grown GaAs tunnel junctions (TJs). The devices are designed and simulated using a quantum transport model based on the non-equilibrium Green’s function formalism and a 6-band k.p Hamiltonian. We experimentally observe significant improvements of the peak tunneling current density on both heterostructures with a 460-fold increase for a moderately doped GaAs TJ when the InGaAs QW is inserted at the junction interface, and a 3-fold improvement on a highly doped GaAs TJ integrating a type II InGaAs/GaAsSb QW. Thus, the simple insertion of staggered band lineup heterostructures enables us to reach a tunneling current well above the kA cm‑2 range, equivalent to the best achieved results for Si-doped GaAs TJs, implying very interesting potential for TJ-based components, such as multi-junction solar cells, vertical cavity surface emitting lasers and tunnel-field effect transistors.

Contact Resistance Reduction of ZnO Thin Film Transistors (TFTs) with Saw-Shaped Electrode

KAUST Repository

Park, Woojin

2018-05-15

We report a saw-shaped electrode architecture ZnO thin film transistor (TFT) for effectively increase channel width. Such a saw-shaped electrode has ~2 times longer contact line at the contact metal/ZnO channel junction. We experimentally observed an enhancement in the output drive current by 50% and reduction in the contact resistance by over 50%, when compared to a typical shaped electrode ZnO TFT consuming the same chip area. This performance enhancement is attributed to extension of channel width. This technique can contribute to device performance enhancement and especially reduction in the contact resistance which is a serious challenge.

Hetero-gate-dielectric double gate junctionless transistor (HGJLT) with reduced band-to-band tunnelling effects in subthreshold regime

International Nuclear Information System (INIS)

Ghosh, Bahniman; Mondal, Partha; Akram, M. W.; Bal, Punyasloka; Salimath, Akshay Kumar

2014-01-01

We propose a hetero-gate-dielectric double gate junctionless transistor (HGJLT), taking high-k gate insulator at source side and low-k gate insulator at drain side, which reduces the effects of band-to-band tunnelling (BTBT) in the sub-threshold region. A junctionless transistor (JLT) is turned off by the depletion of carriers in the highly doped thin channel (device layer) which results in a significant band overlap between the valence band of the channel region and the conduction band of the drain region, due to off-state drain bias, that triggers electrons to tunnel from the valence band of the channel region to the conduction band of the drain region leaving behind holes in the channel. These effects of band-to-band tunnelling increase the sub-threshold leakage current, and the accumulation of holes in the channel forms a parasitic bipolar junction transistor (n–p–n BJT for channel JLT) in the lateral direction by the source (emitter), channel (base) and drain (collector) regions in JLT structure in off-state. The proposed HGJLT reduces the subthreshold leakage current and suppresses the parasitic BJT action in off-state by reducing the band-to-band tunnelling probability. (semiconductor devices)

Performance enhancement of Ge-on-Insulator tunneling FETs with source junctions formed by low-energy BF2 ion implantation

Science.gov (United States)

Katoh, Takumi; Matsumura, Ryo; Takaguchi, Ryotaro; Takenaka, Mitsuru; Takagi, Shinichi

2018-04-01

To clarify the process of formation of source regions of high-performance Ge n-channel tunneling field-effect transistors (TFETs), p+-n junctions formed by low-energy ion implantation (I/I) of BF2 atoms are characterized. Here, the formation of p+-n junctions with steep B profiles and low junction leakage is a key issue. The steepness of 5.7 nm/dec in profiles of B implanted into Ge is obtained for BF2 I/I at 3 keV with a dose of 4 × 1014 cm-2. Ge-on-insulator (GOI) n-TFETs with the source tunnel junctions formed by low-energy B and BF2 I/I are fabricated on GOI substrates and the device operation is confirmed. Although the performance at room temperature is significantly degraded by the source junction leakage current, an I on/I off ratio of 105 and the minimum sub-threshold swing (S.S.) of 130 mV/dec are obtained at 10 K. It is found that GOI n-TFETs with steeper B profiles formed by BF2 I/I have led to higher on current and a lower sub-threshold slope, demonstrating the effectiveness of steep B profiles in enhancing the GOI TFET performance.

High-performance vertical organic transistors.

Science.gov (United States)

Kleemann, Hans; Günther, Alrun A; Leo, Karl; Lüssem, Björn

2013-11-11

Vertical organic thin-film transistors (VOTFTs) are promising devices to overcome the transconductance and cut-off frequency restrictions of horizontal organic thin-film transistors. The basic physical mechanisms of VOTFT operation, however, are not well understood and VOTFTs often require complex patterning techniques using self-assembly processes which impedes a future large-area production. In this contribution, high-performance vertical organic transistors comprising pentacene for p-type operation and C60 for n-type operation are presented. The static current-voltage behavior as well as the fundamental scaling laws of such transistors are studied, disclosing a remarkable transistor operation with a behavior limited by injection of charge carriers. The transistors are manufactured by photolithography, in contrast to other VOTFT concepts using self-assembled source electrodes. Fluorinated photoresist and solvent compounds allow for photolithographical patterning directly and strongly onto the organic materials, simplifying the fabrication protocol and making VOTFTs a prospective candidate for future high-performance applications of organic transistors. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Qualitative doping area characterization of SONOS transistor utilizing scanning capacitance microscopy (SCM) and scanning spread resistance microscopy (SSRM)

International Nuclear Information System (INIS)

Heo, Jinhee; Kim, Deoksu; Kim, Chung woo; Chung, Ilsub

2005-01-01

Continuous shrinkage in the memory devices demands further understanding about the doping concentration variations at shallow junction and channel region. Scanning capacitance microscopy (SCM) and scanning spread resistance microscopy (SSRM) can provide reliable information about the electrical and physical junction structure simultaneously. In this work, we attempt to visualize the doping concentration variations of split-gate structure silicon-oxide-nitride-oxide-silicon (SONOS) transistor with thin oxide-nitride-oxide (ONO; 4/7/11 nm). From SCM image, we could identify the source and drain region, which have different doping concentrations from that at channel region. In addition, a gate oxide layer and a depletion region were also identified. Similar results were obtained using SSRM. However, SSRM shows a better resolution, in particular, for highly doped region. For this experiment, the cross-sectional sample has been prepared using focused ion beam (FIB) and hand-polishing method. The results show that SCM and SSRM are very useful methods to analyze the doping profile near the junction as well as the channel

Fabrication, electrical characterization and device simulation of vertical P3HT field-effect transistors

Directory of Open Access Journals (Sweden)

Bojian Xu

2017-12-01

Full Text Available Vertical organic field-effect transistors (VOFETs provide an advantage over lateral ones with respect to the possibility to conveniently reduce the channel length. This is beneficial for increasing both the cut-off frequency and current density in organic field-effect transistor devices. We prepared P3HT (poly[3-hexylthiophene-2,5-diyl] VOFETs with a surrounding gate electrode and gate dielectric around the vertical P3HT pillar junction. Measured output and transfer characteristics do not show a distinct gate effect, in contrast to device simulations. By introducing in the simulations an edge layer with a strongly reduced charge mobility, the gate effect is significantly reduced. We therefore propose that a damaged layer at the P3HT/dielectric interface could be the reason for the strong suppression of the gate effect. We also simulated how the gate effect depends on the device parameters. A smaller pillar diameter and a larger gate electrode-dielectric overlap both lead to better gate control. Our findings thus provide important design parameters for future VOFETs.

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

Science.gov (United States)

Es-Sakhi, Azzedin D.

concept of negative capacitance. The new field effect transistor (FET) based on ferroelectric insulator named Silicon-On-Ferroelectric Insulator Field Effect Transistor (SOF-FET). This proposal is a promising methodology for future ultra-low-power applications, because it demonstrates the ability to replace the silicon-bulk based MOSFET, and offers subthreshold swing significantly lower than 60mV/decade and reduced threshold voltage to form a conducting channel. The SOF-FET can also solve the issue of junction leakage (due to the presence of unipolar junction between the top plate of the negative capacitance and the diffused areas that form the transistor source and drain). In this device the charge hungry ferroelectric film already limits the leakage.

Silicon nanowire transistors

CERN Document Server

Bindal, Ahmet

2016-01-01

This book describes the n and p-channel Silicon Nanowire Transistor (SNT) designs with single and dual-work functions, emphasizing low static and dynamic power consumption. The authors describe a process flow for fabrication and generate SPICE models for building various digital and analog circuits. These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology’s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types...

Electrical characteristics of tunneling field-effect transistors with asymmetric channel thickness

Science.gov (United States)

Kim, Jungsik; Oh, Hyeongwan; Kim, Jiwon; Meyyappan, M.; Lee, Jeong-Soo

2017-02-01

Effects of using asymmetric channel thickness in tunneling field-effect transistors (TFET) are investigated in sub-50 nm channel regime using two-dimensional (2D) simulations. As the thickness of the source side becomes narrower in narrow-source wide-drain (NSWD) TFETs, the threshold voltage (V th) and the subthreshold swing (SS) decrease due to enhanced gate controllability of the source side. The narrow source thickness can make the band-to-band tunneling (BTBT) distance shorter and induce much higher electric field near the source junction at the on-state condition. In contrast, in a TFET with wide-source narrow-drain (WSND), the SS shows almost constant values and the V th slightly increases with narrowing thickness of the drain side. In addition, the ambipolar current can rapidly become larger with smaller thickness on the drain side because of the shorter BTBT distance and the higher electric-field at the drain junction. The on-current of the asymmetric channel TFET is lower than that of conventional TFETs due to the volume limitation of the NSWD TFET and high series resistance of the WSND TFET. The on-current is almost determined by the channel thickness of the source side.

Logarithmic current-measuring transistor circuits

DEFF Research Database (Denmark)

Højberg, Kristian Søe

1967-01-01

Describes two transistorized circuits for the logarithmic measurement of small currents suitable for nuclear reactor instrumentation. The logarithmic element is applied in the feedback path of an amplifier, and only one dual transistor is used as logarithmic diode and temperature compensating...... transistor. A simple one-amplifier circuit is compared with a two-amplifier system. The circuits presented have been developed in connexion with an amplifier using a dual m.o.s. transistor input stage with diode-protected gates....

Shootthrough fault protection system for bipolar transistors in a voltage source transistor inverter

International Nuclear Information System (INIS)

Wirth, W.F.

1982-01-01

Faulted bipolar transistors in a voltage source transistor inverter are protected against shootthrough fault current, from the filter capacitor of the d-c voltage source which drives the inverter over the d-c bus, by interposing a small choke in series with the filter capacitor to limit the rate of rise of that fault current while at the same time causing the d-c bus voltage to instantly drop to essentially zero volts at the beginning of a shootthrough fault. In this way, the load lines of the faulted transistors are effectively shaped so that they do not enter the second breakdown area, thereby preventing second breakdown destruction of the transistors

Electrical characteristics of SiGe-base bipolar transistors on thin-film SOI substrates

International Nuclear Information System (INIS)

Liao, Shu-Hui; Chang, Shu-Tong

2010-01-01

This paper, based on two-dimensional simulations, provides a comprehensive analysis of the electrical characteristics of the Silicon germanium (SiGe)-base bipolar transistors on thin-film siliconon-insulator (SOI) substrates. The impact of the buried oxide thickness (T OX ), the emitter width (W E ), and the lateral distance between the edge of the intrinsic base and the reach-through region (L col ) on both the AC and DC device characteristics was analyzed in detail. Regarding the DC characteristics, the simulation results suggest that a thicker T OX gives a larger base-collector breakdown voltage (BV CEO ), whereas reducing the T OX leads to an enhanced maximum electric field at the B-C junction. As for the AC characteristics, cut-off frequency (f T ) increases slightly with increasing buried oxide thickness and finally saturates to a constant value when the buried oxide thickness is about 0.15 μm. The collector-substrate capacitance (C CS ) decreases with increasing buried oxide thickness while the maximum oscillation frequency (f max ) increases with increasing buried oxide thickness. Furthermore, the impact of self-heating effects in the device was analyzed in various areas. The thermal resistance as a function of the buried oxide thickness indicates that the thermal resistance of the SiGe-base bipolar transistor on a SOI substrate is slightly higher than that of a bulk SiGe-base bipolar transistor. The thermal resistance is reduced by ∼37.89% when the emitter width is increased by a factor of 5 for a fixed buried oxide thickness of 0.1 μm. All the results can be used to design and optimize SiGe-base bipolar transistors on SOI substrates with minimum thermal resistance to enhance device performance.

A High-Voltage Level Tolerant Transistor Circuit

NARCIS (Netherlands)

Annema, Anne J.; Geelen, Godefridus Johannes Gertrudis Maria

2001-01-01

A high-voltage level tolerant transistor circuit, comprising a plurality of cascoded transistors, including a first transistor (T1) operatively connected to a high-voltage level node (3) and a second transistor (T2) operatively connected to a low-voltage level node (2). The first transistor (T1)

Diode, transistor & fet circuits manual

CERN Document Server

Marston, R M

2013-01-01

Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration

Vertical organic transistors

International Nuclear Information System (INIS)

Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl

2015-01-01

Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted. (topical review)

Vertical organic transistors.

Science.gov (United States)

Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl

2015-11-11

Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted.

Organic field-effect transistors as a test-bed for molecular electronics : a combined study with large-area molecular junctions

NARCIS (Netherlands)

Asadi, K.; Katsouras, I.; Harkema, J.; Gholamrezaie, F.; Smits, E.C.P.; Biscarini, F.; Blom b, P.W.M.; Leeuw, D.M. de

2012-01-01

The contact resistance of a transistor using self-assembled monolayer (SAM)-modified source and drain electrodes depends on the SAM tunnel resistance, the height of the injection barrier and the morphology at the contact. To disentangle the different contributions, we have combined here the

Organic field-effect transistors as a test-bed for molecular electronics : A combined study with large-area molecular junctions

NARCIS (Netherlands)

Asadi, Kamal; Katsouras, Ilias; Harkema, Jan; Gholamrezaie, Fatemeh; Smits, Edsger C. F.; Biscarini, Fabio; Blom, Paul W. M.; de Leeuw, Dago M.

2012-01-01

The contact resistance of a transistor using self-assembled monolayer (SAM)-modified source and drain electrodes depends on the SAM tunnel resistance, the height of the injection barrier and the morphology at the contact. To disentangle the different contributions, we have combined here the

Organic field-effect transistors as a test-bed for molecular electronics : A combined study with large-area molecular junctions

NARCIS (Netherlands)

Asadi, Kamal; Katsouras, Ilias; Harkema, Jan; Gholamrezaie, Fatemeh; Smits, Edsger C. F.; Biscarini, Fabio; Blom, Paul W. M.; de Leeuw, Dago M.

The contact resistance of a transistor using self-assembled monolayer (SAM)-modified source and drain electrodes depends on the SAM tunnel resistance, the height of the injection barrier and the morphology at the contact. To disentangle the different contributions, we have combined here the

The effects of changing the electrodes temperature on the tunnel magnetoresistance in the ferromagnetic single electron transistor

Science.gov (United States)

Ahmadi, N.; Pourali, N.; Kavaz, E.

2018-01-01

Ferromagnetic single electron transistor with electrodes having different temperatures is investigated and the effects of changing electrodes temperature on TMR of system are studied. A modified orthodox theory is used to study the system and to calculate the electron tunneling transition rate. The results show that the temperature of electrodes can be an effective tool to control and tune the tunnel magnetoresistance of FM-SET. Also, the effects of parameters such as resistance ratio of junctions, magnetic polarization and spin relaxation time on the behaviour of the system are studied.

Study on Effect of Junction Temperature Swing Duration on Lifetime of Transfer Molded Power IGBT Modules

DEFF Research Database (Denmark)

Choi, Uimin; Blaabjerg, Frede; Jørgensen, Søren

2017-01-01

levels are presented. This study enables to include the tΔTj effect on lifetime model of IGBT modules for its lifetime estimation and it may result in improved lifetime prediction of IGBT modules under given mission profiles of converters. A postfailure analysis of the tested IGBT modules is also......In this paper, the effect of junction temperature swing duration on lifetime of transfer molded power insulated gate bipolar transistor (IGBT) modules is studied and a relevant lifetime factor is modeled. This study is based on 39 accelerated power cycling test results under six different...

On theory of single-molecule transistor

International Nuclear Information System (INIS)

Tran Tien Phuc

2009-01-01

The results of the study on single-molecule transistor are mainly investigated in this paper. The structure of constructed single-molecule transistor is similar to a conventional MOSFET. The conductive channel of the transistors is a single-molecule of halogenated benzene derivatives. The chemical simulation software CAChe was used to design and implement for the essential parameter of the molecules utilized as the conductive channel. The GUI of Matlab has been built to design its graphical interface, calculate and plot the output I-V characteristic curves for the transistor. The influence of temperature, length and width of the conductive channel, and gate voltage is considered. As a result, the simulated curves are similar to the traditional MOSFET's. The operating temperature range of the transistors is wider compared with silicon semiconductors. The supply voltage for transistors is only about 1 V. The size of transistors in this research is several nanometers.

Dosimetric properties of MOS transistors

International Nuclear Information System (INIS)

Frank, H.; Petr, I.

1977-01-01

The structure of MOS transistors is described and their characteristics given. The experiments performed and data in the literature show the following dosimetric properties of MOS transistors: while for low gamma doses the transistor response to exposure is linear, it shows saturation for higher doses (exceeding 10 3 Gy in tissue). The response is independent of the energy of radiation and of the dose rate (within 10 -2 to 10 5 Gy/s). The spontaneous reduction with time of the spatial charge captured by the oxide layer (fading) is small and acceptable from the point of view of dosimetry. Curves are given of isochronous annealing of the transistors following irradiation with 137 Cs and 18 MeV electrons for different voltages during irradiation. The curves show that in MOS transistors irradiated with high-energy electrons the effect of annealing is less than in transistors irradiated with 137 Cs. In view of the requirement of using higher temperatures (approx. 400 degC) for the complete ''erasing'' of the captured charge, unsealed systems must be used for dosimetric purposes. The effect was also studied of neutron radiation, proton radiation and electron radiation on the MOS transistor structure. For MOS transistor irradiation with 14 MeV neutrons from a neutron generator the response was 4% of that for gamma radiation at the same dose equivalent. The effect of proton radiation was studied as related to the changes in MOS transistor structure during space flights. The response curve shapes are similar to those of gamma radiation curves. The effect of electron radiation on the MOS structure was studied by many authors. The experiments show that for each thickness of the SiO 2 layer an electron energy exists at which the size of the charge captured in SiO 2 is the greatest. All data show that MOS transistors are promising for radiation dosimetry. The main advantage of MOS transistors as gamma dosemeters is the ease and speed of evaluation, low sensitivity to neutron

Colour tuneable light-emitting transistor

Energy Technology Data Exchange (ETDEWEB)

Feldmeier, Eva J.; Melzer, Christian; Seggern, Heinz von [Electronic Materials Department, Institute of Materials Science, Technische Universitaet Darmstadt (Germany)

2010-07-01

In recent years the interest in ambipolar organic light-emitting field-effect transistors has increased steadily as the devices combine switching behaviour of transistors with light emission. Usually, small molecules and polymers with a band gap in the visible spectral range serve as semiconducting materials. Mandatory remain balanced injection and transport properties for both charge carrier types to provide full control of the spatial position of the recombination zone of electrons and holes in the transistor channel via the applied voltages. As will be presented here, the spatial control of the recombination zone opens new possibilities towards light-emitting devices with colour tuneable emission. In our contribution an organic light-emitting field-effect transistors is presented whose emission colour can be changed by the applied voltages. The organic top-contact field-effect transistor is based on a parallel layer stack of acenes serving as organic transport and emission layers. The transistor displays ambipolar characteristics with a narrow recombination zone within the transistor channel. During operation the recombination zone can be moved by a proper change in the drain and gate bias from one organic semiconductor layer to another one inducing a change in the emission colour. In the presented example the emission maxima can be switched from 530 nm to 580 nm.

Subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory for nonvolatile operation

Science.gov (United States)

Huh, In; Cheon, Woo Young; Choi, Woo Young

2016-04-01

A subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory (SAT RAM) has been proposed and fabricated for low-power nonvolatile memory applications. The proposed SAT RAM cell demonstrates adjustable subthreshold swing (SS) depending on stored information: small SS in the erase state ("1" state) and large SS in the program state ("0" state). Thus, SAT RAM cells can achieve low read voltage (Vread) with a large memory window in addition to the effective suppression of ambipolar behavior. These unique features of the SAT RAM are originated from the locally stored charge, which modulates the tunneling barrier width (Wtun) of the source-to-channel tunneling junction.

Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

KAUST Repository

Fahad, Hossain M.; Smith, Casey; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

2011-01-01

We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

KAUST Repository

Fahad, Hossain M.

2011-10-12

We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

Dosimetric properties of MOS transistors

International Nuclear Information System (INIS)

Peter, I.; Frank, G.

1977-01-01

The performance of MOS transistors as gamma detectors has been tested. The dosimeter sensitivity has proved to be independent on the doses ranging from 10 3 to 10 6 R, and gamma energy of 137 Cs, 60 Co - sources and 5 - 18 MeV electrons. Fading of the space charge trapped by the SiO 2 layer of the transistor has appeared to be neglegible at room temperature after 400 hrs. The isochronous annealing in the temperature range of 40-260 deg C had a more substantial effect on the space charge of the transistor irradiated with 18 MeV electrons than on the 137 Cs gamma-irradiated transistors. This proved a repeated use of γ-dosemeters. MOS transistors are concluded to be promising for gamma dosimetry [ru

Dual-gate operation and carrier transport in SiGe p-n junction nanowires

Science.gov (United States)

Delker, C. J.; Yoo, J. Y.; Bussmann, E.; Swartzentruber, B. S.; Harris, C. T.

2017-11-01

We investigate carrier transport in silicon-germanium nanowires with an axial p-n junction doping profile by fabricating these wires into transistors that feature separate top gates over each doping segment. By independently biasing each gate, carrier concentrations in the n- and p-side of the wire can be modulated. For these devices, which were fabricated with nickel source-drain electrical contacts, holes are the dominant charge carrier, with more favorable hole injection occurring on the p-side contact. Channel current exhibits greater sensitivity to the n-side gate, and in the reverse biased source-drain configuration, current is limited by the nickel/n-side Schottky contact.

A transimpedance amplifier for excess noise measurements of high junction capacitance avalanche photodiodes

International Nuclear Information System (INIS)

Green, James E; David, John P R; Tozer, Richard C

2012-01-01

This paper reports a novel and versatile system for measuring excess noise and multiplication in avalanche photodiodes (APDs), using a bipolar junction transistor based transimpedance amplifier front-end and based on phase-sensitive detection, which permits accurate measurement in the presence of a high dark current. The system can reliably measure the excess noise factor of devices with capacitance up to 5 nF. This system has been used to measure thin, large area Si pin APDs and the resulting data are in good agreement with measurements of the same devices obtained from a different noise measurement system which will be reported separately. (paper)

Transistor-based particle detection systems and methods

Science.gov (United States)

Jain, Ankit; Nair, Pradeep R.; Alam, Muhammad Ashraful

2015-06-09

Transistor-based particle detection systems and methods may be configured to detect charged and non-charged particles. Such systems may include a supporting structure contacting a gate of a transistor and separating the gate from a dielectric of the transistor, and the transistor may have a near pull-in bias and a sub-threshold region bias to facilitate particle detection. The transistor may be configured to change current flow through the transistor in response to a change in stiffness of the gate caused by securing of a particle to the gate, and the transistor-based particle detection system may configured to detect the non-charged particle at least from the change in current flow.

Vertical versus Lateral Two-Dimensional Heterostructures: On the Topic of Atomically Abrupt p/n-Junctions.

Science.gov (United States)

Zhou, Ruiping; Ostwal, Vaibhav; Appenzeller, Joerg

2017-08-09

The key appeal of two-dimensional (2D) materials such as graphene, transition metal dichalcogenides (TMDs), or phosphorene for electronic applications certainly lies in their atomically thin nature that offers opportunities for devices beyond conventional transistors. It is also this property that makes them naturally suited for a type of integration that is not possible with any three-dimensional (3D) material, that is, forming heterostructures by stacking dissimilar 2D materials together. Recently, a number of research groups have reported on the formation of atomically sharp p/n-junctions in various 2D heterostructures that show strong diode-type rectification. In this article, we will show that truly vertical heterostructures do exhibit much smaller rectification ratios and that the reported results on atomically sharp p/n-junctions can be readily understood within the framework of the gate and drain voltage response of Schottky barriers that are involved in the lateral transport.

Electron irradiation of power transistors

International Nuclear Information System (INIS)

Hower, P.L.; Fiedor, R.J.

1982-01-01

A method for reducing storage time and gain parameters in a semiconductor transistor includes the step of subjecting the transistor to electron irradiation of a dosage determined from measurements of the parameters of a test batch of transistors. Reduction of carrier lifetime by proton bombardment and gold doping is mentioned as an alternative to electron irradiation. (author)

Two-dimensional dopant profiling for shallow junctions by TEM and AFM

International Nuclear Information System (INIS)

Yoo, K.

2000-01-01

The present work concerns the development of the Etch/TEM and Etch/AFM methods to obtain quantitative 2-D dopant profiles for the ultra shallow p-n junctions of the next generation of metal-oxide-semiconductor field effect transistors (MOSFETs). For these methods, thin foil (TEM) or bulk (AFM) cross-sectional specimens were etched using a dopant selective chemical so that local areas of the dopant implanted source/drain (S/D) regions were etched to different depths. The surface topography of the S/D regions was determined from the thickness fringes for the TEM method and by the direct measurement for the AFM method. The local etched depths were converted to etch rates, and these were then converted to corresponding 1-D and 2-D dopant profiles by the experimentally independent etch rate calibration curves. Shallow junction MOSFET samples were designed and fabricated with junction depths 60nm (n + /p), 80nm (n + /p) and 120nm (p + /n) using 0.25μm process technology. A new method using SOG (Spin-on-Glass) contributed to the high quality XTEM thin foil specimens. Controlled stirring of the etchant increased the dopant concentration selectivity and etching consistency. Computer modelling simulated the isotropic etching behaviours, which can introduce the significant error in dopant profiling for shallow and abrupt junction samples. Comprehensive quantitative results enabled the optimum etching time to be determined for the first time. Etch/TEM method gave 1-D dopant profiles that showed good agreement with 1-D Spreading Resistance Probe (SRP) dopant profiles for determining junction depths. 2-D dopant profiles gave L eff , i.e. the shortest lateral distance between the S/D junctions, of major importance for MOSFET performance. Values for L eff of 161, 159 and 123nm were determined from 60, 80 and 120nm junction depth samples respectively, compared with the 215nm MOSFET gate length. The resolution and accuracy of the Etch/TEM method are estimated as 2 and 10nm

Improved transfer of graphene for gated Schottky-junction, vertical, organic, field-effect transistors.

Science.gov (United States)

Lemaitre, Maxime G; Donoghue, Evan P; McCarthy, Mitchell A; Liu, Bo; Tongay, Sefaattin; Gila, Brent; Kumar, Purushottam; Singh, Rajiv K; Appleton, Bill R; Rinzler, Andrew G

2012-10-23

An improved process for graphene transfer was used to demonstrate high performance graphene enabled vertical organic field effect transistors (G-VFETs). The process reduces disorder and eliminates the polymeric residue that typically plagues transferred films. The method also allows for purposely creating pores in the graphene of a controlled areal density. Transconductance observed in G-VFETs fabricated with a continuous (pore-free) graphene source electrode is attributed to modulation of the contact barrier height between the graphene and organic semiconductor due to a gate field induced Fermi level shift in the low density of electronic-states graphene electrode. Pores introduced in the graphene source electrode are shown to boost the G-VFET performance, which scales with the areal pore density taking advantage of both barrier height lowering and tunnel barrier thinning. Devices with areal pore densities of 20% exhibit on/off ratios and output current densities exceeding 10(6) and 200 mA/cm(2), respectively, at drain voltages below 5 V.

The point of practical use for the transistor circuit

International Nuclear Information System (INIS)

1996-01-01

This is comprised of eight chapters and goes as follows; what is transistor? the first step for use of transistor such as connection between power and signal source, static characteristic of transistor and equivalent circuit of transistor, design of easy small-signal amplifier circuit, design for amplification of electric power and countermeasure for prevention of trouble, transistor concerned interface, transistor circuit around micro computer, transistor in active use of FET and power circuit and transistor. It has an appendix on transistor and design of bias of FET circuits like small signal transistor circuit and FET circuit.

Silicon on insulator self-aligned transistors

Science.gov (United States)

McCarthy, Anthony M.

2003-11-18

A method for fabricating thin-film single-crystal silicon-on-insulator (SOI) self-aligned transistors. Standard processing of silicon substrates is used to fabricate the transistors. Physical spaces, between the source and gate, and the drain and gate, introduced by etching the polysilicon gate material, are used to provide connecting implants (bridges) which allow the transistor to perform normally. After completion of the silicon substrate processing, the silicon wafer is bonded to an insulator (glass) substrate, and the silicon substrate is removed leaving the transistors on the insulator (glass) substrate. Transistors fabricated by this method may be utilized, for example, in flat panel displays, etc.

Physical limits of silicon transistors and circuits

International Nuclear Information System (INIS)

Keyes, Robert W

2005-01-01

A discussion on transistors and electronic computing including some history introduces semiconductor devices and the motivation for miniaturization of transistors. The changing physics of field-effect transistors and ways to mitigate the deterioration in performance caused by the changes follows. The limits of transistors are tied to the requirements of the chips that carry them and the difficulties of fabricating very small structures. Some concluding remarks about transistors and limits are presented

Multichannel monolithic front-end system design. Part II. Microwave bipolar-JFET process for low-noise charge-sensitive preamplifiers

International Nuclear Information System (INIS)

Baturitsky, M.A.; Reutovich, S.I.; Solomashenko, N.F.

1996-01-01

For pt. I see ibid., vol.378, p.564-569, 1996. New monolithic low-noise process has been developed for simultaneous fabrication of high-speed low-noise 4-terminal and 3-terminal pJFETs and microwave low-noise npn BJTs. A new ion-implanted 4-terminal structure of JFET having 300 MHz cut-off frequency is designed. The process provides direct contact to a top gate and independent access to the top and bottom gates. Application of p-channel implant makes it possible to optimize the JFET pinch-off voltage without deterioration of bipolar transistor characteristics: f T ≥3 GHz, current gain β≥150, R bb' ≤15-40 Ω. (orig.)

Contact resistance asymmetry of amorphous indium-gallium-zinc-oxide thin-film transistors by scanning Kelvin probe microscopy

Science.gov (United States)

Chen-Fei, Wu; Yun-Feng, Chen; Hai, Lu; Xiao-Ming, Huang; Fang-Fang, Ren; Dun-Jun, Chen; Rong, Zhang; You-Dou, Zheng

2016-05-01

In this work, a method based on scanning Kelvin probe microscopy is proposed to separately extract source/drain (S/D) series resistance in operating amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors. The asymmetry behavior of S/D contact resistance is deduced and the underlying physics is discussed. The present results suggest that the asymmetry of S/D contact resistance is caused by the difference in bias conditions of the Schottky-like junction at the contact interface induced by the parasitic reaction between contact metal and a-IGZO. The overall contact resistance should be determined by both the bulk channel resistance of the contact region and the interface properties of the metal-semiconductor junction. Project supported by the Key Industrial R&D Program of Jiangsu Province, China (Grant No. BE2015155), the Priority Academic Program Development of Higher Education Institutions of Jiangsu Province, China, and the Fundamental Research Funds for the Central Universities, China (Grant No. 021014380033).

Linker-dependent Junction Formation Probability in Single-Molecule Junctions

Energy Technology Data Exchange (ETDEWEB)

Yoo, Pil Sun; Kim, Taekyeong [HankukUniversity of Foreign Studies, Yongin (Korea, Republic of)

2015-01-15

We compare the junction formation probabilities of single-molecule junctions with different linker molecules by using a scanning tunneling microscope-based break-junction technique. We found that the junction formation probability varies as SH > SMe > NH2 for the benzene backbone molecule with different types of anchoring groups, through quantitative statistical analysis. These results are attributed to different bonding forces according to the linker groups formed with Au atoms in the electrodes, which is consistent with previous works. Our work allows a better understanding of the contact chemistry in the metal.molecule junction for future molecular electronic devices.

Power transistor module for high current applications

International Nuclear Information System (INIS)

Cilyo, F.F.

1975-01-01

One of the parts needed for the control system of the 400-GeV accelerator at Fermilab was a power transistor with a safe operating area of 1800A at 50V, dc current gain of 100,000 and 20 kHz bandwidth. Since the commercially available discrete devices and power hybrid packages did not meet these requirements, a power transistor module was developed which performed satisfactorily. By connecting 13 power transistors in parallel, with due consideration for network and heat dissipation problems, and by driving these 13 with another power transistor, a super power transistor is made, having an equivalent current, power, and safe operating area capability of 13 transistors. For higher capabilities, additional modules can be conveniently added. (auth)

Analysing organic transistors based on interface approximation

International Nuclear Information System (INIS)

Akiyama, Yuto; Mori, Takehiko

2014-01-01

Temperature-dependent characteristics of organic transistors are analysed thoroughly using interface approximation. In contrast to amorphous silicon transistors, it is characteristic of organic transistors that the accumulation layer is concentrated on the first monolayer, and it is appropriate to consider interface charge rather than band bending. On the basis of this model, observed characteristics of hexamethylenetetrathiafulvalene (HMTTF) and dibenzotetrathiafulvalene (DBTTF) transistors with various surface treatments are analysed, and the trap distribution is extracted. In turn, starting from a simple exponential distribution, we can reproduce the temperature-dependent transistor characteristics as well as the gate voltage dependence of the activation energy, so we can investigate various aspects of organic transistors self-consistently under the interface approximation. Small deviation from such an ideal transistor operation is discussed assuming the presence of an energetically discrete trap level, which leads to a hump in the transfer characteristics. The contact resistance is estimated by measuring the transfer characteristics up to the linear region

Sub-bandgap photonic base current method for characterization of interface states at heterointerfaces in heterojunction bipolar transistors

International Nuclear Information System (INIS)

Shin, H. T.; Kim, K. H.; Kim, K. S.

2004-01-01

In this paper, we propose a novel photonic base current analysis method to characterize the interface states in heterojunction bipolar transistors (HBTs) by using the photonic I-V characteristics under sub-bandgap photonic excitation. For the photonic current-voltage characterization of HBTs, an optical source with a photon energy less than the bandgap energy of Al 0.3 Ga 0.7 As and GaAs (E ph = 0.95 eV g,AlGaAs = 1.79 eV, E g,GaAs = 1.45 eV) is employed for the characterization of the interface states distributed in the photo-responsive energy band (E C - 0.95 ≤ E it ≤ E C ) in emitter-base heterojunction at HBTs. The proposed novel method, which is applied to bipolar junction transistors for the first time, is simple, and an accurate analysis of interface traps in HBTs is possible. By using the photonic base-current and the dark-base-current, we qualitatively analyze the interface trap at the Al 0.3 Ga 0.7 As/GaAs heterojunction interface in HBTs.

Impact of Process Technologies on ELDRS of Bipolar Transistors

International Nuclear Information System (INIS)

Lu Wu; Ren Diyuan; Guo Qi; Yu Xuefeng; Zheng Yuzhan

2010-01-01

Radiation effects under different dose rates and annealing behaviors of domestic bipolar transistors, with same manufacture technology, were investigated.These transistors include NPN transistors of various emitter area, and LPNP transistors with different doping concentrations in emitter. It is shown that different types of transistors have different radiation responses. The results of NPN transistors show that more degradation occurs at less emitter area. Yet, the results of LPNP transistors demonstrate that transistors with lightly doped emitter are more sensitive to radiation, compared with heavily doped emitter. Finally,the mechanisms of the difference between various radiation responses were analyzed. (authors)

Photosensitive graphene transistors.

Science.gov (United States)

Li, Jinhua; Niu, Liyong; Zheng, Zijian; Yan, Feng

2014-08-20

High performance photodetectors play important roles in the development of innovative technologies in many fields, including medicine, display and imaging, military, optical communication, environment monitoring, security check, scientific research and industrial processing control. Graphene, the most fascinating two-dimensional material, has demonstrated promising applications in various types of photodetectors from terahertz to ultraviolet, due to its ultrahigh carrier mobility and light absorption in broad wavelength range. Graphene field effect transistors are recognized as a type of excellent transducers for photodetection thanks to the inherent amplification function of the transistors, the feasibility of miniaturization and the unique properties of graphene. In this review, we will introduce the applications of graphene transistors as photodetectors in different wavelength ranges including terahertz, infrared, visible, and ultraviolet, focusing on the device design, physics and photosensitive performance. Since the device properties are closely related to the quality of graphene, the devices based on graphene prepared with different methods will be addressed separately with a view to demonstrating more clearly their advantages and shortcomings in practical applications. It is expected that highly sensitive photodetectors based on graphene transistors will find important applications in many emerging areas especially flexible, wearable, printable or transparent electronics and high frequency communications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

InGaP/InGaAsN/GaAs NpN double-heterojunction bipolar transistor

International Nuclear Information System (INIS)

Chang, P. C.; Baca, A. G.; Li, N. Y.; Xie, X. M.; Hou, H. Q.; Armour, E.

2000-01-01

We have demonstrated a functional NpN double-heterojunction bipolar transistor (DHBT) using InGaAsN for the base layer. The InGaP/In 0.03 Ga 0.97 As 0.99 N 0.01 /GaAs DHBT has a low V ON of 0.81 V, which is 0.13 V lower than in a InGaP/GaAs heterojunction bipolar transistor (HBT). The lower turn-on voltage is attributed to the smaller band gap (1.20 eV) of metalorganic chemical vapor deposition-grown In 0.03 Ga 0.97 As 0.99 N 0.01 base layer. GaAs is used for the collector; thus the breakdown voltage (BV CEO ) is 10 V, consistent with the BV CEO of InGaP/GaAs HBTs of comparable collector thickness and doping level. To alleviate the current blocking phenomenon caused by the larger conduction band discontinuity between InGaAsN and GaAs, a graded InGaAs layer with δ doping is inserted at the base-collector junction. The improved device has a peak current gain of seven with ideal current-voltage characteristics. (c) 2000 American Institute of Physics

Gold nanoparticle-pentacene memory-transistors

OpenAIRE

Novembre , Christophe; Guerin , David; Lmimouni , Kamal; Gamrat , Christian; Vuillaume , Dominique

2008-01-01

We demonstrate an organic memory-transistor device based on a pentacene-gold nanoparticles active layer. Gold (Au) nanoparticles are immobilized on the gate dielectric (silicon dioxide) of a pentacene transistor by an amino-terminated self-assembled monolayer. Under the application of writing and erasing pulses on the gate, large threshold voltage shift (22 V) and on/off drain current ratio of ~3E4 are obtained. The hole field-effect mobility of the transistor is similar in the on and off sta...

Vibrationally coupled electron transport through single-molecule junctions

Energy Technology Data Exchange (ETDEWEB)

Haertle, Rainer

2012-04-26

Single-molecule junctions are among the smallest electric circuits. They consist of a molecule that is bound to a left and a right electrode. With such a molecular nanocontact, the flow of electrical currents through a single molecule can be studied and controlled. Experiments on single-molecule junctions show that a single molecule carries electrical currents that can even be in the microampere regime. Thereby, a number of transport phenomena have been observed, such as, for example, diode- or transistor-like behavior, negative differential resistance and conductance switching. An objective of this field, which is commonly referred to as molecular electronics, is to relate these transport phenomena to the properties of the molecule in the contact. To this end, theoretical model calculations are employed, which facilitate an understanding of the underlying transport processes and mechanisms. Thereby, one has to take into account that molecules are flexible structures, which respond to a change of their charge state by a profound reorganization of their geometrical structure or may even dissociate. It is thus important to understand the interrelation between the vibrational degrees of freedom of a singlemolecule junction and the electrical current flowing through the contact. In this thesis, we investigate vibrational effects in electron transport through singlemolecule junctions. For these studies, we calculate and analyze transport characteristics of both generic and first-principles based model systems of a molecular contact. To this end, we employ a master equation and a nonequilibrium Green's function approach. Both methods are suitable to describe this nonequilibrium transport problem and treat the interactions of the tunneling electrons on the molecular bridge non-perturbatively. This is particularly important with respect to the vibrational degrees of freedom, which may strongly interact with the tunneling electrons. We show in detail that the resulting

Fundamentals of semiconductor devices

CERN Document Server

Lindmayer, Joseph

1965-01-01

Semiconductor properties ; semiconductor junctions or diodes ; transistor fundamentals ; inhomogeneous impurity distributions, drift or graded-base transistors ; high-frequency properties of transistors ; band structure of semiconductors ; high current densities and mechanisms of carrier transport ; transistor transient response and recombination processes ; surfaces, field-effect transistors, and composite junctions ; additional semiconductor characteristics ; additional semiconductor devices and microcircuits ; more metal, insulator, and semiconductor combinations for devices ; four-pole parameters and configuration rotation ; four-poles of combined networks and devices ; equivalent circuits ; the error function and its properties ; Fermi-Dirac statistics ; useful physical constants.

Study of the degradation of the breakdown voltage of a super-junction power MOSFET due to charge imbalance

International Nuclear Information System (INIS)

Kondekar, Pravin N.; Oh, Hwan-Sool; Kim, Young-Beom

2006-01-01

In this research, we analytically designed a super-junction (SJ) structure and used a simulation tool to study its off-state charge imbalance behavior. In the case of a SJ MOSFET (CoolMOS TM ), designed for the lowest specific on- resistance R on , the MOS part of the transistor (channel region) affected the symmetry, creating a charge imbalance; in addition to this, the imbalance in the SJ drift layer, which was inherently due to limitations in the fabrication process was simulated by varying the doping density of the pillars up to 10 %. The underlying physical mechanisms responsible for the reduction of the breakdown voltage (BV) were investigated in detail by using the electric field profiles and potential contours. The effect of varying the junction depth of a p-body/well and the cell pitch on the breakdown voltage was also analyzed. The trade off between BV sensitivity and specific R on was also investigated.

Reconfigurable Complementary Logic Circuits with Ambipolar Organic Transistors.

Science.gov (United States)

Yoo, Hocheon; Ghittorelli, Matteo; Smits, Edsger C P; Gelinck, Gerwin H; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

2016-10-20

Ambipolar organic electronics offer great potential for simple and low-cost fabrication of complementary logic circuits on large-area and mechanically flexible substrates. Ambipolar transistors are ideal candidates for the simple and low-cost development of complementary logic circuits since they can operate as n-type and p-type transistors. Nevertheless, the experimental demonstration of ambipolar organic complementary circuits is limited to inverters. The control of the transistor polarity is crucial for proper circuit operation. Novel gating techniques enable to control the transistor polarity but result in dramatically reduced performances. Here we show high-performance non-planar ambipolar organic transistors with electrical control of the polarity and orders of magnitude higher performances with respect to state-of-art split-gate ambipolar transistors. Electrically reconfigurable complementary logic gates based on ambipolar organic transistors are experimentally demonstrated, thus opening up new opportunities for ambipolar organic complementary electronics.

Ultra-high gain diffusion-driven organic transistor

Science.gov (United States)

Torricelli, Fabrizio; Colalongo, Luigi; Raiteri, Daniele; Kovács-Vajna, Zsolt Miklós; Cantatore, Eugenio

2016-01-01

Emerging large-area technologies based on organic transistors are enabling the fabrication of low-cost flexible circuits, smart sensors and biomedical devices. High-gain transistors are essential for the development of large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show a new organic field-effect transistor architecture with a gain larger than 700. This is the highest gain ever reported for organic field-effect transistors. In the proposed organic field-effect transistor, the charge injection and extraction at the metal–semiconductor contacts are driven by the charge diffusion. The ideal conditions of ohmic contacts with negligible contact resistance and flat current saturation are demonstrated. The approach is general and can be extended to any thin-film technology opening unprecedented opportunities for the development of high-performance flexible electronics. PMID:26829567

High-Performance Vertical Organic Electrochemical Transistors.

Science.gov (United States)

Donahue, Mary J; Williamson, Adam; Strakosas, Xenofon; Friedlein, Jacob T; McLeod, Robert R; Gleskova, Helena; Malliaras, George G

2018-02-01

Organic electrochemical transistors (OECTs) are promising transducers for biointerfacing due to their high transconductance, biocompatibility, and availability in a variety of form factors. Most OECTs reported to date, however, utilize rather large channels, limiting the transistor performance and resulting in a low transistor density. This is typically a consequence of limitations associated with traditional fabrication methods and with 2D substrates. Here, the fabrication and characterization of OECTs with vertically stacked contacts, which overcome these limitations, is reported. The resulting vertical transistors exhibit a reduced footprint, increased intrinsic transconductance of up to 57 mS, and a geometry-normalized transconductance of 814 S m -1 . The fabrication process is straightforward and compatible with sensitive organic materials, and allows exceptional control over the transistor channel length. This novel 3D fabrication method is particularly suited for applications where high density is needed, such as in implantable devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Single-electron transistors fabricated with sidewall spacer patterning

Science.gov (United States)

Park, Byung-Gook; Kim, Dae Hwan; Kim, Kyung Rok; Song, Ki-Whan; Lee, Jong Duk

2003-09-01

We have implemented a sidewall spacer patterning method for novel dual-gate single-electron transistor (DGSET) and metal-oxide-semiconductor-based SET (MOSET) based on the uniform SOI wire, using conventional lithography and processing technology. A 30 nm wide silicon quantum wire is defined by a sidewall spacer patterning method, and depletion gates for two tunnel junctions of the DGSET are formed by the doped polycrystalline silicon sidewall. The fabricated DGSET and MOSET show clear single-electron tunneling phenomena at liquid nitrogen temperature and insensitivity of the Coulomb oscillation period to gate bias conditions. On the basis of the phase control capability of the sidewall depletion gates, we have proposed a complementary self-biasing method, which enables the SET/CMOS hybrid multi-valued logic (MVL) to operate perfectly well at high temperature, where the peak-to-valley current ratio of Coulomb oscillation severely decreases. The suggested scheme is evaluated by SPICE simulation with an analytical DGSET model, and it is confirmed that even DGSETs with a large Si island can be utilized efficiently in the multi-valued logic.

High transconductance organic electrochemical transistors

Science.gov (United States)

Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

2013-07-01

The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications.

High transconductance organic electrochemical transistors

Science.gov (United States)

Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

2013-01-01

The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications. PMID:23851620

Recent progress in photoactive organic field-effect transistors.

Science.gov (United States)

Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

2014-04-01

Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

Recent progress in photoactive organic field-effect transistors

International Nuclear Information System (INIS)

Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

2014-01-01

Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts. (review)

Programmable automated transistor test system

International Nuclear Information System (INIS)

Truong, L.V.; Sundberg, G.R.

1986-01-01

The paper describes a programmable automated transistor test system (PATTS) and its utilization to evaluate bipolar transistors and Darlingtons, and such MOSFET and special types as can be accommodated with the PATTS base-drive. An application of a pulsed power technique at low duty cycles in a non-destructive test is used to examine the dynamic switching characteristic curves of power transistors. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software. In addition a library of test data is established on disks, tapes, and hard copies for future reference

Experimental synchronization of chaos in a large ring of mutually coupled single-transistor oscillators: Phase, amplitude, and clustering effects

Energy Technology Data Exchange (ETDEWEB)

Minati, Ludovico, E-mail: lminati@ieee.org, E-mail: ludovico.minati@unitn.it [MR-Lab, Center for Mind/Brain Science, University of Trento, Italy and Scientific Department, Fondazione IRCCS Istituto Neurologico Carlo Besta, Milan (Italy)

2014-12-01

In this paper, experimental evidence of multiple synchronization phenomena in a large (n = 30) ring of chaotic oscillators is presented. Each node consists of an elementary circuit, generating spikes of irregular amplitude and comprising one bipolar junction transistor, one capacitor, two inductors, and one biasing resistor. The nodes are mutually coupled to their neighbours via additional variable resistors. As coupling resistance is decreased, phase synchronization followed by complete synchronization is observed, and onset of synchronization is associated with partial synchronization, i.e., emergence of communities (clusters). While component tolerances affect community structure, the general synchronization properties are maintained across three prototypes and in numerical simulations. The clusters are destroyed by adding long distance connections with distant notes, but are otherwise relatively stable with respect to structural connectivity changes. The study provides evidence that several fundamental synchronization phenomena can be reliably observed in a network of elementary single-transistor oscillators, demonstrating their generative potential and opening way to potential applications of this undemanding setup in experimental modelling of the relationship between network structure, synchronization, and dynamical properties.

Experimental synchronization of chaos in a large ring of mutually coupled single-transistor oscillators: Phase, amplitude, and clustering effects

International Nuclear Information System (INIS)

Minati, Ludovico

2014-01-01

In this paper, experimental evidence of multiple synchronization phenomena in a large (n = 30) ring of chaotic oscillators is presented. Each node consists of an elementary circuit, generating spikes of irregular amplitude and comprising one bipolar junction transistor, one capacitor, two inductors, and one biasing resistor. The nodes are mutually coupled to their neighbours via additional variable resistors. As coupling resistance is decreased, phase synchronization followed by complete synchronization is observed, and onset of synchronization is associated with partial synchronization, i.e., emergence of communities (clusters). While component tolerances affect community structure, the general synchronization properties are maintained across three prototypes and in numerical simulations. The clusters are destroyed by adding long distance connections with distant notes, but are otherwise relatively stable with respect to structural connectivity changes. The study provides evidence that several fundamental synchronization phenomena can be reliably observed in a network of elementary single-transistor oscillators, demonstrating their generative potential and opening way to potential applications of this undemanding setup in experimental modelling of the relationship between network structure, synchronization, and dynamical properties

Gap Junctions

Science.gov (United States)

Nielsen, Morten Schak; Axelsen, Lene Nygaard; Sorgen, Paul L.; Verma, Vandana; Delmar, Mario; Holstein-Rathlou, Niels-Henrik

2013-01-01

Gap junctions are essential to the function of multicellular animals, which require a high degree of coordination between cells. In vertebrates, gap junctions comprise connexins and currently 21 connexins are known in humans. The functions of gap junctions are highly diverse and include exchange of metabolites and electrical signals between cells, as well as functions, which are apparently unrelated to intercellular communication. Given the diversity of gap junction physiology, regulation of gap junction activity is complex. The structure of the various connexins is known to some extent; and structural rearrangements and intramolecular interactions are important for regulation of channel function. Intercellular coupling is further regulated by the number and activity of channels present in gap junctional plaques. The number of connexins in cell-cell channels is regulated by controlling transcription, translation, trafficking, and degradation; and all of these processes are under strict control. Once in the membrane, channel activity is determined by the conductive properties of the connexin involved, which can be regulated by voltage and chemical gating, as well as a large number of posttranslational modifications. The aim of the present article is to review our current knowledge on the structure, regulation, function, and pharmacology of gap junctions. This will be supported by examples of how different connexins and their regulation act in concert to achieve appropriate physiological control, and how disturbances of connexin function can lead to disease. © 2012 American Physiological Society. Compr Physiol 2:1981-2035, 2012. PMID:23723031

Universal power transistor base drive control unit

Science.gov (United States)

Gale, Allan R.; Gritter, David J.

1988-01-01

A saturation condition regulator system for a power transistor which achieves the regulation objectives of a Baker clamp but without dumping excess base drive current into the transistor output circuit. The base drive current of the transistor is sensed and used through an active feedback circuit to produce an error signal which modulates the base drive current through a linearly operating FET. The collector base voltage of the power transistor is independently monitored to develop a second error signal which is also used to regulate base drive current. The current-sensitive circuit operates as a limiter. In addition, a fail-safe timing circuit is disclosed which automatically resets to a turn OFF condition in the event the transistor does not turn ON within a predetermined time after the input signal transition.

Strain-enhanced tunneling magnetoresistance in MgO magnetic tunnel junctions.

Science.gov (United States)

Loong, Li Ming; Qiu, Xuepeng; Neo, Zhi Peng; Deorani, Praveen; Wu, Yang; Bhatia, Charanjit S; Saeys, Mark; Yang, Hyunsoo

2014-09-30

While the effects of lattice mismatch-induced strain, mechanical strain, as well as the intrinsic strain of thin films are sometimes detrimental, resulting in mechanical deformation and failure, strain can also be usefully harnessed for applications such as data storage, transistors, solar cells, and strain gauges, among other things. Here, we demonstrate that quantum transport across magnetic tunnel junctions (MTJs) can be significantly affected by the introduction of controllable mechanical strain, achieving an enhancement factor of ~2 in the experimental tunneling magnetoresistance (TMR) ratio. We further correlate this strain-enhanced TMR with coherent spin tunneling through the MgO barrier. Moreover, the strain-enhanced TMR is analyzed using non-equilibrium Green's function (NEGF) quantum transport calculations. Our results help elucidate the TMR mechanism at the atomic level and can provide a new way to enhance, as well as tune, the quantum properties in nanoscale materials and devices.

Low-background transistors for application in nuclear electronics

International Nuclear Information System (INIS)

Krasnokutskij, R.N.; Kurchaninov, L.L.; Fedyakin, N.N.; Shuvalov, R.S.

1988-01-01

Investigations of silicon transistors were carried out to determine transistors with low value of base distributed resistance (R). Measurement results for R and current amplification coefficient β are presented for bipolar transistor several types. Correlations between R and β were studied. KT 399A, 2T640A and KT3117B transistors are found to be most adequate ones as a base for low-background amplifier development

Planar-Processed Polymer Transistors.

Science.gov (United States)

Xu, Yong; Sun, Huabin; Shin, Eul-Yong; Lin, Yen-Fu; Li, Wenwu; Noh, Yong-Young

2016-10-01

Planar-processed polymer transistors are proposed where the effective charge injection and the split unipolar charge transport are all on the top surface of the polymer film, showing ideal device characteristics with unparalleled performance. This technique provides a great solution to the problem of fabrication limitations, the ambiguous operating principle, and the performance improvements in practical applications of conjugated-polymer transistors. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A simplified boron diffusion for preparing the silicon single crystal p-n junction as an educational device

Energy Technology Data Exchange (ETDEWEB)

Shiota, Koki, E-mail: a14510@sr.kagawa-nct.ac.jp; Kai, Kazuho; Nagaoka, Shiro, E-mail: nagaoka@es.kagawa-nct.ac.jp [National Institute of Technology, Kagawa College, Kagawa, Mitoyo, Takuma, Koda 551 (Japan); Tsuji, Takuto [National Institute of Technology, Suzuka College, Mie, Suzuka, Shiroko (Japan); Wakahara, Akihiro [Toyohashi University of Technology, Aichi, Toyohashi, Tenpaku, Hibarigaoka 1-1 (Japan); Rusop, Mohamad [University Technology Mara, Selangor, Shah Alam, 40450 (Malaysia)

2016-07-06

The educational method which is including designing, making, and evaluating actual semiconductor devices with learning the theory is one of the best way to obtain the fundamental understanding of the device physics and to cultivate the ability to make unique ideas using the knowledge in the semiconductor device. In this paper, the simplified Boron thermal diffusion process using Sol-Gel material under normal air environment was proposed based on simple hypothesis and the feasibility of the reproducibility and reliability were investigated to simplify the diffusion process for making the educational devices, such as p-n junction, bipolar and pMOS devices. As the result, this method was successfully achieved making p+ region on the surface of the n-type silicon substrates with good reproducibility. And good rectification property of the p-n junctions was obtained successfully. This result indicates that there is a possibility to apply on the process making pMOS or bipolar transistors. It suggests that there is a variety of the possibility of the applications in the educational field to foster an imagination of new devices.

Basic matrix algebra and transistor circuits

CERN Document Server

Zelinger, G

1963-01-01

Basic Matrix Algebra and Transistor Circuits deals with mastering the techniques of matrix algebra for application in transistors. This book attempts to unify fundamental subjects, such as matrix algebra, four-terminal network theory, transistor equivalent circuits, and pertinent design matters. Part I of this book focuses on basic matrix algebra of four-terminal networks, with descriptions of the different systems of matrices. This part also discusses both simple and complex network configurations and their associated transmission. This discussion is followed by the alternative methods of de

Four-junction superconducting circuit

Science.gov (United States)

Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J. Q.

2016-01-01

We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit. PMID:27356619

Contribution to the study of fluctuations in transistors (bipolar and junction field effect types); Contribution a l'etude des fluctuations dans les transistors (bipolaires et a effet champ a jonctions)

Energy Technology Data Exchange (ETDEWEB)

Borel, J [Commissariat a l' Energie Atomique, Grenoble (France). Centre d' Etudes Nucleaires

1970-07-01

A brief review of the basic theory of fluctuations in semiconductors is given: shot, thermal low frequency noise. A measuring set has been built to draw noise spectrums (current or voltage). Noise parameters of bipolar transistors are given, mainly noise voltage. Noise current, noise factor and correlation between noise sources are also calculated. Measurements of noise parameters fit well with theory for various devices made in different technologies: alloyed, mesa, planar. Then we give results of the calculation of noise parameters in a FET starting from a simplified model of the device. Low frequency noise is taken into account. Measurements of the parameters and of the spectrum agree fairly well with the theory. Studies of low frequency noise versus temperature give the density and energy of traps located in the space charge layers and an idea of the impurity encountered in these space charge layers. [French] On rappelle les notions de base de la theorie des fluctuations dans les semiconducteurs: bruit de grenaille, bruit thermique, bruit basse frequence. Un appareillage mis au point pour tracer un spectre de bruit est decrit. On presente ensuite le calcul des parametres de bruit d'un transistor bipolaire en insistant plus particulierement sur la tension de bruit ramenee a l'entree de l'element. Le courant de bruit, le facteur de bruit et la correlation entre les sources de bruit sont calcules. La mesure des parametres de bruit est faite sur divers elements realises dans diverses technologies: alliee, mesa et plane. Les mesures confirment tres bien la theorie. On presente ensuite le calcul des parametres de bruit d'un transistor a effet de champ en definissant un schema equivalent simple de l'element. Le calcul theorique des fluctuations basse frequence est aussi fait. La mesure du spectre de bruit confirme tres bien les calculs theoriques. L'etude du bruit basse frequence en fonction de la temperature permet de remonter a la densite et a l'energie des pieges

Graphene-based flexible and stretchable thin film transistors.

Science.gov (United States)

Yan, Chao; Cho, Jeong Ho; Ahn, Jong-Hyun

2012-08-21

Graphene has been attracting wide attention owing to its superb electronic, thermal and mechanical properties. These properties allow great applications in the next generation of optoelectronics, where flexibility and stretchability are essential. In this context, the recent development of graphene growth/transfer and its applications in field-effect transistors are involved. In particular, we provide a detailed review on the state-of-the-art of graphene-based flexible and stretchable thin film transistors. We address the principles of fabricating high-speed graphene analog transistors and the key issues of producing an array of graphene-based transistors on flexible and stretchable substrates. It provides a platform for future work to focus on understanding and realizing high-performance graphene-based transistors.

The Bipolar Field-Effect Transistor: XIII. Physical Realizations of the Transistor and Circuits (One-Two-MOS-Gates on Thin-Thick Pure-Impure Base)

International Nuclear Information System (INIS)

Sah, C.-T.; Jie Binbin

2009-01-01

This paper reports the physical realization of the Bipolar Field-Effect Transistor (BiFET) and its one-transistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pure and impure base, with electron and hole contacts, and the corresponding theoretical current-voltage characteristics previously computed by us, without generation-recombination-trapping-tunneling of electrons and holes. These examples include the one-MOS-gate on semi-infinite thick impure base transistor (the bulk transistor) and the impurethin-base Silicon-on-Insulator (SOI) transistor and the two-MOS-gates on thin base transistors (the FinFET and the Thin Film Transistor TFT). Figures are given with the cross-section views containing the electron and hole concentration and current density distributions and trajectories and the corresponding DC current-voltage characteristics.

Physical characterization of amorphous In-Ga-Zn-O thin-film transistors with direct-contact asymmetric graphene electrode

Directory of Open Access Journals (Sweden)

Jaewook Jeong

2014-09-01

Full Text Available High performance a-IGZO thin-film transistors (TFTs are fabricated using an asymmetric graphene drain electrode structure. A-IGZO TFTs (channel length = 3 μm were successfully demonstrated with a saturation field-effect mobility of 6.6 cm2/Vs without additional processes between the graphene and a-IGZO layer. The graphene/a-IGZO junction exhibits Schottky characteristics and the contact property is affected not only by the Schottky barrier but also by the parasitic resistance from the depletion region under the graphene electrode. Therefore, to utilize the graphene layer as S/D electrodes for a-IGZO TFTs, an asymmetric electrode is essential, which can be easily applied to the conventional pixel electrode structure.

Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

International Nuclear Information System (INIS)

Spathis, C.; Birbas, A.; Georgakopoulou, K.

2015-01-01

Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices

Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Spathis, C., E-mail: cspathis@ece.upatras.gr; Birbas, A.; Georgakopoulou, K. [Department of Electrical and Computer Engineering, University of Patras, Patras 26500 (Greece)

2015-08-15

Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

Ultrasmall transistor-based light sources

DEFF Research Database (Denmark)

With Jensen, Per Baunegaard; Tavares, Luciana; Kjelstrup-Hansen, Jakob

Dette projekt fokuserer på at udvikle transistor baserede nanofiber lyskilder med det overordnede mål at udvikle effektive og nano skalerede flerfarvede lyskilder integreret on-chip.......Dette projekt fokuserer på at udvikle transistor baserede nanofiber lyskilder med det overordnede mål at udvikle effektive og nano skalerede flerfarvede lyskilder integreret on-chip....

Contribution to the study of the behaviour of silicon planar transistors exposed to the 60Co γ rays

International Nuclear Information System (INIS)

Le Ber, J.

1967-05-01

This report gives an account of studies carried out on bipolar silicon planar transistors irradiated by 60 Co γ rays. The author describes the interactions on the matter of the different types of particles and he gives a brief bibliographical recall of foreign studies. The technological structure of the planar transistors is then described in order to help the understanding of the phenomena, general comments are made about the choice of measured parameters and on the statistical interpretation of results. An automatic instrument for the measurement of the gain is described and the reproducibility of the results is stated The complexity of the problem and the difficulty to predict the behaviour of the semiconductors components are clearly shown. It is stated that the observed dispersions depend on: - the electrical bias during irradiation - the injection level in the emitter-base junction during the measurement - the manufacturer for a given type - the instantaneous dose rate - the geometry used The problem is then examined from the reliability point of view and methods are given to evaluate the reliability for a given dose - 'Worst case' method - moment method - Monte Carlo method. (author) [fr

Molecular materials for organic field-effect transistors

International Nuclear Information System (INIS)

Mori, T

2008-01-01

Organic field-effect transistors are important applications of thin films of molecular materials. A variety of materials have been explored for improving the performance of organic transistors. The materials are conventionally classified as p-channel and n-channel, but not only the performance but also even the carrier polarity is greatly dependent on the combinations of organic semiconductors and electrode materials. In this review, particular emphasis is laid on multi-sulfur compounds such as tetrathiafulvalenes and metal dithiolates. These compounds are components of highly conducting materials such as organic superconductors, but are also used in organic transistors. The charge-transfer complexes are used in organic transistors as active layers as well as electrodes. (topical review)

Multiple-channel detection of cellular activities by ion-sensitive transistors

Science.gov (United States)

Machida, Satoru; Shimada, Hideto; Motoyama, Yumi

2018-04-01

An ion-sensitive field-effect transistor to record cellular activities was demonstrated. This field-effect transistor (bio transistor) includes cultured cells on the gate insulator instead of gate electrode. The bio transistor converts a change in potential underneath the cells into variation of the drain current when ion channels open. The bio transistor has high detection sensitivity to even minute variations in potential utilizing a subthreshold swing region. To open ion channels, a reagent solution (acetylcholine) was added to a human-originating cell cultured on the bio transistor. The drain current was successfully decreased with the addition of acetylcholine. Moreover, we attempted to detect the opening of ion channels using a multiple-channel measurement circuit containing several bio transistors. As a consequence, the drain current distinctly decreased only after the addition of acetylcholine. We confirmed that this measurement system including bio transistors enables to observation of cellular activities sensitively and simultaneously.

Pulse generator circuit triggerable by nuclear radiation

International Nuclear Information System (INIS)

Fredrickson, P.B.

1980-01-01

A pulse generator circuit triggerable by a pulse of nuclear radiation is described. The pulse generator circuit includes a pair of transistors arranged, together with other electrical components, in the topology of a standard monostable multivibrator circuit. The circuit differs most significantly from a standard monostable multivibrator circuit in that the circuit is adapted to be triggered by a pulse of nuclear radiation rather than electrically and the transistors have substantially different sensitivities to radiation, due to different physical and electrical characteristics and parameters. One of the transistors is employed principally as a radiation detector and is in a normally non-conducting state and the other transistor is normally in a conducting state. When the circuit is exposed to a pulse of nuclear radiation, currents are induced in the collector-base junctions of both transistors but, due to the different radiation sensitivities of the transistors, the current induced in the collector-base junction of the radiation-detecting transistor is substantially greater than that induced in the collector-base junction of the other transistor. The pulse of radiation causes the radiation-detecting transistor to operate in its conducting state, causing the other transistor to operate in its non-conducting state. As the radiation-detecting transistor operates in its conducting state, an output signal is produced at an output terminal connected to the radiation-detecting transistor indicating the presence of a predetermined intensity of nuclear radiation

Base profile design for high-performance operation of bipolar transistors at liquid-nitrogen temperature

International Nuclear Information System (INIS)

Stork, J.M.C.; Harame, D.L.; Meyerson, B.S.; Nguyen, T.N.

1989-01-01

The base profile requirements of Si bipolar junction transistors (BJT's) high-performance operation at liquid-nitrogen temperature are examined. Measurements of thin epitaxial-base polysilicon-emitter n-p-n transistors with increasing base doping show the effects of bandgap narrowing, mobility changes, and carrier freezeout. At room temperature the collector current at low injection is proportional to the integrated base charge, independent of the impurity distribution. At temperatures below 150 Κ, however, minority injection is dominated by the peak base doping because of the greater effectiveness of bandgap narrowing. When the peak doping in the base approaches 10 19 cm -3 , the bandgap difference between emitter and base is sufficiently small that the current gain no longer monotonically decreases with lower temperature but instead shows a maximum as low as 180 Κ. The device design window appears limited at the low-current end by increased base-emitter leakage due to tunneling and by resistance control at the high-current end. Using the measured dc characteristics, circuit delay calculations are made to estimate the performance of an ECL ring oscillator at room and liquid-nitrogen temperatures. It is shown that if the base doping can be raised to 10 19 cm -3 while keeping the base thickness constant, the minimum delay at liquid nitrogen can approach the delay of optimized devices at room temperature

Photon-gated spin transistor

OpenAIRE

Li, Fan; Song, Cheng; Cui, Bin; Peng, Jingjing; Gu, Youdi; Wang, Guangyue; Pan, Feng

2017-01-01

Spin-polarized field-effect transistor (spin-FET), where a dielectric layer is generally employed for the electrical gating as the traditional FET, stands out as a seminal spintronic device under the miniaturization trend of electronics. It would be fundamentally transformative if optical gating was used for spin-FET. We report a new type of spin-polarized field-effect transistor (spin-FET) with optical gating, which is fabricated by partial exposure of the (La,Sr)MnO3 channel to light-emitti...

Organic Thin-Film Transistor (OTFT-Based Sensors

Directory of Open Access Journals (Sweden)

Daniel Elkington

2014-04-01

Full Text Available Organic thin film transistors have been a popular research topic in recent decades and have found applications from flexible displays to disposable sensors. In this review, we present an overview of some notable articles reporting sensing applications for organic transistors with a focus on the most recent publications. In particular, we concentrate on three main types of organic transistor-based sensors: biosensors, pressure sensors and “e-nose”/vapour sensors.

Direct coupled amplifiers using field effect transistors

Energy Technology Data Exchange (ETDEWEB)

Fowler, E P [Control and Instrumentation Division, Atomic Energy Establishment, Winfrith, Dorchester, Dorset (United Kingdom)

1964-03-15

very different characteristics can still be used or whether selection is necessary or desirable. The results recorded here suggest that either course can be followed or more attractively a combination of the two. It is evident that the characteristics of the P.E.T. are amenable to simple calculation to a far greater extent than is the case with the duo-junction transistor.

Ballistic Graphene Josephson Junctions from the Short to the Long Junction Regimes.

Science.gov (United States)

Borzenets, I V; Amet, F; Ke, C T; Draelos, A W; Wei, M T; Seredinski, A; Watanabe, K; Taniguchi, T; Bomze, Y; Yamamoto, M; Tarucha, S; Finkelstein, G

2016-12-02

We investigate the critical current I_{C} of ballistic Josephson junctions made of encapsulated graphene-boron-nitride heterostructures. We observe a crossover from the short to the long junction regimes as the length of the device increases. In long ballistic junctions, I_{C} is found to scale as ∝exp(-k_{B}T/δE). The extracted energies δE are independent of the carrier density and proportional to the level spacing of the ballistic cavity. As T→0 the critical current of a long (or short) junction saturates at a level determined by the product of δE (or Δ) and the number of the junction's transversal modes.

Doped organic transistors operating in the inversion and depletion regime

Science.gov (United States)

Lüssem, Björn; Tietze, Max L.; Kleemann, Hans; Hoßbach, Christoph; Bartha, Johann W.; Zakhidov, Alexander; Leo, Karl

2013-01-01

The inversion field-effect transistor is the basic device of modern microelectronics and is nowadays used more than a billion times on every state-of-the-art computer chip. In the future, this rigid technology will be complemented by flexible electronics produced at extremely low cost. Organic field-effect transistors have the potential to be the basic device for flexible electronics, but still need much improvement. In particular, despite more than 20 years of research, organic inversion mode transistors have not been reported so far. Here we discuss the first realization of organic inversion transistors and the optimization of organic depletion transistors by our organic doping technology. We show that the transistor parameters—in particular, the threshold voltage and the ON/OFF ratio—can be controlled by the doping concentration and the thickness of the transistor channel. Injection of minority carriers into the doped transistor channel is achieved by doped contacts, which allows forming an inversion layer. PMID:24225722

Equivalent Josephson junctions

International Nuclear Information System (INIS)

Boyadzhiev, T.L.; ); Semerdzhieva, E.G.; Shukrinov, Yu.M.; Fiziko-Tekhnicheskij Inst., Dushanbe

2008-01-01

The magnetic field dependences of critical current are numerically constructed for a long Josephson junction with a shunt- or resistor-type microscopic inhomogeneities and compared to the critical curve of a junction with exponentially varying width. The numerical results show that it is possible to replace the distributed inhomogeneity of a long Josephson junction by an inhomogeneity localized at one of its ends, which has certain technological advantages. It is also shown that the critical curves of junctions with exponentially varying width and inhomogeneities localized at the ends are unaffected by the mixed fluxon-antifluxon distributions of the magnetic flux [ru

A Simple Method for Decreasing the Liquid Junction Potential in a Flow-through-Type Differential pH Sensor Probe Consisting of pH-FETs by Exerting Spatiotemporal Control of the Liquid Junction

Science.gov (United States)

Yamada, Akira; Mohri, Satoshi; Nakamura, Michihiro; Naruse, Keiji

2015-01-01

The liquid junction potential (LJP), the phenomenon that occurs when two electrolyte solutions of different composition come into contact, prevents accurate measurements in potentiometry. The effect of the LJP is usually remarkable in measurements of diluted solutions with low buffering capacities or low ion concentrations. Our group has constructed a simple method to eliminate the LJP by exerting spatiotemporal control of a liquid junction (LJ) formed between two solutions, a sample solution and a baseline solution (BLS), in a flow-through-type differential pH sensor probe. The method was contrived based on microfluidics. The sensor probe is a differential measurement system composed of two ion-sensitive field-effect transistors (ISFETs) and one Ag/AgCl electrode. With our new method, the border region of the sample solution and BLS is vibrated in order to mix solutions and suppress the overshoot after the sample solution is suctioned into the sensor probe. Compared to the conventional method without vibration, our method shortened the settling time from over two min to 15 s and reduced the measurement error by 86% to within 0.060 pH. This new method will be useful for improving the response characteristics and decreasing the measurement error of many apparatuses that use LJs. PMID:25835300

Implementation of Self-Bias Transistor on Voting Logic

International Nuclear Information System (INIS)

Harzawardi Hasim; Syirrazie Che Soh

2014-01-01

Study in the eld of digital integrated circuit (IC) already become common to the modern industrial. Day by day we have been introduced with new gadget that was developed based on transistor. This paper will study the implementation of self-bias transistor on voting logic. The self-bias transistor will connected both on pull-up network and pull-down network. On previous research, study on comparison of total number of transistors, time propagation delay, and frequency between NAND and NOR gate of voting logic. It's show, with the same number of transistor, NAND gate achieve high frequency and low time propagation delay compare to NOR gate. We extend this analysis by comparing the total number of transistor, time propagation delay, frequency and power dissipation between common NAND gate with self-bias NAND gate. Extensive LTSpice simulations were performed using IBM 90 nm CMOS(Complementary Metal Oxide Semiconductor) process technology. The result show self-bias voting NAND gate consumes 54 % less power dissipation, 43% slow frequency and 43 % high time propagation delay compare to common voting NAND gate. (author)

3D NANOTUBE FIELD EFFECT TRANSISTORS FOR HYBRID HIGH-PERFORMANCE AND LOW-POWER OPERATION WITH HIGH CHIP-AREA EFFICIENCY

KAUST Repository

Fahad, Hossain M.

2014-03-01

scaling on silicon, the amount of current generated per device has to be increased while keeping short channel effects and off-state leakage at bay. The objective of this doctoral thesis is the investigation of an innovative vertical silicon based architecture called the silicon nanotube field effect transistor (Si NTFET). This topology incorporates a dual inner/outer core/shell gate stack strategy to control the volume inversion properties in a hollow silicon 1D quasi-nanotube under a tight electrostatic configuration. Together with vertically aligned source and drain, the Si NTFET is capable of very high on-state performance (drive current) in an area-efficient configuration as opposed to arrays of gate-all-around nanowires, while maintaining leakage characteristics similar to a single nanowire. Such a device architecture offsets the need of device arraying that is needed with fin and nanowire architectures. Extensive simulations are used to validate the potential benefits of Si NTFETs over GAA NWFETs on a variety of platforms such as conventional MOSFETs, tunnel FETs, junction-less FETs. This thesis demonstrates a novel CMOS compatible process flow to fabricate vertical nanotube transistors that offer a variety of advantages such as lithography-independent gate length definition, integration of epitaxially grown silicon nanotubes with spacer based gate dielectrics and abrupt in-situ doped source/drain junctions. Experimental measurement data will showcase the various materials and processing challenges in fabricating these devices. Finally, an extension of this work to topologically transformed wavy channel FinFETs is also demonstrated keeping in line with the theme of area efficient high-performance electronics.

Junction and circuit fabrication

International Nuclear Information System (INIS)

Jackel, L.D.

1980-01-01

Great strides have been made in Josephson junction fabrication in the four years since the first IC SQUID meeting. Advances in lithography have allowed the production of devices with planar dimensions as small as a few hundred angstroms. Improved technology has provided ultra-high sensitivity SQUIDS, high-efficiency low-noise mixers, and complex integrated circuits. This review highlights some of the new fabrication procedures. The review consists of three parts. Part 1 is a short summary of the requirements on junctions for various applications. Part 2 reviews intergrated circuit fabrication, including tunnel junction logic circuits made at IBM and Bell Labs, and microbridge radiation sources made at SUNY at Stony Brook. Part 3 describes new junction fabrication techniques, the major emphasis of this review. This part includes a discussion of small oxide-barrier tunnel junctions, semiconductor barrier junctions, and microbridge junctions. Part 3 concludes by considering very fine lithography and limitations to miniaturization. (orig.)

CMOS-based carbon nanotube pass-transistor logic integrated circuits

Science.gov (United States)

Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

2012-01-01

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

Efficient simulation of power MOS transistors

NARCIS (Netherlands)

Ugryumova, M.; Schilders, W.H.A.

2011-01-01

In this report we present a few industrial problems related to modeling of MOS transistors. We suggest an efficient algorithm for computing output current at the top ports of power MOS transistors for given voltage excitations. The suggested algorithm exploits the connection between the resistor and

Thermal transistor utilizing gas-liquid transition

KAUST Repository

Komatsu, Teruhisa S.

2011-01-25

We propose a simple thermal transistor, a device to control heat current. In order to effectively change the current, we utilize the gas-liquid transition of the heat-conducting medium (fluid) because the gas region can act as a good thermal insulator. The three terminals of the transistor are located at both ends and the center of the system, and are put into contact with distinct heat baths. The key idea is a special arrangement of the three terminals. The temperature at one end (the gate temperature) is used as an input signal to control the heat current between the center (source, hot) and another end (drain, cold). Simulating the nanoscale systems of this transistor, control of heat current is demonstrated. The heat current is effectively cut off when the gate temperature is cold and it flows normally when it is hot. By using an extended version of this transistor, we also simulate a primitive application for an inverter. © 2011 American Physical Society.

Water-gel for gating graphene transistors.

Science.gov (United States)

Kim, Beom Joon; Um, Soong Ho; Song, Woo Chul; Kim, Yong Ho; Kang, Moon Sung; Cho, Jeong Ho

2014-05-14

Water, the primary electrolyte in biology, attracts significant interest as an electrolyte-type dielectric material for transistors compatible with biological systems. Unfortunately, the fluidic nature and low ionic conductivity of water prevents its practical usage in such applications. Here, we describe the development of a solid state, megahertz-operating, water-based gate dielectric system for operating graphene transistors. The new electrolyte systems were prepared by dissolving metal-substituted DNA polyelectrolytes into water. The addition of these biocompatible polyelectrolytes induced hydrogelation to provide solid-state integrity to the system. They also enhanced the ionic conductivities of the electrolytes, which in turn led to the quick formation of an electric double layer at the graphene/electrolyte interface that is beneficial for modulating currents in graphene transistors at high frequencies. At the optimized conditions, the Na-DNA water-gel-gated flexible transistors and inverters were operated at frequencies above 1 MHz and 100 kHz, respectively.

Electronic technology

International Nuclear Information System (INIS)

Kim, Jin Su

2010-07-01

This book is composed of five chapters, which introduces electronic technology about understanding of electronic, electronic component, radio, electronic application, communication technology, semiconductor on its basic, free electron and hole, intrinsic semiconductor and semiconductor element, Diode such as PN junction diode, characteristic of junction diode, rectifier circuit and smoothing circuit, transistor on structure of transistor, characteristic of transistor and common emitter circuit, electronic application about electronic equipment, communication technology and education, robot technology and high electronic technology.

Transistor reset preamplifier for high-rate high-resolution spectroscopy

International Nuclear Information System (INIS)

Landis, D.A.; Cork, C.P.; Madden, N.W.; Goulding, F.S.

1981-10-01

Pulsed transistor reset of high resolution charge sensitive preamplifiers used in cooled semiconductor spectrometers can sometimes have an advantage over pulsed light reset systems. Several versions of transistor reset spectrometers using both silicon and germanium detectors have been built. This paper discusses the advantages of the transistor reset system and illustrates several configurations of the packages used for the FET and reset transistor. It also describes the preamplifer circuit and shows the performance of the spectrometer at high rates

Protonic transistors from thin reflecting films

Energy Technology Data Exchange (ETDEWEB)

Ordinario, David D.; Phan, Long; Jocson, Jonah-Micah [Department of Chemical Engineering and Materials Science, University of California, Irvine, California 92697 (United States); Nguyen, Tam [Department of Chemistry, University of California, Irvine, California 92697 (United States); Gorodetsky, Alon A., E-mail: alon.gorodetsky@uci.edu [Department of Chemical Engineering and Materials Science, University of California, Irvine, California 92697 (United States); Department of Chemistry, University of California, Irvine, California 92697 (United States)

2015-01-01

Ionic transistors from organic and biological materials hold great promise for bioelectronics applications. Thus, much research effort has focused on optimizing the performance of these devices. Herein, we experimentally validate a straightforward strategy for enhancing the high to low current ratios of protein-based protonic transistors. Upon reducing the thickness of the transistors’ active layers, we increase their high to low current ratios 2-fold while leaving the other figures of merit unchanged. The measured ratio of 3.3 is comparable to the best values found for analogous devices. These findings underscore the importance of the active layer geometry for optimum protonic transistor functionality.

High mobility and quantum well transistors design and TCAD simulation

CERN Document Server

Hellings, Geert

2013-01-01

For many decades, the semiconductor industry has miniaturized transistors, delivering increased computing power to consumers at decreased cost. However, mere transistor downsizing does no longer provide the same improvements. One interesting option to further improve transistor characteristics is to use high mobility materials such as germanium and III-V materials. However, transistors have to be redesigned in order to fully benefit from these alternative materials. High Mobility and Quantum Well Transistors: Design and TCAD Simulation investigates planar bulk Germanium pFET technology in chapters 2-4, focusing on both the fabrication of such a technology and on the process and electrical TCAD simulation. Furthermore, this book shows that Quantum Well based transistors can leverage the benefits of these alternative materials, since they confine the charge carriers to the high-mobility material using a heterostructure. The design and fabrication of one particular transistor structure - the SiGe Implant-Free Qu...

A neuron-astrocyte transistor-like model for neuromorphic dressed neurons.

Science.gov (United States)

Valenza, G; Pioggia, G; Armato, A; Ferro, M; Scilingo, E P; De Rossi, D

2011-09-01

Experimental evidences on the role of the synaptic glia as an active partner together with the bold synapse in neuronal signaling and dynamics of neural tissue strongly suggest to investigate on a more realistic neuron-glia model for better understanding human brain processing. Among the glial cells, the astrocytes play a crucial role in the tripartite synapsis, i.e. the dressed neuron. A well-known two-way astrocyte-neuron interaction can be found in the literature, completely revising the purely supportive role for the glia. The aim of this study is to provide a computationally efficient model for neuron-glia interaction. The neuron-glia interactions were simulated by implementing the Li-Rinzel model for an astrocyte and the Izhikevich model for a neuron. Assuming the dressed neuron dynamics similar to the nonlinear input-output characteristics of a bipolar junction transistor, we derived our computationally efficient model. This model may represent the fundamental computational unit for the development of real-time artificial neuron-glia networks opening new perspectives in pattern recognition systems and in brain neurophysiology. Copyright © 2011 Elsevier Ltd. All rights reserved.

Observation of diameter dependent carrier distribution in nanowire-based transistors

Energy Technology Data Exchange (ETDEWEB)

Schulze, A; Hantschel, T; Eyben, P; Verhulst, A S; Rooyackers, R; Vandooren, A; Mody, J; Nazir, A; Leonelli, D; Vandervorst, W, E-mail: Andreas.Schulze@imec.be [IMEC, Kapeldreef 75, 3001 Leuven (Belgium)

2011-05-06

The successful implementation of nanowire (NW) based field-effect transistors (FET) critically depends on quantitative information about the carrier distribution inside such devices. Therefore, we have developed a method based on high-vacuum scanning spreading resistance microscopy (HV-SSRM) which allows two-dimensional (2D) quantitative carrier profiling of fully integrated silicon NW-based tunnel-FETs (TFETs) with 2 nm spatial resolution. The key elements of our characterization procedure are optimized NW cleaving and polishing steps, the use of in-house fabricated ultra-sharp diamond tips, measurements in high vacuum and a dedicated quantification procedure accounting for the Schottky-like tip-sample contact affected by surface states. In the case of the implanted TFET source regions we find a strong NW diameter dependence of conformality, junction abruptness and gate overlap, quantitatively in agreement with process simulations. In contrast, the arsenic doped drain regions reveal an unexpected NW diameter dependent dopant deactivation. The observed lower drain doping for smaller diameters is reflected in the device characteristics by lower TFET off-currents, as measured experimentally and confirmed by device simulations.

Ultrashort Channel Length Black Phosphorus Field-Effect Transistors.

Science.gov (United States)

Miao, Jinshui; Zhang, Suoming; Cai, Le; Scherr, Martin; Wang, Chuan

2015-09-22

This paper reports high-performance top-gated black phosphorus (BP) field-effect transistors with channel lengths down to 20 nm fabricated using a facile angle evaporation process. By controlling the evaporation angle, the channel length of the transistors can be reproducibly controlled to be anywhere between 20 and 70 nm. The as-fabricated 20 nm top-gated BP transistors exhibit respectable on-state current (174 μA/μm) and transconductance (70 μS/μm) at a VDS of 0.1 V. Due to the use of two-dimensional BP as the channel material, the transistors exhibit relatively small short channel effects, preserving a decent on-off current ratio of 10(2) even at an extremely small channel length of 20 nm. Additionally, unlike the unencapsulated BP devices, which are known to be chemically unstable in ambient conditions, the top-gated BP transistors passivated by the Al2O3 gate dielectric layer remain stable without noticeable degradation in device performance after being stored in ambient conditions for more than 1 week. This work demonstrates the great promise of atomically thin BP for applications in ultimately scaled transistors.

Piezotronic effect tuned AlGaN/GaN high electron mobility transistor

Science.gov (United States)

Jiang, Chunyan; Liu, Ting; Du, Chunhua; Huang, Xin; Liu, Mengmeng; Zhao, Zhenfu; Li, Linxuan; Pu, Xiong; Zhai, Junyi; Hu, Weiguo; Wang, Zhong Lin

2017-11-01

The piezotronic effect utilizes strain-induced piezoelectric polarization charges to tune the carrier transportation across the interface/junction. We fabricated a high-performance AlGaN/GaN high electron mobility transistor (HEMT), and the transport property was proven to be enhanced by applying an external stress for the first time. The enhanced source-drain current was also observed at any gate voltage and the maximum enhancement of the saturation current was up to 21% with 15 N applied stress (0.18 GPa at center) at -1 V gate voltage. The physical mechanism of HEMT with/without external compressive stress conditions was carefully illustrated and further confirmed by a self-consistent solution of the Schrödinger-Poisson equations. This study proves the cause-and-effect relationship between the piezoelectric polarization effect and 2D electron gas formation, which provides a tunable solution to enhance the device performance. The strain tuned HEMT has potential applications in human-machine interface and the security control of the power system.

Macroscopic quantum tunneling in Josephson tunnel junctions and Coulomb blockade in single small tunnel junctions

International Nuclear Information System (INIS)

Cleland, A.N.

1991-04-01

Experiments investigating the process of macroscopic quantum tunneling in a moderately-damped, resistively shunted, Josephson junction are described, followed by a discussion of experiments performed on very small capacitance normal-metal tunnel junctions. The experiments on the resistively-shunted Josephson junction were designed to investigate a quantum process, that of the tunneling of the Josephson phase variable under a potential barrier, in a system in which dissipation plays a major role in the dynamics of motion. All the parameters of the junction were measured using the classical phenomena of thermal activation and resonant activation. Theoretical predictions are compared with the experimental results, showing good agreement with no adjustable parameters; the tunneling rate in the moderately damped (Q ∼ 1) junction is seen to be reduced by a factor of 300 from that predicted for an undamped junction. The phase is seen to be a good quantum-mechanical variable. The experiments on small capacitance tunnel junctions extend the measurements on the larger-area Josephson junctions from the region in which the phase variable has a fairly well-defined value, i.e. its wavefunction has a narrow width, to the region where its value is almost completely unknown. The charge on the junction becomes well-defined and is predicted to quantize the current through the junction, giving rise to the Coulomb blockade at low bias. I present the first clear observation of the Coulomb blockade in single junctions. The electrical environment of the tunnel junction, however, strongly affects the behavior of the junction: higher resistance leads are observed to greatly sharpen the Coulomb blockade over that seen with lower resistance leads. I present theoretical descriptions of how the environment influences the junctions; comparisons with the experimental results are in reasonable agreement

Outlook and emerging semiconducting materials for ambipolar transistors.

Science.gov (United States)

Bisri, Satria Zulkarnaen; Piliego, Claudia; Gao, Jia; Loi, Maria Antonietta

2014-02-26

Ambipolar or bipolar transistors are transistors in which both holes and electrons are mobile inside the conducting channel. This device allows switching among several states: the hole-dominated on-state, the off-state, and the electron-dominated on-state. In the past year, it has attracted great interest in exotic semiconductors, such as organic semiconductors, nanostructured materials, and carbon nanotubes. The ability to utilize both holes and electrons inside one device opens new possibilities for the development of more compact complementary metal-oxide semiconductor (CMOS) circuits, and new kinds of optoelectronic device, namely, ambipolar light-emitting transistors. This progress report highlights the recent progresses in the field of ambipolar transistors, both from the fundamental physics and application viewpoints. Attention is devoted to the challenges that should be faced for the realization of ambipolar transistors with different material systems, beginning with the understanding of the importance of interface modification, which heavily affects injections and trapping of both holes and electrons. The recent development of advanced gating applications, including ionic liquid gating, that open up more possibility to realize ambipolar transport in materials in which one type of charge carrier is highly dominant is highlighted. Between the possible applications of ambipolar field-effect transistors, we focus on ambipolar light-emitting transistors. We put this new device in the framework of its prospective for general lightings, embedded displays, current-driven laser, as well as for photonics-electronics interconnection. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Flexible Proton-Gated Oxide Synaptic Transistors on Si Membrane.

Science.gov (United States)

Zhu, Li Qiang; Wan, Chang Jin; Gao, Ping Qi; Liu, Yang Hui; Xiao, Hui; Ye, Ji Chun; Wan, Qing

2016-08-24

Ion-conducting materials have received considerable attention for their applications in fuel cells, electrochemical devices, and sensors. Here, flexible indium zinc oxide (InZnO) synaptic transistors with multiple presynaptic inputs gated by proton-conducting phosphorosilicate glass-based electrolyte films are fabricated on ultrathin Si membranes. Transient characteristics of the proton gated InZnO synaptic transistors are investigated, indicating stable proton-gating behaviors. Short-term synaptic plasticities are mimicked on the proposed proton-gated synaptic transistors. Furthermore, synaptic integration regulations are mimicked on the proposed synaptic transistor networks. Spiking logic modulations are realized based on the transition between superlinear and sublinear synaptic integration. The multigates coupled flexible proton-gated oxide synaptic transistors may be interesting for neuroinspired platforms with sophisticated spatiotemporal information processing.

GaN transistors for efficient power conversion

CERN Document Server

Lidow, Alex; de Rooij, Michael; Reusch, David

2014-01-01

The first edition of GaN Transistors for Efficient Power Conversion was self-published by EPC in 2012, and is currently the only other book to discuss GaN transistor technology and specific applications for the technology. More than 1,200 copies of the first edition have been sold through Amazon or distributed to selected university professors, students and potential customers, and a simplified Chinese translation is also available. The second edition has expanded emphasis on applications for GaN transistors and design considerations. This textbook provides technical and application-focused i

Application of the Johnson criteria to graphene transistors

International Nuclear Information System (INIS)

Kelly, M J

2013-01-01

For 60 years, the Johnson criteria have guided the development of materials and the materials choices for field-effect and bipolar transistor technology. Intrinsic graphene is a semi-metal, precluding transistor applications, but only under lateral bias is a gap opened and transistor action possible. This first application of the Johnson criteria to biased graphene suggests that this material will struggle to ever achieve competitive commercial applications. (fast track communication)

Design method for a digitally trimmable MOS transistor structure

DEFF Research Database (Denmark)

Ning, Feng; Bruun, Erik

1996-01-01

A digitally trimmable MOS transistor is a MOS transistor consisting of a drain, a source, and a main gate as well as several subgates. The transconductance of the transistor is tunabledigitally by means of connecting subgates either to the main gate or to the source terminal. In this paper, a sys...

Dynamics of Bloch oscillating transistor near bifurcation threshold and its applicability for common mode rejection capability of a differential pair BOT

Science.gov (United States)

Sarkar, Jayanta; Puska, Antti; Hassel, Juha; Hakonen, Pertti

2014-03-01

Bloch oscillating transistor (BOT) is mesoscopic current amplier based on a combination of a Josephson junction or a squid connected with a large resistor and a NIS junction. We have studied the dynamics of BOT near the bifurcation threshold. This is an important feature for an amplifier as this can be utilized to improve its performance characteristics. We have measured the I - V characteristics of the BOT with different base currents (IB) over a wide range of Josephson coupling energies (EJ) . The current gain (β) is found to be increasing with increasing IB and eventually diverging. We have found a record large β = 50 in our experiment. In order to determine the common mode rejection ratio (CMRR) of a differential pair BOT we have used two BOTs fabricated on the same chip. The common mode port is connected to the bases of the two BOTs and fed with varying voltages; simultaneously emitter currents of the two BOTs are recorded. In our experiment we found a 20dB of CMRR.

A nanoscale piezoelectric transformer for low-voltage transistors.

Science.gov (United States)

Agarwal, Sapan; Yablonovitch, Eli

2014-11-12

A novel piezoelectric voltage transformer for low-voltage transistors is proposed. Placing a piezoelectric transformer on the gate of a field-effect transistor results in the piezoelectric transformer field-effect transistor that can switch at significantly lower voltages than a conventional transistor. The piezoelectric transformer operates by using one piezoelectric to squeeze another piezoelectric to generate a higher output voltage than the input voltage. Multiple piezoelectrics can be used to squeeze a single piezoelectric layer to generate an even higher voltage amplification. Coupled electrical and mechanical modeling in COMSOL predicts a 12.5× voltage amplification for a six-layer piezoelectric transformer. This would lead to more than a 150× reduction in the power needed for communications.

Josephson junction arrays

International Nuclear Information System (INIS)

Bindslev Hansen, J.; Lindelof, P.E.

1985-01-01

In this review we intend to cover recent work involving arrays of Josephson junctions. The work on such arrays falls naturally into three main areas of interest: 1. Technical applications of Josephson junction arrays for high-frequency devices. 2. Experimental studies of 2-D model systems (Kosterlitz-Thouless phase transition, commensurate-incommensurate transition in frustrated (flux) lattices). 3. Investigations of phenomena associated with non-equilibrium superconductivity in and around Josephson junctions (with high current density). (orig./BUD)

Problems of noise modeling in the presence of total current branching in high electron mobility transistor and field-effect transistor channels

International Nuclear Information System (INIS)

Shiktorov, P; Starikov, E; Gružinskis, V; Varani, L; Sabatini, G; Marinchio, H; Reggiani, L

2009-01-01

In the framework of analytical and hydrodynamic models for the description of carrier transport and noise in high electron mobility transistor/field-effect transistor channels the main features of the intrinsic noise of transistors are investigated under continuous branching of the current between channel and gate. It is shown that the current-noise and voltage-noise spectra at the transistor terminals contain an excess noise related to thermal excitation of plasma wave modes in the dielectric layer between the channel and gate. It is found that the set of modes of excited plasma waves can be governed by the external embedding circuits, thus violating a universal description of noise in terms of Norton and Thevenin noise generators

Transistor challenges - A DRAM perspective

International Nuclear Information System (INIS)

Faul, Juergen W.; Henke, Dietmar

2005-01-01

Key challenges of the transistor scaling from a DRAM perspective will be reviewed. Both, array transistors as well as DRAM support devices face challenges that differ essentially from high performance logic device scaling. As a major difference, retention time and standby current requirements characterize special boundary conditions in the DRAM device design. Array device scaling is determined by a chip size driven aggressive node scaling. To continue scaling, major innovations need to be introduced into state-of-the-art planar array transistors. Alternatively, non planar device concepts will have to be evaluated. Support device design for DRAMs is driven by today's market demand for increased chip performances at little to no extra cost. Major innovations are required to continue that path. Besides this strive for performance increase, special limitations for 'on pitch' circuits at the array edge will come up due to the aggressive cell size scaling

Electronic thermometry in tunable tunnel junction

Science.gov (United States)

Maksymovych, Petro

2016-03-15

A tunable tunnel junction thermometry circuit includes a variable width tunnel junction between a test object and a probe. The junction width is varied and a change in thermovoltage across the junction with respect to the change in distance across the junction is determined. Also, a change in biased current with respect to a change in distance across the junction is determined. A temperature gradient across the junction is determined based on a mathematical relationship between the temperature gradient, the change in thermovoltage with respect to distance and the change in biased current with respect to distance. Thermovoltage may be measured by nullifying a thermoelectric tunneling current with an applied voltage supply level. A piezoelectric actuator may modulate the probe, and thus the junction width, to vary thermovoltage and biased current across the junction. Lock-in amplifiers measure the derivatives of the thermovoltage and biased current modulated by varying junction width.

Liquid crystals for organic transistors (Conference Presentation)

Science.gov (United States)

Hanna, Jun-ichi; Iino, Hiroaki

2016-09-01

Liquid crystals are a new type of organic semiconductors exhibiting molecular orientation in self-organizing manner, and have high potential for device applications. In fact, various device applications have been proposed so far, including photosensors, solar cells, light emitting diodes, field effect transistors, and so on.. However, device performance in those fabricated with liquid crystals is less than those of devices fabricated with conventional materials in spite of unique features of liquid crystals. Here we discuss how we can utilize the liquid crystallinity in organic transistors and how we can overcome conventional non-liquid crystalline organic transistor materials. Then, we demonstrate high performance organic transistors fabricated with a smectic E liquid crystal of Ph-BTBT-10, which show high mobility of over 10cm2/Vs and high thermal durability of over 200oC in OFETs fabricated with its spin-coated polycrystalline thin films.

Transistor Small Signal Analysis under Radiation Effects

International Nuclear Information System (INIS)

Sharshar, K.A.A.

2004-01-01

A Small signal transistor parameters dedicate the operation of bipolar transistor before and after exposed to gamma radiation (1 Mrad up to 5 Mrads) and electron beam(1 MeV, 25 mA) with the same doses as a radiation sources, the electrical parameters of the device are changed. The circuit Model has been discussed.Parameters, such as internal emitter resistance (re), internal base resistance, internal collector resistance (re), emitter base photocurrent (Ippe) and base collector photocurrent (Ippe). These parameters affect on the operation of the device in its applications, which work as an effective element, such as current gain (hFE≡β)degradation it's and effective parameter in the device operation. Also the leakage currents (IcBO) and (IEBO) are most important parameters, Which increased with radiation doses. Theoretical representation of the change in the equivalent circuit for NPN and PNP bipolar transistor were discussed, the input and output parameters of the two types were discussed due to the change in small signal input resistance of the two types. The emitter resistance(re) were changed by the effect of gamma and electron beam irradiation, which makes a change in the role of matching impedances between transistor stages. Also the transistor stability factors S(Ico), S(VBE) and S(β are detected to indicate the transistor operations after exposed to radiation fields. In low doses the gain stability is modified due to recombination of induced charge generated during device fabrication. Also the load resistance values are connected to compensate the effect

Ultra-low specific on-resistance high-voltage vertical double diffusion metal–oxide–semiconductor field-effect transistor with continuous electron accumulation layer

International Nuclear Information System (INIS)

Ma Da; Luo Xiao-Rong; Wei Jie; Tan Qiao; Zhou Kun; Wu Jun-Feng

2016-01-01

A new ultra-low specific on-resistance (R on,sp ) vertical double diffusion metal–oxide–semiconductor field-effect transistor (VDMOS) with continuous electron accumulation (CEA) layer, denoted as CEA-VDMOS, is proposed and its new current transport mechanism is investigated. It features a trench gate directly extended to the drain, which includes two PN junctions. In on-state, the electron accumulation layers are formed along the sides of the extended gate and introduce two continuous low-resistance current paths from the source to the drain in a cell pitch. This mechanism not only dramatically reduces the R on,sp but also makes the R on,sp almost independent of the n-pillar doping concentration (N n ). In off-state, the depletion between the n-pillar and p-pillar within the extended trench gate increases the N n , and further reduces the R on,sp . Especially, the two PN junctions within the trench gate support a high gate–drain voltage in the off-state and on-state, respectively. However, the extended gate increases the gate capacitance and thus weakens the dynamic performance to some extent. Therefore, the CEA-VDMOS is more suitable for low and medium frequencies application. Simulation indicates that the CEA-VDMOS reduces the R on,sp by 80% compared with the conventional super-junction VDMOS (CSJ-VDMOS) at the same high breakdown voltage (BV). (paper)

Dynamics of Josephson junction arrays

International Nuclear Information System (INIS)

Hadley, P.

1989-01-01

The dynamics of Josephson junction arrays is a topic that lies at the intersection of the fields of nonlinear dynamics and Josephson junction technology. The series arrays considered here consist of several rapidly oscillating Josephson junctions where each junction is coupled equally to every other junction. The purpose of this study is to understand phaselocking and other cooperative dynamics of this system. Previously, little was known about high dimensional nonlinear systems of this sort. Numerical simulations are used to study the dynamics of these arrays. Three distinct types of periodic solutions to the array equations were observed as well as period doubled and chaotic solutions. One of the periodic solutions is the symmetric, in-phase solution where all of the junctions oscillate identically. The other two periodic solutions are symmetry-broken solutions where all of the junction do not oscillate identically. The symmetry-broken solutions are highly degenerate. As many as (N - 1) stable solutions can coexist for an array of N junctions. Understanding the stability of these several solutions and the transitions among them is vital to the design of useful devices

Large magnetocurrents in double-barrier tunneling transistors

International Nuclear Information System (INIS)

Lee, J.H.; Jun, K.-I.; Shin, K.-H.; Park, S.Y.; Hong, J.K.; Rhie, K.; Lee, B.C.

2005-01-01

Magnetic tunneling transistors (MTT) with double tunneling barriers are fabricated. The structure of the transistor is AFM/FM/I/FM/I/FM/AFM, and ferromagnetic layers serve as the emitter, base and collector. This double-barrier tunneling transistor (DBTT) has an advantage of controlling the potential between the base and collector, compared to the Schottky-barrier-based base and collector of MTT. We found that the collector current density of DBTT is at least 10 3 times larger than that of conventional MTT, since tunneling through AlO x barrier provides much larger current density than that through Schottky barrier

Method for Providing Semiconductors Having Self-Aligned Ion Implant

Science.gov (United States)

Neudeck, Philip G. (Inventor)

2014-01-01

A method is disclosed that provides a self-aligned nitrogen-implant particularly suited for a Junction Field Effect Transistor (JFET) semiconductor device preferably comprised of a silicon carbide (SiC). This self-aligned nitrogen-implant allows for the realization of durable and stable electrical functionality of high temperature transistors such as JFETs. The method implements the self-aligned nitrogen-implant having predetermined dimensions, at a particular step in the fabrication process, so that the SiC junction field effect transistors are capable of being electrically operating continuously at 500.degree. C. for over 10,000 hours in an air ambient with less than a 10% change in operational transistor parameters.

Ambipolar organic tri-gate transistor for low-power complementary electronics

NARCIS (Netherlands)

Torricelli, F.; Ghittorelli, M.; Smits, E.C.P.; Roelofs, C.; Janssen, R.A.J.; Gelinck, G.H.; Kovács-Vajna, Z.M.; Cantatore, E.

2016-01-01

Ambipolar transistors typically suffer from large off-current inherently due to ambipolar conduction. Using a tri-gate transistor it is shown that it is possible to electrostatically switch ambipolar polymer transistors from ambipolar to unipolar mode. In unipolar mode, symmetric characteristics

Stretchable transistors with buckled carbon nanotube films as conducting channels

Science.gov (United States)

Arnold, Michael S; Xu, Feng

2015-03-24

Thin-film transistors comprising buckled films comprising carbon nanotubes as the conductive channel are provided. Also provided are methods of fabricating the transistors. The transistors, which are highly stretchable and bendable, exhibit stable performance even when operated under high tensile strains.

Metal nanoparticle film-based room temperature Coulomb transistor.

Science.gov (United States)

Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian

2017-07-01

Single-electron transistors would represent an approach to developing less power-consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations.

Uniformity of fully gravure printed organic field-effect transistors

International Nuclear Information System (INIS)

Hambsch, M.; Reuter, K.; Stanel, M.; Schmidt, G.; Kempa, H.; Fuegmann, U.; Hahn, U.; Huebler, A.C.

2010-01-01

Fully mass-printed organic field-effect transistors were made completely by means of gravure printing. Therefore a special printing layout was developed in order to avoid register problems in print direction. Upon using this layout, contact pads for source-drain electrodes of the transistors are printed together with the gate electrodes in one and the same printing run. More than 50,000 transistors have been produced and by random tests a yield of approximately 75% has been determined. The principle suitability of the gravure printed transistors for integrated circuits has been shown by the realization of ring oscillators.

Theory and application of dual-transistor charge separation analysis

International Nuclear Information System (INIS)

Fleetwood, D.M.; Schwank, J.R.; Winokur, P.S.; Sexton, F.W.; Shaneyfelt, M.R.

1989-01-01

The authors describe a dual-transistor charge separation method to evaluate the radiation response of MOS transistors. This method requires that n- and p-channel transistors with identically processed oxides be irradiated under identical conditions at the same oxide electric fields. Combining features of single-transistor midgap and mobility methods, the authors show how one may determine threshold voltage shifts due to oxide-trapped and interface-trapped charge from standard threshold voltage and mobility measurements. These measurements can be made at currents 2-5 orders of magnitude higher than those required for midgap, subthreshold slope, and charge-pumping methods. The dual-transistor method contains no adjustable parameters, and includes an internal self-consistency check. The accuracy of the method is verified by comparison to midgap, subthreshold slope, and charge-pumping methods for several MOS processes and technologies

Organic electrochemical transistors

KAUST Repository

Rivnay, Jonathan; Inal, Sahika; Salleo, Alberto; Owens, Ró isí n M.; Berggren, Magnus; Malliaras, George G.

2018-01-01

Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume

Self-Consistent Study of Conjugated Aromatic Molecular Transistors

International Nuclear Information System (INIS)

Jing, Wang; Yun-Ye, Liang; Hao, Chen; Peng, Wang; Note, R.; Mizuseki, H.; Kawazoe, Y.

2010-01-01

We study the current through conjugated aromatic molecular transistors modulated by a transverse field. The self-consistent calculation is realized with density function theory through the standard quantum chemistry software Gaussian03 and the non-equilibrium Green's function formalism. The calculated I – V curves controlled by the transverse field present the characteristics of different organic molecular transistors, the transverse field effect of which is improved by the substitutions of nitrogen atoms or fluorine atoms. On the other hand, the asymmetry of molecular configurations to the axis connecting two sulfur atoms is in favor of realizing the transverse field modulation. Suitably designed conjugated aromatic molecular transistors possess different I – V characteristics, some of them are similar to those of metal-oxide-semiconductor field-effect transistors (MOSFET). Some of the calculated molecular devices may work as elements in graphene electronics. Our results present the richness and flexibility of molecular transistors, which describe the colorful prospect of next generation devices. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

The Smallest Transistor-Based Nonautonomous Chaotic Circuit

DEFF Research Database (Denmark)

Lindberg, Erik; Murali, K.; Tamasevicius, Arunas

2005-01-01

A nonautonomous chaotic circuit based on one transistor, two capacitors, and two resistors is described. The mechanism behind the chaotic performance is based on “disturbance of integration.” The forward part and the reverse part of the bipolar transistor are “fighting” about the charging...

Influence of the spacer dielectric processes on PMOS junction properties

International Nuclear Information System (INIS)

Morin, Pierre; Wacquant, Francois; Juhel, Marc; Laviron, Cyrille; Lenoble, D.

2005-01-01

In this paper, the interaction observed in PMOS transistor between the boron lightly doped drain (LDD) extensions and the spacer oxide and nitride dielectrics have been studied, with a simple experimental methodology. Low thermal budget oxide obtained by sub-atmospheric chemical vapor deposition (SACVD) and nitride deposited by plasma process have been evaluated as spacer layers. The influence of the oxide liner hydrogen content is shown to be critical for the p type shallow junction. Indeed, during the activation anneal, hydrogen content increases the boron out diffusion from the extension into the oxide liner and yield to a significant dose loss in this area. Nitride porosity has also been studied. A lower boron dose loss is observed with a porous layer because hydrogen can degas out significantly from the oxide, during anneal, through the porous nitride film. These results confirm the model of boron out diffusion based on oxide hydrogen content proposed by Kohli. Finally, a boron diffusion mechanism driven by chemistry and enhanced by hydrogen defects is proposed

High mobility polymer gated organic field effect transistor using zinc ...

Indian Academy of Sciences (India)

Organic thin film transistors were fabricated using evaporated zinc phthalocyanine as the active layer. Parylene film ... At room temperature, these transistors exhibit p-type conductivity with field-effect ... Keywords. Organic semiconductor; field effect transistor; phthalocyanine; high mobility. ... The evaporation rate was kept at ...

The use of 2N3055 transistor as photosensory in solarymeter

International Nuclear Information System (INIS)

Bintoro; Sastroamidjojo, M.S.A.

1981-01-01

The characteristics of 2N3055 type transistor used for solarymeters sensor. It can be seen that transistor sensor has more response time. The response to against arrival solar intensity is linear. It can be used for solarymeter sensor after calibrated with pyranometer reference, but not so sensitive for 500 nanometer wavelength. It can be concluded that 2N3055 transistor made by Motrola than the made by R.C.A. because the 2N3055 transistor is more wide and more accurate than the R.C.A. transistor. (author tr.)

Improvements in or relating to transistor circuits

International Nuclear Information System (INIS)

Richards, R.F.; Williamson, P.W.

1978-01-01

This invention relates to transistor circuits and in particular to integrated transistor circuits formed on a substrate of semi-conductor material such as silicon. The invention is concerned with providing integrated circuits in which malfunctions caused by the effects of ionising, e.g. nuclear, radiations are reduced. (author)

Enhanced transconductance in a double-gate graphene field-effect transistor

Science.gov (United States)

Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu

2018-03-01

Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.

Tight junctions and human diseases.

Science.gov (United States)

Sawada, Norimasa; Murata, Masaki; Kikuchi, Keisuke; Osanai, Makoto; Tobioka, Hirotoshi; Kojima, Takashi; Chiba, Hideki

2003-09-01

Tight junctions are intercellular junctions adjacent to the apical end of the lateral membrane surface. They have two functions, the barrier (or gate) function and the fence function. The barrier function of tight junctions regulates the passage of ions, water, and various macromolecules, even of cancer cells, through paracellular spaces. The barrier function is thus relevant to edema, jaundice, diarrhea, and blood-borne metastasis. On the other hand, the fence function maintains cell polarity. In other words, tight junctions work as a fence to prevent intermixing of molecules in the apical membrane with those in the lateral membrane. This function is deeply involved in cancer cell biology, in terms of loss of cell polarity. Of the proteins comprising tight junctions, integral membrane proteins occludin, claudins, and JAMs have been recently discovered. Of these molecules, claudins are exclusively responsible for the formation of tight-junction strands and are connected with the actin cytoskeleton mediated by ZO-1. Thus, both functions of tight junctions are dependent on the integrity of the actin cytoskeleton as well as ATP. Mutations in the claudin14 and the claudin16 genes result in hereditary deafness and hereditary hypomagnesemia, respectively. Some pathogenic bacteria and viruses target and affect the tight-junction function, leading to diseases. In this review, the relationship between tight junctions and human diseases is summarized.

Metal nanoparticle film–based room temperature Coulomb transistor

Science.gov (United States)

Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian

2017-01-01

Single-electron transistors would represent an approach to developing less power–consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations. PMID:28740864

Large scale electromechanical transistor with application in mass sensing

Energy Technology Data Exchange (ETDEWEB)

Jin, Leisheng; Li, Lijie, E-mail: L.Li@swansea.ac.uk [Multidisciplinary Nanotechnology Centre, College of Engineering, Swansea University, Swansea SA2 8PP (United Kingdom)

2014-12-07

Nanomechanical transistor (NMT) has evolved from the single electron transistor, a device that operates by shuttling electrons with a self-excited central conductor. The unfavoured aspects of the NMT are the complexity of the fabrication process and its signal processing unit, which could potentially be overcome by designing much larger devices. This paper reports a new design of large scale electromechanical transistor (LSEMT), still taking advantage of the principle of shuttling electrons. However, because of the large size, nonlinear electrostatic forces induced by the transistor itself are not sufficient to drive the mechanical member into vibration—an external force has to be used. In this paper, a LSEMT device is modelled, and its new application in mass sensing is postulated using two coupled mechanical cantilevers, with one of them being embedded in the transistor. The sensor is capable of detecting added mass using the eigenstate shifts method by reading the change of electrical current from the transistor, which has much higher sensitivity than conventional eigenfrequency shift approach used in classical cantilever based mass sensors. Numerical simulations are conducted to investigate the performance of the mass sensor.

Tunneling field effect transistor technology

CERN Document Server

Chan, Mansun

2016-01-01

This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency. · Provides comprehensive reference to tunneling field effect transistors (TFETs); · Covers all aspects of TFETs, from device process to modeling and applications; · Enables design of power-efficient integrated circuits, with low power consumption TFETs.

A single-gradient junction technique to replace multiple-junction shifts for craniospinal irradiation treatment

International Nuclear Information System (INIS)

Hadley, Austin; Ding, George X.

2014-01-01

Craniospinal irradiation (CSI) requires abutting fields at the cervical spine. Junction shifts are conventionally used to prevent setup error–induced overdosage/underdosage from occurring at the same location. This study compared the dosimetric differences at the cranial-spinal junction between a single-gradient junction technique and conventional multiple-junction shifts and evaluated the effect of setup errors on the dose distributions between both techniques for a treatment course and single fraction. Conventionally, 2 lateral brain fields and a posterior spine field(s) are used for CSI with weekly 1-cm junction shifts. We retrospectively replanned 4 CSI patients using a single-gradient junction between the lateral brain fields and the posterior spine field. The fields were extended to allow a minimum 3-cm field overlap. The dose gradient at the junction was achieved using dose painting and intensity-modulated radiation therapy planning. The effect of positioning setup errors on the dose distributions for both techniques was simulated by applying shifts of ± 3 and 5 mm. The resulting cervical spine doses across the field junction for both techniques were calculated and compared. Dose profiles were obtained for both a single fraction and entire treatment course to include the effects of the conventional weekly junction shifts. Compared with the conventional technique, the gradient-dose technique resulted in higher dose uniformity and conformity to the target volumes, lower organ at risk (OAR) mean and maximum doses, and diminished hot spots from systematic positioning errors over the course of treatment. Single-fraction hot and cold spots were improved for the gradient-dose technique. The single-gradient junction technique provides improved conformity, dose uniformity, diminished hot spots, lower OAR mean and maximum dose, and one plan for the entire treatment course, which reduces the potential human error associated with conventional 4-shifted plans

Organic semiconductors for organic field-effect transistors

International Nuclear Information System (INIS)

Yamashita, Yoshiro

2009-01-01

The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed. (topical review)

Transistors using crystalline silicon devices on glass

Science.gov (United States)

McCarthy, Anthony M.

1995-01-01

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

Organic semiconductors for organic field-effect transistors

Directory of Open Access Journals (Sweden)

Yoshiro Yamashita

2009-01-01

Full Text Available The advantages of organic field-effect transistors (OFETs, such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.

Macroscopic quantum tunneling in Josephson tunnel junctions and Coulomb blockade in single small tunnel junctions

International Nuclear Information System (INIS)

Cleland, A.N.

1991-01-01

Experiments investigated the process of macroscopic quantum tunneling in a moderately-damped, resistively shunted, Josephson junction are described, followed by a discussion of experiments performed on very-small-capacitance normal-metal tunnel junctions. The experiments on the resistively-shunted Josephson junction were designed to investigate a quantum process, that of the tunneling of the Josephson-phase variable under a potential barrier, in a system in which dissipation plays a major role in the dynamics of motion. All the parameters of the junction were measured using the classical phenomena of thermal activation and resonant activation. Theoretical predictions are compared with the experimental results, showing good agreement with no adjustable parameters. The experiments on small-capacitance tunnel junctions extend the measurements on the large-area Josephson junctions from the region in which the phase variable has a fairly well-defined value, i.e. its wave function has a narrow width, to the region where its value is almost completely unknown. The charge on the junction becomes well-defined and is predicted to quantize the current through the junction, giving rise to the Coulomb blockade at low bias

Increasing gap junctional coupling: a tool for dissecting the role of gap junctions

DEFF Research Database (Denmark)

Axelsen, Lene Nygaard; Haugan, Ketil; Stahlhut, Martin

2007-01-01

Much of our current knowledge about the physiological and pathophysiological role of gap junctions is based on experiments where coupling has been reduced by either chemical agents or genetic modification. This has brought evidence that gap junctions are important in many physiological processes....... In a number of cases, gap junctions have been implicated in the initiation and progress of disease, and experimental uncoupling has been used to investigate the exact role of coupling. The inverse approach, i.e., to increase coupling, has become possible in recent years and represents a new way of testing...... the role of gap junctions. The aim of this review is to summarize the current knowledge obtained with agents that selectively increase gap junctional intercellular coupling. Two approaches will be reviewed: increasing coupling by the use of antiarrhythmic peptide and its synthetic analogs...

A low noise single-transistor transimpedance preamplifier for Fourier-transform mass spectrometry using a T feedback network.

Science.gov (United States)

Lin, Tzu-Yung; Green, Roger J; O'Connor, Peter B

2012-09-01

A novel single-transistor transimpedance preamplifier has been introduced for improving performance in Fourier-transform ion cyclotron resonance (FT-ICR) mass spectrometry. A low noise junction field-effect transistor (JFET), BF862, is used as the main amplification stage of this trans-impedance preamplifier, and a T-shaped feedback network is introduced as both the feedback and the gate biasing solutions. The T feedback network has been studied using an operational amplifier (Op Amp), AD8099. Such a feedback system allows ~100-fold less feedback resistance at a given transimpedance, hence preserving bandwidth, which is beneficial to applications demanding high gain. The single-transistor preamplifier yields a tested transimpedance of ~10(4) Ω (80 dBΩ) in the frequency range between 1 kHz and 1 MHz (mass-to-charge ratio, m/z, of around 180-180k for a 12-T FT-ICR system), with a low power consumption of ~6 mW, which implies that this preamplifier is well suited to a 12-T FT-ICR mass spectrometer. In trading noise performance for higher trans-impedance, an alternative preamplifier design, an AD8099 preamplifier with the T feedback network, has also been studied with a capability of ~10(6) Ω (120 dBΩ) transimpedance in the same frequency range. The resistive components in the T feedback network reported here can be replaced by complex impedances, which allows adaptation of this feedback system to other frequency, transimpedance, and noise characteristics for applications not only in other mass spectrometers, such as Orbitrap, time-of-flight (TOF), and ion trap systems, but also in other charge/current detecting systems such as spectroscopy systems, microscopy systems, optical communication systems, or charge-coupled devices (CCDs).

Simulaci??n y modelado de transistores MOS de doble puerta

OpenAIRE

Cartujo Cassinello, Pedro

2000-01-01

En este trabajo se hace un estudio del transistor MOS de doble puerta analizando las posibles ventajas de esta nueva estructura frene al transistor convencional y el transistor MOS SOI de puerta simple. Para ello se ha analizado una secci??n transversal de un transistor MOS de doble puerta de canal N, con el fin de examinar detalladamente las peculiaridades de la distribuci??n de electrones con una amplia variedad de valores de todos los par??mentros tecnol??gicos y condiciones de operaci??n,...

SiC Optically Modulated Field-Effect Transistor

Science.gov (United States)

Tabib-Azar, Massood

2009-01-01

An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification

Generation of short electrical pulses based on bipolar transistorsny

Directory of Open Access Journals (Sweden)

M. Gerding

2004-01-01

Full Text Available A system for the generation of short electrical pulses based on the minority carrier charge storage and the step recovery effect of bipolar transistors is presented. Electrical pulses of about 90 ps up to 800 ps duration are generated with a maximum amplitude of approximately 7V at 50Ω. The bipolar transistor is driven into saturation and the base-collector and base-emitter junctions become forward biased. The resulting fast switch-off edge of the transistor’s output signal is the basis for the pulse generation. The fast switching of the transistor occurs as a result of the minority carriers that have been injected and stored across the base-collector junction under forward bias conditions. If the saturated transistor is suddenly reverse biased the pn-junction will appear as a low impedance until the stored charge is depleted. Then the impedance will suddenly increase to its normal high value and the flow of current through the junction will turn to zero, abruptly. A differentiation of the output signal of the transistor results in two short pulses with opposite polarities. The differentiating circuit is implemented by a transmission line network, which mainly acts as a high pass filter. Both the transistor technology (pnp or npn and the phase of the transfer function of the differentating circuit influence the polarity of the output pulses. The pulse duration depends on the transistor parameters as well as on the transfer function of the pulse shaping network. This way of generating short electrical pulses is a new alternative for conventional comb generators based on steprecovery diodes (SRD. Due to the three-terminal structure of the transistor the isolation problem between the input and the output signal of the transistor network is drastically simplified. Furthermore the transistor is an active element in contrast to a SRD, so that its current gain can be used to minimize the power of the driving signal.

Diffusion pipes at PNP switching transistors

International Nuclear Information System (INIS)

Sachelarie, D.; Postolache, C.; Gaiseanu, F.

1976-01-01

The appearance of the ''diffusion pipes'' greatly affects the fabrication of the PNP high-frequency/very-fast-switching transistors. A brief review of the principal problems connected to the presence of these ''pipes'' is made. A research program is presented which permitted the fabrication of the PNP switching transistors at ICCE-Bucharest, with transition frequency fsub(T) = 1.2 GHz and storage time tsub(s) = 4.5 ns. (author)

Integrated amplifying circuit with MOS transistors

Energy Technology Data Exchange (ETDEWEB)

Baylac, B; Merckel, G; Meunier, P

1974-01-25

The invention relates to a feedback-pass-band amplifier with MOS-transistors. The differential stage of conventional amplifiers is changed into an adding state, whereas the differential amplification stages are changed into amplifier inverter stages. All MOS transistors used in that amplifier are of similar configuration and are interdigitized, whereby the operating speed dispersion is reduced. This can be applied to obtaining a measurement channel for proportional chambers.

Compact modeling of nanoscale triple-gate junctionless transistors covering drift-diffusion to quasi-ballistic carrier transport

Science.gov (United States)

Oproglidis, T. A.; Karatsori, T. A.; Barraud, S.; Ghibaudo, G.; Dimitriadis, C. A.

2018-04-01

In this work, we extend our analytical compact model for nanoscale junctionless triple-gate (JL TG) MOSFETs, capturing carrier transport from drift-diffusion to quasi-ballistic regime. This is based on a simple formulation of the low-field mobility extracted from experimental data using the Y-function method, taking into account the ballistic carrier motion and an increased carrier scattering in process-induced defects near the source/drain regions. The case of a Schottky junction in non-ideal ohmic contact at the drain side was also taken into account by modifying the threshold voltage and ideality factor of the JL transistor. The model is validated with experimental data for n-channel JL TG MOSFETs with channel length varying from 95 down to 25 nm. It can be easily implemented as a compact model for use in Spice circuit simulators.

A self-heating study on multi-finger AlGaN/GaN high electron mobility transistors

International Nuclear Information System (INIS)

Yang Liyuan; Ai Shan; Chen Yonghe; Cao Mengyi; Zhang Kai; Ma Xiaohua; Hao Yue

2013-01-01

Self-heating in multi-finger AlGaN/GaN high-electron-mobility transistors (HEMTs) is investigated by measurements and modeling of device junction temperature under steady-state operation. Measurements are carried out using micro-Raman scattering to obtain the detailed and accurate temperature distribution of the device. The device peak temperature corresponds to the high field region at the drain side of gate edge. The channel temperature of the device is modeled using a combined electro-thermal model considering 2DEG transport characteristics and the Joule heating power distribution. The results reveal excellent correlation to the micro-Raman measurements, validating our model for the design of better cooled structures. Furthermore, the influence of layout design on the channel temperature of multi-finger AlGaN/GaN HEMTs is studied using the proposed electro-thermal model, allowing for device optimization. (semiconductor devices)

Junction detection and pathway selection

Science.gov (United States)

Peck, Alex N.; Lim, Willie Y.; Breul, Harry T.

1992-02-01

The ability to detect junctions and make choices among the possible pathways is important for autonomous navigation. In our script-based navigation approach where a journey is specified as a script of high-level instructions, actions are frequently referenced to junctions, e.g., `turn left at the intersection.' In order for the robot to carry out these kind of instructions, it must be able (1) to detect an intersection (i.e., an intersection of pathways), (2) know that there are several possible pathways it can take, and (3) pick the pathway consistent with the high level instruction. In this paper we describe our implementation of the ability to detect junctions in an indoor environment, such as corners, T-junctions and intersections, using sonar. Our approach uses a combination of partial scan of the local environment and recognition of sonar signatures of certain features of the junctions. In the case where the environment is known, we use additional sensor information (such as compass bearings) to help recognize the specific junction. In general, once a junction is detected and its type known, the number of possible pathways can be deduced and the correct pathway selected. Then the appropriate behavior for negotiating the junction is activated.

Programmable, automated transistor test system

Science.gov (United States)

Truong, L. V.; Sundburg, G. R.

1986-01-01

A programmable, automated transistor test system was built to supply experimental data on new and advanced power semiconductors. The data will be used for analytical models and by engineers in designing space and aircraft electric power systems. A pulsed power technique was used at low duty cycles in a nondestructive test to examine the dynamic switching characteristic curves of power transistors in the 500 to 1000 V, 10 to 100 A range. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software.

Subthreshold currents in CMOS transistors made on oxygen-implanted silicon

International Nuclear Information System (INIS)

Foster, D.J.

1983-01-01

Kinks have been observed in subthreshold current plots of mesa-shaped n-channel transistors made on oxygen-implanted silicon substrates. The kinks represent additional current flow and are due to overlapping fields from the gate electrode causing early corner inversion and to a Qsub(ss) side-wall effect. Subthreshold currents in n-channel transistors are dominated by the two effects which, as a consequence, reduce threshold voltages especially in narrow n-channel transistors. The subthreshold characteristics of p-channel transistors were not affected in the same way. (author)

Supramolecular tunneling junctions

NARCIS (Netherlands)

Wimbush, K.S.

2012-01-01

In this study a variety of supramolecular tunneling junctions were created. The basis of these junctions was a self-assembled monolayer of heptathioether functionalized ß-cyclodextrin (ßCD) formed on an ultra-flat Au surface, i.e., the bottom electrode. This gave a well-defined hexagonally packed

Phase diagrams of particles with dissimilar patches: X-junctions and Y-junctions

International Nuclear Information System (INIS)

Tavares, J M; Teixeira, P I C

2012-01-01

We use Wertheim’s first-order perturbation theory to investigate the phase behaviour and the structure of coexisting fluid phases for a model of patchy particles with dissimilar patches (two patches of type A and f B patches of type B). A patch of type α = {A,B} can bond to a patch of type β = {A,B} in a volume v αβ , thereby decreasing the internal energy by ε αβ . We analyse the range of model parameters where AB bonds, or Y-junctions, are energetically disfavoured (ε AB AA /2) but entropically favoured (v AB ≫ v αα ), and BB bonds, or X-junctions, are energetically favoured (ε BB > 0). We show that, for low values of ε BB /ε AA , the phase diagram has three different regions: (i) close to the critical temperature a low-density liquid composed of long chains and rich in Y-junctions coexists with a vapour of chains; (ii) at intermediate temperatures there is coexistence between a vapour of short chains and a liquid of very long chains with X- and Y-junctions; (iii) at low temperatures an ideal gas coexists with a high-density liquid with all possible AA and BB bonds formed. It is also shown that in region (i) the liquid binodal is reentrant (its density decreases with decreasing temperature) for the lower values of ε BB /ε AA . The existence of these three regions is a consequence of the competition between the formation of X- and Y-junctions: X-junctions are energetically favoured and thus dominate at low temperatures, whereas Y-junctions are entropically favoured and dominate at higher temperatures. (paper)

Scalable fabrication of self-aligned graphene transistors and circuits on glass.

Science.gov (United States)

Liao, Lei; Bai, Jingwei; Cheng, Rui; Zhou, Hailong; Liu, Lixin; Liu, Yuan; Huang, Yu; Duan, Xiangfeng

2012-06-13

Graphene transistors are of considerable interest for radio frequency (rf) applications. High-frequency graphene transistors with the intrinsic cutoff frequency up to 300 GHz have been demonstrated. However, the graphene transistors reported to date only exhibit a limited extrinsic cutoff frequency up to about 10 GHz, and functional graphene circuits demonstrated so far can merely operate in the tens of megahertz regime, far from the potential the graphene transistors could offer. Here we report a scalable approach to fabricate self-aligned graphene transistors with the extrinsic cutoff frequency exceeding 50 GHz and graphene circuits that can operate in the 1-10 GHz regime. The devices are fabricated on a glass substrate through a self-aligned process by using chemical vapor deposition (CVD) grown graphene and a dielectrophoretic assembled nanowire gate array. The self-aligned process allows the achievement of unprecedented performance in CVD graphene transistors with a highest transconductance of 0.36 mS/μm. The use of an insulating substrate minimizes the parasitic capacitance and has therefore enabled graphene transistors with a record-high extrinsic cutoff frequency (> 50 GHz) achieved to date. The excellent extrinsic cutoff frequency readily allows configuring the graphene transistors into frequency doubling or mixing circuits functioning in the 1-10 GHz regime, a significant advancement over previous reports (∼20 MHz). The studies open a pathway to scalable fabrication of high-speed graphene transistors and functional circuits and represent a significant step forward to graphene based radio frequency devices.

Vertically aligned carbon nanotube field-effect transistors

KAUST Repository

Li, Jingqi

2012-10-01

Vertically aligned carbon nanotube field-effect transistors (CNTFETs) have been developed using pure semiconducting carbon nanotubes. The source and drain were vertically stacked, separated by a dielectric, and the carbon nanotubes were placed on the sidewall of the stack to bridge the source and drain. Both the effective gate dielectric and gate electrode were normal to the substrate surface. The channel length is determined by the dielectric thickness between source and drain electrodes, making it easier to fabricate sub-micrometer transistors without using time-consuming electron beam lithography. The transistor area is much smaller than the planar CNTFET due to the vertical arrangement of source and drain and the reduced channel area. © 2012 Elsevier Ltd. All rights reserved.

Transfer-free fabrication of graphene transistors

OpenAIRE

Wessely, P.J.; Wessely, F.; Birinci, E.; Schwalke, U.; Riedinger, B.

2012-01-01

The authors invented a method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. To stimulate the growth of graphene layers on oxidized silicon, a catalyst system of nanometer thin aluminum/nickel double layer is used. This catalyst system is structured via liftoff before the wafer enters the catalytic chemical vapor deposition (CCVD) chamber. In the subsequent methane-based growth process, monolayer graphene field-effect transistors and...

Study of performance scaling of 22-nm epitaxial delta-doped channel MOS transistor

Science.gov (United States)

Sengupta, Sarmista; Pandit, Soumya

2015-06-01

Epitaxial delta-doped channel (EδDC) profile is a promising approach for extending the scalability of bulk metal oxide semiconductor (MOS) technology for low-power system-on-chip applications. A comparative study between EδDC bulk MOS transistor with gate length Lg = 22 nm and a conventional uniformly doped channel (UDC) bulk MOS transistor, with respect to various digital and analogue performances, is presented. The study has been performed using Silvaco technology computer-aided design device simulator, calibrated with experimental results. This study reveals that at smaller gate length, EδDC transistor outperforms the UDC transistor with respect to various studied performances. The reduced contribution of the lateral electric field in the channel plays the key role in this regard. Further, the carrier mobility in EδDC transistor is higher compared to UDC transistor. For moderate gate and drain bias, the impact ionisation rate of the carriers for EδDC MOS transistor is lower than that of the UDC transistor. In addition, at 22 nm, the performances of a EδDC transistor are competitive to that of an ultra-thin body silicon-on-insulator transistor.

On the 50th Anniversary of the Transistor

DEFF Research Database (Denmark)

Stassen, Flemming

1997-01-01

This paper celebrates the 50th anniversary of the invention of the bipolar transistor in 1947. Combined with the inventions of integration and planar technology, the invention of the transistor marks the beginning of a period of unprecedented growth, the industrialization of electronics....

Common features of a vortex structure in long exponentially shaped Josephson junctions and Josephson junctions with inhomogeneities

International Nuclear Information System (INIS)

Boyadjiev, T.L.; Semerdjieva, E.G.; Shukrinov, Yu.M.

2007-01-01

We study the vortex structure in three different models of the long Josephson junction: the exponentially shaped Josephson junction and the Josephson junctions with the resistor and the shunt inhomogeneities in the barrier layer. For these three models the critical curves 'critical current-magnetic field' are numerically constructed. We develop the idea of the equivalence of the exponentially shaped Josephson junction and the rectangular junction with the distributed inhomogeneity and demonstrate that at some parameters of the shunt and the resistor inhomogeneities in the ends of the junction the corresponding critical curves are very close to the exponentially shaped one

Strain on field effect transistors with single–walled–carbon nanotube network on flexible substrate

Energy Technology Data Exchange (ETDEWEB)

Kim, T. G. [Samsung Advanced Institute of Technology, Research center for Time-domain Nano-functional Device, Giheung, Yong-In, Gyeonggi 446-712 (Korea, Republic of); Department of Electrical Engineering, Korea University, Anam-dong, Seongbuk-gu, Seoul 136-713 (Korea, Republic of); Kim, U. J.; Lee, E. H. [Samsung Advanced Institute of Technology, Frontier Research Laboratory, Giheung, Yong-In, Gyeonggi 446-712 (Korea, Republic of); Hwang, J. S. [School of Advanced Materials Science and Engineering, SKKU Advanced Institute of Nanotechnology, Sungkyunkwan University, Suwon, Gyeonggi 440-746 (Korea, Republic of); Hwang, S. W., E-mail: swnano.hwang@samsung.com, E-mail: sangsig@korea.ac.kr [Samsung Advanced Institute of Technology, Research center for Time-domain Nano-functional Device, Giheung, Yong-In, Gyeonggi 446-712 (Korea, Republic of); Samsung Advanced Institute of Technology, Frontier Research Laboratory, Giheung, Yong-In, Gyeonggi 446-712 (Korea, Republic of); Kim, S., E-mail: swnano.hwang@samsung.com, E-mail: sangsig@korea.ac.kr [Department of Electrical Engineering, Korea University, Anam-dong, Seongbuk-gu, Seoul 136-713 (Korea, Republic of)

2013-12-07

We have systematically analyzed the effect of strain on the electrical properties of flexible field effect transistors with a single-walled carbon nanotube (SWCNT) network on a polyethersulfone substrate. The strain was applied and estimated at the microscopic scale (<1 μm) by using scanning electron microscope (SEM) equipped with indigenously designed special bending jig. Interestingly, the strain estimated at the microscopic scale was found to be significantly different from the strain calculated at the macroscopic scale (centimeter-scale), by a factor of up to 4. Further in-depth analysis using SEM indicated that the significant difference in strain, obtained from two different measurement scales (microscale and macroscale), could be attributed to the formation of cracks and tears in the SWCNT network, or at the junction of SWCNT network and electrode during the strain process. Due to this irreversible morphological change, the electrical properties, such as on current level and field effect mobility, lowered by 14.3% and 4.6%, respectively.

Completely independent electrical control of spin and valley in a silicene field effect transistor

International Nuclear Information System (INIS)

Zhai, Xuechao; Jin, Guojun

2016-01-01

One-atom-thick silicene is a silicon-based hexagonal-lattice material with buckled structure, where an electron fuses multiple degrees of freedom including spin, sublattice pseudospin and valley. We here demonstrate that a valley-selective spin filter (VSSF) that supports single-valley and single-spin transport can be realized in a silicene field effect transistor constructed of an npn junction, where an antiferromagnetic exchange field and a perpendicular electric field are applied in the p -doped region. The nontrivial VSSF property benefits from an electrically controllable state of spin-polarized single-valley Dirac cone. By reversing the electric field direction, the device can operate as a spin-reversed but valley-unreversed filter due to the dependence of band gap on spin and valley. Further, we find that all the possible spin-valley configurations of VSSF can be achieved just by tuning the electric field. Our findings pave the way to the realization of completely independent electrical control of spin and valley in silicene circuits. (paper)

Design of a magnetic-tunnel-junction-oriented nonvolatile lookup table circuit with write-operation-minimized data shifting

Science.gov (United States)

Suzuki, Daisuke; Hanyu, Takahiro

2018-04-01

A magnetic-tunnel-junction (MTJ)-oriented nonvolatile lookup table (LUT) circuit, in which a low-power data-shift function is performed by minimizing the number of write operations in MTJ devices is proposed. The permutation of the configuration memory cell for read/write access is performed as opposed to conventional direct data shifting to minimize the number of write operations, which results in significant write energy savings in the data-shift function. Moreover, the hardware cost of the proposed LUT circuit is small since the selector is shared between read access and write access. In fact, the power consumption in the data-shift function and the transistor count are reduced by 82 and 52%, respectively, compared with those in a conventional static random-access memory-based implementation using a 90 nm CMOS technology.

Organic electrochemical transistors

Science.gov (United States)

Rivnay, Jonathan; Inal, Sahika; Salleo, Alberto; Owens, Róisín M.; Berggren, Magnus; Malliaras, George G.

2018-02-01

Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.

Organic electrochemical transistors

KAUST Repository

Rivnay, Jonathan

2018-01-16

Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.

Magnetophoretic transistors in a tri-axial magnetic field.

Science.gov (United States)

Abedini-Nassab, Roozbeh; Joh, Daniel Y; Albarghouthi, Faris; Chilkoti, Ashutosh; Murdoch, David M; Yellen, Benjamin B

2016-10-18

The ability to direct and sort individual biological and non-biological particles into spatially addressable locations is fundamentally important to the emerging field of single cell biology. Towards this goal, we demonstrate a new class of magnetophoretic transistors, which can switch single magnetically labeled cells and magnetic beads between different paths in a microfluidic chamber. Compared with prior work on magnetophoretic transistors driven by a two-dimensional in-plane rotating field, the addition of a vertical magnetic field bias provides significant advantages in preventing the formation of particle clumps and in better replicating the operating principles of circuits in general. However, the three-dimensional driving field requires a complete redesign of the magnetic track geometry and switching electrodes. We have solved this problem by developing several types of transistor geometries which can switch particles between two different tracks by either presenting a local energy barrier or by repelling magnetic objects away from a given track, hereby denoted as "barrier" and "repulsion" transistors, respectively. For both types of transistors, we observe complete switching of magnetic objects with currents of ∼40 mA, which is consistent over a range of particle sizes (8-15 μm). The switching efficiency was also tested at various magnetic field strengths (50-90 Oe) and driving frequencies (0.1-0.6 Hz); however, we again found that the device performance only weakly depended on these parameters. These findings support the use of these novel transistor geometries to form circuit architectures in which cells can be placed in defined locations and retrieved on demand.

Characterization of ionizing radiation effects in MOS structures by study of bipolar operation; Caracterisation des effets induits par irradiations ionisantes dans des structures MOS a partir de leur fonctionnement en regime bipolaire

Energy Technology Data Exchange (ETDEWEB)

Bakhtiar, H. [Univ. Teknologi Malaysia, Dept. of Physics, Johor (Malaysia); Picard, C.; Brisset, C. [CEA Saclay, Lab. d' Electronique et de Technologie de l' Informatique, LETI, 91 - Gif-sur-Yvette (France); Bakhtiar, H.; Hoffmann, A.; Charles, J.P. [Metz Univ., LICM-CLOES-Supelec, 57 (France)

1999-07-01

This work presents an original method to characterize radiation effects of micronic transistors. The characterization includes a study of the transistor substrate-drain junction and current gain variation of the bipolar transistor (drain-substrate-source as emitter-base-collector) for different gate voltages. (author000.

Simulation of a spintronic transistor: A study of its performance

International Nuclear Information System (INIS)

Pela, R.R.; Teles, L.K.

2009-01-01

We study theoretically the magnetic bipolar transistor, and compare its performance with common bipolar transistor. We present not only the simulation results for the characteristic curves, but also other relevant parameters related with its performance, such as: the current amplification factor, the open-loop gain, the hybrid parameters and the cutoff frequency. We noted that the spin-charge coupling introduces new phenomena that enrich the functionality characteristics of the magnetic bipolar transistor. Among other things, it has an adjustable band structure, which may be modified during the device operation; it exhibits the already known spin-voltaic effect. On the other hand, we observed that it is necessary a large g-factor to analyze the influence of the field B over the transistor. Nevertheless, we consider the magnetic bipolar transistor as a promising device for spintronic applications

SPICE modelling of magnetic tunnel junctions written by spin-transfer torque

Energy Technology Data Exchange (ETDEWEB)

Guo, W; Prenat, G; De Mestier, N; Baraduc, C; Dieny, B [SPINTEC, UMR(8191), INAC, CEA/CNRS/UJF, 17 Av. des Martyrs, 38054 Grenoble Cedex 9 (France); Javerliac, V; El Baraji, M, E-mail: guillaume.prenat@cea.f [CROCUS Technology, 5 Place Robert Schuman, 38025 Grenoble (France)

2010-06-02

Spintronics aims at extending the possibility of conventional electronics by using not only the charge of the electron but also its spin. The resulting spintronic devices, combining the front-end complementary metal oxide semiconductor technology of electronics with a magnetic back-end technology, employ magnetic tunnel junctions (MTJs) as core elements. With the intent of simulating a circuit without fabricating it first, a reliable MTJ electrical model which is applicable to the standard SPICE (Simulation Program with Integrated Circuit Emphasis) simulator is required. Since such a model was lacking so far, we present a MTJ SPICE model whose magnetic state is written by using the spin-transfer torque effect. This model has been developed in the C language and validated on the Cadence Virtuoso Platform with a Spectre simulator. Its operation is similar to that of the standard BSIM (Berkeley Short-channel IGFET Model) SPICE model of the MOS transistor and fully compatible with the SPICE electrical simulator. The simulation results obtained using this model have been found in good accord with those theoretical macrospin calculations and results.

Behavior of tight-junction, adherens-junction and cell polarity proteins during HNF-4α-induced epithelial polarization

International Nuclear Information System (INIS)

Satohisa, Seiro; Chiba, Hideki; Osanai, Makoto; Ohno, Shigeo; Kojima, Takashi; Saito, Tsuyoshi; Sawada, Norimasa

2005-01-01

We previously reported that expression of tight-junction molecules occludin, claudin-6 and claudin-7, as well as establishment of epithelial polarity, was triggered in mouse F9 cells expressing hepatocyte nuclear factor (HNF)-4α [H. Chiba, T. Gotoh, T. Kojima, S. Satohisa, K. Kikuchi, M. Osanai, N. Sawada. Hepatocyte nuclear factor (HNF)-4α triggers formation of functional tight junctions and establishment of polarized epithelial morphology in F9 embryonal carcinoma cells, Exp. Cell Res. 286 (2003) 288-297]. Using these cells, we examined in the present study behavior of tight-junction, adherens-junction and cell polarity proteins and elucidated the molecular mechanism behind HNF-4α-initiated junction formation and epithelial polarization. We herein show that not only ZO-1 and ZO-2, but also ZO-3, junctional adhesion molecule (JAM)-B, JAM-C and cell polarity proteins PAR-3, PAR-6 and atypical protein kinase C (aPKC) accumulate at primordial adherens junctions in undifferentiated F9 cells. In contrast, CRB3, Pals1 and PATJ appeared to exhibit distinct subcellular localization in immature cells. Induced expression of HNF-4α led to translocation of these tight-junction and cell polarity proteins to beltlike tight junctions, where occludin, claudin-6 and claudin-7 were assembled, in differentiated cells. Interestingly, PAR-6, aPKC, CRB3 and Pals1, but not PAR-3 or PATJ, were also concentrated on the apical membranes in differentiated cells. These findings indicate that HNF-4α provokes not only expression of tight-junction adhesion molecules, but also modulation of subcellular distribution of junction and cell polarity proteins, resulting in junction formation and epithelial polarization

Flexible 2D layered material junctions

Science.gov (United States)

Balabai, R.; Solomenko, A.

2018-03-01

Within the framework of the methods of the electron density functional and the ab initio pseudopotential, we have obtained the valence electron density spatial distribution, the densities of electron states, the widths of band gaps, the charges on combined regions, and the Coulomb potentials for graphene-based flexible 2D layered junctions, using author program complex. It is determined that the bending of the 2D layered junctions on the angle α leads to changes in the electronic properties of these junctions. In the graphene/graphane junction, there is clear charge redistribution with different signs in the regions of junctions. The presence in the heterojunctions of charge regions with different signs leads to the formation of potential barriers. The greatest potential jump is in the graphene/fluorographene junction. The greatest value of the band gap width is in the graphene/graphane junction.

Inexpensive Measuring System for the Characterization of Organic Transistors

Directory of Open Access Journals (Sweden)

Clara Pérez-Fuster

2018-01-01

Full Text Available A measuring module has been specifically designed for the electrical characterization of organic semiconductor devices such as organic field effect transistors (OFETs and organic electrochemical transistors (OECTs according to the IEEE 1620-2008 standard. This device has been tested with OFETs based on 6,13-bis(triisopropylsilylethinylpentacene (TIPS-pentacene. The measuring system has been constructed using a NI-PXIe-1073 chassis with integrated controller and two NI-PXI-4132 programmable high-precision source measure units (SMUs that offer a four-quadrant ± 100 V output, with resolution down to 10 pA. LabVIEW™ has been used to develop the appropriate program. Most of the main OFET parameters included in the IEEE 1620 standard can be measured by means of this device. Although nowadays expensive devices for the characterization of Si-based transistors are available, devices for the characterization of organic transistors are not yet widespread in the market. Fabrication of a specific and flexible module that can be used to characterize this type of transistors would provide a powerful tool to researchers.

Total dose effects on the matching properties of deep submicron MOS transistors

International Nuclear Information System (INIS)

Wang Yuxin; Hu Rongbin; Li Ruzhang; Chen Guangbing; Fu Dongbing; Lu Wu

2014-01-01

Based on 0.18 μm MOS transistors, for the first time, the total dose effects on the matching properties of deep submicron MOS transistors are studied. The experimental results show that the total dose radiation magnifies the mismatch among identically designed MOS transistors. In our experiments, as the radiation total dose rises to 200 krad, the threshold voltage and drain current mismatch percentages of NMOS transistors increase from 0.55% and 1.4% before radiation to 17.4% and 13.5% after radiation, respectively. PMOS transistors seem to be resistant to radiation damage. For all the range of radiation total dose, the threshold voltage and drain current mismatch percentages of PMOS transistors keep under 0.5% and 2.72%, respectively. (semiconductor devices)

A Klein-tunneling transistor with ballistic graphene

Energy Technology Data Exchange (ETDEWEB)

Wilmart, Quentin; Fève, Gwendal; Berroir, Jean-Marc; Plaçais, Bernard [Laboratoire Pierre Aigrain, Ecole Normale Supérieure, CNRS (UMR 8551), Université P et M Curie, Université D Diderot, 24, rue Lhomond, 75231 Paris Cedex 05 (France); Berrada, Salim; Hung Nguyen, V; Dollfus, Philippe [Institute of Fundamental Electronics, Univ. Paris-Sud, CNRS, Orsay (France); Torrin, David [Département de Physique, Ecole Polytechnique, 91128 Palaiseau (France)

2014-06-15

Today, the availability of high mobility graphene up to room temperature makes ballistic transport in nanodevices achievable. In particular, p-n-p transistors in the ballistic regime give access to Klein tunneling physics and allow the realization of devices exploiting the optics-like behavior of Dirac Fermions (DFs) as in the Veselago lens or the Fabry–Pérot cavity. Here we propose a Klein tunneling transistor based on the geometrical optics of DFs. We consider the case of a prismatic active region delimited by a triangular gate, where total internal reflection may occur, which leads to the tunable suppression of transistor transmission. We calculate the transmission and the current by means of scattering theory and the finite bias properties using non-equilibrium Green's function (NEGF) simulation. (letter)

Top-gated chemical vapor deposition grown graphene transistors with current saturation.

Science.gov (United States)

Bai, Jingwei; Liao, Lei; Zhou, Hailong; Cheng, Rui; Liu, Lixin; Huang, Yu; Duan, Xiangfeng

2011-06-08

Graphene transistors are of considerable interest for radio frequency (rf) applications. In general, transistors with large transconductance and drain current saturation are desirable for rf performance, which is however nontrivial to achieve in graphene transistors. Here we report high-performance top-gated graphene transistors based on chemical vapor deposition (CVD) grown graphene with large transconductance and drain current saturation. The graphene transistors were fabricated with evaporated high dielectric constant material (HfO(2)) as the top-gate dielectrics. Length scaling studies of the transistors with channel length from 5.6 μm to 100 nm show that complete current saturation can be achieved in 5.6 μm devices and the saturation characteristics degrade as the channel length shrinks down to the 100-300 nm regime. The drain current saturation was primarily attributed to drain bias induced shift of the Dirac points. With the selective deposition of HfO(2) gate dielectrics, we have further demonstrated a simple scheme to realize a 300 nm channel length graphene transistors with self-aligned source-drain electrodes to achieve the highest transconductance of 250 μS/μm reported in CVD graphene to date.

The Dissolution of Double Holliday Junctions

DEFF Research Database (Denmark)

Bizard, Anna H; Hickson, Ian D

2014-01-01

as "double Holliday junction dissolution." This reaction requires the cooperative action of a so-called "dissolvasome" comprising a Holliday junction branch migration enzyme (Sgs1/BLM RecQ helicase) and a type IA topoisomerase (Top3/TopoIIIα) in complex with its OB (oligonucleotide/oligosaccharide binding......Double Holliday junctions (dHJS) are important intermediates of homologous recombination. The separate junctions can each be cleaved by DNA structure-selective endonucleases known as Holliday junction resolvases. Alternatively, double Holliday junctions can be processed by a reaction known......) fold containing accessory factor (Rmi1). This review details our current knowledge of the dissolution process and the players involved in catalyzing this mechanistically complex means of completing homologous recombination reactions....

Outlook and Emerging Semiconducting Materials for Ambipolar Transistors

NARCIS (Netherlands)

Bisri, Satria Zulkarnaen; Piliego, Claudia; Gao, Jia; Loi, Maria Antonietta

Ambipolar or bipolar transistors are transistors in which both holes and electrons are mobile inside the conducting channel. This device allows switching among several states: the hole-dominated on-state, the off-state, and the electron-dominated on-state. In the past year, it has attracted great

Ambipolar charge transport in organic field-effect transistors

NARCIS (Netherlands)

Smits, E.C.P.; Anthopoulos, T.D.; Setayesh, S.; Veenendaal, van E.; Coehoorn, R.; Blom, P.W.M.; Boer, de B.; Leeuw, de D.M.

2006-01-01

A model describing charge transport in disordered ambipolar organic field-effect transistors is presented. The basis of this model is the variable-range hopping in an exponential density of states developed for disordered unipolar organic transistors. We show that the model can be used to calculate

Quantum Junction Solar Cells

KAUST Repository

Tang, Jiang

2012-09-12

Colloidal quantum dot solids combine convenient solution-processing with quantum size effect tuning, offering avenues to high-efficiency multijunction cells based on a single materials synthesis and processing platform. The highest-performing colloidal quantum dot rectifying devices reported to date have relied on a junction between a quantum-tuned absorber and a bulk material (e.g., TiO 2); however, quantum tuning of the absorber then requires complete redesign of the bulk acceptor, compromising the benefits of facile quantum tuning. Here we report rectifying junctions constructed entirely using inherently band-aligned quantum-tuned materials. Realizing these quantum junction diodes relied upon the creation of an n-type quantum dot solid having a clean bandgap. We combine stable, chemically compatible, high-performance n-type and p-type materials to create the first quantum junction solar cells. We present a family of photovoltaic devices having widely tuned bandgaps of 0.6-1.6 eV that excel where conventional quantum-to-bulk devices fail to perform. Devices having optimal single-junction bandgaps exhibit certified AM1.5 solar power conversion efficiencies of 5.4%. Control over doping in quantum solids, and the successful integration of these materials to form stable quantum junctions, offers a powerful new degree of freedom to colloidal quantum dot optoelectronics. © 2012 American Chemical Society.

Characterization of various Si-photodiode junction combinations and layout specialities in 0.18µm CMOS and HV-CMOS technologies

Science.gov (United States)

Jonak-Auer, I.; Synooka, O.; Kraxner, A.; Roger, F.

2017-12-01

With the ongoing miniaturization of CMOS technologies the need for integrated optical sensors on smaller scale CMOS nodes arises. In this paper we report on the development and implementation of different optical sensor concepts in high performance 0.18µm CMOS and high voltage (HV) CMOS technologies on three different substrate materials. The integration process is such that complete modularity of the CMOS processes remains untouched and no additional masks or ion implantation steps are necessary for the sensor integration. The investigated processes support 1.8V and 3V standard CMOS functionality as well as HV transistors capable of operating voltages of 20V and 50V. These processes intrinsically offer a wide variety of junction combinations, which can be exploited for optical sensing purposes. The availability of junction depths from submicron to several microns enables the selection of spectral range from blue to infrared wavelengths. By appropriate layout the contributions of photo-generated carriers outside the target spectral range can be kept to a minimum. Furthermore by making use of other features intrinsically available in 0.18µm CMOS and HV-CMOS processes dark current rates of optoelectronic devices can be minimized. We present TCAD simulations as well as spectral responsivity, dark current and capacitance data measured for various photodiode layouts and the influence of different EPI and Bulk substrate materials thereon. We show examples of spectral responsivity of junction combinations optimized for peak sensitivity in the ranges of 400-500nm, 550-650nm and 700-900nm. Appropriate junction combination enables good spectral resolution for colour sensing applications even without any additional filter implementation. We also show that by appropriate use of shallow trenches dark current values of photodiodes can further be reduced.

Tunnel field-effect transistor with two gated intrinsic regions

Directory of Open Access Journals (Sweden)

Y. Zhang

2014-07-01

Full Text Available In this paper, we propose and validate (using simulations a novel design of silicon tunnel field-effect transistor (TFET, based on a reverse-biased p+-p-n-n+ structure. 2D device simulation results show that our devices have significant improvements of switching performance compared with more conventional devices based on p-i-n structure. With independent gate voltages applied to two gated intrinsic regions, band-to-band tunneling (BTBT could take place at the p-n junction, and no abrupt degenerate doping profile is required. We developed single-side-gate (SSG structure and double-side-gate (DSG structure. SSG devices with HfO2 gate dielectric have a point subthreshold swing of 9.58 mV/decade, while DSG devices with polysilicon gate electrode material and HfO2 gate dielectric have a point subthreshold swing of 16.39 mV/decade. These DSG devices have ON-current of 0.255 μA/μm, while that is lower for SSG devices. Having two nano-scale independent gates will be quite challenging to realize with good uniformity across the wafer and the improved behavior of our TFET makes it a promising steep-slope switch candidate for further investigations.

Influence of the substrate platform on the opto-electronic properties of multi-layer organic light-emitting field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Generali, Gianluca; Capelli, Raffaella; Toffanin, Stefano; Muccini, Michele [Consiglio Nazionale delle Ricerche (CNR), Istituto per lo Studio dei Materiali Nanostrutturati (ISMN), via P. Gobetti 101, I-40129 Bologna (Italy); Dinelli, Franco, E-mail: g.generali@bo.ismn.cnr.it, E-mail: m.muccini@bo.ismn.cnr.it [Consiglio Nazionale delle Ricerche (CNR), INO U.O.S. ' A. Gozzini' Area della Ricerca di Pisa - S. Cataldo, via Moruzzi 1, I-56124 Pisa (Italy)

2011-06-08

In this paper, we present a study of the effects of the influence of the substrate platform on the properties of a three-layer vertical hetero-junction made of thin films of {alpha}, {omega}-diperfluorohexyl-4T (DHF4T), a blend of tris(8-hydroxyquinoline)aluminium (Alq3) and 4-(dicyanomethylene)-2-methyl-6-(p-dimethylaminostyryl)-4H-pyran (DCM) and {alpha}, {omega}-dihexyl-quaterthiophene (DH4T). The hetero-junction represents the active component of an organic light-emitting transistor (OLET). The substrate platforms investigated in this study are glass/indium-tin-oxide/poly(methyl-methacrylate) (PMMA) and Si{sup ++}/silicon oxide (SiO{sub 2})/PMMA. The first platform is almost completely transparent to light and therefore is very promising for use in OLET applications. The second one has been chosen for comparison as it employs standard microelectronic materials, i.e. Si{sup ++}/SiO{sub 2}. We show how different gate materials and structure can affect the relevant field-effect electrical characteristics, such as the charge mobility and threshold voltage. By means of an atomic force microscopy analysis, a systematic study has been made in order to correlate the morphology of the active layers with the electrical properties of the devices.

Very High Frequency Two-Port Characterization of Transistors

DEFF Research Database (Denmark)

Hertel, Jens Christian; Nour, Yasser; Jørgensen, Ivan Harald Holger

To properly use transistors in VHF converters, they need to be characterized under similar conditions. This research presents a two-port method, using a network analyzer (NWA) with a S-port setup. The method is a one-shot method, providing fast results of the off-state parasitics of the transistors....

High current transistor pulse generator

International Nuclear Information System (INIS)

Nesterov, V.; Cassel, R.

1991-05-01

A solid state pulse generator capable of delivering high current trapezoidally shaped pulses into an inductive load has been developed at SLAC. Energy stored in the capacitor bank of the pulse generator is switched to the load through a pair of Darlington transistors. A combination of diodes and Darlington transistors is used to obtain trapezoidal or triangular shaped current pulses into an inductive load and to recover the remaining energy in the same capacitor bank without reversing capacitor voltage. The transistors work in the switch mode, and the power losses are low. The rack mounted pulse generators presently used at SLAC contain a 660 microfarad storage capacitor bank and can deliver 400 amps at 800 volts into inductive loads up to 3 mH. The pulse generators are used in several different power systems, including pulse to pulse bipolar power supplies and in application with current pulses distributed into different inductive loads. The current amplitude and discharge time are controlled by the central computer system through a specially developed multichannel controller. Several years of operation with the pulse generators have proven their consistent performance and reliability. 8 figs

Simulación y modelado de transistores MOS de doble puerta

OpenAIRE

Cartujo Cassinello, Pedro

2013-01-01

En este trabajo se hace un estudio del transistor MOS de doble puerta analizando las posibles ventajas de esta nueva estructura frene al transistor convencional y el transistor MOS SOI de puerta simple. Para ello se ha analizado una sección transversal de un transistor MOS de doble puerta de canal N, con el fin de examinar detalladamente las peculiaridades de la distribución de electrones con una amplia variedad de valores de todos los parámentros tecnológicos y condiciones de operación, y se...

Transport Mechanisms in Organic Thin-Film Transistors

Science.gov (United States)

Fung, A. W. P.

1996-03-01

Recent success in fabricating field-effect transistors with polycrystalline α-sexithiophene (α-6T) has allowed us to study charge transport in this organic semiconductor. The appealing structural property that the oligomer chains are seated almost perpendicular to the substrate provides a model π-conjugated system which we find exhibits band transport at low temperatures. We observe a behavioral transition around 50K which is consistent with the metal-insulator transition in Holstein's small-polaron theory. The fact that we can observe intrinsic behavior means that the ambient-temperature mobility obtained in these transistors is optimal for α-6T. Agreement with the Holstein theory provides us with a prescription for rational design of materials for organic transistor applications. Work done in collaboration with L. Torsi, A. Dodabalapur, L. J. Rothberg and H. E. Katz.

A Klein-tunneling transistor with ballistic graphene

International Nuclear Information System (INIS)

Wilmart, Quentin; Fève, Gwendal; Berroir, Jean-Marc; Plaçais, Bernard; Berrada, Salim; Hung Nguyen, V; Dollfus, Philippe; Torrin, David

2014-01-01

Today, the availability of high mobility graphene up to room temperature makes ballistic transport in nanodevices achievable. In particular, p-n-p transistors in the ballistic regime give access to Klein tunneling physics and allow the realization of devices exploiting the optics-like behavior of Dirac Fermions (DFs) as in the Veselago lens or the Fabry–Pérot cavity. Here we propose a Klein tunneling transistor based on the geometrical optics of DFs. We consider the case of a prismatic active region delimited by a triangular gate, where total internal reflection may occur, which leads to the tunable suppression of transistor transmission. We calculate the transmission and the current by means of scattering theory and the finite bias properties using non-equilibrium Green's function (NEGF) simulation. (letter)

Molecular electronic junction transport

DEFF Research Database (Denmark)

Solomon, Gemma C.; Herrmann, Carmen; Ratner, Mark

2012-01-01

Whenasinglemolecule,oracollectionofmolecules,isplacedbetween two electrodes and voltage is applied, one has a molecular transport junction. We discuss such junctions, their properties, their description, and some of their applications. The discussion is qualitative rather than quantitative, and f...

Gap junctions and motor behavior

DEFF Research Database (Denmark)

Kiehn, Ole; Tresch, Matthew C.

2002-01-01

The production of any motor behavior requires coordinated activity in motor neurons and premotor networks. In vertebrates, this coordination is often assumed to take place through chemical synapses. Here we review recent data suggesting that electrical gap-junction coupling plays an important role...... in coordinating and generating motor outputs in embryonic and early postnatal life. Considering the recent demonstration of a prevalent expression of gap-junction proteins and gap-junction structures in the adult mammalian spinal cord, we suggest that neuronal gap-junction coupling might also contribute...... to the production of motor behavior in adult mammals....

A spiking neuron circuit based on a carbon nanotube transistor

International Nuclear Information System (INIS)

Chen, C-L; Kim, K; Truong, Q; Shen, A; Li, Z; Chen, Y

2012-01-01

A spiking neuron circuit based on a carbon nanotube (CNT) transistor is presented in this paper. The spiking neuron circuit has a crossbar architecture in which the transistor gates are connected to its row electrodes and the transistor sources are connected to its column electrodes. An electrochemical cell is incorporated in the gate of the transistor by sandwiching a hydrogen-doped poly(ethylene glycol)methyl ether (PEG) electrolyte between the CNT channel and the top gate electrode. An input spike applied to the gate triggers a dynamic drift of the hydrogen ions in the PEG electrolyte, resulting in a post-synaptic current (PSC) through the CNT channel. Spikes input into the rows trigger PSCs through multiple CNT transistors, and PSCs cumulate in the columns and integrate into a ‘soma’ circuit to trigger output spikes based on an integrate-and-fire mechanism. The spiking neuron circuit can potentially emulate biological neuron networks and their intelligent functions. (paper)

Reprogrammable read only variable threshold transistor memory with isolated addressing buffer

Science.gov (United States)

Lodi, Robert J.

1976-01-01

A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.

Ferromagnetic Josephson Junctions for Cryogenic Memory

Science.gov (United States)

Niedzielski, Bethany M.; Gingrich, Eric C.; Khasawneh, Mazin A.; Loloee, Reza; Pratt, William P., Jr.; Birge, Norman O.

2015-03-01

Josephson junctions containing ferromagnetic materials are of interest for both scientific and technological purposes. In principle, either the amplitude of the critical current or superconducting phase shift across the junction can be controlled by the relative magnetization directions of the ferromagnetic layers in the junction. Our approach concentrates on phase control utilizing two junctions in a SQUID geometry. We will report on efforts to control the phase of junctions carrying either spin-singlet or spin-triplet supercurrent for cryogenic memory applications. Supported by Northorp Grumman Corporation and by IARPA under SPAWAR Contract N66001-12-C-2017.

Tetracene-based organic light-emitting transistors: optoelectronic properties and electron injection mechanism

NARCIS (Netherlands)

Santato, C.; Capelli, R.; Loi, M.A.; Murgia, M.; Cicoira, F.; Roy, Arunesh; Stallinga, P; Zamboni, R.; Rost, C.; Karg, S.F.; Muccini, M.

2004-01-01

Optoelectronic properties of light-emitting field-effect transistors (LETs) fabricated on bottom-contact transistor structures using a tetracene film as charge-transport and light-emitting material are investigated. Electroluminescence generation and transistor current are correlated, and the bias

Nonlinear photoresponse of field effect transistors terahertz detectors at high irradiation intensities

International Nuclear Information System (INIS)

But, D. B.; Drexler, C.; Ganichev, S. D.; Sakhno, M. V.; Sizov, F. F.; Dyakonova, N.; Drachenko, O.; Gutin, A.; Knap, W.

2014-01-01

Terahertz power dependence of the photoresponse of field effect transistors, operating at frequencies from 0.1 to 3 THz for incident radiation power density up to 100 kW/cm 2 was studied for Si metal–oxide–semiconductor field-effect transistors and InGaAs high electron mobility transistors. The photoresponse increased linearly with increasing radiation intensity up to the kW/cm 2 range. Nonlinearity followed by saturation of the photoresponse was observed for all investigated field effect transistors for intensities above several kW/cm 2 . The observed photoresponse nonlinearity is explained by nonlinearity and saturation of the transistor channel current. A theoretical model of terahertz field effect transistor photoresponse at high intensity was developed. The model explains quantitative experimental data both in linear and nonlinear regions. Our results show that dynamic range of field effect transistors is very high and can extend over more than six orders of magnitudes of power densities (from ∼0.5 mW/cm 2 to ∼5 kW/cm 2 )

Failure rates for accelerated acceptance testing of silicon transistors

Science.gov (United States)

Toye, C. R.

1968-01-01

Extrapolation tables for the control of silicon transistor product reliability have been compiled. The tables are based on a version of the Arrhenius statistical relation and are intended to be used for low- and medium-power silicon transistors.

Electromechanical field effect transistors based on multilayer phosphorene nanoribbons

Energy Technology Data Exchange (ETDEWEB)

Jiang, Z.T., E-mail: jiangzhaotan@hotmail.com; Lv, Z.T.; Zhang, X.D.

2017-06-21

Based on the tight-binding Hamiltonian approach, we demonstrate that the electromechanical field effect transistors (FETs) can be realized by using the multilayer phosphorene nanoribbons (PNRs). The synergistic combination of the electric field and the external strains can establish the on–off switching since the electric field can shift or split the energy band, and the mechanical strains can widen or narrow the band widths. This kind of multilayer PNR FETs, much solider than the monolayer PNR one and more easily biased by different electric fields, has more transport channels consequently leading to the higher on–off current ratio or the higher sensitivity to the electric fields. Meanwhile, the strain-induced band-flattening will be beneficial for improving the flexibility in designing the electromechanical FETs. In addition, such electromechanical FETs can act as strain-controlled FETs or mechanical detectors for detecting the strains, indicating their potential applications in nano- and micro-electromechanical fields. - Highlights: • Electromechanical transistors are designed with multilayer phosphorene nanoribbons. • Electromechanical synergistic effect can establish the on–off switching more flexibly. • Multilayer transistors, solider and more easily biased, has more transport channels. • Electromechanical transistors can act as strain-controlled transistors or mechanical detectors.

T-gate aligned nanotube radio frequency transistors and circuits with superior performance.

Science.gov (United States)

Che, Yuchi; Lin, Yung-Chen; Kim, Pyojae; Zhou, Chongwu

2013-05-28

In this paper, we applied self-aligned T-gate design to aligned carbon nanotube array transistors and achieved an extrinsic current-gain cutoff frequency (ft) of 25 GHz, which is the best on-chip performance for nanotube radio frequency (RF) transistors reported to date. Meanwhile, an intrinsic current-gain cutoff frequency up to 102 GHz is obtained, comparable to the best value reported for nanotube RF transistors. Armed with the excellent extrinsic RF performance, we performed both single-tone and two-tone measurements for aligned nanotube transistors at a frequency up to 8 GHz. Furthermore, we utilized T-gate aligned nanotube transistors to construct mixing and frequency doubling analog circuits operated in gigahertz frequency regime. Our results confirm the great potential of nanotube-based circuit applications and indicate that nanotube transistors are promising building blocks in high-frequency electronics.

Characteristics of Schottky-barrier source/drain metal-oxide-polycrystalline thin-film transistors on glass substrates

International Nuclear Information System (INIS)

Jung, Seung-Min; Cho, Won-Ju; Jung, Jong-Wan

2012-01-01

Polycrystalline-silicon (poly-Si) Schottky-barrier thin-film transistors (SB-TFTs) with Pt-silicided source /drain junctions were fabricated on glass substrates, and the electrical characteristics were examined. The amorphous silicon films on glass substrates were converted into high-quality poly-Si by using excimer laser annealing (ELA) and solid phase crystallization (SPC) methods. The crystallinity of poly-Si was analyzed by using scanning electron microscopy, transmission electron microscopy, and X-ray diffraction analysis. The silicidation process was optimized by measuring the electrical characteristics of the Pt-silicided Schottky diodes. The performances of Pt-silicided SB-TFTs using poly-Si films on glass substrates and crystallized by using ELA and SPC were demonstrated. The SB-TFTs using the ELA poly-Si film demonstrated better electrical performances such as higher mobility (22.4 cm 2 /Vs) and on/off current ratio (3 x 10 6 ) and lower subthreshold swing value (120 mV/dec) than the SPC poly-Si films.

Electronic noise of superconducting tunnel junction detectors

International Nuclear Information System (INIS)

Jochum, J.; Kraus, H.; Gutsche, M.; Kemmather, B.; Feilitzsch, F. v.; Moessbauer, R.L.

1994-01-01

The optimal signal to noise ratio for detectors based on superconducting tunnel junctions is calculated and compared for the cases of a detector consisting of one single tunnel junction, as well as of series and of parallel connections of such tunnel junctions. The influence of 1 / f noise and its dependence on the dynamical resistance of tunnel junctions is discussed quantitatively. A single tunnel junction yields the minimum equivalent noise charge. Such a tunnel junction exhibits the best signal to noise ratio if the signal charge is independent of detector size. In case, signal charge increases with detector size, a parallel or a series connection of tunnel junctions would provide the optimum signal to noise ratio. The equivalent noise charge and the respective signal to noise ratio are deduced as functions of tunnel junction parameters such as tunneling time, quasiparticle lifetime, etc. (orig.)

AlN/GaN heterostructures for normally-off transistors

Energy Technology Data Exchange (ETDEWEB)

Zhuravlev, K. S., E-mail: zhur@isp.nsc.ru; Malin, T. V.; Mansurov, V. G.; Tereshenko, O. E. [Russian Academy of Sciences, Rzhanov Institute of Semiconductor Physics, Siberian Branch (Russian Federation); Abgaryan, K. K.; Reviznikov, D. L. [Dorodnicyn Computing Centre of the Russian Academy of Sciences (Russian Federation); Zemlyakov, V. E.; Egorkin, V. I. [National Research University of Electronic Technology (MIET) (Russian Federation); Parnes, Ya. M.; Tikhomirov, V. G. [Joint Stock Company “Svetlana-Electronpribor” (Russian Federation); Prosvirin, I. P. [Russian Academy of Sciences, Boreskov Institute of Catalysis, Siberian Branch (Russian Federation)

2017-03-15

The structure of AlN/GaN heterostructures with an ultrathin AlN barrier is calculated for normally-off transistors. The molecular-beam epitaxy technology of in situ passivated SiN/AlN/GaN heterostructures with a two-dimensional electron gas is developed. Normally-off transistors with a maximum current density of ~1 A/mm, a saturation voltage of 1 V, a transconductance of 350 mS/mm, and a breakdown voltage of more than 60 V are demonstrated. Gate lag and drain lag effects are almost lacking in these transistors.

Tunnel Field-Effect Transistors in 2-D Transition Metal Dichalcogenide Materials

Science.gov (United States)

Ilatikhameneh, Hesameddin; Tan, Yaohua; Novakovic, Bozidar; Klimeck, Gerhard; Rahman, Rajib; Appenzeller, Joerg

2015-12-01

In this work, the performance of Tunnel Field-Effect Transistors (TFETs) based on two-dimensional Transition Metal Dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. One of the major challenges of TFETs is their low ON-currents. 2D material based TFETs can have tight gate control and high electric fields at the tunnel junction, and can in principle generate high ON-currents along with a sub-threshold swing smaller than 60 mV/dec. Our simulations reveal that high performance TMD TFETs, not only require good gate control, but also rely on the choice of the right channel material with optimum band gap, effective mass and source/drain doping level. Unlike previous works, a full band atomistic tight binding method is used self-consistently with 3D Poisson equation to simulate ballistic quantum transport in these devices. The effect of the choice of TMD material on the performance of the device and its transfer characteristics are discussed. Moreover, the criteria for high ON-currents are explained with a simple analytic model, showing the related fundamental factors. Finally, the subthreshold swing and energy-delay of these TFETs are compared with conventional CMOS devices.

High performance tunnel field-effect transistor by gate and source engineering.

Science.gov (United States)

Huang, Ru; Huang, Qianqian; Chen, Shaowen; Wu, Chunlei; Wang, Jiaxin; An, Xia; Wang, Yangyuan

2014-12-19

As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I(ON)/I(OFF) ratio (∼ 10(7)) at V(DS) = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high ION/IOFF ratio of ∼ 10(8) and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec(-1) was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching.

Photolithographically Patterned TiO2 Films for Electrolyte-Gated Transistors.

Science.gov (United States)

Valitova, Irina; Kumar, Prajwal; Meng, Xiang; Soavi, Francesca; Santato, Clara; Cicoira, Fabio

2016-06-15

Metal oxides constitute a class of materials whose properties cover the entire range from insulators to semiconductors to metals. Most metal oxides are abundant and accessible at moderate cost. Metal oxides are widely investigated as channel materials in transistors, including electrolyte-gated transistors, where the charge carrier density can be modulated by orders of magnitude upon application of relatively low electrical bias (2 V). Electrolyte gating offers the opportunity to envisage new applications in flexible and printed electronics as well as to improve our current understanding of fundamental processes in electronic materials, e.g. insulator/metal transitions. In this work, we employ photolithographically patterned TiO2 films as channels for electrolyte-gated transistors. TiO2 stands out for its biocompatibility and wide use in sensing, electrochromics, photovoltaics and photocatalysis. We fabricated TiO2 electrolyte-gated transistors using an original unconventional parylene-based patterning technique. By using a combination of electrochemical and charge carrier transport measurements we demonstrated that patterning improves the performance of electrolyte-gated TiO2 transistors with respect to their unpatterned counterparts. Patterned electrolyte-gated (EG) TiO2 transistors show threshold voltages of about 0.9 V, ON/OFF ratios as high as 1 × 10(5), and electron mobility above 1 cm(2)/(V s).

Controlling the dimensionality of charge transport in organic thin-film transistors

Science.gov (United States)

Laiho, Ari; Herlogsson, Lars; Forchheimer, Robert; Crispin, Xavier; Berggren, Magnus

2011-01-01

Electrolyte-gated organic thin-film transistors (OTFTs) can offer a feasible platform for future flexible, large-area and low-cost electronic applications. These transistors can be divided into two groups on the basis of their operation mechanism: (i) field-effect transistors that switch fast but carry much less current than (ii) the electrochemical transistors which, on the contrary, switch slowly. An attractive approach would be to combine the benefits of the field-effect and the electrochemical transistors into one transistor that would both switch fast and carry high current densities. Here we report the development of a polyelectrolyte-gated OTFT based on conjugated polyelectrolytes, and we demonstrate that the OTFTs can be controllably operated either in the field-effect or the electrochemical regime. Moreover, we show that the extent of electrochemical doping can be restricted to a few monolayers of the conjugated polyelectrolyte film, which allows both high current densities and fast switching speeds at the same time. We propose an operation mechanism based on self-doping of the conjugated polyelectrolyte backbone by its ionic side groups. PMID:21876143

Nanometer size field effect transistors for terahertz detectors

International Nuclear Information System (INIS)

Knap, W; Rumyantsev, S; Coquillat, D; Dyakonova, N; Teppe, F; Vitiello, M S; Tredicucci, A; Blin, S; Shur, M; Nagatsuma, T

2013-01-01

Nanometer size field effect transistors can operate as efficient resonant or broadband terahertz detectors, mixers, phase shifters and frequency multipliers at frequencies far beyond their fundamental cut-off frequency. This work is an overview of some recent results concerning the application of nanometer scale field effect transistors for the detection of terahertz radiation. (paper)

Atomic-scaled characterization of graphene PN junctions

Science.gov (United States)

Zhou, Xiaodong; Wang, Dennis; Dadgar, Ali; Agnihotri, Pratik; Lee, Ji Ung; Reuter, Mark C.; Ross, Frances M.; Pasupathy, Abhay N.

Graphene p-n junctions are essential devices for studying relativistic Klein tunneling and the Veselago lensing effect in graphene. We have successfully fabricated graphene p-n junctions using both lithographically pre-patterned substrates and the stacking of vertical heterostructures. We then use our 4-probe STM system to characterize the junctions. The ability to carry out scanning electron microscopy (SEM) in our STM instrument is essential for us to locate and measure the junction interface. We obtain both the topography and dI/dV spectra at the junction area, from which we track the shift of the graphene chemical potential with position across the junction interface. This allows us to directly measure the spatial width and roughness of the junction and its potential barrier height. We will compare the junction properties of devices fabricated by the aforementioned two methods and discuss their effects on the performance as a Veselago lens.

Comparison of MOS capacitor and transistor postirradiation response

International Nuclear Information System (INIS)

McWhorter, P.J.; Fleetwood, D.M.; Pastorek, R.A.; Zimmerman, G.T.

1989-01-01

The postirradiation response of MOS capacitors and transistors fabricated on the same chip has been examined as a function of dose and anneal bias. A variety of analysis techniques are used to evaluate the postirradiation response of these structures, including low and high frequency capacitance-voltage techniques, subthreshold current-voltage techniques, and charge pumping. Though there are changes in the postirradiation energy spectrum of ΔD it , no clear evidence of defect transformation is observed on transistors or capacitors under any conditions examined. Postirradiation response at 80 degrees C is found to be similar in the two structures for low levels of damage (100 krad). For both structures, interface-trap densities continue to grow following irradiation under these conditions. In contrast, the postirradiation response of capacitors and transistors can differ qualitatively at higher levels of damage (1 Mrad), with interface-traps increasing postirradiation at 80 degrees C for transistors and annealing for capacitors. These results indicate that capacitor structures may not be suitable for hardness assurance studies that involve elevated temperature irradiations or postirradiation anneals

Switching Characteristics of Ferroelectric Transistor Inverters

Science.gov (United States)

Laws, Crystal; Mitchell, Coey; MacLeod, Todd C.; Ho, Fat D.

2010-01-01

This paper presents the switching characteristics of an inverter circuit using a ferroelectric field effect transistor, FeFET. The propagation delay time characteristics, phl and plh are presented along with the output voltage rise and fall times, rise and fall. The propagation delay is the time-delay between the V50% transitions of the input and output voltages. The rise and fall times are the times required for the output voltages to transition between the voltage levels V10% and V90%. Comparisons are made between the MOSFET inverter and the ferroelectric transistor inverter.

Effect of initial material on the electrolytic parameters of field-effect transistors

International Nuclear Information System (INIS)

Antonov, A.V.; Sinitsyn, V.N.; Fursov, V.V.

1978-01-01

The effect of initial material parameters upon the main electric characteristics of field transistors at room and optimum (170 deg C) temperatures is studied. For that purpose, the values of parasitic resistances rsub(s), specific resistances rho and steepness S of field transistors, depending on temperature and electrical conditions were measured. The output volt-ampere characteristics of the transistors at room and optimum temperatures are given. An analysis of the results obtained permits to conclude that there is an unambiguous relationship between rho and rsub(s). Impact ionization is shown to occur for field transistors with lower rho at lower drain voltage. When manufacturing field transistors designed for operation at low temperatures, one should remember that a minimum rho may restrict maximum possible steepness. When designing field transistors with optimum noise characteristics, one should variate not only such material parameters as mobility and carrier density, but also select optimum geometry

Molecular thermal transistor: Dimension analysis and mechanism

Science.gov (United States)

Behnia, S.; Panahinia, R.

2018-04-01

Recently, large challenge has been spent to realize high efficient thermal transistors. Outstanding properties of DNA make it as an excellent nano material in future technologies. In this paper, we introduced a high efficient DNA based thermal transistor. The thermal transistor operates when the system shows an increase in the thermal flux despite of decreasing temperature gradient. This is what called as negative differential thermal resistance (NDTR). Based on multifractal analysis, we could distinguish regions with NDTR state from non-NDTR state. Moreover, Based on dimension spectrum of the system, it is detected that NDTR state is accompanied by ballistic transport regime. The generalized correlation sum (analogous to specific heat) shows that an irregular decrease in the specific heat induces an increase in the mean free path (mfp) of phonons. This leads to the occurrence of NDTR.

A III-V nanowire channel on silicon for high-performance vertical transistors.

Science.gov (United States)

Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

2012-08-09

Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

p-i-n Homojunction in Organic Light-Emitting Transistors

NARCIS (Netherlands)

Bisri, Satria Zulkarnaen; Takenobu, Taishi; Sawabe, Kosuke; Tsuda, Satoshi; Yomogidao, Yohei; Yamao, Takeshi; Hotta, Shu; Adachi, Chihaya; Iwasa, Yoshihiro

2011-01-01

A new method for investigating light-emitting property in organic devices is demonstrated. We apply the ambipolar light-emitting transistors (LETS) to directly observe the recombination zone, and find a strong link between the transistor performance and the zone size. This finding unambiguously

Dopant profile engineering of advanced Si MOSFET's using ion implantation

International Nuclear Information System (INIS)

Stolk, P.A.; Ponomarev, Y.V.; Schmitz, J.; Brandenburg, A.C.M.C. van; Roes, R.; Montree, A.H.; Woerlee, P.H.

1999-01-01

Ion implantation has been used to realize non-uniform, steep retrograde (SR) dopant profiles in the active channel region of advanced Si MOSFET's. After defining the transistor configuration, SR profiles were formed by dopant implantation through the polycrystalline Si gate and the gate oxide (through-the-gate, TG, implantation). The steep nature of the as-implanted profile was retained by applying rapid thermal annealing for dopant activation and implantation damage removal. For NMOS transistors, TG implantation of B yields improved transistor performance through increased carrier mobility, reduced junction capacitances, and reduced susceptibility to short-channel effects. Electrical measurements show that the gate oxide quality is not deteriorated by the ion-induced damage, demonstrating that transistor reliability is preserved. For PMOS transistors, TG implantation of P or As leads to unacceptable source/drain junction broadening as a result of transient enhanced dopant diffusion during thermal activation

Development and Experimental Evaluation of an Automated Multi-Media Course on Transistors.

Science.gov (United States)

Whitted, J.H., Jr.; And Others

A completely automated multi-media self-study program for teaching a portion of electronic solid-state fundamentals was developed. The subject matter areas included were fundamental theory of transistors, transistor amplifier fundamentals, and simple mathematical analysis of transistors including equivalent circuits, parameters, and characteristic…

Radio frequency and linearity performance of transistors using high-purity semiconducting carbon nanotubes.

Science.gov (United States)

Wang, Chuan; Badmaev, Alexander; Jooyaie, Alborz; Bao, Mingqiang; Wang, Kang L; Galatsis, Kosmas; Zhou, Chongwu

2011-05-24

This paper reports the radio frequency (RF) and linearity performance of transistors using high-purity semiconducting carbon nanotubes. High-density, uniform semiconducting nanotube networks are deposited at wafer scale using our APTES-assisted nanotube deposition technique, and RF transistors with channel lengths down to 500 nm are fabricated. We report on transistors exhibiting a cutoff frequency (f(t)) of 5 GHz and with maximum oscillation frequency (f(max)) of 1.5 GHz. Besides the cutoff frequency, the other important figure of merit for the RF transistors is the device linearity. For the first time, we report carbon nanotube RF transistor linearity metrics up to 1 GHz. Without the use of active probes to provide the high impedance termination, the measurement bandwidth is therefore not limited, and the linearity measurements can be conducted at the frequencies where the transistors are intended to be operating. We conclude that semiconducting nanotube-based transistors are potentially promising building blocks for highly linear RF electronics and circuit applications.

Lifetime prediction of InGaZnO thin film transistor for the application of display device and BEOL-transistors

Science.gov (United States)

Kim, Sang Min; Cho, Won Ju; Yu, Chong Gun; Park, Jong Tae

2018-04-01

In this work, the lifetime prediction models of amorphous InGaZnO thin film transistors (a-IGZO TFTs) were suggested for the application of display device and BEOL (Back End Of line) transistors with embedded a-IGZO TFTs. Four different types of test devices according to the active layer thickness, source/drain electrode materials and thermal treatments have been used to verify the suggested model. The device lifetimes under high gate bias stress and hot carrier stress were extracted through fittings of the stretched-exponential equation for threshold voltage shifts and the current estimation method for drain current degradations. Our suggested lifetime prediction models could be used in any kinds of structures of a-IGZO TFTs for the application of display device and BEOL transistors. The a-IGZO TFTs with embedded ITO local conducting layer under source/drain is better for BEOL transistor application and a-IGZO TFTs with InGaZnO thin film as source/drain electrodes may be better for the application of display devices. From 1983 to 1985, he was a Researcher at Gold-Star Semiconductor, Inc., Korea, where he worked on the development of SRAM. He joined the Department of Electronics Engineering, University of Incheon, Incheon, Korea, in 1987, where he is a Professor. As a visiting scientist at Massachusetts Institute of Technology, Cambridge, in 1991, he conducted research in hot carrier reliability of CMOS. As a visiting scholar at University of California, Davis, in 2001, he conducted research on the device structure of Nano-scale SOI CMOS. His recent interests are device structure and reliability of Nano-scale CMOS devices, flash memory, and thin film transistors.

Stability of large-area molecular junctions

NARCIS (Netherlands)

Akkerman, Hylke B.; Kronemeijer, Auke J.; Harkema, Jan; van Hal, Paul A.; Smits, Edsger C. P.; de Leeuw, Dago M.; Blom, Paul W. M.

The stability of molecular junctions is crucial for any application of molecular electronics. Degradation of molecular junctions when exposed to ambient conditions is regularly observed. In this report the stability of large-area molecular junctions under ambient conditions for more than two years

Superconducting flux qubits with π-junctions

International Nuclear Information System (INIS)

Shcherbakova, Anastasia

2014-01-01

In this thesis, we present a fabrication technology of Al/AlO x /Al Josephson junctions on Nb pads. The described technology gives the possibility of combining a variety of Nb-based superconducting circuits, like pi-junction phase-shifters with sub-micron Al/AlO x /Al junctions. Using this approach, we fabricated hybrid Nb/Al flux qubits with and without the SFS-junctions and studied dispersive magnetic field response of these qubits as well as their spectroscopy characteristics.

Resonance Transport of Graphene Nanoribbon T-Shaped Junctions

International Nuclear Information System (INIS)

Xiao-Lan, Kong; Yong-Jian, Xiong

2010-01-01

We investigate the transport properties of T-shaped junctions composed of armchair graphene nanoribbons of different widths. Three types of junction geometries are considered. The junction conductance strongly depends on the atomic features of the junction geometry. When the shoulders of the junction have zigzag type edges, sharp conductance resonances usually appear in the low energy region around the Dirac point, and a conductance gap emerges. When the shoulders of the junction have armchair type edges, the conductance resonance behavior is weakened significantly, and the metal-metal-metal junction structures show semimetallic behaviors. The contact resistance also changes notably due to the various interface geometries of the junction

Mesoscopic photon heat transistor

DEFF Research Database (Denmark)

Ojanen, T.; Jauho, Antti-Pekka

2008-01-01

We show that the heat transport between two bodies, mediated by electromagnetic fluctuations, can be controlled with an intermediate quantum circuit-leading to the device concept of a mesoscopic photon heat transistor (MPHT). Our theoretical analysis is based on a novel Meir-Wingreen-Landauer-typ......We show that the heat transport between two bodies, mediated by electromagnetic fluctuations, can be controlled with an intermediate quantum circuit-leading to the device concept of a mesoscopic photon heat transistor (MPHT). Our theoretical analysis is based on a novel Meir......-Wingreen-Landauer-type of conductance formula, which gives the photonic heat current through an arbitrary circuit element coupled to two dissipative reservoirs at finite temperatures. As an illustration we present an exact solution for the case when the intermediate circuit can be described as an electromagnetic resonator. We discuss...

Epitaxial growth of a monolayer WSe2-MoS2 lateral p-n junction with an atomically sharp interface

KAUST Repository

Li, Ming Yang

2015-07-30

Two-dimensional transition metal dichalcogenides (TMDCs) such as molybdenum sulfide MoS2 and tungsten sulfide WSe2 have potential applications in electronics because they exhibit high on-off current ratios and distinctive electro-optical properties. Spatially connected TMDC lateral heterojunctions are key components for constructing monolayer p-n rectifying diodes, light-emitting diodes, photovoltaic devices, and bipolar junction transistors. However, such structures are not readily prepared via the layer-stacking techniques, and direct growth favors the thermodynamically preferred TMDC alloys. We report the two-step epitaxial growth of lateral WSe2-MoS2 heterojunction, where the edge of WSe2 induces the epitaxial MoS2 growth despite a large lattice mismatch. The epitaxial growth process offers a controllable method to obtain lateral heterojunction with an atomically sharp interface.

Monolithic acoustic graphene transistors based on lithium niobate thin film

Science.gov (United States)

Liang, J.; Liu, B.-H.; Zhang, H.-X.; Zhang, H.; Zhang, M.-L.; Zhang, D.-H.; Pang, W.

2018-05-01

This paper introduces an on-chip acoustic graphene transistor based on lithium niobate thin film. The graphene transistor is embedded in a microelectromechanical systems (MEMS) acoustic wave device, and surface acoustic waves generated by the resonator induce a macroscopic current in the graphene due to the acousto-electric (AE) effect. The acoustic resonator and the graphene share the lithium niobate film, and a gate voltage is applied through the back side of the silicon substrate. The AE current induced by the Rayleigh and Sezawa modes was investigated, and the transistor outputs a larger current in the Rayleigh mode because of a larger coupling to velocity ratio. The output current increases linearly with the input radiofrequency power and can be effectively modulated by the gate voltage. The acoustic graphene transistor realized a five-fold enhancement in the output current at an optimum gate voltage, outperforming its counterpart with a DC input. The acoustic graphene transistor demonstrates a paradigm for more-than-Moore technology. By combining the benefits of MEMS and graphene circuits, it opens an avenue for various system-on-chip applications.

Josephson junctions with ferromagnetic interlayer

International Nuclear Information System (INIS)

Wild, Georg Hermann

2012-01-01

We report on the fabrication of superconductor/insulator/ferromagnetic metal/superconductor (Nb/AlO x /Pd 0.82 Ni 0.18 /Nb) Josephson junctions (SIFS JJs) with high critical current densities, large normal resistance times area products, and high quality factors. For these junctions, a transition from 0- to π-coupling is observed for a thickness d F =6 nm of the ferromagnetic Pd 0.82 Ni 0.18 interlayer. The magnetic field dependence of the critical current of the junctions demonstrates good spatial homogeneity of the tunneling barrier and ferromagnetic interlayer. Magnetic characterization shows that the Pd 0.82 Ni 0.18 has an out-of-plane anisotropy and large saturation magnetization indicating negligible dead layers at the interfaces. A careful analysis of Fiske modes up to about 400 GHz provides valuable information on the junction quality factor and the relevant damping mechanisms. Whereas losses due to quasiparticle tunneling dominate at low frequencies, at high frequencies the damping is explained by the finite surface resistance of the junction electrodes. High quality factors of up to 30 around 200 GHz have been achieved. They allow to study the junction dynamics, in particular the switching probability from the zero-voltage into the voltage state with and without microwave irradiation. The experiments with microwave irradiation are well explained within semi-classical models and numerical simulations. In contrast, at mK temperature the switching dynamics without applied microwaves clearly shows secondary quantum effects. Here, we could observe for the first time macroscopic quantum tunneling in Josephson junctions with a ferromagnetic interlayer. This observation excludes fluctuations of the critical current as a consequence of an unstable magnetic domain structure of the ferromagnetic interlayer and affirms the suitability of SIFS Josephson junctions for quantum information processing.

Josephson junctions with ferromagnetic interlayer

Energy Technology Data Exchange (ETDEWEB)

Wild, Georg Hermann

2012-03-04

We report on the fabrication of superconductor/insulator/ferromagnetic metal/superconductor (Nb/AlO{sub x}/Pd{sub 0.82}Ni{sub 0.18}/Nb) Josephson junctions (SIFS JJs) with high critical current densities, large normal resistance times area products, and high quality factors. For these junctions, a transition from 0- to {pi}-coupling is observed for a thickness d{sub F}=6 nm of the ferromagnetic Pd{sub 0.82}Ni{sub 0.18} interlayer. The magnetic field dependence of the critical current of the junctions demonstrates good spatial homogeneity of the tunneling barrier and ferromagnetic interlayer. Magnetic characterization shows that the Pd{sub 0.82}Ni{sub 0.18} has an out-of-plane anisotropy and large saturation magnetization indicating negligible dead layers at the interfaces. A careful analysis of Fiske modes up to about 400 GHz provides valuable information on the junction quality factor and the relevant damping mechanisms. Whereas losses due to quasiparticle tunneling dominate at low frequencies, at high frequencies the damping is explained by the finite surface resistance of the junction electrodes. High quality factors of up to 30 around 200 GHz have been achieved. They allow to study the junction dynamics, in particular the switching probability from the zero-voltage into the voltage state with and without microwave irradiation. The experiments with microwave irradiation are well explained within semi-classical models and numerical simulations. In contrast, at mK temperature the switching dynamics without applied microwaves clearly shows secondary quantum effects. Here, we could observe for the first time macroscopic quantum tunneling in Josephson junctions with a ferromagnetic interlayer. This observation excludes fluctuations of the critical current as a consequence of an unstable magnetic domain structure of the ferromagnetic interlayer and affirms the suitability of SIFS Josephson junctions for quantum information processing.

DEVICE TECHNOLOGY. Nanomaterials in transistors: From high-performance to thin-film applications.

Science.gov (United States)

Franklin, Aaron D

2015-08-14

For more than 50 years, silicon transistors have been continuously shrunk to meet the projections of Moore's law but are now reaching fundamental limits on speed and power use. With these limits at hand, nanomaterials offer great promise for improving transistor performance and adding new applications through the coming decades. With different transistors needed in everything from high-performance servers to thin-film display backplanes, it is important to understand the targeted application needs when considering new material options. Here the distinction between high-performance and thin-film transistors is reviewed, along with the benefits and challenges to using nanomaterials in such transistors. In particular, progress on carbon nanotubes, as well as graphene and related materials (including transition metal dichalcogenides and X-enes), outlines the advances and further research needed to enable their use in transistors for high-performance computing, thin films, or completely new technologies such as flexible and transparent devices. Copyright © 2015, American Association for the Advancement of Science.

Dual-mode operation of 2D material-base hot electron transistors

KAUST Repository

Lan, Yann-Wen; Jr., Carlos M. Torres,; Zhu, Xiaodan; Qasem, Hussam; Adleman, James R.; Lerner, Mitchell B.; Tsai, Shin-Hung; Shi, Yumeng; Li, Lain-Jong; Yeh, Wen-Kuan; Wang, Kang L.

2016-01-01

Vertical hot electron transistors incorporating atomically-thin 2D materials, such as graphene or MoS2, in the base region have been proposed and demonstrated in the development of electronic and optoelectronic applications. To the best of our knowledge, all previous 2D material-base hot electron transistors only considered applying a positive collector-base potential (V-CB > 0) as is necessary for the typical unipolar hot-electron transistor behavior. Here we demonstrate a novel functionality, specifically a dual-mode operation, in our 2D material-base hot electron transistors (e.g. with either graphene or MoS2 in the base region) with the application of a negative collector-base potential (V-CB < 0). That is, our 2D material-base hot electron transistors can operate in either a hot-electron or a reverse-current dominating mode depending upon the particular polarity of VCB. Furthermore, these devices operate at room temperature and their current gains can be dynamically tuned by varying VCB. We anticipate our multi-functional dual-mode transistors will pave the way towards the realization of novel flexible 2D material-based high-density and low-energy hot-carrier electronic applications.

Dual-mode operation of 2D material-base hot electron transistors

KAUST Repository

Lan, Yann-Wen

2016-09-01

Vertical hot electron transistors incorporating atomically-thin 2D materials, such as graphene or MoS2, in the base region have been proposed and demonstrated in the development of electronic and optoelectronic applications. To the best of our knowledge, all previous 2D material-base hot electron transistors only considered applying a positive collector-base potential (V-CB > 0) as is necessary for the typical unipolar hot-electron transistor behavior. Here we demonstrate a novel functionality, specifically a dual-mode operation, in our 2D material-base hot electron transistors (e.g. with either graphene or MoS2 in the base region) with the application of a negative collector-base potential (V-CB < 0). That is, our 2D material-base hot electron transistors can operate in either a hot-electron or a reverse-current dominating mode depending upon the particular polarity of VCB. Furthermore, these devices operate at room temperature and their current gains can be dynamically tuned by varying VCB. We anticipate our multi-functional dual-mode transistors will pave the way towards the realization of novel flexible 2D material-based high-density and low-energy hot-carrier electronic applications.

Dual-mode operation of 2D material-base hot electron transistors.

Science.gov (United States)

Lan, Yann-Wen; Torres, Carlos M; Zhu, Xiaodan; Qasem, Hussam; Adleman, James R; Lerner, Mitchell B; Tsai, Shin-Hung; Shi, Yumeng; Li, Lain-Jong; Yeh, Wen-Kuan; Wang, Kang L

2016-09-01

Vertical hot electron transistors incorporating atomically-thin 2D materials, such as graphene or MoS2, in the base region have been proposed and demonstrated in the development of electronic and optoelectronic applications. To the best of our knowledge, all previous 2D material-base hot electron transistors only considered applying a positive collector-base potential (VCB > 0) as is necessary for the typical unipolar hot-electron transistor behavior. Here we demonstrate a novel functionality, specifically a dual-mode operation, in our 2D material-base hot electron transistors (e.g. with either graphene or MoS2 in the base region) with the application of a negative collector-base potential (VCB transistors can operate in either a hot-electron or a reverse-current dominating mode depending upon the particular polarity of VCB. Furthermore, these devices operate at room temperature and their current gains can be dynamically tuned by varying VCB. We anticipate our multi-functional dual-mode transistors will pave the way towards the realization of novel flexible 2D material-based high-density and low-energy hot-carrier electronic applications.

Parametrization of the radiation induced leakage current increase of NMOS transistors

International Nuclear Information System (INIS)

Backhaus, M.

2017-01-01

The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to silicon dioxide interface the leakage current results as a function of the exposure time to ionizing radiation. This function is fitted to data of the leakage current of single transistors as well as to data of the supply current of full ASICs.

Electron optics with ballistic graphene junctions

Science.gov (United States)

Chen, Shaowen

Electrons transmitted across a ballistic semiconductor junction undergo refraction, analogous to light rays across an optical boundary. A pn junction theoretically provides the equivalent of a negative index medium, enabling novel electron optics such as negative refraction and perfect (Veselago) lensing. In graphene, the linear dispersion and zero-gap bandstructure admit highly transparent pn junctions by simple electrostatic gating, which cannot be achieved in conventional semiconductors. Robust demonstration of these effects, however, has not been forthcoming. Here we employ transverse magnetic focusing to probe propagation across an electrostatically defined graphene junction. We find perfect agreement with the predicted Snell's law for electrons, including observation of both positive and negative refraction. Resonant transmission across the pn junction provides a direct measurement of the angle dependent transmission coefficient, and we demonstrate good agreement with theory. Comparing experimental data with simulation reveals the crucial role played by the effective junction width, providing guidance for future device design. Efforts toward sharper pn junction and possibility of zero field Veselago lensing will also be discussed. This work is supported by the Semiconductor Research Corporations NRI Center for Institute for Nanoelectronics Discovery and Exploration (INDEX).

Peltier cooling in molecular junctions

Science.gov (United States)

Cui, Longji; Miao, Ruijiao; Wang, Kun; Thompson, Dakotah; Zotti, Linda Angela; Cuevas, Juan Carlos; Meyhofer, Edgar; Reddy, Pramod

2018-02-01

The study of thermoelectricity in molecular junctions is of fundamental interest for the development of various technologies including cooling (refrigeration) and heat-to-electricity conversion1-4. Recent experimental progress in probing the thermopower (Seebeck effect) of molecular junctions5-9 has enabled studies of the relationship between thermoelectricity and molecular structure10,11. However, observations of Peltier cooling in molecular junctions—a critical step for establishing molecular-based refrigeration—have remained inaccessible. Here, we report direct experimental observations of Peltier cooling in molecular junctions. By integrating conducting-probe atomic force microscopy12,13 with custom-fabricated picowatt-resolution calorimetric microdevices, we created an experimental platform that enables the unified characterization of electrical, thermoelectric and energy dissipation characteristics of molecular junctions. Using this platform, we studied gold junctions with prototypical molecules (Au-biphenyl-4,4'-dithiol-Au, Au-terphenyl-4,4''-dithiol-Au and Au-4,4'-bipyridine-Au) and revealed the relationship between heating or cooling and charge transmission characteristics. Our experimental conclusions are supported by self-energy-corrected density functional theory calculations. We expect these advances to stimulate studies of both thermal and thermoelectric transport in molecular junctions where the possibility of extraordinarily efficient energy conversion has been theoretically predicted2-4,14.

Ferroelectric field-effect transistors based on solution-processed electrochemically exfoliated graphene

Science.gov (United States)

Heidler, Jonas; Yang, Sheng; Feng, Xinliang; Müllen, Klaus; Asadi, Kamal

2018-06-01

Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.

Dynamics of pi-junction interferometer circuits

DEFF Research Database (Denmark)

Kornkev, V.K.; Mozhaev, P.B.; Borisenko, I.V.

2002-01-01

The pi-junction superconducting circuit dynamics was studied by means of numerical simulation technique. Parallel arrays consisting of Josephson junctions of both 0- and pi-type were studied as a model of high-T-c grain-boundary Josephson junction. The array dynamics and the critical current depe...

Electrothermal Behavior of High-Frequency Silicon-On-Glass Transistors

NARCIS (Netherlands)

Nenadovic, N.

2004-01-01

In this thesis, research is focused on the investigation of electrothermal effects in high-speed silicon transistors. At high current levels the power dissipation in these devices can lead to heating of both the device itself and the adjacent devices. In advanced transistors these effects are

Controlling charge current through a DNA based molecular transistor

Energy Technology Data Exchange (ETDEWEB)

Behnia, S., E-mail: s.behnia@sci.uut.ac.ir; Fathizadeh, S.; Ziaei, J.

2017-01-05

Molecular electronics is complementary to silicon-based electronics and may induce electronic functions which are difficult to obtain with conventional technology. We have considered a DNA based molecular transistor and study its transport properties. The appropriate DNA sequence as a central chain in molecular transistor and the functional interval for applied voltages is obtained. I–V characteristic diagram shows the rectifier behavior as well as the negative differential resistance phenomenon of DNA transistor. We have observed the nearly periodic behavior in the current flowing through DNA. It is reported that there is a critical gate voltage for each applied bias which above it, the electrical current is always positive. - Highlights: • Modeling a DNA based molecular transistor and studying its transport properties. • Choosing the appropriate DNA sequence using the quantum chaos tools. • Choosing the functional interval for voltages via the inverse participation ratio tool. • Detecting the rectifier and negative differential resistance behavior of DNA.

Transport spectroscopy of coupled donors in silicon nano-transistors

Science.gov (United States)

Moraru, Daniel; Samanta, Arup; Anh, Le The; Mizuno, Takeshi; Mizuta, Hiroshi; Tabe, Michiharu

2014-01-01

The impact of dopant atoms in transistor functionality has significantly changed over the past few decades. In downscaled transistors, discrete dopants with uncontrolled positions and number induce fluctuations in device operation. On the other hand, by gaining access to tunneling through individual dopants, a new type of devices is developed: dopant-atom-based transistors. So far, most studies report transport through dopants randomly located in the channel. However, for practical applications, it is critical to control the location of the donors with simple techniques. Here, we fabricate silicon transistors with selectively nanoscale-doped channels using nano-lithography and thermal-diffusion doping processes. Coupled phosphorus donors form a quantum dot with the ground state split into a number of levels practically equal to the number of coupled donors, when the number of donors is small. Tunneling-transport spectroscopy reveals fine features which can be correlated with the different numbers of donors inside the quantum dot, as also suggested by first-principles simulation results. PMID:25164032

Magnon transistor for all-magnon data processing.

Science.gov (United States)

Chumak, Andrii V; Serga, Alexander A; Hillebrands, Burkard

2014-08-21

An attractive direction in next-generation information processing is the development of systems employing particles or quasiparticles other than electrons--ideally with low dissipation--as information carriers. One such candidate is the magnon: the quasiparticle associated with the eigen-excitations of magnetic materials known as spin waves. The realization of single-chip all-magnon information systems demands the development of circuits in which magnon currents can be manipulated by magnons themselves. Using a magnonic crystal--an artificial magnetic material--to enhance nonlinear magnon-magnon interactions, we have succeeded in the realization of magnon-by-magnon control, and the development of a magnon transistor. We present a proof of concept three-terminal device fabricated from an electrically insulating magnetic material. We demonstrate that the density of magnons flowing from the transistor's source to its drain can be decreased three orders of magnitude by the injection of magnons into the transistor's gate.

Geodynamical simulation of the RRF triple junction

Science.gov (United States)

Wang, Z.; Wei, D.; Liu, M.; Shi, Y.; Wang, S.

2017-12-01

Triple junction is the point at which three plate boundaries meet. Three plates at the triple junction form a complex geological tectonics, which is a natural laboratory to study the interactions of plates. This work studies a special triple junction, the oceanic transform fault intersects the collinear ridges with different-spreading rates, which is free of influence of ridge-transform faults and nearby hotspots. First, we build 3-D numerical model of this triple junction used to calculate the stead-state velocity and temperature fields resulting from advective and conductive heat transfer. We discuss in detail the influence of the velocity and temperature fields of the triple junction from viscosity, spreading rate of the ridge. The two sides of the oceanic transform fault are different sensitivities to the two factors. And, the influence of the velocity mainly occurs within 200km of the triple junction. Then, we modify the model by adding a ridge-transform fault to above model and directly use the velocity structure of the Macquarie triple junction. The simulation results show that the temperature at both sides of the oceanic transform fault decreases gradually from the triple junction, but the temperature difference between the two sides is a constant about 200°. And, there is little effect of upwelling velocity away from the triple junction 100km. The model results are compared with observational data. The heat flux and thermal topography along the oceanic transform fault of this model are consistent with the observed data of the Macquarie triple junction. The earthquakes are strike slip distributed along the oceanic transform fault. Their depths are also consistent with the zone of maximum shear stress. This work can help us to understand the interactions of plates of triple junctions and help us with the foundation for the future study of triple junctions.

Investigation of Impact of the Gate Circuitry on IGBT Transistor Dynamic Parameters

Directory of Open Access Journals (Sweden)

Vytautas Bleizgys

2011-03-01

Full Text Available The impact of Insulated Gate Bipolar Transistor driver circuit parameters on the rise and fall time of the collector current and voltage collector-emitter was investigated. The influence of transistor driver circuit parameters on heating of Insulated Gate Bipolar Transistors was investigated as well.Article in Lithuanian

Loss models for long Josephson junctions

DEFF Research Database (Denmark)

Olsen, O. H.; Samuelsen, Mogens Rugholm

1984-01-01

A general model for loss mechanisms in long Josephson junctions is presented. An expression for the zero-field step is found for a junction of overlap type by means of a perturbation method. Comparison between analytic solution and perturbation result shows good agreement.......A general model for loss mechanisms in long Josephson junctions is presented. An expression for the zero-field step is found for a junction of overlap type by means of a perturbation method. Comparison between analytic solution and perturbation result shows good agreement....

Dynamics of the Josephson multi-junction system with junctions characterized by non-sinusoidal current - phase relationship

International Nuclear Information System (INIS)

Abal'osheva, I.; Lewandowski, S.J.

2004-01-01

It is shown that the inclusion of junctions characterized by non-sinusoidal current - phase relationship in the systems composed of multiple Josephson junctions - results in the appearance of additional system phase states. Numerical simulations and stability considerations confirm that those phase states can be realized in practice. Moreover, spontaneous formation of the grain boundary junctions in high-T c superconductors with non-trivial current-phase relations due to the d-wave symmetry of the order parameter is probable. Switching between the phase states of multiple grain boundary junction systems can lead to additional 1/f noise in high-T c superconductors. (author)

Theoretical and experimental investigations on synchronization in many-junction arrays of HTSC Josephson junctions. Final report

International Nuclear Information System (INIS)

Seidel, P.; Heinz, E.; Pfuch, A.; Machalett, F.; Krech, W.; Basler, M.

1996-06-01

Different many-junction arrays of Josephson junctions were studied theoretically to analyse the mechanisms of synchronization, the influence of internal and external parameters and the maximal allowed spread of parameters for the single junctions. Concepts to realize arrays using standard high-T c superconductor technology were created, e.g. the new arrangement of multijunction superconducting loops (MSL). First experimental results show the relevance of this concept. Intrinsic one-dimensional arrays in thin film technology were prepared as mesas out of Bi or Tl 2212 films. to characterize HTSC Josephson junctions methods based on the analysis of microwave-induced steps were developed. (orig.) [de

Single P-N junction tandem photovoltaic device

Science.gov (United States)

Walukiewicz, Wladyslaw [Kensington, CA; Ager, III, Joel W.; Yu, Kin Man [Lafayette, CA

2011-10-18

A single P-N junction solar cell is provided having two depletion regions for charge separation while allowing the electrons and holes to recombine such that the voltages associated with both depletion regions of the solar cell will add together. The single p-n junction solar cell includes an alloy of either InGaN or InAlN formed on one side of the P-N junction with Si formed on the other side in order to produce characteristics of a two junction (2J) tandem solar cell through only a single P-N junction. A single P-N junction solar cell having tandem solar cell characteristics will achieve power conversion efficiencies exceeding 30%.

Transistor-based filter for inhibiting load noise from entering a power supply

Science.gov (United States)

Taubman, Matthew S

2013-07-02

A transistor-based filter for inhibiting load noise from entering a power supply is disclosed. The filter includes a first transistor having an emitter coupled to a power supply, a collector coupled to a load, and a base. The filter also includes a first capacitor coupled between the base of the first transistor and a ground terminal. The filter further includes an impedance coupled between the base and a node between the collector and the load, or a second transistor and second capacitor. The impedance can be a resistor or an inductor.

The dual role of multiple-transistor charge sharing collection in single-event transients

International Nuclear Information System (INIS)

Guo Yang; Chen Jian-Jun; He Yi-Bai; Liang Bin; Liu Bi-Wei

2013-01-01

As technologies scale down in size, multiple-transistors being affected by a single ion has become a universal phenomenon, and some new effects are present in single event transients (SETs) due to the charge sharing collection of the adjacent multiple-transistors. In this paper, not only the off-state p-channel metal—oxide semiconductor field-effect transistor (PMOS FET), but also the on-state PMOS is struck by a heavy-ion in the two-transistor inverter chain, due to the charge sharing collection and the electrical interaction. The SET induced by striking the off-state PMOS is efficiently mitigated by the pulse quenching effect, but the SET induced by striking the on-state PMOS becomes dominant. It is indicated in this study that in the advanced technologies, the SET will no longer just be induced by an ion striking the off-state transistor, and the SET sensitive region will no longer just surround the off-state transistor either, as it is in the older technologies. We also discuss this issue in a three-transistor inverter in depth, and the study illustrates that the three-transistor inverter is still a better replacement for spaceborne integrated circuit design in advanced technologies. (condensed matter: structural, mechanical, and thermal properties)

Transistor analogs of emergent iono-neuronal dynamics.

Science.gov (United States)

Rachmuth, Guy; Poon, Chi-Sang

2008-06-01

Neuromorphic analog metal-oxide-silicon (MOS) transistor circuits promise compact, low-power, and high-speed emulations of iono-neuronal dynamics orders-of-magnitude faster than digital simulation. However, their inherently limited input voltage dynamic range vs power consumption and silicon die area tradeoffs makes them highly sensitive to transistor mismatch due to fabrication inaccuracy, device noise, and other nonidealities. This limitation precludes robust analog very-large-scale-integration (aVLSI) circuits implementation of emergent iono-neuronal dynamics computations beyond simple spiking with limited ion channel dynamics. Here we present versatile neuromorphic analog building-block circuits that afford near-maximum voltage dynamic range operating within the low-power MOS transistor weak-inversion regime which is ideal for aVLSI implementation or implantable biomimetic device applications. The fabricated microchip allowed robust realization of dynamic iono-neuronal computations such as coincidence detection of presynaptic spikes or pre- and postsynaptic activities. As a critical performance benchmark, the high-speed and highly interactive iono-neuronal simulation capability on-chip enabled our prompt discovery of a minimal model of chaotic pacemaker bursting, an emergent iono-neuronal behavior of fundamental biological significance which has hitherto defied experimental testing or computational exploration via conventional digital or analog simulations. These compact and power-efficient transistor analogs of emergent iono-neuronal dynamics open new avenues for next-generation neuromorphic, neuroprosthetic, and brain-machine interface applications.

Contribution to the study of the behaviour of silicon planar transistors exposed to the {sup 60}Co {gamma} rays; Contribution a l'etude du comportement des transistors silicium a structure plane soumis aux rayons {gamma} du {sup 60}Co

Energy Technology Data Exchange (ETDEWEB)

Le Ber, J [Commissariat a l' Energie Atomique, Saclay (France). Centre d' Etudes Nucleaires

1967-05-15

This report gives an account of studies carried out on bipolar silicon planar transistors irradiated by {sup 60}Co {gamma} rays. The author describes the interactions on the matter of the different types of particles and he gives a brief bibliographical recall of foreign studies. The technological structure of the planar transistors is then described in order to help the understanding of the phenomena, general comments are made about the choice of measured parameters and on the statistical interpretation of results. An automatic instrument for the measurement of the gain is described and the reproducibility of the results is stated The complexity of the problem and the difficulty to predict the behaviour of the semiconductors components are clearly shown. It is stated that the observed dispersions depend on: - the electrical bias during irradiation - the injection level in the emitter-base junction during the measurement - the manufacturer for a given type - the instantaneous dose rate - the geometry used The problem is then examined from the reliability point of view and methods are given to evaluate the reliability for a given dose - 'Worst case' method - moment method - Monte Carlo method. (author) [French] Ce rapport rend compte du travail effectue sur les transistors bipolaires au silicium irradies au rayons {gamma} du cobalt 60. On passe en revue les mecanismes d'interaction des differents rayonnements avec la matiere et on fait un bref rappel bibliographique des etudes effectuees a l'etranger. On decrit ensuite la structure technologique du transistor pour aider a la comprehension des phenomenes, puis on donne des generalites sur le choix des parametres mesures et l'interpretation statistique des resultats. On decrit l'ensemble du systeme de mesure de gain et on s'attache a montrer la reproductibilite des mesures. Les resultats experimentaux mentionnes etablissent clairement la complexite du probleme et la difficulte qu'il y a de faire des previsions. On

On the choice of a head element for low-noise bipolar transistor amplifier

International Nuclear Information System (INIS)

Krasnokutskij, R.N.; Kurchaninov, L.L.; Fedyakin, N.N.; Shuvalov, R.S.

1988-01-01

The measurement results of equivalent noise charge (ENC) for KT382 transistor depending on detector capacity, formation duration and collector current are given. It is shown that the measurement results for this transistor in good agreement with calculations according to the noise model, time-consuming ENC measurements can be replaced by preliminary transistor rejection according to the distributed base resistance, current gain and simple calculations. In applications in the field of nuclear electronics the KT382 transistor enables to attain the same noise parameters as NE578, NE021 transistors (Japan) and it can be recommended for using as a head element of amplifiers

Transistor regenerative spectrometer for 14N nuclear quadrupole resonance study

International Nuclear Information System (INIS)

Anferov, V.P.; Mikhal'kov, V.M.

1981-01-01

Improvement of the Robinson transducer for investigations of nuclear quadrupole resonance (NQR) in 14 N is described. Amplifier of the suggested transducer is made using p-n field effect transistor and small-noise SHF bipolar transistor. Such a circuit permits to obtain optimal relation between input resistance, low-frequency noises and transconductance which provides uniform gain of the transducer in the frequency range of 0.6-12 MHz and permits to construct a transistor spectrometer of NQR not yielding to a lamp spectrometer in sensitivity [ru

Parametrization of the radiation induced leakage current increase of NMOS transistors

CERN Document Server

Backhaus, Malte

2017-01-13

The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to si...

The anatomical locus of T-junction processing.

Science.gov (United States)

Schirillo, James A

2009-07-01

Inhomogeneous surrounds can produce either asymmetrical or symmetrical increment/decrement induction by orienting T-junctions to selectively group a test patch with surrounding regions [Melfi, T., & Schirillo, J. (2000). T-junctions in inhomogeneous surrounds. Vision Research, 40, 3735-3741]. The current experiments aimed to determine where T-junctions are processed by presenting each eye with a different image so that T-junctions exist only in the fused percept. Only minor differences were found between retinal and cortical versus cortical-only conditions, indicating that T-junctions are processed cortically.

Imperceptible and Ultraflexible p-Type Transistors and Macroelectronics Based on Carbon Nanotubes.

Science.gov (United States)

Cao, Xuan; Cao, Yu; Zhou, Chongwu

2016-01-26

Flexible thin-film transistors based on semiconducting single-wall carbon nanotubes are promising for flexible digital circuits, artificial skins, radio frequency devices, active-matrix-based displays, and sensors due to the outstanding electrical properties and intrinsic mechanical strength of carbon nanotubes. Nevertheless, previous research effort only led to nanotube thin-film transistors with the smallest bending radius down to 1 mm. In this paper, we have realized the full potential of carbon nanotubes by making ultraflexible and imperceptible p-type transistors and circuits with a bending radius down to 40 μm. In addition, the resulted transistors show mobility up to 12.04 cm(2) V(-1) S(-1), high on-off ratio (∼10(6)), ultralight weight (transistors and circuits have great potential to work as indispensable components for ultraflexible complementary electronics.

Vertical field effect tunneling transistor based on graphene-ultrathin Si nanomembrane heterostructures

Science.gov (United States)

Das, Tanmoy; Jang, Houk; Bok Lee, Jae; Chu, Hyunwoo; Kim, Seong Dae; Ahn, Jong-Hyun

2015-12-01

Graphene-based heterostructured vertical transistors have attracted a great deal of research interest. Herein we propose a Si-based technology platform for creating graphene/ultrathin semiconductor/metal (GSM) junctions, which can be applied to large-scale and low-power electronics compatible with a variety of substrates. We fabricated graphene/Si nanomembrane (NM)/metal vertical heterostructures by using a dry transfer technique to transfer Si NMs onto chemical vapor deposition-grown graphene layers. The resulting van der Waals interfaces between graphene and p-Si NMs exhibited nearly ideal Schottky barrier behavior. Due to the low density of states of graphene, the graphene/Si NM Schottky barrier height can be modulated by modulating the band profile in the channel region, yielding well-defined current modulation. We obtained a maximum current on/off ratio (Ion/Ioff) of up to ˜103, with a current density of 102 A cm-2. We also observed significant dependence of Schottky barrier height Δφb on the thickness of the Si NMs. We confirmed that the transport in these devices is dominated by the effects of the graphene/Si NM Schottky barrier.

Vertical field effect tunneling transistor based on graphene-ultrathin Si nanomembrane heterostructures

International Nuclear Information System (INIS)

Das, Tanmoy; Jang, Houk; Bok Lee, Jae; Chu, Hyunwoo; Dae Kim, Seong; Ahn, Jong-Hyun

2015-01-01

Graphene-based heterostructured vertical transistors have attracted a great deal of research interest. Herein we propose a Si-based technology platform for creating graphene/ultrathin semiconductor/metal (GSM) junctions, which can be applied to large-scale and low-power electronics compatible with a variety of substrates. We fabricated graphene/Si nanomembrane (NM)/metal vertical heterostructures by using a dry transfer technique to transfer Si NMs onto chemical vapor deposition-grown graphene layers. The resulting van der Waals interfaces between graphene and p-Si NMs exhibited nearly ideal Schottky barrier behavior. Due to the low density of states of graphene, the graphene/Si NM Schottky barrier height can be modulated by modulating the band profile in the channel region, yielding well-defined current modulation. We obtained a maximum current on/off ratio (I on /I off ) of up to ∼10 3 , with a current density of 10 2 A cm −2 . We also observed significant dependence of Schottky barrier height Δφ b on the thickness of the Si NMs. We confirmed that the transport in these devices is dominated by the effects of the graphene/Si NM Schottky barrier. (paper)

Mixing in T-junctions

NARCIS (Netherlands)

Kok, Jacobus B.W.; van der Wal, S.

1996-01-01

The transport processes that are involved in the mixing of two gases in a T-junction mixer are investigated. The turbulent flow field is calculated for the T-junction with the k- turbulence model by FLOW3D. In the mathematical model the transport of species is described with a mixture fraction

Balancing Hole and Electron Conduction in Ambipolar Split-Gate Thin-Film Transistors.

Science.gov (United States)

Yoo, Hocheon; Ghittorelli, Matteo; Lee, Dong-Kyu; Smits, Edsger C P; Gelinck, Gerwin H; Ahn, Hyungju; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

2017-07-10

Complementary organic electronics is a key enabling technology for the development of new applications including smart ubiquitous sensors, wearable electronics, and healthcare devices. High-performance, high-functionality and reliable complementary circuits require n- and p-type thin-film transistors with balanced characteristics. Recent advancements in ambipolar organic transistors in terms of semiconductor and device engineering demonstrate the great potential of this route but, unfortunately, the actual development of ambipolar organic complementary electronics is currently hampered by the uneven electron (n-type) and hole (p-type) conduction in ambipolar organic transistors. Here we show ambipolar organic thin-film transistors with balanced n-type and p-type operation. By manipulating air exposure and vacuum annealing conditions, we show that well-balanced electron and hole transport properties can be easily obtained. The method is used to control hole and electron conductions in split-gate transistors based on a solution-processed donor-acceptor semiconducting polymer. Complementary logic inverters with balanced charging and discharging characteristics are demonstrated. These findings may open up new opportunities for the rational design of complementary electronics based on ambipolar organic transistors.

Wide bandgap collector III-V double heterojunction bipolar transistors

International Nuclear Information System (INIS)

Flitcroft, R.M.

2000-10-01

This thesis is devoted to the study and development of Heterojunction Bipolar Transistors (HBTs) designed for high voltage operation. The work concentrates on the use of wide bandgap III-V semiconductor materials as the collector material and their associated properties influencing breakdown, such as impact ionisation coefficients. The work deals with issues related to incorporating a wide bandgap collector into double heterojunction structures such as conduction band discontinuities at the base-collector junction and results are presented which detail, a number of methods designed to eliminate the effects of such discontinuities. In particular the use of AlGaAs as the base material has been successful in eliminating the conduction band spike at this interface. A method of electrically injecting electrons into the collector has been employed to investigate impact ionisation in GaAs, GaInP and AlInP which has used the intrinsic gain of the devices to extract impact ionisation coefficients over a range of electric fields beyond the scope of conventional optical injection techniques. This data has enabled the study of ''dead space'' effects in HBT collectors and have been used to develop an analytical model of impact ionisation which has been incorporated into an existing Ebers-Moll HBT simulator. This simulator has been shown to accurately reproduce current-voltage characteristics in both the devices used in this work and for external clients. (author)

Study on ionizing radiation effects of bipolar transistor with BPSG films

International Nuclear Information System (INIS)

Lu Man; Zhang Xiaoling; Xie Xuesong; Sun Jiangchao; Wang Pengpeng; Lu Changzhi; Zhang Yanxiu

2013-01-01

Background: Because of the damage induced by ionizing radiation, bipolar transistors in integrated voltage regulator could induce the current gain degradation and increase leakage current. This will bring serious problems to electronic system. Purpose: In order to ensure the reliability of the device work in the radiation environments, the device irradiation reinforcement technology is used. Methods: The characteristics of 60 Co γ irradiation and annealing at different temperatures in bipolar transistors and voltage regulators (JW117) with different passive films for SiO 2 +BPSG+SiO 2 and SiO 2 +SiN have been investigated. Results: The devices with BPSG film enhanced radiation tolerance significantly. Because BPSG films have better absorption for Na + in SiO 2 layer, the surface recombination rate of base region in a bipolar transistor and the excess base current have been reduced. It may be the main reason for BJT with BPSG film having a good radiation hardness. And annealing experiments at different temperatures after irradiation ensure the reliability of the devices with BPSG films. Conclusions: A method of improving the ionizing irradiation hardness of bipolar transistors is proposed. As well as the linear integrated circuits which containing bipolar transistors, an experimental basis for the anti-ionizing radiation effects of bipolar transistors is provided. (authors)

Transistorized PWM inverter-induction motor drive system

Science.gov (United States)

Peak, S. C.; Plunkett, A. B.

1982-01-01

This paper describes the development of a transistorized PWM inverter-induction motor traction drive system. A vehicle performance analysis was performed to establish the vehicle tractive effort-speed requirements. These requirements were then converted into a set of inverter and motor specifications. The inverter was a transistorized three-phase bridge using General Electric power Darlington transistors. The description of the design and development of this inverter is the principal object of this paper. The high-speed induction motor is a design which is optimized for use with an inverter power source. The primary feedback control is a torque angle control with voltage and torque outer loop controls. A current-controlled PWM technique is used to control the motor voltage. The drive has a constant torque output with PWM operation to base motor speed and a constant horsepower output with square wave operation to maximum speed. The drive system was dynamometer tested and the results are presented.

Effect of junction configurations on microdroplet formation in a T-junction microchannel

Science.gov (United States)

Lih, F. L.; Miao, J. M.

2015-03-01

This study investigates the dynamic formation process of water microdroplets in a silicon oil flow in a T-junction microchannel. Segmented water microdroplets are formed at the junction when the water flow is perpendicularly injected into the silicon oil flow in a straight rectangular microchannel. This study further presents the effects of the water flow inlet geometry on hydrodynamic characteristics of water microdroplet formation. A numerical multiphase volume of fluid (VOF) scheme is coupled to solve the unsteady three-dimensional laminar Navier-Stokes equations to depict the droplet formation phenomena at the junction. Predicted results on the length and generated frequency of the microdroplets agree well with experimental results in a T-junction microchannel with straight and flat inlets (the base model) for both fluid flows. Empirical correlations are reported between the volumetric flow ratio and the dimensionless microdroplet length or dimensionless frequency of droplet generation at a fixed capillary number of 4.7 · 10-3. The results of this study indicate a reduction in the droplet length of approximately 21% if the straight inlet for the water flow is modified to a downstream sudden contraction inlet for the water flow.

I–V, C–V and deep level transient spectroscopy study of 24 MeV ...

Indian Academy of Sciences (India)

This paper describes the effect of 24 MeV proton irradiation on the electrical characteristics of a pnp bipolar junction transistor 2N 2905A. –, – and DLTS measurements are carried out to characterize the transistor before and after irradiation. The properties of deep level defects observed in the bulk of the transistor are ...

Poster - Thur Eve - 57: Craniospinal irradiation with jagged-junction IMRT approach without beam edge matching for field junctions.

Science.gov (United States)

Cao, F; Ramaseshan, R; Corns, R; Harrop, S; Nuraney, N; Steiner, P; Aldridge, S; Liu, M; Carolan, H; Agranovich, A; Karva, A

2012-07-01

Craniospinal irradiation were traditionally treated the central nervous system using two or three adjacent field sets. A intensity-modulated radiotherapy (IMRT) plan (Jagged-Junction IMRT) which overcomes problems associated with field junctions and beam edge matching, improves planning and treatment setup efficiencies with homogenous target dose distribution was developed. Jagged-Junction IMRT was retrospectively planned on three patients with prescription of 36 Gy in 20 fractions and compared to conventional treatment plans. Planning target volume (PTV) included the whole brain and spinal canal to the S3 vertebral level. The plan employed three field sets, each with a unique isocentre. One field set with seven fields treated the cranium. Two field sets treated the spine, each set using three fields. Fields from adjacent sets were overlapped and the optimization process smoothly integrated the dose inside the overlapped junction. For the Jagged-Junction IMRT plans vs conventional technique, average homogeneity index equaled 0.08±0.01 vs 0.12±0.02, and conformity number equaled 0.79±0.01 vs 0.47±0.12. The 95% isodose surface covered (99.5±0.3)% of the PTV vs (98.1±2.0)%. Both Jagged-Junction IMRT plans and the conventional plans had good sparing of the organs at risk. Jagged-Junction IMRT planning provided good dose homogeneity and conformity to the target while maintaining a low dose to the organs at risk. Jagged-Junction IMRT optimization smoothly distributed dose in the junction between field sets. Since there was no beam matching, this treatment technique is less likely to produce hot or cold spots at the junction in contrast to conventional techniques. © 2012 American Association of Physicists in Medicine.

Fundamentals of RF and microwave transistor amplifiers

CERN Document Server

Bahl, Inder J

2009-01-01

A Comprehensive and Up-to-Date Treatment of RF and Microwave Transistor Amplifiers This book provides state-of-the-art coverage of RF and microwave transistor amplifiers, including low-noise, narrowband, broadband, linear, high-power, high-efficiency, and high-voltage. Topics covered include modeling, analysis, design, packaging, and thermal and fabrication considerations. Through a unique integration of theory and practice, readers will learn to solve amplifier-related design problems ranging from matching networks to biasing and stability. More than 240 problems are included to help read

Transistor and integrated circuit manufacture

Energy Technology Data Exchange (ETDEWEB)

Colman, D

1978-09-27

This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry.

Going ballistic: Graphene hot electron transistors

Science.gov (United States)

Vaziri, S.; Smith, A. D.; Östling, M.; Lupina, G.; Dabrowski, J.; Lippert, G.; Mehr, W.; Driussi, F.; Venica, S.; Di Lecce, V.; Gnudi, A.; König, M.; Ruhl, G.; Belete, M.; Lemme, M. C.

2015-12-01

This paper reviews the experimental and theoretical state of the art in ballistic hot electron transistors that utilize two-dimensional base contacts made from graphene, i.e. graphene base transistors (GBTs). Early performance predictions that indicated potential for THz operation still hold true today, even with improved models that take non-idealities into account. Experimental results clearly demonstrate the basic functionality, with on/off current switching over several orders of magnitude, but further developments are required to exploit the full potential of the GBT device family. In particular, interfaces between graphene and semiconductors or dielectrics are far from perfect and thus limit experimental device integrity, reliability and performance.

Tin Dioxide Electrolyte-Gated Transistors Working in Depletion and Enhancement Modes.

Science.gov (United States)

Valitova, Irina; Natile, Marta Maria; Soavi, Francesca; Santato, Clara; Cicoira, Fabio

2017-10-25

Metal oxide semiconductors are interesting for next-generation flexible and transparent electronics because of their performance and reliability. Tin dioxide (SnO 2 ) is a very promising material that has already found applications in sensing, photovoltaics, optoelectronics, and batteries. In this work, we report on electrolyte-gated, solution-processed polycrystalline SnO 2 transistors on both rigid and flexible substrates. For the transistor channel, we used both unpatterned and patterned SnO 2 films. Since decreasing the SnO 2  area in contact with the electrolyte increases the charge-carrier density, patterned transistors operate in the depletion mode, whereas unpatterned ones operate in the enhancement mode. We also fabricated flexible SnO 2 transistors that operate in the enhancement mode that can withstand moderate mechanical bending.

Non-Planar Nanotube and Wavy Architecture Based Ultra-High Performance Field Effect Transistors

KAUST Repository

Hanna, Amir

2016-11-01

This dissertation presents a unique concept for a device architecture named the nanotube (NT) architecture, which is capable of higher drive current compared to the Gate-All-Around Nanowire architecture when applied to heterostructure Tunnel Field Effect Transistors. Through the use of inner/outer core-shell gates, heterostructure NT TFET leverages physically larger tunneling area thus achieving higher driver current (ION) and saving real estates by eliminating arraying requirement. We discuss the physics of p-type (Silicon/Indium Arsenide) and n-type (Silicon/Germanium hetero-structure) based TFETs. Numerical TCAD simulations have shown that NT TFETs have 5x and 1.6 x higher normalized ION when compared to GAA NW TFET for p and n-type TFETs, respectively. This is due to the availability of larger tunneling junction cross sectional area, and lower Shockley-Reed-Hall recombination, while achieving sub 60 mV/dec performance for more than 5 orders of magnitude of drain current, thus enabling scaling down of Vdd to 0.5 V. This dissertation also introduces a novel thin-film-transistors architecture that is named the Wavy Channel (WC) architecture, which allows for extending device width by integrating vertical fin-like substrate corrugations giving rise to up to 50% larger device width, without occupying extra chip area. The novel architecture shows 2x higher output drive current per unit chip area when compared to conventional planar architecture. The current increase is attributed to both the extra device width and 50% enhancement in field effect mobility due to electrostatic gating effects. Digital circuits are fabricated to demonstrate the potential of integrating WC TFT based circuits. WC inverters have shown 2× the peak-to-peak output voltage for the same input, and ~2× the operation frequency of the planar inverters for the same peak-to-peak output voltage. WC NAND circuits have shown 2× higher peak-to-peak output voltage, and 3× lower high-to-low propagation

Bottom-Up Tri-gate Transistors and Submicrosecond Photodetectors from Guided CdS Nanowalls.

Science.gov (United States)

Xu, Jinyou; Oksenberg, Eitan; Popovitz-Biro, Ronit; Rechav, Katya; Joselevich, Ernesto

2017-11-08

Tri-gate transistors offer better performance than planar transistors by exerting additional gate control over a channel from two lateral sides of semiconductor nanowalls (or "fins"). Here we report the bottom-up assembly of aligned CdS nanowalls by a simultaneous combination of horizontal catalytic vapor-liquid-solid growth and vertical facet-selective noncatalytic vapor-solid growth and their parallel integration into tri-gate transistors and photodetectors at wafer scale (cm 2 ) without postgrowth transfer or alignment steps. These tri-gate transistors act as enhancement-mode transistors with an on/off current ratio on the order of 10 8 , 4 orders of magnitude higher than the best results ever reported for planar enhancement-mode CdS transistors. The response time of the photodetector is reduced to the submicrosecond level, 1 order of magnitude shorter than the best results ever reported for photodetectors made of bottom-up semiconductor nanostructures. Guided semiconductor nanowalls open new opportunities for high-performance 3D nanodevices assembled from the bottom up.

Effects on focused ion beam irradiation on MOS transistors

International Nuclear Information System (INIS)

Campbell, A.N.; Peterson, K.A.; Fleetwood, D.M.; Soden, J.M.

1997-01-01

The effects of irradiation from a focused ion beam (FIB) system on MOS transistors are reported systematically for the first time. Three MOS transistor technologies, with 0.5, 1, and 3 μm minimum feature sizes and with gate oxide thicknesses ranging from 11 to 50 nm, were analyzed. Significant shifts in transistor parameters (such as threshold voltage, transconductance, and mobility) were observed following irradiation with a 30 keV Ga + focused ion beam with ion doses varying by over 5 orders of magnitude. The apparent damage mechanism (which involved the creation of interface traps, oxide trapped charge, or both) and extent of damage were different for each of the three technologies investigated

Light programmable organic transistor memory device based on hybrid dielectric

Science.gov (United States)

Ren, Xiaochen; Chan, Paddy K. L.

2013-09-01

We have fabricated the transistor memory devices based on SiO2 and polystyrene (PS) hybrid dielectric. The trap states densities with different semiconductors have been investigated and a maximum 160V memory window between programming and erasing is realized. For DNTT based transistor, the trapped electron density is limited by the number of mobile electrons in semiconductor. The charge transport mechanism is verified by light induced Vth shift effect. Furthermore, in order to meet the low operating power requirement of portable electronic devices, we fabricated the organic memory transistor based on AlOx/self-assembly monolayer (SAM)/PS hybrid dielectric, the effective capacitance of hybrid dielectric is 210 nF cm-2 and the transistor can reach saturation state at -3V gate bias. The memory window in transfer I-V curve is around 1V under +/-5V programming and erasing bias.

Transistor and integrated circuit manufacture

International Nuclear Information System (INIS)

Colman, D.

1978-01-01

This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry. (author)

Valley dependent transport in graphene L junction

Science.gov (United States)

Chan, K. S.

2018-05-01

We studied the valley dependent transport in graphene L junctions connecting an armchair lead and a zigzag lead. The junction can be used in valleytronic devices and circuits. Electrons injected from the armchair lead into the junction is not valley polarized, but they can become valley polarized in the zigzag lead. There are Fermi energies, where the current in the zigzag lead is highly valley polarized and the junction is an efficient generator of valley polarized current. The features of the valley polarized current depend sensitively on the widths of the two leads, as well as the number of dimers in the armchair lead, because this number has a sensitive effect on the band structure of the armchair lead. When an external potential is applied to the junction, the energy range with high valley polarization is enlarged enhancing its function as a generator of highly valley polarized current. The scaling behavior found in other graphene devices is also found in L junctions, which means that the results presented here can be extended to junctions with larger dimensions after appropriate scaling of the energy.

3D assembly of carbon nanotubes for fabrication of field-effect transistors through nanomanipulation and electron-beam-induced deposition

International Nuclear Information System (INIS)

Yu, Ning; Shi, Qing; Wang, Huaping; Huang, Qiang; Fukuda, Toshio; Nakajima, Masahiro; Yang, Zhan; Sun, Lining

2017-01-01

Three-dimensional carbon nanotube field-effect transistors (3D CNTFETs) possess predictable characteristics that rival those of planar CNTFETs and Si-based MOSFETs. However, due to the lack of a reliable assembly technology, they are rarely reported on, despite the amount of attention they receive. To address this problem, we propose the novel concept of a 3D CNTFET and develop its assembly strategy based on nanomanipulation and the electron-beam-induced deposition (EBID) technique inside a scanning electron microscope (SEM). In particular, the electrodes in our transistor design are three metallic cuboids of the same size, and their front, top and back surfaces are all wrapped up in CNTs. The assembly strategy is employed to build the structure through a repeated basic process of pick-up, placement, fixing and cutting of CNTs. The pick-up and placement is performed through one nanomanipulator with four degrees of freedom. Fixing is carried out through the EBID technique so as to improve the mechanical and electrical characteristics of the CNT/electrodes connection. CNT cutting is undertaken using the typical method of electrical breakdown. Experimental results showed that two CNTs were successfully assembled on the front sides of the cubic electrodes. This validates our assembly method for the 3D CNTFET. Also, when contact resistance was measured, tens of kilohms of resistance was observed at the CNT-EBID deposition-FET electrodes junction.. This manifests the electrical reliability of our assembly strategy. (paper)

Method for double-sided processing of thin film transistors

Science.gov (United States)

Yuan, Hao-Chih; Wang, Guogong; Eriksson, Mark A.; Evans, Paul G.; Lagally, Max G.; Ma, Zhenqiang

2008-04-08

This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

Method of manufacturing Josephson junction integrated circuits

International Nuclear Information System (INIS)

Jillie, D.W. Jr.; Smith, L.N.

1985-01-01

Josephson junction integrated circuits of the current injection type and magnetically controlled type utilize a superconductive layer that forms both Josephson junction electrode for the Josephson junction devices on the integrated circuit as well as a ground plane for the integrated circuit. Large area Josephson junctions are utilized for effecting contact to lower superconductive layers and islands are formed in superconductive layers to provide isolation between the groudplane function and the Josephson junction electrode function as well as to effect crossovers. A superconductor-barrier-superconductor trilayer patterned by local anodization is also utilized with additional layers formed thereover. Methods of manufacturing the embodiments of the invention are disclosed

Fully printed metabolite sensor using organic electrochemical transistor

Science.gov (United States)

Scheiblin, Gaëtan; Aliane, Abdelkader; Coppard, Romain; Owens, Róisín. M.; Mailley, Pascal; Malliaras, George G.

2015-08-01

As conducting polymer based devices, organic electrochemical transistors (OECTs) are suited for printing process. The convenience of the screen-printing techniques allowed us to design and fabricate OECTs with a selected design and using different gate material. Depending on the material used, we were able to tune the transistor for different biological application. Ag/AgCl gate provided transistor with good transconductance, and electrochemical sensitivity to pH was provided by polyaniline ink. Finally, we validate the enzymatic sensing of glucose and lactate with a Poly(3,4-ethylene dioxythiophene) doped with poly(styrene sulfonate) (PEDOT:PSS) gate often used due to its biocompatible properties. The screen-printing process allowed us to fabricate a large amount of devices in a short period of time, using only commercially available grades of ink, showing by this way the possible transfer to industrial purpose.

delta-biased Josephson tunnel junctions

DEFF Research Database (Denmark)

Monaco, R.; Mygind, Jesper; Koshelet, V.

2010-01-01

Abstract: The behavior of a long Josephson tunnel junction drastically depends on the distribution of the dc bias current. We investigate the case in which the bias current is fed in the central point of a one-dimensional junction. Such junction configuration has been recently used to detect...... the persistent currents circulating in a superconducting loop. Analytical and numerical results indicate that the presence of fractional vortices leads to remarkable differences from the conventional case of uniformly distributed dc bias current. The theoretical findings are supported by detailed measurements...

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

Science.gov (United States)

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

Transport and performance of a gate all around InAs nanowire transistor

International Nuclear Information System (INIS)

Alam, Khairul

2009-01-01

The transport physics and performance metrics of a gate all around an InAs nanowire transistor are studied using a three-dimensional quantum simulation. The transistor action of an InAs nanowire transistor occurs by modulating the transmission coefficient of the device. This action is different from a conventional metal-oxide-semiconductor field effect transistor, where the transistor action occurs by modulating the charge in the channel. The device has 82% tunneling current in the off-state and 81% thermal current in the on-state. The two current components become equal at a gate bias at which an approximate source-channel flat-band condition is achieved. Prior to this gate bias, the tunneling current dominates and the thermal current dominates beyond it. The device has an on/off current ratio of 7.84 × 10 5 and an inverse subthreshold slope of 63 mV dec −1 . The transistor operates in the quantum capacitance limit with a normalized transconductance value of 14.43 mS µm −1 , an intrinsic switching delay of 90.1675 fs, and an intrinsic unity current gain frequency of 6.8697 THz

Dose enhancement effects of X ray radiation in bipolar transistors

International Nuclear Information System (INIS)

Chen Panxun

1997-01-01

The author has presented behaviour degradation and dose enhancement effects of bipolar transistors in X ray irradiation environment. The relative dose enhancement factors of X ray radiation were measured in bipolar transistors by the experiment methods. The mechanism of bipolar device dose enhancement was investigated

Worst-Case Bias During Total Dose Irradiation of SOI Transistors

International Nuclear Information System (INIS)

Ferlet-Cavrois, V.; Colladant, T.; Paillet, P.; Leray, J.-L; Musseau, O.; Schwank, James R.; Shaneyfelt, Marty R.; Pelloie, J.L.; Du Port de Poncharra, J.

2000-01-01

The worst case bias during total dose irradiation of partially depleted SOI transistors (from SNL and from CEA/LETI) is correlated to the device architecture. Experiments and simulations are used to analyze SOI back transistor threshold voltage shift and charge trapping in the buried oxide

Static Characteristics of the Ferroelectric Transistor Inverter

Science.gov (United States)

Mitchell, Cody; Laws, crystal; MacLeond, Todd C.; Ho, Fat D.

2010-01-01

The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.

Pulse GaAs field transistor amplifier with subnanosecond time transient

International Nuclear Information System (INIS)

Sidnev, A.N.

1987-01-01

Pulse amplifier on fast field effect GaAs transistors with Schottky barrier is described. The amplifier contains four cascades, the first three of which are made on combined transistors on the common-drain circuit. The last cascade is made on high-power field effect GaAs transistor for coordination with 50 ohm load. The amplifier operates within the range of input signals from 0.5 up to 100 mV with repetition frequency up to 16 Hz, The gain of the amplifier is ≅ 20 dB. The setting time at output pulses amplitude up to 1 V constitutes ∼ 0.2 ns

NbN tunnel junctions

International Nuclear Information System (INIS)

Villegier, J.C.; Vieux-Rochaz, L.; Goniche, M.; Renard, P.; Vabre, M.

1984-09-01

All-niobium nitride Josephon junctions have been prepared successfully using a new processing called SNOP: Selective Niobium (nitride) Overlap Process. Such a process involves the ''trilayer'' deposition on the whole wafer before selective patterning of the electrodes by optically controlled dry reactive ion etching. Only two photomask levels are need to define an ''overlap'' or a ''cross-type'' junction with a good accuracy. The properties of the niobium nitride films deposited by DC-magnetron sputtering and the surface oxide growth are analysed. The most critical point to obtain high quality and high gap value junctions resides in the early stage of the NbN counterelectrode growth. Some possibilities to overcome such a handicap exist even if the fabrication needs substrate temperatures below 250 0 C

Investigations of Tunneling for Field Effect Transistors

OpenAIRE

Matheu, Peter

2012-01-01

Over 40 years of scaling dimensions for new and continuing product cycles has introduced new challenges for transistor design. As the end of the technology roadmap for semiconductors approaches, new device structures are being investigated as possible replacements for traditional metal-oxide-semiconductor field effect transistors (MOSFETs). Band-to-band tunneling (BTBT) in semiconductors, often viewed as an adverse effect of short channel lengths in MOSFETs, has been discussed as a promising ...

High performance tunnel field-effect transistor by gate and source engineering

International Nuclear Information System (INIS)

Huang, Ru; Huang, Qianqian; Chen, Shaowen; Wu, Chunlei; Wang, Jiaxin; An, Xia; Wang, Yangyuan

2014-01-01

As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I ON /I OFF ratio (∼10 7 ) at V DS  = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high I ON /I OFF ratio of ∼10 8 and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec −1 was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching. (paper)

Hysteresis development in superconducting Josephson junctions

International Nuclear Information System (INIS)

Refai, T.F.; Shehata, L.N.

1988-09-01

The resistively and capacitive shunted junction model is used to investigate hysteresis development in superconducting Josephson junctions. Two empirical formulas that relate the hysteresis width and the quasi-particle diffusion length in terms of the junctions electrical parameters, temperature and frequency are obtained. The obtained formulas provide a simple tool to investigate the full potentials of the hysteresis phenomena. (author). 9 refs, 3 figs

Organic tunnel field effect transistors

KAUST Repository

Tietze, Max Lutz; Lussem, Bjorn; Liu, Shiyi

2017-01-01

Various examples are provided for organic tunnel field effect transistors (OTFET), and methods thereof. In one example, an OTFET includes a first intrinsic layer (i-layer) of organic semiconductor material disposed over a gate insulating layer

Multi-channel spintronic transistor design based on magnetoelectric barriers and spin-orbital effects

International Nuclear Information System (INIS)

Fujita, T; Jalil, M B A; Tan, S G

2008-01-01

We present a spin transistor design based on spin-orbital interactions in a two-dimensional electron gas, with magnetic barriers induced by a patterned ferromagnetic gate. The proposed device overcomes certain shortcomings of previous spin transistor designs such as long device length and degradation of conductance modulation for multi-channel transport. The robustness of our device for multi-channel transport is unique in spin transistor designs based on spin-orbit coupling. The device is more practical in fabrication and experimental respects compared to previously conceived single-mode spin transistors

Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

Science.gov (United States)

Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

2018-01-01

Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

High-frequency self-aligned graphene transistors with transferred gate stacks

Science.gov (United States)

Cheng, Rui; Bai, Jingwei; Liao, Lei; Zhou, Hailong; Chen, Yu; Liu, Lixin; Lin, Yung-Chen; Jiang, Shan; Huang, Yu; Duan, Xiangfeng

2012-01-01

Graphene has attracted enormous attention for radio-frequency transistor applications because of its exceptional high carrier mobility, high carrier saturation velocity, and large critical current density. Herein we report a new approach for the scalable fabrication of high-performance graphene transistors with transferred gate stacks. Specifically, arrays of gate stacks are first patterned on a sacrificial substrate, and then transferred onto arbitrary substrates with graphene on top. A self-aligned process, enabled by the unique structure of the transferred gate stacks, is then used to position precisely the source and drain electrodes with minimized access resistance or parasitic capacitance. This process has therefore enabled scalable fabrication of self-aligned graphene transistors with unprecedented performance including a record-high cutoff frequency up to 427 GHz. Our study defines a unique pathway to large-scale fabrication of high-performance graphene transistors, and holds significant potential for future application of graphene-based devices in ultra–high-frequency circuits. PMID:22753503

Fabrication of Josephson Junction without shadow evaporation

Science.gov (United States)

Wu, Xian; Ku, Hsiangsheng; Long, Junling; Pappas, David

We developed a new method of fabricating Josephson Junction (Al/AlOX/Al) without shadow evaporation. Statistics from room temperature junction resistance and measurement of qubits are presented. Unlike the traditional ``Dolan Bridge'' technique, this method requires two individual lithographies and straight evaporations of Al. Argon RF plasma is used to remove native AlOX after the first evaporation, followed by oxidation and second Al evaporation. Junction resistance measured at room temperature shows linear dependence on Pox (oxidation pressure), √{tox} (oxidation time), and inverse proportional to junction area. We have seen 100% yield of qubits made with this method. This method is promising because it eliminates angle dependence during Junction fabrication, facilitates large scale qubits fabrication.

Quantum synchronization effects in intrinsic Josephson junctions

International Nuclear Information System (INIS)

Machida, M.; Kano, T.; Yamada, S.; Okumura, M.; Imamura, T.; Koyama, T.

2008-01-01

We investigate quantum dynamics of the superconducting phase in intrinsic Josephson junctions of layered high-T c superconductors motivated by a recent experimental observation for the switching rate enhancement in the low temperature quantum regime. We pay attention to only the capacitive coupling between neighboring junctions and perform large-scale simulations for the Schroedinger equation derived from the Hamiltonian considering the capacitive coupling alone. The simulation focuses on an issue whether the switching of a junction induces those of the other junctions or not. The results reveal that the superconducting phase dynamics show synchronous behavior with increasing the quantum character, e.g., decreasing the junction plane area and effectively the temperature. This is qualitatively consistent with the experimental result

BUSFET -- A radiation-hardened SOI transistor

International Nuclear Information System (INIS)

Schwank, J.R.; Shaneyfelt, M.R.; Draper, B.L.; Dodd, P.E.

1999-01-01

The total-dose hardness of SOI technology is limited by radiation-induced charge trapping in gate, field, and SOI buried oxides. Charge trapping in the buried oxide can lead to back-channel leakage and makes hardening SOI transistors more challenging than hardening bulk-silicon transistors. Two avenues for hardening the back-channel are (1) to use specially prepared SOI buried oxides that reduce the net amount of trapped positive charge or (2) to design transistors that are less sensitive to the effects of trapped charge in the buried oxide. In this work, the authors propose a partially-depleted SOI transistor structure for mitigating the effects of trapped charge in the buried oxide on radiation hardness. They call this structure the BUSFET--Body Under Source FET. The BUSFET utilizes a shallow source and a deep drain. As a result, the silicon depletion region at the back channel caused by radiation-induced charge trapping in the buried oxide does not form a conducting path between source and drain. Thus, the BUSFET structure design can significantly reduce radiation-induced back-channel leakage without using specially prepared buried oxides. Total dose hardness is achieved without degrading the intrinsic SEU or dose rate hardness of SOI technology. The effectiveness of the BUSFET structure for reducing total-dose back-channel leakage depends on several variables, including the top silicon film thickness and doping concentration, and the depth of the source. 3-D simulations show that for a body doping concentration of 10 18 cm -3 , a drain bias of 3 V, and a source depth of 90 nm, a silicon film thickness of 180 nm is sufficient to almost completely eliminate radiation-induced back-channel leakage. However, for a doping concentration of 3 x 10 17 cm -3 , a thicker silicon film (300 nm) must be used

Current fluctuation of electron and hole carriers in multilayer WSe{sub 2} field effect transistors

Energy Technology Data Exchange (ETDEWEB)

Ko, Seung-Pil; Shin, Jong Mok; Jang, Ho-Kyun; Jin, Jun Eon; Kim, Gyu-Tae, E-mail: gtkim@korea.ac.kr [School of Electrical Engineering, Korea University, Seoul 02481 (Korea, Republic of); Kim, Yong Jin; Kim, Young Keun [Department of Materials Science and Engineering, Korea University, Seoul 02481 (Korea, Republic of); Shin, Minju [School of Electrical Engineering, Korea University, Seoul 02481 (Korea, Republic of); IMEP-LAHC, Grenoble INP-MINATEC, 3 Parvis Louis Neel, 38016 Grenoble (France)

2015-12-14

Two-dimensional materials have outstanding scalability due to their structural and electrical properties for the logic devices. Here, we report the current fluctuation in multilayer WSe{sub 2} field effect transistors (FETs). In order to demonstrate the impact on carrier types, n-type and p-type WSe{sub 2} FETs are fabricated with different work function metals. Each device has similar electrical characteristics except for the threshold voltage. In the low frequency noise analysis, drain current power spectral density (S{sub I}) is inversely proportional to frequency, indicating typical 1/f noise behaviors. The curves of the normalized drain current power spectral density (NS{sub I}) as a function of drain current at the 10 Hz of frequency indicate that our devices follow the carrier number fluctuation with correlated mobility fluctuation model. This means that current fluctuation depends on the trapping-detrapping motion of the charge carriers near the channel interface. No significant difference is observed in the current fluctuation according to the charge carrier type, electrons and holes that occurred in the junction and channel region.

Progresses in organic field-effect transistors and molecular electronics

Institute of Scientific and Technical Information of China (English)

Wu Weiping; Xu Wei; Hu Wenping; Liu Yunqi; Zhu Daoben

2006-01-01

In the past years,organic semiconductors have been extensively investigated as electronic materials for organic field-effect transistors (OFETs).In this review,we briefly summarize the current status of organic field-effect transistors including materials design,device physics,molecular electronics and the applications of carbon nanotubes in molecular electronics.Future prospects and investigations required to improve the OFET performance are also involved.

A Vertical Organic Transistor Architecture for Fast Nonvolatile Memory.

Science.gov (United States)

She, Xiao-Jian; Gustafsson, David; Sirringhaus, Henning

2017-02-01

A new device architecture for fast organic transistor memory is developed, based on a vertical organic transistor configuration incorporating high-performance ambipolar conjugated polymers and unipolar small molecules as the transport layers, to achieve reliable and fast programming and erasing of the threshold voltage shift in less than 200 ns. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

High Stability Pentacene Transistors Using Polymeric Dielectric Surface Modifier.

Science.gov (United States)

Wang, Xiaohong; Lin, Guangqing; Li, Peng; Lv, Guoqiang; Qiu, Longzhen; Ding, Yunsheng

2015-08-01

1,6-bis(trichlorosilyl)hexane (C6Cl), polystyrene (PS), and cross-linked polystyrene (CPS) were investigated as gate dielectric modified layers for high performance organic transistors. The influence of the surface energy, roughness and morphology on the charge transport of the organic thin-film transistors (OTFTs) was investigated. The surface energy and roughness both affect the grain size of the pentacene films which will control the charge carrier mobility of the devices. Pentacene thin-film transistors fabricated on the CPS modified dielectric layers exhibited charge carrier mobility as high as 1.11 cm2 V-1 s-1. The bias stress stability for the CPS devices shows that the drain current only decays 1% after 1530 s and the mobility never decreases until 13530 s.

Oxygen effect on the electrical characteristics of pentacene transistors

International Nuclear Information System (INIS)

Hu Yan; Dong Guifang; Hu Yuanchuan; Wang Liduo; Qiu Yong

2006-01-01

The effect of oxygen on the electrical characteristics of organic thin film transistors with pentacene as the active layer has been investigated. The saturation currents and mobilities of the transistors increase as the ambient oxygen concentration decreases, which is ascribed to the formation of a charge transfer complex between pentacene and O 2 . The deposition rate of the pentacene layer affects this phenomenon. The transistor with the pentacene layer deposited at a rate of 15 nm min -1 shows higher sensitivity to oxygen concentration than the device with the pentacene layer deposited at 30 nm min -1 . We suggest that when deposited at a lower rate the pentacene film is less compact, leading to easier entrance of oxygen into the charge accumulation region

Organic field-effect transistors using single crystals

International Nuclear Information System (INIS)

Hasegawa, Tatsuo; Takeya, Jun

2009-01-01

Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps. (topical review)

Circuit and method for controlling the threshold voltage of transistors.

NARCIS (Netherlands)

2008-01-01

A control unit, for controlling a threshold voltage of a circuit unit having transistor devices, includes a reference circuit and a measuring unit. The measuring unit is configured to measure a threshold voltage of at least one sensing transistor of the circuit unit, and to measure a threshold

Germanium content and base doping level influence on extrinsic base resistance and dynamic performances of SiGe:C heterojunction bipolar transistors