WorldWideScience

Sample records for integrating silicon vidicon

  1. Dual beam vidicon digitizer

    International Nuclear Information System (INIS)

    Evans, T.L.

    1976-01-01

    A vidicon waveform digitizer which can simultaneously digitize two independent signals has been developed. Either transient or repetitive waveforms can be digitized with this system. A dual beam oscilloscope is used as the signal input device. The light from the oscilloscope traces is optically coupled to a television camera, where the signals are temporarily stored prior to digitizing

  2. Integrated silicon optoelectronics

    CERN Document Server

    Zimmermann, Horst

    2000-01-01

    'Integrated Silicon Optoelectronics'assembles optoelectronics and microelectronics The book concentrates on silicon as the major basis of modern semiconductor devices and circuits Starting from the basics of optical emission and absorption and from the device physics of photodetectors, the aspects of the integration of photodetectors in modern bipolar, CMOS, and BiCMOS technologies are discussed Detailed descriptions of fabrication technologies and applications of optoelectronic integrated circuits are included The book, furthermore, contains a review of the state of research on eagerly expected silicon light emitters In order to cover the topic of the book comprehensively, integrated waveguides, gratings, and optoelectronic power devices are included in addition Numerous elaborate illustrations promote an easy comprehension 'Integrated Silicon Optoelectronics'will be of value to engineers, physicists, and scientists in industry and at universities The book is also recommendable for graduate students speciali...

  3. Silicon integrated circuit process

    International Nuclear Information System (INIS)

    Lee, Jong Duck

    1985-12-01

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  4. Silicon integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jong Duck

    1985-12-15

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  5. Silicon hybrid integration

    International Nuclear Information System (INIS)

    Li Xianyao; Yuan Taonu; Shao Shiqian; Shi Zujun; Wang Yi; Yu Yude; Yu Jinzhong

    2011-01-01

    Recently,much attention has concentrated on silicon based photonic integrated circuits (PICs), which provide a cost-effective solution for high speed, wide bandwidth optical interconnection and optical communication.To integrate III-V compounds and germanium semiconductors on silicon substrates,at present there are two kinds of manufacturing methods, i.e., heteroepitaxy and bonding. Low-temperature wafer bonding which can overcome the high growth temperature, lattice mismatch,and incompatibility of thermal expansion coefficients during heteroepitaxy, has offered the possibility for large-scale heterogeneous integration. In this paper, several commonly used bonding methods are reviewed, and the future trends of low temperature wafer bonding envisaged. (authors)

  6. Hybrid Integrated Platforms for Silicon Photonics

    Science.gov (United States)

    Liang, Di; Roelkens, Gunther; Baets, Roel; Bowers, John E.

    2010-01-01

    A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

  7. Hybrid Integrated Platforms for Silicon Photonics

    Directory of Open Access Journals (Sweden)

    John E. Bowers

    2010-03-01

    Full Text Available A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

  8. Emerging heterogeneous integrated photonic platforms on silicon

    Directory of Open Access Journals (Sweden)

    Fathpour Sasan

    2015-05-01

    Full Text Available Silicon photonics has been established as a mature and promising technology for optoelectronic integrated circuits, mostly based on the silicon-on-insulator (SOI waveguide platform. However, not all optical functionalities can be satisfactorily achieved merely based on silicon, in general, and on the SOI platform, in particular. Long-known shortcomings of silicon-based integrated photonics are optical absorption (in the telecommunication wavelengths and feasibility of electrically-injected lasers (at least at room temperature. More recently, high two-photon and free-carrier absorptions required at high optical intensities for third-order optical nonlinear effects, inherent lack of second-order optical nonlinearity, low extinction ratio of modulators based on the free-carrier plasma effect, and the loss of the buried oxide layer of the SOI waveguides at mid-infrared wavelengths have been recognized as other shortcomings. Accordingly, several novel waveguide platforms have been developing to address these shortcomings of the SOI platform. Most of these emerging platforms are based on heterogeneous integration of other material systems on silicon substrates, and in some cases silicon is integrated on other substrates. Germanium and its binary alloys with silicon, III–V compound semiconductors, silicon nitride, tantalum pentoxide and other high-index dielectric or glass materials, as well as lithium niobate are some of the materials heterogeneously integrated on silicon substrates. The materials are typically integrated by a variety of epitaxial growth, bonding, ion implantation and slicing, etch back, spin-on-glass or other techniques. These wide range of efforts are reviewed here holistically to stress that there is no pure silicon or even group IV photonics per se. Rather, the future of the field of integrated photonics appears to be one of heterogenization, where a variety of different materials and waveguide platforms will be used for

  9. Silicon photonic integration in telecommunications

    Directory of Open Access Journals (Sweden)

    Christopher Richard Doerr

    2015-08-01

    Full Text Available Silicon photonics is the guiding of light in a planar arrangement of silicon-based materials to perform various functions. We focus here on the use of silicon photonics to create transmitters and receivers for fiber-optic telecommunications. As the need to squeeze more transmission into a given bandwidth, a given footprint, and a given cost increases, silicon photonics makes more and more economic sense.

  10. FPS-vidicon television camras for ultrafast-scan data acquisition

    International Nuclear Information System (INIS)

    Noel, B.W.; Yates, G.J.

    1980-06-01

    Two ultrafast-scan ( 500 TV lines per picture height with a corresponding dynamic range (to light input) of more than 100. The cameras use the unique properties of FPS vidicons and specially designed electronics to achieve their performance levels and versatility. The advantages and disadvantages of FPS vidicons and of antimony trisulfide and silicon target materials in such applications are discussed in detail. All of the electronics circuits are discussed. The sweep generator designs are treated at length because they are the key to the cameras' versatility. Emphasis is placed on remotely controllable analog and digital sweep generators. The latter is a complete CAMAC-compatible subsystem containing a 16-function master arithmetic logic unit. Pulsed and cw methods of obtaining transfer characteristics are described and compared. The effects of generation rates, tube types, and target types on the resolution, determined from contrast-transfer-function curves, are discussed. Several applications are described, including neutron TV pinhole, TREAT, and barium-release experiments

  11. Silicon wafers for integrated circuit process

    OpenAIRE

    Leroy , B.

    1986-01-01

    Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

  12. Silicon integrated circuits part A : supplement 2

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

  13. Integrated double-sided silicon microstrip detectors

    Directory of Open Access Journals (Sweden)

    Perevertailo V. L.

    2011-11-01

    Full Text Available The problems of design, technology and manufacturing double-sided silicon microstrip detectors using standard equipment production line in mass production of silicon integrated circuits are considered. The design of prototype high-energy particles detector for experiment ALICE (CERN is presented. The parameters of fabricated detectors are comparable with those of similar foreign detectors, but they are distinguished by lesser cost.

  14. Porous silicon technology for integrated microsystems

    Science.gov (United States)

    Wallner, Jin Zheng

    With the development of micro systems, there is an increasing demand for integrable porous materials. In addition to those conventional applications, such as filtration, wicking, and insulating, many new micro devices, including micro reactors, sensors, actuators, and optical components, can benefit from porous materials. Conventional porous materials, such as ceramics and polymers, however, cannot meet the challenges posed by micro systems, due to their incompatibility with standard micro-fabrication processes. In an effort to produce porous materials that can be used in micro systems, porous silicon (PS) generated by anodization of single crystalline silicon has been investigated. In this work, the PS formation process has been extensively studied and characterized as a function of substrate type, crystal orientation, doping concentration, current density and surfactant concentration and type. Anodization conditions have been optimized for producing very thick porous silicon layers with uniform pore size, and for obtaining ideal pore morphologies. Three different types of porous silicon materials: meso porous silicon, macro porous silicon with straight pores, and macro porous silicon with tortuous pores, have been successfully produced. Regular pore arrays with controllable pore size in the range of 2mum to 6mum have been demonstrated as well. Localized PS formation has been achieved by using oxide/nitride/polysilicon stack as masking materials, which can withstand anodization in hydrofluoric acid up to twenty hours. A special etching cell with electrolytic liquid backside contact along with two process flows has been developed to enable the fabrication of thick macro porous silicon membranes with though wafer pores. For device assembly, Si-Au and In-Au bonding technologies have been developed. Very low bonding temperature (˜200°C) and thick/soft bonding layers (˜6mum) have been achieved by In-Au bonding technology, which is able to compensate the potentially

  15. Silicon Photonic Integrated Circuit Mode Multiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ou, Haiyan; Xu, Jing

    2013-01-01

    We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully...

  16. Materials issues in silicon integrated circuit processing

    International Nuclear Information System (INIS)

    Wittmer, M.; Stimmell, J.; Strathman, M.

    1986-01-01

    The symposium on ''Materials Issues in Integrated Circuit Processing'' sought to bring together all of the materials issued pertinent to modern integrated circuit processing. The inherent properties of the materials are becoming an important concern in integrated circuit manufacturing and accordingly research in materials science is vital for the successful implementation of modern integrated circuit technology. The session on Silicon Materials Science revealed the advanced stage of knowledge which topics such as point defects, intrinsic and extrinsic gettering and diffusion kinetics have achieved. Adaption of this knowledge to specific integrated circuit processing technologies is beginning to be addressed. The session on Epitaxy included invited papers on epitaxial insulators and IR detectors. Heteroepitaxy on silicon is receiving great attention and the results presented in this session suggest that 3-d integrated structures are an increasingly realistic possibility. Progress in low temperature silicon epitaxy and epitaxy of thin films with abrupt interfaces was also reported. Diffusion and Ion Implantation were well presented. Regrowth of implant-damaged layers and the nature of the defects which remain after regrowth were discussed in no less than seven papers. Substantial progress was also reported in the understanding of amorphising boron implants and the use of gallium implants for the formation of shallow p/sup +/ -layers

  17. Extreme Ultraviolet Solar Images Televised In-Flight with a Rocket-Borne SEC Vidicon System.

    Science.gov (United States)

    Tousey, R; Limansky, I

    1972-05-01

    A TV image of the entire sun while an importance 2N solar flare was in progress was recorded in the extreme ultraviolet (XUV) radiation band 171-630 A and transmitted to ground from an Aerobee-150 rocket on 4 November 1969 using S-band telemetry. The camera tube was a Westinghouse Electric Corporation SEC vidicon, with its fiber optic faceplate coated with an XUV to visible conversion layer of p-quaterphenyl. The XUV passband was produced by three 1000-A thick aluminum filters in series together with the platinized reflecting surface of the off-axis paraboloid that imaged the sun. A number of images were recorded with integration times between 1/30 see and 2 sec. Reconstruction of pictures was enhanced by combining several to reduce the noise.

  18. Silicon Photonics II Components and Integration

    CERN Document Server

    Lockwood, David J

    2011-01-01

    This book is volume II of a series of books on silicon photonics. It gives a fascinating picture of the state-of-the-art in silicon photonics from a component perspective. It presents a perspective on what can be expected in the near future. It is formed from a selected number of reviews authored by world leaders in the field, and is written from both academic and industrial viewpoints. An in-depth discussion of the route towards fully integrated silicon photonics is presented. This book will be useful not only to physicists, chemists, materials scientists, and engineers but also to graduate students who are interested in the fields of micro- and nanophotonics and optoelectronics.

  19. Vertical integration of high-Q silicon nitride microresonators into silicon-on-insulator platform.

    Science.gov (United States)

    Li, Qing; Eftekhar, Ali A; Sodagar, Majid; Xia, Zhixuan; Atabaki, Amir H; Adibi, Ali

    2013-07-29

    We demonstrate a vertical integration of high-Q silicon nitride microresonators into the silicon-on-insulator platform for applications at the telecommunication wavelengths. Low-loss silicon nitride films with a thickness of 400 nm are successfully grown, enabling compact silicon nitride microresonators with ultra-high intrinsic Qs (~ 6 × 10(6) for 60 μm radius and ~ 2 × 10(7) for 240 μm radius). The coupling between the silicon nitride microresonator and the underneath silicon waveguide is based on evanescent coupling with silicon dioxide as buffer. Selective coupling to a desired radial mode of the silicon nitride microresonator is also achievable using a pulley coupling scheme. In this work, a 60-μm-radius silicon nitride microresonator has been successfully integrated into the silicon-on-insulator platform, showing a single-mode operation with an intrinsic Q of 2 × 10(6).

  20. Photonic integration and photonics-electronics convergence on silicon platform

    CERN Document Server

    Liu, Jifeng; Baba, Toshihiko; Vivien, Laurent; Xu, Dan-Xia

    2015-01-01

    Silicon photonics technology, which has the DNA of silicon electronics technology, promises to provide a compact photonic integration platform with high integration density, mass-producibility, and excellent cost performance. This technology has been used to develop and to integrate various photonic functions on silicon substrate. Moreover, photonics-electronics convergence based on silicon substrate is now being pursued. Thanks to these features, silicon photonics will have the potential to be a superior technology used in the construction of energy-efficient cost-effective apparatuses for various applications, such as communications, information processing, and sensing. Considering the material characteristics of silicon and difficulties in microfabrication technology, however, silicon by itself is not necessarily an ideal material. For example, silicon is not suitable for light emitting devices because it is an indirect transition material. The resolution and dynamic range of silicon-based interference de...

  1. InP membrane on silicon integration technology

    NARCIS (Netherlands)

    Smit, M.K.

    2013-01-01

    Integration of light sources in silicon photonics is usually done with an active InP-based layer stack on a silicon-based photonic circuit-layer. InP Membrane On Silicon (IMOS) technology integrates all functionality in a single InP-based layer.

  2. Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    -division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-oninsulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7x7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror......, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained...

  3. Long-wavelength III-V/silicon photonic integrated circuits

    NARCIS (Netherlands)

    Roelkens, G.C.; Kuyken, B.; Leo, F.; Hattasan, N.; Ryckeboer, E.M.P.; Muneeb, M.; Hu, C.L.; Malik, A.; Hens, Z.; Baets, R.G.F.; Shimura, Y.; Gencarelli, F.; Vincent, B.; Loo, van de R.; Verheyen, P.A.; Lepage, G.; Campenhout, van J.; Cerutti, L.; Rodriquez, J.B.; Tournie, E.; Chen, X; Nedeljkovic, G.; Mashanovich, G.; Liu, X.; Green, W.S.

    2013-01-01

    We review our work in the field of short-wave infrared and mid-infrared photonic integrated circuits for applications in spectroscopic sensing systems. Passive silicon waveguide circuits, GeSn photodetectors, the integration of III-V and IV-VI semiconductors on these circuits, and silicon nonlinear

  4. Amorphous silicon rich silicon nitride optical waveguides for high density integrated optics

    DEFF Research Database (Denmark)

    Philipp, Hugh T.; Andersen, Karin Nordström; Svendsen, Winnie Edith

    2004-01-01

    Amorphous silicon rich silicon nitride optical waveguides clad in silica are presented as a high-index contrast platform for high density integrated optics. Performance of different cross-sectional geometries have been measured and are presented with regards to bending loss and insertion loss...

  5. Mid-infrared integrated photonics on silicon: a perspective

    Directory of Open Access Journals (Sweden)

    Lin Hongtao

    2017-12-01

    Full Text Available The emergence of silicon photonics over the past two decades has established silicon as a preferred substrate platform for photonic integration. While most silicon-based photonic components have so far been realized in the near-infrared (near-IR telecommunication bands, the mid-infrared (mid-IR, 2–20-μm wavelength band presents a significant growth opportunity for integrated photonics. In this review, we offer our perspective on the burgeoning field of mid-IR integrated photonics on silicon. A comprehensive survey on the state-of-the-art of key photonic devices such as waveguides, light sources, modulators, and detectors is presented. Furthermore, on-chip spectroscopic chemical sensing is quantitatively analyzed as an example of mid-IR photonic system integration based on these basic building blocks, and the constituent component choices are discussed and contrasted in the context of system performance and integration technologies.

  6. A 40-GBd QPSK/16-QAM integrated silicon coherent receiver

    NARCIS (Netherlands)

    Verbist, J.; Zhang, J.; Moeneclaey, B.; Soenen, W.; Van Weerdenburg, J.J.A.; Van Uden, R.; Okonkwo, C.M.; Bauwelinck, J.; Roelkens, G.; Yin, X.

    2016-01-01

    Through co-design of a dual SiGe transimpedance amplifier and an integrated silicon photonic circuit, we realized for the first time an ultra-compact and low-power silicon single-polarization coherent receiver operating at 40 GBd. A bit-error rate of <3.8× 10-3 was obtained for an optical

  7. Flexible integration of free-standing nanowires into silicon photonics.

    Science.gov (United States)

    Chen, Bigeng; Wu, Hao; Xin, Chenguang; Dai, Daoxin; Tong, Limin

    2017-06-14

    Silicon photonics has been developed successfully with a top-down fabrication technique to enable large-scale photonic integrated circuits with high reproducibility, but is limited intrinsically by the material capability for active or nonlinear applications. On the other hand, free-standing nanowires synthesized via a bottom-up growth present great material diversity and structural uniformity, but precisely assembling free-standing nanowires for on-demand photonic functionality remains a great challenge. Here we report hybrid integration of free-standing nanowires into silicon photonics with high flexibility by coupling free-standing nanowires onto target silicon waveguides that are simultaneously used for precise positioning. Coupling efficiency between a free-standing nanowire and a silicon waveguide is up to ~97% in the telecommunication band. A hybrid nonlinear-free-standing nanowires-silicon waveguides Mach-Zehnder interferometer and a racetrack resonator for significantly enhanced optical modulation are experimentally demonstrated, as well as hybrid active-free-standing nanowires-silicon waveguides circuits for light generation. These results suggest an alternative approach to flexible multifunctional on-chip nanophotonic devices.Precisely assembling free-standing nanowires for on-demand photonic functionality remains a challenge. Here, Chen et al. integrate free-standing nanowires into silicon waveguides and show all-optical modulation and light generation on silicon photonic chips.

  8. Pseudo real-time coded aperture imaging system with intensified vidicon cameras

    International Nuclear Information System (INIS)

    Han, K.S.; Berzins, G.J.

    1977-01-01

    A coded image displayed on a TV monitor was used to directly reconstruct a decoded image. Both the coded and the decoded images were viewed with intensified vidicon cameras. The coded aperture was a 15-element nonredundant pinhole array. The coding and decoding were accomplished simultaneously during the scanning of a single 16-msec TV frame

  9. Silicon Carbide Power Devices and Integrated Circuits

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan; Samsel, Isaak; LaBel, Ken; Chen, Yuan; Ikpe, Stanley; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

    2017-01-01

    An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

  10. Silicon integrated circuits advances in materials and device research

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

  11. Novel technique for reliability testing of silicon integrated circuits

    NARCIS (Netherlands)

    Le Minh, P.; Wallinga, Hans; Woerlee, P.H.; van den Berg, Albert; Holleman, J.

    2001-01-01

    We propose a simple, inexpensive technique with high resolution to identify the weak spots in integrated circuits by means of a non-destructive photochemical process in which photoresist is used as the photon detection tool. The experiment was done to localize the breakdown link of thin silicon

  12. Integration of mask and silicon metrology in DFM

    Science.gov (United States)

    Matsuoka, Ryoichi; Mito, Hiroaki; Sugiyama, Akiyuki; Toyoda, Yasutaka

    2009-03-01

    We have developed a highly integrated method of mask and silicon metrology. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. We have inspected the high accuracy, stability and reproducibility in the experiments of integration. The accuracy is comparable with that of the mask and silicon CD-SEM metrology. In this report, we introduce the experimental results and the application. As shrinkage of design rule for semiconductor device advances, OPC (Optical Proximity Correction) goes aggressively dense in RET (Resolution Enhancement Technology). However, from the view point of DFM (Design for Manufacturability), the cost of data process for advanced MDP (Mask Data Preparation) and mask producing is a problem. Such trade-off between RET and mask producing is a big issue in semiconductor market especially in mask business. Seeing silicon device production process, information sharing is not completely organized between design section and production section. Design data created with OPC and MDP should be linked to process control on production. But design data and process control data are optimized independently. Thus, we provided a solution of DFM: advanced integration of mask metrology and silicon metrology. The system we propose here is composed of followings. 1) Design based recipe creation: Specify patterns on the design data for metrology. This step is fully automated since they are interfaced with hot spot coordinate information detected by various verification methods. 2) Design based image acquisition: Acquire the images of mask and silicon automatically by a recipe based on the pattern design of CD-SEM.It is a robust automated step because a wide range of design data is used for the image acquisition. 3) Contour profiling and GDS data generation: An image profiling process is applied to the acquired image based

  13. Infrared transparent graphene heater for silicon photonic integrated circuits.

    Science.gov (United States)

    Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

    2016-04-18

    Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

  14. System-level integration of active silicon photonic biosensors

    Science.gov (United States)

    Laplatine, L.; Al'Mrayat, O.; Luan, E.; Fang, C.; Rezaiezadeh, S.; Ratner, D. M.; Cheung, K.; Dattner, Y.; Chrostowski, L.

    2017-02-01

    Biosensors based on silicon photonic integrated circuits have attracted a growing interest in recent years. The use of sub-micron silicon waveguides to propagate near-infrared light allows for the drastic reduction of the optical system size, while increasing its complexity and sensitivity. Using silicon as the propagating medium also leverages the fabrication capabilities of CMOS foundries, which offer low-cost mass production. Researchers have deeply investigated photonic sensor devices, such as ring resonators, interferometers and photonic crystals, but the practical integration of silicon photonic biochips as part of a complete system has received less attention. Herein, we present a practical system-level architecture which can be employed to integrate the aforementioned photonic biosensors. We describe a system based on 1 mm2 dies that integrate germanium photodetectors and a single light coupling device. The die are embedded into a 16x16 mm2 epoxy package to enable microfluidic and electrical integration. First, we demonstrate a simple process to mimic Fan-Out Wafer-level-Packaging, which enables low-cost mass production. We then characterize the photodetectors in the photovoltaic mode, which exhibit high sensitivity at low optical power. Finally, we present a new grating coupler concept to relax the lateral alignment tolerance down to +/- 50 μm at 1-dB (80%) power penalty, which should permit non-experts to use the biochips in a"plug-and-play" style. The system-level integration demonstrated in this study paves the way towards the mass production of low-cost and highly sensitive biosensors, and can facilitate their wide adoption for biomedical and agro-environmental applications.

  15. Heterogeneous integration of lithium niobate and silicon nitride waveguides for wafer-scale photonic integrated circuits on silicon.

    Science.gov (United States)

    Chang, Lin; Pfeiffer, Martin H P; Volet, Nicolas; Zervas, Michael; Peters, Jon D; Manganelli, Costanza L; Stanton, Eric J; Li, Yifei; Kippenberg, Tobias J; Bowers, John E

    2017-02-15

    An ideal photonic integrated circuit for nonlinear photonic applications requires high optical nonlinearities and low loss. This work demonstrates a heterogeneous platform by bonding lithium niobate (LN) thin films onto a silicon nitride (Si3N4) waveguide layer on silicon. It not only provides large second- and third-order nonlinear coefficients, but also shows low propagation loss in both the Si3N4 and the LN-Si3N4 waveguides. The tapers enable low-loss-mode transitions between these two waveguides. This platform is essential for various on-chip applications, e.g., modulators, frequency conversions, and quantum communications.

  16. Integration of lateral porous silicon membranes into planar microfluidics.

    Science.gov (United States)

    Leïchlé, Thierry; Bourrier, David

    2015-02-07

    In this work, we present a novel fabrication process that enables the monolithic integration of lateral porous silicon membranes into single-layer planar microchannels. This fabrication technique relies on the patterning of local electrodes to guide pore formation horizontally within the membrane and on the use of silicon-on-insulator substrates to spatially localize porous silicon within the channel depth. The feasibility of our approach is studied by current flow analysis using the finite element method and supported by creating 10 μm long mesoporous membranes within 20 μm deep microchannels. The fabricated membranes are demonstrated to be potentially useful for dead-end microfiltration by adequately retaining 300 nm diameter beads while macromolecules such as single-stranded DNA and immunoglobulin G permeate the membrane. The experimentally determined fluidic resistance is in accordance with the theoretical value expected from the estimated pore size and porosity. The work presented here is expected to greatly simplify the integration of membranes capable of size exclusion based separation into fluidic devices and opens doors to the use of porous silicon in planar lab on a chip devices.

  17. Hybrid integration of carbon nanotubes in silicon photonic structures

    Science.gov (United States)

    Durán-Valdeiglesias, E.; Zhang, W.; Alonso-Ramos, C.; Le Roux, X.; Serna, S.; Hoang, H. C.; Marris-Morini, D.; Cassan, E.; Intonti, F.; Sarti, F.; Caselli, N.; La China, F.; Gurioli, M.; Balestrieri, M.; Vivien, L.; Filoramo, A.

    2017-02-01

    Silicon photonics, due to its compatibility with the CMOS platform and unprecedented integration capability, has become the preferred solution for the implementation of next generation optical interconnects to accomplish high efficiency, low energy consumption, low cost and device miniaturization in one single chip. However, it is restricted by silicon itself. Silicon does not have efficient light emission or detection in the telecommunication wavelength range (1.3 μm-1.5 μm) or any electro-optic effect (i.e. Pockels effect). Hence, silicon photonic needs to be complemented with other materials for the realization of optically-active devices, including III-V for lasing and Ge for detection. The very different requirement of these materials results in complex fabrication processes that offset the cost-effectiveness of the Si photonics approach. For this purpose, carbon nanotubes (CNTs) have recently been proposed as an attractive one-dimensional light emitting material. Interestingly, semiconducting single walled CNTs (SWNTs) exhibit room-temperature photo- and electro-luminescence in the near-IR that could be exploited for the implementation of integrated nano-sources. They can also be considered for the realization of photo-detectors and optical modulators, since they rely on intrinsically fast non-linear effects, such as Stark and Kerr effect. All these properties make SWNTs ideal candidates in order to fabricate a large variety of optoelectronic devices, including near-IR sources, modulators and photodetectors on Si photonic platforms. In addition, solution processed SWNTs can be integrated on Si using spin-coating or drop-casting techniques, obviating the need of complex epitaxial growth or chip bonding approaches. Here, we report on our recent progress in the coupling of SWNTs light emission into optical resonators implemented on the silicon-on-insulator (SOI) platform. .

  18. Integration of functional complex oxide nanomaterials on silicon

    Directory of Open Access Journals (Sweden)

    Jose Manuel eVila-Fungueiriño

    2015-06-01

    Full Text Available The combination of standard wafer-scale semiconductor processing with the properties of functional oxides opens up to innovative and more efficient devices with high value applications that can be produced at large scale. This review uncovers the main strategies that are successfully used to monolithically integrate functional complex oxide thin films and nanostructures on silicon: the chemical solution deposition approach (CSD and the advanced physical vapor deposition techniques such as oxide molecular beam epitaxy (MBE. Special emphasis will be placed on complex oxide nanostructures epitaxially grown on silicon using the combination of CSD and MBE. Several examples will be exposed, with a particular stress on the control of interfaces and crystallization mechanisms on epitaxial perovskite oxide thin films, nanostructured quartz thin films, and octahedral molecular sieve nanowires. This review enlightens on the potential of complex oxide nanostructures and the combination of both chemical and physical elaboration techniques for novel oxide-based integrated devices.

  19. Silicon-based optical integrated circuits for terabit communication networks

    International Nuclear Information System (INIS)

    Svidzinsky, K K

    2003-01-01

    A brief review is presented of the development of silicon-based optical integrated circuits used as components in modern all-optical communication networks with the terabit-per-second transmission capacity. The designs and technologies for manufacturing these circuits are described and the problems related to their development and application in WDM communication systems are considered. (special issue devoted to the memory of academician a m prokhorov)

  20. Integrated Silicon Carbide Power Electronic Block

    Energy Technology Data Exchange (ETDEWEB)

    Radhakrishnan, Rahul [Global Power Technologies Group, Inc., Lake Forest, CA (United States)

    2017-11-07

    Research involved in this project is aimed at monolithically integrating an anti-parallel diode to the SiC MOSFET switch, so as to avoid having to use an external anti-parallel diode in power circuit applications. SiC MOSFETs are replacing Si MOSFETs and IGBTs in many applications, yet the high bandgap of the body diode in SiC MOSFET and consequent need for an external anti-parallel diode increases costs and discourages circuit designers from adopting this technology. Successful demonstration and subsequent commercialization of this technology would reduce SiC MOSFET cost and additionally reduce component count as well as other costs at the power circuit level. In this Phase I project, we have created multiple device designs, set up a process for device fabrication at the 150mm SiC foundry XFAB Texas, demonstrated unit-processes for device fabrication in short loops and started full flow device fabrication. Key findings of the development activity were: The limits of coverage of photoresist over the topology of thick polysilicon structures covered with oxide, which required larger feature dimensions to overcome; and The insufficient process margin for removing oxide spacers from polysilicon field ring features which could result in loss of some features without further process development No fundamental obstacles were uncovered during the process development. Given sufficient time for additional development it is likely that processes could be tuned to realize the monolithically integrated SiC JBS diode and MOSFET. Sufficient funds were not available in this program to resolve processing difficulties and fabricate the devices.

  1. Feasibility studies of microelectrode silicon detectors with integrated electronics

    International Nuclear Information System (INIS)

    Dalla Betta, G.-F.; Batignani, G.; Bettarini, S.; Boscardin, M.; Bosisio, L.; Carpinelli, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Lusiani, A.; Manghisoni, M.; Pignatel, G.U.; Rama, M.; Ratti, L.; Re, V.; Sandrelli, F.; Speziali, V.; Svelto, F.; Zorzi, N.

    2002-01-01

    We describe our experience on design and fabrication, on high-resistivity silicon substrates, of microstrip detectors and integrated electronics, devoted to high-energy physics experiments and medical/industrial imaging applications. We report on the full program of our collaboration, with particular regards to the tuning of a new fabrication process, allowing for the production of good quality transistors, while keeping under control the basic detector parameters, such as leakage current. Experimental results on JFET and bipolar transistors are presented, and a microstrip detector with an integrated JFET in source-follower configuration is introduced

  2. Silicon carbide MOSFET integrated circuit technology

    Energy Technology Data Exchange (ETDEWEB)

    Brown, D.M.; Downey, E.; Ghezzo, M.; Kretchmer, J.; Krishnamurthy, V.; Hennessy, W.; Michon, G. [General Electric Co., Schenectady, NY (United States). Corporate Research and Development Center

    1997-07-16

    The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the World`s first SiC analog IC - a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included characterization of the SiC/SiO{sub 2} interface using thermally grown oxides: high temperature (350 C) reliability studies of thermally grown oxides: ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes: epitaxial layer characterization: N channel inversion and depletion mode MOSFETs; device isolation methods and finally integrated circuit design, fabrication and testing of the World`s first monolithic SiC operational amplifier IC. These studies defined a SiC n-channel depletion mode MOSFET IC technology and outlined tasks required to improve all types of SiC devices. For instance, high temperature circuit drift instabilities at 350 C were discovered and characterized. This type of instability needs to be understood and resolved because it affects the high temperature reliability of other types of SiC devices. Improvements in SiC wafer surface quality and the use of deposited oxides instead of thermally grown SiO{sub 2} gate dielectrics will probably be required for enhanced reliability. The slow reverse recovery time exhibited by n{sup +}-p diodes formed by N ion implantation is a problem that needs to be resolved for all types of planar bipolar devices. The reproducibility of acceptor implants needs to be improved before CMOS ICs and many types of power device structures will be manufacturable. (orig.) 51 refs.

  3. Real-time extraction of bubble chamber tracks using a single vidicon

    International Nuclear Information System (INIS)

    Roos, C.E.

    1978-01-01

    Bubble Chamber pictures show many undesired tracks and background in addition to the tracks of the desired significant event. Settles et al. have described a technique for optical tagging of an event by adding a darkfield photograph taken before significant bubble growth to a later brightfield photograph. The authors describe a system to cancel out all picture detail except for the wanted tracks by using a single vidicon tube as the storage device. In the first exposure, polarized light is imaged on the vidicon after passing through a Ronchi grating placed at a focal plane. Thus half of the target is exposed in a series of vertical stripes. The second exposure uses light polarized orthogonally to the first exposure and is deflected after passing through the Ronchi grating so as to expose the previously occluded stripes on the target. The target is then scanned orthogonally to the stripes; by subtracting the picture contained in one set of stripes from that contained in the other set, only the differences between the two images remains. A simulation was conducted using continuously presented background of one polarization and background plus tracks of the other polarization. The test showed that the added tracks were easily resolved, even though they were not readily discernible by visual inspection prior to subtraction. (Auth.)

  4. A Novel Silicon Micromachined Integrated MCM Thermal Management System

    Science.gov (United States)

    Kazmierczak, M. J.; Henderson, H. T.; Gerner, F. M.

    1997-01-01

    "Micromachining" is a chemical means of etching three-dimensional structures, typically in single- crystalline silicon. These techniques are leading toward what is coming to be referred to as MEMS (Micro Electro Mechanical Systems), where in addition to the ordinary two-dimensional (planar) microelectronics, it is possible to build three-dimensional n-ticromotors, electrically- actuated raicrovalves, hydraulic systems and much more on the same microchip. These techniques become possible because of differential etching rates of various crystallographic planes and materials used for semiconductor n-ticrofabfication. The University of Cincinnati group in collaboration with Karl Baker at NASA Lewis were the first to form micro heat pipes in silicon by the above techniques. Current work now in progress using MEMS technology is now directed towards the development of the next generation in MCM (Multi Chip Module) packaging. Here we propose to develop a complete electronic thermal management system which will allow densifica6on in chip stacking by perhaps two orders of magnitude. Furthermore the proposed technique will allow ordinary conu-nercial integrated chips to be utilized. Basically, the new technique involves etching square holes into a silicon substrate and then inserting and bonding commercially available integrated chips into these holes. For example, over a 100 1/4 in. by 1 /4 in. integrated chips can be placed on a 4 in. by 4 in. silicon substrate to form a Multi-Chip Module (MCM). Placing these MCM's in-line within an integrated rack then allows for three-diniensional stacking. Increased miniaturization of microelectronic circuits will lead to very high local heat fluxes. A high performance thermal management system will be specifically designed to remove the generated energy. More specifically, a compact heat exchanger with milli / microchannels will be developed and tested to remove the heat through the back side of this MCM assembly for moderate and high

  5. Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

    Science.gov (United States)

    Shahrjerdi, Davood; Bedell, Stephen W

    2013-01-09

    In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

  6. Cobalt micro-magnet integration on silicon MOS quantum dots

    Science.gov (United States)

    Camirand Lemyre, Julien; Rochette, Sophie; Anderson, John; Manginell, Ronald P.; Pluym, Tammy; Ward, Dan; Carroll, Malcom S.; Pioro-Ladrière, Michel

    Integration of cobalt micro-magnets on silicon metal-oxide-semiconductor (MOS) quantum dot devices has been investigated. The micro-magnets are fabricated in a lift-off process with e-beam lithography and deposited directly on top of an etched poly-silicon gate stack. Among the five resist stacks tested, one is found to be compatible with our MOS specific materials (Si and SiO2) . Moreover, devices with and without additional Al2O3 insulating layer show no additional gate leakage after processing. Preliminary transport data indicates electrostatic stability of our devices with integrated magnets. This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

  7. Localized synthesis, assembly and integration of silicon nanowires

    Science.gov (United States)

    Englander, Ongi

    Localized synthesis, assembly and integration of one-dimensional silicon nanowires with MEMS structures is demonstrated and characterized in terms of local synthesis processes, electric-field assisted self-assembly, and a proof-of-concept nanoelectromechanical system (HEMS) demonstration. Emphasis is placed on the ease of integration, process control strategies, characterization techniques and the pursuit of integrated devices. A top-down followed by a bottom-up integration approach is utilized. Simple MEMS heater structures are utilized as the microscale platforms for the localized, bottom-up synthesis of one-dimensional nanostructures. Localized heating confines the high temperature region permitting only localized nanostructure synthesis and allowing the surroundings to remain at room temperature thus enabling CMOS compatible post-processing. The vapor-liquid-solid (VLS) process in the presence of a catalytic nanoparticle, a vapor phase reactant, and a specific temperature environment is successfully employed locally. Experimentally, a 5nm thick gold-palladium layer is used as the catalyst while silane is the vapor phase reactant. The current-voltage behavior of the MEMS structures can be correlated to the approximate temperature range required for the VLS reaction to take place. Silicon nanowires averaging 45nm in diameter and up to 29mum in length synthesized at growth rates of up to 1.5mum/min result. By placing two MEMS structures in close proximity, 4--10mum apart, localized silicon nanowire growth can be used to link together MEMS structures to yield a two-terminal, self-assembled micro-to-nano system. Here, one MEMS structure is designated as the hot growth structure while a nearby structure is designated as the cold secondary structure, whose role is to provide a natural stopping point for the VLS reaction. The application of a localized electric-field, 5 to 13V/mum in strength, during the synthesis process, has been shown to improve nanowire

  8. Hybrid Integrated Silicon Microfluidic Platform for Fluorescence Based Biodetection

    Directory of Open Access Journals (Sweden)

    André Darveau

    2007-09-01

    Full Text Available The desideratum to develop a fully integrated Lab-on-a-chip device capable ofrapid specimen detection for high throughput in-situ biomedical diagnoses and Point-of-Care testing applications has called for the integration of some of the novel technologiessuch as the microfluidics, microphotonics, immunoproteomics and Micro ElectroMechanical Systems (MEMS. In the present work, a silicon based microfluidic device hasbeen developed for carrying out fluorescence based immunoassay. By hybrid attachment ofthe microfluidic device with a Spectrometer-on-chip, the feasibility of synthesizing anintegrated Lab-on-a-chip type device for fluorescence based biosensing has beendemonstrated. Biodetection using the microfluidic device has been carried out usingantigen sheep IgG and Alexafluor-647 tagged antibody particles and the experimentalresults prove that silicon is a compatible material for the present application given thevarious advantages it offers such as cost-effectiveness, ease of bulk microfabrication,superior surface affinity to biomolecules, ease of disposability of the device etc., and is thussuitable for fabricating Lab-on-a-chip type devices.

  9. Nanophotonic integrated circuits from nanoresonators grown on silicon.

    Science.gov (United States)

    Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

    2014-07-07

    Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

  10. Thermally-isolated silicon-based integrated circuits and related methods

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

    2017-05-09

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  11. Method of making thermally-isolated silicon-based integrated circuits

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.; Bauer, Todd

    2017-11-21

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  12. Roadmap for integration of InP based photonics and silicon electronics

    NARCIS (Netherlands)

    Williams, K.A.

    2015-01-01

    We identify the synergies and a roadmap for the intimate integration of InP photonic integrated circuits and Silicon electronic ICs using wafer-scale processes. Advantages are foreseen in terms of bandwidth, energy savings and package simplification.

  13. Plasmonic nanofocusing of light in an integrated silicon photonics platform.

    Science.gov (United States)

    Desiatov, Boris; Goykhman, Ilya; Levy, Uriel

    2011-07-04

    The capability to focus electromagnetic energy at the nanoscale plays an important role in nanoscinece and nanotechnology. It allows enhancing light matter interactions at the nanoscale with applications related to nonlinear optics, light emission and light detection. It may also be used for enhancing resolution in microscopy, lithography and optical storage systems. Hereby we propose and experimentally demonstrate the nanoscale focusing of surface plasmons by constructing an integrated plasmonic/photonic on chip nanofocusing device in silicon platform. The device was tested directly by measuring the optical intensity along it using a near-field microscope. We found an order of magnitude enhancement of the intensity at the tip's apex. The spot size is estimated to be 50 nm. The demonstrated device may be used as a building block for "lab on a chip" systems and for enhancing light matter interactions at the apex of the tip.

  14. Strategies for doped nanocrystalline silicon integration in silicon heterojunction solar cells

    Czech Academy of Sciences Publication Activity Database

    Seif, J.; Descoeudres, A.; Nogay, G.; Hänni, S.; de Nicolas, S.M.; Holm, N.; Geissbühler, J.; Hessler-Wyser, A.; Duchamp, M.; Dunin-Borkowski, R.E.; Ledinský, Martin; De Wolf, S.; Ballif, C.

    2016-01-01

    Roč. 6, č. 5 (2016), s. 1132-1140 ISSN 2156-3381 R&D Projects: GA MŠk LM2015087 Institutional support: RVO:68378271 Keywords : microcrystalline silicon * nanocrystalline silicon * silicon heterojunctions (SHJs) * solar cells Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.712, year: 2016

  15. Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

    Science.gov (United States)

    Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

    2015-04-06

    Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

  16. Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

    International Nuclear Information System (INIS)

    Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C.; Koeber, S.; Freude, W.; Koos, C.; Rembe, C.

    2014-01-01

    We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB

  17. Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

    Energy Technology Data Exchange (ETDEWEB)

    Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C. [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe (Germany); Koeber, S.; Freude, W., E-mail: christian.koos@kit.edu; Koos, C., E-mail: christian.koos@kit.edu [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe, Germany and Institute of Microstructure Technology, Karlsruhe Institute of Technology, 76344 Eggenstein-Leopoldshafen (Germany); Rembe, C. [Polytec GmbH, 76337 Waldbronn (Germany)

    2014-05-27

    We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB.

  18. Crystalline Silicon Interconnected Strips (XIS). Introduction to a New, Integrated Device and Module Concept

    Energy Technology Data Exchange (ETDEWEB)

    Van Roosmalen, J.; Bronsveld, P.; Mewe, A.; Janssen, G.; Stodolny, M.; Cobussen-Pool, E.; Bennett, I.; Weeber, A.; Geerligs, B. [ECN Solar Energy, P.O. Box 1, NL-1755 ZG, Petten (Netherlands)

    2012-06-15

    A new device concept for high efficiency, low cost, wafer based silicon solar cells is introduced. To significantly lower the costs of Si photovoltaics, high efficiencies and large reductions of metals and silicon costs are required. To enable this, the device architecture was adapted into low current devices by applying thin silicon strips, to which a special high efficiency back-contact heterojunction cell design was applied. Standard industrial production processes can be used for our fully integrated cell and module design, with a cost reduction potential below 0.5 euro/Wp. First devices have been realized demonstrating the principle of a series connected back contact hybrid silicon heterojunction module concept.

  19. Monolithic nanoscale photonics-electronics integration in silicon and other group IV elements

    CERN Document Server

    Radamson, Henry

    2014-01-01

    Silicon technology is evolving rapidly, particularly in board-to-board or chip-to chip applications. Increasingly, the electronic parts of silicon technology will carry out the data processing, while the photonic parts take care of the data communication. For the first time, this book describes the merging of photonics and electronics in silicon and other group IV elements. It presents the challenges, the limitations, and the upcoming possibilities of these developments. The book describes the evolution of CMOS integrated electronics, status and development, and the fundamentals of silicon p

  20. Graphene-on-silicon hybrid plasmonic-photonic integrated circuits.

    Science.gov (United States)

    Xiao, Ting-Hui; Cheng, Zhenzhou; Goda, Keisuke

    2017-06-16

    Graphene surface plasmons (GSPs) have shown great potential in biochemical sensing, thermal imaging, and optoelectronics. To excite GSPs, several methods based on the near-field optical microscope and graphene nanostructures have been developed in the past few years. However, these methods suffer from their bulky setups and low GSP-excitation efficiency due to the short interaction length between free-space vertical excitation light and the atomic layer of graphene. Here we present a CMOS-compatible design of graphene-on-silicon hybrid plasmonic-photonic integrated circuits that achieve the in-plane excitation of GSP polaritons as well as localized surface plasmon (SP) resonance. By employing a suspended membrane slot waveguide, our design is able to excite GSP polaritons on a chip. Moreover, by utilizing a graphene nanoribbon array, we engineer the transmission spectrum of the waveguide by excitation of localized SP resonance. Our theoretical and computational study paves a new avenue to enable, modulate, and monitor GSPs on a chip, potentially applicable for the development of on-chip electro-optic devices.

  1. Silicon Integrated Dual-Mode Interferometer with Differential Outputs

    Directory of Open Access Journals (Sweden)

    Niklas Hoppe

    2017-09-01

    Full Text Available The dual-mode interferometer (DMI is an attractive alternative to Mach-Zehnder interferometers for sensor purposes, achieving sensitivities to refractive index changes close to state-of-the-art. Modern designs on silicon-on-insulator (SOI platforms offer thermally stable and compact devices with insertion losses of less than 1 dB and high extinction ratios. Compact arrays of multiple DMIs in parallel are easy to fabricate due to the simple structure of the DMI. In this work, the principle of operation of an integrated DMI with differential outputs is presented which allows the unambiguous phase shift detection with a single wavelength measurement, rather than using a wavelength sweep and evaluating the optical output power spectrum. Fluctuating optical input power or varying attenuation due to different analyte concentrations can be compensated by observing the sum of the optical powers at the differential outputs. DMIs with two differential single-mode outputs are fabricated in a 250 nm SOI platform, and corresponding measurements are shown to explain the principle of operation in detail. A comparison of DMIs with the conventional Mach-Zehnder interferometer using the same technology concludes this work.

  2. Thermal performances of ETFE cushion roof integrated amorphous silicon photovoltaic

    International Nuclear Information System (INIS)

    Hu, Jianhui; Chen, Wujun; Qiu, Zhenyu; Zhao, Bing; Zhou, Jinyu; Qu, Yegao

    2015-01-01

    Highlights: • Thermal performances of a three layer ETFE cushion integrated a-Si PV is evaluated. • Temperature of a-Si PV obviously affects temperature field and temperature boundary. • The maximum temperature difference of 3.4 K between measured and numerical results. • Main transport mechanisms in upper and lower chambers are convection and conduction. • Heat transfer coefficients of this roof are less than those of other ETFE cushion roofs. - Abstract: Thermal performances of the ETFE cushion roof integrated amorphous silicon photovoltaic (a-Si PV) are essential to estimate building performances, such as temperature distribution and heat transfer coefficient. To investigate these thermal performances, an experimental mock-up composed of a-Si PV and a three-layer ETFE cushion roof was built and the experiment was carried out under summer sunny condition. Meanwhile, numerical model with real boundary conditions was performed in this paper. The experimental results show that the temperature sequence of the three layers was the middle, top and bottom layer and that the PV temperature caused by solar irradiance was 353.8 K. This gives evidence that the PV has a significant effect on the temperature distribution. The experimental temperature was in good agreement with the corresponding location of the numerical temperature since the maximum temperature difference was only 3.4 K. Therefore, the numerical results were justified and then used to analyze the airflow characteristics and calculate the thermal performances. For the airflow characteristics, it is found that the temperature distribution was not uniform and the main transport mechanisms in the upper and lower chambers formed by the three layers were the convection and conduction, respectively. For the thermal performances, the surface convective heat transfer coefficients were obtained, which have validated that thermal performances of the three-layer ETFE cushion integrated a-Si PV are better than

  3. Optoelectronic Device Integration in Silicon (OpSIS)

    Science.gov (United States)

    2015-10-26

    silicon-on-insulator," Opt. Express 22, 17872-17879 (2014) Y. Yang, C. Galland, Y. Liu, K. Tan , R. Ding, Q. Li, K. Bergman, T. Baehr-Jones, M...Jaeger, Nicolas AF; Chrostowski, Lukas; “Electrically tunable resonant filters in phase-shifted contra- directional couplers” IEEE Group IV Photonics... Nicolas AF; Chrostowski, Lukas; “Silicon photonic grating-assisted, contra-directional couplers” Optics express Vol. 21, No. 3; 3633-3650 (2013

  4. Integration of the End Cap TEC+ of the CMS Silicon Strip Tracker

    CERN Document Server

    Adler, Volker; Ageron, Michel; Agram, Jean-Laurent; Atz, Bernd; Barvich, Tobias; Baulieu, Guillaume; Beaumont, Willem; Beissel, Franz; Bergauer, Thomas; Berst, Jean-Daniel; Blüm, Peter; Bock, E; Bogelsbacher, F; de Boer, Wim; Bonnet, Jean-Luc; Bonnevaux, Alain; Boudoul, Gaelle; Bouhali, Othmane; Braunschweig, Wolfgang; Bremer, R; Brom, Jean-Marie; Butz, Erik; Chabanat, Eric; Chabert, Eric Christian; Clerbaux, Barbara; Contardo, Didier; De Callatay, Bernard; Dehm, Philip; Delaere, Christophe; Della Negra, Rodolphe; Dewulf, Jean-Paul; D'Hondt, Jorgen; Didierjean, Francois; Dierlamm, Alexander; Dirkes, Guido; Dragicevic, Marko; Drouhin, Frédéric; Ernenwein, Jean-Pierre; Esser, Hans; Estre, Nicolas; Fahrer, Manuel; Feld, Lutz; Fernández, J; Florins, Benoit; Flossdorf, Alexander; Flucke, Gero; Flügge, Günter; Fontaine, Jean-Charles; Freudenreich, Klaus; Frey, Martin; Friedl, Markus; Furgeri, Alexander; Giraud, Noël; Goerlach, Ulrich; Goorens, Robert; Graehling, Philippe; Grégoire, Ghislain; Gregoriev, E; Gross, Laurent; Hansel, S; Haroutunian, Roger; Hartmann, Frank; Heier, Stefan; Hermanns, Thomas; Heydhausen, Dirk; Heyninck, Jan; Hosselet, J; Hrubec, Josef; Jahn, Dieter; Juillot, Pierre; Kaminski, Jochen; Karpinski, Waclaw; Kaussen, Gordon; Keutgen, Thomas; Klanner, Robert; Klein, Katja; König, Stefan; Kosbow, M; Krammer, Manfred; Ledermann, Bernhard; Lemaître, Vincent; De Lentdecker, Gilles; Linn, Alexander; Lounis, Abdenour; Lübelsmeyer, Klaus; Lumb, Nicholas; Maazouzi, Chaker; Mahmoud, Tariq; Michotte, Daniel; Militaru, Otilia; Mirabito, Laurent; Müller, Thomas; Neukermans, Lionel; Ollivetto, C; Olzem, Jan; Ostapchuk, Andrey; Pandoulas, Demetrios; Pein, Uwe; Pernicka, Manfred; Perriès, Stephane; Piaseki, C; Pierschel, Gerhard; Piotrzkowski, Krzysztof; Poettgens, Michael; Pooth, Oliver; Rouby, Xavier; Sabellek, Andreas; Schael, Stefan; Schirm, Norbert; Schleper, Peter; Schmitz, Stefan Antonius; Schultz von Dratzig, Arndt; Siedling, Rolf; Simonis, Hans-Jürgen; Stahl, Achim; Steck, Pia; Steinbruck, G; Stoye, Markus; Strub, Roger; Tavernier, Stefaan; Teyssier, Daniel; Theel, Andreas; Trocmé, Benjamin; Udo, Fred; Van der Donckt, M; Van der Velde, C; Van Hove, Pierre; Vanlaer, Pascal; Van Lancker, Luc; Van Staa, Rolf; Vanzetto, Sylvain; Weber, Markus; Weiler, Thomas; Weseler, Siegfried; Wickens, John; Wittmer, Bruno; Wlochal, Michael; De Wolf, Eddi A; Zhukov, Valery; Zoeller, Marc Henning

    2009-01-01

    The silicon strip tracker of the CMS experiment has been completed and inserted into the CMS detector in late 2007. The largest sub-system of the tracker is its end cap system, comprising two large end caps (TEC) each containing 3200 silicon strip modules. To ease construction, the end caps feature a modular design: groups of about 20 silicon modules are placed on sub-assemblies called petals and these self-contained elements are then mounted into the TEC support structures. Each end cap consists of 144 petals, and the insertion of these petals into the end cap structure is referred to as TEC integration. The two end caps were integrated independently in Aachen (TEC+) and at CERN (TEC--). This note deals with the integration of TEC+, describing procedures for end cap integration and for quality control during testing of integrated sections of the end cap and presenting results from the testing.

  5. Al transmon qubits on silicon-on-insulator for quantum device integration

    Science.gov (United States)

    Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

    2017-07-01

    We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

  6. Methods and mechanisms of gettering of silicon structures in the production of integrated circuits

    Directory of Open Access Journals (Sweden)

    Pilipenko V. A.

    2013-05-01

    Full Text Available Increasing the degree of integration of hardware components imposes more stringent requirements for the reduction of the concentration of contaminants and oxidation stacking faults in the original silicon wafers with its preservation in the IC manufacturing process cycle. This causes high relevance of the application of gettering in modern microelectronic technology. The existing methods of silicon wafers gettering and the mechanisms of their occurrence are considered.

  7. Integrated GaN photonic circuits on silicon (100) for second harmonic generation

    OpenAIRE

    Xiong, Chi; Pernice, Wolfram; Ryu, Kevin K.; Schuck, Carsten; Fong, King Y.; Palacios, Tomas; Tang, Hong X.

    2014-01-01

    We demonstrate second order optical nonlinearity in a silicon architecture through heterogeneous integration of single-crystalline gallium nitride (GaN) on silicon (100) substrates. By engineering GaN microrings for dual resonance around 1560 nm and 780 nm, we achieve efficient, tunable second harmonic generation at 780 nm. The \\{chi}(2) nonlinear susceptibility is measured to be as high as 16 plus minus 7 pm/V. Because GaN has a wideband transparency window covering ultraviolet, visible and ...

  8. Ultrahigh-density trench cpacitors in silicon and their application to integrated DC-DC conversion

    NARCIS (Netherlands)

    Roozeboom, F.; Bergveld, H.J.; Nowak, K.; Le Cornec, F.; Guiraud, L.; Bunel, C.; Iochem, S.; Ferreira, J.; Ledain, S.; Pieraerts, E.; Pommier, M.

    2009-01-01

    This paper addresses silicon-based integration of passive components applied to 3D integration with dies of other technologies within one package. Particularly, the development of high-density trench capacitors has enabled the realization of small-formfactor DC-DC converters. As illustration, an

  9. Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

  10. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  11. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

    2016-01-01

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  12. Characterization of porous silicon integrated in liquid chromatography chips

    NARCIS (Netherlands)

    Tiggelaar, Roald M.; Verdoold, Vincent; Eghbali, H.; Desmet, G.; Gardeniers, Johannes G.E.

    2009-01-01

    Properties of porous silicon which are relevant for use of the material as a stationary phase in liquid chromatography chips, like porosity, pore size and specific surface area, were determined with high-resolution SEM and N2 adsorption–desorption isotherms. For the anodization conditions

  13. A new semicustom integrated bipolar amplifier for silicon strip detectors

    International Nuclear Information System (INIS)

    Zimmerman, T.

    1989-01-01

    The QPA02 is a four channel DC coupled two stage transimpedance amplifier designed at Fermilab on a semicustom linear array (Quickchip 2S) manufactured by Tektronix. The chip was developed as a silicon strip amplifier but may have other applications as well. Each channel consists of a preamplifier and a second stage amplifier/sharper with differential output which can directly drive a transmission line (90 to 140 ohms). External bypass capacitors are the only discrete components required. QPA02 has been tested and demonstrated to be an effective silicon strip amplifier. Other applications may exist which can use this amplifier or a modified version of this amplifier. For example, another design is now in progress for a wire chamber amplifier, QPA03, to be reported later. Only a relatively small effort was required to modify the design and layout for this application. 11 figs

  14. Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV).

    Science.gov (United States)

    Shen, Wen-Wei; Chen, Kuan-Neng

    2017-12-01

    3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

  15. Progress in complementary metal–oxide–semiconductor silicon photonics and optoelectronic integrated circuits

    International Nuclear Information System (INIS)

    Chen Hongda; Zhang Zan; Huang Beiju; Mao Luhong; Zhang Zanyun

    2015-01-01

    Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits (OEICs) based on a complementary metal–oxide–semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems. (review)

  16. High-dimensional quantum key distribution based on multicore fiber using silicon photonic integrated circuits

    DEFF Research Database (Denmark)

    Ding, Yunhong; Bacco, Davide; Dalgaard, Kjeld

    2017-01-01

    is intrinsically limited to 1 bit/photon. Here we propose and experimentally demonstrate, for the first time, a high-dimensional quantum key distribution protocol based on space division multiplexing in multicore fiber using silicon photonic integrated lightwave circuits. We successfully realized three mutually......-dimensional quantum states, and enables breaking the information efficiency limit of traditional quantum key distribution protocols. In addition, the silicon photonic circuits used in our work integrate variable optical attenuators, highly efficient multicore fiber couplers, and Mach-Zehnder interferometers, enabling...

  17. Compact polarization beam splitter for silicon photonic integrated circuits with a 340-nm-thick silicon core layer.

    Science.gov (United States)

    Li, Chenlei; Dai, Daoxin

    2017-11-01

    A polarization beam splitter (PBS) is proposed and realized for silicon photonic integrated circuits with a 340-nm-thick silicon core layer by introducing an asymmetric directional coupler (ADC), which consists of a silicon-on-insulator (SOI) nanowire and a subwavelength grating (SWG) waveguide. The SWG is introduced to provide an optical waveguide which has much higher birefringence than a regular 340-nm-thick SOI nanowire, so that it is possible to make the phase-matching condition satisfied for TE polarization only in the present design when the waveguide dimensions are optimized. Meanwhile, there is a significant phase mismatching for TM polarization automatically. In this way, the present ADC enables strong polarization selectivity to realize a PBS that separates TE and TM polarizations to the cross and through ports, respectively. The realized PBS has a length of ∼2  μm for the coupling region. For the fabricated PBS, the extinction ratio (ER) is 15-30 dB and the excess loss is 0.2-2.6 dB for TE polarization while the ER is 20-27 dB and the excess loss is 0.3-2.8 dB for TM polarization when operating in the wavelength range of 1520-1580 nm.

  18. The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

    Science.gov (United States)

    Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-02-01

    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

  19. Heterogeneously integrated silicon photonics for the mid-infrared and spectroscopic sensing.

    Science.gov (United States)

    Chen, Yu; Lin, Hongtao; Hu, Juejun; Li, Mo

    2014-07-22

    Besides being the foundational material for microelectronics, crystalline silicon has long been used for the production of infrared lenses and mirrors. More recently, silicon has become the key material to achieve large-scale integration of photonic devices for on-chip optical interconnect and signal processing. For optics, silicon has significant advantages: it offers a very high refractive index and is highly transparent in the spectral range from 1.2 to 8 μm. To fully exploit silicon’s superior performance in a remarkably broad range and to enable new optoelectronic functionalities, here we describe a general method to integrate silicon photonic devices on arbitrary foreign substrates. In particular, we apply the technique to integrate silicon microring resonators on mid-infrared compatible substrates for operation in the mid-infrared. These high-performance mid-infrared optical resonators are utilized to demonstrate, for the first time, on-chip cavity-enhanced mid-infrared spectroscopic analysis of organic chemicals with a limit of detection of less than 0.1 ng.

  20. Ultrafast triggered transient energy storage by atomic layer deposition into porous silicon for integrated transient electronics

    Science.gov (United States)

    Douglas, Anna; Muralidharan, Nitin; Carter, Rachel; Share, Keith; Pint, Cary L.

    2016-03-01

    Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics.Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics. Electronic supplementary information (ESI) available: (i) Experimental details for ALD and material fabrication, ellipsometry film thickness, preparation of gel electrolyte and separator, details for electrochemical measurements, HRTEM image of VOx coated porous silicon, Raman spectroscopy for VOx as-deposited as well as annealed in air for 1 hour at 450 °C, SEM and transient behavior dissolution tests of uniformly coated VOx on

  1. Hybrid Integration of Solid-State Quantum Emitters on a Silicon Photonic Chip.

    Science.gov (United States)

    Kim, Je-Hyung; Aghaeimeibodi, Shahriar; Richardson, Christopher J K; Leavitt, Richard P; Englund, Dirk; Waks, Edo

    2017-12-13

    Scalable quantum photonic systems require efficient single photon sources coupled to integrated photonic devices. Solid-state quantum emitters can generate single photons with high efficiency, while silicon photonic circuits can manipulate them in an integrated device structure. Combining these two material platforms could, therefore, significantly increase the complexity of integrated quantum photonic devices. Here, we demonstrate hybrid integration of solid-state quantum emitters to a silicon photonic device. We develop a pick-and-place technique that can position epitaxially grown InAs/InP quantum dots emitting at telecom wavelengths on a silicon photonic chip deterministically with nanoscale precision. We employ an adiabatic tapering approach to transfer the emission from the quantum dots to the waveguide with high efficiency. We also incorporate an on-chip silicon-photonic beamsplitter to perform a Hanbury-Brown and Twiss measurement. Our approach could enable integration of precharacterized III-V quantum photonic devices into large-scale photonic structures to enable complex devices composed of many emitters and photons.

  2. Integrated programmable photonic filter on the silicon -on- insulator platform

    DEFF Research Database (Denmark)

    Liao, Shasha; Ding, Yunhong; Peucheret, Christophe

    2014-01-01

    We propose and demonstrate a silicon - on - insulator (SOI) on - chip programmable filter based on a four - tap finite impulse response structure. The photonic filter is programmable thanks to amplitude and phase modulation of each tap controlled by thermal heater s. We further demonstrate...... the tunability of the filter central wavelength, bandwidth and variable passband shape. The tuning range of the central wavelength is at least 42% of the free spectral range. The bandwidth tuning range is at least half of the free spectral range. Our scheme has distinct advantages of compactness, capability...

  3. Silicon analog components device design, process integration, characterization, and reliability

    CERN Document Server

    El-Kareh, Badih

    2015-01-01

    This book covers modern analog components, their characteristics, and interactions with process parameters. It serves as a comprehensive guide, addressing both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. Based on the authors’ extensive experience in the development of analog devices, this book is intended for engineers and scientists in semiconductor research, development and manufacturing. The problems at the end of each chapter and the numerous charts, figures and tables also make it appropriate for use as a text in graduate and advanced undergraduate courses in electrical engineering and materials science.

  4. An innovative large scale integration of silicon nanowire-based field effect transistors

    Science.gov (United States)

    Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

    2018-05-01

    Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

  5. Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

    Science.gov (United States)

    Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

    2018-04-01

    Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

  6. Miniaturized flow cytometer with 3D hydrodynamic particle focusing and integrated optical elements applying silicon photodiodes

    NARCIS (Netherlands)

    Rosenauer, M.; Buchegger, W.; Finoulst, I.; Verhaert, P.D.E.M.; Vellekoop, M.

    2010-01-01

    In this study, the design, realization and measurement results of a novel optofluidic system capable of performing absorbance-based flow cytometric analysis is presented. This miniaturized laboratory platform, fabricated using SU-8 on a silicon substrate, comprises integrated polymer-based

  7. Realization of an integrated VDF/TrFE copolymer-on-silicon pyroelectric sensor

    NARCIS (Netherlands)

    Setiadi, D.; Setiadi, D.; Regtien, Paulus P.L.; Sarro, P.M.

    1995-01-01

    An integrated pyroelectric sensor based on a vinylidene fluoride trifluoroethylene (VDF/TrFE) copolymer is presented. A silicon substrate that contains FET readout electronics is coated with the VDF/TrFE copolymer film using a spin-coating technique. On-chip poling of the copolymer has been applied

  8. Recent results from the development of silicon detectors with integrated electronics

    Energy Technology Data Exchange (ETDEWEB)

    Dalla Betta, G.-F. E-mail: dallabe@dit.unitn.it; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N

    2004-02-01

    In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization.

  9. Recent results from the development of silicon detectors with integrated electronics

    International Nuclear Information System (INIS)

    Dalla Betta, G.-F.; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N.

    2004-01-01

    In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization

  10. Towards a fully integrated indium-phosphide membrane on silicon photonics platform

    NARCIS (Netherlands)

    van Engelen, J.P.; Pogoretskiy, V.; Smit, M.K.; van der Tol, J.J.G.M.; Jiao, Y.

    2017-01-01

    Recently a uni-traveling-carrier photodetector with high speed (> 67GHz) and a high-gain optical amplifier (110/cm at 4 kA/cm2) have been demonstrated using the InP membrane-on-Silicon (IMOS) integration technology. Passives in IMOS have shown features comparable to SOI platforms due to the tight

  11. Hybrid integrated single-wavelength laser with silicon micro-ring reflector

    Science.gov (United States)

    Ren, Min; Pu, Jing; Krishnamurthy, Vivek; Xu, Zhengji; Lee, Chee-Wei; Li, Dongdong; Gonzaga, Leonard; Toh, Yeow T.; Tjiptoharsono, Febi; Wang, Qian

    2018-02-01

    A hybrid integrated single-wavelength laser with silicon micro-ring reflector is demonstrated theoretically and experimentally. It consists of a heterogeneously integrated III-V section for optical gain, an adiabatic taper for light coupling, and a silicon micro-ring reflector for both wavelength selection and light reflection. Heterogeneous integration processes for multiple III-V chips bonded to an 8-inch Si wafer have been developed, which is promising for massive production of hybrid lasers on Si. The III-V layer is introduced on top of a 220-nm thick SOI layer through low-temperature wafer-boning technology. The optical coupling efficiency of >85% between III-V and Si waveguide has been achieved. The silicon micro-ring reflector, as the key element of the hybrid laser, is studied, with its maximized reflectivity of 85.6% demonstrated experimentally. The compact single-wavelength laser enables fully monolithic integration on silicon wafer for optical communication and optical sensing application.

  12. Integrating carbon nanotubes into silicon by means of vertical carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi; Wang, Qingxiao; Yue, Weisheng; Guo, Zaibing; LI, LIANG; Zhao, Chao; Wang, Xianbin; Abutaha, Anas I.; Alshareef, Husam N.; Zhang, Yafei; Zhang, Xixiang

    2014-01-01

    Single-walled carbon nanotubes have been integrated into silicon for use in vertical carbon nanotube field-effect transistors (CNTFETs). A unique feature of these devices is that a silicon substrate and a metal contact are used as the source and drain for the vertical transistors, respectively. These CNTFETs show very different characteristics from those fabricated with two metal contacts. Surprisingly, the transfer characteristics of the vertical CNTFETs can be either ambipolar or unipolar (p-type or n-type) depending on the sign of the drain voltage. Furthermore, the p-type/n-type character of the devices is defined by the doping type of the silicon substrate used in the fabrication process. A semiclassical model is used to simulate the performance of these CNTFETs by taking the conductance change of the Si contact under the gate voltage into consideration. The calculation results are consistent with the experimental observations. This journal is © the Partner Organisations 2014.

  13. Three-Dimensional Integration of Black Phosphorus Photodetector with Silicon Photonics and Nanoplasmonics.

    Science.gov (United States)

    Chen, Che; Youngblood, Nathan; Peng, Ruoming; Yoo, Daehan; Mohr, Daniel A; Johnson, Timothy W; Oh, Sang-Hyun; Li, Mo

    2017-02-08

    We demonstrate the integration of a black phosphorus photodetector in a hybrid, three-dimensional architecture of silicon photonics and metallic nanoplasmonics structures. This integration approach combines the advantages of the low propagation loss of silicon waveguides, high-field confinement of a plasmonic nanogap, and the narrow bandgap of black phosphorus to achieve high responsivity for detection of telecom-band, near-infrared light. Benefiting from an ultrashort channel (∼60 nm) and near-field enhancement enabled by the nanogap structure, the photodetector shows an intrinsic responsivity as high as 10 A/W afforded by internal gain mechanisms, and a 3 dB roll-off frequency of 150 MHz. This device demonstrates a promising approach for on-chip integration of three distinctive photonic systems, which, as a generic platform, may lead to future nanophotonic applications for biosensing, nonlinear optics, and optical signal processing.

  14. A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

    Science.gov (United States)

    Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

    2013-03-01

    Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

  15. Mode converter based on an inverse taper for multimode silicon nanophotonic integrated circuits.

    Science.gov (United States)

    Dai, Daoxin; Mao, Mao

    2015-11-02

    An inverse taper on silicon is proposed and designed to realize an efficient mode converter available for the connection between multimode silicon nanophotonic integrated circuits and few-mode fibers. The present mode converter has a silicon-on-insulator inverse taper buried in a 3 × 3μm(2) SiN strip waveguide to deal with not only for the fundamental mode but also for the higher-order modes. The designed inverse taper enables the conversion between the six modes (i.e., TE(11), TE(21), TE(31), TE(41), TM(11), TM(12)) in a 1.4 × 0.22μm(2) multimode SOI waveguide and the six modes (like the LP(01), LP(11a), LP(11b) modes in a few-mode fiber) in a 3 × 3μm(2) SiN strip waveguide. The conversion efficiency for any desired mode is higher than 95.6% while any undesired mode excitation ratio is lower than 0.5%. This is helpful to make multimode silicon nanophotonic integrated circuits (e.g., the on-chip mode (de)multiplexers developed well) available to work together with few-mode fibers in the future.

  16. VCSEL Scaling, Laser Integration on Silicon, and Bit Energy

    Science.gov (United States)

    2017-03-01

    especially the laser. Highly compact directly modulated lasers ( DMLs ) have been researched to meet this goal. The most favored technology will likely be...question of which achieves lower bit energy, a DML or a continuous-wave (CW) laser coupled to an integrated modulator. Transceiver suppliers are also...development that can utilize high efficiency DMLs that reach very high modulation speed. Oxide-VCSELs [1] do not yet take full advantage of the

  17. Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits

    International Nuclear Information System (INIS)

    Qian Li-Bo; Xia Yin-Shui; Zhu Zhang-Ming; Ding Rui-Xue; Yang Yin-Tang

    2014-01-01

    Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three-dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 mV and 379 mV reductions in the peak noise voltage, respectively

  18. EQUIPMENT FOR NONDESTRUCTIVE TESTING OF SILICON WAFERS SUBMICRON TOPOLOGY DURING THE FABRICATION OF INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    S. A. Chizhik

    2013-01-01

    Full Text Available The advantages of using an atomic force microscopy in manufacturing of submicron integrated circuits are described. The possibilities of characterizing the surface morphology and the etching profile for silicon substrate and bus lines, estimation of the periodicity and size of bus lines, geometrical stability for elementary bus line are shown. Methods of optical and atomic force microcopies are combined in one diagnostic unit. Scanning  probe  microscope  (SPM  200  is  designed  and  produced.  Complex  SPM  200  realizes  nondestructive control of microelectronics elements made on silicon wafers up to 200 mm in diameter and it is introduced by JSC «Integral» for the purpose of operational control, metrology and acceptance of the final product.

  19. Technology for the compatible integration of silicon detectors with readout electronics

    International Nuclear Information System (INIS)

    Zimmer, G.

    1984-01-01

    Compatible integration of detectors and readout electronics on the same silicon substrate is of growing interest. As the methods of microelectronics technology have already been adapted for detector fabrication, a common technology basis for detectors and readout electronics is available. CMOS technology exhibits most attractive features for the compatible realization of readout electronics when advanced LSI processing steps are combined with detector requirements. The essential requirements for compatible integration are the availability of high resistivity (100)-oriented single crystalline silicon substrate, the formation of suitably doped areas for MOS circuits and the isolation of the low voltage circuit from the detector operated at much higher supply voltage. Junction isolation as a first approach based on present production technology and dielectric isolation based on an advanced SOI-LSI technology are discussed as the most promising solutions for present and future applications, respectively. (orig.)

  20. A low cost and hybrid technology for integrating silicon sensors or actuators in polymer microfluidic systems

    International Nuclear Information System (INIS)

    Charlot, Samuel; Gué, Anne-Marie; Tasselli, Josiane; Marty, Antoine; Abgrall, Patrick; Estève, Daniel

    2008-01-01

    This paper describes a new technology permitting a hybrid integration of silicon chips in polymer (PDMS and SU8) microfluidic structures. This two-step technology starts with transferring the silicon device onto a rigid substrate (typically PCB) and planarizing it, and then it proceeds with stacking of the polymer-made fluidic network onto the device. The technology is low cost, based on screen printing and lamination, can be applied to treat large surface areas, and is compatible with standard photolithography and vacuum based approaches. We show, as an example, the integration of a thermal sensor inside channels made of PDMS or SU8. The developed structures had no fluid leaks at the Si/polymer interfaces and the electrical circuit was perfectly tightproof. (note)

  1. Studies and integration of Silicon-based light emitting systems

    OpenAIRE

    González Fernández, Alfredo A.

    2014-01-01

    [spa] Este proyecto aborda el estudio de dispositivos y materiales luminiscentes basados en silicio para su uso en la fabricación de un sistema óptico que integre emisor de luz, guía de ondas, y sensor en un solo chip obtenido mediante el uso de técnicas y materiales estándar para la fabricación CMOS. Las características atómicas y estructurales de los materiales son analizados y relacionados con su respuesta luminiscente. Considerando los resultados de la caracterización del material a...

  2. Integrated investigation approach for determining mechanical properties of poly-silicon membranes

    OpenAIRE

    Brueckner, J.; Dehe, A.; Auerswald, E.; Dudek, R.; Michel, B.; Rzepka, S.

    2014-01-01

    A methodology is presented for determining mechanical properties of free-standing thin films such as poly-silicon membranes. The integrated investigation approach comprises test structure development, mechanical testing, and numerical simulation. All membrane test structures developed and manufactured consist of the same material but have different stiffness due to variations in the geometric design. The mechanical tests apply microscopic loads utilizing a nanoindentation tool. Young's modulu...

  3. High-contrast gratings for long-wavelength laser integration on silicon

    Science.gov (United States)

    Sciancalepore, Corrado; Descos, Antoine; Bordel, Damien; Duprez, Hélène; Letartre, Xavier; Menezo, Sylvie; Ben Bakir, Badhise

    2014-02-01

    Silicon photonics is increasingly considered as the most promising way-out to the relentless growth of data traffic in today's telecommunications infrastructures, driving an increase in transmission rates and computing capabilities. This is in fact challenging the intrinsic limit of copper-based, short-reach interconnects and microelectronic circuits in data centers and server architectures to offer enough modulation bandwidth at reasonable power dissipation. In the context of the heterogeneous integration of III-V direct-bandgap materials on silicon, optics with high-contrast metastructures enables the efficient implementation of optical functions such as laser feedback, input/output (I/O) to active/passive components, and optical filtering, while heterogeneous integration of III-V layers provides sufficient optical gain, resulting in silicon-integrated laser sources. The latest ensure reduced packaging costs and reduced footprint for the optical transceivers, a key point for the short reach communications. The invited talk will introduce the audience to the latest breakthroughs concerning the use of high-contrast gratings (HCGs) for the integration of III-V-on-Si verticalcavity surface-emitting lasers (VCSELs) as well as Fabry-Perot edge-emitters (EELs) in the main telecom band around 1.55 μm. The strong near-field mode overlap within HCG mirrors can be exploited to implement unique optical functions such as dense wavelength division multiplexing (DWDM): a 16-λ100-GHz-spaced channels VCSEL array is demonstrated. On the other hand, high fabrication yields obtained via molecular wafer bonding of III-V alloys on silicon-on-insulator (SOI) conjugate excellent device performances with cost-effective high-throughput production, supporting industrial needs for a rapid research-to-market transfer.

  4. An improved PIN photodetector with integrated JFET on high-resistivity silicon

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Piemonte, Claudio; Boscardin, Maurizio; Gregori, Paolo; Zorzi, Nicola; Fazzi, Alberto; Pignatel, Giorgio U.

    2006-01-01

    We report on a PIN photodetector integrated with a Junction Field Effect Transistor (JFET) on a high-resistivity silicon substrate. Owing to a modified fabrication technology, the electrical and noise characteristics of the JFET transistor have been enhanced with respect to the previous versions of the device, allowing the performance to be significantly improved. In this paper, the main design and technological aspects relevant to the proposed structure are addressed and experimental results from the electrical characterization are discussed

  5. Integrated Circuit Interconnect Lines on Lossy Silicon Substrate with Finite Element Method

    OpenAIRE

    Sarhan M. Musa,; Matthew N. O. Sadiku

    2014-01-01

    The silicon substrate has a significant effect on the inductance parameter of a lossy interconnect line on integrated circuit. It is essential to take this into account in determining the transmission line electrical parameters. In this paper, a new quasi-TEM capacitance and inductance analysis of multiconductor multilayer interconnects is successfully demonstrated using finite element method (FEM). We specifically illustrate the electrostatic modeling of single and coupled in...

  6. Single- and double- lumen silicone breast implant integrity: prospective evaluation of MR and US criteria.

    Science.gov (United States)

    Berg, W A; Caskey, C I; Hamper, U M; Kuhlman, J E; Anderson, N D; Chang, B W; Sheth, S; Zerhouni, E A

    1995-10-01

    To evaluate the accuracy of magnetic resonance (MR) and ultrasound (US) criteria for breast implant integrity. One hundred twenty-two single-lumen silicone breast implants and 22 bilumen implants were evaluated with surface coil MR imaging and US and surgically removed. MR criteria for implant failure were a collapsed implant shell ("linguine sign"), foci of silicone outside the shell ("noose sign"), and extracapsular gel, US criteria were collapsed shell, low-level echoes within the gel, and "snowstorm" echoes of extracapsular silicone. Among single-lumen implants, MR imaging depicted 39 of 40 ruptures, 14 of 28 with minimal leakage; 49 of 54 intact implants were correctly interpreted. US depicted 26 of 40 ruptured implants, four of 28 with minimal leakage, and 30 of 54 intact implants. Among bilumen implants, MR imaging depicted four of five implants with rupture of both lumina and nine of 10 as intact; US depicted one rupture and helped identify two of 10 as intact. Mammography accurately depicted the status of 29 of 30 bilumen implants with MR imaging correlation. MR imaging depicts implant integrity more accurately than US; neither method reliably depicts minimal leakage with shell collapse. Mammography is useful in screening bilumen implant integrity.

  7. Software-defined networking control plane for seamless integration of multiple silicon photonic switches in Datacom networks.

    Science.gov (United States)

    Shen, Yiwen; Hattink, Maarten H N; Samadi, Payman; Cheng, Qixiang; Hu, Ziyiz; Gazman, Alexander; Bergman, Keren

    2018-04-16

    Silicon photonics based switches offer an effective option for the delivery of dynamic bandwidth for future large-scale Datacom systems while maintaining scalable energy efficiency. The integration of a silicon photonics-based optical switching fabric within electronic Datacom architectures requires novel network topologies and arbitration strategies to effectively manage the active elements in the network. We present a scalable software-defined networking control plane to integrate silicon photonic based switches with conventional Ethernet or InfiniBand networks. Our software-defined control plane manages both electronic packet switches and multiple silicon photonic switches for simultaneous packet and circuit switching. We built an experimental Dragonfly network testbed with 16 electronic packet switches and 2 silicon photonic switches to evaluate our control plane. Observed latencies occupied by each step of the switching procedure demonstrate a total of 344 µs control plane latency for data-center and high performance computing platforms.

  8. A bipolar analog front-end integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1993-11-01

    A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using AT ampersand T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Φ=10 14 protons/cm 2 have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process

  9. Single-crystal silicon trench etching for fabrication of highly integrated circuits

    Science.gov (United States)

    Engelhardt, Manfred

    1991-03-01

    The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

  10. Gallium Phosphide Integrated with Silicon Heterojunction Solar Cells

    Science.gov (United States)

    Zhang, Chaomin

    It has been a long-standing goal to epitaxially integrate III-V alloys with Si substrates which can enable low-cost microelectronic and optoelectronic systems. Among the III-V alloys, gallium phosphide (GaP) is a strong candidate, especially for solar cells applications. Gallium phosphide with small lattice mismatch ( 0.4%) to Si enables coherent/pseudomorphic epitaxial growth with little crystalline defect creation. The band offset between Si and GaP suggests that GaP can function as an electron-selective contact, and it has been theoretically shown that GaP/Si integrated solar cells have the potential to overcome the limitations of common a-Si based heterojunction (SHJ) solar cells. Despite the promising potential of GaP/Si heterojunction solar cells, there are two main obstacles to realize high performance photovoltaic devices from this structure. First, the growth of the polar material (GaP) on the non-polar material (Si) is a challenge in how to suppress the formation of structural defects, such as anti-phase domains (APD). Further, it is widely observed that the minority-carrier lifetime of the Si substrates is significantly decreased during epitaxially growth of GaP on Si. In this dissertation, two different GaP growth methods were compared and analyzed, including migration-enhanced epitaxy (MEE) and traditional molecular beam epitaxy (MBE). High quality GaP can be realized on precisely oriented (001) Si substrates by MBE growth, and the investigation of structural defect creation in the GaP/Si epitaxial structures was conducted using high resolution X-ray diffraction (HRXRD) and high resolution transmission electron microscopy (HRTEM). The mechanisms responsible for lifetime degradation were further investigated, and it was found that external fast diffusors are the origin for the degradation. Two practical approaches including the use of both a SiNx diffusion barrier layer and P-diffused layers, to suppress the Si minority-carrier lifetime degradation

  11. Silicon-Based Technology for Integrated Waveguides and mm-Wave Systems

    DEFF Research Database (Denmark)

    Jovanovic, Vladimir; Gentile, Gennaro; Dekker, Ronald

    2015-01-01

    IC processing is used to develop technology for silicon-filled millimeter-wave-integrated waveguides. The front-end process defines critical waveguide sections and enables integration of dedicated components, such as RF capacitors and resistors. Wafer gluing is used to strengthen the mechanical...... support and deep reactive-ion etching forms the waveguide bulk with smooth and nearly vertical sidewalls. Aluminum metallization covers the etched sidewalls, fully enclosing the waveguides in metal from all sides. Waveguides are fabricated with a rectangular cross section of 560 μm x 280 μm. The measured...

  12. Integrated Amorphous Silicon p-i-n Temperature Sensor for CMOS Photonics

    Directory of Open Access Journals (Sweden)

    Sandro Rao

    2016-01-01

    Full Text Available Hydrogenated amorphous silicon (a-Si:H shows interesting optoelectronic and technological properties that make it suitable for the fabrication of passive and active micro-photonic devices, compatible moreover with standard microelectronic devices on a microchip. A temperature sensor based on a hydrogenated amorphous silicon p-i-n diode integrated in an optical waveguide for silicon photonics applications is presented here. The linear dependence of the voltage drop across the forward-biased diode on temperature, in a range from 30 °C up to 170 °C, has been used for thermal sensing. A high sensitivity of 11.9 mV/°C in the bias current range of 34–40 nA has been measured. The proposed device is particularly suitable for the continuous temperature monitoring of CMOS-compatible photonic integrated circuits, where the behavior of the on-chip active and passive devices are strongly dependent on their operating temperature.

  13. Effects of plasma-deposited silicon nitride passivation on the radiation hardness of CMOS integrated circuits

    International Nuclear Information System (INIS)

    Clement, J.J.

    1980-01-01

    The use of plasma-deposited silicon nitride as a final passivation over metal-gate CMOS integrated circuits degrades the radiation hardness of these devices. The hardness degradation is manifested by increased radiation-induced threshold voltage shifts caused principally by the charging of new interface states and, to a lesser extent, by the trapping of holes created upon exposure to ionizing radiation. The threshold voltage shifts are a strong function of the deposition temperature, and show very little dependence on thickness for films deposited at 300 0 C. There is some correlation between the threshold voltage shifts and the hydrogen content of the PECVD silicon nitride films used as the final passivation layer as a function of deposition temperature. The mechanism by which the hydrogen contained in these films may react with the Si/SiO 2 interface is not clear at this point

  14. Micro direct methanol fuel cell with perforated silicon-plate integrated ionomer membrane

    DEFF Research Database (Denmark)

    Larsen, Jackie Vincent; Dalslet, Bjarke Thomas; Johansson, Anne-Charlotte Elisabeth Birgitta

    2014-01-01

    This article describes the fabrication and characterization of a silicon based micro direct methanol fuel cell using a Nafion ionomer membrane integrated into a perforated silicon plate. The focus of this work is to provide a platform for micro- and nanostructuring of a combined current collector...... at a perforation ratio of 40.3%. The presented fuel cells also show a high volumetric peak power density of 2 mW cm−3 in light of the small system volume of 480 μL, while being fully self contained and passively feed....... and catalytic electrode. AC impedance spectroscopy is utilized alongside IV characterization to determine the influence of the plate perforation geometries on the cell performance. It is found that higher ratios of perforation increases peak power density, with the highest achieved being 2.5 mW cm−2...

  15. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    International Nuclear Information System (INIS)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A.; Bozler, Carl; Omenetto, Fiorenzo

    2015-01-01

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems

  16. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    Energy Technology Data Exchange (ETDEWEB)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A., E-mail: jrogers@illinois.edu [Department of Materials Science and Engineering, Beckman Institute for Advanced Science and Technology, and Frederick Seitz Materials Research Laboratory, University of Illinois at Urbana-Champaign, 104 S Goodwin Ave., Urbana, Illinois 61801 (United States); Bozler, Carl [Lincoln Laboratory, Massachusetts Institute of Technology, 244 Wood Street, Lexington, Massachusetts 02420 (United States); Omenetto, Fiorenzo [Department of Biomedical Engineering, Department of Physics, Tufts University, 4 Colby St., Medford, Massachusetts 02155 (United States)

    2015-01-05

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

  17. Gigascale Silicon Photonic Transmitters Integrating HBT-based Carrier-injection Electroabsorption Modulator Structures

    Science.gov (United States)

    Fu, Enjin

    Demand for more bandwidth is rapidly increasing, which is driven by data intensive applications such as high-definition (HD) video streaming, cloud storage, and terascale computing applications. Next-generation high-performance computing systems require power efficient chip-to-chip and intra-chip interconnect yielding densities on the order of 1Tbps/cm2. The performance requirements of such system are the driving force behind the development of silicon integrated optical interconnect, providing a cost-effective solution for fully integrated optical interconnect systems on a single substrate. Compared to conventional electrical interconnect, optical interconnects have several advantages, including frequency independent insertion loss resulting in ultra wide bandwidth and link latency reduction. For high-speed optical transmitter modules, the optical modulator is a key component of the optical I/O channel. This thesis presents a silicon integrated optical transmitter module design based on a novel silicon HBT-based carrier injection electroabsorption modulator (EAM), which has the merits of wide optical bandwidth, high speed, low power, low drive voltage, small footprint, and high modulation efficiency. The structure, mechanism, and fabrication of the modulator structure will be discussed which is followed by the electrical modeling of the post-processed modulator device. The design and realization of a 10Gbps monolithic optical transmitter module integrating the driver circuit architecture and the HBT-based EAM device in a 130nm BiCMOS process is discussed. For high power efficiency, a 6Gbps ultra-low power driver IC implemented in a 130nm BiCMOS process is presented. The driver IC incorporates an integrated 27-1 pseudo-random bit sequence (PRBS) generator for reliable high-speed testing, and a driver circuit featuring digitally-tuned pre-emphasis signal strength. With outstanding drive capability, the driver module can be applied to a wide range of carrier

  18. Hybrid graphene/silicon integrated optical isolators with photonic spin–orbit interaction

    International Nuclear Information System (INIS)

    Ma, Jingwen; Sun, Xiankai; Xi, Xiang; Yu, Zejie

    2016-01-01

    Optical isolators are an important building block in photonic computation and communication. In traditional optics, isolators are realized with magneto-optical garnets. However, it remains challenging to incorporate such materials on an integrated platform because of the difficulty in material growth and bulky device footprint. Here, we propose an ultracompact integrated isolator by exploiting graphene's magneto-optical property on a silicon-on-insulator platform. The photonic nonreciprocity is achieved because the cyclotrons in graphene experiencing different optical spins exhibit different responses to counterpropagating light. Taking advantage of cavity resonance effects, we have numerically optimized a device design, which shows excellent isolation performance with the extinction ratio over 45 dB and the insertion loss around 12 dB at a wavelength near 1.55 μm. Featuring graphene's CMOS compatibility and substantially reduced device footprint, our proposal sheds light on monolithic integration of nonreciprocal photonic devices.

  19. Integration of the end cap TEC+ of the CMS silicon strip tracker

    Energy Technology Data Exchange (ETDEWEB)

    Bremer, Richard

    2008-04-28

    CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising

  20. Integration of the end cap TEC+ of the CMS silicon strip tracker

    International Nuclear Information System (INIS)

    Bremer, Richard

    2008-01-01

    CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising particles

  1. Nanowire-integrated microporous silicon membrane for continuous fluid transport in micro cooling device

    International Nuclear Information System (INIS)

    So, Hongyun; Pisano, Albert P.; Cheng, Jim C.

    2013-01-01

    We report an efficient passive micro pump system combining the physical properties of nanowires and micropores. This nanowire-integrated microporous silicon membrane was created to feed coolant continuously onto the surface of the wick in a micro cooling device to ensure it remains hydrated and in case of dryout, allow for regeneration of the system. The membrane was fabricated by photoelectrochemical etching to form micropores followed by hydrothermal growth of nanowires. This study shows a promising approach to address thermal management challenges for next generation electronic devices with absence of external power

  2. Ultra-fast photon counting with a passive quenching silicon photomultiplier in the charge integration regime

    Science.gov (United States)

    Zhang, Guoqing; Lina, Liu

    2018-02-01

    An ultra-fast photon counting method is proposed based on the charge integration of output electrical pulses of passive quenching silicon photomultipliers (SiPMs). The results of the numerical analysis with actual parameters of SiPMs show that the maximum photon counting rate of a state-of-art passive quenching SiPM can reach ~THz levels which is much larger than that of the existing photon counting devices. The experimental procedure is proposed based on this method. This photon counting regime of SiPMs is promising in many fields such as large dynamic light power detection.

  3. The SuperB Silicon Vertex Tracker and 3D vertical integration

    CERN Document Server

    Re, Valerio

    2011-01-01

    The construction of the SuperB high luminosity collider was approved and funded by the Italian government in 2011. The performance specifications set by the target luminosity of this machine (> 10^36 cm^-2 s^-1) ask for the development of a Silicon Vertex Tracker with high resolution, high tolerance to radiation and excellent capability of handling high data rates. This paper reviews the R&D activity that is being carried out for the SuperB SVT. Special emphasis is given to the option of exploiting 3D vertical integration to build advanced pixel sensors and readout electronics that are able to comply with SuperB vertexing requirements.

  4. Building integration photovoltaic module with reference to Ghana: using triple junction amorphous silicon

    OpenAIRE

    Essah, Emmanuel Adu

    2010-01-01

    This paper assesses the potential for using building integrated photovoltaic (BIPV) \\ud roof shingles made from triple-junction amorphous silicon (3a-Si) for electrification \\ud and as a roofing material in tropical countries, such as Accra, Ghana. A model roof \\ud was constructed using triple-junction amorphous (3a-Si) PV on one section and \\ud conventional roofing tiles on the other. The performance of the PV module and tiles \\ud were measured, over a range of ambient temperatures and solar...

  5. An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1994-01-01

    Since 1989 the Solenoidal Detector Collaboration (SDC) has been developing a general purpose detector to be operated at the Superconducting Super Collider (SSC). A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDS silicon tracker. The IC was designed and tested at LBL and was fabricated using AT and T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a φ = 10 14 protons/cm 2 have been performed on the JC, demonstrating the radiation hardness of the complementary bipolar process

  6. Physical and electrical characterization of corundum substrates and epitaxial silicon layers in view of fabricating integrated circuits

    International Nuclear Information System (INIS)

    Trilhe, J.; Legal, H.; Rolland, G.

    1975-01-01

    The S.O.S. technology (silicon on insulating substrate) allows compact, radiation hard, fast integrated circuits to be fabricated. It is noticeable that complex integrated circuits on corundum substrates obtained with various fabrication processes have various electrical characteristics. Possible correlations between the macroscopic defects of the substrate and the electrical characteristics of the circuit were investigated [fr

  7. A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits.

    Science.gov (United States)

    Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

    2017-12-01

    One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe 2 , a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

  8. A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits

    Science.gov (United States)

    Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M.; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K.; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

    2017-12-01

    One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe2, a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

  9. Integration Science and Technology of Silicon-Based Ceramics and Composites:Technical Challenges and Opportunities

    Science.gov (United States)

    Singh, M.

    2013-01-01

    Ceramic integration technologies enable hierarchical design and manufacturing of intricate ceramic and composite parts starting with geometrically simpler units that are subsequently joined to themselves and/or to metals to create components with progressively higher levels of complexity and functionality. However, for the development of robust and reliable integrated systems with optimum performance for high temperature applications, detailed understanding of various thermochemical and thermomechanical factors is critical. Different technical approaches are required for the integration of ceramic to ceramic and ceramic to metal systems. Active metal brazing, in particular, is a simple and cost-effective method to integrate ceramic to metallic components. Active braze alloys usually contain a reactive filler metal (e.g., Ti, Cr, V, Hf etc) that promotes wettability and spreading by inducing chemical reactions with the ceramics and composites. In this presentation, various examples of brazing of silicon nitride to themselves and to metallic systems are presented. Other examples of joining of ceramic composites (C/SiC and SiC/SiC) using ceramic interlayers and the resulting microstructures are also presented. Thermomechanical characterization of joints is presented for both types of systems. In addition, various challenges and opportunities in design, fabrication, and testing of integrated similar (ceramic-ceramic) and dissimilar (ceramic-metal) material systems will be discussed. Potential opportunities and need for the development of innovative design philosophies, approaches, and integrated system testing under simulated application conditions will also be presented.

  10. MIDAS: Automated Approach to Design Microwave Integrated Inductors and Transformers on Silicon

    Directory of Open Access Journals (Sweden)

    L. Aluigi

    2013-09-01

    Full Text Available The design of modern radiofrequency integrated circuits on silicon operating at microwave and millimeter-waves requires the integration of several spiral inductors and transformers that are not commonly available in the process design-kits of the technologies. In this work we present an auxiliary CAD tool for Microwave Inductor (and transformer Design Automation on Silicon (MIDAS that exploits commercial simulators and allows the implementation of an automatic design flow, including three-dimensional layout editing and electromagnetic simulations. In detail, MIDAS allows the designer to derive a preliminary sizing of the inductor (transformer on the bases of the design entries (specifications. It draws the inductor (transformer layers for the specific process design kit, including vias and underpasses, with or without patterned ground shield, and launches the electromagnetic simulations, achieving effective design automation with respect to the traditional design flow for RFICs. With the present software suite the complete design time is reduced significantly (typically 1 hour on a PC based on Intel® Pentium® Dual 1.80GHz CPU with 2-GB RAM. Afterwards both the device equivalent circuit and the layout are ready to be imported in the Cadence environment.

  11. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  12. Thermally controlled coupling of a rolled-up microtube integrated with a waveguide on a silicon electronic-photonic integrated circuit.

    Science.gov (United States)

    Zhong, Qiuhang; Tian, Zhaobing; Veerasubramanian, Venkat; Dastjerdi, M Hadi Tavakoli; Mi, Zetian; Plant, David V

    2014-05-01

    We report on the first experimental demonstration of the thermal control of coupling strength between a rolled-up microtube and a waveguide on a silicon electronic-photonic integrated circuit. The microtubes are fabricated by selectively releasing a coherently strained GaAs/InGaAs heterostructure bilayer. The fabricated microtubes are then integrated with silicon waveguides using an abruptly tapered fiber probe. By tuning the gap between the microtube and the waveguide using localized heaters, the microtube-waveguide evanescent coupling is effectively controlled. With heating, the extinction ratio of a microtube whispering-gallery mode changes over an 18 dB range, while the resonant wavelength remains approximately unchanged. Utilizing this dynamic thermal tuning effect, we realize coupling modulation of the microtube integrated with the silicon waveguide at 2 kHz with a heater voltage swing of 0-6 V.

  13. MEMS-based silicon cantilevers with integrated electrothermal heaters for airborne ultrafine particle sensing

    Science.gov (United States)

    Wasisto, Hutomo Suryo; Merzsch, Stephan; Waag, Andreas; Peiner, Erwin

    2013-05-01

    The development of low-cost and low-power MEMS-based cantilever sensors for possible application in hand-held airborne ultrafine particle monitors is described in this work. The proposed resonant sensors are realized by silicon bulk micromachining technology with electrothermal excitation, piezoresistive frequency readout, and electrostatic particle collection elements integrated and constructed in the same sensor fabrication process step of boron diffusion. Built-in heating resistor and full Wheatstone bridge are set close to the cantilever clamp end for effective excitation and sensing, respectively, of beam deflection. Meanwhile, the particle collection electrode is located at the cantilever free end. A 300 μm-thick, phosphorus-doped silicon bulk wafer is used instead of silicon-on-insulator (SOI) as the starting material for the sensors to reduce the fabrication costs. To etch and release the cantilevers from the substrate, inductively coupled plasma (ICP) cryogenic dry etching is utilized. By controlling the etching parameters (e.g., temperature, oxygen content, and duration), cantilever structures with thicknesses down to 10 - 20 μm are yielded. In the sensor characterization, the heating resistor is heated and generating thermal waves which induce thermal expansion and further cause mechanical bending strain in the out-of-plane direction. A resonant frequency of 114.08 +/- 0.04 kHz and a quality factor of 1302 +/- 267 are measured in air for a fabricated rectangular cantilever (500x100x13.5 μm3). Owing to its low power consumption of a few milliwatts, this electrothermal cantilever is suitable for replacing the current external piezoelectric stack actuator in the next generation of the miniaturized cantilever-based nanoparticle detector (CANTOR).

  14. Heterogenous integration of a thin-film GaAs photodetector and a microfluidic device on a silicon substrate

    International Nuclear Information System (INIS)

    Song, Fuchuan; Xiao, Jing; Udawala, Fidaali; Seo, Sang-Woo

    2011-01-01

    In this paper, heterogeneous integration of a III–V semiconductor thin-film photodetector (PD) with a microfluidic device is demonstrated on a SiO 2 –Si substrate. Thin-film format of optical devices provides an intimate integration of optical functions with microfluidic devices. As a demonstration of a multi-material and functional system, the biphasic flow structure in the polymeric microfluidic channels was co-integrated with a III–V semiconductor thin-film PD. The fluorescent drops formed in the microfluidic device are successfully detected with an integrated thin-film PD on a silicon substrate. The proposed three-dimensional integration structure is an alternative approach to combine optical functions with microfluidic functions on silicon-based electronic functions.

  15. Silicon Hard-Stop Mesas for 3D Integration of Superconducting Qubits

    Science.gov (United States)

    Kim, David; Rosenberg, Danna; Osadchy, Brenda; Calusine, Greg; Das, Rabindra; Melville, Alexander; Yoder, Jonilyn; Yost, Donna-Ruth; Racz, Livia; Oliver, William

    As quantum computing with superconducting qubits advances past the few-qubit stage, implementing 3D packaging/integration to route readout/control lines will become increasingly important. One approach is to bond chips that perform different functions using indium bump bonds. Because indium is malleable, however, achieving the desired spacing and tilt between two chips can be challenging. We present an approach based on etching several microns into the silicon substrate to produce hard stop silicon posts. Since this process involves etching into a pristine substrate, it is essential to evaluate its impact on qubit performance. We report the etched surface's effect on the resonator quality factor and qubit coherence time, as well as the improvement in planarity and tilt. This research was funded in part by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) and by the Assistant Secretary of Defense for Research & Engineering under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

  16. Mechanical integration of the detector components for the CBM silicon tracking system

    Energy Technology Data Exchange (ETDEWEB)

    Vasylyev, Oleg; Niebur, Wolfgang [GSI Helmholtzzentrum fuer Schwerionenforschung GmbH, Darmstadt (Germany); Collaboration: CBM-Collaboration

    2016-07-01

    The Compressed Baryonic Matter experiment (CBM) at FAIR is designed to explore the QCD phase diagram in the region of high net-baryon densities. The central detector component, the Silicon Tracking System (STS) is based on double-sided micro-strip sensors. In order to achieve the physics performance, the detector mechanical structures should be developed taking into account the requirements of the CBM experiments: low material budget, high radiation environment, interaction rates, aperture for the silicon tracking, detector segmentation and mounting precision. A functional plan of the STS and its surrounding structural components is being worked out from which the STS system shape is derived and the power and cooling needs, the connector space requirements, life span of components and installation/repair aspects are determined. The mechanical integration is at the point of finalizing the design stage and moving towards production readiness. This contribution shows the current processing state of the following engineering tasks: construction space definition, carbon ladder shape and manufacturability, beam-pipe feedthrough structure, prototype construction, cable routing and modeling of the electronic components.

  17. Three hydrogenated amorphous silicon photodiodes stacked for an above integrated circuit colour sensor

    Energy Technology Data Exchange (ETDEWEB)

    Gidon, Pierre; Giffard, Benoit; Moussy, Norbert; Parrein, Pascale; Poupinet, Ludovic [CEA-LETI, MINATEC, CEA-Grenoble, 17 rue des Martyrs, 38054 Grenoble Cedex 9 (France)

    2010-03-15

    We present theoretical simulation and experimental results of a new colour pixel structure. This pixel catches the light in three stacked amorphous silicon photodiodes encompassed between transparent electrodes. The optical structure has been simulated for signal optimisation. The thickness of each stacked layer is chosen in order to absorb the maximum of light and the three signals allow to linearly calculate the CIE colour coordinates 1 with minimum error and noise. The whole process is compatible with an above integrated circuit (IC) approach. Each photodiode is an n-i-p structure. For optical reason, the upper diode must be controlled down to 25 nm thickness. The first test pixel structure allows a good recovering of colour coordinates. The measured absorption spectrum of each photodiode is in good agreement with our simulations. This specific stack with three photodiodes per pixel totalises two times more signal than an above IC pixel under a standard Bayer pattern 2,3. In each square of this GretagMacbeth chart is the reference colour on the right and the experimentally measured colour on the left with three amorphous silicon photodiodes per pixel. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

  18. III-V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2-4 μm Wavelength Range.

    Science.gov (United States)

    Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

    2017-08-04

    The availability of silicon photonic integrated circuits (ICs) in the 2-4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III-V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III-V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy.

  19. III–V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2–4 μm Wavelength Range

    Science.gov (United States)

    Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

    2017-01-01

    The availability of silicon photonic integrated circuits (ICs) in the 2–4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III–V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III–V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy. PMID:28777291

  20. Optimization and validation of highly selective microfluidic integrated silicon nanowire chemical sensor

    Science.gov (United States)

    Ehfaed, Nuri. A. K. H.; Bathmanathan, Shillan A. L.; Dhahi, Th S.; Adam, Tijjani; Hashim, Uda; Noriman, N. Z.

    2017-09-01

    The study proposed characterization and optimization of silicon nanosensor for specific detection of heavy metal. The sensor was fabricated in-house and conventional photolithography coupled with size reduction via dry etching process in an oxidation furnace. Prior to heavy metal heavy metal detection, the capability to aqueous sample was determined utilizing serial DI water at various. The sensor surface was surface modified with Organofunctional alkoxysilanes (3-aminopropyl) triethoxysilane (APTES) to create molecular binding chemistry. This has allowed interaction between heavy metals being measured and the sensor component resulting in increasing the current being measured. Due to its, excellent detection capabilities, this sensor was able to identify different group heavy metal species. The device was further integrated with sub-50 µm for chemical delivery.

  1. Impurity engineering of Czochralski silicon used for ultra large-scaled-integrated circuits

    Science.gov (United States)

    Yang, Deren; Chen, Jiahe; Ma, Xiangyang; Que, Duanlin

    2009-01-01

    Impurities in Czochralski silicon (Cz-Si) used for ultra large-scaled-integrated (ULSI) circuits have been believed to deteriorate the performance of devices. In this paper, a review of the recent processes from our investigation on internal gettering in Cz-Si wafers which were doped with nitrogen, germanium and/or high content of carbon is presented. It has been suggested that those impurities enhance oxygen precipitation, and create both denser bulk microdefects and enough denuded zone with the desirable width, which is benefit of the internal gettering of metal contamination. Based on the experimental facts, a potential mechanism of impurity doping on the internal gettering structure is interpreted and, a new concept of 'impurity engineering' for Cz-Si used for ULSI is proposed.

  2. Low-loss compact multilayer silicon nitride platform for 3D photonic integrated circuits.

    Science.gov (United States)

    Shang, Kuanping; Pathak, Shibnath; Guan, Binbin; Liu, Guangyao; Yoo, S J B

    2015-08-10

    We design, fabricate, and demonstrate a silicon nitride (Si(3)N(4)) multilayer platform optimized for low-loss and compact multilayer photonic integrated circuits. The designed platform, with 200 nm thick waveguide core and 700 nm interlayer gap, is compatible for active thermal tuning and applicable to realizing compact photonic devices such as arrayed waveguide gratings (AWGs). We achieve ultra-low loss vertical couplers with 0.01 dB coupling loss, multilayer crossing loss of 0.167 dB at 90° crossing angle, 50 μm bending radius, 100 × 2 μm(2) footprint, lateral misalignment tolerance up to 400 nm, and less than -52 dB interlayer crosstalk at 1550 nm wavelength. Based on the designed platform, we demonstrate a 27 × 32 × 2 multilayer star coupler.

  3. A monolithically integrated detector-preamplifier on high-resistivity silicon

    International Nuclear Information System (INIS)

    Holland, S.; Spieler, H.

    1990-02-01

    A monolithically integrated detector-preamplifier on high-resistivity silicon has been designed, fabricated and characterized. The detector is a fully depleted p-i-n diode and the preamplifier is implemented in a depletion-mode PMOS process which is compatible with detector processing. The amplifier is internally compensated and the measured gain-bandwidth product is 30 MHz with an input-referred noise of 15 nV/√Hz in the white noise regime. Measurements with an Am 241 radiation source yield an equivalent input noise charge of 800 electrons at 200 ns shaping time for a 1.4 mm 2 detector with on-chip amplifier in an experimental setup with substantial external pickup

  4. 3D silicon neural probe with integrated optical fibers for optogenetic modulation.

    Science.gov (United States)

    Kim, Eric G R; Tu, Hongen; Luo, Hao; Liu, Bin; Bao, Shaowen; Zhang, Jinsheng; Xu, Yong

    2015-07-21

    Optogenetics is a powerful modality for neural modulation that can be useful for a wide array of biomedical studies. Penetrating microelectrode arrays provide a means of recording neural signals with high spatial resolution. It is highly desirable to integrate optics with neural probes to allow for functional study of neural tissue by optogenetics. In this paper, we report the development of a novel 3D neural probe coupled simply and robustly to optical fibers using a hollow parylene tube structure. The device shanks are hollow tubes with rigid silicon tips, allowing the insertion and encasement of optical fibers within the shanks. The position of the fiber tip can be precisely controlled relative to the electrodes on the shank by inherent design features. Preliminary in vivo rat studies indicate that these devices are capable of optogenetic modulation simultaneously with 3D neural signal recording.

  5. Integrated reconfigurable microring based silicon WDM receiver for on-chip optical interconnect

    International Nuclear Information System (INIS)

    Shen, Ao; Yang, Long-Zhi; Dai, Ting-Ge; Hao, Yin-Lei; Jiang, Xiao-Qing; Yang, Jian-Yi; Qiu, Chen

    2015-01-01

    We demonstrate an integrated reconfigurable wavelength division multiplexing receiver on the silicon-on-insulator (SOI) platform. The receiver is composed of a 1 × 8 thermally tunable microring resonator filter and Ge–Si photodetectors. With low thermal tuning powers the channel allocation of the receiver can be reconfigured with high accuracy and flexibility. The thermal tuning efficiency is approximately 8 mW nm −1 . We show eight-channel configurations with channel spacing of 100 GHz and 50 GHz and a configuration in which all eight channels cover an entire free spectral range of the ring with uniform channel spacing of 1.2 nm. Each channel can receive high-quality signals with a data rate of up to 13.5 Gb s −1 ; thus an aggregate data rate higher than 100 Gb s −1 can be achieved. (paper)

  6. Efficient generation of single and entangled photons on a silicon photonic integrated chip

    International Nuclear Information System (INIS)

    Mower, Jacob; Englund, Dirk

    2011-01-01

    We present a protocol for generating on-demand, indistinguishable single photons on a silicon photonic integrated chip. The source is a time-multiplexed spontaneous parametric down-conversion element that allows optimization of single-photon versus multiphoton emission while realizing high output rate and indistinguishability. We minimize both the scaling of active elements and the scaling of active element loss with multiplexing. We then discuss detection strategies and data processing to further optimize the procedure. We simulate an improvement in single-photon-generation efficiency over previous time-multiplexing protocols, assuming existing fabrication capabilities. We then apply this system to generate heralded Bell states. The generation efficiency of both nonclassical states could be increased substantially with improved fabrication procedures.

  7. Silicon-Based Integration of Groups III, IV, V Chemical Vapor Depositions in High-Quality Photodiodes

    NARCIS (Netherlands)

    Sammak, A.

    2012-01-01

    Heterogeneous integration of III-V semiconductors with silicon (Si) technology is an interesting approach to utilize the advantages of both high-speed photonic and electronic properties. The work presented in this thesis is initiated by this major goal of merging III-V semiconductor technology with

  8. Structural Integration of Silicon Solar Cells and Lithium-ion Batteries Using Printed Electronics

    Science.gov (United States)

    Kang, Jin Sung

    Inkjet printing of electrode using copper nanoparticle ink is presented. Electrode was printed on a flexible glass epoxy composite substrate using drop on demand piezoelectric dispenser and was sintered at 200°C in N 2 gas condition. The printed electrodes were made with various widths and thicknesses. Surface morphology of electrode was analyzed using scanning electron microscope (SEM) and atomic force microscope (AFM). Reliable dimensions for printed electronics were found from this study. Single-crystalline silicon solar cells were tested under four-point bending to find the feasibility of directly integrating them onto a carbon fiber/epoxy composite laminate. These solar cells were not able to withstand 0.2% strain. On the other hand, thin-film amorphous silicon solar cells were subjected to flexural fatigue loadings. The current density-voltage curves were analyzed at different cycles, and there was no noticeable degradation on its performance up to 100 cycles. A multifunctional composite laminate which can harvest and store solar energy was fabricated using printed electrodes. The integrated printed circuit board (PCB) was co-cured with a carbon/epoxy composite laminate by the vacuum bag molding process in an autoclave; an amorphous silicon solar cell and a thin-film solid state lithium-ion (Li-ion) battery were adhesively joined and electrically connected to a thin flexible PCB; and then the passive components such as resistors and diodes were electrically connected to the printed circuit board by silver pasting. Since a thin-film solid state Li-ion battery was not able to withstand tensile strain above 0.4%, thin Li-ion polymer batteries were tested under various mechanical loadings and environmental conditions to find the feasibility of using the polymer batteries for our multifunctional purpose. It was found that the Li-ion polymer batteries were stable under pressure and tensile loading without any noticeable degradation on its charge and discharge

  9. Label-free silicon photonic biosensor system with integrated detector array

    Science.gov (United States)

    Yan, Rongjin; Mestas, Santano P.; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S.

    2010-01-01

    An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide’s upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip. PMID:19606292

  10. Label-free silicon photonic biosensor system with integrated detector array.

    Science.gov (United States)

    Yan, Rongjin; Mestas, Santano P; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S; Lear, Kevin L

    2009-08-07

    An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide's upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip.

  11. RF characterization and analytical modelling of through silicon vias and coplanar waveguides for 3D integration

    NARCIS (Netherlands)

    Lamy, Y.; Jinesh, K.B.; Roozeboom, F.; Gravesteijn, D.J.; Besling, W.F.A.

    2010-01-01

    High-aspect ratio (12.5) through silicon vias (TSV) made in a silicon interposer have been electrically characterized in the direct current (dc) and microwave regimes for 3D interconnect applications. The vias were micro-machined in silicon, insulated, and filled with copper employing a bottom-up

  12. 2 μm wavelength range InP-based type-II quantum well photodiodes heterogeneously integrated on silicon photonic integrated circuits.

    Science.gov (United States)

    Wang, Ruijun; Sprengel, Stephan; Muneeb, Muhammad; Boehm, Gerhard; Baets, Roel; Amann, Markus-Christian; Roelkens, Gunther

    2015-10-05

    The heterogeneous integration of InP-based type-II quantum well photodiodes on silicon photonic integrated circuits for the 2 µm wavelength range is presented. A responsivity of 1.2 A/W at a wavelength of 2.32 µm and 0.6 A/W at 2.4 µm wavelength is demonstrated. The photodiodes have a dark current of 12 nA at -0.5 V at room temperature. The absorbing active region of the integrated photodiodes consists of six periods of a "W"-shaped quantum well, also allowing for laser integration on the same platform.

  13. A silicon integrated micro nano-positioning XY-stage for nano-manipulation

    International Nuclear Information System (INIS)

    Sun Lining; Wang Jiachou; Rong Weibin; Li Xinxin; Bao Haifei

    2008-01-01

    An integrated micro XY-stage with a 2 × 2 mm 2 movable table is designed and fabricated for application in nanometer-scale operation and nanometric positioning precision. The device integrates the functions of both actuating and sensing in a monolithic chip and is mainly composed of a silicon-based XY-stage, comb-drive actuator and a displacement sensor, which are developed by using double-sided bulk-micromachining technology. The high-aspect-ratio comb-driven XY-stage is achieved by deep reactive ion etching (DRIE) on both sides of the wafer. The displacement sensor is formed on four vertical sidewall surface piezoresistors with a full Wheatstone bridge circuit, where a novel fabrication process of a vertical sidewall surface piezoresistor is proposed. Comprehensive design and analysis of the comb actuator, the piezoresistive displacement sensor and the XY-stage are given in full detail, and the experimental results verify the design and fabrication of the device. The final realization of the device shows that the sensitivity of the fabricated piezoresistive sensors is better than 1.17 mV µm −1 without amplification, and the linearity is better than 0.814%. Under 28.5 V driving voltage, a ±10 µm single-axis displacement is measured without crosstalk and the resonant frequency is measured at 983 Hz in air

  14. An integrated nonlinear optical loop mirror in silicon photonics for all-optical signal processing

    Directory of Open Access Journals (Sweden)

    Zifei Wang

    2018-02-01

    Full Text Available The nonlinear optical loop mirror (NOLM has been studied for several decades and has attracted considerable attention for applications in high data rate optical communications and all-optical signal processing. The majority of NOLM research has focused on silica fiber-based implementations. While various fiber designs have been considered to increase the nonlinearity and manage dispersion, several meters to hundreds of meters of fiber are still required. On the other hand, there is increasing interest in developing photonic integrated circuits for realizing signal processing functions. In this paper, we realize the first-ever passive integrated NOLM in silicon photonics and demonstrate its application for all-optical signal processing. In particular, we show wavelength conversion of 10 Gb/s return-to-zero on-off keying (RZ-OOK signals over a wavelength range of 30 nm with error-free operation and a power penalty of less than 2.5 dB, we achieve error-free nonreturn to zero (NRZ-to-RZ modulation format conversion at 10 Gb/s also with a power penalty of less than 2.8 dB, and we obtain error-free all-optical time-division demultiplexing of a 40 Gb/s RZ-OOK data signal into its 10 Gb/s tributary channels with a maximum power penalty of 3.5 dB.

  15. Quantum Coherent States and Path Integral Method to Stochastically Determine the Anisotropic Volume Expansion in Lithiated Silicon Nanowires

    Directory of Open Access Journals (Sweden)

    Donald C. Boone

    2017-10-01

    Full Text Available This computational research study will analyze the multi-physics of lithium ion insertion into a silicon nanowire in an attempt to explain the electrochemical kinetics at the nanoscale and quantum level. The electron coherent states and a quantum field version of photon density waves will be the joining theories that will explain the electron-photon interaction within the lithium-silicon lattice structure. These two quantum particles will be responsible for the photon absorption rate of silicon atoms that are hypothesized to be the leading cause of breaking diatomic silicon covalent bonds that ultimately leads to volume expansion. It will be demonstrated through the combination of Maxwell stress tensor, optical amplification and path integrals that a stochastic analyze using a variety of Poisson distributions that the anisotropic expansion rates in the <110>, <111> and <112> orthogonal directions confirms the findings ascertained in previous works made by other research groups. The computational findings presented in this work are similar to those which were discovered experimentally using transmission electron microscopy (TEM and simulation models that used density functional theory (DFT and molecular dynamics (MD. The refractive index and electric susceptibility parameters of lithiated silicon are interwoven in the first principle theoretical equations and appears frequently throughout this research presentation, which should serve to demonstrate the importance of these parameters in the understanding of this component in lithium ion batteries.

  16. Development and miniaturization of a photoacoustic silicon integrated spectrometer for trace gas analysis; Etude et developpement d`un spectrometre photoacoustique integre sur silicium pour analyse de gaz

    Energy Technology Data Exchange (ETDEWEB)

    Jourdain, A.

    1998-10-29

    The study deals with the integration on silicon wafers of an infrared spectrometer for carbon dioxide measurements. Photoacoustic detection that measures a differential pressure in a cavity turns out to be the best spectroscopic technique for miniaturization and integration. The micro-system is composed of two main components: an infrared light source on a silicon nitride membrane and a component integrating a tunable optical filter, a microphone for detection and a micro-cavity. After a theoretical study of the different components, each element is realized with the microelectronic techniques such as photolithography, thin films deposits and dry and wet etching. A resin sealing of all the different elements realizes the final micro-spectrophotometer. A characterization of the components is done thanks to the realization of an electronic specific set-up. (author) 107 refs.

  17. A 12-bit SAR ADC integrated on a multichannel silicon drift detector readout IC

    Energy Technology Data Exchange (ETDEWEB)

    Schembari, F., E-mail: filippo.schembari@polimi.it [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, via Golgi 40, 20133 Milano (Italy); INFN, Sezione di Milano, via Celoria 16, 20133 Milano (Italy); Bellotti, G.; Fiorini, C. [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, via Golgi 40, 20133 Milano (Italy); INFN, Sezione di Milano, via Celoria 16, 20133 Milano (Italy)

    2016-07-11

    A 12-bit analog-to-digital converter (ADC) addressed to Silicon-Drift Detectors (SDDs) multichannel readout ASICs for X- and gamma-ray applications is presented. Aiming at digitizing output multiplexed data from the upstream analog filters banks, the converter must ensure 11-bit accuracy and a sampling frequency of about 5 MS/s. The ADC architecture is the charge-redistribution (CR) successive-approximation register (SAR). A fully differential topology has also been chosen for better rejection of common-mode noise and disturbances. The internal DAC is made of binary-scaled capacitors, whose bottom plates are switched by the SAR logic to perform the binary search of the analog input value by means of the monotonic switching scheme. The A/D converter is integrated on SFERA, a multichannel ASIC fabricated in a standard CMOS 0.35 μm 3.3 V technology and it occupies an area of 0.42 mm{sup 2}. Simulated static performance shows monotonicity over the whole input–output characteristic. The description of the circuit topology and of inner blocks architectures together with the experimental characterization is here presented. - Highlights: • X- and γ-ray spectroscopy front-ends need to readout a high number of detectors. • Design efforts are increasingly oriented to compact and low-power ASICs. • A possible solution is the on-chip integration of the analog-to-digital converter. • A 12-bit CR successive-approximation-register ADC has been developed. • It is a suitable candidate as the digitizer to be integrated in multichannel ASICs.

  18. Silicon Nitride Photonic Integration Platforms for Visible, Near-Infrared and Mid-Infrared Applications

    Science.gov (United States)

    Micó, Gloria; Pastor, Daniel; Pérez, Daniel; Doménech, José David; Fernández, Juan; Baños, Rocío; Alemany, Rubén; Sánchez, Ana M.; Cirera, Josep M.; Mas, Roser

    2017-01-01

    Silicon nitride photonics is on the rise owing to the broadband nature of the material, allowing applications of biophotonics, tele/datacom, optical signal processing and sensing, from visible, through near to mid-infrared wavelengths. In this paper, a review of the state of the art of silicon nitride strip waveguide platforms is provided, alongside the experimental results on the development of a versatile 300 nm guiding film height silicon nitride platform. PMID:28895906

  19. Silicon-Nitride-based Integrated Optofluidic Biochemical Sensors using a Coupled-Resonator Optical Waveguide

    Directory of Open Access Journals (Sweden)

    Jiawei eWANG

    2015-04-01

    Full Text Available Silicon nitride (SiN is a promising material platform for integrating photonic components and microfluidic channels on a chip for label-free, optical biochemical sensing applications in the visible to near-infrared wavelengths. The chip-scale SiN-based optofluidic sensors can be compact due to a relatively high refractive index contrast between SiN and the fluidic medium, and low-cost due to the complementary metal-oxide-semiconductor (CMOS-compatible fabrication process. Here, we demonstrate SiN-based integrated optofluidic biochemical sensors using a coupled-resonator optical waveguide (CROW in the visible wavelengths. The working principle is based on imaging in the far field the out-of-plane elastic-light-scattering patterns of the CROW sensor at a fixed probe wavelength. We correlate the imaged pattern with reference patterns at the CROW eigenstates. Our sensing algorithm maps the correlation coefficients of the imaged pattern with a library of calibrated correlation coefficients to extract a minute change in the cladding refractive index. Given a calibrated CROW, our sensing mechanism in the spatial domain only requires a fixed-wavelength laser in the visible wavelengths as a light source, with the probe wavelength located within the CROW transmission band, and a silicon digital charge-coupled device (CCD / CMOS camera for recording the light scattering patterns. This is in sharp contrast with the conventional optical microcavity-based sensing methods that impose a strict requirement of spectral alignment with a high-quality cavity resonance using a wavelength-tunable laser. Our experimental results using a SiN CROW sensor with eight coupled microrings in the 680nm wavelength reveal a cladding refractive index change of ~1.3 × 10^-4 refractive index unit (RIU, with an average sensitivity of ~281 ± 271 RIU-1 and a noise-equivalent detection limit (NEDL of 1.8 ×10^-8 RIU ~ 1.0 ×10^-4 RIU across the CROW bandwidth of ~1 nm.

  20. Temperature and color management of silicon solar cells for building integrated photovoltaic

    Science.gov (United States)

    Amara, Mohamed; Mandorlo, Fabien; Couderc, Romain; Gerenton, Félix; Lemiti, Mustapha

    2018-01-01

    Color management of integrated photovoltaics must meet two criteria of performance: provide maximum conversion efficiency and allow getting the chosen colors with an appropriate brightness, more particularly when using side by side solar cells of different colors. As the cooling conditions are not necessarily optimal, we need to take into account the influence of the heat transfer and temperature. In this article, we focus on the color space and brightness achieved by varying the antireflective properties of flat silicon solar cells. We demonstrate that taking into account the thermal effects allows freely choosing the color and adapting the brightness with a small impact on the conversion efficiency, except for dark blue solar cells. This behavior is especially true when heat exchange by convection is low. Our optical simulations show that the perceived color, for single layer ARC, is not varying with the position of the observer, whatever the chosen color. The use of a double layer ARC adds flexibility to tune the wanted color since the color space is greatly increased in the green and yellow directions. Last, choosing the accurate material allows both bright colors and high conversion efficiency at the same time.

  1. Joining and Integration of Silicon Nitride Ceramics for Aerospace and Energy Systems

    Science.gov (United States)

    Singh, M.; Asthana, R.

    2009-01-01

    Light-weight, creep-resistant silicon nitride ceramics possess excellent high-temperature strength and are projected to significantly raise engine efficiency and performance when used as turbine components in the next-generation turbo-shaft engines without the extensive cooling that is needed for metallic parts. One key aspect of Si3N4 utilization in such applications is its joining response to diverse materials. In an ongoing research program, the joining and integration of Si3N4 ceramics with metallic, ceramic, and composite materials using braze interlayers with the liquidus temperature in the range 750-1240C is being explored. In this paper, the self-joining behavior of Kyocera Si3N4 and St. Gobain Si3N4 using a ductile Cu-based active braze (Cu-ABA) containing Ti will be presented. Joint microstructure, composition, hardness, and strength as revealed by optical microscopy, scanning electron microscopy (SEM), energy dispersive spectroscopy (EDS), Knoop microhardness test, and offset compression shear test will be presented. Additionally, microstructure, composition, and joint strength of Si3N4/Inconel 625 joints made using Cu-ABA, will be presented. The results will be discussed with reference to the role of chemical reactions, wetting behavior, and residual stresses in joints.

  2. Prolonged silicon carbide integrated circuit operation in Venus surface atmospheric conditions

    Directory of Open Access Journals (Sweden)

    Philip G. Neudeck

    2016-12-01

    Full Text Available The prolonged operation of semiconductor integrated circuits (ICs needed for long-duration exploration of the surface of Venus has proven insurmountably challenging to date due to the ∼ 460 °C, ∼ 9.4 MPa caustic environment. Past and planned Venus landers have been limited to a few hours of surface operation, even when IC electronics needed for basic lander operation are protected with heavily cumbersome pressure vessels and cooling measures. Here we demonstrate vastly longer (weeks electrical operation of two silicon carbide (4H-SiC junction field effect transistor (JFET ring oscillator ICs tested with chips directly exposed (no cooling and no protective chip packaging to a high-fidelity physical and chemical reproduction of Venus’ surface atmosphere. This represents more than 100-fold extension of demonstrated Venus environment electronics durability. With further technology maturation, such SiC IC electronics could drastically improve Venus lander designs and mission concepts, fundamentally enabling long-duration enhanced missions to the surface of Venus.

  3. Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate

    Directory of Open Access Journals (Sweden)

    Suk Won Jung

    2016-12-01

    Full Text Available This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 (rd1 mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

  4. Hydrogenated Amorphous Silicon Sensor Deposited on Integrated Circuit for Radiation Detection

    CERN Document Server

    Despeisse, M; Jarron, P; Kaplon, J; Moraes, D; Nardulli, A; Powolny, F; Wyrsch, N

    2008-01-01

    Radiation detectors based on the deposition of a 10 to 30 mum thick hydrogenated amorphous silicon (a-Si:H) sensor directly on top of integrated circuits have been developed. The performance of this detector technology has been assessed for the first time in the context of particle detectors. Three different circuits were designed in a quarter micron CMOS technology for these studies. The so-called TFA (Thin-Film on ASIC) detectors obtained after deposition of a-Si:H sensors on the developed circuits are presented. High internal electric fields (104 to 105 V/cm) can be built in the a-Si:H sensor and overcome the low mobility of electrons and holes in this amorphous material. However, the deposited sensor's leakage current at such fields turns out to be an important parameter which limits the performance of a TFA detector. Its detailed study is presented as well as the detector's pixel segmentation. Signal induction by generated free carrier motion in the a-Si:H sensor has been characterized using a 660 nm pul...

  5. Temperature and color management of silicon solar cells for building integrated photovoltaic

    Directory of Open Access Journals (Sweden)

    Amara Mohamed

    2018-01-01

    Full Text Available Color management of integrated photovoltaics must meet two criteria of performance: provide maximum conversion efficiency and allow getting the chosen colors with an appropriate brightness, more particularly when using side by side solar cells of different colors. As the cooling conditions are not necessarily optimal, we need to take into account the influence of the heat transfer and temperature. In this article, we focus on the color space and brightness achieved by varying the antireflective properties of flat silicon solar cells. We demonstrate that taking into account the thermal effects allows freely choosing the color and adapting the brightness with a small impact on the conversion efficiency, except for dark blue solar cells. This behavior is especially true when heat exchange by convection is low. Our optical simulations show that the perceived color, for single layer ARC, is not varying with the position of the observer, whatever the chosen color. The use of a double layer ARC adds flexibility to tune the wanted color since the color space is greatly increased in the green and yellow directions. Last, choosing the accurate material allows both bright colors and high conversion efficiency at the same time.

  6. Study and characterization of an integrated circuit-deposited hydrogenated amorphous silicon sensor for the detection of particles and radiations

    International Nuclear Information System (INIS)

    Despeisse, M.

    2006-03-01

    Next generation experiments at the European laboratory of particle physics (CERN) require particle detector alternatives to actual silicon detectors. This thesis presents a novel detector technology, which is based on the deposition of a hydrogenated amorphous silicon sensor on top of an integrated circuit. Performance and limitations of this technology have been assessed for the first time in this thesis in the context of particle detectors. Specific integrated circuits have been designed and the detector segmentation, the interface sensor-chip and the sensor leakage current have been studied in details. The signal induced by the track of an ionizing particle in the sensor has been characterized and results on the signal speed, amplitude and on the sensor resistance to radiation are presented. The results are promising regarding the use of this novel technology for radiation detection, though limitations have been shown for particle physics application. (author)

  7. Analysis of silicon-based integrated photovoltaic-electrochemical hydrogen generation system under varying temperature and illumination

    Institute of Scientific and Technical Information of China (English)

    Vishwa Bhatt; Brijesh Tripathi; Pankaj Yadav; Manoj Kumar

    2017-01-01

    Last decade witnessed tremendous research and development in the area of photo-electrolytic hydrogen generation using chemically stable nanostructured photo-cathode/anode materials.Due to intimately coupled charge separation and photo-catalytic processes,it is very difficult to optimize individual components of such system leading to a very low demonstrated solar-to-fuel efficiency (SFE) of less than 1%.Recently there has been growing interest in an integrated photovoltaic-electrochemical (PV-EC) system based on GaAs solar cells with the demonstrated SFE of 24.5% under concentrated illumination condition.But a high cost of GaAs based solar cells and recent price drop of poly-crystalline silicon (pc-Si) solar cells motivated researchers to explore silicon based integrated PV-EC system.In this paper a theoretical framework is introduced to model silicon-based integrated PV-EC device.The theoretical framework is used to analyze the coupling and kinetic losses of a silicon solar cell based integrated PV-EC water splitting system under varying temperature and illumination.The kinetic loss occurs in the range of 19.1%-27.9% and coupling loss takes place in the range of 5.45%-6.74% with respect to varying illumination in the range of 20-100 mW/cm2.Similarly,the effect of varying temperature has severe impact on the performance of the system,wherein the coupling loss occurs in the range of 0.84%-21.51% for the temperature variation from 25 to 50 ℃.

  8. Effect of preliminary annealing of silicon substrates on the spectral sensitivity of photodetectors in bipolar integrated circuits

    International Nuclear Information System (INIS)

    Blynskij, V.I.; Bozhatkin, O.A.; Golub, E.S.; Lemeshevskaya, A.M.; Shvedov, S.V.

    2010-01-01

    We examine the results of an effect of preliminary annealing on the spectral sensitivity of photodetectors in bipolar integrated circuits, formed in silicon grown by the Czochralski method. We demonstrate the possibility of substantially improving the sensitivity of photodetectors in the infrared region of the spectrum with twostep annealing. The observed effect is explained by participation of oxidation in the gettering process, where oxidation precedes formation of a buried n + layer in the substrate. (authors)

  9. Integrated circuits of silicon on insulator S.O.I. technologies: State of the art and perspectives

    International Nuclear Information System (INIS)

    Leray, J.L.; Dupont-Nivet, E.; Raffaelli, M.; Coic, Y.M.; Musseau, O.; Pere, J.F.; Lalande, P.; Bredy, J.; Auberton-Herve, A.J.; Bruel, M.; Giffard, B.

    1989-01-01

    Silicon On Insulator technologies have been proposed to increase the integrated circuits performances in radiation operation. Active researches are conducted, in France and abroad. This paper reviews briefly radiation effects phenomenology in that particular type of structure S.O.I. New results are presented that show very good radiation behaviour in term of speed, dose (10 to 100 megarad (Si)), dose rate and S.E.U. performances [fr

  10. A thermal model for amorphous silicon photovoltaic integrated in ETFE cushion roofs

    International Nuclear Information System (INIS)

    Zhao, Bing; Chen, Wujun; Hu, Jianhui; Qiu, Zhenyu; Qu, Yegao; Ge, Binbin

    2015-01-01

    Highlights: • A thermal model is proposed to estimate temperature of a-Si PV integrated in ETFE cushion. • Nonlinear equation is solved by Runge–Kutta method integrated in a new program. • Temperature profiles varying with weather conditions are obtained and analyzed. • Numerical results are in good line with experimental results with coefficients of 0.821–0.985. • Reasons for temperature difference of 0.9–4.6 K are solar irradiance and varying parameters. - Abstract: Temperature characteristics of amorphous silicon photovoltaic (a-Si PV) integrated in building roofs (e.g. the ETFE cushions) are indispensible for evaluating the thermal performances of a-Si PV and buildings. To investigate the temperature characteristics and temperature value, field experiments and numerical modeling were performed and compared in this paper. An experimental mock-up composed of a-Si PV and a three-layer ETFE cushion structure was constructed and experiments were carried out under four typical weather conditions (winter sunny, winter cloudy, summer sunny and summer cloudy). The measured solar irradiance and air temperature were used as the real weather conditions for the thermal model. On the other side, a theoretical thermal model was developed based on energy balance equation which was expressed as that absorbed energy was equal to converted energy and energy loss. The corresponding differential equation of PV temperature varying with weather conditions was solved by the Runge–Kutta method. The comparisons between the experimental and numerical results were focusing on the temperature characteristics and temperature value. For the temperature characteristics, good agreement was obtained by correlation analysis with the coefficients of 0.821–0.985, which validated the feasibility of the thermal model. For the temperature value, the temperature difference between the experimental and numerical results was only 0.9–4.6 K and the reasons could be the dramatical

  11. The thermal neutron absorption cross-sections, resonance integrals and resonance parameters of silicon and its stable isotopes

    International Nuclear Information System (INIS)

    Story, J.S.

    1969-09-01

    The data available up to the end of November 1968 on the thermal neutron absorption cross-sections, resonance absorption integrals, and resonance parameters of silicon and its stable isotopes are collected and discussed. Estimates are given of the mean spacing of the energy levels of the compound nuclei near the neutron binding energy. It is concluded that the thermal neutron absorption cross-section and resonance absorption integral of natural silicon are not well established. The data on these two parameters are somewhat correlated, and three different assessments of the resonance integral are presented which differ over-all by a factor of 230. Many resonances have been detected by charged particle reactions which have not yet been observed in neutron cross-section measurements. One of these resonances of Si 2 8, at E n = 4 ± 5 keV might account for the large resonance integral which is derived, very uncertainly, from integral data. The principal source of the measured resonance integral of Si 3 0 has not yet been located. The thermal neutron absorption cross-section of Si 2 8 appears to result mainly from a negative energy resonance, possibly the resonance at E n = - 59 ± 5 keV detected by the Si 2 8 (d,p) reaction. (author)

  12. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    International Nuclear Information System (INIS)

    Alemi, M.; Campbell, M.; Gys, T.; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K.

    2000-01-01

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface

  13. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    Energy Technology Data Exchange (ETDEWEB)

    Alemi, M.; Campbell, M.; Gys, T. E-mail: thierry.gys@cern.ch; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K

    2000-07-11

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface.

  14. Development of deep silicon plasma etching for 3D integration technology

    Directory of Open Access Journals (Sweden)

    Golishnikov А. А.

    2014-02-01

    Full Text Available Plasma etch process for thought-silicon via (TSV formation is one of the most important technological operations in the field of metal connections creation between stacked circuits in 3D assemble technology. TSV formation strongly depends on parameters such as Si-wafer thickness, aspect ratio, type of metallization material, etc. The authors investigate deep silicon plasma etch process for formation of TSV with controllable profile. The influence of process parameters on plasma etch rate, silicon etch selectivity to photoresist and the structure profile are researched in this paper. Technology with etch and passivation steps alternation was used as a method of deep silicon plasma etching. Experimental tool «Platrane-100» with high-density plasma reactor based on high-frequency ion source with transformer coupled plasma was used for deep silicon plasma etching. As actuation gases for deep silicon etching were chosen the following gases: SF6 was used for the etch stage and CHF3 was applied on the polymerization stage. As a result of research, the deep plasma etch process has been developed with the following parameters: silicon etch rate 6 µm/min, selectivity to photoresist 60 and structure profile 90±2°. This process provides formation of TSV 370 µm deep and about 120 µm in diameter.

  15. Integration of a silicon-based microprobe into a gear measuring instrument for accurate measurement of micro gears

    International Nuclear Information System (INIS)

    Ferreira, N; Krah, T; Jeong, D C; Kniel, K; Härtig, F; Metz, D; Dietzel, A; Büttgenbach, S

    2014-01-01

    The integration of silicon micro probing systems into conventional gear measuring instruments (GMIs) allows fully automated measurements of external involute micro spur gears of normal modules smaller than 1 mm. This system, based on a silicon microprobe, has been developed and manufactured at the Institute for Microtechnology of the Technische Universität Braunschweig. The microprobe consists of a silicon sensor element and a stylus which is oriented perpendicularly to the sensor. The sensor is fabricated by means of silicon bulk micromachining. Its small dimensions of 6.5 mm × 6.5 mm allow compact mounting in a cartridge to facilitate the integration into a GMI. In this way, tactile measurements of 3D microstructures can be realized. To enable three-dimensional measurements with marginal forces, four Wheatstone bridges are built with diffused piezoresistors on the membrane of the sensor. On the reverse of the membrane, the stylus is glued perpendicularly to the sensor on a boss to transmit the probing forces to the sensor element during measurements. Sphere diameters smaller than 300 µm and shaft lengths of 5 mm as well as measurement forces from 10 µN enable the measurements of 3D microstructures. Such micro probing systems can be integrated into universal coordinate measuring machines and also into GMIs to extend their field of application. Practical measurements were carried out at the Physikalisch-Technische Bundesanstalt by qualifying the microprobes on a calibrated reference sphere to determine their sensitivity and their physical dimensions in volume. Following that, profile and helix measurements were carried out on a gear measurement standard with a module of 1 mm. The comparison of the measurements shows good agreement between the measurement values and the calibrated values. This result is a promising basis for the realization of smaller probe diameters for the tactile measurement of micro gears with smaller modules. (paper)

  16. Impurity engineering for germanium-doped Czochralski silicon wafer used for ultra large scale integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Jiahe; Yang, Deren [State Key Laboratory of Silicon Materials, Department of Materials Science and Engineering, Zhejiang University, Hangzhou (China)

    2009-07-01

    Internal gettering (IG) technology has been challenged by both the reduction of thermal budget during device fabrication and the enlargement of wafer diameter. Improving the properties of Czochralski (Cz) silicon wafers by intentional impurity doping, the so-called 'impurity engineering (IE)', is defined. Germanium has been found to be one of the important impurities for improving the internal gettering effect in Cz silicon wafer. In this paper, the investigations on IE involved with the conventional furnace anneal based denudation processing for germanium-doped Cz silicon wafer are reviewed. Meanwhile, the potential mechanisms of germanium effects for the IE of Cz silicon wafer are also interpreted based on the experimental facts. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  17. Integrating Soil Silicon Amendment into Management Programs for Insect Pests of Drill-Seeded Rice.

    Science.gov (United States)

    Villegas, James M; Way, Michael O; Pearson, Rebecca A; Stout, Michael J

    2017-08-13

    Silicon soil amendment has been shown to enhance plant defenses against insect pests. Rice is a silicon-accumulating graminaceous plant. In the southern United States, the rice water weevil and stem borers are important pests of rice. Current management tactics for these pests rely heavily on the use of insecticides. This study evaluated the effects of silicon amendment when combined with current management tactics for these rice insect pests in the field. Field experiments were conducted from 2013 to 2015. Rice was drill-planted in plots subjected to factorial combinations of variety (conventional and hybrid), chlorantraniliprole seed treatment (treated and untreated), and silicon amendment (treated and untreated). Silicon amendment reduced densities of weevil larvae on a single sampling date in 2014, but did not affect densities of whiteheads caused by stem borers. In contrast, insecticidal seed treatment strongly reduced densities of both weevil larvae and whiteheads. Higher densities of weevil larvae were also observed in the hybrid variety in 2014, while higher incidences of whiteheads were observed in the conventional variety in 2014 and 2015. Silicon amendment improved rice yields, as did chlorantraniliprole seed treatment and use of the hybrid variety.

  18. Invited Article: Electrically tunable silicon-based on-chip microdisk resonator for integrated microwave photonic applications

    Directory of Open Access Journals (Sweden)

    Weifeng Zhang

    2016-11-01

    Full Text Available Silicon photonics with advantages of small footprint, compatibility with the mature CMOS fabrication technology, and its potential for seamless integration with electronics is making a significant difference in realizing on-chip integration of photonic systems. A microdisk resonator (MDR with a strong capacity in trapping and storing photons is a versatile element in photonic integrated circuits. Thanks to the large index contrast, a silicon-based MDR with an ultra-compact footprint has a great potential for large-scale and high-density integrations. However, the existence of multiple whispering gallery modes (WGMs and resonance splitting in an MDR imposes inherent limitations on its widespread applications. In addition, the waveguide structure of an MDR is incompatible with that of a lateral PN junction, which leads to the deprivation of its electrical tunability. To circumvent these limitations, in this paper we propose a novel design of a silicon-based MDR by introducing a specifically designed slab waveguide to surround the disk and the lateral sides of the bus waveguide to suppress higher-order WGMs and to support the incorporation of a lateral PN junction for electrical tunability. An MDR based on the proposed design is fabricated and its optical performance is evaluated. The fabricated MDR exhibits single-mode operation with a free spectral range of 28.85 nm. Its electrical tunability is also demonstrated and an electro-optic frequency response with a 3-dB modulation bandwidth of ∼30.5 GHz is measured. The use of the fabricated MDR for the implementation of an electrically tunable optical delay-line and a tunable fractional-order temporal photonic differentiator is demonstrated.

  19. Safely re-integrating silicone breast implants into the plastic surgery practice.

    Science.gov (United States)

    Gladfelter, Joanne

    2006-01-01

    In the early 1990s, it was reported that silicone breast implants were possibly responsible for serious damage to women's health. In January 1992, the Food and Drug Administration issued a voluntary breast implant moratorium and, in April, issued a ban on the use of silicone gel-filled implants for cosmetic breast augmentation. Since that time, silicone gel-filled breast implants have been available to women only for select cases: women seeking breast reconstruction or revision of an existing breast implant, women who have had breast cancer surgery, a severe injury to the breast, a birth defect that affects the breast, or a medical condition causing a severe breast deformity. Since the ban on the use of silicone gel-filled breast implants for cosmetic breast augmentation, numerous scientific studies have been conducted. To ensure patient safety, the American Board of Plastic Surgery believes that these scientific studies and the Food and Drug Administration's scrutiny of silicone gel-filled breast implants have been appropriate and necessary.

  20. Silicon Microspheres Photonics

    International Nuclear Information System (INIS)

    Serpenguzel, A.

    2008-01-01

    Electrophotonic integrated circuits (EPICs), or alternatively, optoelectronic integrated circuit (OEICs) are the natural evolution of the microelectronic integrated circuit (IC) with the addition of photonic capabilities. Traditionally, the IC industry has been based on group IV silicon, whereas the photonics industry on group III-V semiconductors. However, silicon based photonic microdevices have been making strands in siliconizing photonics. Silicon microspheres with their high quality factor whispering gallery modes (WGMs), are ideal candidates for wavelength division multiplexing (WDM) applications in the standard near-infrared communication bands. In this work, we will discuss the possibility of using silicon microspheres for photonics applications in the near-infrared

  1. Band structure properties of (BGa)P semiconductors for lattice matched integration on (001) silicon

    Energy Technology Data Exchange (ETDEWEB)

    Hossain, Nadir; Sweeney, Stephen [Advanced Technology Institute and Department of Physics, University of Surrey, Guildford, Surrey GU2 7XH (United Kingdom); Hosea, Jeff [Advanced Technology Institute and Department of Physics, University of Surrey, Guildford, Surrey GU2 7XH, UK and Ibnu Sina Institute for Fundamental Science Studies, Universiti Teknologi Malaysia, Johor Bahru 81310 (Malaysia); Liebich, Sven; Zimprich, Martin; Volz, Kerstin; Stolz, Wolfgang [Material Sciences Center and Faculty of Physics, Philipps-University, 35032 Marburg (Germany); Kunert, Bernerdette [NAsP III/V GmbH, Am Knechtacker 19, 35041 Marburg (Germany)

    2013-12-04

    We report the band structure properties of (BGa)P layers grown on silicon substrate using metal-organic vapour-phase epitaxy. Using surface photo-voltage spectroscopy we find that both the direct and indirect band gaps of (BGa)P alloys (strained and unstrained) decrease with Boron content. Our experimental results suggest that the band gap of (BGa)P layers up to 6% Boron is large and suitable to be used as cladding and contact layers in GaP-based quantum well heterostructures on silicon substrates.

  2. Silicon-integrated thin-film structure for electro-optic applications

    Science.gov (United States)

    McKee, Rodney A.; Walker, Frederick Joseph

    2000-01-01

    A crystalline thin-film structure suited for use in any of an number of electro-optic applications, such as a phase modulator or a component of an interferometer, includes a semiconductor substrate of silicon and a ferroelectric, optically-clear thin film of the perovskite BaTiO.sub.3 overlying the surface of the silicon substrate. The BaTiO.sub.3 thin film is characterized in that substantially all of the dipole moments associated with the ferroelectric film are arranged substantially parallel to the surface of the substrate to enhance the electro-optic qualities of the film.

  3. Performance of integrated retainer rings in silicon micro-turbines with thrust style micro-ball bearings

    International Nuclear Information System (INIS)

    Hergert, Robert J; Holmes, Andrew S; Hanrahan, Brendan; Ghodssi, Reza

    2013-01-01

    This work explores the performance of different silicon retainer ring designs when integrated into silicon micro-turbines (SMTs) incorporating thrust style bearings supported on 500 µm diameter steel balls. Experimental performance curves are presented for SMTs with rotor diameters of 5 mm and 10 mm, each with five different retainer designs varying in mechanical rigidity, ball pocket shape and ball complement. It was found that the different retainer designs yielded different performance curves, with the closed pocket designs consistently requiring lower input power for a given rotation speed, and the most rigid retainers giving the best performance overall. Both 5 mm and 10 mm diameter devices have shown repeatable performance at rotation speeds up to and exceeding 20 000 RPM with input power levels below 2 W, and devices were tested for over 2.5 million revolutions without failure. Retainer rings are commonly used in macro-scale bearings to ensure uniform spacing between the rolling elements. The integration of retainers into micro-bearings could lower costs by reducing the number of balls required for stable operation, and also open up the possibility of ‘smart’ bearings with integrated sensors to monitor the bearing status. (paper)

  4. Development and characterisation of silicon photomultipliers with bulk-integrated quench resistors for future applications in particle and astroparticle physics

    International Nuclear Information System (INIS)

    Jendrysik, Christian

    2014-01-01

    This thesis deals with the development and characterisation of a novel silicon photomultiplier concept with bulk-integrated quench resistors. The approach allows the realisation of a free entrance window and high fill factors, which leads to an improvement of the detection efficiency. With first prototype productions a proof of concept was possible. A full characterisation provided promising results, in particular with respect to the photon detection efficiency. By customising the simulation tools, a reliable description of the devices was achieved. In addition, conceptual studies of the next device generation demonstrated the possibility of single cell readout, expanding the application range of those detectors to particle tracking.

  5. Micromachined silicon cantilevers with integrated high-frequency magnetoimpedance sensors for simultaneous strain and magnetic field detection

    Science.gov (United States)

    Buettel, G.; Joppich, J.; Hartmann, U.

    2017-12-01

    Giant magnetoimpedance (GMI) measurements in the high-frequency regime utilizing a coplanar waveguide with an integrated Permalloy multilayer and micromachined on a silicon cantilever are reported. The fabrication process is described in detail. The aspect ratio of the magnetic multilayer in the magnetoresistive and magnetostrictive device was varied. Tensile strain and compressive strain were applied. Vector network analyzer measurements in the range from the skin effect to ferromagnetic resonance confirm the technological potential of GMI-based micro-electro-mechanical devices for strain and magnetic field sensing applications. The strain-impedance gauge factor was quantified by finite element strain calculations and reaches a maximum value of almost 200.

  6. Towards Cost-Effective Crystalline Silicon Based Flexible Solar Cells: Integration Strategy by Rational Design of Materials, Process, and Devices

    KAUST Repository

    Bahabry, Rabab R.

    2017-11-30

    The solar cells market has an annual growth of more than 30 percent over the past 15 years. At the same time, the cost of the solar modules diminished to meet both of the rapid global demand and the technological improvements. In particular for the crystalline silicon solar cells, the workhorse of this technology. The objective of this doctoral thesis is enhancing the efficiency of c-Si solar cells while exploring the cost reduction via innovative techniques. Contact metallization and ultra-flexible wafer based c-Si solar cells are the main areas under investigation. First, Silicon-based solar cells typically utilize screen printed Silver (Ag) metal contacts which affect the optimal electrical performance. To date, metal silicide-based ohmic contacts are occasionally used for the front contact grid lines. In this work, investigation of the microstructure and the electrical characteristics of nickel monosilicide (NiSi) ohmic contacts on the rear side of c-Si solar cells has been carried out. Significant enhancement in the fill factor leading to increasing the total power conversion efficiency is observed. Second, advanced classes of modern application require a new generation of versatile solar cells showcasing extreme mechanical resilience. However, silicon is a brittle material with a fracture strains <1%. Highly flexible Si-based solar cells are available in the form thin films which seem to be disadvantageous over thick Si solar cells due to the reduction of the optical absorption with less active Si material. Here, a complementary metal oxide semiconductor (CMOS) technology based integration strategy is designed where corrugation architecture to enable an ultra-flexible solar cell module from bulk mono-crystalline silicon solar wafer with 17% efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness and achieves flexibility via interdigitated back contacts. These cells

  7. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2015-01-01

    mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen

  8. Monolithic integration of detectors and transistors on high-resistivity silicon

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Batignani, Giovanni; Boscardin, Maurizio; Bosisio, Luciano; Gregori, Paolo; Pancheri, Lucio; Piemonte, Claudio; Ratti, Lodovico; Verzellesi, Giovanni; Zorzi, Nicola

    2007-01-01

    We report on the most recent results from an R and D activity aimed at the development of silicon radiation detectors with embedded front-end electronics. The key features of the fabrication technology and the available active devices are described. Selected results from the characterization of transistors and test structures are presented and discussed, and the considered application fields are addressed

  9. A low power bipolar amplifier integrated circuit for the ZEUS silicon strip system

    Energy Technology Data Exchange (ETDEWEB)

    Barberis, E. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States)); Cartiglia, N. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States)); Dorfan, D.E. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States)); Spencer, E. (Inst. for Particle Physics, Univ. of California, Santa Cruz, CA (United States))

    1993-05-01

    A fast low power bipolar chip consisting of 64 amplifier-comparators has been developed for use with silicon strip detectors for systems where high radiation levels and high occupancy considerations are important. The design is described and test results are presented. (orig.)

  10. Plasma enhanced chemical vapor deposition silicon oxynitride optimized for application in integrated optics

    NARCIS (Netherlands)

    Worhoff, Kerstin; Driessen, A.; Lambeck, Paul; Hilderink, L.T.H.; Linders, Petrus W.C.; Popma, T.J.A.

    1999-01-01

    Silicon Oxynitride layers are grown from SiH4/N2, NH3 and N2O by Plasma Enhanced Chemical Vapor Deposition. The process is optimized with respect to deposition of layers with excellent uniformity in the layer thickness, high homogeneity of the refractive index and good reproducibility of the layer

  11. Silicon diode for measurement of integral neutron dose and method of its production

    International Nuclear Information System (INIS)

    Frank, H.; Seda, J.; Trousil, J.

    1978-01-01

    The silicon diode consists of an N or P type silicon plate having a specific resistance exceeding 10 ohm.cm and minority carrier life exceeding 100μs. The plate thickness is a quintuple to a ten-tuple of the diffusion length and the plate consists of layers. Ions of, eg., boron, at a concentration exceeding 10 14 cm -2 are implanted into the P + type silicon layer and a layer of a metal, eg., nickel, is deposited onto it. Ions of eg., phosphorus, at a concentration exceeding 10 14 cm -2 are implanted in the N + type layer and a metal layer, eg., nickel is again depositeJ onto it. Implantation proceeds at an ion acceleration voltage of 10 to 200 kV. Metal layer deposition follows, and simultaneously with annealing of the P + and N + types of silicon layers, the metal layers are annealed at 600 to 900 degC for 1 to 60 minutes with subsequent temperature decrease at a rate less than 10 degC/min, down to a temperature of 300 degC. (J.P.)

  12. Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

    Science.gov (United States)

    Zhang, Liping; Sawchuk, Alexander A.

    2001-12-01

    We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

  13. Material synthesis for silicon integrated-circuit applications using ion implantation

    Science.gov (United States)

    Lu, Xiang

    As devices scale down into deep sub-microns, the investment cost and complexity to develop more sophisticated device technologies have increased substantially. There are some alternative potential technologies, such as silicon-on-insulator (SOI) and SiGe alloys, that can help sustain this staggering IC technology growth at a lower cost. Surface SiGe and SiGeC alloys with germanium peak composition up to 16 atomic percent are formed using high-dose ion implantation and subsequent solid phase epitaxial growth. RBS channeling spectra and cross-sectional TEM studies show that high quality SiGe and SiGeC crystals with 8 atomic percent germanium concentration are formed at the silicon surface. Extended defects are formed in SiGe and SiGeC with 16 atomic percent germanium concentration. X-ray diffraction experiments confirm that carbon reduces the lattice strain in SiGe alloys but without significant crystal quality improvement as detected by RBS channeling spectra and XTEM observations. Separation by plasma implantation of oxygen (SPIMOX) is an economical method for SOI wafer fabrication. This process employs plasma immersion ion implantation (PIII) for the implantation of oxygen ions. The implantation rate for Pm is considerably higher than that of conventional implantation. The feasibility of SPIMOX has been demonstrated with successful fabrication of SOI structures implementing this process. Secondary ion mass spectrometry (SIMS) analysis and cross-sectional transmission electron microscopy (XTEM) micrographs of the SPIMOX sample show continuous buried oxide under single crystal overlayer with sharp silicon/oxide interfaces. The operational phase space of implantation condition, oxygen dose and annealing requirement has been identified. Physical mechanisms of hydrogen induced silicon surface layer cleavage have been investigated using a combination of microscopy and hydrogen profiling techniques. The evolution of the silicon cleavage phenomenon is recorded by a series

  14. Integrating a dual-silicon photoelectrochemical cell into a redox flow battery for unassisted photocharging

    DEFF Research Database (Denmark)

    Liao, Shichao; Zong, Xu; Seger, Brian

    2016-01-01

    Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient photoelect......Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient...... photoelectrochemical reactions. Here we report an efficient SRFC based on a dual-silicon photoelectrochemical cell and a quinone/bromine redox flow battery for in situ solar energy conversion and storage. Using narrow bandgap silicon for efficient photon collection and fast redox couples for rapid interface charge...

  15. Integrating a dual-silicon photoelectrochemical cell into a redox flow battery for unassisted photocharging.

    Science.gov (United States)

    Liao, Shichao; Zong, Xu; Seger, Brian; Pedersen, Thomas; Yao, Tingting; Ding, Chunmei; Shi, Jingying; Chen, Jian; Li, Can

    2016-05-04

    Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient photoelectrochemical reactions. Here we report an efficient SRFC based on a dual-silicon photoelectrochemical cell and a quinone/bromine redox flow battery for in situ solar energy conversion and storage. Using narrow bandgap silicon for efficient photon collection and fast redox couples for rapid interface charge injection, our device shows an optimal solar-to-chemical conversion efficiency of ∼5.9% and an overall photon-chemical-electricity energy conversion efficiency of ∼3.2%, which, to our knowledge, outperforms previously reported SRFCs. The proposed SRFC can be self-photocharged to 0.8 V and delivers a discharge capacity of 730 mAh l(-1). Our work may guide future designs for highly efficient solar rechargeable devices.

  16. Design of Elastomer Structure to Facilitate Incorporation of Expanded Graphite in Silicones Without Compromising Electromechanical Integrity

    DEFF Research Database (Denmark)

    Hassouneh, Suzan Sager; Daugaard, Anders Egede; Skov, Anne Ladegaard

    2015-01-01

    The development of elastomer materials with a high dielectric permittivity has attracted increased interest over the past years due to their use in, for example, dielectric elastomers. For this particular use, both the electrically insulating properties - as well as the mechanical properties......-functional crosslinker, which allows for development of a suitable network matrix. The dielectric permittivity was increased by almost a factor of 4 compared to a benchmark silicone elastomer....

  17. Micro-fabricated silicon devices for advanced thermal management and integration of particle tracking detectors

    CERN Document Server

    Romagnoli, Giulia; Gambaro, Carla

    Since their first studies targeting the cooling of high-power computing chips, micro-channel devices are proven to provide a very efficient cooling system. In the last years micro-channel cooling has been successfully applied to the cooling of particle detectors at CERN. Thanks to their high thermal efficiency, they can guarantee a good heat sink for the cooling of silicon trackers, fundamental for the reduction of the radiation damage caused by the beam interactions. The radiation damage on the silicon detector is increasing with temperature and furthermore the detectors are producing heat that should be dissipated in the supporting structure. Micro-channels guarantee a distributed and uniform thermal exchange, thanks to the high flexibility of the micro-fabrication process that allows a large variety of channel designs. The thin nature of the micro-channels etched inside silicon wafers, is fulfilling the physics requirement of minimization of the material crossed by the particle beam. Furthermore micro-chan...

  18. Integrated porous-silicon light-emitting diodes: A fabrication process using graded doping profiles

    International Nuclear Information System (INIS)

    Barillaro, G.; Diligenti, A.; Pieri, F.; Fuso, F.; Allegrini, M.

    2001-01-01

    A fabrication process, compatible with an industrial bipolar+complementary metal - oxide - semiconductor (MOS)+diffusion MOS technology, has been developed for the fabrication of efficient porous-silicon-based light-emitting diodes. The electrical contact is fabricated with a double n + /p doping, achieving a high current injection efficiency and thus lower biasing voltages. The anodization is performed as the last step of the process, thus reducing potential incompatibilities with industrial processes. The fabricated devices show yellow-orange electroluminescence, visible with the naked eye in room lighting. A spectral characterization of light emission is presented and briefly discussed. [copyright] 2001 American Institute of Physics

  19. A new soft dielectric silicone elastomer matrix with high mechanical integrity and low losses

    DEFF Research Database (Denmark)

    Madsen, Frederikke Bahrt; Yu, Liyun; Daugaard, Anders Egede

    2015-01-01

    Though dielectric elastomers (DEs) have many favourable properties, the issue of high driving voltages limits the commercial viability of the technology. Driving voltage can be lowered by decreasing the Young's modulus and increasing the dielectric permittivity of silicone elastomers. A decrease...... in Young's modulus, however, is often accompanied by the loss of mechanical stability and thereby the lifetime of the DE. A new soft elastomer matrix, with no loss of mechanical stability and high dielectric permittivity, was prepared through the use of alkyl chloride-functional siloxane copolymers...

  20. The SVX3D integrated circuit for dead-timeless silicon strip readout

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M. E-mail: mgs@lbl.gov; Milgrome, O.; Zimmerman, T.; Volobouev, I.; Ely, R.P.; Connolly, A.; Fish, D.; Affolder, T.; Sill, A

    1999-10-01

    The revision D of the SVX3 readout IC has been fabricated in the Honeywell radiation-hard 0.8 {mu}m bulk CMOS process, for instrumenting 712,704 silicon strips in the upgrade to the Collider Detector at Fermilab. This final revision incorporates new features and changes to the original architecture that were added to meet the goal of dead-timeless operation. This paper describes the features central to dead-timeless operation, and presents test data for un-irradiated and irradiated SVX3D chips. (author)

  1. Chemical silicon surface modification and bioreceptor attachment to develop competitive integrated photonic biosensors.

    Science.gov (United States)

    Escorihuela, Jorge; Bañuls, María José; García Castelló, Javier; Toccafondo, Veronica; García-Rupérez, Jaime; Puchades, Rosa; Maquieira, Ángel

    2012-12-01

    Methodology for the functionalization of silicon-based materials employed for the development of photonic label-free nanobiosensors is reported. The studied functionalization based on organosilane chemistry allowed the direct attachment of biomolecules in a single step, maintaining their bioavailability. Using this immobilization approach in probe microarrays, successful specific detection of bacterial DNA is achieved, reaching hybridization sensitivities of 10 pM. The utility of the immobilization approach for the functionalization of label-free nanobiosensors based on photonic crystals and ring resonators was demonstrated using bovine serum albumin (BSA)/anti-BSA as a model system.

  2. Investigation of Properties of Novel Silicon Pixel Assemblies Employing Thin n-in-p Sensors and 3D-Integration

    CERN Document Server

    Weigell, Philipp

    Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300/fb¹ , the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running|especially if the luminosity is raised to about 5x10^35/(cm²s¹ ) as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost-effective pixel assemblies with...

  3. Insertable B-Layer integration in the ATLAS experiment and development of future 3D silicon pixel sensors

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00371528; Røhne, Ole

    This work has two distinct objectives: the development of software for the integration of the Insertable B-Layer (IBL) in the ATLAS offline software framework and the study of the performance of 3D silicon sensors produced by SINTEF for future silicon pixel detectors. The former task consists in the implementation of the IBL byte stream converter. This offline tool performs the decoding of the binary-formatted data coming from the detector into information (e.g. hit position and Time over Threshold) that is stored in a format used in the reconstruction data flow. It also encodes the information extracted from simulations into a simulated IBL byte stream. The tool has been successfully used since the beginning of the LHC Run II data taking. The experimental work on SINTEF 3D sensors was performed in the framework of the development of pixel sensors for the next generation of tracking detectors. Preliminary tests on SINTEF 3D sensors showed that the majority of these devices suffers from high leakage currents, ...

  4. Integration of the End Cap TEC+ of the CMS Silicon Strip Tracker

    CERN Document Server

    Bremer, Richard; Feld, Lutz

    2008-01-01

    At the European Organization for Nuclear Research (CERN) ne ar Geneva the new proton-proton collider ring LHC and the experiments that will be operated a t this accelerator are currently being finalised. Among these experiments is the multi-purpose det ector CMS whose aim it is to discover and investigate new physical phenomena that might become ac cessible by virtue of the high center- of-mass energy and luminosity of the LHC. Two of the most inte nsively studied possibilities are the discovery of the Higgs Boson and of particles from the spectr um of supersymmetric extensions of the Standard Model. CMS is the first large experiment of high- energy particle physics whose inner tracking system is exclusively instrumented with silicon d etector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction poin t in 10–12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completi on of the end caps of the tracking system. The institute played a leading...

  5. Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

    Science.gov (United States)

    Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

    2003-06-01

    We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

  6. Ion-implanted capacitively coupled silicon strip detectors with integrated polysilicon bias resistors processed on a 100 mm wafer

    International Nuclear Information System (INIS)

    Hietanen, I.; Lindgren, J.; Orava, R.; Tuuva, T.; Voutilainen, M.; Brenner, R.; Andersson, M.; Leinonen, K.; Ronkainen, H.

    1991-01-01

    Double-sided silicon strip detectors with integrated coupling capacitors and polysilicon resistors have been processed on a 100 mm wafer. A detector with an active area of 19x19 mm 2 was connected to LSI readout electronics and tested. The strip pitch of the detector is 25 μm on the p-side and 50 μm on the n-side. The readout pitch is 50 μm on both sides. The number of readout strips is 774 and the total number of strips is 1161. On the p-side a signal-to-noise of 35 has been measured using a 90 Sr β-source. The n-side has been studied using a laser. (orig.)

  7. 70 nm resolution in subsurface optical imaging of silicon integrated-circuits using pupil-function engineering

    Science.gov (United States)

    Serrels, K. A.; Ramsay, E.; Reid, D. T.

    2009-02-01

    We present experimental evidence for the resolution-enhancing effect of an annular pupil-plane aperture when performing nonlinear imaging in the vectorial-focusing regime through manipulation of the focal spot geometry. By acquiring two-photon optical beam-induced current images of a silicon integrated-circuit using solid-immersion-lens microscopy at 1550 nm we achieved 70 nm resolution. This result demonstrates a reduction in the minimum effective focal spot diameter of 36%. In addition, the annular-aperture-induced extension of the depth-of-focus causes an observable decrease in the depth contrast of the resulting image and we explain the origins of this using a simulation of the imaging process.

  8. Noise characterization of silicon strip detectors-comparison of sensors with and without integrated jfet source-follower.

    CERN Document Server

    Giacomini, Gabriele

    Noise is often the main factor limiting the performance of detector systems. In this work a detailed study of the noise contributions in different types of silicon microstrip sensors is carried on. We investigate three sensors with double-sided readout fabricated by different suppliers for the ALICE experiment at the CERN LHC, in addition to detectors including an integrated JFET Source-Follower as a first signal conditioning stage. The latter have been designed as an attempt at improving the performance when very long strips, obtained by gangling together several sensors, are required. After a description of the strip sensors and of their operation, the “static” characterization measurements performed on them (current and capacitance versus voltage and/or frequency) are illustrated and interpreted. Numerical device simulation has been employed as an aid in interpreting some of the measurement results. The commonly used models for expressing the noise of the detector-amplifier system in terms of its relev...

  9. Interface and integration of a silicon graphics UNIX computer with the Encore based SCE SONGS 2/3 simulator

    International Nuclear Information System (INIS)

    Olmos, J.; Lio, P.; Chan, K.S.

    1991-01-01

    The SONGS Unit 2/3 simulator was originally implemented in 1983 on a Master/Slave 32/7780 Encore MPX platform by the Singer-Link Company. In 1986, a 32/9780 MPX Encore computer was incorporated into the simulator computer system to provide the additional CPU processing needed to install the PACE plant monitoring system and to enable the upgrade of the NSSS Simulation to the advanced RETACT/STK models. Since the spring of 1990, the SCE SONGS Nuclear Training Division simulator technical staff, in cooperation with Micro Simulation Inc., has undertaken a project to integrate a Silicon Graphics UNIX based computer with the Encore MPX SONGS 2/3 simulation computer system. In this paper the authors review the objectives, advantages to be gained, software and hardware approaches utilized, and the results so far achieved by the authors' project

  10. Imaging and chemical surface analysis of biomolecular functionalization of monolithically integrated on silicon Mach-Zehnder interferometric immunosensors

    International Nuclear Information System (INIS)

    Gajos, Katarzyna; Angelopoulou, Michailia; Petrou, Panagiota; Awsiuk, Kamil; Kakabakos, Sotirios; Haasnoot, Willem; Bernasik, Andrzej; Rysz, Jakub; Marzec, Mateusz M.; Misiakos, Konstantinos; Raptis, Ioannis; Budkowski, Andrzej

    2016-01-01

    Highlights: • Optimization of probe immobilization with robotic spotter printing overlapping spots. • In-situ inspection of microstructured surfaces of biosensors integrated on silicon. • Imaging and chemical analysis of immobilization, surface blocking and immunoreaction. • Insight with molecular discrimination into step-by-step sensor surface modifications. • Optimized biofunctionalization improves sensor sensitivity and response repeatability. - Abstract: Time-of-flight secondary ion mass spectrometry (imaging, micro-analysis) has been employed to evaluate biofunctionalization of the sensing arm areas of Mach-Zehnder interferometers monolithically integrated on silicon chips for the immunochemical (competitive) detection of bovine κ-casein in goat milk. Biosensor surfaces are examined after: modification with (3-aminopropyl)triethoxysilane, application of multiple overlapping spots of κ-casein solutions, blocking with 100-times diluted goat milk, and reaction with monoclonal mouse anti-κ-casein antibodies in blocking solution. The areas spotted with κ-casein solutions of different concentrations are examined and optimum concentration providing homogeneous coverage is determined. Coverage of biosensor surfaces with biomolecules after each of the sequential steps employed in immunodetection is also evaluated with TOF-SIMS, supplemented by Atomic force microscopy and X-ray photoelectron spectroscopy. Uniform molecular distributions are observed on the sensing arm areas after spotting with optimum κ-casein concentration, blocking and immunoreaction. The corresponding biomolecular compositions are determined with a Principal Component Analysis that distinguished between protein amino acids and milk glycerides, as well as between amino acids characteristic for Mabs and κ-casein, respectively. Use of the optimum conditions (κ-casein concentration) for functionalization of chips with arrays of ten Mach-Zehnder interferometers provided on-chips assays

  11. Imaging and chemical surface analysis of biomolecular functionalization of monolithically integrated on silicon Mach-Zehnder interferometric immunosensors

    Energy Technology Data Exchange (ETDEWEB)

    Gajos, Katarzyna, E-mail: kasia.fornal@uj.edu.pl [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Angelopoulou, Michailia; Petrou, Panagiota [Institute of Nuclear & Radiological Sciences & Technology, Energy & Safety, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Awsiuk, Kamil [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Kakabakos, Sotirios [Institute of Nuclear & Radiological Sciences & Technology, Energy & Safety, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Haasnoot, Willem [RIKILT Wageningen UR, Akkermaalsbos 2, 6708 WB Wageningen (Netherlands); Bernasik, Andrzej [Faculty of Physics and Applied Computer Science, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Academic Centre for Materials and Nanotechnology, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Rysz, Jakub [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Marzec, Mateusz M. [Academic Centre for Materials and Nanotechnology, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Misiakos, Konstantinos; Raptis, Ioannis [Department of Microelectronics, Institute of Nanoscience and Nanotechnology, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Budkowski, Andrzej [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland)

    2016-11-01

    Highlights: • Optimization of probe immobilization with robotic spotter printing overlapping spots. • In-situ inspection of microstructured surfaces of biosensors integrated on silicon. • Imaging and chemical analysis of immobilization, surface blocking and immunoreaction. • Insight with molecular discrimination into step-by-step sensor surface modifications. • Optimized biofunctionalization improves sensor sensitivity and response repeatability. - Abstract: Time-of-flight secondary ion mass spectrometry (imaging, micro-analysis) has been employed to evaluate biofunctionalization of the sensing arm areas of Mach-Zehnder interferometers monolithically integrated on silicon chips for the immunochemical (competitive) detection of bovine κ-casein in goat milk. Biosensor surfaces are examined after: modification with (3-aminopropyl)triethoxysilane, application of multiple overlapping spots of κ-casein solutions, blocking with 100-times diluted goat milk, and reaction with monoclonal mouse anti-κ-casein antibodies in blocking solution. The areas spotted with κ-casein solutions of different concentrations are examined and optimum concentration providing homogeneous coverage is determined. Coverage of biosensor surfaces with biomolecules after each of the sequential steps employed in immunodetection is also evaluated with TOF-SIMS, supplemented by Atomic force microscopy and X-ray photoelectron spectroscopy. Uniform molecular distributions are observed on the sensing arm areas after spotting with optimum κ-casein concentration, blocking and immunoreaction. The corresponding biomolecular compositions are determined with a Principal Component Analysis that distinguished between protein amino acids and milk glycerides, as well as between amino acids characteristic for Mabs and κ-casein, respectively. Use of the optimum conditions (κ-casein concentration) for functionalization of chips with arrays of ten Mach-Zehnder interferometers provided on-chips assays

  12. A CMOS-compatible large-scale monolithic integration of heterogeneous multi-sensors on flexible silicon for IoT applications

    KAUST Repository

    Nassar, Joanna M.

    2017-02-07

    We report CMOS technology enabled fabrication and system level integration of flexible bulk silicon (100) based multi-sensors platform which can simultaneously sense pressure, temperature, strain and humidity under various physical deformations. We also show an advanced wearable version for body vital monitoring which can enable advanced healthcare for IoT applications.

  13. Data Transmission and Thermo-Optic Tuning Performance of Dielectric-Loaded Plasmonic Structures Hetero-Integrated on a Silicon Chip

    DEFF Research Database (Denmark)

    Giannoulis, G.; Kalavrouziotis, D.; Apostolopoulos, D.

    2012-01-01

    We demonstrate experimental evidence of the data capture and the low-energy thermo-optic tuning credentials of dielectric-loaded plasmonic structures integrated on a silicon chip. We show 7-nm thermo-optical tuning of a plasmonic racetrack-resonator with less than 3.3 mW required electrical power...

  14. Silicon photonics fiber-to-the-home transceiver array based on transfer-printing-based integration of III-V photodetectors.

    Science.gov (United States)

    Zhang, Jing; De Groote, Andreas; Abbasi, Amin; Loi, Ruggero; O'Callaghan, James; Corbett, Brian; Trindade, António José; Bower, Christopher A; Roelkens, Gunther

    2017-06-26

    A 4-channel silicon photonics transceiver array for Point-to-Point (P2P) fiber-to-the-home (FTTH) optical networks at the central office (CO) side is demonstrated. A III-V O-band photodetector array was integrated onto the silicon photonic transmitter through transfer printing technology, showing a polarization-independent responsivity of 0.39 - 0.49 A/W in the O-band. The integrated PDs (30 × 40 μm 2 mesa) have a 3 dB bandwidth of 11.5 GHz at -3 V bias. Together with high-speed C-band silicon ring modulators whose bandwidth is up to 15 GHz, operation of the transceiver array at 10 Gbit/s is demonstrated. The use of transfer printing for the integration of the III-V photodetectors allows for an efficient use of III-V material and enables the scalable integration of III-V devices on silicon photonics wafers, thereby reducing their cost.

  15. A CMOS-compatible large-scale monolithic integration of heterogeneous multi-sensors on flexible silicon for IoT applications

    KAUST Repository

    Nassar, Joanna M.; Sevilla, Galo T.; Velling, Seneca J.; Cordero, Marlon D.; Hussain, Muhammad Mustafa

    2017-01-01

    We report CMOS technology enabled fabrication and system level integration of flexible bulk silicon (100) based multi-sensors platform which can simultaneously sense pressure, temperature, strain and humidity under various physical deformations. We also show an advanced wearable version for body vital monitoring which can enable advanced healthcare for IoT applications.

  16. Integrating a Silicon Solar Cell with a Triboelectric Nanogenerator via a Mutual Electrode for Harvesting Energy from Sunlight and Raindrops.

    Science.gov (United States)

    Liu, Yuqiang; Sun, Na; Liu, Jiawei; Wen, Zhen; Sun, Xuhui; Lee, Shuit-Tong; Sun, Baoquan

    2018-03-27

    Solar cells, as promising devices for converting light into electricity, have a dramatically reduced performance on rainy days. Here, an energy harvesting structure that integrates a solar cell and a triboelectric nanogenerator (TENG) device is built to realize power generation from both sunlight and raindrops. A heterojunction silicon (Si) solar cell is integrated with a TENG by a mutual electrode of a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) film. Regarding the solar cell, imprinted PEDOT:PSS is used to reduce light reflection, which leads to an enhanced short-circuit current density. A single-electrode-mode water-drop TENG on the solar cell is built by combining imprinted polydimethylsiloxane (PDMS) as a triboelectric material combined with a PEDOT:PSS layer as an electrode. The increasing contact area between the imprinted PDMS and water drops greatly improves the output of the TENG with a peak short-circuit current of ∼33.0 nA and a peak open-circuit voltage of ∼2.14 V, respectively. The hybrid energy harvesting system integrated electrode configuration can combine the advantages of high current level of a solar cell and high voltage of a TENG device, promising an efficient approach to collect energy from the environment in different weather conditions.

  17. Roof-integrated amorphous silicon photovoltaic installation at the Institute for Micro-Technology; Installation photovoltaique IMT Neuchatel silicium amorphe integre dans toiture

    Energy Technology Data Exchange (ETDEWEB)

    Tscharner, R.; Shah, A.V.

    2003-07-01

    This final report for the Swiss Federal Office of Energy (SFOE) describes the 6.44 kW grid-connected photovoltaic (PV) power plant that has been in operation since 1996 at the Institute for Micro-Technology in Neuchatel, Switzerland. The PV plant, which features large-area, fully integrated modules using amorphous silicon cells was the first of its kind in Switzerland. Experience gained with the installation, which has been fully operational since its construction, as well as the power produced and efficiencies measured are presented and commented. The role of the installation as the forerunner of new, so-called 'micro-morph' thin-film solar cell technology developed at the institute is stressed. Technical details of the plant and its performance are given.

  18. Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

    Science.gov (United States)

    Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

    2013-03-25

    n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

  19. High-Resolution Silicon-based Particle Sensor with Integrated Amplification, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — This SBIR Phase I project will deliver a breakthrough in particle-detection sensors, by integrating an amplifying junction as part of the detector topology. Focusing...

  20. Robust integration schemes for junction-based modulators in a 200mm CMOS compatible silicon photonic platform (Conference Presentation)

    Science.gov (United States)

    Szelag, Bertrand; Abraham, Alexis; Brision, Stéphane; Gindre, Paul; Blampey, Benjamin; Myko, André; Olivier, Segolene; Kopp, Christophe

    2017-05-01

    Silicon photonic is becoming a reality for next generation communication system addressing the increasing needs of HPC (High Performance Computing) systems and datacenters. CMOS compatible photonic platforms are developed in many foundries integrating passive and active devices. The use of existing and qualified microelectronics process guarantees cost efficient and mature photonic technologies. Meanwhile, photonic devices have their own fabrication constraints, not similar to those of cmos devices, which can affect their performances. In this paper, we are addressing the integration of PN junction Mach Zehnder modulator in a 200mm CMOS compatible photonic platform. Implantation based device characteristics are impacted by many process variations among which screening layer thickness, dopant diffusion, implantation mask overlay. CMOS devices are generally quite robust with respect to these processes thanks to dedicated design rules. For photonic devices, the situation is different since, most of the time, doped areas must be carefully located within waveguides and CMOS solutions like self-alignment to the gate cannot be applied. In this work, we present different robust integration solutions for junction-based modulators. A simulation setup has been built in order to optimize of the process conditions. It consist in a Mathlab interface coupling process and device electro-optic simulators in order to run many iterations. Illustrations of modulator characteristic variations with process parameters are done using this simulation setup. Parameters under study are, for instance, X and Y direction lithography shifts, screening oxide and slab thicknesses. A robust process and design approach leading to a pn junction Mach Zehnder modulator insensitive to lithography misalignment is then proposed. Simulation results are compared with experimental datas. Indeed, various modulators have been fabricated with different process conditions and integration schemes. Extensive

  1. Design of photonic phased array switches using nano electromechanical systems on silicon-on-insulator integration platform

    Science.gov (United States)

    Hussein, Ali Abdulsattar

    This thesis presents an introduction to the design and simulation of a novel class of integrated photonic phased array switch elements. The main objective is to use nano-electromechanical (NEMS) based phase shifters of cascaded under-etched slot nanowires that are compact in size and require a small amount of power to operate them. The structure of the switch elements is organized such that it brings the phase shifting elements to the exterior sides of the photonic circuits. The transition slot couplers, used to interconnect the phase shifters, are designed to enable biasing one of the silicon beams of each phase shifter from an electrode located at the side of the phase shifter. The other silicon beam of each phase shifter is biased through the rest of the silicon structure of the switch element, which is taken as a ground. Phased array switch elements ranging from 2x2 up to 8x8 multiple-inputs/multiple-outputs (MIMO) are conveniently designed within reasonable footprints native to the current fabrication technologies. Chapter one presents the general layout of the various designs of the switch elements and demonstrates their novel features. This demonstration will show how waveguide disturbances in the interconnecting network from conventional switch elements can be avoided by adopting an innovative design. Some possible applications for the designed switch elements of different sizes and topologies are indicated throughout the chapter. Chapter two presents the design of the multimode interference (MMI) couplers used in the switch elements as splitters, combiners and waveguide crossovers. Simulation data and design methodologies for the multimode couplers of interest are detailed in this chapter. Chapter three presents the design and analysis of the NEMS-operated phase shifters. Both simulations and numerical analysis are utilized in the design of a 0°-180° capable NEMS-operated phase shifter. Additionally, the response of some of the designed photonic phased

  2. Microspot-based ELISA in microfluidics: chemiluminescence and colorimetry detection using integrated thin-film hydrogenated amorphous silicon photodiodes.

    Science.gov (United States)

    Novo, Pedro; Prazeres, Duarte Miguel França; Chu, Virginia; Conde, João Pedro

    2011-12-07

    Microfluidic technology has the potential to decrease the time of analysis and the quantity of sample and reactants required in immunoassays, together with the potential of achieving high sensitivity, multiplexing, and portability. A lab-on-a-chip system was developed and optimized using optical and fluorescence microscopy. Primary antibodies are adsorbed onto the walls of a PDMS-based microchannel via microspotting. This probe antibody is then recognised using secondary FITC or HRP labelled antibodies responsible for providing fluorescence or chemiluminescent and colorimetric signals, respectively. The system incorporated a micron-sized thin-film hydrogenated amorphous silicon photodiode microfabricated on a glass substrate. The primary antibody spots in the PDMS-based microfluidic were precisely aligned with the photodiodes for the direct detection of the antibody-antigen molecular recognition reactions using chemiluminescence and colorimetry. The immunoassay takes ~30 min from assay to the integrated detection. The conditions for probe antibody microspotting and for the flow-through ELISA analysis in the microfluidic format with integrated detection were defined using antibody solutions with concentrations in the nM-μM range. Sequential colorimetric or chemiluminescence detection of specific antibody-antigen molecular recognition was quantitatively detected using the photodiode. Primary antibody surface densities down to 0.182 pmol cm(-2) were detected. Multiplex detection using different microspotted primary antibodies was demonstrated.

  3. A novel Silicon Photomultiplier with bulk integrated quench resistors: utilization in optical detection and tracking applications for particle physics

    Energy Technology Data Exchange (ETDEWEB)

    Petrovics, Stefan, E-mail: stp@hll.mpg.de [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Andricek, Ladislav [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Diehl, Inge; Hansen, Karsten [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Jendrysik, Christian [Infineon Technologies AG, Am Campeon 1-12, D-85579 Neubiberg (Germany); Krueger, Katja [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Lehmann, Raik; Ninkovic, Jelena [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Reckleben, Christian [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Richter, Rainer; Schaller, Gerhard; Schopper, Florian [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Sefkow, Felix [DESY, Notkestrasse 85, D-22607 Hamburg (Germany)

    2017-02-11

    Silicon Photomultipliers (SiPMs) are a promising candidate for replacing conventional photomultiplier tubes (PMTs) in many applications, thanks to ongoing developments and advances in their technology. Conventional SiPMs are generally an array of avalanche photo diodes, operated in Geiger mode and read out in parallel, thus leading to the necessity of a high ohmic quenching resistor. This resistor enables passive quenching and is usually located on top of the array, limiting the fill factor of the device. In this paper, a novel detector concept with a bulk integrated quenching resistor will be recapped. In addition, due to other advantages of this novel detector design, a new concept, in which these devices will be utilized as tracking detectors for particle physics applications will be introduced, as well as first simulation studies and experimental measurements of this new approach. - Highlights: • A novel SiPM concept with bulk integrated quenching resistor is shown. • First prototypes of these SiPMs as tracking detectors are proposed. • Simulations of the Geiger efficiency suggest feasible operations at low overbias. • First measurements of the electron detection efficiency show promising results. • Measurements are in good agreement with the simulations.

  4. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    International Nuclear Information System (INIS)

    Ghoneim, M. T.; Hussain, M. M.

    2015-01-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures

  5. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Science.gov (United States)

    Ghoneim, M. T.; Hussain, M. M.

    2015-08-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ˜260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  6. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Energy Technology Data Exchange (ETDEWEB)

    Ghoneim, M. T.; Hussain, M. M., E-mail: muhammadmustafa.hussain@kaust.edu.sa [Integrated Nanotechnology Lab, Electrical Engineering, Computer Electrical Mathematical Science and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia)

    2015-08-03

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  7. High-Responsivity Graphene-Boron Nitride Photodetector and Autocorrelator in a Silicon Photonic Integrated Circuit.

    Science.gov (United States)

    Shiue, Ren-Jye; Gao, Yuanda; Wang, Yifei; Peng, Cheng; Robertson, Alexander D; Efetov, Dmitri K; Assefa, Solomon; Koppens, Frank H L; Hone, James; Englund, Dirk

    2015-11-11

    Graphene and other two-dimensional (2D) materials have emerged as promising materials for broadband and ultrafast photodetection and optical modulation. These optoelectronic capabilities can augment complementary metal-oxide-semiconductor (CMOS) devices for high-speed and low-power optical interconnects. Here, we demonstrate an on-chip ultrafast photodetector based on a two-dimensional heterostructure consisting of high-quality graphene encapsulated in hexagonal boron nitride. Coupled to the optical mode of a silicon waveguide, this 2D heterostructure-based photodetector exhibits a maximum responsivity of 0.36 A/W and high-speed operation with a 3 dB cutoff at 42 GHz. From photocurrent measurements as a function of the top-gate and source-drain voltages, we conclude that the photoresponse is consistent with hot electron mediated effects. At moderate peak powers above 50 mW, we observe a saturating photocurrent consistent with the mechanisms of electron-phonon supercollision cooling. This nonlinear photoresponse enables optical on-chip autocorrelation measurements with picosecond-scale timing resolution and exceptionally low peak powers.

  8. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-08-05

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  9. Fabrication of an integrated ΔE-E-silicon detector by wafer bonding using cobalt disilicide

    International Nuclear Information System (INIS)

    Thungstroem, G.; Veldhuizen, E.J. van; Westerberg, L.; Norlin, L.-O.; Petersson, C.S.

    1997-01-01

    The problem concerning mechanical stability of thin self-supporting ΔE detector in a ΔE-E semiconductor detector telescope, has been solved by integrating both detectors into one unit. We show here a low-cost method to integrate the detectors by wafer bonding using cobalt disilicide. The ΔE-detector has a thickness of 6.5 μm and the E detector 290 μm with an area of 24.8 mm 2 . The system was characterized with secondary ion mass spectroscopy (SIMS), scanning electron microscopy (SEM), electrical measurement, particle measurement and two-dimensional electrical simulation. (orig.)

  10. Fabrication of an integrated {Delta}E-E-silicon detector by wafer bonding using cobalt disilicide

    Energy Technology Data Exchange (ETDEWEB)

    Thungstroem, G. [Mid-Sweden Univ., Sundsvall (Sweden). Dept. of Inf. Technol.]|[Royal Institute of Technology, Department of Electronics, Electrum 229, S-164 40 Kista (Sweden); Veldhuizen, E.J. van [Uppsala University, Department of Radiation Science, Box 535, S-751 21 Uppsala (Sweden); Westerberg, L. [Uppsala University, The Svedberg Laboratory, Box 533, S-751 21 Uppsala (Sweden); Norlin, L.-O. [Royal Institute of Technology, Department of Physics, Frescativaegen 24, S-104 05 Stockholm (Sweden); Petersson, C.S. [Royal Institute of Technology, Department of Electronics, Electrum 229, S-164 40 Kista (Sweden)

    1997-06-01

    The problem concerning mechanical stability of thin self-supporting {Delta}E detector in a {Delta}E-E semiconductor detector telescope, has been solved by integrating both detectors into one unit. We show here a low-cost method to integrate the detectors by wafer bonding using cobalt disilicide. The {Delta}E-detector has a thickness of 6.5 {mu}m and the E detector 290 {mu}m with an area of 24.8 mm{sup 2}. The system was characterized with secondary ion mass spectroscopy (SIMS), scanning electron microscopy (SEM), electrical measurement, particle measurement and two-dimensional electrical simulation. (orig.).

  11. Design and characterization of low-loss 2D grating couplers for silicon photonics integrated circuits

    Science.gov (United States)

    Lacava, C.; Carrol, L.; Bozzola, A.; Marchetti, R.; Minzioni, P.; Cristiani, I.; Fournier, M.; Bernabe, S.; Gerace, D.; Andreani, L. C.

    2016-03-01

    We present the characterization of Silicon-on-insulator (SOI) photonic-crystal based 2D grating-couplers (2D-GCs) fabricated by CEA-Leti in the frame of the FP7 Fabulous project, which is dedicated to the realization of devices and systems for low-cost and high-performance passives-optical-networks. On the analyzed samples different test structures are present, including 2D-GC connected to another 2D-GC by different waveguides (in a Mach-Zehnder like configuration), and 2D-GC connected to two separate 2D-GCs, so as to allow a complete assessment of different parameters. Measurements were carried out using a tunable laser source operating in the extended telecom bandwidth and a fiber-based polarization controlling system at the input of device-under-test. The measured data yielded an overall fiber-to-fiber loss of 7.5 dB for the structure composed by an input 2D-GC connected to two identical 2D-GCs. This value was obtained at the peak wavelength of the grating, and the 3-dB bandwidth of the 2D-GC was assessed to be 43 nm. Assuming that the waveguide losses are negligible, so as to make a worst-case analysis, the coupling efficiency of the single 2D-GC results to be equal to -3.75 dB, constituting, to the best of our knowledge, the lowest value ever reported for a fully CMOS compatible 2D-GC. It is worth noting that both the obtained values are in good agreement with those expected by the numerical simulations performed using full 3D analysis by Lumerical FDTD-solutions.

  12. Online analysis of oxygen inside silicon-glass microreactors with integrated optical sensors

    DEFF Research Database (Denmark)

    Ehgartner, Josef; Sulzer, Philipp; Burger, Tobias

    2016-01-01

    A powerful online analysis set-up for oxygen measurements within microfluidic devices is presented. It features integration of optical oxygen sensors into microreactors, which enables contactless, accurate and inexpensive readout using commercially available oxygen meters via luminescent lifetime...... monitoring of enzyme transformations, including d-alanine or d-phenylalanine oxidation by d-amino acid oxidase, and glucose oxidation by glucose oxidase....

  13. Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6

    NARCIS (Netherlands)

    Roozeboom, F.; Narayanan, V.; Kakushima, K.; Timans, P.J.; Gusev, E.P.; Karim, Z.; Gendt, S. De

    2016-01-01

    The topics of this annual symposium continue to describe the evolution of traditional scaling in CMOS integrated circuit manufacturing (More Moore for short), combined with the opportunities from growing diversification and embedded functionality (More than Moore). Once again, the main objective was

  14. mm-Wave Wireless Communications based on Silicon Photonics Integrated Circuits

    DEFF Research Database (Denmark)

    Rommel, Simon; Heck, Martijn; Vegas Olmos, Juan José

    Hybrid photonic-wireless transmission schemes in the mm-wave frequency range are promising candidates to enable the multi-gigabit per second data communications required from wireless and mobile networks of the 5th and future generations. Photonic integration may pave the way to practical applica...

  15. The realization of an integrated Mach-Zehnder waveguide immunosensor in silicon technology

    NARCIS (Netherlands)

    Schipper, E.F.; Schipper, E.F.; Brugman, A.M.; Lechuga, L.M.; Lechuga, L.M.; Kooyman, R.P.H.; Greve, Jan; Dominguez, C.

    1997-01-01

    We describe the realization of a symmetric integrated channel waveguide Mach-Zehnder sensor which uses the evanescent field to detect small refractive-index changes (¿nmin ¿ 1 × 10¿4) near the guiding-layer surface. This guiding layer consists of ridge structures with a height of 3 nm and a width of

  16. Silicon Photonics Integrated Circuits for 5th Generation mm-Wave Wireless Communications

    DEFF Research Database (Denmark)

    Rommel, Simon; Vegas Olmos, Juan José; Tafur Monroy, Idelfonso

    Hybrid photonic-wireless transmission schemes in the mm-wave frequency are promising candidates to enable the multi-gigabit per second data communications required from wireless and mobile networks of the 5th and future generations. Photonic integration may pave the way to practical applicability...

  17. Integrated graphene based modulators enabled by interfacing plasmonic slot and silicon waveguides

    DEFF Research Database (Denmark)

    Xiao, Sanshui

    Graphene has offered a new paradigm for extremely fast and active optoelectronic devices due to its unique electronic and optical properties [1]. With the combination of high-index dielectric waveguides/resonators, several integrated graphene-based optical modulators have already been demonstrated...

  18. Wafer-level integration of NiTi shape memory alloy on silicon using Au–Si eutectic bonding

    International Nuclear Information System (INIS)

    Gradin, Henrik; Bushra, Sobia; Braun, Stefan; Stemme, Göran; Van der Wijngaart, Wouter

    2013-01-01

    This paper reports on the wafer level integration of NiTi shape memory alloy (SMA) sheets with silicon substrates through Au–Si eutectic bonding. Different bond parameters, such as Au layer thicknesses and substrate surface treatments were evaluated. The amount of gold in the bond interface is the most important parameter to achieve a high bond yield; the amount can be determined by the barrier layers between the Au and Si or by the amount of Au deposition. Deposition of a gold layer of more than 1 μm thickness before bonding gives the most promising results. Through patterning of the SMA sheet and by limiting bonding to small areas, stresses created by the thermal mismatch between Si and NiTi are reduced. With a gold layer of 1 μm thickness and bond areas between 200 × 200 and 800 × 800 μm 2 a high bond strength and a yield above 90% is demonstrated. (paper)

  19. Design of a compact and integrated TM-rotated/TE-through polarization beam splitter for silicon-based slot waveguides.

    Science.gov (United States)

    Xu, Yin; Xiao, Jinbiao

    2016-01-20

    A compact and integrated TM-rotated/TE-through polarization beam splitter for silicon-based slot waveguides is proposed and characterized. For the input TM mode, it is first transferred into the cross strip waveguide using a tapered directional coupler (DC), and then efficiently rotated to the corresponding TE mode using an L-shaped bending polarization rotator (PR). Finally, the TE mode for slot waveguide at the output end is obtained with the help of a strip-to-slot mode converter. By contrast, for the input TE mode, it almost passes through the slot waveguide directly and outputs at the bar end with nearly neglected coupling due to a large mode mismatch. Moreover, an additional S-bend connecting the tapered DC and bending PR is used to enhance the performance. Results show that a total device length of 19.6 μm is achieved, where the crosstalk (CT) and polarization conversion loss are, respectively -26.09 and 0.54 dB, for the TM mode, and the CT and insertion loss are, respectively, -22.21 and 0.41 dB, for the TE mode, both at 1.55 μm. The optical bandwidth is approximately 50 nm with a CT<-20  dB. In addition, fabrication tolerances and field evolution are also presented.

  20. Gold nanostructure-integrated silica-on-silicon waveguide for the detection of antibiotics in milk and milk products

    Science.gov (United States)

    Ozhikandathil, Jayan; Badilescu, Simona; Packirisamy, Muthukumaran

    2012-10-01

    Antibiotics are extensively used in veterinary medicine for the treatment of infectious diseases. The use of antibiotics for the treatment of animals used for food production raised the concern of the public and a rapid screening method became necessary. A novel approach of detection of antibiotics in milk is reported in this work by using an immunoassay format and the Localized Surface Plasmon Resonance property of gold. An antibiotic from the penicillin family that is, ampicillin is used for testing. Gold nanostructures deposited on a glass substrate by a novel convective assembly method were heat-treated to form a nanoisland morphology. The Au nanostructures were functionalized and the corresponding antibody was absorbed from a solution. Solutions with known concentrations of antigen (antibiotics) were subsequently added and the spectral changes were monitored step by step. The Au LSPR band corresponding to the nano-island structure was found to be suitable for the detection of the antibody antigen interaction. The detection of the ampicillin was successfully demonstrated with the gold nano-islands deposited on glass substrate. This process was subsequently adapted for the integration of gold nanostructures on the silica-on-silicon waveguide for the purpose of detecting antibiotics.

  1. Integrated X-ray and charged particle active pixel CMOS sensor arrays using an epitaxial silicon sensitive region

    International Nuclear Information System (INIS)

    Kleinfelder, Stuart; Bichsel, Hans; Bieser, Fred; Matis, Howard S.; Rai, Gulshan; Retiere, Fabrice; Weiman, Howard; Yamamoto, Eugene

    2002-01-01

    Integrated CMOS Active Pixel Sensor (APS) arrays have been fabricated and tested using X-ray and electron sources. The 128 by 128 pixel arrays, designed in a standard 0.25 micron process, use a ∼10 micron epitaxial silicon layer as a deep detection region. The epitaxial layer has a much greater thickness than the surface features used by standard CMOS APS, leading to stronger signals and potentially better signal-to-noise ratio (SNR). On the other hand, minority carriers confined within the epitaxial region may diffuse to neighboring pixels, blur images and reduce peak signal intensity. But for low-rate, sparse-event images, centroid analysis of this diffusion may be used to increase position resolution. Careful trade-offs involving pixel size and sense-node area verses capacitance must be made to optimize overall performance. The prototype sensor arrays, therefore, include a range of different pixel designs, including different APS circuits and a range of different epitaxial layer contact structures. The fabricated arrays were tested with 1.5 GeV electrons and Fe-55 X-ray sources, yielding a measured noise of 13 electrons RMS and an SNR for single Fe-55 X-rays of greater than 38

  2. Nonlinear silicon photonics

    Science.gov (United States)

    Borghi, M.; Castellan, C.; Signorini, S.; Trenti, A.; Pavesi, L.

    2017-09-01

    Silicon photonics is a technology based on fabricating integrated optical circuits by using the same paradigms as the dominant electronics industry. After twenty years of fervid development, silicon photonics is entering the market with low cost, high performance and mass-manufacturable optical devices. Until now, most silicon photonic devices have been based on linear optical effects, despite the many phenomenologies associated with nonlinear optics in both bulk materials and integrated waveguides. Silicon and silicon-based materials have strong optical nonlinearities which are enhanced in integrated devices by the small cross-section of the high-index contrast silicon waveguides or photonic crystals. Here the photons are made to strongly interact with the medium where they propagate. This is the central argument of nonlinear silicon photonics. It is the aim of this review to describe the state-of-the-art in the field. Starting from the basic nonlinearities in a silicon waveguide or in optical resonator geometries, many phenomena and applications are described—including frequency generation, frequency conversion, frequency-comb generation, supercontinuum generation, soliton formation, temporal imaging and time lensing, Raman lasing, and comb spectroscopy. Emerging quantum photonics applications, such as entangled photon sources, heralded single-photon sources and integrated quantum photonic circuits are also addressed at the end of this review.

  3. Recent advance in high manufacturing readiness level and high temperature CMOS mixed-signal integrated circuits on silicon carbide

    Science.gov (United States)

    Weng, M. H.; Clark, D. T.; Wright, S. N.; Gordon, D. L.; Duncan, M. A.; Kirkham, S. J.; Idris, M. I.; Chan, H. K.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

    2017-05-01

    A high manufacturing readiness level silicon carbide (SiC) CMOS technology is presented. The unique process flow enables the monolithic integration of pMOS and nMOS transistors with passive circuit elements capable of operation at temperatures of 300 °C and beyond. Critical to this functionality is the behaviour of the gate dielectric and data for high temperature capacitance-voltage measurements are reported for SiO2/4H-SiC (n and p type) MOS structures. In addition, a summary of the long term reliability for a range of structures including contact chains to both n-type and p-type SiC, as well as simple logic circuits is presented, showing function after 2000 h at 300 °C. Circuit data is also presented for the performance of digital logic devices, a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. A high temperature micro-oven system has been utilised to enable the high temperature testing and stressing of units assembled in ceramic dual in line packages, including a high temperature small form-factor SiC based bridge leg power module prototype, operated for over 1000 h at 300 °C. The data presented show that SiC CMOS is a key enabling technology in high temperature integrated circuit design. In particular it provides the ability to realise sensor interface circuits capable of operating above 300 °C, accommodate shifts in key parameters enabling deployment in applications including automotive, aerospace and deep well drilling.

  4. Silicon-based horizontal nanoplasmonic slot waveguides for on-chip integration.

    Science.gov (United States)

    Zhu, Shiyang; Liow, T Y; Lo, G Q; Kwong, D L

    2011-04-25

    Horizontal metal/insulator/Si/insulator/metal nanoplasmonic slot waveguide (PWG), which is inserted in a conventional Si wire waveguide, is fabricated using the standard Si-CMOS technology. A thin insulator between the metal and the Si core plays a key role: it not only increases the propagation distance as the theoretical prediction, but also prevents metal diffusion and/or metal-Si reaction. Cu-PWGs with the Si core width of ~134-21 nm and ~12-nm-thick SiO2 on each side exhibit a relatively low propagation loss of ~0.37-0.63 dB/µm around the telecommunication wavelength of 1550 nm, which is ~2.6 times smaller than the Al-counterparts. A simple tapered coupler can provide an effective coupling between the PWG and the conventional Si wire waveguide. The coupling efficiency as high as ~0.1-0.4 dB per facet is measured. The PWG allows a sharp bending. The pure bending loss of a Cu-PWG direct 90° bend is measured to be ~0.6-1.0 dB. These results indicate the potential for seamless integration of various functional nanoplasmonic devices in existing Si electronic photonic integrated circuits (Si-EPICs).

  5. Thin SiGe virtual substrates for Ge heterostructures integration on silicon

    International Nuclear Information System (INIS)

    Cecchi, S.; Chrastina, D.; Frigerio, J.; Isella, G.; Gatti, E.; Guzzi, M.; Müller Gubler, E.; Paul, D. J.

    2014-01-01

    The possibility to reduce the thickness of the SiGe virtual substrate, required for the integration of Ge heterostructures on Si, without heavily affecting the crystal quality is becoming fundamental in several applications. In this work, we present 1 μm thick Si 1−x Ge x buffers (with x > 0.7) having different designs which could be suitable for applications requiring a thin virtual substrate. The rationale is to reduce the lattice mismatch at the interface with the Si substrate by introducing composition steps and/or partial grading. The relatively low growth temperature (475 °C) makes this approach appealing for complementary metal-oxide-semiconductor integration. For all the investigated designs, a reduction of the threading dislocation density compared to constant composition Si 1−x Ge x layers was observed. The best buffer in terms of defects reduction was used as a virtual substrate for the deposition of a Ge/SiGe multiple quantum well structure. Room temperature optical absorption and photoluminescence analysis performed on nominally identical quantum wells grown on both a thick graded virtual substrate and the selected thin buffer demonstrates a comparable optical quality, confirming the effectiveness of the proposed approach

  6. Silicon based cryogenic platform for the integration of qubit and classical control chips

    Science.gov (United States)

    Leonhardt, T.; Hollmann, A.; Jirovec, D.; Neumann, R.; Klemt, B.; Kindel, S.; Kucharski, M.; Fischer, G.; Bougeard, D.; Bluhm, H.; Schreiber, L. R.

    Electrostatically confined electron-spin-qubits proved viable for quantum information processing. Yet their up-scaling not only demands improvement of physical qubits, but also the development and cryogenic integration of classical control hardware. Therefore, we created a platform to integrate quantum chips and classical electronics. These multilayer interposer chips incorporate passive circuit elements, high bandwidth coplanar wave guides and interconnects for electron spin resonant qubit control as well as low impedance DC microstrips reducing EM-crosstalk from AC to DC lines. We used the interposer for measurements of a Si/SiGe quantum dot at 30 mK. We also characterized a commercial voltage controlled oszillator (VCO) based on hetero-bipolar transistors. Tunable about 30 GHz it is ideal for electron spin resonant qubit control. Cooled from 300 to 4 K it exhibits a slightly increased output power and frequency, while the phase noise level is constant. The device remains functional up to magnetic fields of 6 T.

  7. Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

    Science.gov (United States)

    Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

    2009-10-01

    We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

  8. Monitoring the performance of single and triple junction amorphous silicon modules in two building integrated photovoltaic (BIPV) installations

    International Nuclear Information System (INIS)

    Eke, Rustu; Senturk, Ali

    2013-01-01

    Highlights: • The first and the largest BIPV of Turkey were installed. • Single and triple junction amorphous module performances in BIPV applications are analyzed. • Total generated electricity of the BIPV system is measured as 103,702 kW h for 36 months of operation. • Annual energy rating is calculated as 856 kW h/kWp for a non-optimally oriented plant. • The PR of the system is found 0.74 and 0.81 for PV systems on towers and facade respectively. - Abstract: Mugla is located in south west Turkey at 37°13′N latitude and 28°36′E longitude with yearly sum of horizontal global irradiation exceeding 1700 kW h per square meter. Mugla has a Mediterranean Climate which is characterized by long, hot and dry summers with cool and wet winters. Mugla Sıtkı Kocman University is the largest “PV Park” in Turkey consisting of 100 kWp installed Photovoltaic Power Systems (PVPSs) with different PV applications. The 40 kWp building integrated photovoltaic (BIPV) system which is the first and largest in Turkey was installed on the façade and the two towers of the “Staff Block of the Education Faculty’s Building” of Mugla Sıtkı Kocman University in February 2008. Triple junction amorphous silicon photovoltaic modules are used on the façade and single junction amorphous silicon PV modules are used on the East and West towers of the building. In this paper, the 40 kWp BIPV system in Mugla, Turkey is presented, and its performance is evaluated. Energy rating (kW h/kWp energy yield), efficiencies and performance ratios of both applications are also evaluated for 36 months of operation. Daily, monthly and seasonal variations in performance parameters of the BIPV system in relation to solar data and meteorological parameters and outdoor performance of two reference modules (representing the modules on façade and towers) in a summer and a winter day are also investigated

  9. Mechanical integrity of a carbon nanotube/copper-based through-silicon via for 3D integrated circuits: a multi-scale modeling approach.

    Science.gov (United States)

    Awad, Ibrahim; Ladani, Leila

    2015-12-04

    Carbon nanotube (CNT)/copper (Cu) composite material is proposed to replace Cu-based through-silicon vias (TSVs) in micro-electronic packages. The proposed material is believed to offer extraordinary mechanical and electrical properties and the presence of CNTs in Cu is believed to overcome issues associated with miniaturization of Cu interconnects, such as electromigration. This study introduces a multi-scale modeling of the proposed TSV in order to evaluate its mechanical integrity under mechanical and thermo-mechanical loading conditions. Molecular dynamics (MD) simulation was used to determine CNT/Cu interface adhesion properties. A cohesive zone model (CZM) was found to be most appropriate to model the interface adhesion, and CZM parameters at the nanoscale were determined using MD simulation. CZM parameters were then used in the finite element analysis in order to understand the mechanical and thermo-mechanical behavior of composite TSV at micro-scale. From the results, CNT/Cu separation does not take place prior to plastic deformation of Cu in bending, and separation does not take place when standard thermal cycling is applied. Further investigation is recommended in order to alleviate the increased plastic deformation in Cu at the CNT/Cu interface in both loading conditions.

  10. III-V/Active-Silicon Integration for Low-Cost High-Performance Concentrator Photovoltaics

    Energy Technology Data Exchange (ETDEWEB)

    Ringel, Steven [The Ohio State Univ., Columbus, OH (United States); Carlin, John A [The Ohio State Univ., Columbus, OH (United States); Grassman, Tyler [The Ohio State Univ., Columbus, OH (United States)

    2018-04-17

    This FPACE project was motivated by the need to establish the foundational pathway to achieve concentrator solar cell efficiencies greater than 50%. At such an efficiency, DOE modeling projected that a III-V CPV module cost of $0.50/W or better could be achieved. Therefore, the goal of this project was to investigate, develop and advance a III-V/Si mulitjunction (MJ) CPV technology that can simultaneously address the primary cost barrier for III-V MJ solar cells while enabling nearly ideal MJ bandgap profiles that can yield efficiencies in excess of 50% under concentrated sunlight. The proposed methodology was based on use of our recently developed GaAsP metamorphic graded buffer as a pathway to integrate unique GaAsP and Ga-rich GaInP middle and top junctions having bandgaps that are adjustable between 1.45 – 1.65 eV and 1.9 – 2.1 eV, respectively, with an underlying, 1.1 eV active Si subcell/substrate. With this design, the Si can be an active component sub-cell due to the semi-transparent nature of the GaAsP buffer with respect to Si as well as a low-cost alternative substrate that is amenable to scaling with existing Si foundry infrastructure, providing a reduction in materials cost and a low cost path to manufacturing at scale. By backside bonding of a SiGe, a path to exceed 50% efficiency is possible. Throughout the course of this effort, an expansive range of new understanding was achieved that has stimulated worldwide efforts in III-V/Si PV R&D that spanned materials development, metamorphic device optimization, and complete III-V/Si monolithic integration. Highlights include the demonstration of the first ideal GaP/Si interfaces grown by industry-standard MOCVD processes, the first high performance metamorphic tunnel junctions designed for III-V/Si integration, record performance of specific metamorphic sub-cell designs, the first fully integrated GaInP/GaAsP/Si double (1.7 eV/1.1 eV) and triple (1.95 eV/1.5 eV/1.1 eV) junction solar cells, the first

  11. Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

    Science.gov (United States)

    Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

    2017-01-01

    This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

  12. Investigation of properties of novel silicon pixel assemblies employing thin n-in-p sensors and 3D-integration

    International Nuclear Information System (INIS)

    Weigell, Philipp

    2013-01-01

    Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300 fb -1 , the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running - especially if the luminosity is raised to about 5 x 10 35 cm -2 s -1 as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost effective pixel assemblies with a minimal material budget, a larger active area fraction as compared to the current detectors, and a higher granularity. Furthermore, the assemblies must be able to withstand received fluences up to 2 . 10 16 n eq /cm 2 . A new pixel assembly concept answering the challenges posed by the high instantaneous luminosities is investigated in this thesis. It employs five novel technologies, namely n-in-p pixel sensors, thin pixel sensors, slim edges with or without implanted sensor sides, and 3D-integration incorporating a new interconnection technology, named Solid Liquid InterDiffusion (SLID) as well as Inter-Chip-Vias (ICVs). n-in-p sensors are cost-effective, since they only need patterned processing on one side. Their performance before and after irradiation is investigated and compared to results obtained with currently used n-in-n sensors. Reducing the thickness of the sensors lowers the amount of multiple scattering within the tracking system and leads

  13. Investigation of properties of novel silicon pixel assemblies employing thin n-in-p sensors and 3D-integration

    Energy Technology Data Exchange (ETDEWEB)

    Weigell, Philipp

    2013-01-15

    Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300 fb{sup -1}, the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running - especially if the luminosity is raised to about 5 x 10{sup 35} cm{sup -2}s{sup -1} as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost effective pixel assemblies with a minimal material budget, a larger active area fraction as compared to the current detectors, and a higher granularity. Furthermore, the assemblies must be able to withstand received fluences up to 2 . 10{sup 16} n{sub eq}/cm{sup 2}. A new pixel assembly concept answering the challenges posed by the high instantaneous luminosities is investigated in this thesis. It employs five novel technologies, namely n-in-p pixel sensors, thin pixel sensors, slim edges with or without implanted sensor sides, and 3D-integration incorporating a new interconnection technology, named Solid Liquid InterDiffusion (SLID) as well as Inter-Chip-Vias (ICVs). n-in-p sensors are cost-effective, since they only need patterned processing on one side. Their performance before and after irradiation is investigated and compared to results obtained with currently used n-in-n sensors. Reducing the thickness of the sensors lowers the amount of multiple scattering

  14. Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

    Science.gov (United States)

    Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

    2017-12-01

    In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

  15. Silicone metalization

    Energy Technology Data Exchange (ETDEWEB)

    Maghribi, Mariam N. (Livermore, CA); Krulevitch, Peter (Pleasanton, CA); Hamilton, Julie (Tracy, CA)

    2008-12-09

    A system for providing metal features on silicone comprising providing a silicone layer on a matrix and providing a metal layer on the silicone layer. An electronic apparatus can be produced by the system. The electronic apparatus comprises a silicone body and metal features on the silicone body that provide an electronic device.

  16. Performance prediction for silicon photonics integrated circuits with layout-dependent correlated manufacturing variability.

    Science.gov (United States)

    Lu, Zeqin; Jhoja, Jaspreet; Klein, Jackson; Wang, Xu; Liu, Amy; Flueckiger, Jonas; Pond, James; Chrostowski, Lukas

    2017-05-01

    This work develops an enhanced Monte Carlo (MC) simulation methodology to predict the impacts of layout-dependent correlated manufacturing variations on the performance of photonics integrated circuits (PICs). First, to enable such performance prediction, we demonstrate a simple method with sub-nanometer accuracy to characterize photonics manufacturing variations, where the width and height for a fabricated waveguide can be extracted from the spectral response of a racetrack resonator. By measuring the spectral responses for a large number of identical resonators spread over a wafer, statistical results for the variations of waveguide width and height can be obtained. Second, we develop models for the layout-dependent enhanced MC simulation. Our models use netlist extraction to transfer physical layouts into circuit simulators. Spatially correlated physical variations across the PICs are simulated on a discrete grid and are mapped to each circuit component, so that the performance for each component can be updated according to its obtained variations, and therefore, circuit simulations take the correlated variations between components into account. The simulation flow and theoretical models for our layout-dependent enhanced MC simulation are detailed in this paper. As examples, several ring-resonator filter circuits are studied using the developed enhanced MC simulation, and statistical results from the simulations can predict both common-mode and differential-mode variations of the circuit performance.

  17. Optical Characterization of Tissue Phantoms Using a Silicon Integrated fdNIRS System on Chip.

    Science.gov (United States)

    Sthalekar, Chirag C; Miao, Yun; Koomson, Valencia Joyner

    2017-04-01

    An interface circuit with signal processing and digitizing circuits for a high frequency, large area avalanche photodiode (APD) has been integrated in a 130 nm BiCMOS chip. The system enables the absolute oximetry of tissue using frequency domain Near Infrared Spectroscopy (fdNIRS). The system measures the light absorbed and scattered by the tissue by measuring the reduction in the amplitude of signal and phase shift introduced between the light source and detector which are placed a finite distance away from each other. The received 80 MHz RF signal is downconverted to a low frequency and amplified using a heterodyning scheme. The front-end transimpedance amplifier has a 3-level programmable gain that increases the dynamic range to 60 dB. The phase difference between an identical reference channel and the optical channel is measured with a 0.5° accuracy. The detectable current range is [Formula: see text] and with a 40 A/W reponsivity using the APD, power levels as low as 500 pW can be detected. Measurements of the absorption and reduced scattering coefficients of solid tissue phantoms using this system are compared with those using a commercial instrument with differences within 30%. Measurement of a milk based liquid tissue phantom show an increase in absorption coefficient with addition of black ink. The miniaturized circuit serves as an efficiently scalable system for multi-site detection for applications in neonatal cerebral oximetry and optical mammography.

  18. Silicon CMOS optical receiver circuits with integrated thin-film compound semiconductor detectors

    Science.gov (United States)

    Brooke, Martin A.; Lee, Myunghee; Jokerst, Nan Marie; Camperi-Ginestet, C.

    1995-04-01

    While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors

  19. Silicon photonic integrated circuit swept-source optical coherence tomography receiver with dual polarization, dual balanced, in-phase and quadrature detection.

    Science.gov (United States)

    Wang, Zhao; Lee, Hsiang-Chieh; Vermeulen, Diedrik; Chen, Long; Nielsen, Torben; Park, Seo Yeon; Ghaemi, Allan; Swanson, Eric; Doerr, Chris; Fujimoto, James

    2015-07-01

    Optical coherence tomography (OCT) is a widely used three-dimensional (3D) optical imaging method with many biomedical and non-medical applications. Miniaturization, cost reduction, and increased functionality of OCT systems will be critical for future emerging clinical applications. We present a silicon photonic integrated circuit swept-source OCT (SS-OCT) coherent receiver with dual polarization, dual balanced, in-phase and quadrature (IQ) detection. We demonstrate multiple functional capabilities of IQ polarization resolved detection including: complex-conjugate suppressed full-range OCT, polarization diversity detection, and polarization-sensitive OCT. To our knowledge, this is the first demonstration of a silicon photonic integrated receiver for OCT. The integrated coherent receiver provides a miniaturized, low-cost solution for SS-OCT, and is also a key step towards a fully integrated high speed SS-OCT system with good performance and multi-functional capabilities. With further performance improvement and cost reduction, photonic integrated technology promises to greatly increase penetration of OCT systems in existing applications and enable new applications.

  20. The significance of strength of silicon carbide for the mechanical integrity of coated fuel particles for HTRs

    International Nuclear Information System (INIS)

    Bongartz, K.; Scheer, A.; Schuster, H.; Taeuber, K.

    1975-01-01

    Silicon carbide (SiC) and pyrocarbon are used as coating material for the HTR fuel particles. The PyC shell having a certain strength acts as a pressure vessel for the fission gases whereas the SiC shell has to retain the solid fission products in the fuel kernel. For measuring the strength of coating material the so-called Brittle Ring Test was developed. Strength and Young's modulus can be measured simultaneously with this method on SiC or PyC rings prepared out of the coating material of real fuel particles. The strength measured on the ring under a certain stress distribution which is characteristic for this method is transformed with the aid of the Weibull formalism for brittle fracture into the equivalent strength of the spherical coating shell on the fuel particle under uniform stress caused by the fission gas pressure. The values measured for the strength of the SiC were high (400-700MN/m 2 ), it could therefore be assumed that a SiC layer might contribute significantly also to the mechanical strength of the fuel coating. This assumption was confirmed by an irradiation test on coated particles with PyC-SiC-PyC coatings. There were several particles with all PyC layers broken during the irradiation, whereas the SiC layers remained intact having to withstand the fission gas pressure alone. This fact can only be explained assuming that the strength of the SiC is within the range of the values measured with the brittle ring test. The result indicates that, in optimising the coating of a fuel particle, the PyC layers of a multilayer coating should be considered alone as prospective layers for the SiC. The SiC shell, besides acting as a fission product barrier, is then also responsible for the mechanical integrity of the particle

  1. Lanthanide-Assisted Deposition of Strongly Electro-optic PZT Thin Films on Silicon: Toward Integrated Active Nanophotonic Devices.

    Science.gov (United States)

    George, J P; Smet, P F; Botterman, J; Bliznuk, V; Woestenborghs, W; Van Thourhout, D; Neyts, K; Beeckman, J

    2015-06-24

    The electro-optical properties of lead zirconate titanate (PZT) thin films depend strongly on the quality and crystallographic orientation of the thin films. We demonstrate a novel method to grow highly textured PZT thin films on silicon using the chemical solution deposition (CSD) process. We report the use of ultrathin (5-15 nm) lanthanide (La, Pr, Nd, Sm) based intermediate layers for obtaining preferentially (100) oriented PZT thin films. X-ray diffraction measurements indicate preferentially oriented intermediate Ln2O2CO3 layers providing an excellent lattice match with the PZT thin films grown on top. The XRD and scanning electron microscopy measurements reveal that the annealed layers are dense, uniform, crack-free and highly oriented (>99.8%) without apparent defects or secondary phases. The EDX and HRTEM characterization confirm that the template layers act as an efficient diffusion barrier and form a sharp interface between the substrate and the PZT. The electrical measurements indicate a dielectric constant of ∼650, low dielectric loss of ∼0.02, coercive field of 70 kV/cm, remnant polarization of 25 μC/cm(2), and large breakdown electric field of 1000 kV/cm. Finally, the effective electro-optic coefficients of the films are estimated with a spectroscopic ellipsometer measurement, considering the electric field induced variations in the phase reflectance ratio. The electro-optic measurements reveal excellent linear effective pockels coefficients of 110 to 240 pm/V, which makes the CSD deposited PZT thin film an ideal candidate for Si-based active integrated nanophotonic devices.

  2. Integration of silicon-based neural probes and micro-drive arrays for chronic recording of large populations of neurons in behaving animals.

    Science.gov (United States)

    Michon, Frédéric; Aarts, Arno; Holzhammer, Tobias; Ruther, Patrick; Borghs, Gustaaf; McNaughton, Bruce; Kloosterman, Fabian

    2016-08-01

    Understanding how neuronal assemblies underlie cognitive function is a fundamental question in system neuroscience. It poses the technical challenge to monitor the activity of populations of neurons, potentially widely separated, in relation to behaviour. In this paper, we present a new system which aims at simultaneously recording from a large population of neurons from multiple separated brain regions in freely behaving animals. The concept of the new device is to combine the benefits of two existing electrophysiological techniques, i.e. the flexibility and modularity of micro-drive arrays and the high sampling ability of electrode-dense silicon probes. Newly engineered long bendable silicon probes were integrated into a micro-drive array. The resulting device can carry up to 16 independently movable silicon probes, each carrying 16 recording sites. Populations of neurons were recorded simultaneously in multiple cortical and/or hippocampal sites in two freely behaving implanted rats. Current approaches to monitor neuronal activity either allow to flexibly record from multiple widely separated brain regions (micro-drive arrays) but with a limited sampling density or to provide denser sampling at the expense of a flexible placement in multiple brain regions (neural probes). By combining these two approaches and their benefits, we present an alternative solution for flexible and simultaneous recordings from widely distributed populations of neurons in freely behaving rats.

  3. Proposal of a broadband, polarization-insensitive and high-efficiency hot-carrier schottky photodetector integrated with a plasmonic silicon ridge waveguide

    International Nuclear Information System (INIS)

    Yang, Liu; Kou, Pengfei; Shen, Jianqi; Lee, El Hang; He, Sailing

    2015-01-01

    We propose a broadband, polarization-insensitive and high-efficiency plasmonic Schottky diode for detection of sub-bandgap photons in the optical communication wavelength range through internal photoemission (IPE). The distinctive features of this design are that it has a gold film covering both the top and the sidewalls of a dielectric silicon ridge waveguide with the Schottky contact formed at the gold–silicon interface and the sidewall coverage of gold can be easily tuned by an insulating layer. An extensive physical model on IPE of hot carriers is presented in detail and is applied to calculate and examine the performance of this detector. In comparison with a diode having only the top gold contact, the polarization sensitivity of the responsivity is greatly minimized in our photodetector with gold film covering both the top and the sidewall. Much higher responsivities for both polarizations are also achieved over a broad wavelength range of 1.2–1.6 μm. Moreover, the Schottky contact is only 4 μm long, leading to a very small dark current. Our design is very promising for practical applications in high-density silicon photonic integration. (paper)

  4. Passive technologies for future large-scale photonic integrated circuits on silicon: polarization handling, light non-reciprocity and loss reduction

    Directory of Open Access Journals (Sweden)

    Daoxin Dai

    2012-03-01

    Full Text Available Silicon-based large-scale photonic integrated circuits are becoming important, due to the need for higher complexity and lower cost for optical transmitters, receivers and optical buffers. In this paper, passive technologies for large-scale photonic integrated circuits are described, including polarization handling, light non-reciprocity and loss reduction. The design rule for polarization beam splitters based on asymmetrical directional couplers is summarized and several novel designs for ultra-short polarization beam splitters are reviewed. A novel concept for realizing a polarization splitter–rotator is presented with a very simple fabrication process. Realization of silicon-based light non-reciprocity devices (e.g., optical isolator, which is very important for transmitters to avoid sensitivity to reflections, is also demonstrated with the help of magneto-optical material by the bonding technology. Low-loss waveguides are another important technology for large-scale photonic integrated circuits. Ultra-low loss optical waveguides are achieved by designing a Si3N4 core with a very high aspect ratio. The loss is reduced further to <0.1 dB m−1 with an improved fabrication process incorporating a high-quality thermal oxide upper cladding by means of wafer bonding. With the developed ultra-low loss Si3N4 optical waveguides, some devices are also demonstrated, including ultra-high-Q ring resonators, low-loss arrayed-waveguide grating (demultiplexers, and high-extinction-ratio polarizers.

  5. Towards Cost-Effective Crystalline Silicon Based Flexible Solar Cells: Integration Strategy by Rational Design of Materials, Process, and Devices

    KAUST Repository

    Bahabry, Rabab R.

    2017-01-01

    . However, silicon is a brittle material with a fracture strains <1%. Highly flexible Si-based solar cells are available in the form thin films which seem to be disadvantageous over thick Si solar cells due to the reduction of the optical absorption

  6. 112 Gbit/s single-polarization silicon coherent receiver with hybrid-integrated BiCMOS linear TIA

    NARCIS (Netherlands)

    Verbist, J.; Zhang, J.; Moeneclaey, B.; van Weerdenburg, J.; van Uden, R.; Okonkwo, C.; Yin, X.; Bauwelinck, J.; Roelkens, G.

    2015-01-01

    We report the design, fabrication and verification of a single-polarization silicon coherent receiver with a low-power linear TIA array. Error-free operation assuming FEC is shown at bitrates of 112 Gbit/s (28 Gbaud 16-QAM) and 56 Gbit/s (28 Gbaud QPSK).

  7. Compact Low-Power-Consumption 28-Gbaud QPSK/16-QAM Integrated Silicon Photonic/Electronic Coherent Receiver

    NARCIS (Netherlands)

    Zhang, J.; Verbist, J.; Moeneclaey, B.; van Weerdenburg, J.; van Uden, R.G.H.; Chen, H.; van Campenhout, J.; Okonkwo, C; Yin, X; Bauwelinck, J.; Roelkens, G.

    2016-01-01

    We demonstrate the codesign and cointegration of an ultracompact silicon photonic receiver and a low-power-consumption (155 mW/channel) two-channel linear transimpedance amplifier array. Operation below the forward error coding (FEC) threshold both for quadrature phase-shift keying (QPSK) and

  8. Periodically poled silicon

    Science.gov (United States)

    Hon, Nick K.; Tsia, Kevin K.; Solli, Daniel R.; Khurgin, Jacob B.; Jalali, Bahram

    2010-02-01

    Bulk centrosymmetric silicon lacks second-order optical nonlinearity χ(2) - a foundational component of nonlinear optics. Here, we propose a new class of photonic device which enables χ(2) as well as quasi-phase matching based on periodic stress fields in silicon - periodically-poled silicon (PePSi). This concept adds the periodic poling capability to silicon photonics, and allows the excellent crystal quality and advanced manufacturing capabilities of silicon to be harnessed for devices based on χ(2)) effects. The concept can also be simply achieved by having periodic arrangement of stressed thin films along a silicon waveguide. As an example of the utility, we present simulations showing that mid-wave infrared radiation can be efficiently generated through difference frequency generation from near-infrared with a conversion efficiency of 50% based on χ(2) values measurements for strained silicon reported in the literature [Jacobson et al. Nature 441, 199 (2006)]. The use of PePSi for frequency conversion can also be extended to terahertz generation. With integrated piezoelectric material, dynamically control of χ(2)nonlinearity in PePSi waveguide may also be achieved. The successful realization of PePSi based devices depends on the strength of the stress induced χ(2) in silicon. Presently, there exists a significant discrepancy in the literature between the theoretical and experimentally measured values. We present a simple theoretical model that produces result consistent with prior theoretical works and use this model to identify possible reasons for this discrepancy.

  9. Polar and Nonpolar Gallium Nitride and Zinc Oxide based thin film heterostructures Integrated with Sapphire and Silicon

    Science.gov (United States)

    Gupta, Pranav

    This dissertation work explores the understanding of the relaxation and integration of polar and non-polar of GaN and ZnO thin films with Sapphire and silicon substrates. Strain management and epitaxial analysis has been performed on wurtzitic GaN(0001) thin films grown on c-Sapphire and wurtzitic non-polar a-plane GaN(11-20) thin films grown on r-plane Sapphire (10-12) by remote plasma atomic nitrogen source assisted UHV Pulsed Laser Deposition process. It has been established that high-quality 2-dimensional c-axis GaN(0001) nucleation layers can be grown on c-Sapphire by PLD process at growth temperatures as low as ˜650°C. Whereas the c-axis GaN on c-sapphire has biaxially negative misfit, the crystalline anisotropy of the a-plane GaN films on r-Sapphire results in compressive and tensile misfits in the two major orthogonal directions. The measured strains have been analyzed in detail by X-ray, Raman spectroscopy and TEM. Strain relaxation in GaN(0001)/Sapphire thin film heterostructure has been explained by the principle of domain matched epitaxial growth in large planar misfit system and has been demonstrated by TEM study. An attempt has been made to qualitatively understand the minimization of free energy of the system from the strain perspective. Analysis has been presented to quantify the strain components responsible for the compressive strain observed in the GaN(0001) thin films on c-axis Sapphire substrates. It was also observed that gallium rich deposition conditions in PLD process lead to smoother nucleation layers because of higher ad-atom mobility of gallium. We demonstrate near strain relaxed epitaxial (0001) GaN thin films grown on (111) Si substrates using TiN as intermediate buffer layer by remote nitrogen plasma assisted UHV pulsed laser deposition (PLD). Because of large misfits between the TiN/GaN and TiN/Si systems the TIN buffer layer growth occurs via nucleation of interfacial dislocations under domain matching epitaxy paradigm. X-ray and

  10. Subwavelength silicon photonics

    International Nuclear Information System (INIS)

    Cheben, P.; Bock, P.J.; Schmid, J.H.; Lapointe, J.; Janz, S.; Xu, D.-X.; Densmore, A.; Delage, A.; Lamontagne, B.; Florjanczyk, M.; Ma, R.

    2011-01-01

    With the goal of developing photonic components that are compatible with silicon microelectronic integrated circuits, silicon photonics has been the subject of intense research activity. Silicon is an excellent material for confining and manipulating light at the submicrometer scale. Silicon optoelectronic integrated devices have the potential to be miniaturized and mass-produced at affordable cost for many applications, including telecommunications, optical interconnects, medical screening, and biological and chemical sensing. We review recent advances in silicon photonics research at the National Research Council Canada. A new type of optical waveguide is presented, exploiting subwavelength grating (SWG) effect. We demonstrate subwavelength grating waveguides made of silicon, including practical components operating at telecom wavelengths: input couplers, waveguide crossings and spectrometer chips. SWG technique avoids loss and wavelength resonances due to diffraction effects and allows for single-mode operation with direct control of the mode confinement by changing the refractive index of a waveguide core over a range as broad as 1.6 - 3.5 simply by lithographic patterning. The light can be launched to these waveguides with a coupling loss as small as 0.5 dB and with minimal wavelength dependence, using coupling structures similar to that shown in Fig. 1. The subwavelength grating waveguides can cross each other with minimal loss and negligible crosstalk which allows massive photonic circuit connectivity to overcome the limits of electrical interconnects. These results suggest that the SWG waveguides could become key elements for future integrated photonic circuits. (authors)

  11. Characterization of 13 and 30 mum thick hydrogenated amorphous silicon diodes deposited over CMOS integrated circuits for particle detection application

    CERN Document Server

    Despeisse, M; Commichau, S C; Dissertori, G; Garrigos, A; Jarron, P; Miazza, C; Moraes, D; Shah, A; Wyrsch, N; Viertel, Gert M; 10.1016/j.nima.2003.11.022

    2004-01-01

    We present the experimental results obtained with a novel monolithic silicon pixel detector which consists in depositing a n-i-p hydrogenated amorphous silicon (a-Si:H) diode straight above the readout ASIC (this technology is called Thin Film on ASIC, TFA). The characterization has been performed on 13 and 30mum thick a-Si:H films deposited on top of an ASIC containing a linear array of high- speed low-noise transimpedance amplifiers designed in a 0.25mum CMOS technology. Experimental results presented have been obtained with a 600nm pulsed laser. The results of charge collection efficiency and charge collection speed of these structures are discussed.

  12. UV lithography-based protein patterning on silicon: Towards the integration of bioactive surfaces and CMOS electronics

    Energy Technology Data Exchange (ETDEWEB)

    Lenci, S., E-mail: silvia.lenci@iet.unipi.it [Dipartimento di Ingegneria dell' Informazione, via G.Caruso 16, Pisa I-56122 (Italy); Tedeschi, L. [Istituto di Fisiologia Clinica - CNR, via G. Moruzzi 1, Pisa I-56124 (Italy); Pieri, F. [Dipartimento di Ingegneria dell' Informazione, via G.Caruso 16, Pisa I-56122 (Italy); Domenici, C. [Istituto di Fisiologia Clinica - CNR, via G. Moruzzi 1, Pisa I-56124 (Italy)

    2011-08-01

    A simple and fast methodology for protein patterning on silicon substrates is presented, providing an insight into possible issues related to the interaction between biological and microelectronic technologies. The method makes use of standard photoresist lithography and is oriented towards the implementation of biosensors containing Complementary Metal-Oxide-Semiconductor (CMOS) conditioning circuitry. Silicon surfaces with photoresist patterns were prepared and hydroxylated by means of resist- and CMOS backend-compatible solutions. Subsequent aminosilane deposition and resist lift-off in organic solvents resulted into well-controlled amino-terminated geometries. The discussion is focused on resist- and CMOS-compatibility problems related to the used chemicals. Some samples underwent gold nanoparticle (Au NP) labeling and Scanning Electron Microscopy (SEM) observation, in order to investigate the quality of the silane layer. Antibodies were immobilized on other samples, which were subsequently exposed to a fluorescently labeled antigen. Fluorescence microscopy observation showed that this method provides spatially selective immobilization of protein layers onto APTES-patterned silicon samples, while preserving protein reactivity inside the desired areas and low non-specific adsorption elsewhere. Strong covalent biomolecule binding was achieved, giving stable protein layers, which allows stringent binding conditions and a good binding specificity, really useful for biosensing.

  13. Silicon detectors

    International Nuclear Information System (INIS)

    Klanner, R.

    1984-08-01

    The status and recent progress of silicon detectors for high energy physics is reviewed. Emphasis is put on detectors with high spatial resolution and the use of silicon detectors in calorimeters. (orig.)

  14. Amorphous silicon based particle detectors

    OpenAIRE

    Wyrsch, N.; Franco, A.; Riesen, Y.; Despeisse, M.; Dunand, S.; Powolny, F.; Jarron, P.; Ballif, C.

    2012-01-01

    Radiation hard monolithic particle sensors can be fabricated by a vertical integration of amorphous silicon particle sensors on top of CMOS readout chip. Two types of such particle sensors are presented here using either thick diodes or microchannel plates. The first type based on amorphous silicon diodes exhibits high spatial resolution due to the short lateral carrier collection. Combination of an amorphous silicon thick diode with microstrip detector geometries permits to achieve micromete...

  15. Transformational silicon electronics

    KAUST Repository

    Rojas, Jhonathan Prieto

    2014-02-25

    In today\\'s traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 μm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industry\\'s most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications. © 2014 American Chemical Society.

  16. Advances in silicon nanophotonics

    DEFF Research Database (Denmark)

    Hvam, Jørn Märcher; Pu, Minhao

    Silicon has long been established as an ideal material for passive integrated optical circuitry due to its high refractive index, with corresponding strong optical confinement ability, and its low-cost CMOS-compatible manufacturability. However, the inversion symmetry of the silicon crystal lattice.......g. in high-bit-rate optical communication circuits and networks, it is vital that the nonlinear optical effects of silicon are being strongly enhanced. This can among others be achieved in photonic-crystal slow-light waveguides and in nano-engineered photonic-wires (Fig. 1). In this talk I shall present some...... recent advances in this direction. The efficient coupling of light between optical fibers and the planar silicon devices and circuits is of crucial importance. Both end-coupling (Fig. 1) and grating-coupling solutions will be discussed along with polarization issues. A new scheme for a hybrid III...

  17. Analysis and Design of Manycore Processor-to-DRAM Opto-Electrical Networks with Integrated Silicon Photonics

    Science.gov (United States)

    2009-12-24

    4th edition, 2007. •A\\ [13] A Joshi, C Batten, Y Kwon, S Beamer, Imran Shamim , Krste Asanovic, and Vladimir Sto- janovic. Silicon-photonic clos...W911NF-08-l-0134andW911NF-08-l-0139 6. AUTHOR( S ) Vladimir Stojanovic and Krste Asanovic 7. PERFORMING ORGANIZATION NAME( S ) AND ADDRESSES) MIT, 77...MONITORING AGENCY NAME( S ) AND ADDRESS(ES) U. S . Army Research Office P.O. Box 12211 Research Triangle Park, NC 27709-2211 10. SPONSORTNG/ MONITORING

  18. Luneburg lens in silicon photonics.

    Science.gov (United States)

    Di Falco, Andrea; Kehr, Susanne C; Leonhardt, Ulf

    2011-03-14

    The Luneburg lens is an aberration-free lens that focuses light from all directions equally well. We fabricated and tested a Luneburg lens in silicon photonics. Such fully-integrated lenses may become the building blocks of compact Fourier optics on chips. Furthermore, our fabrication technique is sufficiently versatile for making perfect imaging devices on silicon platforms.

  19. Fluorescence and thermoluminescence in silicon oxide films rich in silicon

    International Nuclear Information System (INIS)

    Berman M, D.; Piters, T. M.; Aceves M, M.; Berriel V, L. R.; Luna L, J. A.

    2009-10-01

    In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 Ω-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N 2 at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

  20. Laboratory course on silicon sensors

    CERN Document Server

    Crescio, E; Roe, S; Rudge, A

    2003-01-01

    The laboratory course consisted of four different mini sessions, in order to give the student some hands-on experience on various aspects of silicon sensors and related integrated electronics. The four experiments were. 1. Characterisation of silicon diodes for particle detection 2. Study of noise performance of the Viking readout circuit 3. Study of the position resolution of a silicon microstrip sensor 4. Study of charge transport in silicon with a fast amplifier The data in the following were obtained during the ICFA school by the students.

  1. Determination of the quasi-TE mode (in-plane) graphene linear absorption coefficient via integration with silicon-on-insulator racetrack cavity resonators.

    Science.gov (United States)

    Crowe, Iain F; Clark, Nicholas; Hussein, Siham; Towlson, Brian; Whittaker, Eric; Milosevic, Milan M; Gardes, Frederic Y; Mashanovich, Goran Z; Halsall, Matthew P; Vijayaraghaven, Aravind

    2014-07-28

    We examine the near-IR light-matter interaction for graphene integrated cavity ring resonators based on silicon-on-insulator (SOI) race-track waveguides. Fitting of the cavity resonances from quasi-TE mode transmission spectra reveal the real part of the effective refractive index for graphene, n(eff) = 2.23 ± 0.02 and linear absorption coefficient, α(gTE) = 0.11 ± 0.01dBμm(-1). The evanescent nature of the guided mode coupling to graphene at resonance depends strongly on the height of the graphene above the cavity, which places limits on the cavity length for optical sensing applications.

  2. An integrated optic ethanol vapor sensor based on a silicon-on-insulator microring resonator coated with a porous ZnO film.

    Science.gov (United States)

    Yebo, Nebiyu A; Lommens, Petra; Hens, Zeger; Baets, Roel

    2010-05-24

    Optical structures fabricated on silicon-on-insulator technology provide a convenient platform for the implementation of highly compact, versatile and low cost devices. In this work, we demonstrate the promise of this technology for integrated low power and low cost optical gas sensing. A room temperature ethanol vapor sensor is demonstrated using a ZnO nanoparticle film as a coating on an SOI micro-ring resonator of 5 microm in radius. The local coating on the ring resonators is prepared from colloidal suspensions of ZnO nanoparticles of around 3 nm diameter. The porous nature of the coating provides a large surface area for gas adsorption. The ZnO refractive index change upon vapor adsorption shifts the microring resonance through evanescent field interaction. Ethanol vapor concentrations down to 100 ppm are detected with this sensing configuration and a detection limit below 25 ppm is estimated.

  3. Silicon microphotonic waveguides

    International Nuclear Information System (INIS)

    Ta'eed, V.; Steel, M.J.; Grillet, C.; Eggleton, B.; Du, J.; Glasscock, J.; Savvides, N.

    2004-01-01

    Full text: Silicon microphotonic devices have been drawing increasing attention in the past few years. The high index-difference between silicon and its oxide (Δn = 2) suggests a potential for high-density integration of optical functions on to a photonic chip. Additionally, it has been shown that silicon exhibits strong Raman nonlinearity, a necessary property as light interaction can occur only by means of nonlinearities in the propagation medium. The small dimensions of silicon waveguides require the design of efficient tapers to couple light to them. We have used the beam propagation method (RSoft BeamPROP) to understand the principles and design of an inverse-taper mode-converter as implemented in several recent papers. We report on progress in the design and fabrication of silicon-based waveguides. Preliminary work has been conducted by patterning silicon-on-insulator (SOI) wafers using optical lithography and reactive ion etching. Thus far, only rib waveguides have been designed, as single-mode ridge-waveguides are beyond the capabilities of conventional optical lithography. We have recently moved to electron beam lithography as the higher resolutions permitted will provide the flexibility to begin fabricating sub-micron waveguides

  4. Transformational silicon electronics

    KAUST Repository

    Rojas, Jhonathan Prieto; Sevilla, Galo T.; Ghoneim, Mohamed T.; Inayat, Salman Bin; Ahmed, Sally; Hussain, Aftab M.; Hussain, Muhammad Mustafa

    2014-01-01

    In today's traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100

  5. Silicon oxynitride based photonics

    NARCIS (Netherlands)

    Worhoff, Kerstin; Klein, E.J.; Hussein, M.G.; Driessen, A.; Marciniak, M.; Jaworski, M.; Zdanowicz, M.

    2008-01-01

    Silicon oxynitride is a very attractive material for integrated optics. Besides possessing excellent optical properties it can be deposited with refractive indices varying over a wide range by tuning the material composition. In this contribution we will summarize the key properties of this material

  6. Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

    Science.gov (United States)

    Pradeepkumar, Aiswarya; Zielinski, Marcin; Bosi, Matteo; Verzellesi, Giovanni; Gaskill, D. Kurt; Iacopi, Francesca

    2018-06-01

    Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.

  7. Label-Free Virus Capture and Release by a Microfluidic Device Integrated with Porous Silicon Nanowire Forest.

    Science.gov (United States)

    Xia, Yiqiu; Tang, Yi; Yu, Xu; Wan, Yuan; Chen, Yizhu; Lu, Huaguang; Zheng, Si-Yang

    2017-02-01

    Viral diseases are perpetual threats to human and animal health. Detection and characterization of viral pathogens require accurate, sensitive, and rapid diagnostic assays. For field and clinical samples, the sample preparation procedures limit the ultimate performance and utility of the overall virus diagnostic protocols. This study presents the development of a microfluidic device embedded with porous silicon nanowire (pSiNW) forest for label-free size-based point-of-care virus capture in a continuous curved flow design. The pSiNW forests with specific interwire spacing are synthesized in situ on both bottom and sidewalls of the microchannels in a batch process. With the enhancement effect of Dean flow, this study demonstrates that about 50% H5N2 avian influenza viruses are physically trapped without device clogging. A unique feature of the device is that captured viruses can be released by inducing self-degradation of the pSiNWs in physiological aqueous environment. About 60% of captured viruses can be released within 24 h for virus culture, subsequent molecular diagnosis, and other virus characterization and analyses. This device performs viable, unbiased, and label-free virus isolation and release. It has great potentials for virus discovery, virus isolation and culture, functional studies of virus pathogenicity, transmission, drug screening, and vaccine development. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  8. On-chip hybrid photonic-plasmonic light concentrator for nanofocusing in an integrated silicon photonics platform.

    Science.gov (United States)

    Luo, Ye; Chamanzar, Maysamreza; Apuzzo, Aniello; Salas-Montiel, Rafael; Nguyen, Kim Ngoc; Blaize, Sylvain; Adibi, Ali

    2015-02-11

    The enhancement and confinement of electromagnetic radiation to nanometer scale have improved the performances and decreased the dimensions of optical sources and detectors for several applications including spectroscopy, medical applications, and quantum information. Realization of on-chip nanofocusing devices compatible with silicon photonics platform adds a key functionality and provides opportunities for sensing, trapping, on-chip signal processing, and communications. Here, we discuss the design, fabrication, and experimental demonstration of light nanofocusing in a hybrid plasmonic-photonic nanotaper structure. We discuss the physical mechanisms behind the operation of this device, the coupling mechanisms, and how to engineer the energy transfer from a propagating guided mode to a trapped plasmonic mode at the apex of the plasmonic nanotaper with minimal radiation loss. Optical near-field measurements and Fourier modal analysis carried out using a near-field scanning optical microscope (NSOM) show a tight nanofocusing of light in this structure to an extremely small spot of 0.00563(λ/(2n(rmax)))(3) confined in 3D and an exquisite power input conversion of 92%. Our experiments also verify the mode selectivity of the device (low transmission of a TM-like input mode and high transmission of a TE-like input mode). A large field concentration factor (FCF) of about 4.9 is estimated from our NSOM measurement with a radius of curvature of about 20 nm at the apex of the nanotaper. The agreement between our theory and experimental results reveals helpful insights about the operation mechanism of the device, the interplay of the modes, and the gradual power transfer to the nanotaper apex.

  9. Enhancement of the optical Kerr effect exhibited by an integrated configuration of silicon quantum dots and silver nanoparticles

    International Nuclear Information System (INIS)

    Lopez-Suarez, A; Benami, A; Tamayo-Rivera L; Reyes-Esqueda, J A; Cheang-Wong, J C; Rodriguez-Fernandez, L; Crespo-Sosa, A; Oliver, A; R Rangel-Rojo; Torres-Torres, C

    2011-01-01

    We present nonlinear refractive results for three different systems produced by ion implantation: high purity silica substrates with silicon quantum dots (Si-QDs), silver nanoparticles (Ag-NPs), and one sample containing both. We used a femtosecond optical Kerr gate (OKG) with 80 fs pulses at 830 nm to investigate the magnitude and response time of their nonlinear response. The Ag-NPs samples were prepared implanting 2 MeV Ag 2+ ions at different fluencies. A sample with 1x10 17 ions/cm 2 showed no discernible Kerr signal, while for one with 2.4x10 17 ions/cm 2 we measured |χ (3) | 1111 = 5.1x10 -11 esu. The Si-QDs sample required irradiation with 1.5 MeV Si 2+ ions, at a 2.5x10 17 ions/cm 2 fluence in order that the OKG results for this sample yielded a similar |χ (3) | 1111 value. The sample containing the Si-QDs was then irradiated by 1 MeV Ag2+ ions at a 4.44 x 10 16 ions/cm 2 fluence and thermally treated, for which afterward we measured |χ (3) | 1111 1.7x10 -10 esu. In all cases the response time was quasi-instantaneous. These results imply that the inclusion of Ag-NPs at low fluence, enhances the nonlinearity of the composite by a factor of around three, and that this is purely electronic in nature. Pump-probe results show that there is not any nonlinear absorption present. We estimate that the confinement effect of the Si-QDs in the sample plays an important role for the excitation of the Surface Plasmon Resonance (SPR) related to the Ag-NPs. A theoretical model that describes the modification of the third order nonlinearity is also presented.

  10. Neuromorphic Silicon Neuron Circuits

    Science.gov (United States)

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  11. Neuromorphic silicon neuron circuits

    Directory of Open Access Journals (Sweden)

    Giacomo eIndiveri

    2011-05-01

    Full Text Available Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance based Hodgkin-Huxley models to bi-dimensional generalized adaptive Integrate and Fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.

  12. Enhancement of the optical Kerr effect exhibited by an integrated configuration of silicon quantum dots and silver nanoparticles

    Energy Technology Data Exchange (ETDEWEB)

    Lopez-Suarez, A; Benami, A; Tamayo-Rivera L; Reyes-Esqueda, J A; Cheang-Wong, J C; Rodriguez-Fernandez, L; Crespo-Sosa, A; Oliver, A [Instituto de Fisica, Universidad Nacional Autonoma de Mexico, D. F. 04510 (Mexico); R Rangel-Rojo [Departamento de Optica, Centro de Investigacion CientIfica y de Educacion Superior de Ensenada, Apartado Postal 2732, Ensenada, BC 22860 (Mexico); Torres-Torres, C, E-mail: rrangel@cicese.mx [Seccion de Estudios de Posgrado e Investigacion, ESIME-Z, Instituto Politecnico Nacional, D.F. 07738 (Mexico)

    2011-01-01

    We present nonlinear refractive results for three different systems produced by ion implantation: high purity silica substrates with silicon quantum dots (Si-QDs), silver nanoparticles (Ag-NPs), and one sample containing both. We used a femtosecond optical Kerr gate (OKG) with 80 fs pulses at 830 nm to investigate the magnitude and response time of their nonlinear response. The Ag-NPs samples were prepared implanting 2 MeV Ag{sup 2+} ions at different fluencies. A sample with 1x10{sup 17} ions/cm{sup 2} showed no discernible Kerr signal, while for one with 2.4x10{sup 17} ions/cm{sup 2} we measured |{chi}{sup (3)}|{sub 1111} = 5.1x10{sup -11} esu. The Si-QDs sample required irradiation with 1.5 MeV Si{sup 2+} ions, at a 2.5x10{sup 17} ions/cm{sup 2} fluence in order that the OKG results for this sample yielded a similar |{chi}{sup (3)}|{sub 1111} value. The sample containing the Si-QDs was then irradiated by 1 MeV Ag2+ ions at a 4.44 x 10{sup 16} ions/cm{sup 2} fluence and thermally treated, for which afterward we measured |{chi}{sup (3)}|{sub 1111} 1.7x10{sup -10} esu. In all cases the response time was quasi-instantaneous. These results imply that the inclusion of Ag-NPs at low fluence, enhances the nonlinearity of the composite by a factor of around three, and that this is purely electronic in nature. Pump-probe results show that there is not any nonlinear absorption present. We estimate that the confinement effect of the Si-QDs in the sample plays an important role for the excitation of the Surface Plasmon Resonance (SPR) related to the Ag-NPs. A theoretical model that describes the modification of the third order nonlinearity is also presented.

  13. Collective optical Kerr effect exhibited by an integrated configuration of silicon quantum dots and gold nanoparticles embedded in ion-implanted silica

    International Nuclear Information System (INIS)

    Torres-Torres, C; López-Suárez, A; Oliver, A; Can-Uc, B; Rangel-Rojo, R; Tamayo-Rivera, L

    2015-01-01

    The study of the third-order optical nonlinear response exhibited by a composite containing gold nanoparticles and silicon quantum dots nucleated by ion implantation in a high-purity silica matrix is presented. The nanocomposites were explored as an integrated configuration containing two different ion-implanted distributions. The time-resolved optical Kerr gate and z-scan techniques were conducted using 80 fs pulses at a 825 nm wavelength; while the nanosecond response was investigated by a vectorial two-wave mixing method at 532 nm with 1 ns pulses. An ultrafast purely electronic nonlinearity was associated to the optical Kerr effect for the femtosecond experiments, while a thermal effect was identified as the main mechanism responsible for the nonlinear optical refraction induced by nanosecond pulses. Comparative experimental tests for examining the contribution of the Au and Si distributions to the total third-order optical response were carried out. We consider that the additional defects generated by consecutive ion irradiations in the preparation of ion-implanted samples do not notably modify the off-resonance electronic optical nonlinearities; but they do result in an important change for near-resonant nanosecond third-order optical phenomena exhibited by the closely spaced nanoparticle distributions. (paper)

  14. Design and implementation of an integrated architecture for massive parallel data treatment of analogue signals supplied by silicon detectors of very high spatial resolution

    International Nuclear Information System (INIS)

    Michel, J.

    1993-02-01

    This doctorate thesis studies an integrated architecture designed to a parallel massive treatment of analogue signals supplied by silicon detectors of very high spatial resolution. The first chapter is an introduction presenting the general outline and the triggering conditions of the spectrometer. Chapter two describes the operational structure of a microvertex detector made of Si micro-plates associated to the measuring chains. Information preconditioning is related to the pre-amplification stage, to the pile-up effects and to the reduction in the time characteristic due to the high counting rates. The chapter three describes the architecture of the analogue delay buffer, makes an analysis of the intrinsic noise and presents the operational testings and input/output control operations. The fourth chapter is devoted to the description of the analogue pulse shape processor and gives also the testings and the corresponding measurements on the circuit. Finally, the chapter five deals with the simplest modeling of the entire conditioning chain. Also, the testings and measuring procedures are here discussed. In conclusion the author presents some prospects for improving the signal-to-noise ratio by summation of the de-convoluted micro-paths. 78 refs., 78 figs., 1 annexe

  15. Vertically aligned CNT growth on a microfabricated silicon heater with integrated temperature control—determination of the activation energy from a continuous thermal gradient

    DEFF Research Database (Denmark)

    Engstrøm, Daniel Southcott; Rupesinghe, Nalin L; Teo, Kenneth B K

    2011-01-01

    Silicon microheaters for local growth of a vertically aligned carbon nanotube (VACNT) were fabricated. The microheaters had a four-point-probe structure that measured the silicon conductivity variations in the heated region which is a measure of the temperature. Through FEM simulations the temper...

  16. Flexible Thermoelectric Generators on Silicon Fabric

    KAUST Repository

    Sevilla, Galo T.

    2012-11-01

    In this work, the development of a Thermoelectric Generator on Flexible Silicon Fabric is explored to extend silicon electronics for flexible platforms. Low cost, easily deployable plastic based flexible electronics are of great interest for smart textile, wearable electronics and many other exciting applications. However, low thermal budget processing and fundamentally limited electron mobility hinders its potential to be competitive with well established and highly developed silicon technology. The use of silicon in flexible electronics involve expensive and abrasive materials and processes. In this work, high performance flexible thermoelectric energy harvesters are demonstrated from low cost bulk silicon (100) wafers. The fabrication of the micro- harvesters was done using existing silicon processes on silicon (100) and then peeled them off from the original substrate leaving it for reuse. Peeled off silicon has 3.6% thickness of bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. The demonstrated generic batch processing shows a pragmatic way of peeling off a whole silicon circuitry after conventional fabrication on bulk silicon wafers for extremely deformable high performance integrated electronics. In summary, by using a novel, low cost process, this work has successfully integrated existing and highly developed fabrication techniques to introduce a flexible energy harvester for sustainable applications.

  17. High-End Silicon PDICs

    Directory of Open Access Journals (Sweden)

    H. Zimmermann

    2008-05-01

    Full Text Available An overview on integrated silicon photodiodes and photodiode integrated circuits (PDICs or optoelectronic integrated circuits (OEICs for optical storage systems (OSS and fiber receivers is given. It is demonstrated, that by using low-cost silicon technologies high-performance OEICs being true competitors for some III/V-semiconductor OEICs can be realized. OSS-OEICs with bandwidths of up to 380 MHz and fiber receivers with maximum data rates of up to 11 Gbps are described. Low-cost data comm receivers for plastic optical fibers (POF as well as new circuit concepts for OEICs and highly parallel optical receivers are described also in the following.

  18. Process and device integration for silicon tunnel FETs utilizing isoelectronic trap technology to enhance the ON current

    Science.gov (United States)

    Mori, Takahiro; Asai, Hidehiro; Fukuda, Koichi; Matsukawa, Takashi

    2018-04-01

    A tunnel FET (TFET) is a candidate replacement for conventional MOSFETs to realize low-power LSI. The most significant issue with the practical application of TFETs concerns their low tunneling current. Si is an indirect-gap material with a low band-to-band tunneling probability and is not favored for the channel. However, a new technology has recently been proposed to enhance the tunneling current in Si-TFETs by utilizing isoelectronic trap (IET) technology. IET technology provides an innovative approach to realizing low-power LSI with TFETs. In this paper, state-of-the-art research on Si-TFETs with IET technology from the viewpoint of process and device integration is reviewed.

  19. The CMS silicon tracker

    International Nuclear Information System (INIS)

    D'Alessandro, R.; Biggeri, U.; Bruzzi, M.; Catacchini, E.; Civinini, C.; Focardi, E.; Lenzi, M.; Loreti, M.; Meschini, M.; Parrini, G.; Pieri, M.; Albergo, S.; Boemi, D.; Potenza, R.; Tricomi, A.; Angarano, M.; Creanza, D.; Palma, M. de; Fiore, L.; Maggi, G.; My, S.; Raso, G.; Selvaggi, G.; Tempesta, P.; Azzi, P.; Bacchetta, N.; Bisello, D.; Candelori, A.; Castro, A.; Da Rold, M.; Giraldo, A.; Martignon, G.; Paccagnella, A.; Stavitsky, I.; Babucci, E.; Bartalini, P.; Bilei, G.M.; Checcucci, B.; Ciampolini, P.; Lariccia, P.; Mantovani, G.; Passeri, D.; Santocchia, A.; Servoli, L.; Wang, Y.; Bagliesi, G.; Basti, A.; Bosi, F.; Borello, L.; Bozzi, C.; Castaldi, R.; Dell'Orso, R.; Giassi, A.; Messineo, A.; Palla, F.; Raffaelli, F.; Sguazzoni, G.; Starodumov, A.; Tonelli, G.; Vannini, C.; Verdini, P.G.; Xie, Z.; Breuker, H.; Caner, A.; Elliott-Peisert, A.; Feld, L.; Glessing, B.; Hammerstrom, R.; Huhtinen, M.; Mannelli, M.; Marchioro, A.; Schmitt, B.; Stefanini, G.; Connotte, J.; Gu, W.H.; Luebelsmeyer, K.; Pandoulas, D.; Siedling, R.; Wittmer, B.; Della Marina, R.; Freudenreich, K.; Lustermann, W.; Viertel, G.; Eklund, C.; Karimaeki, V.; Skog, K.; French, M.; Hall, G.; Mc Evoy, B.; Raymond, M.; Hrubec, J.; Krammer, M.; Piperov, S.; Tuuva, T.; Watts, S.; Silvestris, L.

    1998-01-01

    The new silicon tracker layout (V4) is presented. The system aspects of the construction are discussed together with the expected tracking performance. Because of the high radiation environment in which the detectors will operate, particular care has been devoted to the study of the characteristics of heavily irradiated detectors. This includes studies on performance (charge collection, cluster size, resolution, efficiency) as a function of the bias voltage, integrated fluence, incidence angle and temperature. (author)

  20. A thermal-driven silicon micro xy-stage integrated with piezoresistive sensors for nano-positioning

    International Nuclear Information System (INIS)

    Choi, Young-Soo; Zhang, Yan; Lee, Dong-Weon

    2012-01-01

    This paper describes a novel micro xy-stage, driven by double-hot arm horizontal thermal micro-actuators integrated with a piezoresistive sensor (PS) for low-voltage operation and precise control. This micro xy-stage structure is linked with chevron beams and optimized to amplify the displacement generated by the micro-actuators that provide a pull force to the movable platform. The PS employed for in situ displacement detection and feedback control is fabricated at the base of a cold arm, which minimizes the influence of temperature change induced by electro-thermal heating. The micro xy-stage structure is defined through the use of a simple micromachining process, released by backside wet etching with a special tool. For an input power of approximately 44 mW, each chevron actuator provides about 16 µm and the total displacement of the platform is close to 32 µm. The sensitivity of the PS is better than 1 mV µm −1 , obtained from the amplified voltage output of the Wheatstone bridge circuit. The potential applications of the proposed micro xy-stage lie in micro- or nano-manipulation, as well as the positioning of ultra-small objects in nanotechnology. (paper)

  1. Integration and High-Temperature Characterization of Ferroelectric Vanadium-Doped Bismuth Titanate Thin Films on Silicon Carbide

    Science.gov (United States)

    Ekström, Mattias; Khartsev, Sergiy; Östling, Mikael; Zetterling, Carl-Mikael

    2017-07-01

    4H-SiC electronics can operate at high temperature (HT), e.g., 300°C to 500°C, for extended times. Systems using sensors and amplifiers that operate at HT would benefit from microcontrollers which can also operate at HT. Microcontrollers require nonvolatile memory (NVM) for computer programs. In this work, we demonstrate the possibility of integrating ferroelectric vanadium-doped bismuth titanate (BiTV) thin films on 4H-SiC for HT memory applications, with BiTV ferroelectric capacitors providing memory functionality. Film deposition was achieved by laser ablation on Pt (111)/TiO2/4H-SiC substrates, with magnetron-sputtered Pt used as bottom electrode and thermally evaporated Au as upper contacts. Film characterization by x-ray diffraction analysis revealed predominately (117) orientation. P- E hysteresis loops measured at room temperature showed maximum 2 P r of 48 μC/cm2, large enough for wide read margins. P- E loops were measurable up to 450°C, with losses limiting measurements above 450°C. The phase-transition temperature was determined to be about 660°C from the discontinuity in dielectric permittivity, close to what is achieved for ceramics. These BiTV ferroelectric capacitors demonstrate potential for use in HT NVM applications for SiC digital electronics.

  2. Efficiently-cooled plasmonic amorphous silicon solar cells integrated with a nano-coated heat-pipe plate

    Science.gov (United States)

    Zhang, Yinan; Du, Yanping; Shum, Clifford; Cai, Boyuan; Le, Nam Cao Hoai; Chen, Xi; Duck, Benjamin; Fell, Christopher; Zhu, Yonggang; Gu, Min

    2016-04-01

    Solar photovoltaics (PV) are emerging as a major alternative energy source. The cost of PV electricity depends on the efficiency of conversion of light to electricity. Despite of steady growth in the efficiency for several decades, little has been achieved to reduce the impact of real-world operating temperatures on this efficiency. Here we demonstrate a highly efficient cooling solution to the recently emerging high performance plasmonic solar cell technology by integrating an advanced nano-coated heat-pipe plate. This thermal cooling technology, efficient for both summer and winter time, demonstrates the heat transportation capability up to ten times higher than those of the metal plate and the conventional wickless heat-pipe plates. The reduction in temperature rise of the plasmonic solar cells operating under one sun condition can be as high as 46%, leading to an approximate 56% recovery in efficiency, which dramatically increases the energy yield of the plasmonic solar cells. This newly-developed, thermally-managed plasmonic solar cell device significantly extends the application scope of PV for highly efficient solar energy conversion.

  3. Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

    Science.gov (United States)

    Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

    1991-01-01

    A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

  4. Silicon Qubits

    Energy Technology Data Exchange (ETDEWEB)

    Ladd, Thaddeus D. [HRL Laboratories, LLC, Malibu, CA (United States); Carroll, Malcolm S. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2018-02-28

    Silicon is a promising material candidate for qubits due to the combination of worldwide infrastructure in silicon microelectronics fabrication and the capability to drastically reduce decohering noise channels via chemical purification and isotopic enhancement. However, a variety of challenges in fabrication, control, and measurement leaves unclear the best strategy for fully realizing this material’s future potential. In this article, we survey three basic qubit types: those based on substitutional donors, on metal-oxide-semiconductor (MOS) structures, and on Si/SiGe heterostructures. We also discuss the multiple schema used to define and control Si qubits, which may exploit the manipulation and detection of a single electron charge, the state of a single electron spin, or the collective states of multiple spins. Far from being comprehensive, this article provides a brief orientation to the rapidly evolving field of silicon qubit technology and is intended as an approachable entry point for a researcher new to this field.

  5. Low surface damage dry etched black silicon

    DEFF Research Database (Denmark)

    Plakhotnyuk, Maksym M.; Gaudig, Maria; Davidsen, Rasmus Schmidt

    2017-01-01

    Black silicon (bSi) is promising for integration into silicon solar cell fabrication flow due to its excellent light trapping and low reflectance, and a continuously improving passivation. However, intensive ion bombardment during the reactive ion etching used to fabricate bSi induces surface dam...

  6. Ductile cutting of silicon microstructures with surface inclination measurement and compensation by using a force sensor integrated single point diamond tool

    International Nuclear Information System (INIS)

    Chen, Yuan-Liu; Cai, Yindi; Shimizu, Yuki; Ito, So; Gao, Wei; Ju, Bing-Feng

    2016-01-01

    This paper presents a measurement and compensation method of surface inclination for ductile cutting of silicon microstructures by using a diamond tool with a force sensor based on a four-axis ultra-precision lathe. The X- and Y-directional inclinations of a single crystal silicon workpiece with respect to the X- and Y-motion axes of the lathe slides were measured respectively by employing the diamond tool as a touch-trigger probe, in which the tool-workpiece contact is sensitively detected by monitoring the force sensor output. Based on the measurement results, fabrication of silicon microstructures can be thus carried out directly along the tilted silicon workpiece by compensating the cutting motion axis to be parallel to the silicon surface without time-consuming pre-adjustment of the surface inclination or turning of a flat surface. A diamond tool with a negative rake angle was used in the experiment for superior ductile cutting performance. The measurement precision by using the diamond tool as a touch-trigger probe was investigated. Experiments of surface inclination measurement and ultra-precision ductile cutting of a micro-pillar array and a micro-pyramid array with inclination compensation were carried out respectively to demonstrate the feasibility of the proposed method. (paper)

  7. Integrated in vitro approaches to assess the bioaccessibility and bioavailability of silicon-biofortified leafy vegetables and preliminary effects on bone.

    Science.gov (United States)

    D'Imperio, Massimiliano; Brunetti, Giacomina; Gigante, Isabella; Serio, Francesco; Santamaria, Pietro; Cardinali, Angela; Colucci, Silvia; Minervini, Fiorenza

    2017-03-01

    Food industries are increasingly oriented toward new foods to improve nutritional status and/or to combat nutritional deficiency diseases. In this context, silicon biofortification could be an innovative tool for obtaining new foods with possible positive effects on bone mineralization. In this paper, an alternative and quick in vitro approach was applied in order to evaluate the potential health-promoting effects of five silicon-biofortified leafy vegetables (tatsoi, mizuna, purslane, Swiss chard and chicory) on bone mineralization compared with a commercial silicon supplement. The silicon bioaccessibility and bioavailability of the five leafy vegetables (biofortified or not) and of the supplement were assessed by applying a protocol consisting of in vitro gastrointestinal digestion coupled with a Caco-2 cell model. Silicon bioaccessibility ranged from 0.89 to 8.18 mg/L and bioavailability ranged from 111 to 206 μg/L of Si for both vegetables and supplement. Furthermore, the bioavailable fractions were tested on a human osteoblast cell model following the expression of type 1 collagen and alkaline phosphatase. The results obtained highlighted that the bioavailable fraction of biofortified purslane and Swiss chard improved the expression of both osteoblast markers compared with the supplement and other vegetables. These results underline the potentially beneficial effect of biofortified leafy vegetables and also indicate the usefulness of in vitro approaches for selecting the best vegetable with positive bone effects for further in vivo research.

  8. Silicon photonics for telecommunications and biomedicine

    CERN Document Server

    Fathpour, Sasan

    2011-01-01

    Given silicon's versatile material properties, use of low-cost silicon photonics continues to move beyond light-speed data transmission through fiber-optic cables and computer chips. Its application has also evolved from the device to the integrated-system level. A timely overview of this impressive growth, Silicon Photonics for Telecommunications and Biomedicine summarizes state-of-the-art developments in a wide range of areas, including optical communications, wireless technologies, and biomedical applications of silicon photonics. With contributions from world experts, this reference guides

  9. Rectangular-cladding silicon slot waveguide with improved nonlinear performance

    Science.gov (United States)

    Huang, Zengzhi; Huang, Qingzhong; Wang, Yi; Xia, Jinsong

    2018-04-01

    Silicon slot waveguides have great potential in hybrid silicon integration to realize nonlinear optical applications. We propose a rectangular-cladding hybrid silicon slot waveguide. Simulation result shows that, with a rectangular-cladding, the slot waveguide can be formed by narrower silicon strips, so the two-photon absorption (TPA) loss in silicon is decreased. When the cladding material is a nonlinear polymer, the calculated TPA figure of merit (FOMTPA) is 4.4, close to the value of bulk nonlinear polymer of 5.0. This value confirms the good nonlinear performance of rectangular-cladding silicon slot waveguides.

  10. Ferroelectric dielectrics integrated on silicon

    CERN Document Server

    Defay, Emmanuel

    2013-01-01

    This book describes up-to-date technology applied to high-K materials for More Than Moore applications, i.e. microsystems applied to microelectronics core technologies.After detailing the basic thermodynamic theory applied to high-K dielectrics thin films including extrinsic effects, this book emphasizes the specificity of thin films. Deposition and patterning technologies are then presented. A whole chapter is dedicated to the major role played in the field by X-Ray Diffraction characterization, and other characterization techniques are also described such as Radio frequency characterizat

  11. Catastrophic degradation of the interface of epitaxial silicon carbide on silicon at high temperatures

    Energy Technology Data Exchange (ETDEWEB)

    Pradeepkumar, Aiswarya; Mishra, Neeraj; Kermany, Atieh Ranjbar; Iacopi, Francesca [Queensland Micro and Nanotechnology Centre and Environmental Futures Research Institute, Griffith University, Nathan QLD 4111 (Australia); Boeckl, John J. [Materials and Manufacturing Directorate, Air Force Research Laboratories, Wright-Patterson Air Force Base, Ohio 45433 (United States); Hellerstedt, Jack; Fuhrer, Michael S. [Monash Centre for Atomically Thin Materials, Monash University, Monash, VIC 3800 (Australia)

    2016-07-04

    Epitaxial cubic silicon carbide on silicon is of high potential technological relevance for the integration of a wide range of applications and materials with silicon technologies, such as micro electro mechanical systems, wide-bandgap electronics, and graphene. The hetero-epitaxial system engenders mechanical stresses at least up to a GPa, pressures making it extremely challenging to maintain the integrity of the silicon carbide/silicon interface. In this work, we investigate the stability of said interface and we find that high temperature annealing leads to a loss of integrity. High–resolution transmission electron microscopy analysis shows a morphologically degraded SiC/Si interface, while mechanical stress measurements indicate considerable relaxation of the interfacial stress. From an electrical point of view, the diode behaviour of the initial p-Si/n-SiC junction is catastrophically lost due to considerable inter-diffusion of atoms and charges across the interface upon annealing. Temperature dependent transport measurements confirm a severe electrical shorting of the epitaxial silicon carbide to the underlying substrate, indicating vast predominance of the silicon carriers in lateral transport above 25 K. This finding has crucial consequences on the integration of epitaxial silicon carbide on silicon and its potential applications.

  12. Strained silicon as a new electro-optic material

    DEFF Research Database (Denmark)

    Jacobsen, Rune Shim; Andersen, Karin Nordström; Borel, Peter Ingo

    2006-01-01

    For decades, silicon has been the material of choice for mass fabrication of electronics. This is in contrast to photonics, where passive optical components in silicon have only recently been realized1, 2. The slow progress within silicon optoelectronics, where electronic and optical...... functionalities can be integrated into monolithic components based on the versatile silicon platform, is due to the limited active optical properties of silicon3. Recently, however, a continuous-wave Raman silicon laser was demonstrated4; if an effective modulator could also be realized in silicon, data...... processing and transmission could potentially be performed by all-silicon electronic and optical components. Here we have discovered that a significant linear electro-optic effect is induced in silicon by breaking the crystal symmetry. The symmetry is broken by depositing a straining layer on top...

  13. Waveguide silicon nitride grating coupler

    Science.gov (United States)

    Litvik, Jan; Dolnak, Ivan; Dado, Milan

    2016-12-01

    Grating couplers are one of the most used elements for coupling of light between optical fibers and photonic integrated components. Silicon-on-insulator platform provides strong confinement of light and allows high integration. In this work, using simulations we have designed a broadband silicon nitride surface grating coupler. The Fourier-eigenmode expansion and finite difference time domain methods are utilized in design optimization of grating coupler structure. The fully, single etch step grating coupler is based on a standard silicon-on-insulator wafer with 0.55 μm waveguide Si3N4 layer. The optimized structure at 1550 nm wavelength yields a peak coupling efficiency -2.6635 dB (54.16%) with a 1-dB bandwidth up to 80 nm. It is promising way for low-cost fabrication using complementary metal-oxide- semiconductor fabrication process.

  14. Silicon based light-emitting materials and devices

    International Nuclear Information System (INIS)

    Chen Weide

    1999-01-01

    Silicon based light-emitting materials and devices are the key to optoelectronic integration. Recently, there has been significant progress in materials engineering methods. The author reviews the latest developments in this area including erbium doped silicon, porous silicon, nanocrystalline silicon and Si/SiO 2 superlattice structures. The incorporation of these different materials into devices is described and future device prospects are assessed

  15. Development of Tandem Amorphous/Microcrystalline Silicon Thin-Film Large-Area See-Through Color Solar Panels with Reflective Layer and 4-Step Laser Scribing for Building-Integrated Photovoltaic Applications

    Directory of Open Access Journals (Sweden)

    Chin-Yi Tsai

    2014-01-01

    Full Text Available In this work, tandem amorphous/microcrystalline silicon thin-film large-area see-through color solar modules were successfully designed and developed for building-integrated photovoltaic applications. Novel and key technologies of reflective layers and 4-step laser scribing were researched, developed, and introduced into the production line to produce solar panels with various colors, such as purple, dark blue, light blue, silver, golden, orange, red wine, and coffee. The highest module power is 105 W and the highest visible light transmittance is near 20%.

  16. Micro benchtop optics by bulk silicon micromachining

    Science.gov (United States)

    Lee, Abraham P.; Pocha, Michael D.; McConaghy, Charles F.; Deri, Robert J.

    2000-01-01

    Micromachining of bulk silicon utilizing the parallel etching characteristics of bulk silicon and integrating the parallel etch planes of silicon with silicon wafer bonding and impurity doping, enables the fabrication of on-chip optics with in situ aligned etched grooves for optical fibers, micro-lenses, photodiodes, and laser diodes. Other optical components that can be microfabricated and integrated include semi-transparent beam splitters, micro-optical scanners, pinholes, optical gratings, micro-optical filters, etc. Micromachining of bulk silicon utilizing the parallel etching characteristics thereof can be utilized to develop miniaturization of bio-instrumentation such as wavelength monitoring by fluorescence spectrometers, and other miniaturized optical systems such as Fabry-Perot interferometry for filtering of wavelengths, tunable cavity lasers, micro-holography modules, and wavelength splitters for optical communication systems.

  17. Study and characterization of an integrated circuit-deposited hydrogenated amorphous silicon sensor for the detection of particles and radiations; Etude et caracterisation d'un capteur en silicium amorphe hydrogene depose sur circuit integre pour la detection de particules et de rayonnements

    Energy Technology Data Exchange (ETDEWEB)

    Despeisse, M

    2006-03-15

    Next generation experiments at the European laboratory of particle physics (CERN) require particle detector alternatives to actual silicon detectors. This thesis presents a novel detector technology, which is based on the deposition of a hydrogenated amorphous silicon sensor on top of an integrated circuit. Performance and limitations of this technology have been assessed for the first time in this thesis in the context of particle detectors. Specific integrated circuits have been designed and the detector segmentation, the interface sensor-chip and the sensor leakage current have been studied in details. The signal induced by the track of an ionizing particle in the sensor has been characterized and results on the signal speed, amplitude and on the sensor resistance to radiation are presented. The results are promising regarding the use of this novel technology for radiation detection, though limitations have been shown for particle physics application. (author)

  18. Influence of elastomeric seal plate surface chemistry on interface integrity in biofouling-prone systems: Evaluation of a hydrophobic "easy-release" silicone-epoxy coating for maintaining water seal integrity of a sliding neoprene/steel interface

    Science.gov (United States)

    Andolina, Vincent L.

    Attenuated Internal Reflection (MAIR-IR) and Microscopic Infrared Spectroscopy for organic surface compositional details, light microscopy for wear area quantification, and profilometry for surface roughness estimation and wear depth quantification. Pin-on-disc dynamic Coefficient of Friction (CoF) measurements provided data relevant to forecasts of seal integrity in dry, wet and biofouling-influenced sliding contact. Actual wear of neoprene seal material against uncoated and coated steel surfaces, wet and dry, was monitored after both rotary and linear cyclic wear testing, demonstrating significant reductions in elastomer wear areas and depths (and resultant volumes) when the coating was present. Coating the steel eliminated a 270% increase in neoprene surface area wear and an 11-fold increase in seal abrasive volume loss associated with underwater rusting in rotary experiments. Linear testing results confirm coating efficacy by reducing wear area in both loading regimes by about half. No coating delamination was observed, apparently due to a differential distribution of silicone and epoxy ingredients at the air-exposed vs. steel-bonded interfaces demonstrated by IR and EDS methods. Frictional testing revealed higher Coefficients of Friction (CoF) associated with the low-speed sliding of Neoprene over coated rather than uncoated steel surfaces in a wet environment, indicating better potential seal adhesion between the hydrophobic elastomer and coating than between the elastomer and intrinsically hydrophilic uncoated steel. When zebra mussel biofouling debris was present in the articulating joints, CoF was reduced as a result of a water channel path produced between the articulating surfaces by the retained biological matter. Easier release of the biofouling from the low-CST coated surfaces restored the seal integrity more rapidly with further water rinsing. Rapid sliding diminished these biofouling-related differences, but revealed a significant advantage in reducing the Co

  19. Silicon photonics III systems and applications

    CERN Document Server

    Lockwood, David

    2016-01-01

    This book is volume III of a series of books on silicon photonics. It reports on the development of fully integrated systems where many different photonics component are integrated together to build complex circuits. This is the demonstration of the fully potentiality of silicon photonics. It contains a number of chapters written by engineers and scientists of the main companies, research centers and universities active in the field. It can be of use for all those persons interested to know the potentialities and the recent applications of silicon photonics both in microelectronics, telecommunication and consumer electronics market.

  20. Geochemistry of silicon isotopes

    Energy Technology Data Exchange (ETDEWEB)

    Ding, Tiping; Li, Yanhe; Gao, Jianfei; Hu, Bin [Chinese Academy of Geological Science, Beijing (China). Inst. of Mineral Resources; Jiang, Shaoyong [China Univ. of Geosciences, Wuhan (China).

    2018-04-01

    Silicon is one of the most abundant elements in the Earth and silicon isotope geochemistry is important in identifying the silicon source for various geological bodies and in studying the behavior of silicon in different geological processes. This book starts with an introduction on the development of silicon isotope geochemistry. Various analytical methods are described and compared with each other in detail. The mechanisms of silicon isotope fractionation are discussed, and silicon isotope distributions in various extraterrestrial and terrestrial reservoirs are updated. Besides, the applications of silicon isotopes in several important fields are presented.

  1. Integration

    DEFF Research Database (Denmark)

    Emerek, Ruth

    2004-01-01

    Bidraget diskuterer de forskellige intergrationsopfattelse i Danmark - og hvad der kan forstås ved vellykket integration......Bidraget diskuterer de forskellige intergrationsopfattelse i Danmark - og hvad der kan forstås ved vellykket integration...

  2. Characterization of 13 and 30 μm thick hydrogenated amorphous silicon diodes deposited over CMOS integrated circuits for particle detection application

    International Nuclear Information System (INIS)

    Despeisse, M.; Anelli, G.; Commichau, S.; Dissertori, G.; Garrigos, A.; Jarron, P.; Miazza, C.; Moraes, D.; Shah, A.; Wyrsch, N.; Viertel, G.

    2004-01-01

    We present the experimental results obtained with a novel monolithic silicon pixel detector which consists in depositing a n-i-p hydrogenated amorphous silicon (a-Si:H) diode straight above the readout ASIC (this technology is called Thin Film on ASIC, TFA). The characterization has been performed on 13 and 30 μm thick a-Si:H films deposited on top of an ASIC containing a linear array of high-speed low-noise transimpedance amplifiers designed in a 0.25 μm CMOS technology. Experimental results presented have been obtained with a 600 nm pulsed laser. The results of charge collection efficiency and charge collection speed of these structures are discussed

  3. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.; Fahad, Hossain M.; Singh, Nirpendra; Sevilla, Galo T.; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

    2013-01-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  4. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.

    2013-10-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  5. Hybrid III-V/silicon lasers

    Science.gov (United States)

    Kaspar, P.; Jany, C.; Le Liepvre, A.; Accard, A.; Lamponi, M.; Make, D.; Levaufre, G.; Girard, N.; Lelarge, F.; Shen, A.; Charbonnier, P.; Mallecot, F.; Duan, G.-H.; Gentner, J.-.; Fedeli, J.-M.; Olivier, S.; Descos, A.; Ben Bakir, B.; Messaoudene, S.; Bordel, D.; Malhouitre, S.; Kopp, C.; Menezo, S.

    2014-05-01

    The lack of potent integrated light emitters is one of the bottlenecks that have so far hindered the silicon photonics platform from revolutionizing the communication market. Photonic circuits with integrated light sources have the potential to address a wide range of applications from short-distance data communication to long-haul optical transmission. Notably, the integration of lasers would allow saving large assembly costs and reduce the footprint of optoelectronic products by combining photonic and microelectronic functionalities on a single chip. Since silicon and germanium-based sources are still in their infancy, hybrid approaches using III-V semiconductor materials are currently pursued by several research laboratories in academia as well as in industry. In this paper we review recent developments of hybrid III-V/silicon lasers and discuss the advantages and drawbacks of several integration schemes. The integration approach followed in our laboratory makes use of wafer-bonded III-V material on structured silicon-on-insulator substrates and is based on adiabatic mode transfers between silicon and III-V waveguides. We will highlight some of the most interesting results from devices such as wavelength-tunable lasers and AWG lasers. The good performance demonstrates that an efficient mode transfer can be achieved between III-V and silicon waveguides and encourages further research efforts in this direction.

  6. High surface area silicon materials: fundamentals and new technology.

    Science.gov (United States)

    Buriak, Jillian M

    2006-01-15

    Crystalline silicon forms the basis of just about all computing technologies on the planet, in the form of microelectronics. An enormous amount of research infrastructure and knowledge has been developed over the past half-century to construct complex functional microelectronic structures in silicon. As a result, it is highly probable that silicon will remain central to computing and related technologies as a platform for integration of, for instance, molecular electronics, sensing elements and micro- and nanoelectromechanical systems. Porous nanocrystalline silicon is a fascinating variant of the same single crystal silicon wafers used to make computer chips. Its synthesis, a straightforward electrochemical, chemical or photochemical etch, is compatible with existing silicon-based fabrication techniques. Porous silicon literally adds an entirely new dimension to the realm of silicon-based technologies as it has a complex, three-dimensional architecture made up of silicon nanoparticles, nanowires, and channel structures. The intrinsic material is photoluminescent at room temperature in the visible region due to quantum confinement effects, and thus provides an optical element to electronic applications. Our group has been developing new organic surface reactions on porous and nanocrystalline silicon to tailor it for a myriad of applications, including molecular electronics and sensing. Integration of organic and biological molecules with porous silicon is critical to harness the properties of this material. The construction and use of complex, hierarchical molecular synthetic strategies on porous silicon will be described.

  7. [Integrity].

    Science.gov (United States)

    Gómez Rodríguez, Rafael Ángel

    2014-01-01

    To say that someone possesses integrity is to claim that that person is almost predictable about responses to specific situations, that he or she can prudentially judge and to act correctly. There is a closed interrelationship between integrity and autonomy, and the autonomy rests on the deeper moral claim of all humans to integrity of the person. Integrity has two senses of significance for medical ethic: one sense refers to the integrity of the person in the bodily, psychosocial and intellectual elements; and in the second sense, the integrity is the virtue. Another facet of integrity of the person is la integrity of values we cherish and espouse. The physician must be a person of integrity if the integrity of the patient is to be safeguarded. The autonomy has reduced the violations in the past, but the character and virtues of the physician are the ultimate safeguard of autonomy of patient. A field very important in medicine is the scientific research. It is the character of the investigator that determines the moral quality of research. The problem arises when legitimate self-interests are replaced by selfish, particularly when human subjects are involved. The final safeguard of moral quality of research is the character and conscience of the investigator. Teaching must be relevant in the scientific field, but the most effective way to teach virtue ethics is through the example of the a respected scientist.

  8. Basic opto-electronics on silicon for sensor applications

    NARCIS (Netherlands)

    Joppe, J.L.; Bekman, H.H.P.Th.; de Krijger, A.J.T.; Albers, H.; Chalmers, J.; Chalmers, J.D.; Holleman, J.; Ikkink, T.J.; Ikkink, T.; van Kranenburg, H.; Zhou, M.-J.; Zhou, Ming-Jiang; Lambeck, Paul

    1994-01-01

    A general platform for integrated opto-electronic sensor systems on silicon is proposed. The system is based on a hybridly integrated semiconductor laser, ZnO optical waveguides and monolithic photodiodes and electronic circuiry.

  9. Silicon Micromachined Microlens Array for THz Antennas

    Science.gov (United States)

    Lee, Choonsup; Chattopadhyay, Goutam; Mehdi, IImran; Gill, John J.; Jung-Kubiak, Cecile D.; Llombart, Nuria

    2013-01-01

    5 5 silicon microlens array was developed using a silicon micromachining technique for a silicon-based THz antenna array. The feature of the silicon micromachining technique enables one to microfabricate an unlimited number of microlens arrays at one time with good uniformity on a silicon wafer. This technique will resolve one of the key issues in building a THz camera, which is to integrate antennas in a detector array. The conventional approach of building single-pixel receivers and stacking them to form a multi-pixel receiver is not suited at THz because a single-pixel receiver already has difficulty fitting into mass, volume, and power budgets, especially in space applications. In this proposed technique, one has controllability on both diameter and curvature of a silicon microlens. First of all, the diameter of microlens depends on how thick photoresist one could coat and pattern. So far, the diameter of a 6- mm photoresist microlens with 400 m in height has been successfully microfabricated. Based on current researchers experiences, a diameter larger than 1-cm photoresist microlens array would be feasible. In order to control the curvature of the microlens, the following process variables could be used: 1. Amount of photoresist: It determines the curvature of the photoresist microlens. Since the photoresist lens is transferred onto the silicon substrate, it will directly control the curvature of the silicon microlens. 2. Etching selectivity between photoresist and silicon: The photoresist microlens is formed by thermal reflow. In order to transfer the exact photoresist curvature onto silicon, there needs to be etching selectivity of 1:1 between silicon and photoresist. However, by varying the etching selectivity, one could control the curvature of the silicon microlens. The figure shows the microfabricated silicon microlens 5 x5 array. The diameter of the microlens located in the center is about 2.5 mm. The measured 3-D profile of the microlens surface has a

  10. Will silicon be the photonic material of the third millenium?

    International Nuclear Information System (INIS)

    Pavesi, L

    2003-01-01

    Silicon microphotonics, a technology which merges photonics and silicon microelectronic components, is rapidly evolving. Many different fields of application are emerging: transceiver modules for optical communication systems, optical bus systems for ULSI circuits, I/O stages for SOC, displays, .... In this review I will give a brief motivation for silicon microphotonics and try to give the state-of-the-art of this technology. The ingredient still lacking is the silicon laser: a review of the various approaches will be presented. Finally, I will try to draw some conclusions where silicon is predicted to be the material to achieve a full integration of electronic and optical devices. (topical review)

  11. Buried oxide layer in silicon

    Science.gov (United States)

    Sadana, Devendra Kumar; Holland, Orin Wayne

    2001-01-01

    A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

  12. Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

    Science.gov (United States)

    Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

    2015-10-06

    We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

  13. Materials and integration schemes for above-IC integrated optics

    NARCIS (Netherlands)

    Schmitz, Jurriaan; Rangarajan, B.; Kovalgin, Alexeij Y.

    2014-01-01

    A study is presented on silicon oxynitride material for waveguides and germanium-silicon alloys for p-i-n diodes. The materials are manufactured at low, CMOS-backend compatible temperatures, targeting the integration of optical functions on top of CMOS chips. Low-temperature germanium-silicon

  14. Nonlinear optical interactions in silicon waveguides

    Directory of Open Access Journals (Sweden)

    Kuyken B.

    2017-03-01

    Full Text Available The strong nonlinear response of silicon photonic nanowire waveguides allows for the integration of nonlinear optical functions on a chip. However, the detrimental nonlinear optical absorption in silicon at telecom wavelengths limits the efficiency of many such experiments. In this review, several approaches are proposed and demonstrated to overcome this fundamental issue. By using the proposed methods, we demonstrate amongst others supercontinuum generation, frequency comb generation, a parametric optical amplifier, and a parametric optical oscillator.

  15. Thin-film silicon solar cell technology

    Czech Academy of Sciences Publication Activity Database

    Shah, A. V.; Schade, H.; Vaněček, Milan; Meier, J.; Vallat-Sauvain, E.; Wyrsch, N.; Kroll, U.; Droz, C.; Bailat, J.

    2004-01-01

    Roč. 12, - (2004), s. 113-142 ISSN 1062-7995 R&D Projects: GA MŽP SN/320/11/03 Institutional research plan: CEZ:AV0Z1010914 Keywords : thin-film silicon modules * hydrogenerated amorphous silicon(a-Si:H) * hydrogenerated microcrystalline (ćc-Si:H) * transparent conductive oxydes(TCOs) * building-integrated photovoltaics(BIPV) Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 1.196, year: 2004

  16. Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2013-05-30

    Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  17. Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

    KAUST Repository

    Hussain, Muhammad Mustafa; Rojas, Jhonathan Prieto; Sevilla, Galo T.

    2013-01-01

    Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  18. In-vitro bioactivity, biocorrosion and antibacterial activity of silicon integrated hydroxyapatite/chitosan composite coating on 316 L stainless steel implants

    Energy Technology Data Exchange (ETDEWEB)

    Sutha, S.; Kavitha, K.; Karunakaran, G.; Rajendran, V., E-mail: veerajendran@gmail.com

    2013-10-15

    A simple and effective ultrasonication method was applied for the preparation of 0, 0.4, 0.8, 1.0 and 1.6 wt% silicon substituted hydroxyapatite (HAp) (SH). The Ca/P ratio of the synthesised SH nanoparticles were in the range of 1.58–1.70. Morphological changes were noticed in HAp with respect to the amount of Si from 0 to 1.6 wt%. The morphology of the particles changed from spherical shape to rod-like morphology with respect to the amount of Si which was confirmed using transmission electron microscopy. X-ray diffraction studies confirm the formation of phase pure SH nanoparticles without any secondary phase. Chitosan (CTS) blended SH nanocomposites coating on surgical grade 316 L stainless steel (316 L SS) implant was made by spin coating technique. The surface of the coated implant was characterised using scanning electron microscopy which confirms the uniform coating without cracks and pores. The increased corrosion resistance of the 1.6 wt% of SH/CTS-coated SS implant in the simulated body fluid (SBF) indicates the long-term biostability of SH composite-coated ceramics in vitro than the 0 wt% SH/CTS. The testing of SH/CTS nanocomposites with gram-positive and gram-negative bacterial strains confirms that the antibacterial ability improves with the higher substitution of Si. In addition, formation of bone-like apatite layer on the SH/CTS-coated implant in SBF was studied through SEM analysis and it confirms the ability to increase the HAp formation on the surface of 1.0 wt% SH/CTS-coated 316 L SS implant. Highlights: • Hydroxyapatite particles are prepared with various silicon concentration • Prepared composites are blended with chitosan and coated on the implant • Corrosion resistance in simulated body fluid improves its stability • Increase in silicon concentration improves the antibacterial activity • Coated plate exhibit high in-vitro bioactivity in simulated body fluid.

  19. In-vitro bioactivity, biocorrosion and antibacterial activity of silicon integrated hydroxyapatite/chitosan composite coating on 316 L stainless steel implants

    International Nuclear Information System (INIS)

    Sutha, S.; Kavitha, K.; Karunakaran, G.; Rajendran, V.

    2013-01-01

    A simple and effective ultrasonication method was applied for the preparation of 0, 0.4, 0.8, 1.0 and 1.6 wt% silicon substituted hydroxyapatite (HAp) (SH). The Ca/P ratio of the synthesised SH nanoparticles were in the range of 1.58–1.70. Morphological changes were noticed in HAp with respect to the amount of Si from 0 to 1.6 wt%. The morphology of the particles changed from spherical shape to rod-like morphology with respect to the amount of Si which was confirmed using transmission electron microscopy. X-ray diffraction studies confirm the formation of phase pure SH nanoparticles without any secondary phase. Chitosan (CTS) blended SH nanocomposites coating on surgical grade 316 L stainless steel (316 L SS) implant was made by spin coating technique. The surface of the coated implant was characterised using scanning electron microscopy which confirms the uniform coating without cracks and pores. The increased corrosion resistance of the 1.6 wt% of SH/CTS-coated SS implant in the simulated body fluid (SBF) indicates the long-term biostability of SH composite-coated ceramics in vitro than the 0 wt% SH/CTS. The testing of SH/CTS nanocomposites with gram-positive and gram-negative bacterial strains confirms that the antibacterial ability improves with the higher substitution of Si. In addition, formation of bone-like apatite layer on the SH/CTS-coated implant in SBF was studied through SEM analysis and it confirms the ability to increase the HAp formation on the surface of 1.0 wt% SH/CTS-coated 316 L SS implant. Highlights: • Hydroxyapatite particles are prepared with various silicon concentration • Prepared composites are blended with chitosan and coated on the implant • Corrosion resistance in simulated body fluid improves its stability • Increase in silicon concentration improves the antibacterial activity • Coated plate exhibit high in-vitro bioactivity in simulated body fluid

  20. New dynamic silicon photonic components enabled by MEMS technology

    Science.gov (United States)

    Errando-Herranz, Carlos; Edinger, Pierre; Colangelo, Marco; Björk, Joel; Ahmed, Samy; Stemme, Göran; Niklaus, Frank; Gylfason, Kristinn B.

    2018-02-01

    Silicon photonics is the study and application of integrated optical systems which use silicon as an optical medium, usually by confining light in optical waveguides etched into the surface of silicon-on-insulator (SOI) wafers. The term microelectromechanical systems (MEMS) refers to the technology of mechanics on the microscale actuated by electrostatic actuators. Due to the low power requirements of electrostatic actuation, MEMS components are very power efficient, making them well suited for dense integration and mobile operation. MEMS components are conventionally also implemented in silicon, and MEMS sensors such as accelerometers, gyros, and microphones are now standard in every smartphone. By combining these two successful technologies, new active photonic components with extremely low power consumption can be made. We discuss our recent experimental work on tunable filters, tunable fiber-to-chip couplers, and dynamic waveguide dispersion tuning, enabled by the marriage of silicon MEMS and silicon photonics.

  1. Twenty-fold plasmon-induced enhancement of radiative emission rate in silicon nanocrystals embedded in silicon dioxide

    International Nuclear Information System (INIS)

    Gardelis, S; Gianneta, V.; Nassiopoulou, A.G

    2016-01-01

    We report on a 20-fold enhancement of the integrated photoluminescence (PL) emission of silicon nanocrystals, embedded in a matrix of silicon dioxide, induced by excited surface plasmons from silver nanoparticles, which are located in the vicinity of the silicon nanocrystals and separated from them by a silicon dioxide layer of a few nanometers. The electric field enhancement provided by the excited surface plasmons increases the absorption cross section and the emission rate of the nearby silicon nanocrystals, resulting in the observed enhancement of the photoluminescence, mainly attributed to a 20-fold enhancement in the emission rate of the silicon nanocrystals. The observed remarkable improvement of the PL emission makes silicon nanocrystals very useful material for photonic, sensor and solar cell applications.

  2. Microelectromechanical pump utilizing porous silicon

    Science.gov (United States)

    Lantz, Jeffrey W [Albuquerque, NM; Stalford, Harold L [Norman, OK

    2011-07-19

    A microelectromechanical (MEM) pump is disclosed which includes a porous silicon region sandwiched between an inlet chamber and an outlet chamber. The porous silicon region is formed in a silicon substrate and contains a number of pores extending between the inlet and outlet chambers, with each pore having a cross-section dimension about equal to or smaller than a mean free path of a gas being pumped. A thermal gradient is provided along the length of each pore by a heat source which can be an electrical resistance heater or an integrated circuit (IC). A channel can be formed through the silicon substrate so that inlet and outlet ports can be formed on the same side of the substrate, or so that multiple MEM pumps can be connected in series to form a multi-stage MEM pump. The MEM pump has applications for use in gas-phase MEM chemical analysis systems, and can also be used for passive cooling of ICs.

  3. "Silicon millefeuille": From a silicon wafer to multiple thin crystalline films in a single step

    Science.gov (United States)

    Hernández, David; Trifonov, Trifon; Garín, Moisés; Alcubilla, Ramon

    2013-04-01

    During the last years, many techniques have been developed to obtain thin crystalline films from commercial silicon ingots. Large market applications are foreseen in the photovoltaic field, where important cost reductions are predicted, and also in advanced microelectronics technologies as three-dimensional integration, system on foil, or silicon interposers [Dross et al., Prog. Photovoltaics 20, 770-784 (2012); R. Brendel, Thin Film Crystalline Silicon Solar Cells (Wiley-VCH, Weinheim, Germany 2003); J. N. Burghartz, Ultra-Thin Chip Technology and Applications (Springer Science + Business Media, NY, USA, 2010)]. Existing methods produce "one at a time" silicon layers, once one thin film is obtained, the complete process is repeated to obtain the next layer. Here, we describe a technology that, from a single crystalline silicon wafer, produces a large number of crystalline films with controlled thickness in a single technological step.

  4. Silicon: electrochemistry and luminescence

    NARCIS (Netherlands)

    Kooij, Ernst Stefan

    1997-01-01

    The electrochemistry of crystalline and porous silicon and the luminescence from porous silicon has been studied. One chapter deals with a model for the anodic dissolution of silicon in HF solution. In following chapters both the electrochemistry and various ways of generating visible

  5. Analytical and experimental evaluation of joining silicon carbide to silicon carbide and silicon nitride to silicon nitride for advanced heat engine applications Phase 2. Final report

    Energy Technology Data Exchange (ETDEWEB)

    Sundberg, G.J.; Vartabedian, A.M.; Wade, J.A.; White, C.S. [Norton Co., Northboro, MA (United States). Advanced Ceramics Div.

    1994-10-01

    The purpose of joining, Phase 2 was to develop joining technologies for HIP`ed Si{sub 3}N{sub 4} with 4wt% Y{sub 2}O{sub 3} (NCX-5101) and for a siliconized SiC (NT230) for various geometries including: butt joins, curved joins and shaft to disk joins. In addition, more extensive mechanical characterization of silicon nitride joins to enhance the predictive capabilities of the analytical/numerical models for structural components in advanced heat engines was provided. Mechanical evaluation were performed by: flexure strength at 22 C and 1,370 C, stress rupture at 1,370 C, high temperature creep, 22 C tensile testing and spin tests. While the silicon nitride joins were produced with sufficient integrity for many applications, the lower join strength would limit its use in the more severe structural applications. Thus, the silicon carbide join quality was deemed unsatisfactory to advance to more complex, curved geometries. The silicon carbide joining methods covered within this contract, although not entirely successful, have emphasized the need to focus future efforts upon ways to obtain a homogeneous, well sintered parent/join interface prior to siliconization. In conclusion, the improved definition of the silicon carbide joining problem obtained by efforts during this contract have provided avenues for future work that could successfully obtain heat engine quality joins.

  6. Silicon heterojunction transistor

    International Nuclear Information System (INIS)

    Matsushita, T.; Oh-uchi, N.; Hayashi, H.; Yamoto, H.

    1979-01-01

    SIPOS (Semi-insulating polycrystalline silicon) which is used as a surface passivation layer for highly reliable silicon devices constitutes a good heterojunction for silicon. P- or B-doped SIPOS has been used as the emitter material of a heterojunction transistor with the base and collector of silicon. An npn SIPOS-Si heterojunction transistor showing 50 times the current gain of an npn silicon homojunction transistor has been realized by high-temperature treatments in nitrogen and low-temperature annealing in hydrogen or forming gas

  7. The chemistry of silicon

    CERN Document Server

    Rochow, E G; Emeléus, H J; Nyholm, Ronald

    1975-01-01

    Pergamon Texts in Organic Chemistry, Volume 9: The Chemistry of Silicon presents information essential in understanding the chemical properties of silicon. The book first covers the fundamental aspects of silicon, such as its nuclear, physical, and chemical properties. The text also details the history of silicon, its occurrence and distribution, and applications. Next, the selection enumerates the compounds and complexes of silicon, along with organosilicon compounds. The text will be of great interest to chemists and chemical engineers. Other researchers working on research study involving s

  8. Position-controlled epitaxial III-V nanowires on silicon

    NARCIS (Netherlands)

    Roest, A.L.; Verheijen, M.A.; Wunnicke, O.; Serafin, S.N.; Wondergem, H.J.; Bakkers, E.P.A.M.

    2006-01-01

    We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction

  9. Generation and manipulation of entangled photons on silicon chips

    Directory of Open Access Journals (Sweden)

    Matsuda Nobuyuki

    2016-08-01

    Full Text Available Integrated quantum photonics is now seen as one of the promising approaches to realize scalable quantum information systems. With optical waveguides based on silicon photonics technologies, we can realize quantum optical circuits with a higher degree of integration than with silica waveguides. In addition, thanks to the large nonlinearity observed in silicon nanophotonic waveguides, we can implement active components such as entangled photon sources on a chip. In this paper, we report recent progress in integrated quantum photonic circuits based on silicon photonics. We review our work on correlated and entangled photon-pair sources on silicon chips, using nanoscale silicon waveguides and silicon photonic crystal waveguides. We also describe an on-chip quantum buffer realized using the slow-light effect in a silicon photonic crystal waveguide. As an approach to combine the merits of different waveguide platforms, a hybrid quantum circuit that integrates a silicon-based photon-pair source and a silica-based arrayed waveguide grating is also presented.

  10. 'Integration'

    DEFF Research Database (Denmark)

    Olwig, Karen Fog

    2011-01-01

    , while the countries have adopted disparate policies and ideologies, differences in the actual treatment and attitudes towards immigrants and refugees in everyday life are less clear, due to parallel integration programmes based on strong similarities in the welfare systems and in cultural notions...... of equality in the three societies. Finally, it shows that family relations play a central role in immigrants’ and refugees’ establishment of a new life in the receiving societies, even though the welfare society takes on many of the social and economic functions of the family....

  11. In-vitro bioactivity, biocorrosion and antibacterial activity of silicon integrated hydroxyapatite/chitosan composite coating on 316 L stainless steel implants.

    Science.gov (United States)

    Sutha, S; Kavitha, K; Karunakaran, G; Rajendran, V

    2013-10-01

    A simple and effective ultrasonication method was applied for the preparation of 0, 0.4, 0.8, 1.0 and 1.6 wt% silicon substituted hydroxyapatite (HAp) (SH). The Ca/P ratio of the synthesised SH nanoparticles were in the range of 1.58-1.70. Morphological changes were noticed in HAp with respect to the amount of Si from 0 to 1.6 wt%. The morphology of the particles changed from spherical shape to rod-like morphology with respect to the amount of Si which was confirmed using transmission electron microscopy. X-ray diffraction studies confirm the formation of phase pure SH nanoparticles without any secondary phase. Chitosan (CTS) blended SH nanocomposites coating on surgical grade 316 L stainless steel (316 L SS) implant was made by spin coating technique. The surface of the coated implant was characterised using scanning electron microscopy which confirms the uniform coating without cracks and pores. The increased corrosion resistance of the 1.6 wt% of SH/CTS-coated SS implant in the simulated body fluid (SBF) indicates the long-term biostability of SH composite-coated ceramics in vitro than the 0 wt% SH/CTS. The testing of SH/CTS nanocomposites with gram-positive and gram-negative bacterial strains confirms that the antibacterial ability improves with the higher substitution of Si. In addition, formation of bone-like apatite layer on the SH/CTS-coated implant in SBF was studied through SEM analysis and it confirms the ability to increase the HAp formation on the surface of 1.0 wt% SH/CTS-coated 316 L SS implant. Copyright © 2013 Elsevier B.V. All rights reserved.

  12. A study of luminescence from silicon-rich silica fabricated by plasma enhanced chemical vapour deposition

    International Nuclear Information System (INIS)

    Trwoga, P.F.

    1998-01-01

    Silicon is the most studied electronic material known to man and dominates the electronics industry in its use as a semiconductors for nearly all integrated electronics. However, optoelectronics is almost entirely based on III-V materials. This technology is used because silicon is a very inefficient light source, whereas the III-V band structure can lend itself to efficient light emission by electron injection. However, due to the overwhelming dominance of silicon based electronics it is still a highly desirable goal to generate light efficiently from silicon based materials. Recently, studies have demonstrated that efficient visible luminescence can be obtained from certain novel forms of silicon. These materials include porous silicon, hydrogenated amorphous silicon, and silicon-rich silica (SiO x x x is studied in detail; in addition, electroluminescence and rare-earth doping of silicon-rich silica is also addressed. (author)

  13. Neuromorphic photonic networks using silicon photonic weight banks.

    Science.gov (United States)

    Tait, Alexander N; de Lima, Thomas Ferreira; Zhou, Ellen; Wu, Allie X; Nahmias, Mitchell A; Shastri, Bhavin J; Prucnal, Paul R

    2017-08-07

    Photonic systems for high-performance information processing have attracted renewed interest. Neuromorphic silicon photonics has the potential to integrate processing functions that vastly exceed the capabilities of electronics. We report first observations of a recurrent silicon photonic neural network, in which connections are configured by microring weight banks. A mathematical isomorphism between the silicon photonic circuit and a continuous neural network model is demonstrated through dynamical bifurcation analysis. Exploiting this isomorphism, a simulated 24-node silicon photonic neural network is programmed using "neural compiler" to solve a differential system emulation task. A 294-fold acceleration against a conventional benchmark is predicted. We also propose and derive power consumption analysis for modulator-class neurons that, as opposed to laser-class neurons, are compatible with silicon photonic platforms. At increased scale, Neuromorphic silicon photonics could access new regimes of ultrafast information processing for radio, control, and scientific computing.

  14. Silicon nitride tri-layer vertical Y-junction and 3D couplers with arbitrary splitting ratio for photonic integrated circuits.

    Science.gov (United States)

    Shang, Kuanping; Pathak, Shibnath; Liu, Guangyao; Feng, Shaoqi; Li, Siwei; Lai, Weicheng; Yoo, S J B

    2017-05-01

    We designed and demonstrated a tri-layer Si3N4/SiO2 photonic integrated circuit capable of vertical interlayer coupling with arbitrary splitting ratios. Based on this multilayer photonic integrated circuit platform with each layer thicknesses of 150 nm, 50 nm, and 150 nm, we designed and simulated the vertical Y-junctions and 3D couplers with arbitrary power splitting ratios between 1:10 and 10:1 and with negligible(< -50 dB) reflection. Based on the design, we fabricated and demonstrated tri-layer vertical Y-junctions with the splitting ratios of 1:1 and 3:2 with excess optical losses of 0.230 dB. Further, we fabricated and demonstrated the 1 × 3 3D couplers with the splitting ratio of 1:1:4 for symmetric structures and variable splitting ratio for asymmetric structures.

  15. An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology.

    Science.gov (United States)

    Youn, Jin-Sung; Lee, Myung-Jae; Park, Kang-Yeob; Rücker, Holger; Choi, Woo-Young

    2012-12-17

    An optoelectronic integrated circuit (OEIC) receiver is realized with standard 0.25-μm SiGe BiCMOS technology for 850-nm optical interconnect applications. The OEIC receiver consists of a Si avalanche photodetector, a transimpedance amplifier with a DC-balanced buffer, a tunable equalizer, and a limiting amplifier. The fabricated OEIC receiver successfully detects 12.5-Gb/s 2(31)-1 pseudorandom bit sequence optical data with the bit-error rate less than 10(-12) at incident optical power of -7 dBm. The OEIC core has 1000 μm x 280 μm chip area, and consumes 59 mW from 2.5-V supply. To the best of our knowledge, this OEIC receiver achieves the highest data rate with the smallest sensitivity as well as the best power efficiency among integrated OEIC receivers fabricated with standard Si technology.

  16. Effect of machining parameters on surface integrity of silicon carbide ceramic using end electric discharge milling and mechanical grinding hybrid machining

    International Nuclear Information System (INIS)

    Ji, Renjie; Liu, Yonghong; Zhang, Yanzhen; Cai, Baoping; Li, Xiaopeng; Zheng, Chao

    2013-01-01

    A novel hybrid process that integrates end electric discharge (ED) milling and mechanical grinding is proposed. The process is able to effectively machine a large surface area on SiC ceramic with good surface quality and fine working environmental practice. The polarity, pulse on-time, and peak current are varied to explore their effects on the surface integrity, such as surface morphology, surface roughness, micro-cracks, and composition on the machined surface. The results show that positive tool polarity, short pulse on-time, and low peak current cause a fine surface finish. During the hybrid machining of SiC ceramic, the material is mainly removed by end ED milling at rough machining mode, whereas it is mainly removed by mechanical grinding at finish machining mode. Moreover, the material from the tool can transfer to the workpiece, and a combination reaction takes place during machining.

  17. An analog silicon retina with multichip configuration.

    Science.gov (United States)

    Kameda, Seiji; Yagi, Tetsuya

    2006-01-01

    The neuromorphic silicon retina is a novel analog very large scale integrated circuit that emulates the structure and the function of the retinal neuronal circuit. We fabricated a neuromorphic silicon retina, in which sample/hold circuits were embedded to generate fluctuation-suppressed outputs in the previous study [1]. The applications of this silicon retina, however, are limited because of a low spatial resolution and computational variability. In this paper, we have fabricated a multichip silicon retina in which the functional network circuits are divided into two chips: the photoreceptor network chip (P chip) and the horizontal cell network chip (H chip). The output images of the P chip are transferred to the H chip with analog voltages through the line-parallel transfer bus. The sample/hold circuits embedded in the P and H chips compensate for the pattern noise generated on the circuits, including the analog communication pathway. Using the multichip silicon retina together with an off-chip differential amplifier, spatial filtering of the image with an odd- and an even-symmetric orientation selective receptive fields was carried out in real time. The analog data transfer method in the present multichip silicon retina is useful to design analog neuromorphic multichip systems that mimic the hierarchical structure of neuronal networks in the visual system.

  18. High-density oxidized porous silicon

    International Nuclear Information System (INIS)

    Gharbi, Ahmed; Souifi, Abdelkader; Remaki, Boudjemaa; Halimaoui, Aomar; Bensahel, Daniel

    2012-01-01

    We have studied oxidized porous silicon (OPS) properties using Fourier transform infraRed (FTIR) spectroscopy and capacitance–voltage C–V measurements. We report the first experimental determination of the optimum porosity allowing the elaboration of high-density OPS insulators. This is an important contribution to the research of thick integrated electrical insulators on porous silicon based on an optimized process ensuring dielectric quality (complete oxidation) and mechanical and chemical reliability (no residual pores or silicon crystallites). Through the measurement of the refractive indexes of the porous silicon (PS) layer before and after oxidation, one can determine the structural composition of the OPS material in silicon, air and silica. We have experimentally demonstrated that a porosity approaching 56% of the as-prepared PS layer is required to ensure a complete oxidation of PS without residual silicon crystallites and with minimum porosity. The effective dielectric constant values of OPS materials determined from capacitance–voltage C–V measurements are discussed and compared to FTIR results predictions. (paper)

  19. Chiral silicon nanostructures

    International Nuclear Information System (INIS)

    Schubert, E.; Fahlteich, J.; Hoeche, Th.; Wagner, G.; Rauschenbach, B.

    2006-01-01

    Glancing angle ion beam assisted deposition is used for the growth of amorphous silicon nanospirals onto [0 0 1] silicon substrates in a temperature range from room temperature to 475 deg. C. The nanostructures are post-growth annealed in an argon atmosphere at various temperatures ranging from 400 deg. C to 800 deg. C. Recrystallization of silicon within the persisting nanospiral configuration is demonstrated for annealing temperatures above 800 deg. C. Transmission electron microscopy and Raman spectroscopy are used to characterize the silicon samples prior and after temperature treatment

  20. Silicon web process development

    Science.gov (United States)

    Duncan, C. S.; Seidensticker, R. G.; Mchugh, J. P.; Skutch, M. E.; Driggers, J. M.; Hopkins, R. H.

    1981-01-01

    The silicon web process takes advantage of natural crystallographic stabilizing forces to grow long, thin single crystal ribbons directly from liquid silicon. The ribbon, or web, is formed by the solidification of a liquid film supported by surface tension between two silicon filaments, called dendrites, which border the edges of the growing strip. The ribbon can be propagated indefinitely by replenishing the liquid silicon as it is transformed to crystal. The dendritic web process has several advantages for achieving low cost, high efficiency solar cells. These advantages are discussed.

  1. Stable configurations of graphene on silicon

    Energy Technology Data Exchange (ETDEWEB)

    Javvaji, Brahmanandam; Shenoy, Bhamy Maithry [Department of Aerospace Engineering, Indian Institute of Science, Bangalore 560012 (India); Mahapatra, D. Roy, E-mail: droymahapatra@aero.iisc.ernet.in [Department of Aerospace Engineering, Indian Institute of Science, Bangalore 560012 (India); Ravikumar, Abhilash [Department of Metallurgical and Materials Engineering, National Institute of Technology Karnataka, Surathkal 575025 (India); Hegde, G.M. [Center for Nano Science and Engineering, Indian Institute of Science, Bangalore 560012 (India); Rizwan, M.R. [Department of Metallurgical and Materials Engineering, National Institute of Technology Karnataka, Surathkal 575025 (India)

    2017-08-31

    Highlights: • Simulations of epitaxial growth process for silicon–graphene system is performed. • Identified the most favourable orientation of graphene sheet on silicon substrate. • Atomic local strain due to the silicon–carbon bond formation is analyzed. - Abstract: Integration of graphene on silicon-based nanostructures is crucial in advancing graphene based nanoelectronic device technologies. The present paper provides a new insight on the combined effect of graphene structure and silicon (001) substrate on their two-dimensional anisotropic interface. Molecular dynamics simulations involving the sub-nanoscale interface reveal a most favourable set of temperature independent orientations of the monolayer graphene sheet with an angle of ∽15° between its armchair direction and [010] axis of the silicon substrate. While computing the favorable stable orientations, both the translation and the rotational vibrations of graphene are included. The possible interactions between the graphene atoms and the silicon atoms are identified from their coordination. Graphene sheet shows maximum bonding density with bond length 0.195 nm and minimum bond energy when interfaced with silicon substrate at 15° orientation. Local deformation analysis reveals probability distribution with maximum strain levels of 0.134, 0.047 and 0.029 for 900 K, 300 K and 100 K, respectively in silicon surface for 15° oriented graphene whereas the maximum probable strain in graphene is about 0.041 irrespective of temperature. Silicon–silicon dimer formation is changed due to silicon–carbon bonding. These results may help further in band structure engineering of silicon–graphene lattice.

  2. Fabrication of detectors and transistors on high-resistivity silicon

    International Nuclear Information System (INIS)

    Holland, S.

    1988-06-01

    A new process for the fabrication of silicon p-i-n diode radiation detectors is described. The utilization of backside gettering in the fabrication process results in the actual physical removal of detrimental impurities from critical device regions. This reduces the sensitivity of detector properties to processing variables while yielding low diode reverse-leakage currents. In addition, gettering permits the use of processing temperatures compatible with integrated-circuit fabrication. P-channel MOSFETs and silicon p-i-n diodes have been fabricated simultaneously on 10 kΩ/centerreverse arrowdot/cm silicon using conventional integrated-circuit processing techniques. 25 refs., 5 figs

  3. A review of recent progress in heterogeneous silicon tandem solar cells

    Science.gov (United States)

    Yamaguchi, Masafumi; Lee, Kan-Hua; Araki, Kenji; Kojima, Nobuaki

    2018-04-01

    Silicon solar cells are the most established solar cell technology and are expected to dominate the market in the near future. As state-of-the-art silicon solar cells are approaching the Shockley-Queisser limit, stacking silicon solar cells with other photovoltaic materials to form multi-junction devices is an obvious pathway to further raise the efficiency. However, many challenges stand in the way of fully realizing the potential of silicon tandem solar cells because heterogeneously integrating silicon with other materials often degrades their qualities. Recently, above or near 30% silicon tandem solar cell has been demonstrated, showing the promise of achieving high-efficiency and low-cost solar cells via silicon tandem. This paper reviews the recent progress of integrating solar cell with other mainstream solar cell materials. The first part of this review focuses on the integration of silicon with III-V semiconductor solar cells, which is a long-researched topic since the emergence of III-V semiconductors. We will describe the main approaches—heteroepitaxy, wafer bonding and mechanical stacking—as well as other novel approaches. The second part introduces the integration of silicon with polycrystalline thin-film solar cells, mainly perovskites on silicon solar cells because of its rapid progress recently. We will also use an analytical model to compare the material qualities of different types of silicon tandem solar cells and project their practical efficiency limits.

  4. Process for forming a porous silicon member in a crystalline silicon member

    Science.gov (United States)

    Northrup, M. Allen; Yu, Conrad M.; Raley, Norman F.

    1999-01-01

    Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gasses in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes. Examples that benefit from specific pore sized porous silicon are chemical/biological filters and thermally-activated flow devices with active or adjacent surfaces such as electrodes or heaters.

  5. The special trench design near the through silicon vias (TSVs) to reduce the keep-out zone for application in three-dimensional integral circuits

    International Nuclear Information System (INIS)

    Liao, M-H

    2013-01-01

    Trench structure is designed and used to release process induced stress, resulting from the different material thermal expansion coefficients, in three-dimensional integral circuits (3DICs). The stress in the designed trench structure is measured by atomic force microscope Raman technique experimentally, and simulated by the full process simulation model. With the help of this simulation model, the optimized trench structure near the copper-filled TSV is designed and reported. The experimental data demonstrate that the tensile stress near the TSV can be reduced from 600 MPa to 150 MPa and the corresponding keep-out zone (KOZ) can also be decreased ∼4 times with the designed trench structure having a depth of 10 µm and spacing distance of 8 µm to the TSV. This work provides one potential solution to release process induced stress for real application of 3DICs. (paper)

  6. Nonlinear silicon photonics

    Science.gov (United States)

    Tsia, Kevin K.; Jalali, Bahram

    2010-05-01

    An intriguing optical property of silicon is that it exhibits a large third-order optical nonlinearity, with orders-ofmagnitude larger than that of silica glass in the telecommunication band. This allows efficient nonlinear optical interaction at relatively low power levels in a small footprint. Indeed, we have witnessed a stunning progress in harnessing the Raman and Kerr effects in silicon as the mechanisms for enabling chip-scale optical amplification, lasing, and wavelength conversion - functions that until recently were perceived to be beyond the reach of silicon. With all the continuous efforts developing novel techniques, nonlinear silicon photonics is expected to be able to reach even beyond the prior achievements. Instead of providing a comprehensive overview of this field, this manuscript highlights a number of new branches of nonlinear silicon photonics, which have not been fully recognized in the past. In particular, they are two-photon photovoltaic effect, mid-wave infrared (MWIR) silicon photonics, broadband Raman effects, inverse Raman scattering, and periodically-poled silicon (PePSi). These novel effects and techniques could create a new paradigm for silicon photonics and extend its utility beyond the traditionally anticipated applications.

  7. Silicon carbide microsystems for harsh environments

    CERN Document Server

    Wijesundara, Muthu B J

    2011-01-01

    Silicon Carbide Microsystems for Harsh Environments reviews state-of-the-art Silicon Carbide (SiC) technologies that, when combined, create microsystems capable of surviving in harsh environments, technological readiness of the system components, key issues when integrating these components into systems, and other hurdles in harsh environment operation. The authors use the SiC technology platform suite the model platform for developing harsh environment microsystems and then detail the current status of the specific individual technologies (electronics, MEMS, packaging). Additionally, methods

  8. Mode-locked silicon evanescent lasers.

    Science.gov (United States)

    Koch, Brian R; Fang, Alexander W; Cohen, Oded; Bowers, John E

    2007-09-03

    We demonstrate electrically pumped lasers on silicon that produce pulses at repetition rates up to 40 GHz. The mode locked lasers generate 4 ps pulses with low jitter and extinction ratios above 18 dB, making them suitable for data and telecommunication transmitters and for clock generation and distribution. Results of both passive and hybrid mode locking are discussed. This type of device could enable new silicon based integrated technologies, such as optical time division multiplexing (OTDM), wavelength division multiplexing (WDM), and optical code division multiple access (OCDMA).

  9. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.; Rojas, Jhonathan Prieto; Ahmed, Sally; Hussain, Aftab M.; Inayat, Salman Bin; Hussain, Muhammad Mustafa

    2013-01-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  10. Silicon fabric for multi-functional applications

    KAUST Repository

    Sevilla, Galo T.

    2013-06-01

    This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

  11. Silicon germanium mask for deep silicon etching

    KAUST Repository

    Serry, Mohamed

    2014-07-29

    Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF.sub.6/O.sub.2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from -80 degrees Celsius to -140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.

  12. Silicon germanium mask for deep silicon etching

    KAUST Repository

    Serry, Mohamed; Rubin, Andrew; Refaat, Mohamed; Sedky, Sherif; Abdo, Mohammad

    2014-01-01

    Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF.sub.6/O.sub.2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from -80 degrees Celsius to -140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.

  13. Micromachined silicon seismic accelerometer development

    Energy Technology Data Exchange (ETDEWEB)

    Barron, C.C.; Fleming, J.G.; Montague, S. [and others

    1996-08-01

    Batch-fabricated silicon seismic transducers could revolutionize the discipline of seismic monitoring by providing inexpensive, easily deployable sensor arrays. Our ultimate goal is to fabricate seismic sensors with sensitivity and noise performance comparable to short-period seismometers in common use. We expect several phases of development will be required to accomplish that level of performance. Traditional silicon micromachining techniques are not ideally suited to the simultaneous fabrication of a large proof mass and soft suspension, such as one needs to achieve the extreme sensitivities required for seismic measurements. We have therefore developed a novel {open_quotes}mold{close_quotes} micromachining technology that promises to make larger proof masses (in the 1-10 mg range) possible. We have successfully integrated this micromolding capability with our surface-micromachining process, which enables the formation of soft suspension springs. Our calculations indicate that devices made in this new integrated technology will resolve down to at least sub-{mu}G signals, and may even approach the 10{sup -10} G/{radical}Hz acceleration levels found in the low-earth-noise model.

  14. Process for making silicon

    Science.gov (United States)

    Levin, Harry (Inventor)

    1987-01-01

    A reactor apparatus (10) adapted for continuously producing molten, solar grade purity elemental silicon by thermal reaction of a suitable precursor gas, such as silane (SiH.sub.4), is disclosed. The reactor apparatus (10) includes an elongated reactor body (32) having graphite or carbon walls which are heated to a temperature exceeding the melting temperature of silicon. The precursor gas enters the reactor body (32) through an efficiently cooled inlet tube assembly (22) and a relatively thin carbon or graphite septum (44). The septum (44), being in contact on one side with the cooled inlet (22) and the heated interior of the reactor (32) on the other side, provides a sharp temperature gradient for the precursor gas entering the reactor (32) and renders the operation of the inlet tube assembly (22) substantially free of clogging. The precursor gas flows in the reactor (32) in a substantially smooth, substantially axial manner. Liquid silicon formed in the initial stages of the thermal reaction reacts with the graphite or carbon walls to provide a silicon carbide coating on the walls. The silicon carbide coated reactor is highly adapted for prolonged use for production of highly pure solar grade silicon. Liquid silicon (20) produced in the reactor apparatus (10) may be used directly in a Czochralski or other crystal shaping equipment.

  15. Hydrogen in amorphous silicon

    International Nuclear Information System (INIS)

    Peercy, P.S.

    1980-01-01

    The structural aspects of amorphous silicon and the role of hydrogen in this structure are reviewed with emphasis on ion implantation studies. In amorphous silicon produced by Si ion implantation of crystalline silicon, the material reconstructs into a metastable amorphous structure which has optical and electrical properties qualitatively similar to the corresponding properties in high-purity evaporated amorphous silicon. Hydrogen studies further indicate that these structures will accomodate less than or equal to 5 at.% hydrogen and this hydrogen is bonded predominantly in a monohydride (SiH 1 ) site. Larger hydrogen concentrations than this can be achieved under certain conditions, but the excess hydrogen may be attributed to defects and voids in the material. Similarly, glow discharge or sputter deposited amorphous silicon has more desirable electrical and optical properties when the material is prepared with low hydrogen concentration and monohydride bonding. Results of structural studies and hydrogen incorporation in amorphous silicon were discussed relative to the different models proposed for amorphous silicon

  16. Stretchable and foldable silicon-based electronics

    KAUST Repository

    Cavazos Sepulveda, Adrian Cesar

    2017-03-30

    Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

  17. Amorphous silicon detectors in positron emission tomography

    Energy Technology Data Exchange (ETDEWEB)

    Conti, M. (Istituto Nazionale di Fisica Nucleare, Pisa (Italy) Lawrence Berkeley Lab., CA (USA)); Perez-Mendez, V. (Lawrence Berkeley Lab., CA (USA))

    1989-12-01

    The physics of the detection process is studied and the performances of different Positron Emission Tomography (PET) system are evaluated by theoretical calculation and/or Monte Carlo Simulation (using the EGS code) in this paper, whose table of contents can be summarized as follows: a brief introduction to amorphous silicon detectors and some useful equation is presented; a Tantalum/Amorphous Silicon PET project is studied and the efficiency of the systems is studied by Monte Carlo Simulation; two similar CsI/Amorphous Silicon PET projects are presented and their efficiency and spatial resolution are studied by Monte Carlo Simulation, light yield and time characteristics of the scintillation light are discussed for different scintillators; some experimental result on light yield measurements are presented; a Xenon/Amorphous Silicon PET is presented, the physical mechanism of scintillation in Xenon is explained, a theoretical estimation of total light yield in Xenon and the resulting efficiency is discussed altogether with some consideration of the time resolution of the system; the amorphous silicon integrated electronics is presented, total noise and time resolution are evaluated in each of our applications; the merit parameters {epsilon}{sup 2}{tau}'s are evaluated and compared with other PET systems and conclusions are drawn; and a complete reference list for Xenon scintillation light physics and its applications is presented altogether with the listing of the developed simulation programs.

  18. Amorphous silicon detectors in positron emission tomography

    International Nuclear Information System (INIS)

    Conti, M.; Perez-Mendez, V.

    1989-12-01

    The physics of the detection process is studied and the performances of different Positron Emission Tomography (PET) system are evaluated by theoretical calculation and/or Monte Carlo Simulation (using the EGS code) in this paper, whose table of contents can be summarized as follows: a brief introduction to amorphous silicon detectors and some useful equation is presented; a Tantalum/Amorphous Silicon PET project is studied and the efficiency of the systems is studied by Monte Carlo Simulation; two similar CsI/Amorphous Silicon PET projects are presented and their efficiency and spatial resolution are studied by Monte Carlo Simulation, light yield and time characteristics of the scintillation light are discussed for different scintillators; some experimental result on light yield measurements are presented; a Xenon/Amorphous Silicon PET is presented, the physical mechanism of scintillation in Xenon is explained, a theoretical estimation of total light yield in Xenon and the resulting efficiency is discussed altogether with some consideration of the time resolution of the system; the amorphous silicon integrated electronics is presented, total noise and time resolution are evaluated in each of our applications; the merit parameters ε 2 τ's are evaluated and compared with other PET systems and conclusions are drawn; and a complete reference list for Xenon scintillation light physics and its applications is presented altogether with the listing of the developed simulation programs

  19. Stretchable and foldable silicon-based electronics

    KAUST Repository

    Cavazos Sepulveda, Adrian Cesar; Diaz Cordero, M. S.; Carreno, Armando Arpys Arevalo; Nassar, Joanna M.; Hussain, Muhammad Mustafa

    2017-01-01

    Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

  20. Silicon micromachined vibrating gyroscopes

    Science.gov (United States)

    Voss, Ralf

    1997-09-01

    This work gives an overview of silicon micromachined vibrating gyroscopes. Market perspectives and fields of application are pointed out. The advantage of using silicon micromachining is discussed and estimations of the desired performance, especially for automobiles are given. The general principle of vibrating gyroscopes is explained. Vibrating silicon gyroscopes can be divided into seven classes. for each class the characteristic principle is presented and examples are given. Finally a specific sensor, based on a tuning fork for automotive applications with a sensitivity of 250(mu) V/degrees is described in detail.

  1. Porous silicon gettering

    Energy Technology Data Exchange (ETDEWEB)

    Tsuo, Y.S.; Menna, P.; Pitts, J.R. [National Renewable Energy Lab., Golden, CO (United States)] [and others

    1996-05-01

    The authors have studied a novel extrinsic gettering method that uses the large surface areas produced by a porous-silicon etch as gettering sites. The annealing step of the gettering used a high-flux solar furnace. They found that a high density of photons during annealing enhanced the impurity diffusion to the gettering sites. The authors used metallurgical-grade Si (MG-Si) prepared by directional solidification casing as the starting material. They propose to use porous-silicon-gettered MG-Si as a low-cost epitaxial substrate for polycrystalline silicon thin-film growth.

  2. Silicon etch process

    International Nuclear Information System (INIS)

    Day, D.J.; White, J.C.

    1984-01-01

    A silicon etch process wherein an area of silicon crystal surface is passivated by radiation damage and non-planar structure produced by subsequent anisotropic etching. The surface may be passivated by exposure to an energetic particle flux - for example an ion beam from an arsenic, boron, phosphorus, silicon or hydrogen source, or an electron beam. Radiation damage may be used for pattern definition and/or as an etch stop. Ethylenediamine pyrocatechol or aqueous potassium hydroxide anisotropic etchants may be used. The radiation damage may be removed after etching by thermal annealing. (author)

  3. Silicon nanowire hybrid photovoltaics

    KAUST Repository

    Garnett, Erik C.; Peters, Craig; Brongersma, Mark; Cui, Yi; McGehee, Mike

    2010-01-01

    Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

  4. Silicon nanowire hybrid photovoltaics

    KAUST Repository

    Garnett, Erik C.

    2010-06-01

    Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

  5. Controlling the flow of light with silicon nanostructures

    International Nuclear Information System (INIS)

    Park, W

    2010-01-01

    Silicon is an important material for integrated photonics applications. High refractive index and transparency in the infrared region makes it an ideal platform to implement nanostructures for novel optical devices. We fabricated silicon photonic crystals and experimentally demonstrated negative refraction and self-collimation. We also used heterodyne near-field scanning optical microscope to directly visualize the anomalous wavefronts. When the periodicity is much smaller than wavelength, silicon photonic crystal can be described by the effective medium theory. By engineering effective refractive index with silicon nanorod size, we demonstrated an all-dielectric cloak structure which can hide objects in front of a highly reflecting plane. The work discussed in this review shows the powerful design flexibility and versatility of silicon nanostructures

  6. CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-12-01

    Today\\'s mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

  7. CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Kutbee, Arwa T.; Hanna, Amir; Hussain, Muhammad Mustafa

    2014-01-01

    Today's mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

  8. Joining elements of silicon carbide

    International Nuclear Information System (INIS)

    Olson, B.A.

    1979-01-01

    A method of joining together at least two silicon carbide elements (e.g.in forming a heat exchanger) is described, comprising subjecting to sufficiently non-oxidizing atmosphere and sufficiently high temperature, material placed in space between the elements. The material consists of silicon carbide particles, carbon and/or a precursor of carbon, and silicon, such that it forms a joint joining together at least two silicon carbide elements. At least one of the elements may contain silicon. (author)

  9. Photoluminescence and electrical properties of silicon oxide and silicon nitride superlattices containing silicon nanocrystals

    International Nuclear Information System (INIS)

    Shuleiko, D V; Ilin, A S

    2016-01-01

    Photoluminescence and electrical properties of superlattices with thin (1 to 5 nm) alternating silicon-rich silicon oxide or silicon-rich silicon nitride, and silicon oxide or silicon nitride layers containing silicon nanocrystals prepared by plasma-enhanced chemical vapor deposition with subsequent annealing were investigated. The entirely silicon oxide based superlattices demonstrated photoluminescence peak shift due to quantum confinement effect. Electrical measurements showed the hysteresis effect in the vicinity of zero voltage due to structural features of the superlattices from SiOa 93 /Si 3 N 4 and SiN 0 . 8 /Si 3 N 4 layers. The entirely silicon nitride based samples demonstrated resistive switching effect, comprising an abrupt conductivity change at about 5 to 6 V with current-voltage characteristic hysteresis. The samples also demonstrated efficient photoluminescence with maximum at ∼1.4 eV, due to exiton recombination in silicon nanocrystals. (paper)

  10. Silicon microfabricated beam expander

    International Nuclear Information System (INIS)

    Othman, A.; Ibrahim, M. N.; Hamzah, I. H.; Sulaiman, A. A.; Ain, M. F.

    2015-01-01

    The feasibility design and development methods of silicon microfabricated beam expander are described. Silicon bulk micromachining fabrication technology is used in producing features of the structure. A high-precision complex 3-D shape of the expander can be formed by exploiting the predictable anisotropic wet etching characteristics of single-crystal silicon in aqueous Potassium-Hydroxide (KOH) solution. The beam-expander consist of two elements, a micromachined silicon reflector chamber and micro-Fresnel zone plate. The micro-Fresnel element is patterned using lithographic methods. The reflector chamber element has a depth of 40 µm, a diameter of 15 mm and gold-coated surfaces. The impact on the depth, diameter of the chamber and absorption for improved performance are discussed

  11. Silicon microfabricated beam expander

    Science.gov (United States)

    Othman, A.; Ibrahim, M. N.; Hamzah, I. H.; Sulaiman, A. A.; Ain, M. F.

    2015-03-01

    The feasibility design and development methods of silicon microfabricated beam expander are described. Silicon bulk micromachining fabrication technology is used in producing features of the structure. A high-precision complex 3-D shape of the expander can be formed by exploiting the predictable anisotropic wet etching characteristics of single-crystal silicon in aqueous Potassium-Hydroxide (KOH) solution. The beam-expander consist of two elements, a micromachined silicon reflector chamber and micro-Fresnel zone plate. The micro-Fresnel element is patterned using lithographic methods. The reflector chamber element has a depth of 40 µm, a diameter of 15 mm and gold-coated surfaces. The impact on the depth, diameter of the chamber and absorption for improved performance are discussed.

  12. Silicon microfabricated beam expander

    Energy Technology Data Exchange (ETDEWEB)

    Othman, A., E-mail: aliman@ppinang.uitm.edu.my; Ibrahim, M. N.; Hamzah, I. H.; Sulaiman, A. A. [Faculty of Electrical Engineering, Universiti Teknologi MARA Malaysia, 40450, Shah Alam, Selangor (Malaysia); Ain, M. F. [School of Electrical and Electronic Engineering, Engineering Campus, Universiti Sains Malaysia, Seri Ampangan, 14300,Nibong Tebal, Pulau Pinang (Malaysia)

    2015-03-30

    The feasibility design and development methods of silicon microfabricated beam expander are described. Silicon bulk micromachining fabrication technology is used in producing features of the structure. A high-precision complex 3-D shape of the expander can be formed by exploiting the predictable anisotropic wet etching characteristics of single-crystal silicon in aqueous Potassium-Hydroxide (KOH) solution. The beam-expander consist of two elements, a micromachined silicon reflector chamber and micro-Fresnel zone plate. The micro-Fresnel element is patterned using lithographic methods. The reflector chamber element has a depth of 40 µm, a diameter of 15 mm and gold-coated surfaces. The impact on the depth, diameter of the chamber and absorption for improved performance are discussed.

  13. Porous Silicon Nanowires

    Science.gov (United States)

    Qu, Yongquan; Zhou, Hailong; Duan, Xiangfeng

    2011-01-01

    In this minreview, we summarize recent progress in the synthesis, properties and applications of a new type of one-dimensional nanostructures — single crystalline porous silicon nanowires. The growth of porous silicon nanowires starting from both p- and n-type Si wafers with a variety of dopant concentrations can be achieved through either one-step or two-step reactions. The mechanistic studies indicate the dopant concentration of Si wafers, oxidizer concentration, etching time and temperature can affect the morphology of the as-etched silicon nanowires. The porous silicon nanowires are both optically and electronically active and have been explored for potential applications in diverse areas including photocatalysis, lithium ion battery, gas sensor and drug delivery. PMID:21869999

  14. Surface thiolation of silicon for antifouling application.

    Science.gov (United States)

    Zhang, Xiaoning; Gao, Pei; Hollimon, Valerie; Brodus, DaShan; Johnson, Arion; Hu, Hongmei

    2018-02-07

    Thiol groups grafted silicon surface was prepared as previously described. 1H,1H,2H,2H-perfluorodecanethiol (PFDT) molecules were then immobilized on such a surface through disulfide bonds formation. To investigate the contribution of PFDT coating to antifouling, the adhesion behaviors of Botryococcus braunii (B. braunii) and Escherichia coli (E. coli) were studied through biofouling assays in the laboratory. The representative microscope images suggest reduced B. braunii and E. coli accumulation densities on PFDT integrated silicon substrate. However, the antifouling performance of PFDT integrated silicon substrate decreased over time. By incubating the aged substrate in 10 mM TCEP·HCl solution for 1 h, the fouled PFDT coating could be removed as the disulfide bonds were cleaved, resulting in reduced absorption of algal cells and exposure of non-fouled silicon substrate surface. Our results indicate that the thiol-terminated substrate can be potentially useful for restoring the fouled surface, as well as maximizing the effective usage of the substrate.

  15. Nanostructured silicon for thermoelectric

    Science.gov (United States)

    Stranz, A.; Kähler, J.; Waag, A.; Peiner, E.

    2011-06-01

    Thermoelectric modules convert thermal energy into electrical energy and vice versa. At present bismuth telluride is the most widely commercial used material for thermoelectric energy conversion. There are many applications where bismuth telluride modules are installed, mainly for refrigeration. However, bismuth telluride as material for energy generation in large scale has some disadvantages. Its availability is limited, it is hot stable at higher temperatures (>250°C) and manufacturing cost is relatively high. An alternative material for energy conversion in the future could be silicon. The technological processing of silicon is well advanced due to the rapid development of microelectronics in recent years. Silicon is largely available and environmentally friendly. The operating temperature of silicon thermoelectric generators can be much higher than of bismuth telluride. Today silicon is rarely used as a thermoelectric material because of its high thermal conductivity. In order to use silicon as an efficient thermoelectric material, it is necessary to reduce its thermal conductivity, while maintaining high electrical conductivity and high Seebeck coefficient. This can be done by nanostructuring into arrays of pillars. Fabrication of silicon pillars using ICP-cryogenic dry etching (Inductive Coupled Plasma) will be described. Their uniform height of the pillars allows simultaneous connecting of all pillars of an array. The pillars have diameters down to 180 nm and their height was selected between 1 micron and 10 microns. Measurement of electrical resistance of single silicon pillars will be presented which is done in a scanning electron microscope (SEM) equipped with nanomanipulators. Furthermore, measurement of thermal conductivity of single pillars with different diameters using the 3ω method will be shown.

  16. Study on Silicon detectors

    International Nuclear Information System (INIS)

    Gervino, G.; Boero, M.; Manfredotti, C.; Icardi, M.; Gabutti, A.; Bagnolatti, E.; Monticone, E.

    1990-01-01

    Prototypes of Silicon microstrip detectors and Silicon large area detectors (3x2 cm 2 ), realized directly by our group, either by ion implantation or by diffusion are presented. The physical detector characteristics and their performances determined by exposing them to different radioactive sources and the results of extensive tests on passivation, where new technological ways have been investigated, are discussed. The calculation of the different terms contributing to the total dark current is reported

  17. Amorphous silicon crystalline silicon heterojunction solar cells

    CERN Document Server

    Fahrner, Wolfgang Rainer

    2013-01-01

    Amorphous Silicon/Crystalline Silicon Solar Cells deals with some typical properties of heterojunction solar cells, such as their history, the properties and the challenges of the cells, some important measurement tools, some simulation programs and a brief survey of the state of the art, aiming to provide an initial framework in this field and serve as a ready reference for all those interested in the subject. This book helps to "fill in the blanks" on heterojunction solar cells. Readers will receive a comprehensive overview of the principles, structures, processing techniques and the current developmental states of the devices. Prof. Dr. Wolfgang R. Fahrner is a professor at the University of Hagen, Germany and Nanchang University, China.

  18. Oxygen defect processes in silicon and silicon germanium

    KAUST Repository

    Chroneos, A.; Sgourou, E. N.; Londos, C. A.; Schwingenschlö gl, Udo

    2015-01-01

    Silicon and silicon germanium are the archetypical elemental and alloy semiconductor materials for nanoelectronic, sensor, and photovoltaic applications. The investigation of radiation induced defects involving oxygen, carbon, and intrinsic defects is important for the improvement of devices as these defects can have a deleterious impact on the properties of silicon and silicon germanium. In the present review, we mainly focus on oxygen-related defects and the impact of isovalent doping on their properties in silicon and silicon germanium. The efficacy of the isovalent doping strategies to constrain the oxygen-related defects is discussed in view of recent infrared spectroscopy and density functional theory studies.

  19. Colloidal characterization of ultrafine silicon carbide and silicon nitride powders

    Science.gov (United States)

    Whitman, Pamela K.; Feke, Donald L.

    1986-01-01

    The effects of various powder treatment strategies on the colloid chemistry of aqueous dispersions of silicon carbide and silicon nitride are examined using a surface titration methodology. Pretreatments are used to differentiate between the true surface chemistry of the powders and artifacts resulting from exposure history. Silicon nitride powders require more extensive pretreatment to reveal consistent surface chemistry than do silicon carbide powders. As measured by titration, the degree of proton adsorption from the suspending fluid by pretreated silicon nitride and silicon carbide powders can both be made similar to that of silica.

  20. Oxygen defect processes in silicon and silicon germanium

    KAUST Repository

    Chroneos, A.

    2015-06-18

    Silicon and silicon germanium are the archetypical elemental and alloy semiconductor materials for nanoelectronic, sensor, and photovoltaic applications. The investigation of radiation induced defects involving oxygen, carbon, and intrinsic defects is important for the improvement of devices as these defects can have a deleterious impact on the properties of silicon and silicon germanium. In the present review, we mainly focus on oxygen-related defects and the impact of isovalent doping on their properties in silicon and silicon germanium. The efficacy of the isovalent doping strategies to constrain the oxygen-related defects is discussed in view of recent infrared spectroscopy and density functional theory studies.

  1. Position-controlled epitaxial III-V nanowires on silicon

    Energy Technology Data Exchange (ETDEWEB)

    Roest, Aarnoud L; Verheijen, Marcel A; Wunnicke, Olaf; Serafin, Stacey; Wondergem, Harry; Bakkers, Erik P A M [Philips Research Laboratories, Professor Holstlaan 4, 5656 AA Eindhoven (Netherlands); Kavli Institute of NanoScience, Delft University of Technology, PO Box 5046, 2600 GA Delft (Netherlands)

    2006-06-14

    We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction pole figures and cross-sectional transmission electron microscopy. We show preliminary results of two-terminal electrical measurements of III-V nanowires grown on silicon. E-beam lithography was used to predefine the position of the nanowires.

  2. Position-controlled epitaxial III-V nanowires on silicon

    International Nuclear Information System (INIS)

    Roest, Aarnoud L; Verheijen, Marcel A; Wunnicke, Olaf; Serafin, Stacey; Wondergem, Harry; Bakkers, Erik P A M

    2006-01-01

    We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction pole figures and cross-sectional transmission electron microscopy. We show preliminary results of two-terminal electrical measurements of III-V nanowires grown on silicon. E-beam lithography was used to predefine the position of the nanowires

  3. The LHCb Silicon Tracker - Control system specific tools and challenges

    CERN Document Server

    Adeva, G; Esperante Pereira, D; Gallas, A; Pazos Alvarez, A; Perez Trigo, E; Rodriguez Perez, P; Saborido, J; Amhis, Y; Bay, A; Blanc, F; Bressieux, J; Conti, G; Dupertuis, F; Fave, V; Frei, R; Gauvin, N; Haefeli, G; Keune, A; Luisier, J; Marki, R; Muresan, R; Nakada, T; Needham, M; Knecht, M; Schneider, O; Tran, M; Anderson, J; Buechler, A; Bursche, A; Chiapolini, N; De Cian, M; Elsasser, C; Salzmann, C; Saornil Gamarra, S; Steiner, S; Steinkamp, O; Straumann, U; van Tilburg, J; Tobin, M; Vollhardt, A; Aquines Gutierrez, O; Bauer, C; Britsch, M; Maciuc, F; Schmelling, M; Voss, H; Iakovenko, V; Okhrimenko, O; Pugatch, V

    2014-01-01

    The Experiment Control System (ECS) of the LHCb Silicon Tracker sub-detectors is built on the integrated LHCb ECS framework. Although all LHCb sub-detectors use the same framework and follow the same guidelines, the Silicon Tracker control system uses some interesting additional features in terms of operation and monitoring. The main details are described in this document. Since its design, the Silicon Tracker control system has been continuously evolving in a quite disorganized way. Some major maintenance activities are required to be able to keep improving. A description of those activities can also be found here.

  4. Demonstration of slot-waveguide structures on silicon nitride / silicon oxide platform.

    Science.gov (United States)

    Barrios, C A; Sánchez, B; Gylfason, K B; Griol, A; Sohlström, H; Holgado, M; Casquel, R

    2007-05-28

    We report on the first demonstration of guiding light in vertical slot-waveguides on silicon nitride/silicon oxide material system. Integrated ring resonators and Fabry-Perot cavities have been fabricated and characterized in order to determine optical features of the slot-waveguides. Group index behavior evidences guiding and confinement in the low-index slot region at O-band (1260-1370nm) telecommunication wavelengths. Propagation losses of <20 dB/cm have been measured for the transverse-electric mode of the slot-waveguides.

  5. Novel approaches for low-cost through-silicon vias

    NARCIS (Netherlands)

    Bullema, J.E.; Bressers, P.; Oosterhuis, G.; Mueller, M.; Huis in 't veld, A.J.; Roozeboom, F.

    2011-01-01

    3D stacking of integrated circuits is an emerging packaging technology to enable a high degree of functional integration and miniaturization. Footprint reduction in 3D stacking can be achieved by use of Through Silicon Vias (TSV). Creation of TSVs with Deep Reactive Ion Etching (DRIE), laser

  6. Nano-Optoelectronic Integration on Silicon

    Science.gov (United States)

    2012-12-14

    hole recombination, a material gain spectrum can be derived as dE EE ffM mcn e g ing in vcr r 22 0 2 2 00 2... ffM mhc en r ing in vcr r sp          (4.3) 48 Figure 4.12 Fitting spontaneous emission spectrum. The experimental

  7. PECASE: New Directions for Silicon Integrated Optics

    Science.gov (United States)

    2013-04-30

    The associated circuit is shown in Fig. 1. We note that Rl could indicate the input to a transimpedance amplifier (TIA), or simply a 50-Ω...and B. Razavi. ൒-Gb/s limiting amplifier and laser/modulator driver in 0.18-µm CMOS technology." IEEE Journal of Solid-State Circuits 38(12) 2138...A pair of differential 40Gb/s 215-1 pseudorandom binary sequence (PRBS) was generated by a Centellax TG1P4A PRBS source, amplified by a pair of

  8. Nonclassical light sources for silicon photonics

    Science.gov (United States)

    Bajoni, Daniele; Galli, Matteo

    2017-09-01

    Quantum photonics has recently attracted a lot of attention for its disruptive potential in emerging technologies like quantum cryptography, quantum communication and quantum computing. Driven by the impressive development in nanofabrication technologies and nanoscale engineering, silicon photonics has rapidly become the platform of choice for on-chip integration of high performing photonic devices, now extending their functionalities towards quantum-based applications. Focusing on quantum Information Technology (qIT) as a key application area, we review recent progress in integrated silicon-based sources of nonclassical states of light. We assess the state of the art in this growing field and highlight the challenges that need to be overcome to make quantum photonics a reliable and widespread technology.

  9. A physically transient form of silicon electronics.

    Science.gov (United States)

    Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Song, Young Min; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L; Zakin, Mitchell R; Slepian, Marvin J; Huang, Yonggang; Omenetto, Fiorenzo G; Rogers, John A

    2012-09-28

    A remarkable feature of modern silicon electronics is its ability to remain physically invariant, almost indefinitely for practical purposes. Although this characteristic is a hallmark of applications of integrated circuits that exist today, there might be opportunities for systems that offer the opposite behavior, such as implantable devices that function for medically useful time frames but then completely disappear via resorption by the body. We report a set of materials, manufacturing schemes, device components, and theoretical design tools for a silicon-based complementary metal oxide semiconductor (CMOS) technology that has this type of transient behavior, together with integrated sensors, actuators, power supply systems, and wireless control strategies. An implantable transient device that acts as a programmable nonantibiotic bacteriocide provides a system-level example.

  10. A CMOS silicon spin qubit

    Science.gov (United States)

    Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; de Franceschi, S.

    2016-11-01

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

  11. Spiral silicon drift detectors

    International Nuclear Information System (INIS)

    Rehak, P.; Gatti, E.; Longoni, A.; Sampietro, M.; Holl, P.; Lutz, G.; Kemmer, J.; Prechtel, U.; Ziemann, T.

    1988-01-01

    An advanced large area silicon photodiode (and x-ray detector), called Spiral Drift Detector, was designed, produced and tested. The Spiral Detector belongs to the family of silicon drift detectors and is an improvement of the well known Cylindrical Drift Detector. In both detectors, signal electrons created in silicon by fast charged particles or photons are drifting toward a practically point-like collection anode. The capacitance of the anode is therefore kept at the minimum (0.1pF). The concentric rings of the cylindrical detector are replaced by a continuous spiral in the new detector. The spiral geometry detector design leads to a decrease of the detector leakage current. In the spiral detector all electrons generated at the silicon-silicon oxide interface are collected on a guard sink rather than contributing to the detector leakage current. The decrease of the leakage current reduces the parallel noise of the detector. This decrease of the leakage current and the very small capacities of the detector anode with a capacitively matched preamplifier may improve the energy resolution of Spiral Drift Detectors operating at room temperature down to about 50 electrons rms. This resolution is in the range attainable at present only by cooled semiconductor detectors. 5 refs., 10 figs

  12. CMS Silicon Strip Tracker Performance

    CERN Document Server

    Agram, Jean-Laurent

    2012-01-01

    The CMS Silicon Strip Tracker (SST), consisting of 9.6 million readout channels from 15148 modules and covering an area of 198 square meters, needs to be precisely calibrated in order to correctly reconstruct the events recorded. Calibration constants are derived from different workflows, from promptly reconstructed events with particles as well as from commissioning events gathered just before the acquisition of physics runs. The performance of the SST has been carefully studied since the beginning of data taking: the noise of the detector, data integrity, signal-over-noise ratio, hit reconstruction efficiency and resolution have been all investigated with time and for different conditions. In this paper we describe the reconstruction strategies, the calibration procedures and the detector performance results from the latest CMS operation.

  13. The CMS Silicon Tracker Alignment

    CERN Document Server

    Castello, R

    2008-01-01

    The alignment of the Strip and Pixel Tracker of the Compact Muon Solenoid experiment, with its large number of independent silicon sensors and its excellent spatial resolution, is a complex and challenging task. Besides high precision mounting, survey measurements and the Laser Alignment System, track-based alignment is needed to reach the envisaged precision.\\\\ Three different algorithms for track-based alignment were successfully tested on a sample of cosmic-ray data collected at the Tracker Integration Facility, where 15\\% of the Tracker was tested. These results, together with those coming from the CMS global run, will provide the basis for the full-scale alignment of the Tracker, which will be carried out with the first \\emph{p-p} collisions.

  14. Performance improvement of silicon solar cells by nanoporous silicon coating

    Directory of Open Access Journals (Sweden)

    Dzhafarov T. D.

    2012-04-01

    Full Text Available In the present paper the method is shown to improve the photovoltaic parameters of screen-printed silicon solar cells by nanoporous silicon film formation on the frontal surface of the cell using the electrochemical etching. The possible mechanisms responsible for observed improvement of silicon solar cell performance are discussed.

  15. EDITORIAL: Special issue on silicon photonics

    Science.gov (United States)

    Reed, Graham; Paniccia, Mario; Wada, Kazumi; Mashanovich, Goran

    2008-06-01

    mechanisms for modulation in silicon that have yielded increasingly impressive results (see, for example, Liao L et al 2007 Electron. Lett. 43 issue 22). The convergence of computing and communications and the resultant demand for increased bandwidth has been one of the factors influencing the upsurge of interest in silicon, together with the requirement for photonic and electronic integration, all to be realized at low cost. Thus emerging applications such as short-reach communications links for optical interconnect and fibre to the home (FTTH) (as well as a multitude of other applications) are frequently offered as examples of where silicon photonics will have a significant, perhaps a revolutionary, impact. One of the major conclusions of the joint MIT-industry Communication Technology Roadmap (http://mph-roadmap.mit.edu/index.php), was that 'Photonics technology will be driven by electronic-photonic synergy and short (intelligence. Thus the limitations of silicon as an optical material can be offset against the very significant advantages, to both commercial as well as technological success. Of course, there is still much to do, hence the increasing global investment in silicon technology and the massive increase in research activity in silicon photonics since the early work in the 1980s. Only time will tell if silicon can realize its potential to satisfy the ever-increasing array of applications. However, the indications are positive, and the contributors to this cause employ increasingly impressive levels of intellectual and technological capability to realize the desired goals. It is an interesting time to be involved in slicon photonics, and it will be equally fascinating to watch the evolution of the technology in the future. Whatever happens, silicon will make the transition from being regarded as purely an electronic material to recognition as an optoelectronic material. The evidence for this is represented in the collection of papers that form this special issue

  16. Silicon containing copolymers

    CERN Document Server

    Amiri, Sahar; Amiri, Sanam

    2014-01-01

    Silicones have unique properties including thermal oxidative stability, low temperature flow, high compressibility, low surface tension, hydrophobicity and electric properties. These special properties have encouraged the exploration of alternative synthetic routes of well defined controlled microstructures of silicone copolymers, the subject of this Springer Brief. The authors explore the synthesis and characterization of notable block copolymers. Recent advances in controlled radical polymerization techniques leading to the facile synthesis of well-defined silicon based thermo reversible block copolymers?are described along with atom transfer radical polymerization (ATRP), a technique utilized to develop well-defined functional thermo reversible block copolymers. The brief also focuses on Polyrotaxanes and their great potential as stimulus-responsive materials which produce poly (dimethyl siloxane) (PDMS) based thermo reversible block copolymers.

  17. Floating Silicon Method

    Energy Technology Data Exchange (ETDEWEB)

    Kellerman, Peter

    2013-12-21

    The Floating Silicon Method (FSM) project at Applied Materials (formerly Varian Semiconductor Equipment Associates), has been funded, in part, by the DOE under a “Photovoltaic Supply Chain and Cross Cutting Technologies” grant (number DE-EE0000595) for the past four years. The original intent of the project was to develop the FSM process from concept to a commercially viable tool. This new manufacturing equipment would support the photovoltaic industry in following ways: eliminate kerf losses and the consumable costs associated with wafer sawing, allow optimal photovoltaic efficiency by producing high-quality silicon sheets, reduce the cost of assembling photovoltaic modules by creating large-area silicon cells which are free of micro-cracks, and would be a drop-in replacement in existing high efficiency cell production process thereby allowing rapid fan-out into the industry.

  18. The LHCb Silicon Tracker

    Energy Technology Data Exchange (ETDEWEB)

    Tobin, Mark, E-mail: Mark.Tobin@epfl.ch

    2016-09-21

    The LHCb experiment is dedicated to the study of heavy flavour physics at the Large Hadron Collider (LHC). The primary goal of the experiment is to search for indirect evidence of new physics via measurements of CP violation and rare decays of beauty and charm hadrons. The LHCb detector has a large-area silicon micro-strip detector located upstream of a dipole magnet, and three tracking stations with silicon micro-strip detectors in the innermost region downstream of the magnet. These two sub-detectors form the LHCb Silicon Tracker (ST). This paper gives an overview of the performance and operation of the ST during LHC Run 1. Measurements of the observed radiation damage are shown and compared to the expectation from simulation.

  19. Removal of inclusions from silicon

    Science.gov (United States)

    Ciftja, Arjan; Engh, Thorvald Abel; Tangstad, Merete; Kvithyld, Anne; Øvrelid, Eivind Johannes

    2009-11-01

    The removal of inclusions from molten silicon is necessary to satisfy the purity requirements for solar grade silicon. This paper summarizes two methods that are investigated: (i) settling of the inclusions followed by subsequent directional solidification and (infiltration by ceramic foam filters. Settling of inclusions followed by directional solidification is of industrial importance for production of low-cost solar grade silicon. Filtration is reported as the most efficient method for removal of inclusions from the top-cut silicon scrap.

  20. Silicon Tracking Upgrade at CDF

    International Nuclear Information System (INIS)

    Kruse, M.C.

    1998-04-01

    The Collider Detector at Fermilab (CDF) is scheduled to begin recording data from Run II of the Fermilab Tevatron in early 2000. The silicon tracking upgrade constitutes both the upgrade to the CDF silicon vertex detector (SVX II) and the new Intermediate Silicon Layers (ISL) located at radii just beyond the SVX II. Here we review the design and prototyping of all aspects of these detectors including mechanical design, data acquisition, and a trigger based on silicon tracking

  1. Silicon microphones - a Danish perspective

    DEFF Research Database (Denmark)

    Bouwstra, Siebe; Storgaard-Larsen, Torben; Scheeper, Patrick

    1998-01-01

    Two application areas of microphones are discussed, those for precision measurement and those for hearing instruments. Silicon microphones are under investigation for both areas, and Danish industry plays a key role in both. The opportunities of silicon, as well as the challenges and expectations......, are discussed. For precision measurement the challenge for silicon is large, while for hearing instruments silicon seems to be very promising....

  2. The solenoidal detector collaboration silicon detector system

    International Nuclear Information System (INIS)

    Ziock, H.J.; Gamble, M.T.; Miller, W.O.; Palounek, A.P.T.; Thompson, T.C.

    1992-01-01

    Silicon tracking systems (STS) will be fundamental components of the tracking systems for both planned major SSC experiments. The STS is physically a small part of the central tracking system and the calorimeter of the detector being proposed by the Solenoidal Detector Collaboration (SDC). Despite its seemingly small size, it occupies a volume of more than 5 meters in length and 1 meter in diameter and is an order of magnitude larger than any silicon detector system previously built. The STS will consist of silicon microstrip detectors and possibly silicon pixel detectors. The other two components are an outer barrel tracker, which will consist of straw tubes or scintillating fibers; and an outer intermediate angle tracker, which will consist of gas microstrips. The components are designed to work as an integrated system. Each componenet has specific strengths, but is individually incapable of providing the overall performance required by the physics goals of the SSC. The large particle fluxes, the short times between beam crossing, the high channel count, and the required very high position measurement accuracy pose challenging problems that must be solved. Furthermore, to avoid degrading the measurements, the solutions must be achieved using only a minimal amount of material. An additional constraint is that only low-Z materials are allowed. If that were not difficlut enough, the solutions must also be affordable

  3. Amorphous silicon as high index photonic material

    Science.gov (United States)

    Lipka, T.; Harke, A.; Horn, O.; Amthor, J.; Müller, J.

    2009-05-01

    Silicon-on-Insulator (SOI) photonics has become an attractive research topic within the area of integrated optics. This paper aims to fabricate SOI-structures for optical communication applications with lower costs compared to standard fabrication processes as well as to provide a higher flexibility with respect to waveguide and substrate material choice. Amorphous silicon is deposited on thermal oxidized silicon wafers with plasma-enhanced chemical vapor deposition (PECVD). The material is optimized in terms of optical light transmission and refractive index. Different a-Si:H waveguides with low propagation losses are presented. The waveguides were processed with CMOS-compatible fabrication technologies and standard DUV-lithography enabling high volume production. To overcome the large mode-field diameter mismatch between incoupling fiber and sub-μm waveguides three dimensional, amorphous silicon tapers were fabricated with a KOH etched shadow mask for patterning. Using ellipsometric and Raman spectroscopic measurements the material properties as refractive index, layer thickness, crystallinity and material composition were analyzed. Rapid thermal annealing (RTA) experiments of amorphous thin films and rib waveguides were performed aiming to tune the refractive index of the deposited a-Si:H waveguide core layer after deposition.

  4. Environmentally benign silicon solar cell manufacturing

    Energy Technology Data Exchange (ETDEWEB)

    Tsuo, Y.S. [National Renewable Energy Lab., Golden, CO (United States); Gee, J.M. [Sandia National Labs., Albuquerque, NM (United States); Menna, P. [National Agency for New Technologies Energy and Environment, Portici (Italy); Strebkov, D.S.; Pinov, A.; Zadde, V. [Intersolarcenter, Moscow (Russian Federation)

    1998-09-01

    The manufacturing of silicon devices--from polysilicon production, crystal growth, ingot slicing, wafer cleaning, device processing, to encapsulation--requires many steps that are energy intensive and use large amounts of water and toxic chemicals. In the past two years, the silicon integrated-circuit (IC) industry has initiated several programs to promote environmentally benign manufacturing, i.e., manufacturing practices that recover, recycle, and reuse materials resources with a minimal consumption of energy. Crystalline-silicon solar photovoltaic (PV) modules, which accounted for 87% of the worldwide module shipments in 1997, are large-area devices with many manufacturing steps similar to those used in the IC industry. Obviously, there are significant opportunities for the PV industry to implement more environmentally benign manufacturing approaches. Such approaches often have the potential for significant cost reduction by reducing energy use and/or the purchase volume of new chemicals and by cutting the amount of used chemicals that must be discarded. This paper will review recent accomplishments of the IC industry initiatives and discuss new processes for environmentally benign silicon solar-cell manufacturing.

  5. Multi-Step Deep Reactive Ion Etching Fabrication Process for Silicon-Based Terahertz Components

    Science.gov (United States)

    Jung-Kubiak, Cecile (Inventor); Reck, Theodore (Inventor); Chattopadhyay, Goutam (Inventor); Perez, Jose Vicente Siles (Inventor); Lin, Robert H. (Inventor); Mehdi, Imran (Inventor); Lee, Choonsup (Inventor); Cooper, Ken B. (Inventor); Peralta, Alejandro (Inventor)

    2016-01-01

    A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.

  6. Extreme-Environment Silicon-Carbide (SiC) Wireless Sensor Suite

    Science.gov (United States)

    Yang, Jie

    2015-01-01

    Phase II objectives: Develop an integrated silicon-carbide wireless sensor suite capable of in situ measurements of critical characteristics of NTP engine; Compose silicon-carbide wireless sensor suite of: Extreme-environment sensors center, Dedicated high-temperature (450 deg C) silicon-carbide electronics that provide power and signal conditioning capabilities as well as radio frequency modulation and wireless data transmission capabilities center, An onboard energy harvesting system as a power source.

  7. Fabrication of micromirrors with pyramidal shape using anisotropic etching of silicon

    OpenAIRE

    Moktadir, Z.; Vijaya Prakash, G.; Trupke, M.; Koukharenko, E.; Kraft, M.; Baumberg, J.J.; Eriksson, S.; Hinds, E.A.

    2005-01-01

    Gold micro-mirrors have been formed in silicon in an inverted pyramidal shape. The pyramidal structures are created in the (100) surface of a silicon wafer by anisotropic etching in potassium hydroxide. High quality micro-mirrors are then formed by sputtering gold onto the smooth silicon (111) faces of the pyramids. These mirrors show great promise as high quality optical devices suitable for integration into MOEMS systems.

  8. CMS silicon tracker developments

    International Nuclear Information System (INIS)

    Civinini, C.; Albergo, S.; Angarano, M.; Azzi, P.; Babucci, E.; Bacchetta, N.; Bader, A.; Bagliesi, G.; Basti, A.; Biggeri, U.; Bilei, G.M.; Bisello, D.; Boemi, D.; Bosi, F.; Borrello, L.; Bozzi, C.; Braibant, S.; Breuker, H.; Bruzzi, M.; Buffini, A.; Busoni, S.; Candelori, A.; Caner, A.; Castaldi, R.; Castro, A.; Catacchini, E.; Checcucci, B.; Ciampolini, P.; Creanza, D.; D'Alessandro, R.; Da Rold, M.; Demaria, N.; De Palma, M.; Dell'Orso, R.; Della Marina, R.D.R.; Dutta, S.; Eklund, C.; Feld, L.; Fiore, L.; Focardi, E.; French, M.; Freudenreich, K.; Frey, A.; Fuertjes, A.; Giassi, A.; Giorgi, M.; Giraldo, A.; Glessing, B.; Gu, W.H.; Hall, G.; Hammarstrom, R.; Hebbeker, T.; Honma, A.; Hrubec, J.; Huhtinen, M.; Kaminsky, A.; Karimaki, V.; Koenig, St.; Krammer, M.; Lariccia, P.; Lenzi, M.; Loreti, M.; Luebelsmeyer, K.; Lustermann, W.; Maettig, P.; Maggi, G.; Mannelli, M.; Mantovani, G.; Marchioro, A.; Mariotti, C.; Martignon, G.; Evoy, B. Mc; Meschini, M.; Messineo, A.; Migliore, E.; My, S.; Paccagnella, A.; Palla, F.; Pandoulas, D.; Papi, A.; Parrini, G.; Passeri, D.; Pieri, M.; Piperov, S.; Potenza, R.; Radicci, V.; Raffaelli, F.; Raymond, M.; Santocchia, A.; Schmitt, B.; Selvaggi, G.; Servoli, L.; Sguazzoni, G.; Siedling, R.; Silvestris, L.; Starodumov, A.; Stavitski, I.; Stefanini, G.; Surrow, B.; Tempesta, P.; Tonelli, G.; Tricomi, A.; Tuuva, T.; Vannini, C.; Verdini, P.G.; Viertel, G.; Xie, Z.; Yahong, Li; Watts, S.; Wittmer, B.

    2002-01-01

    The CMS Silicon tracker consists of 70 m 2 of microstrip sensors which design will be finalized at the end of 1999 on the basis of systematic studies of device characteristics as function of the most important parameters. A fundamental constraint comes from the fact that the detector has to be operated in a very hostile radiation environment with full efficiency. We present an overview of the current results and prospects for converging on a final set of parameters for the silicon tracker sensors

  9. Strained Silicon Photonics

    Directory of Open Access Journals (Sweden)

    Ralf B. Wehrspohn

    2012-05-01

    Full Text Available A review of recent progress in the field of strained silicon photonics is presented. The application of strain to waveguide and photonic crystal structures can be used to alter the linear and nonlinear optical properties of these devices. Here, methods for the fabrication of strained devices are summarized and recent examples of linear and nonlinear optical devices are discussed. Furthermore, the relation between strain and the enhancement of the second order nonlinear susceptibility is investigated, which may enable the construction of optically active photonic devices made of silicon.

  10. Elite silicon and solar power

    International Nuclear Information System (INIS)

    Yasamanov, N.A.

    2000-01-01

    The article is of popular character, the following issues being considered: conversion of solar energy into electric one, solar batteries in space and on the Earth, growing of silicon large-size crystals, source material problems relating to silicon monocrystals production, outlooks of solar silicon batteries production [ru

  11. Formation and properties of the buried isolating silicon-dioxide layer in double-layer “porous silicon-on-insulator” structures

    Energy Technology Data Exchange (ETDEWEB)

    Bolotov, V. V.; Knyazev, E. V.; Ponomareva, I. V.; Kan, V. E., E-mail: kan@obisp.oscsbras.ru; Davletkildeev, N. A.; Ivlev, K. E.; Roslikov, V. E. [Russian Academy of Sciences, Omsk Scientific Center, Siberian Branch (Russian Federation)

    2017-01-15

    The oxidation of mesoporous silicon in a double-layer “macroporous silicon–mesoporous silicon” structure is studied. The morphology and dielectric properties of the buried insulating layer are investigated using electron microscopy, ellipsometry, and electrical measurements. Specific defects (so-called spikes) are revealed between the oxidized macropore walls in macroporous silicon and the oxidation crossing fronts in mesoporous silicon. It is found that, at an initial porosity of mesoporous silicon of 60%, three-stage thermal oxidation leads to the formation of buried silicon-dioxide layers with an electric-field breakdown strength of E{sub br} ~ 10{sup 4}–10{sup 5} V/cm. Multilayered “porous silicon-on-insulator” structures are shown to be promising for integrated chemical micro- and nanosensors.

  12. Fluorescence and thermoluminescence in silicon oxide films rich in silicon; Fluorescencia y termoluminiscencia en peliculas de oxido de silicio rico en silicio

    Energy Technology Data Exchange (ETDEWEB)

    Berman M, D.; Piters, T. M. [Centro de Investigacion en Fisica, Universidad de Sonora, Apdo. Postal 5-088, Hermosillo 83190, Sonora (Mexico); Aceves M, M.; Berriel V, L. R. [Instituto Nacional de Astrofisica, Optica y Electronica, Apdo. Postal 51, Puebla 72000, Puebla (Mexico); Luna L, J. A. [CIDS, Benemerita Universidad Autonoma de Puebla, Apdo. Postal 1651, Puebla 72000, Puebla (Mexico)

    2009-10-15

    In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 {omega}-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N{sub 2} at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

  13. Second-harmonic generation in substoichiometric silicon nitride layers

    Science.gov (United States)

    Pecora, Emanuele; Capretti, Antonio; Miano, Giovanni; Dal Negro, Luca

    2013-03-01

    Harmonic generation in optical circuits offers the possibility to integrate wavelength converters, light amplifiers, lasers, and multiple optical signal processing devices with electronic components. Bulk silicon has a negligible second-order nonlinear optical susceptibility owing to its crystal centrosymmetry. Silicon nitride has its place in the microelectronic industry as an insulator and chemical barrier. In this work, we propose to take advantage of silicon excess in silicon nitride to increase the Second Harmonic Generation (SHG) efficiency. Thin films have been grown by reactive magnetron sputtering and their nonlinear optical properties have been studied by femtosecond pumping over a wide range of excitation wavelengths, silicon nitride stoichiometry and thermal processes. We demonstrate SHG in the visible range (375 - 450 nm) using a tunable 150 fs Ti:sapphire laser, and we optimize the SH emission at a silicon excess of 46 at.% demonstrating a maximum SHG efficiency of 4x10-6 in optimized films. Polarization properties, generation efficiency, and the second order nonlinear optical susceptibility are measured for all the investigated samples and discussed in terms of an effective theoretical model. Our findings show that the large nonlinear optical response demonstrated in optimized Si-rich silicon nitride materials can be utilized for the engineering of nonlinear optical functions and devices on a Si chip.

  14. Nanostructured silicon anodes for lithium ion rechargeable batteries.

    Science.gov (United States)

    Teki, Ranganath; Datta, Moni K; Krishnan, Rahul; Parker, Thomas C; Lu, Toh-Ming; Kumta, Prashant N; Koratkar, Nikhil

    2009-10-01

    Rechargeable lithium ion batteries are integral to today's information-rich, mobile society. Currently they are one of the most popular types of battery used in portable electronics because of their high energy density and flexible design. Despite their increasing use at the present time, there is great continued commercial interest in developing new and improved electrode materials for lithium ion batteries that would lead to dramatically higher energy capacity and longer cycle life. Silicon is one of the most promising anode materials because it has the highest known theoretical charge capacity and is the second most abundant element on earth. However, silicon anodes have limited applications because of the huge volume change associated with the insertion and extraction of lithium. This causes cracking and pulverization of the anode, which leads to a loss of electrical contact and eventual fading of capacity. Nanostructured silicon anodes, as compared to the previously tested silicon film anodes, can help overcome the above issues. As arrays of silicon nanowires or nanorods, which help accommodate the volume changes, or as nanoscale compliant layers, which increase the stress resilience of silicon films, nanoengineered silicon anodes show potential to enable a new generation of lithium ion batteries with significantly higher reversible charge capacity and longer cycle life.

  15. CMOS and BiCMOS process integration and device characterization

    CERN Document Server

    El-Kareh, Badih

    2009-01-01

    Covers both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. This book also covers silicon devices and integrated process technologies. It discusses modern silicon devices, their characteristics, and interactions with process parameters.

  16. Carbon nanotube network-silicon oxide non-volatile switches.

    Science.gov (United States)

    Liao, Albert D; Araujo, Paulo T; Xu, Runjie; Dresselhaus, Mildred S

    2014-12-08

    The integration of carbon nanotubes with silicon is important for their incorporation into next-generation nano-electronics. Here we demonstrate a non-volatile switch that utilizes carbon nanotube networks to electrically contact a conductive nanocrystal silicon filament in silicon dioxide. We form this device by biasing a nanotube network until it physically breaks in vacuum, creating the conductive silicon filament connected across a small nano-gap. From Raman spectroscopy, we observe coalescence of nanotubes during breakdown, which stabilizes the system to form very small gaps in the network~15 nm. We report that carbon nanotubes themselves are involved in switching the device to a high resistive state. Calculations reveal that this switching event occurs at ~600 °C, the temperature associated with the oxidation of nanotubes. Therefore, we propose that, in switching to a resistive state, the nanotube oxidizes by extracting oxygen from the substrate.

  17. Thin film silicon photovoltaics: Architectural perspectives and technological issues

    Energy Technology Data Exchange (ETDEWEB)

    Mercaldo, Lucia Vittoria; Addonizio, Maria Luisa; Noce, Marco Della; Veneri, Paola Delli; Scognamiglio, Alessandra; Privato, Carlo [ENEA, Portici Research Center, Piazzale E. Fermi, 80055 Portici (Napoli) (Italy)

    2009-10-15

    Thin film photovoltaics is a particularly attractive technology for building integration. In this paper, we present our analysis on architectural issues and technological developments of thin film silicon photovoltaics. In particular, we focus on our activities related to transparent and conductive oxide (TCO) and thin film amorphous and microcrystalline silicon solar cells. The research on TCO films is mainly dedicated to large-area deposition of zinc oxide (ZnO) by low pressure-metallorganic chemical vapor deposition. ZnO material, with a low sheet resistance (<8 {omega}/sq) and with an excellent transmittance (>82%) in the whole wavelength range of photovoltaic interest, has been obtained. ''Micromorph'' tandem devices, consisting of an amorphous silicon top cell and a microcrystalline silicon bottom cell, are fabricated by using the very high frequency plasma enhanced chemical vapor deposition technique. An initial efficiency of 11.1% (>10% stabilized) has been obtained. (author)

  18. Silicon microspheres for near-IR communication applications

    International Nuclear Information System (INIS)

    Serpengüzel, Ali; Demir, Abdullah

    2008-01-01

    We have performed transverse electric and transverse magnetic polarized elastic light scattering calculations at 90° and 0° in the o-band at 1.3 µm for a 15 µm radius silicon microsphere with a refractive index of 3.5. The quality factors are on the order of 10 7 and the mode/channel spacing is 7 nm, which correlate well with the refractive index and the optical size of the microsphere. The 90° elastic light scattering can be used to monitor a dropped channel (drop port), whereas the 0° elastic scattering can be used to monitor the transmission channel (through port). The optical resonances of the silicon microspheres provide the necessary narrow linewidths that are needed for high-resolution optical communication applications. Potential telecommunication applications include filters, modulators, switches, wavelength converters, detectors, amplifiers and light sources. Silicon microspheres show promise as potential building blocks for silicon-based electrophotonic integration

  19. Silicon strip detectors for the ATLAS HL-LHC upgrade

    CERN Document Server

    Gonzalez Sevilla, S; The ATLAS collaboration

    2011-01-01

    The LHC upgrade is foreseen to increase the ATLAS design luminosity by a factor ten, implying the need to build a new tracker suited to the harsh HL-LHC conditions in terms of particle rates and radiation doses. In order to cope with the increase in pile-up backgrounds at the higher luminosity, an all silicon detector is being designed. To successfully face the increased radiation dose, a new generation of extremely radiation hard silicon detectors is being designed. We give an overview of the ATLAS tracker upgrade project, in particular focusing on the crucial innermost silicon strip layers. Results from a wide range of irradiated silicon detectors for the strip region of the future ATLAS tracker are presented. Layout concepts for lightweight yet mechanically very rigid detector modules with high service integration are shown.

  20. Selective formation of porous silicon

    Science.gov (United States)

    Fathauer, Robert W. (Inventor); Jones, Eric W. (Inventor)

    1993-01-01

    A pattern of porous silicon is produced in the surface of a silicon substrate by forming a pattern of crystal defects in said surface, preferably by applying an ion milling beam through openings in a photoresist layer to the surface, and then exposing said surface to a stain etchant, such as HF:HNO3:H2O. The defected crystal will preferentially etch to form a pattern of porous silicon. When the amorphous content of the porous silicon exceeds 70 percent, the porous silicon pattern emits visible light at room temperature.

  1. Silicon nitride nanosieve membrane

    NARCIS (Netherlands)

    Tong, D.H.; Jansen, Henricus V.; Gadgil, V.J.; Bostan, C.G.; Berenschot, Johan W.; van Rijn, C.J.M.; Elwenspoek, Michael Curt

    2004-01-01

    An array of very uniform cylindrical nanopores with a pore diameter as small as 25 nm has been fabricated in an ultrathin micromachined silicon nitride membrane using focused ion beam (FIB) etching. The pore size of this nanosieve membrane was further reduced to below 10 nm by coating it with

  2. OPAL Silicon Tungsten Luminometer

    CERN Multimedia

    OPAL was one of the four experiments installed at the LEP particle accelerator from 1989 - 2000. The Silicon Tungsten Luminometer was part of OPAL's calorimeter which was used to measure the energy of particles. Most particles end their journey in calorimeters. These detectors measure the energy deposited when particles are slowed down and stopped.

  3. Silicon graphene Bragg gratings.

    Science.gov (United States)

    Capmany, José; Domenech, David; Muñoz, Pascual

    2014-03-10

    We propose the use of interleaved graphene sections on top of a silicon waveguide to implement tunable Bragg gratings. The filter central wavelength and bandwidth can be controlled changing the chemical potential of the graphene sections. Apodization techniques are also presented.

  4. On nanostructured silicon success

    DEFF Research Database (Denmark)

    Sigmund, Ole; Jensen, Jakob Søndergaard; Frandsen, Lars Hagedorn

    2016-01-01

    Recent Letters by Piggott et al. 1 and Shen et al. 2 claim the smallest ever dielectric wave length and polarization splitters. The associated News & Views article by Aydin3 states that these works “are the first experimental demonstration of on-chip, silicon photonic components based on complex...

  5. ALICE Silicon Pixel Detector

    CERN Multimedia

    Manzari, V

    2013-01-01

    The Silicon Pixel Detector (SPD) forms the innermost two layers of the 6-layer barrel Inner Tracking System (ITS). The SPD plays a key role in the determination of the position of the primary collision and in the reconstruction of the secondary vertices from particle decays.

  6. ALICE Silicon Strip Detector

    CERN Multimedia

    Nooren, G

    2013-01-01

    The Silicon Strip Detector (SSD) constitutes the two outermost layers of the Inner Tracking System (ITS) of the ALICE Experiment. The SSD plays a crucial role in the tracking of the particles produced in the collisions connecting the tracks from the external detectors (Time Projection Chamber) to the ITS. The SSD also contributes to the particle identification through the measurement of their energy loss.

  7. DELPHI Silicon Tracker

    CERN Multimedia

    DELPHI was one of the four experiments installed at the LEP particle accelerator from 1989 - 2000. The silicon tracking detector was nearest to the collision point in the centre of the detector. It was used to pinpoint the collision and catch short-lived particles.

  8. Accelerated life test of an ONO stacked insulator film for a silicon micro-strip detector

    International Nuclear Information System (INIS)

    Okuno, Shoji; Ikeda, Hirokazu; Saitoh, Yutaka

    1996-01-01

    We have used to acquire the signal through an integrated capacitor for a silicon micro-strip detector. When we have been using a double-sided silicon micro-strip detector, we have required a long-term stability and a high feasibility for the integrated capacitor. An oxide-nitride-oxide (ONO) insulator film was theoretically expected to have a superior nature in terms of long term reliability. In order to test long term reliability for integrated capacitor of a silicon micro-strip detector, we made a multi-channel measuring system for capacitors

  9. Integrated Microfluidic Gas Sensors for Water Monitoring

    Science.gov (United States)

    Zhu, L.; Sniadecki, N.; DeVoe, D. L.; Beamesderfer, M.; Semancik, S.; DeVoe, D. L.

    2003-01-01

    A silicon-based microhotplate tin oxide (SnO2) gas sensor integrated into a polymer-based microfluidic system for monitoring of contaminants in water systems is presented. This device is designed to sample a water source, control the sample vapor pressure within a microchannel using integrated resistive heaters, and direct the vapor past the integrated gas sensor for analysis. The sensor platform takes advantage of novel technology allowing direct integration of discrete silicon chips into a larger polymer microfluidic substrate, including seamless fluidic and electrical interconnects between the substrate and silicon chip.

  10. Control and data acquisition electronics for the CDF Silicon Vertex Detector

    Energy Technology Data Exchange (ETDEWEB)

    Turner, K.J.; Nelson, C.A.; Shaw, T.M.; Wesson, T.R.

    1991-11-01

    A control and data acquisition system has been designed for the CDF Silicon Vertex Detector (SVX) at Fermilab. The system controls the operation of the SVX Rev D integrated circuit (SVX IC) that is used to instrument a 46,000 microstrip silicon detector. The system consists of a Fastbus Sequencer, a Crate Controller and Digitizer modules. 11 refs., 6 figs., 3 tabs.

  11. Control and data acquisition electronics for the CDF silicon vertex detector

    International Nuclear Information System (INIS)

    urner, K.J.; Nelson, C.A.; Shaw, T.M.; Wesson, T.R.

    1992-01-01

    This paper reports on a control and data acquisition system that has been designed for the CDF Silicon Vertex Detector (SVX) at Fermilab. The system controls the operation of the SVX Rev D integrated circuit (SVX IC) that is used to instrument a 46,000 microstrip silicon detector. The system consists of a Fastbus Sequencer, a Crate Controller and Digitizer modules

  12. Control and data acquisition electronics for the CDF Silicon Vertex Detector

    International Nuclear Information System (INIS)

    Turner, K.J.; Nelson, C.A.; Shaw, T.M.; Wesson, T.R.

    1991-11-01

    A control and data acquisition system has been designed for the CDF Silicon Vertex Detector (SVX) at Fermilab. The system controls the operation of the SVX Rev D integrated circuit (SVX IC) that is used to instrument a 46,000 microstrip silicon detector. The system consists of a Fastbus Sequencer, a Crate Controller and Digitizer modules. 11 refs., 6 figs., 3 tabs

  13. Silicon Carbide Junction Field Effect Transistor Digital Logic Gates Demonstrated at 600 deg. C

    Science.gov (United States)

    Neudeck, Philip G.

    1998-01-01

    The High Temperature Integrated Electronics and Sensors (HTIES) Program at the NASA Lewis Research Center is currently developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. The HTIES team recently fabricated and demonstrated the first semiconductor digital logic gates ever to function at 600 C.

  14. ESSenTIAL: EPIXfab services specifically targeting (SME) industrial takeup of advanced silicon photonics

    NARCIS (Netherlands)

    Pozo Torres, J.M.; Kumar, P.; Lo Cascio, D.M.R.; Khanna, A.; Dumon, P.; Delbeke, D.; Baets, R.; Fournier, M.; Fedeli, J.-M.; Fulbert, L.; Zimmermann, L.; Tillack, B.; Tian, H.; Aalto, T.; O'Brien, P.; Deptuck, D.; Xu, J.; Zhang, X.; Gale, D.

    2012-01-01

    ePIXfab brings silicon photonics within reach of European small and medium sized enterprises, thereby building on its track record and its integration into Europractice. To this end, ePIXfab offers affordable access to standardized active and passive silicon photonic IC and packaging technology, a

  15. Arsenic implantation into polycrystalline silicon and diffusion to silicon substrate

    International Nuclear Information System (INIS)

    Tsukamoto, K.; Akasaka, Y.; Horie, K.

    1977-01-01

    Arsenic implantation into polycrystalline silicon and drive-in diffusion to silicon substrate have been investigated by MeV He + backscattering analysis and also by electrical measurements. The range distributions of arsenic implanted into polycrystalline silicon are well fitted to Gaussian distributions over the energy range 60--350 keV. The measured values of R/sub P/ and ΔR/sub P/ are about 10 and 20% larger than the theoretical predictions, respectively. The effective diffusion coefficient of arsenic implanted into polycrystalline silicon is expressed as D=0.63 exp[(-3.22 eV/kT)] and is independent of the arsenic concentration. The drive-in diffusion of arsenic from the implanted polycrystalline silicon layer into the silicon substrate is significantly affected by the diffusion atmosphere. In the N 2 atmosphere, a considerable amount of arsenic atoms diffuses outward to the ambient. The outdiffusion can be suppressed by encapsulation with Si 3 N 4 . In the oxidizing atmosphere, arsenic atoms are driven inward by growing SiO 2 due to the segregation between SiO 2 and polycrystalline silicon, and consequently the drive-in diffusion of arsenic is enhanced. At the interface between the polycrystalline silicon layer and the silicon substrate, arsenic atoms are likely to segregate at the polycrystalline silicon side

  16. Silicon epitaxy on textured double layer porous silicon by LPCVD

    International Nuclear Information System (INIS)

    Cai Hong; Shen Honglie; Zhang Lei; Huang Haibin; Lu Linfeng; Tang Zhengxia; Shen Jiancang

    2010-01-01

    Epitaxial silicon thin film on textured double layer porous silicon (DLPS) was demonstrated. The textured DLPS was formed by electrochemical etching using two different current densities on the silicon wafer that are randomly textured with upright pyramids. Silicon thin films were then grown on the annealed DLPS, using low-pressure chemical vapor deposition (LPCVD). The reflectance of the DLPS and the grown silicon thin films were studied by a spectrophotometer. The crystallinity and topography of the grown silicon thin films were studied by Raman spectroscopy and SEM. The reflectance results show that the reflectance of the silicon wafer decreases from 24.7% to 11.7% after texturing, and after the deposition of silicon thin film the surface reflectance is about 13.8%. SEM images show that the epitaxial silicon film on textured DLPS exhibits random pyramids. The Raman spectrum peaks near 521 cm -1 have a width of 7.8 cm -1 , which reveals the high crystalline quality of the silicon epitaxy.

  17. Silicon fiber with p-n junction

    International Nuclear Information System (INIS)

    Homa, D.; Cito, A.; Pickrell, G.; Hill, C.; Scott, B.

    2014-01-01

    In this study, we fabricated a p-n junction in a fiber with a phosphorous doped silicon core and fused silica cladding. The fibers were fabricated via a hybrid process of the core-suction and melt-draw techniques and maintained overall diameters ranging from 200 to 900 μm and core diameters of 20–800 μm. The p-n junction was formed by doping the fiber with boron and confirmed via the current-voltage characteristic. The demonstration of a p-n junction in a melt-drawn silicon core fiber paves the way for the seamless integration of optical and electronic devices in fibers.

  18. A silicon nanowire heater and thermometer

    Science.gov (United States)

    Zhao, Xingyan; Dan, Yaping

    2017-07-01

    In the thermal conductivity measurements of thermoelectric materials, heaters and thermometers made of the same semiconducting materials under test, forming a homogeneous system, will significantly simplify fabrication and integration. In this work, we demonstrate a high-performance heater and thermometer made of single silicon nanowires (SiNWs). The SiNWs are patterned out of a silicon-on-insulator wafer by CMOS-compatible fabrication processes. The electronic properties of the nanowires are characterized by four-probe and low temperature Hall effect measurements. The I-V curves of the nanowires are linear at small voltage bias. The temperature dependence of the nanowire resistance allows the nanowire to be used as a highly sensitive thermometer. At high voltage bias, the I-V curves of the nanowire become nonlinear due to the effect of Joule heating. The temperature of the nanowire heater can be accurately monitored by the nanowire itself as a thermometer.

  19. Flexible and semi-transparent thermoelectric energy harvesters from low cost bulk silicon (100)

    KAUST Repository

    Sevilla, Galo T.

    2013-07-09

    Flexible and semi-transparent high performance thermoelectric energy harvesters are fabricated on low cost bulk mono-crystalline silicon (100) wafers. The released silicon is only 3.6% as thick as bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. This generic batch processing is a pragmatic way of transforming traditional silicon circuitry for extremely deformable high-performance integrated electronics. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  20. Flexible and semi-transparent thermoelectric energy harvesters from low cost bulk silicon (100)

    KAUST Repository

    Sevilla, Galo T.; Inayat, Salman Bin; Rojas, Jhonathan Prieto; Hussain, Aftab M.; Hussain, Muhammad Mustafa

    2013-01-01

    Flexible and semi-transparent high performance thermoelectric energy harvesters are fabricated on low cost bulk mono-crystalline silicon (100) wafers. The released silicon is only 3.6% as thick as bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. This generic batch processing is a pragmatic way of transforming traditional silicon circuitry for extremely deformable high-performance integrated electronics. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Hybrid III-V Silicon Lasers

    Science.gov (United States)

    Bowers, John

    2014-03-01

    Abstract: A number of important breakthroughs in the past decade have focused attention on Si as a photonic platform. We review here recent progress in this field, focusing on efforts to make lasers, amplifiers, modulators and photodetectors on or in silicon. We also describe optimum quantum well design and distributed feedback cavity design to reduce the threshold and increase the efficiency and power output. The impact active silicon photonic integrated circuits could have on interconnects, telecommunications and on silicon electronics is reviewed. Biography: John Bowers holds the Fred Kavli Chair in Nanotechnology, and is the Director of the Institute for Energy Efficiency and a Professor in the Departments of Electrical and Computer Engineering and Materials at UCSB. He is a cofounder of Aurrion, Aerius Photonics and Calient Networks. Dr. Bowers received his M.S. and Ph.D. degrees from Stanford University and worked for AT&T Bell Laboratories and Honeywell before joining UC Santa Barbara. Dr. Bowers is a member of the National Academy of Engineering and a fellow of the IEEE, OSA and the American Physical Society. He is a recipient of the OSA/IEEE Tyndall Award, the OSA Holonyak Prize, the IEEE LEOS William Streifer Award and the South Coast Business and Technology Entrepreneur of the Year Award. He and coworkers received the EE Times Annual Creativity in Electronics (ACE) Award for Most Promising Technology for the hybrid silicon laser in 2007. Bowers' research is primarily in optoelectronics and photonic integrated circuits. He has published ten book chapters, 600 journal papers, 900 conference papers and has received 54 patents. He has published 180 invited papers and conference papers, and given 16 plenary talks at conferences. As well as Chong Zhang.

  2. Research Update: Phonon engineering of nanocrystalline silicon thermoelectrics

    Directory of Open Access Journals (Sweden)

    Junichiro Shiomi

    2016-10-01

    Full Text Available Nanocrystalline silicon thermoelectrics can be a solution to improve the cost-effectiveness of thermoelectric technology from both material and integration viewpoints. While their figure-of-merit is still developing, recent advances in theoretical/numerical calculations, property measurements, and structural synthesis/fabrication have opened up possibilities to develop the materials based on fundamental physics of phonon transport. Here, this is demonstrated by reviewing a series of works on nanocrystalline silicon materials using calculations of multiscale phonon transport, measurements of interfacial heat conduction, and synthesis from nanoparticles. Integration of these approaches allows us to engineer phonon transport to improve the thermoelectric performance by introducing local silicon-oxide structures.

  3. Nanoscale phosphorus atom arrays created using STM for the fabrication of a silicon based quantum computer.

    Energy Technology Data Exchange (ETDEWEB)

    O' Brien, J. L. (Jeremy L.); Schofield, S. R. (Steven R.); Simmons, M. Y. (Michelle Y.); Clark, R. G. (Robert G.); Dzurak, A. S. (Andrew S.); Curson, N. J. (Neil J.); Kane, B. E. (Bruce E.); McAlpine, N. S. (Neal S.); Hawley, M. E. (Marilyn E.); Brown, G. W. (Geoffrey W.)

    2001-01-01

    Quantum computers offer the promise of formidable computational power for certain tasks. Of the various possible physical implementations of such a device, silicon based architectures are attractive for their scalability and ease of integration with existing silicon technology. These designs use either the electron or nuclear spin state of single donor atoms to store quantum information. Here we describe a strategy to fabricate an array of single phosphorus atoms in silicon for the construction of such a silicon based quantum computer. We demonstrate the controlled placement of single phosphorus bearing molecules on a silicon surface. This has been achieved by patterning a hydrogen mono-layer 'resist' with a scanning tunneling microscope (STM) tip and exposing the patterned surface to phosphine (PH3) molecules. We also describe preliminary studies into a process to incorporate these surface phosphorus atoms into the silicon crystal at the array sites. Keywords: Quantum computing, nanotechriology scanning turincling microscopy, hydrogen lithography

  4. The CMS silicon tracker

    International Nuclear Information System (INIS)

    Focardi, E.; Albergo, S.; Angarano, M.; Azzi, P.; Babucci, E.; Bacchetta, N.; Bader, A.; Bagliesi, G.; Basti, A.; Biggeri, U.; Bilei, G.M.; Bisello, D.; Boemi, D.; Bosi, F.; Borrello, L.; Bozzi, C.; Braibant, S.; Breuker, H.; Bruzzi, M.; Buffini, A.; Busoni, S.; Candelori, A.; Caner, A.; Castaldi, R.; Castro, A.; Catacchini, E.; Checcucci, B; Ciampolini, P.; Civinini, C.; Creanza, D.; D'Alessandro, R.; Da Rold, M.; Demaria, N.; De Palma, M.; Dell'Orso, R.; Della Marina, R.; Dutta, S.; Eklund, C.; Feld, L.; Fiore, L.; French, M.; Freudenreich, K.; Frey, A.; Fuertjes, A.; Giassi, A.; Giorgi, M.; Giraldo, A.; Glessing, B.; Gu, W.H.; Hall, G.; Hammarstrom, R.; Hebbeker, T.; Honma, A.; Hrubec, J.; Huhtinen, M.; Kaminsky, A.; Karimaki, V.; Koenig, St.; Krammer, M.; Lariccia, P.; Lenzi, M.; Loreti, M.; Leubelsmeyer, K.; Lustermann, W.; Maettig, P.; Maggi, G.; Mannelli, M.; Mantovani, G.; Marchioro, A.; Mariotti, C.; Martignon, G.; Evoy, B.Mc; Meschini, M.; Messineo, A.; Migliore, E.; My, S.; Paccagnella, A.; Palla, F.; Pandoulas, D.; Papi, A.; Parrini, G.; Passeri, D.; Pieri, M.; Piperov, S.; Potenza, R.; Radicci, V.; Raffaelli, F.; Raymond, M.; Rizzo, F.; Santocchia, A.; Schmitt, B.; Selvaggi, G.; Servoli, L.; Sguazzoni, G.; Siedling, R.; Silvestris, L.; Starodumov, A.; Stavitski, I.; Stefanini, G.; Surrow, B.; Tempesta, P.; Tonelli, G.; Tricomi, A.; Tuuva, T.; Vannini, C.; Verdini, P.G.; Viertel, G.; Xie, Z.; Yahong, Li; Watts, S.; Wittmer, B.

    2000-01-01

    This paper describes the Silicon microstrip Tracker of the CMS experiment at LHC. It consists of a barrel part with 5 layers and two endcaps with 10 disks each. About 10 000 single-sided equivalent modules have to be built, each one carrying two daisy-chained silicon detectors and their front-end electronics. Back-to-back modules are used to read-out the radial coordinate. The tracker will be operated in an environment kept at a temperature of T=-10 deg. C to minimize the Si sensors radiation damage. Heavily irradiated detectors will be safely operated due to the high-voltage capability of the sensors. Full-size mechanical prototypes have been built to check the system aspects before starting the construction

  5. Undepleted silicon detectors

    International Nuclear Information System (INIS)

    Rancoita, P.G.; Seidman, A.

    1985-01-01

    Large-size silicon detectors employing relatively low resistivity material can be used in electromagnetic calorimetry. They can operate in strong magnetic fields, under geometric constraints and with microstrip detectors a high resolution can be achieved. Low noise large capacitance oriented electronics was developed to enable good signal-to-noise ratio for single relativistic particles traversing large area detectors. In undepleted silicon detectors, the charge migration from the field-free region has been investigated by comparing the expected peak position (from the depleted layer only) of the energy-loss of relativistic electrons with the measured one. Furthermore, the undepleted detectors have been employed in a prototype of Si/W electromagnetic colorimeter. The sensitive layer was found to be systematically larger than the depleted one

  6. Silicon nanowire transistors

    CERN Document Server

    Bindal, Ahmet

    2016-01-01

    This book describes the n and p-channel Silicon Nanowire Transistor (SNT) designs with single and dual-work functions, emphasizing low static and dynamic power consumption. The authors describe a process flow for fabrication and generate SPICE models for building various digital and analog circuits. These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology’s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types...

  7. Amorphous silicon radiation detectors

    Science.gov (United States)

    Street, Robert A.; Perez-Mendez, Victor; Kaplan, Selig N.

    1992-01-01

    Hydrogenated amorphous silicon radiation detector devices having enhanced signal are disclosed. Specifically provided are transversely oriented electrode layers and layered detector configurations of amorphous silicon, the structure of which allow high electric fields upon application of a bias thereby beneficially resulting in a reduction in noise from contact injection and an increase in signal including avalanche multiplication and gain of the signal produced by incoming high energy radiation. These enhanced radiation sensitive devices can be used as measuring and detection means for visible light, low energy photons and high energy ionizing particles such as electrons, x-rays, alpha particles, beta particles and gamma radiation. Particular utility of the device is disclosed for precision powder crystallography and biological identification.

  8. Electron beam silicon purification

    Energy Technology Data Exchange (ETDEWEB)

    Kravtsov, Anatoly [SIA ' ' KEPP EU' ' , Riga (Latvia); Kravtsov, Alexey [' ' KEPP-service' ' Ltd., Moscow (Russian Federation)

    2014-11-15

    Purification of heavily doped electronic grade silicon by evaporation of N-type impurities with electron beam heating was investigated in process with a batch weight up to 50 kilos. Effective temperature of the melt, an indicative parameter suitable for purification process characterization was calculated and appeared to be stable for different load weight processes. Purified material was successfully approbated in standard CZ processes of three different companies. Each company used its standard process and obtained CZ monocrystals applicable for photovoltaic application. These facts enable process to be successfully scaled up to commercial volumes (150-300 kg) and yield solar grade silicon. (copyright 2014 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  9. Electrometallurgy of Silicon

    Science.gov (United States)

    1988-01-01

    wind, plants, and water impounded in elevated reservoirs. Photovoltaic or solar cells, which convert sunlight directly to electricity, belongs tc, the...on record is that of St. Claire DeVille, who claimed that silicon was produced by electrolysing an impure melt of NaAlC14, but his material did not...this composition and purified melts were electrolysed at about 14500C in graphite crucible and using graphite electrodes. Applied potentials were

  10. Liquid Silicon Pouch Anode

    Science.gov (United States)

    2017-09-06

    Number 15/696,426 Filing Date 6 September 2017 Inventor Charles J. Patrissi et al Address any questions concerning this matter to the...silicon-based anodes during cycling, lithium insertion and deinsertion. Mitigation of this problem has long been sought and will result in improved...design shown. [0032] It will be understood that many additional changes in the details, materials, steps and arrangement of parts, which have been

  11. Selfsupported epitaxial silicon films

    International Nuclear Information System (INIS)

    Lazarovici, D.; Popescu, A.

    1975-01-01

    The methods of removing the p or p + support of an n-type epitaxial silicon layer using electrochemical etching are described. So far, only n + -n junctions have been processed. The condition of anodic dissolution for some values of the support and layer resistivity are given. By this method very thin single crystal selfsupported targets of convenient areas can be obtained for channeling - blocking experiments

  12. Silicon and Civilization,

    Science.gov (United States)

    1980-11-04

    of a diamond. 7. The particular physical and chemical properties of silicon resulted in the fact that in the periodic system it was found in the III...small quantities. Silica is found in blades of grass and grain, in reed and bamboo shoots, where it serves to stiffen the stalk. 2. Diatomite ... properties desired in technology. Quartz glass is very resistant to temperature change since it has a very small coefficient of thermal expansion, is

  13. Porous silicon: silicon quantum dots for photonic applications

    International Nuclear Information System (INIS)

    Pavesi, L.; Guardini, R.

    1996-01-01

    Porous silicon formation and structure characterization are briefly illustrated. Its luminescence properties rae presented and interpreted on the basis of exciton recombination in quantum dot structures: the trap-controlled hopping mechanism is used to describe the recombination dynamics. Porous silicon application to photonic devices is considered: porous silicon multilayer in general, and micro cavities in particular are described. The present situation in the realization of porous silicon LEDs is considered, and future developments in this field of research are suggested. (author). 30 refs., 30 figs., 13 tabs

  14. Photovoltaic characteristics of porous silicon /(n+ - p) silicon solar cells

    International Nuclear Information System (INIS)

    Dzhafarov, T.D.; Aslanov, S.S.; Ragimov, S.H.; Sadigov, M.S.; Nabiyeva, A.F.; Yuksel, Aydin S.

    2012-01-01

    Full text : The purpose of this work is to improve the photovoltaic parameters of the screen-printed silicon solar cells by formation the nano-porous silicon film on the frontal surface of the cell. The photovoltaic characteristics of two type silicon solar cells with and without porous silicon layer were measured and compared. A remarkable increment of short-circuit current density and the efficiency by 48 percent and 20 percent, respectively, have been achieved for PS/(n + - pSi) solar cell comparing to (n + - p)Si solar cell without PS layer

  15. Strong quantum-confined stark effect in germanium quantum-well structures on silicon

    International Nuclear Information System (INIS)

    Kuo, Y.; Lee, Y. K.; Gei, Y.; Ren, S; Roth, J. E.; Miller, D. A.; Harris, J. S.

    2006-01-01

    Silicon is the dominant semiconductor for electronics, but there is now a growing need to integrate such component with optoelectronics for telecommunications and computer interconnections. Silicon-based optical modulators have recently been successfully demonstrated but because the light modulation mechanisms in silicon are relatively weak, long (for example, several millimeters) devices or sophisticated high-quality-factor resonators have been necessary. Thin quantum-well structures made from III-V semiconductors such as GaAs, InP and their alloys exhibit the much stronger Quantum-Confined Stark Effect (QCSE) mechanism, which allows modulator structures with only micrometers of optical path length. Such III-V materials are unfortunately difficult to integrate with silicon electronic devices. Germanium is routinely integrated with silicon in electronics, but previous silicon-germanium structures have also not shown strong modulation effects. Here we report the discovery of the QCSE, at room temperature, in thin germanium quantum-well structures grown on silicon. The QCSE here has strengths comparable to that in III-V materials. Its clarity and strength are particularly surprising because germanium is an indirect gap semiconductor, such semiconductors often display much weak optical effects than direct gap materials (such as the III-V materials typically used for optoelectronics). This discovery is very promising for small, high-speed, low-power optical output devices fully compatible with silicon electronics manufacture. (author)

  16. Silicon photonics fundamentals and devices

    CERN Document Server

    Deen, M Jamal

    2012-01-01

    The creation of affordable high speed optical communications using standard semiconductor manufacturing technology is a principal aim of silicon photonics research. This would involve replacing copper connections with optical fibres or waveguides, and electrons with photons. With applications such as telecommunications and information processing, light detection, spectroscopy, holography and robotics, silicon photonics has the potential to revolutionise electronic-only systems. Providing an overview of the physics, technology and device operation of photonic devices using exclusively silicon and related alloys, the book includes: * Basic Properties of Silicon * Quantum Wells, Wires, Dots and Superlattices * Absorption Processes in Semiconductors * Light Emitters in Silicon * Photodetectors , Photodiodes and Phototransistors * Raman Lasers including Raman Scattering * Guided Lightwaves * Planar Waveguide Devices * Fabrication Techniques and Material Systems Silicon Photonics: Fundamentals and Devices outlines ...

  17. Radiation Hardening of Silicon Detectors

    CERN Multimedia

    Leroy, C; Glaser, M

    2002-01-01

    %RD48 %title\\\\ \\\\Silicon detectors will be widely used in experiments at the CERN Large Hadron Collider where high radiation levels will cause significant bulk damage. In addition to increased leakage current and charge collection losses worsening the signal to noise, the induced radiation damage changes the effective doping concentration and represents the limiting factor to long term operation of silicon detectors. The objectives are to develop radiation hard silicon detectors that can operate beyond the limits of the present devices and that ensure guaranteed operation for the whole lifetime of the LHC experimental programme. Radiation induced defect modelling and experimental results show that the silicon radiation hardness depends on the atomic impurities present in the initial monocrystalline material.\\\\ \\\\ Float zone (FZ) silicon materials with addition of oxygen, carbon, nitrogen, germanium and tin were produced as well as epitaxial silicon materials with epilayers up to 200 $\\mu$m thickness. Their im...

  18. The processing and potential applications of porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Syyuan Shieh.

    1992-07-01

    Stability of a cylindrical pore under the influence of surface energy is important for porous silicon (PS) processing in the integrated circuit industry. Once the zig-zag cylindrical pores of porous silicon or oxidized porous silicon (OPS) are unstable and breakup into rows of isolated spherical pores, oxidation of PS and densification/nitridation of OPS become difficult. Swing to difficulty transport of reactant gas (O{sub 2}, NH{sub 3}) or the trapped gas (for densification of OPS). A first order analysis of the stability of a cylindrical pore or cylinder is considered first. Growth of small sinusoidal perturbations by viscous flow or evaporation/condensation result in dependence of perturbation growth rate on perturbation wavelength. Rapid thermal oxidation (RTO) of porous silicon is proposed as an alternative for the tedious two-step 300 and 800C oxidation process. Transmission electron microscopy, energy dispersive spectroscopy ESCA are used for quality control. Also, rapid thermal nitridation of oxidized porous silicon in ammonia is proposed to enhance OPS resistance to HF solution. Pores breakup of OPS results in a trapped gas problem during densification. Wet helium is proposed as OPS densification ambient gas to shorten densification time. Finally, PS is proposed to be an extrinsic gettering center in silicon wafers. The suppression of oxidation-induced stacking faults is used to demonstrate the gettering ability. Possible mechanism is discussed.

  19. The processing and potential applications of porous silicon

    Energy Technology Data Exchange (ETDEWEB)

    Shieh, Syyuan [Univ. of California, Berkeley, CA (United States)

    1992-07-01

    Stability of a cylindrical pore under the influence of surface energy is important for porous silicon (PS) processing in the integrated circuit industry. Once the zig-zag cylindrical pores of porous silicon or oxidized porous silicon (OPS) are unstable and breakup into rows of isolated spherical pores, oxidation of PS and densification/nitridation of OPS become difficult. Swing to difficulty transport of reactant gas (O2, NH3) or the trapped gas (for densification of OPS). A first order analysis of the stability of a cylindrical pore or cylinder is considered first. Growth of small sinusoidal perturbations by viscous flow or evaporation/condensation result in dependence of perturbation growth rate on perturbation wavelength. Rapid thermal oxidation (RTO) of porous silicon is proposed as an alternative for the tedious two-step 300 and 800C oxidation process. Transmission electron microscopy, energy dispersive spectroscopy ESCA are used for quality control. Also, rapid thermal nitridation of oxidized porous silicon in ammonia is proposed to enhance OPS resistance to HF solution. Pores breakup of OPS results in a trapped gas problem during densification. Wet helium is proposed as OPS densification ambient gas to shorten densification time. Finally, PS is proposed to be an extrinsic gettering center in silicon wafers. The suppression of oxidation-induced stacking faults is used to demonstrate the gettering ability. Possible mechanism is discussed.

  20. Silicon Nanowires for All-Optical Signal Processing in Optical Communication

    DEFF Research Database (Denmark)

    Pu, Minhao; Hu, Hao; Ji, Hua

    2012-01-01

    Silicon (Si), the second most abundant element on earth, has dominated in microelectronics for many decades. It can also be used for photonic devices due to its transparency in the range of optical telecom wavelengths which will enable a platform for a monolithic integration of optics...... and microelectronics. Silicon photonic nanowire waveguides fabricated on silicon-on-insulator (SOI) substrates are crucial elements in nano-photonic integrated circuits. The strong light confinement in nanowires induced by high index contrast SOI material enhances the nonlinear effects in the silicon nanowire core...... such as four-wave mixing (FWM) which is an imperative process for optical signal processing. Since the current mature silicon fabrication technology enables a precise dimension control on nanowires, dispersion engineering can be performed by tailoring nanowire dimensions to realize an efficient nonlinear...

  1. Characterization of Czochralski Silicon Detectors

    OpenAIRE

    Luukka, Panja-Riina; Haerkoenen, Jaakko

    2012-01-01

    This thesis describes the characterization of irradiated and non-irradiated segmenteddetectors made of high-resistivity (>1 kΩcm) magnetic Czochralski (MCZ) silicon. It isshown that the radiation hardness (RH) of the protons of these detectors is higher thanthat of devices made of traditional materials such as Float Zone (FZ) silicon or DiffusionOxygenated Float Zone (DOFZ) silicon due to the presence of intrinsic oxygen (> 5 x1017 cm-3). The MCZ devices therefore present an interesting alter...

  2. Silicon processing for photovoltaics II

    CERN Document Server

    Khattak, CP

    2012-01-01

    The processing of semiconductor silicon for manufacturing low cost photovoltaic products has been a field of increasing activity over the past decade and a number of papers have been published in the technical literature. This volume presents comprehensive, in-depth reviews on some of the key technologies developed for processing silicon for photovoltaic applications. It is complementary to Volume 5 in this series and together they provide the only collection of reviews in silicon photovoltaics available.The volume contains papers on: the effect of introducing grain boundaries in silicon; the

  3. Silicon-on-Insulator Nanowire Based Optical Waveguide Biosensors

    International Nuclear Information System (INIS)

    Li, Mingyu; Liu, Yong; Chen, Yangqing; He, Jian-Jun

    2016-01-01

    Optical waveguide biosensors based on silicon-on-insulator (SOI) nanowire have been developed for label free molecular detection. This paper reviews our work on the design, fabrication and measurement of SOI nanowire based high-sensitivity biosensors employing Vernier effect. Biosensing experiments using cascaded double-ring sensor and Mach-Zehnder- ring sensor integrated with microfluidic channels are demonstrated (paper)

  4. Modular design of AFM probe with sputtered silicon tip

    DEFF Research Database (Denmark)

    Rasmussen, Peter; Thaysen, Jacob; Bouwstra, Siebe

    2001-01-01

    of the thin films constituting the cantilever. The AFM probe has an integrated tip made of a thick sputtered silicon layer, which is deposited after the probe has been defined and just before the cantilevers are released. The tips are so-called rocket tips made by reactive ion etching. We present probes...

  5. Epitaxial III-V nanowires on silicon for vertical devices

    NARCIS (Netherlands)

    Bakkers, E.P.A.M.; Borgström, M.T.; Einden, Van Den W.; Weert, van M.H.M.; Helman, A.; Verheijen, M.A.

    2006-01-01

    We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the Vapor-Liquid-Solid (VLS) mechanism with laser ablation as well as metal organic vapor phase epitaxy. The VLS growth enables the fabrication of complex axial and radial

  6. Silicon graphene waveguide tunable broadband microwave photonics phase shifter.

    Science.gov (United States)

    Capmany, José; Domenech, David; Muñoz, Pascual

    2014-04-07

    We propose the use of silicon graphene waveguides to implement a tunable broadband microwave photonics phase shifter based on integrated ring cavities. Numerical computation results show the feasibility for broadband operation over 40 GHz bandwidth and full 360° radiofrequency phase-shift with a modest voltage excursion of 0.12 volt.

  7. Synthesis, Characterization and Optical Constants of Silicon Oxycarbide

    Directory of Open Access Journals (Sweden)

    Memon Faisal Ahmed

    2017-01-01

    Full Text Available High refractive index glasses are preferred in integrated photonics applications to realize higher integration scale of passive devices. With a refractive index that can be tuned between SiO2 (1.45 and a-SiC (3.2, silicon oxycarbide SiOC offers this flexibility. In the present work, silicon oxycarbide thin films from 0.1 – 2.0 μm thickness are synthesized by reactive radio frequency magnetron sputtering a silicon carbide SiC target in a controlled argon and oxygen environment. The refractive index n and material extinction coefficient k of the silicon oxycarbide films are acquired with variable angle spectroscopic ellipsometry over the UV-Vis-NIR wavelength range. Keeping argon and oxygen gases in the constant ratio, the refractive index n is found in the range from 1.41 to 1.93 at 600 nm which is almost linearly dependent on RF power of sputtering. The material extinction coefficient k has been estimated to be less than 10-4 for the deposited silicon oxycarbide films in the visible and near-infrared wavelength regions. Morphological and structural characterizations with SEM and XRD confirms the amorphous phase of the SiOC films.

  8. Ultra-short silicon MMI duplexer

    Science.gov (United States)

    Yi, Huaxiang; Huang, Yawen; Wang, Xingjun; Zhou, Zhiping

    2012-11-01

    The fiber-to-the-home (FTTH) systems are growing fast these days, where two different wavelengths are used for upstream and downstream traffic, typically 1310nm and 1490nm. The duplexers are the key elements to separate these wavelengths into different path in central offices (CO) and optical network unit (ONU) in passive optical network (PON). Multimode interference (MMI) has some benefits to be a duplexer including large fabrication tolerance, low-temperature dependence, and low-polarization dependence, but its size is too large to integrate in conventional case. Based on the silicon photonics platform, ultra-short silicon MMI duplexer was demonstrated to separate the 1310nm and 1490nm lights. By studying the theory of self-image phenomena in MMI, the first order images are adopted in order to keep the device short. A cascaded MMI structure was investigated to implement the wavelength splitting, where both the light of 1310nm and 1490nm was input from the same port, and the 1490nm light was coupling cross the first MMI and output at the cross-port in the device while the 1310nm light was coupling through the first and second MMI and output at the bar-port in the device. The experiment was carried on with the SOI wafer of 340nm top silicon. The cascaded MMI was investigated to fold the length of the duplexer as short as 117μm with the extinct ratio over 10dB.

  9. Multipurpose silicon photonics signal processor core.

    Science.gov (United States)

    Pérez, Daniel; Gasulla, Ivana; Crudgington, Lee; Thomson, David J; Khokhar, Ali Z; Li, Ke; Cao, Wei; Mashanovich, Goran Z; Capmany, José

    2017-09-21

    Integrated photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint, and cost. Application-specific photonic integrated circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long development times. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable photonic processor, where a common hardware implemented by a two-dimensional photonic waveguide mesh realizes different functionalities through programming. Here, we report the demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate over 20 different functionalities with a simple seven hexagonal cell structure, which can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks, and quantum information systems. Our work is an important step toward this paradigm.Integrated optical circuits today are typically designed for a few special functionalities and require complex design and development procedures. Here, the authors demonstrate a reconfigurable but simple silicon waveguide mesh with different functionalities.

  10. Light emitting structures porous silicon-silicon substrate

    International Nuclear Information System (INIS)

    Monastyrskii, L.S.; Olenych, I.B.; Panasjuk, M.R.; Savchyn, V.P.

    1999-01-01

    The research of spectroscopic properties of porous silicon has been done. Complex of photoluminescence, electroluminescence, cathodoluminescence, thermostimulated depolarisation current analyte methods have been applied to study of geterostructures and free layers of porous silicon. Light emitting processes had tendency to decrease. The character of decay for all kinds of luminescence were different

  11. Indentation fatigue in silicon nitride, alumina and silicon carbide ...

    Indian Academy of Sciences (India)

    Repeated indentation fatigue (RIF) experiments conducted on the same spot of different structural ceramics viz. a hot pressed silicon nitride (HPSN), sintered alumina of two different grain sizes viz. 1 m and 25 m, and a sintered silicon carbide (SSiC) are reported. The RIF experiments were conducted using a Vicker's ...

  12. Silicon detectors for tracking and vertexing

    International Nuclear Information System (INIS)

    Nomerotski, Andrei

    2009-01-01

    This review covers recent developments in silicon detectors used for particle physics experiments for the tracking and vertexing systems. After a general introduction the main focus of the report is on new challenges for this field posed by requirements of the future generation machines. Technologies reviewed in more detail are column parallel CCDs, DEPFET, vertical integration of sensors and electronics and several others which allow fast readout and low mass design. Important system issues such as mechanical arrangements for the sensors and power distribution, which are critical for the low mass design, are also discussed.

  13. Role of water in the tribochemical removal of bare silicon

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Cheng; Xiao, Chen [Tribology Research Institute, National Traction Power Laboratory, Southwest Jiaotong University, Chengdu 610031 (China); Wang, Xiaodong [Center of Micro/Nano Science and Technology, Jiangsu University, Zhenjiang 212013 (China); Zhang, Peng; Chen, Lei; Qi, Yaqiong [Tribology Research Institute, National Traction Power Laboratory, Southwest Jiaotong University, Chengdu 610031 (China); Qian, Linmao, E-mail: linmao@swjtu.edu.cn [Tribology Research Institute, National Traction Power Laboratory, Southwest Jiaotong University, Chengdu 610031 (China)

    2016-12-30

    Highlights: • The wear of bare silicon against SiO{sub 2} micro-spherical tip is a tribochemical process with participation of water. • The water amount at Si/SiO{sub 2} interface plays a significant role on the wear of bare silicon. • The role of water relies on the hydroxylation by auto-ionized OH{sup −}, the hydrolysis of H{sub 2}O molecules, and the dissolution of SiO{sub m}H{sub n} in water. - Abstract: Nanowear tests of bare silicon against a SiO{sub 2} microsphere were conducted in air (relative humidity [RH] = 0%–89%) and water using an atomic force microscope. Experimental results revealed that the water played an important role in the tribochemical wear of the bare silicon. A hillock-like wear trace with a height of 0.7 nm was generated on the bare silicon surface in dry air. As the RH increased, the wear depth increased and reached the maximum level in water. Analysis of frictional dissipated energy suggested that the wear of the bare silicon was not dominated by mechanical interactions. High-resolution transmission electron microscopy detection demonstrated that the silicon atoms and crystal lattice underneath the worn area maintained integral perfectly and thus further confirmed the tribochemical wear mechanism of the bare silicon. Finally, the role of water in the tribochemical wear of the bare silicon may be explained by the following three aspects: the hydroxylation by hydroxyl ions auto-ionized in water, the hydrolytic reaction of water molecules, and the dissolution of the tribochemical product SiO{sub m}H{sub n} in liquid water. With increasing RH, a greater water amount would adsorb to the Si/SiO{sub 2} interface and induce a more serious tribochemical wear on the bare silicon surface. The results of this paper may provide further insight into the tribochemical removal mechanism of bare monocrystalline silicon and furnish the wider reaction cognition for chemical mechanical polishing.

  14. Interstellar Silicon Depletion and the Ultraviolet Extinction

    Science.gov (United States)

    Mishra, Ajay; Li, Aigen

    2018-01-01

    Spinning small silicate grains were recently invoked to account for the Galactic foreground anomalous microwave emission. These grains, if present, will absorb starlight in the far ultraviolet (UV). There is also renewed interest in attributing the enigmatic 2175 Å interstellar extinction bump to small silicates. To probe the role of silicon in the UV extinction, we explore the relations between the amount of silicon required to be locked up in silicates [Si/H]dust and the 2175 Å bump or the far-UV extinction rise, based on an analysis of the extinction curves along 46 Galactic sightlines for which the gas-phase silicon abundance [Si/H]gas is known. We derive [Si/H]dust either from [Si/H]ISM - [Si/H]gas or from the Kramers- Kronig relation which relates the wavelength-integrated extinction to the total dust volume, where [Si/H]ISM is the interstellar silicon reference abundance and taken to be that of proto-Sun or B stars. We also derive [Si/H]dust from fi�tting the observed extinction curves with a mixture of amorphous silicates and graphitic grains. We fi�nd that in all three cases [Si/H]dust shows no correlation with the 2175 Å bump, while the carbon depletion [C/H]dust tends to correlate with the 2175 Å bump. This supports carbon grains instead of silicates as the possible carrier of the 2175 Å bump. We also �find that neither [Si/H]dust nor [C/H]dust alone correlates with the far-UV extinction, suggesting that the far-UV extinction is a combined effect of small carbon grains and silicates.

  15. The European BOOM project :silicon photonics for high-capacity optical packet routers

    NARCIS (Netherlands)

    Stampoulidis, L.; Vyrsokinos, K.; Voigt, K.; Zimmermann, L.; Gomez-Agis, F.; Dorren, H.J.S.; Sheng, Z.; Thourhout, Van D.; Moerl, L.; Kreissl, J.; Sedighi, B.; Scheytt, J.C.; Pagano, A.; Riccardi, E.

    2010-01-01

    During the past years, monolithic integration in InP has been the driving force for the realization of integrated photonic routing systems. The advent of silicon as a basis for cost-effective integration and its potential blend with III–V material is now opening exciting opportunities for the

  16. The LHCb Silicon Tracker

    CERN Document Server

    Elsasser, Ch; Gallas Torreira, A; Pérez Trigo, A; Rodríguez Pérez, P; Bay, A; Blanc, F; Dupertuis, F; Haefeli, G; Komarov, I; Märki, R; Muster, B; Nakada, T; Schneider, O; Tobin, M; Tran, M T; Anderson, J; Bursche, A; Chiapolini, N; Saornil, S; Steiner, S; Steinkamp, O; Straumann, U; Vollhardt, A; Britsch, M; Schmelling, M; Voss, H; Okhrimenko, O; Pugatch, V

    2013-01-01

    The aim of the LHCb experiment is to study rare heavy quark decays and CP vio- lation with the high rate of beauty and charmed hadrons produced in $pp$ collisions at the LHC. The detector is designed as a single-arm forward spectrometer with excellent tracking and particle identification performance. The Silicon Tracker is a key part of the tracking system to measure the particle trajectories to high precision. This paper reports the performance as well as the results of the radiation damage monitoring based on leakage currents and on charge collection efficiency scans during the data taking in the LHC Run I.

  17. Photovoltaics: sunshine and silicon

    Energy Technology Data Exchange (ETDEWEB)

    Stirzaker, Mike

    2006-05-15

    Spain's photovoltaic sector grew rapidly in 2004 only to slow down in 2005. While a State-guaranteed feed-in tariff is in place to drive a take-off, some of the smaller administrative cogs are buckling under the pressure. Projects are being further slowed by soaring world silicon prices and module shortages. Nevertheless, market volume is higher than ever before, and bio capital from both home and abroad is betting that the Spanish take-off is around the corner. (Author)

  18. Silicon tracker end cap of the CMS experiment at LHC and study of the discovery potential for resonances decaying in top quark pairs; Integration d'un bouchon du trajectographe au silicium de l'experience CMS au LHC et etude du potentiel de decouverte de resonances se desintegrant en paires de quarks top

    Energy Technology Data Exchange (ETDEWEB)

    Chabert, E

    2008-10-15

    The first part of this thesis is dedicated to the integration of one silicon tracker end cap of the CMS experiment. The procedures implemented and the tests that led to the qualification of the detection system are presented in this document. The first chapter is an introduction to the LHC and to the CMS experiment. The second chapter is dedicated to the CMS tracker, that is a detector made up of silicon micro-stripe whose purpose is to reconstruct the tracks of charged-particles, to measure their momentum, to reconstruct vertex and to contribute to the tagging of heavy flavour quarks. The third chapter presents the integration of one of the tracker end caps. The second part of this thesis is dedicated to the search for new physics in the top quark sector. One of the most promising channel is to look for a resonance in the invariant mass distribution of top quark pairs. The fourth chapter is a theoretical introduction to this work, the standard model is introduced and the top quarks physics as well as tt-bar resonances are highlighted. The fifth chapter describes the tools used to analyse data, all the data come from simulations. The search for tt-bar resonances is presented in the last chapter. This search involves a method to select right events, a strategy to reduce background noise and a method for the reconstruction of the events. A kinematical adjustment is made to identify the right combinations of jets and to improve the experimental resolution on the invariant mass. The full simulation analysis in the 'lepton + jets' channel shows that at the TeV scale, processes from a few hundred fb to one pb could be observed in the early years of data taking.

  19. Magnetically retained silicone facial prosthesis

    African Journals Online (AJOL)

    2013-06-09

    Jun 9, 2013 ... Prosthetic camouflaging of facial defects and use of silicone maxillofacial material are the alternatives to the surgical retreatment. Silicone elastomers provide more options to clinician for customization of the facial prosthesis which is simple, esthetically good when coupled with bio magnets for retention.

  20. Impurity doping processes in silicon

    CERN Document Server

    Wang, FFY

    1981-01-01

    This book introduces to non-experts several important processes of impurity doping in silicon and goes on to discuss the methods of determination of the concentration of dopants in silicon. The conventional method used is the discussion process, but, since it has been sufficiently covered in many texts, this work describes the double-diffusion method.