Long-wavelength III-V/silicon photonic integrated circuits

NARCIS (Netherlands)

Roelkens, G.C.; Kuyken, B.; Leo, F.; Hattasan, N.; Ryckeboer, E.M.P.; Muneeb, M.; Hu, C.L.; Malik, A.; Hens, Z.; Baets, R.G.F.; Shimura, Y.; Gencarelli, F.; Vincent, B.; Loo, van de R.; Verheyen, P.A.; Lepage, G.; Campenhout, van J.; Cerutti, L.; Rodriquez, J.B.; Tournie, E.; Chen, X; Nedeljkovic, G.; Mashanovich, G.; Liu, X.; Green, W.S.

2013-01-01

We review our work in the field of short-wave infrared and mid-infrared photonic integrated circuits for applications in spectroscopic sensing systems. Passive silicon waveguide circuits, GeSn photodetectors, the integration of III-V and IV-VI semiconductors on these circuits, and silicon nonlinear

Silicon integrated circuits part A : supplement 2

CERN Document Server

Kahng, Dawon

1981-01-01

Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

Amorphous silicon rich silicon nitride optical waveguides for high density integrated optics

DEFF Research Database (Denmark)

Philipp, Hugh T.; Andersen, Karin Nordström; Svendsen, Winnie Edith

2004-01-01

Amorphous silicon rich silicon nitride optical waveguides clad in silica are presented as a high-index contrast platform for high density integrated optics. Performance of different cross-sectional geometries have been measured and are presented with regards to bending loss and insertion loss...

Flexible integration of free-standing nanowires into silicon photonics.

Science.gov (United States)

Chen, Bigeng; Wu, Hao; Xin, Chenguang; Dai, Daoxin; Tong, Limin

2017-06-14

Silicon photonics has been developed successfully with a top-down fabrication technique to enable large-scale photonic integrated circuits with high reproducibility, but is limited intrinsically by the material capability for active or nonlinear applications. On the other hand, free-standing nanowires synthesized via a bottom-up growth present great material diversity and structural uniformity, but precisely assembling free-standing nanowires for on-demand photonic functionality remains a great challenge. Here we report hybrid integration of free-standing nanowires into silicon photonics with high flexibility by coupling free-standing nanowires onto target silicon waveguides that are simultaneously used for precise positioning. Coupling efficiency between a free-standing nanowire and a silicon waveguide is up to ~97% in the telecommunication band. A hybrid nonlinear-free-standing nanowires-silicon waveguides Mach-Zehnder interferometer and a racetrack resonator for significantly enhanced optical modulation are experimentally demonstrated, as well as hybrid active-free-standing nanowires-silicon waveguides circuits for light generation. These results suggest an alternative approach to flexible multifunctional on-chip nanophotonic devices.Precisely assembling free-standing nanowires for on-demand photonic functionality remains a challenge. Here, Chen et al. integrate free-standing nanowires into silicon waveguides and show all-optical modulation and light generation on silicon photonic chips.

Integrated double-sided silicon microstrip detectors

Directory of Open Access Journals (Sweden)

Perevertailo V. L.

2011-11-01

Full Text Available The problems of design, technology and manufacturing double-sided silicon microstrip detectors using standard equipment production line in mass production of silicon integrated circuits are considered. The design of prototype high-energy particles detector for experiment ALICE (CERN is presented. The parameters of fabricated detectors are comparable with those of similar foreign detectors, but they are distinguished by lesser cost.

Materials issues in silicon integrated circuit processing

International Nuclear Information System (INIS)

Wittmer, M.; Stimmell, J.; Strathman, M.

1986-01-01

The symposium on ''Materials Issues in Integrated Circuit Processing'' sought to bring together all of the materials issued pertinent to modern integrated circuit processing. The inherent properties of the materials are becoming an important concern in integrated circuit manufacturing and accordingly research in materials science is vital for the successful implementation of modern integrated circuit technology. The session on Silicon Materials Science revealed the advanced stage of knowledge which topics such as point defects, intrinsic and extrinsic gettering and diffusion kinetics have achieved. Adaption of this knowledge to specific integrated circuit processing technologies is beginning to be addressed. The session on Epitaxy included invited papers on epitaxial insulators and IR detectors. Heteroepitaxy on silicon is receiving great attention and the results presented in this session suggest that 3-d integrated structures are an increasingly realistic possibility. Progress in low temperature silicon epitaxy and epitaxy of thin films with abrupt interfaces was also reported. Diffusion and Ion Implantation were well presented. Regrowth of implant-damaged layers and the nature of the defects which remain after regrowth were discussed in no less than seven papers. Substantial progress was also reported in the understanding of amorphising boron implants and the use of gallium implants for the formation of shallow p/sup +/ -layers

Silicon Photonics II Components and Integration

CERN Document Server

Lockwood, David J

2011-01-01

This book is volume II of a series of books on silicon photonics. It gives a fascinating picture of the state-of-the-art in silicon photonics from a component perspective. It presents a perspective on what can be expected in the near future. It is formed from a selected number of reviews authored by world leaders in the field, and is written from both academic and industrial viewpoints. An in-depth discussion of the route towards fully integrated silicon photonics is presented. This book will be useful not only to physicists, chemists, materials scientists, and engineers but also to graduate students who are interested in the fields of micro- and nanophotonics and optoelectronics.

Hybrid integrated single-wavelength laser with silicon micro-ring reflector

Science.gov (United States)

Ren, Min; Pu, Jing; Krishnamurthy, Vivek; Xu, Zhengji; Lee, Chee-Wei; Li, Dongdong; Gonzaga, Leonard; Toh, Yeow T.; Tjiptoharsono, Febi; Wang, Qian

2018-02-01

A hybrid integrated single-wavelength laser with silicon micro-ring reflector is demonstrated theoretically and experimentally. It consists of a heterogeneously integrated III-V section for optical gain, an adiabatic taper for light coupling, and a silicon micro-ring reflector for both wavelength selection and light reflection. Heterogeneous integration processes for multiple III-V chips bonded to an 8-inch Si wafer have been developed, which is promising for massive production of hybrid lasers on Si. The III-V layer is introduced on top of a 220-nm thick SOI layer through low-temperature wafer-boning technology. The optical coupling efficiency of >85% between III-V and Si waveguide has been achieved. The silicon micro-ring reflector, as the key element of the hybrid laser, is studied, with its maximized reflectivity of 85.6% demonstrated experimentally. The compact single-wavelength laser enables fully monolithic integration on silicon wafer for optical communication and optical sensing application.

System-level integration of active silicon photonic biosensors

Science.gov (United States)

Laplatine, L.; Al'Mrayat, O.; Luan, E.; Fang, C.; Rezaiezadeh, S.; Ratner, D. M.; Cheung, K.; Dattner, Y.; Chrostowski, L.

2017-02-01

Biosensors based on silicon photonic integrated circuits have attracted a growing interest in recent years. The use of sub-micron silicon waveguides to propagate near-infrared light allows for the drastic reduction of the optical system size, while increasing its complexity and sensitivity. Using silicon as the propagating medium also leverages the fabrication capabilities of CMOS foundries, which offer low-cost mass production. Researchers have deeply investigated photonic sensor devices, such as ring resonators, interferometers and photonic crystals, but the practical integration of silicon photonic biochips as part of a complete system has received less attention. Herein, we present a practical system-level architecture which can be employed to integrate the aforementioned photonic biosensors. We describe a system based on 1 mm2 dies that integrate germanium photodetectors and a single light coupling device. The die are embedded into a 16x16 mm2 epoxy package to enable microfluidic and electrical integration. First, we demonstrate a simple process to mimic Fan-Out Wafer-level-Packaging, which enables low-cost mass production. We then characterize the photodetectors in the photovoltaic mode, which exhibit high sensitivity at low optical power. Finally, we present a new grating coupler concept to relax the lateral alignment tolerance down to +/- 50 μm at 1-dB (80%) power penalty, which should permit non-experts to use the biochips in a"plug-and-play" style. The system-level integration demonstrated in this study paves the way towards the mass production of low-cost and highly sensitive biosensors, and can facilitate their wide adoption for biomedical and agro-environmental applications.

Integration of mask and silicon metrology in DFM

Science.gov (United States)

Matsuoka, Ryoichi; Mito, Hiroaki; Sugiyama, Akiyuki; Toyoda, Yasutaka

2009-03-01

We have developed a highly integrated method of mask and silicon metrology. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. We have inspected the high accuracy, stability and reproducibility in the experiments of integration. The accuracy is comparable with that of the mask and silicon CD-SEM metrology. In this report, we introduce the experimental results and the application. As shrinkage of design rule for semiconductor device advances, OPC (Optical Proximity Correction) goes aggressively dense in RET (Resolution Enhancement Technology). However, from the view point of DFM (Design for Manufacturability), the cost of data process for advanced MDP (Mask Data Preparation) and mask producing is a problem. Such trade-off between RET and mask producing is a big issue in semiconductor market especially in mask business. Seeing silicon device production process, information sharing is not completely organized between design section and production section. Design data created with OPC and MDP should be linked to process control on production. But design data and process control data are optimized independently. Thus, we provided a solution of DFM: advanced integration of mask metrology and silicon metrology. The system we propose here is composed of followings. 1) Design based recipe creation: Specify patterns on the design data for metrology. This step is fully automated since they are interfaced with hot spot coordinate information detected by various verification methods. 2) Design based image acquisition: Acquire the images of mask and silicon automatically by a recipe based on the pattern design of CD-SEM.It is a robust automated step because a wide range of design data is used for the image acquisition. 3) Contour profiling and GDS data generation: An image profiling process is applied to the acquired image based

Heterogeneously integrated silicon photonics for the mid-infrared and spectroscopic sensing.

Science.gov (United States)

Chen, Yu; Lin, Hongtao; Hu, Juejun; Li, Mo

2014-07-22

Besides being the foundational material for microelectronics, crystalline silicon has long been used for the production of infrared lenses and mirrors. More recently, silicon has become the key material to achieve large-scale integration of photonic devices for on-chip optical interconnect and signal processing. For optics, silicon has significant advantages: it offers a very high refractive index and is highly transparent in the spectral range from 1.2 to 8 μm. To fully exploit silicon’s superior performance in a remarkably broad range and to enable new optoelectronic functionalities, here we describe a general method to integrate silicon photonic devices on arbitrary foreign substrates. In particular, we apply the technique to integrate silicon microring resonators on mid-infrared compatible substrates for operation in the mid-infrared. These high-performance mid-infrared optical resonators are utilized to demonstrate, for the first time, on-chip cavity-enhanced mid-infrared spectroscopic analysis of organic chemicals with a limit of detection of less than 0.1 ng.

Silicon Photonic Integrated Circuit Mode Multiplexer

DEFF Research Database (Denmark)

Ding, Yunhong; Ou, Haiyan; Xu, Jing

2013-01-01

We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully...

Hybrid Integration of Solid-State Quantum Emitters on a Silicon Photonic Chip.

Science.gov (United States)

Kim, Je-Hyung; Aghaeimeibodi, Shahriar; Richardson, Christopher J K; Leavitt, Richard P; Englund, Dirk; Waks, Edo

2017-12-13

Scalable quantum photonic systems require efficient single photon sources coupled to integrated photonic devices. Solid-state quantum emitters can generate single photons with high efficiency, while silicon photonic circuits can manipulate them in an integrated device structure. Combining these two material platforms could, therefore, significantly increase the complexity of integrated quantum photonic devices. Here, we demonstrate hybrid integration of solid-state quantum emitters to a silicon photonic device. We develop a pick-and-place technique that can position epitaxially grown InAs/InP quantum dots emitting at telecom wavelengths on a silicon photonic chip deterministically with nanoscale precision. We employ an adiabatic tapering approach to transfer the emission from the quantum dots to the waveguide with high efficiency. We also incorporate an on-chip silicon-photonic beamsplitter to perform a Hanbury-Brown and Twiss measurement. Our approach could enable integration of precharacterized III-V quantum photonic devices into large-scale photonic structures to enable complex devices composed of many emitters and photons.

Heterogeneous integration of lithium niobate and silicon nitride waveguides for wafer-scale photonic integrated circuits on silicon.

Science.gov (United States)

Chang, Lin; Pfeiffer, Martin H P; Volet, Nicolas; Zervas, Michael; Peters, Jon D; Manganelli, Costanza L; Stanton, Eric J; Li, Yifei; Kippenberg, Tobias J; Bowers, John E

2017-02-15

An ideal photonic integrated circuit for nonlinear photonic applications requires high optical nonlinearities and low loss. This work demonstrates a heterogeneous platform by bonding lithium niobate (LN) thin films onto a silicon nitride (Si3N4) waveguide layer on silicon. It not only provides large second- and third-order nonlinear coefficients, but also shows low propagation loss in both the Si3N4 and the LN-Si3N4 waveguides. The tapers enable low-loss-mode transitions between these two waveguides. This platform is essential for various on-chip applications, e.g., modulators, frequency conversions, and quantum communications.

Silicon integrated circuits advances in materials and device research

CERN Document Server

Kahng, Dawon

1981-01-01

Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

Porous silicon technology for integrated microsystems

Science.gov (United States)

Wallner, Jin Zheng

With the development of micro systems, there is an increasing demand for integrable porous materials. In addition to those conventional applications, such as filtration, wicking, and insulating, many new micro devices, including micro reactors, sensors, actuators, and optical components, can benefit from porous materials. Conventional porous materials, such as ceramics and polymers, however, cannot meet the challenges posed by micro systems, due to their incompatibility with standard micro-fabrication processes. In an effort to produce porous materials that can be used in micro systems, porous silicon (PS) generated by anodization of single crystalline silicon has been investigated. In this work, the PS formation process has been extensively studied and characterized as a function of substrate type, crystal orientation, doping concentration, current density and surfactant concentration and type. Anodization conditions have been optimized for producing very thick porous silicon layers with uniform pore size, and for obtaining ideal pore morphologies. Three different types of porous silicon materials: meso porous silicon, macro porous silicon with straight pores, and macro porous silicon with tortuous pores, have been successfully produced. Regular pore arrays with controllable pore size in the range of 2mum to 6mum have been demonstrated as well. Localized PS formation has been achieved by using oxide/nitride/polysilicon stack as masking materials, which can withstand anodization in hydrofluoric acid up to twenty hours. A special etching cell with electrolytic liquid backside contact along with two process flows has been developed to enable the fabrication of thick macro porous silicon membranes with though wafer pores. For device assembly, Si-Au and In-Au bonding technologies have been developed. Very low bonding temperature (˜200°C) and thick/soft bonding layers (˜6mum) have been achieved by In-Au bonding technology, which is able to compensate the potentially

Integration of lateral porous silicon membranes into planar microfluidics.

Science.gov (United States)

Leïchlé, Thierry; Bourrier, David

2015-02-07

In this work, we present a novel fabrication process that enables the monolithic integration of lateral porous silicon membranes into single-layer planar microchannels. This fabrication technique relies on the patterning of local electrodes to guide pore formation horizontally within the membrane and on the use of silicon-on-insulator substrates to spatially localize porous silicon within the channel depth. The feasibility of our approach is studied by current flow analysis using the finite element method and supported by creating 10 μm long mesoporous membranes within 20 μm deep microchannels. The fabricated membranes are demonstrated to be potentially useful for dead-end microfiltration by adequately retaining 300 nm diameter beads while macromolecules such as single-stranded DNA and immunoglobulin G permeate the membrane. The experimentally determined fluidic resistance is in accordance with the theoretical value expected from the estimated pore size and porosity. The work presented here is expected to greatly simplify the integration of membranes capable of size exclusion based separation into fluidic devices and opens doors to the use of porous silicon in planar lab on a chip devices.

Integration of the End Cap TEC+ of the CMS Silicon Strip Tracker

CERN Document Server

Adler, Volker; Ageron, Michel; Agram, Jean-Laurent; Atz, Bernd; Barvich, Tobias; Baulieu, Guillaume; Beaumont, Willem; Beissel, Franz; Bergauer, Thomas; Berst, Jean-Daniel; Blüm, Peter; Bock, E; Bogelsbacher, F; de Boer, Wim; Bonnet, Jean-Luc; Bonnevaux, Alain; Boudoul, Gaelle; Bouhali, Othmane; Braunschweig, Wolfgang; Bremer, R; Brom, Jean-Marie; Butz, Erik; Chabanat, Eric; Chabert, Eric Christian; Clerbaux, Barbara; Contardo, Didier; De Callatay, Bernard; Dehm, Philip; Delaere, Christophe; Della Negra, Rodolphe; Dewulf, Jean-Paul; D'Hondt, Jorgen; Didierjean, Francois; Dierlamm, Alexander; Dirkes, Guido; Dragicevic, Marko; Drouhin, Frédéric; Ernenwein, Jean-Pierre; Esser, Hans; Estre, Nicolas; Fahrer, Manuel; Feld, Lutz; Fernández, J; Florins, Benoit; Flossdorf, Alexander; Flucke, Gero; Flügge, Günter; Fontaine, Jean-Charles; Freudenreich, Klaus; Frey, Martin; Friedl, Markus; Furgeri, Alexander; Giraud, Noël; Goerlach, Ulrich; Goorens, Robert; Graehling, Philippe; Grégoire, Ghislain; Gregoriev, E; Gross, Laurent; Hansel, S; Haroutunian, Roger; Hartmann, Frank; Heier, Stefan; Hermanns, Thomas; Heydhausen, Dirk; Heyninck, Jan; Hosselet, J; Hrubec, Josef; Jahn, Dieter; Juillot, Pierre; Kaminski, Jochen; Karpinski, Waclaw; Kaussen, Gordon; Keutgen, Thomas; Klanner, Robert; Klein, Katja; König, Stefan; Kosbow, M; Krammer, Manfred; Ledermann, Bernhard; Lemaître, Vincent; De Lentdecker, Gilles; Linn, Alexander; Lounis, Abdenour; Lübelsmeyer, Klaus; Lumb, Nicholas; Maazouzi, Chaker; Mahmoud, Tariq; Michotte, Daniel; Militaru, Otilia; Mirabito, Laurent; Müller, Thomas; Neukermans, Lionel; Ollivetto, C; Olzem, Jan; Ostapchuk, Andrey; Pandoulas, Demetrios; Pein, Uwe; Pernicka, Manfred; Perriès, Stephane; Piaseki, C; Pierschel, Gerhard; Piotrzkowski, Krzysztof; Poettgens, Michael; Pooth, Oliver; Rouby, Xavier; Sabellek, Andreas; Schael, Stefan; Schirm, Norbert; Schleper, Peter; Schmitz, Stefan Antonius; Schultz von Dratzig, Arndt; Siedling, Rolf; Simonis, Hans-Jürgen; Stahl, Achim; Steck, Pia; Steinbruck, G; Stoye, Markus; Strub, Roger; Tavernier, Stefaan; Teyssier, Daniel; Theel, Andreas; Trocmé, Benjamin; Udo, Fred; Van der Donckt, M; Van der Velde, C; Van Hove, Pierre; Vanlaer, Pascal; Van Lancker, Luc; Van Staa, Rolf; Vanzetto, Sylvain; Weber, Markus; Weiler, Thomas; Weseler, Siegfried; Wickens, John; Wittmer, Bruno; Wlochal, Michael; De Wolf, Eddi A; Zhukov, Valery; Zoeller, Marc Henning

2009-01-01

The silicon strip tracker of the CMS experiment has been completed and inserted into the CMS detector in late 2007. The largest sub-system of the tracker is its end cap system, comprising two large end caps (TEC) each containing 3200 silicon strip modules. To ease construction, the end caps feature a modular design: groups of about 20 silicon modules are placed on sub-assemblies called petals and these self-contained elements are then mounted into the TEC support structures. Each end cap consists of 144 petals, and the insertion of these petals into the end cap structure is referred to as TEC integration. The two end caps were integrated independently in Aachen (TEC+) and at CERN (TEC--). This note deals with the integration of TEC+, describing procedures for end cap integration and for quality control during testing of integrated sections of the end cap and presenting results from the testing.

A 40-GBd QPSK/16-QAM integrated silicon coherent receiver

NARCIS (Netherlands)

Verbist, J.; Zhang, J.; Moeneclaey, B.; Soenen, W.; Van Weerdenburg, J.J.A.; Van Uden, R.; Okonkwo, C.M.; Bauwelinck, J.; Roelkens, G.; Yin, X.

2016-01-01

Through co-design of a dual SiGe transimpedance amplifier and an integrated silicon photonic circuit, we realized for the first time an ultra-compact and low-power silicon single-polarization coherent receiver operating at 40 GBd. A bit-error rate of <3.8× 10-3 was obtained for an optical

Hybrid integration of carbon nanotubes in silicon photonic structures

Science.gov (United States)

Durán-Valdeiglesias, E.; Zhang, W.; Alonso-Ramos, C.; Le Roux, X.; Serna, S.; Hoang, H. C.; Marris-Morini, D.; Cassan, E.; Intonti, F.; Sarti, F.; Caselli, N.; La China, F.; Gurioli, M.; Balestrieri, M.; Vivien, L.; Filoramo, A.

2017-02-01

Silicon photonics, due to its compatibility with the CMOS platform and unprecedented integration capability, has become the preferred solution for the implementation of next generation optical interconnects to accomplish high efficiency, low energy consumption, low cost and device miniaturization in one single chip. However, it is restricted by silicon itself. Silicon does not have efficient light emission or detection in the telecommunication wavelength range (1.3 μm-1.5 μm) or any electro-optic effect (i.e. Pockels effect). Hence, silicon photonic needs to be complemented with other materials for the realization of optically-active devices, including III-V for lasing and Ge for detection. The very different requirement of these materials results in complex fabrication processes that offset the cost-effectiveness of the Si photonics approach. For this purpose, carbon nanotubes (CNTs) have recently been proposed as an attractive one-dimensional light emitting material. Interestingly, semiconducting single walled CNTs (SWNTs) exhibit room-temperature photo- and electro-luminescence in the near-IR that could be exploited for the implementation of integrated nano-sources. They can also be considered for the realization of photo-detectors and optical modulators, since they rely on intrinsically fast non-linear effects, such as Stark and Kerr effect. All these properties make SWNTs ideal candidates in order to fabricate a large variety of optoelectronic devices, including near-IR sources, modulators and photodetectors on Si photonic platforms. In addition, solution processed SWNTs can be integrated on Si using spin-coating or drop-casting techniques, obviating the need of complex epitaxial growth or chip bonding approaches. Here, we report on our recent progress in the coupling of SWNTs light emission into optical resonators implemented on the silicon-on-insulator (SOI) platform. .

High-contrast gratings for long-wavelength laser integration on silicon

Science.gov (United States)

Sciancalepore, Corrado; Descos, Antoine; Bordel, Damien; Duprez, Hélène; Letartre, Xavier; Menezo, Sylvie; Ben Bakir, Badhise

2014-02-01

Silicon photonics is increasingly considered as the most promising way-out to the relentless growth of data traffic in today's telecommunications infrastructures, driving an increase in transmission rates and computing capabilities. This is in fact challenging the intrinsic limit of copper-based, short-reach interconnects and microelectronic circuits in data centers and server architectures to offer enough modulation bandwidth at reasonable power dissipation. In the context of the heterogeneous integration of III-V direct-bandgap materials on silicon, optics with high-contrast metastructures enables the efficient implementation of optical functions such as laser feedback, input/output (I/O) to active/passive components, and optical filtering, while heterogeneous integration of III-V layers provides sufficient optical gain, resulting in silicon-integrated laser sources. The latest ensure reduced packaging costs and reduced footprint for the optical transceivers, a key point for the short reach communications. The invited talk will introduce the audience to the latest breakthroughs concerning the use of high-contrast gratings (HCGs) for the integration of III-V-on-Si verticalcavity surface-emitting lasers (VCSELs) as well as Fabry-Perot edge-emitters (EELs) in the main telecom band around 1.55 μm. The strong near-field mode overlap within HCG mirrors can be exploited to implement unique optical functions such as dense wavelength division multiplexing (DWDM): a 16-λ100-GHz-spaced channels VCSEL array is demonstrated. On the other hand, high fabrication yields obtained via molecular wafer bonding of III-V alloys on silicon-on-insulator (SOI) conjugate excellent device performances with cost-effective high-throughput production, supporting industrial needs for a rapid research-to-market transfer.

Cobalt micro-magnet integration on silicon MOS quantum dots

Science.gov (United States)

Camirand Lemyre, Julien; Rochette, Sophie; Anderson, John; Manginell, Ronald P.; Pluym, Tammy; Ward, Dan; Carroll, Malcom S.; Pioro-Ladrière, Michel

Integration of cobalt micro-magnets on silicon metal-oxide-semiconductor (MOS) quantum dot devices has been investigated. The micro-magnets are fabricated in a lift-off process with e-beam lithography and deposited directly on top of an etched poly-silicon gate stack. Among the five resist stacks tested, one is found to be compatible with our MOS specific materials (Si and SiO2) . Moreover, devices with and without additional Al2O3 insulating layer show no additional gate leakage after processing. Preliminary transport data indicates electrostatic stability of our devices with integrated magnets. This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

Al transmon qubits on silicon-on-insulator for quantum device integration

Science.gov (United States)

Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

2017-07-01

We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

Monolithic nanoscale photonics-electronics integration in silicon and other group IV elements

CERN Document Server

Radamson, Henry

2014-01-01

Silicon technology is evolving rapidly, particularly in board-to-board or chip-to chip applications. Increasingly, the electronic parts of silicon technology will carry out the data processing, while the photonic parts take care of the data communication. For the first time, this book describes the merging of photonics and electronics in silicon and other group IV elements. It presents the challenges, the limitations, and the upcoming possibilities of these developments. The book describes the evolution of CMOS integrated electronics, status and development, and the fundamentals of silicon p

The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

Science.gov (United States)

Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

2017-02-01

The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

Integration of functional complex oxide nanomaterials on silicon

Directory of Open Access Journals (Sweden)

Jose Manuel eVila-Fungueiriño

2015-06-01

Full Text Available The combination of standard wafer-scale semiconductor processing with the properties of functional oxides opens up to innovative and more efficient devices with high value applications that can be produced at large scale. This review uncovers the main strategies that are successfully used to monolithically integrate functional complex oxide thin films and nanostructures on silicon: the chemical solution deposition approach (CSD and the advanced physical vapor deposition techniques such as oxide molecular beam epitaxy (MBE. Special emphasis will be placed on complex oxide nanostructures epitaxially grown on silicon using the combination of CSD and MBE. Several examples will be exposed, with a particular stress on the control of interfaces and crystallization mechanisms on epitaxial perovskite oxide thin films, nanostructured quartz thin films, and octahedral molecular sieve nanowires. This review enlightens on the potential of complex oxide nanostructures and the combination of both chemical and physical elaboration techniques for novel oxide-based integrated devices.

Roadmap for integration of InP based photonics and silicon electronics

NARCIS (Netherlands)

Williams, K.A.

2015-01-01

We identify the synergies and a roadmap for the intimate integration of InP photonic integrated circuits and Silicon electronic ICs using wafer-scale processes. Advantages are foreseen in terms of bandwidth, energy savings and package simplification.

A Novel Silicon Micromachined Integrated MCM Thermal Management System

Science.gov (United States)

Kazmierczak, M. J.; Henderson, H. T.; Gerner, F. M.

1997-01-01

"Micromachining" is a chemical means of etching three-dimensional structures, typically in single- crystalline silicon. These techniques are leading toward what is coming to be referred to as MEMS (Micro Electro Mechanical Systems), where in addition to the ordinary two-dimensional (planar) microelectronics, it is possible to build three-dimensional n-ticromotors, electrically- actuated raicrovalves, hydraulic systems and much more on the same microchip. These techniques become possible because of differential etching rates of various crystallographic planes and materials used for semiconductor n-ticrofabfication. The University of Cincinnati group in collaboration with Karl Baker at NASA Lewis were the first to form micro heat pipes in silicon by the above techniques. Current work now in progress using MEMS technology is now directed towards the development of the next generation in MCM (Multi Chip Module) packaging. Here we propose to develop a complete electronic thermal management system which will allow densifica6on in chip stacking by perhaps two orders of magnitude. Furthermore the proposed technique will allow ordinary conu-nercial integrated chips to be utilized. Basically, the new technique involves etching square holes into a silicon substrate and then inserting and bonding commercially available integrated chips into these holes. For example, over a 100 1/4 in. by 1 /4 in. integrated chips can be placed on a 4 in. by 4 in. silicon substrate to form a Multi-Chip Module (MCM). Placing these MCM's in-line within an integrated rack then allows for three-diniensional stacking. Increased miniaturization of microelectronic circuits will lead to very high local heat fluxes. A high performance thermal management system will be specifically designed to remove the generated energy. More specifically, a compact heat exchanger with milli / microchannels will be developed and tested to remove the heat through the back side of this MCM assembly for moderate and high

An innovative large scale integration of silicon nanowire-based field effect transistors

Science.gov (United States)

Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

2018-05-01

Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits.

Science.gov (United States)

Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

2017-12-01

One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe 2 , a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits

Science.gov (United States)

Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M.; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K.; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

2017-12-01

One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe2, a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

Thermally controlled coupling of a rolled-up microtube integrated with a waveguide on a silicon electronic-photonic integrated circuit.

Science.gov (United States)

Zhong, Qiuhang; Tian, Zhaobing; Veerasubramanian, Venkat; Dastjerdi, M Hadi Tavakoli; Mi, Zetian; Plant, David V

2014-05-01

We report on the first experimental demonstration of the thermal control of coupling strength between a rolled-up microtube and a waveguide on a silicon electronic-photonic integrated circuit. The microtubes are fabricated by selectively releasing a coherently strained GaAs/InGaAs heterostructure bilayer. The fabricated microtubes are then integrated with silicon waveguides using an abruptly tapered fiber probe. By tuning the gap between the microtube and the waveguide using localized heaters, the microtube-waveguide evanescent coupling is effectively controlled. With heating, the extinction ratio of a microtube whispering-gallery mode changes over an 18 dB range, while the resonant wavelength remains approximately unchanged. Utilizing this dynamic thermal tuning effect, we realize coupling modulation of the microtube integrated with the silicon waveguide at 2 kHz with a heater voltage swing of 0-6 V.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

Science.gov (United States)

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Integrated Amorphous Silicon p-i-n Temperature Sensor for CMOS Photonics

Directory of Open Access Journals (Sweden)

Sandro Rao

2016-01-01

Full Text Available Hydrogenated amorphous silicon (a-Si:H shows interesting optoelectronic and technological properties that make it suitable for the fabrication of passive and active micro-photonic devices, compatible moreover with standard microelectronic devices on a microchip. A temperature sensor based on a hydrogenated amorphous silicon p-i-n diode integrated in an optical waveguide for silicon photonics applications is presented here. The linear dependence of the voltage drop across the forward-biased diode on temperature, in a range from 30 °C up to 170 °C, has been used for thermal sensing. A high sensitivity of 11.9 mV/°C in the bias current range of 34–40 nA has been measured. The proposed device is particularly suitable for the continuous temperature monitoring of CMOS-compatible photonic integrated circuits, where the behavior of the on-chip active and passive devices are strongly dependent on their operating temperature.

III-V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2-4 μm Wavelength Range.

Science.gov (United States)

Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

2017-08-04

The availability of silicon photonic integrated circuits (ICs) in the 2-4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III-V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III-V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy.

Localized synthesis, assembly and integration of silicon nanowires

Science.gov (United States)

Englander, Ongi

Localized synthesis, assembly and integration of one-dimensional silicon nanowires with MEMS structures is demonstrated and characterized in terms of local synthesis processes, electric-field assisted self-assembly, and a proof-of-concept nanoelectromechanical system (HEMS) demonstration. Emphasis is placed on the ease of integration, process control strategies, characterization techniques and the pursuit of integrated devices. A top-down followed by a bottom-up integration approach is utilized. Simple MEMS heater structures are utilized as the microscale platforms for the localized, bottom-up synthesis of one-dimensional nanostructures. Localized heating confines the high temperature region permitting only localized nanostructure synthesis and allowing the surroundings to remain at room temperature thus enabling CMOS compatible post-processing. The vapor-liquid-solid (VLS) process in the presence of a catalytic nanoparticle, a vapor phase reactant, and a specific temperature environment is successfully employed locally. Experimentally, a 5nm thick gold-palladium layer is used as the catalyst while silane is the vapor phase reactant. The current-voltage behavior of the MEMS structures can be correlated to the approximate temperature range required for the VLS reaction to take place. Silicon nanowires averaging 45nm in diameter and up to 29mum in length synthesized at growth rates of up to 1.5mum/min result. By placing two MEMS structures in close proximity, 4--10mum apart, localized silicon nanowire growth can be used to link together MEMS structures to yield a two-terminal, self-assembled micro-to-nano system. Here, one MEMS structure is designated as the hot growth structure while a nearby structure is designated as the cold secondary structure, whose role is to provide a natural stopping point for the VLS reaction. The application of a localized electric-field, 5 to 13V/mum in strength, during the synthesis process, has been shown to improve nanowire

Silicon photonic integration in telecommunications

Directory of Open Access Journals (Sweden)

Christopher Richard Doerr

2015-08-01

Full Text Available Silicon photonics is the guiding of light in a planar arrangement of silicon-based materials to perform various functions. We focus here on the use of silicon photonics to create transmitters and receivers for fiber-optic telecommunications. As the need to squeeze more transmission into a given bandwidth, a given footprint, and a given cost increases, silicon photonics makes more and more economic sense.

Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

Science.gov (United States)

Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

2018-04-01

Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

Novel technique for reliability testing of silicon integrated circuits

NARCIS (Netherlands)

Le Minh, P.; Wallinga, Hans; Woerlee, P.H.; van den Berg, Albert; Holleman, J.

2001-01-01

We propose a simple, inexpensive technique with high resolution to identify the weak spots in integrated circuits by means of a non-destructive photochemical process in which photoresist is used as the photon detection tool. The experiment was done to localize the breakdown link of thin silicon

Infrared transparent graphene heater for silicon photonic integrated circuits.

Science.gov (United States)

Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

2016-04-18

Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

Progress in complementary metal–oxide–semiconductor silicon photonics and optoelectronic integrated circuits

International Nuclear Information System (INIS)

Chen Hongda; Zhang Zan; Huang Beiju; Mao Luhong; Zhang Zanyun

2015-01-01

Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits (OEICs) based on a complementary metal–oxide–semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems. (review)

Ultrafast triggered transient energy storage by atomic layer deposition into porous silicon for integrated transient electronics

Science.gov (United States)

Douglas, Anna; Muralidharan, Nitin; Carter, Rachel; Share, Keith; Pint, Cary L.

2016-03-01

Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics.Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics. Electronic supplementary information (ESI) available: (i) Experimental details for ALD and material fabrication, ellipsometry film thickness, preparation of gel electrolyte and separator, details for electrochemical measurements, HRTEM image of VOx coated porous silicon, Raman spectroscopy for VOx as-deposited as well as annealed in air for 1 hour at 450 °C, SEM and transient behavior dissolution tests of uniformly coated VOx on

III–V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2–4 μm Wavelength Range

Science.gov (United States)

Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

2017-01-01

The availability of silicon photonic integrated circuits (ICs) in the 2–4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III–V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III–V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy. PMID:28777291

Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

DEFF Research Database (Denmark)

Pfreundt, Andrea

This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

DEFF Research Database (Denmark)

Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

2016-01-01

This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

High-dimensional quantum key distribution based on multicore fiber using silicon photonic integrated circuits

DEFF Research Database (Denmark)

Ding, Yunhong; Bacco, Davide; Dalgaard, Kjeld

2017-01-01

is intrinsically limited to 1 bit/photon. Here we propose and experimentally demonstrate, for the first time, a high-dimensional quantum key distribution protocol based on space division multiplexing in multicore fiber using silicon photonic integrated lightwave circuits. We successfully realized three mutually......-dimensional quantum states, and enables breaking the information efficiency limit of traditional quantum key distribution protocols. In addition, the silicon photonic circuits used in our work integrate variable optical attenuators, highly efficient multicore fiber couplers, and Mach-Zehnder interferometers, enabling...

Hybrid Integrated Silicon Microfluidic Platform for Fluorescence Based Biodetection

Directory of Open Access Journals (Sweden)

André Darveau

2007-09-01

Full Text Available The desideratum to develop a fully integrated Lab-on-a-chip device capable ofrapid specimen detection for high throughput in-situ biomedical diagnoses and Point-of-Care testing applications has called for the integration of some of the novel technologiessuch as the microfluidics, microphotonics, immunoproteomics and Micro ElectroMechanical Systems (MEMS. In the present work, a silicon based microfluidic device hasbeen developed for carrying out fluorescence based immunoassay. By hybrid attachment ofthe microfluidic device with a Spectrometer-on-chip, the feasibility of synthesizing anintegrated Lab-on-a-chip type device for fluorescence based biosensing has beendemonstrated. Biodetection using the microfluidic device has been carried out usingantigen sheep IgG and Alexafluor-647 tagged antibody particles and the experimentalresults prove that silicon is a compatible material for the present application given thevarious advantages it offers such as cost-effectiveness, ease of bulk microfabrication,superior surface affinity to biomolecules, ease of disposability of the device etc., and is thussuitable for fabricating Lab-on-a-chip type devices.

Three-Dimensional Integration of Black Phosphorus Photodetector with Silicon Photonics and Nanoplasmonics.

Science.gov (United States)

Chen, Che; Youngblood, Nathan; Peng, Ruoming; Yoo, Daehan; Mohr, Daniel A; Johnson, Timothy W; Oh, Sang-Hyun; Li, Mo

2017-02-08

We demonstrate the integration of a black phosphorus photodetector in a hybrid, three-dimensional architecture of silicon photonics and metallic nanoplasmonics structures. This integration approach combines the advantages of the low propagation loss of silicon waveguides, high-field confinement of a plasmonic nanogap, and the narrow bandgap of black phosphorus to achieve high responsivity for detection of telecom-band, near-infrared light. Benefiting from an ultrashort channel (∼60 nm) and near-field enhancement enabled by the nanogap structure, the photodetector shows an intrinsic responsivity as high as 10 A/W afforded by internal gain mechanisms, and a 3 dB roll-off frequency of 150 MHz. This device demonstrates a promising approach for on-chip integration of three distinctive photonic systems, which, as a generic platform, may lead to future nanophotonic applications for biosensing, nonlinear optics, and optical signal processing.

Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

International Nuclear Information System (INIS)

Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C.; Koeber, S.; Freude, W.; Koos, C.; Rembe, C.

2014-01-01

We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB

Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

Energy Technology Data Exchange (ETDEWEB)

Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C. [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe (Germany); Koeber, S.; Freude, W., E-mail: christian.koos@kit.edu; Koos, C., E-mail: christian.koos@kit.edu [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe, Germany and Institute of Microstructure Technology, Karlsruhe Institute of Technology, 76344 Eggenstein-Leopoldshafen (Germany); Rembe, C. [Polytec GmbH, 76337 Waldbronn (Germany)

2014-05-27

We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB.

Software-defined networking control plane for seamless integration of multiple silicon photonic switches in Datacom networks.

Science.gov (United States)

Shen, Yiwen; Hattink, Maarten H N; Samadi, Payman; Cheng, Qixiang; Hu, Ziyiz; Gazman, Alexander; Bergman, Keren

2018-04-16

Silicon photonics based switches offer an effective option for the delivery of dynamic bandwidth for future large-scale Datacom systems while maintaining scalable energy efficiency. The integration of a silicon photonics-based optical switching fabric within electronic Datacom architectures requires novel network topologies and arbitration strategies to effectively manage the active elements in the network. We present a scalable software-defined networking control plane to integrate silicon photonic based switches with conventional Ethernet or InfiniBand networks. Our software-defined control plane manages both electronic packet switches and multiple silicon photonic switches for simultaneous packet and circuit switching. We built an experimental Dragonfly network testbed with 16 electronic packet switches and 2 silicon photonic switches to evaluate our control plane. Observed latencies occupied by each step of the switching procedure demonstrate a total of 344 µs control plane latency for data-center and high performance computing platforms.

Feasibility studies of microelectrode silicon detectors with integrated electronics

International Nuclear Information System (INIS)

Dalla Betta, G.-F.; Batignani, G.; Bettarini, S.; Boscardin, M.; Bosisio, L.; Carpinelli, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Lusiani, A.; Manghisoni, M.; Pignatel, G.U.; Rama, M.; Ratti, L.; Re, V.; Sandrelli, F.; Speziali, V.; Svelto, F.; Zorzi, N.

2002-01-01

We describe our experience on design and fabrication, on high-resistivity silicon substrates, of microstrip detectors and integrated electronics, devoted to high-energy physics experiments and medical/industrial imaging applications. We report on the full program of our collaboration, with particular regards to the tuning of a new fabrication process, allowing for the production of good quality transistors, while keeping under control the basic detector parameters, such as leakage current. Experimental results on JFET and bipolar transistors are presented, and a microstrip detector with an integrated JFET in source-follower configuration is introduced

Silicon Microspheres Photonics

International Nuclear Information System (INIS)

Serpenguzel, A.

2008-01-01

Electrophotonic integrated circuits (EPICs), or alternatively, optoelectronic integrated circuit (OEICs) are the natural evolution of the microelectronic integrated circuit (IC) with the addition of photonic capabilities. Traditionally, the IC industry has been based on group IV silicon, whereas the photonics industry on group III-V semiconductors. However, silicon based photonic microdevices have been making strands in siliconizing photonics. Silicon microspheres with their high quality factor whispering gallery modes (WGMs), are ideal candidates for wavelength division multiplexing (WDM) applications in the standard near-infrared communication bands. In this work, we will discuss the possibility of using silicon microspheres for photonics applications in the near-infrared

Mode converter based on an inverse taper for multimode silicon nanophotonic integrated circuits.

Science.gov (United States)

Dai, Daoxin; Mao, Mao

2015-11-02

An inverse taper on silicon is proposed and designed to realize an efficient mode converter available for the connection between multimode silicon nanophotonic integrated circuits and few-mode fibers. The present mode converter has a silicon-on-insulator inverse taper buried in a 3 × 3μm(2) SiN strip waveguide to deal with not only for the fundamental mode but also for the higher-order modes. The designed inverse taper enables the conversion between the six modes (i.e., TE(11), TE(21), TE(31), TE(41), TM(11), TM(12)) in a 1.4 × 0.22μm(2) multimode SOI waveguide and the six modes (like the LP(01), LP(11a), LP(11b) modes in a few-mode fiber) in a 3 × 3μm(2) SiN strip waveguide. The conversion efficiency for any desired mode is higher than 95.6% while any undesired mode excitation ratio is lower than 0.5%. This is helpful to make multimode silicon nanophotonic integrated circuits (e.g., the on-chip mode (de)multiplexers developed well) available to work together with few-mode fibers in the future.

Technology for the compatible integration of silicon detectors with readout electronics

International Nuclear Information System (INIS)

Zimmer, G.

1984-01-01

Compatible integration of detectors and readout electronics on the same silicon substrate is of growing interest. As the methods of microelectronics technology have already been adapted for detector fabrication, a common technology basis for detectors and readout electronics is available. CMOS technology exhibits most attractive features for the compatible realization of readout electronics when advanced LSI processing steps are combined with detector requirements. The essential requirements for compatible integration are the availability of high resistivity (100)-oriented single crystalline silicon substrate, the formation of suitably doped areas for MOS circuits and the isolation of the low voltage circuit from the detector operated at much higher supply voltage. Junction isolation as a first approach based on present production technology and dielectric isolation based on an advanced SOI-LSI technology are discussed as the most promising solutions for present and future applications, respectively. (orig.)

Integrated GaN photonic circuits on silicon (100) for second harmonic generation

OpenAIRE

Xiong, Chi; Pernice, Wolfram; Ryu, Kevin K.; Schuck, Carsten; Fong, King Y.; Palacios, Tomas; Tang, Hong X.

2014-01-01

We demonstrate second order optical nonlinearity in a silicon architecture through heterogeneous integration of single-crystalline gallium nitride (GaN) on silicon (100) substrates. By engineering GaN microrings for dual resonance around 1560 nm and 780 nm, we achieve efficient, tunable second harmonic generation at 780 nm. The \\{chi}(2) nonlinear susceptibility is measured to be as high as 16 plus minus 7 pm/V. Because GaN has a wideband transparency window covering ultraviolet, visible and ...

Silicon photonics fiber-to-the-home transceiver array based on transfer-printing-based integration of III-V photodetectors.

Science.gov (United States)

Zhang, Jing; De Groote, Andreas; Abbasi, Amin; Loi, Ruggero; O'Callaghan, James; Corbett, Brian; Trindade, António José; Bower, Christopher A; Roelkens, Gunther

2017-06-26

A 4-channel silicon photonics transceiver array for Point-to-Point (P2P) fiber-to-the-home (FTTH) optical networks at the central office (CO) side is demonstrated. A III-V O-band photodetector array was integrated onto the silicon photonic transmitter through transfer printing technology, showing a polarization-independent responsivity of 0.39 - 0.49 A/W in the O-band. The integrated PDs (30 × 40 μm 2 mesa) have a 3 dB bandwidth of 11.5 GHz at -3 V bias. Together with high-speed C-band silicon ring modulators whose bandwidth is up to 15 GHz, operation of the transceiver array at 10 Gbit/s is demonstrated. The use of transfer printing for the integration of the III-V photodetectors allows for an efficient use of III-V material and enables the scalable integration of III-V devices on silicon photonics wafers, thereby reducing their cost.

Crystalline Silicon Interconnected Strips (XIS). Introduction to a New, Integrated Device and Module Concept

Energy Technology Data Exchange (ETDEWEB)

Van Roosmalen, J.; Bronsveld, P.; Mewe, A.; Janssen, G.; Stodolny, M.; Cobussen-Pool, E.; Bennett, I.; Weeber, A.; Geerligs, B. [ECN Solar Energy, P.O. Box 1, NL-1755 ZG, Petten (Netherlands)

2012-06-15

A new device concept for high efficiency, low cost, wafer based silicon solar cells is introduced. To significantly lower the costs of Si photovoltaics, high efficiencies and large reductions of metals and silicon costs are required. To enable this, the device architecture was adapted into low current devices by applying thin silicon strips, to which a special high efficiency back-contact heterojunction cell design was applied. Standard industrial production processes can be used for our fully integrated cell and module design, with a cost reduction potential below 0.5 euro/Wp. First devices have been realized demonstrating the principle of a series connected back contact hybrid silicon heterojunction module concept.

Nonlinear silicon photonics

Science.gov (United States)

Borghi, M.; Castellan, C.; Signorini, S.; Trenti, A.; Pavesi, L.

2017-09-01

Silicon photonics is a technology based on fabricating integrated optical circuits by using the same paradigms as the dominant electronics industry. After twenty years of fervid development, silicon photonics is entering the market with low cost, high performance and mass-manufacturable optical devices. Until now, most silicon photonic devices have been based on linear optical effects, despite the many phenomenologies associated with nonlinear optics in both bulk materials and integrated waveguides. Silicon and silicon-based materials have strong optical nonlinearities which are enhanced in integrated devices by the small cross-section of the high-index contrast silicon waveguides or photonic crystals. Here the photons are made to strongly interact with the medium where they propagate. This is the central argument of nonlinear silicon photonics. It is the aim of this review to describe the state-of-the-art in the field. Starting from the basic nonlinearities in a silicon waveguide or in optical resonator geometries, many phenomena and applications are described—including frequency generation, frequency conversion, frequency-comb generation, supercontinuum generation, soliton formation, temporal imaging and time lensing, Raman lasing, and comb spectroscopy. Emerging quantum photonics applications, such as entangled photon sources, heralded single-photon sources and integrated quantum photonic circuits are also addressed at the end of this review.

Strategies for doped nanocrystalline silicon integration in silicon heterojunction solar cells

Czech Academy of Sciences Publication Activity Database

Seif, J.; Descoeudres, A.; Nogay, G.; Hänni, S.; de Nicolas, S.M.; Holm, N.; Geissbühler, J.; Hessler-Wyser, A.; Duchamp, M.; Dunin-Borkowski, R.E.; Ledinský, Martin; De Wolf, S.; Ballif, C.

2016-01-01

Roč. 6, č. 5 (2016), s. 1132-1140 ISSN 2156-3381 R&D Projects: GA MŠk LM2015087 Institutional support: RVO:68378271 Keywords : microcrystalline silicon * nanocrystalline silicon * silicon heterojunctions (SHJs) * solar cells Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.712, year: 2016

Recent results from the development of silicon detectors with integrated electronics

Energy Technology Data Exchange (ETDEWEB)

Dalla Betta, G.-F. E-mail: dallabe@dit.unitn.it; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N

2004-02-01

In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization.

Recent results from the development of silicon detectors with integrated electronics

International Nuclear Information System (INIS)

Dalla Betta, G.-F.; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N.

2004-01-01

In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization

Silicon-based optical integrated circuits for terabit communication networks

International Nuclear Information System (INIS)

Svidzinsky, K K

2003-01-01

A brief review is presented of the development of silicon-based optical integrated circuits used as components in modern all-optical communication networks with the terabit-per-second transmission capacity. The designs and technologies for manufacturing these circuits are described and the problems related to their development and application in WDM communication systems are considered. (special issue devoted to the memory of academician a m prokhorov)

Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits

International Nuclear Information System (INIS)

Qian Li-Bo; Xia Yin-Shui; Zhu Zhang-Ming; Ding Rui-Xue; Yang Yin-Tang

2014-01-01

Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three-dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 mV and 379 mV reductions in the peak noise voltage, respectively

Ultrahigh-density trench cpacitors in silicon and their application to integrated DC-DC conversion

NARCIS (Netherlands)

Roozeboom, F.; Bergveld, H.J.; Nowak, K.; Le Cornec, F.; Guiraud, L.; Bunel, C.; Iochem, S.; Ferreira, J.; Ledain, S.; Pieraerts, E.; Pommier, M.

2009-01-01

This paper addresses silicon-based integration of passive components applied to 3D integration with dies of other technologies within one package. Particularly, the development of high-density trench capacitors has enabled the realization of small-formfactor DC-DC converters. As illustration, an

Silicon-Based Technology for Integrated Waveguides and mm-Wave Systems

DEFF Research Database (Denmark)

Jovanovic, Vladimir; Gentile, Gennaro; Dekker, Ronald

2015-01-01

IC processing is used to develop technology for silicon-filled millimeter-wave-integrated waveguides. The front-end process defines critical waveguide sections and enables integration of dedicated components, such as RF capacitors and resistors. Wafer gluing is used to strengthen the mechanical...... support and deep reactive-ion etching forms the waveguide bulk with smooth and nearly vertical sidewalls. Aluminum metallization covers the etched sidewalls, fully enclosing the waveguides in metal from all sides. Waveguides are fabricated with a rectangular cross section of 560 μm x 280 μm. The measured...

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

Science.gov (United States)

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Heterogenous integration of a thin-film GaAs photodetector and a microfluidic device on a silicon substrate

International Nuclear Information System (INIS)

Song, Fuchuan; Xiao, Jing; Udawala, Fidaali; Seo, Sang-Woo

2011-01-01

In this paper, heterogeneous integration of a III–V semiconductor thin-film photodetector (PD) with a microfluidic device is demonstrated on a SiO 2 –Si substrate. Thin-film format of optical devices provides an intimate integration of optical functions with microfluidic devices. As a demonstration of a multi-material and functional system, the biphasic flow structure in the polymeric microfluidic channels was co-integrated with a III–V semiconductor thin-film PD. The fluorescent drops formed in the microfluidic device are successfully detected with an integrated thin-film PD on a silicon substrate. The proposed three-dimensional integration structure is an alternative approach to combine optical functions with microfluidic functions on silicon-based electronic functions.

Catastrophic degradation of the interface of epitaxial silicon carbide on silicon at high temperatures

Energy Technology Data Exchange (ETDEWEB)

Pradeepkumar, Aiswarya; Mishra, Neeraj; Kermany, Atieh Ranjbar; Iacopi, Francesca [Queensland Micro and Nanotechnology Centre and Environmental Futures Research Institute, Griffith University, Nathan QLD 4111 (Australia); Boeckl, John J. [Materials and Manufacturing Directorate, Air Force Research Laboratories, Wright-Patterson Air Force Base, Ohio 45433 (United States); Hellerstedt, Jack; Fuhrer, Michael S. [Monash Centre for Atomically Thin Materials, Monash University, Monash, VIC 3800 (Australia)

2016-07-04

Epitaxial cubic silicon carbide on silicon is of high potential technological relevance for the integration of a wide range of applications and materials with silicon technologies, such as micro electro mechanical systems, wide-bandgap electronics, and graphene. The hetero-epitaxial system engenders mechanical stresses at least up to a GPa, pressures making it extremely challenging to maintain the integrity of the silicon carbide/silicon interface. In this work, we investigate the stability of said interface and we find that high temperature annealing leads to a loss of integrity. High–resolution transmission electron microscopy analysis shows a morphologically degraded SiC/Si interface, while mechanical stress measurements indicate considerable relaxation of the interfacial stress. From an electrical point of view, the diode behaviour of the initial p-Si/n-SiC junction is catastrophically lost due to considerable inter-diffusion of atoms and charges across the interface upon annealing. Temperature dependent transport measurements confirm a severe electrical shorting of the epitaxial silicon carbide to the underlying substrate, indicating vast predominance of the silicon carriers in lateral transport above 25 K. This finding has crucial consequences on the integration of epitaxial silicon carbide on silicon and its potential applications.

Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV).

Science.gov (United States)

Shen, Wen-Wei; Chen, Kuan-Neng

2017-12-01

3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

Analysis of silicon-based integrated photovoltaic-electrochemical hydrogen generation system under varying temperature and illumination

Institute of Scientific and Technical Information of China (English)

Vishwa Bhatt; Brijesh Tripathi; Pankaj Yadav; Manoj Kumar

2017-01-01

Last decade witnessed tremendous research and development in the area of photo-electrolytic hydrogen generation using chemically stable nanostructured photo-cathode/anode materials.Due to intimately coupled charge separation and photo-catalytic processes,it is very difficult to optimize individual components of such system leading to a very low demonstrated solar-to-fuel efficiency (SFE) of less than 1％.Recently there has been growing interest in an integrated photovoltaic-electrochemical (PV-EC) system based on GaAs solar cells with the demonstrated SFE of 24.5％ under concentrated illumination condition.But a high cost of GaAs based solar cells and recent price drop of poly-crystalline silicon (pc-Si) solar cells motivated researchers to explore silicon based integrated PV-EC system.In this paper a theoretical framework is introduced to model silicon-based integrated PV-EC device.The theoretical framework is used to analyze the coupling and kinetic losses of a silicon solar cell based integrated PV-EC water splitting system under varying temperature and illumination.The kinetic loss occurs in the range of 19.1％-27.9％ and coupling loss takes place in the range of 5.45％-6.74％ with respect to varying illumination in the range of 20-100 mW/cm2.Similarly,the effect of varying temperature has severe impact on the performance of the system,wherein the coupling loss occurs in the range of 0.84％-21.51％ for the temperature variation from 25 to 50 ℃.

Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

DEFF Research Database (Denmark)

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

2016-01-01

We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

Methods and mechanisms of gettering of silicon structures in the production of integrated circuits

Directory of Open Access Journals (Sweden)

Pilipenko V. A.

2013-05-01

Full Text Available Increasing the degree of integration of hardware components imposes more stringent requirements for the reduction of the concentration of contaminants and oxidation stacking faults in the original silicon wafers with its preservation in the IC manufacturing process cycle. This causes high relevance of the application of gettering in modern microelectronic technology. The existing methods of silicon wafers gettering and the mechanisms of their occurrence are considered.

Gigascale Silicon Photonic Transmitters Integrating HBT-based Carrier-injection Electroabsorption Modulator Structures

Science.gov (United States)

Fu, Enjin

Demand for more bandwidth is rapidly increasing, which is driven by data intensive applications such as high-definition (HD) video streaming, cloud storage, and terascale computing applications. Next-generation high-performance computing systems require power efficient chip-to-chip and intra-chip interconnect yielding densities on the order of 1Tbps/cm2. The performance requirements of such system are the driving force behind the development of silicon integrated optical interconnect, providing a cost-effective solution for fully integrated optical interconnect systems on a single substrate. Compared to conventional electrical interconnect, optical interconnects have several advantages, including frequency independent insertion loss resulting in ultra wide bandwidth and link latency reduction. For high-speed optical transmitter modules, the optical modulator is a key component of the optical I/O channel. This thesis presents a silicon integrated optical transmitter module design based on a novel silicon HBT-based carrier injection electroabsorption modulator (EAM), which has the merits of wide optical bandwidth, high speed, low power, low drive voltage, small footprint, and high modulation efficiency. The structure, mechanism, and fabrication of the modulator structure will be discussed which is followed by the electrical modeling of the post-processed modulator device. The design and realization of a 10Gbps monolithic optical transmitter module integrating the driver circuit architecture and the HBT-based EAM device in a 130nm BiCMOS process is discussed. For high power efficiency, a 6Gbps ultra-low power driver IC implemented in a 130nm BiCMOS process is presented. The driver IC incorporates an integrated 27-1 pseudo-random bit sequence (PRBS) generator for reliable high-speed testing, and a driver circuit featuring digitally-tuned pre-emphasis signal strength. With outstanding drive capability, the driver module can be applied to a wide range of carrier

Integration of the end cap TEC+ of the CMS silicon strip tracker

Energy Technology Data Exchange (ETDEWEB)

Bremer, Richard

2008-04-28

CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising

Integration of the end cap TEC+ of the CMS silicon strip tracker

International Nuclear Information System (INIS)

Bremer, Richard

2008-01-01

CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising particles

Towards a fully integrated indium-phosphide membrane on silicon photonics platform

NARCIS (Netherlands)

van Engelen, J.P.; Pogoretskiy, V.; Smit, M.K.; van der Tol, J.J.G.M.; Jiao, Y.

2017-01-01

Recently a uni-traveling-carrier photodetector with high speed (> 67GHz) and a high-gain optical amplifier (110/cm at 4 kA/cm2) have been demonstrated using the InP membrane-on-Silicon (IMOS) integration technology. Passives in IMOS have shown features comparable to SOI platforms due to the tight

A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

Science.gov (United States)

Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

2013-03-01

Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

International Nuclear Information System (INIS)

Yin, Lan; Harburg, Daniel V.; Rogers, John A.; Bozler, Carl; Omenetto, Fiorenzo

2015-01-01

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

Energy Technology Data Exchange (ETDEWEB)

Yin, Lan; Harburg, Daniel V.; Rogers, John A., E-mail: jrogers@illinois.edu [Department of Materials Science and Engineering, Beckman Institute for Advanced Science and Technology, and Frederick Seitz Materials Research Laboratory, University of Illinois at Urbana-Champaign, 104 S Goodwin Ave., Urbana, Illinois 61801 (United States); Bozler, Carl [Lincoln Laboratory, Massachusetts Institute of Technology, 244 Wood Street, Lexington, Massachusetts 02420 (United States); Omenetto, Fiorenzo [Department of Biomedical Engineering, Department of Physics, Tufts University, 4 Colby St., Medford, Massachusetts 02155 (United States)

2015-01-05

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

Single- and double- lumen silicone breast implant integrity: prospective evaluation of MR and US criteria.

Science.gov (United States)

Berg, W A; Caskey, C I; Hamper, U M; Kuhlman, J E; Anderson, N D; Chang, B W; Sheth, S; Zerhouni, E A

1995-10-01

To evaluate the accuracy of magnetic resonance (MR) and ultrasound (US) criteria for breast implant integrity. One hundred twenty-two single-lumen silicone breast implants and 22 bilumen implants were evaluated with surface coil MR imaging and US and surgically removed. MR criteria for implant failure were a collapsed implant shell ("linguine sign"), foci of silicone outside the shell ("noose sign"), and extracapsular gel, US criteria were collapsed shell, low-level echoes within the gel, and "snowstorm" echoes of extracapsular silicone. Among single-lumen implants, MR imaging depicted 39 of 40 ruptures, 14 of 28 with minimal leakage; 49 of 54 intact implants were correctly interpreted. US depicted 26 of 40 ruptured implants, four of 28 with minimal leakage, and 30 of 54 intact implants. Among bilumen implants, MR imaging depicted four of five implants with rupture of both lumina and nine of 10 as intact; US depicted one rupture and helped identify two of 10 as intact. Mammography accurately depicted the status of 29 of 30 bilumen implants with MR imaging correlation. MR imaging depicts implant integrity more accurately than US; neither method reliably depicts minimal leakage with shell collapse. Mammography is useful in screening bilumen implant integrity.

Realization of an integrated VDF/TrFE copolymer-on-silicon pyroelectric sensor

NARCIS (Netherlands)

Setiadi, D.; Setiadi, D.; Regtien, Paulus P.L.; Sarro, P.M.

1995-01-01

An integrated pyroelectric sensor based on a vinylidene fluoride trifluoroethylene (VDF/TrFE) copolymer is presented. A silicon substrate that contains FET readout electronics is coated with the VDF/TrFE copolymer film using a spin-coating technique. On-chip poling of the copolymer has been applied

2 μm wavelength range InP-based type-II quantum well photodiodes heterogeneously integrated on silicon photonic integrated circuits.

Science.gov (United States)

Wang, Ruijun; Sprengel, Stephan; Muneeb, Muhammad; Boehm, Gerhard; Baets, Roel; Amann, Markus-Christian; Roelkens, Gunther

2015-10-05

The heterogeneous integration of InP-based type-II quantum well photodiodes on silicon photonic integrated circuits for the 2 µm wavelength range is presented. A responsivity of 1.2 A/W at a wavelength of 2.32 µm and 0.6 A/W at 2.4 µm wavelength is demonstrated. The photodiodes have a dark current of 12 nA at -0.5 V at room temperature. The absorbing active region of the integrated photodiodes consists of six periods of a "W"-shaped quantum well, also allowing for laser integration on the same platform.

Compact polarization beam splitter for silicon photonic integrated circuits with a 340-nm-thick silicon core layer.

Science.gov (United States)

Li, Chenlei; Dai, Daoxin

2017-11-01

A polarization beam splitter (PBS) is proposed and realized for silicon photonic integrated circuits with a 340-nm-thick silicon core layer by introducing an asymmetric directional coupler (ADC), which consists of a silicon-on-insulator (SOI) nanowire and a subwavelength grating (SWG) waveguide. The SWG is introduced to provide an optical waveguide which has much higher birefringence than a regular 340-nm-thick SOI nanowire, so that it is possible to make the phase-matching condition satisfied for TE polarization only in the present design when the waveguide dimensions are optimized. Meanwhile, there is a significant phase mismatching for TM polarization automatically. In this way, the present ADC enables strong polarization selectivity to realize a PBS that separates TE and TM polarizations to the cross and through ports, respectively. The realized PBS has a length of ∼2  μm for the coupling region. For the fabricated PBS, the extinction ratio (ER) is 15-30 dB and the excess loss is 0.2-2.6 dB for TE polarization while the ER is 20-27 dB and the excess loss is 0.3-2.8 dB for TM polarization when operating in the wavelength range of 1520-1580 nm.

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

Science.gov (United States)

Pradeepkumar, Aiswarya; Zielinski, Marcin; Bosi, Matteo; Verzellesi, Giovanni; Gaskill, D. Kurt; Iacopi, Francesca

2018-06-01

Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.

Integrated investigation approach for determining mechanical properties of poly-silicon membranes

OpenAIRE

Brueckner, J.; Dehe, A.; Auerswald, E.; Dudek, R.; Michel, B.; Rzepka, S.

2014-01-01

A methodology is presented for determining mechanical properties of free-standing thin films such as poly-silicon membranes. The integrated investigation approach comprises test structure development, mechanical testing, and numerical simulation. All membrane test structures developed and manufactured consist of the same material but have different stiffness due to variations in the geometric design. The mechanical tests apply microscopic loads utilizing a nanoindentation tool. Young's modulu...

Nanophotonic integrated circuits from nanoresonators grown on silicon.

Science.gov (United States)

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

Hybrid III-V/silicon lasers

Science.gov (United States)

Kaspar, P.; Jany, C.; Le Liepvre, A.; Accard, A.; Lamponi, M.; Make, D.; Levaufre, G.; Girard, N.; Lelarge, F.; Shen, A.; Charbonnier, P.; Mallecot, F.; Duan, G.-H.; Gentner, J.-.; Fedeli, J.-M.; Olivier, S.; Descos, A.; Ben Bakir, B.; Messaoudene, S.; Bordel, D.; Malhouitre, S.; Kopp, C.; Menezo, S.

2014-05-01

The lack of potent integrated light emitters is one of the bottlenecks that have so far hindered the silicon photonics platform from revolutionizing the communication market. Photonic circuits with integrated light sources have the potential to address a wide range of applications from short-distance data communication to long-haul optical transmission. Notably, the integration of lasers would allow saving large assembly costs and reduce the footprint of optoelectronic products by combining photonic and microelectronic functionalities on a single chip. Since silicon and germanium-based sources are still in their infancy, hybrid approaches using III-V semiconductor materials are currently pursued by several research laboratories in academia as well as in industry. In this paper we review recent developments of hybrid III-V/silicon lasers and discuss the advantages and drawbacks of several integration schemes. The integration approach followed in our laboratory makes use of wafer-bonded III-V material on structured silicon-on-insulator substrates and is based on adiabatic mode transfers between silicon and III-V waveguides. We will highlight some of the most interesting results from devices such as wavelength-tunable lasers and AWG lasers. The good performance demonstrates that an efficient mode transfer can be achieved between III-V and silicon waveguides and encourages further research efforts in this direction.

Single-crystal silicon trench etching for fabrication of highly integrated circuits

Science.gov (United States)

Engelhardt, Manfred

1991-03-01

The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

EQUIPMENT FOR NONDESTRUCTIVE TESTING OF SILICON WAFERS SUBMICRON TOPOLOGY DURING THE FABRICATION OF INTEGRATED CIRCUITS

Directory of Open Access Journals (Sweden)

S. A. Chizhik

2013-01-01

Full Text Available The advantages of using an atomic force microscopy in manufacturing of submicron integrated circuits are described. The possibilities of characterizing the surface morphology and the etching profile for silicon substrate and bus lines, estimation of the periodicity and size of bus lines, geometrical stability for elementary bus line are shown. Methods of optical and atomic force microcopies are combined in one diagnostic unit. Scanning  probe  microscope  (SPM  200  is  designed  and  produced.  Complex  SPM  200  realizes  nondestructive control of microelectronics elements made on silicon wafers up to 200 mm in diameter and it is introduced by JSC «Integral» for the purpose of operational control, metrology and acceptance of the final product.

A bipolar analog front-end integrated circuit for the SDC silicon tracker

International Nuclear Information System (INIS)

Kipnis, I.; Spieler, H.; Collins, T.

1993-11-01

A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using AT ampersand T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Φ=10 14 protons/cm 2 have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process

Label-free silicon photonic biosensor system with integrated detector array

Science.gov (United States)

Yan, Rongjin; Mestas, Santano P.; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S.

2010-01-01

An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide’s upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip. PMID:19606292

Label-free silicon photonic biosensor system with integrated detector array.

Science.gov (United States)

Yan, Rongjin; Mestas, Santano P; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S; Lear, Kevin L

2009-08-07

An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide's upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip.

MIDAS: Automated Approach to Design Microwave Integrated Inductors and Transformers on Silicon

Directory of Open Access Journals (Sweden)

L. Aluigi

2013-09-01

Full Text Available The design of modern radiofrequency integrated circuits on silicon operating at microwave and millimeter-waves requires the integration of several spiral inductors and transformers that are not commonly available in the process design-kits of the technologies. In this work we present an auxiliary CAD tool for Microwave Inductor (and transformer Design Automation on Silicon (MIDAS that exploits commercial simulators and allows the implementation of an automatic design flow, including three-dimensional layout editing and electromagnetic simulations. In detail, MIDAS allows the designer to derive a preliminary sizing of the inductor (transformer on the bases of the design entries (specifications. It draws the inductor (transformer layers for the specific process design kit, including vias and underpasses, with or without patterned ground shield, and launches the electromagnetic simulations, achieving effective design automation with respect to the traditional design flow for RFICs. With the present software suite the complete design time is reduced significantly (typically 1 hour on a PC based on Intel® Pentium® Dual 1.80GHz CPU with 2-GB RAM. Afterwards both the device equivalent circuit and the layout are ready to be imported in the Cadence environment.

Subwavelength silicon photonics

International Nuclear Information System (INIS)

Cheben, P.; Bock, P.J.; Schmid, J.H.; Lapointe, J.; Janz, S.; Xu, D.-X.; Densmore, A.; Delage, A.; Lamontagne, B.; Florjanczyk, M.; Ma, R.

2011-01-01

With the goal of developing photonic components that are compatible with silicon microelectronic integrated circuits, silicon photonics has been the subject of intense research activity. Silicon is an excellent material for confining and manipulating light at the submicrometer scale. Silicon optoelectronic integrated devices have the potential to be miniaturized and mass-produced at affordable cost for many applications, including telecommunications, optical interconnects, medical screening, and biological and chemical sensing. We review recent advances in silicon photonics research at the National Research Council Canada. A new type of optical waveguide is presented, exploiting subwavelength grating (SWG) effect. We demonstrate subwavelength grating waveguides made of silicon, including practical components operating at telecom wavelengths: input couplers, waveguide crossings and spectrometer chips. SWG technique avoids loss and wavelength resonances due to diffraction effects and allows for single-mode operation with direct control of the mode confinement by changing the refractive index of a waveguide core over a range as broad as 1.6 - 3.5 simply by lithographic patterning. The light can be launched to these waveguides with a coupling loss as small as 0.5 dB and with minimal wavelength dependence, using coupling structures similar to that shown in Fig. 1. The subwavelength grating waveguides can cross each other with minimal loss and negligible crosstalk which allows massive photonic circuit connectivity to overcome the limits of electrical interconnects. These results suggest that the SWG waveguides could become key elements for future integrated photonic circuits. (authors)

A low cost and hybrid technology for integrating silicon sensors or actuators in polymer microfluidic systems

International Nuclear Information System (INIS)

Charlot, Samuel; Gué, Anne-Marie; Tasselli, Josiane; Marty, Antoine; Abgrall, Patrick; Estève, Daniel

2008-01-01

This paper describes a new technology permitting a hybrid integration of silicon chips in polymer (PDMS and SU8) microfluidic structures. This two-step technology starts with transferring the silicon device onto a rigid substrate (typically PCB) and planarizing it, and then it proceeds with stacking of the polymer-made fluidic network onto the device. The technology is low cost, based on screen printing and lamination, can be applied to treat large surface areas, and is compatible with standard photolithography and vacuum based approaches. We show, as an example, the integration of a thermal sensor inside channels made of PDMS or SU8. The developed structures had no fluid leaks at the Si/polymer interfaces and the electrical circuit was perfectly tightproof. (note)

Invited Article: Electrically tunable silicon-based on-chip microdisk resonator for integrated microwave photonic applications

Directory of Open Access Journals (Sweden)

Weifeng Zhang

2016-11-01

Full Text Available Silicon photonics with advantages of small footprint, compatibility with the mature CMOS fabrication technology, and its potential for seamless integration with electronics is making a significant difference in realizing on-chip integration of photonic systems. A microdisk resonator (MDR with a strong capacity in trapping and storing photons is a versatile element in photonic integrated circuits. Thanks to the large index contrast, a silicon-based MDR with an ultra-compact footprint has a great potential for large-scale and high-density integrations. However, the existence of multiple whispering gallery modes (WGMs and resonance splitting in an MDR imposes inherent limitations on its widespread applications. In addition, the waveguide structure of an MDR is incompatible with that of a lateral PN junction, which leads to the deprivation of its electrical tunability. To circumvent these limitations, in this paper we propose a novel design of a silicon-based MDR by introducing a specifically designed slab waveguide to surround the disk and the lateral sides of the bus waveguide to suppress higher-order WGMs and to support the incorporation of a lateral PN junction for electrical tunability. An MDR based on the proposed design is fabricated and its optical performance is evaluated. The fabricated MDR exhibits single-mode operation with a free spectral range of 28.85 nm. Its electrical tunability is also demonstrated and an electro-optic frequency response with a 3-dB modulation bandwidth of ∼30.5 GHz is measured. The use of the fabricated MDR for the implementation of an electrically tunable optical delay-line and a tunable fractional-order temporal photonic differentiator is demonstrated.

An improved PIN photodetector with integrated JFET on high-resistivity silicon

International Nuclear Information System (INIS)

Dalla Betta, Gian-Franco; Piemonte, Claudio; Boscardin, Maurizio; Gregori, Paolo; Zorzi, Nicola; Fazzi, Alberto; Pignatel, Giorgio U.

2006-01-01

We report on a PIN photodetector integrated with a Junction Field Effect Transistor (JFET) on a high-resistivity silicon substrate. Owing to a modified fabrication technology, the electrical and noise characteristics of the JFET transistor have been enhanced with respect to the previous versions of the device, allowing the performance to be significantly improved. In this paper, the main design and technological aspects relevant to the proposed structure are addressed and experimental results from the electrical characterization are discussed

Generation and manipulation of entangled photons on silicon chips

Directory of Open Access Journals (Sweden)

Matsuda Nobuyuki

2016-08-01

Full Text Available Integrated quantum photonics is now seen as one of the promising approaches to realize scalable quantum information systems. With optical waveguides based on silicon photonics technologies, we can realize quantum optical circuits with a higher degree of integration than with silica waveguides. In addition, thanks to the large nonlinearity observed in silicon nanophotonic waveguides, we can implement active components such as entangled photon sources on a chip. In this paper, we report recent progress in integrated quantum photonic circuits based on silicon photonics. We review our work on correlated and entangled photon-pair sources on silicon chips, using nanoscale silicon waveguides and silicon photonic crystal waveguides. We also describe an on-chip quantum buffer realized using the slow-light effect in a silicon photonic crystal waveguide. As an approach to combine the merits of different waveguide platforms, a hybrid quantum circuit that integrates a silicon-based photon-pair source and a silica-based arrayed waveguide grating is also presented.

Integrated Circuit Interconnect Lines on Lossy Silicon Substrate with Finite Element Method

OpenAIRE

Sarhan M. Musa,; Matthew N. O. Sadiku

2014-01-01

The silicon substrate has a significant effect on the inductance parameter of a lossy interconnect line on integrated circuit. It is essential to take this into account in determining the transmission line electrical parameters. In this paper, a new quasi-TEM capacitance and inductance analysis of multiconductor multilayer interconnects is successfully demonstrated using finite element method (FEM). We specifically illustrate the electrostatic modeling of single and coupled in...

Micro direct methanol fuel cell with perforated silicon-plate integrated ionomer membrane

DEFF Research Database (Denmark)

Larsen, Jackie Vincent; Dalslet, Bjarke Thomas; Johansson, Anne-Charlotte Elisabeth Birgitta

2014-01-01

This article describes the fabrication and characterization of a silicon based micro direct methanol fuel cell using a Nafion ionomer membrane integrated into a perforated silicon plate. The focus of this work is to provide a platform for micro- and nanostructuring of a combined current collector...... at a perforation ratio of 40.3%. The presented fuel cells also show a high volumetric peak power density of 2 mW cm−3 in light of the small system volume of 480 μL, while being fully self contained and passively feed....... and catalytic electrode. AC impedance spectroscopy is utilized alongside IV characterization to determine the influence of the plate perforation geometries on the cell performance. It is found that higher ratios of perforation increases peak power density, with the highest achieved being 2.5 mW cm−2...

Integrating carbon nanotubes into silicon by means of vertical carbon nanotube field-effect transistors

KAUST Repository

Li, Jingqi; Wang, Qingxiao; Yue, Weisheng; Guo, Zaibing; LI, LIANG; Zhao, Chao; Wang, Xianbin; Abutaha, Anas I.; Alshareef, Husam N.; Zhang, Yafei; Zhang, Xixiang

2014-01-01

Single-walled carbon nanotubes have been integrated into silicon for use in vertical carbon nanotube field-effect transistors (CNTFETs). A unique feature of these devices is that a silicon substrate and a metal contact are used as the source and drain for the vertical transistors, respectively. These CNTFETs show very different characteristics from those fabricated with two metal contacts. Surprisingly, the transfer characteristics of the vertical CNTFETs can be either ambipolar or unipolar (p-type or n-type) depending on the sign of the drain voltage. Furthermore, the p-type/n-type character of the devices is defined by the doping type of the silicon substrate used in the fabrication process. A semiclassical model is used to simulate the performance of these CNTFETs by taking the conductance change of the Si contact under the gate voltage into consideration. The calculation results are consistent with the experimental observations. This journal is © the Partner Organisations 2014.

Silicon-Based Integration of Groups III, IV, V Chemical Vapor Depositions in High-Quality Photodiodes

NARCIS (Netherlands)

Sammak, A.

2012-01-01

Heterogeneous integration of III-V semiconductors with silicon (Si) technology is an interesting approach to utilize the advantages of both high-speed photonic and electronic properties. The work presented in this thesis is initiated by this major goal of merging III-V semiconductor technology with

A monolithically integrated detector-preamplifier on high-resistivity silicon

International Nuclear Information System (INIS)

Holland, S.; Spieler, H.

1990-02-01

A monolithically integrated detector-preamplifier on high-resistivity silicon has been designed, fabricated and characterized. The detector is a fully depleted p-i-n diode and the preamplifier is implemented in a depletion-mode PMOS process which is compatible with detector processing. The amplifier is internally compensated and the measured gain-bandwidth product is 30 MHz with an input-referred noise of 15 nV/√Hz in the white noise regime. Measurements with an Am 241 radiation source yield an equivalent input noise charge of 800 electrons at 200 ns shaping time for a 1.4 mm 2 detector with on-chip amplifier in an experimental setup with substantial external pickup

Development and miniaturization of a photoacoustic silicon integrated spectrometer for trace gas analysis; Etude et developpement d`un spectrometre photoacoustique integre sur silicium pour analyse de gaz

Energy Technology Data Exchange (ETDEWEB)

Jourdain, A.

1998-10-29

The study deals with the integration on silicon wafers of an infrared spectrometer for carbon dioxide measurements. Photoacoustic detection that measures a differential pressure in a cavity turns out to be the best spectroscopic technique for miniaturization and integration. The micro-system is composed of two main components: an infrared light source on a silicon nitride membrane and a component integrating a tunable optical filter, a microphone for detection and a micro-cavity. After a theoretical study of the different components, each element is realized with the microelectronic techniques such as photolithography, thin films deposits and dry and wet etching. A resin sealing of all the different elements realizes the final micro-spectrophotometer. A characterization of the components is done thanks to the realization of an electronic specific set-up. (author) 107 refs.

Fluorescence and thermoluminescence in silicon oxide films rich in silicon

International Nuclear Information System (INIS)

Berman M, D.; Piters, T. M.; Aceves M, M.; Berriel V, L. R.; Luna L, J. A.

2009-10-01

In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 Ω-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N 2 at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

Physical and electrical characterization of corundum substrates and epitaxial silicon layers in view of fabricating integrated circuits

International Nuclear Information System (INIS)

Trilhe, J.; Legal, H.; Rolland, G.

1975-01-01

The S.O.S. technology (silicon on insulating substrate) allows compact, radiation hard, fast integrated circuits to be fabricated. It is noticeable that complex integrated circuits on corundum substrates obtained with various fabrication processes have various electrical characteristics. Possible correlations between the macroscopic defects of the substrate and the electrical characteristics of the circuit were investigated [fr

The thermal neutron absorption cross-sections, resonance integrals and resonance parameters of silicon and its stable isotopes

International Nuclear Information System (INIS)

Story, J.S.

1969-09-01

The data available up to the end of November 1968 on the thermal neutron absorption cross-sections, resonance absorption integrals, and resonance parameters of silicon and its stable isotopes are collected and discussed. Estimates are given of the mean spacing of the energy levels of the compound nuclei near the neutron binding energy. It is concluded that the thermal neutron absorption cross-section and resonance absorption integral of natural silicon are not well established. The data on these two parameters are somewhat correlated, and three different assessments of the resonance integral are presented which differ over-all by a factor of 230. Many resonances have been detected by charged particle reactions which have not yet been observed in neutron cross-section measurements. One of these resonances of Si 2 8, at E n = 4 ± 5 keV might account for the large resonance integral which is derived, very uncertainly, from integral data. The principal source of the measured resonance integral of Si 3 0 has not yet been located. The thermal neutron absorption cross-section of Si 2 8 appears to result mainly from a negative energy resonance, possibly the resonance at E n = - 59 ± 5 keV detected by the Si 2 8 (d,p) reaction. (author)

Performance of integrated retainer rings in silicon micro-turbines with thrust style micro-ball bearings

International Nuclear Information System (INIS)

Hergert, Robert J; Holmes, Andrew S; Hanrahan, Brendan; Ghodssi, Reza

2013-01-01

This work explores the performance of different silicon retainer ring designs when integrated into silicon micro-turbines (SMTs) incorporating thrust style bearings supported on 500 µm diameter steel balls. Experimental performance curves are presented for SMTs with rotor diameters of 5 mm and 10 mm, each with five different retainer designs varying in mechanical rigidity, ball pocket shape and ball complement. It was found that the different retainer designs yielded different performance curves, with the closed pocket designs consistently requiring lower input power for a given rotation speed, and the most rigid retainers giving the best performance overall. Both 5 mm and 10 mm diameter devices have shown repeatable performance at rotation speeds up to and exceeding 20 000 RPM with input power levels below 2 W, and devices were tested for over 2.5 million revolutions without failure. Retainer rings are commonly used in macro-scale bearings to ensure uniform spacing between the rolling elements. The integration of retainers into micro-bearings could lower costs by reducing the number of balls required for stable operation, and also open up the possibility of ‘smart’ bearings with integrated sensors to monitor the bearing status. (paper)

Hybrid graphene/silicon integrated optical isolators with photonic spin–orbit interaction

International Nuclear Information System (INIS)

Ma, Jingwen; Sun, Xiankai; Xi, Xiang; Yu, Zejie

2016-01-01

Optical isolators are an important building block in photonic computation and communication. In traditional optics, isolators are realized with magneto-optical garnets. However, it remains challenging to incorporate such materials on an integrated platform because of the difficulty in material growth and bulky device footprint. Here, we propose an ultracompact integrated isolator by exploiting graphene's magneto-optical property on a silicon-on-insulator platform. The photonic nonreciprocity is achieved because the cyclotrons in graphene experiencing different optical spins exhibit different responses to counterpropagating light. Taking advantage of cavity resonance effects, we have numerically optimized a device design, which shows excellent isolation performance with the extinction ratio over 45 dB and the insertion loss around 12 dB at a wavelength near 1.55 μm. Featuring graphene's CMOS compatibility and substantially reduced device footprint, our proposal sheds light on monolithic integration of nonreciprocal photonic devices.

Miniaturized flow cytometer with 3D hydrodynamic particle focusing and integrated optical elements applying silicon photodiodes

NARCIS (Netherlands)

Rosenauer, M.; Buchegger, W.; Finoulst, I.; Verhaert, P.D.E.M.; Vellekoop, M.

2010-01-01

In this study, the design, realization and measurement results of a novel optofluidic system capable of performing absorbance-based flow cytometric analysis is presented. This miniaturized laboratory platform, fabricated using SU-8 on a silicon substrate, comprises integrated polymer-based

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

KAUST Repository

Hussain, Muhammad Mustafa

2013-05-30

Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

KAUST Repository

Hussain, Muhammad Mustafa; Rojas, Jhonathan Prieto; Sevilla, Galo T.

2013-01-01

Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

Science.gov (United States)

Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

2016-09-19

Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

Optoelectronic Device Integration in Silicon (OpSIS)

Science.gov (United States)

2015-10-26

silicon-on-insulator," Opt. Express 22, 17872-17879 (2014) Y. Yang, C. Galland, Y. Liu, K. Tan , R. Ding, Q. Li, K. Bergman, T. Baehr-Jones, M...Jaeger, Nicolas AF; Chrostowski, Lukas; “Electrically tunable resonant filters in phase-shifted contra- directional couplers” IEEE Group IV Photonics... Nicolas AF; Chrostowski, Lukas; “Silicon photonic grating-assisted, contra-directional couplers” Optics express Vol. 21, No. 3; 3633-3650 (2013

Flexible Thermoelectric Generators on Silicon Fabric

KAUST Repository

Sevilla, Galo T.

2012-11-01

In this work, the development of a Thermoelectric Generator on Flexible Silicon Fabric is explored to extend silicon electronics for flexible platforms. Low cost, easily deployable plastic based flexible electronics are of great interest for smart textile, wearable electronics and many other exciting applications. However, low thermal budget processing and fundamentally limited electron mobility hinders its potential to be competitive with well established and highly developed silicon technology. The use of silicon in flexible electronics involve expensive and abrasive materials and processes. In this work, high performance flexible thermoelectric energy harvesters are demonstrated from low cost bulk silicon (100) wafers. The fabrication of the micro- harvesters was done using existing silicon processes on silicon (100) and then peeled them off from the original substrate leaving it for reuse. Peeled off silicon has 3.6% thickness of bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. The demonstrated generic batch processing shows a pragmatic way of peeling off a whole silicon circuitry after conventional fabrication on bulk silicon wafers for extremely deformable high performance integrated electronics. In summary, by using a novel, low cost process, this work has successfully integrated existing and highly developed fabrication techniques to introduce a flexible energy harvester for sustainable applications.

First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

International Nuclear Information System (INIS)

Alemi, M.; Campbell, M.; Gys, T.; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K.

2000-01-01

We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface

First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

Energy Technology Data Exchange (ETDEWEB)

Alemi, M.; Campbell, M.; Gys, T. E-mail: thierry.gys@cern.ch; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K

2000-07-11

We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface.

Silicon photonic integrated circuit swept-source optical coherence tomography receiver with dual polarization, dual balanced, in-phase and quadrature detection.

Science.gov (United States)

Wang, Zhao; Lee, Hsiang-Chieh; Vermeulen, Diedrik; Chen, Long; Nielsen, Torben; Park, Seo Yeon; Ghaemi, Allan; Swanson, Eric; Doerr, Chris; Fujimoto, James

2015-07-01

Optical coherence tomography (OCT) is a widely used three-dimensional (3D) optical imaging method with many biomedical and non-medical applications. Miniaturization, cost reduction, and increased functionality of OCT systems will be critical for future emerging clinical applications. We present a silicon photonic integrated circuit swept-source OCT (SS-OCT) coherent receiver with dual polarization, dual balanced, in-phase and quadrature (IQ) detection. We demonstrate multiple functional capabilities of IQ polarization resolved detection including: complex-conjugate suppressed full-range OCT, polarization diversity detection, and polarization-sensitive OCT. To our knowledge, this is the first demonstration of a silicon photonic integrated receiver for OCT. The integrated coherent receiver provides a miniaturized, low-cost solution for SS-OCT, and is also a key step towards a fully integrated high speed SS-OCT system with good performance and multi-functional capabilities. With further performance improvement and cost reduction, photonic integrated technology promises to greatly increase penetration of OCT systems in existing applications and enable new applications.

Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

Science.gov (United States)

Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

1991-01-01

A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

International Nuclear Information System (INIS)

Kipnis, I.; Spieler, H.; Collins, T.

1994-01-01

Since 1989 the Solenoidal Detector Collaboration (SDC) has been developing a general purpose detector to be operated at the Superconducting Super Collider (SSC). A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDS silicon tracker. The IC was designed and tested at LBL and was fabricated using AT and T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a φ = 10 14 protons/cm 2 have been performed on the JC, demonstrating the radiation hardness of the complementary bipolar process

High-End Silicon PDICs

Directory of Open Access Journals (Sweden)

H. Zimmermann

2008-05-01

Full Text Available An overview on integrated silicon photodiodes and photodiode integrated circuits (PDICs or optoelectronic integrated circuits (OEICs for optical storage systems (OSS and fiber receivers is given. It is demonstrated, that by using low-cost silicon technologies high-performance OEICs being true competitors for some III/V-semiconductor OEICs can be realized. OSS-OEICs with bandwidths of up to 380 MHz and fiber receivers with maximum data rates of up to 11 Gbps are described. Low-cost data comm receivers for plastic optical fibers (POF as well as new circuit concepts for OEICs and highly parallel optical receivers are described also in the following.

Micro benchtop optics by bulk silicon micromachining

Science.gov (United States)

Lee, Abraham P.; Pocha, Michael D.; McConaghy, Charles F.; Deri, Robert J.

2000-01-01

Micromachining of bulk silicon utilizing the parallel etching characteristics of bulk silicon and integrating the parallel etch planes of silicon with silicon wafer bonding and impurity doping, enables the fabrication of on-chip optics with in situ aligned etched grooves for optical fibers, micro-lenses, photodiodes, and laser diodes. Other optical components that can be microfabricated and integrated include semi-transparent beam splitters, micro-optical scanners, pinholes, optical gratings, micro-optical filters, etc. Micromachining of bulk silicon utilizing the parallel etching characteristics thereof can be utilized to develop miniaturization of bio-instrumentation such as wavelength monitoring by fluorescence spectrometers, and other miniaturized optical systems such as Fabry-Perot interferometry for filtering of wavelengths, tunable cavity lasers, micro-holography modules, and wavelength splitters for optical communication systems.

Transformational silicon electronics

KAUST Repository

Rojas, Jhonathan Prieto

2014-02-25

In today\\'s traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 μm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industry\\'s most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications. © 2014 American Chemical Society.

Silicon Hard-Stop Mesas for 3D Integration of Superconducting Qubits

Science.gov (United States)

Kim, David; Rosenberg, Danna; Osadchy, Brenda; Calusine, Greg; Das, Rabindra; Melville, Alexander; Yoder, Jonilyn; Yost, Donna-Ruth; Racz, Livia; Oliver, William

As quantum computing with superconducting qubits advances past the few-qubit stage, implementing 3D packaging/integration to route readout/control lines will become increasingly important. One approach is to bond chips that perform different functions using indium bump bonds. Because indium is malleable, however, achieving the desired spacing and tilt between two chips can be challenging. We present an approach based on etching several microns into the silicon substrate to produce hard stop silicon posts. Since this process involves etching into a pristine substrate, it is essential to evaluate its impact on qubit performance. We report the etched surface's effect on the resonator quality factor and qubit coherence time, as well as the improvement in planarity and tilt. This research was funded in part by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) and by the Assistant Secretary of Defense for Research & Engineering under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

Laboratory course on silicon sensors

CERN Document Server

Crescio, E; Roe, S; Rudge, A

2003-01-01

The laboratory course consisted of four different mini sessions, in order to give the student some hands-on experience on various aspects of silicon sensors and related integrated electronics. The four experiments were. 1. Characterisation of silicon diodes for particle detection 2. Study of noise performance of the Viking readout circuit 3. Study of the position resolution of a silicon microstrip sensor 4. Study of charge transport in silicon with a fast amplifier The data in the following were obtained during the ICFA school by the students.

Mechanical integration of the detector components for the CBM silicon tracking system

Energy Technology Data Exchange (ETDEWEB)

Vasylyev, Oleg; Niebur, Wolfgang [GSI Helmholtzzentrum fuer Schwerionenforschung GmbH, Darmstadt (Germany); Collaboration: CBM-Collaboration

2016-07-01

The Compressed Baryonic Matter experiment (CBM) at FAIR is designed to explore the QCD phase diagram in the region of high net-baryon densities. The central detector component, the Silicon Tracking System (STS) is based on double-sided micro-strip sensors. In order to achieve the physics performance, the detector mechanical structures should be developed taking into account the requirements of the CBM experiments: low material budget, high radiation environment, interaction rates, aperture for the silicon tracking, detector segmentation and mounting precision. A functional plan of the STS and its surrounding structural components is being worked out from which the STS system shape is derived and the power and cooling needs, the connector space requirements, life span of components and installation/repair aspects are determined. The mechanical integration is at the point of finalizing the design stage and moving towards production readiness. This contribution shows the current processing state of the following engineering tasks: construction space definition, carbon ladder shape and manufacturability, beam-pipe feedthrough structure, prototype construction, cable routing and modeling of the electronic components.

Silicon photonics III systems and applications

CERN Document Server

Lockwood, David

2016-01-01

This book is volume III of a series of books on silicon photonics. It reports on the development of fully integrated systems where many different photonics component are integrated together to build complex circuits. This is the demonstration of the fully potentiality of silicon photonics. It contains a number of chapters written by engineers and scientists of the main companies, research centers and universities active in the field. It can be of use for all those persons interested to know the potentialities and the recent applications of silicon photonics both in microelectronics, telecommunication and consumer electronics market.

Integration of a silicon-based microprobe into a gear measuring instrument for accurate measurement of micro gears

International Nuclear Information System (INIS)

Ferreira, N; Krah, T; Jeong, D C; Kniel, K; Härtig, F; Metz, D; Dietzel, A; Büttgenbach, S

2014-01-01

The integration of silicon micro probing systems into conventional gear measuring instruments (GMIs) allows fully automated measurements of external involute micro spur gears of normal modules smaller than 1 mm. This system, based on a silicon microprobe, has been developed and manufactured at the Institute for Microtechnology of the Technische Universität Braunschweig. The microprobe consists of a silicon sensor element and a stylus which is oriented perpendicularly to the sensor. The sensor is fabricated by means of silicon bulk micromachining. Its small dimensions of 6.5 mm × 6.5 mm allow compact mounting in a cartridge to facilitate the integration into a GMI. In this way, tactile measurements of 3D microstructures can be realized. To enable three-dimensional measurements with marginal forces, four Wheatstone bridges are built with diffused piezoresistors on the membrane of the sensor. On the reverse of the membrane, the stylus is glued perpendicularly to the sensor on a boss to transmit the probing forces to the sensor element during measurements. Sphere diameters smaller than 300 µm and shaft lengths of 5 mm as well as measurement forces from 10 µN enable the measurements of 3D microstructures. Such micro probing systems can be integrated into universal coordinate measuring machines and also into GMIs to extend their field of application. Practical measurements were carried out at the Physikalisch-Technische Bundesanstalt by qualifying the microprobes on a calibrated reference sphere to determine their sensitivity and their physical dimensions in volume. Following that, profile and helix measurements were carried out on a gear measurement standard with a module of 1 mm. The comparison of the measurements shows good agreement between the measurement values and the calibrated values. This result is a promising basis for the realization of smaller probe diameters for the tactile measurement of micro gears with smaller modules. (paper)

A review of recent progress in heterogeneous silicon tandem solar cells

Science.gov (United States)

Yamaguchi, Masafumi; Lee, Kan-Hua; Araki, Kenji; Kojima, Nobuaki

2018-04-01

Silicon solar cells are the most established solar cell technology and are expected to dominate the market in the near future. As state-of-the-art silicon solar cells are approaching the Shockley-Queisser limit, stacking silicon solar cells with other photovoltaic materials to form multi-junction devices is an obvious pathway to further raise the efficiency. However, many challenges stand in the way of fully realizing the potential of silicon tandem solar cells because heterogeneously integrating silicon with other materials often degrades their qualities. Recently, above or near 30% silicon tandem solar cell has been demonstrated, showing the promise of achieving high-efficiency and low-cost solar cells via silicon tandem. This paper reviews the recent progress of integrating solar cell with other mainstream solar cell materials. The first part of this review focuses on the integration of silicon with III-V semiconductor solar cells, which is a long-researched topic since the emergence of III-V semiconductors. We will describe the main approaches—heteroepitaxy, wafer bonding and mechanical stacking—as well as other novel approaches. The second part introduces the integration of silicon with polycrystalline thin-film solar cells, mainly perovskites on silicon solar cells because of its rapid progress recently. We will also use an analytical model to compare the material qualities of different types of silicon tandem solar cells and project their practical efficiency limits.

Silicon based light-emitting materials and devices

International Nuclear Information System (INIS)

Chen Weide

1999-01-01

Silicon based light-emitting materials and devices are the key to optoelectronic integration. Recently, there has been significant progress in materials engineering methods. The author reviews the latest developments in this area including erbium doped silicon, porous silicon, nanocrystalline silicon and Si/SiO 2 superlattice structures. The incorporation of these different materials into devices is described and future device prospects are assessed

The SuperB Silicon Vertex Tracker and 3D vertical integration

CERN Document Server

Re, Valerio

2011-01-01

The construction of the SuperB high luminosity collider was approved and funded by the Italian government in 2011. The performance specifications set by the target luminosity of this machine (> 10^36 cm^-2 s^-1) ask for the development of a Silicon Vertex Tracker with high resolution, high tolerance to radiation and excellent capability of handling high data rates. This paper reviews the R&D activity that is being carried out for the SuperB SVT. Special emphasis is given to the option of exploiting 3D vertical integration to build advanced pixel sensors and readout electronics that are able to comply with SuperB vertexing requirements.

Building integration photovoltaic module with reference to Ghana: using triple junction amorphous silicon

OpenAIRE

Essah, Emmanuel Adu

2010-01-01

This paper assesses the potential for using building integrated photovoltaic (BIPV) \\ud roof shingles made from triple-junction amorphous silicon (3a-Si) for electrification \\ud and as a roofing material in tropical countries, such as Accra, Ghana. A model roof \\ud was constructed using triple-junction amorphous (3a-Si) PV on one section and \\ud conventional roofing tiles on the other. The performance of the PV module and tiles \\ud were measured, over a range of ambient temperatures and solar...

Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

Science.gov (United States)

Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

2017-12-01

In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

Twenty-fold plasmon-induced enhancement of radiative emission rate in silicon nanocrystals embedded in silicon dioxide

International Nuclear Information System (INIS)

Gardelis, S; Gianneta, V.; Nassiopoulou, A.G

2016-01-01

We report on a 20-fold enhancement of the integrated photoluminescence (PL) emission of silicon nanocrystals, embedded in a matrix of silicon dioxide, induced by excited surface plasmons from silver nanoparticles, which are located in the vicinity of the silicon nanocrystals and separated from them by a silicon dioxide layer of a few nanometers. The electric field enhancement provided by the excited surface plasmons increases the absorption cross section and the emission rate of the nearby silicon nanocrystals, resulting in the observed enhancement of the photoluminescence, mainly attributed to a 20-fold enhancement in the emission rate of the silicon nanocrystals. The observed remarkable improvement of the PL emission makes silicon nanocrystals very useful material for photonic, sensor and solar cell applications.

Tin (Sn) for enhancing performance in silicon CMOS

KAUST Repository

Hussain, Aftab M.; Fahad, Hossain M.; Singh, Nirpendra; Sevilla, Galo T.; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

2013-01-01

We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

Tin (Sn) for enhancing performance in silicon CMOS

KAUST Repository

Hussain, Aftab M.

2013-10-01

We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

Amorphous silicon based particle detectors

OpenAIRE

Wyrsch, N.; Franco, A.; Riesen, Y.; Despeisse, M.; Dunand, S.; Powolny, F.; Jarron, P.; Ballif, C.

2012-01-01

Radiation hard monolithic particle sensors can be fabricated by a vertical integration of amorphous silicon particle sensors on top of CMOS readout chip. Two types of such particle sensors are presented here using either thick diodes or microchannel plates. The first type based on amorphous silicon diodes exhibits high spatial resolution due to the short lateral carrier collection. Combination of an amorphous silicon thick diode with microstrip detector geometries permits to achieve micromete...

High-performance RF coil inductors on silicon

Energy Technology Data Exchange (ETDEWEB)

Malba, V.; Young, D.; Ou, J.J.; Bernhardt, A.F.; Boser, B.E.

1998-03-01

Strong demand for wireless communication devices has motivated research directed toward monolithic integration of transceivers. The fundamental electronic component least compatible with silicon integrated circuits is the inductor, although a number of inductors are required to implement oscillators, filters and matching networks in cellular devices. Spiral inductors have been integrated into the silicon IC metallization sequence but have not performed adequately due to coupling to the silicon which results in parasitic capacitance and loss. We have, for the first time, fabricated three dimensional coil inductors on silicon which have significantly lower capacitive coupling and loss and which now exceed the requirements of potential applications. Quality factors of 30 at 1 GHz have been measured in single turn devices and Q > 16 in 2 and 4 turn devices. The reduced Q for multiturn devices appears to be related to eddy currents in outer turns generated by magnetic fields from current in neighboring turns. Higher Q values significantly in excess of 30 are anticipated using modified coil designs.

Silicon photonics for telecommunications and biomedicine

CERN Document Server

Fathpour, Sasan

2011-01-01

Given silicon's versatile material properties, use of low-cost silicon photonics continues to move beyond light-speed data transmission through fiber-optic cables and computer chips. Its application has also evolved from the device to the integrated-system level. A timely overview of this impressive growth, Silicon Photonics for Telecommunications and Biomedicine summarizes state-of-the-art developments in a wide range of areas, including optical communications, wireless technologies, and biomedical applications of silicon photonics. With contributions from world experts, this reference guides

Graphene-on-silicon hybrid plasmonic-photonic integrated circuits.

Science.gov (United States)

Xiao, Ting-Hui; Cheng, Zhenzhou; Goda, Keisuke

2017-06-16

Graphene surface plasmons (GSPs) have shown great potential in biochemical sensing, thermal imaging, and optoelectronics. To excite GSPs, several methods based on the near-field optical microscope and graphene nanostructures have been developed in the past few years. However, these methods suffer from their bulky setups and low GSP-excitation efficiency due to the short interaction length between free-space vertical excitation light and the atomic layer of graphene. Here we present a CMOS-compatible design of graphene-on-silicon hybrid plasmonic-photonic integrated circuits that achieve the in-plane excitation of GSP polaritons as well as localized surface plasmon (SP) resonance. By employing a suspended membrane slot waveguide, our design is able to excite GSP polaritons on a chip. Moreover, by utilizing a graphene nanoribbon array, we engineer the transmission spectrum of the waveguide by excitation of localized SP resonance. Our theoretical and computational study paves a new avenue to enable, modulate, and monitor GSPs on a chip, potentially applicable for the development of on-chip electro-optic devices.

Nanowire-integrated microporous silicon membrane for continuous fluid transport in micro cooling device

International Nuclear Information System (INIS)

So, Hongyun; Pisano, Albert P.; Cheng, Jim C.

2013-01-01

We report an efficient passive micro pump system combining the physical properties of nanowires and micropores. This nanowire-integrated microporous silicon membrane was created to feed coolant continuously onto the surface of the wick in a micro cooling device to ensure it remains hydrated and in case of dryout, allow for regeneration of the system. The membrane was fabricated by photoelectrochemical etching to form micropores followed by hydrothermal growth of nanowires. This study shows a promising approach to address thermal management challenges for next generation electronic devices with absence of external power

Effects of plasma-deposited silicon nitride passivation on the radiation hardness of CMOS integrated circuits

International Nuclear Information System (INIS)

Clement, J.J.

1980-01-01

The use of plasma-deposited silicon nitride as a final passivation over metal-gate CMOS integrated circuits degrades the radiation hardness of these devices. The hardness degradation is manifested by increased radiation-induced threshold voltage shifts caused principally by the charging of new interface states and, to a lesser extent, by the trapping of holes created upon exposure to ionizing radiation. The threshold voltage shifts are a strong function of the deposition temperature, and show very little dependence on thickness for films deposited at 300 0 C. There is some correlation between the threshold voltage shifts and the hydrogen content of the PECVD silicon nitride films used as the final passivation layer as a function of deposition temperature. The mechanism by which the hydrogen contained in these films may react with the Si/SiO 2 interface is not clear at this point

Silicon microphotonic waveguides

International Nuclear Information System (INIS)

Ta'eed, V.; Steel, M.J.; Grillet, C.; Eggleton, B.; Du, J.; Glasscock, J.; Savvides, N.

2004-01-01

Full text: Silicon microphotonic devices have been drawing increasing attention in the past few years. The high index-difference between silicon and its oxide (Δn = 2) suggests a potential for high-density integration of optical functions on to a photonic chip. Additionally, it has been shown that silicon exhibits strong Raman nonlinearity, a necessary property as light interaction can occur only by means of nonlinearities in the propagation medium. The small dimensions of silicon waveguides require the design of efficient tapers to couple light to them. We have used the beam propagation method (RSoft BeamPROP) to understand the principles and design of an inverse-taper mode-converter as implemented in several recent papers. We report on progress in the design and fabrication of silicon-based waveguides. Preliminary work has been conducted by patterning silicon-on-insulator (SOI) wafers using optical lithography and reactive ion etching. Thus far, only rib waveguides have been designed, as single-mode ridge-waveguides are beyond the capabilities of conventional optical lithography. We have recently moved to electron beam lithography as the higher resolutions permitted will provide the flexibility to begin fabricating sub-micron waveguides

Development of deep silicon plasma etching for 3D integration technology

Directory of Open Access Journals (Sweden)

Golishnikov А. А.

2014-02-01

Full Text Available Plasma etch process for thought-silicon via (TSV formation is one of the most important technological operations in the field of metal connections creation between stacked circuits in 3D assemble technology. TSV formation strongly depends on parameters such as Si-wafer thickness, aspect ratio, type of metallization material, etc. The authors investigate deep silicon plasma etch process for formation of TSV with controllable profile. The influence of process parameters on plasma etch rate, silicon etch selectivity to photoresist and the structure profile are researched in this paper. Technology with etch and passivation steps alternation was used as a method of deep silicon plasma etching. Experimental tool «Platrane-100» with high-density plasma reactor based on high-frequency ion source with transformer coupled plasma was used for deep silicon plasma etching. As actuation gases for deep silicon etching were chosen the following gases: SF6 was used for the etch stage and CHF3 was applied on the polymerization stage. As a result of research, the deep plasma etch process has been developed with the following parameters: silicon etch rate 6 µm/min, selectivity to photoresist 60 and structure profile 90±2°. This process provides formation of TSV 370 µm deep and about 120 µm in diameter.

Data Transmission and Thermo-Optic Tuning Performance of Dielectric-Loaded Plasmonic Structures Hetero-Integrated on a Silicon Chip

DEFF Research Database (Denmark)

Giannoulis, G.; Kalavrouziotis, D.; Apostolopoulos, D.

2012-01-01

We demonstrate experimental evidence of the data capture and the low-energy thermo-optic tuning credentials of dielectric-loaded plasmonic structures integrated on a silicon chip. We show 7-nm thermo-optical tuning of a plasmonic racetrack-resonator with less than 3.3 mW required electrical power...

Quantum Coherent States and Path Integral Method to Stochastically Determine the Anisotropic Volume Expansion in Lithiated Silicon Nanowires

Directory of Open Access Journals (Sweden)

Donald C. Boone

2017-10-01

Full Text Available This computational research study will analyze the multi-physics of lithium ion insertion into a silicon nanowire in an attempt to explain the electrochemical kinetics at the nanoscale and quantum level. The electron coherent states and a quantum field version of photon density waves will be the joining theories that will explain the electron-photon interaction within the lithium-silicon lattice structure. These two quantum particles will be responsible for the photon absorption rate of silicon atoms that are hypothesized to be the leading cause of breaking diatomic silicon covalent bonds that ultimately leads to volume expansion. It will be demonstrated through the combination of Maxwell stress tensor, optical amplification and path integrals that a stochastic analyze using a variety of Poisson distributions that the anisotropic expansion rates in the <110>, <111> and <112> orthogonal directions confirms the findings ascertained in previous works made by other research groups. The computational findings presented in this work are similar to those which were discovered experimentally using transmission electron microscopy (TEM and simulation models that used density functional theory (DFT and molecular dynamics (MD. The refractive index and electric susceptibility parameters of lithiated silicon are interwoven in the first principle theoretical equations and appears frequently throughout this research presentation, which should serve to demonstrate the importance of these parameters in the understanding of this component in lithium ion batteries.

Study and characterization of an integrated circuit-deposited hydrogenated amorphous silicon sensor for the detection of particles and radiations

International Nuclear Information System (INIS)

Despeisse, M.

2006-03-01

Next generation experiments at the European laboratory of particle physics (CERN) require particle detector alternatives to actual silicon detectors. This thesis presents a novel detector technology, which is based on the deposition of a hydrogenated amorphous silicon sensor on top of an integrated circuit. Performance and limitations of this technology have been assessed for the first time in this thesis in the context of particle detectors. Specific integrated circuits have been designed and the detector segmentation, the interface sensor-chip and the sensor leakage current have been studied in details. The signal induced by the track of an ionizing particle in the sensor has been characterized and results on the signal speed, amplitude and on the sensor resistance to radiation are presented. The results are promising regarding the use of this novel technology for radiation detection, though limitations have been shown for particle physics application. (author)

Periodically poled silicon

Science.gov (United States)

Hon, Nick K.; Tsia, Kevin K.; Solli, Daniel R.; Khurgin, Jacob B.; Jalali, Bahram

2010-02-01

Bulk centrosymmetric silicon lacks second-order optical nonlinearity χ(2) - a foundational component of nonlinear optics. Here, we propose a new class of photonic device which enables χ(2) as well as quasi-phase matching based on periodic stress fields in silicon - periodically-poled silicon (PePSi). This concept adds the periodic poling capability to silicon photonics, and allows the excellent crystal quality and advanced manufacturing capabilities of silicon to be harnessed for devices based on χ(2)) effects. The concept can also be simply achieved by having periodic arrangement of stressed thin films along a silicon waveguide. As an example of the utility, we present simulations showing that mid-wave infrared radiation can be efficiently generated through difference frequency generation from near-infrared with a conversion efficiency of 50% based on χ(2) values measurements for strained silicon reported in the literature [Jacobson et al. Nature 441, 199 (2006)]. The use of PePSi for frequency conversion can also be extended to terahertz generation. With integrated piezoelectric material, dynamically control of χ(2)nonlinearity in PePSi waveguide may also be achieved. The successful realization of PePSi based devices depends on the strength of the stress induced χ(2) in silicon. Presently, there exists a significant discrepancy in the literature between the theoretical and experimentally measured values. We present a simple theoretical model that produces result consistent with prior theoretical works and use this model to identify possible reasons for this discrepancy.

Luneburg lens in silicon photonics.

Science.gov (United States)

Di Falco, Andrea; Kehr, Susanne C; Leonhardt, Ulf

2011-03-14

The Luneburg lens is an aberration-free lens that focuses light from all directions equally well. We fabricated and tested a Luneburg lens in silicon photonics. Such fully-integrated lenses may become the building blocks of compact Fourier optics on chips. Furthermore, our fabrication technique is sufficiently versatile for making perfect imaging devices on silicon platforms.

Waveguide silicon nitride grating coupler

Science.gov (United States)

Litvik, Jan; Dolnak, Ivan; Dado, Milan

2016-12-01

Grating couplers are one of the most used elements for coupling of light between optical fibers and photonic integrated components. Silicon-on-insulator platform provides strong confinement of light and allows high integration. In this work, using simulations we have designed a broadband silicon nitride surface grating coupler. The Fourier-eigenmode expansion and finite difference time domain methods are utilized in design optimization of grating coupler structure. The fully, single etch step grating coupler is based on a standard silicon-on-insulator wafer with 0.55 μm waveguide Si3N4 layer. The optimized structure at 1550 nm wavelength yields a peak coupling efficiency -2.6635 dB (54.16%) with a 1-dB bandwidth up to 80 nm. It is promising way for low-cost fabrication using complementary metal-oxide- semiconductor fabrication process.

Analytical and experimental evaluation of joining silicon carbide to silicon carbide and silicon nitride to silicon nitride for advanced heat engine applications Phase 2. Final report

Energy Technology Data Exchange (ETDEWEB)

Sundberg, G.J.; Vartabedian, A.M.; Wade, J.A.; White, C.S. [Norton Co., Northboro, MA (United States). Advanced Ceramics Div.

1994-10-01

The purpose of joining, Phase 2 was to develop joining technologies for HIP`ed Si{sub 3}N{sub 4} with 4wt% Y{sub 2}O{sub 3} (NCX-5101) and for a siliconized SiC (NT230) for various geometries including: butt joins, curved joins and shaft to disk joins. In addition, more extensive mechanical characterization of silicon nitride joins to enhance the predictive capabilities of the analytical/numerical models for structural components in advanced heat engines was provided. Mechanical evaluation were performed by: flexure strength at 22 C and 1,370 C, stress rupture at 1,370 C, high temperature creep, 22 C tensile testing and spin tests. While the silicon nitride joins were produced with sufficient integrity for many applications, the lower join strength would limit its use in the more severe structural applications. Thus, the silicon carbide join quality was deemed unsatisfactory to advance to more complex, curved geometries. The silicon carbide joining methods covered within this contract, although not entirely successful, have emphasized the need to focus future efforts upon ways to obtain a homogeneous, well sintered parent/join interface prior to siliconization. In conclusion, the improved definition of the silicon carbide joining problem obtained by efforts during this contract have provided avenues for future work that could successfully obtain heat engine quality joins.

Demonstration of slot-waveguide structures on silicon nitride / silicon oxide platform.

Science.gov (United States)

Barrios, C A; Sánchez, B; Gylfason, K B; Griol, A; Sohlström, H; Holgado, M; Casquel, R

2007-05-28

We report on the first demonstration of guiding light in vertical slot-waveguides on silicon nitride/silicon oxide material system. Integrated ring resonators and Fabry-Perot cavities have been fabricated and characterized in order to determine optical features of the slot-waveguides. Group index behavior evidences guiding and confinement in the low-index slot region at O-band (1260-1370nm) telecommunication wavelengths. Propagation losses of <20 dB/cm have been measured for the transverse-electric mode of the slot-waveguides.

New dynamic silicon photonic components enabled by MEMS technology

Science.gov (United States)

Errando-Herranz, Carlos; Edinger, Pierre; Colangelo, Marco; Björk, Joel; Ahmed, Samy; Stemme, Göran; Niklaus, Frank; Gylfason, Kristinn B.

2018-02-01

Silicon photonics is the study and application of integrated optical systems which use silicon as an optical medium, usually by confining light in optical waveguides etched into the surface of silicon-on-insulator (SOI) wafers. The term microelectromechanical systems (MEMS) refers to the technology of mechanics on the microscale actuated by electrostatic actuators. Due to the low power requirements of electrostatic actuation, MEMS components are very power efficient, making them well suited for dense integration and mobile operation. MEMS components are conventionally also implemented in silicon, and MEMS sensors such as accelerometers, gyros, and microphones are now standard in every smartphone. By combining these two successful technologies, new active photonic components with extremely low power consumption can be made. We discuss our recent experimental work on tunable filters, tunable fiber-to-chip couplers, and dynamic waveguide dispersion tuning, enabled by the marriage of silicon MEMS and silicon photonics.

Safely re-integrating silicone breast implants into the plastic surgery practice.

Science.gov (United States)

Gladfelter, Joanne

2006-01-01

In the early 1990s, it was reported that silicone breast implants were possibly responsible for serious damage to women's health. In January 1992, the Food and Drug Administration issued a voluntary breast implant moratorium and, in April, issued a ban on the use of silicone gel-filled implants for cosmetic breast augmentation. Since that time, silicone gel-filled breast implants have been available to women only for select cases: women seeking breast reconstruction or revision of an existing breast implant, women who have had breast cancer surgery, a severe injury to the breast, a birth defect that affects the breast, or a medical condition causing a severe breast deformity. Since the ban on the use of silicone gel-filled breast implants for cosmetic breast augmentation, numerous scientific studies have been conducted. To ensure patient safety, the American Board of Plastic Surgery believes that these scientific studies and the Food and Drug Administration's scrutiny of silicone gel-filled breast implants have been appropriate and necessary.

High-speed detection at two micrometres with monolithic silicon photodiodes

Science.gov (United States)

Ackert, Jason J.; Thomson, David J.; Shen, Li; Peacock, Anna C.; Jessop, Paul E.; Reed, Graham T.; Mashanovich, Goran Z.; Knights, Andrew P.

2015-06-01

With continued steep growth in the volume of data transmitted over optical networks there is a widely recognized need for more sophisticated photonics technologies to forestall a ‘capacity crunch’. A promising solution is to open new spectral regions at wavelengths near 2 μm and to exploit the long-wavelength transmission and amplification capabilities of hollow-core photonic-bandgap fibres and the recently available thulium-doped fibre amplifiers. To date, photodetector devices for this window have largely relied on III-V materials or, where the benefits of integration with silicon photonics are sought, GeSn alloys, which have been demonstrated thus far with only limited utility. Here, we describe a silicon photodiode operating at 20 Gbit s-1 in this wavelength region. The detector is compatible with standard silicon processing and is integrated directly with silicon-on-insulator waveguides, which suggests future utility in silicon-based mid-infrared integrated optics for applications in communications.

A CMOS-compatible large-scale monolithic integration of heterogeneous multi-sensors on flexible silicon for IoT applications

KAUST Repository

Nassar, Joanna M.

2017-02-07

We report CMOS technology enabled fabrication and system level integration of flexible bulk silicon (100) based multi-sensors platform which can simultaneously sense pressure, temperature, strain and humidity under various physical deformations. We also show an advanced wearable version for body vital monitoring which can enable advanced healthcare for IoT applications.

A CMOS-compatible large-scale monolithic integration of heterogeneous multi-sensors on flexible silicon for IoT applications

KAUST Repository

Nassar, Joanna M.; Sevilla, Galo T.; Velling, Seneca J.; Cordero, Marlon D.; Hussain, Muhammad Mustafa

2017-01-01

We report CMOS technology enabled fabrication and system level integration of flexible bulk silicon (100) based multi-sensors platform which can simultaneously sense pressure, temperature, strain and humidity under various physical deformations. We also show an advanced wearable version for body vital monitoring which can enable advanced healthcare for IoT applications.

High-density oxidized porous silicon

International Nuclear Information System (INIS)

Gharbi, Ahmed; Souifi, Abdelkader; Remaki, Boudjemaa; Halimaoui, Aomar; Bensahel, Daniel

2012-01-01

We have studied oxidized porous silicon (OPS) properties using Fourier transform infraRed (FTIR) spectroscopy and capacitance–voltage C–V measurements. We report the first experimental determination of the optimum porosity allowing the elaboration of high-density OPS insulators. This is an important contribution to the research of thick integrated electrical insulators on porous silicon based on an optimized process ensuring dielectric quality (complete oxidation) and mechanical and chemical reliability (no residual pores or silicon crystallites). Through the measurement of the refractive indexes of the porous silicon (PS) layer before and after oxidation, one can determine the structural composition of the OPS material in silicon, air and silica. We have experimentally demonstrated that a porosity approaching 56% of the as-prepared PS layer is required to ensure a complete oxidation of PS without residual silicon crystallites and with minimum porosity. The effective dielectric constant values of OPS materials determined from capacitance–voltage C–V measurements are discussed and compared to FTIR results predictions. (paper)

Silicon Integrated Dual-Mode Interferometer with Differential Outputs

Directory of Open Access Journals (Sweden)

Niklas Hoppe

2017-09-01

Full Text Available The dual-mode interferometer (DMI is an attractive alternative to Mach-Zehnder interferometers for sensor purposes, achieving sensitivities to refractive index changes close to state-of-the-art. Modern designs on silicon-on-insulator (SOI platforms offer thermally stable and compact devices with insertion losses of less than 1 dB and high extinction ratios. Compact arrays of multiple DMIs in parallel are easy to fabricate due to the simple structure of the DMI. In this work, the principle of operation of an integrated DMI with differential outputs is presented which allows the unambiguous phase shift detection with a single wavelength measurement, rather than using a wavelength sweep and evaluating the optical output power spectrum. Fluctuating optical input power or varying attenuation due to different analyte concentrations can be compensated by observing the sum of the optical powers at the differential outputs. DMIs with two differential single-mode outputs are fabricated in a 250 nm SOI platform, and corresponding measurements are shown to explain the principle of operation in detail. A comparison of DMIs with the conventional Mach-Zehnder interferometer using the same technology concludes this work.

Integrated circuits of silicon on insulator S.O.I. technologies: State of the art and perspectives

International Nuclear Information System (INIS)

Leray, J.L.; Dupont-Nivet, E.; Raffaelli, M.; Coic, Y.M.; Musseau, O.; Pere, J.F.; Lalande, P.; Bredy, J.; Auberton-Herve, A.J.; Bruel, M.; Giffard, B.

1989-01-01

Silicon On Insulator technologies have been proposed to increase the integrated circuits performances in radiation operation. Active researches are conducted, in France and abroad. This paper reviews briefly radiation effects phenomenology in that particular type of structure S.O.I. New results are presented that show very good radiation behaviour in term of speed, dose (10 to 100 megarad (Si)), dose rate and S.E.U. performances [fr

Three hydrogenated amorphous silicon photodiodes stacked for an above integrated circuit colour sensor

Energy Technology Data Exchange (ETDEWEB)

Gidon, Pierre; Giffard, Benoit; Moussy, Norbert; Parrein, Pascale; Poupinet, Ludovic [CEA-LETI, MINATEC, CEA-Grenoble, 17 rue des Martyrs, 38054 Grenoble Cedex 9 (France)

2010-03-15

We present theoretical simulation and experimental results of a new colour pixel structure. This pixel catches the light in three stacked amorphous silicon photodiodes encompassed between transparent electrodes. The optical structure has been simulated for signal optimisation. The thickness of each stacked layer is chosen in order to absorb the maximum of light and the three signals allow to linearly calculate the CIE colour coordinates 1 with minimum error and noise. The whole process is compatible with an above integrated circuit (IC) approach. Each photodiode is an n-i-p structure. For optical reason, the upper diode must be controlled down to 25 nm thickness. The first test pixel structure allows a good recovering of colour coordinates. The measured absorption spectrum of each photodiode is in good agreement with our simulations. This specific stack with three photodiodes per pixel totalises two times more signal than an above IC pixel under a standard Bayer pattern 2,3. In each square of this GretagMacbeth chart is the reference colour on the right and the experimentally measured colour on the left with three amorphous silicon photodiodes per pixel. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

Strained silicon as a new electro-optic material

DEFF Research Database (Denmark)

Jacobsen, Rune Shim; Andersen, Karin Nordström; Borel, Peter Ingo

2006-01-01

For decades, silicon has been the material of choice for mass fabrication of electronics. This is in contrast to photonics, where passive optical components in silicon have only recently been realized1, 2. The slow progress within silicon optoelectronics, where electronic and optical...... functionalities can be integrated into monolithic components based on the versatile silicon platform, is due to the limited active optical properties of silicon3. Recently, however, a continuous-wave Raman silicon laser was demonstrated4; if an effective modulator could also be realized in silicon, data...... processing and transmission could potentially be performed by all-silicon electronic and optical components. Here we have discovered that a significant linear electro-optic effect is induced in silicon by breaking the crystal symmetry. The symmetry is broken by depositing a straining layer on top...

High surface area silicon materials: fundamentals and new technology.

Science.gov (United States)

Buriak, Jillian M

2006-01-15

Crystalline silicon forms the basis of just about all computing technologies on the planet, in the form of microelectronics. An enormous amount of research infrastructure and knowledge has been developed over the past half-century to construct complex functional microelectronic structures in silicon. As a result, it is highly probable that silicon will remain central to computing and related technologies as a platform for integration of, for instance, molecular electronics, sensing elements and micro- and nanoelectromechanical systems. Porous nanocrystalline silicon is a fascinating variant of the same single crystal silicon wafers used to make computer chips. Its synthesis, a straightforward electrochemical, chemical or photochemical etch, is compatible with existing silicon-based fabrication techniques. Porous silicon literally adds an entirely new dimension to the realm of silicon-based technologies as it has a complex, three-dimensional architecture made up of silicon nanoparticles, nanowires, and channel structures. The intrinsic material is photoluminescent at room temperature in the visible region due to quantum confinement effects, and thus provides an optical element to electronic applications. Our group has been developing new organic surface reactions on porous and nanocrystalline silicon to tailor it for a myriad of applications, including molecular electronics and sensing. Integration of organic and biological molecules with porous silicon is critical to harness the properties of this material. The construction and use of complex, hierarchical molecular synthetic strategies on porous silicon will be described.

Plasmonic nanofocusing of light in an integrated silicon photonics platform.

Science.gov (United States)

Desiatov, Boris; Goykhman, Ilya; Levy, Uriel

2011-07-04

The capability to focus electromagnetic energy at the nanoscale plays an important role in nanoscinece and nanotechnology. It allows enhancing light matter interactions at the nanoscale with applications related to nonlinear optics, light emission and light detection. It may also be used for enhancing resolution in microscopy, lithography and optical storage systems. Hereby we propose and experimentally demonstrate the nanoscale focusing of surface plasmons by constructing an integrated plasmonic/photonic on chip nanofocusing device in silicon platform. The device was tested directly by measuring the optical intensity along it using a near-field microscope. We found an order of magnitude enhancement of the intensity at the tip's apex. The spot size is estimated to be 50 nm. The demonstrated device may be used as a building block for "lab on a chip" systems and for enhancing light matter interactions at the apex of the tip.

Advances in silicon nanophotonics

DEFF Research Database (Denmark)

Hvam, Jørn Märcher; Pu, Minhao

Silicon has long been established as an ideal material for passive integrated optical circuitry due to its high refractive index, with corresponding strong optical confinement ability, and its low-cost CMOS-compatible manufacturability. However, the inversion symmetry of the silicon crystal lattice.......g. in high-bit-rate optical communication circuits and networks, it is vital that the nonlinear optical effects of silicon are being strongly enhanced. This can among others be achieved in photonic-crystal slow-light waveguides and in nano-engineered photonic-wires (Fig. 1). In this talk I shall present some...... recent advances in this direction. The efficient coupling of light between optical fibers and the planar silicon devices and circuits is of crucial importance. Both end-coupling (Fig. 1) and grating-coupling solutions will be discussed along with polarization issues. A new scheme for a hybrid III...

Process for forming a porous silicon member in a crystalline silicon member

Science.gov (United States)

Northrup, M. Allen; Yu, Conrad M.; Raley, Norman F.

1999-01-01

Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gasses in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes. Examples that benefit from specific pore sized porous silicon are chemical/biological filters and thermally-activated flow devices with active or adjacent surfaces such as electrodes or heaters.

"Silicon millefeuille": From a silicon wafer to multiple thin crystalline films in a single step

Science.gov (United States)

Hernández, David; Trifonov, Trifon; Garín, Moisés; Alcubilla, Ramon

2013-04-01

During the last years, many techniques have been developed to obtain thin crystalline films from commercial silicon ingots. Large market applications are foreseen in the photovoltaic field, where important cost reductions are predicted, and also in advanced microelectronics technologies as three-dimensional integration, system on foil, or silicon interposers [Dross et al., Prog. Photovoltaics 20, 770-784 (2012); R. Brendel, Thin Film Crystalline Silicon Solar Cells (Wiley-VCH, Weinheim, Germany 2003); J. N. Burghartz, Ultra-Thin Chip Technology and Applications (Springer Science + Business Media, NY, USA, 2010)]. Existing methods produce "one at a time" silicon layers, once one thin film is obtained, the complete process is repeated to obtain the next layer. Here, we describe a technology that, from a single crystalline silicon wafer, produces a large number of crystalline films with controlled thickness in a single technological step.

Transformational silicon electronics

KAUST Repository

Rojas, Jhonathan Prieto; Sevilla, Galo T.; Ghoneim, Mohamed T.; Inayat, Salman Bin; Ahmed, Sally; Hussain, Aftab M.; Hussain, Muhammad Mustafa

2014-01-01

In today's traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100

Rectangular-cladding silicon slot waveguide with improved nonlinear performance

Science.gov (United States)

Huang, Zengzhi; Huang, Qingzhong; Wang, Yi; Xia, Jinsong

2018-04-01

Silicon slot waveguides have great potential in hybrid silicon integration to realize nonlinear optical applications. We propose a rectangular-cladding hybrid silicon slot waveguide. Simulation result shows that, with a rectangular-cladding, the slot waveguide can be formed by narrower silicon strips, so the two-photon absorption (TPA) loss in silicon is decreased. When the cladding material is a nonlinear polymer, the calculated TPA figure of merit (FOMTPA) is 4.4, close to the value of bulk nonlinear polymer of 5.0. This value confirms the good nonlinear performance of rectangular-cladding silicon slot waveguides.

Materials and integration schemes for above-IC integrated optics

NARCIS (Netherlands)

Schmitz, Jurriaan; Rangarajan, B.; Kovalgin, Alexeij Y.

2014-01-01

A study is presented on silicon oxynitride material for waveguides and germanium-silicon alloys for p-i-n diodes. The materials are manufactured at low, CMOS-backend compatible temperatures, targeting the integration of optical functions on top of CMOS chips. Low-temperature germanium-silicon

Low surface damage dry etched black silicon

DEFF Research Database (Denmark)

Plakhotnyuk, Maksym M.; Gaudig, Maria; Davidsen, Rasmus Schmidt

2017-01-01

Black silicon (bSi) is promising for integration into silicon solar cell fabrication flow due to its excellent light trapping and low reflectance, and a continuously improving passivation. However, intensive ion bombardment during the reactive ion etching used to fabricate bSi induces surface dam...

Silicon Carbide Power Devices and Integrated Circuits

Science.gov (United States)

Lauenstein, Jean-Marie; Casey, Megan; Samsel, Isaak; LaBel, Ken; Chen, Yuan; Ikpe, Stanley; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

2017-01-01

An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

Research Update: Phonon engineering of nanocrystalline silicon thermoelectrics

Directory of Open Access Journals (Sweden)

Junichiro Shiomi

2016-10-01

Full Text Available Nanocrystalline silicon thermoelectrics can be a solution to improve the cost-effectiveness of thermoelectric technology from both material and integration viewpoints. While their figure-of-merit is still developing, recent advances in theoretical/numerical calculations, property measurements, and structural synthesis/fabrication have opened up possibilities to develop the materials based on fundamental physics of phonon transport. Here, this is demonstrated by reviewing a series of works on nanocrystalline silicon materials using calculations of multiscale phonon transport, measurements of interfacial heat conduction, and synthesis from nanoparticles. Integration of these approaches allows us to engineer phonon transport to improve the thermoelectric performance by introducing local silicon-oxide structures.

Formation and properties of the buried isolating silicon-dioxide layer in double-layer “porous silicon-on-insulator” structures

Energy Technology Data Exchange (ETDEWEB)

Bolotov, V. V.; Knyazev, E. V.; Ponomareva, I. V.; Kan, V. E., E-mail: kan@obisp.oscsbras.ru; Davletkildeev, N. A.; Ivlev, K. E.; Roslikov, V. E. [Russian Academy of Sciences, Omsk Scientific Center, Siberian Branch (Russian Federation)

2017-01-15

The oxidation of mesoporous silicon in a double-layer “macroporous silicon–mesoporous silicon” structure is studied. The morphology and dielectric properties of the buried insulating layer are investigated using electron microscopy, ellipsometry, and electrical measurements. Specific defects (so-called spikes) are revealed between the oxidized macropore walls in macroporous silicon and the oxidation crossing fronts in mesoporous silicon. It is found that, at an initial porosity of mesoporous silicon of 60%, three-stage thermal oxidation leads to the formation of buried silicon-dioxide layers with an electric-field breakdown strength of E{sub br} ~ 10{sup 4}–10{sup 5} V/cm. Multilayered “porous silicon-on-insulator” structures are shown to be promising for integrated chemical micro- and nanosensors.

MEMS-based silicon cantilevers with integrated electrothermal heaters for airborne ultrafine particle sensing

Science.gov (United States)

Wasisto, Hutomo Suryo; Merzsch, Stephan; Waag, Andreas; Peiner, Erwin

2013-05-01

The development of low-cost and low-power MEMS-based cantilever sensors for possible application in hand-held airborne ultrafine particle monitors is described in this work. The proposed resonant sensors are realized by silicon bulk micromachining technology with electrothermal excitation, piezoresistive frequency readout, and electrostatic particle collection elements integrated and constructed in the same sensor fabrication process step of boron diffusion. Built-in heating resistor and full Wheatstone bridge are set close to the cantilever clamp end for effective excitation and sensing, respectively, of beam deflection. Meanwhile, the particle collection electrode is located at the cantilever free end. A 300 μm-thick, phosphorus-doped silicon bulk wafer is used instead of silicon-on-insulator (SOI) as the starting material for the sensors to reduce the fabrication costs. To etch and release the cantilevers from the substrate, inductively coupled plasma (ICP) cryogenic dry etching is utilized. By controlling the etching parameters (e.g., temperature, oxygen content, and duration), cantilever structures with thicknesses down to 10 - 20 μm are yielded. In the sensor characterization, the heating resistor is heated and generating thermal waves which induce thermal expansion and further cause mechanical bending strain in the out-of-plane direction. A resonant frequency of 114.08 +/- 0.04 kHz and a quality factor of 1302 +/- 267 are measured in air for a fabricated rectangular cantilever (500x100x13.5 μm3). Owing to its low power consumption of a few milliwatts, this electrothermal cantilever is suitable for replacing the current external piezoelectric stack actuator in the next generation of the miniaturized cantilever-based nanoparticle detector (CANTOR).

Surface thiolation of silicon for antifouling application.

Science.gov (United States)

Zhang, Xiaoning; Gao, Pei; Hollimon, Valerie; Brodus, DaShan; Johnson, Arion; Hu, Hongmei

2018-02-07

Thiol groups grafted silicon surface was prepared as previously described. 1H,1H,2H,2H-perfluorodecanethiol (PFDT) molecules were then immobilized on such a surface through disulfide bonds formation. To investigate the contribution of PFDT coating to antifouling, the adhesion behaviors of Botryococcus braunii (B. braunii) and Escherichia coli (E. coli) were studied through biofouling assays in the laboratory. The representative microscope images suggest reduced B. braunii and E. coli accumulation densities on PFDT integrated silicon substrate. However, the antifouling performance of PFDT integrated silicon substrate decreased over time. By incubating the aged substrate in 10 mM TCEP·HCl solution for 1 h, the fouled PFDT coating could be removed as the disulfide bonds were cleaved, resulting in reduced absorption of algal cells and exposure of non-fouled silicon substrate surface. Our results indicate that the thiol-terminated substrate can be potentially useful for restoring the fouled surface, as well as maximizing the effective usage of the substrate.

Silicon Nanowires for All-Optical Signal Processing in Optical Communication

DEFF Research Database (Denmark)

Pu, Minhao; Hu, Hao; Ji, Hua

2012-01-01

Silicon (Si), the second most abundant element on earth, has dominated in microelectronics for many decades. It can also be used for photonic devices due to its transparency in the range of optical telecom wavelengths which will enable a platform for a monolithic integration of optics...... and microelectronics. Silicon photonic nanowire waveguides fabricated on silicon-on-insulator (SOI) substrates are crucial elements in nano-photonic integrated circuits. The strong light confinement in nanowires induced by high index contrast SOI material enhances the nonlinear effects in the silicon nanowire core...... such as four-wave mixing (FWM) which is an imperative process for optical signal processing. Since the current mature silicon fabrication technology enables a precise dimension control on nanowires, dispersion engineering can be performed by tailoring nanowire dimensions to realize an efficient nonlinear...

Fabrication of detectors and transistors on high-resistivity silicon

International Nuclear Information System (INIS)

Holland, S.

1988-06-01

A new process for the fabrication of silicon p-i-n diode radiation detectors is described. The utilization of backside gettering in the fabrication process results in the actual physical removal of detrimental impurities from critical device regions. This reduces the sensitivity of detector properties to processing variables while yielding low diode reverse-leakage currents. In addition, gettering permits the use of processing temperatures compatible with integrated-circuit fabrication. P-channel MOSFETs and silicon p-i-n diodes have been fabricated simultaneously on 10 kΩ/centerreverse arrowdot/cm silicon using conventional integrated-circuit processing techniques. 25 refs., 5 figs

Optimization and validation of highly selective microfluidic integrated silicon nanowire chemical sensor

Science.gov (United States)

Ehfaed, Nuri. A. K. H.; Bathmanathan, Shillan A. L.; Dhahi, Th S.; Adam, Tijjani; Hashim, Uda; Noriman, N. Z.

2017-09-01

The study proposed characterization and optimization of silicon nanosensor for specific detection of heavy metal. The sensor was fabricated in-house and conventional photolithography coupled with size reduction via dry etching process in an oxidation furnace. Prior to heavy metal heavy metal detection, the capability to aqueous sample was determined utilizing serial DI water at various. The sensor surface was surface modified with Organofunctional alkoxysilanes (3-aminopropyl) triethoxysilane (APTES) to create molecular binding chemistry. This has allowed interaction between heavy metals being measured and the sensor component resulting in increasing the current being measured. Due to its, excellent detection capabilities, this sensor was able to identify different group heavy metal species. The device was further integrated with sub-50 µm for chemical delivery.

Impurity engineering of Czochralski silicon used for ultra large-scaled-integrated circuits

Science.gov (United States)

Yang, Deren; Chen, Jiahe; Ma, Xiangyang; Que, Duanlin

2009-01-01

Impurities in Czochralski silicon (Cz-Si) used for ultra large-scaled-integrated (ULSI) circuits have been believed to deteriorate the performance of devices. In this paper, a review of the recent processes from our investigation on internal gettering in Cz-Si wafers which were doped with nitrogen, germanium and/or high content of carbon is presented. It has been suggested that those impurities enhance oxygen precipitation, and create both denser bulk microdefects and enough denuded zone with the desirable width, which is benefit of the internal gettering of metal contamination. Based on the experimental facts, a potential mechanism of impurity doping on the internal gettering structure is interpreted and, a new concept of 'impurity engineering' for Cz-Si used for ULSI is proposed.

Additive advantage in characteristics of MIMCAPs on flexible silicon (100) fabric with release-first process

KAUST Repository

Ghoneim, Mohamed T.

2013-11-20

We report the inherent increase in capacitance per unit planar area of state-of-the art high-κ integrated metal/insulator/metal capacitors (MIMCAPs) fabricated on flexible silicon fabric with release-first process. We methodically study and show that our approach to transform bulk silicon (100) into a flexible fabric adds an inherent advantage of enabling higher integration density dynamic random access memory (DRAM) on the same chip area. Our approach is to release an ultra-thin silicon (100) fabric (25 μm thick) from the bulk silicon wafer, then build MIMCAPs using sputtered aluminium electrodes and successive atomic layer depositions (ALD) without break-ing the vacuum of a high-κ aluminium oxide sandwiched between two tantalum nitride layers. This result shows that we can obtain flexible electronics on silicon without sacrificing the high density integration aspects and also utilize the non-planar geometry associated with fabrication process to obtain a higher integration density compared to bulk silicon integration due to an increased normalized capacitance per unit planar area. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Silicon-integrated thin-film structure for electro-optic applications

Science.gov (United States)

McKee, Rodney A.; Walker, Frederick Joseph

2000-01-01

A crystalline thin-film structure suited for use in any of an number of electro-optic applications, such as a phase modulator or a component of an interferometer, includes a semiconductor substrate of silicon and a ferroelectric, optically-clear thin film of the perovskite BaTiO.sub.3 overlying the surface of the silicon substrate. The BaTiO.sub.3 thin film is characterized in that substantially all of the dipole moments associated with the ferroelectric film are arranged substantially parallel to the surface of the substrate to enhance the electro-optic qualities of the film.

Towards Cost-Effective Crystalline Silicon Based Flexible Solar Cells: Integration Strategy by Rational Design of Materials, Process, and Devices

KAUST Repository

Bahabry, Rabab R.

2017-11-30

The solar cells market has an annual growth of more than 30 percent over the past 15 years. At the same time, the cost of the solar modules diminished to meet both of the rapid global demand and the technological improvements. In particular for the crystalline silicon solar cells, the workhorse of this technology. The objective of this doctoral thesis is enhancing the efficiency of c-Si solar cells while exploring the cost reduction via innovative techniques. Contact metallization and ultra-flexible wafer based c-Si solar cells are the main areas under investigation. First, Silicon-based solar cells typically utilize screen printed Silver (Ag) metal contacts which affect the optimal electrical performance. To date, metal silicide-based ohmic contacts are occasionally used for the front contact grid lines. In this work, investigation of the microstructure and the electrical characteristics of nickel monosilicide (NiSi) ohmic contacts on the rear side of c-Si solar cells has been carried out. Significant enhancement in the fill factor leading to increasing the total power conversion efficiency is observed. Second, advanced classes of modern application require a new generation of versatile solar cells showcasing extreme mechanical resilience. However, silicon is a brittle material with a fracture strains <1%. Highly flexible Si-based solar cells are available in the form thin films which seem to be disadvantageous over thick Si solar cells due to the reduction of the optical absorption with less active Si material. Here, a complementary metal oxide semiconductor (CMOS) technology based integration strategy is designed where corrugation architecture to enable an ultra-flexible solar cell module from bulk mono-crystalline silicon solar wafer with 17% efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness and achieves flexibility via interdigitated back contacts. These cells

Efficient generation of single and entangled photons on a silicon photonic integrated chip

International Nuclear Information System (INIS)

Mower, Jacob; Englund, Dirk

2011-01-01

We present a protocol for generating on-demand, indistinguishable single photons on a silicon photonic integrated chip. The source is a time-multiplexed spontaneous parametric down-conversion element that allows optimization of single-photon versus multiphoton emission while realizing high output rate and indistinguishability. We minimize both the scaling of active elements and the scaling of active element loss with multiplexing. We then discuss detection strategies and data processing to further optimize the procedure. We simulate an improvement in single-photon-generation efficiency over previous time-multiplexing protocols, assuming existing fabrication capabilities. We then apply this system to generate heralded Bell states. The generation efficiency of both nonclassical states could be increased substantially with improved fabrication procedures.

Effect of preliminary annealing of silicon substrates on the spectral sensitivity of photodetectors in bipolar integrated circuits

International Nuclear Information System (INIS)

Blynskij, V.I.; Bozhatkin, O.A.; Golub, E.S.; Lemeshevskaya, A.M.; Shvedov, S.V.

2010-01-01

We examine the results of an effect of preliminary annealing on the spectral sensitivity of photodetectors in bipolar integrated circuits, formed in silicon grown by the Czochralski method. We demonstrate the possibility of substantially improving the sensitivity of photodetectors in the infrared region of the spectrum with twostep annealing. The observed effect is explained by participation of oxidation in the gettering process, where oxidation precedes formation of a buried n + layer in the substrate. (authors)

Material synthesis for silicon integrated-circuit applications using ion implantation

Science.gov (United States)

Lu, Xiang

As devices scale down into deep sub-microns, the investment cost and complexity to develop more sophisticated device technologies have increased substantially. There are some alternative potential technologies, such as silicon-on-insulator (SOI) and SiGe alloys, that can help sustain this staggering IC technology growth at a lower cost. Surface SiGe and SiGeC alloys with germanium peak composition up to 16 atomic percent are formed using high-dose ion implantation and subsequent solid phase epitaxial growth. RBS channeling spectra and cross-sectional TEM studies show that high quality SiGe and SiGeC crystals with 8 atomic percent germanium concentration are formed at the silicon surface. Extended defects are formed in SiGe and SiGeC with 16 atomic percent germanium concentration. X-ray diffraction experiments confirm that carbon reduces the lattice strain in SiGe alloys but without significant crystal quality improvement as detected by RBS channeling spectra and XTEM observations. Separation by plasma implantation of oxygen (SPIMOX) is an economical method for SOI wafer fabrication. This process employs plasma immersion ion implantation (PIII) for the implantation of oxygen ions. The implantation rate for Pm is considerably higher than that of conventional implantation. The feasibility of SPIMOX has been demonstrated with successful fabrication of SOI structures implementing this process. Secondary ion mass spectrometry (SIMS) analysis and cross-sectional transmission electron microscopy (XTEM) micrographs of the SPIMOX sample show continuous buried oxide under single crystal overlayer with sharp silicon/oxide interfaces. The operational phase space of implantation condition, oxygen dose and annealing requirement has been identified. Physical mechanisms of hydrogen induced silicon surface layer cleavage have been investigated using a combination of microscopy and hydrogen profiling techniques. The evolution of the silicon cleavage phenomenon is recorded by a series

Thin-film silicon solar cell technology

Czech Academy of Sciences Publication Activity Database

Shah, A. V.; Schade, H.; Vaněček, Milan; Meier, J.; Vallat-Sauvain, E.; Wyrsch, N.; Kroll, U.; Droz, C.; Bailat, J.

2004-01-01

Roč. 12, - (2004), s. 113-142 ISSN 1062-7995 R&D Projects: GA MŽP SN/320/11/03 Institutional research plan: CEZ:AV0Z1010914 Keywords : thin-film silicon modules * hydrogenerated amorphous silicon(a-Si:H) * hydrogenerated microcrystalline (ćc-Si:H) * transparent conductive oxydes(TCOs) * building-integrated photovoltaics(BIPV) Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 1.196, year: 2004

Video monitoring system for enriched uranium casting furnaces

International Nuclear Information System (INIS)

Turner, P.C.

1978-03-01

A closed-circuit television (CCTV) system was developed to upgrade the remote-viewing capability on two oralloy (highly enriched uranium) casting furnaces in the Y-12 Plant. A silicon vidicon CCTV camera with a remotely controlled lens and infrared filtering was provided to yield a good-quality video presentation of the furnace crucible as the oralloy material is heated from 25 to 1300 0 C. Existing tube-type CCTV monochrome monitors were replaced with solid-state monitors to increase the system reliability

Integration Science and Technology of Silicon-Based Ceramics and Composites:Technical Challenges and Opportunities

Science.gov (United States)

Singh, M.

2013-01-01

Ceramic integration technologies enable hierarchical design and manufacturing of intricate ceramic and composite parts starting with geometrically simpler units that are subsequently joined to themselves and/or to metals to create components with progressively higher levels of complexity and functionality. However, for the development of robust and reliable integrated systems with optimum performance for high temperature applications, detailed understanding of various thermochemical and thermomechanical factors is critical. Different technical approaches are required for the integration of ceramic to ceramic and ceramic to metal systems. Active metal brazing, in particular, is a simple and cost-effective method to integrate ceramic to metallic components. Active braze alloys usually contain a reactive filler metal (e.g., Ti, Cr, V, Hf etc) that promotes wettability and spreading by inducing chemical reactions with the ceramics and composites. In this presentation, various examples of brazing of silicon nitride to themselves and to metallic systems are presented. Other examples of joining of ceramic composites (C/SiC and SiC/SiC) using ceramic interlayers and the resulting microstructures are also presented. Thermomechanical characterization of joints is presented for both types of systems. In addition, various challenges and opportunities in design, fabrication, and testing of integrated similar (ceramic-ceramic) and dissimilar (ceramic-metal) material systems will be discussed. Potential opportunities and need for the development of innovative design philosophies, approaches, and integrated system testing under simulated application conditions will also be presented.

Strong quantum-confined stark effect in germanium quantum-well structures on silicon

International Nuclear Information System (INIS)

Kuo, Y.; Lee, Y. K.; Gei, Y.; Ren, S; Roth, J. E.; Miller, D. A.; Harris, J. S.

2006-01-01

Silicon is the dominant semiconductor for electronics, but there is now a growing need to integrate such component with optoelectronics for telecommunications and computer interconnections. Silicon-based optical modulators have recently been successfully demonstrated but because the light modulation mechanisms in silicon are relatively weak, long (for example, several millimeters) devices or sophisticated high-quality-factor resonators have been necessary. Thin quantum-well structures made from III-V semiconductors such as GaAs, InP and their alloys exhibit the much stronger Quantum-Confined Stark Effect (QCSE) mechanism, which allows modulator structures with only micrometers of optical path length. Such III-V materials are unfortunately difficult to integrate with silicon electronic devices. Germanium is routinely integrated with silicon in electronics, but previous silicon-germanium structures have also not shown strong modulation effects. Here we report the discovery of the QCSE, at room temperature, in thin germanium quantum-well structures grown on silicon. The QCSE here has strengths comparable to that in III-V materials. Its clarity and strength are particularly surprising because germanium is an indirect gap semiconductor, such semiconductors often display much weak optical effects than direct gap materials (such as the III-V materials typically used for optoelectronics). This discovery is very promising for small, high-speed, low-power optical output devices fully compatible with silicon electronics manufacture. (author)

Neuromorphic Silicon Neuron Circuits

Science.gov (United States)

Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

2011-01-01

Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

Neuromorphic silicon neuron circuits

Directory of Open Access Journals (Sweden)

Giacomo eIndiveri

2011-05-01

Full Text Available Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance based Hodgkin-Huxley models to bi-dimensional generalized adaptive Integrate and Fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.

Thermal performances of ETFE cushion roof integrated amorphous silicon photovoltaic

International Nuclear Information System (INIS)

Hu, Jianhui; Chen, Wujun; Qiu, Zhenyu; Zhao, Bing; Zhou, Jinyu; Qu, Yegao

2015-01-01

Highlights: • Thermal performances of a three layer ETFE cushion integrated a-Si PV is evaluated. • Temperature of a-Si PV obviously affects temperature field and temperature boundary. • The maximum temperature difference of 3.4 K between measured and numerical results. • Main transport mechanisms in upper and lower chambers are convection and conduction. • Heat transfer coefficients of this roof are less than those of other ETFE cushion roofs. - Abstract: Thermal performances of the ETFE cushion roof integrated amorphous silicon photovoltaic (a-Si PV) are essential to estimate building performances, such as temperature distribution and heat transfer coefficient. To investigate these thermal performances, an experimental mock-up composed of a-Si PV and a three-layer ETFE cushion roof was built and the experiment was carried out under summer sunny condition. Meanwhile, numerical model with real boundary conditions was performed in this paper. The experimental results show that the temperature sequence of the three layers was the middle, top and bottom layer and that the PV temperature caused by solar irradiance was 353.8 K. This gives evidence that the PV has a significant effect on the temperature distribution. The experimental temperature was in good agreement with the corresponding location of the numerical temperature since the maximum temperature difference was only 3.4 K. Therefore, the numerical results were justified and then used to analyze the airflow characteristics and calculate the thermal performances. For the airflow characteristics, it is found that the temperature distribution was not uniform and the main transport mechanisms in the upper and lower chambers formed by the three layers were the convection and conduction, respectively. For the thermal performances, the surface convective heat transfer coefficients were obtained, which have validated that thermal performances of the three-layer ETFE cushion integrated a-Si PV are better than

Position-controlled epitaxial III-V nanowires on silicon

NARCIS (Netherlands)

Roest, A.L.; Verheijen, M.A.; Wunnicke, O.; Serafin, S.N.; Wondergem, H.J.; Bakkers, E.P.A.M.

2006-01-01

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction

Passive technologies for future large-scale photonic integrated circuits on silicon: polarization handling, light non-reciprocity and loss reduction

Directory of Open Access Journals (Sweden)

Daoxin Dai

2012-03-01

Full Text Available Silicon-based large-scale photonic integrated circuits are becoming important, due to the need for higher complexity and lower cost for optical transmitters, receivers and optical buffers. In this paper, passive technologies for large-scale photonic integrated circuits are described, including polarization handling, light non-reciprocity and loss reduction. The design rule for polarization beam splitters based on asymmetrical directional couplers is summarized and several novel designs for ultra-short polarization beam splitters are reviewed. A novel concept for realizing a polarization splitter–rotator is presented with a very simple fabrication process. Realization of silicon-based light non-reciprocity devices (e.g., optical isolator, which is very important for transmitters to avoid sensitivity to reflections, is also demonstrated with the help of magneto-optical material by the bonding technology. Low-loss waveguides are another important technology for large-scale photonic integrated circuits. Ultra-low loss optical waveguides are achieved by designing a Si3N4 core with a very high aspect ratio. The loss is reduced further to <0.1 dB m−1 with an improved fabrication process incorporating a high-quality thermal oxide upper cladding by means of wafer bonding. With the developed ultra-low loss Si3N4 optical waveguides, some devices are also demonstrated, including ultra-high-Q ring resonators, low-loss arrayed-waveguide grating (demultiplexers, and high-extinction-ratio polarizers.

Synthesis, Characterization and Optical Constants of Silicon Oxycarbide

Directory of Open Access Journals (Sweden)

Memon Faisal Ahmed

2017-01-01

Full Text Available High refractive index glasses are preferred in integrated photonics applications to realize higher integration scale of passive devices. With a refractive index that can be tuned between SiO2 (1.45 and a-SiC (3.2, silicon oxycarbide SiOC offers this flexibility. In the present work, silicon oxycarbide thin films from 0.1 – 2.0 μm thickness are synthesized by reactive radio frequency magnetron sputtering a silicon carbide SiC target in a controlled argon and oxygen environment. The refractive index n and material extinction coefficient k of the silicon oxycarbide films are acquired with variable angle spectroscopic ellipsometry over the UV-Vis-NIR wavelength range. Keeping argon and oxygen gases in the constant ratio, the refractive index n is found in the range from 1.41 to 1.93 at 600 nm which is almost linearly dependent on RF power of sputtering. The material extinction coefficient k has been estimated to be less than 10-4 for the deposited silicon oxycarbide films in the visible and near-infrared wavelength regions. Morphological and structural characterizations with SEM and XRD confirms the amorphous phase of the SiOC films.

Ultra-fast photon counting with a passive quenching silicon photomultiplier in the charge integration regime

Science.gov (United States)

Zhang, Guoqing; Lina, Liu

2018-02-01

An ultra-fast photon counting method is proposed based on the charge integration of output electrical pulses of passive quenching silicon photomultipliers (SiPMs). The results of the numerical analysis with actual parameters of SiPMs show that the maximum photon counting rate of a state-of-art passive quenching SiPM can reach ~THz levels which is much larger than that of the existing photon counting devices. The experimental procedure is proposed based on this method. This photon counting regime of SiPMs is promising in many fields such as large dynamic light power detection.

Extreme-Environment Silicon-Carbide (SiC) Wireless Sensor Suite

Science.gov (United States)

Yang, Jie

2015-01-01

Phase II objectives: Develop an integrated silicon-carbide wireless sensor suite capable of in situ measurements of critical characteristics of NTP engine; Compose silicon-carbide wireless sensor suite of: Extreme-environment sensors center, Dedicated high-temperature (450 deg C) silicon-carbide electronics that provide power and signal conditioning capabilities as well as radio frequency modulation and wireless data transmission capabilities center, An onboard energy harvesting system as a power source.

Stretchable and foldable silicon-based electronics

KAUST Repository

Cavazos Sepulveda, Adrian Cesar

2017-03-30

Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

Stretchable and foldable silicon-based electronics

KAUST Repository

Cavazos Sepulveda, Adrian Cesar; Diaz Cordero, M. S.; Carreno, Armando Arpys Arevalo; Nassar, Joanna M.; Hussain, Muhammad Mustafa

2017-01-01

Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

Basic opto-electronics on silicon for sensor applications

NARCIS (Netherlands)

Joppe, J.L.; Bekman, H.H.P.Th.; de Krijger, A.J.T.; Albers, H.; Chalmers, J.; Chalmers, J.D.; Holleman, J.; Ikkink, T.J.; Ikkink, T.; van Kranenburg, H.; Zhou, M.-J.; Zhou, Ming-Jiang; Lambeck, Paul

1994-01-01

A general platform for integrated opto-electronic sensor systems on silicon is proposed. The system is based on a hybridly integrated semiconductor laser, ZnO optical waveguides and monolithic photodiodes and electronic circuiry.

Nonclassical light sources for silicon photonics

Science.gov (United States)

Bajoni, Daniele; Galli, Matteo

2017-09-01

Quantum photonics has recently attracted a lot of attention for its disruptive potential in emerging technologies like quantum cryptography, quantum communication and quantum computing. Driven by the impressive development in nanofabrication technologies and nanoscale engineering, silicon photonics has rapidly become the platform of choice for on-chip integration of high performing photonic devices, now extending their functionalities towards quantum-based applications. Focusing on quantum Information Technology (qIT) as a key application area, we review recent progress in integrated silicon-based sources of nonclassical states of light. We assess the state of the art in this growing field and highlight the challenges that need to be overcome to make quantum photonics a reliable and widespread technology.

Prolonged silicon carbide integrated circuit operation in Venus surface atmospheric conditions

Directory of Open Access Journals (Sweden)

Philip G. Neudeck

2016-12-01

Full Text Available The prolonged operation of semiconductor integrated circuits (ICs needed for long-duration exploration of the surface of Venus has proven insurmountably challenging to date due to the ∼ 460 °C, ∼ 9.4 MPa caustic environment. Past and planned Venus landers have been limited to a few hours of surface operation, even when IC electronics needed for basic lander operation are protected with heavily cumbersome pressure vessels and cooling measures. Here we demonstrate vastly longer (weeks electrical operation of two silicon carbide (4H-SiC junction field effect transistor (JFET ring oscillator ICs tested with chips directly exposed (no cooling and no protective chip packaging to a high-fidelity physical and chemical reproduction of Venus’ surface atmosphere. This represents more than 100-fold extension of demonstrated Venus environment electronics durability. With further technology maturation, such SiC IC electronics could drastically improve Venus lander designs and mission concepts, fundamentally enabling long-duration enhanced missions to the surface of Venus.

3D silicon neural probe with integrated optical fibers for optogenetic modulation.

Science.gov (United States)

Kim, Eric G R; Tu, Hongen; Luo, Hao; Liu, Bin; Bao, Shaowen; Zhang, Jinsheng; Xu, Yong

2015-07-21

Optogenetics is a powerful modality for neural modulation that can be useful for a wide array of biomedical studies. Penetrating microelectrode arrays provide a means of recording neural signals with high spatial resolution. It is highly desirable to integrate optics with neural probes to allow for functional study of neural tissue by optogenetics. In this paper, we report the development of a novel 3D neural probe coupled simply and robustly to optical fibers using a hollow parylene tube structure. The device shanks are hollow tubes with rigid silicon tips, allowing the insertion and encasement of optical fibers within the shanks. The position of the fiber tip can be precisely controlled relative to the electrodes on the shank by inherent design features. Preliminary in vivo rat studies indicate that these devices are capable of optogenetic modulation simultaneously with 3D neural signal recording.

Integrated reconfigurable microring based silicon WDM receiver for on-chip optical interconnect

International Nuclear Information System (INIS)

Shen, Ao; Yang, Long-Zhi; Dai, Ting-Ge; Hao, Yin-Lei; Jiang, Xiao-Qing; Yang, Jian-Yi; Qiu, Chen

2015-01-01

We demonstrate an integrated reconfigurable wavelength division multiplexing receiver on the silicon-on-insulator (SOI) platform. The receiver is composed of a 1 × 8 thermally tunable microring resonator filter and Ge–Si photodetectors. With low thermal tuning powers the channel allocation of the receiver can be reconfigured with high accuracy and flexibility. The thermal tuning efficiency is approximately 8 mW nm −1 . We show eight-channel configurations with channel spacing of 100 GHz and 50 GHz and a configuration in which all eight channels cover an entire free spectral range of the ring with uniform channel spacing of 1.2 nm. Each channel can receive high-quality signals with a data rate of up to 13.5 Gb s −1 ; thus an aggregate data rate higher than 100 Gb s −1 can be achieved. (paper)

Controlling the flow of light with silicon nanostructures

International Nuclear Information System (INIS)

Park, W

2010-01-01

Silicon is an important material for integrated photonics applications. High refractive index and transparency in the infrared region makes it an ideal platform to implement nanostructures for novel optical devices. We fabricated silicon photonic crystals and experimentally demonstrated negative refraction and self-collimation. We also used heterodyne near-field scanning optical microscope to directly visualize the anomalous wavefronts. When the periodicity is much smaller than wavelength, silicon photonic crystal can be described by the effective medium theory. By engineering effective refractive index with silicon nanorod size, we demonstrated an all-dielectric cloak structure which can hide objects in front of a highly reflecting plane. The work discussed in this review shows the powerful design flexibility and versatility of silicon nanostructures

Structural Integration of Silicon Solar Cells and Lithium-ion Batteries Using Printed Electronics

Science.gov (United States)

Kang, Jin Sung

Inkjet printing of electrode using copper nanoparticle ink is presented. Electrode was printed on a flexible glass epoxy composite substrate using drop on demand piezoelectric dispenser and was sintered at 200°C in N 2 gas condition. The printed electrodes were made with various widths and thicknesses. Surface morphology of electrode was analyzed using scanning electron microscope (SEM) and atomic force microscope (AFM). Reliable dimensions for printed electronics were found from this study. Single-crystalline silicon solar cells were tested under four-point bending to find the feasibility of directly integrating them onto a carbon fiber/epoxy composite laminate. These solar cells were not able to withstand 0.2% strain. On the other hand, thin-film amorphous silicon solar cells were subjected to flexural fatigue loadings. The current density-voltage curves were analyzed at different cycles, and there was no noticeable degradation on its performance up to 100 cycles. A multifunctional composite laminate which can harvest and store solar energy was fabricated using printed electrodes. The integrated printed circuit board (PCB) was co-cured with a carbon/epoxy composite laminate by the vacuum bag molding process in an autoclave; an amorphous silicon solar cell and a thin-film solid state lithium-ion (Li-ion) battery were adhesively joined and electrically connected to a thin flexible PCB; and then the passive components such as resistors and diodes were electrically connected to the printed circuit board by silver pasting. Since a thin-film solid state Li-ion battery was not able to withstand tensile strain above 0.4%, thin Li-ion polymer batteries were tested under various mechanical loadings and environmental conditions to find the feasibility of using the polymer batteries for our multifunctional purpose. It was found that the Li-ion polymer batteries were stable under pressure and tensile loading without any noticeable degradation on its charge and discharge

A silicon integrated micro nano-positioning XY-stage for nano-manipulation

International Nuclear Information System (INIS)

Sun Lining; Wang Jiachou; Rong Weibin; Li Xinxin; Bao Haifei

2008-01-01

An integrated micro XY-stage with a 2 × 2 mm 2 movable table is designed and fabricated for application in nanometer-scale operation and nanometric positioning precision. The device integrates the functions of both actuating and sensing in a monolithic chip and is mainly composed of a silicon-based XY-stage, comb-drive actuator and a displacement sensor, which are developed by using double-sided bulk-micromachining technology. The high-aspect-ratio comb-driven XY-stage is achieved by deep reactive ion etching (DRIE) on both sides of the wafer. The displacement sensor is formed on four vertical sidewall surface piezoresistors with a full Wheatstone bridge circuit, where a novel fabrication process of a vertical sidewall surface piezoresistor is proposed. Comprehensive design and analysis of the comb actuator, the piezoresistive displacement sensor and the XY-stage are given in full detail, and the experimental results verify the design and fabrication of the device. The final realization of the device shows that the sensitivity of the fabricated piezoresistive sensors is better than 1.17 mV µm −1 without amplification, and the linearity is better than 0.814%. Under 28.5 V driving voltage, a ±10 µm single-axis displacement is measured without crosstalk and the resonant frequency is measured at 983 Hz in air

Microelectromechanical pump utilizing porous silicon

Science.gov (United States)

Lantz, Jeffrey W [Albuquerque, NM; Stalford, Harold L [Norman, OK

2011-07-19

A microelectromechanical (MEM) pump is disclosed which includes a porous silicon region sandwiched between an inlet chamber and an outlet chamber. The porous silicon region is formed in a silicon substrate and contains a number of pores extending between the inlet and outlet chambers, with each pore having a cross-section dimension about equal to or smaller than a mean free path of a gas being pumped. A thermal gradient is provided along the length of each pore by a heat source which can be an electrical resistance heater or an integrated circuit (IC). A channel can be formed through the silicon substrate so that inlet and outlet ports can be formed on the same side of the substrate, or so that multiple MEM pumps can be connected in series to form a multi-stage MEM pump. The MEM pump has applications for use in gas-phase MEM chemical analysis systems, and can also be used for passive cooling of ICs.

Integrated Microfluidic Gas Sensors for Water Monitoring

Science.gov (United States)

Zhu, L.; Sniadecki, N.; DeVoe, D. L.; Beamesderfer, M.; Semancik, S.; DeVoe, D. L.

2003-01-01

A silicon-based microhotplate tin oxide (SnO2) gas sensor integrated into a polymer-based microfluidic system for monitoring of contaminants in water systems is presented. This device is designed to sample a water source, control the sample vapor pressure within a microchannel using integrated resistive heaters, and direct the vapor past the integrated gas sensor for analysis. The sensor platform takes advantage of novel technology allowing direct integration of discrete silicon chips into a larger polymer microfluidic substrate, including seamless fluidic and electrical interconnects between the substrate and silicon chip.

Silicon oxynitride based photonics

NARCIS (Netherlands)

Worhoff, Kerstin; Klein, E.J.; Hussein, M.G.; Driessen, A.; Marciniak, M.; Jaworski, M.; Zdanowicz, M.

2008-01-01

Silicon oxynitride is a very attractive material for integrated optics. Besides possessing excellent optical properties it can be deposited with refractive indices varying over a wide range by tuning the material composition. In this contribution we will summarize the key properties of this material

Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

Science.gov (United States)

Zhang, Liping; Sawchuk, Alexander A.

2001-12-01

We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

High-efficiency power transfer for silicon-based photonic devices

Science.gov (United States)

Son, Gyeongho; Yu, Kyoungsik

2018-02-01

We demonstrate an efficient coupling of guided light of 1550 nm from a standard single-mode optical fiber to a silicon waveguide using the finite-difference time-domain method and propose a fabrication method of tapered optical fibers for efficient power transfer to silicon-based photonic integrated circuits. Adiabatically-varying fiber core diameters with a small tapering angle can be obtained using the tube etching method with hydrofluoric acid and standard single-mode fibers covered by plastic jackets. The optical power transmission of the fundamental HE11 and TE-like modes between the fiber tapers and the inversely-tapered silicon waveguides was calculated with the finite-difference time-domain method to be more than 99% at a wavelength of 1550 nm. The proposed method for adiabatic fiber tapering can be applied in quantum optics, silicon-based photonic integrated circuits, and nanophotonics. Furthermore, efficient coupling within the telecommunication C-band is a promising approach for quantum networks in the future.

Broadband wavelength conversion in hydrogenated amorphous silicon waveguide with silicon nitride layer

Science.gov (United States)

Wang, Jiang; Li, Yongfang; Wang, Zhaolu; Han, Jing; Huang, Nan; Liu, Hongjun

2018-01-01

Broadband wavelength conversion based on degenerate four-wave mixing is theoretically investigated in a hydrogenated amorphous silicon (a-Si:H) waveguide with silicon nitride inter-cladding layer (a-Si:HN). We have found that enhancement of the non-linear effect of a-Si:H waveguide nitride intermediate layer facilitates broadband wavelength conversion. Conversion bandwidth of 490 nm and conversion efficiency of 11.4 dB were achieved in a numerical simulation of a 4 mm-long a-Si:HN waveguide under 1.55 μm continuous wave pumping. This broadband continuous-wave wavelength converter has potential applications in photonic networks, a type of readily manufactured low-cost highly integrated optical circuits.

Silicon Nitride Photonic Integration Platforms for Visible, Near-Infrared and Mid-Infrared Applications

Science.gov (United States)

Micó, Gloria; Pastor, Daniel; Pérez, Daniel; Doménech, José David; Fernández, Juan; Baños, Rocío; Alemany, Rubén; Sánchez, Ana M.; Cirera, Josep M.; Mas, Roser

2017-01-01

Silicon nitride photonics is on the rise owing to the broadband nature of the material, allowing applications of biophotonics, tele/datacom, optical signal processing and sensing, from visible, through near to mid-infrared wavelengths. In this paper, a review of the state of the art of silicon nitride strip waveguide platforms is provided, alongside the experimental results on the development of a versatile 300 nm guiding film height silicon nitride platform. PMID:28895906

Position-controlled epitaxial III-V nanowires on silicon

Energy Technology Data Exchange (ETDEWEB)

Roest, Aarnoud L; Verheijen, Marcel A; Wunnicke, Olaf; Serafin, Stacey; Wondergem, Harry; Bakkers, Erik P A M [Philips Research Laboratories, Professor Holstlaan 4, 5656 AA Eindhoven (Netherlands); Kavli Institute of NanoScience, Delft University of Technology, PO Box 5046, 2600 GA Delft (Netherlands)

2006-06-14

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction pole figures and cross-sectional transmission electron microscopy. We show preliminary results of two-terminal electrical measurements of III-V nanowires grown on silicon. E-beam lithography was used to predefine the position of the nanowires.

Position-controlled epitaxial III-V nanowires on silicon

International Nuclear Information System (INIS)

Roest, Aarnoud L; Verheijen, Marcel A; Wunnicke, Olaf; Serafin, Stacey; Wondergem, Harry; Bakkers, Erik P A M

2006-01-01

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction pole figures and cross-sectional transmission electron microscopy. We show preliminary results of two-terminal electrical measurements of III-V nanowires grown on silicon. E-beam lithography was used to predefine the position of the nanowires

Silicon-Nitride-based Integrated Optofluidic Biochemical Sensors using a Coupled-Resonator Optical Waveguide

Directory of Open Access Journals (Sweden)

Jiawei eWANG

2015-04-01

Full Text Available Silicon nitride (SiN is a promising material platform for integrating photonic components and microfluidic channels on a chip for label-free, optical biochemical sensing applications in the visible to near-infrared wavelengths. The chip-scale SiN-based optofluidic sensors can be compact due to a relatively high refractive index contrast between SiN and the fluidic medium, and low-cost due to the complementary metal-oxide-semiconductor (CMOS-compatible fabrication process. Here, we demonstrate SiN-based integrated optofluidic biochemical sensors using a coupled-resonator optical waveguide (CROW in the visible wavelengths. The working principle is based on imaging in the far field the out-of-plane elastic-light-scattering patterns of the CROW sensor at a fixed probe wavelength. We correlate the imaged pattern with reference patterns at the CROW eigenstates. Our sensing algorithm maps the correlation coefficients of the imaged pattern with a library of calibrated correlation coefficients to extract a minute change in the cladding refractive index. Given a calibrated CROW, our sensing mechanism in the spatial domain only requires a fixed-wavelength laser in the visible wavelengths as a light source, with the probe wavelength located within the CROW transmission band, and a silicon digital charge-coupled device (CCD / CMOS camera for recording the light scattering patterns. This is in sharp contrast with the conventional optical microcavity-based sensing methods that impose a strict requirement of spectral alignment with a high-quality cavity resonance using a wavelength-tunable laser. Our experimental results using a SiN CROW sensor with eight coupled microrings in the 680nm wavelength reveal a cladding refractive index change of ~1.3 × 10^-4 refractive index unit (RIU, with an average sensitivity of ~281 ± 271 RIU-1 and a noise-equivalent detection limit (NEDL of 1.8 ×10^-8 RIU ~ 1.0 ×10^-4 RIU across the CROW bandwidth of ~1 nm.

Nonlinear optical interactions in silicon waveguides

Directory of Open Access Journals (Sweden)

Kuyken B.

2017-03-01

Full Text Available The strong nonlinear response of silicon photonic nanowire waveguides allows for the integration of nonlinear optical functions on a chip. However, the detrimental nonlinear optical absorption in silicon at telecom wavelengths limits the efficiency of many such experiments. In this review, several approaches are proposed and demonstrated to overcome this fundamental issue. By using the proposed methods, we demonstrate amongst others supercontinuum generation, frequency comb generation, a parametric optical amplifier, and a parametric optical oscillator.

Neuromorphic photonic networks using silicon photonic weight banks.

Science.gov (United States)

Tait, Alexander N; de Lima, Thomas Ferreira; Zhou, Ellen; Wu, Allie X; Nahmias, Mitchell A; Shastri, Bhavin J; Prucnal, Paul R

2017-08-07

Photonic systems for high-performance information processing have attracted renewed interest. Neuromorphic silicon photonics has the potential to integrate processing functions that vastly exceed the capabilities of electronics. We report first observations of a recurrent silicon photonic neural network, in which connections are configured by microring weight banks. A mathematical isomorphism between the silicon photonic circuit and a continuous neural network model is demonstrated through dynamical bifurcation analysis. Exploiting this isomorphism, a simulated 24-node silicon photonic neural network is programmed using "neural compiler" to solve a differential system emulation task. A 294-fold acceleration against a conventional benchmark is predicted. We also propose and derive power consumption analysis for modulator-class neurons that, as opposed to laser-class neurons, are compatible with silicon photonic platforms. At increased scale, Neuromorphic silicon photonics could access new regimes of ultrafast information processing for radio, control, and scientific computing.

Mode-locked silicon evanescent lasers.

Science.gov (United States)

Koch, Brian R; Fang, Alexander W; Cohen, Oded; Bowers, John E

2007-09-03

We demonstrate electrically pumped lasers on silicon that produce pulses at repetition rates up to 40 GHz. The mode locked lasers generate 4 ps pulses with low jitter and extinction ratios above 18 dB, making them suitable for data and telecommunication transmitters and for clock generation and distribution. Results of both passive and hybrid mode locking are discussed. This type of device could enable new silicon based integrated technologies, such as optical time division multiplexing (OTDM), wavelength division multiplexing (WDM), and optical code division multiple access (OCDMA).

Low-loss compact multilayer silicon nitride platform for 3D photonic integrated circuits.

Science.gov (United States)

Shang, Kuanping; Pathak, Shibnath; Guan, Binbin; Liu, Guangyao; Yoo, S J B

2015-08-10

We design, fabricate, and demonstrate a silicon nitride (Si(3)N(4)) multilayer platform optimized for low-loss and compact multilayer photonic integrated circuits. The designed platform, with 200 nm thick waveguide core and 700 nm interlayer gap, is compatible for active thermal tuning and applicable to realizing compact photonic devices such as arrayed waveguide gratings (AWGs). We achieve ultra-low loss vertical couplers with 0.01 dB coupling loss, multilayer crossing loss of 0.167 dB at 90° crossing angle, 50 μm bending radius, 100 × 2 μm(2) footprint, lateral misalignment tolerance up to 400 nm, and less than -52 dB interlayer crosstalk at 1550 nm wavelength. Based on the designed platform, we demonstrate a 27 × 32 × 2 multilayer star coupler.

Accelerated life test of an ONO stacked insulator film for a silicon micro-strip detector

International Nuclear Information System (INIS)

Okuno, Shoji; Ikeda, Hirokazu; Saitoh, Yutaka

1996-01-01

We have used to acquire the signal through an integrated capacitor for a silicon micro-strip detector. When we have been using a double-sided silicon micro-strip detector, we have required a long-term stability and a high feasibility for the integrated capacitor. An oxide-nitride-oxide (ONO) insulator film was theoretically expected to have a superior nature in terms of long term reliability. In order to test long term reliability for integrated capacitor of a silicon micro-strip detector, we made a multi-channel measuring system for capacitors

Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

Science.gov (United States)

Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

2013-03-25

n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

Fluorescence and thermoluminescence in silicon oxide films rich in silicon; Fluorescencia y termoluminiscencia en peliculas de oxido de silicio rico en silicio

Energy Technology Data Exchange (ETDEWEB)

Berman M, D.; Piters, T. M. [Centro de Investigacion en Fisica, Universidad de Sonora, Apdo. Postal 5-088, Hermosillo 83190, Sonora (Mexico); Aceves M, M.; Berriel V, L. R. [Instituto Nacional de Astrofisica, Optica y Electronica, Apdo. Postal 51, Puebla 72000, Puebla (Mexico); Luna L, J. A. [CIDS, Benemerita Universidad Autonoma de Puebla, Apdo. Postal 1651, Puebla 72000, Puebla (Mexico)

2009-10-15

In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 {omega}-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N{sub 2} at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

Science.gov (United States)

Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

2009-10-01

We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

70 nm resolution in subsurface optical imaging of silicon integrated-circuits using pupil-function engineering

Science.gov (United States)

Serrels, K. A.; Ramsay, E.; Reid, D. T.

2009-02-01

We present experimental evidence for the resolution-enhancing effect of an annular pupil-plane aperture when performing nonlinear imaging in the vectorial-focusing regime through manipulation of the focal spot geometry. By acquiring two-photon optical beam-induced current images of a silicon integrated-circuit using solid-immersion-lens microscopy at 1550 nm we achieved 70 nm resolution. This result demonstrates a reduction in the minimum effective focal spot diameter of 36%. In addition, the annular-aperture-induced extension of the depth-of-focus causes an observable decrease in the depth contrast of the resulting image and we explain the origins of this using a simulation of the imaging process.

Will silicon be the photonic material of the third millenium?

International Nuclear Information System (INIS)

Pavesi, L

2003-01-01

Silicon microphotonics, a technology which merges photonics and silicon microelectronic components, is rapidly evolving. Many different fields of application are emerging: transceiver modules for optical communication systems, optical bus systems for ULSI circuits, I/O stages for SOC, displays, .... In this review I will give a brief motivation for silicon microphotonics and try to give the state-of-the-art of this technology. The ingredient still lacking is the silicon laser: a review of the various approaches will be presented. Finally, I will try to draw some conclusions where silicon is predicted to be the material to achieve a full integration of electronic and optical devices. (topical review)

Silicon carbide microsystems for harsh environments

CERN Document Server

Wijesundara, Muthu B J

2011-01-01

Silicon Carbide Microsystems for Harsh Environments reviews state-of-the-art Silicon Carbide (SiC) technologies that, when combined, create microsystems capable of surviving in harsh environments, technological readiness of the system components, key issues when integrating these components into systems, and other hurdles in harsh environment operation. The authors use the SiC technology platform suite the model platform for developing harsh environment microsystems and then detail the current status of the specific individual technologies (electronics, MEMS, packaging). Additionally, methods

Investigation of Properties of Novel Silicon Pixel Assemblies Employing Thin n-in-p Sensors and 3D-Integration

CERN Document Server

Weigell, Philipp

Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300/fb¹ , the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running|especially if the luminosity is raised to about 5x10^35/(cm²s¹ ) as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost-effective pixel assemblies with...

High quality silicon-based substrates for microwave and millimeter wave passive circuits

Science.gov (United States)

Belaroussi, Y.; Rack, M.; Saadi, A. A.; Scheen, G.; Belaroussi, M. T.; Trabelsi, M.; Raskin, J.-P.

2017-09-01

Porous silicon substrate is very promising for next generation wireless communication requiring the avoidance of high-frequency losses originating from the bulk silicon. In this work, new variants of porous silicon (PSi) substrates have been introduced. Through an experimental RF performance, the proposed PSi substrates have been compared with different silicon-based substrates, namely, standard silicon (Std), trap-rich (TR) and high resistivity (HR). All of the mentioned substrates have been fabricated where identical samples of CPW lines have been integrated on. The new PSi substrates have shown successful reduction in the substrate's effective relative permittivity to values as low as 3.7 and great increase in the substrate's effective resistivity to values higher than 7 kΩ cm. As a concept proof, a mm-wave bandpass filter (MBPF) centred at 27 GHz has been integrated on the investigated substrates. Compared with the conventional MBPF implemented on standard silicon-based substrates, the measured S-parameters of the PSi-based MBPF have shown high filtering performance, such as a reduction in insertion loss and an enhancement of the filter selectivity, with the joy of having the same filter performance by varying the temperature. Therefore, the efficiency of the proposed PSi substrates has been well highlighted. From 1994 to 1995, she was assistant of physics at (USTHB), Algiers . From 1998 to 2011, she was a Researcher at characterization laboratory in ionized media and laser division at the Advanced Technologies Development Center. She has integrated the Analog Radio Frequency Integrated Circuits team as Researcher since 2011 until now in Microelectronic and Nanotechnology Division at Advanced Technologies Development Center (CDTA), Algiers. She has been working towards her Ph.D. degree jointly at CDTA and Ecole Nationale Polytechnique, Algiers, since 2012. Her research interest includes fabrication and characterization of microwave passive devices on porous

Piezoresistive silicon nanowire resonators as embedded building blocks in thick SOI

Science.gov (United States)

Nasr Esfahani, Mohammad; Kilinc, Yasin; Çagatay Karakan, M.; Orhan, Ezgi; Hanay, M. Selim; Leblebici, Yusuf; Erdem Alaca, B.

2018-04-01

The use of silicon nanowire resonators in nanoelectromechanical systems for new-generation sensing and communication devices faces integration challenges with higher-order structures. Monolithic and deterministic integration of such nanowires with the surrounding microscale architecture within the same thick crystal is a critical aspect for the improvement of throughput, reliability and device functionality. A monolithic and IC-compatible technology based on a tuned combination of etching and protection processes was recently introduced yielding silicon nanowires within a 10 μ m-thick device layer. Motivated by its success, the implications of the technology regarding the electromechanical resonance are studied within a particular setting, where the resonator is co-fabricated with all terminals and tuning electrodes. Frequency response is measured via piezoresistive readout with frequency down-mixing. Measurements indicate mechanical resonance with frequencies as high as 100 MHz exhibiting a Lorentzian behavior with proper transition to nonlinearity, while Allan deviation on the order of 3-8 ppm is achieved. Enabling the fabrication of silicon nanowires in thick silicon crystals using conventional semiconductor manufacturing, the present study thus demonstrates an alternative pathway to bottom-up and thin silicon-on-insulator approaches for silicon nanowire resonators.

Integrating Soil Silicon Amendment into Management Programs for Insect Pests of Drill-Seeded Rice.

Science.gov (United States)

Villegas, James M; Way, Michael O; Pearson, Rebecca A; Stout, Michael J

2017-08-13

Silicon soil amendment has been shown to enhance plant defenses against insect pests. Rice is a silicon-accumulating graminaceous plant. In the southern United States, the rice water weevil and stem borers are important pests of rice. Current management tactics for these pests rely heavily on the use of insecticides. This study evaluated the effects of silicon amendment when combined with current management tactics for these rice insect pests in the field. Field experiments were conducted from 2013 to 2015. Rice was drill-planted in plots subjected to factorial combinations of variety (conventional and hybrid), chlorantraniliprole seed treatment (treated and untreated), and silicon amendment (treated and untreated). Silicon amendment reduced densities of weevil larvae on a single sampling date in 2014, but did not affect densities of whiteheads caused by stem borers. In contrast, insecticidal seed treatment strongly reduced densities of both weevil larvae and whiteheads. Higher densities of weevil larvae were also observed in the hybrid variety in 2014, while higher incidences of whiteheads were observed in the conventional variety in 2014 and 2015. Silicon amendment improved rice yields, as did chlorantraniliprole seed treatment and use of the hybrid variety.

Insertable B-Layer integration in the ATLAS experiment and development of future 3D silicon pixel sensors

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00371528; Røhne, Ole

This work has two distinct objectives: the development of software for the integration of the Insertable B-Layer (IBL) in the ATLAS offline software framework and the study of the performance of 3D silicon sensors produced by SINTEF for future silicon pixel detectors. The former task consists in the implementation of the IBL byte stream converter. This offline tool performs the decoding of the binary-formatted data coming from the detector into information (e.g. hit position and Time over Threshold) that is stored in a format used in the reconstruction data flow. It also encodes the information extracted from simulations into a simulated IBL byte stream. The tool has been successfully used since the beginning of the LHC Run II data taking. The experimental work on SINTEF 3D sensors was performed in the framework of the development of pixel sensors for the next generation of tracking detectors. Preliminary tests on SINTEF 3D sensors showed that the majority of these devices suffers from high leakage currents, ...

III–V quantum light source and cavity-QED on Silicon

Science.gov (United States)

Luxmoore, I. J.; Toro, R.; Pozo-Zamudio, O. Del; Wasley, N. A.; Chekhovich, E. A.; Sanchez, A. M.; Beanland, R.; Fox, A. M.; Skolnick, M. S.; Liu, H. Y.; Tartakovskii, A. I.

2013-01-01

Non-classical light sources offer a myriad of possibilities in both fundamental science and commercial applications. Single photons are the most robust carriers of quantum information and can be exploited for linear optics quantum information processing. Scale-up requires miniaturisation of the waveguide circuit and multiple single photon sources. Silicon photonics, driven by the incentive of optical interconnects is a highly promising platform for the passive optical components, but integrated light sources are limited by silicon's indirect band-gap. III–V semiconductor quantum-dots, on the other hand, are proven quantum emitters. Here we demonstrate single-photon emission from quantum-dots coupled to photonic crystal nanocavities fabricated from III–V material grown directly on silicon substrates. The high quality of the III–V material and photonic structures is emphasized by observation of the strong-coupling regime. This work opens-up the advantages of silicon photonics to the integration and scale-up of solid-state quantum optical systems. PMID:23393621

III-V quantum light source and cavity-QED on silicon.

Science.gov (United States)

Luxmoore, I J; Toro, R; Del Pozo-Zamudio, O; Wasley, N A; Chekhovich, E A; Sanchez, A M; Beanland, R; Fox, A M; Skolnick, M S; Liu, H Y; Tartakovskii, A I

2013-01-01

Non-classical light sources offer a myriad of possibilities in both fundamental science and commercial applications. Single photons are the most robust carriers of quantum information and can be exploited for linear optics quantum information processing. Scale-up requires miniaturisation of the waveguide circuit and multiple single photon sources. Silicon photonics, driven by the incentive of optical interconnects is a highly promising platform for the passive optical components, but integrated light sources are limited by silicon's indirect band-gap. III-V semiconductor quantum-dots, on the other hand, are proven quantum emitters. Here we demonstrate single-photon emission from quantum-dots coupled to photonic crystal nanocavities fabricated from III-V material grown directly on silicon substrates. The high quality of the III-V material and photonic structures is emphasized by observation of the strong-coupling regime. This work opens-up the advantages of silicon photonics to the integration and scale-up of solid-state quantum optical systems.

Silicon nanowire structures as high-sensitive pH-sensors

International Nuclear Information System (INIS)

Belostotskaya, S O; Chuyko, O V; Kuznetsov, A E; Kuznetsov, E V; Rybachek, E N

2012-01-01

Sensitive elements for pH-sensors created on silicon nanostructures were researched. Silicon nanostructures have been used as ion-sensitive field effect transistor (ISFET) for the measurement of solution pH. Silicon nanostructures have been fabricated by 'top-down' approach and have been studied as pH sensitive elements. Nanowires have the higher sensitivity. It was shown, that sensitive element, which is made of 'one-dimensional' silicon nanostructure have bigger pH-sensitivity as compared with 'two-dimensional' structure. Integrated element formed from two p- and n-type nanowire ISFET ('inverter') can be used as high sensitivity sensor for local relative change [H+] concentration in very small volume.

Proposal of a broadband, polarization-insensitive and high-efficiency hot-carrier schottky photodetector integrated with a plasmonic silicon ridge waveguide

International Nuclear Information System (INIS)

Yang, Liu; Kou, Pengfei; Shen, Jianqi; Lee, El Hang; He, Sailing

2015-01-01

We propose a broadband, polarization-insensitive and high-efficiency plasmonic Schottky diode for detection of sub-bandgap photons in the optical communication wavelength range through internal photoemission (IPE). The distinctive features of this design are that it has a gold film covering both the top and the sidewalls of a dielectric silicon ridge waveguide with the Schottky contact formed at the gold–silicon interface and the sidewall coverage of gold can be easily tuned by an insulating layer. An extensive physical model on IPE of hot carriers is presented in detail and is applied to calculate and examine the performance of this detector. In comparison with a diode having only the top gold contact, the polarization sensitivity of the responsivity is greatly minimized in our photodetector with gold film covering both the top and the sidewall. Much higher responsivities for both polarizations are also achieved over a broad wavelength range of 1.2–1.6 μm. Moreover, the Schottky contact is only 4 μm long, leading to a very small dark current. Our design is very promising for practical applications in high-density silicon photonic integration. (paper)

High-Throughput Multiple Dies-to-Wafer Bonding Technology and III/V-on-Si Hybrid Lasers for Heterogeneous Integration of Optoelectronic Integrated Circuits

Directory of Open Access Journals (Sweden)

Xianshu eLuo

2015-04-01

Full Text Available Integrated optical light source on silicon is one of the key building blocks for optical interconnect technology. Great research efforts have been devoting worldwide to explore various approaches to integrate optical light source onto the silicon substrate. The achievements so far include the successful demonstration of III/V-on-Si hybrid lasers through III/V-gain material to silicon wafer bonding technology. However, for potential large-scale integration, leveraging on mature silicon complementary metal oxide semiconductor (CMOS fabrication technology and infrastructure, more effective bonding scheme with high bonding yield is in great demand considering manufacturing needs. In this paper, we propose and demonstrate a high-throughput multiple dies-to-wafer (D2W bonding technology which is then applied for the demonstration of hybrid silicon lasers. By temporarily bonding III/V dies to a handle silicon wafer for simultaneous batch processing, it is expected to bond unlimited III/V dies to silicon device wafer with high yield. As proof-of-concept, more than 100 III/V dies bonding to 200 mm silicon wafer is demonstrated. The high performance of the bonding interface is examined with various characterization techniques. Repeatable demonstrations of 16-III/V-die bonding to pre-patterned 200 mm silicon wafers have been performed for various hybrid silicon lasers, in which device library including Fabry-Perot (FP laser, lateral-coupled distributed feedback (LC-DFB laser with side wall grating, and mode-locked laser (MLL. From these results, the presented multiple D2W bonding technology can be a key enabler towards the large-scale heterogeneous integration of optoelectronic integrated circuits (H-OEIC.

Hydrogenated Amorphous Silicon Sensor Deposited on Integrated Circuit for Radiation Detection

CERN Document Server

Despeisse, M; Jarron, P; Kaplon, J; Moraes, D; Nardulli, A; Powolny, F; Wyrsch, N

2008-01-01

Radiation detectors based on the deposition of a 10 to 30 mum thick hydrogenated amorphous silicon (a-Si:H) sensor directly on top of integrated circuits have been developed. The performance of this detector technology has been assessed for the first time in the context of particle detectors. Three different circuits were designed in a quarter micron CMOS technology for these studies. The so-called TFA (Thin-Film on ASIC) detectors obtained after deposition of a-Si:H sensors on the developed circuits are presented. High internal electric fields (104 to 105 V/cm) can be built in the a-Si:H sensor and overcome the low mobility of electrons and holes in this amorphous material. However, the deposited sensor's leakage current at such fields turns out to be an important parameter which limits the performance of a TFA detector. Its detailed study is presented as well as the detector's pixel segmentation. Signal induction by generated free carrier motion in the a-Si:H sensor has been characterized using a 660 nm pul...

Fabrication of micromirrors with pyramidal shape using anisotropic etching of silicon

OpenAIRE

Moktadir, Z.; Vijaya Prakash, G.; Trupke, M.; Koukharenko, E.; Kraft, M.; Baumberg, J.J.; Eriksson, S.; Hinds, E.A.

2005-01-01

Gold micro-mirrors have been formed in silicon in an inverted pyramidal shape. The pyramidal structures are created in the (100) surface of a silicon wafer by anisotropic etching in potassium hydroxide. High quality micro-mirrors are then formed by sputtering gold onto the smooth silicon (111) faces of the pyramids. These mirrors show great promise as high quality optical devices suitable for integration into MOEMS systems.

Roof-integrated amorphous silicon photovoltaic installation at the Institute for Micro-Technology; Installation photovoltaique IMT Neuchatel silicium amorphe integre dans toiture

Energy Technology Data Exchange (ETDEWEB)

Tscharner, R.; Shah, A.V.

2003-07-01

This final report for the Swiss Federal Office of Energy (SFOE) describes the 6.44 kW grid-connected photovoltaic (PV) power plant that has been in operation since 1996 at the Institute for Micro-Technology in Neuchatel, Switzerland. The PV plant, which features large-area, fully integrated modules using amorphous silicon cells was the first of its kind in Switzerland. Experience gained with the installation, which has been fully operational since its construction, as well as the power produced and efficiencies measured are presented and commented. The role of the installation as the forerunner of new, so-called 'micro-morph' thin-film solar cell technology developed at the institute is stressed. Technical details of the plant and its performance are given.

Particle interaction and displacement damage in silicon devices operated in radiation environments

International Nuclear Information System (INIS)

Leroy, Claude; Rancoita, Pier-Giorgio

2007-01-01

Silicon is used in radiation detectors and electronic devices. Nowadays, these devices achieving submicron technology are parts of integrated circuits of large to very large scale integration (VLSI). Silicon and silicon-based devices are commonly operated in many fields including particle physics experiments, nuclear medicine and space. Some of these fields present adverse radiation environments that may affect the operation of the devices. The particle energy deposition mechanisms by ionization and non-ionization processes are reviewed as well as the radiation-induced damage and its effect on device parameters evolution, depending on particle type, energy and fluence. The temporary or permanent damage inflicted by a single particle (single event effect) to electronic devices or integrated circuits is treated separately from the total ionizing dose (TID) effect for which the accumulated fluence causes degradation and from the displacement damage induced by the non-ionizing energy-loss (NIEL) deposition. Understanding of radiation effects on silicon devices has an impact on their design and allows the prediction of a specific device behaviour when exposed to a radiation field of interest

Characterization of porous silicon integrated in liquid chromatography chips

NARCIS (Netherlands)

Tiggelaar, Roald M.; Verdoold, Vincent; Eghbali, H.; Desmet, G.; Gardeniers, Johannes G.E.

2009-01-01

Properties of porous silicon which are relevant for use of the material as a stationary phase in liquid chromatography chips, like porosity, pore size and specific surface area, were determined with high-resolution SEM and N2 adsorption–desorption isotherms. For the anodization conditions

Stable configurations of graphene on silicon

Energy Technology Data Exchange (ETDEWEB)

Javvaji, Brahmanandam; Shenoy, Bhamy Maithry [Department of Aerospace Engineering, Indian Institute of Science, Bangalore 560012 (India); Mahapatra, D. Roy, E-mail: droymahapatra@aero.iisc.ernet.in [Department of Aerospace Engineering, Indian Institute of Science, Bangalore 560012 (India); Ravikumar, Abhilash [Department of Metallurgical and Materials Engineering, National Institute of Technology Karnataka, Surathkal 575025 (India); Hegde, G.M. [Center for Nano Science and Engineering, Indian Institute of Science, Bangalore 560012 (India); Rizwan, M.R. [Department of Metallurgical and Materials Engineering, National Institute of Technology Karnataka, Surathkal 575025 (India)

2017-08-31

Highlights: • Simulations of epitaxial growth process for silicon–graphene system is performed. • Identified the most favourable orientation of graphene sheet on silicon substrate. • Atomic local strain due to the silicon–carbon bond formation is analyzed. - Abstract: Integration of graphene on silicon-based nanostructures is crucial in advancing graphene based nanoelectronic device technologies. The present paper provides a new insight on the combined effect of graphene structure and silicon (001) substrate on their two-dimensional anisotropic interface. Molecular dynamics simulations involving the sub-nanoscale interface reveal a most favourable set of temperature independent orientations of the monolayer graphene sheet with an angle of ∽15° between its armchair direction and [010] axis of the silicon substrate. While computing the favorable stable orientations, both the translation and the rotational vibrations of graphene are included. The possible interactions between the graphene atoms and the silicon atoms are identified from their coordination. Graphene sheet shows maximum bonding density with bond length 0.195 nm and minimum bond energy when interfaced with silicon substrate at 15° orientation. Local deformation analysis reveals probability distribution with maximum strain levels of 0.134, 0.047 and 0.029 for 900 K, 300 K and 100 K, respectively in silicon surface for 15° oriented graphene whereas the maximum probable strain in graphene is about 0.041 irrespective of temperature. Silicon–silicon dimer formation is changed due to silicon–carbon bonding. These results may help further in band structure engineering of silicon–graphene lattice.

A physically transient form of silicon electronics.

Science.gov (United States)

Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Song, Young Min; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L; Zakin, Mitchell R; Slepian, Marvin J; Huang, Yonggang; Omenetto, Fiorenzo G; Rogers, John A

2012-09-28

A remarkable feature of modern silicon electronics is its ability to remain physically invariant, almost indefinitely for practical purposes. Although this characteristic is a hallmark of applications of integrated circuits that exist today, there might be opportunities for systems that offer the opposite behavior, such as implantable devices that function for medically useful time frames but then completely disappear via resorption by the body. We report a set of materials, manufacturing schemes, device components, and theoretical design tools for a silicon-based complementary metal oxide semiconductor (CMOS) technology that has this type of transient behavior, together with integrated sensors, actuators, power supply systems, and wireless control strategies. An implantable transient device that acts as a programmable nonantibiotic bacteriocide provides a system-level example.

Novel approaches for low-cost through-silicon vias

NARCIS (Netherlands)

Bullema, J.E.; Bressers, P.; Oosterhuis, G.; Mueller, M.; Huis in 't veld, A.J.; Roozeboom, F.

2011-01-01

3D stacking of integrated circuits is an emerging packaging technology to enable a high degree of functional integration and miniaturization. Footprint reduction in 3D stacking can be achieved by use of Through Silicon Vias (TSV). Creation of TSVs with Deep Reactive Ion Etching (DRIE), laser

Micromachined silicon cantilevers with integrated high-frequency magnetoimpedance sensors for simultaneous strain and magnetic field detection

Science.gov (United States)

Buettel, G.; Joppich, J.; Hartmann, U.

2017-12-01

Giant magnetoimpedance (GMI) measurements in the high-frequency regime utilizing a coplanar waveguide with an integrated Permalloy multilayer and micromachined on a silicon cantilever are reported. The fabrication process is described in detail. The aspect ratio of the magnetic multilayer in the magnetoresistive and magnetostrictive device was varied. Tensile strain and compressive strain were applied. Vector network analyzer measurements in the range from the skin effect to ferromagnetic resonance confirm the technological potential of GMI-based micro-electro-mechanical devices for strain and magnetic field sensing applications. The strain-impedance gauge factor was quantified by finite element strain calculations and reaches a maximum value of almost 200.

Silicon Strip Detectors for ATLAS at the HL-LHC Upgrade

CERN Document Server

Hara, K; The ATLAS collaboration

2012-01-01

The present ATLAS silicon strip (SCT) and transition radiation (TRT) trackers will be replaced with new silicon strip detectors, as part of the Inner Tracker System (ITK), for the Phase-2 upgrade of the Large Hadron Collider, HL-LHC. We have carried out intensive R&D programs to establish radiation harder strip detectors that can survive in a radiation level up to 3000 fb-1 of integrated luminosity based on n+-on-p microstrip detector. We describe main specifications for this year’s sensor fabrication, followed by a description of possible module integration schema

Multipurpose silicon photonics signal processor core.

Science.gov (United States)

Pérez, Daniel; Gasulla, Ivana; Crudgington, Lee; Thomson, David J; Khokhar, Ali Z; Li, Ke; Cao, Wei; Mashanovich, Goran Z; Capmany, José

2017-09-21

Integrated photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint, and cost. Application-specific photonic integrated circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long development times. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable photonic processor, where a common hardware implemented by a two-dimensional photonic waveguide mesh realizes different functionalities through programming. Here, we report the demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate over 20 different functionalities with a simple seven hexagonal cell structure, which can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks, and quantum information systems. Our work is an important step toward this paradigm.Integrated optical circuits today are typically designed for a few special functionalities and require complex design and development procedures. Here, the authors demonstrate a reconfigurable but simple silicon waveguide mesh with different functionalities.

Magneto-optical non-reciprocal devices in silicon photonics

Directory of Open Access Journals (Sweden)

Yuya Shoji

2014-01-01

Full Text Available Silicon waveguide optical non-reciprocal devices based on the magneto-optical effect are reviewed. The non-reciprocal phase shift caused by the first-order magneto-optical effect is effective in realizing optical non-reciprocal devices in silicon waveguide platforms. In a silicon-on-insulator waveguide, the low refractive index of the buried oxide layer enhances the magneto-optical phase shift, which reduces the device footprints. A surface activated direct bonding technique was developed to integrate a magneto-optical garnet crystal on the silicon waveguides. A silicon waveguide optical isolator based on the magneto-optical phase shift was demonstrated with an optical isolation of 30 dB and insertion loss of 13 dB at a wavelength of 1548 nm. Furthermore, a four port optical circulator was demonstrated with maximum isolations of 15.3 and 9.3 dB in cross and bar ports, respectively, at a wavelength of 1531 nm.

Hydrogen interactions with silicon-on-insulator materials

OpenAIRE

Rivera de Mena, A.J.

2003-01-01

The booming of microelectronics in recent decades has been made possible by the excellent properties of the Si/SiO2 interface in oxide on silicon systems.. This semiconductor/insulator combination has proven to be of great value for the semiconductor industry. It has made it possible to continuously increase the number of transistors per chip until the physical limit of integration is now almost reached. Silicon-on-insulator (SOI) materials were early on seen as a step in the logical evolutio...

Towards neuromorphic electronics: Memristors on foldable silicon fabric

KAUST Repository

Ghoneim, Mohamed T.

2014-11-01

The advantages associated with neuromorphic computation are rich areas of complex research. We address the fabrication challenge of building neuromorphic devices on structurally foldable platform with high integration density. We present a CMOS compatible fabrication process to demonstrate for the first time memristive devices fabricated on bulk monocrystalline silicon (100) which is next transformed into a flexible thin sheet of silicon fabric with all the pre-fabricated devices. This process preserves the ultra-high integration density advantage unachievable on other flexible substrates. In addition, the memristive devices are of the size of a motor neuron and the flexible/folded architectural form factor is critical to match brain cortex\\'s folded pattern for ultra-compact design.

Silicon diode for measurement of integral neutron dose and method of its production

International Nuclear Information System (INIS)

Frank, H.; Seda, J.; Trousil, J.

1978-01-01

The silicon diode consists of an N or P type silicon plate having a specific resistance exceeding 10 ohm.cm and minority carrier life exceeding 100μs. The plate thickness is a quintuple to a ten-tuple of the diffusion length and the plate consists of layers. Ions of, eg., boron, at a concentration exceeding 10 14 cm -2 are implanted into the P + type silicon layer and a layer of a metal, eg., nickel, is deposited onto it. Ions of eg., phosphorus, at a concentration exceeding 10 14 cm -2 are implanted in the N + type layer and a metal layer, eg., nickel is again depositeJ onto it. Implantation proceeds at an ion acceleration voltage of 10 to 200 kV. Metal layer deposition follows, and simultaneously with annealing of the P + and N + types of silicon layers, the metal layers are annealed at 600 to 900 degC for 1 to 60 minutes with subsequent temperature decrease at a rate less than 10 degC/min, down to a temperature of 300 degC. (J.P.)

Flexible and semi-transparent thermoelectric energy harvesters from low cost bulk silicon (100)

KAUST Repository

Sevilla, Galo T.

2013-07-09

Flexible and semi-transparent high performance thermoelectric energy harvesters are fabricated on low cost bulk mono-crystalline silicon (100) wafers. The released silicon is only 3.6% as thick as bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. This generic batch processing is a pragmatic way of transforming traditional silicon circuitry for extremely deformable high-performance integrated electronics. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Flexible and semi-transparent thermoelectric energy harvesters from low cost bulk silicon (100)

KAUST Repository

Sevilla, Galo T.; Inayat, Salman Bin; Rojas, Jhonathan Prieto; Hussain, Aftab M.; Hussain, Muhammad Mustafa

2013-01-01

Flexible and semi-transparent high performance thermoelectric energy harvesters are fabricated on low cost bulk mono-crystalline silicon (100) wafers. The released silicon is only 3.6% as thick as bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. This generic batch processing is a pragmatic way of transforming traditional silicon circuitry for extremely deformable high-performance integrated electronics. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Photoluminescence and electrical properties of silicon oxide and silicon nitride superlattices containing silicon nanocrystals

International Nuclear Information System (INIS)

Shuleiko, D V; Ilin, A S

2016-01-01

Photoluminescence and electrical properties of superlattices with thin (1 to 5 nm) alternating silicon-rich silicon oxide or silicon-rich silicon nitride, and silicon oxide or silicon nitride layers containing silicon nanocrystals prepared by plasma-enhanced chemical vapor deposition with subsequent annealing were investigated. The entirely silicon oxide based superlattices demonstrated photoluminescence peak shift due to quantum confinement effect. Electrical measurements showed the hysteresis effect in the vicinity of zero voltage due to structural features of the superlattices from SiOa 93 /Si 3 N 4 and SiN 0 . 8 /Si 3 N 4 layers. The entirely silicon nitride based samples demonstrated resistive switching effect, comprising an abrupt conductivity change at about 5 to 6 V with current-voltage characteristic hysteresis. The samples also demonstrated efficient photoluminescence with maximum at ∼1.4 eV, due to exiton recombination in silicon nanocrystals. (paper)

Environmentally benign silicon solar cell manufacturing

Energy Technology Data Exchange (ETDEWEB)

Tsuo, Y.S. [National Renewable Energy Lab., Golden, CO (United States); Gee, J.M. [Sandia National Labs., Albuquerque, NM (United States); Menna, P. [National Agency for New Technologies Energy and Environment, Portici (Italy); Strebkov, D.S.; Pinov, A.; Zadde, V. [Intersolarcenter, Moscow (Russian Federation)

1998-09-01

The manufacturing of silicon devices--from polysilicon production, crystal growth, ingot slicing, wafer cleaning, device processing, to encapsulation--requires many steps that are energy intensive and use large amounts of water and toxic chemicals. In the past two years, the silicon integrated-circuit (IC) industry has initiated several programs to promote environmentally benign manufacturing, i.e., manufacturing practices that recover, recycle, and reuse materials resources with a minimal consumption of energy. Crystalline-silicon solar photovoltaic (PV) modules, which accounted for 87% of the worldwide module shipments in 1997, are large-area devices with many manufacturing steps similar to those used in the IC industry. Obviously, there are significant opportunities for the PV industry to implement more environmentally benign manufacturing approaches. Such approaches often have the potential for significant cost reduction by reducing energy use and/or the purchase volume of new chemicals and by cutting the amount of used chemicals that must be discarded. This paper will review recent accomplishments of the IC industry initiatives and discuss new processes for environmentally benign silicon solar-cell manufacturing.

An analog silicon retina with multichip configuration.

Science.gov (United States)

Kameda, Seiji; Yagi, Tetsuya

2006-01-01

The neuromorphic silicon retina is a novel analog very large scale integrated circuit that emulates the structure and the function of the retinal neuronal circuit. We fabricated a neuromorphic silicon retina, in which sample/hold circuits were embedded to generate fluctuation-suppressed outputs in the previous study [1]. The applications of this silicon retina, however, are limited because of a low spatial resolution and computational variability. In this paper, we have fabricated a multichip silicon retina in which the functional network circuits are divided into two chips: the photoreceptor network chip (P chip) and the horizontal cell network chip (H chip). The output images of the P chip are transferred to the H chip with analog voltages through the line-parallel transfer bus. The sample/hold circuits embedded in the P and H chips compensate for the pattern noise generated on the circuits, including the analog communication pathway. Using the multichip silicon retina together with an off-chip differential amplifier, spatial filtering of the image with an odd- and an even-symmetric orientation selective receptive fields was carried out in real time. The analog data transfer method in the present multichip silicon retina is useful to design analog neuromorphic multichip systems that mimic the hierarchical structure of neuronal networks in the visual system.

Silicon microspheres for near-IR communication applications

International Nuclear Information System (INIS)

Serpengüzel, Ali; Demir, Abdullah

2008-01-01

We have performed transverse electric and transverse magnetic polarized elastic light scattering calculations at 90° and 0° in the o-band at 1.3 µm for a 15 µm radius silicon microsphere with a refractive index of 3.5. The quality factors are on the order of 10 7 and the mode/channel spacing is 7 nm, which correlate well with the refractive index and the optical size of the microsphere. The 90° elastic light scattering can be used to monitor a dropped channel (drop port), whereas the 0° elastic scattering can be used to monitor the transmission channel (through port). The optical resonances of the silicon microspheres provide the necessary narrow linewidths that are needed for high-resolution optical communication applications. Potential telecommunication applications include filters, modulators, switches, wavelength converters, detectors, amplifiers and light sources. Silicon microspheres show promise as potential building blocks for silicon-based electrophotonic integration

Silicon fabric for multi-functional applications

KAUST Repository

Sevilla, Galo T.; Rojas, Jhonathan Prieto; Ahmed, Sally; Hussain, Aftab M.; Inayat, Salman Bin; Hussain, Muhammad Mustafa

2013-01-01

This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

Silicon fabric for multi-functional applications

KAUST Repository

Sevilla, Galo T.

2013-06-01

This paper reports a generic process flow to fabricate mechanically flexible and optically semi-transparent thermoelectric generators (TEGs), micro lithium-ion batteries (μLIB) and metal-oxide-semiconductor capacitors (MOSCAPs) on mono-crystalline silicon fabric platforms from standard bulk silicon (100) wafers. All the fabricated devices show outstanding mechanical flexibility and performance, making an important step towards monolithic integration of Energy Chip (self-powered devices) including energy harvesters and electronic devices on flexible platforms. We also report a recyclability process for the remaining bulk substrate after release, allowing us to achieve a low cost flexible platform for high performance applications. © 2013 IEEE.

Second-harmonic generation in substoichiometric silicon nitride layers

Science.gov (United States)

Pecora, Emanuele; Capretti, Antonio; Miano, Giovanni; Dal Negro, Luca

2013-03-01

Harmonic generation in optical circuits offers the possibility to integrate wavelength converters, light amplifiers, lasers, and multiple optical signal processing devices with electronic components. Bulk silicon has a negligible second-order nonlinear optical susceptibility owing to its crystal centrosymmetry. Silicon nitride has its place in the microelectronic industry as an insulator and chemical barrier. In this work, we propose to take advantage of silicon excess in silicon nitride to increase the Second Harmonic Generation (SHG) efficiency. Thin films have been grown by reactive magnetron sputtering and their nonlinear optical properties have been studied by femtosecond pumping over a wide range of excitation wavelengths, silicon nitride stoichiometry and thermal processes. We demonstrate SHG in the visible range (375 - 450 nm) using a tunable 150 fs Ti:sapphire laser, and we optimize the SH emission at a silicon excess of 46 at.% demonstrating a maximum SHG efficiency of 4x10-6 in optimized films. Polarization properties, generation efficiency, and the second order nonlinear optical susceptibility are measured for all the investigated samples and discussed in terms of an effective theoretical model. Our findings show that the large nonlinear optical response demonstrated in optimized Si-rich silicon nitride materials can be utilized for the engineering of nonlinear optical functions and devices on a Si chip.

Nanostructured silicon anodes for lithium ion rechargeable batteries.

Science.gov (United States)

Teki, Ranganath; Datta, Moni K; Krishnan, Rahul; Parker, Thomas C; Lu, Toh-Ming; Kumta, Prashant N; Koratkar, Nikhil

2009-10-01

Rechargeable lithium ion batteries are integral to today's information-rich, mobile society. Currently they are one of the most popular types of battery used in portable electronics because of their high energy density and flexible design. Despite their increasing use at the present time, there is great continued commercial interest in developing new and improved electrode materials for lithium ion batteries that would lead to dramatically higher energy capacity and longer cycle life. Silicon is one of the most promising anode materials because it has the highest known theoretical charge capacity and is the second most abundant element on earth. However, silicon anodes have limited applications because of the huge volume change associated with the insertion and extraction of lithium. This causes cracking and pulverization of the anode, which leads to a loss of electrical contact and eventual fading of capacity. Nanostructured silicon anodes, as compared to the previously tested silicon film anodes, can help overcome the above issues. As arrays of silicon nanowires or nanorods, which help accommodate the volume changes, or as nanoscale compliant layers, which increase the stress resilience of silicon films, nanoengineered silicon anodes show potential to enable a new generation of lithium ion batteries with significantly higher reversible charge capacity and longer cycle life.

RF characterization and analytical modelling of through silicon vias and coplanar waveguides for 3D integration

NARCIS (Netherlands)

Lamy, Y.; Jinesh, K.B.; Roozeboom, F.; Gravesteijn, D.J.; Besling, W.F.A.

2010-01-01

High-aspect ratio (12.5) through silicon vias (TSV) made in a silicon interposer have been electrically characterized in the direct current (dc) and microwave regimes for 3D interconnect applications. The vias were micro-machined in silicon, insulated, and filled with copper employing a bottom-up

Brain inspired high performance electronics on flexible silicon

KAUST Repository

Sevilla, Galo T.

2014-06-01

Brain\\'s stunning speed, energy efficiency and massive parallelism makes it the role model for upcoming high performance computation systems. Although human brain components are a million times slower than state of the art silicon industry components [1], they can perform 1016 operations per second while consuming less power than an electrical light bulb. In order to perform the same amount of computation with today\\'s most advanced computers, the output of an entire power station would be needed. In that sense, to obtain brain like computation, ultra-fast devices with ultra-low power consumption will have to be integrated in extremely reduced areas, achievable only if brain folded structure is mimicked. Therefore, to allow brain-inspired computation, flexible and transparent platform will be needed to achieve foldable structures and their integration on asymmetric surfaces. In this work, we show a new method to fabricate 3D and planar FET architectures in flexible and semitransparent silicon fabric without comprising performance and maintaining cost/yield advantage offered by silicon-based electronics.

Composite silicon nanostructure arrays fabricated on optical fibre by chemical etching of multicrystal silicon film

International Nuclear Information System (INIS)

Zuo, Zewen; Zhu, Kai; Ning, Lixin; Cui, Guanglei; Qu, Jun; Huang, Wanxia; Shi, Yi; Liu, Hong

2015-01-01

Integrating nanostructures onto optical fibers presents a promising strategy for developing new-fashioned devices and extending the scope of nanodevices’ applications. Here we report the first fabrication of a composite silicon nanostructure on an optical fiber. Through direct chemical etching using an H 2 O 2 /HF solution, multicrystal silicon films with columnar microstructures are etched into a vertically aligned, inverted-cone-like nanorod array embedded in a nanocone array. A faster dissolution rate of the silicon at the void-rich boundary regions between the columns is found to be responsible for the separation of the columns, and thus the formation of the nanostructure array. The morphology of the nanorods primarily depends on the microstructure of the columns in the film. Through controlling the microstructure of the as-grown film and the etching parameters, the structural control of the nanostructure is promising. This fabrication method can be extended to a larger length scale, and it even allows roll-to-roll processing. (paper)

Composite silicon nanostructure arrays fabricated on optical fibre by chemical etching of multicrystal silicon film.

Science.gov (United States)

Zuo, Zewen; Zhu, Kai; Ning, Lixin; Cui, Guanglei; Qu, Jun; Huang, Wanxia; Shi, Yi; Liu, Hong

2015-04-17

Integrating nanostructures onto optical fibers presents a promising strategy for developing new-fashioned devices and extending the scope of nanodevices' applications. Here we report the first fabrication of a composite silicon nanostructure on an optical fiber. Through direct chemical etching using an H2O2/HF solution, multicrystal silicon films with columnar microstructures are etched into a vertically aligned, inverted-cone-like nanorod array embedded in a nanocone array. A faster dissolution rate of the silicon at the void-rich boundary regions between the columns is found to be responsible for the separation of the columns, and thus the formation of the nanostructure array. The morphology of the nanorods primarily depends on the microstructure of the columns in the film. Through controlling the microstructure of the as-grown film and the etching parameters, the structural control of the nanostructure is promising. This fabrication method can be extended to a larger length scale, and it even allows roll-to-roll processing.

Imaging and chemical surface analysis of biomolecular functionalization of monolithically integrated on silicon Mach-Zehnder interferometric immunosensors

International Nuclear Information System (INIS)

Gajos, Katarzyna; Angelopoulou, Michailia; Petrou, Panagiota; Awsiuk, Kamil; Kakabakos, Sotirios; Haasnoot, Willem; Bernasik, Andrzej; Rysz, Jakub; Marzec, Mateusz M.; Misiakos, Konstantinos; Raptis, Ioannis; Budkowski, Andrzej

2016-01-01

Highlights: • Optimization of probe immobilization with robotic spotter printing overlapping spots. • In-situ inspection of microstructured surfaces of biosensors integrated on silicon. • Imaging and chemical analysis of immobilization, surface blocking and immunoreaction. • Insight with molecular discrimination into step-by-step sensor surface modifications. • Optimized biofunctionalization improves sensor sensitivity and response repeatability. - Abstract: Time-of-flight secondary ion mass spectrometry (imaging, micro-analysis) has been employed to evaluate biofunctionalization of the sensing arm areas of Mach-Zehnder interferometers monolithically integrated on silicon chips for the immunochemical (competitive) detection of bovine κ-casein in goat milk. Biosensor surfaces are examined after: modification with (3-aminopropyl)triethoxysilane, application of multiple overlapping spots of κ-casein solutions, blocking with 100-times diluted goat milk, and reaction with monoclonal mouse anti-κ-casein antibodies in blocking solution. The areas spotted with κ-casein solutions of different concentrations are examined and optimum concentration providing homogeneous coverage is determined. Coverage of biosensor surfaces with biomolecules after each of the sequential steps employed in immunodetection is also evaluated with TOF-SIMS, supplemented by Atomic force microscopy and X-ray photoelectron spectroscopy. Uniform molecular distributions are observed on the sensing arm areas after spotting with optimum κ-casein concentration, blocking and immunoreaction. The corresponding biomolecular compositions are determined with a Principal Component Analysis that distinguished between protein amino acids and milk glycerides, as well as between amino acids characteristic for Mabs and κ-casein, respectively. Use of the optimum conditions (κ-casein concentration) for functionalization of chips with arrays of ten Mach-Zehnder interferometers provided on-chips assays

Imaging and chemical surface analysis of biomolecular functionalization of monolithically integrated on silicon Mach-Zehnder interferometric immunosensors

Energy Technology Data Exchange (ETDEWEB)

Gajos, Katarzyna, E-mail: kasia.fornal@uj.edu.pl [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Angelopoulou, Michailia; Petrou, Panagiota [Institute of Nuclear & Radiological Sciences & Technology, Energy & Safety, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Awsiuk, Kamil [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Kakabakos, Sotirios [Institute of Nuclear & Radiological Sciences & Technology, Energy & Safety, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Haasnoot, Willem [RIKILT Wageningen UR, Akkermaalsbos 2, 6708 WB Wageningen (Netherlands); Bernasik, Andrzej [Faculty of Physics and Applied Computer Science, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Academic Centre for Materials and Nanotechnology, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Rysz, Jakub [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland); Marzec, Mateusz M. [Academic Centre for Materials and Nanotechnology, AGH University of Science and Technology, Mickiewicza 30, 30-059 Kraków (Poland); Misiakos, Konstantinos; Raptis, Ioannis [Department of Microelectronics, Institute of Nanoscience and Nanotechnology, NCSR Demokritos, P. Grigoriou & Neapoleos St, Aghia Paraksevi 15310, Athens (Greece); Budkowski, Andrzej [M. Smoluchowski Institute of Physics, Jagiellonian University, Łojasiewicza 11, 30-348 Kraków (Poland)

2016-11-01

Highlights: • Optimization of probe immobilization with robotic spotter printing overlapping spots. • In-situ inspection of microstructured surfaces of biosensors integrated on silicon. • Imaging and chemical analysis of immobilization, surface blocking and immunoreaction. • Insight with molecular discrimination into step-by-step sensor surface modifications. • Optimized biofunctionalization improves sensor sensitivity and response repeatability. - Abstract: Time-of-flight secondary ion mass spectrometry (imaging, micro-analysis) has been employed to evaluate biofunctionalization of the sensing arm areas of Mach-Zehnder interferometers monolithically integrated on silicon chips for the immunochemical (competitive) detection of bovine κ-casein in goat milk. Biosensor surfaces are examined after: modification with (3-aminopropyl)triethoxysilane, application of multiple overlapping spots of κ-casein solutions, blocking with 100-times diluted goat milk, and reaction with monoclonal mouse anti-κ-casein antibodies in blocking solution. The areas spotted with κ-casein solutions of different concentrations are examined and optimum concentration providing homogeneous coverage is determined. Coverage of biosensor surfaces with biomolecules after each of the sequential steps employed in immunodetection is also evaluated with TOF-SIMS, supplemented by Atomic force microscopy and X-ray photoelectron spectroscopy. Uniform molecular distributions are observed on the sensing arm areas after spotting with optimum κ-casein concentration, blocking and immunoreaction. The corresponding biomolecular compositions are determined with a Principal Component Analysis that distinguished between protein amino acids and milk glycerides, as well as between amino acids characteristic for Mabs and κ-casein, respectively. Use of the optimum conditions (κ-casein concentration) for functionalization of chips with arrays of ten Mach-Zehnder interferometers provided on-chips assays

Hybrid III-V Silicon Lasers

Science.gov (United States)

Bowers, John

2014-03-01

Abstract: A number of important breakthroughs in the past decade have focused attention on Si as a photonic platform. We review here recent progress in this field, focusing on efforts to make lasers, amplifiers, modulators and photodetectors on or in silicon. We also describe optimum quantum well design and distributed feedback cavity design to reduce the threshold and increase the efficiency and power output. The impact active silicon photonic integrated circuits could have on interconnects, telecommunications and on silicon electronics is reviewed. Biography: John Bowers holds the Fred Kavli Chair in Nanotechnology, and is the Director of the Institute for Energy Efficiency and a Professor in the Departments of Electrical and Computer Engineering and Materials at UCSB. He is a cofounder of Aurrion, Aerius Photonics and Calient Networks. Dr. Bowers received his M.S. and Ph.D. degrees from Stanford University and worked for AT&T Bell Laboratories and Honeywell before joining UC Santa Barbara. Dr. Bowers is a member of the National Academy of Engineering and a fellow of the IEEE, OSA and the American Physical Society. He is a recipient of the OSA/IEEE Tyndall Award, the OSA Holonyak Prize, the IEEE LEOS William Streifer Award and the South Coast Business and Technology Entrepreneur of the Year Award. He and coworkers received the EE Times Annual Creativity in Electronics (ACE) Award for Most Promising Technology for the hybrid silicon laser in 2007. Bowers' research is primarily in optoelectronics and photonic integrated circuits. He has published ten book chapters, 600 journal papers, 900 conference papers and has received 54 patents. He has published 180 invited papers and conference papers, and given 16 plenary talks at conferences. As well as Chong Zhang.

Hybrid vertical-cavity laser with lateral emission into a silicon waveguide

DEFF Research Database (Denmark)

Park, Gyeong Cheol; Xue, Weiqi; Taghizadeh, Alireza

2015-01-01

into the waveguide integrated with the laser. This laser has the advantages of long-wavelength vertical-cavity surface-emitting lasers, such as low threshold and high side-mode suppression ratio, while allowing integration with silicon photonic circuits, and is fabricated using CMOS compatible processes. It has......We experimentally demonstrate an optically-pumped III-V/Si vertical-cavity laser with lateral emission into a silicon waveguide. This on-chip hybrid laser comprises a distributed Bragg reflector, a III-V active layer, and a high-contrast grating reflector, which simultaneously funnels light...

Semiconductor integrated circuits

International Nuclear Information System (INIS)

Michel, A.E.; Schwenker, R.O.; Ziegler, J.F.

1979-01-01

An improved method involving ion implantation to form non-epitaxial semiconductor integrated circuits. These are made by forming a silicon substrate of one conductivity type with a recessed silicon dioxide region extending into the substrate and enclosing a portion of the silicon substrate. A beam of ions of opposite conductivity type impurity is directed at the substrate at an energy and dosage level sufficient to form a first region of opposite conductivity within the silicon dioxide region. This impurity having a concentration peak below the surface of the substrate forms a region of the one conductivity type which extends from the substrate surface into the first opposite type region to a depth between the concentration peak and the surface and forms a second region of opposite conductivity type. The method, materials and ion beam conditions are detailed. Vertical bipolar integrated circuits can be made this way when the first opposite type conductivity region will function as a collector. Also circuits with inverted bipolar devices when this first region functions as a 'buried'' emitter region. (U.K.)

A multi-channel coronal spectrophotometer.

Science.gov (United States)

Landman, D. A.; Orrall, F. Q.; Zane, R.

1973-01-01

We describe a new multi-channel coronal spectrophotometer system, presently being installed at Mees Solar Observatory, Mount Haleakala, Maui. The apparatus is designed to record and interpret intensities from many sections of the visible and near-visible spectral regions simultaneously, with relatively high spatial and temporal resolution. The detector, a thermoelectrically cooled silicon vidicon camera tube, has its central target area divided into a rectangular array of about 100,000 pixels and is read out in a slow-scan (about 2 sec/frame) mode. Instrument functioning is entirely under PDP 11/45 computer control, and interfacing is via the CAMAC system.

Alignment system for large high-power CO2 laser fusion systems

International Nuclear Information System (INIS)

Bausman, M.D.; Liberman, I.; Manning, J.P.; Singer, S.

1977-01-01

Aligning a pulsed CO 2 laser fusion system involves control systems which insure that the centers of beams follow a prescribed path to within 1 mm, that the pointing of the beams is correct to approximately 20 microradians, and that focal spot at the location of the experimental fusion target be placed to accuracies of 10 to 20 micrometers laterally and approximately 50 micrometers axially. These alignments are accomplished by a variety of sensing techniques which include thermal pinholes and quadrant detectors, Seebeck effect silicon detectors, and imaging autocollimating Hartmann test procedures employing ir vidicon systems

Silicon strip detectors for the ATLAS HL-LHC upgrade

CERN Document Server

Gonzalez Sevilla, S; The ATLAS collaboration

2011-01-01

The LHC upgrade is foreseen to increase the ATLAS design luminosity by a factor ten, implying the need to build a new tracker suited to the harsh HL-LHC conditions in terms of particle rates and radiation doses. In order to cope with the increase in pile-up backgrounds at the higher luminosity, an all silicon detector is being designed. To successfully face the increased radiation dose, a new generation of extremely radiation hard silicon detectors is being designed. We give an overview of the ATLAS tracker upgrade project, in particular focusing on the crucial innermost silicon strip layers. Results from a wide range of irradiated silicon detectors for the strip region of the future ATLAS tracker are presented. Layout concepts for lightweight yet mechanically very rigid detector modules with high service integration are shown.

Impurity engineering for germanium-doped Czochralski silicon wafer used for ultra large scale integrated circuit

Energy Technology Data Exchange (ETDEWEB)

Chen, Jiahe; Yang, Deren [State Key Laboratory of Silicon Materials, Department of Materials Science and Engineering, Zhejiang University, Hangzhou (China)

2009-07-01

Internal gettering (IG) technology has been challenged by both the reduction of thermal budget during device fabrication and the enlargement of wafer diameter. Improving the properties of Czochralski (Cz) silicon wafers by intentional impurity doping, the so-called 'impurity engineering (IE)', is defined. Germanium has been found to be one of the important impurities for improving the internal gettering effect in Cz silicon wafer. In this paper, the investigations on IE involved with the conventional furnace anneal based denudation processing for germanium-doped Cz silicon wafer are reviewed. Meanwhile, the potential mechanisms of germanium effects for the IE of Cz silicon wafer are also interpreted based on the experimental facts. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Micromachined silicon seismic accelerometer development

Energy Technology Data Exchange (ETDEWEB)

Barron, C.C.; Fleming, J.G.; Montague, S. [and others

1996-08-01

Batch-fabricated silicon seismic transducers could revolutionize the discipline of seismic monitoring by providing inexpensive, easily deployable sensor arrays. Our ultimate goal is to fabricate seismic sensors with sensitivity and noise performance comparable to short-period seismometers in common use. We expect several phases of development will be required to accomplish that level of performance. Traditional silicon micromachining techniques are not ideally suited to the simultaneous fabrication of a large proof mass and soft suspension, such as one needs to achieve the extreme sensitivities required for seismic measurements. We have therefore developed a novel {open_quotes}mold{close_quotes} micromachining technology that promises to make larger proof masses (in the 1-10 mg range) possible. We have successfully integrated this micromolding capability with our surface-micromachining process, which enables the formation of soft suspension springs. Our calculations indicate that devices made in this new integrated technology will resolve down to at least sub-{mu}G signals, and may even approach the 10{sup -10} G/{radical}Hz acceleration levels found in the low-earth-noise model.

Carbon nanotube network-silicon oxide non-volatile switches.

Science.gov (United States)

Liao, Albert D; Araujo, Paulo T; Xu, Runjie; Dresselhaus, Mildred S

2014-12-08

The integration of carbon nanotubes with silicon is important for their incorporation into next-generation nano-electronics. Here we demonstrate a non-volatile switch that utilizes carbon nanotube networks to electrically contact a conductive nanocrystal silicon filament in silicon dioxide. We form this device by biasing a nanotube network until it physically breaks in vacuum, creating the conductive silicon filament connected across a small nano-gap. From Raman spectroscopy, we observe coalescence of nanotubes during breakdown, which stabilizes the system to form very small gaps in the network~15 nm. We report that carbon nanotubes themselves are involved in switching the device to a high resistive state. Calculations reveal that this switching event occurs at ~600 °C, the temperature associated with the oxidation of nanotubes. Therefore, we propose that, in switching to a resistive state, the nanotube oxidizes by extracting oxygen from the substrate.

A new semicustom integrated bipolar amplifier for silicon strip detectors

International Nuclear Information System (INIS)

Zimmerman, T.

1989-01-01

The QPA02 is a four channel DC coupled two stage transimpedance amplifier designed at Fermilab on a semicustom linear array (Quickchip 2S) manufactured by Tektronix. The chip was developed as a silicon strip amplifier but may have other applications as well. Each channel consists of a preamplifier and a second stage amplifier/sharper with differential output which can directly drive a transmission line (90 to 140 ohms). External bypass capacitors are the only discrete components required. QPA02 has been tested and demonstrated to be an effective silicon strip amplifier. Other applications may exist which can use this amplifier or a modified version of this amplifier. For example, another design is now in progress for a wire chamber amplifier, QPA03, to be reported later. Only a relatively small effort was required to modify the design and layout for this application. 11 figs

The mid-IR silicon photonics sensor platform (Conference Presentation)

Science.gov (United States)

Kimerling, Lionel; Hu, Juejun; Agarwal, Anuradha M.

2017-02-01

Advances in integrated silicon photonics are enabling highly connected sensor networks that offer sensitivity, selectivity and pattern recognition. Cost, performance and the evolution path of the so-called `Internet of Things' will gate the proliferation of these networks. The wavelength spectral range of 3-8um, commonly known as the mid-IR, is critical to specificity for sensors that identify materials by detection of local vibrational modes, reflectivity and thermal emission. For ubiquitous sensing applications in this regime, the sensors must move from premium to commodity level manufacturing volumes and cost. Scaling performance/cost is critically dependent on establishing a minimum set of platform attributes for point, wearable, and physical sensing. Optical sensors are ideal for non-invasive applications. Optical sensor device physics involves evanescent or intra-cavity structures for applied to concentration, interrogation and photo-catalysis functions. The ultimate utility of a platform is dependent on sample delivery/presentation modalities; system reset, recalibration and maintenance capabilities; and sensitivity and selectivity performance. The attributes and performance of a unified Glass-on-Silicon platform has shown good prospects for heterogeneous integration on materials and devices using a low cost process flow. Integrated, single mode, silicon photonic platforms offer significant performance and cost advantages, but they require discovery and qualification of new materials and process integration schemes for the mid-IR. Waveguide integrated light sources based on rare earth dopants and Ge-pumped frequency combs have promise. Optical resonators and waveguide spirals can enhance sensitivity. PbTe materials are among the best choices for a standard, waveguide integrated photodetector. Chalcogenide glasses are capable of transmitting mid-IR signals with high transparency. Integrated sensor case studies of i) high sensitivity analyte detection in

CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

KAUST Repository

Ghoneim, Mohamed T.

2014-12-01

Today\\'s mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

KAUST Repository

Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Kutbee, Arwa T.; Hanna, Amir; Hussain, Muhammad Mustafa

2014-01-01

Today's mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

ESSenTIAL: EPIXfab services specifically targeting (SME) industrial takeup of advanced silicon photonics

NARCIS (Netherlands)

Pozo Torres, J.M.; Kumar, P.; Lo Cascio, D.M.R.; Khanna, A.; Dumon, P.; Delbeke, D.; Baets, R.; Fournier, M.; Fedeli, J.-M.; Fulbert, L.; Zimmermann, L.; Tillack, B.; Tian, H.; Aalto, T.; O'Brien, P.; Deptuck, D.; Xu, J.; Zhang, X.; Gale, D.

2012-01-01

ePIXfab brings silicon photonics within reach of European small and medium sized enterprises, thereby building on its track record and its integration into Europractice. To this end, ePIXfab offers affordable access to standardized active and passive silicon photonic IC and packaging technology, a

Silicon Strip Detectors for ATLAS at the HL-LHC Upgrade

CERN Document Server

Hara, K; The ATLAS collaboration

2012-01-01

present ATLAS silicon strip tracker (SCT) and transition radiation tracker(TRT) are to be replaced with new silicon strip detectors as part of the Inner Tracker System (ITK) for the Phase-II upgrade of the Large Hadron Collider, HL-LHC. We have carried out intensive R&D programs based on n+-on-p microstrip detectors to fabricate improved radiation hard strip detectors that can survive the radiation levels corresponding to the integrated luminosity of up to 3000 fb−1. We describe the main specifications for this year’s sensor fabrication and the related R&D results, followed by a description of the candidate schema for module integration.

Silicon fiber with p-n junction

International Nuclear Information System (INIS)

Homa, D.; Cito, A.; Pickrell, G.; Hill, C.; Scott, B.

2014-01-01

In this study, we fabricated a p-n junction in a fiber with a phosphorous doped silicon core and fused silica cladding. The fibers were fabricated via a hybrid process of the core-suction and melt-draw techniques and maintained overall diameters ranging from 200 to 900 μm and core diameters of 20–800 μm. The p-n junction was formed by doping the fiber with boron and confirmed via the current-voltage characteristic. The demonstration of a p-n junction in a melt-drawn silicon core fiber paves the way for the seamless integration of optical and electronic devices in fibers.

Millimeter-wave silicon-based ultra-wideband automotive radar transceivers

Science.gov (United States)

Jain, Vipul

Since the invention of the integrated circuit, the semiconductor industry has revolutionized the world in ways no one had ever anticipated. With the advent of silicon technologies, consumer electronics became light-weight and affordable and paved the way for an Information-Communication-Entertainment age. While silicon almost completely replaced compound semiconductors from these markets, it has been unable to compete in areas with more stringent requirements due to technology limitations. One of these areas is automotive radar sensors, which will enable next-generation collision-warning systems in automobiles. A low-cost implementation is absolutely essential for widespread use of these systems, which leads us to the subject of this dissertation---silicon-based solutions for automotive radars. This dissertation presents architectures and design techniques for mm-wave automotive radar transceivers. Several fully-integrated transceivers and receivers operating at 22-29 GHz and 77-81 GHz are demonstrated in both CMOS and SiGe BiCMOS technologies. Excellent performance is achieved indicating the suitability of silicon technologies for automotive radar sensors. The first CMOS 22-29-GHz pulse-radar receiver front-end for ultra-wideband radars is presented. The chip includes a low noise amplifier, I/Q mixers, quadrature voltage-controlled oscillators, pulse formers and variable-gain amplifiers. Fabricated in 0.18-mum CMOS, the receiver achieves a conversion gain of 35-38.1 dB and a noise figure of 5.5-7.4 dB. Integration of multi-mode multi-band transceivers on a single chip will enable next-generation low-cost automotive radar sensors. Two highly-integrated silicon ICs are designed in a 0.18-mum BiCMOS technology. These designs are also the first reported demonstrations of mm-wave circuits with high-speed digital circuits on the same chip. The first mm-wave dual-band frequency synthesizer and transceiver, operating in the 24-GHz and 77-GHz bands, are demonstrated. All

The LHCb Silicon Tracker - Control system specific tools and challenges

CERN Document Server

Adeva, G; Esperante Pereira, D; Gallas, A; Pazos Alvarez, A; Perez Trigo, E; Rodriguez Perez, P; Saborido, J; Amhis, Y; Bay, A; Blanc, F; Bressieux, J; Conti, G; Dupertuis, F; Fave, V; Frei, R; Gauvin, N; Haefeli, G; Keune, A; Luisier, J; Marki, R; Muresan, R; Nakada, T; Needham, M; Knecht, M; Schneider, O; Tran, M; Anderson, J; Buechler, A; Bursche, A; Chiapolini, N; De Cian, M; Elsasser, C; Salzmann, C; Saornil Gamarra, S; Steiner, S; Steinkamp, O; Straumann, U; van Tilburg, J; Tobin, M; Vollhardt, A; Aquines Gutierrez, O; Bauer, C; Britsch, M; Maciuc, F; Schmelling, M; Voss, H; Iakovenko, V; Okhrimenko, O; Pugatch, V

2014-01-01

The Experiment Control System (ECS) of the LHCb Silicon Tracker sub-detectors is built on the integrated LHCb ECS framework. Although all LHCb sub-detectors use the same framework and follow the same guidelines, the Silicon Tracker control system uses some interesting additional features in terms of operation and monitoring. The main details are described in this document. Since its design, the Silicon Tracker control system has been continuously evolving in a quite disorganized way. Some major maintenance activities are required to be able to keep improving. A description of those activities can also be found here.

Silicone metalization

Energy Technology Data Exchange (ETDEWEB)

Maghribi, Mariam N. (Livermore, CA); Krulevitch, Peter (Pleasanton, CA); Hamilton, Julie (Tracy, CA)

2008-12-09

A system for providing metal features on silicone comprising providing a silicone layer on a matrix and providing a metal layer on the silicone layer. An electronic apparatus can be produced by the system. The electronic apparatus comprises a silicone body and metal features on the silicone body that provide an electronic device.

Formation of porous silicon oxide from substrate-bound silicon rich silicon oxide layers by continuous-wave laser irradiation

Science.gov (United States)

Wang, Nan; Fricke-Begemann, Th.; Peretzki, P.; Ihlemann, J.; Seibt, M.

2018-03-01

Silicon nanocrystals embedded in silicon oxide that show room temperature photoluminescence (PL) have great potential in silicon light emission applications. Nanocrystalline silicon particle formation by laser irradiation has the unique advantage of spatially controlled heating, which is compatible with modern silicon micro-fabrication technology. In this paper, we employ continuous wave laser irradiation to decompose substrate-bound silicon-rich silicon oxide films into crystalline silicon particles and silicon dioxide. The resulting microstructure is studied using transmission electron microscopy techniques with considerable emphasis on the formation and properties of laser damaged regions which typically quench room temperature PL from the nanoparticles. It is shown that such regions consist of an amorphous matrix with a composition similar to silicon dioxide which contains some nanometric silicon particles in addition to pores. A mechanism referred to as "selective silicon ablation" is proposed which consistently explains the experimental observations. Implications for the damage-free laser decomposition of silicon-rich silicon oxides and also for controlled production of porous silicon dioxide films are discussed.

Towards micro-assembly of hybrid MOEMS components on a reconfigurable silicon free-space micro-optical bench

International Nuclear Information System (INIS)

Bargiel, S; Gorecki, C; Rabenorosoa, K; Clévy, C; Lutz, P

2010-01-01

The 3D integration of hybrid chips is a viable approach for the micro-optical technologies to reduce the costs of assembly and packaging. In this paper a technology platform for the hybrid integration of MOEMS components on a reconfigurable silicon free-space micro-optical bench (FS-MOB) is presented. In this approach a desired optical component (e.g. micromirror, microlens) is integrated with a removable and adjustable silicon holder which can be manipulated, aligned and fixed in the precisely etched rail of the silicon baseplate by use of a robotic micro-assembly station. An active-based gripping system allows modification of the holder position on the baseplate with nanometre precision. The fabrication processes of the micromachined parts of the micro-optical bench, based on bulk micromachining of standard silicon wafer and SOI wafer, are described. The successful assembly of the holders, equipped with a micromirror and a refractive glass ball microlens, on the baseplate rail is demonstrated.

Dry Etch Black Silicon with Low Surface Damage: Effect of Low Capacitively Coupled Plasma Power

DEFF Research Database (Denmark)

Iandolo, Beniamino; Plakhotnyuk, Maksym; Gaudig, Maria

2017-01-01

Black silicon fabricated by reactive ion etch (RIE) is promising for integration into silicon solar cells thanks to its excellent light trapping ability. However, intensive ion bombardment during the RIE induces surface damage, which results in enhanced surface recombination velocity. Here, we pr...... carrier lifetime thanks to reduced ion energy. Surface passivation using atomic layer deposition of Al2O3 improves the effective lifetime to 7.5 ms and 0.8 ms for black silicon n- and p-type wafers, respectively.......Black silicon fabricated by reactive ion etch (RIE) is promising for integration into silicon solar cells thanks to its excellent light trapping ability. However, intensive ion bombardment during the RIE induces surface damage, which results in enhanced surface recombination velocity. Here, we...... present a RIE optimization leading to reduced surface damage while retaining excellent light trapping and low reflectivity. In particular, we demonstrate that the reduction of the capacitively coupled power during reactive ion etching preserves a reflectance below 1% and improves the effective minority...

A 12-bit SAR ADC integrated on a multichannel silicon drift detector readout IC

Energy Technology Data Exchange (ETDEWEB)

Schembari, F., E-mail: filippo.schembari@polimi.it [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, via Golgi 40, 20133 Milano (Italy); INFN, Sezione di Milano, via Celoria 16, 20133 Milano (Italy); Bellotti, G.; Fiorini, C. [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, via Golgi 40, 20133 Milano (Italy); INFN, Sezione di Milano, via Celoria 16, 20133 Milano (Italy)

2016-07-11

A 12-bit analog-to-digital converter (ADC) addressed to Silicon-Drift Detectors (SDDs) multichannel readout ASICs for X- and gamma-ray applications is presented. Aiming at digitizing output multiplexed data from the upstream analog filters banks, the converter must ensure 11-bit accuracy and a sampling frequency of about 5 MS/s. The ADC architecture is the charge-redistribution (CR) successive-approximation register (SAR). A fully differential topology has also been chosen for better rejection of common-mode noise and disturbances. The internal DAC is made of binary-scaled capacitors, whose bottom plates are switched by the SAR logic to perform the binary search of the analog input value by means of the monotonic switching scheme. The A/D converter is integrated on SFERA, a multichannel ASIC fabricated in a standard CMOS 0.35 μm 3.3 V technology and it occupies an area of 0.42 mm{sup 2}. Simulated static performance shows monotonicity over the whole input–output characteristic. The description of the circuit topology and of inner blocks architectures together with the experimental characterization is here presented. - Highlights: • X- and γ-ray spectroscopy front-ends need to readout a high number of detectors. • Design efforts are increasingly oriented to compact and low-power ASICs. • A possible solution is the on-chip integration of the analog-to-digital converter. • A 12-bit CR successive-approximation-register ADC has been developed. • It is a suitable candidate as the digitizer to be integrated in multichannel ASICs.

Silicon photo-multiplier radiation hardness tests with a beam controlled neutron source

International Nuclear Information System (INIS)

Angelone, M.; Pillon, M.; Faccini, R.; Pinci, D.; Baldini, W.; Calabrese, R.; Cibinetto, G.; Cotta Ramusino, A.; Malaguti, R.; Pozzati, M.

2010-01-01

Radiation hardness tests were performed at the Frascati Neutron Generator on silicon Photo-Multipliers that were made of semiconductor photon detectors built from a square matrix of avalanche photo-diodes on a silicon substrate. Several samples from different manufacturers have been irradiated, integrating up to 7x10 10 1-MeV-equivalent neutrons per cm 2 . Detector performance was recorded during the neutron irradiation, and a gradual deterioration of their properties began after an integrated fluence of the order of 10 8 1-MeV-equivalent neutrons per cm 2 was reached.

Quantum interference and manipulation of entanglement in silicon wire waveguide quantum circuits

International Nuclear Information System (INIS)

Bonneau, D; Engin, E; O'Brien, J L; Thompson, M G; Ohira, K; Suzuki, N; Yoshida, H; Iizuka, N; Ezaki, M; Natarajan, C M; Tanner, M G; Hadfield, R H; Dorenbos, S N; Zwiller, V

2012-01-01

Integrated quantum photonic waveguide circuits are a promising approach to realizing future photonic quantum technologies. Here, we present an integrated photonic quantum technology platform utilizing the silicon-on-insulator material system, where quantum interference and the manipulation of quantum states of light are demonstrated in components orders of magnitude smaller than previous implementations. Two-photon quantum interference is presented in a multi-mode interference coupler, and the manipulation of entanglement is demonstrated in a Mach-Zehnder interferometer, opening the way to an all-silicon photonic quantum technology platform. (paper)

Test Structures For Bumpy Integrated Circuits

Science.gov (United States)

Buehler, Martin G.; Sayah, Hoshyar R.

1989-01-01

Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

A thermal model for amorphous silicon photovoltaic integrated in ETFE cushion roofs

International Nuclear Information System (INIS)

Zhao, Bing; Chen, Wujun; Hu, Jianhui; Qiu, Zhenyu; Qu, Yegao; Ge, Binbin

2015-01-01

Highlights: • A thermal model is proposed to estimate temperature of a-Si PV integrated in ETFE cushion. • Nonlinear equation is solved by Runge–Kutta method integrated in a new program. • Temperature profiles varying with weather conditions are obtained and analyzed. • Numerical results are in good line with experimental results with coefficients of 0.821–0.985. • Reasons for temperature difference of 0.9–4.6 K are solar irradiance and varying parameters. - Abstract: Temperature characteristics of amorphous silicon photovoltaic (a-Si PV) integrated in building roofs (e.g. the ETFE cushions) are indispensible for evaluating the thermal performances of a-Si PV and buildings. To investigate the temperature characteristics and temperature value, field experiments and numerical modeling were performed and compared in this paper. An experimental mock-up composed of a-Si PV and a three-layer ETFE cushion structure was constructed and experiments were carried out under four typical weather conditions (winter sunny, winter cloudy, summer sunny and summer cloudy). The measured solar irradiance and air temperature were used as the real weather conditions for the thermal model. On the other side, a theoretical thermal model was developed based on energy balance equation which was expressed as that absorbed energy was equal to converted energy and energy loss. The corresponding differential equation of PV temperature varying with weather conditions was solved by the Runge–Kutta method. The comparisons between the experimental and numerical results were focusing on the temperature characteristics and temperature value. For the temperature characteristics, good agreement was obtained by correlation analysis with the coefficients of 0.821–0.985, which validated the feasibility of the thermal model. For the temperature value, the temperature difference between the experimental and numerical results was only 0.9–4.6 K and the reasons could be the dramatical

Silicon nanophotonics for scalable quantum coherent feedback networks

International Nuclear Information System (INIS)

Sarovar, Mohan; Brif, Constantin; Soh, Daniel B.S.; Cox, Jonathan; DeRose, Christopher T.; Camacho, Ryan; Davids, Paul

2016-01-01

The emergence of coherent quantum feedback control (CQFC) as a new paradigm for precise manipulation of dynamics of complex quantum systems has led to the development of efficient theoretical modeling and simulation tools and opened avenues for new practical implementations. This work explores the applicability of the integrated silicon photonics platform for implementing scalable CQFC networks. If proven successful, on-chip implementations of these networks would provide scalable and efficient nanophotonic components for autonomous quantum information processing devices and ultra-low-power optical processing systems at telecommunications wavelengths. We analyze the strengths of the silicon photonics platform for CQFC applications and identify the key challenges to both the theoretical formalism and experimental implementations. In particular, we determine specific extensions to the theoretical CQFC framework (which was originally developed with bulk-optics implementations in mind), required to make it fully applicable to modeling of linear and nonlinear integrated optics networks. We also report the results of a preliminary experiment that studied the performance of an in situ controllable silicon nanophotonic network of two coupled cavities and analyze the properties of this device using the CQFC formalism. (orig.)

Silicon nanophotonics for scalable quantum coherent feedback networks

Energy Technology Data Exchange (ETDEWEB)

Sarovar, Mohan; Brif, Constantin [Sandia National Laboratories, Livermore, CA (United States); Soh, Daniel B.S. [Sandia National Laboratories, Livermore, CA (United States); Stanford University, Edward L. Ginzton Laboratory, Stanford, CA (United States); Cox, Jonathan; DeRose, Christopher T.; Camacho, Ryan; Davids, Paul [Sandia National Laboratories, Albuquerque, NM (United States)

2016-12-15

The emergence of coherent quantum feedback control (CQFC) as a new paradigm for precise manipulation of dynamics of complex quantum systems has led to the development of efficient theoretical modeling and simulation tools and opened avenues for new practical implementations. This work explores the applicability of the integrated silicon photonics platform for implementing scalable CQFC networks. If proven successful, on-chip implementations of these networks would provide scalable and efficient nanophotonic components for autonomous quantum information processing devices and ultra-low-power optical processing systems at telecommunications wavelengths. We analyze the strengths of the silicon photonics platform for CQFC applications and identify the key challenges to both the theoretical formalism and experimental implementations. In particular, we determine specific extensions to the theoretical CQFC framework (which was originally developed with bulk-optics implementations in mind), required to make it fully applicable to modeling of linear and nonlinear integrated optics networks. We also report the results of a preliminary experiment that studied the performance of an in situ controllable silicon nanophotonic network of two coupled cavities and analyze the properties of this device using the CQFC formalism. (orig.)

Control and data acquisition electronics for the CDF Silicon Vertex Detector

Energy Technology Data Exchange (ETDEWEB)

Turner, K.J.; Nelson, C.A.; Shaw, T.M.; Wesson, T.R.

1991-11-01

A control and data acquisition system has been designed for the CDF Silicon Vertex Detector (SVX) at Fermilab. The system controls the operation of the SVX Rev D integrated circuit (SVX IC) that is used to instrument a 46,000 microstrip silicon detector. The system consists of a Fastbus Sequencer, a Crate Controller and Digitizer modules. 11 refs., 6 figs., 3 tabs.

Control and data acquisition electronics for the CDF Silicon Vertex Detector

International Nuclear Information System (INIS)

Turner, K.J.; Nelson, C.A.; Shaw, T.M.; Wesson, T.R.

1991-11-01

A control and data acquisition system has been designed for the CDF Silicon Vertex Detector (SVX) at Fermilab. The system controls the operation of the SVX Rev D integrated circuit (SVX IC) that is used to instrument a 46,000 microstrip silicon detector. The system consists of a Fastbus Sequencer, a Crate Controller and Digitizer modules. 11 refs., 6 figs., 3 tabs

Control and data acquisition electronics for the CDF silicon vertex detector

International Nuclear Information System (INIS)

urner, K.J.; Nelson, C.A.; Shaw, T.M.; Wesson, T.R.

1992-01-01

This paper reports on a control and data acquisition system that has been designed for the CDF Silicon Vertex Detector (SVX) at Fermilab. The system controls the operation of the SVX Rev D integrated circuit (SVX IC) that is used to instrument a 46,000 microstrip silicon detector. The system consists of a Fastbus Sequencer, a Crate Controller and Digitizer modules

Oxygen defect processes in silicon and silicon germanium

KAUST Repository

Chroneos, A.

2015-06-18

Silicon and silicon germanium are the archetypical elemental and alloy semiconductor materials for nanoelectronic, sensor, and photovoltaic applications. The investigation of radiation induced defects involving oxygen, carbon, and intrinsic defects is important for the improvement of devices as these defects can have a deleterious impact on the properties of silicon and silicon germanium. In the present review, we mainly focus on oxygen-related defects and the impact of isovalent doping on their properties in silicon and silicon germanium. The efficacy of the isovalent doping strategies to constrain the oxygen-related defects is discussed in view of recent infrared spectroscopy and density functional theory studies.

Oxygen defect processes in silicon and silicon germanium

KAUST Repository

Chroneos, A.; Sgourou, E. N.; Londos, C. A.; Schwingenschlö gl, Udo

2015-01-01

Silicon and silicon germanium are the archetypical elemental and alloy semiconductor materials for nanoelectronic, sensor, and photovoltaic applications. The investigation of radiation induced defects involving oxygen, carbon, and intrinsic defects is important for the improvement of devices as these defects can have a deleterious impact on the properties of silicon and silicon germanium. In the present review, we mainly focus on oxygen-related defects and the impact of isovalent doping on their properties in silicon and silicon germanium. The efficacy of the isovalent doping strategies to constrain the oxygen-related defects is discussed in view of recent infrared spectroscopy and density functional theory studies.

Silicon Micromachined Microlens Array for THz Antennas

Science.gov (United States)

Lee, Choonsup; Chattopadhyay, Goutam; Mehdi, IImran; Gill, John J.; Jung-Kubiak, Cecile D.; Llombart, Nuria

2013-01-01

5 5 silicon microlens array was developed using a silicon micromachining technique for a silicon-based THz antenna array. The feature of the silicon micromachining technique enables one to microfabricate an unlimited number of microlens arrays at one time with good uniformity on a silicon wafer. This technique will resolve one of the key issues in building a THz camera, which is to integrate antennas in a detector array. The conventional approach of building single-pixel receivers and stacking them to form a multi-pixel receiver is not suited at THz because a single-pixel receiver already has difficulty fitting into mass, volume, and power budgets, especially in space applications. In this proposed technique, one has controllability on both diameter and curvature of a silicon microlens. First of all, the diameter of microlens depends on how thick photoresist one could coat and pattern. So far, the diameter of a 6- mm photoresist microlens with 400 m in height has been successfully microfabricated. Based on current researchers experiences, a diameter larger than 1-cm photoresist microlens array would be feasible. In order to control the curvature of the microlens, the following process variables could be used: 1. Amount of photoresist: It determines the curvature of the photoresist microlens. Since the photoresist lens is transferred onto the silicon substrate, it will directly control the curvature of the silicon microlens. 2. Etching selectivity between photoresist and silicon: The photoresist microlens is formed by thermal reflow. In order to transfer the exact photoresist curvature onto silicon, there needs to be etching selectivity of 1:1 between silicon and photoresist. However, by varying the etching selectivity, one could control the curvature of the silicon microlens. The figure shows the microfabricated silicon microlens 5 x5 array. The diameter of the microlens located in the center is about 2.5 mm. The measured 3-D profile of the microlens surface has a

Electronic band-gap modified passive silicon optical modulator at telecommunications wavelengths.

Science.gov (United States)

Zhang, Rui; Yu, Haohai; Zhang, Huaijin; Liu, Xiangdong; Lu, Qingming; Wang, Jiyang

2015-11-13

The silicon optical modulator is considered to be the workhorse of a revolution in communications. In recent years, the capabilities of externally driven active silicon optical modulators have dramatically improved. Self-driven passive modulators, especially passive silicon modulators, possess advantages in compactness, integration, low-cost, etc. Constrained by a large indirect band-gap and sensitivity-related loss, the passive silicon optical modulator is scarce and has been not advancing, especially at telecommunications wavelengths. Here, a passive silicon optical modulator is fabricated by introducing an impurity band in the electronic band-gap, and its nonlinear optics and applications in the telecommunications-wavelength lasers are investigated. The saturable absorption properties at the wavelength of 1.55 μm was measured and indicates that the sample is quite sensitive to light intensity and has negligible absorption loss. With a passive silicon modulator, pulsed lasers were constructed at wavelengths at 1.34 and 1.42 μm. It is concluded that the sensitive self-driven passive silicon optical modulator is a viable candidate for photonics applications out to 2.5 μm.

Temperature and color management of silicon solar cells for building integrated photovoltaic

Science.gov (United States)

Amara, Mohamed; Mandorlo, Fabien; Couderc, Romain; Gerenton, Félix; Lemiti, Mustapha

2018-01-01

Color management of integrated photovoltaics must meet two criteria of performance: provide maximum conversion efficiency and allow getting the chosen colors with an appropriate brightness, more particularly when using side by side solar cells of different colors. As the cooling conditions are not necessarily optimal, we need to take into account the influence of the heat transfer and temperature. In this article, we focus on the color space and brightness achieved by varying the antireflective properties of flat silicon solar cells. We demonstrate that taking into account the thermal effects allows freely choosing the color and adapting the brightness with a small impact on the conversion efficiency, except for dark blue solar cells. This behavior is especially true when heat exchange by convection is low. Our optical simulations show that the perceived color, for single layer ARC, is not varying with the position of the observer, whatever the chosen color. The use of a double layer ARC adds flexibility to tune the wanted color since the color space is greatly increased in the green and yellow directions. Last, choosing the accurate material allows both bright colors and high conversion efficiency at the same time.

Temperature and color management of silicon solar cells for building integrated photovoltaic

Directory of Open Access Journals (Sweden)

Amara Mohamed

2018-01-01

Full Text Available Color management of integrated photovoltaics must meet two criteria of performance: provide maximum conversion efficiency and allow getting the chosen colors with an appropriate brightness, more particularly when using side by side solar cells of different colors. As the cooling conditions are not necessarily optimal, we need to take into account the influence of the heat transfer and temperature. In this article, we focus on the color space and brightness achieved by varying the antireflective properties of flat silicon solar cells. We demonstrate that taking into account the thermal effects allows freely choosing the color and adapting the brightness with a small impact on the conversion efficiency, except for dark blue solar cells. This behavior is especially true when heat exchange by convection is low. Our optical simulations show that the perceived color, for single layer ARC, is not varying with the position of the observer, whatever the chosen color. The use of a double layer ARC adds flexibility to tune the wanted color since the color space is greatly increased in the green and yellow directions. Last, choosing the accurate material allows both bright colors and high conversion efficiency at the same time.

Mechanical engineering and design of silicon-based particle tracking devices

International Nuclear Information System (INIS)

Miller, W.O.; Thompson, T.C.; Gamble, M.T.; Reid, R.S.; Woloshun, K.A.; Dransfield, G.D.; Ziock, H.J.

1990-01-01

The Mechanical Engineering and Electronics Division of the Los Alamos National Laboratory has been investigating silicon-based particle tracking device technology as part of the Superconducting Super Collider-sponsored silicon subsystem collaboration. Structural, thermal, and materials issues have been addressed. This paper discussed detector structural integrity and stability, including detailed finite element models of the silicon chip support and predictive methods used in designing with advanced composite materials. Electronic thermal loading and efficient dissipation of such energy using heat pipe technology has been investigated. The use of materials whose coefficients of thermal expansion are engineered to match silicon or to be near zero, as appropriate, have been explored. Material analysis and test results from radiation, chemical, and static loading are compared with analytical predictions and discussed. 1 ref., 2 figs., 1 tab

A study of luminescence from silicon-rich silica fabricated by plasma enhanced chemical vapour deposition

International Nuclear Information System (INIS)

Trwoga, P.F.

1998-01-01

Silicon is the most studied electronic material known to man and dominates the electronics industry in its use as a semiconductors for nearly all integrated electronics. However, optoelectronics is almost entirely based on III-V materials. This technology is used because silicon is a very inefficient light source, whereas the III-V band structure can lend itself to efficient light emission by electron injection. However, due to the overwhelming dominance of silicon based electronics it is still a highly desirable goal to generate light efficiently from silicon based materials. Recently, studies have demonstrated that efficient visible luminescence can be obtained from certain novel forms of silicon. These materials include porous silicon, hydrogenated amorphous silicon, and silicon-rich silica (SiO x x x is studied in detail; in addition, electroluminescence and rare-earth doping of silicon-rich silica is also addressed. (author)

Photoconductance-calibrated photoluminescence lifetime imaging of crystalline silicon

International Nuclear Information System (INIS)

Herlufsen, Sandra; Schmidt, Jan; Hinken, David; Bothe, Karsten; Brendel, Rolf

2008-01-01

We use photoluminescence (PL) measurements by a silicon charge-coupled device camera to generate high-resolution lifetime images of multicrystalline silicon wafers. Absolute values of the excess carrier density are determined by calibrating the PL image by means of contactless photoconductance measurements. The photoconductance setup is integrated in the camera-based PL setup and therefore identical measurement conditions are realised. We demonstrate the validity of this method by comparison with microwave-detected photoconductance decay measurements. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (Abstract Copyright [2008], Wiley Periodicals, Inc.)

Integration of silicon-based neural probes and micro-drive arrays for chronic recording of large populations of neurons in behaving animals.

Science.gov (United States)

Michon, Frédéric; Aarts, Arno; Holzhammer, Tobias; Ruther, Patrick; Borghs, Gustaaf; McNaughton, Bruce; Kloosterman, Fabian

2016-08-01

Understanding how neuronal assemblies underlie cognitive function is a fundamental question in system neuroscience. It poses the technical challenge to monitor the activity of populations of neurons, potentially widely separated, in relation to behaviour. In this paper, we present a new system which aims at simultaneously recording from a large population of neurons from multiple separated brain regions in freely behaving animals. The concept of the new device is to combine the benefits of two existing electrophysiological techniques, i.e. the flexibility and modularity of micro-drive arrays and the high sampling ability of electrode-dense silicon probes. Newly engineered long bendable silicon probes were integrated into a micro-drive array. The resulting device can carry up to 16 independently movable silicon probes, each carrying 16 recording sites. Populations of neurons were recorded simultaneously in multiple cortical and/or hippocampal sites in two freely behaving implanted rats. Current approaches to monitor neuronal activity either allow to flexibly record from multiple widely separated brain regions (micro-drive arrays) but with a limited sampling density or to provide denser sampling at the expense of a flexible placement in multiple brain regions (neural probes). By combining these two approaches and their benefits, we present an alternative solution for flexible and simultaneous recordings from widely distributed populations of neurons in freely behaving rats.

Multi-Step Deep Reactive Ion Etching Fabrication Process for Silicon-Based Terahertz Components

Science.gov (United States)

Jung-Kubiak, Cecile (Inventor); Reck, Theodore (Inventor); Chattopadhyay, Goutam (Inventor); Perez, Jose Vicente Siles (Inventor); Lin, Robert H. (Inventor); Mehdi, Imran (Inventor); Lee, Choonsup (Inventor); Cooper, Ken B. (Inventor); Peralta, Alejandro (Inventor)

2016-01-01

A multi-step silicon etching process has been developed to fabricate silicon-based terahertz (THz) waveguide components. This technique provides precise dimensional control across multiple etch depths with batch processing capabilities. Nonlinear and passive components such as mixers and multipliers waveguides, hybrids, OMTs and twists have been fabricated and integrated into a small silicon package. This fabrication technique enables a wafer-stacking architecture to provide ultra-compact multi-pixel receiver front-ends in the THz range.

Design of photonic phased array switches using nano electromechanical systems on silicon-on-insulator integration platform

Science.gov (United States)

Hussein, Ali Abdulsattar

This thesis presents an introduction to the design and simulation of a novel class of integrated photonic phased array switch elements. The main objective is to use nano-electromechanical (NEMS) based phase shifters of cascaded under-etched slot nanowires that are compact in size and require a small amount of power to operate them. The structure of the switch elements is organized such that it brings the phase shifting elements to the exterior sides of the photonic circuits. The transition slot couplers, used to interconnect the phase shifters, are designed to enable biasing one of the silicon beams of each phase shifter from an electrode located at the side of the phase shifter. The other silicon beam of each phase shifter is biased through the rest of the silicon structure of the switch element, which is taken as a ground. Phased array switch elements ranging from 2x2 up to 8x8 multiple-inputs/multiple-outputs (MIMO) are conveniently designed within reasonable footprints native to the current fabrication technologies. Chapter one presents the general layout of the various designs of the switch elements and demonstrates their novel features. This demonstration will show how waveguide disturbances in the interconnecting network from conventional switch elements can be avoided by adopting an innovative design. Some possible applications for the designed switch elements of different sizes and topologies are indicated throughout the chapter. Chapter two presents the design of the multimode interference (MMI) couplers used in the switch elements as splitters, combiners and waveguide crossovers. Simulation data and design methodologies for the multimode couplers of interest are detailed in this chapter. Chapter three presents the design and analysis of the NEMS-operated phase shifters. Both simulations and numerical analysis are utilized in the design of a 0°-180° capable NEMS-operated phase shifter. Additionally, the response of some of the designed photonic phased

The European BOOM project :silicon photonics for high-capacity optical packet routers

NARCIS (Netherlands)

Stampoulidis, L.; Vyrsokinos, K.; Voigt, K.; Zimmermann, L.; Gomez-Agis, F.; Dorren, H.J.S.; Sheng, Z.; Thourhout, Van D.; Moerl, L.; Kreissl, J.; Sedighi, B.; Scheytt, J.C.; Pagano, A.; Riccardi, E.

2010-01-01

During the past years, monolithic integration in InP has been the driving force for the realization of integrated photonic routing systems. The advent of silicon as a basis for cost-effective integration and its potential blend with III–V material is now opening exciting opportunities for the

Thin film silicon photovoltaics: Architectural perspectives and technological issues

Energy Technology Data Exchange (ETDEWEB)

Mercaldo, Lucia Vittoria; Addonizio, Maria Luisa; Noce, Marco Della; Veneri, Paola Delli; Scognamiglio, Alessandra; Privato, Carlo [ENEA, Portici Research Center, Piazzale E. Fermi, 80055 Portici (Napoli) (Italy)

2009-10-15

Thin film photovoltaics is a particularly attractive technology for building integration. In this paper, we present our analysis on architectural issues and technological developments of thin film silicon photovoltaics. In particular, we focus on our activities related to transparent and conductive oxide (TCO) and thin film amorphous and microcrystalline silicon solar cells. The research on TCO films is mainly dedicated to large-area deposition of zinc oxide (ZnO) by low pressure-metallorganic chemical vapor deposition. ZnO material, with a low sheet resistance (<8 {omega}/sq) and with an excellent transmittance (>82%) in the whole wavelength range of photovoltaic interest, has been obtained. ''Micromorph'' tandem devices, consisting of an amorphous silicon top cell and a microcrystalline silicon bottom cell, are fabricated by using the very high frequency plasma enhanced chemical vapor deposition technique. An initial efficiency of 11.1% (>10% stabilized) has been obtained. (author)

CMOS and BiCMOS process integration and device characterization

CERN Document Server

El-Kareh, Badih

2009-01-01

Covers both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. This book also covers silicon devices and integrated process technologies. It discusses modern silicon devices, their characteristics, and interactions with process parameters.

The CMS silicon tracker

International Nuclear Information System (INIS)

D'Alessandro, R.; Biggeri, U.; Bruzzi, M.; Catacchini, E.; Civinini, C.; Focardi, E.; Lenzi, M.; Loreti, M.; Meschini, M.; Parrini, G.; Pieri, M.; Albergo, S.; Boemi, D.; Potenza, R.; Tricomi, A.; Angarano, M.; Creanza, D.; Palma, M. de; Fiore, L.; Maggi, G.; My, S.; Raso, G.; Selvaggi, G.; Tempesta, P.; Azzi, P.; Bacchetta, N.; Bisello, D.; Candelori, A.; Castro, A.; Da Rold, M.; Giraldo, A.; Martignon, G.; Paccagnella, A.; Stavitsky, I.; Babucci, E.; Bartalini, P.; Bilei, G.M.; Checcucci, B.; Ciampolini, P.; Lariccia, P.; Mantovani, G.; Passeri, D.; Santocchia, A.; Servoli, L.; Wang, Y.; Bagliesi, G.; Basti, A.; Bosi, F.; Borello, L.; Bozzi, C.; Castaldi, R.; Dell'Orso, R.; Giassi, A.; Messineo, A.; Palla, F.; Raffaelli, F.; Sguazzoni, G.; Starodumov, A.; Tonelli, G.; Vannini, C.; Verdini, P.G.; Xie, Z.; Breuker, H.; Caner, A.; Elliott-Peisert, A.; Feld, L.; Glessing, B.; Hammerstrom, R.; Huhtinen, M.; Mannelli, M.; Marchioro, A.; Schmitt, B.; Stefanini, G.; Connotte, J.; Gu, W.H.; Luebelsmeyer, K.; Pandoulas, D.; Siedling, R.; Wittmer, B.; Della Marina, R.; Freudenreich, K.; Lustermann, W.; Viertel, G.; Eklund, C.; Karimaeki, V.; Skog, K.; French, M.; Hall, G.; Mc Evoy, B.; Raymond, M.; Hrubec, J.; Krammer, M.; Piperov, S.; Tuuva, T.; Watts, S.; Silvestris, L.

1998-01-01

The new silicon tracker layout (V4) is presented. The system aspects of the construction are discussed together with the expected tracking performance. Because of the high radiation environment in which the detectors will operate, particular care has been devoted to the study of the characteristics of heavily irradiated detectors. This includes studies on performance (charge collection, cluster size, resolution, efficiency) as a function of the bias voltage, integrated fluence, incidence angle and temperature. (author)

An integrated nonlinear optical loop mirror in silicon photonics for all-optical signal processing

Directory of Open Access Journals (Sweden)

Zifei Wang

2018-02-01

Full Text Available The nonlinear optical loop mirror (NOLM has been studied for several decades and has attracted considerable attention for applications in high data rate optical communications and all-optical signal processing. The majority of NOLM research has focused on silica fiber-based implementations. While various fiber designs have been considered to increase the nonlinearity and manage dispersion, several meters to hundreds of meters of fiber are still required. On the other hand, there is increasing interest in developing photonic integrated circuits for realizing signal processing functions. In this paper, we realize the first-ever passive integrated NOLM in silicon photonics and demonstrate its application for all-optical signal processing. In particular, we show wavelength conversion of 10 Gb/s return-to-zero on-off keying (RZ-OOK signals over a wavelength range of 30 nm with error-free operation and a power penalty of less than 2.5 dB, we achieve error-free nonreturn to zero (NRZ-to-RZ modulation format conversion at 10 Gb/s also with a power penalty of less than 2.8 dB, and we obtain error-free all-optical time-division demultiplexing of a 40 Gb/s RZ-OOK data signal into its 10 Gb/s tributary channels with a maximum power penalty of 3.5 dB.

A prototype silicon detector system for space cosmic-ray charge measurement

Science.gov (United States)

Zhang, Fei; Fan, Rui-Rui; Peng, Wen-Xi; Dong, Yi-Fa; Gong, Ke; Liang, Xiao-Hua; Liu, Ya-Qing; Wang, Huan-Yu

2014-06-01

A readout electronics system used for space cosmic-ray charge measurement for multi-channel silicon detectors is introduced in this paper, including performance measurements. A 64-channel charge sensitive ASIC (VA140) from the IDEAS company is used. With its features of low power consumption, low noise, large dynamic range, and high integration, it can be used in future particle detecting experiments based on silicon detectors.

Printable nanostructured silicon solar cells for high-performance, large-area flexible photovoltaics.

Science.gov (United States)

Lee, Sung-Min; Biswas, Roshni; Li, Weigu; Kang, Dongseok; Chan, Lesley; Yoon, Jongseung

2014-10-28

Nanostructured forms of crystalline silicon represent an attractive materials building block for photovoltaics due to their potential benefits to significantly reduce the consumption of active materials, relax the requirement of materials purity for high performance, and hence achieve greatly improved levelized cost of energy. Despite successful demonstrations for their concepts over the past decade, however, the practical application of nanostructured silicon solar cells for large-scale implementation has been hampered by many existing challenges associated with the consumption of the entire wafer or expensive source materials, difficulties to precisely control materials properties and doping characteristics, or restrictions on substrate materials and scalability. Here we present a highly integrable materials platform of nanostructured silicon solar cells that can overcome these limitations. Ultrathin silicon solar microcells integrated with engineered photonic nanostructures are fabricated directly from wafer-based source materials in configurations that can lower the materials cost and can be compatible with deterministic assembly procedures to allow programmable, large-scale distribution, unlimited choices of module substrates, as well as lightweight, mechanically compliant constructions. Systematic studies on optical and electrical properties, photovoltaic performance in experiments, as well as numerical modeling elucidate important design rules for nanoscale photon management with ultrathin, nanostructured silicon solar cells and their interconnected, mechanically flexible modules, where we demonstrate 12.4% solar-to-electric energy conversion efficiency for printed ultrathin (∼ 8 μm) nanostructured silicon solar cells when configured with near-optimal designs of rear-surface nanoposts, antireflection coating, and back-surface reflector.

Silicon epitaxy on textured double layer porous silicon by LPCVD

International Nuclear Information System (INIS)

Cai Hong; Shen Honglie; Zhang Lei; Huang Haibin; Lu Linfeng; Tang Zhengxia; Shen Jiancang

2010-01-01

Epitaxial silicon thin film on textured double layer porous silicon (DLPS) was demonstrated. The textured DLPS was formed by electrochemical etching using two different current densities on the silicon wafer that are randomly textured with upright pyramids. Silicon thin films were then grown on the annealed DLPS, using low-pressure chemical vapor deposition (LPCVD). The reflectance of the DLPS and the grown silicon thin films were studied by a spectrophotometer. The crystallinity and topography of the grown silicon thin films were studied by Raman spectroscopy and SEM. The reflectance results show that the reflectance of the silicon wafer decreases from 24.7% to 11.7% after texturing, and after the deposition of silicon thin film the surface reflectance is about 13.8%. SEM images show that the epitaxial silicon film on textured DLPS exhibits random pyramids. The Raman spectrum peaks near 521 cm -1 have a width of 7.8 cm -1 , which reveals the high crystalline quality of the silicon epitaxy.

The processing and potential applications of porous silicon

Energy Technology Data Exchange (ETDEWEB)

Syyuan Shieh.

1992-07-01

Stability of a cylindrical pore under the influence of surface energy is important for porous silicon (PS) processing in the integrated circuit industry. Once the zig-zag cylindrical pores of porous silicon or oxidized porous silicon (OPS) are unstable and breakup into rows of isolated spherical pores, oxidation of PS and densification/nitridation of OPS become difficult. Swing to difficulty transport of reactant gas (O{sub 2}, NH{sub 3}) or the trapped gas (for densification of OPS). A first order analysis of the stability of a cylindrical pore or cylinder is considered first. Growth of small sinusoidal perturbations by viscous flow or evaporation/condensation result in dependence of perturbation growth rate on perturbation wavelength. Rapid thermal oxidation (RTO) of porous silicon is proposed as an alternative for the tedious two-step 300 and 800C oxidation process. Transmission electron microscopy, energy dispersive spectroscopy ESCA are used for quality control. Also, rapid thermal nitridation of oxidized porous silicon in ammonia is proposed to enhance OPS resistance to HF solution. Pores breakup of OPS results in a trapped gas problem during densification. Wet helium is proposed as OPS densification ambient gas to shorten densification time. Finally, PS is proposed to be an extrinsic gettering center in silicon wafers. The suppression of oxidation-induced stacking faults is used to demonstrate the gettering ability. Possible mechanism is discussed.

The processing and potential applications of porous silicon

Energy Technology Data Exchange (ETDEWEB)

Shieh, Syyuan [Univ. of California, Berkeley, CA (United States)

1992-07-01

Stability of a cylindrical pore under the influence of surface energy is important for porous silicon (PS) processing in the integrated circuit industry. Once the zig-zag cylindrical pores of porous silicon or oxidized porous silicon (OPS) are unstable and breakup into rows of isolated spherical pores, oxidation of PS and densification/nitridation of OPS become difficult. Swing to difficulty transport of reactant gas (O₂, NH₃) or the trapped gas (for densification of OPS). A first order analysis of the stability of a cylindrical pore or cylinder is considered first. Growth of small sinusoidal perturbations by viscous flow or evaporation/condensation result in dependence of perturbation growth rate on perturbation wavelength. Rapid thermal oxidation (RTO) of porous silicon is proposed as an alternative for the tedious two-step 300 and 800C oxidation process. Transmission electron microscopy, energy dispersive spectroscopy ESCA are used for quality control. Also, rapid thermal nitridation of oxidized porous silicon in ammonia is proposed to enhance OPS resistance to HF solution. Pores breakup of OPS results in a trapped gas problem during densification. Wet helium is proposed as OPS densification ambient gas to shorten densification time. Finally, PS is proposed to be an extrinsic gettering center in silicon wafers. The suppression of oxidation-induced stacking faults is used to demonstrate the gettering ability. Possible mechanism is discussed.

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

Science.gov (United States)

Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

2016-01-21

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

Wurtzite-Phased InP Micropillars Grown on Silicon with Low Surface Recombination Velocity.

Science.gov (United States)

Li, Kun; Ng, Kar Wei; Tran, Thai-Truong D; Sun, Hao; Lu, Fanglu; Chang-Hasnain, Connie J

2015-11-11

The direct growth of III-V nanostructures on silicon has shown great promise in the integration of optoelectronics with silicon-based technologies. Our previous work showed that scaling up nanostructures to microsize while maintaining high quality heterogeneous integration opens a pathway toward a complete photonic integrated circuit and high-efficiency cost-effective solar cells. In this paper, we present a thorough material study of novel metastable InP micropillars monolithically grown on silicon, focusing on two enabling aspects of this technology-the stress relaxation mechanism at the heterogeneous interface and the microstructure surface quality. Aberration-corrected transmission electron microscopy studies show that InP grows directly on silicon without any amorphous layer in between. A set of periodic dislocations was found at the heterointerface, relaxing the 8% lattice mismatch between InP and Si. Single crystalline InP therefore can grow on top of the fully relaxed template, yielding high-quality micropillars with diameters expanding beyond 1 μm. An interesting power-dependence trend of carrier recombination lifetimes was captured for these InP micropillars at room temperature, for the first time for micro/nanostructures. By simply combining internal quantum efficiency with carrier lifetime, we revealed the recombination dynamics of nonradiative and radiative portions separately. A very low surface recombination velocity of 1.1 × 10(3) cm/sec was obtained. In addition, we experimentally estimated the radiative recombination B coefficient of 2.0 × 10(-10) cm(3)/sec for pure wurtzite-phased InP. These values are comparable with those obtained from InP bulk. Exceeding the limits of conventional nanowires, our InP micropillars combine the strengths of both nanostructures and bulk materials and will provide an avenue in heterogeneous integration of III-V semiconductor materials onto silicon platforms.

Extending Moore’s Law for Silicon CMOS using More-Moore and More-than-Moore Technologies

KAUST Repository

Hussain, Aftab M.

2016-12-01

With the advancement of silicon electronics under threat from physical limits to dimensional scaling, the International Technology Roadmap for Semiconductors (ITRS) released a white paper in 2008, detailing the ways in which the semiconductor industry can keep itself continually growing in the twenty-first century. Two distinct paths were proposed: More-Moore and More-than-Moore. While More-Moore approach focuses on the continued use of state-of-the-art, complementary metal oxide semiconductor (CMOS) technology for next generation electronics, More-than-Moore approach calls for a disruptive change in the system architecture and integration strategies. In this doctoral thesis, we investigate both the approaches to obtain performance improvement in the state-of-the-art, CMOS electronics. We present a novel channel material, SiSn, for fabrication of CMOS circuits. This investigation is in line with the More-Moore approach because we are relying on the established CMOS industry infrastructure to obtain an incremental change in the integrated circuit (IC) performance by replacing silicon channel with SiSn. We report a simple, low-cost and CMOS compatible process for obtaining single crystal SiSn wafers. Tin (Sn) is deposited on silicon wafers in the form of a metallic thin film and annealed to facilitate diffusion into the silicon lattice. This diffusion provides for sufficient SiSn layer at the top surface for fabrication of CMOS devices. We report a lowering of band gap and enhanced mobility for SiSn channel MOSFETs compared to silicon control devices. We also present a process for fabrication of vertically integrated flexible silicon to form 3D integrated circuits. This disruptive change in the state-of-the-art, in line with the More-than-Moore approach, promises to increase the performance per area of a silicon chip. We report a process for stacking and bonding these pieces with polymeric bonding and interconnecting them using copper through silicon vias (TSVs). We

Production of electronic grade lunar silicon by disproportionation of silicon difluoride

Science.gov (United States)

Agosto, William N.

1993-01-01

Waldron has proposed to extract lunar silicon by sodium reduction of sodium fluorosilicate derived from reacting sodium fluoride with lunar silicon tetrafluoride. Silicon tetrafluoride is obtained by the action of hydrofluoric acid on lunar silicates. While these reactions are well understood, the resulting lunar silicon is not likely to meet electronic specifications of 5 nines purity. Dale and Margrave have shown that silicon difluoride can be obtained by the action of silicon tetrafluoride on elemental silicon at elevated temperatures (1100-1200 C) and low pressures (1-2 torr). The resulting silicon difluoride will then spontaneously disproportionate into hyperpure silicon and silicon tetrafluoride in vacuum at approximately 400 C. On its own merits, silicon difluoride polymerizes into a tough waxy solid in the temperature range from liquid nitrogen to about 100 C. It is the silicon analog of teflon. Silicon difluoride ignites in moist air but is stable under lunar surface conditions and may prove to be a valuable industrial material that is largely lunar derived for lunar surface applications. The most effective driver for lunar industrialization may be the prospects for industrial space solar power systems in orbit or on the moon that are built with lunar materials. Such systems would require large quantities of electronic grade silicon or compound semiconductors for photovoltaics and electronic controls. Since silicon is the most abundant semimetal in the silicate portion of any solar system rock (approximately 20 wt percent), lunar silicon production is bound to be an important process in such a solar power project. The lunar silicon extraction process is discussed.

Investigating reliability attributes of silicon photovoltaic cells - An overview

Science.gov (United States)

Royal, E. L.

1982-01-01

Reliability attributes are being developed on a wide variety of advanced single-crystal silicon solar cells. Two separate investigations: cell-contact integrity (metal-to-silicon adherence), and cracked cells identified with fracture-strength-reducing flaws are discussed. In the cell-contact-integrity investigation, analysis of contact pull-strength data shows that cell types made with different metallization technologies, i.e., vacuum, plated, screen-printed and soldered, have appreciably different reliability attributes. In the second investigation, fracture strength was measured using Czochralski wafers and cells taken at various stages of processing and differences were noted. Fracture strength, which is believed to be governed by flaws introduced during wafer sawing, was observed to improve (increase) after chemical polishing and other process steps that tend to remove surface and edge flaws.

Amorphous silicon as high index photonic material

Science.gov (United States)

Lipka, T.; Harke, A.; Horn, O.; Amthor, J.; Müller, J.

2009-05-01

Silicon-on-Insulator (SOI) photonics has become an attractive research topic within the area of integrated optics. This paper aims to fabricate SOI-structures for optical communication applications with lower costs compared to standard fabrication processes as well as to provide a higher flexibility with respect to waveguide and substrate material choice. Amorphous silicon is deposited on thermal oxidized silicon wafers with plasma-enhanced chemical vapor deposition (PECVD). The material is optimized in terms of optical light transmission and refractive index. Different a-Si:H waveguides with low propagation losses are presented. The waveguides were processed with CMOS-compatible fabrication technologies and standard DUV-lithography enabling high volume production. To overcome the large mode-field diameter mismatch between incoupling fiber and sub-μm waveguides three dimensional, amorphous silicon tapers were fabricated with a KOH etched shadow mask for patterning. Using ellipsometric and Raman spectroscopic measurements the material properties as refractive index, layer thickness, crystallinity and material composition were analyzed. Rapid thermal annealing (RTA) experiments of amorphous thin films and rib waveguides were performed aiming to tune the refractive index of the deposited a-Si:H waveguide core layer after deposition.

Amorphous silicon detectors in positron emission tomography

Energy Technology Data Exchange (ETDEWEB)

Conti, M. (Istituto Nazionale di Fisica Nucleare, Pisa (Italy) Lawrence Berkeley Lab., CA (USA)); Perez-Mendez, V. (Lawrence Berkeley Lab., CA (USA))

1989-12-01

The physics of the detection process is studied and the performances of different Positron Emission Tomography (PET) system are evaluated by theoretical calculation and/or Monte Carlo Simulation (using the EGS code) in this paper, whose table of contents can be summarized as follows: a brief introduction to amorphous silicon detectors and some useful equation is presented; a Tantalum/Amorphous Silicon PET project is studied and the efficiency of the systems is studied by Monte Carlo Simulation; two similar CsI/Amorphous Silicon PET projects are presented and their efficiency and spatial resolution are studied by Monte Carlo Simulation, light yield and time characteristics of the scintillation light are discussed for different scintillators; some experimental result on light yield measurements are presented; a Xenon/Amorphous Silicon PET is presented, the physical mechanism of scintillation in Xenon is explained, a theoretical estimation of total light yield in Xenon and the resulting efficiency is discussed altogether with some consideration of the time resolution of the system; the amorphous silicon integrated electronics is presented, total noise and time resolution are evaluated in each of our applications; the merit parameters {epsilon}{sup 2}{tau}'s are evaluated and compared with other PET systems and conclusions are drawn; and a complete reference list for Xenon scintillation light physics and its applications is presented altogether with the listing of the developed simulation programs.

Amorphous silicon detectors in positron emission tomography

International Nuclear Information System (INIS)

Conti, M.; Perez-Mendez, V.

1989-12-01

The physics of the detection process is studied and the performances of different Positron Emission Tomography (PET) system are evaluated by theoretical calculation and/or Monte Carlo Simulation (using the EGS code) in this paper, whose table of contents can be summarized as follows: a brief introduction to amorphous silicon detectors and some useful equation is presented; a Tantalum/Amorphous Silicon PET project is studied and the efficiency of the systems is studied by Monte Carlo Simulation; two similar CsI/Amorphous Silicon PET projects are presented and their efficiency and spatial resolution are studied by Monte Carlo Simulation, light yield and time characteristics of the scintillation light are discussed for different scintillators; some experimental result on light yield measurements are presented; a Xenon/Amorphous Silicon PET is presented, the physical mechanism of scintillation in Xenon is explained, a theoretical estimation of total light yield in Xenon and the resulting efficiency is discussed altogether with some consideration of the time resolution of the system; the amorphous silicon integrated electronics is presented, total noise and time resolution are evaluated in each of our applications; the merit parameters ε 2 τ's are evaluated and compared with other PET systems and conclusions are drawn; and a complete reference list for Xenon scintillation light physics and its applications is presented altogether with the listing of the developed simulation programs

Alpha radiation detection using silicon memory chips - preliminary studies

International Nuclear Information System (INIS)

Pace, R.; Paix, D.; Haskard, M.

1993-01-01

Alpha radiation dosage is an important occupational health factor in the mining of uranium and mineral sands. Alpha radiation induced errors in the data of silicon based memory chips provide the foundation for a new type of sensor, with the potential for affordable and prompt measurement of personal alpha doses. With particular reference to Dynamic Random Access Memories (DRAM) this paper introduces the operating principle of a memory based radiation sensor, which is the error mechanism in silicon integrated circuits. 14 refs., 3 figs

Study and characterization of an integrated circuit-deposited hydrogenated amorphous silicon sensor for the detection of particles and radiations; Etude et caracterisation d'un capteur en silicium amorphe hydrogene depose sur circuit integre pour la detection de particules et de rayonnements

Energy Technology Data Exchange (ETDEWEB)

Despeisse, M

2006-03-15

Next generation experiments at the European laboratory of particle physics (CERN) require particle detector alternatives to actual silicon detectors. This thesis presents a novel detector technology, which is based on the deposition of a hydrogenated amorphous silicon sensor on top of an integrated circuit. Performance and limitations of this technology have been assessed for the first time in this thesis in the context of particle detectors. Specific integrated circuits have been designed and the detector segmentation, the interface sensor-chip and the sensor leakage current have been studied in details. The signal induced by the track of an ionizing particle in the sensor has been characterized and results on the signal speed, amplitude and on the sensor resistance to radiation are presented. The results are promising regarding the use of this novel technology for radiation detection, though limitations have been shown for particle physics application. (author)

Silicon Photo-Multiplier Radiation Hardness Tests with a White Neutron Beam

International Nuclear Information System (INIS)

Montanari, A.; Tosi, N.; Pietropaolo, A.; Andreotti, M.; Baldini, W.; Calabrese, R.; Cibinetto, G.; Luppi, E.; Cotta Ramusino, A.; Malaguti, R.; Santoro, V.; Tellarini, G.; Tomassetti, L.; De Donato, C.; Reali, E.

2013-06-01

We report radiation hardness tests performed, with a white neutron beam, at the Geel Electron Linear Accelerator in Belgium on silicon Photo-Multipliers. These are semiconductor photon detectors made of a square matrix of Geiger-Mode Avalanche photo-diodes on a silicon substrate. Several samples from different manufacturers have been irradiated integrating up to about 6.2 x 10 9 1-MeV-equivalent neutrons per cm 2 . (authors)

Silicon Based Mid Infrared SiGeSn Heterostructure Emitters and Detectors

Science.gov (United States)

2016-05-16

AFRL-AFOSR-JP-TR-2016-0054 Silicon based mid infrared SiGeSn heterostrcture emitters and detectors Greg Sun UNIVERSITY OF MASSACHUSETTS Final Report... Silicon Based Mid Infrared SiGeSn Heterostructure Emitters and Detectors ” February 10, 2016 Principal Investigator: Greg Sun Engineering...diodes are incompatible with the CMOS process and therefore cannot be easily integrated with Si electronics . The GeSn mid IR detectors developed in

Monolithic integration of detectors and transistors on high-resistivity silicon

International Nuclear Information System (INIS)

Dalla Betta, Gian-Franco; Batignani, Giovanni; Boscardin, Maurizio; Bosisio, Luciano; Gregori, Paolo; Pancheri, Lucio; Piemonte, Claudio; Ratti, Lodovico; Verzellesi, Giovanni; Zorzi, Nicola

2007-01-01

We report on the most recent results from an R and D activity aimed at the development of silicon radiation detectors with embedded front-end electronics. The key features of the fabrication technology and the available active devices are described. Selected results from the characterization of transistors and test structures are presented and discussed, and the considered application fields are addressed

Ion-implanted capacitively coupled silicon strip detectors with integrated polysilicon bias resistors processed on a 100 mm wafer

International Nuclear Information System (INIS)

Hietanen, I.; Lindgren, J.; Orava, R.; Tuuva, T.; Voutilainen, M.; Brenner, R.; Andersson, M.; Leinonen, K.; Ronkainen, H.

1991-01-01

Double-sided silicon strip detectors with integrated coupling capacitors and polysilicon resistors have been processed on a 100 mm wafer. A detector with an active area of 19x19 mm 2 was connected to LSI readout electronics and tested. The strip pitch of the detector is 25 μm on the p-side and 50 μm on the n-side. The readout pitch is 50 μm on both sides. The number of readout strips is 774 and the total number of strips is 1161. On the p-side a signal-to-noise of 35 has been measured using a 90 Sr β-source. The n-side has been studied using a laser. (orig.)

Optimization of metallic microheaters for high-speed reconfigurable silicon photonics.

Science.gov (United States)

Atabaki, A H; Shah Hosseini, E; Eftekhar, A A; Yegnanarayanan, S; Adibi, A

2010-08-16

The strong thermooptic effect in silicon enables low-power and low-loss reconfiguration of large-scale silicon photonics. Thermal reconfiguration through the integration of metallic microheaters has been one of the more widely used reconfiguration techniques in silicon photonics. In this paper, structural and material optimizations are carried out through heat transport modeling to improve the reconfiguration speed of such devices, and the results are experimentally verified. Around 4 micros reconfiguration time are shown for the optimized structures. Moreover, sub-microsecond reconfiguration time is experimentally demonstrated through the pulsed excitation of the microheaters. The limitation of this pulsed excitation scheme is also discussed through an accurate system-level model developed for the microheater response.

Optimization of the digital Silicon Photomultiplier for Cherenkov light detection

International Nuclear Information System (INIS)

Frach, T

2012-01-01

The Silicon Photomultiplier is a promising alternative to fast vacuum photodetectors. We developed a fully digital implementation of the Silicon Photomultiplier. The sensor is based on a single photon avalanche photodiode (SPAD) integrated in a standard CMOS process. Photons are detected directly by sensing the voltage at the SPAD anode using a dedicated cell electronics block next to each diode. This block also contains active quenching and recharge circuits as well as a one bit memory for the selective inhibit of detector cells. A balanced trigger network is used to propagate the trigger signal from all cells to the integrated time-to-digital converter. Photons are detected and counted as digital signals, thus making the sensor less susceptible to temperature variations and electronic noise. The integration with CMOS logic has the added benefit of low power consumption and possible integration of data post-processing in the sensor. In this paper, we discuss the sensor architecture together with its characteristics, and its possible optimizations for applications requiring the detection of Cherenkov light.

On-chip microsystems in silicon: opportunities and limitations

Science.gov (United States)

Wolffenbuttel, R. F.

1996-03-01

Integrated on-chip micro-instrumentation systems in silicon are complete data acquisition systems on a single chip. This concept has appeared to be the ultimate solution in many applications, as it enables in principle the metamorphosis of a basic sensing element, affected with many shortcomings, into an on-chip data acquisition unit that provides an output digital data stream in a standard format not corrupted by sensor non-idealities. Market acceptance would be maximum, as no special knowledge about the internal operation is required, self-test and self-calibration can be included and the dimensions are not different from those of the integrated circuit. The various aspects that are relevant in estimating the constraints for successful implementation of the integrated silicon smart sensor will be outlined in comparison with the properties of more conventional sensor fabrication technologies. It will be shown that the acceptance of on-chip functional integration in an application depends primarily on the added value in terms of improved specification or functionality that the resulting device provides in that application. The economic viability is therefore decisive rather than the technological constraints. This is in contrast to the traditional technology push prevailing in sensor research over market pull mechanisms.

Aerosol-assisted extraction of silicon nanoparticles from wafer slicing waste for lithium ion batteries.

Science.gov (United States)

Jang, Hee Dong; Kim, Hyekyoung; Chang, Hankwon; Kim, Jiwoong; Roh, Kee Min; Choi, Ji-Hyuk; Cho, Bong-Gyoo; Park, Eunjun; Kim, Hansu; Luo, Jiayan; Huang, Jiaxing

2015-03-30

A large amount of silicon debris particles are generated during the slicing of silicon ingots into thin wafers for the fabrication of integrated-circuit chips and solar cells. This results in a significant loss of valuable materials at about 40% of the mass of ingots. In addition, a hazardous silicon sludge waste is produced containing largely debris of silicon, and silicon carbide, which is a common cutting material on the slicing saw. Efforts in material recovery from the sludge and recycling have been largely directed towards converting silicon or silicon carbide into other chemicals. Here, we report an aerosol-assisted method to extract silicon nanoparticles from such sludge wastes and their use in lithium ion battery applications. Using an ultrasonic spray-drying method, silicon nanoparticles can be directly recovered from the mixture with high efficiency and high purity for making lithium ion battery anode. The work here demonstrated a relatively low cost approach to turn wafer slicing wastes into much higher value-added materials for energy applications, which also helps to increase the sustainability of semiconductor material and device manufacturing.

Development and characterisation of silicon photomultipliers with bulk-integrated quench resistors for future applications in particle and astroparticle physics

International Nuclear Information System (INIS)

Jendrysik, Christian

2014-01-01

This thesis deals with the development and characterisation of a novel silicon photomultiplier concept with bulk-integrated quench resistors. The approach allows the realisation of a free entrance window and high fill factors, which leads to an improvement of the detection efficiency. With first prototype productions a proof of concept was possible. A full characterisation provided promising results, in particular with respect to the photon detection efficiency. By customising the simulation tools, a reliable description of the devices was achieved. In addition, conceptual studies of the next device generation demonstrated the possibility of single cell readout, expanding the application range of those detectors to particle tracking.

Potassium ions in SiO2: electrets for silicon surface passivation

Science.gov (United States)

Bonilla, Ruy S.; Wilshaw, Peter R.

2018-01-01

This manuscript reports an experimental and theoretical study of the transport of potassium ions in thin silicon dioxide films. While alkali contamination was largely researched in the context of MOSFET instability, recent reports indicate that potassium ions can be embedded into oxide films to produce dielectric materials with permanent electric charge, also known as electrets. These electrets are integral to a number of applications, including the passivation of silicon surfaces for optoelectronic devices. In this work, electric field assisted migration of ions is used to rapidly drive K+ into SiO2 and produce effective passivation of silicon surfaces. Charge concentrations of up to ~5  ×  1012 e cm-2 have been achieved. This charge was seen to be stable for over 1500 d, with decay time constants as high as 17 000 d, producing an effectively passivated oxide-silicon interface with SRV  industrial manufacture of silicon optoelectronic devices.

Packaging of silicon sensors for microfluidic bio-analytical applications

International Nuclear Information System (INIS)

Wimberger-Friedl, Reinhold; Prins, Menno; Megens, Mischa; Dittmer, Wendy; Witz, Christiane de; Nellissen, Ton; Weekamp, Wim; Delft, Jan van; Ansems, Will; Iersel, Ben van

2009-01-01

A new industrial concept is presented for packaging biosensor chips in disposable microfluidic cartridges to enable medical diagnostic applications. The inorganic electronic substrates, such as silicon or glass, are integrated in a polymer package which provides the electrical and fluidic interconnections to the world and provides mechanical strength and protection for out-of-lab use. The demonstrated prototype consists of a molded interconnection device (MID), a silicon-based giant magneto-resistive (GMR) biosensor chip, a flex and a polymer fluidic part with integrated tubing. The various processes are compatible with mass manufacturing and run at a high yield. The devices show a reliable electrical interconnection between the sensor chip and readout electronics during extended wet operation. Sandwich immunoassays were carried out in the cartridges with surface functionalized sensor chips. Biological response curves were determined for different concentrations of parathyroid hormone (PTH) on the packaged biosensor, which demonstrates the functionality and biocompatibility of the devices. The new packaging concept provides a platform for easy further integration of electrical and fluidic functions, as for instance required for integrated molecular diagnostic devices in cost-effective mass manufacturing

Colloidal characterization of ultrafine silicon carbide and silicon nitride powders

Science.gov (United States)

Whitman, Pamela K.; Feke, Donald L.

1986-01-01

The effects of various powder treatment strategies on the colloid chemistry of aqueous dispersions of silicon carbide and silicon nitride are examined using a surface titration methodology. Pretreatments are used to differentiate between the true surface chemistry of the powders and artifacts resulting from exposure history. Silicon nitride powders require more extensive pretreatment to reveal consistent surface chemistry than do silicon carbide powders. As measured by titration, the degree of proton adsorption from the suspending fluid by pretreated silicon nitride and silicon carbide powders can both be made similar to that of silica.

Crystal spectroscopy of silicon aero-gel end-caps driven by a dynamic hohlraum on Z

International Nuclear Information System (INIS)

Nash, T.J.; Sanford, T.W.L.; Mock, R.C.; Leeper, R.J.; Chandler, G.A.; Bailey, J.E.; McKenney, J.L.; Mehlhorn, T.A.; Seaman, J.F.; McGurn, J.; Schroen, D.; Russell, C.; Lake, P.E.; Jobe, D.O.; Gilliland, T.; Nielsen, D.S.; Lucas, J.; Moore, T.; Torres, J.A.; MacFarlane, J.J.; Apruzese, J.P.; Chrien, R.; Idzorek, G.; Peterson, D.L.; Watt, R.

2005-01-01

We present results from crystal spectroscopic analysis of silicon aero-gel foams heated by dynamic hohlraums on Z. The dynamic hohlraum on Z creates a radiation source with a 230-eV average temperature over a 2.4-mm diameter. In these experiments silicon aero-gel foams with 10-mg/cm3 densities and 1.7-mm lengths were placed on both ends of the dynamic hohlraum. Several crystal spectrometers were placed both above and below the z-pinch to diagnose the temperature of the silicon aero-gel foam using the K-shell lines of silicon. The crystal spectrometers were (1) temporally integrated and spatially resolved, (2) temporally resolved and spatially integrated, and (3) both temporally and spatially resolved. The results indicate that the dynamic hohlraum heats the silicon aero-gel to approximately 150-eV at peak power. As the dynamic hohlraum source cools after peak power the silicon aero-gel continues to heat and jets axially at an average velocity of approximately 50-cm/μs. The spectroscopy has also shown that the reason for the up/down asymmetry in radiated power on Z is that tungsten enters the line-of-sight on the bottom of the machine much more than on the top

Characterization of the silicon/hydrofluoric acid interface: electrochemical processes under weak potential disturbance

International Nuclear Information System (INIS)

Bertagna, Valerie

1996-01-01

Within the frame of the increase of the density of integrated circuits, of simplification of cleaning processes and of improvement of control of surface reactions (for a better control of the elimination of defects and contamination risks), this research thesis first gives a large overview of previous works in the fields of silicon electrochemistry in hydrofluoric environment, of silicon chemical condition after treatment by a diluted hydrofluoric acid, of metallic contamination of silicon during cleaning with a diluted hydrofluoric acid, and of theoretical models of interpretation. Then, the author reports the development of a new electrochemical cell, and the detailed study of mono-crystalline silicon in a diluted hydrofluoric environment (electrochemical investigation, modelling of charge transfer at the interface, studies by atomic force microscopy, contamination of silicon by copper)

Joining and Integration of Silicon Nitride Ceramics for Aerospace and Energy Systems

Science.gov (United States)

Singh, M.; Asthana, R.

2009-01-01

Light-weight, creep-resistant silicon nitride ceramics possess excellent high-temperature strength and are projected to significantly raise engine efficiency and performance when used as turbine components in the next-generation turbo-shaft engines without the extensive cooling that is needed for metallic parts. One key aspect of Si3N4 utilization in such applications is its joining response to diverse materials. In an ongoing research program, the joining and integration of Si3N4 ceramics with metallic, ceramic, and composite materials using braze interlayers with the liquidus temperature in the range 750-1240C is being explored. In this paper, the self-joining behavior of Kyocera Si3N4 and St. Gobain Si3N4 using a ductile Cu-based active braze (Cu-ABA) containing Ti will be presented. Joint microstructure, composition, hardness, and strength as revealed by optical microscopy, scanning electron microscopy (SEM), energy dispersive spectroscopy (EDS), Knoop microhardness test, and offset compression shear test will be presented. Additionally, microstructure, composition, and joint strength of Si3N4/Inconel 625 joints made using Cu-ABA, will be presented. The results will be discussed with reference to the role of chemical reactions, wetting behavior, and residual stresses in joints.

Summary Robert Noyce and the invention of Silicon Valley

CERN Document Server

2014-01-01

This work offers a summary of the book "THE MAN BEHIND THE MICROCHIP: Robert Noyce and the Invention of Silicon Valley""by Leslie Berlin.The Man behind the Microchip is Leslie Berlin's first book. This author is project historian for the Silicon Valley Archives, a division of the Stanford University Department of Special Collections. This book tells the story of a giant of the high-tech industry: the multimillionaire Bob Noyce. This co-founder of Fairchild Semiconductor and Intel co-invented the integrated circuit which became the electronic heart of every modern computer, automobile, advance

Niobium nitride Josephson junctions with silicon and germanium barriers

International Nuclear Information System (INIS)

Cukauskas, E.J.; Carter, W.L.

1988-01-01

Niobium nitride based junctions with silicon, germanium, and composite silicon/germanium barriers were fabricated and characterized for several barrier compositions. The current-voltage characteristics were analyzed at several temperatures using the Simmons model and numerical integration of the WKB approximation for the average barrier height and effective thickness. The zero voltage conductance was measured from 1.5 K to 300 K and compared to the Mott hopping conductivity model and the Stratton tunneling temperature dependence. Conductivity followed Mott conductivity at temperatures above 60 K for junctions with less than 100 angstrom thick barriers

Silicon nitride photonics: from visible to mid-infrared wavelengths

Science.gov (United States)

Micó, Gloria; Bru, Luis A.; Pastor, Daniel; Doménech, David; Fernández, Juan; Sánchez, Ana; Cirera, Josep M.; Domínguez, Carlos; Muñoz, Pascual

2018-02-01

Silicon nitride has received a lot of attention during the last ten years, for applications such as bio-photonics, tele/datacom, optical signal processing and sensing. In this paper, firstly an updated review of the state of the art of silicon nitride photonics integration platforms will be provided. Secondly, our developments on a moderate confinement Si3N4 platform in the near-infrared will be presented. Finally, our steps towards establishing a Si3N4 based platform for broadband operation spanning from visible to mid-infrared wavelengths will be introduced.

Porous silicon structures with high surface area/specific pore size

Science.gov (United States)

Northrup, M.A.; Yu, C.M.; Raley, N.F.

1999-03-16

Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gases in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes. Examples that benefit from specific pore sized porous silicon are chemical/biological filters and thermally-activated flow devices with active or adjacent surfaces such as electrodes or heaters. 9 figs.

Stand-alone Cosmic Muon Reconstruction Before Installation of the CMS Silicon Strip Tracker

CERN Document Server

Adam, W.; Dragicevic, M.; Friedl, M.; Fruhwirth, R.; Hansel, S.; Hrubec, J.; Krammer, M.; Oberegger, M.; Pernicka, M.; Schmid, S.; Stark, R.; Steininger, H.; Uhl, D.; Waltenberger, W.; Widl, E.; Van Mechelen, P.; Cardaci, M.; Beaumont, W.; de Langhe, E.; de Wolf, E.A.; Delmeire, E.; Hashemi, M.; Bouhali, O.; Charaf, O.; Clerbaux, B.; Dewulf, J.-P.; Elgammal, S.; Hammad, G.; de Lentdecker, G.; Marage, P.; Vander Velde, C.; Vanlaer, P.; Wickens, J.; Adler, V.; Devroede, O.; De Weirdt, S.; D'Hondt, J.; Goorens, R.; Heyninck, J.; Maes, J.; Mozer, Matthias Ulrich; Tavernier, S.; Van Lancker, L.; Van Mulders, P.; Villella, I.; Wastiels, C.; Bonnet, J.-L.; Bruno, G.; De Callatay, B.; Florins, B.; Giammanco, A.; Gregoire, G.; Keutgen, Th.; Kcira, D.; Lemaitre, V.; Michotte, D.; Militaru, O.; Piotrzkowski, K.; Quertermont, L.; Roberfroid, V.; Rouby, X.; Teyssier, D.; Daubie, E.; Anttila, E.; Czellar, S.; Engstrom, P.; Harkonen, J.; Karimaki, V.; Kostesmaa, J.; Kuronen, A.; Lampen, T.; Linden, T.; Luukka, P.-R.; Maenpaa, T.; Michal, S.; Tuominen, E.; Tuominiemi, J.; Ageron, M.; Baulieu, G.; Bonnevaux, A.; Boudoul, G.; Chabanat, E.; Chabert, E.; Chierici, R.; Contardo, D.; Della Negra, R.; Dupasquier, T.; Gelin, G.; Giraud, N.; Guillot, G.; Estre, N.; Haroutunian, R.; Lumb, N.; Perries, S.; Schirra, F.; Trocme, B.; Vanzetto, S.; Agram, J.-L.; Blaes, R.; Drouhin, F.; Ernenwein, J.-P.; Fontaine, J.-C.; Berst, J.-D.; Brom, J.-M.; Didierjean, F.; Goerlach, U.; Graehling, P.; Gross, L.; Hosselet, J.; Juillot, P.; Lounis, A.; Maazouzi, C.; Olivetto, C.; Strub, R.; Van Hove, P.; Anagnostou, G.; Brauer, R.; Esser, H.; Feld, L.; Karpinski, W.; Klein, K.; Kukulies, C.; Olzem, J.; Ostapchuk, A.; Pandoulas, D.; Pierschel, G.; Raupach, F.; Schael, S.; Schwering, G.; Sprenger, D.; Thomas, M.; Weber, M.; Wittmer, B.; Wlochal, M.; Beissel, F.; Bock, E.; Flugge, G.; Gillissen, C.; Hermanns, T.; Heydhausen, D.; Jahn, D.; Kaussen, G.; Linn, A.; Perchalla, L.; Poettgens, M.; Pooth, O.; Stahl, A.; Zoeller, M.H.; Buhmann, P.; Butz, E.; Flucke, G.; Hamdorf, R.; Hauk, J.; Klanner, R.; Pein, U.; Schleper, P.; Steinbruck, G.; Blum, P.; De Boer, W.; Dierlamm, A.; Dirkes, G.; Fahrer, M.; Frey, M.; Furgeri, A.; Hartmann, F.; Heier, S.; Hoffmann, K.-H.; Kaminski, J.; Ledermann, B.; Liamsuwan, T.; Muller, S.; Muller, Th.; Schilling, F.-P.; Simonis, H.-J.; Steck, P.; Zhukov, V.; Cariola, P.; De Robertis, G.; Ferorelli, R.; Fiore, L.; Preda, M.; Sala, G.; Silvestris, L.; Tempesta, P.; Zito, G.; Creanza, D.; De Filippis, N.; De Palma, M.; Giordano, D.; Maggi, G.; Manna, N.; My, S.; Selvaggi, G.; Albergo, S.; Chiorboli, M.; Costa, S.; Galanti, M.; Giudice, N.; Guardone, N.; Noto, F.; Potenza, R.; Saizu, M.A.; Sparti, V.; Sutera, C.; Tricomi, A.; Tuve, C.; Brianzi, M.; Civinini, C.; Maletta, F.; Manolescu, F.; Meschini, M.; Paoletti, S.; Sguazzoni, G.; Broccolo, B.; Ciulli, V.; D'Alessandro, R.; Focardi, E.; Frosali, S.; Genta, C.; Landi, G.; Lenzi, P.; Macchiolo, A.; Magini, N.; Parrini, G.; Scarlini, E.; Cerati, G.; Azzi, P.; Bacchetta, N.; Candelori, A.; Dorigo, T.; Kaminsky, A.; Karaevski, S.; Khomenkov, V.; Reznikov, S.; Tessaro, M.; Bisello, D.; De Mattia, M.; Giubilato, P.; Loreti, M.; Mattiazzo, S.; Nigro, M.; Paccagnella, A.; Pantano, D.; Pozzobon, N.; Tosi, M.; Bilei, G.M.; Checcucci, B.; Fano, L.; Servoli, L.; Ambroglini, F.; Babucci, E.; Benedetti, D.; Biasini, M.; Caponeri, B.; Covarelli, R.; Giorgi, M.; Lariccia, P.; Mantovani, G.; Marcantonini, M.; Postolache, V.; Santocchia, A.; Spiga, D.; Bagliesi, G.; Balestri, G.; Berretta, L.; Bianucci, S.; Boccali, T.; Bosi, F.; Bracci, F.; Castaldi, R.; Ceccanti, M.; Cecchi, R.; Cerri, C.; Cucoanes, A .S.; Dell'Orso, R.; Dobur, D.; Dutta, S.; Giassi, A.; Giusti, S.; Kartashov, D.; Kraan, A.; Lomtadze, T.; Lungu, G.A.; Magazzu, G.; Mammini, P.; Mariani, F.; Martinelli, G.; Moggi, A.; Palla, F.; Palmonari, F.; Petragnani, G.; Profeti, A.; Raffaelli, F.; Rizzi, D.; Sanguinetti, G.; Sarkar, S.; Sentenac, D.; Serban, A.T.; Slav, A.; Soldani, A.; Spagnolo, P.; Tenchini, R.; Tolaini, S.; Venturi, A.; Verdini, P.G.; Vos, M.; Zaccarelli, L.; Avanzini, C.; Basti, A.; Benucci, L.; Bocci, A.; Cazzola, U.; Fiori, F.; Linari, S.; Massa, M.; Messineo, A.; Segneri, G.; Tonelli, G.; Azzurri, P.; Bernardini, J.; Borrello, L.; Calzolari, F.; Foa, L.; Gennai, S.; Ligabue, F.; Petrucciani, G.; Rizzi, A.; Yang, Z.; Benotto, F.; Demaria, N.; Dumitrache, F.; Farano, R.; Borgia, M.A.; Castello, R.; Costa, M.; Migliore, E.; Romero, A.; Abbaneo, D.; Abbas, M.; Ahmed, I.; Akhtar, I.; Albert, E.; Bloch, C.; Breuker, H.; Butt, S.; Buchmuller, O.; Cattai, A.; Delaere, C.; Delattre, M.; Edera, L.M.; Engstrom, P.; Eppard, M.; Gateau, M.; Gill, K.; Giolo-Nicollerat, A.-S.; Grabit, R.; Honma, A.; Huhtinen, M.; Kloukinas, K.; Kortesmaa, J.; Kottelat, L.J.; Kuronen, A.; Leonardo, N.; Ljuslin, C.; Mannelli, M.; Masetti, L.; Marchioro, A.; Mersi, S.; Michal, S.; Mirabito, L.; Muffat-Joly, J.; Onnela, A.; Paillard, C.; Pal, I.; Pernot, J.F.; Petagna, P.; Petit, P.; Piccut, C.; Pioppi, M.; Postema, H.; Ranieri, R.; Ricci, D.; Rolandi, G.; Ronga, F.; Sigaud, C.; Syed, A.; Siegrist, P.; Tropea, P.; Troska, J.; Tsirou, A.; Vander Donckt, M.; Vasey, F.; Alagoz, E.; Amsler, Claude; Chiochia, V.; Regenfus, Christian; Robmann, P.; Rochet, J.; Rommerskirchen, T.; Schmidt, A.; Steiner, S.; Wilke, L.; Church, I.; Cole, J.; Coughlan, J.; Gay, A.; Taghavi, S.; Tomalin, I.; Bainbridge, R.; Cripps, N.; Fulcher, J.; Hall, G.; Noy, M.; Pesaresi, M.; Radicci, V.; Raymond, D.M.; Sharp, P.; Stoye, M.; Wingham, M.; Zorba, O.; Goitom, I.; Hobson, P.R.; Reid, I.; Teodorescu, L.; Hanson, G.; Jeng, G.-Y.; Liu, H.; Pasztor, G.; Satpathy, A.; Stringer, R.; Mangano, B.; Affolder, K.; Affolder, T.; Allen, A.; Barge, D.; Burke, S.; Callahan, D.; Campagnari, C.; Crook, A.; D'Alfonso, M.; Dietch, J.; Garberson, Jeffrey Ford; Hale, D.; Incandela, H.; Incandela, J.; Jaditz, S.; Kalavase, P.; Kreyer, S.; Kyre, S.; Lamb, J.; Mc Guinness, C.; Mills, C.; Nguyen, H.; Nikolic, M.; Lowette, S.; Rebassoo, F.; Ribnik, J.; Richman, J.; Rubinstein, N.; Sanhueza, S.; Shah, Y.; Simms, L.; Staszak, D.; Stoner, J.; Stuart, D.; Swain, S.; Vlimant, J.-R.; White, D.; Ulmer, K.A.; Wagner, S.R.; Bagby, L.; Bhat, P.C.; Burkett, K.; Cihangir, S.; Gutsche, O.; Jensen, H.; Johnson, M.; Luzhetskiy, N.; Mason, D.; Miao, T.; Moccia, S.; Noeding, C.; Ronzhin, A.; Skup, E.; Spalding, W.J.; Spiegel, L.; Tkaczyk, S.; Yumiceva, F.; Zatserklyaniy, A.; Zerev, E.; Anghel, I.; Bazterra, V.E.; Gerber, C.E.; Khalatian, S.; Shabalina, E.; Baringer, Philip S.; Bean, A.; Chen, J.; Hinchey, C.; Martin, C.; Moulik, T.; Robinson, R.; Gritsan, A.V.; Lae, C.K.; Tran, N.V.; Everaerts, P.; Hahn, K.A.; Harris, P.; Nahn, S.; Rudolph, M.; Sung, K.; Betchart, B.; Demina, R.; Gotra, Y.; Korjenevski, S.; Miner, D.; Orbaker, D.; Christofek, L.; Hooper, R.; Landsberg, G.; Nguyen, D.; Narain, M.; Speer, T.; Tsang, K.V.

2009-01-01

The subsystems of the CMS silicon strip tracker were integrated and commissioned at the Tracker Integration Facility (TIF) in the period from November 2006 to July 2007. As part of the commissioning, large samples of cosmic ray data were recorded under various running conditions in the absence of a magnetic field. Cosmic rays detected by scintillation counters were used to trigger the readout of up to 15% of the final silicon strip detector, and over 4.7 million events were recorded. This document describes the cosmic track reconstruction and presents results on the performance of track and hit reconstruction as from dedicated analyses.

Arsenic implantation into polycrystalline silicon and diffusion to silicon substrate

International Nuclear Information System (INIS)

Tsukamoto, K.; Akasaka, Y.; Horie, K.

1977-01-01

Arsenic implantation into polycrystalline silicon and drive-in diffusion to silicon substrate have been investigated by MeV He + backscattering analysis and also by electrical measurements. The range distributions of arsenic implanted into polycrystalline silicon are well fitted to Gaussian distributions over the energy range 60--350 keV. The measured values of R/sub P/ and ΔR/sub P/ are about 10 and 20% larger than the theoretical predictions, respectively. The effective diffusion coefficient of arsenic implanted into polycrystalline silicon is expressed as D=0.63 exp[(-3.22 eV/kT)] and is independent of the arsenic concentration. The drive-in diffusion of arsenic from the implanted polycrystalline silicon layer into the silicon substrate is significantly affected by the diffusion atmosphere. In the N 2 atmosphere, a considerable amount of arsenic atoms diffuses outward to the ambient. The outdiffusion can be suppressed by encapsulation with Si 3 N 4 . In the oxidizing atmosphere, arsenic atoms are driven inward by growing SiO 2 due to the segregation between SiO 2 and polycrystalline silicon, and consequently the drive-in diffusion of arsenic is enhanced. At the interface between the polycrystalline silicon layer and the silicon substrate, arsenic atoms are likely to segregate at the polycrystalline silicon side

Quantum Dot Laser for a Light Source of an Athermal Silicon Optical Interposer

Directory of Open Access Journals (Sweden)

Nobuaki Hatori

2015-04-01

Full Text Available This paper reports a hybrid integrated light source fabricated on a silicon platform using a 1.3 μm wavelength quantum dot array laser. Temperature insensitive characteristics up to 120 °C were achieved by the optimum quantum dot structure and laser structure. Light output power was obtained that was high enough to achieve an optical error-free link of a silicon optical interposer. Furthermore, we investigated a novel spot size convertor in a silicon waveguide suitable for a quantum dot laser for lower energy cost operation of the optical interposer.

Porous silicon: silicon quantum dots for photonic applications

International Nuclear Information System (INIS)

Pavesi, L.; Guardini, R.

1996-01-01

Porous silicon formation and structure characterization are briefly illustrated. Its luminescence properties rae presented and interpreted on the basis of exciton recombination in quantum dot structures: the trap-controlled hopping mechanism is used to describe the recombination dynamics. Porous silicon application to photonic devices is considered: porous silicon multilayer in general, and micro cavities in particular are described. The present situation in the realization of porous silicon LEDs is considered, and future developments in this field of research are suggested. (author). 30 refs., 30 figs., 13 tabs

Silicon-Rich Silicon Carbide Hole-Selective Rear Contacts for Crystalline-Silicon-Based Solar Cells.

Science.gov (United States)

Nogay, Gizem; Stuckelberger, Josua; Wyss, Philippe; Jeangros, Quentin; Allebé, Christophe; Niquille, Xavier; Debrot, Fabien; Despeisse, Matthieu; Haug, Franz-Josef; Löper, Philipp; Ballif, Christophe

2016-12-28

The use of passivating contacts compatible with typical homojunction thermal processes is one of the most promising approaches to realizing high-efficiency silicon solar cells. In this work, we investigate an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells. The contact structure consists of a chemically grown thin silicon oxide layer, which is capped with a boron-doped silicon-rich silicon carbide [SiC x (p)] layer and then annealed at 800-900 °C. Transmission electron microscopy reveals that the thin chemical oxide layer disappears upon thermal annealing up to 900 °C, leading to degraded surface passivation. We interpret this in terms of a chemical reaction between carbon atoms in the SiC x (p) layer and the adjacent chemical oxide layer. To prevent this reaction, an intrinsic silicon interlayer was introduced between the chemical oxide and the SiC x (p) layer. We show that this intrinsic silicon interlayer is beneficial for surface passivation. Optimized passivation is obtained with a 10-nm-thick intrinsic silicon interlayer, yielding an emitter saturation current density of 17 fA cm -2 on p-type wafers, which translates into an implied open-circuit voltage of 708 mV. The potential of the developed contact at the rear side is further investigated by realizing a proof-of-concept hybrid solar cell, featuring a heterojunction front-side contact made of intrinsic amorphous silicon and phosphorus-doped amorphous silicon. Even though the presented cells are limited by front-side reflection and front-side parasitic absorption, the obtained cell with a V oc of 694.7 mV, a FF of 79.1%, and an efficiency of 20.44% demonstrates the potential of the p + /p-wafer full-side-passivated rear-side scheme shown here.

Micro-fabricated silicon devices for advanced thermal management and integration of particle tracking detectors

CERN Document Server

Romagnoli, Giulia; Gambaro, Carla

Since their first studies targeting the cooling of high-power computing chips, micro-channel devices are proven to provide a very efficient cooling system. In the last years micro-channel cooling has been successfully applied to the cooling of particle detectors at CERN. Thanks to their high thermal efficiency, they can guarantee a good heat sink for the cooling of silicon trackers, fundamental for the reduction of the radiation damage caused by the beam interactions. The radiation damage on the silicon detector is increasing with temperature and furthermore the detectors are producing heat that should be dissipated in the supporting structure. Micro-channels guarantee a distributed and uniform thermal exchange, thanks to the high flexibility of the micro-fabrication process that allows a large variety of channel designs. The thin nature of the micro-channels etched inside silicon wafers, is fulfilling the physics requirement of minimization of the material crossed by the particle beam. Furthermore micro-chan...

Silicon technology-based micro-systems for atomic force microscopy/photon scanning tunnelling microscopy.

Science.gov (United States)

Gall-Borrut, P; Belier, B; Falgayrettes, P; Castagne, M; Bergaud, C; Temple-Boyer, P

2001-04-01

We developed silicon nitride cantilevers integrating a probe tip and a wave guide that is prolonged on the silicon holder with one or two guides. A micro-system is bonded to a photodetector. The resulting hybrid system enables us to obtain simultaneously topographic and optical near-field images. Examples of images obtained on a longitudinal cross-section of an optical fibre are shown.

Wireless cardiac action potential transmission with ultrasonically inserted silicon microprobes

International Nuclear Information System (INIS)

Shen, C J; Ramkumar, A; Lal, A; Gilmour, R F Jr

2011-01-01

This paper reports on the integration of ultrasonically inserted horn-shaped cardiac probes with wireless transmission of 3D cardiac action potential measurement for applications in ex vivo preparations such as monitoring the onset of ventricular fibrillation. Ultrasonically inserted silicon horn probes permit reduced penetration force during insertion, allowing silicon, a brittle material, to penetrate cardiac tissue. The probes also allow recording from multiple sites that are lithographically defined. An application-specific integrated circuit has been designed with a 40 dB amplifying stage and a frequency modulating oscillator at 95 MHz to wirelessly transmit the recorded action potentials. This ultrasonically inserted microprobe wireless system demonstrates the initial results in wireless monitoring of 3D action potential propagation, and the extraction of parameters of interest including the action potential duration and diastolic interval

Band structure properties of (BGa)P semiconductors for lattice matched integration on (001) silicon

Energy Technology Data Exchange (ETDEWEB)

Hossain, Nadir; Sweeney, Stephen [Advanced Technology Institute and Department of Physics, University of Surrey, Guildford, Surrey GU2 7XH (United Kingdom); Hosea, Jeff [Advanced Technology Institute and Department of Physics, University of Surrey, Guildford, Surrey GU2 7XH, UK and Ibnu Sina Institute for Fundamental Science Studies, Universiti Teknologi Malaysia, Johor Bahru 81310 (Malaysia); Liebich, Sven; Zimprich, Martin; Volz, Kerstin; Stolz, Wolfgang [Material Sciences Center and Faculty of Physics, Philipps-University, 35032 Marburg (Germany); Kunert, Bernerdette [NAsP III/V GmbH, Am Knechtacker 19, 35041 Marburg (Germany)

2013-12-04

We report the band structure properties of (BGa)P layers grown on silicon substrate using metal-organic vapour-phase epitaxy. Using surface photo-voltage spectroscopy we find that both the direct and indirect band gaps of (BGa)P alloys (strained and unstrained) decrease with Boron content. Our experimental results suggest that the band gap of (BGa)P layers up to 6% Boron is large and suitable to be used as cladding and contact layers in GaP-based quantum well heterostructures on silicon substrates.

A Forward Silicon Strip System for the ATLAS HL-LHC Upgrade

CERN Document Server

Wonsak, S; The ATLAS collaboration

2012-01-01

The LHC is successfully accumulating luminosity at a centre-of-mass energy of 8 TeV this year. At the same time, plans are rapidly progressing for a series of upgrades, culminating roughly eight years from now in the High Luminosity LHC (HL-LHC) project. The HL-LHC is expected to deliver approximately five times the LHC nominal instantaneous luminosity, resulting in a total integrated luminosity of around 3000 fb-1 by 2030. The ATLAS experiment has a rather well advanced plan to build and install a completely new Inner Tracker (IT) system entirely based on silicon detectors by 2020. This new IT will be made from several pixel and strip layers. The silicon strip detector system will consist of single-sided p-type detectors with five barrel layers and six endcap (EC) disks on each forward side. Each disk will consist of 32 trapezoidal objects dubbed “petals”, with all services (cooling, read-out, command lines, LV and HV power) integrated into the petal. Each petal will contain 18 silicon sensors grouped in...

Integrated Fabrication of a Microgripper

Institute of Scientific and Technical Information of China (English)

无

1999-01-01

Successful implementation of simple mechanism on silicon chip is a prerequisite for monolithic microrobot-ic systems. This paper describes the integrated fabrication of polycrystalline silicon microgripper. Link, fixed andactive joint, and sliding flange structures with dimensions of micrometers have been fabricated on the substrate ofmonocrystalline silicon using silicon microfabrication technology. This microgripper, which may be applied to trans-ducers or sensors, can be batch-fabricated in IC-compatible process. The movable mechanical elements are built onlayers that are later removed, so that they are free for translation and rotation. Under external driving, a microgrip-per cut from substrate would be able to catch tiny filament or small particle with dimension of 10～ 200 micrometers.

Silicon Carbide Junction Field Effect Transistor Digital Logic Gates Demonstrated at 600 deg. C

Science.gov (United States)

Neudeck, Philip G.

1998-01-01

The High Temperature Integrated Electronics and Sensors (HTIES) Program at the NASA Lewis Research Center is currently developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. The HTIES team recently fabricated and demonstrated the first semiconductor digital logic gates ever to function at 600 C.

Surface engineered porous silicon for stable, high performance electrochemical supercapacitors

Science.gov (United States)

Oakes, Landon; Westover, Andrew; Mares, Jeremy W.; Chatterjee, Shahana; Erwin, William R.; Bardhan, Rizia; Weiss, Sharon M.; Pint, Cary L.

2013-10-01

Silicon materials remain unused for supercapacitors due to extreme reactivity of silicon with electrolytes. However, doped silicon materials boast a low mass density, excellent conductivity, a controllably etched nanoporous structure, and combined earth abundance and technological presence appealing to diverse energy storage frameworks. Here, we demonstrate a universal route to transform porous silicon (P-Si) into stable electrodes for electrochemical devices through growth of an ultra-thin, conformal graphene coating on the P-Si surface. This graphene coating simultaneously passivates surface charge traps and provides an ideal electrode-electrolyte electrochemical interface. This leads to 10-40X improvement in energy density, and a 2X wider electrochemical window compared to identically-structured unpassivated P-Si. This work demonstrates a technique generalizable to mesoporous and nanoporous materials that decouples the engineering of electrode structure and electrochemical surface stability to engineer performance in electrochemical environments. Specifically, we demonstrate P-Si as a promising new platform for grid-scale and integrated electrochemical energy storage.

Surface engineered porous silicon for stable, high performance electrochemical supercapacitors

Science.gov (United States)

Oakes, Landon; Westover, Andrew; Mares, Jeremy W.; Chatterjee, Shahana; Erwin, William R.; Bardhan, Rizia; Weiss, Sharon M.; Pint, Cary L.

2013-01-01

Silicon materials remain unused for supercapacitors due to extreme reactivity of silicon with electrolytes. However, doped silicon materials boast a low mass density, excellent conductivity, a controllably etched nanoporous structure, and combined earth abundance and technological presence appealing to diverse energy storage frameworks. Here, we demonstrate a universal route to transform porous silicon (P-Si) into stable electrodes for electrochemical devices through growth of an ultra-thin, conformal graphene coating on the P-Si surface. This graphene coating simultaneously passivates surface charge traps and provides an ideal electrode-electrolyte electrochemical interface. This leads to 10–40X improvement in energy density, and a 2X wider electrochemical window compared to identically-structured unpassivated P-Si. This work demonstrates a technique generalizable to mesoporous and nanoporous materials that decouples the engineering of electrode structure and electrochemical surface stability to engineer performance in electrochemical environments. Specifically, we demonstrate P-Si as a promising new platform for grid-scale and integrated electrochemical energy storage. PMID:24145684

Athermal Photonic Devices and Circuits on a Silicon Platform

Science.gov (United States)

Raghunathan, Vivek

In recent years, silicon based optical interconnects has been pursued as an effective solution that can offer cost, energy, distance and bandwidth density improvements over copper. Monolithic integration of optics and electronics has been enabled by silicon photonic devices that can be fabricated using CMOS technology. However, high levels of device integration result in significant local and global temperature fluctuations that prove problematic for silicon based photonic devices. In particular, high temperature dependence of Si refractive index (thermo-optic (TO) coefficient) shifts the filter response of resonant devices that limit wavelength resolution in various applications. Active thermal compensation using heaters and thermo-electric coolers are the legacy solution for low density integration. However, the required electrical power, device foot print and number of input/output (I/O) lines limit the integration density. We present a passive approach to an athermal design that involves compensation of positive TO effects from a silicon core by negative TO effects of the polymer cladding. In addition, the design rule involves engineering the waveguide core geometry depending on the resonance wavelength under consideration to ensure desired amount of light in the polymer. We develop exact design requirements for a TO peak stability of 0 pm/K and present prototype performance of 0.5 pm/K. We explore the material design space through initiated chemical vapor deposition (iCVD) of 2 polymer cladding choices. We study the effect of cross-linking on the optical properties of a polymer and establish the superior performance of the co-polymer cladding compared to the homo-polymer. Integration of polymer clad devices in an electronic-photonic architecture requires the possibility of multi-layer stacking capability. We use a low temperature, high density plasma chemical vapor deposition of SiO2/SiN x to hermetically seal the athermal. Further, we employ visible light for

Fundamentals of power integrity for computer platforms and systems

CERN Document Server

DiBene, Joseph T

2014-01-01

An all-encompassing text that focuses on the fundamentals of power integrity Power integrity is the study of power distribution from the source to the load and the system level issues that can occur across it. For computer systems, these issues can range from inside the silicon to across the board and may egress into other parts of the platform, including thermal, EMI, and mechanical. With a focus on computer systems and silicon level power delivery, this book sheds light on the fundamentals of power integrity, utilizing the author's extensive background in the power integrity industry and un

A silicon central pattern generator controls locomotion in vivo.

Science.gov (United States)

Vogelstein, R J; Tenore, F; Guevremont, L; Etienne-Cummings, R; Mushahwar, V K

2008-09-01

We present a neuromorphic silicon chip that emulates the activity of the biological spinal central pattern generator (CPG) and creates locomotor patterns to support walking. The chip implements ten integrate-and-fire silicon neurons and 190 programmable digital-to-analog converters that act as synapses. This architecture allows for each neuron to make synaptic connections to any of the other neurons as well as to any of eight external input signals and one tonic bias input. The chip's functionality is confirmed by a series of experiments in which it controls the motor output of a paralyzed animal in real-time and enables it to walk along a three-meter platform. The walking is controlled under closed-loop conditions with the aide of sensory feedback that is recorded from the animal's legs and fed into the silicon CPG. Although we and others have previously described biomimetic silicon locomotor control systems for robots, this is the first demonstration of a neuromorphic device that can replace some functions of the central nervous system in vivo.

Epitaxy - a new technology for fabrication of advanced silicon radiation detectors

International Nuclear Information System (INIS)

Kemmer, J.; Wiest, F.; Pahlke, A.; Boslau, O.; Goldstrass, P.; Eggert, T.; Schindler, M.; Eisele, I.

2005-01-01

Twenty five years after the introduction of the planar process to the fabrication of silicon radiation detectors a new technology, which replaces the ion implantation doping by silicon epitaxy is presented. The power of this new technique is demonstrated by fabrication of silicon drift detectors (SDDs), whereby both the n-type and p-type implants are replaced by n-type and p-type epi-layers. The very first SDDs ever produced with this technique show energy resolutions of 150 eV for 55 Fe at -35 deg C. The area of the detectors is 10 mm 2 and the thickness 300 μm. The high potential of epitaxy for future detectors with integrated complex electronics is described

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

Science.gov (United States)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

A 240-channel thick film multi-chip module for readout of silicon drift detectors

International Nuclear Information System (INIS)

Lynn, D.; Bellwied, R.; Beuttenmueller, R.; Caines, H.; Chen, W.; DiMassimo, D.; Dyke, H.; Elliott, D.; Grau, M.; Hoffmann, G.W.; Humanic, T.; Jensen, P.; Kleinfelder, S.A.; Kotov, I.; Kraner, H.W.; Kuczewski, P.; Leonhardt, B.; Li, Z.; Liaw, C.J.; LoCurto, G.; Middelkamp, P.; Minor, R.; Mazeh, N.; Nehmeh, S.; O'Conner, P.; Ott, G.; Pandey, S.U.; Pruneau, C.; Pinelli, D.; Radeka, V.; Rescia, S.; Rykov, V.; Schambach, J.; Sedlmeir, J.; Sheen, J.; Soja, B.; Stephani, D.; Sugarbaker, E.; Takahashi, J.; Wilson, K.

2000-01-01

We have developed a thick film multi-chip module for readout of silicon drift (or low capacitance ∼200 fF) detectors. Main elements of the module include a custom 16-channel NPN-BJT preamplifier-shaper (PASA) and a custom 16-channel CMOS Switched Capacitor Array (SCA). The primary design criteria of the module were the minimizations of the power (12 mW/channel), noise (ENC=490 e - rms), size (20.5 mmx63 mm), and radiation length (1.4%). We will discuss various aspects of the PASA design, with emphasis on the preamplifier feedback network. The SCA is a modification of an integrated circuit that has been previously described [1]; its design features specific to its application in the SVT (Silicon Vertex Tracker in the STAR experiment at RHIC) will be discussed. The 240-channel multi-chip module is a circuit with five metal layers fabricated in thick film technology on a beryllia substrate and contains 35 custom and commercial integrated circuits. It has been recently integrated with silicon drift detectors in both a prototype system assembly for the SVT and a silicon drift array for the E896 experiment at the Alternating Gradient Synchrotron at the Brookhaven National Laboratory. We will discuss features of the module's design and fabrication, report the test results, and emphasize its performance both on the bench and under experimental conditions

Near-field optical microscope using a silicon-nitride probe

NARCIS (Netherlands)

van Hulst, N.F.; Moers, M.H.P.; Moers, M.H.P.; Noordman, O.F.J.; Noordman, O.F.J.; Tack, R.G.; Segerink, Franciscus B.; Bölger, B.; Bölger, B.

1993-01-01

Operation of an alternative near-field optical microscope is presented. The microscope uses a microfabricated silicon- nitride probe with integrated cantilever, as originally developed for force microscopy. The cantilever allows routine close contact near-field imaging o­n arbitrary surfaces without

Geochemistry of silicon isotopes

Energy Technology Data Exchange (ETDEWEB)

Ding, Tiping; Li, Yanhe; Gao, Jianfei; Hu, Bin [Chinese Academy of Geological Science, Beijing (China). Inst. of Mineral Resources; Jiang, Shaoyong [China Univ. of Geosciences, Wuhan (China).

2018-04-01

Silicon is one of the most abundant elements in the Earth and silicon isotope geochemistry is important in identifying the silicon source for various geological bodies and in studying the behavior of silicon in different geological processes. This book starts with an introduction on the development of silicon isotope geochemistry. Various analytical methods are described and compared with each other in detail. The mechanisms of silicon isotope fractionation are discussed, and silicon isotope distributions in various extraterrestrial and terrestrial reservoirs are updated. Besides, the applications of silicon isotopes in several important fields are presented.

Determination of the quasi-TE mode (in-plane) graphene linear absorption coefficient via integration with silicon-on-insulator racetrack cavity resonators.

Science.gov (United States)

Crowe, Iain F; Clark, Nicholas; Hussein, Siham; Towlson, Brian; Whittaker, Eric; Milosevic, Milan M; Gardes, Frederic Y; Mashanovich, Goran Z; Halsall, Matthew P; Vijayaraghaven, Aravind

2014-07-28

We examine the near-IR light-matter interaction for graphene integrated cavity ring resonators based on silicon-on-insulator (SOI) race-track waveguides. Fitting of the cavity resonances from quasi-TE mode transmission spectra reveal the real part of the effective refractive index for graphene, n(eff) = 2.23 ± 0.02 and linear absorption coefficient, α(gTE) = 0.11 ± 0.01dBμm(-1). The evanescent nature of the guided mode coupling to graphene at resonance depends strongly on the height of the graphene above the cavity, which places limits on the cavity length for optical sensing applications.

An anisotropic thermal-stress model for through-silicon via

Science.gov (United States)

Liu, Song; Shan, Guangbao

2018-02-01

A two-dimensional thermal-stress model of through-silicon via (TSV) is proposed considering the anisotropic elastic property of the silicon substrate. By using the complex variable approach, the distribution of thermal-stress in the substrate can be characterized more accurately. TCAD 3-D simulations are used to verify the model accuracy and well agree with analytical results (model can be integrated into stress-driven design flow for 3-D IC , leading to the more accurate timing analysis considering the thermal-stress effect. Project supported by the Aerospace Advanced Manufacturing Technology Research Joint Fund (No. U1537208).

GaN-on-Silicon - Present capabilities and future directions

Science.gov (United States)

Boles, Timothy

2018-02-01

Gallium Nitride, in the form of epitaxial HEMT transistors on various substrate materials, is the newest and most promising semiconductor technology for high performance devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-Silicon based devices and MMIC's which enable both state-of-the-art high frequency functionality and the ability to scale production into large wafer diameter CMOS foundries. The design and development of GaN-on-Silicon structures and devices will be presented beginning with the basic material parameters, growth of the required epitaxial construction, and leading to the fundamental operational theory of high frequency, high power HEMTs. In this discussion comparisons will be made with alternative substrate materials with emphasis on contrasting the inherent advantages of a silicon based system. Theory of operation of microwave and mmW high power HEMT devices will be presented with special emphasis on fundamental limitations of device performance including inherent frequency limiting transit time analysis, required impedance transformations, internal and external parasitic reactance, thermal impedance optimization, and challenges improved by full integration into monolithic MMICs. Lastly, future directions for implementing GaN-on-Silicon into mainstream CMOS silicon semiconductor technologies will be discussed.

Compact high-efficiency vortex beam emitter based on a silicon photonics micro-ring

DEFF Research Database (Denmark)

Li, Shimao; Ding, Yunhong; Guan, Xiaowei

2018-01-01

Photonic integrated devices that emit vortex beam carrying orbital angular momentum are becoming key components for multiple applications. Here we propose and demonstrate a high-efficiency vortex beam emitter based on a silicon micro-ring resonator integrated with a metal mirror. Such a compact...

The development of two ASIC's for a fast silicon strip detector readout system

International Nuclear Information System (INIS)

Christain, D.; Haldeman, M.; Yarema, R.; Zimmerman, T.; Newcomer, F.M.; VanBerg, R.

1989-01-01

A high speed, low noise readout system for silicon strip detectors is being developed for Fermilab E771, which will begin taking data in 1989. E771 is a fixed target experiment designed to study the production of B hadrons by an 800 GeV/c proton beam. The experimental apparatus consists of an open geometry magnetic spectrometer featuring good muon and electron identification and a 16000 channel silicon microstrip vertex detector. This paper reviews the design and prototyping of two application specific integrated circuits (ASIC's) an amplifier and a discriminator, which are being produced for the silicon strip detector readout system

Dielectric elastomers, with very high dielectric permittivity, based on silicone and ionic interpenetrating networks

DEFF Research Database (Denmark)

Yu, Liyun; Madsen, Frederikke Bahrt; Hvilsted, Søren

2015-01-01

permittivity and the Young's modulus of the elastomer. One system that potentially achieves this involves interpenetrating polymer networks (IPNs), based on commercial silicone elastomers and ionic networks from amino- and carboxylic acid-functional silicones. The applicability of these materials as DEs...... are obtained while dielectric breakdown strength and Young's modulus are not compromised. These good overall properties stem from the softening effect and very high permittivity of ionic networks – as high as ε′ = 7500 at 0.1 Hz – while the silicone elastomer part of the IPN provides mechanical integrity...

EDITORIAL: Special issue on silicon photonics

Science.gov (United States)

Reed, Graham; Paniccia, Mario; Wada, Kazumi; Mashanovich, Goran

2008-06-01

mechanisms for modulation in silicon that have yielded increasingly impressive results (see, for example, Liao L et al 2007 Electron. Lett. 43 issue 22). The convergence of computing and communications and the resultant demand for increased bandwidth has been one of the factors influencing the upsurge of interest in silicon, together with the requirement for photonic and electronic integration, all to be realized at low cost. Thus emerging applications such as short-reach communications links for optical interconnect and fibre to the home (FTTH) (as well as a multitude of other applications) are frequently offered as examples of where silicon photonics will have a significant, perhaps a revolutionary, impact. One of the major conclusions of the joint MIT-industry Communication Technology Roadmap (http://mph-roadmap.mit.edu/index.php), was that 'Photonics technology will be driven by electronic-photonic synergy and short (intelligence. Thus the limitations of silicon as an optical material can be offset against the very significant advantages, to both commercial as well as technological success. Of course, there is still much to do, hence the increasing global investment in silicon technology and the massive increase in research activity in silicon photonics since the early work in the 1980s. Only time will tell if silicon can realize its potential to satisfy the ever-increasing array of applications. However, the indications are positive, and the contributors to this cause employ increasingly impressive levels of intellectual and technological capability to realize the desired goals. It is an interesting time to be involved in slicon photonics, and it will be equally fascinating to watch the evolution of the technology in the future. Whatever happens, silicon will make the transition from being regarded as purely an electronic material to recognition as an optoelectronic material. The evidence for this is represented in the collection of papers that form this special issue

Radiation-hard silicon photonics for high energy physics and beyond

CERN Multimedia

CERN. Geneva

2016-01-01

Silicon photonics (SiPh) is currently being investigated as a promising technology for future radiation hard optical links. The possibility of integrating SiPh devices with electronics and/or silicon particle sensors as well as an expected very high resistance against radiation damage make this technology particularly interesting for potential use close to the interaction points in future in high energy physics experiments and other radiation-sensitive applications. The presentation will summarize the outcomes of the research on radiation hard SiPh conducted within the ICE-DIP projected.

Photonic and Plasmonic Guided Modes in Graphene-Silicon Photonic Crystals

DEFF Research Database (Denmark)

Gu, Tingyi; Andryieuski, Andrei; Hao, Yufeng

2015-01-01

We report the results of systematic studies of plasmonic and photonic guided modes in large-area single-layer graphene integrated into a nanostructured silicon substrate. The interaction of light with graphene and substrate photonic crystals can be classified in distinct regimes depending......, filters, sensors, and photodetectors utilizing silicon photonic platforms....... on the relation of the photonic crystal lattice constant and the relevant modal wavelengths, that is, plasmonic, photonic, and free-space. By optimizing the design of the substrate, these resonant modes can increase the absorption of graphene in the infrared, facilitating enhanced performance of modulators...

Report on achievements in fiscal 1999. Development of energy usage rationalizing silicon manufacturing process (Development of manufacturing technology for mass production of silicon for solar cells); 1999 nendo energy shiyo gorika silicon seizo process kaihatsu seika hokokusho. Taiyo denchiyo silicon ryosanka seizo gijutsu no kaihatsu

Energy Technology Data Exchange (ETDEWEB)

NONE

2000-03-01

Discussions were given on manufacture of raw material silicon for solar cells with regard to boron removal, solidification, finishing and refining of metallic impurities, refining of unutilized silicon scraps, and making them into wafers and solar cells after refining. This paper summarizes the achievements in fiscal 1999. With regard to purity deterioration due to contamination by boron containing silica powder generated during the boron removal in the manufacturing process, the facilities were modified resulting in the reduction thereof to 0.04 ppmw or less. Regarding the repetitive use of boron removing crucibles, the experiment identified the possibility of using them for more than three times. In trial fabrication of samples by using the solidification refining and cast integrated process, ingots of 550 mm square and about 300 mm high were obtained, which were sliced into 10-cm square materials for use as wafers. Measurement of the conversion efficiency has resulted in 13% or more which is almost equivalent in the center and edges of the ingot. It was revealed that solar cell wafers may be fabricated by using this process, which can use either the p-type low-resistance silicon scraps or the metallic silicon as the starting material. (NEDO)

Silicon heterojunction transistor

International Nuclear Information System (INIS)

Matsushita, T.; Oh-uchi, N.; Hayashi, H.; Yamoto, H.

1979-01-01

SIPOS (Semi-insulating polycrystalline silicon) which is used as a surface passivation layer for highly reliable silicon devices constitutes a good heterojunction for silicon. P- or B-doped SIPOS has been used as the emitter material of a heterojunction transistor with the base and collector of silicon. An npn SIPOS-Si heterojunction transistor showing 50 times the current gain of an npn silicon homojunction transistor has been realized by high-temperature treatments in nitrogen and low-temperature annealing in hydrogen or forming gas

Implementation Challenges for Sintered Silicon Carbide Fiber Bonded Ceramic Materials for High Temperature Applications

Science.gov (United States)

Singh, M.

2011-01-01

During the last decades, a number of fiber reinforced ceramic composites have been developed and tested for various aerospace and ground based applications. However, a number of challenges still remain slowing the wide scale implementation of these materials. In addition to continuous fiber reinforced composites, other innovative materials have been developed including the fibrous monoliths and sintered fiber bonded ceramics. The sintered silicon carbide fiber bonded ceramics have been fabricated by the hot pressing and sintering of silicon carbide fibers. However, in this system reliable property database as well as various issues related to thermomechanical performance, integration, and fabrication of large and complex shape components has yet to be addressed. In this presentation, thermomechanical properties of sintered silicon carbide fiber bonded ceramics (as fabricated and joined) will be presented. In addition, critical need for manufacturing and integration technologies in successful implementation of these materials will be discussed.

Analytical and Experimental Evaluation of Joining Silicon Carbide to Silicon Carbide and Silicon Nitride to Silicon Nitride for Advanced Heat Engine Applications Phase II

Energy Technology Data Exchange (ETDEWEB)

Sundberg, G.J.

1994-01-01

Techniques were developed to produce reliable silicon nitride to silicon nitride (NCX-5101) curved joins which were used to manufacture spin test specimens as a proof of concept to simulate parts such as a simple rotor. Specimens were machined from the curved joins to measure the following properties of the join interlayer: tensile strength, shear strength, 22 C flexure strength and 1370 C flexure strength. In parallel, extensive silicon nitride tensile creep evaluation of planar butt joins provided a sufficient data base to develop models with accurate predictive capability for different geometries. Analytical models applied satisfactorily to the silicon nitride joins were Norton's Law for creep strain, a modified Norton's Law internal variable model and the Monkman-Grant relationship for failure modeling. The Theta Projection method was less successful. Attempts were also made to develop planar butt joins of siliconized silicon carbide (NT230).

Role of water in the tribochemical removal of bare silicon

Energy Technology Data Exchange (ETDEWEB)

Chen, Cheng; Xiao, Chen [Tribology Research Institute, National Traction Power Laboratory, Southwest Jiaotong University, Chengdu 610031 (China); Wang, Xiaodong [Center of Micro/Nano Science and Technology, Jiangsu University, Zhenjiang 212013 (China); Zhang, Peng; Chen, Lei; Qi, Yaqiong [Tribology Research Institute, National Traction Power Laboratory, Southwest Jiaotong University, Chengdu 610031 (China); Qian, Linmao, E-mail: linmao@swjtu.edu.cn [Tribology Research Institute, National Traction Power Laboratory, Southwest Jiaotong University, Chengdu 610031 (China)

2016-12-30

Highlights: • The wear of bare silicon against SiO{sub 2} micro-spherical tip is a tribochemical process with participation of water. • The water amount at Si/SiO{sub 2} interface plays a significant role on the wear of bare silicon. • The role of water relies on the hydroxylation by auto-ionized OH{sup −}, the hydrolysis of H{sub 2}O molecules, and the dissolution of SiO{sub m}H{sub n} in water. - Abstract: Nanowear tests of bare silicon against a SiO{sub 2} microsphere were conducted in air (relative humidity [RH] = 0%–89%) and water using an atomic force microscope. Experimental results revealed that the water played an important role in the tribochemical wear of the bare silicon. A hillock-like wear trace with a height of 0.7 nm was generated on the bare silicon surface in dry air. As the RH increased, the wear depth increased and reached the maximum level in water. Analysis of frictional dissipated energy suggested that the wear of the bare silicon was not dominated by mechanical interactions. High-resolution transmission electron microscopy detection demonstrated that the silicon atoms and crystal lattice underneath the worn area maintained integral perfectly and thus further confirmed the tribochemical wear mechanism of the bare silicon. Finally, the role of water in the tribochemical wear of the bare silicon may be explained by the following three aspects: the hydroxylation by hydroxyl ions auto-ionized in water, the hydrolytic reaction of water molecules, and the dissolution of the tribochemical product SiO{sub m}H{sub n} in liquid water. With increasing RH, a greater water amount would adsorb to the Si/SiO{sub 2} interface and induce a more serious tribochemical wear on the bare silicon surface. The results of this paper may provide further insight into the tribochemical removal mechanism of bare monocrystalline silicon and furnish the wider reaction cognition for chemical mechanical polishing.

Optimization of the silicon subcell for III-V on silicon multijunction solar cells: Key differences with conventional silicon technology

Science.gov (United States)

García-Tabarés, Elisa; Martín, Diego; García, Iván; Lelièvre, Jean François; Rey-Stolle, Ignacio

2012-10-01

Dual-junction solar cells formed by a GaAsP or GaInP top cell and a silicon (Si) bottom cell seem to be attractive candidates to materialize the long sought-for integration of III-V materials on Si for photovoltaic (PV) applications. Such integration would offer a cost breakthrough for PV technology, unifying the low cost of Si and the efficiency potential of III-V multijunction solar cells. The optimization of the Si solar cells properties in flat-plate PV technology is well-known; nevertheless, it has been proven that the behavior of Si substrates is different when processed in an MOVPE reactor In this study, we analyze several factors influencing the bottom subcell performance, namely, 1) the emitter formation as a result of phosphorus diffusion; 2) the passivation quality provided by the GaP nucleation layer; and 3) the process impact on the bottom subcell PV properties.

Interference coupling mechanisms in Silicon Strip Detectors - CMS tracker "wings" A learned lesson for SLHC

CERN Document Server

Arteche, F; Rivetta, C

2009-01-01

The identification of coupling mechanisms between noise sources and sensitive areas of the front-end electronics (FEE) in the previous CMS tracker sub-system is critical to optimize the design and integration of integrated circuits, sensors and power distribution circuitry for the proposed SLHC Silicon Strip Tracker systems. This paper presents a validated model of the noise sensitivity observed in the Silicon Strip Detector-FEE of the CMS tracker that allows quantifying both the impact of the noise coupling mechanisms and the system immunity against electromagnetic interferences. This model has been validated based on simulations using finite element models and immunity tests conducted on prototypes of the Silicon Tracker End-Caps (TEC) and Outer Barrel (TOB) systems. The results of these studies show important recommendations and criteria to be applied in the design of future detectors to increase the immunity against electromagnetic noise.

A CMOS silicon spin qubit

Science.gov (United States)

Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; de Franceschi, S.

2016-11-01

Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

Optical micro-cavities on silicon

Science.gov (United States)

Dai, Daoxin; Liu, Erhu; Tan, Ying

2018-01-01

Silicon-based optical microcavities are very popular for many applications because of the ultra-compact footprint, easy scalability, and functional versatility. In this paper we give a discussion about the challenges of the optical microcavities on silicon and also give a review of our recent work, including the following parts. First, a near-"perfect" high-order MRR optical filter with a box-like filtering response is realized by introducing bent directional couplers to have sufficient coupling between the access waveguide and the microrings. Second, an efficient thermally-tunable MRR-based optical filter with graphene transparent nano-heater is realized by introducing transparent graphene nanoheaters. Thirdly, a polarization-selective microring-based optical filter is realized to work with resonances for only one of TE and TM polarizations for the first time. Finally, a on-chip reconfigurable optical add-drop multiplexer for hybrid mode- /wavelength-division-multiplexing systems is realized for the first time by monolithically integrating a mode demultiplexer, four MRR optical switches, and a mode multiplexer.

Epitaxial III-V nanowires on silicon for vertical devices

NARCIS (Netherlands)

Bakkers, E.P.A.M.; Borgström, M.T.; Einden, Van Den W.; Weert, van M.H.M.; Helman, A.; Verheijen, M.A.

2006-01-01

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the Vapor-Liquid-Solid (VLS) mechanism with laser ablation as well as metal organic vapor phase epitaxy. The VLS growth enables the fabrication of complex axial and radial

Buried oxide layer in silicon

Science.gov (United States)

Sadana, Devendra Kumar; Holland, Orin Wayne

2001-01-01

A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

Wafer-level integration of NiTi shape memory alloy on silicon using Au–Si eutectic bonding

International Nuclear Information System (INIS)

Gradin, Henrik; Bushra, Sobia; Braun, Stefan; Stemme, Göran; Van der Wijngaart, Wouter

2013-01-01

This paper reports on the wafer level integration of NiTi shape memory alloy (SMA) sheets with silicon substrates through Au–Si eutectic bonding. Different bond parameters, such as Au layer thicknesses and substrate surface treatments were evaluated. The amount of gold in the bond interface is the most important parameter to achieve a high bond yield; the amount can be determined by the barrier layers between the Au and Si or by the amount of Au deposition. Deposition of a gold layer of more than 1 μm thickness before bonding gives the most promising results. Through patterning of the SMA sheet and by limiting bonding to small areas, stresses created by the thermal mismatch between Si and NiTi are reduced. With a gold layer of 1 μm thickness and bond areas between 200 × 200 and 800 × 800 μm 2 a high bond strength and a yield above 90% is demonstrated. (paper)

Noise characterization of silicon strip detectors-comparison of sensors with and without integrated jfet source-follower.

CERN Document Server

Giacomini, Gabriele

Noise is often the main factor limiting the performance of detector systems. In this work a detailed study of the noise contributions in different types of silicon microstrip sensors is carried on. We investigate three sensors with double-sided readout fabricated by different suppliers for the ALICE experiment at the CERN LHC, in addition to detectors including an integrated JFET Source-Follower as a first signal conditioning stage. The latter have been designed as an attempt at improving the performance when very long strips, obtained by gangling together several sensors, are required. After a description of the strip sensors and of their operation, the “static” characterization measurements performed on them (current and capacitance versus voltage and/or frequency) are illustrated and interpreted. Numerical device simulation has been employed as an aid in interpreting some of the measurement results. The commonly used models for expressing the noise of the detector-amplifier system in terms of its relev...

Silicon waveguided components for the long-wave infrared region

Science.gov (United States)

Soref, Richard A.; Emelett, Stephen J.; Buchwald, Walter R.

2006-10-01

We propose that the operational wavelength of waveguided Si-based photonic integrated circuits and optoelectronic integrated circuits can be extended beyond the 1.55 µm telecom range into the wide infrared from 1.55 to 100 µm. The Si rib-membrane waveguide offers low-loss transmission from 1.2 to 6 µm and from 24 to 100 µm. This waveguide, which is compatible with Si microelectronics manufacturing, is constructed from silicon-on-insulator by etching away the oxide locally beneath the rib. Alternatively, low-loss waveguiding from 1.9 to 14.7 µm is assured by employing a crystal Ge rib grown directly upon the Si substrate. The Si-based hollow-core waveguide is an excellent device that minimizes loss due to silicon's 6-24 µm multi-phonon absorption. Here the rectangular air-filled core is surrounded by SiGe/Si multi-layer anti-resonant or Bragg claddings. The hollow channel offers less than 1.7 dB cm-1 loss from 1.2 to 100 µm. .

The ALICE Silicon Pixel Detector Control and Calibration Systems

CERN Document Server

Calì, Ivan Amos; Manzari, Vito; Stefanini, Giorgio

2008-01-01

The work presented in this thesis was carried out in the Silicon Pixel Detector (SPD) group of the ALICE experiment at the Large Hadron Collider (LHC). The SPD is the innermost part (two cylindrical layers of silicon pixel detec- tors) of the ALICE Inner Tracking System (ITS). During the last three years I have been strongly involved in the SPD hardware and software development, construction and commissioning. This thesis is focused on the design, development and commissioning of the SPD Control and Calibration Systems. I started this project from scratch. After a prototyping phase now a stable version of the control and calibration systems is operative. These systems allowed the detector sectors and half-barrels test, integration and commissioning as well as the SPD commissioning in the experiment. The integration of the systems with the ALICE Experiment Control System (ECS), DAQ and Trigger system has been accomplished and the SPD participated in the experimental December 2007 commissioning run. The complex...

Design and characterization of ultra-stretchable monolithic silicon fabric

KAUST Repository

Rojas, Jhonathan Prieto

2014-10-13

Stretchable electronic systems can play instrumental role for reconfigurable macro-electronics such as distributed sensor networks for wearable and bio-integrated electronics. Typically, polymer composite based materials and its deterministic design as interconnects are used to achieve such systems. Nonetheless, non-polymeric inorganic silicon is the predominant material for 90% of electronics. Therefore, we report the design and fabrication of an all silicon based network of hexagonal islands connected through spiral springs to form an ultra-stretchable arrangement for complete compliance to highly asymmetric shapes. Several design parameters are considered and their validation is carried out through finite element analysis. The fabrication process is based on conventional microfabrication techniques and the measured stretchability is more than 1000% for single spirals and area expansions as high as 30 folds in arrays. The reported method can provide ultra-stretchable and adaptable electronic systems for distributed network of high-performance macro-electronics especially useful for wearable electronics and bio-integrated devices.

Construction, Test And Calibration of the GLAST Silicon Tracker

Energy Technology Data Exchange (ETDEWEB)

Sgro, C.; Atwood, W.B.; Baldini, L.; Barbiellini, G.; Bellazzini, R.; Belli, F.; Bonamente, E.; Borden, T.; Bregeon, J.; Brez, A.; Brigida, M.; Caliandro, G.A.; Cecchi, C.; Cohen-Tanugi, J.; De Angelis, A.; Drell, P.; Favuzzi, C.; Fukazawa, Y.; Fusco, P.; Gargano, F.; Germani, S.; /INFN, Pisa /Pisa U. /UC, Santa Cruz /INFN, Trieste /Rome U.,Tor Vergata /SLAC /INFN, Bari /Bari U. /INFN, Perugia /Perugia U. /Udine U. /Hiroshima U. /Maryland U., JCA /Tokyo Inst. Tech. /JAXA, Sagamihara /INFN, Padua /Padua U. /Pisa, Scuola Normale Superiore /NASA, Goddard

2009-06-05

The Gamma-ray Large Area Space Telescope represents a great advance in space application of silicon detectors. With a surface of 80 m{sup 2} and about 1 M readout channels it is the largest silicon tracker ever built for a space experiment. GLAST is an astro-particle mission that will study the mostly unexplored, high energy (20 MeV-300 GeV) spectrum coming from active sources or diffused in the Universe. The detector integration and test phase is complete. The full instrument underwent environmental testing and the spacecraft integration phase has just started: the launch is foreseen in late 2007. In the meanwhile the spare modules are being used for instrument calibration and performance verification employing the CERN accelerator complex. A Calibration Unit has been exposed to photon, electron and hadron beams from a few GeV up to 300 GeV. We report on the status of the instrument and on the calibration campaign.

Design and characterization of ultra-stretchable monolithic silicon fabric

KAUST Repository

Rojas, Jhonathan Prieto; Carreno, Armando Arpys Arevalo; Foulds, I. G.; Hussain, Muhammad Mustafa

2014-01-01

Stretchable electronic systems can play instrumental role for reconfigurable macro-electronics such as distributed sensor networks for wearable and bio-integrated electronics. Typically, polymer composite based materials and its deterministic design as interconnects are used to achieve such systems. Nonetheless, non-polymeric inorganic silicon is the predominant material for 90% of electronics. Therefore, we report the design and fabrication of an all silicon based network of hexagonal islands connected through spiral springs to form an ultra-stretchable arrangement for complete compliance to highly asymmetric shapes. Several design parameters are considered and their validation is carried out through finite element analysis. The fabrication process is based on conventional microfabrication techniques and the measured stretchability is more than 1000% for single spirals and area expansions as high as 30 folds in arrays. The reported method can provide ultra-stretchable and adaptable electronic systems for distributed network of high-performance macro-electronics especially useful for wearable electronics and bio-integrated devices.

The solenoidal detector collaboration silicon detector system

International Nuclear Information System (INIS)

Ziock, H.J.; Gamble, M.T.; Miller, W.O.; Palounek, A.P.T.; Thompson, T.C.

1992-01-01

Silicon tracking systems (STS) will be fundamental components of the tracking systems for both planned major SSC experiments. The STS is physically a small part of the central tracking system and the calorimeter of the detector being proposed by the Solenoidal Detector Collaboration (SDC). Despite its seemingly small size, it occupies a volume of more than 5 meters in length and 1 meter in diameter and is an order of magnitude larger than any silicon detector system previously built. The STS will consist of silicon microstrip detectors and possibly silicon pixel detectors. The other two components are an outer barrel tracker, which will consist of straw tubes or scintillating fibers; and an outer intermediate angle tracker, which will consist of gas microstrips. The components are designed to work as an integrated system. Each componenet has specific strengths, but is individually incapable of providing the overall performance required by the physics goals of the SSC. The large particle fluxes, the short times between beam crossing, the high channel count, and the required very high position measurement accuracy pose challenging problems that must be solved. Furthermore, to avoid degrading the measurements, the solutions must be achieved using only a minimal amount of material. An additional constraint is that only low-Z materials are allowed. If that were not difficlut enough, the solutions must also be affordable

Near-infrared sub-bandgap all-silicon photodetectors: state of the art and perspectives.

Science.gov (United States)

Casalino, Maurizio; Coppola, Giuseppe; Iodice, Mario; Rendina, Ivo; Sirleto, Luigi

2010-01-01

Due to recent breakthroughs, silicon photonics is now the most active discipline within the field of integrated optics and, at the same time, a present reality with commercial products available on the market. Silicon photodiodes are excellent detectors at visible wavelengths, but the development of high-performance photodetectors on silicon CMOS platforms at wavelengths of interest for telecommunications has remained an imperative but unaccomplished task so far. In recent years, however, a number of near-infrared all-silicon photodetectors have been proposed and demonstrated for optical interconnect and power-monitoring applications. In this paper, a review of the state of the art is presented. Devices based on mid-bandgap absorption, surface-state absorption, internal photoemission absorption and two-photon absorption are reported, their working principles elucidated and their performance discussed and compared.

Near-Infrared Sub-Bandgap All-Silicon Photodetectors: State of the Art and Perspectives

Directory of Open Access Journals (Sweden)

Luigi Sirleto

2010-11-01

Full Text Available Due to recent breakthroughs, silicon photonics is now the most active discipline within the field of integrated optics and, at the same time, a present reality with commercial products available on the market. Silicon photodiodes are excellent detectors at visible wavelengths, but the development of high-performance photodetectors on silicon CMOS platforms at wavelengths of interest for telecommunications has remained an imperative but unaccomplished task so far. In recent years, however, a number of near-infrared all-silicon photodetectors have been proposed and demonstrated for optical interconnect and power-monitoring applications. In this paper, a review of the state of the art is presented. Devices based on mid-bandgap absorption, surface-state absorption, internal photoemission absorption and two-photon absorption are reported, their working principles elucidated and their performance discussed and compared.

Ion beam studied of silicon oxynitride and silicon nitroxide thin layers

International Nuclear Information System (INIS)

Oude Elferink, J.B.

1989-01-01

In this the processes occurring during high temperature treatments of silicon oxynitride and silicon oxide layers are described. Oxynitride layers with various atomic oxygen to nitrogen concentration ration (O/N) are considered. The high energy ion beam techniques Rutherford backscattering spectroscopy, elastic recoil detection and nuclear reaction analysis have been used to study the layer structures. A detailed discussion of these ion beam techniques is given. Numerical methods used to obtain quantitative data on elemental compositions and depth profiles are described. The electrical compositions and depth profiles are described. The electrical properties of silicon nitride films are known to be influenced by the behaviour of hydrogen in the film during high temperature anneling. Investigations of the behaviour of hydrogen are presented. Oxidation of silicon (oxy)nitride films in O 2 /H 2 0/HCl and nitridation of silicon dioxide films in NH 3 are considered since oxynitrides are applied as an oxidation mask in the LOCOS (Local oxidation of silicon) process. The nitridation of silicon oxide layers in an ammonia ambient is considered. The initial stage and the dependence on the oxide thickness of nitrogen and hydrogen incorporation are discussed. Finally, oxidation of silicon oxynitride layers and of silicon oxide layers are compared. (author). 76 refs.; 48 figs.; 1 tab

Highly efficient luminescent solar concentrators based on earth-abundant indirect-bandgap silicon quantum dots

Science.gov (United States)

Meinardi, Francesco; Ehrenberg, Samantha; Dhamo, Lorena; Carulli, Francesco; Mauri, Michele; Bruni, Francesco; Simonutti, Roberto; Kortshagen, Uwe; Brovelli, Sergio

2017-02-01

Building-integrated photovoltaics is gaining consensus as a renewable energy technology for producing electricity at the point of use. Luminescent solar concentrators (LSCs) could extend architectural integration to the urban environment by realizing electrode-less photovoltaic windows. Crucial for large-area LSCs is the suppression of reabsorption losses, which requires emitters with negligible overlap between their absorption and emission spectra. Here, we demonstrate the use of indirect-bandgap semiconductor nanostructures such as highly emissive silicon quantum dots. Silicon is non-toxic, low-cost and ultra-earth-abundant, which avoids the limitations to the industrial scaling of quantum dots composed of low-abundance elements. Suppressed reabsorption and scattering losses lead to nearly ideal LSCs with an optical efficiency of η = 2.85%, matching state-of-the-art semi-transparent LSCs. Monte Carlo simulations indicate that optimized silicon quantum dot LSCs have a clear path to η > 5% for 1 m2 devices. We are finally able to realize flexible LSCs with performances comparable to those of flat concentrators, which opens the way to a new design freedom for building-integrated photovoltaics elements.

Trends in heteroepitaxy of III-Vs on silicon for photonic and photovoltaic applications

Science.gov (United States)

Lourdudoss, Sebastian; Junesand, Carl; Kataria, Himanshu; Metaferia, Wondwosen; Omanakuttan, Giriprasanth; Sun, Yan-Ting; Wang, Zhechao; Olsson, Fredrik

2017-02-01

We present and compare the existing methods of heteroepitaxy of III-Vs on silicon and their trends. We focus on the epitaxial lateral overgrowth (ELOG) method as a means of achieving good quality III-Vs on silicon. Initially conducted primarily by near-equilibrium epitaxial methods such as liquid phase epitaxy and hydride vapour phase epitaxy, nowadays ELOG is being carried out even by non-equilibrium methods such as metal organic vapour phase epitaxy. In the ELOG method, the intermediate defective seed and the mask layers still exist between the laterally grown purer III-V layer and silicon. In a modified ELOG method called corrugated epitaxial lateral overgrowth (CELOG) method, it is possible to obtain direct interface between the III-V layer and silicon. In this presentation we exemplify some recent results obtained by these techniques. We assess the potentials of these methods along with the other existing methods for realizing truly monolithic photonic integration on silicon and III-V/Si heterojunction solar cells.

Ultra-low-loss inverted taper coupler for silicon-on-insulator ridge waveguide

DEFF Research Database (Denmark)

Pu, Minhao; Liu, Liu; Ou, Haiyan

2010-01-01

An ultra-low-loss coupler for interfacing a silicon-on-insulator ridge waveguide and a single-mode fiber in both polarizations is presented. The inverted taper coupler, embedded in a polymer waveguide, is optimized for both the transverse-magnetic and transverse-electric modes through tapering...... the width of the silicon-on-insulator waveguide from 450 nm down to less than 15 nm applying a thermal oxidation process. Two inverted taper couplers are integrated with a 3-mm long silicon-on-insulator ridge waveguide in the fabricated sample. The measured coupling losses of the inverted taper coupler...... for transverse-magnetic and transverse-electric modes are ~0.36 dB and ~0.66 dB per connection, respectively....

Low cost silicon solar array project: Feasibility of low-cost, high-volume production of silane and pyrolysis of silane to semiconductor-grade silicon

Science.gov (United States)

Breneman, W. C.

1978-01-01

Silicon epitaxy analysis of silane produced in the Process Development Unit operating in a completely integrated mode consuming only hydrogen and metallurgical silicon resulted in film resistivities of up to 120 ohms cm N type. Preliminary kinetic studies of dichlorosilane disproportionation in the liquid phase have shown that 11.59% SiH4 is formed at equilibrium after 12 minutes contact time at 56 C. The fluid-bed reactor was operated continuously for 48 hours with a mixture of one percent silane in helium as the fluidizing gas. A high silane pyrolysis efficiency was obtained without the generation of excessive fines. Gas flow conditions near the base of the reactor were unfavorable for maintaining a bubbling bed with good heat transfer characteristics. Consequently, a porous agglomerate formed in the lower portion of the reactor. Dense coherent plating was obtained on the silicon seed particles which had remained fluidizied throughout the experiment.

Nonlinear silicon photonics

Science.gov (United States)

Tsia, Kevin K.; Jalali, Bahram

2010-05-01

An intriguing optical property of silicon is that it exhibits a large third-order optical nonlinearity, with orders-ofmagnitude larger than that of silica glass in the telecommunication band. This allows efficient nonlinear optical interaction at relatively low power levels in a small footprint. Indeed, we have witnessed a stunning progress in harnessing the Raman and Kerr effects in silicon as the mechanisms for enabling chip-scale optical amplification, lasing, and wavelength conversion - functions that until recently were perceived to be beyond the reach of silicon. With all the continuous efforts developing novel techniques, nonlinear silicon photonics is expected to be able to reach even beyond the prior achievements. Instead of providing a comprehensive overview of this field, this manuscript highlights a number of new branches of nonlinear silicon photonics, which have not been fully recognized in the past. In particular, they are two-photon photovoltaic effect, mid-wave infrared (MWIR) silicon photonics, broadband Raman effects, inverse Raman scattering, and periodically-poled silicon (PePSi). These novel effects and techniques could create a new paradigm for silicon photonics and extend its utility beyond the traditionally anticipated applications.

Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate

Directory of Open Access Journals (Sweden)

Suk Won Jung

2016-12-01

Full Text Available This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 (rd1 mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

Tailoring the optical characteristics of microsized InP nanoneedles directly grown on silicon.

Science.gov (United States)

Li, Kun; Sun, Hao; Ren, Fan; Ng, Kar Wei; Tran, Thai-Truong D; Chen, Roger; Chang-Hasnain, Connie J

2014-01-08

Nanoscale self-assembly offers a pathway to realize heterogeneous integration of III-V materials on silicon. However, for III-V nanowires directly grown on silicon, dislocation-free single-crystal quality could only be attained below certain critical dimensions. We recently reported a new approach that overcomes this size constraint, demonstrating the growth of single-crystal InGaAs/GaAs and InP nanoneedles with the base diameters exceeding 1 μm. Here, we report distinct optical characteristics of InP nanoneedles which are varied from mostly zincblende, zincblende/wurtzite-mixed, to pure wurtzite crystalline phase. We achieved, for the first time, pure single-crystal wurtzite-phase InP nanoneedles grown on silicon with bandgaps of 80 meV larger than that of zincblende-phase InP. Being able to attain excellent material quality while scaling up in size promises outstanding device performance of these nanoneedles. At room temperature, a high internal quantum efficiency of 25% and optically pumped lasing are demonstrated for single nanoneedle as-grown on silicon substrate. Recombination dynamics proves the excellent surface quality of the InP nanoneedles, which paves the way toward achieving multijunction photovoltaic cells, long-wavelength heterostructure lasers, and advanced photonic integrated circuits.

Liquid phase epitaxial growth of silicon on porous silicon for photovoltaic applications

International Nuclear Information System (INIS)

Berger, S.; Quoizola, S.; Fave, A.; Kaminski, A.; Perichon, S.; Barbier, D.; Laugier, A.

2001-01-01

The aim of this experiment is to grow a thin silicon layer ( 2 atmosphere, and finally LPE silicon growth with different temperature profiles in order to obtain a silicon layer on the sacrificial porous silicon (p-Si). We observed a pyramidal growth on the surface of the (100) porous silicon but the coalescence was difficult to obtain. However, on a p-Si (111) oriented wafer, homogeneous layers were obtained. (orig.)

Microspot-based ELISA in microfluidics: chemiluminescence and colorimetry detection using integrated thin-film hydrogenated amorphous silicon photodiodes.

Science.gov (United States)

Novo, Pedro; Prazeres, Duarte Miguel França; Chu, Virginia; Conde, João Pedro

2011-12-07

Microfluidic technology has the potential to decrease the time of analysis and the quantity of sample and reactants required in immunoassays, together with the potential of achieving high sensitivity, multiplexing, and portability. A lab-on-a-chip system was developed and optimized using optical and fluorescence microscopy. Primary antibodies are adsorbed onto the walls of a PDMS-based microchannel via microspotting. This probe antibody is then recognised using secondary FITC or HRP labelled antibodies responsible for providing fluorescence or chemiluminescent and colorimetric signals, respectively. The system incorporated a micron-sized thin-film hydrogenated amorphous silicon photodiode microfabricated on a glass substrate. The primary antibody spots in the PDMS-based microfluidic were precisely aligned with the photodiodes for the direct detection of the antibody-antigen molecular recognition reactions using chemiluminescence and colorimetry. The immunoassay takes ~30 min from assay to the integrated detection. The conditions for probe antibody microspotting and for the flow-through ELISA analysis in the microfluidic format with integrated detection were defined using antibody solutions with concentrations in the nM-μM range. Sequential colorimetric or chemiluminescence detection of specific antibody-antigen molecular recognition was quantitatively detected using the photodiode. Primary antibody surface densities down to 0.182 pmol cm(-2) were detected. Multiplex detection using different microspotted primary antibodies was demonstrated.

Dissolution chemistry and biocompatibility of silicon- and germanium-based semiconductors for transient electronics.

Science.gov (United States)

Kang, Seung-Kyun; Park, Gayoung; Kim, Kyungmin; Hwang, Suk-Won; Cheng, Huanyu; Shin, Jiho; Chung, Sangjin; Kim, Minjin; Yin, Lan; Lee, Jeong Chul; Lee, Kyung-Mi; Rogers, John A

2015-05-06

Semiconducting materials are central to the development of high-performance electronics that are capable of dissolving completely when immersed in aqueous solutions, groundwater, or biofluids, for applications in temporary biomedical implants, environmentally degradable sensors, and other systems. The results reported here include comprehensive studies of the dissolution by hydrolysis of polycrystalline silicon, amorphous silicon, silicon-germanium, and germanium in aqueous solutions of various pH values and temperatures. In vitro cellular toxicity evaluations demonstrate the biocompatibility of the materials and end products of dissolution, thereby supporting their potential for use in biodegradable electronics. A fully dissolvable thin-film solar cell illustrates the ability to integrate these semiconductors into functional systems.

Integrating integrated circuit chips on paper substrates using inkjet printed electronics

CSIR Research Space (South Africa)

Bezuidenhout, Petrone H

2016-11-01

Full Text Available This paper investigates the integration of silicon and paper substrates using rapid prototyping inkjet printed electronics. Various Dimatix DMP-2831 material printer settings and adhesives are investigated. The aim is to robustly and effectively...

An electrochromatography chip with integrated waveguides for UV absorbance detection

International Nuclear Information System (INIS)

Gustafsson, O; Mogensen, K B; Ohlsson, P D; Kutter, J P; Liu, Y; Jacobson, S C

2008-01-01

A silicon-based microchip for electrochromatographic separations is presented. Apart from a microfluidic network, the microchip has integrated UV-transparent waveguides for detection and integrated couplers for optical fibers on the chip, yielding the most complete chromatography microchip to date in terms of the integration of optical components. The microfluidic network and the optical components are fabricated in a single etching step in silicon and subsequently thermally oxidized. The separation column consists of a regular array of microfabricated solid support structures with a monolayer of an octylsilane covalently bonded to the surfaces to provide chromatographic interaction. The chip features a 1 mm long U-shaped detection cell and planar silicon dioxide waveguides that couple light to and from the detection cell. Microfabricated on-chip fiber couplers assure perfect alignment of optical fibers to the waveguides. The entire oxidized silicon microchip structure is sealed with a glass lid. Reversed phase electrochromatographic separation of three neutral compounds is demonstrated using UV absorbance detection at 254 nm. Baseline separation of the analytes is achieved in less than two minutes

[A micro-silicon multi-slit spectrophotometer based on MEMS technology].

Science.gov (United States)

Hao, Peng; Wu, Yi-Hui; Zhang, Ping; Liu, Yong-Shun; Zhang, Ke; Li, Hai-Wen

2009-06-01

A new mini-spectrophotometer was developed by adopting micro-silicon slit and pixel segmentation technology, and this spectrophotometer used photoelectron diode array as the detector by the back-dividing-light way. At first, the effect of the spectral bandwidth on the tested absorbance linear correlation was analyzed. A theory for the design of spectrophotometer's slit was brought forward after discussing the relationships between spectrophotometer spectrum band width and pre-and post-slits width. Then, the integrative micro-silicon-slit, which features small volume, high precision, and thin thickness, was manufactured based on the MEMS technology. Finally, a test was carried on linear absorbance solution by this spectrophotometer. The final result showed that the correlation coefficients were larger than 0.999, which means that the new mini-spectrophotometer with micro-silicon slit pixel segmentation has an obvious linear correlation.

APPLIED OPTICS. Voltage-tunable circular photogalvanic effect in silicon nanowires.

Science.gov (United States)

Dhara, Sajal; Mele, Eugene J; Agarwal, Ritesh

2015-08-14

Electronic bands in crystals can support nontrivial topological textures arising from spin-orbit interactions, but purely orbital mechanisms can realize closely related dynamics without breaking spin degeneracies, opening up applications in materials containing only light elements. One such application is the circular photogalvanic effect (CPGE), which is the generation of photocurrents whose magnitude and polarity depend on the chirality of optical excitation. We show that the CPGE can arise from interband transitions at the metal contacts to silicon nanowires, where inversion symmetry is locally broken by an electric field. Bias voltage that modulates this field further controls the sign and magnitude of the CPGE. The generation of chirality-dependent photocurrents in silicon with a purely orbital-based mechanism will enable new functionalities in silicon that can be integrated with conventional electronics. Copyright © 2015, American Association for the Advancement of Science.

SVX3: A deadtimeless readout chip for silicon strip detectors

International Nuclear Information System (INIS)

Zimmerman, T.; Huffman, T.; Srage, J.; Stroehmer, R.; Yarema, R.; Garcia-Sciveras, M.; Luo, L.; Milgrome, O.

1997-12-01

A new silicon strip readout chip called the SVX3 has been designed for the 720,000 channel CDF silicon upgrade at Fermilab. SVX3 incorporates an integrator, analog delay pipeline, ADC, and data sparsification for each of 128 identical channels. Many of the operating parameters are programmable via a serial bit stream, which allows the chip to be used under a variety of conditions. Distinct features of SVX3 include use of a backside substrate contact for optimal ground referencing, and the capability of simultaneous signal acquisition and digital readout allowing deadtimeless operation in the Fermilab Tevatron

High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

KAUST Repository

Sevilla, Galo T.

2016-02-29

Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

Silicon-on-Insulator Nanowire Based Optical Waveguide Biosensors

International Nuclear Information System (INIS)

Li, Mingyu; Liu, Yong; Chen, Yangqing; He, Jian-Jun

2016-01-01

Optical waveguide biosensors based on silicon-on-insulator (SOI) nanowire have been developed for label free molecular detection. This paper reviews our work on the design, fabrication and measurement of SOI nanowire based high-sensitivity biosensors employing Vernier effect. Biosensing experiments using cascaded double-ring sensor and Mach-Zehnder- ring sensor integrated with microfluidic channels are demonstrated (paper)

Graphene radio frequency receiver integrated circuit.

Science.gov (United States)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Mechanical integrity of a carbon nanotube/copper-based through-silicon via for 3D integrated circuits: a multi-scale modeling approach.

Science.gov (United States)

Awad, Ibrahim; Ladani, Leila

2015-12-04

Carbon nanotube (CNT)/copper (Cu) composite material is proposed to replace Cu-based through-silicon vias (TSVs) in micro-electronic packages. The proposed material is believed to offer extraordinary mechanical and electrical properties and the presence of CNTs in Cu is believed to overcome issues associated with miniaturization of Cu interconnects, such as electromigration. This study introduces a multi-scale modeling of the proposed TSV in order to evaluate its mechanical integrity under mechanical and thermo-mechanical loading conditions. Molecular dynamics (MD) simulation was used to determine CNT/Cu interface adhesion properties. A cohesive zone model (CZM) was found to be most appropriate to model the interface adhesion, and CZM parameters at the nanoscale were determined using MD simulation. CZM parameters were then used in the finite element analysis in order to understand the mechanical and thermo-mechanical behavior of composite TSV at micro-scale. From the results, CNT/Cu separation does not take place prior to plastic deformation of Cu in bending, and separation does not take place when standard thermal cycling is applied. Further investigation is recommended in order to alleviate the increased plastic deformation in Cu at the CNT/Cu interface in both loading conditions.

A silicon nanowire heater and thermometer

Science.gov (United States)

Zhao, Xingyan; Dan, Yaping

2017-07-01

In the thermal conductivity measurements of thermoelectric materials, heaters and thermometers made of the same semiconducting materials under test, forming a homogeneous system, will significantly simplify fabrication and integration. In this work, we demonstrate a high-performance heater and thermometer made of single silicon nanowires (SiNWs). The SiNWs are patterned out of a silicon-on-insulator wafer by CMOS-compatible fabrication processes. The electronic properties of the nanowires are characterized by four-probe and low temperature Hall effect measurements. The I-V curves of the nanowires are linear at small voltage bias. The temperature dependence of the nanowire resistance allows the nanowire to be used as a highly sensitive thermometer. At high voltage bias, the I-V curves of the nanowire become nonlinear due to the effect of Joule heating. The temperature of the nanowire heater can be accurately monitored by the nanowire itself as a thermometer.

Silicon graphene waveguide tunable broadband microwave photonics phase shifter.

Science.gov (United States)

Capmany, José; Domenech, David; Muñoz, Pascual

2014-04-07

We propose the use of silicon graphene waveguides to implement a tunable broadband microwave photonics phase shifter based on integrated ring cavities. Numerical computation results show the feasibility for broadband operation over 40 GHz bandwidth and full 360° radiofrequency phase-shift with a modest voltage excursion of 0.12 volt.

Production of technical silicon and silicon carbide from rice-husk

Directory of Open Access Journals (Sweden)

A. Z. Issagulov

2014-10-01

Full Text Available In the article there are studied physical and chemical properties of silicon-carbonic raw material – rice-husk, thermophysical characteristics of the process of rice-husk pyrolysis in nonreactive and oxidizing environment; structure and phase composition of products of the rice-husk pyrolysis in interval of temperatures 150 – 850 °С and high temperature pyrolysis in interval of temperatures 900 – 1 500 °С. There are defined the silicon-carbon production conditions, which meet the requirements applicable to charging materials at production of technical silicon and silicon carbide.

Photovoltaic characteristics of porous silicon /(n+ - p) silicon solar cells

International Nuclear Information System (INIS)

Dzhafarov, T.D.; Aslanov, S.S.; Ragimov, S.H.; Sadigov, M.S.; Nabiyeva, A.F.; Yuksel, Aydin S.

2012-01-01

Full text : The purpose of this work is to improve the photovoltaic parameters of the screen-printed silicon solar cells by formation the nano-porous silicon film on the frontal surface of the cell. The photovoltaic characteristics of two type silicon solar cells with and without porous silicon layer were measured and compared. A remarkable increment of short-circuit current density and the efficiency by 48 percent and 20 percent, respectively, have been achieved for PS/(n + - pSi) solar cell comparing to (n + - p)Si solar cell without PS layer

Energy Payback Time Calculation for a Building Integrated Semitransparent Thermal (BISPVT) System with Air Duct

OpenAIRE

Kanchan Mudgil; Deepali Kamthania

2013-01-01

This paper evaluates the energy payback time (EPBT) of building integrated photovoltaic thermal (BISPVT) system for Srinagar, India. Three different photovoltaic (PV) modules namely mono crystalline silicon (m-Si), poly crystalline silicon (p-Si), and amorphous silicon (a-Si) have been considered for calculation of EPBT. It is found that, the EPBT is lowest in m-Si. Hence, integration of m-Si PV modules on the roof of a room is economical.

Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

Science.gov (United States)

Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

2005-01-01

Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

Integrated programmable photonic filter on the silicon -on- insulator platform

DEFF Research Database (Denmark)