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Sample records for high-k gate stacks

  1. Backside versus frontside advanced chemical analysis of high-k/metal gate stacks

    Energy Technology Data Exchange (ETDEWEB)

    Martinez, E., E-mail: eugenie.martinez@cea.fr [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Saidi, B. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Veillerot, M. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Caubet, P. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Fabbri, J-M. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Piallat, F. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Gassilloud, R. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Schamm-Chardon, S. [CEMES-CNRS et Université de Toulouse, 29 rue Jeanne Marvig, 31055 Toulouse (France)

    2015-08-15

    Highlights: • The backside approach is a promising solution for advanced chemical characterization of future MOSFETs. • Frontside ToF-SIMS and Auger depth profiles are affected by cumulative mixing effects and thus not relevant for analyzing ultra-thin layers. • Higher in-depth resolution is possible in the backside approach for Auger and ToF-SIMS depth profiling. • Backside depth profiling allows revealing ultra-thin layers and elemental in-depth redistribution inside high-k/metal gate stacks. • Backside XPS allows preserving the full metal gate, thus enabling the analysis of real technological samples. - Abstract: Downscaling of transistors beyond the 14 nm technological node requires the implementation of new architectures and materials. Advanced characterization methods are needed to gain information about the chemical composition of buried layers and interfaces. An effective approach based on backside analysis is presented here. X-ray photoelectron spectroscopy, Auger depth profiling and time-of-flight secondary ions mass spectrometry are combined to investigate inter-diffusion phenomena. To highlight improvements related to the backside method, backside and frontside analyses are compared. Critical information regarding nitrogen, oxygen and aluminium redistribution inside the gate stacks is obtained only in the backside configuration.

  2. Analysis of high-k spacer on symmetric underlap DG-MOSFET with Gate Stack architecture

    Science.gov (United States)

    Das, Rahul; Chakraborty, Shramana; Dasgupta, Arpan; Dutta, Arka; Kundu, Atanu; Sarkar, Chandan K.

    2016-09-01

    This paper shows the systematic study of underlap double gate (U-DG) NMOSFETs with Gate Stack (GS) under the influence of high-k spacers. In highly scaled devices, underlap is used at the Source and Drain side so as to reduce the short channel effects (SCE's), however, it significantly reduces the on current due to the increased channel resistance. To overcome these drawbacks, the use of high-k spacers is projected as one of the remedies. In this paper, the analog performance of the devices is studied on the basis of parameters like transconductance (gm), transconductance generation factor (gm/Id) and intrinsic gain (gmro). The RF performance is analyzed on the merits of intrinsic capacitance (Cgd, Cgs), resistance (Rgd, Rgs), transport delay (τm), inductance (Lsd), cutoff frequency (fT), and the maximum frequency of oscillation (fmax). The circuit performance of the devices are studied by implementing the device as the driver MOSFET in a Single Stage Common Source Amplifier. The Gain Bandwidth Product (GBW) has been analyzed from the frequency response of the circuit.

  3. Comprehensive study and design of scaled metal/high-k/Ge gate stacks with ultrathin aluminum oxide interlayers

    Energy Technology Data Exchange (ETDEWEB)

    Asahara, Ryohei; Hideshima, Iori; Oka, Hiroshi; Minoura, Yuya; Hosoi, Takuji, E-mail: hosoi@mls.eng.osaka-u.ac.jp; Shimura, Takayoshi; Watanabe, Heiji [Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871 (Japan); Ogawa, Shingo [Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871 (Japan); Toray Research Center Inc., 3-3-7 Sonoyama, Otsu, Shiga 520-8567 (Japan); Yoshigoe, Akitaka; Teraoka, Yuden [Japan Atomic Energy Agency, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan)

    2015-06-08

    Advanced metal/high-k/Ge gate stacks with a sub-nm equivalent oxide thickness (EOT) and improved interface properties were demonstrated by controlling interface reactions using ultrathin aluminum oxide (AlO{sub x}) interlayers. A step-by-step in situ procedure by deposition of AlO{sub x} and hafnium oxide (HfO{sub x}) layers on Ge and subsequent plasma oxidation was conducted to fabricate Pt/HfO{sub 2}/AlO{sub x}/GeO{sub x}/Ge stacked structures. Comprehensive study by means of physical and electrical characterizations revealed distinct impacts of AlO{sub x} interlayers, plasma oxidation, and metal electrodes serving as capping layers on EOT scaling, improved interface quality, and thermal stability of the stacks. Aggressive EOT scaling down to 0.56 nm and very low interface state density of 2.4 × 10{sup 11 }cm{sup −2}eV{sup −1} with a sub-nm EOT and sufficient thermal stability were achieved by systematic process optimization.

  4. The fabrication and the reliability of poly-Si MOSFETs using ultra-thin high-K/metal-gate stack

    Science.gov (United States)

    Lee, M. H.; Chen, K.-J.

    2013-01-01

    Poly-Si MOSFETs using a gate stack composed of ultra-thin HfSiOx and TiN are shown, and they are compatible with a monolithic three-dimensional integrated circuit (3D-ICs) process with the highest thermal budget of 700 °C. The poly-Si MOSFETs were studied for fabrication process temperatures with parasitic resistance, effective gate length, and grain boundary trap density. The short-channel effect with VT (threshold voltage), subthreshold swing (SS), and drain-induced barrier lowering (DIBL) was also compared at 650 °C and 700 °C. For stress reliability of both hot carrier and PBTI, the short-channel devices showed more stability in VT than the long-channel devices due to less grain boundary scattering. This study promotes the ultra-thin high-K/metal gate poly-Si MOSFET as a candidate for future monolithic 3D-ICs and silicon-on-glass (SOG) applications.

  5. A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric

    Science.gov (United States)

    Chaowen, Liu; Jingping, Xu; Lu, Liu; Hanhan, Lu; Yuan, Huang

    2016-02-01

    A threshold-voltage model for a stacked high-k gate dielectric GaAs MOSFET is established by solving a two-dimensional Poisson's equation in channel and considering the short-channel, DIBL and quantum effects. The simulated results are in good agreement with the Silvaco TCAD data, confirming the correctness and validity of the model. Using the model, impacts of structural and physical parameters of the stack high-k gate dielectric on the threshold-voltage shift and the temperature characteristics of the threshold voltage are investigated. The results show that the stacked gate dielectric structure can effectively suppress the fringing-field and DIBL effects and improve the threshold and temperature characteristics, and on the other hand, the influence of temperature on the threshold voltage is overestimated if the quantum effect is ignored. Project supported by the National Natural Science Foundation of China (No. 61176100).

  6. Extremely scaled high-k/In₀.₅₃Ga₀.₄₇As gate stacks with low leakage and low interface trap densities

    Energy Technology Data Exchange (ETDEWEB)

    Chobpattana, Varistha; Mikheev, Evgeny; Zhang, Jack Y.; Mates, Thomas E.; Stemmer, Susanne [Materials Department, University of California, Santa Barbara, California 93106-5050 (United States)

    2014-09-28

    Highly scaled gate dielectric stacks with low leakage and low interface trap densities are required for complementary metal-oxide-semiconductor technology with III-V semiconductor channels. Here, we show that a novel pre-deposition technique, consisting of alternating cycles of nitrogen plasma and tetrakis(dimethylamino)titanium, allows for HfO₂ and ZrO₂ gate stacks with extremely high accumulation capacitance densities of more than 5 μF/cm₂ at 1 MHz, low leakage current, low frequency dispersion, and low midgap interface trap densities (10¹²cm⁻²eV⁻¹range). Using x-ray photoelectron spectroscopy, we show that the interface contains TiO₂ and small quantities of In₂O₃, but no detectable Ga- or As-oxides, or As-As bonding. The results allow for insights into the microscopic mechanisms that control leakage and frequency dispersion in high-k/III-V gate stacks.

  7. Two methods of tuning threshold voltage of bulk FinFETs with replacement high-k metal-gate stacks

    Science.gov (United States)

    Xu, Miao; Zhu, Huilong; Zhang, Yanbo; Xu, Qiuxia; Zhang, Yongkui; Qin, Changliang; Zhang, Qingzhu; Yin, Huaxiang; Xu, Hao; Chen, Shuai; Luo, Jun; Li, Chunlong; Zhao, Chao; Ye, Tianchun

    2017-03-01

    In this work, we propose two threshold voltage (VTH) tuning methods for bulk FinFETs with replacement high-k metal gate. The first method is to perform a vertical implantation into fin structure after dummy gate removal, self-aligned forming halo & punch through stop pocket (halo & PTSP) doping profile. The second method is to execute P+/BF2+ ion implantations into the single common work function (WF) layer in N-/P-FinFETs, respectively. These two methods have been investigated by TCAD simulations and MOS-capacitor experiments respectively, and then integrated into FinFET fabrication successfully. Experimental results show that the halo & PTSP doping profile can reduce VTH roll off and total variation. With P+/BF2+ doped WF layer, the VTH-sat shift -0.43 V/+1.26 V for N-FinFETs and -0.75 V/+0.11 V for P-FinFETs, respectively, with gate length of 500 nm. The proposed two methods are simple and effective for FinFET VTH tuning, and have potential for future application of massive production.

  8. High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

    Science.gov (United States)

    Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

    2012-08-01

    A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

  9. Effects of Gate Stack Structural and Process Defectivity on High-k Dielectric Dependence of NBTI Reliability in 32 nm Technology Node PMOSFETs

    Directory of Open Access Journals (Sweden)

    H. Hussin

    2014-01-01

    Full Text Available We present a simulation study on negative bias temperature instability (NBTI induced hole trapping in E′ center defects, which leads to depassivation of interface trap precursor in different geometrical structures of high-k PMOSFET gate stacks using the two-stage NBTI model. The resulting degradation is characterized based on the time evolution of the interface and hole trap densities, as well as the resulting threshold voltage shift. By varying the physical thicknesses of the interface silicon dioxide (SiO2 and hafnium oxide (HfO2 layers, we investigate how the variation in thickness affects hole trapping/detrapping at different stress temperatures. The results suggest that the degradations are highly dependent on the physical gate stack parameters for a given stress voltage and temperature. The degradation is more pronounced by 5% when the thicknesses of HfO2 are increased but is reduced by 11% when the SiO2 interface layer thickness is increased during lower stress voltage. However, at higher stress voltage, greater degradation is observed for a thicker SiO2 interface layer. In addition, the existence of different stress temperatures at which the degradation behavior differs implies that the hole trapping/detrapping event is thermally activated.

  10. Flexible semi-transparent silicon (100) fabric with high-k/metal gate devices

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-01-07

    Can we build a flexible and transparent truly high performance computer? High-k/metal gate stack based metal-oxide-semiconductor capacitor devices are monolithically fabricated on industry\\'s most widely used low-cost bulk single-crystalline silicon (100) wafers and then released as continuous, mechanically flexible, optically semi-transparent and high thermal budget compatible silicon fabric with devices. This is the first ever demonstration with this set of materials which allows full degree of freedom to fabricate nanoelectronics devices using state-of-the-art CMOS compatible processes and then to utilize them in an unprecedented way for wide deployment over nearly any kind of shape and architecture surfaces. Electrical characterization shows uncompromising performance of post release devices. Mechanical characterization shows extra-ordinary flexibility (minimum bending radius of 1 cm) making this generic process attractive to extend the horizon of flexible electronics for truly high performance computers. Schematic and photograph of flexible high-k/metal gate MOSCAPs showing high flexibility and C-V plot showing uncompromised performance. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Yttrium scandate thin film as alternative high-permittivity dielectric for germanium gate stack formation

    Science.gov (United States)

    Lu, Cimang; Lee, Choong Hyun; Nishimura, Tomonori; Toriumi, Akira

    2015-08-01

    We investigated yttrium scandate (YScO3) as an alternative high-permittivity (k) dielectric thin film for Ge gate stack formation. Significant enhancement of k-value is reported in YScO3 comparing to both of its binary compounds, Y2O3 and Sc2O3, without any cost of interface properties. It suggests a feasible approach to a design of promising high-k dielectrics for Ge gate stack, namely, the formation of high-k ternary oxide out of two medium-k binary oxides. Aggressive scaling of equivalent oxide thickness (EOT) with promising interface properties is presented by using YScO3 as high-k dielectric and yttrium-doped GeO2 (Y-GeO2) as interfacial layer, for a demonstration of high-k gate stack on Ge. In addition, we demonstrate Ge n-MOSFET performance showing the peak electron mobility over 1000 cm2/V s in sub-nm EOT region by YScO3/Y-GeO2/Ge gate stack.

  12. High performance trench MOS barrier Schottky diode with high-k gate oxide

    Science.gov (United States)

    Zhai, Dong-Yuan; Zhu, Jun; Zhao, Yi; Cai, Yin-Fei; Shi, Yi; Zheng, You-Liao

    2015-07-01

    A novel trench MOS barrier Schottky diode (TMBS) device with a high-k material introduced into the gate insulator is reported, which is named high-k TMBS. By simulation with Medici, it is found that the high-k TMBS can have 19.8% lower leakage current while maintaining the same breakdown voltage and forward turn-on voltage compared with the conventional regular trench TMBS. Project supported by the National Basic Research Program of China (Grant No. 2011CBA00607), the National Natural Science Foundation of China (Grant Nos. 61106089 and 61376097), and the Zhejiang Provincial Natural Science Foundation of China (Grant No. LR14F040001).

  13. Stacked resistive switches for AND/OR logic gates

    Science.gov (United States)

    Kim, Myung Ju; Son, Kyung Rock; Park, Ju Hyun; Kim, Tae Geun

    2017-06-01

    This paper reports the use of stacked resistive switches as logic gates for implementing the ;AND; and ;OR; operations. These stacked resistive switches consist of two resistive switches that share a middle electrode, and they operate based on the difference in resistance between the low and high resistance states indicating the logical states of ;0; and ;1;, respectively. The stacked resistive switches can perform either AND or OR operation, using two read schemes in one device. To perform the AND (or OR) operation, two resistive switches are arranged in a serial (or parallel) connection. AND and OR operations have been successfully demonstrated using the stacked resistive switches. The use of stacked resistive switches as logic gates that utilize the advantages of memristive devices shows the possibility of stateful logic circuits.

  14. Simulation of Double-Gate Silicon Tunnel FETs with a High-k Gate Dielectric

    OpenAIRE

    Boucart, Katherine

    2010-01-01

    The down-scaling of conventional MOSFETs has led to an impending power crisis, in which static power consumption is becoming too high. In order to improve the energy-efficiency of electronic circuits, small swing switches are interesting candidates to replace or complement the MOSFETs used today. Tunnel FETs, which are gated p-i-n diodes whose on-current arises from band-to-band tunneling, are attractive new devices for low-power applications due to t...

  15. Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-03-01

    Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

  16. Soft X-ray photoemission study of nitrogen diffusion in TiN/HfO:N gate stacks

    Energy Technology Data Exchange (ETDEWEB)

    Martinez, E., E-mail: eugenie.martinez@cea.fr [CEA-LETI, MINATEC Campus, 17 rue des Martyrs, 38054 Grenoble cedex 09 (France); Gaumer, C.; Lhostis, S. [ST Microelectronics, 850 rue Jean Monnet, 38926 Crolles (France); Licitra, C. [CEA-LETI, MINATEC Campus, 17 rue des Martyrs, 38054 Grenoble cedex 09 (France); Silly, M.; Sirotti, F. [Synchrotron SOLEIL, L' Orme des Merisiers, 91191 Gif-sur-Yvette (France); Renault, O. [CEA-LETI, MINATEC Campus, 17 rue des Martyrs, 38054 Grenoble cedex 09 (France)

    2012-01-01

    The impact of HfO:N post nitridation anneal (PNA) and gate fabrication on the physico-chemical properties of the TiN/HfO:N/SiO{sub 2}/Si stack are investigated using Soft X-ray Photoelectron Spectroscopy (S-XPS) and Vacuum UltraViolet Spectroscopic Ellipsometry (VUV-SE). Defects created in the high-k during plasma nitridation are passivated by PNA under O{sub 2}. Both oxygen and nitrogen diffusion is observed towards the bottom SiO{sub 2}/Si interface together with a regrowth of the SiO{sub 2}. These defects play a major role regarding nitrogen diffusion during gate fabrication. Without PNA, no diffusion is observed because O and N atoms are trapped inside the high-k. With PNA and simultaneous defects passivation, nitrogen from both metal gate and high-k diffuses towards the bottom SiO{sub 2}/Si interface.

  17. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2015-01-01

    Full Text Available We investigated amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using different high-k gate dielectric materials such as silicon nitride (Si3N4 and aluminum oxide (Al2O3 at low temperature process (<300°C and compared them with low temperature silicon dioxide (SiO2. The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.

  18. Study of 6T SRAM cell using High-K gate dielectric based junctionless silicon nanotube FET

    Science.gov (United States)

    Tayal, Shubham; Nandi, Ashutosh

    2017-12-01

    This paper investigates the performance of 6 T SRAM cell using high-K gate dielectric based junctionless silicon nanotube FET (JLSiNTFET). It is observed that the use of high-K gate dielectric enhances the delay performance of the JLSiNTFET based 6 T SRAM cell. Read access time (RAT) and write access time (WAT) improves by ∼18% and ∼20% when TiO2 is used as gate dielectric instead of SiO2. The hold, read, and write SNMs (static noise margin) of the 6 T SRAM cell also improves marginally by the use of high-K gate dielectric. Furthermore, it is also observed that the improvement in hold SNM (HSNM), read SNM (RSNM), and write SNM (WSNM) can be boosted by using higher interfacial layer thickness (TI). However, the improvement in read access times (RAT) & write access time (WAT) degrades at higher TI. Thus, high-K gate dielectrics with high interfacial layer thickness are more suitable for JLSiNT-FET based 6 T SRAM cell.

  19. Direct observation of bias-dependence potential distribution in metal/HfO{sub 2} gate stack structures by hard x-ray photoelectron spectroscopy under device operation

    Energy Technology Data Exchange (ETDEWEB)

    Yamashita, Y. [National Institute for Materials Science, Advanced Electric Materials Center, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); National Institute for Materials Science, NIMS Beamline Station at SPring-8, 1-1-1 Kôto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Yoshikawa, H.; Kobayashi, K. [National Institute for Materials Science, NIMS Beamline Station at SPring-8, 1-1-1 Kôto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Chikyo, T. [National Institute for Materials Science, Advanced Electric Materials Center, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan)

    2014-01-28

    Although gate stack structures with high-k materials have been extensively investigated, there are some issues to be solved for the formation of high quality gate stack structures. In the present study, we employed hard x-ray photoelectron spectroscopy in operating devices. This method allows us to investigate bias dependent electronic states, while keeping device structures intact. Using this method, we have investigated electronic states and potential distribution in gate metal/HfO{sub 2} gate stack structures under device operation. Analysis of the core levels shifts as a function of the bias voltage indicated that a potential drop occurred at the Pt/HfO{sub 2} interface for a Pt/HfO{sub 2} gate structure, while a potential gradient was not observed at the Ru/HfO{sub 2} interface for a Ru/HfO{sub 2} gate structure. Angle resolved photoelectron spectroscopy revealed that a thicker SiO{sub 2} layer was formed at the Pt/HfO{sub 2} interface, indicating that the origin of potential drop at Pt/HfO{sub 2} interface is formation of the thick SiO{sub 2} layer at the interface. The formation of the thick SiO{sub 2} layer at the metal/high-k interface might concern the Fermi level pinning, which is observed in metal/high-k gate stack structures.

  20. Analytical model of gate leakage current through bilayer oxide stack in advanced MOSFET

    Science.gov (United States)

    Basak, Rathin; Maiti, Biswajit; Mallik, Abhijit

    2015-04-01

    A compact model for gate tunneling current in advanced nano-scale MOSFET has been developed on the basis of both direct and Fowler-Nordheim tunneling through dual layer Silicon oxide-Hafnium oxide stack used as gate dielectric. Calculation includes the effect of different subbands of the semiconductor conduction band those arise due to quantum confinement of charge carriers in the oxide-substrate interface. Effect of charge trapping in the bulk of the oxides and at the localized energy levels at different interfaces of the oxides has also been taken into consideration. Tunneling probability as a function of gate bias has been determined considering Wentzel-Kramers-Brillouin (WKB) approximation to account for varying potential profile. Probability amplitude of an electron for tunneling has been calculated by solving Schrodinger equations at different regions in the effective mass approximation model of class I crystal interface. Tunneling current as a function of effective oxide thickness and gate bias estimated in this model shows substantial reduction in gate leakage current if HfO2 as high-k dielectric is used along with 1 nm thick SiO2 with almost negligible change in threshold voltage.

  1. Comparative study of CNT, silicon nanowire and fullerene embedded multilayer high-k gate dielectric MOS memory devices

    Energy Technology Data Exchange (ETDEWEB)

    Sengupta, Amretashis; Sarkar, Chandan Kumar [Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata-700 032 (India); Requejo, Felix G, E-mail: amretashis@gmail.com [INIFTA, Departmento de Quimica and Departmento de Fisica, Facultad de Ciencias Exactas, Universidad Nacional de La Plata, CC/67-1900, La Plata (Argentina)

    2011-10-12

    Here, we present a comparative theoretical study on stacked (multilayer) gate dielectric MOS memory devices, having a metallic/semiconducting carbon nanotube (CNT), silicon nanowire (Si NW) and fullerene (C60) embedded nitride layer acting as a floating gate. Two types of devices, one with HfO{sub 2}-SiO{sub 2} stack (stack-1) and the other with La{sub 2}O{sub 3}-SiO{sub 2} stack (stack-2) as the tunnel oxide were compared. We evaluated the effective barrier height, the dielectric constant and the effective electron mobility in the composite gate dielectric with the Maxwell-Garnett effective medium theory. Thereafter applying the WKB approximation, we simulated the Fowler-Nordheim (F-N) tunnelling/writing current and the direct tunnelling/leakage current in these devices. We evaluated the I-V characteristics, the charge decay and also the impact of CNT/Si NW aspect ratio and the volume fraction on the effective barrier height and the write voltage, respectively. We also simulated the write time, retention time and the erase time of these MOS devices. Based on the simulation results, it was concluded that the metallic CNT embedded stack-1 device offered the best performance in terms of higher F-N tunnelling current, lower direct tunnelling current and lesser write voltage and write time compared with the other devices. In case of direct tunnelling leakage and retention time it was found that the met CNT embedded stack-2 device showed better characteristics. For erasing, however, the C60 embedded stack-1 device showed the smallest erase time. When compared with earlier reports, it was seen that CNT, C60 and Si NW embedded devices all performed better than nanocrystalline Si embedded MOS non-volatile memories.

  2. Comparative study of CNT, silicon nanowire and fullerene embedded multilayer high-k gate dielectric MOS memory devices

    Science.gov (United States)

    Sengupta, Amretashis; Sarkar, Chandan Kumar; Requejo, Felix G.

    2011-10-01

    Here, we present a comparative theoretical study on stacked (multilayer) gate dielectric MOS memory devices, having a metallic/semiconducting carbon nanotube (CNT), silicon nanowire (Si NW) and fullerene (C60) embedded nitride layer acting as a floating gate. Two types of devices, one with HfO2-SiO2 stack (stack-1) and the other with La2O3-SiO2 stack (stack-2) as the tunnel oxide were compared. We evaluated the effective barrier height, the dielectric constant and the effective electron mobility in the composite gate dielectric with the Maxwell-Garnett effective medium theory. Thereafter applying the WKB approximation, we simulated the Fowler-Nordheim (F-N) tunnelling/writing current and the direct tunnelling/leakage current in these devices. We evaluated the I-V characteristics, the charge decay and also the impact of CNT/Si NW aspect ratio and the volume fraction on the effective barrier height and the write voltage, respectively. We also simulated the write time, retention time and the erase time of these MOS devices. Based on the simulation results, it was concluded that the metallic CNT embedded stack-1 device offered the best performance in terms of higher F-N tunnelling current, lower direct tunnelling current and lesser write voltage and write time compared with the other devices. In case of direct tunnelling leakage and retention time it was found that the met CNT embedded stack-2 device showed better characteristics. For erasing, however, the C60 embedded stack-1 device showed the smallest erase time. When compared with earlier reports, it was seen that CNT, C60 and Si NW embedded devices all performed better than nanocrystalline Si embedded MOS non-volatile memories.

  3. Implementation of nanoscale circuits using dual metal gate engineered nanowire MOSFET with high-k dielectrics for low power applications

    Science.gov (United States)

    Charles Pravin, J.; Nirmal, D.; Prajoon, P.; Ajayan, J.

    2016-09-01

    This work covers the impact of dual metal gate engineered Junctionless MOSFET with various high-k dielectric in Nanoscale circuits for low power applications. Due to gate engineering in junctionless MOSFET, graded potential is obtained and results in higher electron velocity of about 31% for HfO2 than SiO2 in the channel region, which in turn improves the carrier transport efficiency. The simulation is done using sentaurus TCAD, ON current, OFF current, ION/IOFF ratio, DIBL, gain, transconductance and transconductance generation factor parameters are analysed. When using HfO2, DIBL shows a reduction of 61.5% over SiO2. The transconductance and transconductance generation factor shows an improvement of 44% and 35% respectively. The gain and output resistance also shows considerable improvement with high-k dielectrics. Using this device, inverter circuit is implemented with different high-k dielectric material and delay have been decreased by 4% with HfO2 when compared to SiO2. In addition, a significant reduction in power dissipation of the inverter circuit is obtained with high-k dielectric Dual Metal Surround Gate Junctionless Transistor than SiO2 based device. From the analysis, it is found that HfO2 will be a better alternative for the future nanoscale device.

  4. Charge-plasma based dual-material and gate-stacked architecture of junctionless transistor for enhanced analog performance

    Science.gov (United States)

    Amin, S. Intekhab; Sarin, R. K.

    2015-12-01

    Charge plasma based doping-less dual material double gate (DL-DMDG) junctionless transistor (JLT) is proposed. This paper also demonstrate the potential impact of gate stacking (GS) (high-k + Sio2) on DL-DMDG (DL-GSDMDG) JLT device. The efficient charge plasma is created in an intrinsic silicon film to form n + source/drain (S/D) by selecting proper work function of S/D electrode which helps to minimize threshold voltage fluctuation that occurs in a heavily doped JLT device. The analog performance parameters are analyzed for both the device structures. Results are also compared with conventional dual material double gate (DMDG) and gate stacked dual material double gate (GSDMDG) JLT devices. A DL-DMDG JLT device shows improved early voltage (VEA), intrinsic gain (AV = gm/gDS) and reduced output conductance (gDS) as compared to conventional DMDG and GSDMDG JLT devices. These values are further improved for DL-GSDMDG JLT. The effect of control gate length (L1) for a fixed gate length (L = L1+L2) are also analyzed.

  5. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-02-12

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  6. Advanced Composite High-k Gate Stack for Mixed Anion Arsenide-Antimonide Quantum Well Transistors

    Science.gov (United States)

    2010-12-01

    and interface defect scattering5 dominate. Shubnikov-de Haas ( SdH ) oscillations (Fig. 8a) are observed at low temperature (2- 15K) and high magnetic...the amplitude of SdH oscillations, which is lower than 0.05m0 reported for InAs QW due to quantization and band non-parabolicity6. FFT of SdH ...ρ 0 1/B [T-1] 2K 4K 6K 10K 15K Δ(1/B) = 0.024 T -1 m*=.043m0 (b) Fig. 8 (a) Shubnikov-de Haas ( SdH ) oscillations in the sheet resistance

  7. Method for disclosing invisible physical properties in metal-ferroelectric-insulator-semiconductor gate stacks

    Science.gov (United States)

    Sakai, Shigeki; Zhang, Wei; Takahashi, Mitsue

    2017-04-01

    In metal-ferroelectric-insulator-semiconductor gate stacks of ferroelectric-gate field effect transistors (FeFETs), it is impossible to directly obtain curves of polarization versus electric field (P f-E f) in the ferroelectric layer. The P f-E f behavior is not simple, i.e. the P f-E f curves are hysteretic and nonlinear, and the hysteresis curve width depends on the electric field scan amplitude. Unless the P f-E f relation is known, the field E f strength cannot be solved when the voltage is applied between the gate meal and the semiconductor substrate, and thus P f-E f cannot be obtained after all. In this paper, the method for disclosing the relationships among the polarization peak-to-peak amplitude (2P mm_av), the electric field peak-to-peak amplitude (2E mm_av), and the memory window (E w) in units of the electric field is presented. To get P mm_av versus E mm_av, FeFETs with different ferroelectric-layer thicknesses should be prepared. Knowing such essential physical parameters is helpful and in many cases enough to quantitatively understand the behavior of FeFETs. The method is applied to three groups. The first one consists of SrBi2Ta2O9-based FeFETs. The second and third ones consist of Ca x Sr1-x Bi2Ta2O9-based FeFETs made by two kinds of annealing. The method can clearly differentiate the characters of the three groups. By applying the method, ferroelectric relationships among P mm_av, E mm_av, and E w are well classified in the three groups according to the difference of the material kinds and the annealing conditions. The method also evaluates equivalent oxide thickness (EOT) of a dual layer of a deposited high-k insulator and a thermally-grown SiO2-like interfacial layer (IL). The IL thickness calculated by the method is consistent with cross-sectional image of the FeFETs observed by a transmission electron microscope. The method successfully discloses individual characteristics of the ferroelectric and the insulator layers hidden in the gate stack

  8. High permittivity gate dielectric materials

    CERN Document Server

    2013-01-01

    "The book comprehensively covers all the current and the emerging areas of the physics and the technology of high permittivity gate dielectric materials, including, topics such as MOSFET basics and characteristics, hafnium-based gate dielectric materials, Hf-based gate dielectric processing, metal gate electrodes, flat-band and threshold voltage tuning, channel mobility, high-k gate stack degradation and reliability, lanthanide-based high-k gate stack materials, ternary hafnia and lanthania based high-k gate stack films, crystalline high-k oxides, high mobility substrates, and parameter extraction. Each chapter begins with the basics necessary for understanding the topic, followed by a comprehensive review of the literature, and ultimately graduating to the current status of the technology and our scientific understanding and the future prospects."

  9. Physical origin investigation of the flatband voltage roll off for metal-oxide-semiconductor device with high-k/metal gate structure

    Science.gov (United States)

    Kai, Han; Xiaolei, Wang; Wenwu, Wang

    2015-09-01

    The physical origin of the flatband voltage (VFB) roll off for a metal-oxide-semiconductor device with high-k/metal gate structure is studied from the viewpoint of energy band alignment at the high-k/Si interface because the thickness of SiO2 interlayer is thin enough to be ignored. The VFB roll off phenomenon is assigned to associate with the direct electron transfer between high-k and Si substrate. Quantitatively calculated simulation results based on this model are given considering different conditions. Project supported by the National Natural Science Foundation of China (Nos. 61404093, 50932001) and the Doctoral Scientific Research Foundation of Weifang University (No. 014BS02).

  10. Memory and negative-resistance effects in a strained metal-gate high-k n-type field-effect-transistor from 375 K down to 77 K

    Science.gov (United States)

    Gutiérrez-D, E. A.; Vega-G, V. H.; García-R, P. J.; Huerta-G, O. V.

    2016-12-01

    We introduce an experimental alternative way of looking into the charging and discharging mechanism inside a high-k stacked oxide of a metal-gate strained n-type Field-Effect-Transistor (nFET). This alternative way reproduces a memory and negative resistance effect by biasing the nFET device in a non-conventional way. This is achieved by forward-biasing the drain-bulk junction and by setting the gate electrode in a high-impedance mode. The produced negative resistance effect (NRE) has a controllable peak-to-valley current ratio (PVCR) that goes from about 3.0 up to a value of 5.5 at room temperature. The PVCR increases up to 8.35 at T = 225 K and reduces to 2.84 at T = 375 K in a linear trend. The memory effect is observed when the drain-bulk junction voltage is swept from low to high values and back from high to low values. From low to high forward drain-bulk bias the NRE shows up and vanishes when coming back from high to low forward drain-bulk bias. The NRE and memory effects are attributed to a coupled-gate oxide charging/discharging mechanism with an induced bipolar transistor action in the channel of the FET.

  11. Development of III-V p-MOSFETs with high-kappa gate stack for future CMOS applications

    Science.gov (United States)

    Nagaiah, Padmaja

    on strained surface and buried channel In0.36 Ga0.64Sb QW MOSFETs with thin top barrier and in-situ deposited a-Si IPL and high-k HfO2 as well as combination Al 2O3+HfO2 gate stacks and ex-situ atomic layer deposited (ALD) combination gate oxide and with thin 2 nm InAs surface passivation layer is presented. Finally, summary of the salient results from the different chapters is provided with recommendations for future research.

  12. Simulation design of high reverse blocking high-K/low-K compound passivation AlGaN/GaN Schottky barrier diode with gated edge termination

    Science.gov (United States)

    Bai, Zhiyuan; Du, Jiangfeng; Xin, Qi; Li, Ruonan; Yu, Qi

    2017-11-01

    In this paper, a novel high-K/low-K compound passivation AlGaN/GaN Schottky Barrier Diode (CPG-SBD) is proposed to improve the off-state characteristics of AlGaN/GaN schottky barrier diode with gated edge termination (GET-SBD) by adding low-K blocks in to the high-K passivation layer. The reverse leakage current of CPG-SBD can be reduced to 1.6 nA/mm by reducing the thickness of high-K dielectric under GET region to 5 nm, while the forward voltage and on-state resistance keep 1 V and 3.8 Ω mm, respectively. Breakdown voltage of CPG-SBDs can be improved by inducing discontinuity of the electric field at the high-K/low-K interface. The breakdown voltage of the optimized CPG-SBD with 4 blocks of low-K can reach 1084 V with anode to cathode distance of 5 μm yielding a high FOM of 5.9 GW/cm2. From the C-V simulation results, CPG-SBDs induce no parasitic capacitance by comparison of the GET-SBDs.

  13. Pentacene based thin film transistors with high-k dielectric Nd{sub 2}O{sub 3} as a gate insulator

    Energy Technology Data Exchange (ETDEWEB)

    Sarma, R.; Saikia, D. [J B College, Jorhat, Assam (India). Dept. of Physics. Thin Film Lab.; Saikia, Puja; Saikia, P.K.; Baishya, B., E-mail: puja.saik@gmail.co [Dibrugarh University, Dibrugarh, Assam (India)

    2010-09-15

    We have investigated the pentacene based Organic Thin Film Transistors (OTFTs) with high-k dielectric Nd{sub 2}O{sub 3}. Use of high dielectric constant (high-k) gate insulator Nd{sub 2}O{sub 3} reduces the threshold voltage and sub threshold swing of the OTFTs. The calculated threshold voltage -2.2V and sub-threshold swing 1V/decade, current ON-OFF ratio is 1.7 X 10{sup 4} and mobility is 0.13cm{sup 2}/V.s. Pentacene film is deposited on Nd{sub 2}O{sub 3} surface using two step deposition method. Deposited pentacene film is found poly crystalline in nature. (author)

  14. Effect of spacer dielectric engineering on Asymmetric Source Underlapped Double Gate MOSFET using Gate Stack

    Science.gov (United States)

    Chattopadhyay, Ankush; Dasgupta, Arpan; Das, Rahul; Kundu, Atanu; Sarkar, Chandan K.

    2017-01-01

    In this paper, the use of high-k spacers in a source underlapped nMOSFET is explored. The effects have been reported by varying the dielectric constant of the spacer from 3.9 to 22.5 and the study includes a comparison of analog parameters such as transconductance, transconductance generation factor, intrinsic gain, and RF parameters such as parasitic capacitances, resistances, and cut-off frequency. The RF parameters are calculated using the Non-Quasi Static (NQS) Approach which is required for sub 20 nm technology node. The device with high-k spacers features an improvement of 33% in DIBL, significantly increases the on current and reducing the off current by 60%. However, there is a slight compromise in the RF performance of the device, owing to an increase in intrinsic capacitance by about 0.35 fF. The Voltage Transfer Characteristics (VTC) and AC gain analysis of the circuit is also done in this paper. The circuit performance using single stage amplifier with the proposed device as the driver MOS has been analysed. High-k spacers also account for 19% improvement in small signal gain when used in a single stage amplifier circuit.

  15. Quantum Hall Effect and Semimetallic Behavior of Dual-Gated ABA-Stacked Trilayer Graphene

    Directory of Open Access Journals (Sweden)

    E. A. Henriksen

    2012-01-01

    Full Text Available The electronic structure of multilayer graphenes depends strongly on the number of layers as well as the stacking order. Here we explore the electronic transport of purely ABA-stacked trilayer graphenes in a dual-gated field-effect device configuration. We find both that the zero-magnetic-field transport and the quantum Hall effect at high magnetic fields are distinctly different from the monolayer and bilayer graphenes, and that they show electron-hole asymmetries that are strongly suggestive of a semimetallic band overlap. When the ABA trilayers are subjected to an electric field perpendicular to the sheet, Landau-level splittings due to a lifting of the valley degeneracy are clearly observed.

  16. Anomalous positive flatband voltage shifts in metal gate stacks containing rare-earth oxide capping layers

    KAUST Repository

    Caraveo-Frescas, J. A.

    2012-03-09

    It is shown that the well-known negative flatband voltage (VFB) shift, induced by rare-earth oxide capping in metal gate stacks, can be completely reversed in the absence of the silicon overlayer. Using TaN metal gates and Gd2O3-doped dielectric, we measure a ∼350 mV negative shift with the Si overlayer present and a ∼110 mV positive shift with the Si overlayer removed. This effect is correlated to a positive change in the average electrostatic potential at the TaN/dielectric interface which originates from an interfacial dipole. The dipole is created by the replacement of interfacial oxygen atoms in the HfO2 lattice with nitrogen atoms from TaN.

  17. Impact of Lateral Straggle on the Analog/RF Performance of Asymmetric Gate Stack Double Gate MOSFET

    Science.gov (United States)

    Sivaram, Gollamudi Sai; Chakraborty, Shramana; Das, Rahul; Dasgupta, Arpan; Kundu, Atanu; Sarkar, Chandan K.

    2016-09-01

    This paper presents a systematic comparative study of Analog and RF performances of an underlapped double gate (U-DG) NMOSFET with Gate Stack (GS) for varying straggle lengths. Asymmetric underlap devices (A-U-DG) have been proposed as one of the remedies for reducing Short Channel Effects (SCE's) with the underlap being present towards the source for sub 20 nm devices. However, the Source to Drain (S/D) implant lateral diffusion leads to a variation in the effective underlap length. This paper investigates the impact of variation of straggle length on the Analog and RF parameters of the device. The RF performance is analyzed by considering the intrinsic capacitances (Cgd, Cgs), intrinsic resistances (Rgd, Rgs), transport delay (τm), inductance (Lsd), cutoff frequency (fT), and the maximum frequency of oscillations (fmax). The circuit performance of the devices are also studied. It is seen that the Analog and RF performances of the devices are improved by optimizing the S/D lateral straggle.

  18. Influence of preparing process on total-dose radiation response of high-k Hf-based gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Song Zhaorui [Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Cheng Xinhong [University of Wenzhou, Xueyuan Road, Wenzhou 325000 (China)], E-mail: xh_cheng@wzu.edu.cn; Zhang Enxia; Xing Yumei; Yu Yuehui; Zhang Zhengxuan; Wang Xi [Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Shen Dashen [University of Alabama in Huntsville, Huntsville, AL 35899 (United States)

    2008-11-03

    The purpose of this paper is to report some total-dose radiation response experimental results of Hf-based dielectric films including HfON film prepared by ion beam enhanced deposition method (IBAD) and HfO{sub 2} film by ultra high vacuum electron beam evaporation system (UV-EBE). MIS structures with HfON and HfO{sub 2} gate dielectrics were irradiated by10 keV X-rays with the dose from 0 to1 x 10{sup 6} rad (Si). Electrical measurement results showed that trap charge density and interface trap charge density of HfON dielectric films are much smaller than HfO{sub 2} dielectric films, and the flatband and midgap voltage shifts in HfON films are also smaller than that in HfO{sub 2} film. AFM and XRD results show that HfON films are smooth and thermal stability even under 800 deg. C high temperature annealing.

  19. Flexible, Low-Power Thin-Film Transistors Made of Vapor-Phase Synthesized High-k, Ultrathin Polymer Gate Dielectrics.

    Science.gov (United States)

    Choi, Junhwan; Joo, Munkyu; Seong, Hyejeong; Pak, Kwanyong; Park, Hongkeun; Park, Chan Woo; Im, Sung Gap

    2017-06-21

    A series of high-k, ultrathin copolymer gate dielectrics were synthesized from 2-cyanoethyl acrylate (CEA) and di(ethylene glycol) divinyl ether (DEGDVE) monomers by a free radical polymerization via a one-step, vapor-phase, initiated chemical vapor deposition (iCVD) method. The chemical composition of the copolymers was systematically optimized by tuning the input ratio of the vaporized CEA and DEGDVE monomers to achieve a high dielectric constant (k) as well as excellent dielectric strength. Interestingly, DEGDVE was nonhomopolymerizable but it was able to form a copolymer with other kinds of monomers. Utilizing this interesting property of the DEGDVE cross-linker, the dielectric constant of the copolymer film could be maximized with minimum incorporation of the cross-linker moiety. To our knowledge, this is the first report on the synthesis of a cyanide-containing polymer in the vapor phase, where a high-purity polymer film with a maximized dielectric constant was achieved. The dielectric film with the optimized composition showed a dielectric constant greater than 6 and extremely low leakage current densities (thin-film transistors (OTFTs) and oxide TFTs were fabricated, which showed hysteresis-free transfer characteristics with an operating voltage of less than 3 V. Furthermore, the flexible OTFTs retained their low gate leakage current and ideal TFT characteristics even under 2% applied tensile strain, which makes them some of the most flexible OTFTs reported to date. We believe that these ultrathin, high-k organic dielectric films with excellent mechanical flexibility will play a crucial role in future soft electronics.

  20. GaN-Based High-k Praseodymium Oxide Gate MISFETs with P2S5/(NH42SX + UV Interface Treatment Technology

    Directory of Open Access Journals (Sweden)

    Chao-Wei Lin

    2012-01-01

    Full Text Available This study examines the praseodymium-oxide- (Pr2O3- passivated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs with high dielectric constant in which the AlGaN Schottky layers are treated with P2S5/(NH42SX + ultraviolet (UV illumination. An electron-beam evaporated Pr2O3 insulator is used instead of traditional plasma-assisted chemical vapor deposition (PECVD, in order to prevent plasma-induced damage to the AlGaN. In this work, the HEMTs are pretreated with P2S5/(NH42SX solution and UV illumination before the gate insulator (Pr2O3 is deposited. Since stable sulfur that is bound to the Ga species can be obtained easily and surface oxygen atoms are reduced by the P2S5/(NH42SX pretreatment, the lowest leakage current is observed in MIS-HEMT. Additionally, a low flicker noise and a low surface roughness (0.38 nm are also obtained using this novel process, which demonstrates its ability to reduce the surface states. Low gate leakage current Pr2O3 and high-k AlGaN/GaN MIS-HEMTs, with P2S5/(NH42SX + UV illumination treatment, are suited to low-noise applications, because of the electron-beam-evaporated insulator and the new chemical pretreatment.

  1. Reliable gate stack and substrate parameter extraction based on C-V measurements for 14 nm node FDSOI technology

    Science.gov (United States)

    Mohamad, B.; Leroux, C.; Rideau, D.; Haond, M.; Reimbold, G.; Ghibaudo, G.

    2017-02-01

    Effective work function and equivalent oxide thickness are fundamental parameters for technology optimization. In this work, a comprehensive study is done on a large set of FDSOI devices. The extraction of the gate stack parameters is carried out by fitting experimental CV characteristics to quantum simulation, based on self-consistent solution of one dimensional Poisson and Schrodinger equations. A reliable methodology for gate stack parameters is proposed and validated. This study identifies the process modules that impact directly the effective work function from those that only affect the device threshold voltage, due to the device architecture. Moreover, the relative impacts of various process modules on channel thickness and gate oxide thickness are evidenced.

  2. Alternative high-k dielectrics for semiconductor applications

    OpenAIRE

    Van Elshocht, S.; Adelmann, C.; Clima, S.; Pourtois, G.; Conard, T.; Delabie, A.; Franquet, A.; Lehnen, P.; Meersschaut, J.; Menou, N.; Popovici, M.; Richard, O.; Schram, T.; Wang, X. P.; HARDY, An

    2009-01-01

    Although the next generation high-k gate dielectrics has been defined for the 45 nm complementary metal oxide semiconductor technology node, threshold voltage control and equivalent oxide thickness (EOT) scaling remain concerns for future devices. Therefore, the authors explored the effect of incorporating dysprosium in the gate stack. Results suggest that improved EOT-leakage scaling is possible by adding Dy to the interfacial SiO2 layer in a 1:1 ratio or by adding 10% Dy to bulk HfO2. The d...

  3. Interfacial Layer Growth Condition Dependent Carrier Transport Mechanisms in HfO2/SiO2 Gate Stacks

    Energy Technology Data Exchange (ETDEWEB)

    Sahoo, S. K.; Misra, D.

    2012-06-04

    The temperature and field dependent leakage current in HfO{sub 2}/SiO{sub 2} gate stack for in situ steam grown and chemical interfacial layers (ILs) are studied in the temperature range of 20 C to 105 C. Poole-Frenkel mechanism in high field whereas Ohmic conduction in low field region are dominant for both devices. Leakage current decreases whereas both trap energy level ({phi}{sub t}) and activation energy (E{sub a}) increase for chemically grown IL devices. The trap level energy, ({phi}{sub t}) -0.2 eV, indicates that doubly charged oxygen vacancies (V{sup 2-}) are the active electron traps which contribute to the leakage current in these gate stacks.

  4. The physical origin of dispersion in accumulation in InGaAs based metal oxide semiconductor gate stacks

    Science.gov (United States)

    Krylov, Igor; Ritter, Dan; Eizenberg, Moshe

    2015-05-01

    Dispersion in accumulation is a widely observed phenomenon in technologically important InGaAs gate stacks. Two principal different interface defects were proposed as the physical origin of this phenomenon—disorder induced gap states and border traps. While the gap states are located at the semiconductor side of the interface, the border traps are related to the dielectric side. The study of Al2O3, HfO2, and an intermediate composition of HfxAlyO deposited on InGaAs enabled us to find a correlation between the dispersion and the dielectric/InGaAs band offset. At the same time, no change in the dispersion was observed after applying an effective pre-deposition treatment which results in significant reduction of the interface states. Both observations prove that border traps are the physical origin of the dispersion in accumulation in InGaAs based metal-oxide-semiconductor gate stacks.

  5. Interface Defect Hydrogen Depassivation and Capacitance-Voltage Hysteresis of Al2O3/InGaAs Gate Stacks.

    Science.gov (United States)

    Tang, Kechao; Palumbo, Felix Roberto; Zhang, Liangliang; Droopad, Ravi; McIntyre, Paul C

    2017-03-01

    We investigate the effects of pre- and postatomic layer deposition (ALD) defect passivation with hydrogen on the trap density and reliability of Al2O3/InGaAs gate stacks. Reliability is characterized by capacitance-voltage hysteresis measurements on samples prepared using different fabrication procedures and having different initial trap densities. Despite its beneficial capability to passivate both interface and border traps, a final forming gas (H2/N2) anneal (FGA) step is correlated with a significant hysteresis. This appears to be caused by hydrogen depassivation of defects in the gate stack under bias stress, supported by the observed bias stress-induced increase of interface trap density, and strong hydrogen isotope effects on the measured hysteresis. On the other hand, intentional air exposure of the InGaAs surface prior to Al2O3 ALD increases the initial interface trap density (Dit) but considerably lowers the hysteresis.

  6. Study of interfaces and band offsets in TiN/amorphous LaLuO3 gate stacks

    KAUST Repository

    Mitrovic, Ivona Z.

    2011-07-01

    TiN/LaLuO3 (LLO) gate stacks formed by molecular beam deposition have been investigated by X-ray photoelectron spectroscopy, medium energy ion scattering, spectroscopic ellipsometry, scanning transmission electron microscopy, electron energy loss spectroscopy and atomic force microscopy. The results indicate an amorphous structure for deposited LLO films. The band offset between the Fermi level of TiN and valence band of LLO is estimated to be 2.65 ± 0.05 eV. A weaker La-O-Lu bond and a prominent Ti2p sub-peak which relates to Ti bond to interstitial oxygen have been identified for an ultra-thin 1.7 nm TiN/3 nm LLO gate stack. The angle-dependent XPS analysis of Si2s spectra as well as shifts of La4d, La3d and Lu4d core levels suggests a silicate-type with Si-rich SiOx LLO/Si interface. Symmetrical valence and conduction band offsets for LLO to Si of 2.2 eV and the bandgap of 5.5 ± 0.1 eV have been derived from the measurements. The band alignment for ultra-thin TiN/LLO gate stack is affected by structural changes. Copyright © 2011 Published by Elsevier B.V. All rights reserved.

  7. Trap state passivation improved hot-carrier instability by zirconium-doping in hafnium oxide in a nanoscale n-metal-oxide semiconductor-field effect transistors with high-k/metal gate

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Hsi-Wen; Tsai, Jyun-Yu; Liu, Kuan-Ju; Lu, Ying-Hsin [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Tainan 701, Taiwan (China); Chen, Ching-En; Tseng, Tseung-Yuen [Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (China); Lin, Chien-Yu [Department of Photonics, National Sun Yat-Sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Cheng, Osbert; Huang, Cheng-Tung; Ye, Yi-Han [Device Department, United Microelectronics Corporation, Tainan Science Park, Tainan 701, Taiwan (China)

    2016-04-25

    This work investigates the effect on hot carrier degradation (HCD) of doping zirconium into the hafnium oxide high-k layer in the nanoscale high-k/metal gate n-channel metal-oxide-semiconductor field-effect-transistors. Previous n-metal-oxide semiconductor-field effect transistor studies demonstrated that zirconium-doped hafnium oxide reduces charge trapping and improves positive bias temperature instability. In this work, a clear reduction in HCD is observed with zirconium-doped hafnium oxide because channel hot electron (CHE) trapping in pre-existing high-k bulk defects is the main degradation mechanism. However, this reduced HCD became ineffective at ultra-low temperature, since CHE traps in the deeper bulk defects at ultra-low temperature, while zirconium-doping only passivates shallow bulk defects.

  8. Physical and electrical properties of bilayer CeO{sub 2}/TiO{sub 2} gate dielectric stack

    Energy Technology Data Exchange (ETDEWEB)

    Chong, M.M.V. [School of Materials Science and Engineering, Nanyang Technological University of Singapore, Block N 4.1Nanyang Avenue, Singapore 639798 (Singapore); GlobalFoundries Singapore Private Limited, 60 Woodlands Industrial Park D Street 2, Singapore 738406 (Singapore); Lee, P.S. [School of Materials Science and Engineering, Nanyang Technological University of Singapore, Block N 4.1Nanyang Avenue, Singapore 639798 (Singapore); Tok, A.I.Y., E-mail: MIYTOK@ntu.edu.sg [School of Materials Science and Engineering, Nanyang Technological University of Singapore, Block N 4.1Nanyang Avenue, Singapore 639798 (Singapore)

    2016-08-15

    Highlights: • A bilayer gate dielectric stack of CeO{sub 2}/TiO{sub 2} to study the dependency of film growth with varying annealing temperatures is proposed. • The study demonstrates CeO{sub 2}/TiO{sub 2} bilayer stack with comparable κ-value as that of HfO{sub 2} but with reduced leakage current density of 4 orders of magnitude. • Schottky emission is the dominant leakage conduction mechanism of annealed CeO{sub 2}/TiO{sub 2} stack due to thermionic effect of interface properties. - Abstract: This study demonstrates a bilayer gate oxide structure of cerium oxide deposited via pulsed laser deposition and titanium oxide using conventional atomic layer deposition. Samples were deposited on p-type Si (100) substrate and exhibit interesting physical and electrical properties such that 600 °C annealed CeO{sub 2}/TiO{sub 2} samples having κ-value of 18 whereas pure CeO{sub 2} deposited samples have dielectric constant of 17.1 with leakage current density of 8.94 × 10{sup −6} A/cm{sup 2} at 1 V applied voltage. The result shows promising usage of the synthesized rare earth oxides as gate dielectric where ideal κ-value and significant reduction of the leakage current by 5 orders of magnitude is achieved. Leakage current conduction mechanism for as-deposited sample is found to be dominated by Poole–Frenkel (PF) emission; the trap level is found to be at 1.29 eV whereas annealed samples (600 °C and 800 °C) exhibited Schottky emission with trap levels at 1.45 eV and 0.81 eV, respectively.

  9. Physical and electrical properties of induced high-k ZrHfO crystallization with ZrN cap by high power impulse magnetron sputtering for metal-gate metal-insulator-semiconductor structures

    Science.gov (United States)

    Tsai, Jung-Ruey; Juan, Pi-Chun; Lin, Cheng-Li; Lin, Guo-Cheng

    2017-01-01

    Metal-gate TiN/ZrN/ZrHfO/p-Si metal-insulator-semiconductor (MIS) structures have been fabricated in this work. The physical and electrical properties were characterized. The crystallization of high-k ZrHfO thin-film is induced by high power impulse magnetron sputtering (HIPIMS) during the deposition of ZrN capping layer. The binding energies and depth profiles were investigated by X-ray photoelectron spectroscopy (XPS). It is found that Zr and Hf out-diffusion from high-k dielectric in samples with HIPIMS is lesser than those in samples with the conventional DC magnetron sputtering (DCMS). The dielectric constant which strongly relates to the tetragonal phase becomes higher and the flatband voltage shift shows smaller by using the HIPIMS method than by the conventional DCMS. The cation and anion vacancies have been investigated by the defect reaction model.

  10. Physical understanding of different drain-induced-barrier-lowering variations in high-k/metal gate n-channel metal-oxide-semiconductor-field-effect-transistors induced by charge trapping under normal and reverse channel hot carrier stresses

    Science.gov (United States)

    Luo, Weichun; Yang, Hong; Wang, Wenwu; Zhao, Lichuan; Xu, Hao; Ren, Shangqing; Tang, Bo; Tang, Zhaoyun; Xu, Yefeng; Xu, Jing; Yan, Jiang; Zhao, Chao; Chen, Dapeng; Ye, Tianchun

    2013-10-01

    In this paper, the drain induced barrier lowering (DIBL) variations in High-k/Metal gate n-channel metal-oxide-semiconductor field effect transistor under the normal and reverse channel hot carrier (CHC) stress are studied. It is found that DIBL decreases under normal CHC stress mode while increases under reverse CHC mode. The different DIBL variation under normal and reverse CHC stresses is proposed to be attributed to stress-induced charge trapping by cold carriers from the channel rather than hot carriers from the pinch off region, which can be explained by energy band bending theory.

  11. Investigation of trap properties in high-k/metal gate p-type metal-oxide-semiconductor field-effect-transistors with aluminum ion implantation using random telegraph noise analysis

    Energy Technology Data Exchange (ETDEWEB)

    Kao, Tsung-Hsien; Chang, Shoou-Jinn, E-mail: changsj@mail.ncku.edu.tw; Fang, Yean-Kuen; Huang, Po-Chin [Institute of Microelectronics and Department of Electrical Engineering, Advanced Optoelectronic Technology Center, Center for Micro/Nano Science and Technology, National Cheng Kung University, No. 1, University Road, Tainan 701, Taiwan (China); Lai, Chien-Ming; Hsu, Chia-Wei; Chen, Yi-Wen; Cheng, Osbert [Central R and D Division, United Microelectronics Corporation, Ltd., Tainan Science-Based Industrial Park, Tainan 74145, Taiwan (China); Wu, Chung-Yi; Wu, San-Lein [Department of Electronic Engineering, Cheng Shiu University, 840 Chengcing Road, Niaosong, Kaohsiung 833, Taiwan (China)

    2014-08-11

    In this study, the impact of aluminum ion implantation (Al I/I) on random telegraph noise (RTN) in high-k/metal gate (HK/MG) p-type metal-oxide-semiconductor field-effect-transistors (pMOSFETs) was investigated. The trap parameters of HK/MG pMOSFETs with Al I/I, such as trap energy level, capture time and emission time, activation energies for capture and emission, and trap location in the gate dielectric, were determined. The configuration coordinate diagram was also established. It was observed that the implanted Al could fill defects and form a thin Al{sub 2}O{sub 3} layer and thus increase the tunneling barrier height for holes. It was also observed that the trap position in the Al I/I samples was lower due to the Al I/I-induced dipole at the HfO{sub 2}/SiO{sub 2} interface.

  12. AlN and Al oxy-nitride gate dielectrics for reliable gate stacks on Ge and InGaAs channels

    Energy Technology Data Exchange (ETDEWEB)

    Guo, Y.; Li, H.; Robertson, J. [Engineering Department, Cambridge University, Cambridge CB2 1PZ (United Kingdom)

    2016-05-28

    AlN and Al oxy-nitride dielectric layers are proposed instead of Al{sub 2}O{sub 3} as a component of the gate dielectric stacks on higher mobility channels in metal oxide field effect transistors to improve their positive bias stress instability reliability. It is calculated that the gap states of nitrogen vacancies in AlN lie further away in energy from the semiconductor band gap than those of oxygen vacancies in Al{sub 2}O{sub 3}, and thus AlN might be less susceptible to charge trapping and have a better reliability performance. The unfavourable defect energy level distribution in amorphous Al{sub 2}O{sub 3} is attributed to its larger coordination disorder compared to the more symmetrically bonded AlN. Al oxy-nitride is also predicted to have less tendency for charge trapping.

  13. The influence of carbon doping on the performance of Gd{sub 2}O{sub 3} as high-k gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Shekhter, P.; Yehezkel, S.; Shriki, A.; Eizenberg, M. [Department of Materials Science and Engineering, Technion–Israel Institute of Technology, Haifa 32000 (Israel); Chaudhuri, A. R.; Osten, H. J. [Institute of Electronic Materials and Devices, Leibniz University of Hannover, Schneiderberg 32, 30167 Hannover (Germany); Laha, A. [Department of Electrical Engineering, Indian Institute of Technology Bombay, Powai (India)

    2014-12-29

    One of the approaches for overcoming the issue of leakage current in modern metal-oxide-semiconductor devices is utilizing the high dielectric constants of lanthanide based oxides. We investigated the effect of carbon doping directly into Gd{sub 2}O{sub 3} layers on the performance of such devices. It was found that the amount of carbon introduced into the dielectric is above the solubility limit; carbon atoms enrich the oxide-semiconductor interface and cause a significant shift in the flat band voltage of the stack. Although the carbon atoms slightly degrade this interface, this method has a potential for tuning the flat band voltage of such structures.

  14. Direct observation of crystallization of HfO{sub 2} promoted on silicon surfaces in gate dielectric stacks

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Suhyun, E-mail: u98kim@surface.phys.titech.ac.jp [Department of Physics, Tokyo Institute of Technology, Meguro, Tokyo 152-8551 (Japan); Oshima, Yoshifumi [Research Center for Ultra HVEM, Osaka University, 7-1 Mihogaoka, Osaka, Ibaraki 567-0047 (Japan); Nakajima, Nobue; Hashikawa, Naoto; Asayama, Kyoichiro [Renesas Electronics Corporation, Kodaira, Tokyo 187-8588 (Japan); Takayanagi, Kunio [Department of Physics, Tokyo Institute of Technology, Meguro, Tokyo 152-8551 (Japan)

    2012-01-31

    High-angle annular dark-field scanning transmission electron microscopy was used to investigate the crystallization mechanism of amorphous hafnium dioxide (HfO{sub 2}) layers in gate stacks (polysilicon/HfO{sub 2}/SiON/Si substrate). A 0.9-nm-thick HfO{sub 2} layer remained amorphous with a uniform thickness on annealing at 1050 Degree-Sign C. In contrast, crystalline islands with a cubic structure formed when a 1.8-nm-thick HfO{sub 2} layer was annealed. These islands had commensurate interfaces with both the silicon substrate and the polysilicon film. These results suggest that crystallization is promoted on a silicon surface.

  15. Temperature dependence of trapping effects in metal gates/Al2O3/InGaAs stacks

    Science.gov (United States)

    Palumbo, F.; Pazos, S.; Aguirre, F.; Winter, R.; Krylov, I.; Eizenberg, M.

    2017-06-01

    The influence of the temperature on Metal Gate/Al2O3/n-InGaAs stacks has been studied by means of capacitance-voltage (C-V) hysteresis and flat band voltage as function of both negative and positive stress fields. It was found that the de-trapping effect decreases at low-temperature, indicating that the de-trapping of trapped electrons from oxide traps may be performed via Al2O3/InGaAs interface defects. The dependence of the C-V hysteresis on the stress field at different temperatures in our InGaAs stacks can be explained in terms of the defect spatial distribution. An oxide defect distribution can be found very close to the metal gate/Al2O3 interface. On the other side, the Al2O3/InGaAs interface presents defects distributed from the interface into the bulk of the oxide, showing the influence of InGaAs on Al2O3 in terms of the spatial defect distribution. At the present, he is a research staff of the National Council of Science and Technology (CONICET), working in the National Commission of Atomic Energy (CNEA) in Buenos Aires, Argentina, well embedded within international research collaboration. Since 2008, he is Professor at the National Technological University (UTN) in Buenos Aires, Argentina. Dr. Palumbo has received research fellowships from: Marie Curie Fellowship within the 7th European Community Framework Programme, Abdus Salam International Centre for Theoretical Physics (ICTP) Italy, National Council of Science and Technology (CONICET) Argentina, and Consiglio Nazionale delle Ricerche (CNR) Italy. He is also a frequent scientific visitor of academic institutions as IMM-CNR-Italy, Minatec Grenoble-France, the Autonomous University of Barcelona-Spain, and the Israel Institute of Technology-Technion. He has authored and co-authored more than 50 papers in international conferences and journals.

  16. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.

    2011-10-12

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  17. Characterization, integration and reliability of HfO{sub 2} and LaLuO{sub 3} high-κ/metal gate stacks for CMOS applications

    Energy Technology Data Exchange (ETDEWEB)

    Nichau, Alexander

    2013-07-15

    The continued downscaling of MOSFET dimensions requires an equivalent oxide thickness (EOT) of the gate stack below 1 nm. An EOT below 1.4 nm is hereby enabled by the use of high-κ/metal gate stacks. LaLuO{sub 3} and HfO{sub 2} are investigated as two different high-κ oxides on silicon in conjunction with TiN as the metal electrode. LaLuO{sub 3} and its temperature-dependent silicate formation are characterized by hard X-ray photoemission spectroscopy (HAXPES). The effective attenuation length of LaLuO{sub 3} is determined between 7 and 13 keV to enable future interface and diffusion studies. In a first investigation of LaLuO{sub 3} on germanium, germanate formation is shown. LaLuO{sub 3} is further integrated in a high-temperature MOSFET process flow with varying thermal treatment. The devices feature drive currents up to 70μA/μm at 1μm gate length. Several optimization steps are presented. The effective device mobility is related to silicate formation and thermal budget. At high temperature the silicate formation leads to mobility degradation due to La-rich silicate formation. The integration of LaLuO{sub 3} in high-T processes delicately connects with the optimization of the TiN metal electrode. Hereby, stoichiometric TiN yields the best results in terms of thermal stability with respect to Si-capping and high-κ oxide. Different approaches are presented for a further EOT reduction with LaLuO{sub 3} and HfO{sub 2}. Thereby the thermodynamic and kinetic predictions are employed to estimate the behavior on the nanoscale. Based on thermodynamics, excess oxygen in the gate stack, especially in oxidized metal electrodes, is identified to prevent EOT scaling below 1.2 nm. The equivalent oxide thickness of HfO{sub 2} gate stacks is scalable below 1 nm by the use of thinned interfacial SiO{sub 2}. The prevention of oxygen incorporation into the metal electrode by Si-capping maintains the EOT after high temperature annealing. Redox systems are employed within the

  18. Chemical Bonding, Interfaces and Defects in Hafnium Oxide/Germanium Oxynitride Gate Stacks on Ge (100)

    Energy Technology Data Exchange (ETDEWEB)

    Oshima, Yasuhiro; /Stanford U., Materials Sci. Dept.; Sun, Yun; /SLAC, SSRL; Kuzum, Duygu; /Stanford U.; Sugawara, Takuya; Saraswat, Krishna C.; Pianetta, Piero; /SLAC, SSRL; McIntyre, Paul C.; /Stanford U., Materials Sci. Dept.

    2008-10-31

    Correlations among interface properties and chemical bonding characteristics in HfO{sub 2}/GeO{sub x}N{sub y}/Ge MIS stacks were investigated using in-situ remote nitridation of the Ge (100) surface prior to HfO{sub 2} atomic layer deposition (ALD). Ultra thin ({approx}1.1 nm), thermally stable and aqueous etch-resistant GeO{sub x}N{sub y} interfaces layers that exhibited Ge core level photoelectron spectra (PES) similar to stoichiometric Ge{sub 3}N{sub 4} were synthesized. To evaluate GeO{sub x}N{sub y}/Ge interface defects, the density of interface states (D{sub it}) was extracted by the conductance method across the band gap. Forming gas annealed (FGA) samples exhibited substantially lower D{sub it} ({approx} 1 x 10{sup 12} cm{sup -2} eV{sup -1}) than did high vacuum annealed (HVA) and inert gas anneal (IGA) samples ({approx} 1x 10{sup 13} cm{sup -2} eV{sup -1}). Germanium core level photoelectron spectra from similar FGA-treated samples detected out-diffusion of germanium oxide to the HfO{sub 2} film surface and apparent modification of chemical bonding at the GeO{sub x}N{sub y}/Ge interface, which is related to the reduced D{sub it}.

  19. Formation of amorphous Yb₂O₃/crystalline ZrTiO₄ gate stack and its application in n-MOSFET with sub-nm EOT

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Chia-Chun; Wu, Yung-Hsien, E-mail: yunhwu@mx.nthu.edu.tw; Wu, Chao-Yi; Lee, Ching-Wei

    2014-04-01

    Highlights: • Orthorhombic ZrTiO₄ and amorphous Yb₂O₃ were confirmed by XRD and TEM. • Gate stack of ZrTiO₄/Yb₂O₃ shows low Dit and a small fixed oxide charge density. • MOSFETs with 0.79-nm EOT and excellent sub-Vt swing of 66 mV/dec were realized. • Good reliability is proven by negligible ΔVt, Δgm and sub-Vt swing degradation. Abstract: Dielectric stack composed of orthorhombic ZrTiO₄ and amorphous Yb₂O₃ interfacial layer was employed as the gate dielectric for Si n-MOSFET. The gate stack with EOT of 0.79 nm demonstrates a desirable dielectric quality in terms of a low interface trap density (Dit) of 2.4 × 10¹¹ cm⁻² eV⁻¹ and a small fixed oxide charge density of 2.8 × 10¹¹ cm⁻². The promising transistor characteristics are evidenced by the excellent subthreshold swing of 66 mV/dec and good electron mobility of 192 cm²/V s at 1 MV/cm. The former is primarily due to the low Dit value while the latter is ascribed to the small amount of fixed oxide charge and the existence of an Yb₂O₃ interfacial layer; both factors are beneficial to suppress the carrier remote scattering mechanism. From the analysis of positive bias temperature instability with the stress field of 11 MV/cm for 1000 s at 85 °C, 12-mV shift in threshold voltage and negligible degradation in subthreshold swing and transconductance prove the satisfactory reliability performance. These prominent electrical characteristics show that the crystalline-based gate stack is eligible for aggressively scaled CMOS devices.

  20. Modification of electrical properties and carrier transportation mechanism of ALD-derived HfO{sub 2}/Si gate stacks by Al{sub 2}O{sub 3} incorporation

    Energy Technology Data Exchange (ETDEWEB)

    Gao, Juan [School of Physics and Materials Science, Radiation Detection Materials & Devices Lab, Anhui University, Hefei 230601 (China); School of Sciences, Anhui University of Science and Technology, Huainan 232001 (China); He, Gang, E-mail: hegang@ahu.edu.cn [School of Physics and Materials Science, Radiation Detection Materials & Devices Lab, Anhui University, Hefei 230601 (China); Sun, Zhaoqi; Chen, Hanshuang; Zheng, Changyong; Jin, Peng; Xiao, Dongqi [School of Physics and Materials Science, Radiation Detection Materials & Devices Lab, Anhui University, Hefei 230601 (China); Liu, Mao, E-mail: mliu@issp.ac.cn [Key Laboratory of Materials Physics, Anhui Key Laboratory of Nanomaterials and Nanostructure, Institute of Solid State Physics, Chinese Academy of Sciences, Hefei 230031 (China)

    2016-05-15

    Effect of Al{sub 2}O{sub 3} incorporation on the electrical properties and carrier transportation of atomic-layer-deposited (ALD) HfAlO high-k gate dielectrics on Si substrates have been investigated. Electrical analyses indicate that interfacial properties of HfAlO/Si gate stack have been improved and leakage current is reduced after Al{sub 2}O{sub 3} incorporation into HfO{sub 2}. Additionally, the HfAlO sample with precursor ratio (TEMAH: TMA) of 4:2 exhibits the lowest interface state density (D{sub it}) of 3.6 × 10{sup 11} cm{sup −2} eV{sup −1}, the lowest border trapped oxide charge density (N{sub bt}) of 2.4 × 10{sup 11} cm{sup −2}, the lower density of oxide charge (Q{sub ox}) of 0.9 × 10{sup 12} cm{sup −2}, and the lowest frequency dispersion of 0.15%. In addition, the carrier transportation mechanism for both HfO{sub 2} and HfAlO has been investigated systematically. Based on the analysis, it can be concluded that Poole-Frenkle (P–F) emission is main conduction mechanism at the low electric field, and direct tunneling (D-T) dominates the conduction mechanism at the high field, respectively. - Highlights: • ALD-derived HfAlO gate dielectric has been deposited on Si substrate. • Al{sub 2}O{sub 3} incorporation into HfO{sub 2} leads to reduced leakage current. • Poole-Frenkle emission is main conduction mechanism at low field. • Direct tunneling dominates the conduction mechanism at high field.

  1. Effect of the post-deposition annealing on electrical characteristics of MIS structures with HfO{sub 2}/SiO{sub 2} gate dielectric stacks

    Energy Technology Data Exchange (ETDEWEB)

    Taube, Andrzej [Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw (Poland); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland); Mroczynski, Robert, E-mail: rmroczyn@elka.pw.edu.pl [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland); Korwin-Mikke, Katarzyna [Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw (Poland); Gieraltowska, Sylwia [Institute of Physics, Polish Academy of Sciences, Al. Lotnikow 32/46, 02-668 Warsaw (Poland); Szmidt, Jan [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland); Piotrowska, Anna [Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw (Poland)

    2012-09-01

    In this work, we report on effects of post-deposition annealing on electrical characteristics of metal-insulator-semiconductor (MIS) structures with HfO{sub 2}/SiO{sub 2} double gate dielectric stacks. Obtained results have shown the deterioration of electro-physical properties of MIS structures, e.g. higher interface traps density in the middle of silicon forbidden band (D{sub itmb}), as well as non-uniform distribution and decrease of breakdown voltage (U{sub br}) values, after annealing above 400 Degree-Sign C. Two potential hypothesis of such behavior were proposed: the formation of interfacial layer between hafnia and silicon dioxide and the increase of crystallinity of HfO{sub 2} due to the high temperature treatment. Furthermore, the analysis of conduction mechanisms in investigated stacks revealed Poole-Frenkel (P-F) tunneling at broad range of electric field intensity.

  2. Characterization of High-k Nanolayers by Grazing Incidence X-ray Spectrometry

    Directory of Open Access Journals (Sweden)

    Matthias Müller

    2014-04-01

    Full Text Available The accurate characterization of nanolayered systems is an essential topic for today’s developments in many fields of material research. Thin high-k layers and gate stacks are technologically required for the design of current and future electronic devices and can be deposited, e.g., by Atomic Layer Deposition (ALD. However, the metrological challenges to characterize such systems demand further development of analytical techniques. Reference-free Grazing Incidence X-ray Fluorescence (GIXRF based on synchrotron radiation can significantly contribute to the characterization of such nanolayered systems. GIXRF takes advantage of the incident angle dependence of XRF, in particular below the substrate’s critical angle where changes in the X-ray Standing Wave field (XSW intensity influence the angular intensity profile. The reliable modeling of the XSW in conjunction with the radiometrically calibrated instrumentation at the PTB allows for reference-free, fundamental parameter-based quantitative analysis. This approach is very well suited for the characterization of nanoscaled materials, especially when no reference samples with sufficient quality are available. The capabilities of this method are demonstrated by means of two systems for transistor gate stacks, i.e., Al2O3 high-k layers grown on Si or Si/SiO2 and Sc2O3 layers on InGaAs/InP substrates.

  3. Electrical Characteristics of the Uniaxial-Strained nMOSFET with a Fluorinated HfO2/SiON Gate Stack

    Directory of Open Access Journals (Sweden)

    Yung-Yu Chen

    2014-03-01

    Full Text Available The channel fluorine implantation (CFI process was integrated with the Si3N4 contact etch stop layer (SiN CESL uniaxial-strained n-channel metal-oxide-semiconductor field-effect transistor (nMOSFET with the hafnium oxide/silicon oxynitride (HfO2/SiON gate stack. The SiN CESL process clearly improves basic electrical performance, due to induced uniaxial tensile strain within the channel. However, further integrating of the CFI process with the SiN CESL-strained nMOSFET exhibits nearly identical transconductance, subthreshold swing, drain current, gate leakage and breakdown voltage, which indicates that the strain effect is not affected by the fluorine incorporation. Moreover, hydrogen will diffuse toward the interface during the SiN deposition, then passivate dangling bonds to form weak Si-H bonds, which is detrimental for channel hot electron stress (CHES. Before hydrogen diffusion, fluorine can be used to terminate oxygen vacancies and dangling bonds, which can create stronger Hf-F and Si-F bonds to resist consequent stress. Accordingly, the reliability of constant voltage stress (CVS and CHES for the SiN CESL uniaxial-strained nMOSFET can be further improved by the fluorinated HfO2/SiON using the CFI process. Nevertheless, the nMOSFET with either the SiN CESL or CFI process exhibits less charge detrapping, which means that a greater part of stress-induced charges would remain in the gate stack after nitrogen (SiN CESL or fluorine (CFI incorporation.

  4. Electronic Structure and Charge-Trapping Characteristics of the Al2O3-TiAlO-SiO2 Gate Stack for Nonvolatile Memory Applications.

    Science.gov (United States)

    Xu, Wenchao; Zhang, Yang; Tang, Zhenjie; Shao, Zhengjie; Zhou, Guofu; Qin, Minghui; Zeng, Min; Wu, Sujuan; Zhang, Zhang; Gao, Jinwei; Lu, Xubing; Liu, Junming

    2017-12-01

    In this work, high-k composite TiAlO film has been investigated as charge-trapping material for nonvolatile memory applications. The annealing formed Al2O3-TiAlO-SiO2 dielectric stack demonstrates significant memory effects and excellent reliability properties. The memory device exhibits a large memory window of ~2.6 V under ±8 V sweeping voltage, and it shows only ~14% charge loss after more than 10 years' retention, indicating excellent charge retention properties. The electronic structures of the Al2O3-TiAlO-SiO2 have been studied by X-ray photoelectron spectroscopy measurements, and it reveals that the quantum well and the defect traps in TiAlO film can provide a >1.8 eV deep barrier for charge confinement in the TiAlO layer. The mixing between Al2O3 and TiO2 can increase the defects related to the under-coordinated Ti3+ atoms, thereby enhancing the charge-trapping efficiency of the device. Our work implies that high-k TiAlO composite film is promising for applications in future nonvolatile charge-trapping memories.

  5. Electronic Structure and Charge-Trapping Characteristics of the Al2O3-TiAlO-SiO2 Gate Stack for Nonvolatile Memory Applications

    Science.gov (United States)

    Xu, Wenchao; Zhang, Yang; Tang, Zhenjie; Shao, Zhengjie; Zhou, Guofu; Qin, Minghui; Zeng, Min; Wu, Sujuan; Zhang, Zhang; Gao, Jinwei; Lu, Xubing; Liu, Junming

    2017-04-01

    In this work, high- k composite TiAlO film has been investigated as charge-trapping material for nonvolatile memory applications. The annealing formed Al2O3-TiAlO-SiO2 dielectric stack demonstrates significant memory effects and excellent reliability properties. The memory device exhibits a large memory window of 2.6 V under ±8 V sweeping voltage, and it shows only 14% charge loss after more than 10 years' retention, indicating excellent charge retention properties. The electronic structures of the Al2O3-TiAlO-SiO2 have been studied by X-ray photoelectron spectroscopy measurements, and it reveals that the quantum well and the defect traps in TiAlO film can provide a >1.8 eV deep barrier for charge confinement in the TiAlO layer. The mixing between Al2O3 and TiO2 can increase the defects related to the under-coordinated Ti3+ atoms, thereby enhancing the charge-trapping efficiency of the device. Our work implies that high- k TiAlO composite film is promising for applications in future nonvolatile charge-trapping memories.

  6. Impact of cyclic plasma treatment on oxygen vacancy defects in TiN/HfZrO/SiON/Si gate stacks

    Energy Technology Data Exchange (ETDEWEB)

    Bhuyian, Md Nasir Uddin, E-mail: mnb3@njit.edu; Misra, D. [Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, New Jersey 07102 (United States); Poddar, S. [Department of Electronics and Communication Engineering, Heritage Institute of Technology, Kolkata (India); Tapily, K.; Clark, R. D.; Consiglio, S.; Wajda, C. S.; Nakamura, G.; Leusink, G. J. [TEL Technology Center, America, LLC, NanoFab 300 South 255 Fuller Road, Suite 244, Albany, New York 12203 (United States)

    2015-05-11

    This work evaluates the defects in HfZrO as a function of Zr addition into HfO{sub 2} and when the dielectric was subjected to a slot-plane-antenna (SPA) plasma treatment in a cyclic process to form TiN/HfZrO/SiON/Si gate stacks. The defect energy levels, estimated by temperature-dependent current-voltage measurements, suggest that Zr addition in HfO{sub 2} modifies the charge state of the oxygen vacancy formation, V{sup +}. The influence of electron affinity variation of Hf and Zr ions on the charged oxygen vacancy levels seems to have contributed to the increase in defect activation energy, E{sub a}, from 0.32 eV to 0.4 eV. The cyclic SPA plasma exposure further reduces the oxygen vacancy formation because of the film densification. When the dielectric was subjected to a constant voltage stress, the charge state oxygen vacancy formation changes to V{sup 2+} and improvement was eliminated. The trap assisted tunneling behavior, as observed by the stress induced leakage current characteristics, further supports the oxygen vacancy formation model.

  7. Evolution of interfacial Fermi level in In{sub 0.53}Ga{sub 0.47}As/high-κ/TiN gate stacks

    Energy Technology Data Exchange (ETDEWEB)

    Carr, Adra; Rozen, John; Frank, Martin M.; Ando, Takashi; Cartier, Eduard A.; Kerber, Pranita; Narayanan, Vijay; Haight, Richard [IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (United States)

    2015-07-06

    The net charge state was probed of metal-oxide-semiconductor gate stacks consisting of In{sub 0.53}Ga{sub 0.47}As /high-κ dielectric/5 nm TiN, for both Al{sub 2}O{sub 3} and HfO{sub 2} dielectrics, via investigation of band bending at the InGaAs/high-κ interface. Using pump-probe photoelectron spectroscopy, changes to band bending were studied for each sequential layer deposited onto the InGaAs substrate and subsequent annealing up to 600 °C. Two behavioral regions were observed in annealing studies: (1) a lower temperature (<350 °C) region, attributed to changes at the high-κ/TiN interface, and (2) a higher temperature region (> 350 °C), associated with a net positive charge increase within the oxide. These band bending measurements delineate the impact of processing steps inherently inaccessible via capacitance-voltage electrical characterization.

  8. Insights into thermal diffusion of germanium and oxygen atoms in HfO{sub 2}/GeO{sub 2}/Ge gate stacks and their suppressed reaction with atomically thin AlO{sub x} interlayers

    Energy Technology Data Exchange (ETDEWEB)

    Ogawa, Shingo, E-mail: Shingo-Ogawa@trc.toray.co.jp [Toray Research Center, Inc., 3-3-7 Sonoyama, Otsu, Shiga 520-8567 (Japan); Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871 (Japan); Asahara, Ryohei; Minoura, Yuya; Hosoi, Takuji, E-mail: hosoi@mls.eng.osaka-u.ac.jp; Shimura, Takayoshi; Watanabe, Heiji [Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871 (Japan); Sako, Hideki; Kawasaki, Naohiko; Yamada, Ichiko; Miyamoto, Takashi [Toray Research Center, Inc., 3-3-7 Sonoyama, Otsu, Shiga 520-8567 (Japan)

    2015-12-21

    The thermal diffusion of germanium and oxygen atoms in HfO{sub 2}/GeO{sub 2}/Ge gate stacks was comprehensively evaluated by x-ray photoelectron spectroscopy and secondary ion mass spectrometry combined with an isotopic labeling technique. It was found that {sup 18}O-tracers composing the GeO{sub 2} underlayers diffuse within the HfO{sub 2} overlayers based on Fick's law with the low activation energy of about 0.5 eV. Although out-diffusion of the germanium atoms through HfO{sub 2} also proceeded at the low temperatures of around 200 °C, the diffusing germanium atoms preferentially segregated on the HfO{sub 2} surfaces, and the reaction was further enhanced at high temperatures with the assistance of GeO desorption. A technique to insert atomically thin AlO{sub x} interlayers between the HfO{sub 2} and GeO{sub 2} layers was proven to effectively suppress both of these independent germanium and oxygen intermixing reactions in the gate stacks.

  9. USPIO-enhanced 3D-cine self-gated cardiac MRI based on a stack-of-stars golden angle short echo time sequence: Application on mice with acute myocardial infarction.

    Science.gov (United States)

    Trotier, Aurélien J; Castets, Charles R; Lefrançois, William; Ribot, Emeline J; Franconi, Jean-Michel; Thiaudière, Eric; Miraux, Sylvain

    2016-08-01

    To develop and assess a 3D-cine self-gated method for cardiac imaging of murine models. A 3D stack-of-stars (SOS) short echo time (STE) sequence with a navigator echo was performed at 7T on healthy mice (n = 4) and mice with acute myocardial infarction (MI) (n = 4) injected with ultrasmall superparamagnetic iron oxide (USPIO) nanoparticles. In all, 402 spokes were acquired per stack with the incremental or the golden angle method using an angle increment of (360/402)° or 222.48°, respectively. A cylindrical k-space was filled and repeated with a maximum number of repetitions (NR) of 10. 3D cine cardiac images at 156 μm resolution were reconstructed retrospectively and compared for the two methods in terms of contrast-to-noise ratio (CNR). The golden angle images were also reconstructed with NR = 10, 6, and 3, to assess cardiac functional parameters (ejection fraction, EF) on both animal models. The combination of 3D SOS-STE and USPIO injection allowed us to optimize the identification of cardiac peaks on navigator signal and generate high CNR between blood and myocardium (15.3 ± 1.0). The golden angle method resulted in a more homogeneous distribution of the spokes inside a stack (P cine images could be obtained without electrocardiogram or respiratory gating in mice. It allows precise measurement of cardiac functional parameters even on MI mice. J. Magn. Reson. Imaging 2016;44:355-365. © 2016 Wiley Periodicals, Inc.

  10. Influence of plasma-based in-situ surface cleaning procedures on HfO{sub 2}/In{sub 0.53}Ga{sub 0.47}As gate stack properties

    Energy Technology Data Exchange (ETDEWEB)

    Chobpattana, Varistha; Mates, Thomas E.; Mitchell, William J.; Zhang, Jack Y.; Stemmer, Susanne [Materials Department, University of California, Santa Barbara, California 93106-5050 (United States)

    2013-10-21

    We report on the influence of variations in the process parameters of an in-situ surface cleaning procedure, consisting of alternating cycles of nitrogen plasma and trimethylaluminum dosing, on the interface trap density of highly scaled HfO{sub 2} gate dielectrics deposited on n-In{sub 0.53}Ga{sub 0.47}As by atomic layer deposition. We discuss the interface chemistry of stacks resulting from the pre-deposition exposure to nitrogen plasma/trimethylaluminum cycles. Measurements of interface trap densities, interface chemistry, and surface morphology show that variations in the cleaning process have a large effect on nucleation and surface coverage, which in turn are crucial for achieving low interface state densities.

  11. Fabrication of Ta2O5/GeNx gate insulator stack for Ge metal-insulator-semiconductor structures by electron-cyclotron-resonance plasma nitridation and sputtering deposition techniques

    Science.gov (United States)

    Otani, Yohei; Itayama, Yasuhiro; Tanaka, Takuo; Fukuda, Yukio; Toyota, Hiroshi; Ono, Toshiro; Mitsui, Minoru; Nakagawa, Kiyokazu

    2007-04-01

    The authors have fabricated germanium (Ge) metal-insulator-semiconductor (MIS) structures with a 7-nm-thick tantalum pentaoxide (Ta2O5)/2-nm-thick germanium nitride (GeNx) gate insulator stack by electron-cyclotron-resonance plasma nitridation and sputtering deposition. They found that pure GeNx ultrathin layers can be formed by the direct plasma nitridation of the Ge surface without substrate heating. X-ray photoelectron spectroscopy revealed no oxidation of the GeNx layer after the Ta2O5 sputtering deposition. The fabricated MIS capacitor with a capacitance equivalent thickness of 4.3nm showed excellent leakage current characteristics. The interface trap density obtained by the modified conductance method was 4×1011cm-2eV-1 at the midgap.

  12. Electrically programmable-erasable In-Ga-Zn-O thin-film transistor memory with atomic-layer-deposited Al2O3/Pt nanocrystals/Al2O3 gate stack

    Directory of Open Access Journals (Sweden)

    Shi-Bing Qian

    2015-12-01

    Full Text Available Amorphous indium-gallium-zinc oxide (a-IGZO thin-film transistor (TFT memory is very promising for transparent and flexible system-on-panel displays; however, electrical erasability has always been a severe challenge for this memory. In this article, we demonstrated successfully an electrically programmable-erasable memory with atomic-layer-deposited Al2O3/Pt nanocrystals/Al2O3 gate stack under a maximal processing temperature of 300 oC. As the programming voltage was enhanced from 14 to 19 V for a constant pulse of 0.2 ms, the threshold voltage shift increased significantly from 0.89 to 4.67 V. When the programmed device was subjected to an appropriate pulse under negative gate bias, it could return to the original state with a superior erasing efficiency. The above phenomena could be attributed to Fowler-Nordheim tunnelling of electrons from the IGZO channel to the Pt nanocrystals during programming, and inverse tunnelling of the trapped electrons during erasing. In terms of 0.2-ms programming at 16 V and 350-ms erasing at −17 V, a large memory window of 3.03 V was achieved successfully. Furthermore, the memory exhibited stable repeated programming/erasing (P/E characteristics and good data retention, i.e., for 2-ms programming at 14 V and 250-ms erasing at −14 V, a memory window of 2.08 V was still maintained after 103 P/E cycles, and a memory window of 1.1 V was retained after 105 s retention time.

  13. Tunneling in high-K isomeric decays

    CERN Document Server

    Shizuma, T; Shimizu, Y R

    2002-01-01

    We have systematically investigated highly-K-forbidden transitions observed in the Hf, W and Os region, using the gamma-tunneling model in which low-K and high-k states interact through a process of quantum tunneling. The measured hindrance factors are compared with the values calculated using the gamma-tunneling model. Isotope dependences of gamma-tunneling probabilities particularly for neutron-rich nuclei and the relation to stimulated decays of isomers are discussed. (author)

  14. An explicit continuous analytical model for Gate All Around (GAA) MOSFETs including the hot-carrier degradation effects.

    Science.gov (United States)

    Abdi, M A; Djeffal, F; Bentrcia, T; Arar, D

    2011-10-01

    In this paper, an explicit and continuous analytical model including interfacial hot-carrier effects is developed for a deep submicron Gate All Around (GAA) MOSFETs. Explicit analytical expressions of the surface potential, drain current and transconductance are given for all operating modes. Exploiting this new device model, we have found that the incorporation of a high-k layer, Gate Stack (GS), between oxide region and gate metal leads to drain current enhancement, improved transconductance parameter and enhanced interfacial hot-carrier immunity. The developed approaches are verified and validated by the good agreement found with the 2D numerical simulations for wide range of device parameters and bias conditions. GS GAA MOSFET design can alleviate the critical problem and further improve the immunity of hot-carrier effects of GAA MOSFET-based circuits in the deep submicron working domain.

  15. Engineering the Propagation of High-k Bulk Plasmonic Waves in Multilayer Hyperbolic Metamaterials by Multiscale Structuring

    DEFF Research Database (Denmark)

    Zhukovsky, Sergei; Lavrinenko, Andrei; Sipe, John E.

    layers. These high-k waves can have anomalously short wavelength, which underlies the concept of far-field subwavelength imaging (hyperlensing) in HMMs. In this work, we show that propagation of these high-k bulk plasmons can be controlled by modulating, or superstructuring, the filling fraction of metal...... in a subwavelength metal-dielectric stack on a longer, wavelength scale. The basic superstructure geometry is a hybrid multiscale HMM where the modulation itself is periodic, forming a photonic band gap (PBG) for the high-k waves according to the same principles as in conventional photonic crystals. As a result...

  16. Current Tunnelling in MOS Devices with Al2O3/SiO2 Gate Dielectric

    Directory of Open Access Journals (Sweden)

    A. Bouazra

    2008-01-01

    Full Text Available With the continued scaling of the SiO2 thickness below 2 nm in CMOS devices, a large direct-tunnelling current flow between the gate electrode and silicon substrate is greatly impacting device performance. Therefore, higher dielectric constant materials are desirable for reducing the gate leakage while maintaining transistor performance for very thin dielectric layers. Despite its not very high dielectric constant (∼10, Al2O3 has emerged as one of the most promising high-k candidates in terms of its chemical and thermal stability as its high-barrier offset. In this paper, a theoretical study of the physical and electrical properties of Al2O3 gate dielectric is reported including I(V and C(V characteristics. By using a stack of Al2O3/SiO2 with an appropriate equivalent oxide thickness of gate dielectric MOS, the gate leakage exhibits an important decrease. The effect of carrier trap parameters (depth and width at the Al2O3/SiO2 interface is also discussed.

  17. Volatiles in High-K Lunar Basalts

    Science.gov (United States)

    Barnes, Jessica J.; McCubbin, Francis M.; Messenger, Scott R.; Nguyen, Ann; Boyce, Jeremy

    2017-01-01

    Chlorine is an unusual isotopic system, being essentially unfractionated ((delta)Cl-37 approximately 0 per mille ) between bulk terrestrial samples and chondritic meteorites and yet showing large variations in lunar (approximately -4 to +81 per mille), martian, and vestan (HED) samples. Among lunar samples, the volatile-bearing mineral apatite (Ca5(PO4)3[F,Cl,OH]) has been studied for volatiles in K-, REE-, and P (KREEP), very high potassium (VHK), low-Ti and high-Ti basalts, as well as samples from the lunar highlands. These studies revealed a positive correlation between in-situ (delta)Cl-37 measurements and bulk incompatible trace elements (ITEs) and ratios. Such trends were interpreted to originate from Cl isotopic fractionation during the degassing of metal chlorides during or shortly after the differentiation of the Moon via a magma ocean. In this study, we investigate the volatile inventories of a group of samples for which new-era volatile data have yet to be reported - the high-K (greater than 2000 ppm bulk K2O), high-Ti, trace element-rich mare basalts. We used isotope imaging on the Cameca NanoSIMS 50L at JSC to obtain the Cl isotopic composition [((Cl-37/(35)Clsample/C-37l/(35)Clstandard)-1)×1000, to get a value in per thousand (per mille)] which ranges from approximately -2.7 +/- 2 per mille to +16.1 +/- 2 per mille (2sigma), as well as volatile abundances (F & Cl) of apatite in samples 10017, 10024 & 10049. Simply following prior models, as lunar rocks with high bulk-rock abundances of ITEs we might expect the high-K, high-Ti basalts to contain apatite characterized by heavily fractionated (delta)Cl-37 values, i.e., Cl obtained from mixing between unfractionated mantle Cl (approximately 0 per mille) and the urKREEP reservoir (possibly fractionated to greater than +25 per mille.). However, the data obtained for the studied samples do not conform to either the early degassing or mixing models. Existing petrogentic models for the origin of the high-K

  18. Influence of Design and Process Parameters of 32-nm Advanced-Process High- k p-MOSFETs on Negative-Bias Temperature Instability and Study of Defects

    Science.gov (United States)

    Alimin, A. F. Muhammad; Radzi, A. A. Mohd; Sazali, N. A. F.; Hatta, S. F. Wan Muhamad; Soin, N.; Hussin, H.

    2017-10-01

    Negative-bias temperature instability (NBTI) has become a prominent factor limiting scaling of complementary metal-oxide-semiconductor technology. This work presents a comprehensive simulation study on the effects of critical design parameters of 32-nm advanced-process high- k p-channel metal-oxide-semiconductor field-effect transistors on NBTI. The NBTI mechanism and defects were explored for various geometric and process design parameters over a wide range of values. The NBTI simulation method applied in this work follows the on-the-fly method to capture the mechanisms of fast and slow traps. This work illustrates the dependence of the threshold voltage ( V th) degradation on the stress oxide field and stress temperature as well as investigation of the Arrhenius plot for the devices. The temperature insensitivity during short stress time of 1 ms indicates absence of generated defects and presence of preexisting defects. It is also observed that significant defects are generated in the gate stack subsequent to NBTI. The slope obtained from the V th degradation analysis at 1 ks and 375°C shows that changing the SiO2 interfacial layer thickness affects the V th degradation by 96.16% more than changing the HfO2 thickness and by 80.67% more than changing the metal gate thickness. It is also found that the NBTI effect depends on process design considerations, specifically the boron concentration in the highly doped drain, the metal gate work function, and the halo doping concentration; it was observed that higher boron dose and high metal work function may lead to higher V th degradation. However, the halo doping concentration in the advanced 32-nm structure has an insignificant effect on NBTI.

  19. Electron energy dissipation model of gate dielectric progressive breakdown in n- and p-channel field effect transistors

    Science.gov (United States)

    Lombardo, S.; Wu, E. Y.; Stathis, J. H.

    2017-08-01

    We report the data and a model showing that the energy loss experienced by the carriers flowing through breakdown spots is the primary cause of progressive breakdown spot growth. The experiments are performed in gate dielectrics of metal-oxide-semiconductor (MOS) devices subjected to accelerated high electric field constant voltage stress under inversion conditions. The model is analytical and contains few free parameters of clear physical meaning. This is compared to a large set of data on breakdown transients at various oxide thicknesses, stress voltages, and temperatures, both in cases of n-channel and p-channel transistors and polycrystalline Si/oxynitride/Si and metal gate/high k dielectric/Si gate stacks. The basic idea is that the breakdown transient is due to the growth of one or more filaments in the dielectric promoted by electromigration driven by the energy lost by the electrons traveling through the breakdown spots. Both cases of polycrystalline Si/oxynitride/Si and metal gate/high-k dielectric/Si MOS structures are investigated. The best fit values of the model to the data, reported and discussed in the paper, consistently describe a large set of data. The case of simultaneous growth of multiple progressive breakdown spots in the same device is also discussed in detail.

  20. High-K Strategy Scale: A Measure of the High-K Independent Criterion of Fitness

    Directory of Open Access Journals (Sweden)

    Cezar Giosan

    2006-01-01

    Full Text Available The present study aimed at testing whether factors documented in the literature as being indicators of a high-K reproductive strategy have effects on fitness in extant humans. A 26-item High-K Strategy Scale comprising these factors was developed and tested on 250 respondents. Items tapping into health and attractiveness, upward mobility, social capital and risks consideration, were included in the scale. As expected, the scale showed a significant correlation with perceived offspring quality and a weak, but significant association with actual number of children. The scale had a high reliability coefficient (Cronbach's Alpha = .92. Expected correlations were found between the scale and number of medical diagnoses, education, perceived social support, and number of previous marriages, strengthening the scale's construct validity. Implications of the results are discussed.

  1. Electrochemical cell stack assembly

    Science.gov (United States)

    Jacobson, Craig P.; Visco, Steven J.; De Jonghe, Lutgard C.

    2010-06-22

    Multiple stacks of tubular electrochemical cells having a dense electrolyte disposed between an anode and a cathode preferably deposited as thin films arranged in parallel on stamped conductive interconnect sheets or ferrules. The stack allows one or more electrochemical cell to malfunction without disabling the entire stack. Stack efficiency is enhanced through simplified gas manifolding, gas recycling, reduced operating temperature and improved heat distribution.

  2. Bilayer Polymer Metacomposites Containing Negative Permittivity Layer for New High-k Materials.

    Science.gov (United States)

    Wang, Jing; Shi, Zhicheng; Mao, Fan; Chen, Shougang; Wang, Xin

    2017-01-18

    Polymer matrix high-k composites are of considerable interest in various electronic devices, such as capacitors, antennas, actuators, etc. However, how to enhance the permittivity without elevating the loss remains a challenge for us. Here we present a novel design of bilayer high-k metacomposites consisting of two stacked single layers with positive permittivity and negative permittivity. Interestingly, the bilayer system shows an obvious permittivity boost effect with a permittivity improved by a 40-fold increase compared with the polymer matrix, while maintaining a loss tangent as low as 0.06. Further calculation results indicate that the permittivity of the bilayer composites could be enhanced by 4000-fold or even a greater increase as compared with the polymer matrix via balancing the dielectric properties of single layers. Insights into how the thickness ratios and dielectric properties of single layers interfere with the dielectric performances of bilayer composites were discussed. This study provides a new route for the design of high-k materials, and it will have great significance on the development of dielectric materials. Hopefully, multilayer high-k metacomposites with fascinating dielectric performances could be achieved via balancing the dielectric properties of single layers.

  3. Transparently wrap-gated semiconductor nanowire arrays for studies of gate-controlled photoluminescence

    Energy Technology Data Exchange (ETDEWEB)

    Nylund, Gustav; Storm, Kristian; Torstensson, Henrik; Wallentin, Jesper; Borgström, Magnus T.; Hessman, Dan; Samuelson, Lars [Solid State Physics, Nanometer Structure Consortium, Lund University, Box 118, S-221 00 Lund (Sweden)

    2013-12-04

    We present a technique to measure gate-controlled photoluminescence (PL) on arrays of semiconductor nanowire (NW) capacitors using a transparent film of Indium-Tin-Oxide (ITO) wrapping around the nanowires as the gate electrode. By tuning the wrap-gate voltage, it is possible to increase the PL peak intensity of an array of undoped InP NWs by more than an order of magnitude. The fine structure of the PL spectrum reveals three subpeaks whose relative peak intensities change with gate voltage. We interpret this as gate-controlled state-filling of luminescing quantum dot segments formed by zincblende stacking faults in the mainly wurtzite NW crystal structure.

  4. Thyristor stack for pulsed inductive plasma generation.

    Science.gov (United States)

    Teske, C; Jacoby, J; Schweizer, W; Wiechula, J

    2009-03-01

    A thyristor stack for pulsed inductive plasma generation has been developed and tested. The stack design includes a free wheeling diode assembly for current reversal. Triggering of the device is achieved by a high side biased, self supplied gate driver unit using gating energy derived from a local snubber network. The structure guarantees a hard firing gate pulse for the required high dI/dt application. A single fiber optic command is needed to achieve a simultaneous turn on of the thyristors. The stack assembly is used for switching a series resonant circuit with a ringing frequency of 30 kHz. In the prototype pulsed power system described here an inductive discharge has been generated with a pulse duration of 120 micros and a pulse energy of 50 J. A maximum power transfer efficiency of 84% and a peak power of 480 kW inside the discharge were achieved. System tests were performed with a purely inductive load and an inductively generated plasma acting as a load through transformer action at a voltage level of 4.1 kV, a peak current of 5 kA, and a current switching rate of 1 kA/micros.

  5. Structural and optical properties of germanium nanostructures on Si(100 and embedded in high-k oxides

    Directory of Open Access Journals (Sweden)

    Ray Samit

    2011-01-01

    Full Text Available Abstract The structural and optical properties of Ge quantum dots (QDs grown on Si(001 for mid-infrared photodetector and Ge nanocrystals embedded in oxide matrices for floating gate memory devices are presented. The infrared photoluminescence (PL signal from Ge islands has been studied at a low temperature. The temperature- and bias-dependent photocurrent spectra of a capped Si/SiGe/Si(001 QDs infrared photodetector device are presented. The properties of Ge nanocrystals of different size and density embedded in high-k matrices grown using radio frequency magnetron sputtering have been studied. Transmission electron micrographs have revealed the formation of isolated spherical Ge nanocrystals in high-k oxide matrix of sizes ranging from 4 to 18 nm. Embedded nanocrystals in high band gap oxides have been found to act as discrete trapping sites for exchanging charge carriers with the conduction channel by direct tunneling that is desired for applications in floating gate memory devices.

  6. Gate leakage current partitioning in nanoscale double gate MOSFETs, using compact analytical model

    Science.gov (United States)

    Darbandy, Ghader; Lime, François; Cerdeira, Antonio; Estrada, Magali; Garduño, Salvador Ivan; Iñiguez, Benjamin

    2012-09-01

    This paper presents a compact gate leakage current partitioning model for nanoscale Double Gate (DG) MOSFETs, using analytical models of the direct tunneling gate leakage current. Gate leakage current becomes important and an essential aspect of MOSFET modeling as the gate oxide thickness is scaled down to 1 nm and below in advanced CMOS processes. We considered an ideal interface (ideal case without an interfacial layer) and two layers high k dielectric materials as gate insulators. In the case of two layers, a thin layer of SiO2 as an interfacial layer is considered. The results of the gate current partitioning components into drain and source show good agreement with 2D TCAD numerical device simulation (Silvaco Atlas).

  7. High-k dielectrics as bioelectronic interface for field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Borstlap, D.

    2007-03-15

    Ion-sensitive field-effect transistors (ISFETs) are employed as bioelectronic sensors for the cell-transistor coupling and for the detection of DNA sequences. For these applications, thermally grown SiO{sub 2} films are used as standard gate dielectric. In the first part of this dissertation, the suitability of high-k dielectrics was studied to increase the gate capacitance and hence the signal-to-noise ratio of bioelectronic ISFETs: Upon culturing primary rat neurons on the corresponding high-k dielectrics, Al{sub 2}O{sub 3}, yttria stabilised zirkonia (YSZ), DyScO{sub 3}, CeO{sub 2}, LaAlO{sub 3}, GdScO{sub 3} and LaScO{sub 3} proved to be biocompatible substrates. Comprehensive electrical and electrochemical current-voltage measurements and capacitance-voltage measurements were performed for the determination of the dielectric properties of the high-k dielectrics. In the second part of the dissertation, standard SiO{sub 2} ISFETs with lower input capacitance and high-k dielectric Al{sub 2}O{sub 3}, YSZ und DyScO{sub 3} ISFETs were comprehensively characterised and compared with each other regarding their signal-to-noise ratio, their ion sensitivity and their drift behaviour. The ion sensitivity measurements showed that the YSZ ISFETs were considerably more sensitive to K{sup +} and Na{sup +} ions than the SiO{sub 2}, Al{sub 2}O{sub 3} und DyScO{sub 3} ISFETs. In the final third part of the dissertation, bioelectronic experiments were performed with the high-k ISFETs. The shape of the signals, which were measured from HL-1 cells with YSZ ISFETs, differed considerably from the corresponding measurements with SiO{sub 2} and DyScO{sub 3} ISFETs: After the onset of the K{sup +} current, the action potentials measured with YSZ ISFETs showed a strong drift in the direction opposite to the K{sup +} current signal. First coupling experiments between HEK 293 cells, which were transfected with a K{sup +} ion channel, and YSZ ISFETs affirmed the assumption from the HL-1

  8. Deploying OpenStack

    CERN Document Server

    Pepple, Ken

    2011-01-01

    OpenStack was created with the audacious goal of being the ubiquitous software choice for building public and private cloud infrastructures. In just over a year, it's become the most talked-about project in open source. This concise book introduces OpenStack's general design and primary software components in detail, and shows you how to start using it to build cloud infrastructures. If you're a developer, technologist, or system administrator familiar with cloud offerings such as Rackspace Cloud or Amazon Web Services, Deploying OpenStack shows you how to obtain and deploy OpenStack softwar

  9. Characterization of epitaxial GaAs MOS capacitors using atomic layer-deposited TiO2/Al2O3 gate stack: study of Ge auto-doping and p-type Zn doping.

    Science.gov (United States)

    Dalapati, Goutam Kumar; Shun Wong, Terence Kin; Li, Yang; Chia, Ching Kean; Das, Anindita; Mahata, Chandreswar; Gao, Han; Chattopadhyay, Sanatan; Kumar, Manippady Krishna; Seng, Hwee Leng; Maiti, Chinmay Kumar; Chi, Dong Zhi

    2012-02-02

    Electrical and physical properties of a metal-oxide-semiconductor [MOS] structure using atomic layer-deposited high-k dielectrics (TiO2/Al2O3) and epitaxial GaAs [epi-GaAs] grown on Ge(100) substrates have been investigated. The epi-GaAs, either undoped or Zn-doped, was grown using metal-organic chemical vapor deposition method at 620°C to 650°C. The diffusion of Ge atoms into epi-GaAs resulted in auto-doping, and therefore, an n-MOS behavior was observed for undoped and Zn-doped epi-GaAs with the doping concentration up to approximately 1017 cm-3. This is attributed to the diffusion of a significant amount of Ge atoms from the Ge substrate as confirmed by the simulation using SILVACO software and also from the secondary ion mass spectrometry analyses. The Zn-doped epi-GaAs with a doping concentration of approximately 1018 cm-3 converts the epi-GaAs layer into p-type since the Zn doping is relatively higher than the out-diffused Ge concentration. The capacitance-voltage characteristics show similar frequency dispersion and leakage current for n-type and p-type epi-GaAs layers with very low hysteresis voltage (approximately 10 mV).PACS: 81.15.Gh.

  10. Mastering OpenStack

    CERN Document Server

    Khedher, Omar

    2015-01-01

    This book is intended for system administrators, cloud engineers, and system architects who want to deploy a cloud based on OpenStack in a mid- to large-sized IT infrastructure. If you have a fundamental understanding of cloud computing and OpenStack and want to expand your knowledge, then this book is an excellent checkpoint to move forward.

  11. OpenStack essentials

    CERN Document Server

    Radez, Dan

    2015-01-01

    If you need to get started with OpenStack or want to learn more, then this book is your perfect companion. If you're comfortable with the Linux command line, you'll gain confidence in using OpenStack.

  12. Stacking with Stochastic Cooling

    CERN Document Server

    Caspers, Friedhelm

    2004-01-01

    Accumulation of large stacks of antiprotons or ions with the aid of stochastic cooling is more delicate than cooling a constant intensity beam. Basically the difficulty stems from the fact that the optimized gain and the cooling rate are inversely proportional to the number of particles seen by the cooling system. Therefore, to maintain fast stacking, the newly injected batch has to be strongly protected from the Schottky noise of the stack. Vice versa the stack has to be efficiently shielded against the high gain cooling system for the injected beam. In the antiproton accumulators with stacking ratios up to 105, the problem is solved by radial separation of the injection and the stack orbits in a region of large dispersion. An array of several tapered cooling systems with a matched gain profile provides a continuous particle flux towards the high-density stack core. Shielding of the different systems from each other is obtained both through the spatial separation and via the revolution frequencies (filters)....

  13. Investigation of 6T SRAM memory circuit using high-k dielectrics based nano scale junctionless transistor

    Science.gov (United States)

    Charles Pravin, J.; Nirmal, D.; Prajoon, P.; Mohan Kumar, N.; Ajayan, J.

    2017-04-01

    In this paper the Dual Metal Surround Gate Junctionless Transistor (DMSGJLT) has been implemented with various high-k dielectric. The leakage current in the device is analysed in detail by obtaining the band structure for different high-k dielectric material. It is noticed that with increasing dielectric constant the device provides more resistance for the direct tunnelling of electron in off state. The gate oxide capacitance also shows 0.1 μF improvement with Hafnium Oxide (HfO2) than Silicon Oxide (SiO2). This paved the way for a better memory application when high-k dielectric is used. The Six Transistor (6T) Static Random Access Memory (SRAM) circuit implemented shows 41.4% improvement in read noise margin for HfO2 than SiO2. It also shows 37.49% improvement in write noise margin and 30.16% improvement in hold noise margin for HfO2 than SiO2.

  14. Investigation of capacitance characteristics in metal/high-k ...

    Indian Academy of Sciences (India)

    Keywords. C − V characteristic; high-k dielectric; interface state density; MIS structure; nanotechnology; TCAD simulation. Abstract. Capacitance vs. voltage ( C − V ) curves at AC high frequency of a metal–insulator–semiconductor (MIS) capacitorare investigated in this paper. Bi-dimensional simulations with Silvaco TCAD ...

  15. Radiation-Tolerant Intelligent Memory Stack - RTIMS

    Science.gov (United States)

    Ng, Tak-kwong; Herath, Jeffrey A.

    2011-01-01

    This innovation provides reconfigurable circuitry and 2-Gb of error-corrected or 1-Gb of triple-redundant digital memory in a small package. RTIMS uses circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field-programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuits are stacked into a module of 42.7 42.7 13 mm. Triple module redundancy, current limiting, configuration scrubbing, and single- event function interrupt detection are employed to mitigate radiation effects. The novel self-scrubbing and single event functional interrupt (SEFI) detection allows a relatively soft FPGA to become radiation tolerant without external scrubbing and monitoring hardware

  16. Stack filter classifiers

    Energy Technology Data Exchange (ETDEWEB)

    Porter, Reid B [Los Alamos National Laboratory; Hush, Don [Los Alamos National Laboratory

    2009-01-01

    Just as linear models generalize the sample mean and weighted average, weighted order statistic models generalize the sample median and weighted median. This analogy can be continued informally to generalized additive modeels in the case of the mean, and Stack Filters in the case of the median. Both of these model classes have been extensively studied for signal and image processing but it is surprising to find that for pattern classification, their treatment has been significantly one sided. Generalized additive models are now a major tool in pattern classification and many different learning algorithms have been developed to fit model parameters to finite data. However Stack Filters remain largely confined to signal and image processing and learning algorithms for classification are yet to be seen. This paper is a step towards Stack Filter Classifiers and it shows that the approach is interesting from both a theoretical and a practical perspective.

  17. Graphene field effect transistors with parylene gate dielectric

    Science.gov (United States)

    Sabri, S. S.; Lévesque, P. L.; Aguirre, C. M.; Guillemette, J.; Martel, R.; Szkopek, T.

    2009-12-01

    We report the fabrication and characterization of graphene field effect transistors with parylene back gate and exposed graphene top surface. A back gate stack of 168 nm parylene on 94 nm thermal silicon oxide permitted optical reflection microscopy to be used for identifying exfoliated graphene flakes. Room temperature mobilities of 10 000 cm2/Vs at 1012/cm2 electron/hole densities were observed in electrically contacted graphene. Parylene gated devices exhibited stable neutrality point gate voltage under ambient conditions and less hysteresis than that observed in graphene flakes directly exfoliated on silicon oxide.

  18. On Stack Reconstruction Problem

    Directory of Open Access Journals (Sweden)

    V. D. Аkeliev

    2009-01-01

    Full Text Available The paper describes analytical investigations that study relation of fuel combustion regimes with concentration values of sulphur anhydride in flue gases and acid dew point. Coefficients of convective heat transfer at internal and external surfaces of stacks have been determined in the paper. The paper reveals the possibility to reconstruct stacks while using gas discharging channel made of composite material on the basis of glass-reinforced plastic which permits to reduce thermo-stressed actions on reinforced concrete and increase volume of released gases due to practically two-fold reduction of gas-dynamic pressure losses along the pipe length.

  19. Learning SaltStack

    CERN Document Server

    Myers, Colton

    2015-01-01

    If you are a system administrator who manages multiple servers, then you know how difficult it is to keep your infrastructure in line. If you've been searching for an easier way, this book is for you. No prior experience with SaltStack is required.

  20. Wolfram technology stack

    CERN Multimedia

    2013-01-01

    Stephen Wolfram gives a personal account of his vision for the "Wolfram technology stack" and how it developed, starting with his work in particle physics. The talk was presented at the 2013 ROOT Users' Meeting and followed a talk, earlier in the day, on "Mathematica with ROOT".

  1. po_stack_movie

    DEFF Research Database (Denmark)

    2009-01-01

    po_stack® er et reolsystem, hvis enkle elementer giver stor flexibilitet, variation og skulpturel virkning. Elementerne stables og forskydes frit, så reolens rum kan vendes til begge sider, være åbne eller lukkede og farvekombineres ubegrænset. Reolen kan let ombygges, udvides eller opdeles, når ...

  2. Integration of atomic layer deposited high-k dielectrics on GaSb via hydrogen plasma exposure

    Directory of Open Access Journals (Sweden)

    Laura B. Ruppalt

    2014-12-01

    Full Text Available In this letter we report the efficacy of a hydrogen plasma pretreatment for integrating atomic layer deposited (ALD high-k dielectric stacks with device-quality p-type GaSb(001 epitaxial layers. Molecular beam eptiaxy-grown GaSb surfaces were subjected to a 30 minute H2/Ar plasma treatment and subsequently removed to air. High-k HfO2 and Al2O3/HfO2 bilayer insulating films were then deposited via ALD and samples were processed into standard metal-oxide-semiconductor (MOS capacitors. The quality of the semiconductor/dielectric interface was probed by current-voltage and variable-frequency admittance measurements. Measurement results indicate that the H2-plamsa pretreatment leads to a low density of interface states nearly independent of the deposited dielectric material, suggesting that pre-deposition H2-plasma exposure, coupled with ALD of high-k dielectrics, may provide an effective means for achieving high-quality GaSb MOS structures for advanced Sb-based digital and analog electronics.

  3. Solution-processed polymer-sorted semiconducting carbon nanotube network transistors with low-k /high-k bilayer polymer dielectrics

    Science.gov (United States)

    Lee, Seung-Hoon; Kim, Dong-Yu; Noh, Yong-Young

    2017-09-01

    Solution-processed semiconducting carbon nanotube transistors with a high mobility and an ON/OFF ratio are the most promising for use in flexible electronics. In this paper, we report low-k/high-k bilayer polymer dielectrics for solution-processed semiconducting single-walled carbon nanotube (s-SWNT) field-effect transistors (s-SWNT-FETs) with efficient charge transport and operation at low voltage. Thin low-k polystyrene (10 nm) is used for the first contact insulator with a channel in order to passivate the dipolar disorder induced by high-k insulators. The second gate insulator for low voltage operation is cyanoethyl pullulan (CEP), which is an environmentally friendly high-k insulator based on cellulose. Moreover, poly[(vinylidenefluoride-co-trifluoroethylene) is chosen as a single layer dielectric for comparison. A reasonably low operational voltage (insulator is of critical importance for efficient charge transport.

  4. OpenStack cloud security

    CERN Document Server

    Locati, Fabio Alessandro

    2015-01-01

    If you are an OpenStack administrator or developer, or wish to build solutions to protect your OpenStack environment, then this book is for you. Experience of Linux administration and familiarity with different OpenStack components is assumed.

  5. Energy Expenditure of Sport Stacking

    Science.gov (United States)

    Murray, Steven R.; Udermann, Brian E.; Reineke, David M.; Battista, Rebecca A.

    2009-01-01

    Sport stacking is an activity taught in many physical education programs. The activity, although very popular, has been studied minimally, and the energy expenditure for sport stacking is unknown. Therefore, the purposes of this study were to determine the energy expenditure of sport stacking in elementary school children and to compare that value…

  6. Mechanical Design of the NSTX High-k Scattering Diagnostic

    Energy Technology Data Exchange (ETDEWEB)

    Feder, R.; Mazzucato, E.; Munsat, T.; Park, H,; Smith, D. R.; Ellis, R.; Labik, G.; Priniski, C.

    2005-09-26

    The NSTX High-k Scattering Diagnostic measures small-scale density fluctuations by the heterodyne detection of waves scattered from a millimeter wave probe beam at 280 GHz and {lambda}=1.07 mm. To enable this measurement, major alterations were made to the NSTX vacuum vessel and Neutral Beam armor. Close collaboration between the PPPL physics and engineering staff resulted in a flexible system with steerable launch and detection optics that can position the scattering volume either near the magnetic axis ({rho} {approx} .1) or near the edge ({rho} {approx} .8). 150 feet of carefully aligned corrugated waveguide was installed for injection of the probe beam and collection of the scattered signal in to the detection electronics.

  7. High-k Scattering and FIReTIP Diagnostic Upgrades for NSTX-U

    Science.gov (United States)

    Barchfeld, Robert; Scott, Evan; Domier, Calvin; Muscatello, Christopher; Riemenschneider, Paul; Sohrabi, Mohammad; Luhmann, Neville; Ren, Yang; Kaita, Robert

    2015-11-01

    A major upgrade to the High-k Scattering system is underway on NSTX-U, which is being transformed from a primarily toroidal detection geometry (for kr measurements) to a poloidal detection geometry (for kθ measurements) in which a probe beam is launched from Bay G and collected on Bay L. Combined with an increase in probing frequency to 693 GHz, the poloidal wavenumber sensitivity has been extended from kθ = 7 cm-1 up to 40 cm-1. The system will be installed and commissioned in 2016 with an initial 4-channel receiver, with plans to eventually upgrade to an 8x2 configuration, which can probe the plasma from the core out to the edge of the pedestal region. The Far Infrared Tangential Interferometer/Polarimeter (FIReTIP) system is being upgraded with field programmable gate array (FPGA) electronics to support real time feedback density control, and will be installed on Bay G this fall. Design and implementation details regarding both diagnostics will be presented. Work supported in part by U.S. DOE Grant DE-FG02-99ER54518 and DE-AC02-09CH1146.

  8. Electrically tunable terahertz metamaterials based on graphene stacks array

    Science.gov (United States)

    Liu, Hanqing; Liu, Peiguo; Bian, Li-an; Liu, Chenxi; Zhou, Qihui; Chen, Yuwei

    2017-12-01

    With the ability of tuning chemical potential via gate voltage, the permittivity of graphene stack can be dynamically adjusted over a wide range. In this paper, we design electrically tunable metamaterials based on the graphene/Al2O3 stacks array, which can achieve a good modulation of resonant frequency and peak value in terahertz region. Due to the enlargement of plasmonic resonance response and the broaden distribution of electric field, our proposed structures perform a better tunability compared with traditional metamaterials loaded monolayer graphene. Since the dipole-dipole coupling between adjacent stacks strengthens immensely as reduces the filling factor of array, the modulated capacity could be further improved. It is found that for oblique incidence, the transmission property is also sensitive to the chemical potential of graphene as well as the polarization direction of incident terahertz wave. These results could be very instructive for the potential applications in voltage-sensitive devices, tunable sensors and photovoltaic switches.

  9. Modeling of leakage currents in high-k dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Jegert, Gunther Christian

    2012-03-15

    Leakage currents are one of the major bottlenecks impeding the downscaling efforts of the semiconductor industry. Two core devices of integrated circuits, the transistor and, especially, the DRAM storage capacitor, suffer from the increasing loss currents. In this perspective a fundamental understanding of the physical origin of these leakage currents is highly desirable. However, the complexity of the involved transport phenomena so far has prevented the development of microscopic models. Instead, the analysis of transport through the ultra-thin layers of high-permittivity (high-k) dielectrics, which are employed as insulating layers, was carried out at an empirical level using simple compact models. Unfortunately, these offer only limited insight into the physics involved on the microscale. In this context the present work was initialized in order to establish a framework of microscopic physical models that allow a fundamental description of the transport processes relevant in high-k thin films. A simulation tool that makes use of kinetic Monte Carlo techniques was developed for this purpose embedding the above models in an environment that allows qualitative and quantitative analyses of the electronic transport in such films. Existing continuum approaches, which tend to conceal the important physics behind phenomenological fitting parameters, were replaced by three-dimensional transport simulations at the level of single charge carriers. Spatially localized phenomena, such as percolation of charge carriers across pointlike defects, being subject to structural relaxation processes, or electrode roughness effects, could be investigated in this simulation scheme. Stepwise a self-consistent, closed transport model for the TiN/ZrO{sub 2} material system, which is of outmost importance for the semiconductor industry, was developed. Based on this model viable strategies for the optimization of TiN/ZrO{sub 2}/TiN capacitor structures were suggested and problem areas

  10. Die-stacking architecture

    CERN Document Server

    Xie, Yuan

    2015-01-01

    The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the ""memory wall"" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to design

  11. Stacking of cold antiprotons

    CERN Document Server

    Gabrielse, G; Oxley, P; Speck, A K; Storry, C H; Tan, J N; Wessels, M; Grzonka, D; Oelert, W; Schepers, G; Sefzick, T; Walz, J; Pittner, H; Hänsch, T W; Hessels, E A

    2002-01-01

    The stacking of cold antiprotons is currently the only way to accumulate the large numbers of the cold antiprotons that are needed for low energy experiments. Both the largest possible number and the lowest possible temperature are desired, especially for the production and study of cold antihydrogen. The antiprotons accumulated in our particle trap have an energy 10/sup 10/ times lower than the energy of those delivered by CERN's Antiprotons Decelerator (AD). The number accumulated (more than 0.4 million in this demonstration) is linear in the number of accepted high energy antiproton pulses (32 in this demonstration). Accumulation efficiencies and losses are measured and discussed. (12 refs).

  12. Technology stacks and frameworks for full-stack application development

    OpenAIRE

    UŠAJ, ERIK

    2016-01-01

    This work aims providing a comprehensive overview and analysis of current JavaScript (JS) technology stacks and frameworks for full-stack application development: from web clients, mobile and desktop applications to server applications and cloud-connected services. Analysis shall focus on MEAN technology stack and frameworks such as Meteor which also tries to leverage mobile app development using Apache Cordova framework. We will include an overview of available JS build tools for desktop app...

  13. On the Evaluation of Gate Dielectrics for 4H-SiC Based Power MOSFETs

    Directory of Open Access Journals (Sweden)

    Muhammad Nawaz

    2015-01-01

    Full Text Available This work deals with the assessment of gate dielectric for 4H-SiC MOSFETs using technology based two-dimensional numerical computer simulations. Results are studied for variety of gate dielectric candidates with varying thicknesses using well-known Fowler-Nordheim tunneling model. Compared to conventional SiO2 as a gate dielectric for 4H-SiC MOSFETs, high-k gate dielectric such as HfO2 reduces significantly the amount of electric field in the gate dielectric with equal gate dielectric thickness and hence the overall gate current density. High-k gate dielectric further reduces the shift in the threshold voltage with varying dielectric thicknesses, thus leading to better process margin and stable device operating behavior. For fixed dielectric thickness, a total shift in the threshold voltage of about 2.5 V has been observed with increasing dielectric constant from SiO2 (k=3.9 to HfO2 (k=25. This further results in higher transconductance of the device with the increase of the dielectric constant from SiO2 to HfO2. Furthermore, 4H-SiC MOSFETs are found to be more sensitive to the shift in the threshold voltage with conventional SiO2 as gate dielectric than high-k dielectric with the presence of interface state charge density that is typically observed at the interface of dielectric and 4H-SiC MOS surface.

  14. Asymmetric Flexible Supercapacitor Stack

    Science.gov (United States)

    2008-01-01

    Electrical double layer supercapacitor is very significant in the field of electrical energy storage which can be the solution for the current revolution in the electronic devices like mobile phones, camera flashes which needs flexible and miniaturized energy storage device with all non-aqueous components. The multiwalled carbon nanotubes (MWNTs) have been synthesized by catalytic chemical vapor deposition technique over hydrogen decrepitated Mischmetal (Mm) based AB3alloy hydride. The polymer dispersed MWNTs have been obtained by insitu polymerization and the metal oxide/MWNTs were synthesized by sol-gel method. Morphological characterizations of polymer dispersed MWNTs have been carried out using scanning electron microscopy (SEM), transmission electron microscopy (TEM and HRTEM). An assymetric double supercapacitor stack has been fabricated using polymer/MWNTs and metal oxide/MWNTs coated over flexible carbon fabric as electrodes and nafion®membrane as a solid electrolyte. Electrochemical performance of the supercapacitor stack has been investigated using cyclic voltammetry, galvanostatic charge-discharge, and electrochemical impedance spectroscopy.

  15. Tensor deep stacking networks.

    Science.gov (United States)

    Hutchinson, Brian; Deng, Li; Yu, Dong

    2013-08-01

    A novel deep architecture, the tensor deep stacking network (T-DSN), is presented. The T-DSN consists of multiple, stacked blocks, where each block contains a bilinear mapping from two hidden layers to the output layer, using a weight tensor to incorporate higher order statistics of the hidden binary (½0; 1) features. A learning algorithm for the T-DSN’s weight matrices and tensors is developed and described in which the main parameter estimation burden is shifted to a convex subproblem with a closed-form solution. Using an efficient and scalable parallel implementation for CPU clusters, we train sets of T-DSNs in three popular tasks in increasing order of the data size: handwritten digit recognition using MNIST (60k), isolated state/phone classification and continuous phone recognition using TIMIT (1.1 m), and isolated phone classification using WSJ0 (5.2 m). Experimental results in all three tasks demonstrate the effectiveness of the T-DSN and the associated learning methods in a consistent manner. In particular, a sufficient depth of the T-DSN, a symmetry in the two hidden layers structure in each T-DSN block, our model parameter learning algorithm, and a softmax layer on top of T-DSN are shown to have all contributed to the low error rates observed in the experiments for all three tasks.

  16. Asymmetric Flexible Supercapacitor Stack

    Directory of Open Access Journals (Sweden)

    Leela Mohana Reddy A

    2008-01-01

    Full Text Available AbstractElectrical double layer supercapacitor is very significant in the field of electrical energy storage which can be the solution for the current revolution in the electronic devices like mobile phones, camera flashes which needs flexible and miniaturized energy storage device with all non-aqueous components. The multiwalled carbon nanotubes (MWNTs have been synthesized by catalytic chemical vapor deposition technique over hydrogen decrepitated Mischmetal (Mm based AB3alloy hydride. The polymer dispersed MWNTs have been obtained by insitu polymerization and the metal oxide/MWNTs were synthesized by sol-gel method. Morphological characterizations of polymer dispersed MWNTs have been carried out using scanning electron microscopy (SEM, transmission electron microscopy (TEM and HRTEM. An assymetric double supercapacitor stack has been fabricated using polymer/MWNTs and metal oxide/MWNTs coated over flexible carbon fabric as electrodes and nafion®membrane as a solid electrolyte. Electrochemical performance of the supercapacitor stack has been investigated using cyclic voltammetry, galvanostatic charge-discharge, and electrochemical impedance spectroscopy.

  17. 49 CFR 234.255 - Gate arm and gate mechanism.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Gate arm and gate mechanism. 234.255 Section 234... Maintenance, Inspection, and Testing Inspections and Tests § 234.255 Gate arm and gate mechanism. (a) Each gate arm and gate mechanism shall be inspected at least once each month. (b) Gate arm movement shall be...

  18. Materials Fundamentals of Gate Dielectrics

    CERN Document Server

    Demkov, Alexander A

    2006-01-01

    This book presents materials fundamentals of novel gate dielectrics that are being introduced into semiconductor manufacturing to ensure the continuous scalling of the CMOS devices. This is a very fast evolving field of research so we choose to focus on the basic understanding of the structure, thermodunamics, and electronic properties of these materials that determine their performance in device applications. Most of these materials are transition metal oxides. Ironically, the d-orbitals responsible for the high dielectric constant cause sever integration difficulties thus intrinsically limiting high-k dielectrics. Though new in the electronics industry many of these materials are wel known in the field of ceramics, and we describe this unique connection. The complexity of the structure-property relations in TM oxides makes the use of the state of the art first-principles calculations necessary. Several chapters give a detailed description of the modern theory of polarization, and heterojunction band discont...

  19. Investigation of Dependence between Time-zero and Time-dependent Variability in High-k NMOS Transistors

    CERN Document Server

    Hassan, Mohammad Khaled

    2016-01-01

    Bias Temperature Instability (BTI) is a major reliability concern in CMOS technology, especially with High dielectric constant (High-\\k{appa}/HK) metal gate (MG) transistors. In addition, the time independent process induced variation has also increased because of the aggressive scaling down of devices. As a result, the faster devices at the lower threshold voltage distribution tail experience higher stress, leading to additional skewness in the BTI degradation. Since time dependent dielectric breakdown (TDDB) and stress-induced leakage current (SILC) in NMOS devices are correlated to BTI, it is necessary to investigate the effect of time zero variability on all these effects simultaneously. To that effect, we propose a simulation framework to model and analyze the impact of time-zero variability (in particular, random dopant fluctuations) on different aging effects. For small area devices (~1000 nm2) in 30nm technology, we observe significant effect of Random Dopant Fluctuation (RDF) on BTI induced variabili...

  20. The LSST Software Stack

    Science.gov (United States)

    Jenness, Timothy; LSST Data Management Team

    2016-01-01

    The Large Synoptic Survey Telescope (LSST) is an 8-m optical ground-based telescope being constructed on Cerro Pachon in Chile. LSST will survey half the sky every few nights in six optical bands. The data will be transferred to the data center in North America and within 60 seconds it will be reduced using difference imaging and an alert list be generated for the community. Additionally, annual data releases will be constructed from all the data during the 10-year mission, producing catalogs and deep co-added images with unprecedented time resolution for such a large region of sky. In the paper we present the current status of the LSST stack including the data processing components, Qserv database and data visualization software, describe how to obtain it, and provide a summary of the development road map.

  1. Instant BlueStacks

    CERN Document Server

    Judge, Gary

    2013-01-01

    Get to grips with a new technology, understand what it is and what it can do for you, and then get to work with the most important features and tasks. A fast-paced, example-based approach guide for learning BlueStacks.This book is for anyone with a Mac or PC who wants to run Android apps on their computer. Whether you want to play games that are freely available for Android but not your computer, or you want to try apps before you install them on a physical device or use it as a development tool, this book will show you how. No previous experience is needed as this is written in plain English

  2. Low-voltage Organic Thin Film Transistors (OTFTs) with Solution-processed High-k Dielectric cum Interface Engineering

    Science.gov (United States)

    Su, Yaorong

    Although impressive progress has been made in improving the performance of organic thin film transistors (OTFTs), the high operation voltage resulting from the low gate areal capacitance of traditional SiO 2 remains a severe limitation that hinders OTFTs' development in practical applications. In this regard, developing new materials with high- k characteristics at low cost is of great scientific and technological importance in the area of both academia and industry. In this thesis, we first describe a simple solution-based method to fabricate a high-k bilayer Al2Oy/TiOx (ATO) dielectric system at low temperature. Then the dielectric properties of the ATO are characterized and discussed in detail. Furthermore, by employing the high-k ATO as gate dielectric, low-voltage copper phthalocyanine (CuPc) based OTFTs are successfully developed. Interestingly, the obtained low-voltage CuPc TFT exhibits outstanding electrical performance, which is even higher than the device fabricated on traditional low-k SiO2. The above results seem to be contradictory to the reported results due to the fact that high-k usually shows adverse effect on the device performance. This abnormal phenomenon is then studied in detail. Characterization on the initial growth shows that the CuPc molecules assemble in a "rod-like" nano crystal with interconnected network on ATO, which probably promotes the charge carrier transport, whereas, they form isolated small islands with amorphous structure on SiO2. In addition, a better metal/organic contact is observed on ATO, which benefits the charge carrier injection. Our studies suggest that the low-temperature, solution-processed high-k ATO is a promising candidate for fabrication of high-performance, low-voltage OTFTs. Furthermore, it is well known that the properties of the dielectric/semiconductor and electrode/semiconductor interfaces are crucial in controlling the electrical properties of OTFTs. Hence, investigation the effects of interfaces

  3. Work Function Tuning in Sub-20nm Titanium Nitride (TiN) Metal Gate: Mechanism and Engineering

    KAUST Repository

    Hasan, Mehdi

    2011-07-01

    Scaling of transistors (the building blocks of modern information age) provides faster computation at the expense of excessive power dissipation. Thus to address these challenges, high-k/metal gate stack has been introduced in commercially available microprocessors from 2007. Since then titanium nitride (TiN) metal gate’s work function (Wf) tunability with its thickness (thickness increases, work function increases) is a well known phenomenon. Many hypotheses have been made over the years which include but not limited to: trap charge and metal gate nucleation, nitrogen concentration, microstructure agglomeration and global stress, metal oxide formation, and interfacial oxide thickness. However, clear contradictions exist in these assumptions. Also, nearly all these reports skipped a comprehensive approach to explain this complex paradigm. Therefore, in this work we first show a comprehensive physical investigation using transmission electron microcopy/electron energy loss spectroscopy (TEM/EELS), x-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS) to show replacement of oxygen by nitrogen in the metal/dielectric interface, formation of TiONx, reduction of Ti/N concentration and grain size increment happen with TiN thickness increment and thus may increase the work function. Then, using these finding, we experimentally show 100meV of work function modulation in 10nm TiN Metal-oxide-semiconductor capacitor by using low temperature oxygen annealing. A low thermal budget flow (replicating gate-last) shows similar work function boost up. Also, a work function modulation of 250meV has been possible using oxygen annealing and applying no thermal budget. On the other hand, etch-back of TiN layer can decrease the work function. Thus this study quantifies role of various factors in TiN work function tuning; it also reproduces the thickness varied TiN work function modulation in single thickness TiN thus reducing the

  4. Stacking order dependent electric field tuning of the band gap in graphene multilayers

    Science.gov (United States)

    Avetisyan, A. A.; Partoens, B.; Peeters, F. M.

    2010-03-01

    The effect of different stacking order of graphene multilayers on the electric field induced band gap is investigated. We considered a positively charged top and a negatively charged back gate in order to independently tune the band gap and the Fermi energy of three and four layer graphene systems. A tight-binding approach within a self-consistent Hartree approximation is used to calculate the induced charges on the different graphene layers. We found that the gap for trilayer graphene with the ABC stacking is much larger than the corresponding gap for the ABA trilayer. Also we predict that for four layers of graphene the energy gap strongly depends on the choice of stacking, and we found that the gap for the different types of stacking is much larger as compared to the case of Bernal stacking. Trigonal warping changes the size of the induced electronic gap by approximately 30% for intermediate and large values of the induced electron density.

  5. Towards low-voltage organic thin film transistors (OTFTs with solution-processed high-k dielectric and interface engineering

    Directory of Open Access Journals (Sweden)

    Yaorong Su

    2015-11-01

    Full Text Available Although impressive progress has been made in improving the performance of organic thin film transistors (OTFTs, the high operation voltage resulting from the low gate capacitance density of traditional SiO2 remains a severe limitation that hinders OTFTs'development in practical applications. In this regard, developing new materials with high-k characteristics at low cost is of great scientific and technological importance in the area of both academia and industry. Here, we introduce a simple solution-based technique to fabricate high-k metal oxide dielectric system (ATO at low-temperature, which can be used effectively to realize low-voltage operation of OTFTs. On the other hand, it is well known that the properties of the dielectric/semiconductor and electrode/semiconductor interfaces are crucial in controlling the electrical properties of OTFTs. By optimizing the above two interfaces with octadecylphosphonic acid (ODPA self-assembled monolayer (SAM and properly modified low-cost Cu, obviously improved device performance is attained in our low-voltage OTFTs. Further more, organic electronic devices on flexible substrates have attracted much attention due to their low-cost, rollability, large-area processability, and so on. Basing on the above results, outstanding electrical performance is achieved in flexible devices. Our studies demonstrate an effective way to realize low-voltage, high-performance OTFTs at low-cost.

  6. HPC Software Stack Testing Framework

    Energy Technology Data Exchange (ETDEWEB)

    2017-07-27

    The HPC Software stack testing framework (hpcswtest) is used in the INL Scientific Computing Department to test the basic sanity and integrity of the HPC Software stack (Compilers, MPI, Numerical libraries and Applications) and to quickly discover hard failures, and as a by-product it will indirectly check the HPC infrastructure (network, PBS and licensing servers).

  7. From surface to volume plasmons in hyperbolic metamaterials: General existence conditions for bulk high-k waves in metal-dielectric and graphene-dielectric multilayers

    DEFF Research Database (Denmark)

    Zhukovsky, Sergei; Andryieuski, Andrei; Sipe, John E.

    2014-01-01

    -dielectric and recently introduced graphene-dielectric stacks. We confirm that short-range surface plasmons in thin metal layers can give rise to hyperbolic metamaterial properties and demonstrate that long-range surface plasmons cannot. We also show that graphene-dielectric multilayers tend to support high- k waves...... and explore the range of parameteres for which this is possible, confirming the prospects of using graphene for materials with hyperbolic dispersion. The approach is applicable to a large variety of structures, such as continuous or structured microwave, terahertz, and optical metamaterials.......We theoretically investigate general existence conditions for broadband bulk large-wave-vector (high- k ) propagating waves (such as volume plasmon polaritons in hyperbolic metamaterials) in subwavelength periodic multilayer structures. Describing the elementary excitation in the unit cell...

  8. Improved Gate Dielectric Deposition and Enhanced Electrical Stability for Single-Layer MoS2 MOSFET with an AlN Interfacial Layer.

    Science.gov (United States)

    Qian, Qingkai; Li, Baikui; Hua, Mengyuan; Zhang, Zhaofu; Lan, Feifei; Xu, Yongkuan; Yan, Ruyue; Chen, Kevin J

    2016-06-09

    Transistors based on MoS2 and other TMDs have been widely studied. The dangling-bond free surface of MoS2 has made the deposition of high-quality high-k dielectrics on MoS2 a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS2/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS2 metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS2 transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al2O3 on the dangling-bond free MoS2, but also greatly enhances the electrical stability of the MoS2 transistors. Very small hysteresis (ΔVth) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS2 transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al2O3 dielectric stack.

  9. Digital Microfluidic Logic Gates

    Science.gov (United States)

    Zhao, Yang; Xu, Tao; Chakrabarty, Krishnendu

    Microfluidic computing is an emerging application for microfluidics technology. We propose microfluidic logic gates based on digital microfluidics. Using the principle of electrowetting-on-dielectric, AND, OR, NOT and XOR gates are implemented through basic droplet-handling operations such as transporting, merging and splitting. The same input-output interpretation enables the cascading of gates to create nontrivial computing systems. We present a potential application for microfluidic logic gates by implementing microfluidic logic operations for on-chip HIV test.

  10. Stack Caching Using Split Data Caches

    DEFF Research Database (Denmark)

    Nielsen, Carsten; Schoeberl, Martin

    2015-01-01

    In most embedded and general purpose architectures, stack data and non-stack data is cached together, meaning that writing to or loading from the stack may expel non-stack data from the data cache. Manipulation of the stack has a different memory access pattern than that of non-stack data, showing...... higher temporal and spatial locality. We propose caching stack and non-stack data separately and develop four different stack caches that allow this separation without requiring compiler support. These are the simple, window, and prefilling with and without tag stack caches. The performance of the stack...... cache architectures was evaluated using the Simple Scalar toolset where the window and prefilling stack cache without tag resulted in an execution speedup of up to 3.5% for the MiBench benchmarks, executed on an out-of-order processor with the ARM instruction set....

  11. Dynamic protocol stack composition: protocol independent addressing

    OpenAIRE

    Michiels, Sam; Mahieu, Tom; Matthijs, Frank; Verbaeten, Pierre

    2001-01-01

    This paper presents a generic addressing framework (GAF) which enables the development of protocol stack independent applications. This framework has been developed in the context of dynamic protocol stack composition. Having a way to compose and build protocol stacks is not sufficient. The protocol layers a stack is composed of have an impact on the addressing used inside the stack. Since addresses are used by applications, the impact of modifying the stack dynamically is not automaticall...

  12. Nano-CMOS gate dielectric engineering

    CERN Document Server

    Wong, Hei

    2011-01-01

    According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the gate dielectric thickness will be shrunk to less than half-nanometer oxide equivalent thickness (EOT) to maintain proper operation of the transistors, leaving high-k materials as the only viable solution for such small-scale EOT. This comprehensive, up-to-date text covering the physics, materials, devic

  13. Remote N2 plasma treatment to deposit ultrathin high-k dielectric as tunneling contact layer for single-layer MoS2 MOSFET

    Science.gov (United States)

    Qian, Qingkai; Zhang, Zhaofu; Hua, Mengyuan; Wei, Jin; Lei, Jiacheng; Chen, Kevin J.

    2017-12-01

    Remote N2 plasma treatment is explored as a surface functionalization technique to deposit ultrathin high-k dielectric on single-layer MoS2. The ultrathin dielectric is used as a tunneling contact layer, which also serves as an interfacial layer below the gate region for fabricating top-gate MoS2 metal–oxide–semiconductor field-effect transistors (MOSFETs). The fabricated devices exhibited small hysteresis and mobility as high as 14 cm2·V‑1·s‑1. The contact resistance was significantly reduced, which resulted in the increase of drain current from 20 to 56 µA/µm. The contact resistance reduction can be attributed to the alleviated metal–MoS2 interface reaction and the preserved conductivity of MoS2 below the source/drain metal contact.

  14. Reduction of skin effect losses in double-level-T-gate structure

    Energy Technology Data Exchange (ETDEWEB)

    Mikulics, M., E-mail: m.mikulics@fz-juelich.de; Hardtdegen, H.; Arango, Y. C.; Adam, R.; Fox, A.; Grützmacher, D. [Peter Grünberg Institute (PGI-9), Forschungszentrum Jülich, D-52425 Jülich (Germany); Jülich-Aachen Research Alliance, JARA, Fundamentals of Future Information Technology, D-52425 Jülich (Germany); Gregušová, D.; Novák, J. [Institute of Electrical Engineering, Slovak Academy of Sciences, SK-84104 Bratislava (Slovakia); Stanček, S. [Department of Nuclear Physic and Technique, Slovak University of Technology, SK-81219 Bratislava (Slovakia); Kordoš, P. [Institute of Electronics and Photonics, Slovak University of Technology, SK-81219 Bratislava (Slovakia); Sofer, Z. [Department of Inorganic Chemistry, Institute of Chemical Technology, Technická 5, Prague 6 (Czech Republic); Juul, L.; Marso, M. [Faculté des Sciences, de la Technologie et de la Communication, Université du Luxembourg, L-1359 Luxembourg (Luxembourg)

    2014-12-08

    We developed a T-gate technology based on selective wet etching yielding 200 nm wide T-gate structures used for fabrication of High Electron Mobility Transistors (HEMT). Major advantages of our process are the use of only standard photolithographic process and the ability to generate T-gate stacks. A HEMT fabricated on AlGaN/GaN/sapphire with gate length L{sub g} = 200 nm and double-stacked T-gates exhibits 60 GHz cutoff frequency showing ten-fold improvement compared to 6 GHz for the same device with 2 μm gate length. HEMTs with a double-level-T-gate (DLTG) structure exhibit up to 35% improvement of f{sub max} value compared to a single T-gate device. This indicates a significant reduction of skin effect losses in DLTG structure compared to its standard T-gate counterpart. These results agree with the theoretical predictions.

  15. Optical Logic Gates

    Science.gov (United States)

    Du Fresne, E. R.; Dowler, W. L.

    1985-01-01

    Logic gates for light signals constructed from combinations of prisms, polarizing plates, and quarterwave plates. Optical logic gate performs elementary logic operation on light signals received along two optical fibers. Whether gate performs OR function or exclusive-OR function depends on orientation of analyzer. Nonbinary truth tables also obtained by rotating polarizer or analyzer to other positions or inserting other quarter-wave plates.

  16. Glassy carbon based supercapacitor stacks

    Energy Technology Data Exchange (ETDEWEB)

    Baertsch, M.; Braun, A.; Koetz, R.; Haas, O. [Paul Scherrer Inst. (PSI), Villigen (Switzerland)

    1997-06-01

    Considerable effort is being made to develop electrochemical double layer capacitors (EDLC) that store relatively large quantities of electrical energy and possess at the same time a high power density. Our previous work has shown that glassy carbon is suitable as a material for capacitor electrodes concerning low resistance and high capacity requirements. We present the development of bipolar electrochemical glassy carbon capacitor stacks of up to 3 V. Bipolar stacks are an efficient way to meet the high voltage and high power density requirements for traction applications. Impedance and cyclic voltammogram measurements are reported here and show the frequency response of a 1, 2, and 3 V stack. (author) 3 figs., 1 ref..

  17. Multiple Segmentation of Image Stacks

    DEFF Research Database (Denmark)

    Smets, Jonathan; Jaeger, Manfred

    2014-01-01

    We propose a method for the simultaneous construction of multiple image segmentations by combining a recently proposed “convolution of mixtures of Gaussians” model with a multi-layer hidden Markov random field structure. The resulting method constructs for a single image several, alternative...... segmentations that capture different structural elements of the image. We also apply the method to collections of images with identical pixel dimensions, which we call image stacks. Here it turns out that the method is able to both identify groups of similar images in the stack, and to provide segmentations...

  18. Simulating Small-Scale Object Stacking Using Stack Stability

    DEFF Research Database (Denmark)

    Kronborg Thomsen, Kasper; Kraus, Martin

    2015-01-01

    This paper presents an extension system to a closed-source, real-time physics engine for improving structured stacking behavior with small-scale objects such as wooden toy bricks. The proposed system was implemented and evaluated. The tests showed that the system is able to simulate several common...

  19. Pressurized electrolysis stack with thermal expansion capability

    Science.gov (United States)

    Bourgeois, Richard Scott

    2015-07-14

    The present techniques provide systems and methods for mounting an electrolyzer stack in an outer shell so as to allow for differential thermal expansion of the electrolyzer stack and shell. Generally, an electrolyzer stack may be formed from a material with a high coefficient of thermal expansion, while the shell may be formed from a material having a lower coefficient of thermal expansion. The differences between the coefficients of thermal expansion may lead to damage to the electrolyzer stack as the shell may restrain the thermal expansion of the electrolyzer stack. To allow for the differences in thermal expansion, the electrolyzer stack may be mounted within the shell leaving a space between the electrolyzer stack and shell. The space between the electrolyzer stack and the shell may be filled with a non-conductive fluid to further equalize pressure inside and outside of the electrolyzer stack.

  20. Gates Speaks to Librarians.

    Science.gov (United States)

    St. Lifer, Evan

    1997-01-01

    In an interview, Microsoft CEO Bill Gates answers questions about the Gates Library Foundation; Libraries Online; tax-support for libraries; comparisons to Andrew Carnegie; charges of "buying" the library market; Internet filters, policies, and government censorship; the future of the World Wide Web and the role of librarians in its…

  1. Adding large EM stack support

    KAUST Repository

    Holst, Glendon

    2016-12-01

    Serial section electron microscopy (SSEM) image stacks generated using high throughput microscopy techniques are an integral tool for investigating brain connectivity and cell morphology. FIB or 3View scanning electron microscopes easily generate gigabytes of data. In order to produce analyzable 3D dataset from the imaged volumes, efficient and reliable image segmentation is crucial. Classical manual approaches to segmentation are time consuming and labour intensive. Semiautomatic seeded watershed segmentation algorithms, such as those implemented by ilastik image processing software, are a very powerful alternative, substantially speeding up segmentation times. We have used ilastik effectively for small EM stacks – on a laptop, no less; however, ilastik was unable to carve the large EM stacks we needed to segment because its memory requirements grew too large – even for the biggest workstations we had available. For this reason, we refactored the carving module of ilastik to scale it up to large EM stacks on large workstations, and tested its efficiency. We modified the carving module, building on existing blockwise processing functionality to process data in manageable chunks that can fit within RAM (main memory). We review this refactoring work, highlighting the software architecture, design choices, modifications, and issues encountered.

  2. Open stack thermal battery tests

    Energy Technology Data Exchange (ETDEWEB)

    Long, Kevin N. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Roberts, Christine C. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Grillet, Anne M. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Headley, Alexander J. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Fenton, Kyle [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Wong, Dennis [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Ingersoll, David [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2017-04-17

    We present selected results from a series of Open Stack thermal battery tests performed in FY14 and FY15 and discuss our findings. These tests were meant to provide validation data for the comprehensive thermal battery simulation tools currently under development in Sierra/Aria under known conditions compared with as-manufactured batteries. We are able to satisfy this original objective in the present study for some test conditions. Measurements from each test include: nominal stack pressure (axial stress) vs. time in the cold state and during battery ignition, battery voltage vs. time against a prescribed current draw with periodic pulses, and images transverse to the battery axis from which cell displacements are computed. Six battery configurations were evaluated: 3, 5, and 10 cell stacks sandwiched between 4 layers of the materials used for axial thermal insulation, either Fiberfrax Board or MinK. In addition to the results from 3, 5, and 10 cell stacks with either in-line Fiberfrax Board or MinK insulation, a series of cell-free “control” tests were performed that show the inherent settling and stress relaxation based on the interaction between the insulation and heat pellets alone.

  3. Multilayer Piezoelectric Stack Actuator Characterization

    Science.gov (United States)

    Sherrit, Stewart; Jones, Christopher M.; Aldrich, Jack B.; Blodget, Chad; Bao, Xioaqi; Badescu, Mircea; Bar-Cohen, Yoseph

    2008-01-01

    Future NASA missions are increasingly seeking to use actuators for precision positioning to accuracies of the order of fractions of a nanometer. For this purpose, multilayer piezoelectric stacks are being considered as actuators for driving these precision mechanisms. In this study, sets of commercial PZT stacks were tested in various AC and DC conditions at both nominal and extreme temperatures and voltages. AC signal testing included impedance, capacitance and dielectric loss factor of each actuator as a function of the small-signal driving sinusoidal frequency, and the ambient temperature. DC signal testing includes leakage current and displacement as a function of the applied DC voltage. The applied DC voltage was increased to over eight times the manufacturers' specifications to investigate the correlation between leakage current and breakdown voltage. Resonance characterization as a function of temperature was done over a temperature range of -180C to +200C which generally exceeded the manufacturers' specifications. In order to study the lifetime performance of these stacks, five actuators from one manufacturer were driven by a 60volt, 2 kHz sine-wave for ten billion cycles. The tests were performed using a Lab-View controlled automated data acquisition system that monitored the waveform of the stack electrical current and voltage. The measurements included the displacement, impedance, capacitance and leakage current and the analysis of the experimental results will be presented.

  4. Is a Successful High-K Fitness Strategy Associated with Better Mental Health?

    Directory of Open Access Journals (Sweden)

    Cezar Giosan

    2009-01-01

    Full Text Available This study examined the associations between a high-K fitness strategy and mental health. These associations were tested on a sample of 1400 disaster workers who had exposure to a singular traumatic event and who underwent psychological evaluations. The results showed that high-K was an important negative predictor of psychopathology, accounting for significant variance in PTSD, general psychopathology, functional disability, anger, and sleep disturbances. Implications of the results are discussed.

  5. Hole mobility modulation of solution-processed nickel oxide thin-film transistor based on high-k dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Ao; Liu, Guoxia, E-mail: gxliu@qdu.edu.cn, E-mail: fukaishan@yahoo.com; Zhu, Huihui; Shan, Fukai, E-mail: gxliu@qdu.edu.cn, E-mail: fukaishan@yahoo.com [College of Physics, Qingdao University, Qingdao 266071 (China); College of Electronics and Information Engineering, Qingdao University, Qingdao 266071 (China); Lab of New Fiber Materials and Modern Textile, Growing Base for State Key Laboratory, Qingdao University, Qingdao 266071 (China); Shin, Byoungchul [Electronic Ceramics Center, DongEui University, Busan 614-714 (Korea, Republic of); Fortunato, Elvira; Martins, Rodrigo [Department of Materials Science/CENIMAT-I3N, Faculty of Sciences and Technology, New University of Lisbon and CEMOP-UNINOVA, Campus de Caparica, 2829-516 Caparica (Portugal)

    2016-06-06

    Solution-processed p-type oxide semiconductors have recently attracted increasing interests for the applications in low-cost optoelectronic devices and low-power consumption complementary metal-oxide-semiconductor circuits. In this work, p-type nickel oxide (NiO{sub x}) thin films were prepared using low-temperature solution process and integrated as the channel layer in thin-film transistors (TFTs). The electrical properties of NiO{sub x} TFTs, together with the characteristics of NiO{sub x} thin films, were systematically investigated as a function of annealing temperature. By introducing aqueous high-k aluminum oxide (Al{sub 2}O{sub 3}) gate dielectric, the electrical performance of NiO{sub x} TFT was improved significantly compared with those based on SiO{sub 2} dielectric. Particularly, the hole mobility was found to be 60 times enhancement, quantitatively from 0.07 to 4.4 cm{sup 2}/V s, which is mainly beneficial from the high areal capacitance of the Al{sub 2}O{sub 3} dielectric and high-quality NiO{sub x}/Al{sub 2}O{sub 3} interface. This simple solution-based method for producing p-type oxide TFTs is promising for next-generation oxide-based electronic applications.

  6. The demonstration of promising Ge n-type multi-gate-field-effect transistors with the magnetic FePt metal gate scheme

    Science.gov (United States)

    Liao, M.-H.; Huang, S. C.

    2015-08-01

    In this work, the tetragonal-phase BaTiO3 high dielectric (HK) layer and the magnetic FePt metal gate (MG) film are proposed to be the gate stack scheme on the Ge three dimensional (3D) n-type multi-gate-field-effect transistors (FETs). The ˜75% dielectric constant (κ-value) improvement, ˜100× gate leakage (Jg) reduction, and ˜70% on-state current (Ion) enhancement are achieved due to the colossal magneto-capacitance effect. The magnetic field from the magnetic FePt MG film couples and triggers more dipoles in the BaTiO3 HK layer and then results in the super gate stack characteristics. The promising transistor's performance (˜200 μA/μm on the device with the gate length Lch = 60 nm) on the high mobility (Ge) material in the 3D n-type multi-gate-FETs device structure demonstrated in this work provides the useful solution for the future advanced logic device design.

  7. 49 CFR 178.980 - Stacking test.

    Science.gov (United States)

    2010-10-01

    ... the qualification of all Large Packagings design types intended to be stacked. (b) Special preparation for the stacking test. (1) All Large Packagings except flexible Large Packaging design types must be... for 24 hours. (3) Rigid plastic Large Packagings which bear the stacking load must be subjected to the...

  8. Study of strained-Si p-channel MOSFETs with HfO2 gate dielectric

    Science.gov (United States)

    Pradhan, Diana; Das, Sanghamitra; Dash, Tara Prasanna

    2016-10-01

    In this work, the transconductance of strained-Si p-MOSFETs with high-K dielectric (HfO2) as gate oxide, has been presented through simulation using the TCAD tool Silvaco-ATLAS. The results have been compared with a SiO2/strained-Si p-MOSFET device. Peak transconductance enhancement factors of 2.97 and 2.73 has been obtained for strained-Si p-MOSFETs in comparison to bulk Si channel p-MOSFETs with SiO2 and high-K dielectric respectively. This behavior is in good agreement with the reported experimental results. The transconductance of the strained-Si device at low temperatures has also been simulated. As expected, the mobility and hence the transconductance increases at lower temperatures due to reduced phonon scattering. However, the enhancements with high-K gate dielectric is less as compared to that with SiO2.

  9. Reversible gates and circuits descriptions

    Science.gov (United States)

    Gracki, Krzystof

    2017-08-01

    This paper presents basic methods of reversible circuit description. To design reversible circuit a set of gates has to be chosen. Most popular libraries are composed of three types of gates so called CNT gates (Control, NOT and Toffoli). The gate indexing method presented in this paper is based on the CNT gates set. It introduces a uniform indexing of the gates used during synthesis process of reversible circuits. The paper is organized as follows. Section 1 recalls basic concepts of reversible logic. In Section 2 and 3 a graphical representation of the reversible gates and circuits is described. Section 4 describes proposed uniform NCT gates indexing. The presented gate indexing method provides gate numbering scheme independent of lines number of the designed circuit. The solution for a circuit consisting of smaller number of lines is a subset of solution for a larger circuit.

  10. Simulation of dual-gate SOI MOSFET with different dielectric layers

    Science.gov (United States)

    Yadav, Jyoti; Chaudhary, R.; Mukhiya, R.; Sharma, R.; Khanna, V. K.

    2016-04-01

    The paper presents the process design and simulation of silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG-MOSFET) stacked with different dielectric layers on the top of gate oxide. A detailed 2D process simulation of SOI-MOSFETs and its electrical characterization has been done using SILVACO® TCAD tool. A variation in transconductance was observed with different dielectric layers, AlN-gate MOSFET having the highest tranconductance value as compared to other three dielectric layers (SiO2, Si3N4 and Al2O3).

  11. Gate-Tunable Landau Level Filling and Spectroscopy in Coupled Massive and Massless Electron Systems.

    Science.gov (United States)

    Cheng, Bin; Wu, Yong; Wang, Peng; Pan, Cheng; Taniguchi, T; Watanabe, K; Bockrath, M

    2016-07-08

    We report transport studies on coupled massive and massless electron systems, realized using twisted monolayer-graphene-natural bilayer-graphene stacks. We incorporate the layers in a dual-gated transistor geometry enabling independently tuning their charge density and the perpendicular electric field. In a perpendicular magnetic field, we observe a distinct pattern of gate-tunable Landau level crossings. Screening and interlayer electron-electron interactions yield a nonlinear monolayer gate capacitance. Data analysis enables determination of the monolayer's Fermi velocity and the bilayer's effective mass. The mass obtained is larger than that expected for isolated bilayers, suggesting that the interlayer interactions renormalize the band structure.

  12. Advanced insulated gate bipolar transistor gate drive

    Science.gov (United States)

    Short, James Evans [Monongahela, PA; West, Shawn Michael [West Mifflin, PA; Fabean, Robert J [Donora, PA

    2009-08-04

    A gate drive for an insulated gate bipolar transistor (IGBT) includes a control and protection module coupled to a collector terminal of the IGBT, an optical communications module coupled to the control and protection module, a power supply module coupled to the control and protection module and an output power stage module with inputs coupled to the power supply module and the control and protection module, and outputs coupled to a gate terminal and an emitter terminal of the IGBT. The optical communications module is configured to send control signals to the control and protection module. The power supply module is configured to distribute inputted power to the control and protection module. The control and protection module outputs on/off, soft turn-off and/or soft turn-on signals to the output power stage module, which, in turn, supplies a current based on the signal(s) from the control and protection module for charging or discharging an input capacitance of the IGBT.

  13. A Time-predictable Stack Cache

    DEFF Research Database (Denmark)

    Abbaspourseyedi, Sahar; Brandner, Florian; Schoeberl, Martin

    2013-01-01

    Real-time systems need time-predictable architectures to support static worst-case execution time (WCET) analysis. One architectural feature, the data cache, is hard to analyze when different data areas (e.g., heap allocated and stack allocated data) share the same cache. This sharing leads to le...... of a cache for stack allocated data. Our port of the LLVM C++ compiler supports the management of the stack cache. The combination of stack cache instructions and the hardware implementation of the stack cache is a further step towards timepredictable architectures....

  14. High-K isomers as probes of octupole collectivity in heavy nuclei

    Energy Technology Data Exchange (ETDEWEB)

    Walker, P.M., E-mail: p.walker@surrey.ac.u [Department of Physics, University of Surrey, Guildford GU2 7XH (United Kingdom); Minkov, N. [Department of Physics, University of Surrey, Guildford GU2 7XH (United Kingdom); Institute of Nuclear Research and Nuclear Energy, Bulgarian Academy of Sciences, BG-1784 Sofia (Bulgaria)

    2010-11-01

    The influence of the octupole deformation on the structure of high-K isomeric states in the region of heavy even-even actinide nuclei is studied through a reflection asymmetric deformed shell model (DSM). Two-quasiparticle states with high-K values are constructed by taking into account the pairing effect through a DSM + BCS procedure with constant pairing interaction. The behaviour of two-quasiparticle energies and magnetic dipole moments of K{sup {pi}=}6{sup +}, 6{sup -} and 8{sup -} configurations, applicable to mass numbers in the range A=234-252, was examined over a wide range of quadrupole and octupole deformations. A pronounced sensitivity of the magnetic moments to the octupole deformation is found. The result suggests a possibly important role for high-K isomers in determining the degree of octupole deformation in heavy actinide nuclei.

  15. Lightweight Stacks of Direct Methanol Fuel Cells

    Science.gov (United States)

    Narayanan, Sekharipuram; Valdez, Thomas

    2004-01-01

    An improved design concept for direct methanol fuel cells makes it possible to construct fuel-cell stacks that can weigh as little as one-third as much as do conventional bipolar fuel-cell stacks of equal power. The structural-support components of the improved cells and stacks can be made of relatively inexpensive plastics. Moreover, in comparison with conventional bipolar fuel-cell stacks, the improved fuel-cell stacks can be assembled, disassembled, and diagnosed for malfunctions more easily. These improvements are expected to bring portable direct methanol fuel cells and stacks closer to commercialization. In a conventional bipolar fuel-cell stack, the cells are interspersed with bipolar plates (also called biplates), which are structural components that serve to interconnect the cells and distribute the reactants (methanol and air). The cells and biplates are sandwiched between metal end plates. Usually, the stack is held together under pressure by tie rods that clamp the end plates. The bipolar stack configuration offers the advantage of very low internal electrical resistance. However, when the power output of a stack is only a few watts, the very low internal resistance of a bipolar stack is not absolutely necessary for keeping the internal power loss acceptably low.

  16. Electrically tunable switching based on photonic-crystal waveguide loaded graphene stacks

    Science.gov (United States)

    Liu, Hanqing; Liu, Peiguo; Bian, Li-an; Liu, Chenxi; Zhou, Qihui; Dong, Yanfei

    2018-03-01

    Through applying gate voltage to tune the chemical potential of graphene, the relative permittivity of multilayer graphene/Al2O3 stack can be dynamically adjusted over a wide range. In this paper, we mainly design novel photonic-crystal waveguides based on graphene stacks including a side-coupled waveguide with two defect cavities as well as a two-channel multiport waveguide, and aim to modulate the propagation of incident light wave via controlling the permittivity of graphene stack. It is demonstrated according to simulations that tunable switching property can be achieved in our proposed structures, such as blue shift of resonant stopband, adjustable coupled-resonator-induced transparency, and tunability of output quantity. These results could be very instructive for the potential applications in high-density integrated optical devices, photoelectric transducer, and laser pulse limiters.

  17. Solid Oxide Fuel Cell Stack Diagnostics

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Barfod, Rasmus Gottrup

    . An operating stack is subject to compositional gradients in the gaseous reactant streams, and temperature gradients across each cell and across the stack, which complicates detailed analysis. Several experimental stacks from Topsoe Fuel Cell A/S were characterized using Electrochemical Impedance Spectroscopy...... and discussed in the following. Parallel acquisition using electrochemical impedance spectroscopy can be used to detect possible minor differences in the supply of gas to the individual cells, which is important when going to high fuel utilizations. The fuel flow distribution was determined and provides...... carried out on an experimental 14-cell SOFC stack at varying frequencies and fuel utilizations. The results illustrated that THD can be used to detect increasing non-linearities in the current-voltage characteristics of the stack when the stack suffers from fuel starvation by monitoring the stack sum...

  18. Voltage and oxide thickness dependent tunneling current density and tunnel resistivity model: Application to high-k material HfO2 based MOS devices

    Science.gov (United States)

    Maity, N. P.; Maity, Reshmi; Baishya, Srimanta

    2017-11-01

    In this paper presents a straightforward efficient investigation of tunneling current density for ultra thin oxide layer based metal-oxide-semiconductor (MOS) devices to realization the gate current as a function of applied potential and oxide thickness. Solutions to the Schrödinger's wave equation are evolved for the different potential energy regions of the MOS device considering appropriate effective mass for each region. For finding approximate mathematical solutions to linear differential equations using spatially changeable coefficients the Wentzel-Kramers-Brillouin (WKB) approximation technique is considered. A p-substrate based n-channel MOS device has been analyzed consisting of SiO2 material as the oxide dielectric along with high-k material HfO2. The tunnel resistivity is correspondingly assessed employing this tunneling current density model. Synopsys Technology Computer Aided Design (TCAD) tool results are employed to validate the analytical model. Tremendous agreements among the results are observed.

  19. Electrical Characterization of Postmetal Annealed Ultrathin TiN Gate Electrodes in Si MOS Capacitors

    Directory of Open Access Journals (Sweden)

    Z. N. Khan

    2016-01-01

    Full Text Available Focusing on sub-10 nm Silicon CMOS device fabrication technology, we have incorporated ultrathin TiN metal gate electrode in Hafnium Silicate (HfSiO based metal-oxide capacitors (MOSCAP with carefully chosen Atomic Layer Deposition (ALD process parameters. Gate element of the device has undergone a detailed postmetal annealed sequence ranging from 100°C to 1000°C. The applicability of ultrathin TiN on gate electrodes is established through current density versus voltage (J-V, resistance versus temperature (R-T, and permittivity versus temperature analysis. A higher process window starting from 600°C was intentionally chosen to understand the energy efficient behavior expected from ultrathin gate metallization and its unique physical state with shrinking thickness. The device characteristics in form of effective electronic mobility as a function of inverse charge density were also found better than those conventional gate stacks used for EOT scaling.

  20. Time-predictable Stack Caching

    DEFF Research Database (Denmark)

    Abbaspourseyedi, Sahar

    complicated and less imprecise. Time-predictable computer architectures provide solutions to this problem. As accesses to the data in caches are one source of timing unpredictability, devising methods for improving the timepredictability of caches are important. Stack data, with statically analyzable...... completely. Thus, in systems with hard deadlines the worst-case execution time (WCET) of the real-time software running on them needs to be bounded. Modern architectures use features such as pipelining and caches for improving the average performance. These features, however, make the WCET analysis more...

  1. Silicon nanowires with high-k hafnium oxide dielectrics for sensitive detection of small nucleic acid oligomers.

    Science.gov (United States)

    Dorvel, Brian R; Reddy, Bobby; Go, Jonghyun; Duarte Guevara, Carlos; Salm, Eric; Alam, Muhammad Ashraful; Bashir, Rashid

    2012-07-24

    Nanobiosensors based on silicon nanowire field effect transistors offer advantages of low cost, label-free detection, and potential for massive parallelization. As a result, these sensors have often been suggested as an attractive option for applications in point-of-care (POC) medical diagnostics. Unfortunately, a number of performance issues, such as gate leakage and current instability due to fluid contact, have prevented widespread adoption of the technology for routine use. High-k dielectrics, such as hafnium oxide (HfO(2)), have the known ability to address these challenges by passivating the exposed surfaces against destabilizing concerns of ion transport. With these fundamental stability issues addressed, a promising target for POC diagnostics and SiNWFETs has been small oligonucleotides, more specifically, microRNA (miRNA). MicroRNAs are small RNA oligonucleotides which bind to mRNAs, causing translational repression of proteins, gene silencing, and expressions are typically altered in several forms of cancer. In this paper, we describe a process for fabricating stable HfO(2) dielectric-based silicon nanowires for biosensing applications. Here we demonstrate sensing of single-stranded DNA analogues to their microRNA cousins using miR-10b and miR-21 as templates, both known to be upregulated in breast cancer. We characterize the effect of surface functionalization on device performance using the miR-10b DNA analogue as the target sequence and different molecular weight poly-l-lysine as the functionalization layer. By optimizing the surface functionalization and fabrication protocol, we were able to achieve <100 fM detection levels of the miR-10b DNA analogue, with a theoretical limit of detection of 1 fM. Moreover, the noncomplementary DNA target strand, based on miR-21, showed very little response, indicating a highly sensitive and highly selective biosensing platform.

  2. Vertically stacked nanocellulose tactile sensor.

    Science.gov (United States)

    Jung, Minhyun; Kim, Kyungkwan; Kim, Bumjin; Lee, Kwang-Jae; Kang, Jae-Wook; Jeon, Sanghun

    2017-11-16

    Paper-based electronic devices are attracting considerable attention, because the paper platform has unique attributes such as flexibility and eco-friendliness. Here we report on what is claimed to be the firstly fully integrated vertically-stacked nanocellulose-based tactile sensor, which is capable of simultaneously sensing temperature and pressure. The pressure and temperature sensors are operated using different principles and are stacked vertically, thereby minimizing the interference effect. For the pressure sensor, which utilizes the piezoresistance principle under pressure, the conducting electrode was inkjet printed on the TEMPO-oxidized-nanocellulose patterned with micro-sized pyramids, and the counter electrode was placed on the nanocellulose film. The pressure sensor has a high sensitivity over a wide range (500 Pa-3 kPa) and a high durability of 10(4) loading/unloading cycles. The temperature sensor combines various materials such as poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT:PSS), silver nanoparticles (AgNPs) and carbon nanotubes (CNTs) to form a thermocouple on the upper nanocellulose layer. The thermoelectric-based temperature sensors generate a thermoelectric voltage output of 1.7 mV for a temperature difference of 125 K. Our 5 × 5 tactile sensor arrays show a fast response, negligible interference, and durable sensing performance.

  3. Physics, fabrication and characterization of III-V multi-gate FETs for low power electronics

    Science.gov (United States)

    Thathachary, Arun V.

    With transistor technology close to its limits for power constrained scaling and the simultaneous emergence of mobile devices as the dominant driver for new scaling, a pathway to significant reduction in transistor operating voltage to 0.5V or lower is urgently sought. This however implies a fundamental paradigm shift away from mature Silicon technology. III-V compound semiconductors hold great promise in this regard due to their vastly superior electron transport properties making them prime candidates to replace Silicon in the n-channel transistor. Among the plethora of binary and ternary compounds available in the III-V space, InxGa1-xAs alloys have attracted significant interest due to their excellent electron mobility, ideally placed bandgap and mature growth technology. Simultaneously, electrostatic control mandates multigate transistor designs such as the FinFET at extremely scaled nodes. This dissertation describes the experimental realization of III-V FinFETs incorporating InXGa1-XAs heterostructure channels for high performance, low power logic applications. The chapters that follow present experimental demonstrations, simulations and analysis on the following aspects (a) motivation and key figures of merit driving material selection and design; (b) dielectric integration schemes for high-k metal-gate stack (HKMG) realization on InXGa 1-XAs, including surface clean and passivation techniques developed for high quality interfaces; (c) novel techniques for transport (mobility) characterization in nanoscale multi-gate FET architectures with experimental demonstration on In0.7Ga0.3As nanowires; (d) Indium composition and quantum confined channel design for InXGa 1-XAs FinFETs and (e) InAs heterostructure designs for high performance FinFETs. Each chapter also contains detailed benchmarking of results against state of the art demonstrations in Silicon and III-V material systems. The dissertation concludes by assessing the feasibility of InXGa 1-XAs Fin

  4. Generalized data stacking programming model with applications

    Directory of Open Access Journals (Sweden)

    Hala Samir Elhadidy

    2016-09-01

    Full Text Available Recent researches have shown that, everywhere in various sciences the systems are following stacked-based stored change behavior when subjected to events or varying environments “on and above” their normal situations. This paper presents a generalized data stack programming (GDSP model which is developed to describe the system changes under varying environment. These changes which are captured with different ways such as sensor reading are stored in matrices. Extraction algorithm and identification technique are proposed to extract the different layers between images and identify the stack class the object follows; respectively. The general multi-stacking network is presented including the interaction between various stack-based layering of some applications. The experiments prove that the concept of stack matrix gives average accuracy of 99.45%.

  5. X-band T/R switch with body-floating multi-gate PDSOI NMOS transistors

    Science.gov (United States)

    Park, Mingyo; Min, Byung-Wook

    2018-03-01

    This paper presents an X-band transmit/receive switch using multi-gate NMOS transistors in a silicon-on-insulator CMOS process. For low loss and high power handling capability, floating body multi-gate NMOS transistors are adopted instead of conventional stacked NMOS transistors, resulting in 53% reduction of transistor area. Comparing to the stacked NMOS transistors, the multi gate transistor shares the source and drain region between stacked transistors, resulting in reduced chip area and parasitics. The impedance between bodies of gates in multi-gate NMOS transistors is assumed to be very large during design and confirmed after measurement. The measured input 1 dB compression point is 34 dBm. The measured insertion losses of TX and RX modes are respectively 1.7 dB and 2.0 dB at 11 GHz, and the measured isolations of TX and RX modes are >27 dB and >20 dB in X-band, respectively. The chip size is 0.086 mm2 without pads, which is 25% smaller than the T/R switch with stacked transistors.

  6. California dreaming?[PEM stacks

    Energy Technology Data Exchange (ETDEWEB)

    Crosse, J.

    2002-06-01

    Hyundai's Santa Fe FCEV will be on sale by the end of 2002. Hyundai uses PEM stacks that are manufactured by International Fuel Cells (IFC), a division of United Technologies. Santa Fe is equipped with a 65 kW electric powertrain of Enova systems and Shell's new gasoline reformer called Hydrogen Source. Eugene Jang, Senior Engineer - Fuel Cell and Materials at Hyundai stated that the compressor related losses on IFC system are below 3%. The maximum speed offered by the vehicle is estimated as 123km/hr while the petrol equivalent fuel consumption is quoted between 5.6L/100 km and 4.8L/100 km. Santa Fe is a compact vehicle offering better steering response and a pleasant drive. (author)

  7. Stacks of SPS Dipole Magnets

    CERN Multimedia

    1974-01-01

    Stacks of SPS Dipole Magnets ready for installation in the tunnel. The SPS uses a separated function lattice with dipoles for bending and quadrupoles for focusing. The 6.2 m long normal conducting dipoles are of H-type with coils that are bent-up at the ends. There are two types, B1 (total of 360) and B2 (384). Both are for a maximum field of 1.8 Tesla and have the same outer dimensions (450x800 mm2 vxh) but with different gaps (B1: 39x129 mm2, B2: 52x92 mm2) tailored to the beam size. The yoke, made of 1.5 mm thick laminations, consists of an upper and a lower half joined together in the median plane once the coils have been inserted.

  8. Stanford, Duke, Rice,... and Gates?

    Science.gov (United States)

    Carey, Kevin

    2009-01-01

    This article presents an open letter to Bill Gates. In his letter, the author suggests that Bill Gates should build a brand-new university, a great 21st-century institution of higher learning. This university will be unlike anything the world has ever seen. He asks Bill Gates not to stop helping existing colleges create the higher-education system…

  9. High-K isomers in transactinide nuclei close to N = 162

    Energy Technology Data Exchange (ETDEWEB)

    Prassa, V., E-mail: vprassa@phy.hr; Nikšić, T.; Vretenar, D. [Physics Department, Faculty of science, University of Zagreb, 10000 Zagreb (Croatia); Lu, Bing-Nan [Institut fur Kernphysik, Institute for Advanced Simulation, and Jülich Center for Hadron Physics, Forschungszentrum Jülich, D-52425 Jülich (Germany); Ackermann, D. [GSI Helmholtzzentrum für Schwerionenforschung GmbH, Planckstrasse 1, 64291 Darmstadt (Germany)

    2015-10-15

    Transactinide nuclei around neutron number N = 162 display axially deformed equilibrium shapes, as shown in our previous analysis [1] of constrained mean-field energy surfaces and collective excitation spectra. In the present study we are particularly interested in the occurrence of high-K isomers in the axially deformed isotopes of Rf (Z = 104), Sg (Z = 106), Hs (Z = 108), and Ds (Z = 110), with neutron number N = 160 − 166 and the effect of the N=162 closure on the structure and distribution of two-quasiparticle (2qp) states. The evolution of high-K isomers is analysed in a self-consistent axially-symmetric relativistic Hartree-Bogoliubov calculation using the blocking approximation with time-reversal symmetry breaking.

  10. High-k Dielectric Passivation for GaN Diode with a Field Plate Termination

    Directory of Open Access Journals (Sweden)

    Michitaka Yoshino

    2016-03-01

    Full Text Available Vertical structured Gallium nitride (GaN p-n junction diodes with improved breakdown properties have been demonstrated using high-k dielectric passivation underneath the field plate. Simulation results at a reverse voltage of 1 kV showed that the maximum electric field near the mesa-etched p-n junction edges covered with film of dielectric constant k = 10 was reduced to 2.0 MV/cm from 3.0 MV/cm (SiO2 (k = 3.9. The diodes were fabricated using the high-k mixed oxide of SiO2 and CeO2 with k = 12.3. I–V characteristics of the diode with a field plate showed a breakdown voltage above 2 kV with an increased avalanche resistance. This means that the electric field reduces at the periphery of the mesa-etched p-n junction and is uniformly formed across the whole p-n junction. It is clear that high-k dielectric film passivation and filed plate termination are essential techniques for GaN power devices.

  11. 40 CFR 61.44 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.44 Section 61.44 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... Firing § 61.44 Stack sampling. (a) Sources subject to § 61.42(b) shall be continuously sampled, during...

  12. On the "stacking fault" in copper

    NARCIS (Netherlands)

    Fransens, J.R.; Pleiter, F

    2003-01-01

    The results of a perturbed gamma-gamma angular correlations experiment on In-111 implanted into a properly cut single crystal of copper show that the defect known in the literature as "stacking fault" is not a planar faulted loop but a stacking fault tetrahedron with a size of 10-50 Angstrom.

  13. Do Stack Traces Help Developers Fix Bugs?

    NARCIS (Netherlands)

    Schröter, A.; Bettenburg, N.; Premraj, R.

    2010-01-01

    A widely shared belief in the software engineering community is that stack traces are much sought after by developers to support them in debugging. But limited empirical evidence is available to confirm the value of stack traces to developers. In this paper, we seek to provide such evidence by

  14. 49 CFR 178.815 - Stacking test.

    Science.gov (United States)

    2010-10-01

    ...) Fiberboard, wooden and composite IBCs with outer packagings constructed of other than plastic materials must... ADMINISTRATION, DEPARTMENT OF TRANSPORTATION HAZARDOUS MATERIALS REGULATIONS SPECIFICATIONS FOR PACKAGINGS... qualification of all IBC design types intended to be stacked. (b) Special preparation for the stacking test. (1...

  15. Learning OpenStack networking (Neutron)

    CERN Document Server

    Denton, James

    2014-01-01

    If you are an OpenStack-based cloud operator with experience in OpenStack Compute and nova-network but are new to Neutron networking, then this book is for you. Some networking experience is recommended, and a physical network infrastructure is required to provide connectivity to instances and other network resources configured in the book.

  16. A Time-predictable Stack Cache

    DEFF Research Database (Denmark)

    Abbaspour, Sahar; Brandner, Florian; Schoeberl, Martin

    2013-01-01

    Real-time systems need time-predictable architectures to support static worst-case execution time (WCET) analysis. One architectural feature, the data cache, is hard to analyze when different data areas (e.g., heap allocated and stack allocated data) share the same cache. This sharing leads to less...... precise results of the cache analysis part of the WCET analysis. Splitting the data cache for different data areas enables composable data cache analysis. The WCET analysis tool can analyze the accesses to these different data areas independently. In this paper we present the design and implementation...... of a cache for stack allocated data. Our port of the LLVM C++ compiler supports the management of the stack cache. The combination of stack cache instructions and the hardware implementation of the stack cache is a further step towards timepredictable architectures....

  17. Status of MCFC stack technology at IHI

    Energy Technology Data Exchange (ETDEWEB)

    Hosaka, M.; Morita, T.; Matsuyama, T.; Otsubo, M. [Ishikawajima-Harima Heavy Industries Co., Ltd., Tokyo (Japan)

    1996-12-31

    The molten carbonate fuel cell (MCFC) is a promising option for highly efficient power generation possible to enlarge. IHI has been studying parallel flow MCFC stacks with internal manifolds that have a large electrode area of 1m{sup 2}. IHI will make two 250 kW stacks for MW plant, and has begun to make cell components for the plant. To improve the stability of stack, soft corrugated plate used in the separator has been developed, and a way of gathering current from stacks has been studied. The DC output potential of the plant being very high, the design of electric insulation will be very important. A 20 kW short stack test was conducted in 1995 FY to certificate some of the improvements and components of the MW plant. These activities are presented below.

  18. Modular fuel-cell stack assembly

    Science.gov (United States)

    Patel, Pinakin

    2010-07-13

    A fuel cell assembly having a plurality of fuel cells arranged in a stack. An end plate assembly abuts the fuel cell at an end of said stack. The end plate assembly has an inlet area adapted to receive an exhaust gas from the stack, an outlet area and a passage connecting the inlet area and outlet area and adapted to carry the exhaust gas received at the inlet area from the inlet area to the outlet area. A further end plate assembly abuts the fuel cell at a further opposing end of the stack. The further end plate assembly has a further inlet area adapted to receive a further exhaust gas from the stack, a further outlet area and a further passage connecting the further inlet area and further outlet area and adapted to carry the further exhaust gas received at the further inlet area from the further inlet area to the further outlet area.

  19. Probing Temperature Inside Planar SOFC Short Stack, Modules, and Stack Series

    Science.gov (United States)

    Yu, Rong; Guan, Wanbing; Zhou, Xiao-Dong

    2017-02-01

    Probing temperature inside a solid oxide fuel cell (SOFC) stack lies at the heart of the development of high-performance and stable SOFC systems. In this article, we report our recent work on the direct measurements of the temperature in three types of SOFC systems: a 5-cell short stack, a 30-cell stack module, and a stack series consisting of two 30-cell stack modules. The dependence of temperature on the gas flow rate and current density was studied under a current sweep or steady-state operation. During the current sweep, the temperature inside the 5-cell stack decreased with increasing current, while it increased significantly at the bottom and top of the 30-cell stack. During a steady-state operation, the temperature of the 5-cell stack was stable while it was increased in the 30-cell stack. In the stack series, the maximum temperature gradient reached 190°C when the gas was not preheated. If the gas was preheated and the temperature gradient was reduced to 23°C in the stack series with the presence of a preheating gas and segmented temperature control, this resulted in a low degradation rate.

  20. Gate Last Indium-Gallium-Arsenide MOSFETs with Regrown Source-Drain Regions and ALD Dielectrics

    Science.gov (United States)

    Carter, Andrew Daniel

    III-V-based MOSFETs have the potential to exceed the performance of silicon-based MOSFETs due to the semiconductor's small electron effective mass. Modern silicon-based MOSFETs with 22 nm gate lengths utilize high-k gate insulators and non-planar device geometries to optimize device performance. III-V HEMT technology has achieved similar gate lengths, but large source-drain access resistances and the lack of high-quality gate insulators prevent further device performance scaling. Sub-22 nm gate length III-V MOSFETs require metal-semiconductor contact resistivity to be less than 1 ohm-micron squared, gate insulators with less than 1 nm effective oxide thickness, and semiconductor-insulator interface trap densities less than 2E12 per square centimeter per electron volt. This dissertation presents InGaAs-based III-V MOSFET process flows and device results to assess their use in VLSI circuits. Previous III-V MOSFET results focused on long (>100 nm) gate lengths and ion implantation for source-drain region formation. Scaling III-V MOSFETs to shorter gate lengths requires source-drain regions that have low sheet resistance, high mobile charge densities, and low metal-semiconductor contact resistance. MBE- and MOCVD-based raised epitaxial source-drain regrowth meet these requirements. MBE InAs source-drain regrowth samples have shown 0.5 to 2 ohm-micron squared metal semiconductor contact resistivities. MOCVD InGaAs source-drain regrowth samples have shown resistance to InGaAs MOSFETs. Gate insulators on III-V materials require large conduction band offsets to the channel, high dielectric permittivities, and low semiconductor-insulator interface trap densities. An in-situ hydrogen plasma / trimethylaluminum treatment has been developed to lower the gate semiconductor-insulator interface trap density. This treatment, done immediately before gate insulator deposition, has been shown to lower MOS capacitor interface trap densities by more than a factor of two. Devices using

  1. Noise Gating Solar Images

    Science.gov (United States)

    DeForest, Craig; Seaton, Daniel B.; Darnell, John A.

    2017-08-01

    I present and demonstrate a new, general purpose post-processing technique, "3D noise gating", that can reduce image noise by an order of magnitude or more without effective loss of spatial or temporal resolution in typical solar applications.Nearly all scientific images are, ultimately, limited by noise. Noise can be direct Poisson "shot noise" from photon counting effects, or introduced by other means such as detector read noise. Noise is typically represented as a random variable (perhaps with location- or image-dependent characteristics) that is sampled once per pixel or once per resolution element of an image sequence. Noise limits many aspects of image analysis, including photometry, spatiotemporal resolution, feature identification, morphology extraction, and background modeling and separation.Identifying and separating noise from image signal is difficult. The common practice of blurring in space and/or time works because most image "signal" is concentrated in the low Fourier components of an image, while noise is evenly distributed. Blurring in space and/or time attenuates the high spatial and temporal frequencies, reducing noise at the expense of also attenuating image detail. Noise-gating exploits the same property -- "coherence" -- that we use to identify features in images, to separate image features from noise.Processing image sequences through 3-D noise gating results in spectacular (more than 10x) improvements in signal-to-noise ratio, while not blurring bright, resolved features in either space or time. This improves most types of image analysis, including feature identification, time sequence extraction, absolute and relative photometry (including differential emission measure analysis), feature tracking, computer vision, correlation tracking, background modeling, cross-scale analysis, visual display/presentation, and image compression.I will introduce noise gating, describe the method, and show examples from several instruments (including SDO

  2. Hetero-gate-dielectric double gate junctionless transistor (HGJLT) with reduced band-to-band tunnelling effects in subthreshold regime

    Science.gov (United States)

    Ghosh, Bahniman; Mondal, Partha; Akram, M. W.; Bal, Punyasloka; Salimath, Akshay Kumar

    2014-06-01

    We propose a hetero-gate-dielectric double gate junctionless transistor (HGJLT), taking high-k gate insulator at source side and low-k gate insulator at drain side, which reduces the effects of band-to-band tunnelling (BTBT) in the sub-threshold region. A junctionless transistor (JLT) is turned off by the depletion of carriers in the highly doped thin channel (device layer) which results in a significant band overlap between the valence band of the channel region and the conduction band of the drain region, due to off-state drain bias, that triggers electrons to tunnel from the valence band of the channel region to the conduction band of the drain region leaving behind holes in the channel. These effects of band-to-band tunnelling increase the sub-threshold leakage current, and the accumulation of holes in the channel forms a parasitic bipolar junction transistor (n-p-n BJT for channel JLT) in the lateral direction by the source (emitter), channel (base) and drain (collector) regions in JLT structure in off-state. The proposed HGJLT reduces the subthreshold leakage current and suppresses the parasitic BJT action in off-state by reducing the band-to-band tunnelling probability.

  3. Dynamical stability of slip-stacking particles

    Energy Technology Data Exchange (ETDEWEB)

    Eldred, Jeffrey; Zwaska, Robert

    2014-09-01

    We study the stability of particles in slip-stacking configuration, used to nearly double proton beam intensity at Fermilab. We introduce universal area factors to calculate the available phase space area for any set of beam parameters without individual simulation. We find perturbative solutions for stable particle trajectories. We establish Booster beam quality requirements to achieve 97% slip-stacking efficiency. We show that slip-stacking dynamics directly correspond to the driven pendulum and to the system of two standing-wave traps moving with respect to each other.

  4. Vector Fields and Flows on Differentiable Stacks

    DEFF Research Database (Denmark)

    A. Hepworth, Richard

    2009-01-01

    and uniqueness of flows on a manifold as well as the author's existing results for orbifolds. It sets the scene for a discussion of Morse Theory on a general proper stack and also paves the way for the categorification of other key aspects of differential geometry such as the tangent bundle and the Lie algebra......This paper introduces the notions of vector field and flow on a general differentiable stack. Our main theorem states that the flow of a vector field on a compact proper differentiable stack exists and is unique up to a uniquely determined 2-cell. This extends the usual result on the existence...

  5. Tunable electro-optic filter stack

    Energy Technology Data Exchange (ETDEWEB)

    Fontecchio, Adam K.; Shriyan, Sameet K.; Bellingham, Alyssa

    2017-09-05

    A holographic polymer dispersed liquid crystal (HPDLC) tunable filter exhibits switching times of no more than 20 microseconds. The HPDLC tunable filter can be utilized in a variety of applications. An HPDLC tunable filter stack can be utilized in a hyperspectral imaging system capable of spectrally multiplexing hyperspectral imaging data acquired while the hyperspectral imaging system is airborne. HPDLC tunable filter stacks can be utilized in high speed switchable optical shielding systems, for example as a coating for a visor or an aircraft canopy. These HPDLC tunable filter stacks can be fabricated using a spin coating apparatus and associated fabrication methods.

  6. Impact of gate geometry on ionic liquid gated ionotronic systems

    Science.gov (United States)

    Wong, A. T.; Noh, J. H.; Pudasaini, P. R.; Wolf, B.; Balke, N.; Herklotz, A.; Sharma, Y.; Haglund, A. V.; Dai, S.; Mandrus, D.; Rack, P. D.; Ward, T. Z.

    2017-04-01

    Ionic liquid electrolytes are gaining widespread application as a gate dielectric used to control ion transport in functional materials. This letter systematically examines the important influence that device geometry in standard "side gate" 3-terminal geometries plays in device performance of a well-known oxygen ion conductor. We show that the most influential component of device design is the ratio between the area of the gate electrode and the active channel, while the spacing between these components and their individual shapes has a negligible contribution. These findings provide much needed guidance in device design intended for ionotronic gating with ionic liquids.

  7. 100-nm gate lithography for double-gate transistors

    Science.gov (United States)

    Krasnoperova, Azalia A.; Zhang, Ying; Babich, Inna V.; Treichler, John; Yoon, Jung H.; Guarini, Kathryn; Solomon, Paul M.

    2001-09-01

    The double gate field effect transistor (FET) is an exploratory device that promises certain performance advantages compared to traditional CMOS FETs. It can be scaled down further than the traditional devices because of the greater electrostatic control by the gates on the channel (about twice as short a channel length for the same gate oxide thickness), has steeper sub-threshold slope and about double the current for the same width. This paper presents lithographic results for double gate FET's developed at IBM's T. J. Watson Research Center. The device is built on bonded wafers with top and bottom gates self-aligned to each other. The channel is sandwiched between the top and bottom polysilicon gates and the gate length is defined using DUV lithography. An alternating phase shift mask was used to pattern gates with critical dimensions of 75 nm, 100 nm and 125 nm in photoresist. 50 nm gates in photoresist have also been patterned by 20% over-exposure of nominal 100 nm lines. No trim mask was needed because of a specific way the device was laid out. UV110 photoresist from Shipley on AR-3 antireflective layer were used. Process windows, developed and etched patterns are presented.

  8. Polymer electrolyte membrane fuel cell efficiency at the stack level

    OpenAIRE

    Piela, Piotr; Mitzel, Jens

    2015-01-01

    A redefinition of the fuel cell efficiency at the fuel cell stack level has been proposed for polymer electrolyte membrane fuel cells. The new definition takes into account not only the electrical efficiency of the stack but also the theoretical energy expenditures for bringing the stack feed streams to conditions required by the stack as well as the loss of fuel in the stack. A proposed general formula for the new stack efficiency has been adapted to three practical cases: the stationary com...

  9. Turing Impossibility Properties for Stack Machine Programming

    NARCIS (Netherlands)

    Bergstra, J.A.; Middelburg, C.A.

    2012-01-01

    The strong, intermediate, and weak Turing impossibility properties are introduced. Some facts concerning Turing impossibility for stack machine programming are trivially adapted from previous work. Several intriguing questions are raised about the Turing impossibility properties concerning different

  10. STACKING FAULT ENERGY IN HIGH MANGANESE ALLOYS

    Directory of Open Access Journals (Sweden)

    Eva Mazancová

    2009-04-01

    Full Text Available Stacking fault energy of high manganese alloys (marked as TWIP and TRIPLEX is an important parameter determining deformation mechanism type realized in above mentioned alloys. Stacking fault energy level can be asserted with a gliding of partial and/or full dislocations, b gliding mechanism and twinning deformation process in connection with increasing of fracture deformation level (deformation elongation and with increasing of simultaneously realized work hardening proces., c gliding mechanism and deformation induced e-martensite formation. In contribution calculated stacking fault energies are presented for various chemical compositions of high manganese alloys. Stacking fault energy dependences on manganese, carbon, iron and alluminium contents are presented. Results are confronted with some accessible papers.The aim of work is to deepen knowledge of presented data. The TWIP and TRIPLEX alloys can be held for promissing new automotive materials.

  11. Metal Organic Framework: Crystalline Stacked Molecular Containers

    Indian Academy of Sciences (India)

    Home; Journals; Resonance – Journal of Science Education; Volume 19; Issue 12. Metal Organic Framework: Crystalline Stacked Molecular Containers. Ramanathan Vaidhyanathan. General Article Volume 19 Issue 12 December 2014 pp 1147-1157 ...

  12. Characterization of Piezoelectric Stacks for Space Applications

    Science.gov (United States)

    Sherrit, Stewart; Jones, Christopher; Aldrich, Jack; Blodget, Chad; Bao, Xiaoqi; Badescu, Mircea; Bar-Cohen, Yoseph

    2008-01-01

    Future NASA missions are increasingly seeking to actuate mechanisms to precision levels in the nanometer range and below. Co-fired multilayer piezoelectric stacks offer the required actuation precision that is needed for such mechanisms. To obtain performance statistics and determine reliability for extended use, sets of commercial PZT stacks were tested in various AC and DC conditions at both nominal and high temperatures and voltages. In order to study the lifetime performance of these stacks, five actuators were driven sinusoidally for up to ten billion cycles. An automated data acquisition system was developed and implemented to monitor each stack's electrical current and voltage waveforms over the life of the test. As part of the monitoring tests, the displacement, impedance, capacitance and leakage current were measured to assess the operation degradation. This paper presents some of the results of this effort.

  13. The stack on software and sovereignty

    CERN Document Server

    Bratton, Benjamin H

    2016-01-01

    A comprehensive political and design theory of planetary-scale computation proposing that The Stack -- an accidental megastructure -- is both a technological apparatus and a model for a new geopolitical architecture.

  14. Stacking for Cosmic Magnetism with SKA Surveys

    OpenAIRE

    Stil, J. M.; Keller, B. W.

    2015-01-01

    Stacking polarized radio emission in SKA surveys provides statistical information on large samples that is not accessible otherwise due to limitations in sensitivity, source statistics in small fields, and averaging over frequency (including Faraday synthesis). Polarization is a special case because one obvious source of stacking targets is the Stokes I source catalog, possibly in combination with external catalogs, for example an SKA HI survey or a non-radio survey. We point out the signific...

  15. Generalized data stacking programming model with applications

    OpenAIRE

    Hala Samir Elhadidy; Rawya Yehia Rizk; Hassen Taher Dorrah

    2016-01-01

    Recent researches have shown that, everywhere in various sciences the systems are following stacked-based stored change behavior when subjected to events or varying environments “on and above” their normal situations. This paper presents a generalized data stack programming (GDSP) model which is developed to describe the system changes under varying environment. These changes which are captured with different ways such as sensor reading are stored in matrices. Extraction algorithm and identif...

  16. Virtual machine showdown: stack versus registers

    OpenAIRE

    Shi, Yunhe

    2007-01-01

    Virtual machines (VMs) enable the distribution of programs in an architecture-neutral format, which can easily be interpreted or compiled. The most popular VMs, such as the Java virtual machine (JVM), use a virtual stack architecture, rather than the register architecture that are most popular in real processors. A long-running question in the design of VMs is whether a stack architecture or register architecture can be implemented more efficiently with an interpreter. On the one hand, stac...

  17. Stability of stacking faults in tungsten

    Energy Technology Data Exchange (ETDEWEB)

    Dranova, Z.I.; Ksenofontov, V.A.; Kul' ko, V.B.; Mikhailovskii, I.M.

    1979-12-01

    The atomic configuration of planar lattice defects in tungsten was investigated by field-ion microscopy and thermal etching. Stable stacking faults were observed throughout the investigated temperature range 78--1700/sup 0/K. These faults were studied by field-ion microscopy and mathematical modeling methods. It was found that the existence of stacking faults in bcc crystals was not associated with the action of strong omnidirectional tensile stresses. The crystallographic characteristics of the faults were determined.

  18. Optical conductivity of ABA stacked graphene trilayer: mid-IR resonance due to band nesting.

    Science.gov (United States)

    Rashidian, Zeinab; Bludov, Yuliy V; Ribeiro, Ricardo M; Peres, N M R; Vasilevskiy, Mikhail I

    2014-10-01

    The band structure and the optical conductivity of an ABA (Bernal-type) stacked graphene trilayer are calculated. It is shown that, under appropriate doping, a strong resonant peak develops in the optical conductivity, located at the frequency corresponding to approximately 1.4 times the interlayer hopping energy and caused by the 'nesting' of two nearly parabolic bands in the electronic spectrum. The intensity of this resonant absorption can be controlled by adjusting the gate voltage. The effect is robust with respect to increasing temperature.

  19. Optical conductivity of ABA stacked graphene trilayer: mid-IR resonance due to band nesting

    Science.gov (United States)

    Rashidian, Zeinab; Bludov, Yuliy V.; Ribeiro, Ricardo M.; Peres, N. M. R.; Vasilevskiy, Mikhail I.

    2014-10-01

    The band structure and the optical conductivity of an ABA (Bernal-type) stacked graphene trilayer are calculated. It is shown that, under appropriate doping, a strong resonant peak develops in the optical conductivity, located at the frequency corresponding to approximately 1.4 times the interlayer hopping energy and caused by the ‘nesting’ of two nearly parabolic bands in the electronic spectrum. The intensity of this resonant absorption can be controlled by adjusting the gate voltage. The effect is robust with respect to increasing temperature.

  20. A novel nanoscaled Schottky barrier based transmission gate and its digital circuit applications

    Science.gov (United States)

    Kumar, Sunil; Loan, Sajad A.; Alamoud, Abdulrahman M.

    2017-04-01

    In this work we propose and simulate a compact nanoscaled transmission gate (TG) employing a single Schottky barrier based transistor in the transmission path and a single transistor based Sajad-Sunil-Schottky (SSS) device as an inverter. Therefore, just two transistors are employed to realize a complete transmission gate which normally consumes four transistors in the conventional technology. The transistors used to realize the transmission path and the SSS inverter in the proposed TG are the double gate Schottky barrier devices, employing stacks of two metal silicides, platinum silicide (PtSi) and erbium silicide (ErSi). It has been observed that the realization of the TG gate by the proposed technology has resulted into a compact structure, with reduced component count, junctions, interconnections and regions in comparison to the conventional technology. The further focus of this work is on the application part of the proposed technology. So for the first time, the proposed technology has been used to realize various combinational circuits, like a two input AND gate, a 2:1 multiplexer and a two input XOR circuits. It has been observed that the transistor count has got reduced by half in a TG, two input AND gate, 2:1 multiplexer and in a two input XOR gate. Therefore, a significant reduction in transistor count and area requirement can be achieved by using the proposed technology. The proposed technology can be also used to perform the compact realization of other combinational and sequential circuitry in future.

  1. Detailed Electrochemical Characterisation of Large SOFC Stacks

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, R.

    2012-01-01

    As solid oxide fuel cell (SOFC) technology is moving closer to a commercial break through, lifetime limiting factors, determination of the limits of safe operation and methods to measure the “state-of-health” of operating cells and stacks are becoming of increasing interest. This requires applica...... out at a range of ac perturbation amplitudes in order to investigate linearity of the response and the signal-to-noise ratio. Separation of the measured impedance into series and polarisation resistances was possible....... to analyse in detail. Today one is forced to use mathematical modelling to extract information about existing gradients and cell resistances in operating stacks, as mature techniques for local probing are not available. This type of spatially resolved information is essential for model refinement...... and validation, and helps to further the technological stack development. Further, more detailed information obtained from operating stacks is essential for developing appropriate process monitoring and control protocols for stack and system developers. An experimental stack with low ohmic resistance from Topsoe...

  2. Stacking interactions in PUF-RNA complexes

    Energy Technology Data Exchange (ETDEWEB)

    Yiling Koh, Yvonne; Wang, Yeming; Qiu, Chen; Opperman, Laura; Gross, Leah; Tanaka Hall, Traci M; Wickens, Marvin [NIH; (UW)

    2012-07-02

    Stacking interactions between amino acids and bases are common in RNA-protein interactions. Many proteins that regulate mRNAs interact with single-stranded RNA elements in the 3' UTR (3'-untranslated region) of their targets. PUF proteins are exemplary. Here we focus on complexes formed between a Caenorhabditis elegans PUF protein, FBF, and its cognate RNAs. Stacking interactions are particularly prominent and involve every RNA base in the recognition element. To assess the contribution of stacking interactions to formation of the RNA-protein complex, we combine in vivo selection experiments with site-directed mutagenesis, biochemistry, and structural analysis. Our results reveal that the identities of stacking amino acids in FBF affect both the affinity and specificity of the RNA-protein interaction. Substitutions in amino acid side chains can restrict or broaden RNA specificity. We conclude that the identities of stacking residues are important in achieving the natural specificities of PUF proteins. Similarly, in PUF proteins engineered to bind new RNA sequences, the identity of stacking residues may contribute to 'target' versus 'off-target' interactions, and thus be an important consideration in the design of proteins with new specificities.

  3. Laminated CeO2/HfO2 High-K Gate Dielectrics Grown by Pulsed Laser Deposition in Reducing Ambient

    NARCIS (Netherlands)

    Karakaya, K.; Barcones Campo, B.; Zinine, A.; Rittersma, Z.M.; Graat, P.; van Berkum, J.G.M.; Verheijen, M.A.; Rijnders, Augustinus J.H.M.; Blank, David H.A.

    2006-01-01

    CeO2 and HfO2 dielectric layers were deposited in an Ar+(5%)H2 gas mixture by Pulsed Laser Deposition (PLD) on Si (100). A CeO2-Ce2O3 transformation is achieved by deposition in reducing ambient. It is also shown that in-situ post deposition anneal efficiently oxidizes Ce2O3 layers to CeO2. The

  4. Changes in transconductance(gm) and Ion/Ioff with high-K dielectrics in MX2 monolayer 10 nm channel double gate n-MOSFET

    Science.gov (United States)

    Prasanna Kumar, S.; Sandeep, P.; Choudhary, Sudhanshu

    2017-11-01

    We investigate monolayer Transition Metal Dichalcogenides (TMDs) of type MX2 (MoS2, MoSe2, MoTe2, WS2 and WSe2) 10 nm n-channel Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) with different dielectrics (SiO2, Al2O3, HfO2 and TiO2) using DFT and NEGF formalism. Results suggest that increasing dielectric constant increases both transconductance (gm) and Ion/Ioff for all type of MX2 channels. Ion/Ioff and gm increases by one order with increase in dielectric constant K. Among all type of MX2 channels considered, WS2 channels results into highest values of gm (∼36.29 uS) and Ion/Ioff (4.3*107) with TiO2 dielectric. Variation in Subthreshold Slope (SS) with increase in dielectric constants are negligibly small, SS value of 58.52 mV/dec is obtained with Al2O3 dielectric for WS2 channel. However, a SS value of ∼60.02 mV/dec is obtained with TiO2 dielectric for all MX2 channels. The results suggest that TiO2 dielectric with WS2 channel can be used for High Performance (HP) and Low Power (LP) devices since it shows large Ion/Ioff (∼107) and SS around 60 mV/dec.

  5. Projected shell model analysis of multi-quasiparticle high-K isomers in sup 1 sup 7 sup 4 Hf

    CERN Document Server

    Zhou Xian Rong; Sun Yang; Long Gui Lu

    2002-01-01

    Multi-quasiparticle high-K states in sup 1 sup 7 sup 4 Hf are studied in the framework of the projected shell model. The calculation reproduces well the observed ground-state band as well as most of the two- and four-quasiparticle rotational bands. Some as yet unobserved high-K isomeric states in sup 1 sup 7 sup 4 Hf are predicted. Possible reasons for the existing discrepancies between calculation and experiment are discussed. It is suggested that the projected shell model may be a useful method for studying multi-quasiparticle high-K isomers and the K-mixing phenomenon in heavy deformed nuclei

  6. Reconfigurable Skyrmion Logic Gates.

    Science.gov (United States)

    Luo, Shijiang; Song, Min; Li, Xin; Zhang, Yue; Hong, Jeongmin; Yang, Xiaofei; Zou, Xuecheng; Xu, Nuo; You, Long

    2018-02-14

    Magnetic skyrmion, a nanosized spin texture with topological property, has become an area of significant interest due to the scientific insight that it can provide and also its potential impact on applications such as ultra-low-energy and ultra-high-density logic gates. In the quest for the reconfiguration of single logic device and the implementation of the complete logic functions, a novel reconfigurable skyrmion logic (RSL) is proposed and verified by micromagnetic simulations. Logic functions including AND, OR, NOT, NAND, NOR, XOR, and XNOR are implemented in the ferromagnetic (FM) nanotrack by virtue of various effects including spin orbit torque, skyrmion Hall effect, skyrmion-edge repulsions, and skyrmion-skyrmion collision. Different logic functions can be selected in an RSL by applying voltage to specific region(s) of the device, changing the local anisotropy energy of FM film. Material properties and geometrical scaling studies suggest RSL gates fit for energy-efficient computing as well as provide the guidelines for the design and optimization of this new logic family.

  7. Pentacene-Based Thin Film Transistor with Inkjet-Printed Nanocomposite High-K Dielectrics

    Directory of Open Access Journals (Sweden)

    Chao-Te Liu

    2012-01-01

    Full Text Available The nanocomposite gate insulating film of a pentacene-based thin film transistor was deposited by inkjet printing. In this study, utilizing the pearl miller to crumble the agglomerations and the dispersant to well stabilize the dispersion of nano-TiO2 particles in the polymer matrix of the ink increases the dose concentration for pico-jetting, which could be as the gate dielectric film made by inkjet printing without the photography process. Finally, we realized top contact pentacene-TFTs and successfully accomplished the purpose of directly patternability and increase the performance of the device based on the nanocomposite by inkjet printing. These devices exhibited p-channel TFT characteristics with a high field-effect mobility (a saturation mobility of ̃0.58 cm2 V−1 s−1, a large current ratio (>103 and a low operation voltage (<6 V. Furthermore, we accorded the deposited mechanisms which caused the interface difference between of inkjet printing and spin coating. And we used XRD, SEM, Raman spectroscopy to help us analyze the transfer characteristics of pentacene films and the performance of OTFTs.

  8. Cascaded logic gates in nanophotonic plasmon networks

    National Research Council Canada - National Science Library

    Wei, Hong; Wang, Zhuoxian; Tian, Xiaorui; Käll, Mikael; Xu, Hongxing

    2011-01-01

    ... integrated logic units and cascade devices have not been reported. Here we demonstrate that a plasmonic binary NOR gate, a 'universal logic gate', can be realized through cascaded OR and NOT gates in four-terminal plasmonic nanowire networks...

  9. Multi-parameter sensing using high-k oxide of barium strontium titanate

    Energy Technology Data Exchange (ETDEWEB)

    Huck, Christina; Poghossian, Arshak; Baecker, Matthias; Schoening, Michael J. [Institute of Nano- and Biotechnologies (INB), FH Aachen, 52428, Juelich (Germany); Peter Gruenberg Institute (PGI-8), Forschungszentrum Juelich GmbH, 52525, Juelich (Germany); Reisert, Steffen; Kramer, Friederike [Institute of Nano- and Biotechnologies (INB), FH Aachen, 52428, Juelich (Germany); Begoyan, Vardges K.; Buniatyan, Vahe V. [Department of Microelectronics and Biomedical Devices, State Engineering University of Armenia, 0009, Yerevan (Armenia)

    2015-06-15

    High-k perovskite oxide of barium strontium titanate (BST) represents a very attractive multi-functional transducer material for the development of (bio-)chemical sensors. In this work, a Si-based sensor chip containing Pt interdigitated electrodes covered with a thin BST layer (485 nm) has been developed for multi-parameter chemical sensing. The chip has been applied for the contactless measurement of the electrolyte conductivity, the detection of adsorbed charged macromolecules (positively charged polyelectrolytes of polyethylenimine) and the concentration of hydrogen peroxide (H{sub 2}O{sub 2}) vapor. The experimental results of functional testing of individual sensors are presented. The mechanism of the BST sensitivity to charged polyelectrolytes and H{sub 2}O{sub 2} vapor has been proposed and discussed. (copyright 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  10. Characterization of high-k dielectrics using MeV elastic scattering of He ions

    Energy Technology Data Exchange (ETDEWEB)

    Zoller, C.J. [Dept. of Physics and Astronomy, Ion Physics, Uppsala University, P.O. Box 516, SE 751 20 Uppsala (Sweden); Dentoni Litta, E. [KTH Royal Institute of Technology, School of ICT, Isafjordsgatan 22, SE 164 40 Kista (Sweden); Primetzhofer, D., E-mail: daniel.primetzhofer@physics.uu.se [Dept. of Physics and Astronomy, Ion Physics, Uppsala University, P.O. Box 516, SE 751 20 Uppsala (Sweden)

    2015-03-15

    We present a systematic comparison of two distinct ion-beam based methods for composition analysis of nanometer oxide films: ion-beam channeling and elastic scattering using nuclear resonances, both at MeV energies. Thin films of the technologically highly relevant high-k dielectrics HfO{sub 2} and HfAlO are characterized in the present study, with the additional aim of obtaining a better quantification of the Al content for the latter system. We show that both employed ion scattering methods enable a quantitative determination of the oxygen concentrations with typical uncertainties of about 5–10% in the oxygen fraction. The influence of various kinds of systematic inaccuracies in the evaluation procedure are discussed.

  11. Works close to gate B

    CERN Multimedia

    GS Department

    2011-01-01

    In connection to the TRAM project, drainage works will be carried out close to gate B until the end of next week. In order to avoid access problems, if arriving by car, please use gates A and E. Department of General Infrastructure Services (GS) GS-SE Group

  12. Penn State DOE GATE Program

    Energy Technology Data Exchange (ETDEWEB)

    Anstrom, Joel

    2012-08-31

    The Graduate Automotive Technology Education (GATE) Program at The Pennsylvania State University (Penn State) was established in October 1998 pursuant to an award from the U.S. Department of Energy (U.S. DOE). The focus area of the Penn State GATE Program is advanced energy storage systems for electric and hybrid vehicles.

  13. Start-Stop Test Procedures on the PEMFC Stack Level

    DEFF Research Database (Denmark)

    Mitzel, Jens; Nygaard, Frederik; Veltzé, Sune

    The test is addressed to investigate the influence on stack durability of a long stop followed by a restart of a stack. Long stop should be defined as a stop in which the anodic compartment is fully filled by air due to stack leakages. In systems, leakage level of the stack is low and time to fil...

  14. Logic gates with ion transistors

    Science.gov (United States)

    Grebel, H.

    2017-09-01

    Electronic logic gates are the basic building blocks of every computing and micro controlling system. Logic gates are made of switches, such as diodes and transistors. Ion-selective, ionic switches may emulate electronic switches [1-8]. If we ever want to create artificial bio-chemical circuitry, then we need to move a step further towards ion-logic circuitry. Here we demonstrate ion XOR and OR gates with electrochemical cells, and specifically, with two wet-cell batteries. In parallel to vacuum tubes, the batteries were modified to include a third, permeable and conductive mid electrode (the gate), which was placed between the anode and cathode in order to affect the ion flow through it. The key is to control the cell output with a much smaller biasing power, as demonstrated here. A successful demonstration points to self-powered ion logic gates.

  15. Logic Gates with Ion Transistors

    CERN Document Server

    Grebel, Haim

    2016-01-01

    Electronic logic gates are the basic building blocks of every computing and micro controlling system. Logic gates are made of switches, such as diodes and transistors. Ion-selective, ionic switches may emulate electronic switches [1-8]. If we ever want to create artificial bio-chemical circuitry, then we need to move a step further towards ion-logic circuitry. Here we demonstrate ion XOR and OR gates with electrochemical cells, and specifically, with two wet-cell batteries. In parallel to vacuum tubes, the batteries were modified to include a third, permeable and conductive mid electrode (the gate), which was placed between the anode and cathode in order to affect the ion flow through it. The key is to control the cell output with a much smaller biasing power, as demonstrated here. A successful demonstration points to self-powered ion logic gates.

  16. Evaluation of Synthesis & Processing Routes for the High K- Boron Nitride Nano Tubes (BNNTS) for Thermal Management Applications Project

    Data.gov (United States)

    National Aeronautics and Space Administration — The purpose of this proposal is to develop and demonstrate the feasibility of processing the High Thermal Conductivity Boron Nitride Nano Tubes (High-K BNNTs) that...

  17. Electrical properties of nano-resistors made from the Zr-doped HfO2 high-k dielectric film

    Science.gov (United States)

    Zhang, Shumao; Kuo, Yue

    2018-03-01

    Electrical properties of nano-sized resistors made from the breakdown of the metal-oxide-semiconductor capacitor composed of the amorphous high-k gate dielectric have been investigated under different stress voltages and temperatures. The effective resistance of nano-resistors in the device was estimated from the I–V curve in the high voltage range. It decreased with the increase of the number of resistors. The resistance showed complicated temperature dependence, i.e. it neither behaves like a conductor nor a semiconductor. In the low voltage operation range, the charge transfer was controlled by the Schottky barrier at the nano-resistor/Si interface. The barrier height decreased with the increase of stress voltage, which was probably caused by the change of the nano-resistor composition. Separately, it was observed that the barrier height was dependent on the temperature, which was probably due to the dynamic nano-resistor formation process and the inhomogeneous barrier height distribution. The unique electrical characteristics of this new type of nano-resistors are important for many electronic and optoelectronic applications.

  18. EmuStack: An OpenStack-Based DTN Network Emulation Platform (Extended Version

    Directory of Open Access Journals (Sweden)

    Haifeng Li

    2016-01-01

    Full Text Available With the advancement of computing and network virtualization technology, the networking research community shows great interest in network emulation. Compared with network simulation, network emulation can provide more relevant and comprehensive details. In this paper, EmuStack, a large-scale real-time emulation platform for Delay Tolerant Network (DTN, is proposed. EmuStack aims at empowering network emulation to become as simple as network simulation. Based on OpenStack, distributed synchronous emulation modules are developed to enable EmuStack to implement synchronous and dynamic, precise, and real-time network emulation. Meanwhile, the lightweight approach of using Docker container technology and network namespaces allows EmuStack to support a (up to hundreds of nodes large-scale topology with only several physical nodes. In addition, EmuStack integrates the Linux Traffic Control (TC tools with OpenStack for managing and emulating the virtual link characteristics which include variable bandwidth, delay, loss, jitter, reordering, and duplication. Finally, experiences with our initial implementation suggest the ability to run and debug experimental network protocol in real time. EmuStack environment would bring qualitative change in network research works.

  19. Levitation characteristics of HTS tape stacks

    Energy Technology Data Exchange (ETDEWEB)

    Pokrovskiy, S. V.; Ermolaev, Y. S.; Rudnev, I. A. [National Research Nuclear University MEPhI (Moscow Engineering Physics Institute), Moscow (Russian Federation)

    2015-03-15

    Due to the considerable development of the technology of second generation high-temperature superconductors and a significant improvement in their mechanical and transport properties in the last few years it is possible to use HTS tapes in the magnetic levitation systems. The advantages of tapes on a metal substrate as compared with bulk YBCO material primarily in the strength, and the possibility of optimizing the convenience of manufacturing elements of levitation systems. In the present report presents the results of the magnetic levitation force measurements between the stack of HTS tapes containing of tapes and NdFeB permanent magnet in the FC and ZFC regimes. It was found a non- linear dependence of the levitation force from the height of the array of stack in both modes: linear growth at small thickness gives way to flattening and constant at large number of tapes in the stack. Established that the levitation force of stacks comparable to that of bulk samples. The numerical calculations using finite element method showed that without the screening of the applied field the levitation force of the bulk superconductor and the layered superconductor stack with a critical current of tapes increased by the filling factor is exactly the same, and taking into account the screening force slightly different.

  20. Forced Air-Breathing PEMFC Stacks

    Directory of Open Access Journals (Sweden)

    K. S. Dhathathreyan

    2012-01-01

    Full Text Available Air-breathing fuel cells have a great potential as power sources for various electronic devices. They differ from conventional fuel cells in which the cells take up oxygen from ambient air by active or passive methods. The air flow occurs through the channels due to concentration and temperature gradient between the cell and the ambient conditions. However developing a stack is very difficult as the individual cell performance may not be uniform. In order to make such a system more realistic, an open-cathode forced air-breathing stacks were developed by making appropriate channel dimensions for the air flow for uniform performance in a stack. At CFCT-ARCI (Centre for Fuel Cell Technology-ARC International we have developed forced air-breathing fuel cell stacks with varying capacity ranging from 50 watts to 1500 watts. The performance of the stack was analysed based on the air flow, humidity, stability, and so forth, The major advantage of the system is the reduced number of bipolar plates and thereby reduction in volume and weight. However, the thermal management is a challenge due to the non-availability of sufficient air flow to remove the heat from the system during continuous operation. These results will be discussed in this paper.

  1. Fungal melanins differ in planar stacking distances.

    Directory of Open Access Journals (Sweden)

    Arturo Casadevall

    Full Text Available Melanins are notoriously difficult to study because they are amorphous, insoluble and often associated with other biological materials. Consequently, there is a dearth of structural techniques to study this enigmatic pigment. Current models of melanin structure envision the stacking of planar structures. X ray diffraction has historically been used to deduce stacking parameters. In this study we used X ray diffraction to analyze melanins derived from Cryptococcus neoformans, Aspergillus niger, Wangiella dermatitides and Coprinus comatus. Analysis of melanin in melanized C. neoformans encapsulated cells was precluded by the fortuitous finding that the capsular polysaccharide had a diffraction spectrum that was similar to that of isolated melanin. The capsular polysaccharide spectrum was dominated by a broad non-Bragg feature consistent with origin from a repeating structural motif that may arise from inter-molecular interactions and/or possibly gel organization. Hence, we isolated melanin from each fungal species and compared diffraction parameters. The results show that the inferred stacking distances of fungal melanins differ from that reported for synthetic melanin and neuromelanin, occupying intermediate position between these other melanins. These results suggest that all melanins have a fundamental diffracting unit composed of planar graphitic assemblies that can differ in stacking distance. The stacking peak appears to be a distinguishing universal feature of melanins that may be of use in characterizing these enigmatic pigments.

  2. Fungal melanins differ in planar stacking distances.

    Science.gov (United States)

    Casadevall, Arturo; Nakouzi, Antonio; Crippa, Pier R; Eisner, Melvin

    2012-01-01

    Melanins are notoriously difficult to study because they are amorphous, insoluble and often associated with other biological materials. Consequently, there is a dearth of structural techniques to study this enigmatic pigment. Current models of melanin structure envision the stacking of planar structures. X ray diffraction has historically been used to deduce stacking parameters. In this study we used X ray diffraction to analyze melanins derived from Cryptococcus neoformans, Aspergillus niger, Wangiella dermatitides and Coprinus comatus. Analysis of melanin in melanized C. neoformans encapsulated cells was precluded by the fortuitous finding that the capsular polysaccharide had a diffraction spectrum that was similar to that of isolated melanin. The capsular polysaccharide spectrum was dominated by a broad non-Bragg feature consistent with origin from a repeating structural motif that may arise from inter-molecular interactions and/or possibly gel organization. Hence, we isolated melanin from each fungal species and compared diffraction parameters. The results show that the inferred stacking distances of fungal melanins differ from that reported for synthetic melanin and neuromelanin, occupying intermediate position between these other melanins. These results suggest that all melanins have a fundamental diffracting unit composed of planar graphitic assemblies that can differ in stacking distance. The stacking peak appears to be a distinguishing universal feature of melanins that may be of use in characterizing these enigmatic pigments.

  3. Current Source Logic Gate

    Science.gov (United States)

    Krasowski, Michael J. (Inventor); Prokop, Norman F. (Inventor)

    2017-01-01

    A current source logic gate with depletion mode field effect transistor ("FET") transistors and resistors may include a current source, a current steering switch input stage, and a resistor divider level shifting output stage. The current source may include a transistor and a current source resistor. The current steering switch input stage may include a transistor to steer current to set an output stage bias point depending on an input logic signal state. The resistor divider level shifting output stage may include a first resistor and a second resistor to set the output stage point and produce valid output logic signal states. The transistor of the current steering switch input stage may function as a switch to provide at least two operating points.

  4. Impact of gate geometry on ionic liquid gated ionotronic systems

    Directory of Open Access Journals (Sweden)

    A. T. Wong

    2017-04-01

    Full Text Available Ionic liquid electrolytes are gaining widespread application as a gate dielectric used to control ion transport in functional materials. This letter systematically examines the important influence that device geometry in standard “side gate” 3-terminal geometries plays in device performance of a well-known oxygen ion conductor. We show that the most influential component of device design is the ratio between the area of the gate electrode and the active channel, while the spacing between these components and their individual shapes has a negligible contribution. These findings provide much needed guidance in device design intended for ionotronic gating with ionic liquids.

  5. Progress of MCFC stack technology at Toshiba

    Energy Technology Data Exchange (ETDEWEB)

    Hori, M.; Hayashi, T.; Shimizu, Y. [Toshiba Corp., Tokyo (Japan)

    1996-12-31

    Toshiba is working on the development of MCFC stack technology; improvement of cell characteristics, and establishment of separator technology. For the cell technology, Toshiba has concentrated on both the restraints of NiO cathode dissolution and electrolyte loss from cells, which are the critical issues to extend cell life in MCFC, and great progress has been made. On the other hand, recognizing that the separator is one of key elements in accomplishing reliable and cost-competitive MCFC stacks, Toshiba has been accelerating the technology establishment and verification of an advanced type separator. A sub-scale stack with such a separator was provided for an electric generating test, and has been operated for more than 10,000 hours. This paper presents several topics obtained through the technical activities in the MCFC field at Toshiba.

  6. A stack of cards rebuilt with calculus

    Science.gov (United States)

    Kazachkov, Alexander; Kireš, Marián

    2017-07-01

    Previous work covers building a tower from a stack of homogeneous rectangular plates, each with a maximum shift in displacement. We suggest using plates shaped as curvilinear triangles bounded by segments of power-law functions. The masses of the plates and the position of their center of mass are calculated and measured experimentally after cutting them out from cardboard and aluminum sheets. A computer simulation of the displacement towers is combined with their live building. Individual maximum shifts of the plates in the stack prove to be much bigger the higher the power coefficient of the boundary curves. The resulting total overhang of such a displacement tower may exceed that of a stack of traditionally used homogeneous rectangular cards.

  7. The Meaning of High K2O Volcanism In the U.S. Cordillera

    Science.gov (United States)

    Putirka, K. D.; Busby, C.

    2010-12-01

    K2O contents provide a highly effective discriminant between volcanic rocks erupted in the Cascades and Basin-and Range-provinces, with Cascades volcanics having lower K2O contents at a given SiO2. To differentiate these suites, we use a K-index, where K-index = K2Oobserved - 0.12[SiO2] + 5.1 (oxides in wt. %). In the Sierra Nevada, regional K2O contents are not controlled by wall-rock assimilation. In addition, none are candidates for K-metasomatism, and none are likely to be derived by partial melting of a K-metasomatized source. As to the latter issue, even volcanic rocks with the highest K2O in the Sierra Nevada have K2O/Na2O 5, and as high as 30-40 (Brooks and Snee (1996). Also, Sierra-wide K2O variations are not connected to indices of subduction-related mantle enrichments (such as La/Nb, Ba/Nb or Sr/P2O5), and so K2O is unconnected to regional variations in source composition. K2O contents are instead controlled by the degree of partial melting (F) in the mantle source and fractional crystallization. Putirka and Busby (2007) show that maximum K2O in the Sierra increases with increasing crust thickness, and this relationship also holds across the U.S. the Cordillera (at 39oN latitude). This relationship implies that low F magmas more easily transit thick, low-density upper crust (Putirka and Busby, 2007), which is a consequence of the fact that low F melts are enriched not just in K2O, but also in H2O, which greatly lowers magma density (Ochs and Lange, 1999). This model can explain the contrast in Cascade and Basin-and-Range K2O contents: the modern Cascades are built on the thinner crust of accreted terranes, while typical Basin-and-Range volcanics are erupted on older, and thicker, cratonized crust. Mean crust density, however, cannot be the only explanation of high K2O. In the central Sierra Nevada, the Colorado River Extensional Corridor, and at the Lunar Crater/Nevada Test site area of NV, eruptions of high K2O magmas (K-index>1.65) coincide in time and

  8. A simulation-based proposed high-k heterostructure AlGaAs/Si junctionless n-type tunnel FET

    Science.gov (United States)

    Balmukund Rahi, Shiromani; Ghosh, Bahniman; Asthana, Pranav

    2014-11-01

    We propose a heterostructure junctionless tunnel field effect transistor (HJL-TFET) using AlGaAs/Si. In the proposed HJL-TFET, low band gap silicon is used in the source side and higher band gap AlGaAs in the drain side. The whole AlGaAs/Si region is heavily doped n-type. The proposed HJL-TFET uses two isolated gates (named gate, gate1) with two different work functions (gate = 4.2 eV, gate1 = 5.2 eV respectively). The 2-D nature of HJL-TFET current flow is studied. The proposed structure is simulated in Silvaco with different gate dielectric materials. This structure exhibits a high on current in the range of 1.4 × 10-6 A/μm, the off current remains as low as 9.1 × 10-14 A/μm. So ION/IOFF ratio of ≃ 108 is achieved. Point subthreshold swing has also been reduced to a value of ≃ 41 mV/decade for TiO2 gate material.

  9. Ultrafast, high precision gated integrator

    Energy Technology Data Exchange (ETDEWEB)

    Wang, X.

    1995-01-01

    An ultrafast, high precision gated integrator has been developed by introducing new design approaches that overcome the problems associated with earlier gated integrator circuits. The very high speed is evidenced by the output settling time of less than 50 ns and 20 MHz input pulse rate. The very high precision is demonstrated by the total output offset error of less than 0.2mV and the output droop rate of less than 10{mu}V/{mu}s. This paper describes the theory of this new gated integrator circuit operation. The completed circuit test results are presented.

  10. Full Polymer Dielectric Elastomeric Actuators (DEA Functionalised with Carbon Nanotubes and High-K Ceramics

    Directory of Open Access Journals (Sweden)

    Tilo Köckritz

    2016-09-01

    Full Text Available Dielectric elastomer actuators (DEA are special devices which have a simple working and construction principle and outstanding actuation properties. The DEAs consist of a combination of different materials for the dielectric and electrode layers. The combination of these layers causes incompatibilities in their interconnections. Dramatic differences in the mechanical properties and bad adhesion of the layers are the principal causes for the reduction of the actuation displacement and strong reduction of lifetime. Common DEAs achieve actuation displacements of 2% and a durability of some million cycles. The following investigations represent a new approach to solving the problems of common systems. The investigated DEA consists of only one basic raw polymer, which was modified according to the required demands of each layer. The basic raw polymer was modified with single-walled carbon nanotubes or high-k ceramics, for example, lead magnesium niobate-lead titanate. The development of the full polymer DEA comprised the development of materials and technologies to realise a reproducible layer composition. It was proven that the full polymer actuator worked according to the theoretical rules. The investigated system achieved actuation displacements above 20% regarding thickness, outstanding interconnections at each layer without any failures, and durability above 3 million cycles without any indication of an impending malfunction.

  11. Psychometrics and life history strategy: the structure and validity of the High K Strategy Scale.

    Science.gov (United States)

    Copping, Lee T; Campbell, Anne; Muncer, Steven

    2014-03-22

    In this paper, we critically review the conceptualization and implementation of psychological measures of life history strategy associated with Differential K theory. The High K Strategy Scale (HKSS: Giosan, 2006) was distributed to a large British sample (n = 809) with the aim of assessing its factor structure and construct validity in relation to theoretically relevant life history variables: age of puberty, age of first sexual encounter, and number of sexual partners. Exploratory and confirmatory factor analyses indicated that the HKSS in its current form did not show an adequate statistical fit to the data. Modifications to improve fit indicated four correlated factors (personal capital, environmental stability, environmental security, and social capital). Later puberty in women was positively associated with measures of the environment and personal capital. Among men, contrary to Differential K predictions but in line with female mate preferences, earlier sexual debut and more sexual partners were positively associated with more favorable environments and higher personal and social capital. We raise concerns about the use of psychometric indicators of lifestyle and personality as proxies for life history strategy when they have not been validated against objective measures derived from contemporary life history theory and when their status as causes, mediators, or correlates has not been investigated.

  12. Psychometrics and Life History Strategy: The Structure and Validity of the High K Strategy Scale

    Directory of Open Access Journals (Sweden)

    Lee T. Copping

    2014-01-01

    Full Text Available In this paper, we critically review the conceptualization and implementation of psychological measures of life history strategy associated with Differential K theory. The High K Strategy Scale (HKSS: Giosan, 2006 was distributed to a large British sample (n = 809 with the aim of assessing its factor structure and construct validity in relation to theoretically relevant life history variables: age of puberty, age of first sexual encounter, and number of sexual partners. Exploratory and confirmatory factor analyses indicated that the HKSS in its current form did not show an adequate statistical fit to the data. Modifications to improve fit indicated four correlated factors (personal capital, environmental stability, environmental security, and social capital. Later puberty in women was positively associated with measures of the environment and personal capital. Among men, contrary to Differential K predictions but in line with female mate preferences, earlier sexual debut and more sexual partners were positively associated with more favorable environments and higher personal and social capital. We raise concerns about the use of psychometric indicators of lifestyle and personality as proxies for life history strategy when they have not been validated against objective measures derived from contemporary life history theory and when their status as causes, mediators, or correlates has not been investigated.

  13. PERFORMANCE ANALYSIS OF POWER GATING TECHNIQUES IN 4-BIT SISO SHIFT REGISTER CIRCUITS

    Directory of Open Access Journals (Sweden)

    K. NEHRU

    2017-12-01

    Full Text Available The last few years have witnessed great deal of research activities in the area of reversible logic; the intrinsic functionality to reduce the power dissipation that has been the main requirement in the low power digital circuit design has garnered more attraction to this field. In this paper various power gating techniques for power minimization in adder and 4 bit serial in serial out (SISO shift register circuits is proposed. The work also analyze various leakage reduction approaches such as sleep approach, sleepy stack approach, dual sleep technique and zig-zag technique for gate diffusion input technique, self resetting gate diffusion input technique for complementary metal oxide semi conductor (CMOS technology and forced stack and multiplexer based SISO registers. A 4 bit SISO and full adder was designed in a cadence virtuoso 180 nm technology and the simulated results show the trade-off between power, delay and power for the sequential circuits and the results demonstrate that minimum power consumption can be achieved when the adder and SISO are designed for clock gating.

  14. Gate-Controlled BP-WSe2Heterojunction Diode for Logic Rectifiers and Logic Optoelectronics.

    Science.gov (United States)

    Li, Dong; Wang, Biao; Chen, Mingyuan; Zhou, Jun; Zhang, Zengxing

    2017-06-01

    p-n junctions play an important role in modern semiconductor electronics and optoelectronics, and field-effect transistors are often used for logic circuits. Here, gate-controlled logic rectifiers and logic optoelectronic devices based on stacked black phosphorus (BP) and tungsten diselenide (WSe 2 ) heterojunctions are reported. The gate-tunable ambipolar charge carriers in BP and WSe 2 enable a flexible, dynamic, and wide modulation on the heterojunctions as isotype (p-p and n-n) and anisotype (p-n) diodes, which exhibit disparate rectifying and photovoltaic properties. Based on such characteristics, it is demonstrated that BP-WSe 2 heterojunction diodes can be developed for high-performance logic rectifiers and logic optoelectronic devices. Logic optoelectronic devices can convert a light signal to an electric one by applied gate voltages. This work should be helpful to expand the applications of 2D crystals. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  15. Scaling the Serialization of MOSFETs by Magnetically Coupling Their Gate Electrodes

    DEFF Research Database (Denmark)

    Dimopoulos, Emmanouil; Munk-Nielsen, Stig

    2013-01-01

    More than twenty years of thorough research on the serialization of power semiconductor switches, like the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) or the Insulated Gate Bipolar Transistor (IGBT), have resulted into several different stacking concepts; all aiming towards......, a revised version of the technique, introducing an additional design specification for the employed transformer, extended its effective applicability in low and medium power MOSFETs as well. In this paper the scalability of the revised gate balancing core technique is investigated via experiments conducted...... on a string of three off-the-self, non-matched MOSFETs, installed in an inductively loaded step-down converter. Furthermore, during the string composition and experimental testing, all design milestones related with the scaling-up process of the revised gate balancing core concept are distinctively...

  16. 49 CFR 234.223 - Gate arm.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Gate arm. 234.223 Section 234.223 Transportation... Maintenance Standards § 234.223 Gate arm. Each gate arm, when in the downward position, shall extend across... clearly viewed by approaching highway users. Each gate arm shall start its downward motion not less than...

  17. Reversible logic gates on Physarum Polycephalum

    Energy Technology Data Exchange (ETDEWEB)

    Schumann, Andrew [University of Information Technology and Management, Sucharskiego 2, Rzeszow, 35-225 (Poland)

    2015-03-10

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.

  18. Demonstration of a Quantum Nondemolition Sum Gate

    DEFF Research Database (Denmark)

    Yoshikawa, J.; Miwa, Y.; Huck, Alexander

    2008-01-01

    The sum gate is the canonical two-mode gate for universal quantum computation based on continuous quantum variables. It represents the natural analogue to a qubit C-NOT gate. In addition, the continuous-variable gate describes a quantum nondemolition (QND) interaction between the quadrature compo...

  19. A Review of Nanoscale Channel and Gate Engineered FINFETs for VLSI Mixed Signal Applications Using Zirconium-di-Oxide Dielectrics

    Directory of Open Access Journals (Sweden)

    D.Nirmal

    2014-07-01

    Full Text Available In the past, most of the research and development efforts in the area of CMOS and IC’s are oriented towards reducing the power and increasing the gain of the circuits. While focusing the attention on low power and high gain in the device, the materials of the device also been taken into consideration. In the present technology, Computationally intensive devices with low power dissipation and high gain are becoming a critical application domain. Several factors have contributed to this paradigm shift. The primary driving factor being the increase in scale of integration, the chip has to accommodate smaller and faster transistors than their predecessors. During the last decade semiconductor technology has been led by conventional scaling. Scaling, has been aimed towards higher speed, lower power and higher density of the semiconductor devices. However, as scaling approached its physical limits, it has become more difficult and challenging for fabrication industry. Therefore, tremendous research has been carried out to investigate the alternatives, and this led to the introduction of new Nano materials and concepts to overcome the difficulties in the device fabrications. In order to reduce the leakage current and parasitic capacitance in devices, gate oxide high-k dielectric materials are explored. Among the different high-k materials available the nano size Zirconium dioxide material is suggested as an alternate gate oxide material for devices due to its thermal stability and small grain size of material. To meet the requirements of ITRS roadmap 2012, the Multi gate devices are considered to be one of the most promising technologies for the future microelectronics industry due to its excellent immunity to short channel effects and high value of On current. The double gate or multi gate devices provide a better scalability option due to its excellent immunity to short-channel effects. Here the different high-k materials are replaced in different

  20. A Stack of Cards Rebuilt with Calculus

    Science.gov (United States)

    Kazachkov, Alexander; Kireš, Marián

    2017-01-01

    Previous work covers building a tower from a stack of homogeneous rectangular plates, each with a maximum shift in displacement. We suggest using plates shaped as curvilinear triangles bounded by segments of power-law functions. The masses of the plates and the position of their center of mass are calculated and measured experimentally after…

  1. Stacked spheres and lower bound theorem

    Indian Academy of Sciences (India)

    BASUDEB DATTA

    2011-11-20

    Nov 20, 2011 ... Using Kalai's result, Tay (1995) proved LBT for a bigger class of simplicial complexes (namely, normal pseudomanifolds). In 2008, we (Bagchi & Datta) have presented a self-contained combinatorial proof of LBT for normal pseudomanifolds. Stacked spheres and lower bound theorem. Basudeb Datta.

  2. 40 CFR 61.33 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.33 Section 61.33 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... sampling. (a) Unless a waiver of emission testing is obtained under § 61.13, each owner or operator...

  3. SRS reactor stack plume marking tests

    Energy Technology Data Exchange (ETDEWEB)

    Petry, S.F.

    1992-03-01

    Tests performed in 105-K in 1987 and 1988 demonstrated that the stack plume can successfully be made visible (i.e., marked) by introducing smoke into the stack breech. The ultimate objective of these tests is to provide a means during an emergency evacuation so that an evacuee can readily identify the stack plume and evacuate in the opposite direction, thus minimizing the potential of severe radiation exposure. The EPA has also requested DOE to arrange for more tests to settle a technical question involving the correct calculation of stack downwash. New test canisters were received in 1988 designed to produce more smoke per unit time; however, these canisters have not been evaluated, because normal ventilation conditions have not been reestablished in K Area. Meanwhile, both the authorization and procedure to conduct the tests have expired. The tests can be performed during normal reactor operation. It is recommended that appropriate authorization and procedure approval be obtained to resume testing after K Area restart.

  4. OpenStack Object Storage (Swift) essentials

    CERN Document Server

    Kapadia, Amar; Varma, Sreedhar

    2015-01-01

    If you are an IT administrator and you want to enter the world of cloud storage using OpenStack Swift, then this book is ideal for you. Basic knowledge of Linux and server technology is beneficial to get the most out of the book.

  5. Contemporary sample stacking in analytical electrophoresis

    Czech Academy of Sciences Publication Activity Database

    Malá, Zdeňka; Šlampová, Andrea; Křivánková, Ludmila; Gebauer, Petr; Boček, Petr

    2015-01-01

    Roč. 36, č. 1 (2015), s. 15-35 ISSN 0173-0835 R&D Projects: GA ČR(CZ) GA13-05762S Institutional support: RVO:68081715 Keywords : biological samples * stacking * trace analysis * zone electrophoresis Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 2.482, year: 2015

  6. 49 CFR 178.606 - Stacking test.

    Science.gov (United States)

    2010-10-01

    ... Testing of Non-bulk Packagings and Packages § 178.606 Stacking test. (a) General. All packaging design... 24 hours, except that plastic drums, jerricans, and composite packagings 6HH intended for liquids... maintain their position for one hour. Plastic packagings must be cooled to ambient temperature before this...

  7. OpenStack cloud computing cookbook

    CERN Document Server

    Jackson, Kevin

    2013-01-01

    A Cookbook full of practical and applicable recipes that will enable you to use the full capabilities of OpenStack like never before.This book is aimed at system administrators and technical architects moving from a virtualized environment to cloud environments with familiarity of cloud computing platforms. Knowledge of virtualization and managing linux environments is expected.

  8. Bill Gates vil redde Folkeskolen

    DEFF Research Database (Denmark)

    Fejerskov, Adam Moe

    2014-01-01

    Det amerikanske uddannelsessystem bliver for tiden udsat for hård kritik, ledt an af Microsoft stifteren Bill Gates. Gates har indtil videre brugt 3 mia. kroner på at skabe opbakning til tiltag som præstationslønning af lærere og strømlining af pensum på tværs af alle skoler i landet...

  9. Effects of Ordered Stacking Faults on Electrical Transport Properties in Silicon Nanowires

    Science.gov (United States)

    Collette, Marc; Moutanabbir, Oussama; Champagne, Alexandre

    Lattice defects in silicon nanowires (SiNWs) allow the exploration of the fundamental physics governing transport mechanisms. We study charge transport in SiNW transistors with stacking faults in the 3C sequence, producing local hexagonal ordering. This structure leads to polytype SiNWs with distinct properties for novel applications in thermoelectronics. Since charge carrier and phonon behavior depend on crystal structure, these planar defects affect the transport properties of the nanowire. We grow our SiNWs using a VLS method, with stacking faults induced during growth. Structural characterization of each SiNW is done with Raman spectroscopy to quantify hexagonality. Individual nanowires are located and contacted using different metals to understand the Schottky barrier of the contacts at the SiNWs. We suspend 2 μm-long SiNW devices using a wet oxide etch to uncouple the SiNW from the substrate. We study the electrical properties by I-V measurements across the FET device while modulating the applied back gate voltage. Our initial data show that the presence of stacking faults causes an increase in resistivity by two orders of magnitude, thus greatly hindering charge transport through the SiNW.

  10. Latest design of gate valves

    Energy Technology Data Exchange (ETDEWEB)

    Kurzhofer, U.; Stolte, J.; Weyand, M.

    1996-12-01

    Babcock Sempell, one of the most important valve manufacturers in Europe, has delivered valves for the nuclear power industry since the beginning of the peaceful application of nuclear power in the 1960s. The latest innovation by Babcock Sempell is a gate valve that meets all recent technical requirements of the nuclear power technology. At the moment in the United States, Germany, Sweden, and many other countries, motor-operated gate and globe valves are judged very critically. Besides the absolute control of the so-called {open_quotes}trip failure,{close_quotes} the integrity of all valve parts submitted to operational forces must be maintained. In case of failure of the limit and torque switches, all valve designs have been tested with respect to the quality of guidance of the gate. The guidances (i.e., guides) shall avoid a tilting of the gate during the closing procedure. The gate valve newly designed by Babcock Sempell fulfills all these characteristic criteria. In addition, the valve has cobalt-free seat hardfacing, the suitability of which has been proven by friction tests as well as full-scale blowdown tests at the GAP of Siemens in Karlstein, West Germany. Babcock Sempell was to deliver more than 30 gate valves of this type for 5 Swedish nuclear power stations by autumn 1995. In the presentation, the author will report on the testing performed, qualifications, and sizing criteria which led to the new technical design.

  11. Ca dependence of Na influx during treatment of rabbit aorta with NE and high K solutions

    Energy Technology Data Exchange (ETDEWEB)

    Aaronson, P.I.; Jones, A.W. (St. George' s Hospital Medical School, London (England) Univ. of Missouri School of Medicine, Columbia (USA))

    1988-01-01

    Cellular influx of {sup 24}Na was measured in isolated rabbit aorta during stimulation with 10 {mu}M norepinephrine (NE) or depolarization with 80 mM K solution, using a pulse-labeling, cold-wash technique. NE caused a two- to threefold increase in Na influx; a smaller but significant increase was also observed in depolarized tissues. Basal and Ne-induced fluxes at 1 min were significantly increased by a 20-min preincubation in a Ca-free solution containing 2 mM EGTA; elevation of (Mg) in this solution reduced these effects. The high K-induced influx was prevented by a combination of low Ca (30 {mu}m) and elevated Mg (10 mM). The Ca agonist, BAY-K 8644, increased {sup 24}Na influx. The Ca antagonist, diltiazem, inhibited the depolarization-stimulated {sup 24}Na influx in a concentration-dependent manner, but was less effective in blocking the response to NE. Extension of the preincubation in NE plus Ca-free medium from 30 s to 15 min decreased the influx response and contraction. After exposure to NE in Ca-free solution, {sup 24}Na influx remained elevated 10 min after washing out NE in the continued absence of Ca. A second exposure to NE at that time did not increase influx. The authors propose that a component of {sup 24}Na influx during excitation depends directly on a rise in intracellular (Ca). The role of an indirect effect of (Ca) on metabolic H{sup +} production with subsequent stimulation of the Na{sup +}-H{sup +} exchange may also be a factor.

  12. Project W-420 Stack Monitoring system upgrades conceptual design report

    Energy Technology Data Exchange (ETDEWEB)

    TUCK, J.A.

    1998-11-06

    This document describes the scope, justification, conceptual design, and performance of Project W-420 stack monitoring system upgrades on six NESHAP-designated, Hanford Tank Farms ventilation exhaust stacks.

  13. Heuristic Solution Approaches to the Double TSP with Multiple Stacks

    DEFF Research Database (Denmark)

    Petersen, Hanne Løhmann

    2006-01-01

    This paper introduces the Double Travelling Salesman Problem with Multiple Stacks and presents a three different metaheuristic approaches to its solution. The Double Travelling Salesman Problem with Multiple Stacks is concerned with finding the shortest route performing pickups and deliveries...

  14. Heuristic Solution Approaches to the Double TSP with Multiple Stacks

    DEFF Research Database (Denmark)

    Petersen, Hanne Løhmann

    This paper introduces the Double Travelling Salesman Problem with Multiple Stacks and presents a three different metaheuristic approaches to its solution. The Double Travelling Salesman Problem with Multiple Stacks is concerned with finding the shortest route performing pickups and deliveries...

  15. Experimental Determination of Major Element Diffusivity in Natural High-K Calc-alkaline Melts

    Science.gov (United States)

    González-García, D.; Behrens, H.; Vetere, F. P.; Petrelli, M.; Zezza, A.; Morgavi, D.; Perugini, D.

    2016-12-01

    Chemical diffusion is of major importance in several magmatic processes and, as a time dependent process, can be used as a timescale indicator. In particular, the study of diffusive exchange in magma mixing events leading to explosive volcanic eruptions has the potential shed light on timescales involved in such processes. To achieve this, a basic knowledge of diffusion rates in different natural silicate melts with a variety of conditions is mandatory. We use a set of diffusion couple experiments to quantify the influence of dissolved water content in the interdiffusion of major elements between two natural high-K calc-alkaline end-members: a shoshonite and a rhyolite from Vulcano island (Aeolian archipelago, Italy). Experiments are run using AuPd alloy capsules at 1200 °C and pressures of 0.5, 1 and 3 kbar, with variable added water content (`nominally dry', 1wt. % and 2 wt.% H2O), and finished by a rapid quench in order to avoid crystal formation. Run products are analyzed by FTIR spectroscopy and electron microprobe, and final diffusion coefficients are obtained from the evaluation of composition-distance profiles by a modified Boltzmann-Matano analysis. Among measured major elements (Si, Ti, Al, Fe, Mg, Ca, K), dissolved H2O content in the melt has the highest influence in diffusivity in our experimental setup: a difference of up to 1.4 orders of magnitude is observed between 0.3 and 2 wt. % H2O bearing glasses. In the investigated range, enhancement of diffusion is higher in the lower water contents and slightly diminishes to 2 wt. %. Compositional gradients result in a 0.4 to 0.8 log units increase of diffusivity in the mafic terms relative to the silicic ones. Si and Ti are the slowest diffusing components. Al is also a slow diffusing component and displays uphill diffusion. The diffusivities of the other elements follow similar behavior, suggesting a strong influence of crossed diffusion and coupling.

  16. Preparation of Fuel Cell Stack Based on Fision Membrane

    OpenAIRE

    Pujiastuti, Sri; Rahimi, Elsy; Hendrana, Sunit

    2009-01-01

    Preparation of single fuel cell stack using fision membrane of local materials has been done. In this research, beside preparation of fuel cell stack, the engineering side in the preparation of fuel cell stack also explored. The crucial steps of this research were on preparation of Membrane Electrode Assembly (MEA), stack construction, and flow field design used to distribute the fuel of hydrogen gas. The first two cases will be explained technically, but the third case, flow field design, wi...

  17. DEVS Models of Palletized Ground Stacking in Storeyed Grain Warehouse

    Directory of Open Access Journals (Sweden)

    Hou Shu-Yi

    2016-01-01

    Full Text Available Processed grain stored in storeyed warehouse is generally stacked on the ground without pallets. However, in order to improve the storing way, we developed a new stacking method, palletized ground stacking. Simulation should be used to present this new storing way. DEVS provides a formalized way to describe the system model. In this paper, DEVS models of palletized ground stacking in storeyed grain warehouse are given and a simulation model is developed by AutoMod.

  18. Industrial stacks design; Diseno de chimeneas industriales

    Energy Technology Data Exchange (ETDEWEB)

    Cacheux, Luis [Instituto de Investigaciones Electricas, Cuernavaca (Mexico)

    1986-12-31

    The Instituto de Investigaciones Electricas (IIE) though its Civil Works Department, develops, under contract with CFE`s Gerencia de Proyectos Termoelectricos (Management of Fossil Power Plant Projects), a series of methods for the design of stacks, which pretends to solve the a present day problem: the stack design of the fossil power plants that will go into operation during the next coming years in the country. [Espanol] El Instituto de Investigaciones Electricas (IIE), a traves del Departamento de Ingenieria Civil, desarrolla, bajo contrato con la Gerencia de Proyectos Termoelectricos, de la Comision Federal de Electricidad (CFE), un conjunto de metodos para el diseno de chimeneas, con el que se pretende resolver un problema inmediato: el diseno de las chimeneas de las centrales termoelectricas que entraran en operacion durante los proximos anos, en el pais.

  19. Multistage Force Amplification of Piezoelectric Stacks

    Science.gov (United States)

    Xu, Tian-Bing (Inventor); Siochi, Emilie J. (Inventor); Zuo, Lei (Inventor); Jiang, Xiaoning (Inventor); Kang, Jin Ho (Inventor)

    2015-01-01

    Embodiments of the disclosure include an apparatus and methods for using a piezoelectric device, that includes an outer flextensional casing, a first cell and a last cell serially coupled to each other and coupled to the outer flextensional casing such that each cell having a flextensional cell structure and each cell receives an input force and provides an output force that is amplified based on the input force. The apparatus further includes a piezoelectric stack coupled to each cell such that the piezoelectric stack of each cell provides piezoelectric energy based on the output force for each cell. Further, the last cell receives an input force that is the output force from the first cell and the last cell provides an output apparatus force In addition, the piezoelectric energy harvested is based on the output apparatus force. Moreover, the apparatus provides displacement based on the output apparatus force.

  20. Polycrystallinity and stacking in CVD graphene.

    Science.gov (United States)

    Tsen, Adam W; Brown, Lola; Havener, Robin W; Park, Jiwoong

    2013-10-15

    Graphene, a truly two-dimensional hexagonal lattice of carbon atoms, possesses remarkable properties not seen in any other material, including ultrahigh electron mobility, high tensile strength, and uniform broadband optical absorption. While scientists initially studied its intrinsic properties with small, mechanically exfoliated graphene crystals found randomly, applying this knowledge would require growing large-area films with uniform structural and physical properties. The science of graphene has recently experienced revolutionary change, mainly due to the development of several large-scale growth methods. In particular, graphene synthesis by chemical vapor deposition (CVD) on copper is a reliable method to obtain films with mostly monolayer coverage. These films are also polycrystalline, consisting of multiple graphene crystals joined by grain boundaries. In addition, portions of these graphene films contain more than one layer, and each layer can possess a different crystal orientation and stacking order. In this Account, we review the structural and physical properties that originate from polycrystallinity and stacking in CVD graphene. To begin, we introduce dark-field transmission electron microscopy (DF-TEM), a technique which allows rapid and accurate imaging of key structural properties, including the orientation of individual domains and relative stacking configurations. Using DF-TEM, one can easily identify "lateral junctions," or grain boundaries between adjacent domains, as well as "vertical junctions" from the stacking of graphene multilayers. With this technique, we can distinguish between oriented (Bernal or rhombohedral) and misoriented (twisted) configurations. The structure of lateral junctions in CVD graphene is sensitive to growth conditions and is reflected in the material's electrical and mechanical properties. In particular, grain boundaries in graphene grown under faster reactant flow conditions have no gaps or overlaps, unlike more

  1. System for inspection of stacked cargo containers

    Science.gov (United States)

    Derenzo, Stephen [Pinole, CA

    2011-08-16

    The present invention relates to a system for inspection of stacked cargo containers. One embodiment of the invention generally comprises a plurality of stacked cargo containers arranged in rows or tiers, each container having a top, a bottom a first side, a second side, a front end, and a back end; a plurality of spacers arranged in rows or tiers; one or more mobile inspection devices for inspecting the cargo containers, wherein the one or more inspection devices are removeably disposed within the spacers, the inspection means configured to move through the spacers to detect radiation within the containers. The invented system can also be configured to inspect the cargo containers for a variety of other potentially hazardous materials including but not limited to explosive and chemical threats.

  2. Annular feed air breathing fuel cell stack

    Science.gov (United States)

    Wilson, Mahlon S.

    1996-01-01

    A stack of polymer electrolyte fuel cells is formed from a plurality of unit cells where each unit cell includes fuel cell components defining a periphery and distributed along a common axis, where the fuel cell components include a polymer electrolyte membrane, an anode and a cathode contacting opposite sides of the membrane, and fuel and oxygen flow fields contacting the anode and the cathode, respectively, wherein the components define an annular region therethrough along the axis. A fuel distribution manifold within the annular region is connected to deliver fuel to the fuel flow field in each of the unit cells. In a particular embodiment, a single bolt through the annular region clamps the unit cells together. In another embodiment, separator plates between individual unit cells have an extended radial dimension to function as cooling fins for maintaining the operating temperature of the fuel cell stack.

  3. Development of on-site PAFC stacks

    Energy Technology Data Exchange (ETDEWEB)

    Hotta, K.; Matsumoto, Y. [Kansai Electric Power Co., Amagasaki (Japan); Horiuchi, H.; Ohtani, T. [Mitsubishi Electric Corp., Kobe (Japan)

    1996-12-31

    PAFC (Phosphoric Acid Fuel Cell) has been researched for commercial use and demonstration plants have been installed in various sites. However, PAFC don`t have a enough stability yet, so more research and development must be required in the future. Especially, cell stack needs a proper state of three phases (liquid, gas and solid) interface. It is very difficult technology to keep this condition for a long time. In the small size cell with the electrode area of 100 cm{sup 2}, gas flow and temperature distributions show uniformity. But in the large size cell with the electrode area of 4000 cm{sup 2}, the temperature distributions show non-uniformity. These distributions would cause to be shorten the cell life. Because these distributions make hot-spot and gas poverty in limited parts. So we inserted thermocouples in short-stack for measuring three-dimensional temperature distributions and observed effects of current density and gas utilization on temperature.

  4. Sport stacking motor intervention programme for children with ...

    African Journals Online (AJOL)

    The purpose of this study was to explore sport stacking as an alternative intervention approach with typically developing children and in addition to improve DCD. Sport stacking consists of participants stacking and unstacking 12 specially designed plastic cups in predetermined sequences in as little time as possible.

  5. Notes on G-theory of Deligne-Mumford stacks

    OpenAIRE

    Toen, B.

    1999-01-01

    Based on the methods used by the author to prove the Riemann-Roch formula for algebraic stacks, this paper contains a description of the rationnal G-theory of Deligne-Mumford stacks over general bases. We will use these results to study equivariant K-theory, and also to define new filtrations on K-theory of algebraic stacks.

  6. IMPLEMENTING A STACK AS A DELAY-INSENSITIVE CIRCUIT

    NARCIS (Netherlands)

    JOSEPHS, MB; UDDING, JT; Furber, S; Edwards, M

    1993-01-01

    A case study in delay-insensitive circuit design is presented. A one bit wide stack is decomposed into an array of elements in a way that minimizes the response time of the stack to pushes and pops. The stack and element are specified in D-I Algebra and the correctness of the decomposition is proved

  7. In-Plane Stacking Disorder in Polydisperse Hard Sphere Crystals

    NARCIS (Netherlands)

    Meijer, J.M.; de Villeneuve, V.W.A.; Petukhov, A.V.

    2007-01-01

    We demonstrate that in random-stacking hard-sphere colloidal crystals the stacking disorder not only exists in the direction perpendicular to the close-packed layers, but also extends in the lateral direction. The existence of such in-plane stacking disorder is suggested by a recent observation of

  8. Sensory gating in primary insomnia.

    Science.gov (United States)

    Hairston, Ilana S; Talbot, Lisa S; Eidelman, Polina; Gruber, June; Harvey, Allison G

    2010-06-01

    Although previous research indicates that sleep architecture is largely intact in primary insomnia (PI), the spectral content of the sleeping electroencephalographic trace and measures of brain metabolism suggest that individuals with PI are physiologically more aroused than good sleepers. Such observations imply that individuals with PI may not experience the full deactivation of sensory and cognitive processing, resulting in reduced filtering of external sensory information during sleep. To test this hypothesis, gating of sensory information during sleep was tested in participants with primary insomnia (n = 18) and good sleepers (n = 20). Sensory gating was operationally defined as (i) the difference in magnitude of evoked response potentials elicited by pairs of clicks presented during Wake and Stage II sleep, and (ii) the number of K complexes evoked by the same auditory stimulus. During wake the groups did not differ in magnitude of sensory gating. During sleep, sensory gating of the N350 component was attenuated and completely diminished in participants with insomnia. P450, which occurred only during sleep, was strongly gated in good sleepers, and less so in participants with insomnia. Additionally, participants with insomnia showed no stimulus-related increase in K complexes. Thus, PI is potentially associated with impaired capacity to filter out external sensory information, especially during sleep. The potential of using stimulus-evoked K complexes as a biomarker for primary insomnia is discussed.

  9. Role of stacking disorder in ice nucleation

    Science.gov (United States)

    Lupi, Laura; Hudait, Arpa; Peters, Baron; Grünwald, Michael; Gotchy Mullen, Ryan; Nguyen, Andrew H.; Molinero, Valeria

    2017-11-01

    The freezing of water affects the processes that determine Earth’s climate. Therefore, accurate weather and climate forecasts hinge on good predictions of ice nucleation rates. Such rate predictions are based on extrapolations using classical nucleation theory, which assumes that the structure of nanometre-sized ice crystallites corresponds to that of hexagonal ice, the thermodynamically stable form of bulk ice. However, simulations with various water models find that ice nucleated and grown under atmospheric temperatures is at all sizes stacking-disordered, consisting of random sequences of cubic and hexagonal ice layers. This implies that stacking-disordered ice crystallites either are more stable than hexagonal ice crystallites or form because of non-equilibrium dynamical effects. Both scenarios challenge central tenets of classical nucleation theory. Here we use rare-event sampling and free energy calculations with the mW water model to show that the entropy of mixing cubic and hexagonal layers makes stacking-disordered ice the stable phase for crystallites up to a size of at least 100,000 molecules. We find that stacking-disordered critical crystallites at 230 kelvin are about 14 kilojoules per mole of crystallite more stable than hexagonal crystallites, making their ice nucleation rates more than three orders of magnitude higher than predicted by classical nucleation theory. This effect on nucleation rates is temperature dependent, being the most pronounced at the warmest conditions, and should affect the modelling of cloud formation and ice particle numbers, which are very sensitive to the temperature dependence of ice nucleation rates. We conclude that classical nucleation theory needs to be corrected to include the dependence of the crystallization driving force on the size of the ice crystallite when interpreting and extrapolating ice nucleation rates from experimental laboratory conditions to the temperatures that occur in clouds.

  10. A Reference Stack for PHM Architectures

    Science.gov (United States)

    2014-10-02

    ontology , the BCA should investigate existing ontologies in the organization and look to expand them with PHM terminology . Barring that, the effort needs...3.3.2. 2.7. Condition Monitoring Framework Another way to partition a PHM architecture is by its ontological elements. There is a description and...building a table such as Table 1 creates the PHM ontology for an enterprise. In the stack that is introduced in Section 3, it is viewed that the

  11. Text-Filled Stacked Area Graphs

    DEFF Research Database (Denmark)

    Kraus, Martin

    2011-01-01

    Text can add a significant amount of detail and value to an information visualization. In particular, it can integrate more of the data that a visualization is based on, and it can also integrate information that is personally relevant to readers of a visualization. This may influence readers to ...... solutions for the design of text-filled stacked area graphs with the help of an exemplary visualization of the genres, publication years, and titles of a database of several thousand PC games....

  12. A rigorous simulation based study of gate misalignment effects in gate engineered double-gate (DG) MOSFETs

    Science.gov (United States)

    Sarangi, Santunu; Bhushan, Shiv; Santra, Abirmoya; Dubey, Sarvesh; Jit, Satyabrata; Tiwari, Pramod Kumar

    2013-08-01

    The double-gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) are the front runner among the sub-100 nm devices because both front and back gate of DG MOSFETs control the channel region simultaneously. However, alignment between the front and back gate is an issue of concern during fabrication because its influences are baleful for device performance. Further, the issue of alignment between front and back gates assumes greater seriousness for gate engineered DG MOSFETs, like double material double gate (DMDG) or triple material double gate (TMDG) MOSFETs for improving the device performance. In this paper, we present a numerical simulation based study on the effects of gate misalignment between the front and the back gate for gate engineered double-gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). Both source side misalignment (SSM) and drain side misalignment (DSM) of different lengths in the back gate have been considered to investigate the effects of gate misalignment on device performance. In this context, an extensive simulation has been performed by a commercially available two-dimensional (2D) device simulator (ATLAS™, SILVACO Int.) to figure out the impacts of misalignment on device characteristics like surface potential, threshold voltage, drain-induced-barrier lowering (DIBL), subthreshold swing, subthreshold current, maximum drain current, transconductance and output conductance.

  13. Probing/Manipulating the Interfacial Atomic Bonding between High k Dielectrics and InGaAs for Ultimate CMOS

    Science.gov (United States)

    2015-04-24

    10.1039/C4CE00734D 2014 3. “III-V Compound Semiconductor Transistors – From Planar to Nanowire Structures”, H. Riel, L.-E. Wernersson, M. Hong, J...extract interface state densities at atomic-layer-deposited high-k dielectric/III-V heterostructures ”, Y. T. Fanchiang, Y. K. Su, K. S. Chen, Y. C

  14. Electrochemical Detection in Stacked Paper Networks.

    Science.gov (United States)

    Liu, Xiyuan; Lillehoj, Peter B

    2015-08-01

    Paper-based electrochemical biosensors are a promising technology that enables rapid, quantitative measurements on an inexpensive platform. However, the control of liquids in paper networks is generally limited to a single sample delivery step. Here, we propose a simple method to automate the loading and delivery of liquid samples to sensing electrodes on paper networks by stacking multiple layers of paper. Using these stacked paper devices (SPDs), we demonstrate a unique strategy to fully immerse planar electrodes by aqueous liquids via capillary flow. Amperometric measurements of xanthine oxidase revealed that electrochemical sensors on four-layer SPDs generated detection signals up to 75% higher compared with those on single-layer paper devices. Furthermore, measurements could be performed with minimal user involvement and completed within 30 min. Due to its simplicity, enhanced automation, and capability for quantitative measurements, stacked paper electrochemical biosensors can be useful tools for point-of-care testing in resource-limited settings. © 2015 Society for Laboratory Automation and Screening.

  15. Ionic thermoelectric gating organic transistors

    Science.gov (United States)

    Zhao, Dan; Fabiano, Simone; Berggren, Magnus; Crispin, Xavier

    2017-01-01

    Temperature is one of the most important environmental stimuli to record and amplify. While traditional thermoelectric materials are attractive for temperature/heat flow sensing applications, their sensitivity is limited by their low Seebeck coefficient (∼100 μV K−1). Here we take advantage of the large ionic thermoelectric Seebeck coefficient found in polymer electrolytes (∼10,000 μV K−1) to introduce the concept of ionic thermoelectric gating a low-voltage organic transistor. The temperature sensing amplification of such ionic thermoelectric-gated devices is thousands of times superior to that of a single thermoelectric leg in traditional thermopiles. This suggests that ionic thermoelectric sensors offer a way to go beyond the limitations of traditional thermopiles and pyroelectric detectors. These findings pave the way for new infrared-gated electronic circuits with potential applications in photonics, thermography and electronic-skins. PMID:28139738

  16. Discrete charge states in nanowire flash memory with multiple Ta2O5 charge-trapping stacks

    Science.gov (United States)

    Zhu, Hao; Bonevich, John E.; Li, Haitao; Richter, Curt A.; Yuan, Hui; Kirillov, Oleg; Li, Qiliang

    2014-06-01

    In this work, multi-bit flash-like memory cell based on Si nanowire field-effect transistor and multiple Ta2O5 charge-trapping stacks have been fabricated and fully characterized. The memory cells exhibited staircase, discrete charged states at small gate voltages. Such discrete multi-bit on one memory cell is attractive for high memory density. These non-volatile memory devices exhibited fast programming/erasing speed, excellent retention, and endurance, indicating the advantages of integrating the multilayer of charge-storage stacks on the nanowire channel. Such high-performance flash-like non-volatile memory can be integrated into the microprocessor chip as the local memory which requires high density and good endurance.

  17. Reading Gate Positions with a Smartphone

    Science.gov (United States)

    van Overloop, Peter-Jules; Hut, Rolf

    2015-04-01

    Worldwide many flow gates are built in water networks in order to direct water to appropriate locations. Most of these gates are adjusted manually by field operators of water management organizations and it is often centrally not known what the new position of the gate is. This makes centralized management of the entire water network difficult. One of the reasons why the measurement of the gate position is usually not executed, is that for certain gates it is not easy to do such a reading. Tilting weirs or radial gates are examples where operators need special equipment (measuring rod and long level) to determine the position and it could even be a risky procedure. Another issue is that once the measurement is done, the value is jotted down in a notebook and later, at the office, entered in a computer system. So the entire monitoring procedure is not real-time and prone to human errors. A new way of monitoring gate positions is introduced. It consists of a level that is attached to the gate and an app with which a picture can be taken from the level. Using dedicated pattern recognition algorithms, the gate position can be read by using the angle of the level versus reference points on the gate, the radius of that gate and the absolute level of the joint around which the gate turn. The method uses gps-localization of the smartphone to store the gate position in the right location in the central database.

  18. DNA base stacking: the stacked uracil/uracil and thymine/thymine minima.

    Science.gov (United States)

    Hunter, Ruairidh S; van Mourik, Tanja

    2012-10-15

    The potential energy surfaces of stacked uracil dimer (U/U) and stacked thymine dimer (T/T) have been explored at the counterpoise (CP)-corrected M06-2X/6-31+G(d) level of theory, in the gas phase and in solution (with water and, for U/U, 1,4-dioxane as the solvents) modeled by a continuum solvent using the polarizable continuum model. Potential energy scans were created by rotation of one monomer around its center-of-mass, whereas the other monomer remained still. Both face-to-back (one molecule exactly on top of the other) and face-to-face (one base molecule flipped by 180°) structures were considered. Five or six (dependent on whether CP correction is included or not) stacked uracil dimer minima and six stacked thymine dimer minima were located. A number of transition states on the U/U and T/T potential energy surfaces were likewise identified. The general effect of the continuum solvent is a flattening of the potential energy surface. Comparison of the gas-phase M06-2X/6-31+G(d) U/U interaction energies with estimated CCSD(T)/complete basis set values (where available) show the excellent performance of this functional for stacking energies. Copyright © 2012 Wiley Periodicals, Inc.

  19. A Stack Cache for Real-Time Systems

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Nielsen, Carsten

    2016-01-01

    Real-time systems need time-predictable computing platforms to allowfor static analysis of the worst-case execution time. Caches are important for good performance, but data caches arehard to analyze for the worst-case execution time. Stack allocated data has different properties related...... data cache. As stack allocated datahas a high locality, even a small stack cache gives a high hit rate. A stack cache added to a write-through data cache considerablyimproves the performance, while a stack cache compared tothe harder to analyze write-back cache has about the sameaverage case...

  20. Respiratory gating in cardiac PET

    DEFF Research Database (Denmark)

    Lassen, Martin Lyngby; Rasmussen, Thomas; Christensen, Thomas E

    2017-01-01

    BACKGROUND: Respiratory motion due to breathing during cardiac positron emission tomography (PET) results in spatial blurring and erroneous tracer quantification. Respiratory gating might represent a solution by dividing the PET coincidence dataset into smaller respiratory phase subsets. The aim...... stress (82)RB-PET. Respiratory rates and depths were measured by a respiratory gating system in addition to registering actual respiratory rates. Patients undergoing adenosine stress showed a decrease in measured respiratory rate from initial to later scan phase measurements [12.4 (±5.7) vs 5.6 (±4.......7) min(-1), P PET...

  1. A Power-Efficient 3-D On-Chip Interconnect for Multi-Core Accelerators with Stacked L2 Cache

    OpenAIRE

    Kang, Kyungsu; Park, Sangho; Lee, Jong-Bae; Benini, Luca; De Micheli, Giovanni

    2016-01-01

    The use of multi-core clusters is a promising option for data-intensive embedded applications such as multi-modal sensor fusion, image understanding, mobile augmented reality. In this paper, we propose a power-efficient 3-D on-chip interconnect for multi-core clusters with stacked L2 cache memory. A new switch design makes a circuit-switched Mesh-of-Tree (MoT) interconnect reconfigurable to support power-gating of processing cores, memory blocks, and unnecessary interconnect resources (routin...

  2. Transistor memory devices with large memory windows, using multi-stacking of densely packed, hydrophobic charge trapping metal nanoparticle array.

    Science.gov (United States)

    Cho, Ikjun; Kim, Beom Joon; Ryu, Sook Won; Cho, Jeong Ho; Cho, Jinhan

    2014-12-19

    Organic field-effect transistor (OFET) memories have rapidly evolved from low-cost and flexible electronics with relatively low-memory capacities to memory devices that require high-capacity memory such as smart memory cards or solid-state hard drives. Here, we report the high-capacity OFET memories based on the multilayer stacking of densely packed hydrophobic metal NP layers in place of the traditional transistor memory systems based on a single charge trapping layer. We demonstrated that the memory performances of devices could be significantly enhanced by controlling the adsorption isotherm behavior, multilayer stacking structure and hydrophobicity of the metal NPs. For this study, tetraoctylammonium (TOA)-stabilized Au nanoparticles (TOA-Au(NPs)) were consecutively layer-by-layer (LbL) assembled with an amine-functionalized poly(amidoamine) dendrimer (PAD). The formed (PAD/TOA-Au(NP))(n) films were used as a multilayer stacked charge trapping layer at the interface between the tunneling dielectric layer and the SiO2 gate dielectric layer. For a single AuNP layer (i.e. PAD/TOA-Au(NP))1) with a number density of 1.82 × 10(12) cm(-2), the memory window of the OFET memory device was measured to be approximately 97 V. The multilayer stacked OFET memory devices prepared with four Au(NP) layers exhibited excellent programmable memory properties (i.e. a large memory window (ΔV(th)) exceeding 145 V, a fast switching speed (1 μs), a high program/erase (P/E) current ratio (greater than 10(6)) and good electrical reliability) during writing and erasing over a relatively short time scale under an operation voltage of 100 V applied at the gate.

  3. Dynamic Model of High Temperature PEM Fuel Cell Stack Temperature

    DEFF Research Database (Denmark)

    Andreasen, Søren Juhl; Kær, Søren Knudsen

    2007-01-01

    The present work involves the development of a model for predicting the dynamic temperature of a high temperature PEM (HTPEM) fuel cell stack. The model is developed to test different thermal control strategies before implementing them in the actual system. The test system consists of a prototype...... cathode air cooled 30 cell HTPEM fuel cell stack developed at the Institute of Energy Technology at Aalborg University. This fuel cell stack uses PEMEAS Celtec P-1000 membranes, runs on pure hydrogen in a dead end anode configuration with a purge valve. The cooling of the stack is managed by running...... the stack at a high stoichiometric air flow. This is possible because of the PBI fuel cell membranes used, and the very low pressure drop in the stack. The model consists of a discrete thermal model dividing the stack into three parts: inlet, middle and end and predicting the temperatures in these three...

  4. Horizontal high speed stacking for batteries with prismatic cans

    Energy Technology Data Exchange (ETDEWEB)

    Bartos, Andrew L.; Lin, Yhu-Tin; Turner, III, Raymond D.

    2016-06-14

    A system and method for stacking battery cells or related assembled components. Generally planar, rectangular (prismatic-shaped) battery cells are moved from an as-received generally vertical stacking orientation to a generally horizontal stacking orientation without the need for robotic pick-and-place equipment. The system includes numerous conveyor belts that work in cooperation with one another to deliver, rotate and stack the cells or their affiliated assemblies. The belts are outfitted with components to facilitate the cell transport and rotation. The coordinated movement between the belts and the components promote the orderly transport and rotation of the cells from a substantially vertical stacking orientation into a substantially horizontal stacking orientation. The approach of the present invention helps keep the stacked assemblies stable so that subsequent assembly steps--such as compressing the cells or attaching electrical leads or thermal management components--may proceed with a reduced chance of error.

  5. Reversible logic gate using adiabatic superconducting devices

    National Research Council Canada - National Science Library

    Takeuchi, N; Yamanashi, Y; Yoshikawa, N

    2014-01-01

    .... However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energy-efficient logic devices...

  6. A High-Performance Top-Gated Graphene Field-Effect Transistor with Excellent Flexibility Enabled by an iCVD Copolymer Gate Dielectric.

    Science.gov (United States)

    Oh, Joong Gun; Pak, Kwanyong; Kim, Choong Sun; Bong, Jae Hoon; Hwang, Wan Sik; Im, Sung Gap; Cho, Byung Jin

    2018-03-01

    A high-performance top-gated graphene field-effect transistor (FET) with excellent mechanical flexibility is demonstrated by implementing a surface-energy-engineered copolymer gate dielectric via a solvent-free process called initiated chemical vapor deposition. The ultrathin, flexible copolymer dielectric is synthesized from two monomers composed of 1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane and 1-vinylimidazole (VIDZ). The copolymer dielectric enables the graphene device to exhibit excellent dielectric performance and substantially enhanced mechanical flexibility. The p-doping level of the graphene can be tuned by varying the polar VIDZ fraction in the copolymer dielectric, and the Dirac voltage (V Dirac ) of the graphene FET can thus be systematically controlled. In particular, the V Dirac approaches neutrality with higher VIDZ concentrations in the copolymer dielectric, which minimizes the carrier scattering and thereby improves the charge transport of the graphene device. As a result, the graphene FET with 20 nm thick copolymer dielectrics exhibits field-effect hole and electron mobility values of over 7200 and 3800 cm 2 V -1 s -1 , respectively, at room temperature. These electrical characteristics remain unchanged even at the 1 mm bending radius, corresponding to a tensile strain of 1.28%. The formed gate stack with the copolymer gate dielectric is further investigated for high-frequency flexible device applications. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. Implementation of reversible gates in FPGA structure

    Science.gov (United States)

    Pawłowski, Marek; Szymański, Zbigniew

    2017-08-01

    The paper presents reversible circuits modelling methods in the FPGA structures. Three different methods of reconfigurable reversible gate descriptions are proposed - a direct method of output calculation and two methods of composing the gate from Fredkin and Toffoli gates. The paper shows both 4-bit and 8-bit gates. Application of developed test bench verified the correctness of our designs. The presented descriptions can be used for modelling of complex elements used e.g. in cipher machines based on quantum algorithms.

  8. Nanofabrication of Arrays of Silicon Field Emitters with Vertical Silicon Nanowire Current Limiters and Self-Aligned Gates

    Science.gov (United States)

    2016-08-19

    surrounds the nanowires . After the deposition of the dielectric stack, a self-aligned polysilicon gate is defined. A timed etch of the nitride is performed... tunneling through the sur- face barrier . Small deviations from a linear relationship could be due to quantum effects in the emitter tip [33], a non...triangular tunneling barrier due to emitter geometry, or space charge limitation following Child’s law [34]. The saturation of the anode current observed in

  9. Bill Gates eyes healthcare market.

    Science.gov (United States)

    Dunbar, C

    1995-02-01

    The entrepreneurial spirit is still top in Bill Gates' mind as he look toward healthcare and other growth industries. Microsoft's CEO has not intention of going the way of other large technology companies that became obsolete before they could compete today.

  10. Top gate ZnO-Al2O3 thin film transistors fabricated using a chemical bath deposition technique

    Science.gov (United States)

    Gogoi, Paragjyoti; Saikia, Rajib; Changmai, Sanjib

    2015-04-01

    ZnO thin films were prepared by a simple chemical bath deposition technique using an inorganic solution mixture of ZnCl2 and NH3 on glass substrates and then were used as the active material in thin film transistors (TFTs). The TFTs were fabricated in a top gate coplanar electrode structure with high-k Al2O3 as the gate insulator and Al as the source, drain and gate electrodes. The TFTs were annealed in air at 500 °C for 1 h. The TFTs with a 50 μm channel length exhibited a high field-effect mobility of 0.45 cm2/(V·s) and a low threshold voltage of 1.8 V. The sub-threshold swing and drain current ON-OFF ratio were found to be 0.6 V/dec and 106, respectively.

  11. Flux interactions on stacked Josephson junctions

    DEFF Research Database (Denmark)

    Scott, Alwyn C.; A., Petraglia

    1996-01-01

    Perturbation methods are used to study the dynamics of locked fluxon modes on stacked Josephson junctions and single crystals of certain high-T-c, superconductors. Two limiting cases are considered: (i) The nonlinear diffusion regime in which fluxon dynamics are dominated by energy exchange between...... the bias and loss parameters, and (ii) the propagating regime in which the interplay between magnetic and electric field energies governs the fluxon dynamics. Conditions for stability of locked fluxon modes are shown to be different in these two regimes....

  12. Improved Direct Methanol Fuel Cell Stack

    Science.gov (United States)

    Wilson, Mahlon S.; Ramsey, John C.

    2005-03-08

    A stack of direct methanol fuel cells exhibiting a circular footprint. A cathode and anode manifold, tie-bolt penetrations and tie-bolts are located within the circular footprint. Each fuel cell uses two graphite-based plates. One plate includes a cathode active area that is defined by serpentine channels connecting the inlet and outlet cathode manifold. The other plate includes an anode active area defined by serpentine channels connecting the inlet and outlet of the anode manifold, where the serpentine channels of the anode are orthogonal to the serpentine channels of the cathode. Located between the two plates is the fuel cell active region.

  13. Fluxon dynamics in three stacked Josephson junctions

    DEFF Research Database (Denmark)

    Gorria, Carlos; Christiansen, Peter Leth; Gaididei, Yuri Borisovich

    2002-01-01

    /sub -/, the coupling between junctions leads to a repulsion of the fluxons with the same polarity. Above this critical velocity a fluxon will induce radiation in the neighboring junctions, leading to a bunching of the fluxons in the stacked junctions. Using the Sakai-Bodin-Pedersen model, three coupled perturbed sine......-Gordon equations are numerically studied for different values of coupling, damping, and bias parameters. In a narrow range of velocities bunching occurs. Outside this interval the fluxons split and new fluxons may be created. I-V characteristics are presented...

  14. Compliant Glass Seals for SOFC Stacks

    Energy Technology Data Exchange (ETDEWEB)

    Chou, Yeong -Shyung [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Choi, Jung-Pyung [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Xu, Wei [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Stephens, Elizabeth V. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Koeppel, Brian J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Stevenson, Jeffry W. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Lara-Curzio, Edgar [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

    2014-04-30

    This report summarizes results from experimental and modeling studies performed by participants in the Solid-State Energy Conversion Alliance (SECA) Core Technology Program, which indicate that compliant glass-based seals offer a number of potential advantages over conventional seals based on de-vitrifying glasses, including reduced stresses during stack operation and thermal cycling, and the ability to heal micro-damage induced during thermal cycling. The properties and composition of glasses developed and/or investigated in these studies are reported, along with results from long-term (up to 5,800h) evaluations of seals based on a compliant glass containing ceramic particles or ceramic fibers.

  15. The Study of Electrical Properties for Multilayer La2O3/Al2O3 Dielectric Stacks and LaAlO3 Dielectric Film Deposited by ALD.

    Science.gov (United States)

    Feng, Xing-Yao; Liu, Hong-Xia; Wang, Xing; Zhao, Lu; Fei, Chen-Xi; Liu, He-Lei

    2017-12-01

    The capacitance and leakage current properties of multilayer La2O3/Al2O3 dielectric stacks and LaAlO3 dielectric film are investigated in this paper. A clear promotion of capacitance properties is observed for multilayer La2O3/Al2O3 stacks after post-deposition annealing (PDA) at 800 °C compared with PDA at 600 °C, which indicated the recombination of defects and dangling bonds performs better at the high-k/Si substrate interface for a higher annealing temperature. For LaAlO3 dielectric film, compared with multilayer La2O3/Al2O3 dielectric stacks, a clear promotion of trapped charges density (N ot) and a degradation of interface trap density (D it) can be obtained simultaneously. In addition, a significant improvement about leakage current property is observed for LaAlO3 dielectric film compared with multilayer La2O3/Al2O3 stacks at the same annealing condition. We also noticed that a better breakdown behavior for multilayer La2O3/Al2O3 stack is achieved after annealing at a higher temperature for its less defects.

  16. A new method of dielectric characterization in the microwave range for high-k ferroelectric thin films

    OpenAIRE

    Nadaud, Kevin; Gundel, Hartmut,; Borderon, Caroline; Gillard, Raphaël; Fourn, Erwan

    2013-01-01

    International audience; In this paper we propose a new method of dielectric characterization of high-k thin films based on the measurement of coplanar capacitor inserts between two coplanar waveguide transmission lines. The measurement geometry is deposed on the thin film which is elaborate on an insulating substrate. The thin film permittivity is extracted with the help of a mathematical model describing the capacitance between two conductor plates deposed on a 2-layers substrate. A simple c...

  17. Sampled-time control of a microbial fuel cell stack

    Science.gov (United States)

    Boghani, Hitesh C.; Dinsdale, Richard M.; Guwy, Alan J.; Premier, Giuliano C.

    2017-07-01

    Research into microbial fuel cells (MFCs) has reached the point where cubic metre-scale systems and stacks are being built and tested. Apart from performance enhancement through catalysis, materials and design, an important research area for industrial applicability is stack control, which can enhance MFCs stack power output. An MFC stack is controlled using a sampled-time digital control strategy, which has the advantage of intermittent operation with consequent power saving, and when used in a hybrid series stack connectivity, can avoid voltage reversals. A MFC stack comprising four tubular MFCs was operated hydraulically in series. Each MFC was connected to an independent controller and the stack was connected electrically in series, creating a hybrid-series connectivity. The voltage of each MFC in the stack was controlled such that the overall series stack voltage generated was the algebraic sum (1.26 V) of the individual MFC voltages (0.32, 0.32, 0.32 and 0.3). The controllers were able to control the individual voltages to the point where 2.52 mA was drawn from the stack at a load of 499.9 Ω (delivering 3.18 mW). The controllers were able to reject the disturbances and perturbations caused by electrical loading, temperature and substrate concentration.

  18. A Review on Resistive Switching in High-k Dielectrics: A Nanoscale Point of View Using Conductive Atomic Force Microscope

    Directory of Open Access Journals (Sweden)

    Mario Lanza

    2014-03-01

    Full Text Available Metal-Insulator-Metal (MIM structures have raised as the most promising configuration for next generation information storage, leading to great performance and fabrication-friendly Resistive Random Access Memories (RRAM. In these cells, the memory concept is no more based on the charge storage, but on tuning the electrical resistance of the insulating layer by applying electrical stresses to reach a high resistive state (HRS or “0” and a low resistive state (LRS or “1”, which makes the memory point. Some high-k dielectrics show this unusual property and in the last years high-k based RRAM have been extensively analyzed, especially at the device level. However, as resistance switching (in the most promising cells is a local phenomenon that takes place in areas of ~100 nm2, the use of characterization tools with high lateral spatial resolution is necessary. In this paper the status of resistive switching in high-k materials is reviewed from a nanoscale point of view by means of conductive atomic force microscope analyses.

  19. Annular feed air breathing fuel cell stack

    Science.gov (United States)

    Wilson, Mahlon S.; Neutzler, Jay K.

    1997-01-01

    A stack of polymer electrolyte fuel cells is formed from a plurality of unit cells where each unit cell includes fuel cell components defining a periphery and distributed along a common axis, where the fuel cell components include a polymer electrolyte membrane, an anode and a cathode contacting opposite sides of the membrane, and fuel and oxygen flow fields contacting the anode and the cathode, respectively, wherein the components define an annular region therethrough along the axis. A fuel distribution manifold within the annular region is connected to deliver fuel to the fuel flow field in each of the unit cells. The fuel distribution manifold is formed from a hydrophilic-like material to redistribute water produced by fuel and oxygen reacting at the cathode. In a particular embodiment, a single bolt through the annular region clamps the unit cells together. In another embodiment, separator plates between individual unit cells have an extended radial dimension to function as cooling fins for maintaining the operating temperature of the fuel cell stack.

  20. Stacking Analysis of Binary Systems with HAWC

    Science.gov (United States)

    Brisbois, Chad; HAWC Collaboration

    2017-01-01

    Detecting binary systems at TeV energies is an important problem because only a handful of such systems are currently known. The nature of such systems is typically thought to be composed of a compact object and a massive star. The TeV emission from these systems does not obviously correspond to emission in GeV or X-ray, where many binary systems have previously been found. This study focuses on a stacking method to detect TeV emission from LS 5039, a known TeV binary, to test its efficacy in HAWC data. Stacking is a widely employed method for increasing signal to noise ratio in optical astronomy, but has never been attempted previously with HAWC. HAWC is an ideal instrument to search for TeV binaries, because of its wide field of view and high uptime. Applying this method to the entire sky may allow HAWC to detect binary sources of very short or very long periods not sensitive to current analyses. NSF, DOE, Los Alamos, Michigan Tech, CONACyt, UNAM, BUAP.

  1. Stacking interactions and the twist of DNA

    DEFF Research Database (Denmark)

    Cooper, V.R.; Thonhauser, T.; Puzder, A.

    2008-01-01

    The importance of stacking interactions for the Twist and stability of DNA is investigated using the fully ab initio van der Waals density functional (vdW-DF).(1,2) Our results highlight the role that binary interactions between adjacent sets of base pairs play in defining the sequence-dependent ......The importance of stacking interactions for the Twist and stability of DNA is investigated using the fully ab initio van der Waals density functional (vdW-DF).(1,2) Our results highlight the role that binary interactions between adjacent sets of base pairs play in defining the sequence......-dependent Twists observed in high-resolution experiments. Furthermore, they demonstrate that additional stability gained by the presence of thymine is due to methyl interactions with neighboring bases, thus adding to our understanding of the mechanisms that contribute to the relative stability of DNA and RNA. Our...... mapping of the energy required to twist each of the 10 unique base pair steps should provide valuable information for future studies of nucleic acid stability and dynamics. The method introduced will enable the nonempirical theoretical study of significantly larger pieces of DNA or DNA/amino acid...

  2. Tolerance Stack Analysis in Francis Turbine Design

    Directory of Open Access Journals (Sweden)

    Indra Djodikusumo

    2010-05-01

    Full Text Available The tolerance stacking problem arises in the context of assemblies from interchangeable parts because of the inability to produce or to join parts exactly according to nominal dimensions. Either the relevant part’s dimension varies around some nominal values from part to part or the act of assembly that leads to variation. For example, as runner of Francis turbine is joined with turbine shaft via mechanical lock, there is not only variation in the diameter of runner and the concentricity between the runner hole and turbine shaft, but also the variation in concentricity between the outer parts of runner to runner hole. Thus, there is the possibility that the assembly of such interacting parts won’t function or won’t come together as planned. Research in this area has been conducted and 2 mini hydro Francis turbines (800 kW and 910 kW have been designed and manufactured for San Sarino and Sawi Dago 2 in Central Sulawesi. Experiences in analyzing the tolerance stacks have been documented. In this paper it will be demonstrated how the requirements of assembling performance are derived to be the designed tolerances of each interacting component, such a way that the assembling would be functioning and come together as planned.

  3. Colorimetric stack pad immunoassay for bacterial identification.

    Science.gov (United States)

    Eltzov, Evgeni; Marks, Robert S

    2017-01-15

    A new colorimetric immunoassay concept, utilizing conventional lateral flow membranes (e.g., conjugation, sample, absorption and nitrocellulose), were placed in a different configuration in a stacking manner, where the liquid sample that may contain the analyte diffuses from the bottom to the upper-most layer. The key element of this proprietary technology is a capture layer, where a nitrocellulose membrane is modified with the target analyte of interest, namely in this study target Escherichia coli. During the immunoassay operation, samples contaminated with the target bacteria will conjugate to their corresponding HRP-antibodies laying in wait and the immune-target measurand complex flows by capillarity towards the upper-most layer to generate a colorimetric signal (positive answer) through an enzymatic reaction. In target-free samples, previously immobilized target bacteria on the capture layer will prevent the HRP-labeled anti-target antibodies from migrating to the upper-most layer, where the enzymatic substrate lays in wait. After optimization, the sensitivity of this approach was found to be 1,000 folds higher than ELISAs (102cellsmL-1). The advantages of the stacked pad assay include: miniaturization, operational simplicity, fast response time (less than 5min), useful sensitivity. Copyright © 2016 Elsevier B.V. All rights reserved.

  4. Renewal of the separate type pool gate

    Energy Technology Data Exchange (ETDEWEB)

    Ohhashi, Nobuyoshi; Izumo, Hironobu; Kameyama, Iwao; Isaka, Masaki; Nakamura, Kiyoshi [Japan Atomic Energy Research Inst., Tokai, Ibaraki (Japan). Tokai Research Establishment; Monden, Yoshihiro; Tazura, Akio

    1999-10-01

    As a part of the modification of JRR-4, the pool gate was renewed. The pool gate is separated into two parts with packing on the both contact faces, and holds the pool water by the pressure caused by a difference of the water levels. The structure and the principle are so simple that treatment of the pool gate is easy. However, it is very difficult to secure the watertight performance of this gate type. Because the uneven and meandering easily occurred in the surface of the packing, in the former pool gate leakage of the pool water from the separate parts of the gate often occurred. Besides, the selection width of rubber material to conform was very small. In renewal of the pool gate, the mock-up experiment of the packing parts was performed. Based on the results, the new pool gate was designed and installed. The new seal structure developed for the new gate was confirmed to have a high watertight performance even under the condition of very low pool water level. And the loads which hung on the packing is decreased in the new developed packing structure. High watertight performance of the new pool gate was confirmed by the leak tests after installation. This report gives the development of the new pool gate with high watertight performance and the construction of it. (author)

  5. Description of gasket failure in a 7 cell PEMFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Husar, Attila; Serra, Maria [Institut de Robotica i Informatica Industrial, Parc Tecnologic de Barcelona, Edifici U, C. Llorens i Artigas, 4-6, 2a Planta, 08028 Barcelona (Spain); Kunusch, Cristian [Laboratorio de Electronica Industrial Control e Instrumentacion, Facultad de Ingenieria, UNLP (Argentina)

    2007-06-10

    This article presents the data and the description of a fuel cell stack that failed due to gasket degradation. The fuel cell under study is a 7 cell stack. The unexpected change in several variables such as temperature, pressure and voltage indicated the possible failure of the stack. The stack was monitored over a 6 h period in which data was collected and consequently analyzed to conclude that the fuel cell stack failed due to a crossover leak on the anode inlet port located on the cathode side gasket of cell 2. This stack failure analysis revealed a series of indicators that could be used by a super visional controller in order to initiate a shutdown procedure. (author)

  6. Simple Stacking Methods for Silicon Micro Fuel Cells

    Directory of Open Access Journals (Sweden)

    Gianmario Scotti

    2014-08-01

    Full Text Available We present two simple methods, with parallel and serial gas flows, for the stacking of microfabricated silicon fuel cells with integrated current collectors, flow fields and gas diffusion layers. The gas diffusion layer is implemented using black silicon. In the two stacking methods proposed in this work, the fluidic apertures and gas flow topology are rotationally symmetric and enable us to stack fuel cells without an increase in the number of electrical or fluidic ports or interconnects. Thanks to this simplicity and the structural compactness of each cell, the obtained stacks are very thin (~1.6 mm for a two-cell stack. We have fabricated two-cell stacks with two different gas flow topologies and obtained an open-circuit voltage (OCV of 1.6 V and a power density of 63 mW·cm−2, proving the viability of the design.

  7. Marmote SDR: Experimental Platform for Low-Power Wireless Protocol Stack Research

    Directory of Open Access Journals (Sweden)

    Ákos Lédeczi

    2013-09-01

    Full Text Available Over the past decade, wireless sensor network research primarily relied on highly-integrated commercial off-the-shelf radio chips. The rigid silicon implementation of the radio stack restricted access to the lower layers; thus, research focused mainly on the medium access control (MAC layer and above. SRAM field-programmable gate array (FPGA-based software-defined radios (SDR, on the other hand, provide a flexible architecture to experiment with any and all layers of the radio stack, but usually require desktop computers and draw high currents that prohibit mobile or longer-term outdoor deployments. To address these issues, we have developed a modular flash FPGA-based wireless research platform, called Marmote SDR, that has computational resources comparable to those of SRAM FPGA-based radio platforms, but at a reduced power consumption, with duty cycling support. We discuss the design decisions underlying Marmote SDR and evaluate its power consumption. Furthermore, we present and evaluate an asynchronous and multiple access communication protocol specifically designed for data-gathering wireless sensor networks.

  8. Stacked Heterogeneous Neural Networks for Time Series Forecasting

    Directory of Open Access Journals (Sweden)

    Florin Leon

    2010-01-01

    Full Text Available A hybrid model for time series forecasting is proposed. It is a stacked neural network, containing one normal multilayer perceptron with bipolar sigmoid activation functions, and the other with an exponential activation function in the output layer. As shown by the case studies, the proposed stacked hybrid neural model performs well on a variety of benchmark time series. The combination of weights of the two stack components that leads to optimal performance is also studied.

  9. Quadratic forms and Clifford algebras on derived stacks

    OpenAIRE

    Vezzosi, Gabriele

    2013-01-01

    In this paper we present an approach to quadratic structures in derived algebraic geometry. We define derived n-shifted quadratic complexes, over derived affine stacks and over general derived stacks, and give several examples of those. We define the associated notion of derived Clifford algebra, in all these contexts, and compare it with its classical version, when they both apply. Finally, we prove three main existence results for derived shifted quadratic forms over derived stacks, define ...

  10. Use of impedance tagging to monitor fuel cell stack performance

    Science.gov (United States)

    Silva, Gregory

    Fuel cells are electrochemical device that are traditionally assembled in stacks to perform meaningful work. Monitoring the state of the stack is vitally important to ensure that it is operating efficiently and that constituent cells are not failing for one of a several common reasons including membrane dehydration, gas diffusion layer flooding, reactant starvation, and physical damage. Current state-of-the-art monitoring systems are costly and require at least one connection per cell on the stack, which introduces reliability concerns for stacks consisting of hundreds of cells. This thesis presents a novel approach for diagnosing problems in a fuel cell stack that attempts to reduce the cost and complexity of monitoring cells in a stack. The proposed solution modifies the electrochemical impedance spectroscopy (EIS) response of each cell in the stack by connecting an electrical tag in parallel with each cell. This approach allows the EIS response of the entire stack to identify and locate problems in the stack. Capacitors were chosen as tags because they do not interfere with normal stack operation and because they can generate distinct stack EIS responses. An experiment was performed in the Center for Automation Technologies an Systems (CATS) fuel cell laboratory at Rensselaer Polytechnic Institute (RPI) to perform EIS measurements on a single cell with and without capacitor tags to investigate the proposed solution. The EIS data collected from this experiment was used to create a fuel cell model to investigate the proposed solution under ideal conditions. This thesis found that, although the concept shows some promise in simulations, significant obstacles to implementing the proposed solution. Observed EIS response when the capacitor tags were connected did not match the expected EIS response. Constraints on the capacitor tags found by the model impose significant manufacturing challenges to the proposed solution. Further development of the proposed solution is

  11. Solid oxide cell stack and method for preparing same

    DEFF Research Database (Denmark)

    2012-01-01

    A method for producing and reactivating a solid oxide cell stack structure by providing a catalyst precursor in at least one of the electrode layers by impregnation and subsequent drying after the stack has been assembled and initiated. Due to a significantly improved performance and an unexpecte...... voltage improvement this solid oxide cell stack structure is particularly suitable for use in solid oxide fuel cell (SOFC) and solid oxide electrolysing cell (SOEC) applications....

  12. Development of the electric utility dispersed use PAFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Horiuchi, Hiroshi; Kotani, Ikuo [Mitsubishi Electric Co., Kobe (Japan); Morotomi, Isamu [Kansai Electric Power Co., Hyogo (Japan)] [and others

    1996-12-31

    Kansai Electric Power Co. and Mitsubishi Electric Co. have been developing the electric utility dispersed use PAFC stack operated under the ambient pressure. The new cell design have been developed, so that the large scale cell (1 m{sup 2} size) was adopted for the stack. To confirm the performance and the stability of the 1 m{sup 2} scale cell design, the short stack study had been performed.

  13. Compact bipolar plate-free direct methanol fuel cell stacks.

    Science.gov (United States)

    Dong, Xue; Takahashi, Motohiro; Nagao, Masahiro; Hibino, Takashi

    2011-05-14

    Fuel cells with a PtAu/C anode and a Pr-doped Mn(2)O(3)/C cathode were stacked without using a bipolar plate, and their discharge properties were investigated in a methanol aqueous solution bubbled with air. A three-cell stack exhibited a stack voltage of 2330 mV and a power output of 21 mW. © The Royal Society of Chemistry 2011

  14. Microscale Digital Vacuum Electronic Gates

    Science.gov (United States)

    Manohara, Harish (Inventor); Mojarradi, Mohammed M. (Inventor)

    2014-01-01

    Systems and methods in accordance with embodiments of the invention implement microscale digital vacuum electronic gates. In one embodiment, a microscale digital vacuum electronic gate includes: a microscale field emitter that can emit electrons and that is a microscale cathode; and a microscale anode; where the microscale field emitter and the microscale anode are disposed within at least a partial vacuum; where the microscale field emitter and the microscale anode are separated by a gap; and where the potential difference between the microscale field emitter and the microscale anode is controllable such that the flow of electrons between the microscale field emitter and the microscale anode is thereby controllable; where when the microscale anode receives a flow of electrons, a first logic state is defined; and where when the microscale anode does not receive a flow of electrons, a second logic state is defined.

  15. Biophysics of BK Channel Gating.

    Science.gov (United States)

    Pantazis, A; Olcese, R

    2016-01-01

    BK channels are universal regulators of cell excitability, given their exceptional unitary conductance selective for K(+), joint activation mechanism by membrane depolarization and intracellular [Ca(2+)] elevation, and broad expression pattern. In this chapter, we discuss the structural basis and operational principles of their activation, or gating, by membrane potential and calcium. We also discuss how the two activation mechanisms interact to culminate in channel opening. As members of the voltage-gated potassium channel superfamily, BK channels are discussed in the context of archetypal family members, in terms of similarities that help us understand their function, but also seminal structural and biophysical differences that confer unique functional properties. © 2016 Elsevier Inc. All rights reserved.

  16. Voltage-gated Proton Channels

    Science.gov (United States)

    DeCoursey, Thomas E.

    2014-01-01

    Voltage-gated proton channels, HV1, have vaulted from the realm of the esoteric into the forefront of a central question facing ion channel biophysicists, namely the mechanism by which voltage-dependent gating occurs. This transformation is the result of several factors. Identification of the gene in 2006 revealed that proton channels are homologues of the voltage-sensing domain of most other voltage-gated ion channels. Unique, or at least eccentric, properties of proton channels include dimeric architecture with dual conduction pathways, perfect proton selectivity, a single-channel conductance ~103 smaller than most ion channels, voltage-dependent gating that is strongly modulated by the pH gradient, ΔpH, and potent inhibition by Zn2+ (in many species) but an absence of other potent inhibitors. The recent identification of HV1 in three unicellular marine plankton species has dramatically expanded the phylogenetic family tree. Interest in proton channels in their own right has increased as important physiological roles have been identified in many cells. Proton channels trigger the bioluminescent flash of dinoflagellates, facilitate calcification by coccolithophores, regulate pH-dependent processes in eggs and sperm during fertilization, secrete acid to control the pH of airway fluids, facilitate histamine secretion by basophils, and play a signaling role in facilitating B-cell receptor mediated responses in B lymphocytes. The most elaborate and best-established functions occur in phagocytes, where proton channels optimize the activity of NADPH oxidase, an important producer of reactive oxygen species. Proton efflux mediated by HV1 balances the charge translocated across the membrane by electrons through NADPH oxidase, minimizes changes in cytoplasmic and phagosomal pH, limits osmotic swelling of the phagosome, and provides substrate H+ for the production of H2O2 and HOCl, reactive oxygen species crucial to killing pathogens. PMID:23798303

  17. Interface Engineering and Gate Dielectric Engineering for High Performance Ge MOSFETs

    Directory of Open Access Journals (Sweden)

    Jiabao Sun

    2015-01-01

    Full Text Available In recent years, germanium has attracted intensive interests for its promising applications in the microelectronics industry. However, to achieve high performance Ge channel devices, several critical issues still have to be addressed. Amongst them, a high quality gate stack, that is, a low defect interface layer and a dielectric layer, is of crucial importance. In this work, we first review the existing methods of interface engineering and gate dielectric engineering and then in more detail we discuss and compare three promising approaches (i.e., plasma postoxidation, high pressure oxidation, and ozone postoxidation. It has been confirmed that these approaches all can significantly improve the overall performance of the metal-oxide-semiconductor field effect transistor (MOSFET device.

  18. Gate-tunable rectification inversion and photovoltaic detection in graphene/WSe2 heterostructures

    Science.gov (United States)

    Gao, Anyuan; Liu, Erfu; Long, Mingsheng; Zhou, Wei; Wang, Yiyan; Xia, Tianlong; Hu, Weida; Wang, Baigeng; Miao, Feng

    2016-05-01

    We studied electrical transport properties including gate-tunable rectification inversion and polarity inversion, in atomically thin graphene/WSe2 heterojunctions. Such engrossing characteristics are attributed to the gate tunable mismatch of Fermi levels of graphene and WSe2. Also, such atomically thin heterostructure shows excellent performances on photodetection. The responsivity of 66.2 mA W-1 (without bias voltage) and 350 A W-1 (with 1 V bias voltage) can be reached. What is more, the devices show great external quantum efficiency of 800%, high detectivity of 1013 cm Hz1/2/W, and fast response time of 30 μs. Our study reveals that vertical stacking of 2D materials has great potential for multifunctional electronic and optoelectronic device applications in the future.

  19. Gate-tunable rectification inversion and photovoltaic detection in graphene/WSe{sub 2} heterostructures

    Energy Technology Data Exchange (ETDEWEB)

    Gao, Anyuan; Liu, Erfu; Long, Mingsheng; Zhou, Wei; Wang, Baigeng; Miao, Feng, E-mail: miao@nju.edu.cn [National Laboratory of Solid State Microstructures, School of Physics, Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China); Wang, Yiyan; Xia, Tianlong [Department of Physics, Beijing Key Laboratory of Opto-Electronic Functional Materials & Micro-Nano Devices, Renmin University of China, Beijing 100872 (China); Hu, Weida [National Laboratory for Infrared Physics, Shanghai Institute of Technical Physics, Chinese Academy of Sciences, Shanghai 200083 (China)

    2016-05-30

    We studied electrical transport properties including gate-tunable rectification inversion and polarity inversion, in atomically thin graphene/WSe{sub 2} heterojunctions. Such engrossing characteristics are attributed to the gate tunable mismatch of Fermi levels of graphene and WSe{sub 2}. Also, such atomically thin heterostructure shows excellent performances on photodetection. The responsivity of 66.2 mA W{sup −1} (without bias voltage) and 350 A W{sup −1} (with 1 V bias voltage) can be reached. What is more, the devices show great external quantum efficiency of 800%, high detectivity of 10{sup 13} cm Hz{sup 1/2}/W, and fast response time of 30 μs. Our study reveals that vertical stacking of 2D materials has great potential for multifunctional electronic and optoelectronic device applications in the future.

  20. Manifold seal structure for fuel cell stack

    Science.gov (United States)

    Collins, William P.

    1988-01-01

    The seal between the sides of a fuel cell stack and the gas manifolds is improved by adding a mechanical interlock between the adhesive sealing strip and the abutting surface of the manifolds. The adhesive is a material which can flow to some extent when under compression, and the mechanical interlock is formed providing small openings in the portion of the manifold which abuts the adhesive strip. When the manifolds are pressed against the adhesive strips, the latter will flow into and through the manifold openings to form buttons or ribs which mechanically interlock with the manifolds. These buttons or ribs increase the bond between the manifolds and adhesive, which previously relied solely on the adhesive nature of the adhesive.

  1. Durable solid oxide electrolysis cells and stacks

    Energy Technology Data Exchange (ETDEWEB)

    Ming Chen

    2010-08-15

    The purpose of this project was to make a substantial contribution to development of a cost competitive electrolysis technology based on solid oxide cells. The strategy was to address what had been identified as the key issues in previous research projects. Accordingly five lines of work were carried out in the here reported project: 1) Cell and stack element testing and post test characterization to identify major degradation mechanisms under electrolysis operation. 2) Development of interconnects and coatings to allow stable electrolysis operation at approx850 deg. C or above. 3) Development of seals with reduced Si emission. 4) Development of durable SOEC cathodes. 5) Modeling. Good progress has been made on several of the planned activities. The outcome and most important achievements of the current project are listed for the five lines of the work. (LN)

  2. ATLAS software stack on ARM64

    Science.gov (United States)

    Smith, Joshua Wyatt; Stewart, Graeme A.; Seuster, Rolf; Quadt, Arnulf; ATLAS Collaboration

    2017-10-01

    This paper reports on the port of the ATLAS software stack onto new prototype ARM64 servers. This included building the “external” packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adjustments. A few additional modifications were needed to account for the different operating system, Ubuntu instead of Scientific Linux 6 / CentOS7. Selected results from the validation of the physics outputs on these ARM 64-bit servers will be shown. CPU, memory and IO intensive benchmarks using ATLAS specific environment and infrastructure have been performed, with a particular emphasis on the performance vs. energy consumption.

  3. Pin stack array for thermoacoustic energy conversion

    Science.gov (United States)

    Keolian, Robert M.; Swift, Gregory W.

    1995-01-01

    A thermoacoustic stack for connecting two heat exchangers in a thermoacoustic energy converter provides a convex fluid-solid interface in a plane perpendicular to an axis for acoustic oscillation of fluid between the two heat exchangers. The convex surfaces increase the ratio of the fluid volume in the effective thermoacoustic volume that is displaced from the convex surface to the fluid volume that is adjacent the surface within which viscous energy losses occur. Increasing the volume ratio results in an increase in the ratio of transferred thermal energy to viscous energy losses, with a concomitant increase in operating efficiency of the thermoacoustic converter. The convex surfaces may be easily provided by a pin array having elements arranged parallel to the direction of acoustic oscillations and with effective radial dimensions much smaller than the thicknesses of the viscous energy loss and thermoacoustic energy transfer volumes.

  4. ATLAS software stack on ARM64

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00529764; The ATLAS collaboration; Stewart, Graeme; Seuster, Rolf; Quadt, Arnulf

    2017-01-01

    This paper reports on the port of the ATLAS software stack onto new prototype ARM64 servers. This included building the “external” packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adjustments. A few additional modifications were needed to account for the different operating system, Ubuntu instead of Scientific Linux 6 / CentOS7. Selected results from the validation of the physics outputs on these ARM 64-bit servers will be shown. CPU, memory and IO intensive benchmarks using ATLAS specific environment and infrastructure have been performed, with a particular emphasis on the performance vs. energy consumption.

  5. Stacked Integration of MEMS on LSI

    Directory of Open Access Journals (Sweden)

    Masayoshi Esashi

    2016-08-01

    Full Text Available Two stacked integration methods have been developed to enable advanced microsystems of microelectromechanical systems (MEMS on large scale integration (LSI. One is a wafer level transfer of MEMS fabricated on a carrier wafer to a LSI wafer. The other is the use of electrical interconnections using through-Si vias from the structure of a MEMS wafer on a LSI wafer. The wafer level transfer methods are categorized to film transfer, device transfer connectivity last, and immediate connectivity at device transfer. Applications of these transfer methods are film bulk acoustic resonator (FBAR on LSI, lead zirconate titanate (Pb(Zr,TiO3 (PZT MEMS switch on LSI, and surface acoustic wave (SAW resonators on LSI using respective methods. A selective transfer process was developed for multiple SAW filters on LSI. Tactile sensors and active matrix electron emitters for massive parallel electron beam lithography were developed using the through-Si vias.

  6. Designer Infrared Filters using Stacked Metal Lattices

    Science.gov (United States)

    Smith, Howard A.; Rebbert, M.; Sternberg, O.

    2003-01-01

    We have designed and fabricated infrared filters for use at wavelengths greater than or equal to 15 microns. Unlike conventional dielectric filters used at the short wavelengths, ours are made from stacked metal grids, spaced at a very small fraction of the performance wavelengths. The individual lattice layers are gold, the spacers are polyimide, and they are assembled using integrated circuit processing techniques; they resemble some metallic photonic band-gap structures. We simulate the filter performance accurately, including the coupling of the propagating, near-field electromagnetic modes, using computer aided design codes. We find no anomalous absorption. The geometrical parameters of the grids are easily altered in practice, allowing for the production of tuned filters with predictable useful transmission characteristics. Although developed for astronomical instrumentation, the filters arc broadly applicable in systems across infrared and terahertz bands.

  7. A two-dimensional semiconductor transistor with boosted gate control and sensing ability

    Science.gov (United States)

    Xu, Jing; Chen, Lin; Dai, Ya-Wei; Cao, Qian; Sun, Qing-Qing; Ding, Shi-Jin; Zhu, Hao; Zhang, David Wei

    2017-01-01

    Transistors with exfoliated two-dimensional (2D) materials on a SiO2/Si substrate have been applied and have been proven effective in a wide range of applications, such as circuits, memory, photodetectors, gas sensors, optical modulators, valleytronics, and spintronics. However, these devices usually suffer from limited gate control because of the thick SiO2 gate dielectric and the lack of reliable transfer method. We introduce a new back-gate transistor scheme fabricated on a novel Al2O3/ITO (indium tin oxide)/SiO2/Si “stack” substrate, which was engineered with distinguishable optical identification of exfoliated 2D materials. High-quality exfoliated 2D materials could be easily obtained and recognized on this stack. Two typical 2D materials, MoS2 and ReS2, were implemented to demonstrate the enhancement of gate controllability. Both transistors show excellent electrical characteristics, including steep subthreshold swing (62 mV dec−1 for MoS2 and 83 mV dec−1 for ReS2), high mobility (61.79 cm2 V−1 s−1 for MoS2 and 7.32 cm2 V−1 s−1 for ReS2), large on/off ratio (~107), and reasonable working gate bias (below 3 V). Moreover, MoS2 and ReS2 photodetectors fabricated on the basis of the scheme have impressively leading photoresponsivities of 4000 and 760 A W−1 in the depletion area, respectively, and both have exceeded 106 A W−1 in the accumulation area, which is the best ever obtained. This opens up a suite of applications of this novel platform in 2D materials research with increasing needs of enhanced gate control. PMID:28560330

  8. Dielectric elastomer generators that stack up

    Science.gov (United States)

    McKay, T. G.; Rosset, S.; Anderson, I. A.; Shea, H.

    2015-01-01

    This paper reports the design, fabrication, and testing of a soft dielectric elastomer power generator with a volume of less than 1 cm3. The generator is well suited to harvest energy from ambient and from human body motion as it can harvest from low frequency (sub-Hz) motions, and is compact and lightweight. Dielectric elastomers are highly stretchable variable capacitors. Electrical energy is produced when the deformation of a stretched, charged dielectric elastomer is relaxed; like-charges are compressed together and opposite-charges are pushed apart, resulting in an increased voltage. This technology provides an opportunity to produce soft, high energy density generators with unparalleled robustness. Two major issues block this goal: current configurations require rigid frames that maintain the dielectric elastomer in a prestretched state, and high energy densities have come at the expense of short lifetime. This paper presents a self-supporting stacked generator configuration which does not require rigid frames. The generator consists of 48 generator films stacked on top of each other, resulting in a structure that fits within an 11 mm diameter footprint while containing enough active material to produce useful power. To ensure sustainable power production, we also present a mathematical model for designing the electronic control of the generator which optimizes energy production while limiting the electrical stress on the generator below failure limits. When cyclically compressed at 1.6 Hz, our generator produced 1.8 mW of power, which is sufficient for many low-power wireless sensor nodes. This performance compares favorably with similarly scaled electromagnetic, piezoelectric, and electrostatic generators. The generator’s small form factor and ability to harvest useful energy from low frequency motions such as tree swaying or shoe impact provides an opportunity to deliver power to remote wireless sensor nodes or to distributed points in the human body

  9. Actuators Using Piezoelectric Stacks and Displacement Enhancers

    Science.gov (United States)

    Bar-Cohen, Yoseph; Sherrit, Stewart; Bao, Xiaoqi; Badescu, Mircea; Lee, Hyeong Jae; Walkenmeyer, Phillip; Lih, Shyh-Shiuh

    2015-01-01

    Actuators are used to drive all active mechanisms including machines, robots, and manipulators to name a few. The actuators are responsible for moving, manipulating, displacing, pushing and executing any action that is needed by the mechanism. There are many types and principles of actuation that are responsible for these movements ranging from electromagnetic, electroactive, thermo-mechanic, piezoelectric, electrostrictive etc. Actuators are readily available from commercial producers but there is a great need for reducing their size, increasing their efficiency and reducing their weight. Studies at JPL’s Non Destructive Evaluation and Advanced Actuators (NDEAA) Laboratory have been focused on the use of piezoelectric stacks and novel designs taking advantage of piezoelectric’s potential to provide high torque/force density actuation and high electromechanical conversion efficiency. The actuators/motors that have been developed and reviewed in this paper are operated by various horn configurations as well as the use of pre-stress flexures that make them thermally stable and increases their coupling efficiency. The use of monolithic designs that pre-stress the piezoelectric stack eliminates the use of compression stress bolt. These designs enable the embedding of developed solid-state motors/actuators in any structure with the only macroscopically moving parts are the rotor or the linear translator. Finite element modeling and design tools were used to determine the requirements and operation parameters and the results were used to simulate, design and fabricate novel actuators/motors. The developed actuators and performance will be described and discussed in this paper.

  10. Impact of Gd{sub 2}O{sub 3} passivation layer on interfacial and electrical properties of atomic-layer-deposited ZrO{sub 2} gate dielectric on GaAs

    Energy Technology Data Exchange (ETDEWEB)

    Gong, Youpin; Zhai, Haifa; Liu, Xiaojie; Kong, Jizhou; Wu, Di; Li, Aidong, E-mail: adli@nju.edu.cn

    2014-02-01

    ZrO{sub 2} gate dielectric films were fabricated on n-GaAs substrates by atomic layer deposition (ALD), using metal organic chemical vapor deposition (MOCVD)-derived ultrathin Gd{sub 2}O{sub 3} film as interfacial control layer between ZrO{sub 2} and n-GaAs. The interfacial structure, capacitance–voltage and current–voltage properties of ZrO{sub 2}/n-GaAs and ZrO{sub 2}/Gd{sub 2}O{sub 3}/n-GaAs metal-oxide-semiconductor (MOS) capacitors have been investigated. The introduction of an ultrathin Gd{sub 2}O{sub 3} control layer can effectively suppress the formation of As oxides and high valence Ga oxide at the high k/GaAs interface which evidently improved the electrical properties of GaAs-based MOS capacitors, such as higher accumulation capacitance and lower leakage current density. It was found that the current conduction mechanism of MOS capacitors varied from Poole–Frenkel emission to Schottky–Richardson emission after introducing the thin Gd{sub 2}O{sub 3} layer. The band alignments of interfaces for ZrO{sub 2}/GaAs and ZrO{sub 2}/Gd{sub 2}O{sub 3}/GaAs were established, which indicates that the conduction band offset (CBO) for ZrO{sub 2}/GaAs and ZrO{sub 2}/Gd{sub 2}O{sub 3}/GaAs stacks are ∼1.45 and ∼1.62 eV, correspondingly.

  11. GreenGate---a novel, versatile, and efficient cloning system for plant transgenesis.

    Directory of Open Access Journals (Sweden)

    Athanasios Lampropoulos

    Full Text Available Building expression constructs for transgenesis is one of the fundamental day-to-day tasks in modern biology. Traditionally it is based on a multitude of type II restriction endonucleases and T4 DNA ligase. Especially in case of long inserts and applications requiring high-throughput, this approach is limited by the number of available unique restriction sites and the need for designing individual cloning strategies for each project. Several alternative cloning systems have been developed in recent years to overcome these issues, including the type IIS enzyme based Golden Gate technique. Here we introduce our GreenGate system for rapidly assembling plant transformation constructs, which is based on the Golden Gate method. GreenGate cloning is simple and efficient since it uses only one type IIS restriction endonuclease, depends on only six types of insert modules (plant promoter, N-terminal tag, coding sequence, C-terminal tag, plant terminator and plant resistance cassette, but at the same time allows assembling several expression cassettes in one binary destination vector from a collection of pre-cloned building blocks. The system is cheap and reliable and when combined with a library of modules considerably speeds up cloning and transgene stacking for plant transformation.

  12. GreenGate---a novel, versatile, and efficient cloning system for plant transgenesis.

    Science.gov (United States)

    Lampropoulos, Athanasios; Sutikovic, Zoran; Wenzl, Christian; Maegele, Ira; Lohmann, Jan U; Forner, Joachim

    2013-01-01

    Building expression constructs for transgenesis is one of the fundamental day-to-day tasks in modern biology. Traditionally it is based on a multitude of type II restriction endonucleases and T4 DNA ligase. Especially in case of long inserts and applications requiring high-throughput, this approach is limited by the number of available unique restriction sites and the need for designing individual cloning strategies for each project. Several alternative cloning systems have been developed in recent years to overcome these issues, including the type IIS enzyme based Golden Gate technique. Here we introduce our GreenGate system for rapidly assembling plant transformation constructs, which is based on the Golden Gate method. GreenGate cloning is simple and efficient since it uses only one type IIS restriction endonuclease, depends on only six types of insert modules (plant promoter, N-terminal tag, coding sequence, C-terminal tag, plant terminator and plant resistance cassette), but at the same time allows assembling several expression cassettes in one binary destination vector from a collection of pre-cloned building blocks. The system is cheap and reliable and when combined with a library of modules considerably speeds up cloning and transgene stacking for plant transformation.

  13. Direct transitions from high-K isomers to low-K bands -- {gamma} softness or coriolis coupling

    Energy Technology Data Exchange (ETDEWEB)

    Shimizu, Yoshifumi R.; Narimatsu, Kanako; Ohtsubo, Shin-Ichi [Kyushu Univ., Fukuoka (Japan)] [and others

    1996-12-31

    Recent measurements of direct transitions from high-K isomers to low-K bands reveal severe break-down of the K-selection rule and pose the problem of how to understand the mechanism of such K-violation. The authors recent systematic calculations by using a simple {gamma}-tunneling model reproduced many of the observed hindrances, indicating the importance of the {gamma} softness. However, there are some data which cannot be explained in terms of the {gamma}-degree of freedom. In this talk, the authors also discuss the results of conventional Coriolis coupling calculations, which is considered to be another important mechanism.

  14. Rydberg Quantum Gates Free from Blockade Error

    Science.gov (United States)

    Shi, Xiao-Feng

    2017-06-01

    Accurate quantum gates are basic elements for building quantum computers. Recently, there has been great interest in designing quantum logic gates by using the blockade effect of Rydberg atoms. The fidelity and operation speed of these gates, however, are fundamentally limited by an intrinsic blockade error. Here we propose a type of quantum gate, which is based on the Rydberg blockade effect, yet free from any blockade error. In contrast to the "blocking" method in previous schemes, we use the Rydberg energy shift to realize a rational generalized Rabi frequency so that a π phase for one input state of the gate emerges. This leads to an accurate Rydberg quantum logic gate that can operate on a 0.1 -μ s time scale or faster because it works by a Rabi frequency which is comparable to the blockade shift.

  15. Reversible logic gate using adiabatic superconducting devices.

    Science.gov (United States)

    Takeuchi, N; Yamanashi, Y; Yoshikawa, N

    2014-09-15

    Reversible computing has been studied since Rolf Landauer advanced the argument that has come to be known as Landauer's principle. This principle states that there is no minimum energy dissipation for logic operations in reversible computing, because it is not accompanied by reductions in information entropy. However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energy-efficient logic devices. Another difficulty is that reversible logic gates must be both logically and physically reversible. Here we propose the first practical reversible logic gate using adiabatic superconducting devices and experimentally demonstrate the logical and physical reversibility of the gate. Additionally, we estimate the energy dissipation of the gate, and discuss the minimum energy dissipation required for reversible logic operations. It is expected that the results of this study will enable reversible computing to move from the theoretical stage into practical usage.

  16. A bistable electromagnetically actuated rotary gate microvalve

    Science.gov (United States)

    Luharuka, Rajesh; Hesketh, Peter J.

    2008-03-01

    Two types of rotary gate microvalves are developed for flow modulation in microfluidic systems. These microvalves have been tested for an open flow rate of up to 100 sccm and operate under a differential pressure of 6 psig with flow modulation of up to 100. The microvalve consists of a suspended gate that rotates in the plane of the chip to regulate flow through the orifice. The gate is suspended by a novel fully compliant in-plane rotary bistable micromechanism (IPRBM) that advantageously constrains the gate in all degrees of freedom except for in-plane rotational motion. Multiple inlet/outlet orifices provide flexibility of operating the microvalve in three different flow configurations. The rotary gate microvalve is switched with an external electromagnetic actuator. The suspended gate is made of a soft magnetic material and its electromagnetic actuation is based on the operating principle of a variable-reluctance stepper motor.

  17. Global Warming: A Supplementary Guide to the Hypercard Stack.

    Science.gov (United States)

    Chan, Adrian; Wooster, Judy

    This guide is designed to supplement a computer disk (a hypercard stack) that introduces students to issues raised in the debate over global warming. The stack is recommended for grades 9 through 12, and is appropriate for social studies, government, or science courses. This guide integrates a number of interactive teaching strategies including…

  18. Long Josephson Junction Stack Coupled to a Cavity

    DEFF Research Database (Denmark)

    Madsen, Søren Peder; Pedersen, Niels Falsig; Groenbech-Jensen, N.

    2007-01-01

    A stack of inductively coupled long Josephson junctions are modeled as a system of coupled sine-Gordon equations. One boundary of the stack is coupled electrically to a resonant cavity. With one fluxon in each Josephson junction, the inter-junction fluxon forces are repulsive. We look at a possible...

  19. Evaluating impact of truck announcements on container stacking efficiency

    NARCIS (Netherlands)

    E. van Asperen (Eelco); B. Borgman (Bram); R. Dekker (Rommert)

    2013-01-01

    textabstractContainer stacking rules are an important factor in container terminal efficiency. We build on prior research and use a discrete-event simulation model to evaluate the impact of a truck announcement system on the performance of online container stacking rules. The information that is

  20. Calculation of AC losses in large HTS stacks and coils

    DEFF Research Database (Denmark)

    Zermeno, Victor; Abrahamsen, Asger Bech; Mijatovic, Nenad

    2012-01-01

    In this work, we present a homogenization method to model a stack of HTS tapes under AC applied transport current or magnetic field. The idea is to find an anisotropic bulk equivalent for the stack of tapes, where the internal alternating structures of insulating, metallic, superconducting and su...

  1. Development of internal reforming carbonate fuel cell stack technology

    Energy Technology Data Exchange (ETDEWEB)

    Farooque, M.

    1990-10-01

    Activities under this contract focused on the development of a coal-fueled carbonate fuel cell system design and the stack technology consistent with the system design. The overall contract effort was divided into three phases. The first phase, completed in January 1988, provided carbonate fuel cell component scale-up from the 1ft{sup 2} size to the commercial 4ft{sup 2} size. The second phase of the program provided the coal-fueled carbonate fuel cell system (CGCFC) conceptual design and carried out initial research and development needs of the CGCFC system. The final phase of the program emphasized stack height scale-up and improvement of stack life. The results of the second and third phases are included in this report. Program activities under Phase 2 and 3 were designed to address several key development areas to prepare the carbonate fuel cell system, particularly the coal-fueled CFC power plant, for commercialization in late 1990's. The issues addressed include: Coal-Gas Related Considerations; Cell and Stack Technology Improvement; Carbonate Fuel Cell Stack Design Development; Stack Tests for Design Verification; Full-Size Stack Design; Test Facility Development; Carbonate Fuel Cell Stack Cost Assessment; and Coal-Fueled Carbonate Fuel Cell System Design. All the major program objectives in each of the topical areas were successfully achieved. This report is organized along the above-mentioned topical areas. Each topical area has been processed separately for inclusion on the data base.

  2. Cold Vacuum Drying Facility Stack Air Sampling System Qualification Tests

    Energy Technology Data Exchange (ETDEWEB)

    Glissmeyer, John A.

    2001-01-24

    This report documents tests that were conducted to verify that the air monitoring system for the Cold Vacuum Drying Facility ventilation exhaust stack meets the applicable regulatory criteria regarding the placement of the air sampling probe, sample transport, and stack flow measurement accuracy.

  3. Simultaneous stack-gas scrubbing and waste water treatment

    Science.gov (United States)

    Poradek, J. C.; Collins, D. D.

    1980-01-01

    Simultaneous treatment of wastewater and S02-laden stack gas make both treatments more efficient and economical. According to results of preliminary tests, solution generated by stack gas scrubbing cycle reduces bacterial content of wastewater. Both processess benefit by sharing concentrations of iron.

  4. Extraction and dielectric properties of curcuminoid films grown on Si substrate for high-k dielectric applications

    Energy Technology Data Exchange (ETDEWEB)

    Dakhel, A.A.; Jasim, Khalil E. [Department of Physics, College of Science, University of Bahrain, P.O. Box 32038 (Bahrain); Cassidy, S. [Department of Basic Medical Sciences, Royal College of Surgeons in Ireland, Medical University of Bahrain, P.O. Box 15503 (Bahrain); Henari, F.Z., E-mail: fzhenari@rcsi-mub.com [Department of Basic Medical Sciences, Royal College of Surgeons in Ireland, Medical University of Bahrain, P.O. Box 15503 (Bahrain)

    2013-09-20

    Highlights: • The unknown insulating properties of curcuminoid extract are systematically studied. • Optical study gives a bandgap of 3.15 eV and a refractive index of 1.92 at 505 nm. • Turmeric is a high-k environmental friendly material for use in microelectronics. • Curcuminoid extract can be used as insulator of MIS devices with ε{sup ′}{sub ∞}≈54.2. -- Abstract: Curcuminoids were extracted from turmeric powder and evaporated in vacuum to prepare thin films on p-Si and glass substrates for dielectric and optical investigations. The optical absorption spectrum of the prepared amorphous film was not identical to that of the molecular one, which was identified by a strong wide absorption band in between ∼220 and 540 nm. The onset energy of the optical absorption of the film was calculated by using Hamberg et al. method. The dielectric properties of this material were systematically studied for future eco friendly applications in metal–insulator–semiconductor MIS field of applications. The complex dielectric properties were studied in the frequency range of 1–1000 kHz and was analysed in-terms of dielectric impedance Z{sup *}(ω) and modulus M{sup *}(ω). Generally, the curcuminoid complex can be considered as a high-k material and can be used in the environmental friendly production of microelectronic devices.

  5. Application of an empirical saturation rule to TGLF to unify low-k and high-k turbulence dominated regimes

    Science.gov (United States)

    Jian, Xiang; Chan, Vincent S.; Chen, Jiale; Li, Zeyu; Garofalo, Andrea M.; Zhuang, Ge; the CFETR Physics team

    2018-01-01

    We propose a phenomenological turbulence saturation model and apply it to the TGLF turbulence transport model (Staebler et al 2007 Phys. Plasmas 14 055909), which captures the physics of interaction between low-k and high-k turbulence consistent with the multi-scale gyro-kinetic simulation result reported by Howard (2016 Nucl. Fusion. 23 056109). The new model, TGLF-Vx is tested with three discharges from DIII-D and EAST tokamak, which cover both low-k and high-k turbulence dominated regimes. It is found that the profile match can be substantially improved over previous models when evolving T e, T i and n e simultaneously. Good agreement for all three discharges is obtained with one fixed parameter in the model when taking experimental uncertainties into consideration. Lastly, TGLF-Vx is applied to explore the sensitivity of the predicted CFETR steady-state performance to different transport models. Our result shows that a scenario using only RF auxiliary heating could be significantly affected.

  6. MCP gated x-ray framing camera

    Science.gov (United States)

    Cai, Houzhi; Liu, Jinyuan; Niu, Lihong; Liao, Hua; Zhou, Junlan

    2009-11-01

    A four-frame gated microchannel plate (MCP) camera is described in this article. Each frame photocathode coated with gold on the MCP is part of a transmission line with open circuit end driven by the gating electrical pulse. The gating pulse is 230 ps in width and 2.5 kV in amplitude. The camera is tested by illuminating its photocathode with ultraviolet laser pulses, 266 nm in wavelength, which shows exposure time as short as 80 ps.

  7. Quantum gates between superconducting and atomic qubits

    Science.gov (United States)

    Saffman, Mark; Wilhelm, Frank; McDermott, Robert

    2009-05-01

    We propose methods for performing entangling gate operations between superconducting phase qubits and neutral atom hyperfine qubits. The gate is mediated by mapping the superconducting qubit onto a microwave excitation of a coplanar waveguide resonator (CPW). The large transition dipole moments of atomic Rydberg states at microwave frequencies enable bidirectional entanglement between a single atom and a single CPW photon. Specific gate protocols and fidelity calculations are presented for experimentally realistic geometries.

  8. System Measures Logic-Gate Delays

    Science.gov (United States)

    Blaes, Brent R.

    1988-01-01

    Many gates on chip tested automatically. Automatic testing system measures signal-propagation delays of experimental integrated-circuit array of logic gates. Includes controlling computer, counter/time, and feedback-controlled timing-waveform generator. Multiplexer included on integrated-circuit chip with logic-gate array to be tested. Delays measured by system serve as valuable data for design of fast logic and memory chips.

  9. Gating-ML: XML-based gating descriptions in flow cytometry.

    Science.gov (United States)

    Spidlen, Josef; Leif, Robert C; Moore, Wayne; Roederer, Mario; Brinkman, Ryan R

    2008-12-01

    The lack of software interoperability with respect to gating due to lack of a standardized mechanism for data exchange has traditionally been a bottleneck, preventing reproducibility of flow cytometry (FCM) data analysis and the usage of multiple analytical tools. To facilitate interoperability among FCM data analysis tools, members of the International Society for the Advancement of Cytometry (ISAC) Data Standards Task Force (DSTF) have developed an XML-based mechanism to formally describe gates (Gating-ML). Gating-ML, an open specification for encoding gating, data transformations and compensation, has been adopted by the ISAC DSTF as a Candidate Recommendation. Gating-ML can facilitate exchange of gating descriptions the same way that FCS facilitated for exchange of raw FCM data. Its adoption will open new collaborative opportunities as well as possibilities for advanced analyses and methods development. The ISAC DSTF is satisfied that the standard addresses the requirements for a gating exchange standard.

  10. Physical Sciences Laboratory 1 Rooftop Stack Mixing Study

    Energy Technology Data Exchange (ETDEWEB)

    Flaherty, Julia E. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Antonio, Ernest J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

    2016-09-30

    To address concerns about worker exposures on the Physical Science Laboratory (PSL) rooftop, a tracer study was conducted to measure gaseous tracer concentrations downwind of six stacks on the southern half of the PSL building (PSL-1). These concerns were raised, in part, due to the non-standard configuration of the stacks on this building. Five of the six stacks were only about 8 feet tall, with one shorter stack that was essentially level with the roof deck. These stacks were reconfigured in August 2016, and these exhaust points on PSL-1 are now 18 feet tall. This report describes the objectives of the tracer tests performed on PSL-1, provides an overview of how the tests were executed, and presents results of the tests. The tests on the PSL rooftop were a follow-on project from a similar study performed on the LSL-II ventilation exhaust (Flaherty and Antonio, 2016).

  11. Direct methanol fuel cell stack based on MEMS technology

    Science.gov (United States)

    Zhang, Yufeng; Tang, Xiaochuan; Yuan, Zhenyu; Liu, Xiaowei

    2008-10-01

    This paper presents a design configuration of silicon-based micro direct methanol fuel cell (DMFC) stack in a planar array. The integrated series connection is oriented in a "flip-flop" configuration with electrical interconnections made by thin-film metal layers that coat the flow channels etched in the silicon substrate. The configuration features small connection space and low contact resistance. The MEMS fabrication process was utilized to fabricate the silicon plates of DMFC stack. This DMFC stack with an active area of 64mm x 11mm was characterized at room temperature and normal atmosphere. Experimental results show that the prototype stack is able to generate an open-circuit voltage of 2.7V and a maximum power density of 2.2mW/cm2, which demonstrate the feasibility of this new DMFC stack configuration.

  12. Proposed Cavity for Reduced Slip-Stacking Loss

    Energy Technology Data Exchange (ETDEWEB)

    Eldred, J. [Indiana U.; Zwaska, R. [Fermilab

    2015-06-01

    This paper employs a novel dynamical mechanism to improve the performance of slip-stacking. Slip-stacking in an accumulation technique used at Fermilab since 2004 which nearly double the proton intensity. During slip-stacking, the Recycler or the Main Injector stores two particles beams that spatially overlap but have different momenta. The two particle beams are longitudinally focused by two 53 MHz 100 kV RF cavities with a small frequency difference between them. We propose an additional 106 MHz 20 kV RF cavity, with a frequency at the double the average of the upper and lower main RF frequencies. In simulation, we find the proposed RF cavity significantly enhances the stable bucket area and reduces slip-stacking losses under reasonable injection scenarios. We quantify and map the stability of the parameter space for any accelerator implementing slip-stacking with the addition of a harmonic RF cavity.

  13. Benchmarking gate-based quantum computers

    Science.gov (United States)

    Michielsen, Kristel; Nocon, Madita; Willsch, Dennis; Jin, Fengping; Lippert, Thomas; De Raedt, Hans

    2017-11-01

    With the advent of public access to small gate-based quantum processors, it becomes necessary to develop a benchmarking methodology such that independent researchers can validate the operation of these processors. We explore the usefulness of a number of simple quantum circuits as benchmarks for gate-based quantum computing devices and show that circuits performing identity operations are very simple, scalable and sensitive to gate errors and are therefore very well suited for this task. We illustrate the procedure by presenting benchmark results for the IBM Quantum Experience, a cloud-based platform for gate-based quantum computing.

  14. Qualification Tests for the Air Sampling System at the 296-Z-7 Stack, Addendum 1

    Energy Technology Data Exchange (ETDEWEB)

    Glissmeyer, John A.; Maughan, A. D.

    2002-02-05

    This addendum report documents tests performed to verify that the stack flow monitoring system for the 296-Z-7 ventilation exhaust stack meets the applicable regulatory criteria regarding stack flow measurement accuracy. These criteria ensure that the stack flow measurements have sufficient accuracy for use in estimating stack emissions. The tests performed demonstrated that operability and accuracy requirements were met.

  15. Glutamate gated spiking Neuron Model.

    Science.gov (United States)

    Deka, Krisha M; Roy, Soumik

    2014-01-01

    Biological neuron models mainly analyze the behavior of neural networks. Neurons are described in terms of firing rates viz an analog signal. The Izhikevich neuron model is an efficient, powerful model of spiking neuron. This model is a reduction of Hodgkin-Huxley model to a two variable system and is capable of producing rich firing patterns for many biological neurons. In this paper, the Regular Spiking (RS) neuron firing pattern is used to simulate the spiking of Glutamate gated postsynaptic membrane. Simulation is done in MATLAB environment for excitatory action of synapses. Analogous simulation of spiking of excitatory postsynaptic membrane potential is obtained.

  16. Gated Graphene Electrical Transport Characterization

    Directory of Open Access Journals (Sweden)

    Josef Náhlík

    2012-01-01

    Full Text Available Graphene is a very interesting new material, and promises attractive applications in future nanodevices. It is a 2D carbon structure with very interesting physical behavior. Graphene is an almost transparent material that has higher carrier mobility than any other material at room temperature. Graphene can therefore be used in applications such as ultrahigh-speed transistors and transparent electrodes. In this paper, we present our preliminary experiments on the transport behavior of graphene at room temperature. We measured the resistivity of Hall-bar samples depending on gate voltage (backgated graphene. Hysteresis between the forward and backward sweep direction was observed.

  17. Instant Oracle GoldenGate

    CERN Document Server

    Bruzzese, Tony

    2013-01-01

    Filled with practical, step-by-step instructions and clear explanations for the most important and useful tasks. Get the job done and learn as you go. A how-To book with practical recipes accompanied with rich screenshots for easy comprehension.This is a Packt Instant How-to guide, which provides concise and clear recipes for performing the core task of replication using Oracle GoldenGate.The book is aimed at DBAs from any of popular RDBMS systems such as Oracle, SQL Server, Teradata, Sybase, and so on. The level of detail provides quick applicability to beginners and a handy review for more a

  18. Gate current for p+-poly PMOS devices under gate injection conditions

    NARCIS (Netherlands)

    Hof, A.J.; Holleman, J.; Woerlee, P.H.

    2001-01-01

    In current CMOS processing both n+-poly and p+-poly gates are used. The I-V –relationship and reliability of n+-poly devices are widely studied and well understood. Gate currents and reliability for p+-poly PMOS devices under gate injection conditions are not well understood. In this paper, the

  19. Lifetime of dielectric elastomer stack actuators

    Science.gov (United States)

    Lotz, Peter; Matysek, Marc; Schlaak, Helmut F.

    2011-04-01

    Dielectric elastomer stack actuators (DESA) are well suited for the use in mobile devices, fluidic applications and small electromechanical systems. Despite many improvements during the last years the long term behavior of dielectric elastomer actuators in general is not known or has not been published. The first goal of the study is to characterize the overall lifetime under laboratory conditions and to identify potential factors influencing lifetime. For this we have designed a test setup to examine 16 actuators at once. The actuators are subdivided into 4 groups each with a separate power supply and driving signal. To monitor the performance of the actuators driving voltage and current are measured continuously and additionally, the amplitude of the deformations of each actuator is measured sequentially. From our first results we conclude that lifetime of these actuators is mainly influenced by the contact material between feeding line and multilayer electrodes. So far, actuators themselves are not affected by long term actuation. With the best contact material actuators can be driven for more than 2700 h at 200 Hz with an electrical field strength of 20 V/μm. This results in more than 3 billion cycles. Actually, there are further actuators driven at 10 Hz for more than 4000 hours and still working.

  20. Lithiation-induced shuffling of atomic stacks

    KAUST Repository

    Nie, Anmin

    2014-09-10

    In rechargeable lithium-ion batteries, understanding the atomic-scale mechanism of Li-induced structural evolution occurring at the host electrode materials provides essential knowledge for design of new high performance electrodes. Here, we report a new crystalline-crystalline phase transition mechanism in single-crystal Zn-Sb intermetallic nanowires upon lithiation. Using in situ transmission electron microscopy, we observed that stacks of atomic planes in an intermediate hexagonal (h-)LiZnSb phase are "shuffled" to accommodate the geometrical confinement stress arising from lamellar nanodomains intercalated by lithium ions. Such atomic rearrangement arises from the anisotropic lithium diffusion and is accompanied by appearance of partial dislocations. This transient structure mediates further phase transition from h-LiZnSb to cubic (c-)Li2ZnSb, which is associated with a nearly "zero-strain" coherent interface viewed along the [001]h/[111]c directions. This study provides new mechanistic insights into complex electrochemically driven crystalline-crystalline phase transitions in lithium-ion battery electrodes and represents a noble example of atomic-level structural and interfacial rearrangements.

  1. Progress on the NSTX Center Stack Upgrade

    Energy Technology Data Exchange (ETDEWEB)

    L. Dudek, J. Chrzanowski, P. Heitzenroeder, D. Mangra, C. Neumeyer, M. Smith, R. Strykowsky, P. Titus, T. Willard

    2010-09-22

    The National Spherical Torus Experiment (NSTX) will be upgraded to provide increased toroidal field, plasma current and pulse length. This involves the replacement of the so-called center stack, including the inner legs of the Toroidal Field (TF) coil, the Ohmic Heating (OH) coil, and the inner Poloidal Field (PF) coils. In addition the increased performance of the upgrade requires qualification of remaining existing components for higher loads. Initial conceptual design efforts were based on worst-case combinations of possible currents that the power supplies could deliver. This proved to be an onerous requirement and caused many of the outer coils support structures to require costly heavy reinforcement. This has led to the planned implementation of a Digital Coil Protection System (DCPS) to reduce design-basis loads to levels that are more realistic and manageable. As a minimum, all components must be qualified for the increase in normal operating loads with headroom. Design features and analysis efforts needed to meet the upgrade loading are discussed. Mission and features of the DCPS are presented.

  2. Black Hole Spectroscopy with Coherent Mode Stacking.

    Science.gov (United States)

    Yang, Huan; Yagi, Kent; Blackman, Jonathan; Lehner, Luis; Paschalidis, Vasileios; Pretorius, Frans; Yunes, Nicolás

    2017-04-21

    The measurement of multiple ringdown modes in gravitational waves from binary black hole mergers will allow for testing the fundamental properties of black holes in general relativity and to constrain modified theories of gravity. To enhance the ability of Advanced LIGO/Virgo to perform such tasks, we propose a coherent mode stacking method to search for a chosen target mode within a collection of multiple merger events. We first rescale each signal so that the target mode in each of them has the same frequency and then sum the waveforms constructively. A crucial element to realize this coherent superposition is to make use of a priori information extracted from the inspiral-merger phase of each event. To illustrate the method, we perform a study with simulated events targeting the ℓ=m=3 ringdown mode of the remnant black holes. We show that this method can significantly boost the signal-to-noise ratio of the collective target mode compared to that of the single loudest event. Using current estimates of merger rates, we show that it is likely that advanced-era detectors can measure this collective ringdown mode with one year of coincident data gathered at design sensitivity.

  3. ATLAS software stack on ARM64

    CERN Document Server

    Smith, Joshua Wyatt; The ATLAS collaboration

    2016-01-01

    The ATLAS experiment explores new hardware and software platforms that, in the future, may be more suited to its data intensive workloads. One such alternative hardware platform is the ARM architecture, which is designed to be extremely power efficient and is found in most smartphones and tablets. CERN openlab recently installed a small cluster of ARM 64-bit evaluation prototype servers. Each server is based on a single-socket ARM 64-bit system on a chip, with 32 Cortex-A57 cores. In total, each server has 128 GB RAM connected with four fast memory channels. This paper reports on the port of the ATLAS software stack onto these new prototype ARM64 servers. This included building the "external" packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adj...

  4. Locating tremor using stacked products of correlations

    Science.gov (United States)

    Li, Ka Lok; Sadeghisorkhani, Hamzeh; Sgattoni, Giulia; Gudmundsson, Olafur; Roberts, Roland

    2017-04-01

    We introduce a back-projection method to locate tremor sources using products of cross-correlation envelopes of time series between seismic stations. For a given subset of n stations, we calculate the (n - 1)th-order product of cross-correlation envelopes and we stack the back-projected products over combinations of station subsets. We show that compared to existing correlation methods and for realistic signal and noise characteristics, this way of combining information can significantly reduce the effects of correlated (spurious or irrelevant signals) and uncorrelated noise. Each back-projected product constitutes an individual localized estimate of the source locations, as opposed to a hyperbola for the existing correlation techniques, assuming a uniform velocity in two dimensions. We demonstrate the method with synthetic examples and a real-data example from tremor at Katla Volcano, Iceland, in July 2011. Despite very complex near-surface structure, including strong topography and thick ice cover, the method appears to produce robust estimates of tremor location.

  5. Stimuli-responsive smart gating membranes.

    Science.gov (United States)

    Liu, Zhuang; Wang, Wei; Xie, Rui; Ju, Xiao-Jie; Chu, Liang-Yin

    2016-02-07

    Membranes are playing paramount roles in the sustainable development of myriad fields such as energy, environmental and resource management, and human health. However, the unalterable pore size and surface properties of traditional porous membranes restrict their efficient applications. The performances of traditional membranes will be weakened upon unavoidable membrane fouling, and they cannot be applied to cases where self-regulated permeability and selectivity are required. Inspired by natural cell membranes with stimuli-responsive channels, artificial stimuli-responsive smart gating membranes are developed by chemically/physically incorporating stimuli-responsive materials as functional gates into traditional porous membranes, to provide advanced functions and enhanced performances for breaking the bottlenecks of traditional membrane technologies. Smart gating membranes, integrating the advantages of traditional porous membrane substrates and smart functional gates, can self-regulate their permeability and selectivity via the flexible adjustment of pore sizes and surface properties based on the "open/close" switch of the smart gates in response to environmental stimuli. This tutorial review summarizes the recent developments in stimuli-responsive smart gating membranes, including the design strategies and the fabrication strategies that are based on the introduction of the stimuli-responsive gates after or during membrane formation, and the positively and negatively responsive gating models of versatile stimuli-responsive smart gating membranes, as well as the advanced applications of smart gating membranes for regulating substance concentration in reactors, controlling the release rate of drugs, separating active molecules based on size or affinity, and the self-cleaning of membrane surfaces. With self-regulated membrane performances, smart gating membranes show great power for use in global sustainable development.

  6. Boolean gates on actin filaments

    Energy Technology Data Exchange (ETDEWEB)

    Siccardi, Stefano, E-mail: ssiccardi@2ssas.it [The Unconventional Computing Centre, University of the West of England, Bristol (United Kingdom); Tuszynski, Jack A., E-mail: jackt@ualberta.ca [Department of Oncology, University of Alberta, Edmonton, Alberta (Canada); Adamatzky, Andrew, E-mail: andrew.adamatzky@uwe.ac.uk [The Unconventional Computing Centre, University of the West of England, Bristol (United Kingdom)

    2016-01-08

    Actin is a globular protein which forms long polar filaments in the eukaryotic cytoskeleton. Actin networks play a key role in cell mechanics and cell motility. They have also been implicated in information transmission and processing, memory and learning in neuronal cells. The actin filaments have been shown to support propagation of voltage pulses. Here we apply a coupled nonlinear transmission line model of actin filaments to study interactions between voltage pulses. To represent digital information we assign a logical TRUTH value to the presence of a voltage pulse in a given location of the actin filament, and FALSE to the pulse's absence, so that information flows along the filament with pulse transmission. When two pulses, representing Boolean values of input variables, interact, then they can facilitate or inhibit further propagation of each other. We explore this phenomenon to construct Boolean logical gates and a one-bit half-adder with interacting voltage pulses. We discuss implications of these findings on cellular process and technological applications. - Highlights: • We simulate interaction between voltage pulses using on actin filaments. • We use a coupled nonlinear transmission line model. • We design Boolean logical gates via interactions between the voltage pulses. • We construct one-bit half-adder with interacting voltage pulses.

  7. Separated Control and Data Stacks to Mitigate Buffer Overflow Exploits

    Directory of Open Access Journals (Sweden)

    Christopher Kugler

    2015-10-01

    Full Text Available Despite the fact that protection mechanisms like StackGuard, ASLR and NX are widespread, the development on new defense strategies against stack-based buffer overflows has not yet come to an end. In this article, we present a novel compiler-level protection called SCADS: Separated Control and Data Stacks that protects return addresses and saved frame pointers on a separate stack, called the control stack. In common computer programs, a single user mode stack is used to store control information next to data buffers. By separating control information from the data stack, we can protect sensitive pointers of a program’s control flow from being overwritten by buffer overflows. To substantiate the practicability of our approach, we provide SCADS as an open source patch for the LLVM compiler infrastructure. Focusing on Linux and FreeBSD running on the AMD64 architecture, we show compatibility, security and performance results. As we make control flow information simply unreachable for buffer overflows, many exploits are stopped at an early stage of progression with only negligible performance overhead.

  8. Stacking-dependent magnetoelectronic properties in multilayer graphene

    Science.gov (United States)

    Lin, Chiun-Yan; Wu, Jhao-Ying; Chiu, Yu-Huang; Chang, Cheng-Pong; Lin, Ming-Fa

    2014-11-01

    The generalized Peierls tight-binding model is developed to study multilayer graphenes. For an N -layer system, there are N groups of conduction and valence Landau levels. Each group is clearly specified by the corresponding sublattice. The Landau-level spectra strongly depend on the stacking configuration. ABC-stacked graphenes exhibit two kinds of Landau-level anticrossings, the intergroup and intragroup Landau levels, as a function of the applied magnetic field. On the other hand, in contrast to its frequent wide-energy presence in ABC-stacked graphenes, the anticrossing only occurs occasionally in AB-stacked graphenes, and is absent in AA-stacked graphenes. Furthermore, all 4 N Dirac-point related Landau levels are distributed over a limited energy range near the Fermi level. In AA- and AB-stacked graphenes, the total number of such levels is fixed, while their energies depend on the stacking configuration. These results reflect the main features of the zero-field band structures.

  9. Efficiency of Polymer Electrolyte Membrane Fuel Cell Stack

    Directory of Open Access Journals (Sweden)

    Hans Bosma

    2011-08-01

    Full Text Available This paper applies a feedforward control of optimal oxygen excess ratio that maximize net power (improve efficiency of a NedStack P8.0-64 PEM fuel cell stack (FCS system. Net powers profile as a function of oxygen excess ratio for some points of operation are analyzed by using FCS model. The relationships between stack current and the corresponding control input voltage that gives an optimal oxygen excess ratio are used to design a feedforward control scheme. The results of this scheme are compared to the results of a feedforward control using a constant oxygen excess ratio. Simulation results show that optimal oxygen excess ratio improves fuel cell performance compared to the results of constant oxygen excess ratio. The same procedures are performed experimentally for the FCS system. The behaviour of the net power of the fuel cell stack with respect to the variation of oxygen excess ratio is analyzed to obtain optimal values. Data of stack current and the corresponding voltage input to the compressor that gives optimal values of oxygen excess ratio are used to develop a feedforward control. Feedforward control based on constant and optimal oxygen excess ratio control, are implemented in the NedStack P8.0-64 PEM fuel cell stack system by using LabVIEW. Implementation results shows that optimal oxygen excess ratio control improves the fuel cell performance compared to the constant oxygen excess ratio control.

  10. Engineering the propagation of high-k bulk plasmonic waves in multilayer hyperbolic metamaterials by multiscale structuring

    DEFF Research Database (Denmark)

    Zhukovsky, Sergei; Lavrinenko, Andrei; Sipe, J. E.

    2013-01-01

    Propagation of large-wavevector bulk plasmonic waves in multilayer hyperbolic metamaterials (HMMs) with two levels of structuring is theoretically studied. It is shown that when the parameters of a subwavelength metal-dielectric multilayer (substructure) are modulated (superstructured) on a larger......, wavelength scale, the propagation of bulk plasmon polaritons in the resulting multiscale HMM is subject to photonic band gap phenomena. A great degree of control over such plasmons can be exerted by varying the superstructure geometry. As an example, Bragg reflection and Fabry-Pérot resonances...... to be a promising platform for using high-k bulk plasmonic waves as a new kind of information carriers, which can be used in far-field subwavelength imaging and plasmonic communication....

  11. Terahertz amplification in RTD-gated HEMTs with a grating-gate wave coupling topology

    Energy Technology Data Exchange (ETDEWEB)

    Condori Quispe, Hugo O.; Sensale-Rodriguez, Berardi [The University of Utah, Salt Lake City, Utah 84112 (United States); Encomendero-Risco, Jimy J.; Xing, Huili Grace [University of Notre Dame, Notre Dame, Indiana 46556 (United States); Cornell University, Ithaca, New York 14853 (United States)

    2016-08-08

    We theoretically analyze the operation of a terahertz amplifier consisting of a resonant-tunneling-diode gated high-electron-mobility transistor (RTD-gated HEMT) in a grating-gate topology. In these devices, the key element enabling substantial power gain is the efficient coupling of terahertz waves into and out of plasmons in the RTD-gated HEMT channel, i.e., the gain medium, via the grating-gate itself, part of the active device, rather than by an external antenna structure as discussed in previous works, therefore potentially enabling terahertz amplification with associated power gains >40 dB.

  12. Net K+ secretion in the thick ascending limb of mice on a low-Na, high-K diet.

    Science.gov (United States)

    Wang, Bangchen; Wen, Donghai; Li, Huaqing; Wang-France, Jun; Sansom, Steven C

    2017-10-01

    Because of its cardio-protective effects, a low-Na, high-K diet (LNaHK) is often warranted in conjunction with diuretics to treat hypertensive patients. However, it is necessary to understand the renal handling of such diets in order to choose the best diuretic. Wild-type (WT) or Renal Outer Medullary K channel (ROMK) knockout mice (KO) were given a regular (CTRL), LNaHK, or high-K diet (HK) for 4-7 days. On LNaHK, mice treated with either IP furosemide for 12 hrs, or given furosemide in drinking water for 7 days, exhibited decreased K clearance. We used free-flow micropuncture to measure the [K+] in the early distal tubule (EDT [K+]) before and after furosemide treatment. Furosemide increased the EDT [K+] in WT on CTRL but decreased that in WT on LNaHK. Furosemide did not affect the EDT [K+] of KO on LNaHK or WT on HK. Furosemide-sensitive Na+ excretion was significantly greater in mice on LNaHK than those on CTRL or HK. Patch clamp analysis of split-open TALs revealed that 70-pS ROMK exhibited a higher open probability (Po) but similar density in mice on LNaHK, compared with CTRL. No difference was found in the density or Po of the 30 pS K channels between the two groups. These results indicate mice on LNaHK exhibited furosemide-sensitive net K+ secretion in the TAL that is dependent on increased NKCC2 activity and mediated by ROMK. We conclude that furosemide is a K-sparing diuretic by decreasing the TAL net K+ secretion in subjects on LNaHK. Copyright © 2017 International Society of Nephrology. Published by Elsevier Inc. All rights reserved.

  13. TRADITIONAL WOODEN GATES IN THE SZEKLER LAND

    Directory of Open Access Journals (Sweden)

    GhiorghiŃă Nicolaie COMSA

    2013-09-01

    Full Text Available This paper presents specific aspects oftraditional wooden gates built in the rural area of thecounty of Harghita in Romania. One can see the loveand appreciation given to woodworking and outdoorelements of household adornment, beautiful insidetransmitted outside. Constructive elements andornaments are given specific geographical area.These gates belong to our national cultural heritage.

  14. Surround-gated vertical nanowire quantum dots

    NARCIS (Netherlands)

    Van Weert, M.H.M.; Den Heijer, M.; Van Kouwen, M.P.; Algra, R.E.; Bakkers, E.P.A.M.; Kouwenhoven, L.P.; Zwiller, V.

    2010-01-01

    We report voltage dependent photoluminescence experiments on single indium arsenide phosphide (InAsP) quantum dots embedded in vertical surround-gated indium phosphide (InP) nanowires. We show that by tuning the gate voltage, we can access different quantum dot charge states. We study the

  15. Full Piezoelectric Multilayer-Stacked Hybrid Actuation/Transduction Systems

    Science.gov (United States)

    Su, Ji; Jiang, Xiaoning; Zu, Tian-Bing

    2011-01-01

    The Stacked HYBATS (Hybrid Actuation/Transduction system) demonstrates significantly enhanced electromechanical performance by using the cooperative contributions of the electromechanical responses of multilayer, stacked negative strain components and positive strain components. Both experimental and theoretical studies indicate that, for Stacked HYBATS, the displacement is over three times that of a same-sized conventional flextensional actuator/transducer. The coupled resonance mode between positive strain and negative strain components of Stacked HYBATS is much stronger than the resonance of a single element actuation only when the effective lengths of the two kinds of elements match each other. Compared with the previously invented hybrid actuation system (HYBAS), the multilayer Stacked HYBATS can be designed to provide high mechanical load capability, low voltage driving, and a highly effective piezoelectric constant. The negative strain component will contract, and the positive strain component will expand in the length directions when an electric field is applied on the device. The interaction between the two elements makes an enhanced motion along the Z direction for Stacked-HYBATS. In order to dominate the dynamic length of Stacked-HYBATS by the negative strain component, the area of the cross-section for the negative strain component will be much larger than the total cross-section areas of the two positive strain components. The transverse strain is negative and longitudinal strain positive in inorganic materials, such as ceramics/single crystals. Different piezoelectric multilayer stack configurations can make a piezoelectric ceramic/single-crystal multilayer stack exhibit negative strain or positive strain at a certain direction without increasing the applied voltage. The difference of this innovation from the HYBAS is that all the elements can be made from one-of-a-kind materials. Stacked HYBATS can provide an extremely effective piezoelectric

  16. Stacking with the unnatural DNA base 6-ethynylpyridone

    Science.gov (United States)

    Gibson, Douglas J.; van Mourik, Tanja

    2017-01-01

    It was previously reported that the incorporation of 6-ethynylpyridone (E) into a DNA duplex (replacing T in a T:A base pair) leads to DNA duplexes that are more stable than the T:A-containing duplexes. DFT calculations at the M06-2X/6-31+G(d) and BLYP-D3/6-31+G(d) levels on various base pairs, stacked bases and stacked base pairs in continuum solvation water suggest that the observed increased stability of E:A-containing duplexes is due to the combined effects of stronger base pairing and enhanced stacking of the E:A base pair.

  17. Efficient Context Switching for the Stack Cache: Implementation and Analysis

    DEFF Research Database (Denmark)

    Abbaspourseyedi, Sahar; Brandner, Florian; Naji, Amine

    2015-01-01

    The design of tailored hardware has proven a successful strategy to reduce the timing analysis overhead for (hard) real-time systems. The stack cache is an example of such a design that has been proven to provide good average-case performance, while being easy to analyze. So far, however, the ana...... and restored when a task is preempted. We propose (a) an analysis exploiting the simplicity of the stack cache to bound the overhead induced by task pre-emption and (b) an extension of the design that allows to (partially) hide the overhead by virtualizing stack caches....

  18. 400 W High Temperature PEM Fuel Cell Stack Test

    DEFF Research Database (Denmark)

    Andreasen, Søren Juhl; Kær, Søren Knudsen

    2006-01-01

    This work demonstrates the operation of a 30 cell high temperature PEM (HTPEM) fuel cell stack. This prototype stack has been developed at the Institute of Energy Technology, Aalborg University, as a proof-of-concept for a low pressure cathode air cooled HTPEM stack. The membranes used are Celtec P...... of the species as in a LTPEM fuel cell system. The use of the HTPEM fuel cell makes it possible to use reformed gas at high CO concentrations, still with a stable efficient performance....

  19. PENGARUH POSISI STACK TERHADAP FREKUENSI RESONANSI PADA TABUNG RESONATOR TERMOAKUSTIK

    Directory of Open Access Journals (Sweden)

    Sigit Ristanto

    2013-05-01

    Full Text Available Telah dilakukan penelitian tentang pengaruh posisi stack dalam tabung resonator termoakustik terhadap frekuensi resonansi. Posisi stack ditaruh pada jarak 10 cm, 30 cm, dan 50 cm. Data frekuensi diambil menggunakan mikrofon yang dipasang pada ujung resonator. Mikrofon tersebut dihubungkan dengan laptop yang telah terisntall software sound card oscilloscope V1.40. Hasil penelitian menunjukkan variasi posisi stack tidak berpengaruh terhadap frekuensi resonansi, tetapi berpengaruh terhadap amplitudo maksimum pada masing-masing frekuensi resonansi. Amplitudo maksimum frekuensi resonansi terendah terjadi di tengah-tengah tabung resonator sedangkan amplitudo frekuensi resonansi terbesar terjadi pada ujung terjauh dari sumber bunyi.

  20. Fuel flow distribution in SOFC stacks revealed by impedance spectroscopy

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, Rasmus

    2014-01-01

    As SOFC technology is moving closer to a commercial break through, methods to measure the “state-of-health” of operating stacks are becoming of increasing interest. This requires application of advanced methods for detailed electrical and electrochemical characterization during operation. An oper......As SOFC technology is moving closer to a commercial break through, methods to measure the “state-of-health” of operating stacks are becoming of increasing interest. This requires application of advanced methods for detailed electrical and electrochemical characterization during operation...... utilizations. The fuel flow distribution provides important information about the operating limits of the stack when high electrical efficiency is required....

  1. Consolidity: Stack-based systems change pathway theory elaborated

    Directory of Open Access Journals (Sweden)

    Hassen Taher Dorrah

    2014-06-01

    Full Text Available This paper presents an elaborated analysis for investigating the stack-based layering processes during the systems change pathway. The system change pathway is defined as the path resulting from the combinations of all successive changes induced on the system when subjected to varying environments, activities, events, or any excessive internal or external influences and happenings “on and above” its normal stands, situations or set-points during its course of life. The analysis is essentially based on the important overall system paradigm of “Time driven-event driven-parameters change”. Based on this paradigm, it is considered that any affected activity, event or varying environment is intelligently self-recorded inside the system through an incremental consolidity-scaled change in system parameters of the stack-based layering types. Various joint stack-based mathematical and graphical approaches supported by representable case studies are suggested for the identification, extraction, and processing of various stack-based systems changes layering of different classifications and categorizations. Moreover, some selected real life illustrative applications are provided to demonstrate the (infinite stack-based identification and recognition of the change pathway process in the areas of geology, archeology, life sciences, ecology, environmental science, engineering, materials, medicine, biology, sociology, humanities, and other important fields. These case studies and selected applications revealed that there are general similarities of the stack-based layering structures and formations among all the various research fields. Such general similarities clearly demonstrate the global concept of the “fractals-general stacking behavior” of real life systems during their change pathways. Therefore, it is recommended that concentrated efforts should be expedited toward building generic modular stack-based systems or blocks for the mathematical

  2. Fabrication of high gradient insulators by stack compression

    Science.gov (United States)

    Harris, John Richardson; Sanders, Dave; Hawkins, Steven Anthony; Norona, Marcelo

    2014-04-29

    Individual layers of a high gradient insulator (HGI) are first pre-cut to their final dimensions. The pre-cut layers are then stacked to form an assembly that is subsequently pressed into an HGI unit with the desired dimension. The individual layers are stacked, and alignment is maintained, using a sacrificial alignment tube that is removed after the stack is hot pressed. The HGI's are used as high voltage vacuum insulators in energy storage and transmission structures or devices, e.g. in particle accelerators and pulsed power systems.

  3. The electrical activity of stacking faults in Czochralski silicon

    Science.gov (United States)

    Castaldini, A.; Cavallini, A.; Poggi, A.; Susi, E.

    1989-05-01

    A spectroscopic analysis by the light-beam-induced-current technique has been carried out to study the electrical properties of stacking faults in Czochralski silicon subjected to internal gettering treatments. By changing the wavelength of the light beam probing the sample, we have obtained the depth profiling of the stacking fault electrical activity. Occurrence of minority carrier recombination and generation processes at some stacking faults, corresponding, respectively, to dark and bright levels in a grey-shade imaging, has been observed. The presence of fixed charges at the defect-silicon matrix interface is hypothesized as a possible cause of the observed images.

  4. Fabrication of high gradient insulators by stack compression

    Energy Technology Data Exchange (ETDEWEB)

    Harris, John Richardson; Sanders, Dave; Hawkins, Steven Anthony; Norona, Marcelo

    2014-04-29

    Individual layers of a high gradient insulator (HGI) are first pre-cut to their final dimensions. The pre-cut layers are then stacked to form an assembly that is subsequently pressed into an HGI unit with the desired dimension. The individual layers are stacked, and alignment is maintained, using a sacrificial alignment tube that is removed after the stack is hot pressed. The HGI's are used as high voltage vacuum insulators in energy storage and transmission structures or devices, e.g. in particle accelerators and pulsed power systems.

  5. Loop Entropy Assists Tertiary Order: Loopy Stabilization of Stacking Motifs

    Directory of Open Access Journals (Sweden)

    Daniel P. Aalberts

    2011-11-01

    Full Text Available The free energy of an RNA fold is a combination of favorable base pairing and stacking interactions competing with entropic costs of forming loops. Here we show how loop entropy, surprisingly, can promote tertiary order. A general formula for the free energy of forming multibranch and other RNA loops is derived with a polymer-physics based theory. We also derive a formula for the free energy of coaxial stacking in the context of a loop. Simulations support the analytic formulas. The effects of stacking of unpaired bases are also studied with simulations.

  6. On $k$-stellated and $k$-stacked spheres

    OpenAIRE

    Bagchi, Bhaskar; Datta, Basudeb

    2012-01-01

    We introduce the class $\\Sigma_k(d)$ of $k$-stellated (combinatorial) spheres of dimension $d$ ($0 \\leq k \\leq d + 1$) and compare and contrast it with the class ${\\cal S}_k(d)$ ($0 \\leq k \\leq d$) of $k$-stacked homology $d$-spheres. We have $\\Sigma_1(d) = {\\cal S}_1(d)$, and $\\Sigma_k(d) \\subseteq {\\cal S}_k(d)$ for $d \\geq 2k - 1$. However, for each $k \\geq 2$ there are $k$-stacked spheres which are not $k$-stellated. The existence of $k$-stellated spheres which are not $k$-stacked remains...

  7. A Software Managed Stack Cache for Real-Time Systems

    DEFF Research Database (Denmark)

    Jordan, Alexander; Abbaspourseyedi, Sahar; Schoeberl, Martin

    2016-01-01

    to scratchpad memory regions aids predictability, it is limited to non-recursive programs and static allocation has to take different calling contexts into account. Using a stack cache that dynamically spills data to and fills data from external memory avoids these problems, while its simple design allows...... for efficiently deriving worst-case bounds through static analysis. In this paper we present the design and implementation of software managed caching of stack allocated data in a scratchpad memory. We demonstrate a compiler-aided implementation of a stack cache using the LLVM compiler framework and report on its...

  8. Top-gate pentacene-based organic field-effect transistor with amorphous rubrene gate insulator

    Science.gov (United States)

    Hiroki, Mizuha; Maeda, Yasutaka; Ohmi, Shun-ichiro

    2018-02-01

    The scaling of organic field-effect transistors (OFETs) is necessary for high-density integration and for this, OFETs with a top-gate configuration are required. There have been several reports of damageless lithography processes for organic semiconductor or insulator layers. However, it is still difficult to fabricate scaled OFETs with a top-gate configuration. In this study, the lift-off process and the device characteristics of the OFETs with a top-gate configuration utilizing an amorphous (α) rubrene gate insulator were investigated. We have confirmed that α-rubrene shows an insulating property, and its extracted linear mobility was 2.5 × 10‑2 cm2/(V·s). The gate length and width were 10 and 60 µm, respectively. From these results, the OFET with a top-gate configuration utilizing an α-rubrene gate insulator is promising for the high-density integration of scaled OFETs.

  9. Gating of Permanent Molds for ALuminum Casting

    Energy Technology Data Exchange (ETDEWEB)

    David Schwam; John F. Wallace; Tom Engle; Qingming Chang

    2004-03-30

    This report summarizes a two-year project, DE-FC07-01ID13983 that concerns the gating of aluminum castings in permanent molds. The main goal of the project is to improve the quality of aluminum castings produced in permanent molds. The approach taken was determine how the vertical type gating systems used for permanent mold castings can be designed to fill the mold cavity with a minimum of damage to the quality of the resulting casting. It is evident that somewhat different systems are preferred for different shapes and sizes of aluminum castings. The main problems caused by improper gating are entrained aluminum oxide films and entrapped gas. The project highlights the characteristic features of gating systems used in permanent mold aluminum foundries and recommends gating procedures designed to avoid common defects. The study also provides direct evidence on the filling pattern and heat flow behavior in permanent mold castings.

  10. Logic gates based on ion transistors.

    Science.gov (United States)

    Tybrandt, Klas; Forchheimer, Robert; Berggren, Magnus

    2012-05-29

    Precise control over processing, transport and delivery of ionic and molecular signals is of great importance in numerous fields of life sciences. Integrated circuits based on ion transistors would be one approach to route and dispense complex chemical signal patterns to achieve such control. To date several types of ion transistors have been reported; however, only individual devices have so far been presented and most of them are not functional at physiological salt concentrations. Here we report integrated chemical logic gates based on ion bipolar junction transistors. Inverters and NAND gates of both npn type and complementary type are demonstrated. We find that complementary ion gates have higher gain and lower power consumption, as compared with the single transistor-type gates, which imitates the advantages of complementary logics found in conventional electronics. Ion inverters and NAND gates lay the groundwork for further development of solid-state chemical delivery circuits.

  11. Comprehensive Study of Lanthanum Aluminate High-Dielectric-Constant Gate Oxides for Advanced CMOS Devices

    Directory of Open Access Journals (Sweden)

    Masamichi Suzuki

    2012-03-01

    Full Text Available A comprehensive study of the electrical and physical characteristics of Lanthanum Aluminate (LaAlO3 high-dielectric-constant gate oxides for advanced CMOS devices was performed. The most distinctive feature of LaAlO3 as compared with Hf-based high-k materials is the thermal stability at the interface with Si, which suppresses the formation of a low-permittivity Si oxide interfacial layer. Careful selection of the film deposition conditions has enabled successful deposition of an LaAlO3 gate dielectric film with an equivalent oxide thickness (EOT of 0.31 nm. Direct contact with Si has been revealed to cause significant tensile strain to the Si in the interface region. The high stability of the effective work function with respect to the annealing conditions has been demonstrated through comparison with Hf-based dielectrics. It has also been shown that the effective work function can be tuned over a wide range by controlling the La/(La + Al atomic ratio. In addition, gate-first n-MOSFETs with ultrathin EOT that use sulfur-implanted Schottky source/drain technology have been fabricated using a low-temperature process.

  12. Influence of nitrogen element on total-dose radiation response of high-k Hf-based dielectric films

    Energy Technology Data Exchange (ETDEWEB)

    Song Zhaorui [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China)]. E-mail: szr@mail.sim.ac.cn; Cheng Xinhong [Department of Physics, University of Wenzhou, Xueyuan Road, Wenzhou 325000 (China); Zhang Enxia [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Xing Yumei [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Shen Qinwo [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Yu Yuehui [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Zhang Zhengxuan [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Wang Xi [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050 (China); Shen Dashen [Department of Electrical and Computer Engineering, University of Alabama in Huntsville, Huntsville, AL 35899 (United States)

    2007-04-15

    The purpose of this paper is to report some total-dose radiation response experimental results of HfON dielectric films compared with HfO{sub 2} dielectric films, then discuss the influence of the added nitrogen element on total-dose radiation tolerance of HfON and HfO{sub 2} dielectric films. Results of electrical measurements showed that the equivalent oxide thickness (EOT) of the HfON and HfO{sub 2} gate dielectrics was 19.67 nm and 8.15 nm, respectively. The MIS structures with HfON and HfO{sub 2} dielectric films were irradiated with 10 keV X-rays. The flatband voltage shifts of HfON MIS structures are much smaller than HfO{sub 2} MIS structures under different total-dose from 0 to 3 x 10{sup 4} Gy(Si)

  13. Staticly Detect Stack Overflow Vulnerabilities with Taint Analysis

    Directory of Open Access Journals (Sweden)

    Xing Zhang

    2016-01-01

    Full Text Available Nowadays binary static analysis uses dangerous system library function to detect stack overflow vulnerary in program and there is no effective way to dig out the function which can cause stack overflow issue. List necessarily characteristics of the function which may cause stack overflow vulnerary and define stack overflow dangerous function(SODF. Then introduce static taint analysis to detect SODF include taint introduction, taint propagation and taint checking stragety. Next describe the particular process of detecting SODF in the program with static taint analysis. Finally choose 4 runtime library and 2 binary software, and detect whether the chosen software has SODF and locate the name of SODF with static taint analysis. Testing result shows that the algorithm can detect and locate plenty of SODF in test program which means the algorithm can work efficiently.

  14. A Stacked Microstrip Antenna Array with Fractal Patches

    National Research Council Canada - National Science Library

    Xueyao Ren; Xing Chen; Yufeng Liu; Wei Jin; Kama Huang

    2014-01-01

      A novel microstrip antenna array, which utilizes Giuseppe Peano fractal shaped patches as its radiation elements and adopts a two-layer stacked structure for achieving both wideband and high-gain...

  15. Sport stacking activities in school children's motor skill development.

    Science.gov (United States)

    Li, Yuhua; Coleman, Diane; Ransdell, Mary; Coleman, Lyndsie; Irwin, Carol

    2011-10-01

    This study examined the impact of a 12-wk. sport stacking intervention on reaction time (RT), manual dexterity, and hand-eye coordination in elementary school-aged children. 80 Grade 2 students participated in a 15-min. sport stacking practice session every school day for 12 wk., and were tested on psychomotor performance improvement. Tests for choice RT, manual dexterity, and photoelectric rotary pursuit tracking were conducted pre- and post-intervention for both experimental group (n = 36) and the controls (n = 44) who did no sport stacking. Students who had the intervention showed a greater improvement in two-choice RT. No other group difference was found. Such sport stacking activities may facilitate children's central processing and perceptual-motor integration.

  16. Static analysis of worst-case stack cache behavior

    DEFF Research Database (Denmark)

    Jordan, Alexander; Brandner, Florian; Schoeberl, Martin

    2013-01-01

    Utilizing a stack cache in a real-time system can aid predictability by avoiding interference that heap memory traffic causes on the data cache. While loads and stores are guaranteed cache hits, explicit operations are responsible for managing the stack cache. The behavior of these operations can......-graph, the worst-case bounds can be efficiently yet precisely determined. Our evaluation using the MiBench benchmark suite shows that only 37% and 21% of potential stack cache operations actually store to and load from memory, respectively. Analysis times are modest, on average running between 0.46s and 1.30s per...... be analyzed statically. We present algorithms that derive worst-case bounds on the latency-inducing operations of the stack cache. Their results can be used by a static WCET tool. By breaking the analysis down into subproblems that solve intra-procedural data-flow analysis and path searches on the call...

  17. Interlayer repulsion and decoupling effects in stacked turbostratic graphene flakes

    OpenAIRE

    Berashevich, Julia; Chakraborty, Tapash

    2011-01-01

    We have explored the electronic properties of stacked graphene flakes with the help of the quantum chemistry methods. We found that the behavior of a bilayer system is governed by the strength of the repulsive interactions that arise between the layers as a result of the orthogonality of their $\\pi$ orbitals. The decoupling effect, seen experimentally in AA stacked layers is a result of the repulsion being dominant over the orbital interactions and the observed layer misorientation of 2$^{\\ci...

  18. Polymer electrolyte fuel cell stack research and development

    Energy Technology Data Exchange (ETDEWEB)

    Squadrito, G.; Barbera, O.; Giacoppo, G.; Urbani, F.; Passalacqua, E. [Istituto di Tecnologie Avanzate per l' Energia ' ' Nicola Giordano' ' del CNR (CNR, ITAE), via Salita per, Santa Lucia sopra Contesse 5, Messina (Italy)

    2008-04-15

    The research activity in polymer electrolyte fuel cell (PEFC) is oriented to the evolution of components and devices for the temperature range from 20 to 130{sup o}C, and covers all the aspects of this matter: membranes and electrodes, fuel cell stack engineering (design and manufacturing) and characterization, computational modelling and small demonstration systems prototyping. Particular attention is devoted to portable and automotive application. Membranes research is focused on thermostable polymers (polyetheretherketone, polysulphone, etc.) and composite membranes able to operate at higher temperature (>100{sup o}C) and lower humidification than the commercial Nafion {sup registered}, while Pt load reduction and gas diffusion layer improvement are the main goals for the electrode development. PEFC stack engineering and characterization activity involve different aspects such as the investigation of new materials for stack components, fuel cell modelling and performance optimization by computational techniques, single cell and stack electrochemical characterization, development of investigation tools for stack monitoring and data acquisition. A lot of work has been focused to the fuel cell stack architecture, assembling, gas leakage and cross-over reduction (gasketing), flow field and manifold design. Computational fluid dynamics studies have been performed to investigate and improve reactants distribution inside the cell. A flow field design methodology, developed in this framework and related to serpentine like flow field, is actually under investigation. All of these aspects of PEFC stack research are realized in the framework of National and European research projects, or in collaboration with industries and other research centres. In the present work our stack research activity is reported and the most important results are also considered. (author)

  19. Comprehensive capacitance-voltage analysis including quantum effects for high-k interfaces on germanium and other alternative channel materials

    Science.gov (United States)

    Anwar, Sarkar R. M.

    High mobility alternative channel materials to silicon are critical to the continued scaling of metal oxide semiconductor (MOS) devices. However, before they can be incorporated into advanced devices, some major issues need to be solved. The high mobility materials suffer from lower allowable thermal budgets compared to Si (before desorption and defect formation becomes an issue) and the absence of a good quality native oxide has further increased the interest in the use of high-k dielectrics. However, the high interface state density and high electric fields at these semiconductor/high-k interfaces can significantly impact the capacitance-voltage (C-V) profile, and current C-V modeling software cannot account for these effects. This in turn affects the parameters extracted from the C-V data of the high mobility semiconductor/high-k interface, which are crucial to fully understand the interface properties and expedite process development. To address this issue, we developed a model which takes into account quantum corrections which can be applied to a number of these alternative channel materials including SixGe1-x, Ge, InGaAs, and GaAs. The C-V simulation using this QM correction model is orders of magnitude faster compared to a full band Schrodinger-Poisson solver. The simulated C-V is directly benchmarked to a self consistent Schrodinger-Poisson solution for each bulk semiconductor material, and from the benchmarking process the QM correction parameters are extracted. The full program, C-V Alternative Channel Extraction (CV ACE), incorporates a quantum mechanical correction model, along with the interface state density model, and can extract device parameters such as equivalent oxide thickness (EOT), doping density and flat band voltage (Vfb) as well as the interface state density profile using multiple measurements performed at different frequencies and temperatures, simultaneously. The program was used to analyze experimentally measured C-V profiles and the

  20. Low-voltage and hysteresis-free organic thin-film transistors employing solution-processed hybrid bilayer gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Ha, Tae-Jun [Department of Electronic Materials Engineering, Kwangwoon University, Seoul 139-701 (Korea, Republic of)

    2014-07-28

    This study presents a promising approach to realize low-voltage (<3 V) organic thin-film transistors (OTFTs) exhibiting improved electrical and optical stability. Such device performance results from the use of solution-processed hybrid bilayer gate dielectrics consisting of zirconium dioxide (high-k dielectric) and amorphous fluoropolymer, CYTOP{sup ®} (low-k dielectric). Employing a very thin amorphous fluoropolymer film reduces interfacial defect-states by repelling water molecules and other aqueous chemicals from an organic semiconductor active layer due to the hydrophobic surface-property. The chemically clean interface, stemming from decrease in density of trap states improves all the key device properties such as field-effect mobility, threshold voltage, and sub-threshold swing. Furthermore, degradation by electrical bias-stress and photo-induced hysteresis were suppressed in OTFTs employing hybrid bilayer gate dielectrics.

  1. Electric utility acid fuel cell stack technology advancement

    Science.gov (United States)

    Congdon, J. V.; Goller, G. J.; Greising, G. J.; Obrien, J. J.; Randall, S. A.; Sandelli, G. J.; Breault, R. D.; Austin, G. W.; Bopse, S.; Coykendall, R. D.

    1984-01-01

    The principal effort under this program was directed at the fuel cell stack technology required to accomplish the initial feasibility demonstrations of increased cell stack operating pressures and temperatures, increased cell active area, incorporation of the ribbed substrate cell configuration at the bove conditions, and the introduction of higher performance electrocatalysts. The program results were successful with the primary accomplishments being: (1) fabrication of 10 sq ft ribbed substrate, cell components including higher performing electrocatalysts; (2) assembly of a 10 sq ft, 30-cell short stack; and (3) initial test of this stack at 120 psia and 405 F. These accomplishments demonstrate the feasibility of fabricating and handling large area cells using materials and processes that are oriented to low cost manufacture. An additional accomplishment under the program was the testing of two 3.7 sq ft short stacks at 12 psia/405 F to 5400 and 4500 hours respectively. These tests demonstrate the durability of the components and the cell stack configuration to a nominal 5000 hours at the higher pressure and temperature condition planned for the next electric utility power plant.

  2. Implementation of an IMU Aided Image Stacking Algorithm in a Digital Camera for Unmanned Aerial Vehicles.

    Science.gov (United States)

    Audi, Ahmad; Pierrot-Deseilligny, Marc; Meynard, Christophe; Thom, Christian

    2017-07-18

    Images acquired with a long exposure time using a camera embedded on UAVs (Unmanned Aerial Vehicles) exhibit motion blur due to the erratic movements of the UAV. The aim of the present work is to be able to acquire several images with a short exposure time and use an image processing algorithm to produce a stacked image with an equivalent long exposure time. Our method is based on the feature point image registration technique. The algorithm is implemented on the light-weight IGN (Institut national de l'information géographique) camera, which has an IMU (Inertial Measurement Unit) sensor and an SoC (System on Chip)/FPGA (Field-Programmable Gate Array). To obtain the correct parameters for the resampling of the images, the proposed method accurately estimates the geometrical transformation between the first and the N -th images. Feature points are detected in the first image using the FAST (Features from Accelerated Segment Test) detector, then homologous points on other images are obtained by template matching using an initial position benefiting greatly from the presence of the IMU sensor. The SoC/FPGA in the camera is used to speed up some parts of the algorithm in order to achieve real-time performance as our ultimate objective is to exclusively write the resulting image to save bandwidth on the storage device. The paper includes a detailed description of the implemented algorithm, resource usage summary, resulting processing time, resulting images and block diagrams of the described architecture. The resulting stacked image obtained for real surveys does not seem visually impaired. An interesting by-product of this algorithm is the 3D rotation estimated by a photogrammetric method between poses, which can be used to recalibrate in real time the gyrometers of the IMU. Timing results demonstrate that the image resampling part of this algorithm is the most demanding processing task and should also be accelerated in the FPGA in future work.

  3. Implementation of an IMU Aided Image Stacking Algorithm in a Digital Camera for Unmanned Aerial Vehicles

    Directory of Open Access Journals (Sweden)

    Ahmad Audi

    2017-07-01

    Full Text Available Images acquired with a long exposure time using a camera embedded on UAVs (Unmanned Aerial Vehicles exhibit motion blur due to the erratic movements of the UAV. The aim of the present work is to be able to acquire several images with a short exposure time and use an image processing algorithm to produce a stacked image with an equivalent long exposure time. Our method is based on the feature point image registration technique. The algorithm is implemented on the light-weight IGN (Institut national de l’information géographique camera, which has an IMU (Inertial Measurement Unit sensor and an SoC (System on Chip/FPGA (Field-Programmable Gate Array. To obtain the correct parameters for the resampling of the images, the proposed method accurately estimates the geometrical transformation between the first and the N-th images. Feature points are detected in the first image using the FAST (Features from Accelerated Segment Test detector, then homologous points on other images are obtained by template matching using an initial position benefiting greatly from the presence of the IMU sensor. The SoC/FPGA in the camera is used to speed up some parts of the algorithm in order to achieve real-time performance as our ultimate objective is to exclusively write the resulting image to save bandwidth on the storage device. The paper includes a detailed description of the implemented algorithm, resource usage summary, resulting processing time, resulting images and block diagrams of the described architecture. The resulting stacked image obtained for real surveys does not seem visually impaired. An interesting by-product of this algorithm is the 3D rotation estimated by a photogrammetric method between poses, which can be used to recalibrate in real time the gyrometers of the IMU. Timing results demonstrate that the image resampling part of this algorithm is the most demanding processing task and should also be accelerated in the FPGA in future work.

  4. Gate-tunable carbon nanotube–MoS2 heterojunction p-n diode

    Science.gov (United States)

    Jariwala, Deep; Sangwan, Vinod K.; Wu, Chung-Chiang; Prabhumirashi, Pradyumna L.; Geier, Michael L.; Marks, Tobin J.; Lauhon, Lincoln J.; Hersam, Mark C.

    2013-01-01

    The p-n junction diode and field-effect transistor are the two most ubiquitous building blocks of modern electronics and optoelectronics. In recent years, the emergence of reduced dimensionality materials has suggested that these components can be scaled down to atomic thicknesses. Although high-performance field-effect devices have been achieved from monolayered materials and their heterostructures, a p-n heterojunction diode derived from ultrathin materials is notably absent and constrains the fabrication of complex electronic and optoelectronic circuits. Here we demonstrate a gate-tunable p-n heterojunction diode using semiconducting single-walled carbon nanotubes (SWCNTs) and single-layer molybdenum disulfide as p-type and n-type semiconductors, respectively. The vertical stacking of these two direct band gap semiconductors forms a heterojunction with electrical characteristics that can be tuned with an applied gate bias to achieve a wide range of charge transport behavior ranging from insulating to rectifying with forward-to-reverse bias current ratios exceeding 104. This heterojunction diode also responds strongly to optical irradiation with an external quantum efficiency of 25% and fast photoresponse <15 μs. Because SWCNTs have a diverse range of electrical properties as a function of chirality and an increasing number of atomically thin 2D nanomaterials are being isolated, the gate-tunable p-n heterojunction concept presented here should be widely generalizable to realize diverse ultrathin, high-performance electronics and optoelectronics. PMID:24145425

  5. Thermal stability of HfOxNy gate dielectrics on p-GaAs substrates

    Science.gov (United States)

    Das, T.; Mahata, C.; Dalapati, G. K.; Chi, D. Z.; Sutradhar, G.; Bose, P. K.; Chia, C. K.; Chiam, S. Y.; Pan, J. S.; Zhang, Z.; Maiti, C. K.

    2010-12-01

    The structural, electrical and interfacial properties of metal-oxide-semiconductor (MOS) capacitors with hafnium-oxynitride (HfOxNy) gate dielectrics on p-GaAs substrates were investigated with post-deposition annealing (PDA). X-ray photoelectron spectra (XPS) show the presence of nitrogen at the interface and the intensity increases with annealing temperatures. Although the defective Ga-oxide increases with temperatures, the presence of nitrogen stabilizes and modulates the interface trap by reducing the oxygen vacancy. The electrical characteristics of GaAs MOS devices with HfOxNy gate dielectric show low interface state density, frequency dispersion and hysteresis voltage even after annealing at 600 °C. The accumulation capacitance decreases with annealing temperatures due to the formation of a stable thick nitride interfacial layer. The leakage current density of ~2.4 × 10-6 A cm-2 at VG = -1 V was achieved after 600 °C annealing for an EOT of 3.9 nm. The thermal stability and charge trapping behavior of the HfOxNy/p-GaAs gate stack at a constant voltage and current stressing have exhibited good interface quality and high dielectric reliability, making the films suitable for GaAs-based complementary metal-oxide-semiconductor technology

  6. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

    Directory of Open Access Journals (Sweden)

    Paul C. McIntyre

    2012-07-01

    Full Text Available The literature on polar Gallium Nitride (GaN surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

  7. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

    Science.gov (United States)

    Long, Rathnait D.; McIntyre, Paul C.

    2012-01-01

    The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

  8. Calibration of submerged multi-sluice gates

    Directory of Open Access Journals (Sweden)

    Mohamed F. Sauida

    2014-09-01

    The main objective of this work is to study experimentally and verify empirically the different parameters affecting the discharge through submerged multiple sluice gates (i.e., the expansion ratios, gates operational management, etc.. Using multiple regression analysis of the experimental results, a general equation for discharge coefficient is developed. The results show, that the increase in the expansion ratio and the asymmetric operation of gates, give higher values for the discharge coefficient. The obtained predictions of the discharge coefficient using the developed equations are compared to the experimental data. The present developed equations showed good consistency and high accuracy.

  9. Gate A: changes to opening hours

    CERN Multimedia

    2015-01-01

    Due to maintenance work, the opening hours of Gate A (near Reception) will be modified between Monday, 13 and Friday, 17 April 2015.   During this period, the gate will be open to vehicles between 7 a.m. and 9.30 a.m., then between 4.30 p.m. and 7 p.m. It will be completely closed to traffic between 9.30 a.m. and 4.30 p.m. Pedestrians and cyclists may continue to use the gate. We apologise for any inconvenience and thank you for your understanding.

  10. Getting started with FortiGate

    CERN Document Server

    Fabbri, Rosato

    2013-01-01

    This book is a step-by-step tutorial that will teach you everything you need to know about the deployment and management of FortiGate, including high availability, complex routing, various kinds of VPN working, user authentication, security rules and controls on applications, and mail and Internet access.This book is intended for network administrators, security managers, and IT pros. It is a great starting point if you have to administer or configure a FortiGate unit, especially if you have no previous experience. For people that have never managed a FortiGate unit, the book helpfully walks t

  11. Capacitance–voltage analysis of electrical properties for WSe2 field effect transistors with high-k encapsulation layer

    Science.gov (United States)

    Ko, Seung-Pil; Shin, Jong Mok; Jang, Ho Kyun; You, Min Youl; Jin, Jun-Eon; Choi, Miri; Cho, Jiung; Kim, Gyu-Tae

    2018-02-01

    Doping effects in devices based on two-dimensional (2D) materials have been widely studied. However, detailed analysis and the mechanism of the doping effect caused by encapsulation layers has not been sufficiently explored. In this work, we present experimental studies on the n-doping effect in WSe2 field effect transistors (FETs) with a high-k encapsulation layer (Al2O3) grown by atomic layer deposition. In addition, we demonstrate the mechanism and origin of the doping effect. After encapsulation of the Al2O3 layer, the threshold voltage of the WSe2 FET negatively shifted with the increase of the on-current. The capacitance–voltage measurements of the metal insulator semiconductor (MIS) structure proved the presence of the positive fixed charges within the Al2O3 layer. The flat-band voltage of the MIS structure of Au/Al2O3/SiO2/Si was shifted toward the negative direction on account of the positive fixed charges in the Al2O3 layer. Our results clearly revealed that the fixed charges in the Al2O3 encapsulation layer modulated the Fermi energy level via the field effect. Moreover, these results possibly provide fundamental ideas and guidelines to design 2D materials FETs with high-performance and reliability.

  12. Semiconductor growth on an oxide using a metallic surfactant and interface studies for potential gate stacks from first principles

    Energy Technology Data Exchange (ETDEWEB)

    Reyes Huamantinco, Andrei

    2008-05-09

    In this work the epitaxial growth of germanium on SrHfO{sub 3}(001), and the La{sub 2}Hf{sub 2}O{sub 7}/Si(001) and SrTiO{sub 3}/GaAs(001) interfaces were studied theoretically using the Projector-Augmented Wave (PAW) method. The PAW method is based on Density Functional Theory and it is implemented in the Car-Parrinello Ab-Initio Molecular Dynamics. The goal of the germanium growth on SrHfO{sub 3}(001) is to form a germanium film with low density of defects and smooth morphology, to be used as channel in a transistor. The feasibility of using a third material to achieve germanium layer-by-layer growth was investigated. The formation of an ordered strontium film on a SrO-terminated oxide substrate, to be used as template for germanium overgrowth, was studied. Deposition of germanium on the strontium 1ML template results in wetting and thus a change of the growth mode to layer-by-layer. The germanium surface is then passivated and a germanium compound is initially formed with strontium at the surface and interface. The interfacial structure and valence band offsets of the La{sub 2}Hf{sub 2}O{sub 7}/Si(001) crystalline system were studied. The SrTiO{sub 3}/GaAs(001) crystalline interfaces with unpinned Fermi level were investigated. (orig.)

  13. Efficient Design of Exclusive-Or Gate using 5-Input Majority Gate in QCA

    Science.gov (United States)

    Jaiswal, Ramanand; Nath Sasamal, Trailokya

    2017-08-01

    Quantum dot cellular automata (QCA) is one of the emerging technology that has the capability of replacing the CMOS based technology at nano scale level. Majority gates and inverter are the principle elements in QCA to design any circuit. In this work, we propose a new 5-input majority gate. The new proposed gate reduces number of required cell, area and power consumption. The study of power dissipation is also explained using power estimator tool QCAPro. QCA designer 2.0.3 is used to validate the majority gate layout and their functionality. Furthermore, an XOR gate based on QCA are designed using proposed majority gate. Layout and simulation results show the improvement of proposed circuit over previous designed circuits.

  14. Capacitive effective thickness of a few nanometers by atomic layer deposition and device performance in Ge gate-all-around fin field effect transistors

    Science.gov (United States)

    Chu, Chu-Lin; Chen, Bo-Yuan; Fuh, Yiin-Kuen

    2015-10-01

    Ge gate-all-around fin field-effect transistors (Ge FinFETs) with a capacitive effective thickness of a few nanometers have been successfully achieved via atomic-layer-deposited (ALD) high-dielectric Al2O3 on GeO2/Ge and by adopting low-cost thermo ALD equipment. The MOS interface properties of the ZrO2 or Al2O3/GeO2/Ge structures have been studied systematically. It has been found that a GeO2 interfacial layer that is greater than approximately 2.5 nm results in a significant degradation of the MOS interfaces, while an equivalent oxide thickness of FinFET's value has been demonstrated with the Al2O3/GeO2/Ge gate stack prepared using a thermal ALD layer of Al2O3. The experimental results indicate that the MOS interface quality obtained with the technique developed for high-permittivity/Ge gate stacks is also extremely useful for the fabrication of triangle-fin complementary metal oxide semiconductor devices. An I/I ratio of 3.2×104 and a subthreshold swing of 103 mV/dec were obtained for the triangular n-type Ge gate-all-around FET with (111) sidewalls. The drain current at VGS-VT=VDS=-1.5 V is 88 mA/mm.

  15. GATING SYSTEMS FOR PRODUCTION OF HYDRODISTRIBUTORS

    Directory of Open Access Journals (Sweden)

    D. A. Volkov

    2010-01-01

    Full Text Available Gating systems of the first group of special ways of casting into shell molds, casting in lined chill mold as more effective for production of hydrodistributors were developed and studied.

  16. 2010 ARRA Lidar: Golden Gate (CA)

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — The Golden Gate LiDAR Project is a cooperative project sponsored by the US Geological Survey (USGS) and San Francisco State University (SFSU) that has resulted in...

  17. Synthesizing Biomolecule-based Boolean Logic Gates

    Science.gov (United States)

    Miyamoto, Takafumi; Razavi, Shiva; DeRose, Robert; Inoue, Takanari

    2012-01-01

    One fascinating recent avenue of study in the field of synthetic biology is the creation of biomolecule-based computers. The main components of a computing device consist of an arithmetic logic unit, the control unit, memory, and the input and output devices. Boolean logic gates are at the core of the operational machinery of these parts, hence to make biocomputers a reality, biomolecular logic gates become a necessity. Indeed, with the advent of more sophisticated biological tools, both nucleic acid- and protein-based logic systems have been generated. These devices function in the context of either test tubes or living cells and yield highly specific outputs given a set of inputs. In this review, we discuss various types of biomolecular logic gates that have been synthesized, with particular emphasis on recent developments that promise increased complexity of logic gate circuitry, improved computational speed, and potential clinical applications. PMID:23526588

  18. Digital gate pulse generator for cycloconverter control

    Science.gov (United States)

    Klein, Frederick F.; Mutone, Gioacchino A.

    1989-01-01

    The present invention provides a digital gate pulse generator which controls the output of a cycloconverter used for electrical power conversion applications by determining the timing and delivery of the firing pulses to the switching devices in the cycloconverter. Previous gate pulse generators have been built with largely analog or discrete digital circuitry which require many precision components and periodic adjustment. The gate pulse generator of the present invention utilizes digital techniques and a predetermined series of values to develop the necessary timing signals for firing the switching device. Each timing signal is compared with a reference signal to determine the exact firing time. The present invention is significantly more compact than previous gate pulse generators, responds quickly to changes in the output demand and requires only one precision component and no adjustments.

  19. Analog noise reduction in enzymatic logic gates.

    Science.gov (United States)

    Melnikov, Dmitriy; Strack, Guinevere; Pita, Marcos; Privman, Vladimir; Katz, Evgeny

    2009-07-30

    In this work, we demonstrate both experimentally and theoretically that the analog noise generation by a single enzymatic logic gate can be dramatically reduced to yield gate operation with virtually no input noise amplification. We demonstrate that when a cosubstrate with a much smaller affinity than the primary substrate is used, a negligible increase in the noise output from the logic gate is obtained, as compared to the input noise level. Our general theoretical conclusions were confirmed by experimental realizations of the AND logic gate based on the enzyme horseradish peroxidase using hydrogen peroxide as the substrate, with 2,2'-azino-bis(3-ethylbenzthiazoline-6-sulfonic acid) or ferrocyanide as cosubstrates with vastly different rate constants.

  20. Greening the Golden Gate National Recreation Area

    Science.gov (United States)

    The Golden Gate National Recreation Area was recognized a 2016 Federal Green Challenge Award for making significant strides to reduce its carbon footprint with the goal of becoming a carbon neutral park.

  1. Gating of InAs/GaSb quantum wells using a silicon monoxide gate insulator

    Science.gov (United States)

    Rahman, F.; Gallagher, B. L.; Behet, M.; De Boeck, J.

    1998-07-01

    We report on a technique we have recently developed to fabricate very high quality gates and gated structures on InAs/AlxGa1-xSb quantum wells. The low thermal budget process leads to highly stable gates with extremely low leakage currents. Both electron and hole concentrations can be changed over a wide range by the application of modest gate voltages. We obtain a dn/dV value of 5×1011cm2/V for electrons and 1.6×1012cm2/V for holes at 1.2 K.

  2. Design of AND logic gate using NAND gate in photonic crystal waveguides

    Science.gov (United States)

    Fatima, Shiba; Rani, Preeti; Kalra, Yogita; Sinha, R. K.

    2016-09-01

    In this paper, we have proposed the design of all-optical AND logic gate using the combination of universal NAND gates. The structure consists of hexagonal arrangement of air holes in silicon. The proposed structure has been designed using the finite difference time domain (FDTD) method. The optimized NAND gates have been arranged in a combination such that the combined structure behaves as an all-optical AND logic gate. The proposed structure exhibits a response period of 6.48ps and bit rate of 0.154 Tb/sec.

  3. Deletion of cytosolic gating ring decreases gate and voltage sensor coupling in BK channels.

    Science.gov (United States)

    Zhang, Guohui; Geng, Yanyan; Jin, Yakang; Shi, Jingyi; McFarland, Kelli; Magleby, Karl L; Salkoff, Lawrence; Cui, Jianmin

    2017-03-06

    Large conductance Ca 2+ -activated K + channels (BK channels) gate open in response to both membrane voltage and intracellular Ca 2+ The channel is formed by a central pore-gate domain (PGD), which spans the membrane, plus transmembrane voltage sensors and a cytoplasmic gating ring that acts as a Ca 2+ sensor. How these voltage and Ca 2+ sensors influence the common activation gate, and interact with each other, is unclear. A previous study showed that a BK channel core lacking the entire cytoplasmic gating ring (Core-MT) was devoid of Ca 2+ activation but retained voltage sensitivity (Budelli et al. 2013. Proc. Natl. Acad. Sci. USA http://dx.doi.org/10.1073/pnas.1313433110). In this study, we measure voltage sensor activation and pore opening in this Core-MT channel over a wide range of voltages. We record gating currents and find that voltage sensor activation in this truncated channel is similar to WT but that the coupling between voltage sensor activation and gating of the pore is reduced. These results suggest that the gating ring, in addition to being the Ca 2+ sensor, enhances the effective coupling between voltage sensors and the PGD. We also find that removal of the gating ring alters modulation of the channels by the BK channel's β1 and β2 subunits. © 2017 Zhang et al.

  4. 40 CFR 62.15235 - How are the stack test data used?

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false How are the stack test data used? 62..., 1999 Stack Testing § 62.15235 How are the stack test data used? You must use results of stack tests for dioxins/furans, cadmium, lead, mercury, particulate matter, opacity, hydrogen chloride, and fugitive ash...

  5. 40 CFR 60.1775 - What types of stack tests must I conduct?

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 6 2010-07-01 2010-07-01 false What types of stack tests must I...-Stack Testing § 60.1775 What types of stack tests must I conduct? Conduct initial and annual stack tests..., hydrogen chloride, and fugitive ash. ...

  6. Effect of electrode balance on performance degradation and gas emission in stacked-type electrochemical capacitors

    Science.gov (United States)

    Kim, Yu Tack; Kim, Kwang-Bum; Jin, Chang-Soo; Yoo, Eo-Hyun

    2015-11-01

    For electrochemical capacitor, the specific capacitance in positive is not equal to negative because of different sizes between cation and anion such as TEABF4/PC. In stacked-type of electrochemical capacitor, the optimized stacked-type cell generates gas 25% lower than current stacked-type cell. Our results show that H2 gas emitted from current stacked-type is twice that from optimized stacked-type; the proportion of CO in current stacked-type is similar to optimized stacked-type, while that of CO2 in optimized stacked-type is 73% of that in current stacked-type. The working voltages of the current stacked-type capacitor and optimized stacked-type are expected to be around 3.3V and below 3.0V, respectively, because the amount of gas emissions from optimized stacked-type is estimated to be 30% less than that from current stacked-type. And higher reliability is shown in optimized stacked-type with alkali activated carbon in positive and steam activation carbon in negative. The generated gas volume by optimized stacked-type with different carbon is decreased around 50% than current stacked-type electrochemical capacitor.

  7. Induced Cavities for Photonic Quantum Gates

    Science.gov (United States)

    Lahad, Ohr; Firstenberg, Ofer

    2017-09-01

    Effective cavities can be optically induced in atomic media and employed to strengthen optical nonlinearities. Here we study the integration of induced cavities with a photonic quantum gate based on Rydberg blockade. Accounting for loss in the atomic medium, we calculate the corresponding finesse and gate infidelity. Our analysis shows that the conventional limits imposed by the blockade optical depth are mitigated by the induced cavity in long media, thus establishing the total optical depth of the medium as a complementary resource.

  8. Reversible logic gate using adiabatic superconducting devices

    OpenAIRE

    Takeuchi, N.; Y. Yamanashi; Yoshikawa, N.

    2014-01-01

    Reversible computing has been studied since Rolf Landauer advanced the argument that has come to be known as Landauer's principle. This principle states that there is no minimum energy dissipation for logic operations in reversible computing, because it is not accompanied by reductions in information entropy. However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energy-efficient logic...

  9. Hysteresis in voltage-gated channels.

    Science.gov (United States)

    Villalba-Galea, Carlos A

    2017-03-04

    Ion channels constitute a superfamily of membrane proteins found in all living creatures. Their activity allows fast translocation of ions across the plasma membrane down the ion's transmembrane electrochemical gradient, resulting in a difference in electrical potential across the plasma membrane, known as the membrane potential. A group within this superfamily, namely voltage-gated channels, displays activity that is sensitive to the membrane potential. The activity of voltage-gated channels is controlled by the membrane potential, while the membrane potential is changed by these channels' activity. This interplay produces variations in the membrane potential that have evolved into electrical signals in many organisms. These signals are essential for numerous biological processes, including neuronal activity, insulin release, muscle contraction, fertilization and many others. In recent years, the activity of the voltage-gated channels has been observed not to follow a simple relationship with the membrane potential. Instead, it has been shown that the activity of voltage-gated channel displays hysteresis. In fact, a growing number of evidence have demonstrated that the voltage dependence of channel activity is dynamically modulated by activity itself. In spite of the great impact that this property can have on electrical signaling, hysteresis in voltage-gated channels is often overlooked. Addressing this issue, this review provides examples of voltage-gated ion channels displaying hysteretic behavior. Further, this review will discuss how Dynamic Voltage Dependence in voltage-gated channels can have a physiological role in electrical signaling. Furthermore, this review will elaborate on the current thoughts on the mechanism underlying hysteresis in voltage-gated channels.

  10. GaTe semiconductor for radiation detection

    Science.gov (United States)

    Payne, Stephen A [Castro Valley, CA; Burger, Arnold [Nashville, TN; Mandal, Krishna C [Ashland, MA

    2009-06-23

    GaTe semiconductor is used as a room-temperature radiation detector. GaTe has useful properties for radiation detectors: ideal bandgap, favorable mobilities, low melting point (no evaporation), non-hygroscopic nature, and availability of high-purity starting materials. The detector can be used, e.g., for detection of illicit nuclear weapons and radiological dispersed devices at ports of entry, in cities, and off shore and for determination of medical isotopes present in a patient.

  11. Wavelength Gated Dynamic Covalent Chemistry.

    Science.gov (United States)

    Frisch, Hendrik; Marschner, David; Goldmann, Anja; Barner-Kowollik, Christopher

    2017-10-24

    Precise control of chemical reactions constitutes the foundation of synthesis. Classically, judicious functional group choice as well as external factors such as temperature and catalysts are used to exert control, yet the recent renaissance of light as a medium to direct chemical synthesis points to the advent of a new era in enabling chemical selectivity. Light-guided reactions not only offer precise temporal and spatial control, yet critically allow to selectively address highly specific reaction channels gated by wavelength and intensity, resulting in a unique level of reaction control via covalent bonds that can be made and unmade by finely regulated photonic fields. Photoreversible cycloadditions are the most promising candidates to seize the outlined potential upon selective cyclisation and cycloreversion, yet are today still far from fulfilling these expectations. Herein, we critically explore the current challenges in the application of photoreversible cycloadditions and discuss the steps necessary to seize their potential in molecular biology, biomimetic systems, 3D laser lithographic processes and advanced soft matter materials with reprogrammable and self-healing properties. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. Fabrication, characterization and simulation of Ω-gate twin poly-Si FinFET nonvolatile memory

    Science.gov (United States)

    Yeh, Mu-Shih; Wu, Yung-Chun; Hung, Min-Feng; Liu, Kuan-Cheng; Jhan, Yi-Ruei; Chen, Lun-Chun; Chang, Chun-Yen

    2013-07-01

    This study proposed the twin poly-Si fin field-effect transistor (FinFET) nonvolatile memory with a structure that is composed of Ω-gate nanowires (NWs). Experimental results show that the NW device has superior memory characteristics because its Ω-gate structure provides a large memory window and high program/erase efficiency. With respect to endurance and retention, the memory window can be maintained at 3.5 V after 104 program and erase cycles, and after 10 years, the charge is 47.7% of its initial value. This investigation explores its feasibility in the future active matrix liquid crystal display system-on-panel and three-dimensional stacked flash memory applications.

  13. Investigation of metal-gate work-function variability in FinFET structures and implications for SRAM cell design

    Science.gov (United States)

    Rathore, Rituraj Singh; Rana, Ashwani K.

    2017-10-01

    In sub-20 nm CMOS technology nodes, the parameter variability has become a main hurdle during the scaling of devices. Recently, the use of metal gate stacks in nano-scale FinFET structure has a significant impact on the intrinsic parameter fluctuations due to the granular nature of metals. A 14 nm FinFET structure has been considered to study the impact of metal-gate work-function variability by using the 3-D device and mixed mode circuit simulation. The present work investigates the impact of work function variability (WFV) on electrical characteristics of various possible FinFET architectures followed by the regression model. Further, the investigation has been extended to study the stability performance of 6-T SRAM cell under the influence of WFV. It is observed that work function variation may result in considerable performance degradation in device as well as SRAM operation in nano domain.

  14. VKCDB: Voltage-gated potassium channel database

    Directory of Open Access Journals (Sweden)

    Gallin Warren J

    2004-01-01

    Full Text Available Abstract Background The family of voltage-gated potassium channels comprises a functionally diverse group of membrane proteins. They help maintain and regulate the potassium ion-based component of the membrane potential and are thus central to many critical physiological processes. VKCDB (Voltage-gated potassium [K] Channel DataBase is a database of structural and functional data on these channels. It is designed as a resource for research on the molecular basis of voltage-gated potassium channel function. Description Voltage-gated potassium channel sequences were identified by using BLASTP to search GENBANK and SWISSPROT. Annotations for all voltage-gated potassium channels were selectively parsed and integrated into VKCDB. Electrophysiological and pharmacological data for the channels were collected from published journal articles. Transmembrane domain predictions by TMHMM and PHD are included for each VKCDB entry. Multiple sequence alignments of conserved domains of channels of the four Kv families and the KCNQ family are also included. Currently VKCDB contains 346 channel entries. It can be browsed and searched using a set of functionally relevant categories. Protein sequences can also be searched using a local BLAST engine. Conclusions VKCDB is a resource for comparative studies of voltage-gated potassium channels. The methods used to construct VKCDB are general; they can be used to create specialized databases for other protein families. VKCDB is accessible at http://vkcdb.biology.ualberta.ca.

  15. Assessment of the 296-S-21 Stack Sampling Probe Location

    Energy Technology Data Exchange (ETDEWEB)

    Glissmeyer, John A.

    2006-09-08

    Tests were performed to assess the suitability of the location of the air sampling probe on the 296-S-21 stack according to the criteria of ANSI N13.1-1999, Sampling and Monitoring Releases of Airborne Radioactive Substances from the Stacks and Ducts of Nuclear Facilities. Pacific Northwest National Laboratory conducted most tests on a 3.67:1 scale model of the stack. CH2MHill also performed some limited confirmatory tests on the actual stack. The tests assessed the capability of the air-monitoring probe to extract a sample representative of the effluent stream. The tests were conducted for the practical combinations of operating fans and addressed: (1) Angular Flow--The purpose is to determine whether the velocity vector is aligned with the sampling nozzle. The average yaw angle relative to the nozzle axis should not be more than 20. The measured values ranged from 5 to 11 degrees on the scale model and 10 to 12 degrees on the actual stack. (2) Uniform Air Velocity--The gas momentum across the stack cross section where the sample is extracted should be well mixed or uniform. The uniformity is expressed as the variability of the measurements about the mean, the coefficient of variance (COV). The lower the COV value, the more uniform the velocity. The acceptance criterion is that the COV of the air velocity must be ?20% across the center two-thirds of the area of the stack. At the location simulating the sampling probe, the measured values ranged form 4 to 11%, which are within the criterion. To confirm the validity of the scale model results, air velocity uniformity measurements were made both on the actual stack and on the scale model at the test ports 1.5 stack diameters upstream of the sampling probe. The results ranged from 6 to 8% COV on the actual stack and 10 to 13% COV on the scale model. The average difference for the eight runs was 4.8% COV, which is within the validation criterion. The fact that the scale model results were slightly higher than the

  16. Generalized diffraction-stack migration and filtering of coherent noise

    KAUST Repository

    Zhan, Ge

    2014-01-27

    We reformulate the equation of reverse-time migration so that it can be interpreted as summing data along a series of hyperbola-like curves, each one representing a different type of event such as a reflection or multiple. This is a generalization of the familiar diffraction-stack migration algorithm where the migration image at a point is computed by the sum of trace amplitudes along an appropriate hyperbola-like curve. Instead of summing along the curve associated with the primary reflection, the sum is over all scattering events and so this method is named generalized diffraction-stack migration. This formulation leads to filters that can be applied to the generalized diffraction-stack migration operator to mitigate coherent migration artefacts due to, e.g., crosstalk and aliasing. Results with both synthetic and field data show that generalized diffraction-stack migration images have fewer artefacts than those computed by the standard reverse-time migration algorithm. The main drawback is that generalized diffraction-stack migration is much more memory intensive and I/O limited than the standard reverse-time migration method. © 2014 European Association of Geoscientists & Engineers.

  17. Artificially stacked atomic layers: toward new van der Waals solids.

    Science.gov (United States)

    Gao, Guanhui; Gao, Wei; Cannuccia, E; Taha-Tijerina, Jaime; Balicas, Luis; Mathkar, Akshay; Narayanan, T N; Liu, Zhen; Gupta, Bipin K; Peng, Juan; Yin, Yansheng; Rubio, Angel; Ajayan, Pulickel M

    2012-07-11

    Strong in-plane bonding and weak van der Waals interplanar interactions characterize a large number of layered materials, as epitomized by graphite. The advent of graphene (G), individual layers from graphite, and atomic layers isolated from a few other van der Waals bonded layered compounds has enabled the ability to pick, place, and stack atomic layers of arbitrary compositions and build unique layered materials, which would be otherwise impossible to synthesize via other known techniques. Here we demonstrate this concept for solids consisting of randomly stacked layers of graphene and hexagonal boron nitride (h-BN). Dispersions of exfoliated h-BN layers and graphene have been prepared by liquid phase exfoliation methods and mixed, in various concentrations, to create artificially stacked h-BN/G solids. These van der Waals stacked hybrid solid materials show interesting electrical, mechanical, and optical properties distinctly different from their starting parent layers. From extensive first principle calculations we identify (i) a novel approach to control the dipole at the h-BN/G interface by properly sandwiching or sliding layers of h-BN and graphene, and (ii) a way to inject carriers in graphene upon UV excitations of the Frenkell-like excitons of the h-BN layer(s). Our combined approach could be used to create artificial materials, made predominantly from inter planar van der Waals stacking of robust bond saturated atomic layers of different solids with vastly different properties.

  18. High peak power diode stacks for high energy lasers

    Science.gov (United States)

    Negoita, Viorel C.; Vethake, Thilo; Jiang, John; Roff, Robert; Shih, Ming; Duck, Richard; Bauer, Marc; Mite, Roberto; Boucke, Konstantin; Treusch, Georg

    2015-02-01

    High energy solid state lasers are being developed for fusion experiments and other research applications where high energy per pulse is required but the repetition rate is rather low, around 10Hz. We report our results on high peak power diode laser stacks used as optical pumps for these lasers. The stacks are based on 10 mm bars with 4 mm cavity length and 55% fill factor, with peak power exceeding 500 W per bar. These bars are stacked and mounted on a cooler which provides backside cooling and electrical insulation. Currently we mount 25 bars per cooler for a nominal peak power of 12.5 kW, but in principle the mounting scheme can be scaled to a different number of devices depending on the application. Pretesting of these bars before soldering on the cooler enables us to select devices with similar wavelength and thus we maintain tight control of the spectral width (FWHM less than 6 nm). Fine adjustments of the centroid wavelength can be done by means of temperature of the cooling fluid or bias current. The available wavelength range spans from 880 nm to 1000 nm, and the wavelength of the entire assembly of stacks can be controlled to within 0.5 nm of the target value, which makes these stacks suitable for pumping a variety of gain media. The devices are fast axis collimated, with over 95% power being collimated in 6 mrad (full angle). The slow axis divergence is 9° (full angle) for 95% power content.

  19. A mixed solution-processed gate dielectric for zinc-tin oxide thin-film transistor and its MIS capacitance.

    Science.gov (United States)

    Kim, Hunho; Kwack, Young-Jin; Yun, Eui-Jung; Choi, Woon-Seop

    2016-09-19

    Solution-processed gate dielectrics were fabricated with the combined ZrO2 and Al2O3 (ZAO) in the form of mixed and stacked types for oxide thin film transistors (TFTs). ZAO thin films prepared with double coatings for solid gate dielectrics were characterized by analytical tools. For the first time, the capacitance of the oxide semiconductor was extracted from the capacitance-voltage properties of the zinc-tin oxide (ZTO) TFTs with the combined ZAO dielectrics by using the proposed metal-insulator-semiconductor (MIS) structure model. The capacitance evolution of the semiconductor from the TFT model structure described well the threshold voltage shift observed in the ZTO TFT with the ZAO (1:2) gate dielectric. The electrical properties of the ZTO TFT with a ZAO (1:2) gate dielectric showed low voltage driving with a field effect mobility of 37.01 cm(2)/Vs, a threshold voltage of 2.00 V, an on-to-off current ratio of 1.46 × 10(5), and a subthreshold slope of 0.10 V/dec.

  20. Ion bunch stacking in a Penning trap after purification in an electrostatic mirror trap

    CERN Document Server

    Rosenbusch, M; Blaum, K; Borgmann, Ch; Kreim, S; Lunney, D; Manea, V; Schweikhard, L; Wienholtz, F; Wolf, R N

    2014-01-01

    The success of many measurements in analytical mass spectrometry as well as in precision mass determinations for atomic and nuclear physics is handicapped when the ion sources deliver ``contaminations'', i.e., unwanted ions of masses similar to those of the ions of interest. In particular, in ion-trapping devices, large amounts of contaminant ions result in significant systematic errors-if the measurements are possible at all. We present a solution for such cases: The ions from a quasi-continuous source are bunched in a linear radio-frequency-quadrupole ion trap, separated by a multi-reflection time-of-flight section followed by a Bradbury-Nielsen gate, and then captured in a Penning trap. Buffer-gas cooling is used to damp the ion motion in the latter, which allows a repeated opening of the Penning trap for a stacking of mass-selected ion bunches. Proof-of-principle demonstrations have been performed with the ISOLTRAP setup at ISOLDE/CERN, both with Cs-133(+) ions from an off-line ion source and by applicati...

  1. Communication: Thermodynamics of stacking disorder in ice nuclei

    Science.gov (United States)

    Quigley, D.

    2014-09-01

    A simple Ising-like model for the stacking thermodynamics of ice 1 is constructed for nuclei in supercooled water, and combined with classical nucleation theory. For relative stabilities of cubic and hexagonal ice I within the range of experimental estimates, this predicts critical nuclei are stacking disordered at strong sub-cooling, consistent with recent experiments. At higher temperatures nucleation of pure hexagonal ice is recovered. Lattice-switching Monte-Carlo is applied to accurately compute the relative stability of cubic and hexagonal ice for the popular mW model of water. Results demonstrate that this model fails to adequately capture the relative energetics of the two polytypes, leading to stacking disorder at all temperatures.

  2. Model development of integrated CPOx reformer and SOFC stack system

    Directory of Open Access Journals (Sweden)

    Pianko-Oprych Paulina

    2016-12-01

    Full Text Available The main purpose of this study was to develop a mathematical model, in a steady state and dynamic mode, of a Catalytic Partial Oxidation (CPOx reformer – Solid Oxide Fuel Cell (SOFC stack integrated system in order to assess the system performance. Mass balance equations were written for each component in the system together with energy equation and implemented into the MATLAB Simulink simulation tool. Temperature, gas concentrations, pressure and current density were computed in the steady-state mode and validated against experimental data. The calculated I–V curve matched well the experimental one. In the dynamic modelling, several different conditions including step changes in fuel flow rates, stack voltage as well as temperature values were applied to estimate the system response against the load variations. Results provide valuable insight into the operating conditions that have to be achieved to ensure efficient CPOx performance for fuel processing for the SOFC stack applications.

  3. Note: O-ring stack system for electron gun alignment

    Science.gov (United States)

    Park, In-Yong; Cho, Boklae; Han, Cheolsu; Shin, Seungmin; Lee, Dongjun; Ahn, Sang Jung

    2015-01-01

    We present a reliable method for aligning an electron gun which consists of an electron source and lenses by controlling a stack of rubber O-rings in a vacuum condition. The beam direction angle is precisely tilted along two axes by adjusting the height difference of a stack of O-rings. In addition, the source position is shifted in each of three orthogonal directions. We show that the tilting angle and linear shift along the x and y axes as obtained from ten stacked O-rings are ±2.55° and ±2 mm, respectively. This study can easily be adapted to charged particle gun alignment and adjustments of the flange position in a vacuum, ensuring that its results can be useful with regard to electrical insulation between flanges with slight modifications.

  4. The Stack-Size of Combinatorial Tries Revisited

    Directory of Open Access Journals (Sweden)

    Markus E. Nebel

    2002-12-01

    Full Text Available In the present paper we consider a generalized class of extended binary trees in which leaves are distinguished in order to represent the location of a key within a trie of the same structure. We prove an exact asymptotic equivalent to the average stack-size of trees with α internal nodes and β leaves corresponding to keys; we assume that all trees with the same parameters α and β have the same probability. The assumption of that uniform model is motivated for example by the usage of tries for the compression of blockcodes. Furthermore, we will prove asymptotics for the r-th moments of the stack-size and we will show that a normalized stack-size possesses a theta distribution in the limit.

  5. Thermoacoustic design using stem of goose down stack

    Science.gov (United States)

    Farikhah, Irna; Ristanto, Sigit; Idrus, Hadiyati; Kaltsum, Ummi; Faisal, Affandi; Setiawan, Ihsan; Setio Utomo, Agung Bambang

    2012-09-01

    Many refrigerators using CFC as a refrigerant are seen as the cause of the depletion of ozone. Hence, thermoacoustic was chosen as an alternative refrigerator that safe for environment. There are many variable that influenced the optimization of thermoacoustic design. One of them is thermal conductivity of material of stack. The Stack material must have a low thermal conductivity. In this research we used organic stack made of stem of goose down. It has superior thermal insulating. It means that they have the lowest thermal conductivity. The system uses no refrigerant or compressor, and the only mechanical moving part is the loudspeaker connected to a signal generator that produces the acoustic. The working fluid is air and the material of resonator is stainless steel. A series test on the laboratory found that there is a decrease of 5°C in temperature for about 2 minutes.

  6. Multipole Stack for the 800 MeV PS Booster

    CERN Multimedia

    1975-01-01

    The 800 MeV PS Booster had seen first beam in its 4 superposed rings in 1972, routine operation began in 1973. In the strive for ever higher beam intensities, the need for additional multipole lenses became evident. After detailed studies, the manufacture of 8 stacks of multipoles was launched in 1974. Each stack consists of 4 superposed multipoles and each multipole has 4 concentric shells. From the innermost to the outermost shell, Type A contains octupole, skew-octupole, sextupole, skew-sextupole. Type B contains skew-octupole, skew-sextupole, vertical dipole, horizontal dipole. Completion of installation in 1976 opened the way to higher beam intensities. M. Battiaz is seen here with a multipole stack and its many electrical connections.

  7. Note: O-ring stack system for electron gun alignment.

    Science.gov (United States)

    Park, In-Yong; Cho, Boklae; Han, Cheolsu; Shin, Seungmin; Lee, Dongjun; Ahn, Sang Jung

    2015-01-01

    We present a reliable method for aligning an electron gun which consists of an electron source and lenses by controlling a stack of rubber O-rings in a vacuum condition. The beam direction angle is precisely tilted along two axes by adjusting the height difference of a stack of O-rings. In addition, the source position is shifted in each of three orthogonal directions. We show that the tilting angle and linear shift along the x and y axes as obtained from ten stacked O-rings are ±2.55° and ±2 mm, respectively. This study can easily be adapted to charged particle gun alignment and adjustments of the flange position in a vacuum, ensuring that its results can be useful with regard to electrical insulation between flanges with slight modifications.

  8. Production and Reliability Oriented SOFC Cell and Stack Design

    DEFF Research Database (Denmark)

    Hauth, Martin; Lawlor, Vincent; Cartellieri, Peter

    2017-01-01

    The paper presents an innovative development methodology for a production and reliability oriented SOFC cell and stack design aiming at improving the stacks robustness, manufacturability, efficiency and cost. Multi-physics models allowed a probabilistic approach to consider statistical variations...... in production, material and operating parameters for the optimization phase. A methodology for 3D description of spatial distribution of material properties based on a random field models was developed and validated by experiments. Homogenized material models on multiple levels of the SOFC stack were...... established. The probabilistic models were related to the experimentally obtained properties of base materials to establish a statistical relationship between the material properties and the most relevant load effects. Software algorithms for meta models that allow the detection of relationships between input...

  9. Salt Concentration Differences Alter Membrane Resistance in Reverse Electrodialysis Stacks

    KAUST Repository

    Geise, Geoffrey M.

    2014-01-14

    Membrane ionic resistance is usually measured by immersing the membrane in a salt solution at a single, fixed concentration. While salt concentration is known to affect membrane resistance when the same concentration is used on both sides of the membrane, little is known about membrane resistance when the membrane is placed between solutions of different concentrations, such as in a reverse electrodialysis (RED) stack. Ionic resistance measurements obtained using Selemion CMV and AMV that separated sodium chloride and ammonium bicarbonate solutions of different concentrations were greater than those measured using only the high-concentration solution. Measured RED stack resistances showed good agreement with resistances calculated using an equivalent series resistance model, where the membranes accounted for 46% of the total stack resistance. The high area resistance of the membranes separating different salt concentration solutions has implications for modeling and optimizing membranes used in RED systems.

  10. Detailed experimental characterization of a reformate fuelled PEM stack

    DEFF Research Database (Denmark)

    Korsgaard, Anders; Nielsen, Mads Pagh; Kær, Søren Knudsen

    2006-01-01

    gas mixing (CO, CO2, N2, Air and H2). The control system includes 12 thermocouple inputs, up to 60 cell voltages, more than 10 flow measurements and 10 pressure measurements, all at sample rates up to 1 kHz. The system design is thoroughly explained to provide valuable information for system...... with electric power output from 1-3-kW. All process inputs for the stack can be altered to provide realistic performance analyses, corresponding to those encountered in field applications. These include cathode/anode dew point control, cathode flow rate, cooling water temperature control as well as synthesis...... integrators. Additionally, the paper contains a comprehensive set of test results based on a commercial reformate PEM stack  A series of different synthesis gas compositions were applied to the stack including 5 and 10 ppm CO content, 20% CO2 and air bleeding. During these tests, the dynamic response...

  11. Electric toy vehicle powered by a PEMFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Beneito, Ruben; Vilaplana, Joaquin; Gisbert, Santiago [Technological Institute for Toy (AIJU), 03440 Ibi (Spain)

    2007-07-15

    The article describes the design and development of an electric toy vehicle powered by a fuel cell stack. The system consisted of a 150 W PEMFC stack powered by hydrogen/air, a tank of metal hydrides of AB (TiFe) alloy type with a capacity of 300 standard litres, for storing hydrogen, and an electronic power device based on electrolytic capacitors, to supply peak power demands during acceleration and start up of the vehicle. The air supply was provided by a fan preceded by a filter, and in a similar manner the stack was cooled by an air ventilation system. An electrovalve was used to supply H{sub 2} in dead-ended mode. All the components were integrated in the vehicle, and the prototype was tested in real working conditions, in a test bench and by children. (author)

  12. Cutting-edge CMP modeling for front-end-of-line (FEOL) and full stack hotspot detection for advanced technologies

    Science.gov (United States)

    Katakamsetty, Ushasree; Chee, Jiansheng Jansen; Li, Yongfu; Hui, Chiu Wing; Huang, Yaodong; de la Garza, Ernesto Gene

    2017-03-01

    As process technology scales down, the number of Chemical Mechanical Polishing (CMP) processes and steps used in chip manufacturing are increasing exponentially. Shrinking process margins increase the risk of excessive metal or oxide thickness or topography variations, causing potential yield problems such as dishing, erosion, resist lifting or printability issues. Present DFM CMP modeling and applications mainly focus on the hotspot detection and fixing methodology for the Back-End-Of-Line (BEOL) layers [1]. Today, the present methodology is no longer sufficient to eliminate all the CMP related manufacturing defects. There is a strong demand for STI, poly and contact silicon calibrated CMP models to predict and fix the related CMP hotspots. Shallow Trench Isolation (STI) and Poly CMP planarity is very critical in advanced technologies with Diffusion layer FIN structures and Replacement Metal Gate Process flow [2]. Gate uniformity after CMP will improve device performance, reduce CMP defects and increases the yield. Contact (Tungsten) CMP polishing is another important step that defines contact planarity, which will influence metal layer CMP planarization [3]. This paper will discuss design dependent CMP variations for STI, Poly and Contact CMP steps and showcase the importance of FEOL CMP modeling. We present the methodology for Silicon calibrated STI CMP, Poly and Contact CMP models and the applications of FEOL CMP models in CMP dishing and erosion hotspot analysis. We also present FEOL plus BEOL multi stack CMP simulations applications and provide design guidelines to fix CMP hotspots.

  13. Controlled Logic Gates-Switch Gate and Fredkin Gate Based on Enzyme-Biocatalyzed Reactions Realized in Flow Cells.

    Science.gov (United States)

    Fratto, Brian E; Katz, Evgeny

    2016-04-04

    Controlled logic gates, where the logic operations on the Data inputs are performed in the way determined by the Control signal, were designed in a chemical fashion. Specifically, the systems where the Data output signals directed to various output channels depending on the logic value of the Control input signal have been designed based on enzyme biocatalyzed reactions performed in a multi-cell flow system. In the Switch gate one Data signal was directed to one of two possible output channels depending on the logic value of the Control input signal. In the reversible Fredkin gate the routing of two Data signals between two output channels is controlled by the third Control signal. The flow devices were created using a network of flow cells, each modified with one enzyme that biocatalyzed one chemical reaction. The enzymatic cascade was realized by moving the solution from one reacting cell to another which were organized in a specific network. The modular design of the enzyme-based systems realized in the flow device allowed easy reconfiguration of the logic system, thus allowing simple extension of the logic operation from the 2-input/3-output channels in the Switch gate to the 3-input/3-output channels in the Fredkin gate. Further increase of the system complexity for realization of various logic processes is feasible with the use of the flow cell modular design. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Gallium arsenide processing for gate array logic

    Science.gov (United States)

    Cole, Eric D.

    1989-01-01

    The development of a reliable and reproducible GaAs process was initiated for applications in gate array logic. Gallium Arsenide is an extremely important material for high speed electronic applications in both digital and analog circuits since its electron mobility is 3 to 5 times that of silicon, this allows for faster switching times for devices fabricated with it. Unfortunately GaAs is an extremely difficult material to process with respect to silicon and since it includes the arsenic component GaAs can be quite dangerous (toxic) especially during some heating steps. The first stage of the research was directed at developing a simple process to produce GaAs MESFETs. The MESFET (MEtal Semiconductor Field Effect Transistor) is the most useful, practical and simple active device which can be fabricated in GaAs. It utilizes an ohmic source and drain contact separated by a Schottky gate. The gate width is typically a few microns. Several process steps were required to produce a good working device including ion implantation, photolithography, thermal annealing, and metal deposition. A process was designed to reduce the total number of steps to a minimum so as to reduce possible errors. The first run produced no good devices. The problem occurred during an aluminum etch step while defining the gate contacts. It was found that the chemical etchant attacked the GaAs causing trenching and subsequent severing of the active gate region from the rest of the device. Thus all devices appeared as open circuits. This problem is being corrected and since it was the last step in the process correction should be successful. The second planned stage involves the circuit assembly of the discrete MESFETs into logic gates for test and analysis. Finally the third stage is to incorporate the designed process with the tested circuit in a layout that would produce the gate array as a GaAs integrated circuit.

  15. Hardware Evaluation of the Horizontal Exercise Fixture with Weight Stack

    Science.gov (United States)

    Newby, Nate; Leach, Mark; Fincke, Renita; Sharp, Carwyn

    2009-01-01

    HEF with weight stack seems to be a very sturdy and reliable exercise device that should function well in a bed rest training setting. A few improvements should be made to both the hardware and software to improve usage efficiency, but largely, this evaluation has demonstrated HEF's robustness. The hardware offers loading to muscles, bones, and joints, potentially sufficient to mitigate the loss of muscle mass and bone mineral density during long-duration bed rest campaigns. With some minor modifications, the HEF with weight stack equipment provides the best currently available means of performing squat, heel raise, prone row, bench press, and hip flexion/extension exercise in a supine orientation.

  16. Piezoelectric stack actuator parameter extraction with hysteresis compensation

    DEFF Research Database (Denmark)

    Zsurzsan, Tiberiu-Gabriel; Mangeot, Charles; Andersen, Michael A. E.

    2014-01-01

    The Piezoelectric Actuator Drive (PAD) is a type of rotary motor that transforms the linear motion of piezoelectric stack actuators into a precise rotational motion. The very high stiffness of the actuators employed make this type of motor suited for open-loop control, but the inherent hysteresis...... exhibited by piezoelectric ceramics causes losses. Therefore, this paper presents a straightforward method to measure piezoelectric stack actuator equiv- alent parameters that includes nonlinearities. By folding the nonlinearities into a newly-defined cou- pling coefficient, the inherent hysteretic behavior...

  17. Building Service Platforms using OpenStack and CEPH

    OpenAIRE

    Döbler, Jens; Dreyer, Malte; Rohde, Daniel

    2015-01-01

    For providing Infrastructure as a Service to the institutes, OpenStack was selected as a platform at the Computer and Media Service of Humboldt University. CEPH was chosen as the storage backend within this platform. The paper describes the project and first results. An overview to OpenStack is given and the results of initial CEPH performance tests are shown. The technical setup is depicted. Moving from traditional data center management to IaaS involves organizational changes as well as cha...

  18. Lateral excitonic switching in vertically stacked quantum dots

    Energy Technology Data Exchange (ETDEWEB)

    Jarzynka, Jarosław R.; McDonald, Peter G.; Galbraith, Ian [Institute of Photonics and Quantum Sciences, SUPA, School of Engineering and Physical Sciences, Heriot-Watt University, Edinburgh EH14 4AS (United Kingdom); Shumway, John [Department of Physics, Arizona State University, Tempe, Arizona 85287 (United States)

    2016-06-14

    We show that the application of a vertical electric field to the Coulomb interacting system in stacked quantum dots leads to a 90° in-plane switching of charge probability distribution in contrast to a single dot, where no such switching exists. Results are obtained using path integral quantum Monte Carlo with realistic dot geometry, alloy composition, and piezo-electric potential profiles. The origin of the switching lies in the strain interactions between the stacked dots hence the need for more than one layer of dots. The lateral polarization and electric field dependence of the radiative lifetimes of the excitonic switch are also discussed.

  19. Implementing cloud storage with OpenStack Swift

    CERN Document Server

    Rajana, Kris; Varma, Sreedhar

    2014-01-01

    This tutorial-based book has a step-by-step approach for each topic, ensuring it is thoroughly covered and easy to follow. If you are an IT administrator who wants to enter the world of cloud storage using OpenStack Swift, then this book is ideal for you. Whether your job is to build, manage, or use OpenStack Swift, this book is an ideal way to move your career ahead. Only basic Linux and server technology skills are expected, to take advantage of this book.

  20. Experimental 1 kW 20 cell PEFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Buechi, F.N.; Marmy, C.A.; Scherer, G.G. [Paul Scherrer Inst. (PSI), Villigen (Switzerland); Ruge, M. [Swiss Federal Inst. of Technology (ETH), Zuerich (Switzerland)

    1999-08-01

    A 20-cell PEFC stack was designed and built. Resin impregnated graphite was used as bipolar plate material. The air cooling of the stack was optimized by introducing high surface structures into the open space of the cooling plates. At {eta} (H{sub 2} LHV) = 0.5 a power of 880 W was obtained under conditions of low gas-pressures of 1.15 bar{sub a}. The auxiliary power for process air supply and cooling at 880 W power is less than 7% of the power output, indicating that the described system may be operated at a high efficiency. (author) 5 figs., 2 refs.

  1. Interlayer repulsion and decoupling effects in stacked turbostratic graphene flakes

    Science.gov (United States)

    Berashevich, Julia; Chakraborty, Tapash

    2011-07-01

    The behavior of stacked graphene flakes is found to be governed by the strength of the repulsive interactions that arise due to the orthogonality of interlayer π orbitals. Therefore, the decoupling effect in AA stacked layers is a result of the repulsion being dominant over the orbital interactions while misorientation of 2°-5° is an attempt by the system to suppress that repulsion. For misorientated graphene, in the regions of superposed lattices in the Moiré pattern, the repulsion between the layers manifest itself as lattice distortion by forming a bump.

  2. Probing Interface Defects in Top-Gated MoS2 Transistors with Impedance Spectroscopy.

    Science.gov (United States)

    Zhao, Peng; Azcatl, Angelica; Gomeniuk, Yuri Y; Bolshakov, Pavel; Schmidt, Michael; McDonnell, Stephen J; Hinkle, Christopher L; Hurley, Paul K; Wallace, Robert M; Young, Chadwin D

    2017-07-19

    The electronic properties of the HfO2/MoS2 interface were investigated using multifrequency capacitance-voltage (C-V) and current-voltage characterization of top-gated MoS2 metal-oxide-semiconductor field effect transistors (MOSFETs). The analysis was performed on few layer (5-10) MoS2 MOSFETs fabricated using photolithographic patterning with 13 and 8 nm HfO2 gate oxide layers formed by atomic layer deposition after in-situ UV-O3 surface functionalization. The impedance response of the HfO2/MoS2 gate stack indicates the existence of specific defects at the interface, which exhibited either a frequency-dependent distortion similar to conventional Si MOSFETs with unpassivated silicon dangling bonds or a frequency dispersion over the entire voltage range corresponding to depletion of the HfO2/MoS2 surface, consistent with interface traps distributed over a range of energy levels. The interface defects density (Dit) was extracted from the C-V responses by the high-low frequency and the multiple-frequency extraction methods, where a Dit peak value of 1.2 × 10(13) cm(-2) eV(-1) was extracted for a device (7-layer MoS2 and 13 nm HfO2) exhibiting a behavior approximating to a single trap response. The MoS2 MOSFET with 4-layer MoS2 and 8 nm HfO2 gave Dit values ranging from 2 × 10(11) to 2 × 10(13) cm(-2) eV(-1) across the energy range corresponding to depletion near the HfO2/MoS2 interface. The gate current was below 10(-7) A/cm(2) across the full bias sweep for both samples indicating continuous HfO2 films resulting from the combined UV ozone and HfO2 deposition process. The results demonstrated that impedance spectroscopy applied to relatively simple top-gated transistor test structures provides an approach to investigate electrically active defects at the HfO2/MoS2 interface and should be applicable to alternative TMD materials, surface treatments, and gate oxides as an interface defect metrology tool in the development of TMD-based MOSFETs.

  3. Statistical determinations of the gating windows in the respiratory gated radiotherapy using the visible guiding system

    CERN Document Server

    Oh, Se An; Lee, Hyun Jeong; Kim, Sung Kyu

    2015-01-01

    Purpose: Respiratory gated radiation therapy (RGRT) is used to minimize the radiation dose to normal tissue in lung cancer patients. Determinations of the gating window in the respiratory phase of patients are important in RGRT but it is not easy. The objective of this study was to determine the optimal gating window with a visible guiding system in RGRT. Materials and Methods: Between April and October in 2014 the breathing signals of 23 lung cancer patients were recorded with a Real-time Position Management (RPM) respiratory gating system (Varian, USA). We performed statistical analysis with breathing signals to find the optimal gating window for the guided breathing for RGRT. Results: 19 of the 23 patients showed statistically significant differences (p < 0.05) when the breathing signals obtained before and after breathing training were compared, The standard deviation of the respiration signals after breathing training was the lowest in the phase of 30 % - 70 % (p < 0.05). Conclusions: RGRT with RPM...

  4. A realistic 3-D gated cardiac phantom for quality control of gated myocardial perfusion SPET: the Amsterdam gated (AGATE) cardiac phantom

    NARCIS (Netherlands)

    Visser, Jacco J. N.; Sokole, Ellinor Busemann; Verberne, Hein J.; Habraken, Jan B. A.; van de Stadt, Huybert J. F.; Jaspers, Joris E. N.; Shehata, Morgan; Heeman, Paul M.; van Eck-Smit, Berthe L. F.

    2004-01-01

    A realistic 3-D gated cardiac phantom with known left ventricular (LV) volumes and ejection fractions (EFs) was produced to evaluate quantitative measurements obtained from gated myocardial single-photon emission tomography (SPET). The 3-D gated cardiac phantom was designed and constructed to fit

  5. Sliding-gate valve for use with abrasive materials

    Science.gov (United States)

    Ayers, Jr., William J.; Carter, Charles R.; Griffith, Richard A.; Loomis, Richard B.; Notestein, John E.

    1985-01-01

    The invention is a flow and pressure-sealing valve for use with abrasive solids. The valve embodies special features which provide for long, reliable operating lifetimes in solids-handling service. The valve includes upper and lower transversely slidable gates, contained in separate chambers. The upper gate provides a solids-flow control function, whereas the lower gate provides a pressure-sealing function. The lower gate is supported by means for (a) lifting that gate into sealing engagement with its seat when the gate is in its open and closed positions and (b) lowering the gate out of contact with its seat to permit abrasion-free transit of the gate between its open and closed positions. When closed, the upper gate isolates the lower gate from the solids. Because of this shielding action, the sealing surface of the lower gate is not exposed to solids during transit or when it is being lifted or lowered. The chamber containing the lower gate normally is pressurized slightly, and a sweep gas is directed inwardly across the lower-gate sealing surface during the vertical translation of the gate.

  6. From the components to the stack. Developing and designing 5kW HT-PEFC stacks; Von der Komponente zum Stack. Entwicklung und Auslegung von HT-PEFC-Stacks der 5 kW-Klasse

    Energy Technology Data Exchange (ETDEWEB)

    Bendzulla, Anne

    2010-12-22

    The aim of the present project is to develop a stack design for a 5-kW HTPEFC system. First, the state of the art of potential materials and process designs will be discussed for each component. Then, using this as a basis, three potential stack designs with typical attributes will be developed and assessed in terms of practicality with the aid of a specially derived evaluation method. Two stack designs classified as promising will be discussed in detail, constructed and then characterized using short stack tests. Comparing the stack designs reveals that both designs are fundamentally suitable for application in a HT-PEFC system with on-board supply. However, some of the performance data differ significantly for the two stack designs. The preferred stack design for application in a HT-PEFC system is characterized by robust operating behaviour and reproducible high-level performance data. Moreover, in compact constructions (120 W/l at 60 W/kg), the stack design allows flexible cooling with thermal oil or air, which can be adapted to suit specific applications. Furthermore, a defined temperature gradient can be set during operation, allowing the CO tolerance to be increased by up to 10 mV. The short stack design developed within the scope of the present work therefore represents an ideal basis for developing a 5-kW HT-PEFC system. Topics for further research activities include improving the performance by reducing weight and/or volume, as well as optimizing the heat management. The results achieved within the framework of this work clearly show that HTPEFC stacks have the potential to play a decisive role in increasing efficiency in the future, particularly when combined with an on-board supply system. (orig.) [German] Ziel der vorliegenden Arbeit ist die Entwicklung eines Stackkonzeptes fuer ein 5 kW-HT-PEFC System. Dazu wird zunaechst fuer jede Komponente der Stand der Technik moeglicher Materialien und Prozesskonzepte diskutiert. Darauf aufbauend werden drei

  7. Enhancement of stack ventilation in hot and humid climate using a combination of roof solar collector and vertical stack

    Energy Technology Data Exchange (ETDEWEB)

    Yusoff, Wardah Fatimah Mohammad; Salleh, Elias [Department of Architecture, Faculty of Design and Architecture, Universiti Putra Malaysia, 43400 Serdang, Selangor (Malaysia); Adam, Nor Mariah [Department of Mechanical and Manufacturing Engineering, Faculty of Engineering, Universiti Putra Malaysia, 43400 Serdang, Selangor (Malaysia); Sapian, Abdul Razak [Department of Architecture, Kulliyyah of Architecture and Environmental Design, International Islamic University Malaysia, P.O. Box 10, 50728 Kuala Lumpur (Malaysia); Yusof Sulaiman, Mohamad [Solar Energy Research Institute, 3rd Floor, Tun Sri Lanang Library Building, Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor (Malaysia)

    2010-10-15

    In the hot and humid climate, stack ventilation is inefficient due to small temperature difference between the inside and outside of naturally ventilated buildings. Hence, solar induced ventilation is a feasible alternative in enhancing the stack ventilation. This paper aims to investigate the effectiveness of a proposed solar induced ventilation strategy, which combines a roof solar collector and a vertical stack, in enhancing the stack ventilation performance in the hot and humid climate. The methodology selected for the investigation is physical experimental modelling which was carried out in the actual environment. The results are presented and discussed in terms of two performance variables: air temperature and air velocity. The findings indicate that the proposed strategy is able to enhance the stack ventilation, both in semi-clear sky and overcast sky conditions. The highest air temperature difference between the air inside the stack and the ambient air (T{sub i}-T{sub o}) is achieved in the semi-clear sky condition, which is about 9.9 C (45.8 C-35.9 C). Meanwhile, in the overcast sky condition, the highest air temperature difference (T{sub i}-T{sub o}) is 6.2 C (39.3 C-33.1 C). The experimental results also indicate good agreement with the theoretical results for the glass temperature, the air temperature in the roof solar collector's channel and the absorber temperature. The findings also show that wind has significant effect to the induced air velocity by the proposed strategy. (author)

  8. Noisy signaling through promoter logic gates

    Science.gov (United States)

    Gerstung, Moritz; Timmer, Jens; Fleck, Christian

    2009-01-01

    We study the influence of noisy transcription factor signals on cis-regulatory promoter elements. These elements process the probability of binary binding events analogous to computer logic gates. At equilibrium, this probability is given by the so-called input function. We show that transcription factor noise causes deviations from the equilibrium value due to the nonlinearity of the input function. For a single binding site, the correction is always negative resulting in an occupancy below the mean-field level. Yet for more complex promoters it depends on the correlation of the transcription factor signals and the geometry of the input function. We present explicit solutions for the basic types of AND and OR gates. The correction size varies among these different types of gates and signal types, mainly being larger in AND gates and for correlated fluctuations. In all cases we find excellent agreement between the analytical results and numerical simulations. We also study the E. coli Lac operon as an example of an AND NOR gate. We present a consistent mathematical method that allows one to separate different sources of noise and quantifies their effect on promoter occupation. A surprising result of our analysis is that Poissonian molecular fluctuations, in contrast to external fluctuations, do no contribute to the correction.

  9. Hydraulics characteristics of tipping sediment flushing gate.

    Science.gov (United States)

    Bong, C H J; Lau, T L; Ab Ghani, A

    2013-01-01

    This paper highlights a preliminary study on the potential of a tipping flush gate to be used in an open storm drain to remove sediment. The investigation was carried out by using a plasboard model of the tipping flush gate installed in a rectangular flume. A steady flow experiment was carried out to determine the discharge coefficients and also the outflow relationship of the tipping flush gate. The velocity produced by the gate at various distances downstream of the gate during flushing operation was measured using a flowmeter and the velocity at all the points was higher than the recommended self-cleansing design available in the literature. A preliminary experiment on the efficiency of flushing was conducted using uniform sediment with d50 sizes of 0.81, 1.53 and 4.78 mm. Results generally showed that the number of flushes required to totally remove the sediment from the initial position by a distance of 1 m increased by an average of 1.50 times as the sediment deposit bed thickness doubled. An equation relating the number of flushes required to totally remove the sediment bed for 1 m with the sediment bed deposit thickness was also developed for the current study.

  10. Ternary rare-earth based alternative gate-dielectrics for future integration in MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Schubert, Juergen; Lopes, Joao Marcelo; Durgun Oezben, Eylem; Luptak, Roman; Lenk, Steffi; Zander, Willi; Roeckerath, Martin [IBN 1-IT, Forschungszentrum Juelich, 52425 Juelich (Germany)

    2009-07-01

    The dielectric SiO{sub 2} has been the key to the tremendous improvements in Si-based metal-oxide-semiconductor (MOS) device performance over the past four decades. It has, however, reached its limit in terms of scaling since it exhibits a leakage current density higher than 1 A/cm{sup 2} and does not retain its intrinsic physical properties at thicknesses below 1.5 nm. In order to overcome these problems and keep Moore's law ongoing, the use of higher dielectric constant (k) gate oxides has been suggested. These high-k materials must satisfy numerous requirements such as the high k, low leakage currents, suitable band gap und offsets to silicon. Rare-earth based dielectrics are promising materials which fulfill these needs. We will review the properties of REScO{sub 3} (RE = La, Dy, Gd, Sm, Tb) and LaLuO{sub 3} thin films, grown with pulsed laser deposition, e-gun evaporation or molecular beam deposition, integrated in capacitors and transistors. A k > 20 for the REScO{sub 3} (RE = Dy, Gd) and around 30 for (RE = La, Sm, Tb) and LaLuO{sub 3} are obtained. Transistors prepared on SOI and sSOI show mobility values up to 380 cm{sup 2}/Vs on sSOI, which are comparable to such prepared with HfO{sub 2}.

  11. Multibit CkNOT quantum gates via Rydberg blockade

    DEFF Research Database (Denmark)

    Isenhower, L.; Saffman, Mark; Mølmer, Klaus

    2011-01-01

    Long range Rydberg blockade interactions have the potential for efficient implementation of quantum gates between multiple atoms. Here we present and analyze a protocol for implementation of a k-atom controlled NOT (CkNOT) neutral atom gate. This gate can be implemented using sequential or simult......Long range Rydberg blockade interactions have the potential for efficient implementation of quantum gates between multiple atoms. Here we present and analyze a protocol for implementation of a k-atom controlled NOT (CkNOT) neutral atom gate. This gate can be implemented using sequential...

  12. Encapsulation of phthalocyanine supramolecular stacks into virus-like particles

    NARCIS (Netherlands)

    Brasch, M.; de la Escosura, Andrés; Ma, Y.; Uetrecht, Charlotte; Heck, Albert J.R.; Torres, Tomás; Cornelissen, Jeroen Johannes Lambertus Maria

    2011-01-01

    We report herein the encapsulation of a water-soluble phthalocyanine (Pc) into virus-like particles (VLPs) of two different sizes, depending on the conditions. At neutral pH, the cooperative encapsulation/templated assembly of the particles induces the formation of Pc stacks instead of Pc dimers,

  13. Compactifications of reductive groups as moduli stacks of bundles

    DEFF Research Database (Denmark)

    Martens, Johan; Thaddeus, Michael

    Let G be a reductive group. We introduce the moduli problem of "bundle chains" parametrizing framed principal G-bundles on chains of lines. Any fan supported in a Weyl chamber determines a stability condition on bundle chains. Its moduli stack provides an equivariant toroidal compactification of ...... studied by Losev-Manin....

  14. CaPiTo: protocol stacks for services

    DEFF Research Database (Denmark)

    Gao, Han; Nielson, Flemming; Nielson, Hanne Riis

    2011-01-01

    CaPiTo allows the modelling of service-oriented applications using process algebras at three levels of abstraction. The abstract level focuses on the key functionality of the services; the plug-in level shows how to obtain security using standardised protocol stacks; finally, the concrete level a...

  15. Proposal of stack Effect technology for predicted future years

    Science.gov (United States)

    Teddy Badai Samodra, FX; Adi Indrawan, Iwan

    2017-12-01

    Recently, stack effect is a general problem solver in providing vertical ventilation for urban environmental issues. However, study on resilient technology of stack effect for future years as predicted by climate trend should be conducted. Therefore, this research proposes a design of new technology on operable and adaptable vertical ventilation to the environmental change. The research method is conducted by comprehensive simulation of Ecotect Analysis, ANSYS Fluent and Matlab. Urban environment of Surabaya, as the research location, is the representative of tropical region. The results showed that the stack effect height and area could be modified instantly adjusting the environmental condition time by time in the future years. With 1.8 m of stack width, the proposed technology could capture 40 m3 of vertical air flow which is useful for physiological cooling and its dimension could be modified depending on the environmental condition. By providing resilient technology, predictable and sustainable ventilation method is offered to anticipate an unpredicted global warming and environmental change.

  16. The Memory Stack: New Technologies Harness Talking for Writing.

    Science.gov (United States)

    Gannon, Maureen T.

    In this paper, an elementary school teacher describes her experiences with the Memory Stack--a HyperCard based tool that can accommodate a voice recording, a graphic image, and a written text on the same card--which she designed to help her second and third grade students integrate their oral language fluency into the process of learning how to…

  17. Open Government, Closed Stacks: Onsite Storage of Depository Materials.

    Science.gov (United States)

    Quinn, Aimee C.; Haslam, Michaelyn

    1998-01-01

    Examines the use of automated storage and retrieval systems in industry and in libraries. Highlights include intellectual content; and a system being built for the University of Nevada Las Vegas that takes into account selection criteria, limited stack space, and storage of federal depository materials. (LRW)

  18. Hydrothermal synthesis and photoluminescent properties of stacked indium sulfide superstructures.

    Science.gov (United States)

    Xing, Yan; Zhang, Hongjie; Song, Shuyan; Feng, Jing; Lei, Yongqian; Zhao, Lijun; Li, Meiye

    2008-03-28

    Unusual hierarchical stacked superstructures of cubic beta-In2S3 were fabricated via a facile hydrothermal process in the presence of a surfactant cetyltrimethylammonium bromide CTAB; the 3D superstructures were developed by helical propagation of surface steps from microflakes of 10-20 nm thickness.

  19. Phase locked fluxon-antifluxon states in stacked Josephson junctions

    DEFF Research Database (Denmark)

    Carapella, Giovanni; Constabile, Giovanni; Petraglia, Antonio

    1996-01-01

    Measurements were made on a two-stack long Josephson junction with very similar parameters and electrical access to the thin middle electrode. Mutually phase-locked fluxon-antifluxon states were observed. The observed propagation velocity is in agreement with the theoretical prediction. The I-V c...... in the junctions coexist with fluxons. (C) 1996 American Institute of Physics....

  20. Multipole stack for the 4 rings of the PS Booster

    CERN Multimedia

    CERN PhotoLab

    1976-01-01

    The PS Booster (originally 800 MeV, now 1.4 GeV) saw first beam in 1972, routine operation began in 1973. The strive for ever higher intensities required the addition of multipoles. Manufacture of 8 stacks of multipoles was launched in 1974, for installation in 1976. For details, see 7511120X.

  1. Parametric Sensitivity Tests- European PEM Fuel Cell Stack Test Procedures

    DEFF Research Database (Denmark)

    Araya, Samuel Simon; Andreasen, Søren Juhl; Kær, Søren Knudsen

    2014-01-01

    As fuel cells are increasingly commercialized for various applications, harmonized and industry-relevant test procedures are necessary to benchmark tests and to ensure comparability of stack performance results from different parties. This paper reports the results of parametric sensitivity tests...

  2. 7. Data Structures: Lists, Queues, Stacks and Arrays

    Indian Academy of Sciences (India)

    Home; Journals; Resonance – Journal of Science Education; Volume 2; Issue 6. Algorithms - Data Structures: Lists, Queues, Stacks and Arrays. R K Shyamasundar ... Author Affiliations. R K Shyamasundar1. Computer Science Group, Tata Institute of Fundamental Research, Homi Bhabha Road, Mumbai 400 005, India ...

  3. Tunable infrared plasmonic devices using graphene/insulator stacks.

    Science.gov (United States)

    Yan, Hugen; Li, Xuesong; Chandra, Bhupesh; Tulevski, George; Wu, Yanqing; Freitag, Marcus; Zhu, Wenjuan; Avouris, Phaedon; Xia, Fengnian

    2012-04-22

    The collective oscillation of carriers--the plasmon--in graphene has many desirable properties, including tunability and low loss. However, in single-layer graphene, the dependence on carrier concentration of both the plasmonic resonance frequency and magnitude is relatively weak, limiting its applications in photonics. Here, we demonstrate transparent photonic devices based on graphene/insulator stacks, which are formed by depositing alternating wafer-scale graphene sheets and thin insulating layers, then patterning them together into photonic-crystal-like structures. We show experimentally that the plasmon in such stacks is unambiguously non-classical. Compared with doping in single-layer graphene, distributing carriers into multiple graphene layers effectively enhances the plasmonic resonance frequency and magnitude, which is different from the effect in a conventional semiconductor superlattice and is a direct consequence of the unique carrier density scaling law of the plasmonic resonance of Dirac fermions. Using patterned graphene/insulator stacks, we demonstrate widely tunable far-infrared notch filters with 8.2 dB rejection ratios and terahertz linear polarizers with 9.5 dB extinction ratios. An unpatterned stack consisting of five graphene layers shields 97.5% of electromagnetic radiation at frequencies below 1.2 THz. This work could lead to the development of transparent mid- and far-infrared photonic devices such as detectors, modulators and three-dimensional metamaterial systems.

  4. Exact Solutions to the Double TSP with Multiple Stacks

    DEFF Research Database (Denmark)

    Petersen, Hanne Løhmann; Archetti, Claudia; Madsen, Oli B.G.

    In the Double Travelling Salesman Problem with Multiple Stacks (DTSPMS) a set of orders is given, each one requiring transportation of one item from a customer in a pickup region to a customer in a delivery region. The vehicle available for the transportation in each region carries a container, w...

  5. Improved exact method for the double TSP with multiple stacks

    DEFF Research Database (Denmark)

    Lusby, Richard Martin; Larsen, Jesper

    2011-01-01

    The Double TSP with Multiple Stacks is a logistics problem where one must, using a container, transport a given number of orders from a set of pickup customers to a set of delivery customers at minimum cost. Each order corresponds to the movement of one pallet, all pickups must be completed before...

  6. Technical Practices Manual for Surface Ship Stack Design

    Science.gov (United States)

    1976-07-01

    publico releas5, Diitribution unlimted. n /___ 1J TECHNICAL PRACTICES MANUAL FOR SURFACE SIP STACK DESIGN, AVSECj R%~m,r 6136- 7-1 i /-Jul 76~\\ / Prepared...British Transport Commission for making deck, but so slowly that they can be regarded as virtually in available a cross-channel ship (ship A) on which the

  7. Stacking faults and microstructural parameters in non-mulberry silk ...

    Indian Academy of Sciences (India)

    mulberry silk fibres in terms of stacking faults and microstructural parameters using a single-order method and have, with these parameters, developed, for the first time, a pro- cedure to compute the whole pattern of these silk fibres. The essential deviations in the values of microstructural parameters obtained from line ...

  8. Joint focus stacking and high dynamic range imaging

    Science.gov (United States)

    Qian, Qinchun; Gunturk, Bahadir K.; Batur, Aziz U.

    2013-01-01

    Focus stacking and high dynamic range (HDR) imaging are two paradigms of computational photography. Focus stacking aims to produce an image with greater depth of field (DOF) from a set of images taken with different focus distances, whereas HDR imaging aims to produce an image with higher dynamic range from a set of images taken with different exposure settings. In this paper, we present an algorithm which combines focus stacking and HDR imaging in order to produce an image with both higher dynamic range and greater DOF than any of the input images. The proposed algorithm includes two main parts: (i) joint photometric and geometric registration and (ii) joint focus stacking and HDR image creation. In the first part, images are first photometrically registered using an algorithm that is insensitive to small geometric variations, and then geometrically registered using an optical flow algorithm. In the second part, images are merged through weighted averaging, where the weights depend on both local sharpness and exposure information. We provide experimental results with real data to illustrate the algorithm. The algorithm is also implemented on a smartphone with Android operating system.

  9. Gate-dependent asymmetric transport characteristics in pentacene barristors with graphene electrodes

    Science.gov (United States)

    Hwang, Wang-Taek; Min, Misook; Jeong, Hyunhak; Kim, Dongku; Jang, Jingon; Yoo, Daekyung; Jang, Yeonsik; Kim, Jun-Woo; Yoon, Jiyoung; Chung, Seungjun; Yi, Gyu-Chul; Lee, Hyoyoung; Wang, Gunuk; Lee, Takhee

    2016-11-01

    We investigated the electrical characteristics and the charge transport mechanism of pentacene vertical hetero-structures with graphene electrodes. The devices are composed of vertical stacks of silicon, silicon dioxide, graphene, pentacene, and gold. These vertical heterojunctions exhibited distinct transport characteristics depending on the applied bias direction, which originates from different electrode contacts (graphene and gold contacts) to the pentacene layer. These asymmetric contacts cause a current rectification and current modulation induced by the gate field-dependent bias direction. We observed a change in the charge injection barrier during variable-temperature current-voltage characterization, and we also observed that two distinct charge transport channels (thermionic emission and Poole-Frenkel effect) worked in the junctions, which was dependent on the bias magnitude.

  10. Four-gate transistor analog multiplier circuit

    Science.gov (United States)

    Mojarradi, Mohammad M. (Inventor); Blalock, Benjamin (Inventor); Cristoloveanu, Sorin (Inventor); Chen, Suheng (Inventor); Akarvardar, Kerem (Inventor)

    2011-01-01

    A differential output analog multiplier circuit utilizing four G.sup.4-FETs, each source connected to a current source. The four G.sup.4-FETs may be grouped into two pairs of two G.sup.4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G.sup.4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.

  11. Mr. Gates's summer vacation: a centennial remembrance.

    Science.gov (United States)

    Bryan, C S

    1997-07-15

    In 1897, Frederick T. Gates, a Baptist minister and adviser to John D. Rockefeller Sr., read the entire second edition of The Principles and Practice of Medicine by William Osler while on a summer vacation at Lake Liberty, New York. The book reinforced the low opinion Gates had of the efficacy of medicine but convinced him that medical science would be a wise investment for the Rockefeller fortune. The results of this investment included the Rockefeller Institute for Medical Research, the General Education Board, the Rockefeller Foundation, and the International Health Board. Gates sponsored Rockefeller funding of full-time clinical professorships, an idea that Osler opposed but that eventually became the prevailing model for medical departments at universities in the United States.

  12. The Airport Gate Assignment Problem: A Survey

    Directory of Open Access Journals (Sweden)

    Abdelghani Bouras

    2014-01-01

    Full Text Available The airport gate assignment problem (AGAP is one of the most important problems operations managers face daily. Many researches have been done to solve this problem and tackle its complexity. The objective of the task is assigning each flight (aircraft to an available gate while maximizing both conveniences to passengers and the operational efficiency of airport. This objective requires a solution that provides the ability to change and update the gate assignment data on a real time basis. In this paper, we survey the state of the art of these problems and the various methods to obtain the solution. Our survey covers both theoretical and real AGAP with the description of mathematical formulations and resolution methods such as exact algorithms, heuristic algorithms, and metaheuristic algorithms. We also provide a research trend that can inspire researchers about new problems in this area.

  13. The Airport Gate Assignment Problem: A Survey

    Science.gov (United States)

    Ghaleb, Mageed A.; Salem, Ahmed M.

    2014-01-01

    The airport gate assignment problem (AGAP) is one of the most important problems operations managers face daily. Many researches have been done to solve this problem and tackle its complexity. The objective of the task is assigning each flight (aircraft) to an available gate while maximizing both conveniences to passengers and the operational efficiency of airport. This objective requires a solution that provides the ability to change and update the gate assignment data on a real time basis. In this paper, we survey the state of the art of these problems and the various methods to obtain the solution. Our survey covers both theoretical and real AGAP with the description of mathematical formulations and resolution methods such as exact algorithms, heuristic algorithms, and metaheuristic algorithms. We also provide a research trend that can inspire researchers about new problems in this area. PMID:25506074

  14. TOURISM IN THE TOURIST AREA "IRON GATES"

    Directory of Open Access Journals (Sweden)

    DINU LOREDANA

    2015-12-01

    Full Text Available This paper wants to highlight the trends of tourist demanding from the touristic area Iron Gates. We will see that the future of tourism include new forms such as those caused by the increased interest in areas with agritourism attractions or areas and portions of parks and nature reserves, which will raise the attractiveness of Danube, putting in a new pole of attraction area. Thus, we conducted a research based on survey among visitors on the tourist area "Iron Gates". The main endpoint based on survey was highlighting the motivation that determined the choice of the tourist area "Iron Gates", but also knowledge of consumer satisfaction for the tourists to the visited area (tourist product studied. The main objectives were, of course, linked with socio - economic and demographic characteristics of tourists to form a clearer picture of the motivational factors involved.

  15. Performance model of a recirculating stack nickel hydrogen cell

    Science.gov (United States)

    Zimmerman, Albert H.

    1994-01-01

    A theoretical model of the nickel hydrogen battery cell has been utilized to describe the chemical and physical changes during charge and overcharge in a recirculating stack nickel hydrogen cell. In particular, the movement of gas and electrolyte have been examined as a function of the amount of electrolyte put into the cell stack during cell activation, and as a function of flooding in regions of the gas screen in this cell design. Additionally, a two-dimensional variation on this model has been utilized to describe the effects of non-uniform loading in the nickel-electrode on the movement of gas and electrolyte within the recirculating stack nickel hydrogen cell. The type of nonuniform loading that has been examined here is that associated with higher than average loading near the surface of the sintered nickel electrode, a condition present to some degree in many nickel electrodes made by electrochemical impregnation methods. The effects of high surface loading were examined primarily under conditions of overcharge, since the movement of gas and electrolyte in the overcharging condition was typically where the greatest effects of non-uniform loading were found. The results indicate that significant changes in the capillary forces between cell components occur as the percentage of free volume in the stack filled by electrolyte becomes very high. These changes create large gradients in gas-filled space and oxygen concentrations near the boundary between the separator and the hydrogen electrode when the electrolyte fill is much greater than about 95 percent of the stack free volume. At lower electrolyte fill levels, these gaseous and electrolyte gradients become less extreme, and shift through the separator towards the nickel electrode. Similarly, flooding of areas in the gas screen cause higher concentrations of oxygen gas to approach the platinum/hydrogen electrode that is opposite the back side of the nickel electrode. These results illustrate the need for

  16. Broadening of Distribution of Trap States in PbS Quantum Dot Field-Effect Transistors with High-k Dielectrics.

    Science.gov (United States)

    Nugraha, Mohamad I; Häusermann, Roger; Watanabe, Shun; Matsui, Hiroyuki; Sytnyk, Mykhailo; Heiss, Wolfgang; Takeya, Jun; Loi, Maria A

    2017-02-08

    We perform a quantitative analysis of the trap density of states (trap DOS) in PbS quantum dot field-effect transistors (QD-FETs), which utilize several polymer gate insulators with a wide range of dielectric constants. With increasing gate dielectric constant, we observe increasing trap DOS close to the lowest unoccupied molecular orbital (LUMO) of the QDs. In addition, this increase is also consistently followed by broadening of the trap DOS. We rationalize that the increase and broadening of the spectral trap distribution originate from dipolar disorder as well as polaronic interactions, which are appearing at strong dielectric polarization. Interestingly, the increased polaron-induced traps do not show any negative effect on the charge carrier mobility in our QD devices at the highest applied gate voltage, giving the possibility to fabricate efficient low-voltage QD devices without suppressing carrier transport.

  17. Hydrodynamic Modelling and Experimental Analysis of FE-DMFC Stacks

    Science.gov (United States)

    Kablou, Yashar

    Direct methanol fuel cells (DMFCs) present some unique features such as having liquid fuel, quick refueling process, compact design and high energy density. These characteristics make them incredibly suitable as a promising power source for portable electronic applications, such as cell phones or laptop computers. Despite of these positive aspects, the commercial development of DMFCs has nevertheless been hindered by some important issues such as, carbon dioxide formation at the anode compartment and, methanol crossover through the membrane. Many researchers have tried to model the two-phase flow behavior inside the DMFC anode compartment using the "homogenous flow modelling" approach, which has proven to be inaccurate specially when dealing with DMFC stacks. On the other hand, several strategies to prevent methanol crossover have been suggested in the literature, including the use of a flowing electrolyte between the DMFC anode and cathode compartments. Preliminary tests on flowing electrolyte direct methanol fuel cells (FE-DMFCs) have shown promising results; however, further investigation should be carried out on the stack level. In the first part of this study, a quasi two-dimensional numerical model was developed, to predict the two-phase flow behavior within the DMFC anode compartment, both in single cell and stack levels. Various types of flow modelling approaches and void fraction correlations were utilized to estimate the pressure drop across the anode compartment. It was found that the "separated flow modelling" approach, as well as CISE correlation for void fraction (developed at the CISE labs in Milan), yield the best results. In the second part, a five-cell FE-DMFC stack unit with a parallel serpentine flow bed design and U-type manifold configuration, was developed and tested at various operating conditions. It was found that, the flowing electrolyte effectively reduced methanol crossover and, improved the stack performance.

  18. Do stacked species distribution models reflect altitudinal diversity patterns?

    Directory of Open Access Journals (Sweden)

    Rubén G Mateo

    Full Text Available The objective of this study was to evaluate the performance of stacked species distribution models in predicting the alpha and gamma species diversity patterns of two important plant clades along elevation in the Andes. We modelled the distribution of the species in the Anthurium genus (53 species and the Bromeliaceae family (89 species using six modelling techniques. We combined all of the predictions for the same species in ensemble models based on two different criteria: the average of the rescaled predictions by all techniques and the average of the best techniques. The rescaled predictions were then reclassified into binary predictions (presence/absence. By stacking either the original predictions or binary predictions for both ensemble procedures, we obtained four different species richness models per taxa. The gamma and alpha diversity per elevation band (500 m was also computed. To evaluate the prediction abilities for the four predictions of species richness and gamma diversity, the models were compared with the real data along an elevation gradient that was independently compiled by specialists. Finally, we also tested whether our richness models performed better than a null model of altitudinal changes of diversity based on the literature. Stacking of the ensemble prediction of the individual species models generated richness models that proved to be well correlated with the observed alpha diversity richness patterns along elevation and with the gamma diversity derived from the literature. Overall, these models tend to overpredict species richness. The use of the ensemble predictions from the species models built with different techniques seems very promising for modelling of species assemblages. Stacking of the binary models reduced the over-prediction, although more research is needed. The randomisation test proved to be a promising method for testing the performance of the stacked models, but other implementations may still be

  19. Do stacked species distribution models reflect altitudinal diversity patterns?

    Science.gov (United States)

    Mateo, Rubén G; Felicísimo, Ángel M; Pottier, Julien; Guisan, Antoine; Muñoz, Jesús

    2012-01-01

    The objective of this study was to evaluate the performance of stacked species distribution models in predicting the alpha and gamma species diversity patterns of two important plant clades along elevation in the Andes. We modelled the distribution of the species in the Anthurium genus (53 species) and the Bromeliaceae family (89 species) using six modelling techniques. We combined all of the predictions for the same species in ensemble models based on two different criteria: the average of the rescaled predictions by all techniques and the average of the best techniques. The rescaled predictions were then reclassified into binary predictions (presence/absence). By stacking either the original predictions or binary predictions for both ensemble procedures, we obtained four different species richness models per taxa. The gamma and alpha diversity per elevation band (500 m) was also computed. To evaluate the prediction abilities for the four predictions of species richness and gamma diversity, the models were compared with the real data along an elevation gradient that was independently compiled by specialists. Finally, we also tested whether our richness models performed better than a null model of altitudinal changes of diversity based on the literature. Stacking of the ensemble prediction of the individual species models generated richness models that proved to be well correlated with the observed alpha diversity richness patterns along elevation and with the gamma diversity derived from the literature. Overall, these models tend to overpredict species richness. The use of the ensemble predictions from the species models built with different techniques seems very promising for modelling of species assemblages. Stacking of the binary models reduced the over-prediction, although more research is needed. The randomisation test proved to be a promising method for testing the performance of the stacked models, but other implementations may still be developed.

  20. Study on the polarity, solubility, and stacking characteristics of asphaltenes

    KAUST Repository

    Zhang, Long-li

    2014-07-01

    The structure and transformation of fused aromatic ring system in asphaltenes play an important role in the character of asphaltenes, and in step affect the properties of heavy oils. Polarity, solubility and structural characteristics of asphaltenes derived from Tahe atmospheric residue (THAR) and Tuo-826 heavy crude oil (Tuo-826) were analyzed for study of their internal relationship. A fractionation method was used to separate the asphaltenes into four sub-fractions, based on their solubility in the mixed solvent, for the study of different structural and physical-chemical properties, such as polarity, solubility, morphology, stacking characteristics, and mean structural parameters. Transmission electron microscope (TEM) observation can present the intuitive morphology of asphaltene molecules, and shows that the structure of asphaltenes is in local order as well as long range disorder. The analysis results showed that n-heptane asphaltenes of THAR and Tuo-826 had larger dipole moment values, larger fused aromatic ring systems, larger mean number of stacking layers, and less interlayer spacing between stacking layers than the corresponding n-pentane asphaltenes. The sub-fractions that were inclined to precipitate from the mixture of n-heptane and tetrahydrofuran had larger polarity and less solubility. From the first sub-fraction to the fourth sub-fraction, polarity, mean stacking numbers, and average layer size from the TEM images follow a gradual decrease. The structural parameters derived from TEM images could reflect the largest fused aromatic ring system in asphaltene molecule, yet the parameters derived from 1H NMR data reflected the mean message of poly-aromatic ring systems. The structural parameters derived from TEM images were more consistent with the polarity variation of sub-fractions than those derived from 1H NMR data, which indicates that the largest fused aromatic ring system will play a more important role in the stacking characteristics of