WorldWideScience

Sample records for high voltage cmos

  1. A high-speed CMOS current op amp for very low supply voltage operation

    DEFF Research Database (Denmark)

    Bruun, Erik

    1994-01-01

    A CMOS implementation of a high-gain current mode operational amplifier (op amp) with a single-ended input and a differential output is described. This configuration is the current mode counterpart of the traditional voltage mode op amp. In order to exploit the inherent potential for high speed......, low voltage operation normally associated with current mode analog signal processing, the op amp has been designed to operate off a supply voltage of 1.5 V, and the signal path has been confined to N-channel transistors. With this design, a gain of 94 dB and a gain-bandwidth product of 65 MHz has been...

  2. A high-efficiency low-voltage CMOS rectifier for harvesting energy in implantable devices.

    Science.gov (United States)

    Hashemi, S Saeid; Sawan, Mohamad; Savaria, Yvon

    2012-08-01

    We present, in this paper, a new full-wave CMOS rectifier dedicated for wirelessly-powered low-voltage biomedical implants. It uses bootstrapped capacitors to reduce the effective threshold voltage of selected MOS switches. It achieves a significant increase in its overall power efficiency and low voltage-drop. Therefore, the rectifier is good for applications with low-voltage power supplies and large load current. The rectifier topology does not require complex circuit design. The highest voltages available in the circuit are used to drive the gates of selected transistors in order to reduce leakage current and to lower their channel on-resistance, while having high transconductance. The proposed rectifier was fabricated using the standard TSMC 0.18 μm CMOS process. When connected to a sinusoidal source of 3.3 V peak amplitude, it allows improving the overall power efficiency by 11% compared to the best recently published results given by a gate cross-coupled-based structure.

  3. DESIGN AND SIMULATION OF A HIGH PERFORMANCE CMOS VOLTAGE DOUBLERS USING CHARGE REUSE TECHNIQUE

    Directory of Open Access Journals (Sweden)

    SHAMIL H. HUSSEIN

    2017-12-01

    Full Text Available Voltage doubler (VD structure plays an important role in charge pump (CP circuits. It provides a voltages that is higher than the voltage of the power supply or a voltage of reverse polarity. In many applications such as the power IC and switched-capacitor transformers. This paper presents the design and analysis for VD using charge reuse technique CMOS 0.35µm tech. with high performance. Bootstrapped and charge reuse techniques is used to improve performance of integrated VD. Charge reusing method is based on equalizing the voltages of the pumping capacitances in each stage of CP. As a consequence, it reduces the load independent losses, improve the efficiency. Simulation using Orcad is applied for various VD structures shows improvement in charge reuse technique compared with existing counterpart. The results obtained show that the VD can be used in a wide band frequencies (0-100 MHz or greater. The charge reuse VD circuit provided a good efficiency about (87.6% and (83.5% for one stage and two stage respectively at pump capacitance of 57pf, load current of 1mA, frequency of 10 MHz and supply voltage is 3.5 V compared with one stage and two stage of a latched VD are (85.4% and (80% respectively.

  4. A High-Efficient Low-Voltage Rectifier for CMOS Technology

    Directory of Open Access Journals (Sweden)

    Jendernalik Waldemar

    2016-06-01

    Full Text Available A new configuration of rectifier suiting CMOS technology is presented. The rectifier consists of only two n-channel MOS transistors, two capacitors and two resistors; for this reason it is very favourable in manufacturing in CMOS technology. With these features the rectifier is easy to design and cheap in production. Despite its simplicity, the rectifier has relatively good characteristics, the voltage and power efficiency, and bandwidth greater than 89%, 87%, and 1 GHz, respectively. The performed simulations and measurements of a prototype circuit fully confirmed its correct operation and advantages.

  5. Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design

    Directory of Open Access Journals (Sweden)

    Subodh Wairya

    2012-01-01

    Full Text Available This paper presents a comparative study of high-speed and low-voltage full adder circuits. Our approach is based on hybrid design full adder circuits combined in a single unit. A high performance adder cell using an XOR-XNOR (3T design style is discussed. This paper also discusses a high-speed conventional full adder design combined with MOSCAP Majority function circuit in one unit to implement a hybrid full adder circuit. Moreover, it presents low-power Majority-function-based 1-bit full addersthat use MOS capacitors (MOSCAP in its structure. This technique helps in reducing power consumption, propagation delay, and area of digital circuits while maintaining low complexity of logic design. Simulation results illustrate the superiority of the designed adder circuits over the conventional CMOS, TG, and hybrid adder circuits in terms of power, delay, power delay product (PDP, and energy delay product (EDP. Postlayout simulation results illustrate the superiority of the newly designed majority adder circuits against the reported conventional adder circuits. The design is implemented on UMC 0.18 m process models in Cadence Virtuoso Schematic Composer at 1.8 V single-ended supply voltage, and simulations are carried out on Spectre S.

  6. High-ratio voltage conversion in CMOS for efficient mains-connected standby

    CERN Document Server

    Meyvaert, Hans

    2016-01-01

    This book describes synergetic innovation opportunities offered by combining the field of power conversion with the field of integrated circuit (IC) design. The authors demonstrate how integrating circuits enables increased operation frequency, which can be exploited in power converters to reduce drastically the size of the discrete passive components. The authors introduce multiple power converter circuits, which are very compact as result of their high level of integration. First, the limits of high-power-density low-voltage monolithic switched-capacitor DC-DC conversion are investigated to enable on-chip power granularization. AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully. Discusses high-power-density monolithic switched-capacitor DC-DC conversion in bulk CMOS,...

  7. High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

    2014-05-21

    We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

  8. A high frequency active voltage doubler in standard CMOS using offset-controlled comparators for inductive power transmission.

    Science.gov (United States)

    Lee, Hyung-Min; Ghovanloo, Maysam

    2013-06-01

    In this paper, we present a fully integrated active voltage doubler in CMOS technology using offset-controlled high speed comparators for extending the range of inductive power transmission to implantable microelectronic devices (IMD) and radio-frequency identification (RFID) tags. This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and requires lower input voltage than active rectifiers, leading to reliable and efficient operation with weakly coupled inductive links. The offset-controlled functions in the comparators compensate for turn-on and turn-off delays to not only maximize the forward charging current to the load but also minimize the back current, optimizing PCE in the high frequency (HF) band. We fabricated the active voltage doubler in a 0.5-μm 3M2P std . CMOS process, occupying 0.144 mm(2) of chip area. With 1.46 V peak AC input at 13.56 MHz, the active voltage doubler provides 2.4 V DC output across a 1 kΩ load, achieving the highest PCE = 79% ever reported at this frequency. In addition, the built-in start-up circuit ensures a reliable operation at lower voltages.

  9. High-voltage pixel detectors in commercial CMOS technologies for ATLAS, CLIC and Mu3e experiments

    CERN Document Server

    Peric,I et al.

    2013-01-01

    High-voltage particle detectors in commercial CMOS technologies are a detector family that allows implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. In the R/D phase of the development, a radiation tolerance of 1015 neq=cm2 , nearly 100% detection efficiency and a spatial resolution of about 3 μm were demonstrated. Since 2011 the HV detectors have first applications: the technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Several prototype sensors have been designed in a standard 180 nm HV CMOS process and successfully tested. Thanks to its high radiation tolerance, the HV detectors are also seen at CERN as a promising alternative to the standard options for ATLAS upgrade and CLIC. In order to test the concept, within ATLAS upgrade R/D, we are currently exploring an active pixel detector demonstrator HV2FEI4; also implemented in the 180 nm HV process.

  10. High-voltage pixel detectors in commercial CMOS technologies for ATLAS, CLIC and Mu3e experiments

    CERN Document Server

    Peric, Ivan; Backhaus, Malte; Barbero, Marlon; Benoit, Mathieu; Berger, Niklaus; Bompard, Frederic; Breugnon, Patrick; Clemens, Jean-Claude; Dannheim, Dominik; Dierlamm, Alexander; Feigl, Simon; Fischer, Peter; Fougeron, Denis; Garcia-Sciveres, Maurice; Heim, Timon; Hügging, Fabian; Kiehn, Moritz; Kreidl, Christian; Krüger, Hans; La Rosa, Alessandro; Liu, Jian; Lütticke, Florian; Mariñas, Carlos; Meng, Lingxin; Miucci, Antonio; Münstermann, Daniel; Nguyen, Hong Hanh; Obermann, Theresa; Pangaud, Patrick; Perrevoort, Ann-Kathrin; Rozanov, Alexandre; Schöning, André; Schwenker, Benjamin; Wiedner, Dirk

    2013-01-01

    High-voltage particle detectors in commercial CMOS technologies are a detector family that allows implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. In the R/D phase of the development, a radiation tolerance of 10 15 n eq = cm 2 , nearly 100% detection ef fi ciency and a spatial resolution of about 3 μ m were demonstrated. Since 2011 the HV detectors have fi rst applications: the technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Several prototype sensors have been designed in a standard 180 nm HV CMOS process and successfully tested. Thanks to its high radiation tolerance, the HV detectors are also seen at CERN as a promising alternative to the standard options for ATLAS upgrade and CLIC. In order to test the concept, within ATLAS upgrade R/D, we are currently exploring an active pixel detector demonstrator HV2FEI4; also implemented in the 180 nm HV process

  11. Ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) voltage reference.

    Science.gov (United States)

    Boufouss, El Hafed; Francis, Laurent A; Kilchytska, Valeriya; Gérard, Pierre; Simon, Pascal; Flandre, Denis

    2013-12-13

    This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

  12. CMOS voltage references an analytical and practical perspective

    CERN Document Server

    Kok, Chi-Wah

    2013-01-01

    A practical overview of CMOS circuit design, this book covers the technology, analysis, and design techniques of voltage reference circuits.  The design requirements covered follow modern CMOS processes, with an emphasis on low power, low voltage, and low temperature coefficient voltage reference design. Dedicating a chapter to each stage of the design process, the authors have organized the content to give readers the tools they need to implement the technologies themselves. Readers will gain an understanding of device characteristics, the practical considerations behind circuit topology,

  13. Low-voltage CMOS operational amplifiers theory, design and implementation

    CERN Document Server

    Sakurai, Satoshi

    1995-01-01

    Low-Voltage CMOS Operational Amplifiers: Theory, Design and Implementation discusses both single and two-stage architectures. Opamps with constant-gm input stage are designed and their excellent performance over the rail-to-rail input common mode range is demonstrated. The first set of CMOS constant-gm input stages was introduced by a group from Technische Universiteit, Delft and Universiteit Twente, the Netherlands. These earlier versions of circuits are discussed, along with new circuits developed at the Ohio State University. The design, fabrication (MOSIS Tiny Chips), and characterization of the new circuits are now complete. Basic analog integrated circuit design concepts should be understood in order to fully appreciate the work presented. However, the topics are presented in a logical order and the circuits are explained in great detail, so that Low-Voltage CMOS Operational Amplifiers can be read and enjoyed by those without much experience in analog circuit design. It is an invaluable reference boo...

  14. Voltage-to-frequency converters CMOS design and implementation

    CERN Document Server

    Azcona Murillo, Cristina; Pueyo, Santiago Celma

    2013-01-01

    This book develops voltage-to-frequency converter (VFC) solutions integrated in standard CMOS technology to be used as a part of a microcontroller-based, multisensor interface in the environment of portable applications, particularly within a WSN node.  Coverage includes the total design flow of monolithic VFCs, according to the target application, as well as the analysis, design and implementation of the main VFC blocks, revealing the main challenges and solutions encountered during the design of such high performance cells. Four complete VFCs, each temperature compensated, are fully designed and evaluated: a programmable VFC that includes an offset frequency and a sleep/mode enable terminal; a low power rail-to-rail VFC; and two rail-to-rail differential VFCs.

  15. Static Power Optimization Using Dual Sub-Threshold Supply Voltages in Digital CMOS VLSI Circuits

    OpenAIRE

    K.Srilakshmi; Y.Syamala; A.Suvir Vikram

    2013-01-01

    Power dissipation in high performance systems requi res more expensive packaging. In this situation, lo w power VLSI design has assumed great importance as a n active and rapidly developing field. As the densi ty and operating speed of CMOS VLSI chip increases, st atic power dissipation becomes more significant. Th is is due to the leakage current when the transistor i s off this is threshold voltage dependent. This can be ...

  16. High-speed nonvolatile CMOS/MNOS RAM

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Dodson, W.D.; Sokel, R.J.

    1979-01-01

    A bulk silicon technology for a high-speed static CMOS/MNOS RAM has been developed. Radiation-hardened, high voltage CMOS circuits have been fabricated for the memory array driving circuits and the enhancement-mode p-channel MNOS memory transistors have been fabricated using a native tunneling oxide with a 45 nm CVD Si 3 N 4 insulator deposited at 750 0 C. Read cycle times less than 350 ns and write cycle times of 1 μs are projected for the final 1Kx1 design. The CMOS circuits provide adequate speed for the write and read cycles and minimize the standby power dissipation. Retention times well in excess of 30 min are projected

  17. Robust and Energy-Efficient Ultra-Low-Voltage Circuit Design under Timing Constraints in 65/45 nm CMOS

    Directory of Open Access Journals (Sweden)

    David Bol

    2011-01-01

    Full Text Available Ultra-low-voltage operation improves energy efficiency of logic circuits by a factor of 10×, at the expense of speed, which is acceptable for applications with low-to-medium performance requirements such as RFID, biomedical devices and wireless sensors. However, in 65/45 nm CMOS, variability and short-channel effects significantly harm robustness and timing closure of ultra-low-voltage circuits by reducing noise margins and jeopardizing gate delays. The consequent guardband on the supply voltage to meet a reasonable manufacturing yield potentially ruins energy efficiency. Moreover, high leakage currents in these technologies degrade energy efficiency in case of long stand-by periods. In this paper, we review recently published techniques to design robust and energy-efficient ultra-low-voltage circuits in 65/45 nm CMOS under relaxed yet strict timing constraints.

  18. Merits of CMOS/SIMOX technology for low-voltage SRAM macros

    CERN Document Server

    Kumagai, K; Yamada, T; Nakamura, H; Onishi, H; Matsubara, Y; Imai, K; Kurosawa, S

    1999-01-01

    A 128-kbit SRAM (static random access memory) macro with the 0.35 mu m FD (fully-depleted) CMOS/SIMOX (separation by implantation of oxygen) technology has been developed to demonstrate the merits of that technology for low-voltage $9 applications. Its access time at Vdd =1.5 V was comparable with that obtained with the 0.35 mu m standard bulk CMOS technology at Vdd=3.3 V, due to the combination of the small S/D capacitance and the small back-bias effect. As the $9 yield of the 128-kbit SRAM macros was almost the same as the standard bulk CMOS technology, the manufacturability of the 0.35 mu m FD-CMOS/SIMOX technology has also been demonstrated. (7 refs).

  19. High voltage engineering

    CERN Document Server

    Rizk, Farouk AM

    2014-01-01

    Inspired by a new revival of worldwide interest in extra-high-voltage (EHV) and ultra-high-voltage (UHV) transmission, High Voltage Engineering merges the latest research with the extensive experience of the best in the field to deliver a comprehensive treatment of electrical insulation systems for the next generation of utility engineers and electric power professionals. The book offers extensive coverage of the physical basis of high-voltage engineering, from insulation stress and strength to lightning attachment and protection and beyond. Presenting information critical to the design, selec

  20. High voltage test techniques

    CERN Document Server

    Kind, Dieter

    2001-01-01

    The second edition of High Voltage Test Techniques has been completely revised. The present revision takes into account the latest international developments in High Voltage and Measurement technology, making it an essential reference for engineers in the testing field.High Voltage Technology belongs to the traditional area of Electrical Engineering. However, this is not to say that the area has stood still. New insulating materials, computing methods and voltage levels repeatedly pose new problems or open up methods of solution; electromagnetic compatibility (EMC) or components and systems al

  1. High voltage power supply

    Science.gov (United States)

    Ruitberg, A. P.; Young, K. M. (Inventor)

    1985-01-01

    A high voltage power supply is formed by three discrete circuits energized by a battery to provide a plurality of concurrent output signals floating at a high output voltage on the order of several tens of kilovolts. In the first two circuits, the regulator stages are pulse width modulated and include adjustable ressistances for varying the duty cycles of pulse trains provided to corresponding oscillator stages while the third regulator stage includes an adjustable resistance for varying the amplitude of a steady signal provided to a third oscillator stage. In the first circuit, the oscillator, formed by a constant current drive network and a tuned resonant network included a step up transformer, is coupled to a second step up transformer which, in turn, supplies an amplified sinusoidal signal to a parallel pair of complementary poled rectifying, voltage multiplier stages to generate the high output voltage.

  2. Novel CMOS Bulk-driven Charge Pump for Ultra Low Input Voltage

    Directory of Open Access Journals (Sweden)

    G. Nagy

    2016-06-01

    Full Text Available In this paper, a novel bulk-driven cross-coupled charge pump designed in standard 90 nm CMOS technology is presented. The proposed charge pump is based on a dynamic threshold voltage inverter and is suitable for integrated ultra-low voltage converters. Due to a latchup risk, bulk-driven charge pumps can safely be used only in low-voltage applications. For the input voltage below 200 mV and output current of 1 uA, the proposed bulk-driven topology can achieve about 10 % higher efficiency than the conventional gate-driven cross-coupled charge pump. Therefore, it can be effectively used in DC-DC converters, which are the basic building blocks of on-chip energy harvesting systems with ultra-low supply voltage.

  3. A low-offset low-voltage CMOS Op Amp with rail-to-rail input and output ranges

    NARCIS (Netherlands)

    Holzmann, Peter J.; Wiegerink, Remco J.; Gierkink, Sander L.J.; Wassenaar, R.F.; Stroet, Peter; Stroet, P.M.

    1996-01-01

    A low voltage CMOS op amp is presented. The circuit uses complementary input pairs to achieve a rail-to-rail common mode input voltage range. Special attention has been given to the reduction of the op amp's systematic offset voltage. Gain boost amplifiers are connected in a special way to provide

  4. High voltage pulse generator

    Science.gov (United States)

    Fasching, George E.

    1977-03-08

    An improved high-voltage pulse generator has been provided which is especially useful in ultrasonic testing of rock core samples. An N number of capacitors are charged in parallel to V volts and at the proper instance are coupled in series to produce a high-voltage pulse of N times V volts. Rapid switching of the capacitors from the paralleled charging configuration to the series discharging configuration is accomplished by using silicon-controlled rectifiers which are chain self-triggered following the initial triggering of a first one of the rectifiers connected between the first and second of the plurality of charging capacitors. A timing and triggering circuit is provided to properly synchronize triggering pulses to the first SCR at a time when the charging voltage is not being applied to the parallel-connected charging capacitors. Alternate circuits are provided for controlling the application of the charging voltage from a charging circuit to be applied to the parallel capacitors which provides a selection of at least two different intervals in which the charging voltage is turned "off" to allow the SCR's connecting the capacitors in series to turn "off" before recharging begins. The high-voltage pulse-generating circuit including the N capacitors and corresponding SCR's which connect the capacitors in series when triggered "on" further includes diodes and series-connected inductors between the parallel-connected charging capacitors which allow sufficiently fast charging of the capacitors for a high pulse repetition rate and yet allow considerable control of the decay time of the high-voltage pulses from the pulse-generating circuit.

  5. Highly Flexible Hybrid CMOS Inverter Based on Si Nanomembrane and Molybdenum Disulfide.

    Science.gov (United States)

    Das, Tanmoy; Chen, Xiang; Jang, Houk; Oh, Il-Kwon; Kim, Hyungjun; Ahn, Jong-Hyun

    2016-11-01

    2D semiconductor materials are being considered for next generation electronic device application such as thin-film transistors and complementary metal-oxide-semiconductor (CMOS) circuit due to their unique structural and superior electronics properties. Various approaches have already been taken to fabricate 2D complementary logics circuits. However, those CMOS devices mostly demonstrated based on exfoliated 2D materials show the performance of a single device. In this work, the design and fabrication of a complementary inverter is experimentally reported, based on a chemical vapor deposition MoS 2 n-type transistor and a Si nanomembrane p-type transistor on the same substrate. The advantages offered by such CMOS configuration allow to fabricate large area wafer scale integration of high performance Si technology with transition-metal dichalcogenide materials. The fabricated hetero-CMOS inverters which are composed of two isolated transistors exhibit a novel high performance air-stable voltage transfer characteristic with different supply voltages, with a maximum voltage gain of ≈16, and sub-nano watt power consumption. Moreover, the logic gates have been integrated on a plastic substrate and displayed reliable electrical properties paving a realistic path for the fabrication of flexible/transparent CMOS circuits in 2D electronics. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  6. Voltage-tolerant circuit design for fully CMOS-compatible differential multiple-time programmable nonvolatile memories

    Science.gov (United States)

    Wu, Chia-You; Lin, Hongchin; Chiu, Hou-Jen

    2017-04-01

    In this paper, a fully CMOS-compatible differential multiple-time programmable (DFMTP) nonvolatile memory (NVM) circuit, fabricated by the standard TSMC 0.18 µm CMOS process without violating the design and electrical rules, is proposed. Novel voltage-tolerant circuits were designed using the standard 3.3 and 1.8 V devices for the bit line (BL) and control gate (CG) drivers for -3 and 6 V program/erase operations, as well as the negative voltage isolation circuits for sense amplifiers. The DFMTP array with these voltage-tolerant control circuits was used and measured to confirm the correct program/erase/read operations.

  7. High Voltage Seismic Generator

    Science.gov (United States)

    Bogacz, Adrian; Pala, Damian; Knafel, Marcin

    2015-04-01

    This contribution describes the preliminary result of annual cooperation of three student research groups from AGH UST in Krakow, Poland. The aim of this cooperation was to develop and construct a high voltage seismic wave generator. Constructed device uses a high-energy electrical discharge to generate seismic wave in ground. This type of device can be applied in several different methods of seismic measurement, but because of its limited power it is mainly dedicated for engineering geophysics. The source operates on a basic physical principles. The energy is stored in capacitor bank, which is charged by two stage low to high voltage converter. Stored energy is then released in very short time through high voltage thyristor in spark gap. The whole appliance is powered from li-ion battery and controlled by ATmega microcontroller. It is possible to construct larger and more powerful device. In this contribution the structure of device with technical specifications is resented. As a part of the investigation the prototype was built and series of experiments conducted. System parameter was measured, on this basis specification of elements for the final device were chosen. First stage of the project was successful. It was possible to efficiently generate seismic waves with constructed device. Then the field test was conducted. Spark gap wasplaced in shallowborehole(0.5 m) filled with salt water. Geophones were placed on the ground in straight line. The comparison of signal registered with hammer source and sparker source was made. The results of the test measurements are presented and discussed. Analysis of the collected data shows that characteristic of generated seismic signal is very promising, thus confirms possibility of practical application of the new high voltage generator. The biggest advantage of presented device after signal characteristics is its size which is 0.5 x 0.25 x 0.2 m and weight approximately 7 kg. This features with small li-ion battery makes

  8. High voltage electrical injuries

    International Nuclear Information System (INIS)

    Janjua, S.A.

    2002-01-01

    Objective: To highlight the devastating nature and consequences of high voltage electrical injuries and to stress the need for its prevention. Design: It was a retrospective study. Place and duration of study: The study was conducted at Army Burn Centre, Combined Military Hospital Kharian Cantonment, between January 1,1998 to December 31, 2000. Subjects and Methods: All the patients reporting to Army Burn Centre with high voltage electrical injuries were included in the study. The epidemiology of these injuries were studied along with the pattern of their management and outcome in terms of mortality and morbidity. Results: Of all the patients admitted to the Army Burn Center, 5.94% were affected with electrical injuries. They were predominantly males in a ratio of 9.75:1 and mostly in the 3rd and 4th decades of their lives. Seventy percent of these injuries were injuries were work-related and 75% had associated surface burns. There was significant mortality rate of 18.6% and a limb amputation rate of 80% along with professional disability rate of 91% rendering it a highly morbid condition. Conclusion: This study stresses the necessity to educate the general public with regard to the devastating nature of high voltage electrical injury and highlight the importance of prevention. (author)

  9. High voltage DC power supply

    Science.gov (United States)

    Droege, Thomas F.

    1989-01-01

    A high voltage DC power supply having a first series resistor at the output for limiting current in the event of a short-circuited output, a second series resistor for sensing the magnitude of output current, and a voltage divider circuit for providing a source of feedback voltage for use in voltage regulation is disclosed. The voltage divider circuit is coupled to the second series resistor so as to compensate the feedback voltage for a voltage drop across the first series resistor. The power supply also includes a pulse-width modulated control circuit, having dual clock signals, which is responsive to both the feedback voltage and a command voltage, and also includes voltage and current measuring circuits responsive to the feedback voltage and the voltage developed across the second series resistor respectively.

  10. High voltage generator

    Science.gov (United States)

    Schwemin, A. J.

    1959-03-17

    A generator for producing relatively large currents at high voltages is described. In general, the invention comprises a plurality of capacitors connected in series by a plurality of switches alternately disposed with the capacitors. The above-noted circuit is mounted for movement with respect to contact members and switch closure means so that a load device and power supply are connected across successive numbers of capacitors, while the other capacitors are successively charged with the same power supply.

  11. High voltage pulse conditioning

    International Nuclear Information System (INIS)

    Springfield, R.M.; Wheat, R.M.

    1990-01-01

    This patent describes an apparatus for conditioning high voltage pulses from particle accelerators in order to shorten the rise times of the pulses. Flashover switches in the cathode stalk of the transmission line hold off conduction for a determinable period of time, reflecting the early portion of the pulses. Diodes upstream of the switches divert energy into the magnetic and electrostatic storage of the capacitance and inductance inherent to the transmission line until the switches close

  12. Fully Integrated, Low Drop-Out Linear Voltage Regulator in 180 nm CMOS

    DEFF Research Database (Denmark)

    Yosef-Hay, Yoni; Larsen, Dennis Øland; Llimos Muntal, Pere

    2017-01-01

    This paper presents a capacitor-free low dropout (LDO) linear regulator based on a dual loop topology. The regulator utilizes two feedback loops to satisfy the challenges of hearing aid devices, which include fast transient performance and small voltage spikes under rapid load-current changes....... The proposed design works without the need of a decoupling capacitor connected at the output and operates with a 0-100 pF capacitive load. The design has been taped out in a 0.18 µm CMOS process. The proposed regulator has a low component count, area of 0.012 mm2 and is suitable for system-on-chip integration...

  13. A Capacitor-Free, Fast Transient Response Linear Voltage Regulator In a 180nm CMOS

    DEFF Research Database (Denmark)

    Deleuran, Alexander N.; Lindbjerg, Nicklas; Pedersen, Martin K.

    2015-01-01

    A 1.8 V capacitor-free linear regulator with fast transient response based on a new topology with a fast and slow regulation loop is presented. The design has been laid out and simulated in a 0.18 µm CMOS process. The design has a low component count and is tailored for system-on-chip integration....... A current step load from 0-50 mA with a rise time of 1 µs results in an undershoot in the output voltage of 140 mV for a period of 39 ns. The regulator sources up to 50 mA current load....

  14. High Voltage Charge Pump

    KAUST Repository

    Emira, Ahmed A.

    2014-10-09

    Various embodiments of a high voltage charge pump are described. One embodiment is a charge pump circuit that comprises a plurality of switching stages each including a clock input, a clock input inverse, a clock output, and a clock output inverse. The circuit further comprises a plurality of pumping capacitors, wherein one or more pumping capacitors are coupled to a corresponding switching stage. The circuit also comprises a maximum selection circuit coupled to a last switching stage among the plurality of switching stages, the maximum selection circuit configured to filter noise on the output clock and the output clock inverse of the last switching stage, the maximum selection circuit further configured to generate a DC output voltage based on the output clock and the output clock inverse of the last switching stage.

  15. Decal electronics for printed high performance cmos electronic systems

    KAUST Repository

    Hussain, Muhammad Mustafa

    2017-11-23

    High performance complementary metal oxide semiconductor (CMOS) electronics are critical for any full-fledged electronic system. However, state-of-the-art CMOS electronics are rigid and bulky making them unusable for flexible electronic applications. While there exist bulk material reduction methods to flex them, such thinned CMOS electronics are fragile and vulnerable to handling for high throughput manufacturing. Here, we show a fusion of a CMOS technology compatible fabrication process for flexible CMOS electronics, with inkjet and conductive cellulose based interconnects, followed by additive manufacturing (i.e. 3D printing based packaging) and finally roll-to-roll printing of packaged decal electronics (thin film transistors based circuit components and sensors) focusing on printed high performance flexible electronic systems. This work provides the most pragmatic route for packaged flexible electronic systems for wide ranging applications.

  16. A CMOS high speed imaging system design based on FPGA

    Science.gov (United States)

    Tang, Hong; Wang, Huawei; Cao, Jianzhong; Qiao, Mingrui

    2015-10-01

    CMOS sensors have more advantages than traditional CCD sensors. The imaging system based on CMOS has become a hot spot in research and development. In order to achieve the real-time data acquisition and high-speed transmission, we design a high-speed CMOS imaging system on account of FPGA. The core control chip of this system is XC6SL75T and we take advantages of CameraLink interface and AM41V4 CMOS image sensors to transmit and acquire image data. AM41V4 is a 4 Megapixel High speed 500 frames per second CMOS image sensor with global shutter and 4/3" optical format. The sensor uses column parallel A/D converters to digitize the images. The CameraLink interface adopts DS90CR287 and it can convert 28 bits of LVCMOS/LVTTL data into four LVDS data stream. The reflected light of objects is photographed by the CMOS detectors. CMOS sensors convert the light to electronic signals and then send them to FPGA. FPGA processes data it received and transmits them to upper computer which has acquisition cards through CameraLink interface configured as full models. Then PC will store, visualize and process images later. The structure and principle of the system are both explained in this paper and this paper introduces the hardware and software design of the system. FPGA introduces the driven clock of CMOS. The data in CMOS is converted to LVDS signals and then transmitted to the data acquisition cards. After simulation, the paper presents a row transfer timing sequence of CMOS. The system realized real-time image acquisition and external controls.

  17. Development of a CMOS process using high energy ion implantation

    International Nuclear Information System (INIS)

    Stolmeijer, A.

    1986-01-01

    The main interest of this thesis is the use of complementary metal oxide semiconductors (CMOS) in electronic technology. Problems in developing a CMOS process are mostly related to the isolation well of p-n junctions. It is shown that by using high energy ion implantation, it is possible to reduce lateral dimensions to obtain a rather high packing density. High energy ion implantation is also presented as a means of simplifying CMOS processing, since extended processing steps at elevated temperatures are superfluous. Process development is also simplified. (Auth.)

  18. Integrated Reconfigurable High-Voltage Transmitting Circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger

    2014-01-01

    In this paper a full high-voltage transmitting cir- cuit aimed for capacitive micromachined ultrasonic transducers (CMUTs) used in ultrasound medical applications is designed and implemented in a 0.35 μm high-voltage CMOS process. The CMUT is single-ended driven. The design is taped......-out and measurements are performed on the integrated circuit. The transmitting circuit is reconfigurable externally making it able to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes, pulse voltages up to 100 V, maximum pulse range of 50 V and frequencies up to 5 MHz. The area...

  19. Integrated reconfigurable high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger

    2015-01-01

    In this paper a high-voltage transmitting circuit aimed for capacitive micromachined ultrasonic transducers (CMUTs) used in scanners for medical applications is designed and implemented in a 0.35 μm high-voltage CMOS process. The transmitting circuit is reconfigurable externally making it able...... to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes with voltages up to 100 V, maximum pulse range of 50 V, frequencies up to 5 MHz and different driving slew rates. Measurements are performed on the circuit in order to assess its functionality and power consumption...

  20. CMOS circuits for electromagnetic vibration transducers interfaces for ultra-low voltage energy harvesting

    CERN Document Server

    Maurath, Dominic

    2015-01-01

    Chip-integrated power management solutions are a must for ultra-low power systems. This enables not only the optimization of innovative sensor applications. It is also essential for integration and miniaturization of energy harvesting supply strategies of portable and autonomous monitoring systems. The book particularly addresses interfaces for energy harvesting, which are the key element to connect micro transducers to energy storage elements. Main features of the book are: - A comprehensive technology and application review, basics on transducer mechanics, fundamental circuit and control design, prototyping and testing, up to sensor system supply and applications. - Novel interfacing concepts - including active rectifiers, MPPT methods for efficient tracking of DC as well as AC sources, and a fully-integrated charge pump for efficient maximum AC power tracking at sub-100µW ultra-low power levels. The chips achieve one of widest presented operational voltage range in standard CMOS technology: 0.44V to over...

  1. A 5 V-to-3.3 V CMOS Linear Regulator with Three-Output Temperature-Independent Reference Voltages

    Directory of Open Access Journals (Sweden)

    San-Fu Wang

    2016-01-01

    Full Text Available This paper presents a 5 V-to-3.3 V linear regulator circuit, which uses 3.3 V CMOS transistors to replace the 5 V CMOS transistors. Thus, the complexity of the manufacturing semiconductor process can be improved. The proposed linear regulator is implemented by cascode architecture, which requires three different reference voltages as the bias voltages of its circuit. Thus, the three-output temperature-independent reference voltage circuit is proposed, which provides three accurate reference voltages simultaneously. The three-output temperature-independent reference voltages also can be used in other circuits of the chip. By using the proposed temperature-independent reference voltages, the proposed linear regulator can provide an accurate output voltage, and it is suitable for low cost, small size, and highly integrated system-on-chip (SoC applications. Moreover, the proposed linear regulator uses the cascode technique, which improves both the gain performance and the isolation performance. Therefore, the proposed linear regulator has a good performance in reference voltage to output voltage isolation. The voltage variation of the linear regulator is less than 2.153% in the temperature range of −40°C–120°C, and the power supply rejection ratio (PSRR is less than −42.8 dB at 60 Hz. The regulator can support 0~200 mA output current. The core area is less than 0.16 mm2.

  2. High-Speed Low Power Design in CMOS

    DEFF Research Database (Denmark)

    Ghani, Arfan; Usmani, S. H.; Stassen, Flemming

    2004-01-01

    consideration. In this work, delay and power metrics for both MCML and CMOS have been studied and a broader analysis of MCML is presented. Near minimum sized transistors are used and power consumption is measured for a wide variety of circuit blocks. The most important goal of this project is to evaluate......Static CMOS design displays benefits such as low power consumption, dominated by dynamic power consumption. In contrast, MOS Current Mode Logic (MCML) displays static rather than dynamic power consumption. High-speed low-power design is one of the many application areas in VLSI that require...... the appropriate domains of performance and power requirements in which MCML presents benefits over standard CMOS. An optimized cell library is designed and implemented in both CMOS and MCML in order to make a comparison with reference to speed and power. Much more time is spent in order to nderstand...

  3. Design of Low Voltage Low Power CMOS OP-AMPS with Rail-to-Rail Input/Output Swing

    OpenAIRE

    Gopalaiah, SV; Shivaprasad, AP; Panigrahi, Sukanta K

    2004-01-01

    A novel input and output biasing circuit to extend the input common mode (CM) voltage range and the output swing to rail-to-rail in a low voltage op-amp in standard CMOS technology is presented. The input biasing circuit uses a Switched Capacitor Based Attenuator (SCBA) approach to establish rail-to-rail common mode input voltage range. And the output biasing circuit uses an Output Driver (OD), with floating bias to give the rail-to-rail swing at output stage. Three different OD schemes in op...

  4. A CMOS Micro-power, Class-AB “Flipped” Voltage Follower using the quasi floating-gate technique

    OpenAIRE

    Juan Jesus Ocampo-Hidalgo; Iván Vázquez-Álvarez; Sergio Sandoval-Perez; Rodolfo Garcia-Lozano; Marco Gurrola-Navarro; Jesus Ezequiel Molinar-Solis

    2017-01-01

    This paper presents the design and characterization of a new analog voltage follower for low-voltage applications. The main idea is based on the “Flipped” Voltage Follower and the use of the quasi-floating gate technique for achieving class AB operation. A test cell was simulated and fabricated using a 0,5 μm CMOS technology. When the proposed circuit is supplied with VDD = 1,5 V, it presents a power consumption of only 413 μW. Measurement and experimental results show a gain bandwidth produc...

  5. A review on high-resolution CMOS delay lines: towards sub-picosecond jitter performance.

    Science.gov (United States)

    Abdulrazzaq, Bilal I; Abdul Halin, Izhal; Kawahito, Shoji; Sidek, Roslina M; Shafie, Suhaidi; Yunus, Nurul Amziah Md

    2016-01-01

    A review on CMOS delay lines with a focus on the most frequently used techniques for high-resolution delay step is presented. The primary types, specifications, delay circuits, and operating principles are presented. The delay circuits reported in this paper are used for delaying digital inputs and clock signals. The most common analog and digitally-controlled delay elements topologies are presented, focusing on the main delay-tuning strategies. IC variables, namely, process, supply voltage, temperature, and noise sources that affect delay resolution through timing jitter are discussed. The design specifications of these delay elements are also discussed and compared for the common delay line circuits. As a result, the main findings of this paper are highlighting and discussing the followings: the most efficient high-resolution delay line techniques, the trade-off challenge found between CMOS delay lines designed using either analog or digitally-controlled delay elements, the trade-off challenge between delay resolution and delay range and the proposed solutions for this challenge, and how CMOS technology scaling can affect the performance of CMOS delay lines. Moreover, the current trends and efforts used in order to generate output delayed signal with low jitter in the sub-picosecond range are presented.

  6. Frontend Receiver Electronics for High Frequency Monolithic CMUT-on-CMOS Imaging Arrays

    Science.gov (United States)

    Gurun, Gokce; Hasler, Paul; Degertekin, F. Levent

    2012-01-01

    This paper describes the design of CMOS receiver electronics for monolithic integration with capacitive micromachined ultrasonic transducer (CMUT) arrays for high-frequency intravascular ultrasound imaging. A custom 8-inch wafer is fabricated in a 0.35 μm two-poly, four-metal CMOS process and then CMUT arrays are built on top of the application specific integrated circuits (ASICs) on the wafer. We discuss advantages of the single-chip CMUT-on-CMOS approach in terms of receive sensitivity and SNR. Low-noise and high-gain design of a transimpedance amplifier (TIA) optimized for a forward-looking volumetric-imaging CMUT array element is discussed as a challenging design example. Amplifier gain, bandwidth, dynamic range and power consumption trade-offs are discussed in detail. With minimized parasitics provided by the CMUT-on-CMOS approach, the optimized TIA design achieves a 90 fA/√Hz input referred current noise, which is less than the thermal-mechanical noise of the CMUT element. We show successful system operation with a pulse-echo measurement. Transducer noise-dominated detection in immersion is also demonstrated through output noise spectrum measurement of the integrated system at different CMUT bias voltages. A noise figure of 1.8 dB is obtained in the designed CMUT bandwidth of 10 MHz to 20 MHz. PMID:21859585

  7. Ultra High-Speed CMOS Circuits Beyond 100 GHz

    CERN Document Server

    Gharavi, Sam

    2012-01-01

    The book covers the CMOS-based millimeter wave circuits and devices and presents methods and design techniques to use CMOS technology for circuits operating beyond 100 GHz.� Coverage includes a detailed description of both active and passive devices, including modeling techniques and performance optimization. Various mm-wave circuit blocks are discussed, emphasizing their design distinctions from low-frequency design methodologies. This book also covers a device-oriented circuit design technique that is essential for ultra high speed circuits and gives some examples of device/circuit co-design that can be used for mm-wave technology. Offers a detailed description of high frequency device modeling from a circuit designer perspective; Presents a set of techniques for optimizing the performance of CMOS for mm-wave technology, including noise and low noise design for mm-wave; Introduces circuit/device co-design techniques. �

  8. Modular High Voltage Power Supply

    Energy Technology Data Exchange (ETDEWEB)

    Newell, Matthew R. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

    2017-05-18

    The goal of this project is to develop a modular high voltage power supply that will meet the needs of safeguards applications and provide a modular plug and play supply for use with standard electronic racks.

  9. Front-end receiver electronics for high-frequency monolithic CMUT-on-CMOS imaging arrays.

    Science.gov (United States)

    Gurun, Gokce; Hasler, Paul; Degertekin, F

    2011-08-01

    This paper describes the design of CMOS receiver electronics for monolithic integration with capacitive micromachined ultrasonic transducer (CMUT) arrays for highfrequency intravascular ultrasound imaging. A custom 8-inch (20-cm) wafer is fabricated in a 0.35-μm two-poly, four-metal CMOS process and then CMUT arrays are built on top of the application specific integrated circuits (ASICs) on the wafer. We discuss advantages of the single-chip CMUT-on-CMOS approach in terms of receive sensitivity and SNR. Low-noise and high-gain design of a transimpedance amplifier (TIA) optimized for a forward-looking volumetric-imaging CMUT array element is discussed as a challenging design example. Amplifier gain, bandwidth, dynamic range, and power consumption trade-offs are discussed in detail. With minimized parasitics provided by the CMUT-on-CMOS approach, the optimized TIA design achieves a 90 fA/√Hz input-referred current noise, which is less than the thermal-mechanical noise of the CMUT element. We show successful system operation with a pulseecho measurement. Transducer-noise-dominated detection in immersion is also demonstrated through output noise spectrum measurement of the integrated system at different CMUT bias voltages. A noise figure of 1.8 dB is obtained in the designed CMUT bandwidth of 10 to 20 MHz.

  10. High-temperature complementary metal oxide semiconductors (CMOS)

    International Nuclear Information System (INIS)

    McBrayer, J.D.

    1979-10-01

    Silicon CMOS devices were studied, tested, and evaluated at high temperatures to determine processing, geometric, operating characteristics, and stability parameters. After more than 1000 hours at 300 0 C, most devices showed good stability, reliability, and operating characteristics. Processing and geometric parameters were evaluated and optimization steps discussed

  11. High-temperature complementary metal oxide semiconductors (CMOS)

    Energy Technology Data Exchange (ETDEWEB)

    McBrayer, J.D.

    1979-10-01

    Silicon CMOS devices were studied, tested, and evaluated at high temperatures to determine processing, geometric, operating characteristics, and stability parameters. After more than 1000 hours at 300/sup 0/C, most devices showed good stability, reliability, and operating characteristics. Processing and geometric parameters were evaluated and optimization steps discussed.

  12. High performance flexible CMOS SOI FinFETs

    KAUST Repository

    Fahad, Hossain M.

    2014-06-01

    We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due to the reduction in off-state leakage and reduced short channel effects on account of the superior electrostatic charge control of multiple gates. At the same time, flexible electronics is an exciting expansion opportunity for next generation electronics. However, a fully integrated low-cost system will need to maintain ultra-large-scale-integration density, high performance and reliability - same as today\\'s traditional electronics. Up until recently, this field has been mainly dominated by very weak performance organic electronics enabled by low temperature processes, conducive to low melting point plastics. Now however, we show the world\\'s highest performing flexible version of 3D FinFET CMOS using a state-of-the-art CMOS compatible fabrication technique for high performance ultra-mobile consumer applications with stylish design. © 2014 IEEE.

  13. Suppressing voltage transients in high voltage power supplies

    International Nuclear Information System (INIS)

    Lickel, K.F.; Stonebank, R.

    1979-01-01

    A high voltage power supply for an X-ray tubes includes voltage adjusting means, a high voltage transformer, switch means connected to make and interrupt the primary current of the transformer, and over-voltage suppression means to suppress the voltage transient produced when the current is switched on. In order to reduce the power losses in the suppression means, an impedance is connected in the transformer primary circuit on operation of the switch means and is subsequently short-circuited by a switch controlled by a timer after a period which is automatically adjusted to the duration of the transient overvoltage. (U.K.)

  14. Digitally Programmable High-Q Voltage Mode Universal Filter

    Directory of Open Access Journals (Sweden)

    D. Singh

    2013-12-01

    Full Text Available A new low-voltage low-power CMOS current feedback amplifier (CFA is presented in this paper. This is used to realize a novel digitally programmable CFA (DPCFA using transistor arrays and MOS switches. The proposed realizations nearly allow rail-to-rail swing capability at all the ports. Class-AB output stage ensures low power dissipation and high current drive capability. The proposed CFA/ DPCFA operates at supply voltage of ±0.75 V and exhibits bandwidth better than 95 MHz. An application of the DPCFA to realize a novel voltage mode high-Q digitally programmable universal filter (UF is given. Performances of all the proposed circuits are verified by PSPICE simulation using TSMC 0.25μm technology parameters.

  15. Micromachined high-performance RF passives in CMOS substrate

    International Nuclear Information System (INIS)

    Li, Xinxin; Ni, Zao; Gu, Lei; Wu, Zhengzheng; Yang, Chen

    2016-01-01

    This review systematically addresses the micromachining technologies used for the fabrication of high-performance radio-frequency (RF) passives that can be integrated into low-cost complementary metal-oxide semiconductor (CMOS)-grade (i.e. low-resistivity) silicon wafers. With the development of various kinds of post-CMOS-compatible microelectromechanical systems (MEMS) processes, 3D structural inductors/transformers, variable capacitors, tunable resonators and band-pass/low-pass filters can be compatibly integrated into active integrated circuits to form monolithic RF system-on-chips. By using MEMS processes, including substrate modifying/suspending and LIGA-like metal electroplating, both the highly lossy substrate effect and the resistive loss can be largely eliminated and depressed, thereby meeting the high-performance requirements of telecommunication applications. (topical review)

  16. Wafer-scale development and experimental verification of 0.36 mm2 228 mV open-circuit-voltage solid-state CMOS-compatible glucose fuel cell

    Science.gov (United States)

    Arata, Shigeki; Hayashi, Kenya; Nishio, Yuya; Kobayashi, Atsuki; Nakazato, Kazuo; Niitsu, Kiichi

    2018-04-01

    The world’s smallest (0.36 mm2) solid-state CMOS-compatible glucose fuel cell, which exhibits an open-circuit voltage (OCV) of 228 mV and a power generation density of 1.32 µW/cm2 with a 30 mM glucose solution, is reported in this paper. Compared with conventional wet etching, dry etching (reactive ion etching) for patterning minimizes damage to the anode and cathode, resulting in a cell with a small size and a high OCV, sufficient for CMOS circuit operation.

  17. Transient voltage sharing in series-coupled high voltage switches

    Directory of Open Access Journals (Sweden)

    Editorial Office

    1992-07-01

    Full Text Available For switching voltages in excess of the maximum blocking voltage of a switching element (for example, thyristor, MOSFET or bipolar transistor such elements are often coupled in series - and additional circuitry has to be provided to ensure equal voltage sharing. Between each such series element and system ground there is a certain parasitic capacitance that may draw a significant current during high-speed voltage transients. The "open" switch is modelled as a ladder network. Analy­sis reveals an exponential progression in the distribution of the applied voltage across the elements. Overstressing thus oc­curs in some of the elements at levels of the total voltage that are significantly below the design value. This difficulty is overcome by grading the voltage sharing circuitry, coupled in parallel with each element, in a prescribed manner, as set out here.

  18. High voltage power network construction

    CERN Document Server

    Harker, Keith

    2018-01-01

    This book examines the key requirements, considerations, complexities and constraints relevant to the task of high voltage power network construction, from design, finance, contracts and project management to installation and commissioning, with the aim of providing an overview of the holistic end to end construction task in a single volume.

  19. High-Voltage Droplet Dispenser

    Science.gov (United States)

    Eichenberg, Dennis J.

    2003-01-01

    An apparatus that is extremely effective in dispensing a wide range of droplets has been developed. This droplet dispenser is unique in that it utilizes a droplet bias voltage, as well as an ionization pulse, to release a droplet. Apparatuses that deploy individual droplets have been used in many applications, including, notably, study of combustion of liquid fuels. Experiments on isolated droplets are useful in that they enable the study of droplet phenomena under well-controlled and simplified conditions. In this apparatus, a syringe dispenses a known value of liquid, which emerges from, and hangs onto, the outer end of a flat-tipped, stainless steel needle. Somewhat below the needle tip and droplet is a ring electrode. A bias high voltage, followed by a high-voltage pulse, is applied so as to attract the droplet sufficiently to pull it off the needle. The voltages are such that the droplet and needle are negatively charged and the ring electrode is positively charged.

  20. Submicron CMOS technologies for high energy physics and space applications

    CERN Document Server

    Anelli, G; Faccio, F; Heijne, Erik H M; Jarron, Pierre; Kloukinas, Kostas C; Marchioro, A; Moreira, P; Snoeys, W

    2001-01-01

    The radiation environment present in some of today's High-Energy Physics (HEP) experiments and in space has a detrimental influence on the integrated circuits working in these environments. Special technologies, called radiation hardened, have been used in the past to prevent the radiation-induced degradation. In the last decades, the market of these special technologies has undergone a considerable shrinkage, rendering them less reliably available and far more expensive than today's mainstream technologies. An alternative approach is to use a deep submicron CMOS technology. The most sensitive part to radiation effects in a MOS transistor is the gate oxide. One way to reduce the effects of ionizing radiation in the gate oxide is to reduce its thickness, which is a natural trend in modern technologies. Submicron CMOS technologies seem therefore a good candidate for implementing radiation-hardened integrated circuits using a commercial, inexpensive technology. Nevertheless, a certain number of radiation-induced...

  1. A High Performance CMOS Current Mirror Circuit with Neuron MOSFETs and a Transimpedance Amplifier

    Science.gov (United States)

    Shimizu, Akio; Ishikawa, Yohei; Fukai, Sumio; Aikawa, Masayoshi

    In this paper, we propose a high accuracy current mirror circuit suitable for a low-voltage operation. The proposed circuit has a novel negative feedback that is composed of neuron MOSFETs and a transimpedance amplifier. As a result, the proposed circuit achieves a high accuracy current mirror circuit. At the same time, the proposed circuit monitors an error current by a low voltage because the negative feedback operates in a current-mode. The performance of the proposed circuit is evaluated using HSPICE simulation with On-Semiconductor 1.48μm CMOS device parameters. Simulation results show that the output resistance of the proposed circuit is 5.79[GΩ] and minimum operating range is 0.3[V].

  2. A Monolithic CMOS Magnetic Hall Sensor with High Sensitivity and Linearity Characteristics

    Directory of Open Access Journals (Sweden)

    Haiyun Huang

    2015-10-01

    Full Text Available This paper presents a fully integrated linear Hall sensor by means of 0.8 μm high voltage complementary metal-oxide semiconductor (CMOS technology. This monolithic Hall sensor chip features a highly sensitive horizontal switched Hall plate and an efficient signal conditioner using dynamic offset cancellation technique. An improved cross-like Hall plate achieves high magnetic sensitivity and low offset. A new spinning current modulator stabilizes the quiescent output voltage and improves the reliability of the signal conditioner. The tested results show that at the 5 V supply voltage, the maximum Hall output voltage of the monolithic Hall sensor microsystem, is up to ±2.1 V and the linearity of Hall output voltage is higher than 99% in the magnetic flux density range from ±5 mT to ±175 mT. The output equivalent residual offset is 0.48 mT and the static power consumption is 20 mW.

  3. High-linearity CMOS RF front-end circuits

    CERN Document Server

    Ding, Yongwang

    2005-01-01

    This monograph presents techniques to improve the performance of linear integrated circuits (IC) in CMOS at high frequencies. Those circuits are primarily used in radio-frequency (RF) front-ends of wireless communication systems, such as low noise amplifiers (LNA) and mixers in a receiver and power amplifiers (PA) in a transmitter. A novel linearization technique is presented. With a small trade-off of gain and power consumption this technique can improve the linearity of the majority of circuits by tens of dB. Particularly, for modern CMOS processes, most of which has device matching better than 1%, the distortion can be compressed by up to 40 dB at the output. A prototype LNA has been fabricated in a 0.25um CMOS process, with a measured +18 dBm IIP3. This technique improves the dynamic range of a receiver RF front-end by 12 dB. A new class of power amplifier (parallel class A&B) is also presented to extend the linear operation range and save the DC power consumption. It has been shown by both simulation...

  4. TRANSISTOR HIGH VOLTAGE POWER SUPPLY

    Science.gov (United States)

    Driver, G.E.

    1958-07-15

    High voltage, direct current power supplies are described for use with battery powered nuclear detection equipment. The particular advantages of the power supply described, are increased efficiency and reduced size and welght brought about by the use of transistors in the circuit. An important feature resides tn the employment of a pair of transistors in an alternatefiring oscillator circuit having a coupling transformer and other circuit components which are used for interconnecting the various electrodes of the transistors.

  5. Advances in high voltage engineering

    CERN Document Server

    Haddad, A

    2005-01-01

    This book addresses the very latest research and development issues in high voltage technology and is intended as a reference source for researchers and students in the field, specifically covering developments throughout the past decade. This unique blend of expert authors and comprehensive subject coverage means that this book is ideally suited as a reference source for engineers and academics in the field for years to come.

  6. Temporary over voltages in the high voltage networks

    International Nuclear Information System (INIS)

    Vukelja, Petar; Naumov, Radomir; Mrvic, Jovan; Minovski, Risto

    2001-01-01

    The paper treats the temporary over voltages that may arise in the high voltage networks as a result of: ground faults, loss of load, loss of one or two phases and switching operation. Based on the analysis, the measures for their limitation are proposed. (Original)

  7. A Low-Power Voltage Limiter/Regulator IC in Standard Thick-Oxide 130 nm CMOS for Inductive Power Transfer Application

    Directory of Open Access Journals (Sweden)

    Stepan Lapshev

    2014-01-01

    Full Text Available This paper presents a novel CMOS low-power voltage limiter/regulator circuit with hysteresis for inductive power transfer in an implanted telemetry application. The circuit controls its rail voltage to the maximum value of 3 V DC employing 100 mV of comparator hysteresis. It occupies a silicon area of only 127 µm × 125 µm using the 130 nm IBM CMOS process. In addition, the circuit dissipated less than 1 mW and was designed using thick-oxide 3.6 V NMOS and PMOS devices available in the process library.

  8. Voltage generators of high voltage high power accelerators

    International Nuclear Information System (INIS)

    Svinin, M.P.

    1981-01-01

    High voltage electron accelerators are widely used in modern radiation installations for industrial purposes. In the near future further increasing of their power may be effected, which enables to raise the efficiency of the radiation processes known and to master new power-consuming production in industry. Improvement of HV generators by increasing their power and efficiency is one of many scientific and engineering aspects the successful solution of which provides further development of these accelerators and their technical parameters. The subject is discussed in detail. (author)

  9. A novel high reliability CMOS SRAM cell

    Energy Technology Data Exchange (ETDEWEB)

    Xie Chengmin; Wang Zhongfang; Wu Longsheng; Liu Youbao, E-mail: hglnew@sina.com [Computer Research and Design Department, Xi' an Microelectronic Technique Institutes, Xi' an 710054 (China)

    2011-07-15

    A novel 8T single-event-upset (SEU) hardened and high static noise margin (SNM) SRAM cell is proposed. By adding one transistor paralleled with each access transistor, the drive capability of pull-up PMOS is greater than that of the conventional cell and the read access transistors are weaker than that of the conventional cell. So the hold, read SNM and critical charge increase greatly. The simulation results show that the critical charge is almost three times larger than that of the conventional 6T cell by appropriately sizing the pull-up transistors. The hold and read SNM of the new cell increase by 72% and 141.7%, respectively, compared to the 6T design, but it has a 54% area overhead and read performance penalty. According to these features, this novel cell suits high reliability applications, such as aerospace and military. (semiconductor integrated circuits)

  10. Optimization of CMOS active pixels for high resolution digital radiography

    International Nuclear Information System (INIS)

    Kim, Young Soo

    2007-02-01

    characteristics. The size of these pixels is 100 μm x 100 μm. The test chip was fabricated using ETRI 0.8 μm (2P/2M) standard CMOS process. It was found that the epitaxial type pixels have similar noise level compared to nonepitaxial type, and the noise of diffusion type pixel is larger than for a well type pixel on the same substrate type at the output node. But, at the input node, the n diffusion /p epitaxial /p substrate type pixel has the maximum SNR compared to other types. Secondly, the size of the designed pixels is 20 μm for high resolution X-ray imaging. In these test structures, AMIS 0.5 μm (2P/3M) CMOS standard process are used for fabrication and different values for design parameters (including optimum design parameters extracted from the developed model) are considered. The results of the noise measurement are agreed with model calculation and the optimum values of in-pixel components can be extracted using developed noise model.

  11. Characteristics and Breakdown Behaviors of Polysilicon Resistors for High Voltage Applications

    Directory of Open Access Journals (Sweden)

    Xiao-Yu Tang

    2015-01-01

    Full Text Available With the rapid development of the power integrated circuit technology, polysilicon resistors have been widely used not only in traditional CMOS circuits, but also in the high voltage applications. However, there have been few detailed reports about the polysilicon resistors’ characteristics, like voltage and temperature coefficients and breakdown behaviors which are critical parameters of high voltage applications. In this study, we experimentally find that the resistance of the polysilicon resistor with a relatively low doping concentration shows negative voltage and temperature coefficients, while that of the polysilicon resistor with a high doping concentration has positive voltage and temperature coefficients. Moreover, from the experimental results of breakdown voltages of the polysilicon resistors, it could be deduced that the breakdown of polysilicon resistors is thermally rather than electrically induced. We also proposed to add an N-type well underneath the oxide to increase the breakdown voltage in the vertical direction when the substrate is P-type doped.

  12. Embedded 5V-to-3.3V Voltage Regulator for Supplying Digital ICs in 3.3V CMOS Technology

    NARCIS (Netherlands)

    den Besten, Gerrit W.; Nauta, Bram

    1998-01-01

    A fully integrated 5 V-to-3.3 V supply voltage regulator for application in digital IC's has been designed in a 3.3 V 0.5 μm CMOS process. The regulator is able to deliver peak current transients of 300 mA, while the output voltage remains within a margin of 10% around the nominal value. The circuit

  13. A fully integral, differential, high-speed, low-power consumption CMOS recovery clock circuit

    Directory of Open Access Journals (Sweden)

    Daniel Pacheco Bautista

    2007-09-01

    Full Text Available The clock recovery circuit (CRC plays a fundamental role in electronic information recovery systems (hard disks, DVD and CD read/writeable units and baseband digital communication systems in recovering the clock signal contained in the received data. This signal is necessary for synchronising subsequent information processing. Nowadays, this task is difficult to achieve because of the data’s random nature and its high transfer rate. This paper presents the design of a high-performance integral CMOS technology clock recovery circuit (CRC wor-king at 1.2 Gbps and only consuming 17.4 mW using a 3.3V power supply. The circuit was fully differentially designed to obtain high performance. Circuit architecture was based on a conventional phase lock loop (PLL, current mode logic (MCML and a novel two stage ring-based voltage controlled oscillator (VCO. The design used 0.35 μm CMOS AMS process parameters. Hspice simulation results proved the circuit’s high performance, achieving tracking in less than 300 ns.

  14. An integrated CMOS high data rate transceiver for video applications

    Science.gov (United States)

    Yaping, Liang; Dazhi, Che; Cheng, Liang; Lingling, Sun

    2012-07-01

    This paper presents a 5 GHz CMOS radio frequency (RF) transceiver built with 0.18 μm RF-CMOS technology by using a proprietary protocol, which combines the new IEEE 802.11n features such as multiple-in multiple-out (MIMO) technology with other wireless technologies to provide high data rate robust real-time high definition television (HDTV) distribution within a home environment. The RF frequencies cover from 4.9 to 5.9 GHz: the industrial, scientific and medical (ISM) band. Each RF channel bandwidth is 20 MHz. The transceiver utilizes a direct up transmitter and low-IF receiver architecture. A dual-quadrature direct up conversion mixer is used that achieves better than 35 dB image rejection without any on chip calibration. The measurement shows a 6 dB typical receiver noise figure and a better than 33 dB transmitter error vector magnitude (EVM) at -3 dBm output power.

  15. High voltage engineering. Fundamentals. 2. ed.

    Energy Technology Data Exchange (ETDEWEB)

    Kuffel, E. (ed.) [University of Manitoba, Winnipeg (Canada); Zaengl, W.S. (ed.) [Swiss Federal Institute of Technology, Zuric (Switzerland). Electrical Engineering Dept.; Kuffel, J. (ed.) [Ontario Hydro Technologies, Toronto (Canada)

    2000-07-01

    The basics of high voltage laboratory techniques and phenomena, together with the principles governing the design of high voltage insulation, are covered in this book for students studying high voltage engineering at both undergraduate and postgraduate level, utility engineers, designers and operators of high voltage equipment. In this new edition, the text has been entirely revised to reflect current practice. Major changes include coverage of the latest instrumentation, the use of electronegative gases such as sulphur hexafluoride, modern diagnostic techniques, and high voltage testing procedures with statistical approaches. (author)

  16. Dense Heterogeneous Integration for InP Bi-CMOS Technology

    Science.gov (United States)

    2009-05-01

    many mixed signal applications, having circuits composed of both Si CMOS, which possesses low power dissipation and high transistor count, and...compound semiconductor transistors with high-speed high-voltage swing performance would be advantageous. In general, heterogeneous integration (HI) of...Fastest CMOS and HBTs  / >109LowHighCoSMOS Lags latest CMOS᝺ 6ModModSiGe HBT No precision fast device, low drive >109LowModCMOS BJT only

  17. High resolution CMOS capacitance-frequency converter for biosensor applications

    Science.gov (United States)

    Ghoor, I. S.; Land, K.; Joubert, T.-H.

    2016-02-01

    This paper presents the design of a low-complexity, linear and sub-pF CMOS capacitance-frequency converter for reading out a capacitive bacterial bio/sensors with the endeavour of creating a universal bio/sensor readout module. Therefore the priority design objectives are a high resolution as well as an extensive dynamic range. The circuit is based on a method which outputs a digital frequency signal directly from a differential capacitance by the accumulation of charges produced by repetitive charge integration and charge preservation1. A prototype has been designed for manufacture in the 0.35 μm, 3.3V ams CMOS technology. At a 1MHz clock speed, the most pertinent results obtained for the designed converter are: (i) power consumption of 1.37mW; (ii) a resolution of at least 5 fF for sensitive capacitive transduction; and (iii) an input dynamic range of at least 43.5 dB from a measurable capacitance value range of 5 - 750 fF (iv) and a Pearson's coefficient of linearity of 0.99.

  18. High voltage load resistor array

    Science.gov (United States)

    Lehmann, Monty Ray [Smithfield, VA

    2005-01-18

    A high voltage resistor comprising an array of a plurality of parallel electrically connected resistor elements each containing a resistive solution, attached at each end thereof to an end plate, and about the circumference of each of the end plates, a corona reduction ring. Each of the resistor elements comprises an insulating tube having an electrode inserted into each end thereof and held in position by one or more hose clamps about the outer periphery of the insulating tube. According to a preferred embodiment, the electrode is fabricated from stainless steel and has a mushroom shape at one end, that inserted into the tube, and a flat end for engagement with the end plates that provides connection of the resistor array and with a load.

  19. CMOS continuous-time adaptive equalizers for high-speed serial links

    CERN Document Server

    Gimeno Gasca, Cecilia; Aldea Chagoyen, Concepción

    2015-01-01

    This book introduces readers to the design of adaptive equalization solutions integrated in standard CMOS technology for high-speed serial links. Since continuous-time equalizers offer various advantages as an alternative to discrete-time equalizers at multi-gigabit rates, this book provides a detailed description of continuous-time adaptive equalizers design - both at transistor and system levels-, their main characteristics and performances. The authors begin with a complete review and analysis of the state of the art of equalizers for wireline applications, describing why they are necessary, their types, and their main applications. Next, theoretical fundamentals of continuous-time adaptive equalizers are explored. Then, new structures are proposed to implement the different building blocks of the adaptive equalizer: line equalizer, loop-filters, power comparator, etc.  The authors demonstrate the design of a complete low-power, low-voltage, high-speed, continuous-time adaptive equalizer. Finally, a cost-...

  20. A CMOS transconductance-C filter technique for very high frequencies

    NARCIS (Netherlands)

    Nauta, Bram

    1992-01-01

    CMOS circuits for integrated analog filters at very high frequencies, based on transconductance-C integrators, are presented. First a differential transconductance element based on CMOS inverters is described. With this circuit a linear, tunable integrator for very-high-frequency integrated filters

  1. Avalanche-mode silicon LEDs for monolithic optical coupling in CMOS technology

    NARCIS (Netherlands)

    Dutta, Satadal

    2017-01-01

    Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuit (IC) technology is the most commercially successful platform in modern electronic and control systems. So called "smart power" technologies such as Bipolar CMOS DMOS (BCD), combine the computational power of CMOS with high voltage

  2. A high-frequency transimpedance amplifier for CMOS integrated 2D CMUT array towards 3D ultrasound imaging.

    Science.gov (United States)

    Huang, Xiwei; Cheong, Jia Hao; Cha, Hyouk-Kyu; Yu, Hongbin; Je, Minkyu; Yu, Hao

    2013-01-01

    One transimpedance amplifier based CMOS analog front-end (AFE) receiver is integrated with capacitive micromachined ultrasound transducers (CMUTs) towards high frequency 3D ultrasound imaging. Considering device specifications from CMUTs, the TIA is designed to amplify received signals from 17.5MHz to 52.5MHz with center frequency at 35MHz; and is fabricated in Global Foundry 0.18-µm 30-V high-voltage (HV) Bipolar/CMOS/DMOS (BCD) process. The measurement results show that the TIA with power-supply 6V can reach transimpedance gain of 61dBΩ and operating frequency from 17.5MHz to 100MHz. The measured input referred noise is 27.5pA/√Hz. Acoustic pulse-echo testing is conducted to demonstrate the receiving functionality of the designed 3D ultrasound imaging system.

  3. A high efficiency PWM CMOS class-D audio power amplifier

    Science.gov (United States)

    Zhangming, Zhu; Lianxi, Liu; Yintang, Yang; Han, Lei

    2009-02-01

    Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 μm CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 μA. The active area of the class-D audio power amplifier is about 1.47 × 1.52 mm2. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.

  4. A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver

    Science.gov (United States)

    Jian, Xu; Zheng, Zhou; Yiqiang, Wu; Zhigong, Wang; Jianping, Chen

    2015-05-01

    A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB receiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifier stage. The input transconductance stage employs a self-biasing current reusing technique, with a resistor shunt feedback to increase the gain and output impedance. A dynamic bias technique is used in the switching stage to ensure the stability of the overdrive voltage versus the PVT variations. A current shunt feedback is introduced to the conventional low-voltage second-generation fully balanced multi-output current converter (FBMOCCII), which provides very low input impedance and high output impedance. With the circuit working in current mode, the linearity is effectively improved with low supply voltages. Especially, the transimpedance stage can be removed, which simplifies the design considerably. The design is verified with a SMIC 0.18 μm RF CMOS process. The measurement results show that the voltage conversation gain is 1.407 dB, the NF is 16.22 dB, and the IIP3 is 4.5 dBm, respectively. The current consumption is 9.30 mA with a supply voltage of 1.8 V. This exhibits a good compromise among the gain, noise, and linearity for the second IF mixer in DRM/DAB receivers. Project supported by the National Natural Science Foundation of China (No. 61306069), and the National High Technology Research and Development Program of China (No. 2011AA010301).

  5. Development of CMOS pixel sensors for tracking and vertexing in high energy physics experiments

    CERN Document Server

    Senyukov, Serhiy; Besson, Auguste; Claus, Giles; Cousin, Loic; Dulinski, Wojciech; Goffe, Mathieu; Hippolyte, Boris; Maria, Robert; Molnar, Levente; Sanchez Castro, Xitzel; Winter, Marc

    2014-01-01

    CMOS pixel sensors (CPS) represent a novel technological approach to building charged particle detectors. CMOS processes allow to integrate a sensing volume and readout electronics in a single silicon die allowing to build sensors with a small pixel pitch ($\\sim 20 \\mu m$) and low material budget ($\\sim 0.2-0.3\\% X_0$) per layer. These characteristics make CPS an attractive option for vertexing and tracking systems of high energy physics experiments. Moreover, thanks to the mass production industrial CMOS processes used for the manufacturing of CPS the fabrication construction cost can be significantly reduced in comparison to more standard semiconductor technologies. However, the attainable performance level of the CPS in terms of radiation hardness and readout speed is mostly determined by the fabrication parameters of the CMOS processes available on the market rather than by the CPS intrinsic potential. The permanent evolution of commercial CMOS processes towards smaller feature sizes and high resistivity ...

  6. Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel

    Directory of Open Access Journals (Sweden)

    Orly Yadid-Pecht

    2012-07-01

    Full Text Available Modern “smart” CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage “smart” image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR and Dynamic Range (DR as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

  7. Low-voltage 96 dB snapshot CMOS image sensor with 4.5 nW power dissipation per pixel.

    Science.gov (United States)

    Spivak, Arthur; Teman, Adam; Belenky, Alexander; Yadid-Pecht, Orly; Fish, Alexander

    2012-01-01

    Modern "smart" CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR) ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage "smart" image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR) and Dynamic Range (DR) as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel.

  8. An Integrated Chip High-Voltage Power Receiver for Wireless Biomedical Implants

    Directory of Open Access Journals (Sweden)

    Vijith Vijayakumaran Nair

    2015-06-01

    Full Text Available In near-field wireless-powered biomedical implants, the receiver voltage largely overrides the compliance of low-voltage power receiver systems. To limit the induced voltage, generally, low-voltage topologies utilize limiter circuits, voltage clippers or shunt regulators, which are power-inefficient methods. In order to overcome the voltage limitation and improve power efficiency, we propose an integrated chip high-voltage power receiver based on the step down approach. The topology accommodates voltages as high as 30 V and comprises a high-voltage semi-active rectifier, a voltage reference generator and a series regulator. Further, a battery management circuit that enables safe and reliable implant battery charging based on analog control is proposed and realized. The power receiver is fabricated in 0.35-μm high-voltage Bipolar-CMOS-DMOStechnology based on the LOCOS0.35-μm CMOS process. Measurement results indicate 83.5% power conversion efficiency for a rectifier at 2.1 mA load current. The low drop-out regulator based on the current buffer compensation and buffer impedance attenuation scheme operates with low quiescent current, reduces the power consumption and provides good stability. The topology also provides good power supply rejection, which is adequate for the design application. Measurement results indicate regulator output of 4 ± 0.03 V for input from 5 to 30 V and 10 ± 0.05 V output for input from 11 to 30 V with load current 0.01–100 mA. The charger circuit manages the charging of the Li-ion battery through all if the typical stages of the Li-ion battery charging profile.

  9. High-voltage engineering and testing

    CERN Document Server

    Ryan, Hugh M

    2013-01-01

    This 3rd edition of High Voltage Engineering Testing describes strategic developments in the field and reflects on how they can best be managed. All the key components of high voltage and distribution systems are covered including electric power networks, UHV and HV. Distribution systems including HVDC and power electronic systems are also considered.

  10. A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors

    Directory of Open Access Journals (Sweden)

    Zhiyuan Gao

    2015-11-01

    Full Text Available This paper presents a dynamic range (DR enhanced readout technique with a two-step time-to-digital converter (TDC for high speed linear CMOS image sensors. A multi-capacitor and self-regulated capacitive trans-impedance amplifier (CTIA structure is employed to extend the dynamic range. The gain of the CTIA is auto adjusted by switching different capacitors to the integration node asynchronously according to the output voltage. A column-parallel ADC based on a two-step TDC is utilized to improve the conversion rate. The conversion is divided into coarse phase and fine phase. An error calibration scheme is also proposed to correct quantization errors caused by propagation delay skew within −Tclk~+Tclk. A linear CMOS image sensor pixel array is designed in the 0.13 μm CMOS process to verify this DR-enhanced high speed readout technique. The post simulation results indicate that the dynamic range of readout circuit is 99.02 dB and the ADC achieves 60.22 dB SNDR and 9.71 bit ENOB at a conversion rate of 2 MS/s after calibration, with 14.04 dB and 2.4 bit improvement, compared with SNDR and ENOB of that without calibration.

  11. High voltage electricity installations a planning perspective

    CERN Document Server

    Jay, Stephen Andrew

    2006-01-01

    The presence of high voltage power lines has provoked widespread concern for many years. High Voltage Electricity Installations presents an in-depth study of policy surrounding the planning of high voltage installations, discussing the manner in which they are percieved by the public, and the associated environmental issues. An analysis of these concerns, along with the geographical, environmental and political influences that shape their expression, is presented. Investigates local planning policy in an area of the energy sector that is of highly topical environmental and public concern Cover

  12. High-End CMOS Active Pixel Sensors For Space-Borne Imaging Instruments

    National Research Council Canada - National Science Library

    Bogaerts, Jan; Lepage, Gerald; Dantes, Didier

    2005-01-01

    ...) offer great promise for use in space-borne imaging instruments. This paper highlights present-day high-end CMOS APS sensors and sketches their advantages with respect to their CCD counterparts...

  13. CMOS-MEMS Microgravity Accelerometer with High-Precision DC Response Project

    Data.gov (United States)

    National Aeronautics and Space Administration — In this Phase II SBIR project a high-sensitivity low-noise all-silicon CMOS-MEMS accelerometer for quasi-steady measurements of accelerations at sub 1 micro-g levels...

  14. CMOS-MEMS Microgravity Accelerometer with High-Precision DC Response Project

    Data.gov (United States)

    National Aeronautics and Space Administration — This Phase I SBIR effort initiates development of a high-sensitivity low-noise all-silicon CMOS-MEMS accelerometer for quasi-steady measurements of accelerations at...

  15. Frontend Receiver Electronics for High Frequency Monolithic CMUT-on-CMOS Imaging Arrays

    OpenAIRE

    Gurun, Gokce; Hasler, Paul; Degertekin, F. Levent

    2011-01-01

    This paper describes the design of CMOS receiver electronics for monolithic integration with capacitive micromachined ultrasonic transducer (CMUT) arrays for high-frequency intravascular ultrasound imaging. A custom 8-inch wafer is fabricated in a 0.35 μm two-poly, four-metal CMOS process and then CMUT arrays are built on top of the application specific integrated circuits (ASICs) on the wafer. We discuss advantages of the single-chip CMUT-on-CMOS approach in terms of receive sensitivity and ...

  16. CMOS pixel sensor development for the ATLAS experiment at the High Luminosity-LHC

    Science.gov (United States)

    Rimoldi, M.

    2017-12-01

    The current ATLAS Inner Detector will be replaced with a fully silicon based detector called Inner Tracker (ITk) before the start of the High Luminosity-LHC project (HL-LHC) in 2026. To cope with the harsh environment expected at the HL-LHC, new approaches are being developed for pixel detectors based on CMOS technology. Such detectors can provide charge collection, analog amplification and digital processing in the same silicon wafer. The radiation hardness is improved thanks to multiple nested wells which give the embedded CMOS electronics sufficient shielding. The goal of this programme is to demonstrate that depleted CMOS pixels are suitable for high rate, fast timing and high radiation operation at the LHC . A number of alternative solutions have been explored and characterised. In this document, test results of the sensors fabricated in different CMOS processes are reported.

  17. A 190 mV start-up and 59.2% efficiency CMOS gate boosting voltage doubler charge pump in 0.18 µm standard CMOS process for energy harvesting

    Science.gov (United States)

    Yoshida, Minori; Miyaji, Kousuke

    2018-04-01

    A start-up charge pump circuit for an extremely low input voltage (V IN) is proposed and demonstrated. The proposed circuit uses an inverter level shifter to generate a 2V IN voltage swing to the gate of both main NMOS and PMOS power transistors in a charge pump to reduce the channel resistance. The proposed circuit is fully implemented in a standard 0.18 µm CMOS process, and the measurement result shows that a minimum input voltage of 190 mV is achieved and output power increases by 181% compared with the conventional forward-body-bias scheme at a 300 mV input voltage. The proposed scheme achieves a maximum efficiency of 59.2% when the input voltage is 390 mV and the output current is 320 nA. The proposed circuit is suitable as a start-up circuit in ultralow power energy harvesting power management applications to boost-up from below threshold voltage.

  18. CMOS mixed-signal MODEM for data transmission and control of electrical household appliances using the low-voltage power line

    Science.gov (United States)

    Escalera, Sara; Dominguez-Matas, Carlos M.; Garcia-Gonzalez, Jose M.; Guerra, Oscar; Rodriguez-Vazquez, Angel

    2003-04-01

    This paper presents a CMOS mixed-signal MODEM ASIC for data transmission on the low-voltage power line. The circuit includes all the analog circuitry needed for input interfacing and modulation/demodulation (PLL-based frequency synthesis, slave filter banks with PLL master VCO for tuning, and decision circuitry) plus the logic circuitry needed for control purposes. To allow the communication between the electrical household appliances and a remote unit to control them as well as to reduce the cost, an unique mixed-signal ASIC, made of two parts, one operating at high frequencies and another operating at lower frequencies, has been designed. The High Frequencies Module must allow the connection with the external control systems and, to ensure reasonable robustness, has to be able to send and receive signals using at least two different channels (to avoid local and temporary degradations of the communication). The Low Frequencies Module is needed to manage the indoors communication. This module enables the transmission of signals within distances between 50 and 100 meters with a speed in the order of, but never less than, 100 bits/s. This link should be accomplished by using a frequency range in such a way that a maximum number of channels are disposable to allow the control of as many different in-house devices as possible. Again, to this end, two different tunable channels have to be simultaneously available: one to control the quality of the signal and the other to allow the effective communication.

  19. High voltage and electrical insulation engineering

    CERN Document Server

    Arora, Ravindra

    2011-01-01

    "The book is written for students as well as for teachers and researchers in the field of High Voltage and Insulation Engineering. It is based on the advance level courses conducted at TU Dresden, Germany and Indian Institute of Technology Kanpur, India. The book has a novel approach describing the fundamental concept of field dependent behavior of dielectrics subjected to high voltage. There is no other book in the field of high voltage engineering following this new approach in describing the behavior of dielectrics. The contents begin with the description of fundamental terminology in the subject of high voltage engineering. It is followed by the classification of electric fields and the techniques of field estimation. Performance of gaseous, liquid and solid dielectrics under different field conditions is described in the subsequent chapters. Separate chapters on vacuum as insulation and the lightning phenomenon are included"--

  20. High-voltage-compatible, fully depleted CCDs

    Energy Technology Data Exchange (ETDEWEB)

    Holland, Stephen E.; Bebek, Chris J.; Dawson, Kyle S.; Emes, JohnE.; Fabricius, Max H.; Fairfield, Jessaym A.; Groom, Don E.; Karcher, A.; Kolbe, William F.; Palaio, Nick P.; Roe, Natalie A.; Wang, Guobin

    2006-05-15

    We describe charge-coupled device (CCD) developmentactivities at the Lawrence Berkeley National Laboratory (LBNL).Back-illuminated CCDs fabricated on 200-300 mu m thick, fully depleted,high-resistivity silicon substrates are produced in partnership with acommercial CCD foundry.The CCDs are fully depleted by the application ofa substrate bias voltage. Spatial resolution considerations requireoperation of thick, fully depleted CCDs at high substrate bias voltages.We have developed CCDs that are compatible with substrate bias voltagesof at least 200V. This improves spatial resolution for a given thickness,and allows for full depletion of thicker CCDs than previously considered.We have demonstrated full depletion of 650-675 mu m thick CCDs, withpotential applications in direct x-ray detection. In this work we discussthe issues related to high-voltage operation of fully depleted CCDs, aswell as experimental results on high-voltage-compatible CCDs.

  1. Detecting Faults In High-Voltage Transformers

    Science.gov (United States)

    Blow, Raymond K.

    1988-01-01

    Simple fixture quickly shows whether high-voltage transformer has excessive voids in dielectric materials and whether high-voltage lead wires too close to transformer case. Fixture is "go/no-go" indicator; corona appears if transformer contains such faults. Nests in wire mesh supported by cap of clear epoxy. If transformer has defects, blue glow of corona appears in mesh and is seen through cap.

  2. Boeing's High Voltage Solar Tile Test Results

    Science.gov (United States)

    Reed, Brian J.; Harden, David E.; Ferguson, Dale C.; Snyder, David B.

    2002-01-01

    Real concerns of spacecraft charging and experience with solar array augmented electrostatic discharge arcs on spacecraft have minimized the use of high voltages on large solar arrays despite numerous vehicle system mass and efficiency advantages. Boeing's solar tile (patent pending) allows high voltage to be generated at the array without the mass and efficiency losses of electronic conversion. Direct drive electric propulsion and higher power payloads (lower spacecraft weight) will benefit from this design. As future power demand grows, spacecraft designers must use higher voltage to minimize transmission loss and power cable mass for very large area arrays. This paper will describe the design and discuss the successful test of Boeing's 500-Volt Solar Tile in NASA Glenn's Tenney chamber in the Space Plasma Interaction Facility. The work was sponsored by NASA's Space Solar Power Exploratory Research and Technology (SERT) Program and will result in updated high voltage solar array design guidelines being published.

  3. Nested high voltage generator/particle accelerator

    International Nuclear Information System (INIS)

    Adler, R.J.

    1992-01-01

    This patent describes a modular high voltage particle accelerator having an emission axis and an emission end, the accelerator. It comprises: a plurality of high voltage generators in nested adjacency to form a nested stack, each the generator comprising a cup-like housing having a base and a tubular sleeve extending from the base, a primary transformer winding encircling the nested stack; a secondary transformer winding between each adjacent pair of housings, magnetically linked to the primary transformer winding through the gaps; a power supply respective to each of the secondary windings converting alternating voltage from its respective secondary winding to d.c. voltage, the housings at the emission end forming a hollow throat for particle acceleration, a vacuum seal at the emission end of the throat which enables the throat to be evacuated; a particle source in the thrond power means to energize the primary transformer winding

  4. Low Noise and Highly Linear Wideband CMOS RF Front-End for DVB-H Direct-Conversion Receiver

    Science.gov (United States)

    Nam, Ilku; Moon, Hyunwon; Woo, Doo Hyung

    In this paper, a wideband CMOS radio frequency (RF) front-end for digital video broadcasting-handheld (DVB-H) receiver is proposed. The RF front-end circuit is composed of a single-ended resistive feedback low noise amplifier (LNA), a single-to-differential amplifier, an I/Q down-conversion mixer with linearized transconductors employing third order intermodulation distortion cancellation, and a divide-by-two circuit with LO buffers. By employing a third order intermodulation (IMD3) cancellation technique and vertical NPN bipolar junction transistor (BJT) switching pair for an I/Q down-conversion mixer, the proposed RF front-end circuit has high linearity and low low-frequency noise performance. It is fabricated in a 0.18µm deep n-well CMOS technology and draws 12mA from a 1.8V supply voltage. It shows a voltage gain of 31dB, a noise figure (NF) lower than 2.6dB, and an IIP3 of -8dBm from 470MHz to 862MHz.

  5. Recent advance in high manufacturing readiness level and high temperature CMOS mixed-signal integrated circuits on silicon carbide

    Science.gov (United States)

    Weng, M. H.; Clark, D. T.; Wright, S. N.; Gordon, D. L.; Duncan, M. A.; Kirkham, S. J.; Idris, M. I.; Chan, H. K.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

    2017-05-01

    A high manufacturing readiness level silicon carbide (SiC) CMOS technology is presented. The unique process flow enables the monolithic integration of pMOS and nMOS transistors with passive circuit elements capable of operation at temperatures of 300 °C and beyond. Critical to this functionality is the behaviour of the gate dielectric and data for high temperature capacitance-voltage measurements are reported for SiO2/4H-SiC (n and p type) MOS structures. In addition, a summary of the long term reliability for a range of structures including contact chains to both n-type and p-type SiC, as well as simple logic circuits is presented, showing function after 2000 h at 300 °C. Circuit data is also presented for the performance of digital logic devices, a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. A high temperature micro-oven system has been utilised to enable the high temperature testing and stressing of units assembled in ceramic dual in line packages, including a high temperature small form-factor SiC based bridge leg power module prototype, operated for over 1000 h at 300 °C. The data presented show that SiC CMOS is a key enabling technology in high temperature integrated circuit design. In particular it provides the ability to realise sensor interface circuits capable of operating above 300 °C, accommodate shifts in key parameters enabling deployment in applications including automotive, aerospace and deep well drilling.

  6. Low-voltage current-mode CMOS building blocks for field programmable analog arrays and application

    International Nuclear Information System (INIS)

    Madian, A.H.K.

    2007-01-01

    The role of analog integrated circuits in modem electronic systems remains important, even though digital circuits dominate the market for VLSI solutions. Analog systems have always played an essential role in interfacing digital electronics to the real world in applications such as analog signal processing and signal conditioning .Industrial process and motion control and biomedical measurements . In addition, analog solutions are becoming increasingly competitive with digital circuits for dense, low-power, high-speed applications in low-precision signal-processing. Because of the wide variety of analog functions required in electronic systems and the complexity of the signals (frequency, time, signal levels, parasitic), analog system design is very specialized and supported by a diverse set of CAD tools that are more difficult to integrate than those required for digital design. The drive towards shorter design cycles for analog integrated circuits has demanded the development of high performance analog circuits that are re configurable and suitable for CAD methodologies. the researcher here try to contribute in this filed

  7. Design of optoelectronic imaging system with high resolution and large field-of-view based on dual CMOS

    Science.gov (United States)

    Cheng, Hanglin; Hao, Qun; Hu, Yao; Cao, Jie; Wang, Shaopu; Li, Lin

    2016-10-01

    With the advantages of high resolution, large field of view and compacted size, optoelectronic imaging sensors are widely used in many fields, such as robot's navigation, industrial measurement and remote sensing. Many researchers pay more attention to improve the comprehensive performances of imaging sensors, including large field of view (FOV), high resolution, compact size and high imaging efficiency, etc. One challenge is the tradeoff between high resolution and large field of view simultaneously considering compacted size. In this paper, we propose an optoelectronic imaging system combining the lenses of short focal length and long focal length based on dual CMOS to simulate the characters of human eyes which observe object within large FOV in high resolution. We design and optimize the two lens, the lens of short focal length is used to search object in a wide field and the long one is responsible for high resolution imaging of the target area. Based on a micro-CMOS imaging sensor with low voltage differential transmission technology-MIPI (Mobile Industry Processor Interface), we design the corresponding circuits to realize collecting optical information with high speed. The advantage of the interface is to help decreasing power consumption, improving transmission efficiency and achieving compacted size of imaging sensor. Meanwhile, we carried out simulations and experiments to testify the optoelectronic imaging system. The results show that the proposed method is helpful to improve the comprehensive performances of optoelectronic imaging sensors.

  8. Modeling of long High Voltage AC Underground

    DEFF Research Database (Denmark)

    Gudmundsdottir, Unnur Stella; Bak, Claus Leth; Wiechowski, W. T.

    2010-01-01

    This paper presents the work and findings of a PhD project focused on accurate high frequency modelling of long High Voltage AC Underground cables. The project is cooperation between Aalborg University and Energinet.dk. The objective of the project is to investigate the accuracy of most up to dat...

  9. High-voltage test and measuring techniques

    CERN Document Server

    Hauschild, Wolfgang

    2014-01-01

    It is the intent of this book to combine high-voltage (HV) engineering with HV testing technique and HV measuring technique. Based on long-term experience gained by the authors as lecturer and researcher as well as member in international organizations, such as IEC and CIGRE, the book will reflect the state of the art as well as the future trends in testing and diagnostics of HV equipment to ensure a reliable generation, transmission and distribution of electrical energy. The book is intended not only for experts but also for students in electrical engineering and high-voltage engineering.

  10. Flip-flop design in nanometer CMOS from high speed to low energy

    CERN Document Server

    Alioto, Massimo; Palumbo, Gaetano

    2015-01-01

    This book provides a unified treatment of Flip-Flop design and selection in nanometer CMOS VLSI systems. The design aspects related to the energy-delay tradeoff in Flip-Flops are discussed, including their energy-optimal selection according to the targeted application, and the detailed circuit design in nanometer CMOS VLSI systems. Design strategies are derived in a coherent framework that includes explicitly nanometer effects, including leakage, layout parasitics and process/voltage/temperature variations, as main advances over the existing body of work in the field. The related design tradeoffs are explored in a wide range of applications and the related energy-performance targets. A wide range of existing and recently proposed Flip-Flop topologies are discussed. Theoretical foundations are provided to set the stage for the derivation of design guidelines, and emphasis is given on practical aspects and consequences of the presented results. Analytical models and derivations are introduced when needed to gai...

  11. Reliability of high mobility SiGe channel MOSFETs for future CMOS applications

    CERN Document Server

    Franco, Jacopo; Groeseneken, Guido

    2014-01-01

    Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5Å, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability. This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated. The extensive experimental datasets collected on a variety of processed 300mm wafers and pr...

  12. CMOS pixel sensor development for the ATLAS experiment at the High Luminosity-LHC

    CERN Document Server

    Rimoldi, Marco; The ATLAS collaboration

    2017-01-01

    The current ATLAS Inner Detector will be replaced with a fully silicon based detector called Inner Tracker (ITk) before the start of the High Luminosity-LHC project (HL-LHC) in 2026. To cope with the harsh environment expected at the HL-LHC, new approaches are being developed for pixel detector based on CMOS pixel techology. Such detectors provide charge collection, analog and digital amplification in the same silicon bulk. The radiation hardness is obtained with multiple nested wells that have embedded the CMOS electronics with sufficient shielding. The goal of this programme is to demonstrate that depleted CMOS pixels are suitable for high rate, fast timing and high radiation operation at the LHC. A number of alternative solutions have been explored and characterised, and are presented in this document.

  13. Modular high voltage power supply for chemical analysis

    Science.gov (United States)

    Stamps, James F [Livermore, CA; Yee, Daniel D [Dublin, CA

    2008-07-15

    A high voltage power supply for use in a system such as a microfluidics system, uses a DC-DC converter in parallel with a voltage-controlled resistor. A feedback circuit provides a control signal for the DC-DC converter and voltage-controlled resistor so as to regulate the output voltage of the high voltage power supply, as well as, to sink or source current from the high voltage supply.

  14. An ultra-low noise capacitance to voltage converter for sensor applications in 0.35  µm CMOS

    Directory of Open Access Journals (Sweden)

    A. Utz

    2017-08-01

    Full Text Available In this paper we present a readout circuit for capacitive micro-electro-mechanical system (MEMS sensors such as accelerometers, gyroscopes or pressure sensors. A flexible interface allows connection of a wide range of types of sensing elements. The ASIC (application-specific integrated circuit was designed with a focus on ultra-low noise operation and high analog measurement performance. Theoretical considerations on system noise are presented which lead to design requirements affecting the reachable overall measurement performance. Special emphasis is put on the design of the fully differential operational amplifiers, as these have the dominant influence on the achievable overall performance. The measured input referred noise is below 50 zF/Hz within a bandwidth of 10 Hz to 10 kHz. Four adjustable gain settings allow the adaption to measurement ranges from ±750 fF to ±3 pF. This ensures compatibility with a wide range of sensor applications. The full input signal bandwidth ranges from 0 Hz to more than 50 kHz. A high-precision accelerometer system was built from the described ASIC and a high-sensitivity, low-noise sensor MEMS. The design of the MEMS is outlined and the overall system performance, which yields a combined noise floor of 200 ng/Hz, is demonstrated. Finally, we show an application using the ASIC together with a CMOS integrated capacitive pressure sensor, which yields a measurement signal-to-noise ratio (SNR of more than 100 dB.

  15. CMOS sensors in 90 nm fabricated on high resistivity wafers: Design concept and irradiation results

    International Nuclear Information System (INIS)

    Rivetti, A.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Costa, M.; Demaria, N.; Giubilato, P.; Ikemoto, Y.; Kloukinas, K.; Mansuy, C.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rousset, J.; Silvestrin, L.; Wyss, J.

    2013-01-01

    The LePix project aims at improving the radiation hardness and the readout speed of monolithic CMOS sensors through the use of standard CMOS technologies fabricated on high resistivity substrates. In this context, high resistivity means beyond 400Ωcm, which is at least one order of magnitude greater than the typical value (1–10Ωcm) adopted for integrated circuit production. The possibility of employing these lightly doped substrates was offered by one foundry for an otherwise standard 90 nm CMOS process. In the paper, the case for such a development is first discussed. The sensor design is then described, along with the key challenges encountered in fabricating the detecting element in a very deep submicron process. Finally, irradiation results obtained on test matrices are reported

  16. Design and analysis of a highly-integrated CMOS power amplifier for RFID readers

    International Nuclear Information System (INIS)

    Gao Tongqiang; Zhang Chun; Chi Baoyong; Wang Zhihua

    2009-01-01

    To implement a fully-integrated on-chip CMOS power amplifier (PA) for RFID readers, the resonant frequency of each matching network is derived in detail. The highlight of the design is the adoption of a bonding wire as the output-stage inductor. Compared with the on-chip inductors in a CMOS process, the merit of the bondwire inductor is its high quality factor, leading to a higher output power and efficiency. The disadvantage of the bondwire inductor is that it is hard to control. A highly integrated class-E PA is implemented with 0.18-μm CMOS process. It can provide a maximum output power of 20 dBm and a 1 dB output power of 14.5 dBm. The maximum power-added efficiency (PAE) is 32.1%. Also, the spectral performance of the PA is analyzed for the specified RFID protocol.

  17. An Inexpensive Source of High Voltage

    Science.gov (United States)

    Saraiva, Carlos

    2012-01-01

    As a physics teacher I like recycling old apparatus and using them for demonstrations in my classes. In physics laboratories in schools, sources of high voltage include induction coils or electronic systems that can be bought from companies that sell lab equipment. But these sources can be very expensive. In this article, I will explain how you…

  18. Plasma response to transient high voltage pulses

    Indian Academy of Sciences (India)

    journal of. July 2013 physics pp. 35–66. Plasma response to transient high voltage pulses. S KAR. ∗ and S MUKHERJEE. Institute for Plasma Research, Bhat, Gandhinagar ... Child law current (implantation current) density across the sheath is ... Let ni = ns = constant within the sheath of thickness s0 and choose x = 0 at the.

  19. CMOS analog integrated circuits high-speed and power-efficient design

    CERN Document Server

    Ndjountche, Tertulien

    2011-01-01

    High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important tren

  20. Voltage measuring device of a high voltage metalclad installation

    Energy Technology Data Exchange (ETDEWEB)

    Henry, J.; Girard, R.; Kieffer, J.

    1989-06-27

    The low voltage capacitor of a capacitive divider of a metalclad substation is located in a sealed compartment separated from the substation enclosure. In normal operation, the compartment is in direct communication with the enclosure via a communication orifice. The compartment can be isolated from the enclosure by closing the communication orifice valve to drain this compartment and have access to the low voltage capacitor or to the other components of the capacitive divider housed in this compartment. Any pressure or temperature difference between the compartment and the enclosure, liable to affect the measurement, is thus avoided, while authorizing access to the low voltage capacitor without having to drain the whole of the installation.

  1. Reliability of supply of switchgear for auxiliary low voltage in substations extra high voltage to high voltage

    Directory of Open Access Journals (Sweden)

    Perić Dragoslav M.

    2015-01-01

    Full Text Available Switchgear for auxiliary low voltage in substations (SS of extra high voltages (EHV to high voltage (HV - SS EHV/HV kV/kV is of special interest for the functioning of these important SS, as it provides a supply for system of protection and other vital functions of SS. The article addresses several characteristic examples involving MV lines with varying degrees of independence of their supply, and the possible application of direct transformation EHV/LV through special voltage transformers. Auxiliary sources such as inverters and diesel generators, which have limited power and expensive energy, are also used for the supply of switchgear for auxiliary low voltage. Corresponding reliability indices are calculated for all examples including mean expected annual engagement of diesel generators. The applicability of certain solutions of switchgear for auxiliary low voltage SS EHV/HV, taking into account their reliability, feasibility and cost-effectiveness is analyzed too. In particular, the analysis of applications of direct transformation EHV/LV for supply of switchgear for auxiliary low voltage, for both new and existing SS EHV/HV.

  2. 30 CFR 75.813 - High-voltage longwalls; scope.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage longwalls; scope. 75.813 Section... AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Underground High-Voltage Distribution High-Voltage Longwalls § 75.813 High-voltage longwalls; scope. Sections 75.814 through 75.822 of this...

  3. AlphaRad, a new integrated CMOS System-on-Chip for high efficiency alpha particles counting

    Energy Technology Data Exchange (ETDEWEB)

    Husson, D. [Universite Louis Pasteur and IPHC (UMR7178), 23 Rue du Loess, BP 28, F-67037, Strasbourg, Cedex 2 (France)]. E-mail: husson@lepsi.in2p3.fr; Bozier, A. [InESS (UMR7163), F-67037 Strasbourg, Cedex 2 (France); Higueret, S. [IPHC - UMR7178, 23 Rue du Loess, BP 28, F-67037 Strasbourg, Cedex 2 (France); Le, T.D. [IPHC - UMR7178, 23 Rue du Loess, BP 28, F-67037 Strasbourg, Cedex 2 (France); Nourreddine, A. [Universite Louis Pasteur and IPHC (UMR7178), 23 Rue du Loess, BP 28, F-67037, Strasbourg, Cedex 2 (France)

    2006-12-21

    An integrated System-on-Chip (SoC) has been designed in 0.6{mu}m CMOS mixed analog/digital technology, and tested for high rate alpha particle counting. The sensor is the most innovative part of the chip, with a total active area of 2x2.5mmx5mm. The two-stage charge-to-voltage amplification scheme includes a numerical block for offset compensation. Designed with a gain of 700, the chip has been tested in alpha sources: a very high signal over noise ratio was obtained, leading to a detection efficiency of 5MeV alpha particles close to 100%. The chip is working at room temperature and has been tested up to 300kHz reset frequency. Future applications of this SoC will focus on detection of fast and thermal neutrons free of gamma contamination.

  4. High voltage pulse generator. [Patent application

    Science.gov (United States)

    Fasching, G.E.

    1975-06-12

    An improved high-voltage pulse generator is described which is especially useful in ultrasonic testing of rock core samples. An N number of capacitors are charged in parallel to V volts and at the proper instance are coupled in series to produce a high-voltage pulse of N times V volts. Rapid switching of the capacitors from the paralleled charging configuration to the series discharging configuration is accomplished by using silicon-controlled rectifiers which are chain self-triggered following the initial triggering of the first rectifier connected between the first and second capacitors. A timing and triggering circuit is provided to properly synchronize triggering pulses to the first SCR at a time when the charging voltage is not being applied to the parallel-connected charging capacitors. The output voltage can be readily increased by adding additional charging networks. The circuit allows the peak level of the output to be easily varied over a wide range by using a variable autotransformer in the charging circuit.

  5. CMOS capacitive biosensors for highly sensitive biosensing applications.

    Science.gov (United States)

    Chang, An-Yu; Lu, Michael S-C

    2013-01-01

    Magnetic microbeads are widely used in biotechnology and biomedical research for manipulation and detection of cells and biomolecules. Most lab-on-chip systems capable of performing manipulation and detection require external instruments to perform one of the functions, leading to increased size and cost. This work aims at developing an integrated platform to perform these two functions by implementing electromagnetic microcoils and capacitive biosensors on a CMOS (complementary metal oxide semiconductor) chip. Compared to most magnetic-type sensors, our detection method requires no externally applied magnetic fields and the associated fabrication is less complicated. In our experiment, microbeads coated with streptavidin were driven to the sensors located in the center of microcoils with functionalized anti-streptavidin antibody. Detection of a single microbead was successfully demonstrated using a capacitance-to-frequency readout. The average capacitance changes for the experimental and control groups were -5.3 fF and -0.2 fF, respectively.

  6. CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

    Science.gov (United States)

    Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

    2018-04-01

    Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

  7. Discussion - a high voltage DC generator

    International Nuclear Information System (INIS)

    Bhagwat, P.V.; Singh, Jagir; Hattangadi, V.A.

    1993-01-01

    One of the requirements for a high power ion source is a high voltage, high current DC generator. The high voltage, high current generator, DISCATRON, presently under development in our laboratory is a rotating disc type electrostatic generator similar in design to the one reported by A. Isoya et al. (1985). It is compact and rugged electrostatic DC generator based on the principle of induction charging by pellet chains used in the pelletron accelerator. It is, basically, a constant-current device with little stored energy, so that, in case of a breakdown, damage to the equipment connected to the output terminals is minimal. Since the present generator is only a proto-type, meant for a study of the practical difficulties that would be encountered in its manufacture, the output voltage and current specified has been kept quite modest viz., 300 kV at 500 μA, maximum. Some results of the preliminary tests carried out with this generator are described. (author). 4 figs

  8. High Efficiency Power Converter for Low Voltage High Power Applications

    DEFF Research Database (Denmark)

    Nymand, Morten

    The topic of this thesis is the design of high efficiency power electronic dc-to-dc converters for high-power, low-input-voltage to high-output-voltage applications. These converters are increasingly required for emerging sustainable energy systems such as fuel cell, battery or photo voltaic based......, and remote power generation for light towers, camper vans, boats, beacons, and buoys etc. A review of current state-of-the-art is presented. The best performing converters achieve moderately high peak efficiencies at high input voltage and medium power level. However, system dimensioning and cost are often...

  9. A Dual-Mode Large-Arrayed CMOS ISFET Sensor for Accurate and High-Throughput pH Sensing in Biomedical Diagnosis.

    Science.gov (United States)

    Huang, Xiwei; Yu, Hao; Liu, Xu; Jiang, Yu; Yan, Mei; Wu, Dongping

    2015-09-01

    The existing ISFET-based DNA sequencing detects hydrogen ions released during the polymerization of DNA strands on microbeads, which are scattered into microwell array above the ISFET sensor with unknown distribution. However, false pH detection happens at empty microwells due to crosstalk from neighboring microbeads. In this paper, a dual-mode CMOS ISFET sensor is proposed to have accurate pH detection toward DNA sequencing. Dual-mode sensing, optical and chemical modes, is realized by integrating a CMOS image sensor (CIS) with ISFET pH sensor, and is fabricated in a standard 0.18-μm CIS process. With accurate determination of microbead physical locations with CIS pixel by contact imaging, the dual-mode sensor can correlate local pH for one DNA slice at one location-determined microbead, which can result in improved pH detection accuracy. Moreover, toward a high-throughput DNA sequencing, a correlated-double-sampling readout that supports large array for both modes is deployed to reduce pixel-to-pixel nonuniformity such as threshold voltage mismatch. The proposed CMOS dual-mode sensor is experimentally examined to show a well correlated pH map and optical image for microbeads with a pH sensitivity of 26.2 mV/pH, a fixed pattern noise (FPN) reduction from 4% to 0.3%, and a readout speed of 1200 frames/s. A dual-mode CMOS ISFET sensor with suppressed FPN for accurate large-arrayed pH sensing is proposed and demonstrated with state-of-the-art measured results toward accurate and high-throughput DNA sequencing. The developed dual-mode CMOS ISFET sensor has great potential for future personal genome diagnostics with high accuracy and low cost.

  10. High-voltage test and measuring techniques

    Energy Technology Data Exchange (ETDEWEB)

    Hauschild, Wolfgang; Lemke, Eberhard

    2014-04-01

    Reflects the unit of both HV testing and measuring technique. Intended as an ''application guide'' for the relevant IEC standards. Refers also to future trends in HV testing and measuring technique. With numerous illustrations. It is the intent of this book to combine high-voltage (HV) engineering with HV testing technique and HV measuring technique. Based on long-term experience gained by the authors as lecturer and researcher as well as member in international organizations, such as IEC and CIGRE, the book will reflect the state of the art as well as the future trends in testing and diagnostics of HV equipment to ensure a reliable generation, transmission and distribution of electrical energy. The book is intended not only for experts but also for students in electrical engineering and high-voltage engineering.

  11. High-voltage nanosecond pulse shaper

    International Nuclear Information System (INIS)

    Kapishnikov, N.K.; Muratov, V.M.; Shatanov, A.A.

    1987-01-01

    A high-voltage pulse shaper with an output of up to 250 kV, a base duration of ∼ 10 nsec, and a repetition frequency of 50 pulses/sec is described. The described high-voltage nanosecond pulse shaper is designed for one-orbit extraction of an electron beam from a betatron. A diagram of the pulse shaper, which employs a single-stage generator is shown. The shaping element is a low-inductance capacitor bank of series-parallel KVI-3 (2200 pF at 10 kV) or K15-10 (4700 pF at 31.5 kV) disk ceramic capacitors. Four capacitors are connected in parallel and up to 25 are connected in series

  12. Contribution to high voltage matrix switches reliability

    International Nuclear Information System (INIS)

    Lausenaz, Yvan

    2000-01-01

    Nowadays, power electronic equipment requirements are important, concerning performances, quality and reliability. On the other hand, costs have to be reduced in order to satisfy the market rules. To provide cheap, reliability and performances, many standard components with mass production are developed. But the construction of specific products must be considered following these two different points: in one band you can produce specific components, with delay, over-cost problems and eventuality quality and reliability problems, in the other and you can use standard components in a adapted topologies. The CEA of Pierrelatte has adopted this last technique of power electronic conception for the development of these high voltage pulsed power converters. The technique consists in using standard components and to associate them in series and in parallel. The matrix constitutes high voltage macro-switch where electrical parameters are distributed between the synchronized components. This study deals with the reliability of these structures. It brings up the high reliability aspect of MOSFETs matrix associations. Thanks to several homemade test facilities, we obtained lots of data concerning the components we use. The understanding of defects propagation mechanisms in matrix structures has allowed us to put forwards the necessity of robust drive system, adapted clamping voltage protection, and careful geometrical construction. All these reliability considerations in matrix associations have notably allowed the construction of a new matrix structure regrouping all solutions insuring reliability. Reliable and robust, this product has already reaches the industrial stage. (author) [fr

  13. High Power Microwave (HPM) and Ionizing Radiation Effects on CMOS Devices

    Science.gov (United States)

    2010-03-01

    24 xviii Symbol Page VIH minimum input voltage for proper high voltage output...38 VOH output voltage corresponding to VIH ...design. The high level at the input, VIH , along with VDD, define the maximum permitted “Logic 1” region, which allows for proper state change for a

  14. Precision of FLEET Velocimetry Using High-speed CMOS Camera Systems

    Science.gov (United States)

    Peters, Christopher J.; Danehy, Paul M.; Bathel, Brett F.; Jiang, Naibo; Calvert, Nathan D.; Miles, Richard B.

    2015-01-01

    Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 micro sec, precisions of 0.5 m/s in air and 0.2 m/s in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision High Speed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

  15. Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-03-01

    Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

  16. High voltage fast switches for nuclear applications

    International Nuclear Information System (INIS)

    Chatroux, D.; Lausenaz, Y.; Villard, J.F.; Lafore, D.

    1999-01-01

    SILVA process consists in a selective ionization of the 235 uranium isotope, using laser beams generated by dye lasers pumped by copper vapour laser (C.V.L.). SILVA involves power electronic for 3 power supplies: - copper vapour laser power supply, - extraction power supply to generate the electric field in the vapour, and - electron beam power supply for vapour generation. This article reviews the main switches that are proposed on the market or are on development and that could be used in SILVA power supplies. The SILVA technical requirements are: high power, high voltage and very short pulses (200 ns width). (A.C.)

  17. Fast solid state high voltage pulse generator

    Science.gov (United States)

    Christiansen, Jens; Frank, Klaus; Hartmann, Werner

    1987-05-01

    A fast solid state pulse generator is described which is used to trigger high voltage, high current switches. It consists of a 7-stage marx generator bank switched by avalanche transistors and delivers a negative pulse with a rise time of less than 2 ns and an amplitude of 2.4 kV into a load of 200 ω. The delay between the trigger pulse of TTL level and the output pulse is 16 ns. The jitter is well below 100 ps.

  18. High Voltage in Noble Liquids for High Energy Physics

    Energy Technology Data Exchange (ETDEWEB)

    Rebel, B. [Fermilab; Bernard, E. [Yale U.; Faham, C. H. [LBL, Berkeley; Ito, T. M. [Los Alamos; Lundberg, B. [Maryland U.; Messina, M. [Columbia U.; Monrabal, F. [Valencia U., IFIC; Pereverzev, S. P. [LLNL, Livermore; Resnati, F. [Zurich, ETH; Rowson, P. C. [SLAC; Soderberg, M. [Fermilab; Strauss, T. [Bern U.; Tomas, A. [Imperial Coll., London; Va' vra, J. [SLAC; Wang, H. [UCLA

    2014-08-22

    A workshop was held at Fermilab November 8-9, 2013 to discuss the challenges of using high voltage in noble liquids. The participants spanned the fields of neutrino, dark matter, and electric dipole moment physics. All presentations at the workshop were made in plenary sessions. This document summarizes the experiences and lessons learned from experiments in these fields at developing high voltage systems in noble liquids.

  19. Environmental impact of high voltage substations

    International Nuclear Information System (INIS)

    Geambasu, C.; Popadiuc, S.; Drobota, C.; Marza, F.

    2004-01-01

    The first Romanian methodology for simultaneous environmental and human risk evaluation in case of HV installations within substations pertaining to nuclear power stations, based on EU regulation is now applicable in Cernavoda substation. High voltage substations are zones where the environmental impact is focused on electromagnetic field that's causes particular effects in living tissues (human being included). That is the reason why is necessary to identify the potential risk sources, the asses including the way to correct them and to dissimulate the results to the staff and the operational personal.(author)

  20. High-voltage transformer noise measurements

    International Nuclear Information System (INIS)

    Nastev, Atanas; Petreski, Zlatko

    2015-01-01

    This paper presents the results from the noise measurements of a high voltage 300 MVA transformer. The results from the substation noise measurements are compared with the results from the measurements made at the FAT and the impact noise of the cooling system in the overall noise of the transformer is demonstrated as well. There is also an analysis of the impact of noise on employees in the substation on daily and weekly basis. The main sources of noise in the transformer are the magnetic core, the connectors, the tap-changer and the transformer cooling system. (author)

  1. Advanced High Voltage Power Device Concepts

    CERN Document Server

    Baliga, B Jayant

    2012-01-01

    Advanced High Voltage Power Device Concepts describes devices utilized in power transmission and distribution equipment, and for very high power motor control in electric trains and steel-mills. Since these devices must be capable of supporting more than 5000-volts in the blocking mode, this books covers operation of devices rated at 5,000-V, 10,000-V and 20,000-V. Advanced concepts (the MCT, the BRT, and the EST) that enable MOS-gated control of power thyristor structures are described and analyzed in detail. In addition, detailed analyses of the silicon IGBT, as well as the silicon carbide MOSFET and IGBT, are provided for comparison purposes. Throughout the book, analytical models are generated to give a better understanding of the physics of operation for all the structures. This book provides readers with: The first comprehensive treatment of high voltage (over 5000-volts) power devices suitable for the power distribution, traction, and motor-control markets;  Analytical formulations for all the device ...

  2. A CURRENT MIRROR BASED TWO STAGE CMOS CASCODE OP-AMP FOR HIGH FREQUENCY APPLICATION

    OpenAIRE

    RAMKRISHNA KUNDU; ABHISHEK PANDEY; SUBHRA CHAKRABORTY; VIJAY NATH

    2017-01-01

    This paper presents a low power, high slew rate, high gain, ultra wide band two stage CMOS cascode operational amplifier for radio frequency application. Current mirror based cascoding technique and pole zero cancelation technique is used to ameliorate the gain and enhance the unity gain bandwidth respectively, which is the novelty of the circuit. In cascading technique a common source transistor drive a common gate transistor. The cascoding is used to enhance the output resistance and hence ...

  3. High-Voltage, Asymmetric-Waveform Generator

    Science.gov (United States)

    Beegle, Luther W.; Duong, Tuan A.; Duong, Vu A.; Kanik, Isik

    2008-01-01

    The shapes of waveforms generated by commercially available analytical separation devices, such as some types of mass spectrometers and differential mobility spectrometers are, in general, inadequate and result in resolution degradation in output spectra. A waveform generator was designed that would be able to circumvent these shortcomings. It is capable of generating an asymmetric waveform, having a peak amplitude as large as 2 kV and frequency of several megahertz, which can be applied to a capacitive load. In the original intended application, the capacitive load would consist of the drift plates in a differential-mobility spectrometer. The main advantage to be gained by developing the proposed generator is that the shape of the waveform is made nearly optimum for various analytical devices requiring asymmetric-waveform such as differential-mobility spectrometers. In addition, this waveform generator could easily be adjusted to modify the waveform in accordance with changed operational requirements for differential-mobility spectrometers. The capacitive nature of the load is an important consideration in the design of the proposed waveform generator. For example, the design provision for shaping the output waveform is based partly on the principle that (1) the potential (V) on a capacitor is given by V=q/C, where C is the capacitance and q is the charge stored in the capacitor; and, hence (2) the rate of increase or decrease of the potential is similarly proportional to the charging or discharging current. The proposed waveform generator would comprise four functional blocks: a sine-wave generator, a buffer, a voltage shifter, and a high-voltage switch (see Figure 1). The sine-wave generator would include a pair of operational amplifiers in a feedback configuration, the parameters of which would be chosen to obtain a sinusoidal timing signal of the desired frequency. The buffer would introduce a slight delay (approximately equal to 20 ns) but would otherwise

  4. CMOS pixel development for the ATLAS experiment at HL-LHC

    CERN Document Server

    Rimoldi, Marco; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages, high resistivity wafers for large depletion depths; radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R$\\&$D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this presentation the challenges for the usage of CMOS pixel...

  5. 30 CFR 77.810 - High-voltage equipment; grounding.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage equipment; grounding. 77.810 Section 77.810 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF LABOR COAL MINE... COAL MINES Surface High-Voltage Distribution § 77.810 High-voltage equipment; grounding. Frames...

  6. CMOS preamplifier with high linearity and ultra low noise for x-ray spectroscopy

    Energy Technology Data Exchange (ETDEWEB)

    O`Connor, P.O.; Rehak, P. [Brookhaven National Lab., Upton, NY (United States); Gramegna, G.; Corsi, F.; Marzocca, C. [Politecnico di Bari, Orabona (Italy)

    1996-12-31

    We present an ultra low noise charge preamplifier suitable for small capacitance (200M), low leakage current solid state detectors. A self adaptive bias circuit for the MOS feedback device establishes the static feedback resistance in the G{Omega} range while tracking the threshold variations and power supply and temperature fluctuations. The linearity of the gain versus input charge has been improved by means of a voltage divider between the output of the charge-sensitive amplifier and the source of the feedback transistor. With the preamplifier alone, we measure a room-temperature equivalent noise charge (ENC) of 9 e{sup -} rms at 12 usec shaping time. When coupled to a cooled detector a FWHM of 130 eV is obtained at 2.4 usec shaping, corresponding to an ENC of 16 e{sup -} rms. This is the best reported resolution obtained with a CMOS preamplifier. The circuit has good linearity (< 0.2%) up to 1.8 W. Since the preamplifier`s ENC is limited by flicker noise, we fabricated the circuit in two 1.2um CMOS technologies. Device measurements allow us to compare the 1/f noise behavior of each foundry. In addition to the preamplifiers, a 1 us shaper and a 50{Omega} output driver are included on the die.

  7. High Voltage GaN Schottky Rectifiers

    Energy Technology Data Exchange (ETDEWEB)

    CAO,X.A.; CHO,H.; CHU,S.N.G.; CHUO,C.-C.; CHYI,J.-I.; DANG,G.T.; HAN,JUNG; LEE,C.-M.; PEARTON,S.J.; REN,F.; WILSON,R.G.; ZHANG,A.P.

    1999-10-25

    Mesa and planar GaN Schottky diode rectifiers with reverse breakdown voltages (V{sub RB}) up to 550V and >2000V, respectively, have been fabricated. The on-state resistance, R{sub ON}, was 6m{Omega}{center_dot} cm{sup 2} and 0.8{Omega}cm{sup 2}, respectively, producing figure-of-merit values for (V{sub RB}){sup 2}/R{sub ON} in the range 5-48 MW{center_dot}cm{sup -2}. At low biases the reverse leakage current was proportional to the size of the rectifying contact perimeter, while at high biases the current was proportional to the area of this contact. These results suggest that at low reverse biases, the leakage is dominated by the surface component, while at higher biases the bulk component dominates. On-state voltages were 3.5V for the 550V diodes and {ge}15 for the 2kV diodes. Reverse recovery times were <0.2{micro}sec for devices switched from a forward current density of {approx}500A{center_dot}cm{sup -2} to a reverse bias of 100V.

  8. Streamer model for high voltage water switches

    International Nuclear Information System (INIS)

    Sazama, F.J.; Kenyon, V.L. III

    1979-01-01

    An electrical switch model for high voltage water switches has been developed which predicts streamer-switching effects that correlate well with water-switch data from Casino over the past four years and with switch data from recent Aurora/AMP experiments. Preclosure rounding and postclosure resistive damping of pulseforming line voltage waveforms are explained in terms of spatially-extensive, capacitive-coupling of the conducting streamers as they propagate across the gap and in terms of time-dependent streamer resistance and inductance. The arc resistance of the Casino water switch and of a gas switch under test on Casino was determined by computer fit to be 0.5 +- 0.1 ohms and 0.3 +- 0.06 ohms respectively, during the time of peak current in the power pulse. Energy lost in the water switch during the first pulse is 18% of that stored in the pulseforming line while similar energy lost in the gas switch is 11%. The model is described, computer transient analyses are compared with observed water and gas switch data and the results - switch resistance, inductance and energy loss during the primary power pulse - are presented

  9. High-Voltage Switch Containing (DI)2 Devices

    Science.gov (United States)

    Hanes, Maurice H.; Fiedor, Richard J.

    1987-01-01

    Series switching diodes triggered on by passing above threshold voltage. High-voltage switch made by connecting multitude of deep-impurity, double-injection devices in series with each other and with another, triggerable high-voltage device such as thyristor. Device operates near ground potential to avoid insulation problems in triggering circuit.

  10. A High-Voltage Level Tolerant Transistor Circuit

    NARCIS (Netherlands)

    Annema, Anne J.; Geelen, Godefridus Johannes Gertrudis Maria

    2001-01-01

    A high-voltage level tolerant transistor circuit, comprising a plurality of cascoded transistors, including a first transistor (T1) operatively connected to a high-voltage level node (3) and a second transistor (T2) operatively connected to a low-voltage level node (2). The first transistor (T1)

  11. A research on radiation calibration of high dynamic range based on the dual channel CMOS

    Science.gov (United States)

    Ma, Kai; Shi, Zhan; Pan, Xiaodong; Wang, Yongsheng; Wang, Jianghua

    2017-10-01

    The dual channel complementary metal-oxide semiconductor (CMOS) can get high dynamic range (HDR) image through extending the gray level of the image by using image fusion with high gain channel image and low gain channel image in a same frame. In the process of image fusion with dual channel, it adopts the coefficients of radiation response of a pixel from dual channel in a same frame, and then calculates the gray level of the pixel in the HDR image. For the coefficients of radiation response play a crucial role in image fusion, it has to find an effective method to acquire these parameters. In this article, it makes a research on radiation calibration of high dynamic range based on the dual channel CMOS, and designs an experiment to calibrate the coefficients of radiation response for the sensor it used. In the end, it applies these response parameters in the dual channel CMOS which calibrates, and verifies the correctness and feasibility of the method mentioned in this paper.

  12. A High-Dynamic-Range Optical Remote Sensing Imaging Method for Digital TDI CMOS

    Directory of Open Access Journals (Sweden)

    Taiji Lan

    2017-10-01

    Full Text Available The digital time delay integration (digital TDI technology of the complementary metal-oxide-semiconductor (CMOS image sensor has been widely adopted and developed in the optical remote sensing field. However, the details of targets that have low illumination or low contrast in scenarios of high contrast are often drowned out because of the superposition of multi-stage images in digital domain multiplies the read noise and the dark noise, thus limiting the imaging dynamic range. Through an in-depth analysis of the information transfer model of digital TDI, this paper attempts to explore effective ways to overcome this issue. Based on the evaluation and analysis of multi-stage images, the entropy-maximized adaptive histogram equalization (EMAHE algorithm is proposed to improve the ability of images to express the details of dark or low-contrast targets. Furthermore, in this paper, an image fusion method is utilized based on gradient pyramid decomposition and entropy weighting of different TDI stage images, which can improve the detection ability of the digital TDI CMOS for complex scenes with high contrast, and obtain images that are suitable for recognition by the human eye. The experimental results show that the proposed methods can effectively improve the high-dynamic-range imaging (HDRI capability of the digital TDI CMOS. The obtained images have greater entropy and average gradients.

  13. Rad-Hard, Miniaturized, Scalable, High-Voltage Switching Module for Power Applications Rad-Hard, Miniaturized

    Science.gov (United States)

    Adell, Philippe C.; Mojarradi, Mohammad; DelCastillo, Linda Y.; Vo, Tuan A.

    2011-01-01

    A paper discusses the successful development of a miniaturized radiation hardened high-voltage switching module operating at 2.5 kV suitable for space application. The high-voltage architecture was designed, fabricated, and tested using a commercial process that uses a unique combination of 0.25 micrometer CMOS (complementary metal oxide semiconductor) transistors and high-voltage lateral DMOS (diffusion metal oxide semiconductor) device with high breakdown voltage (greater than 650 V). The high-voltage requirements are achieved by stacking a number of DMOS devices within one module, while two modules can be placed in series to achieve higher voltages. Besides the high-voltage requirements, a second generation prototype is currently being developed to provide improved switching capabilities (rise time and fall time for full range of target voltages and currents), the ability to scale the output voltage to a desired value with good accuracy (few percent) up to 10 kV, to cover a wide range of high-voltage applications. In addition, to ensure miniaturization, long life, and high reliability, the assemblies will require intensive high-voltage electrostatic modeling (optimized E-field distribution throughout the module) to complete the proposed packaging approach and test the applicability of using advanced materials in a space-like environment (temperature and pressure) to help prevent potential arcing and corona due to high field regions. Finally, a single-event effect evaluation would have to be performed and single-event mitigation methods implemented at the design and system level or developed to ensure complete radiation hardness of the module.

  14. Emulation of high-frequency substrate noise generation in CMOS digital circuits

    Science.gov (United States)

    Shimazaki, Shunsuke; Taga, Shota; Makita, Tetsuya; Azuma, Naoya; Miura, Noriyuki; Nagata, Makoto

    2014-01-01

    A noise emulator is based on the capacitor charging modeling and generates power and substrate noises expected in a CMOS digital integrated circuit. An off-chip near-magnetic-field sensor indirectly characterizes the distribution of clock timing and the adjustability of skews within on-chip digital circuits. An on-chip noise monitor captures power and substrate noise waveforms and evaluates noise frequency components in a wide frequency bandwidth. A 65 nm CMOS prototype demonstrated power and substrate noise generation in a variety of operating scenarios of digital integrated circuits. Power noise generation emulated at 125 MHz exhibits the enhancements of high-order harmonic components after deskewing at a timing resolution of 37.8 ps, as is specifically seen in more than 10 dB enlargement of the substrate noise component at 2.1 GHz.

  15. Properties of CMOS devices and circuits fabricated on high-resistivity, detector-grade silicon

    International Nuclear Information System (INIS)

    Holland, S.

    1991-11-01

    A CMOS process that is compatible with silicon p-i-n radiation detectors has been developed and characterized. A total of twelve mask layers are used in the process. The NMOS device is formed in a retrograde well while the PMOS device is fabricated directly in the high-resistivity silicon. Isolation characteristics are similar to a standard foundary CMOS process. Circuit performance using 3 μm design rules has been evaluated. The measured propagation delay and power-delay product for a 51-stage ring oscillator was 1.5 ns and 43 fJ, respectively. Measurements on a simple cascode amplifier results in a gain-bandwidth product of 200 MHz at a bias current of 15 μA. The input-referred noise of the cascode amplifier is 20 nV/√Hz at 1 MHz

  16. High voltage high brightness electron accelerators with MITL voltage adder coupled to foilless diodes

    International Nuclear Information System (INIS)

    Mazarakis, M.G.; Poukey, J.W.; Frost, C.A.; Shope, S.L.; Halbleib, J.A.; Turman, B.N.

    1993-01-01

    During the last ten years the authors have extensively studied the physics and operation of magnetically-immersed electron foilless diodes. Most of these sources were utilized as injectors to high current, high energy linear induction accelerators such as those of the RADLAC family. Recently they have experimentally and theoretically demonstrated that foilless diodes can be successfully coupled to self-magnetically insulated transmission line voltage adders to produce very small high brightness, high definition (no halo) electron beams. The RADLAC/SMILE experience opened the path to a new approach in high brightness, high energy induction accelerators. There is no beam drifting through the device. The voltage addition occurs in a center conductor, and the beam is created at the high voltage end in an applied magnetic field diode. This work was motivated by the remarkable success of the HERMES-III accelerator and the need to produce small radius, high energy, high current electron beams for air propagation studies and flash x-ray radiography. In this paper they present experimental results compared with analytical and numerical simulations in addition to design examples of devices that can produce multikiloamp electron beams of as high as 100 MV energies and radii as small as 1 mm

  17. A monolithic 640 × 512 CMOS imager with high-NIR sensitivity

    Science.gov (United States)

    Lauxtermann, Stefan; Fisher, John; McDougal, Michael

    2014-06-01

    In this paper we present first results from a backside illuminated CMOS image sensor that we fabricated on high resistivity silicon. Compared to conventional CMOS imagers, a thicker photosensitive membrane can be depleted when using silicon with low background doping concentration while maintaining low dark current and good MTF performance. The benefits of such a fully depleted silicon sensor are high quantum efficiency over a wide spectral range and a fast photo detector response. Combining these characteristics with the circuit complexity and manufacturing maturity available from a modern, mixed signal CMOS technology leads to a new type of sensor, with an unprecedented performance spectrum in a monolithic device. Our fully depleted, backside illuminated CMOS sensor was designed to operate at integration times down to 100nsec and frame rates up to 1000Hz. Noise in Integrate While Read (IWR) snapshot shutter operation for these conditions was simulated to be below 10e- at room temperature. 2×2 binning with a 4× increase in sensitivity and a maximum frame rate of 4000 Hz is supported. For application in hyperspectral imaging systems the full well capacity in each row can individually be programmed between 10ke-, 60ke- and 500ke-. On test structures we measured a room temperature dark current of 360pA/cm2 at a reverse bias of 3.3V. A peak quantum efficiency of 80% was measured with a single layer AR coating on the backside. Test images captured with the 50μm thick VGA imager between 30Hz and 90Hz frame rate show a strong response at NIR wavelengths.

  18. RICH High Voltages & PDF Analysis @ LHCb

    CERN Multimedia

    Fanchini, E

    2009-01-01

    In the LHCb experiment an important issue is the identification of the hadrons of the final states of the B mesons decays. Two RICH subdetectors are devoted to this task, and the Hybrid Photon Detectors (HPDs) are the photodetectors used to detect Cherenkov light. In this poster there is a description of how the very high voltage (-18 KV) supply stability used to power the HPDs is monitored. It is also presented the basics of a study which can be done with the first collision data: the analysis of the dimuons from the Drell-Yan process. This process is well known and the acceptance of the LHCb detector in terms of pseudorapidity will be very useful to improve the knowledge of the proton structure functions or, alternatively, try to estimate the luminosity from it.

  19. Understanding and Prevention of Transient Voltages and Dielectric Breakdown in High Voltage Battery Systems

    Science.gov (United States)

    2017-07-31

    From - To) 07/31/2017 Final 4/1/2016 - 5/31/2017 4. TITLE AND SUBTITLE Sa. CONTRACT NUMBER Understanding and Prevention of Transient Voltages and...and Prevention of Transient Voltages and Dielectric Breakdown in High Voltage Battery Systems Submitted to: Mr. Donald Hoffman donald.hoffman...the next hurdle was to begin to evaluate the suppression topologies ability to prevent transients. IV.a. TVS Diodes TVS diodes were evaluated from

  20. High-Speed Low-Jitter Frequency Multiplication in CMOS

    NARCIS (Netherlands)

    van de Beek, R.C.H.

    2004-01-01

    This thesis deals with high-speed Clock and Frequency Multiplication. The term `high-speedù applies to both the output and the reference frequency of the multiplier. Much emphasis is placed on analysis and optimization of the total timing inaccuracies, and on implementing a high-speed feedback

  1. Analog filters in nanometer CMOS

    CERN Document Server

    Uhrmann, Heimo; Zimmermann, Horst

    2014-01-01

    Starting from the basics of analog filters and the poor transistor characteristics in nanometer CMOS 10 high-performance analog filters developed by the authors in 120 nm and 65 nm CMOS are described extensively. Among them are gm-C filters, current-mode filters, and active filters for system-on-chip realization for Bluetooth, WCDMA, UWB, DVB-H, and LTE applications. For the active filters several operational amplifier designs are described. The book, furthermore, contains a review of the newest state of research on low-voltage low-power analog filters. To cover the topic of the book comprehensively, linearization issues and measurement methods for the characterization of advanced analog filters are introduced in addition. Numerous elaborate illustrations promote an easy comprehension. This book will be of value to engineers and researchers in industry as well as scientists and Ph.D students at universities. The book is also recommendable to graduate students specializing on nanoelectronics, microelectronics ...

  2. A CMOS Switched Transconductor Mixer

    NARCIS (Netherlands)

    Klumperink, Eric A.M.; Louwsma, S.M.; Wienk, Gerhardus J.M.; Nauta, Bram

    A new CMOS active mixer topology can operate at low supply voltages by the use of switches exclusively connected to the supply voltages. Such switches require less voltage headroom and avoid gate-oxide reliability problems. Mixing is achieved by exploiting two transconductors with cross-coupled

  3. Depleted CMOS pixels for LHC proton–proton experiments

    International Nuclear Information System (INIS)

    Wermes, N.

    2016-01-01

    While so far monolithic pixel detectors have remained in the realm of comparatively low rate and radiation applications outside LHC, new developments exploiting high resistivity substrates with three or four well CMOS process options allow reasonably large depletion depths and full CMOS circuitry in a monolithic structure. This opens up the possibility to target CMOS pixel detectors also for high radiation pp-experiments at the LHC upgrade, either in a hybrid-type fashion or even fully monolithic. Several pixel matrices have been prototyped with high ohmic substrates, high voltage options, and full CMOS electronics. They were characterized in the lab and in test beams. An overview of the necessary development steps and different approaches as well as prototype results are presented in this paper.

  4. A 20 Mfps high frame-depth CMOS burst-mode imager with low power in-pixel NMOS-only passive amplifier

    Science.gov (United States)

    Wu, L.; San Segundo Bello, D.; Coppejans, P.; Craninckx, J.; Wambacq, P.; Borremans, J.

    2017-02-01

    This paper presents a 20 Mfps 32 × 84 pixels CMOS burst-mode imager featuring high frame depth with a passive in-pixel amplifier. Compared to the CCD alternatives, CMOS burst-mode imagers are attractive for their low power consumption and integration of circuitry such as ADCs. Due to storage capacitor size and its noise limitations, CMOS burst-mode imagers usually suffer from a lower frame depth than CCD implementations. In order to capture fast transitions over a longer time span, an in-pixel CDS technique has been adopted to reduce the required memory cells for each frame by half. Moreover, integrated with in-pixel CDS, an in-pixel NMOS-only passive amplifier alleviates the kTC noise requirements of the memory bank allowing the usage of smaller capacitors. Specifically, a dense 108-cell MOS memory bank (10fF/cell) has been implemented inside a 30μm pitch pixel, with an area of 25 × 30μm2 occupied by the memory bank. There is an improvement of about 4x in terms of frame depth per pixel area by applying in-pixel CDS and amplification. With the amplifier's gain of 3.3, an FD input-referred RMS noise of 1mV is achieved at 20 Mfps operation. While the amplification is done without burning DC current, including the pixel source follower biasing, the full pixel consumes 10μA at 3.3V supply voltage at full speed. The chip has been fabricated in imec's 130nm CMOS CIS technology.

  5. Energy Storage Options for Voltage Support in Low-Voltage Grids with High Penetration of Photovoltaic

    DEFF Research Database (Denmark)

    Marra, Francesco; Tarek Fawzy, Y.; Bülo, Thorsten

    2012-01-01

    The generation of power by photovoltaic (PV) systems is constantly increasing in low-voltage (LV) distribution grids, in line with the European environmental targets. To cope with the effects on grid voltage profiles during high generation and low demand periods, new solutions need to be establis......The generation of power by photovoltaic (PV) systems is constantly increasing in low-voltage (LV) distribution grids, in line with the European environmental targets. To cope with the effects on grid voltage profiles during high generation and low demand periods, new solutions need...... to be established. In the long term, these solutions should also aim to allow further more PV installed capacity, while meeting the power quality requirements. In this paper, different concepts of energy storage are proposed to ensure the voltage quality requirements in a LV grid with high PV penetration...

  6. Low-voltage and high-voltage TEM observations on MWCNTs of rat in vivo.

    Science.gov (United States)

    Sakaguchi, Norihito; Watari, Fumio; Yokoyama, Atsuro; Nodasaka, Yoshinobu; Ichinose, Hideki

    2009-01-01

    In the present study, we focused on the optimal conditions for observation of morphology and atomic structure of carbon nanotube (CNT) in vivo by transmission electron microscopy (TEM). Either low-voltage or high-voltage TEMs was chosen for the high-contrast or high-resolution imaging of subcutaneous tissue and the multi-wall CNT (MWCNT). The morphology and structure of each cell organelle were well recognized using the low-voltage TEM at 75 kV. Individual MWCNTs forming the cluster were also visible by the low-voltage TEM. On the contrary, the high-voltage TEM image at 1250 kV shows poor contrast on both the cell organelles and MWCNTs. However, graphene layers of MWCNT were clearly visible in the HRTEM image using the high-voltage TEM. The influence of the surrounding biological tissue can be disregarded by the high-energy electrons due to their weak scattering/absorption effect in the tissue. It was indicated that the usage of the high-voltage TEM is quite effective to the atomic structure analysis of nano-crystalline materials in vivo.

  7. LED-Based High-Voltage Lines Warning System

    Directory of Open Access Journals (Sweden)

    Eldar MUSA

    2013-04-01

    Full Text Available LED-based system, running with the current of high-voltage lines and converting the current flowing through the line into the light by using a toroid transformer, has been developed. The transformer’s primary winding is constituted by the high voltage power line. Toroidal core consists of two equal parts and the secondary windings are evenly placed on these two parts. The system is mounted on the high-voltage lines as a clamp. The secondary winding ends are connected in series by the connector on the clamp. LEDs are supplied by the voltage at the ends of secondary. Current flowing through highvoltage transmission lines is converted to voltage by the toroidal transformer and the light emitting LEDs are supplied with this voltage. The theory of the conversion of the current flowing through the line into the light is given. The system, running with the current of the line and converting the current into the light, has been developed. System has many application areas such as warning high voltage lines (warning winches to not hinder the high-voltage lines when working under the lines, warning planes to not touch the high-voltage lines, remote measurement of high-voltage line currents, and local illumination of the line area

  8. A novel ±0.8 V high-performance voltage-tunable CDTA with enhanced bandwidth

    Science.gov (United States)

    Xia, Zanming; Wang, Chunhua; Kuang, Jun; Jin, Jie

    2016-04-01

    In this article, we propose a novel high-performance complementary metal oxide semiconductor (CMOS) current differencing transconductance amplifier (CDTA) with a transconductance gain (GM) that can be linearly tuned by a voltage. By using a high-speed, low-voltage, cascaded current mirror active resistance compensation technique, the proposed CDTA circuit exhibits wide frequency bandwidths, high current tracking precisions as well as large output impedances. The linear-tunable GM of the CDTA is designed with the use of linear composite metal oxide semiconductor field-effect transistor as basic cells in the circuit. Combining these two approaches, several design concerns are studied, including: impedance characteristic, tracking errors, offset and linearity and noise. The prototype chip with a 0.25 mm2 area is fabricated in a GlobalFoundries'0.18 μm CMOS process. The simulated results and measured results with ±0.8 V DC supply voltages are presented, and show extremely wide bandwidths and wide linear tuning range. In addition, a fully differential band-pass filter for a high-speed system is also given as an example to confirm the high performance of the proposed circuit.

  9. A digital output accelerometer using MEMS-based piezoelectric accelerometers and arrayed CMOS inverters with satellite capacitors

    International Nuclear Information System (INIS)

    Kobayashi, T; Okada, H; Maeda, R; Itoh, T; Masuda, T

    2011-01-01

    The present paper describes the development of a digital output accelerometer composed of microelectromechanical systems (MEMS)-based piezoelectric accelerometers and arrayed complementary metal–oxide–semiconductor (CMOS) inverters accompanied by capacitors. The piezoelectric accelerometers were fabricated from multilayers of Pt/Ti/PZT/Pt/Ti/SiO 2 deposited on silicon-on-insulator (SOI) wafers. The fabricated piezoelectric accelerometers were connected to arrayed CMOS inverters. Each of the CMOS inverters was accompanied by a capacitor with a different capacitance called a 'satellite capacitor'. We have confirmed that the output voltage generated from the piezoelectric accelerometers can vary the output of the CMOS inverters from a high to a low level; the state of the CMOS inverters has turned from the 'off-state' into the 'on-state' when the output voltage of the piezoelectric accelerometers is larger than the threshold voltage of the CMOS inverters. We have also confirmed that the CMOS inverters accompanied by the larger satellite capacitor have become 'on-state' at a lower acceleration. On increasing the acceleration, the number of on-state CMOS inverters has increased. Assuming that the on-state and off-state of CMOS inverters correspond to logic '0' and '1', the present digital output accelerometers have expressed the accelerations of 2.0, 3.0, 5.0, and 5.5 m s −2 as digital outputs of 111, 110, 100, and 000, respectively

  10. High Efficiency Power Converter for Low Voltage High Power Applications

    DEFF Research Database (Denmark)

    Nymand, Morten

    The topic of this thesis is the design of high efficiency power electronic dc-to-dc converters for high-power, low-input-voltage to high-output-voltage applications. These converters are increasingly required for emerging sustainable energy systems such as fuel cell, battery or photo voltaic based...... energy systems. Applications include systems for emergency power back-up (UPS), de-centralized combined heat and power systems, traction applications such as hybrid electrical vehicles, forklift trucks and special applications such as low emission power generation for truck and ship containers...... be applied to all isolated boost type converters and, in principle, an unlimited number of power stages can be paralleled. Feasibility and operation of the new topology are demonstrated on a dual 3 kW and a quad 10 kW prototype converter. Measured peak efficiency is 98.2% and worst case minimum efficiency...

  11. Electrical properties of HfO2 high- k thin-film MOS capacitors for advanced CMOS technology

    Science.gov (United States)

    Khairnar, A. G.; Patil, L. S.; Salunke, R. S.; Mahajan, A. M.

    2015-11-01

    We deposited the hafnium dioxide (HfO2) thin films on p-Si (100) substrates. The thin films were deposited with deposition time variations, viz 2, 4, 7 and 20 min using RF-sputtering technique. The thickness and refractive index of the films were measured using spectroscopic ellipsometer. The thicknesses of the films were measured to be 13.7, 21.9, 35.38 and 92.2 nm and refractive indices of 1.90, 1.93, 1.99 and 1.99, respectively, of the films deposited for 2, 4, 7 and 20 min deposition time. The crystal structures of the deposited HfO2 thin films were determined using XRD spectra and showed the monoclinic structure, confirmed with the ICDD card no 34-0104. Aluminum metallization was carried to form the Al/HfO2/ p-Si MOS structures by using thermal evaporation system with electrode area of 12.56 × 10-4 cm2. Capacitance voltage and current voltage measurements were taken to know electrical behavior of these fabricated MOS structures. The electrical parameters such as dielectric constant, flat-band shift and interface trap density determined through CV measurement were 7.99, 0.11 V and 6.94 × 1011 eV-1 cm-2, respectively. The low leakage current density was obtained from IV measurement of fabricated MOS structure at 1.5 V is 4.85 × 10-10 Acm-2. Aforesaid properties explored the suitability of the fabricated HfO2 high- k-based MOS capacitors for advanced CMOS technology.

  12. Removal of Microorganisms in Drinking Water using Pulsed High Voltage

    Directory of Open Access Journals (Sweden)

    Ariadi Hazmi

    2013-04-01

    Full Text Available A pulsed high voltage was used to remove microorganisms in drinking water. The effects of the pulsed high voltage on pH, conductivity, temperature and oxidation reduction potential (ORP of the drinking water were investigated. The observed results show that the removal efficiency with respect to fecal coliforms and total coliforms increased with the increase of the pulsed high voltage. The removal efficiency for microorganisms such as fecal coliforms and total coliforms was in the range 25-100% and 44-100%, respectively, after the water was exposed to a pulsed high voltage of 5-10 kV for 60 minutes. An increase of the pulsed high voltage caused a decrease in the conductivity and ORP with operational time.

  13. Multiple High Voltage Pulse Stressing of Polymer Thick Film Resistors

    Directory of Open Access Journals (Sweden)

    Busi Rambabu

    2014-01-01

    Full Text Available The purpose of this paper is to study high voltage interactions in polymer thick film resistors, namely, polyvinyl chloride- (PVC- graphite thick film resistors, and their applications in universal trimming of these resistors. High voltages in the form of impulses for various pulse durations and with different amplitudes have been applied to polymer thick film resistors and we observed the variation of resistance of these resistors with high voltages. It has been found that the resistance of polymer thick film resistors decreases in the case of higher resistivity materials and the resistance of polymer thick film resistor increases in the case of lower resistivity materials when high voltage impulses are applied to them. It has been also found that multiple high voltage pulse (MHVP stressing can be used to trim the polymer thick film resistors either upwards or downwards.

  14. PV source based high voltage gain current fed converter

    Science.gov (United States)

    Saha, Soumya; Poddar, Sahityika; Chimonyo, Kudzai B.; Arunkumar, G.; Elangovan, D.

    2017-11-01

    This work involves designing and simulation of a PV source based high voltage gain, current fed converter. It deals with an isolated DC-DC converter which utilizes boost converter topology. The proposed converter is capable of high voltage gain and above all have very high efficiency levels as proved by the simulation results. The project intends to produce an output of 800 V dc from a 48 V dc input. The simulation results obtained from PSIM application interface were used to analyze the performance of the proposed converter. Transformer used in the circuit steps up the voltage as well as to provide electrical isolation between the low voltage and high voltage side. Since the converter involves high switching frequency of 100 kHz, ultrafast recovery diodes are employed in the circuitry. The major application of the project is for future modeling of solar powered electric hybrid cars.

  15. A CURRENT MIRROR BASED TWO STAGE CMOS CASCODE OP-AMP FOR HIGH FREQUENCY APPLICATION

    Directory of Open Access Journals (Sweden)

    RAMKRISHNA KUNDU

    2017-03-01

    Full Text Available This paper presents a low power, high slew rate, high gain, ultra wide band two stage CMOS cascode operational amplifier for radio frequency application. Current mirror based cascoding technique and pole zero cancelation technique is used to ameliorate the gain and enhance the unity gain bandwidth respectively, which is the novelty of the circuit. In cascading technique a common source transistor drive a common gate transistor. The cascoding is used to enhance the output resistance and hence improve the overall gain of the operational amplifier with less complexity and less power dissipation. To bias the common gate transistor, a current mirror is used in this paper. The proposed circuit is designed and simulated using Cadence analog and digital system design tools of 45 nanometer CMOS technology. The simulated results of the circuit show DC gain of 63.62 dB, unity gain bandwidth of 2.70 GHz, slew rate of 1816 V/µs, phase margin of 59.53º, power supply of the proposed operational amplifier is 1.4 V (rail-to-rail ±700 mV, and power consumption is 0.71 mW. This circuit specification has encountered the requirements of radio frequency application.

  16. Multi-channel high-speed CMOS image acquisition and pre-processing system

    Science.gov (United States)

    Sun, Chun-feng; Yuan, Feng; Ding, Zhen-liang

    2008-10-01

    A new multi-channel high-speed CMOS image acquisition and pre-processing system is designed to realize the image acquisition, data transmission, time sequential control and simple image processing by high-speed CMOS image sensor. The modular structure design, LVDS and ping-pong cache techniques used during the designed image data acquisition sub-system design ensure the real-time data acquisition and transmission. Furthermore, a new histogram equalization algorithm of adaptive threshold value based on the reassignment of redundant gray level is incorporated in the image preprocessing module of FPGA. The iterative method is used in the course of setting threshold value, and a redundant graylevel is redistributed rationally according to the proportional gray level interval. The over-enhancement of background is restrained and the feasibility of mergence of foreground details is reduced. The experimental certificates show that the system can be used to realize the image acquisition, transmission, memory and pre-processing to 590MPixels/s data size, and make for the design and realization of the subsequent system.

  17. Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection.

    Science.gov (United States)

    Jeong, Gyu-Seob; Bae, Woorham; Jeong, Deog-Kyoon

    2017-08-25

    The bandwidth requirement of wireline communications has increased exponentially because of the ever-increasing demand for data centers and high-performance computing systems. However, it becomes difficult to satisfy the requirement with legacy electrical links which suffer from frequency-dependent losses due to skin effects, dielectric losses, channel reflections, and crosstalk, resulting in a severe bandwidth limitation. In order to overcome this challenge, it is necessary to introduce optical communication technology, which has been mainly used for long-reach communications, such as long-haul networks and metropolitan area networks, to the medium- and short-reach communication systems. However, there still remain important issues to be resolved to facilitate the adoption of the optical technologies. The most critical challenges are the energy efficiency and the cost competitiveness as compared to the legacy copper-based electrical communications. One possible solution is silicon photonics which has long been investigated by a number of research groups. Despite inherent incompatibility of silicon with the photonic world, silicon photonics is promising and is the only solution that can leverage the mature complementary metal-oxide-semiconductor (CMOS) technologies. Silicon photonics can be utilized in not only wireline communications but also countless sensor applications. This paper introduces a brief review of silicon photonics first and subsequently describes the history, overview, and categorization of the CMOS IC technology for high-speed photo-detection without enumerating the complex circuital expressions and terminologies.

  18. Voltage Balancing Method on Expert System for 51-Level MMC in High Voltage Direct Current Transmission

    Directory of Open Access Journals (Sweden)

    Yong Chen

    2016-01-01

    Full Text Available The Modular Multilevel Converters (MMC have been a spotlight for the high voltage and high power transmission systems. In the VSC-HVDC (High Voltage Direct Current based on Voltage Source Converter transmission system, the energy of DC link is stored in the distributed capacitors, and the difference of capacitors in parameters and charge rates causes capacitor voltage balance which affects the safety and stability of HVDC system. A method of MMC based on the expert system for reducing the frequency of the submodules (SMs of the IGBT switching frequency is proposed. Firstly, MMC with 51 levels for HVDC is designed. Secondly, the nearest level control (NLC for 51-level MMC is introduced. Thirdly, a modified capacitor voltage balancing method based on expert system for MMC-based HVDC transmission system is proposed. Finally, a simulation platform for 51-level Modular Multilevel Converter is constructed by using MATLAB/SIMULINK. The results indicate that the strategy proposed reduces the switching frequency on the premise of keeping submodule voltage basically identical, which greatly reduces the power losses for MMC-HVDC system.

  19. CMOS pixel development for the ATLAS experiment at HL-LHC

    CERN Document Server

    Risti{c}, Branislav; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages (HV-MAPS), high resistivity wafers for large depletion depths (HR-MAPS); radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R&D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels, with monolithic or hybrid designs, are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this pr...

  20. CMOS Pixel Development for the ATLAS Experiment at HL-LHC

    CERN Document Server

    Gaudiello, Andrea; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on: HV enabling technologies that allow to use high depletion voltages (HV-MAPS), high resistivity wafers for large depletion depths (HR-MAPS); radiation hard processed with multiple nested wells to allow CMOS electronics embedded with sufficient shielding into the sensor substrate and backside processing and thinning for material minimization and backside voltage application. Since 2014, members of more than 20 groups in the ATLAS experiment are actively pursuing CMOS pixel R&D in an ATLAS Demonstrator program pursuing sensor design and characterizations. The goal of this program is to demonstrate that depleted CMOS pixels, with monolithic or hybrid designs, are suited for high rate, fast timing and high radiation operation at LHC. For this a number of technologies have been explored and characterized. In this pr...

  1. Electrical system architecture having high voltage bus

    Science.gov (United States)

    Hoff, Brian Douglas [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL

    2011-03-22

    An electrical system architecture is disclosed. The architecture has a power source configured to generate a first power, and a first bus configured to receive the first power from the power source. The architecture also has a converter configured to receive the first power from the first bus and convert the first power to a second power, wherein a voltage of the second power is greater than a voltage of the first power, and a second bus configured to receive the second power from the converter. The architecture further has a power storage device configured to receive the second power from the second bus and deliver the second power to the second bus, a propulsion motor configured to receive the second power from the second bus, and an accessory motor configured to receive the second power from the second bus.

  2. Voltage stabilizers for high temperature furnace

    International Nuclear Information System (INIS)

    Huet, J.

    1966-10-01

    The stabilization of furnace temperatures in the range 1500-2500 C has been achieved by controlling the effective (rms) value of the supply voltage of the heating element. Temperature variations are less than, or equal to, one degree C in the whole working range of the furnace. Two types of set-ups have been developed: one is static, the other takes use of a servo-motor. (author) [fr

  3. Planar LTCC transformers for high voltage flyback converters.

    Energy Technology Data Exchange (ETDEWEB)

    Schofield, Daryl (NASCENT Technology Inc. , Watertown, SD); Schare, Joshua M.; Glass, Sarah Jill; Roesler, Alexander William; Ewsuk, Kevin Gregory; Slama, George (NASCENT Technology Inc. , Watertown, SD); Abel, Dave (NASCENT Technology Inc. , Watertown, SD)

    2007-06-01

    This paper discusses the design and use of low-temperature (850 C to 950 C) co-fired ceramic (LTCC) planar magnetic flyback transformers for applications that require conversion of a low voltage to high voltage (> 100V) with significant volumetric constraints. Measured performance and modeling results for multiple designs showed that the LTCC flyback transformer design and construction imposes serious limitations on the achievable coupling and significantly impacts the transformer performance and output voltage. This paper discusses the impact of various design factors that can provide improved performance by increasing transformer coupling and output voltage. The experiments performed on prototype units demonstrated LTCC transformer designs capable of greater than 2 kV output. Finally, the work investigated the effect of the LTCC microstructure on transformer insulation. Although this paper focuses on generating voltages in the kV range, the experimental characterization and discussion presented in this work applies to designs requiring lower voltage.

  4. Recycling potential for low voltage and high voltage high rupturing capacity fuse links.

    Science.gov (United States)

    Psomopoulos, Constantinos S; Barkas, Dimitrios A; Kaminaris, Stavros D; Ioannidis, George C; Karagiannopoulos, Panagiotis

    2017-12-01

    Low voltage and high voltage high-rupturing-capacity fuse links are used in LV and HV installations respectively, protecting mainly the LV and HV electricity distribution and transportation networks. The Waste Electrical and Electronic Equipment Directive (2002/96/EC) for "Waste of electrical and electronic equipment" is the main related legislation and as it concerns electrical and electronic equipment, it includes electric fuses. Although, the fuse links consist of recyclable materials, only small scale actions have been implemented for their recycling around Europe. This work presents the possibilities for material recovery from this specialized industrial waste for which there are only limited volume data. Furthermore, in order to present the huge possibilities and environmental benefits, it presents the potential for recycling of HRC fuses used by the Public Power Corporation of Greece, which is the major consumer for the country, but one of the smallest ones in Europe and globally, emphasizing in this way in the issue. According to the obtained results, fuse recycling could contribute to the effort for minimize the impacts on the environment through materials recovery and reduction of the wastes' volume disposed of in landfills. Copyright © 2017 Elsevier Ltd. All rights reserved.

  5. Progress and opportunities in high-voltage microactuator powering technology towards one-chip MEMS

    Science.gov (United States)

    Mita, Yoshio; Hirakawa, Atsushi; Stefanelli, Bruno; Mori, Isao; Okamoto, Yuki; Morishita, Satoshi; Kubota, Masanori; Lebrasseur, Eric; Kaiser, Andreas

    2018-04-01

    In this paper, we address issues and solutions for micro-electro-mechanical-systems (MEMS) powering through semiconductor devices towards one-chip MEMS, especially those with microactuators that require high voltage (HV, which is more than 10 V, and is often over 100 V) for operation. We experimentally and theoretically demonstrated that the main reason why MEMS actuators need such HV is the tradeoff between resonant frequency and displacement amplitude. Indeed, the product of frequency and displacement is constant regardless of the MEMS design, but proportional to the input energy, which is the square of applied voltage in an electrostatic actuator. A comprehensive study on the principles of HV device technology and associated circuit technologies, especially voltage shifter circuits, was conducted. From the viewpoint of on-chip energy source, series-connected HV photovoltaic cells have been discussed. Isolation and electrical connection methods were identified to be key enabling technologies. Towards future rapid development of such autonomous devices, a technology to convert standard 5 V CMOS devices into HV circuits using SOI substrate and a MEMS postprocess is presented. HV breakdown experiments demonstrated this technology can hold over 700 to 1000 V, depending on the layout.

  6. Threshold-voltage modulated phase change heterojunction for application of high density memory

    International Nuclear Information System (INIS)

    Yan, Baihan; Tong, Hao; Qian, Hang; Miao, Xiangshui

    2015-01-01

    Phase change random access memory is one of the most important candidates for the next generation non-volatile memory technology. However, the ability to reduce its memory size is compromised by the fundamental limitations inherent in the CMOS technology. While 0T1R configuration without any additional access transistor shows great advantages in improving the storage density, the leakage current and small operation window limit its application in large-scale arrays. In this work, phase change heterojunction based on GeTe and n-Si is fabricated to address those problems. The relationship between threshold voltage and doping concentration is investigated, and energy band diagrams and X-ray photoelectron spectroscopy measurements are provided to explain the results. The threshold voltage is modulated to provide a large operational window based on this relationship. The switching performance of the heterojunction is also tested, showing a good reverse characteristic, which could effectively decrease the leakage current. Furthermore, a reliable read-write-erase function is achieved during the tests. Phase change heterojunction is proposed for high-density memory, showing some notable advantages, such as modulated threshold voltage, large operational window, and low leakage current

  7. Threshold-voltage modulated phase change heterojunction for application of high density memory

    Science.gov (United States)

    Yan, Baihan; Tong, Hao; Qian, Hang; Miao, Xiangshui

    2015-09-01

    Phase change random access memory is one of the most important candidates for the next generation non-volatile memory technology. However, the ability to reduce its memory size is compromised by the fundamental limitations inherent in the CMOS technology. While 0T1R configuration without any additional access transistor shows great advantages in improving the storage density, the leakage current and small operation window limit its application in large-scale arrays. In this work, phase change heterojunction based on GeTe and n-Si is fabricated to address those problems. The relationship between threshold voltage and doping concentration is investigated, and energy band diagrams and X-ray photoelectron spectroscopy measurements are provided to explain the results. The threshold voltage is modulated to provide a large operational window based on this relationship. The switching performance of the heterojunction is also tested, showing a good reverse characteristic, which could effectively decrease the leakage current. Furthermore, a reliable read-write-erase function is achieved during the tests. Phase change heterojunction is proposed for high-density memory, showing some notable advantages, such as modulated threshold voltage, large operational window, and low leakage current.

  8. High Efficient CMOS Class-E Power Amplifier with a New Output Power Control Scheme

    Directory of Open Access Journals (Sweden)

    MESHKIN Reza

    2013-05-01

    Full Text Available This paper presents the design of a novel RF power amplifier (PA with a new output power control scheme suitable for RF-ICs and portable systems. Employing a class-E amplifier as a drivertogether with soft-switching property of the main power stage switching mode class-E PA helps to achieve better efficiency and increases the capability of circuit integration. A new circuit scheme for efficient output power control is introduced in the proposed PAbased on the array of switches and compensated shunt capacitors with different sizes. This technique improves the Power-Added-Efficiency (PAE and its drop specially at lower output power levels in comparison with conventional power control methods. The layoutof the designed PA is made in 0.18um 1P6M CMOS process, and the chip area is 1.7mm2. simulation results show that the designed PA delivers 21.09dBm output power to a 50 standard load from a 1.8V supply voltage at 2.4GHz operating frequency with 57% PAE. Additionally, the output power of the PA is controlled with steps of 1-dBm by using the proposed array of switches and capacitors.

  9. Development of Fast and High Precision CMOS Pixel Sensors for an ILC Vertex Detector

    CERN Document Server

    Hu-Guo, Christine

    2010-01-01

    The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \\mu s read-out time. Its performances are quite close to the ILD vertex detector specifications, showing that the sensor architecture can presumably be evolved to meet these specifications exactly. Starting from the existing architecture and achieved performances, the paper will expose the details of how the sensor will be evolved in the coming 2-3 years in perspective of the ILD Detector Baseline Document, to be delivered in 2012. Two different devices are foreseen for this objective, one being optimized for the inner layers and their fast read-out requirement, while the other exploits the dimmed background in the outer layers to reduce the power consumption. The sensor evolution relies on a high resistivity epitaxial layer, on the use of an advanced CMOS process and on the combination of column-level ADCs with a pixel array. The paper will p...

  10. Bipolar high-repetition-rate high-voltage nanosecond pulser.

    Science.gov (United States)

    Tian, Fuqiang; Wang, Yi; Shi, Hongsheng; Lei, Qingquan

    2008-06-01

    The pulser designed is mainly used for producing corona plasma in waste water treatment system. Also its application in study of dielectric electrical properties will be discussed. The pulser consists of a variable dc power source for high-voltage supply, two graded capacitors for energy storage, and the rotating spark gap switch. The key part is the multielectrode rotating spark gap switch (MER-SGS), which can ensure wider range modulation of pulse repetition rate, longer pulse width, shorter pulse rise time, remarkable electrical field distortion, and greatly favors recovery of the gap insulation strength, insulation design, the life of the switch, etc. The voltage of the output pulses switched by the MER-SGS is in the order of 3-50 kV with pulse rise time of less than 10 ns and pulse repetition rate of 1-3 kHz. An energy of 1.25-125 J per pulse and an average power of up to 10-50 kW are attainable. The highest pulse repetition rate is determined by the driver motor revolution and the electrode number of MER-SGS. Even higher voltage and energy can be switched by adjusting the gas pressure or employing N(2) as the insulation gas or enlarging the size of MER-SGS to guarantee enough insulation level.

  11. Precision High-Voltage DC Dividers and Their Calibration

    Czech Academy of Sciences Publication Activity Database

    Dragounová, Naděžda

    2005-01-01

    Roč. 54, č. 5 (2005), s. 1911-1915 ISSN 0018-9456 R&D Projects: GA AV ČR KSK1048102; GA ČR GA202/03/0889 Keywords : calibration * dc voltage * high voltage (HV) Subject RIV: JA - Electronics ; Optoelectronics, Electrical Engineering Impact factor: 0.665, year: 2005

  12. High voltage short plus generation based on avalanche circuit

    International Nuclear Information System (INIS)

    Hu Yuanfeng; Yu Xiaoqi

    2006-01-01

    Simulate the avalanche circuit in series with PSPICE module, design the high voltage short plus generation circuit by avalanche transistor in series for the sweep deflection circuit of streak camera. The output voltage ranges 1.2 KV into 50 ohm load. The rise time of the circuit is less than 3 ns. (authors)

  13. COTS Li-Ion Cells in High Voltage Batteries

    Science.gov (United States)

    Davies, Francis; Darcy, Eric; Jeevarajan, Judy; Cowles, Phil

    2003-01-01

    Testing at NASA JSC and COMDEV shows that Commercial Off the Shelf (COTS) Li Ion cells can not be used in high voltage batteries safely without considering the voltage stresses that may be put on the protective devices in them during failure modes.

  14. Optically triggered high voltage switch network and method for switching a high voltage

    Energy Technology Data Exchange (ETDEWEB)

    El-Sharkawi, Mohamed A. (Renton, WA); Andexler, George (Everett, WA); Silberkleit, Lee I. (Mountlake Terrace, WA)

    1993-01-19

    An optically triggered solid state switch and method for switching a high voltage electrical current. A plurality of solid state switches (350) are connected in series for controlling electrical current flow between a compensation capacitor (112) and ground in a reactive power compensator (50, 50') that monitors the voltage and current flowing through each of three distribution lines (52a, 52b and 52c), which are supplying three-phase power to one or more inductive loads. An optical transmitter (100) controlled by the reactive power compensation system produces light pulses that are conveyed over optical fibers (102) to a switch driver (110') that includes a plurality of series connected optical triger circuits (288). Each of the optical trigger circuits controls a pair of the solid state switches and includes a plurality of series connected resistors (294, 326, 330, and 334) that equalize or balance the potential across the plurality of trigger circuits. The trigger circuits are connected to one of the distribution lines through a trigger capacitor (340). In each switch driver, the light signals activate a phototransistor (300) so that an electrical current flows from one of the energy reservoir capacitors through a pulse transformer (306) in the trigger circuit, producing gate signals that turn on the pair of serially connected solid state switches (350).

  15. Optically triggered high voltage switch network and method for switching a high voltage

    Science.gov (United States)

    El-Sharkawi, Mohamed A.; Andexler, George; Silberkleit, Lee I.

    1993-01-19

    An optically triggered solid state switch and method for switching a high voltage electrical current. A plurality of solid state switches (350) are connected in series for controlling electrical current flow between a compensation capacitor (112) and ground in a reactive power compensator (50, 50') that monitors the voltage and current flowing through each of three distribution lines (52a, 52b and 52c), which are supplying three-phase power to one or more inductive loads. An optical transmitter (100) controlled by the reactive power compensation system produces light pulses that are conveyed over optical fibers (102) to a switch driver (110') that includes a plurality of series connected optical triger circuits (288). Each of the optical trigger circuits controls a pair of the solid state switches and includes a plurality of series connected resistors (294, 326, 330, and 334) that equalize or balance the potential across the plurality of trigger circuits. The trigger circuits are connected to one of the distribution lines through a trigger capacitor (340). In each switch driver, the light signals activate a phototransistor (300) so that an electrical current flows from one of the energy reservoir capacitors through a pulse transformer (306) in the trigger circuit, producing gate signals that turn on the pair of serially connected solid state switches (350).

  16. Compact, Lightweight, High Voltage Propellant Isolators, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — TA&T, Inc. proposes an enabling fabrication process for high voltage isolators required in high power solar electric and nuclear electric propulsion (SEP and...

  17. Compact, Lightweight, High Voltage Propellant Isolators, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — TA&T, Inc. proposes an enabling fabrication process for high voltage isolators required in high power solar electric and nuclear electric propulsion (SEP and...

  18. Modular high-performance 2-μm CCD-BiCMOS process technology for application-specific image sensors and image sensor systems on a chip

    Science.gov (United States)

    Guidash, R. Michael; Lee, P. P. K.; Andrus, J. M.; Ciccarelli, Antonio S.; Erhardt, H. J.; Fischer, J. R.; Meisenzahl, Eric J.; Philbrick, Robert H.; Kenney, Timothy J.

    1995-04-01

    A 2 micrometers BiCMOS process module has been developed for incorporation into existing high performance 2-phase CCD processes, to enable integration of digital and analog circuits on- chip with the CCD image sensor. The modular process architecture allows the integration of CMOS, NPN bipolar or BiCMOS circuits without affecting the baseline CCD characteristics. A design of experiments approach was employed using process and device simulation tools and selected physical experiments, to optimize CMOS and NPN device performance and process latitude. Both enhancement and depletion mode Poly-1 and Poly-2 CMOS devices were realized and demonstrated good long channel behavior down to 1.6 micrometers drawn. A 12 V, 2.5 GHz, low collector resistance NPN was also produced. Experimental process splits were used to demonstrate and verify that the CMOS and NPN process module incorporation did not affect the CCD device characteristics or yield. CMOS circuit performance was found to be comparable to that of a standard 2 micrometers CMOS process. Finally, a trilinear sensor with on-chip timing generation and correlated double sample was designed and fabricated. To our knowledge this is the first demonstration of high performance CCD, 2 micrometers CMOS, and an isolated vertical NPN, integrated on the same chip.

  19. CMOS Transmitter using Pulse-Width Modulation Pre-Emphasis achieving 33dB Loss Compensation at 5-Gb/s

    NARCIS (Netherlands)

    Schrader, J.H.R.; Klumperink, Eric A.M.; Visschers, J.L.; Nauta, Bram

    2005-01-01

    A digital transmitter pre-emphasis technique is presented that is based on pulse-width modulation, instead of finite impulse response (FIR) filtering. The technique fits well to future high-speed low-voltage CMOS processes. A 0.13 /spl mu/m CMOS transmitter achieves more than 5 Gb/s (2-PAM) over 25

  20. CMOS Transmitter using Pulse-Width Modulation Pre-Emphasis achieving 33dB Loss Compensation at 5-Gb/s

    NARCIS (Netherlands)

    Schrader, J.H.R.; Klumperink, Eric A.M.; Visschers, J.L.; Nauta, Bram

    A digital transmitter pre-emphasis technique is presented that is based on pulse-width modulation, instead of finite impulse response (FIR) filtering. The technique fits well to future high-speed low-voltage CMOS processes. A 0.13 μm CMOS transmitter achieves more than 5 Gb/s (2-PAM) over 25 m of

  1. High-voltage air-core pulse transformers

    Energy Technology Data Exchange (ETDEWEB)

    Rohwein, G. J.

    1981-01-01

    General types of air core pulse transformers designed for high voltage pulse generation and energy transfer applications are discussed with special emphasis on pulse charging systems which operate up to the multi-megavolt range. The design, operation, dielectric materials, and performance are described. It is concluded that high voltage air core pulse transformers are best suited to applications outside the normal ranges of conventional magnetic core transformers. In general these include charge transfer at high power levels and fast pulse generation with comparatively low energy. When properly designed and constructed, they are capable of delivering high energy transfer efficiency and have demonstrated superior high voltage endurance. The principal disadvantage of high voltage air core transformers is that they are not generally available from commercial sources. Consequently, the potential user must become thoroughly familiar with all aspects of design, fabrication and system application before he can produce a high performance transformer system. (LCL)

  2. High dynamic range CMOS-based mammography detector for FFDM and DBT

    Science.gov (United States)

    Peters, Inge M.; Smit, Chiel; Miller, James J.; Lomako, Andrey

    2016-03-01

    Digital Breast Tomosynthesis (DBT) requires excellent image quality in a dynamic mode at very low dose levels while Full Field Digital Mammography (FFDM) is a static imaging modality that requires high saturation dose levels. These opposing requirements can only be met by a dynamic detector with a high dynamic range. This paper will discuss a wafer-scale CMOS-based mammography detector with 49.5 μm pixels and a CsI scintillator. Excellent image quality is obtained for FFDM as well as DBT applications, comparing favorably with a-Se detectors that dominate the X-ray mammography market today. The typical dynamic range of a mammography detector is not high enough to accommodate both the low noise and the high saturation dose requirements for DBT and FFDM applications, respectively. An approach based on gain switching does not provide the signal-to-noise benefits in the low-dose DBT conditions. The solution to this is to add frame summing functionality to the detector. In one X-ray pulse several image frames will be acquired and summed. The requirements to implement this into a detector are low noise levels, high frame rates and low lag performance, all of which are unique characteristics of CMOS detectors. Results are presented to prove that excellent image quality is achieved, using a single detector for both DBT as well as FFDM dose conditions. This method of frame summing gave the opportunity to optimize the detector noise and saturation level for DBT applications, to achieve high DQE level at low dose, without compromising the FFDM performance.

  3. High voltage performance of BARC-TIFR Pelletron Accelerator

    Energy Technology Data Exchange (ETDEWEB)

    Surendran, P.; Ansari, Q.N.; Nair, J.P., E-mail: surendra@tifr.res.in [Nuclear Physics Division, Bhabha Atomic Research Centre, Mumbai (India); and others

    2014-07-01

    The 14 UD Pelletron Accelerator at TIFR, Mumbai is operational since its inception in 1988. It was decided to impart enough time for high voltage conditioning to achieve higher operational voltage. Prior to this, comprehensive works such as replacing all the sputter ion pumps and Titanium sublimation pumps across the accelerator tube with new or refurbished ones and replacement of Alumina balls in the SF{sub 6} drier with fresh balls were carried out. High voltage conditioning of each module was done. Further conditioning of two modules at a time in overlapping mode improved the terminal voltage. As a result of this rigorous conditioning Terminal voltage of 12.6 MV was achieved and beam has been delivered to users at 12 MV terminal. Details of this effort will be presented in this paper. (author)

  4. High voltage performance of BARC-TIFR Pelletron Accelerator

    International Nuclear Information System (INIS)

    Surendran, P.; Ansari, Q.N.; Nair, J.P.

    2014-01-01

    The 14 UD Pelletron Accelerator at TIFR, Mumbai is operational since its inception in 1988. It was decided to impart enough time for high voltage conditioning to achieve higher operational voltage. Prior to this, comprehensive works such as replacing all the sputter ion pumps and Titanium sublimation pumps across the accelerator tube with new or refurbished ones and replacement of Alumina balls in the SF 6 drier with fresh balls were carried out. High voltage conditioning of each module was done. Further conditioning of two modules at a time in overlapping mode improved the terminal voltage. As a result of this rigorous conditioning Terminal voltage of 12.6 MV was achieved and beam has been delivered to users at 12 MV terminal. Details of this effort will be presented in this paper. (author)

  5. High voltage high repetition rate pulse using Marx topology

    Science.gov (United States)

    Hakki, A.; Kashapov, N.

    2015-06-01

    The paper describes Marx topology using MOSFET transistors. Marx circuit with 10 stages has been done, to obtain pulses about 5.5KV amplitude, and the width of the pulses was about 30μsec with a high repetition rate (PPS > 100), Vdc = 535VDC is the input voltage for supplying the Marx circuit. Two Ferrite ring core transformers were used to control the MOSFET transistors of the Marx circuit (the first transformer to control the charging MOSFET transistors, the second transformer to control the discharging MOSFET transistors).

  6. Mechanical Properties of Composites Used in High-Voltage Applications

    Directory of Open Access Journals (Sweden)

    Andreas Moser

    2016-07-01

    Full Text Available Materials used in high voltage applications have to meet a lot of regulations for their safety and functional usage during their lifetime. For high voltage applications the electrical properties are the most relevant designing criteria. However, the mechanical properties of such materials have rarely been considered for application dimensioning over the last decades. This article gives an overview of composite materials used in high voltage applications and some basic mechanical and thermo-mechanical characterization methods of such materials, including a discussion of influences on practically used epoxy based thermosets.

  7. The High Voltage Feedthroughs for the ATLAS Liquid Argon Calorimeters

    International Nuclear Information System (INIS)

    Botchev, B; Finocchiaro, G; Hoffman, J; McCarthy, R L; Rijssenbeek, M; Steffens, J; Talalaevskii, A; Thioye, M; Zdrazil, M; Farrell, J; Kan, S

    2007-01-01

    The purpose, design specifications, construction techniques, and testing methods are described for the high voltage feedthrough ports and filters of the ATLAS Liquid Argon calorimeters. These feedthroughs carry about 5000 high voltage wires from a room temperature environment (300 K) through the cryostat walls to the calorimeters cells (89 K) while maintaining the electrical and cryogenic integrity of the system. The feedthrough wiring and filters operate at a maximum high voltage of 2.5 kV without danger of degradation by corona discharges or radiation at the Large Hadron Collider

  8. Design of a Sub-Picosecond Jitter with Adjustable-Range CMOS Delay-Locked Loop for High-Speed and Low-Power Applications

    Directory of Open Access Journals (Sweden)

    Bilal I. Abdulrazzaq

    2016-09-01

    Full Text Available A Delay-Locked Loop (DLL with a modified charge pump circuit is proposed for generating high-resolution linear delay steps with sub-picosecond jitter performance and adjustable delay range. The small-signal model of the modified charge pump circuit is analyzed to bring forth the relationship between the DLL’s internal control voltage and output time delay. Circuit post-layout simulation shows that a 0.97 ps delay step within a 69 ps delay range with 0.26 ps Root-Mean Square (RMS jitter performance is achievable using a standard 0.13 µm Complementary Metal-Oxide Semiconductor (CMOS process. The post-layout simulation results show that the power consumption of the proposed DLL architecture’s circuit is 0.1 mW when the DLL is operated at 2 GHz.

  9. Integrated differential high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Farch, Kjartan

    2015-01-01

    In this paper an integrated differential high-voltage transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is designed and implemented in a 0.35 μm high-voltage process. Measurements are performed on the integrated circuit in order...... to assess its performance. The circuit generates pulses at differential voltage levels of 60V, 80V and 100 V, a frequency up to 5MHz and a measured driving strength of 1.75 V/ns with the CMUT connected. The total on-chip area occupied by the transmitting circuit is 0.18 mm2 and the power consumption...

  10. High-Speed Near Infrared Optical Receivers Based on Ge Waveguide Photodetectors Integrated in a CMOS Process

    Directory of Open Access Journals (Sweden)

    Gianlorenzo Masini

    2008-01-01

    Full Text Available We discuss our approach to monolithic intergration of Ge photodectors with CMOS electronics for high-speed optical transceivers. Receivers based on Ge waveguide photodetectors achieve a sensitivity of −14.2 dBm (10−12 bit error rate (BER at 10 Gbps and 1550 nm.

  11. An integrated low 1/f noise and high-sensitivity CMOS instrumentation amplifier for TMR sensors

    Science.gov (United States)

    Gao, Zhiqiang; Luan, Bo; Zhao, Jincai; Liu, Xiaowei

    2017-03-01

    In this paper, a very low 1/f noise integrated Wheatstone bridge magnetoresistive sensor ASIC based on magnetic tunnel junction (MTJ) technology is presented for high sensitivity measurements. The present CMOS instrumentation amplifier employs the gain-boost folded-cascode structure based on the capacitive-feedback chopper-stabilized technique. By chopping both the input and the output of the amplifier, combined with MTJ magnetoresistive sensitive elements, a noise equivalent magnetoresistance 1 nT/Hz1/2 at 2 Hz, the equivalent input noise spectral density 17 nV/Hz1/2(@2Hz) is achieved. The chip-scale package of the TMR sensor and the instrumentation amplifier is only about 5 mm × 5 mm × 1 mm, while the whole DC current dissipates only 2 mA.

  12. Experimental and theoretical performance analysis for a CMOS-based high resolution image detector

    Science.gov (United States)

    Jain, Amit; Bednarek, Daniel R.; Rudin, Stephen

    2014-03-01

    Increasing complexity of endovascular interventional procedures requires superior x-ray imaging quality. Present stateof- the-art x-ray imaging detectors may not be adequate due to their inherent noise and resolution limitations. With recent developments, CMOS based detectors are presenting an option to fulfill the need for better image quality. For this work, a new CMOS detector has been analyzed experimentally and theoretically in terms of sensitivity, MTF and DQE. The detector (Dexela Model 1207, Perkin-Elmer Co., London, UK) features 14-bit image acquisition, a CsI phosphor, 75 μm pixels and an active area of 12 cm x 7 cm with over 30 fps frame rate. This detector has two modes of operations with two different full-well capacities: high and low sensitivity. The sensitivity and instrumentation noise equivalent exposure (INEE) were calculated for both modes. The detector modulation-transfer function (MTF), noise-power spectra (NPS) and detective quantum efficiency (DQE) were measured using an RQA5 spectrum. For the theoretical performance evaluation, a linear cascade model with an added aliasing stage was used. The detector showed excellent linearity in both modes. The sensitivity and the INEE of the detector were found to be 31.55 DN/μR and 0.55 μR in high sensitivity mode, while they were 9.87 DN/μR and 2.77 μR in low sensitivity mode. The theoretical and experimental values for the MTF and DQE showed close agreement with good DQE even at fluoroscopic exposure levels. In summary, the Dexela detector's imaging performance in terms of sensitivity, linear system metrics, and INEE demonstrates that it can overcome the noise and resolution limitations of present state-of-the-art x-ray detectors.

  13. Transient phenomena due to disconnect switching in high voltage substations

    Energy Technology Data Exchange (ETDEWEB)

    Shuette, A. [Siemens AG, Erlangen (Germany); Rodrigo, H. [Royal Melbourne Institute of Technology, Melbourne (Australia). Dept. of Electrical Engineering

    1999-07-01

    Field measurements in a high voltage switchyard during disconnector switching is presented. These measurements are compared with those obtained in a model circuit, set up in our High Voltage laboratory. The need for electromagnetic compatibility in substation equipment, due to its electromagnetic interference is discussed. The level of overvoltage measured in the present work is discussed in the light of those available in the literature. (author)

  14. High-voltage pulsed transformer development

    Science.gov (United States)

    Freeman, B. L.; Rickel, D. G.; Ramrus, A.; Strickland, B. E.

    The theoretical designs for tape wound, step-up transformers reported by Freeman and Bostick were converted into physical units that were subjected to experimental testing. The physical design of these transformers is relatively simple and uses common materials. The winding is composed of copper foil and Kapton film. The impregnating fluids were fluorinert, propylene carbonate, and propylene carbonate with iron chloride. While several transformers were tested using a capacitor bank as the driver, most experiments have been driven with the 13.2 cm wide by 52.8 cm long plate generator. In these tests, both passive and active loads, ranging in impedance from 1.3 to 200 omega, were energized. Reliable operation to 500 kV was achieved with an associated voltage stress of less than or equal to 1.6 MV/cm. Effective coupling coefficients in the range of 0.85 to 0.92 were measured. Results of this testing and prospects for further improvement are presented.

  15. A 65 nm CMOS high efficiency 50 GHz VCO with regard to the coupling effect of inductors

    International Nuclear Information System (INIS)

    Ye Yu; Tian Tong

    2013-01-01

    A 50 GHz cross-coupled voltage controlled oscillator (VCO) considering the coupling effect of inductors based on a 65 nm standard complementary metal oxide semiconductor (CMOS) technology is reported. A pair of inductors has been fabricated, measured and analyzed to characterize the coupling effects of adjacent inductors. The results are then implemented to accurately evaluate the VCO's LC tank. By optimizing the tank voltage swing and the buffer's operation region, the VCO achieves a maximum efficiency of 11.4% by generating an average output power of 2.5 dBm while only consuming 19.7 mW (including buffers). The VCO exhibits a phase noise of −87 dBc/Hz at 1 MHz offset, leading to a figure of merit (FoM) of −167.5 dB/Hz and a tuning range of 3.8% (from 48.98 to 50.88 GHz). (semiconductor integrated circuits)

  16. A compact 100 kV high voltage glycol capacitor.

    Science.gov (United States)

    Wang, Langning; Liu, Jinliang; Feng, Jiahuai

    2015-01-01

    A high voltage capacitor is described in this paper. The capacitor uses glycerol as energy storage medium, has a large capacitance close to 1 nF, can hold off voltages of up to 100 kV for μs charging time. Allowing for low inductance, the capacitor electrode is designed as coaxial structure, which is different from the common structure of the ceramic capacitor. With a steady capacitance at different frequencies and a high hold-off voltage of up to 100 kV, the glycol capacitor design provides a potential substitute for the ceramic capacitors in pulse-forming network modulator to generate high voltage pulses with a width longer than 100 ns.

  17. High Voltage Bi-directional Flyback Converter for Capacitive Actuator

    DEFF Research Database (Denmark)

    Thummala, Prasanth; Zhang, Zhe; Andersen, Michael A. E.

    2013-01-01

    This paper presents a high voltage DC-DC converter topology for bi-directional energy transfer between a low voltage DC source and a high voltage capacitive load. The topology is a bi-directional flyback converter with variable switching frequency control during the charge mode, and constant...... switching frequency control during the discharge mode. The converter is capable of charging the capacitive load from 24 V DC source to 2.5 kV, and discharges it to 0 V. The flyback converter has been analyzed in detail during both charge and discharge modes, by considering all the parasitic elements...... in the converter, including the most dominating parameters of the high voltage transformer viz., self-capacitance and leakage inductance. The specific capacitive load for this converter is a dielectric electro active polymer (DEAP) actuator, which can be used as an effective replacement for conventional actuators...

  18. A compact, all solid-state LC high voltage generator.

    Science.gov (United States)

    Fan, Xuliang; Liu, Jinliang

    2013-06-01

    LC generator is widely applied in the field of high voltage generation technology. A compact and all solid-state LC high voltage generator based on saturable pulse transformer is proposed in this paper. First, working principle of the generator is presented. Theoretical analysis and circuit simulation are used to verify the design of the generator. Experimental studies of the proposed LC generator with two-stage main energy storage capacitors are carried out. And the results show that the proposed LC generator operates as expected. When the isolation inductance is 27 μH, the output voltage is 1.9 times larger than the charging voltage on single capacitor. The multiplication of voltages is achieved. On the condition that the primary energy storage capacitor is charged to 857 V, the output voltage of the generator can reach to 59.5 kV. The step-up ratio is nearly 69. When self breakdown gas gap switch is used as main switch, the rise time of the voltage pulse on load resistor is 8.7 ns. It means that the series-wound inductance in the discharging circuit is very small in this system. This generator can be employed in two different applications.

  19. Characterization and Modeling of High Power Microwave Effects in CMOS Microelectronics

    Science.gov (United States)

    2010-01-01

    margin measurement 28 Any voltage above the line marked VIH is considered a valid logic high on the input of the gate. VIH and VIL are defined...can handle any voltage noise level at the input up to VIL without changing state. The region in between VIL and VIH is considered an invalid logic...29 Table 2.2: Intrinsic device characteristics derived from SPETCRE simulations   VIH  (V)  VIL (V)  High Noise Margin  (V)  Low Noise Margin (V

  20. Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

    OpenAIRE

    Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.

    2017-01-01

    Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. Depleted fully monolithic CMOS pixels with fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which w...

  1. High Input Voltage, Silicon Carbide Power Processing Unit Performance Demonstration

    Science.gov (United States)

    Bozak, Karin E.; Pinero, Luis R.; Scheidegger, Robert J.; Aulisio, Michael V.; Gonzalez, Marcelo C.; Birchenough, Arthur G.

    2015-01-01

    A silicon carbide brassboard power processing unit has been developed by the NASA Glenn Research Center in Cleveland, Ohio. The power processing unit operates from two sources: a nominal 300 Volt high voltage input bus and a nominal 28 Volt low voltage input bus. The design of the power processing unit includes four low voltage, low power auxiliary supplies, and two parallel 7.5 kilowatt (kW) discharge power supplies that are capable of providing up to 15 kilowatts of total power at 300 to 500 Volts (V) to the thruster. Additionally, the unit contains a housekeeping supply, high voltage input filter, low voltage input filter, and master control board, such that the complete brassboard unit is capable of operating a 12.5 kilowatt Hall effect thruster. The performance of the unit was characterized under both ambient and thermal vacuum test conditions, and the results demonstrate exceptional performance with full power efficiencies exceeding 97%. The unit was also tested with a 12.5kW Hall effect thruster to verify compatibility and output filter specifications. With space-qualified silicon carbide or similar high voltage, high efficiency power devices, this would provide a design solution to address the need for high power electric propulsion systems.

  2. High Input Voltage, Silicon Carbide Power Processing Unit Performance Demonstration

    Science.gov (United States)

    Bozak, Karin E.; Pinero, Luis R.; Scheidegger, Robert J.; Aulisio, Michael V.; Gonzalez, Marcelo C.; Birchenough, Arthur G.

    2015-01-01

    A silicon carbide brassboard power processing unit has been developed by the NASA Glenn Research Center in Cleveland, Ohio. The power processing unit operates from two sources - a nominal 300-Volt high voltage input bus and a nominal 28-Volt low voltage input bus. The design of the power processing unit includes four low voltage, low power supplies that provide power to the thruster auxiliary supplies, and two parallel 7.5 kilowatt power supplies that are capable of providing up to 15 kilowatts of total power at 300-Volts to 500-Volts to the thruster discharge supply. Additionally, the unit contains a housekeeping supply, high voltage input filter, low voltage input filter, and master control board, such that the complete brassboard unit is capable of operating a 12.5 kilowatt Hall Effect Thruster. The performance of unit was characterized under both ambient and thermal vacuum test conditions, and the results demonstrate the exceptional performance with full power efficiencies exceeding 97. With a space-qualified silicon carbide or similar high voltage, high efficiency power device, this design could evolve into a flight design for future missions that require high power electric propulsion systems.

  3. A rugged 650 V SOI-based high-voltage half-bridge IGBT gate driver IC for motor drive applications

    Science.gov (United States)

    Hua, Qing; Li, Zehong; Zhang, Bo; Chen, Weizhong; Huang, Xiangjun; Feng, Yuxiang

    2015-05-01

    This paper proposes a rugged high-voltage N-channel insulated gate bipolar transistor (IGBT) gate driver integrated circuit. The device integrates a high-side and a low-side output stages on a single chip, which is designed specifically for motor drive applications. High-voltage level shift technology enables the high-side stage of this device to operate up to 650 V. The logic inputs are complementary metal oxide semiconductor (CMOS)/transistor transistor logic compatible down to 3.3 V. Undervoltage protection functionality with hysteresis characteristic has also been integrated to enhance the device reliability. The device is fabricated in a 1.0 μm, 650 V high-voltage bipolar CMOS double-diffused metal oxide semiconductor (BCD) on silicon-on-insulator (SOI) process. Deep trench dielectric isolation technology is employed to provide complete electrical isolation with advantages such as reduced parasitic effects, excellent noise immunity and low leakage current. Experimental results show that the isolation voltage of this device can be up to approximately 779 V at 25°C, and the leakage current is only 5 nA at 650 V, which is 15% higher and 67% lower than the conventional ones. In addition, it delivers an excellent thermal stability and needs very low quiescent current and offers a high gate driver capability which is needed to adequately drive IGBTs that have large input capacitances.

  4. On-Line High Dose-Rate Gamma Ray Irradiation Test of the CCD/CMOS Cameras

    Energy Technology Data Exchange (ETDEWEB)

    Cho, Jai Wan; Jeong, Kyung Min [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2012-05-15

    In this paper, test results of gamma ray irradiation to CCD/CMOS cameras are described. From the CAMS (containment atmospheric monitoring system) data of Fukushima Dai-ichi nuclear power plant station, we found out that the gamma ray dose-rate when the hydrogen explosion occurred in nuclear reactors 1{approx}3 is about 160 Gy/h. If assumed that the emergency response robot for the management of severe accident of the nuclear power plant has been sent into the reactor area to grasp the inside situation of reactor building and to take precautionary measures against releasing radioactive materials, the CCD/CMOS cameras, which are loaded with the robot, serve as eye of the emergency response robot. In the case of the Japanese Quince robot system, which was sent to carry out investigating the unit 2 reactor building refueling floor situation, 7 CCD/CMOS cameras are used. 2 CCD cameras of Quince robot are used for the forward and backward monitoring of the surroundings during navigation. And 2 CCD (or CMOS) cameras are used for monitoring the status of front-end and back-end motion mechanics such as flippers and crawlers. A CCD camera with wide field of view optics is used for monitoring the status of the communication (VDSL) cable reel. And another 2 CCD cameras are assigned for reading the indication value of the radiation dosimeter and the instrument. In the preceding assumptions, a major problem which arises when dealing with CCD/CMOS cameras in the severe accident situations of the nuclear power plant is the presence of high dose-rate gamma irradiation fields. In the case of the DBA (design basis accident) situations of the nuclear power plant, in order to use a CCD/CMOS camera as an ad-hoc monitoring unit in the vicinity of high radioactivity structures and components of the nuclear reactor area, a robust survivability of this camera in such intense gamma-radiation fields therefore should be verified. The CCD/CMOS cameras of various types were gamma irradiated at a

  5. Planar LTCC transformers for high voltage flyback converters: Part II.

    Energy Technology Data Exchange (ETDEWEB)

    Schofield, Daryl (NASCENTechnology, Inc., Watertown, SD); Schare, Joshua M., Ph.D.; Slama, George (NASCENTechnology, Inc., Watertown, SD); Abel, David (NASCENTechnology, Inc., Watertown, SD)

    2009-02-01

    This paper is a continuation of the work presented in SAND2007-2591 'Planar LTCC Transformers for High Voltage Flyback Converters'. The designs in that SAND report were all based on a ferrite tape/dielectric paste system originally developed by NASCENTechnoloy, Inc, who collaborated in the design and manufacturing of the planar LTCC flyback converters. The output/volume requirements were targeted to DoD application for hard target/mini fuzing at around 1500 V for reasonable primary peak currents. High voltages could be obtained but with considerable higher current. Work had begun on higher voltage systems and is where this report begins. Limits in material properties and processing capabilities show that the state-of-the-art has limited our practical output voltage from such a small part volume. In other words, the technology is currently limited within the allowable funding and interest.

  6. Design & Fabrication of a High-Voltage Photovoltaic Cell

    Energy Technology Data Exchange (ETDEWEB)

    Felder, Jennifer; /North Carolina State U. /SLAC

    2012-09-05

    Silicon photovoltaic (PV) cells are alternative energy sources that are important in sustainable power generation. Currently, applications of PV cells are limited by the low output voltage and somewhat low efficiency of such devices. In light of this fact, this project investigates the possibility of fabricating high-voltage PV cells on float-zone silicon wafers having output voltages ranging from 50 V to 2000 V. Three designs with different geometries of diffusion layers were simulated and compared in terms of metal coverage, recombination, built-in potential, and conduction current density. One design was then chosen and optimized to be implemented in the final device design. The results of the simulation serve as a feasibility test for the design concept and provide supportive evidence of the effectiveness of silicon PV cells as high-voltage power supplies.

  7. On-chip High-Voltage Generator Design

    CERN Document Server

    Tanzawa, Toru

    2013-01-01

    This book describes high-voltage generator design with switched-capacitor multiplier techniques.  The author provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators.  Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.   ·         Shows readers how to design charge pump circuits with lower voltage operation, higher power efficiency, and smaller circuit area; ·         Describes comprehensive circuits and systems design of on-chip high-voltage generators; ·         Covers all the component circuit blocks, including charge pumps, pump regulators, level shifters, oscillators, and references.

  8. A High-voltage Reference Testbed for the Evaluation of High-voltage Dividers for Pulsed Applications

    CERN Document Server

    Bastos, M Cerqueira; Bergman, A; 10.1109/CPEM.2010.5543408

    2010-01-01

    The design, evaluation and commissioning of a high voltage reference testbed for pulsed applications to be used in the precision testing of high voltage dividers is described. The testbed is composed of a pulsed power supply, a reference divider based on compressed gas capacitor technology and an acquisition system which makes use of the fast measurement capabilities of the HP 3458 DVM. Results of the evaluation of the reference system are presented.

  9. Back-illuminated voltage-domain global shutter CMOS image sensor with 3.75μm pixels and dual in-pixel storage nodes

    OpenAIRE

    Stark, Laurence; Raynor, J. M.; Lalanne, Frederic; Henderson, Robert

    2016-01-01

    A 1024x800 image sensor with voltage-domain global shutterpixels and dual in-pixel storage is implemented in a90nm/65nm back-illuminated (BSI) imaging process. Thepixel has a 3.75μm pitch, achieves -80dB PLS operating in itscorrelated double sampling mode and has a maximumdynamic range in its high-dynamic range imaging mode of102dB.

  10. Temperature Stabilized Characterization of High Voltage Power Supplies

    CERN Document Server

    Krarup, Ole

    2017-01-01

    High precision measurements of the masses of nuclear ions in the ISOLTRAP experiment relies on an MR-ToF. A major source of noise and drift is the instability of the high voltage power supplies employed. Electrical noise and temperature changes can broaden peaks in time-of-flight spectra and shift the position of peaks between runs. In this report we investigate how the noise and drift of high-voltage power supplies can be characterized. Results indicate that analog power supplies generally have better relative stability than digitally controlled ones, and that the high temperature coefficients of all power supplies merit efforts to stabilize them.

  11. High voltage switch triggered by a laser-photocathode subsystem

    Science.gov (United States)

    Chen, Ping; Lundquist, Martin L.; Yu, David U. L.

    2013-01-08

    A spark gap switch for controlling the output of a high voltage pulse from a high voltage source, for example, a capacitor bank or a pulse forming network, to an external load such as a high gradient electron gun, laser, pulsed power accelerator or wide band radar. The combination of a UV laser and a high vacuum quartz cell, in which a photocathode and an anode are installed, is utilized as triggering devices to switch the spark gap from a non-conducting state to a conducting state with low delay and low jitter.

  12. PC-based control of a high-voltage injector

    International Nuclear Information System (INIS)

    Constantin, F.

    1998-01-01

    The stability of high voltage injectors is one of the major problems in any accelerator system. Most of the troubles encountered in the normal operation of an accelerator are connected with the ion source and associated high voltage platforms, regardless of the source or high voltage generator type. The quality of the ion beam injected in the accelerator strongly depends on the power supplies used in the injector and on the ability to control the non-electrical parameters (gas-flow, temperature, etc.). A wide used method in controlling is based on optical links between high-voltage platform and computer, the adjustments being more or less automated. Although the method mentioned above can be still useful in injector control, a different approach is presented in this work, i.e., the computer itself is placed inside the high-voltage terminal. Only one optical link is still necessary to connect this computer with an user-friendly host at ground potential. Requirements: - varying and monitoring the filament current; - gas flow control in the ion source; - reading the vacuum values; - current and voltage control for the anodic, magnet, extraction, suppression and lens' sources. Even in the high voltage terminal there are compartments with different voltages regardless the floating ground. In our injector the extraction voltage is applied on the top of the ion source including the filament and the anodic voltage. The extraction voltage is of maximum 30 kV. In this situation a second optical link is required to transfer the control for the anodic and magnet source power supply assuming the dedicated computer on the floating ground. One PC is placed inside the high voltage terminal and one PC outside the injector. The optical link (more precisely two optical wires) connects the serial ports. The inside computer is equipped with two multipurpose ADC/DAC and digital I/O card. They permit to read or output DC levels ranging between 0 to 10 volts or TTL signals. The filament

  13. E-beam high voltage switching power supply

    Science.gov (United States)

    Shimer, Daniel W.; Lange, Arnold C.

    1997-01-01

    A high power, solid state power supply is described for producing a controllable, constant high voltage output under varying and arcing loads suitable for powering an electron beam gun or other ion source. The present power supply is most useful for outputs in a range of about 100-400 kW or more. The power supply is comprised of a plurality of discrete switching type dc-dc converter modules, each comprising a voltage regulator, an inductor, an inverter for producing a high frequency square wave current of alternating polarity, an improved inverter voltage clamping circuit, a step up transformer, and an output rectifier for producing a dc voltage at the output of each module. The inputs to the converter modules are fed from a common dc rectifier/filter and are linked together in parallel through decoupling networks to suppress high frequency input interactions. The outputs of the converter modules are linked together in series and connected to the input of the transmission line to the load through a decoupling and line matching network. The dc-dc converter modules are phase activated such that for n modules, each module is activated equally 360.degree./n out of phase with respect to a successive module. The phased activation of the converter modules, combined with the square current waveforms out of the step up transformers, allows the power supply to operate with greatly reduced output capacitance values which minimizes the stored energy available for discharge into an electron beam gun or the like during arcing. The present power supply also provides dynamic response to varying loads by controlling the voltage regulator duty cycle using simulated voltage feedback signals and voltage feedback loops. Circuitry is also provided for sensing incipient arc currents reflected at the output of the power supply and for simultaneously decoupling the power supply circuitry from the arcing load.

  14. E-beam high voltage switching power supply

    International Nuclear Information System (INIS)

    Shimer, D.W.; Lange, A.C.

    1997-01-01

    A high power, solid state power supply is described for producing a controllable, constant high voltage output under varying and arcing loads suitable for powering an electron beam gun or other ion source. The present power supply is most useful for outputs in a range of about 100-400 kW or more. The power supply is comprised of a plurality of discrete switching type dc-dc converter modules, each comprising a voltage regulator, an inductor, an inverter for producing a high frequency square wave current of alternating polarity, an improved inverter voltage clamping circuit, a step up transformer, and an output rectifier for producing a dc voltage at the output of each module. The inputs to the converter modules are fed from a common dc rectifier/filter and are linked together in parallel through decoupling networks to suppress high frequency input interactions. The outputs of the converter modules are linked together in series and connected to the input of the transmission line to the load through a decoupling and line matching network. The dc-dc converter modules are phase activated such that for n modules, each module is activated equally 360 degree/n out of phase with respect to a successive module. The phased activation of the converter modules, combined with the square current waveforms out of the step up transformers, allows the power supply to operate with greatly reduced output capacitance values which minimizes the stored energy available for discharge into an electron beam gun or the like during arcing. The present power supply also provides dynamic response to varying loads by controlling the voltage regulator duty cycle using simulated voltage feedback signals and voltage feedback loops. Circuitry is also provided for sensing incipient arc currents reflected at the output of the power supply and for simultaneously decoupling the power supply circuitry from the arcing load. 7 figs

  15. Pulsed high voltage discharge induce hematologic changes

    African Journals Online (AJOL)

    STORAGESEVER

    2009-10-19

    Oct 19, 2009 ... (2004) Shows that high intensity ultrasonic-induced cavitation, which is responsible for platelet rupture that leads to platelet aggregation in samples of platelet rich plasma (PRP) alone. Ultrasonic induced bulk fluid flow is necessary to mix platelet- activating factors and to allow platelet-platelet interac- tions.

  16. High-Voltage Aqueous Magnesium Ion Batteries.

    Science.gov (United States)

    Wang, Fei; Fan, Xiulin; Gao, Tao; Sun, Wei; Ma, Zhaohui; Yang, Chongyin; Han, Fudong; Xu, Kang; Wang, Chunsheng

    2017-10-25

    Nonaqueous rechargeable magnesium (Mg) batteries suffer from the complicated and moisture-sensitive electrolyte chemistry. Besides electrolytes, the practicality of a Mg battery is also confined by the absence of high-performance electrode materials due to the intrinsically slow Mg 2+ diffusion in the solids. In this work, we demonstrated a rechargeable aqueous magnesium ion battery (AMIB) concept of high energy density, fast kinetics, and reversibility. Using a superconcentration approach we expanded the electrochemical stability window of the aqueous electrolyte to 2.0 V. More importantly, two new Mg ion host materials, Li superconcentration approach we expanded the electrochemical stability window of the aqueous electrolyte to 2.0 V. More importantly, two new Mg ion host materials, Li 3 V 2 (PO 4 ) 3 and poly pyromellitic dianhydride, were developed and employed as cathode and anode electrodes, respectively. Based on comparisons of the aqueous and nonaqueous systems, the role of water is identified to be critical in the Mg ion mobility in the intercalation host but remaining little detrimental to its non-diffusion controlled process. Compared with the previously reported Mg ion cell delivers an unprecedented high power density of 6400 W kg ion cell delivers an unprecedented high power density of 6400 W kg while retaining 92% of the initial capacity after 6000 cycles, pushing the Mg ion cell to a brand new stage.

  17. High-voltage pulsed generator for dynamic fragmentation of rocks

    Science.gov (United States)

    Kovalchuk, B. M.; Kharlov, A. V.; Vizir, V. A.; Kumpyak, V. V.; Zorin, V. B.; Kiselev, V. N.

    2010-10-01

    A portable high-voltage (HV) pulsed generator has been designed for rock fragmentation experiments. The generator can be used also for other technological applications. The installation consists of low voltage block, HV block, coaxial transmission line, fragmentation chamber, and control system block. Low voltage block of the generator, consisting of a primary capacitor bank (300 μF) and a thyristor switch, stores pulse energy and transfers it to the HV block. The primary capacitor bank stores energy of 600 J at the maximum charging voltage of 2 kV. HV block includes HV pulsed step up transformer, HV capacitive storage, and two electrode gas switch. The following technical parameters of the generator were achieved: output voltage up to 300 kV, voltage rise time of ˜50 ns, current amplitude of ˜6 kA with the 40 Ω active load, and ˜20 kA in a rock fragmentation regime (with discharge in a rock-water mixture). Typical operation regime is a burst of 1000 pulses with a frequency of 10 Hz. The operation process can be controlled within a wide range of parameters. The entire installation (generator, transmission line, treatment chamber, and measuring probes) is designed like a continuous Faraday's cage (complete shielding) to exclude external electromagnetic perturbations.

  18. High-voltage pulsed generator for dynamic fragmentation of rocks.

    Science.gov (United States)

    Kovalchuk, B M; Kharlov, A V; Vizir, V A; Kumpyak, V V; Zorin, V B; Kiselev, V N

    2010-10-01

    A portable high-voltage (HV) pulsed generator has been designed for rock fragmentation experiments. The generator can be used also for other technological applications. The installation consists of low voltage block, HV block, coaxial transmission line, fragmentation chamber, and control system block. Low voltage block of the generator, consisting of a primary capacitor bank (300 μF) and a thyristor switch, stores pulse energy and transfers it to the HV block. The primary capacitor bank stores energy of 600 J at the maximum charging voltage of 2 kV. HV block includes HV pulsed step up transformer, HV capacitive storage, and two electrode gas switch. The following technical parameters of the generator were achieved: output voltage up to 300 kV, voltage rise time of ∼50 ns, current amplitude of ∼6 kA with the 40 Ω active load, and ∼20 kA in a rock fragmentation regime (with discharge in a rock-water mixture). Typical operation regime is a burst of 1000 pulses with a frequency of 10 Hz. The operation process can be controlled within a wide range of parameters. The entire installation (generator, transmission line, treatment chamber, and measuring probes) is designed like a continuous Faraday's cage (complete shielding) to exclude external electromagnetic perturbations.

  19. High voltage diagnostics on electrical insulation of supersonducting magnets

    International Nuclear Information System (INIS)

    Irmisch, M.

    1995-12-01

    The high voltage (HV) performance of superconducting magnets of large dimensions, e.g. as needed in fusion reactors, is a challange in the field of high voltage technology, i.e. especially in the field of cryogenic high voltage components and with respect to questions of HV insulation diagnostics at low temperature. By using the development of POLO - a superconducting prototype coil of a tokamak poloidal field coil - as an example, this work deals with special problems of how to get use of conventional HV test techniques for diagnostics under special cryogenic boundary conditions. As a first approach to gain experience in the field of phase resolved partial discharge (PRPD) measurements during operation of a superconductive coil, the POLO coil was subject to several high voltage tests. Compared with DC insulation resistance measurements and capacitive impulse voltage discharges to the coil, the AC PD measurements have been the only way to observe special characteristics of the electrical insulation with respect to the cooling down of the coil from 300 K to 4.2 K. The PRPD measurement technique thereby has proofed as a suitable diagnostic tool. This work can serve as basic data to be comparable within further projects of electrical insulation diagnostics at cryogenic temperatures. (orig.)

  20. High-resolution three-dimensional imaging of a depleted CMOS sensor using an edge Transient Current Technique based on the Two Photon Absorption process (TPA-eTCT)

    Energy Technology Data Exchange (ETDEWEB)

    García, Marcos Fernández; Sánchez, Javier González; Echeverría, Richard Jaramillo [Instituto de Física de Cantabria (CSIC-UC), Avda. los Castros s/n, E-39005 Santander (Spain); Moll, Michael [CERN, Organisation europénne pour la recherche nucléaire, CH-1211 Genéve 23 (Switzerland); Santos, Raúl Montero [SGIker Laser Facility, UPV/EHU, Sarriena, s/n - 48940 Leioa-Bizkaia (Spain); Moya, David [Instituto de Física de Cantabria (CSIC-UC), Avda. los Castros s/n, E-39005 Santander (Spain); Pinto, Rogelio Palomo [Departamento de Ingeniería Electrónica, Escuela Superior de Ingenieros Universidad de Sevilla (Spain); Vila, Iván [Instituto de Física de Cantabria (CSIC-UC), Avda. los Castros s/n, E-39005 Santander (Spain)

    2017-02-11

    For the first time, the deep n-well (DNW) depletion space of a High Voltage CMOS sensor has been characterized using a Transient Current Technique based on the simultaneous absorption of two photons. This novel approach has allowed to resolve the DNW implant boundaries and therefore to accurately determine the real depleted volume and the effective doping concentration of the substrate. The unprecedented spatial resolution of this new method comes from the fact that measurable free carrier generation in two photon mode only occurs in a micrometric scale voxel around the focus of the beam. Real three-dimensional spatial resolution is achieved by scanning the beam focus within the sample.

  1. High-resolution three-dimensional imaging of a depleted CMOS sensor using an edge Transient Current Technique based on the Two Photon Absorption process (TPA-eTCT)

    CERN Document Server

    García, Marcos Fernández; Echeverría, Richard Jaramillo; Moll, Michael; Santos, Raúl Montero; Moya, David; Pinto, Rogelio Palomo; Vila, Iván

    2016-01-01

    For the first time, the deep n-well (DNW) depletion space of a High Voltage CMOS sensor has been characterized using a Transient Current Technique based on the simultaneous absorption of two photons. This novel approach has allowed to resolve the DNW implant boundaries and therefore to accurately determine the real depleted volume and the effective doping concentration of the substrate. The unprecedented spatial resolution of this new method comes from the fact that measurable free carrier generation in two photon mode only occurs in a micrometric scale voxel around the focus of the beam. Real three-dimensional spatial resolution is achieved by scanning the beam focus within the sample.

  2. Design and realization of high voltage disconnector condition monitoring system

    Science.gov (United States)

    Shi, Jinrui; Xu, Tianyang; Yang, Shuixian; Li, Buoyang

    2017-08-01

    The operation status of the high voltage disconnector directly affects the safe and stable operation of the power system. This article uses the wireless frequency hopping communication technology of the communication module to achieve the temperature acquisition of the switch contacts and high voltage bus, to introduce the current value of the loop in ECS, and judge the operation status of the disconnector by considering the ambient temperature, calculating the temperature rise; And through the acquisition of the current of drive motor in the process of switch closing and opening, and fault diagnosis of the disconnector by analyzing the change rule of the drive motor current, the condition monitoring of the high voltage disconnector is realized.

  3. High-Voltage Multiplexing for ATLAS ITk

    CERN Document Server

    Hommels, Bart; The ATLAS collaboration

    2017-01-01

    The High Luminosity upgrade to the Large Hadron Collider (HL-LHC) requires a replacement of the present ATLAS inner tracker with an all-silicon inner tracker (ITk). The outer radii of the ITk will consist of groups of silicon strip sensors mounted on common support structures. Lack of space for additional cabling will require groups of sensors to share a common HV bus (-500 V). This creates a need to remotely disable a failing sensor from the common HV bus to permit continued operation of the other sensors. We have developed circuitry consisting of a Gallium Nitride Field-Effect transistor (GaNFET) and a HV Multiplier circuit to disable a failed sensor. The devices have been shown to survive radiation doses as high as 1 x 1016 neutrons/cm2 and ionizing doses over 200 Mrad. We will present the HV Mux circuitry and show irradiation results on individual components with an emphasis on the GaNFET results with neutrons, protons, pions, and gammas. We will present a dual-stage variation of the HV Mux that will perm...

  4. A low-power, high-speed, 9-channel germanium-silicon electro-absorption modulator array integrated with digital CMOS driver and wavelength multiplexer.

    Science.gov (United States)

    Krishnamoorthy, A V; Zheng, X; Feng, D; Lexau, J; Buckwalter, J F; Thacker, H D; Liu, F; Luo, Y; Chang, E; Amberg, P; Shubin, I; Djordjevic, S S; Lee, J H; Lin, S; Liang, H; Abed, A; Shafiiha, R; Raj, K; Ho, R; Asghari, M; Cunningham, J E

    2014-05-19

    We demonstrate the first germanium-silicon C-band electro-absorption based waveguide modulator array and echelle-grating-based silicon wavelength multiplexer integrated with a digital CMOS driver circuit. A 9-channel, 10Gbps SiGe electro-absorption wavelength-multiplexed modulator array consumed a power of 5.8mW per channel while being modulated at 10.25Gbps by 40nm CMOS drivers delivering peak-to-peak voltage swings of 2V, achieving a modulation energy-efficiency of ~570fJ/bit including drivers. Performance up to 25Gbps on a single-channel SiGe modulator and CMOS driver is also reported.

  5. On some aspects of high voltage electron microscopy

    International Nuclear Information System (INIS)

    Jouffrey, B.; Trinquier, J.

    1987-01-01

    The present paper deals with high voltage electron microscopy (HVEM). It is an overview on this domain due to the pionneer work of G. Dupouy which has permitted to perform a new kind of electron microscopy. Since this time, HVEM has shown its interest in high resolution, irradiations, chemical analysis, in situ experiments

  6. Integrated High Resolution Digital Color Light Sensor in 130 nm CMOS Technology

    Directory of Open Access Journals (Sweden)

    Drago Strle

    2015-07-01

    Full Text Available This article presents a color light detection system integrated in 130 nm CMOS technology. The sensors and corresponding electronics detect light in a CIE XYZ color luminosity space using on-chip integrated sensors without any additional process steps, high-resolution analog-to-digital converter, and dedicated DSP algorithm. The sensor consists of a set of laterally arranged integrated photodiodes that are partly covered by metal, where color separation between the photodiodes is achieved by lateral carrier diffusion together with wavelength-dependent absorption. A high resolution, hybrid, ∑∆ ADC converts each photo diode’s current into a 22-bit digital result, canceling the dark current of the photo diodes. The digital results are further processed by the DSP, which calculates normalized XYZ or RGB color and intensity parameters using linear transformations of the three photo diode responses by multiplication of the data with a transformation matrix, where the coefficients are extracted by training in combination with a pseudo-inverse operation and the least-mean square approximation. The sensor system detects the color light parameters with 22-bit accuracy, consumes less than 60 μA on average at 10 readings per second, and occupies approx. 0.8 mm2 of silicon area (including three photodiodes and the analog part of the ADC. The DSP is currently implemented on FPGA.

  7. High voltage pulsed cable design: a practical example

    Energy Technology Data Exchange (ETDEWEB)

    Kewish, R.W. Jr.; Boicourt, G.P.

    1979-01-01

    The design of optimum high voltage pulse cable is difficult because very little emperical data are available on performance in pulsed applications. This paper follows the design and testing of one high voltage pulse cable, 40/100 trigger cable. The design was based on an unproven theory and the impressive outcome lends support to the theory. The theory is outlined and it is shown that there exists an inductance which gives a cable of minimum size for a given maximum stress. Test results on cable manufactured according to the design are presented and compared with the test results on the cable that 40/100 replaces.

  8. The research of high voltage switchgear detecting unit

    Science.gov (United States)

    Ji, Tong; Xie, Wei; Wang, Xiaoqing; Zhang, Jinbo

    2017-07-01

    In order to understand the status of the high voltage switch in the whole life circle, you must monitor the mechanical and electrical parameters that affect device health. So this paper gives a new high voltage switchgear detecting unit based on ARM technology. It can measure closing-opening mechanical wave, storage motor current wave and contactor temperature to judge the device’s health status. When something goes wrong, it can be on alert and give some advice. The practice showed that it can meet the requirements of circuit breaker mechanical properties temperature online detection.

  9. A 0.13$\\mu$m CMOS technology Its radiation hardness and its application in high energy physics experiments

    CERN Document Server

    Hänsler, Kurt

    2004-01-01

    Radiation hardness is a major concern for electronics in high luminosity colliders for high energy physics (HEP). For several years, the HEP community has studied and evaluated radiation hard technologies suitable for the development of analog, digital, and mixed signal application specific integrated circuits. The European Organization for Nuclear Research (CERN) uses currently extensively a commercial 0.25μm complementary metal oxide semiconductor (CMOS) technology for the custom-developed integrated circuits for instrumentation in the Large Hadron Collider. This technology has been carefully evaluated in the past and several measures have been taken to assert the radiation hardness of its applications. To explore the benefits of more advanced technologies, to stay in line with technology progress and in order to prepare for a phase out of this quarter micron technology, a 0.13μm CMOS technology has been analyzed. This thesis outlines, after a theoretical introduction into the fields of ra...

  10. Development of ultra-light pixelated systems based on CMOS sensors for future high precision vertex detectors

    Energy Technology Data Exchange (ETDEWEB)

    Winter, Marc [Institut Pluridisciplinaire Hubert Curien - IPHC, 23 rue du loess - BP28, 67037 Strasbourg cedex 2 (France)

    2010-07-01

    CMOS pixel sensors have demonstrated attractive performances in terms of spatial resolution and material budget. The recent emergence of high resistivity substrates in mass production CMOS processes has originated particularly high signal-to-noise ratios and improved the non-ionising radiation tolerance to fluences close to 10{sup 14} Neq/cm{sup 2}. These achievements, obtained with MIMOSA sensors developed at IPHC (Strasbourg) and IRFU (Saclay) will be overviewed and put in perspective of the numerous applications of the sensors. These include collider experiments at RHIC, LHC, ILC and CLIC. The development of ultra-light ladders composed of these sensors and featuring 0.1% to 0.3% of radiation length, will be summarised. The contribution to the conference will also address the evolution of these pixelated systems, including on-going R on multi-tier sensors exploiting vertical integration technologies. (author)

  11. Diagnosis of High Voltage Insulators Made of Ceramic Using Spectrophotometry

    Directory of Open Access Journals (Sweden)

    Paweł Frącz

    2016-01-01

    Full Text Available The paper presents results of comparative analysis of optical signals emitted by partial discharges occurring on three types of high voltage insulators made of porcelain. The research work consisted of diagnosis of the following devices: a long rod insulator, a cap insulator, and an insulating cylinder. For optical signal registration a spectrophotometer was applied. All measurements were performed under laboratory conditions by changing the value of partial discharges generation voltage. For the cylindrical insulator also the distance between high voltage and ground electrodes was subjected for investigation as a factor having influence on partial discharges. The main contribution which resulted from the studies is statement that application of spectrophotometer enables faster recognition of partial discharges, as compared to standard methods.

  12. High Voltage Operation of Helical Pulseline Structures for Ion Acceleration

    CERN Document Server

    Waldron, William; Reginato, Lou

    2005-01-01

    The basic concept for the acceleration of heavy ions using a helical pulseline requires the launching of a high voltage traveling wave with a waveform determined by the beam transport physics in order to maintain stability and acceleration.* This waveform is applied to the front of the helix, creating over the region of the ion bunch a constant axial acceleration electric field that travels down the line in synchronism with the ions. Several methods of driving the helix have been considered. Presently, the best method of generating the waveform and also maintaining the high voltage integrity appears to be a transformer primary loosely coupled to the front of the helix, generating the desired waveform and achieving a voltage step-up from primary to secondary (the helix). This can reduce the drive voltage that must be brought into the helix enclosure through the feedthroughs by factors of 5 or more. The accelerating gradient is limited by the voltage holding of the vacuum insulator, and the material and helix g...

  13. High-voltage, high-current, solid-state closing switch

    Energy Technology Data Exchange (ETDEWEB)

    Focia, Ronald Jeffrey

    2017-08-22

    A high-voltage, high-current, solid-state closing switch uses a field-effect transistor (e.g., a MOSFET) to trigger a high-voltage stack of thyristors. The switch can have a high hold-off voltage, high current carrying capacity, and high time-rate-of-change of current, di/dt. The fast closing switch can be used in pulsed power applications.

  14. A low-noise wide dynamic range CMOS image sensor with low and high temperatures resistance

    Science.gov (United States)

    Mizobuchi, Koichi; Adachi, Satoru; Tejada, Jose; Oshikubo, Hiromichi; Akahane, Nana; Sugawa, Shigetoshi

    2008-02-01

    A temperature-resistant 1/3 inch SVGA (800×600 pixels) 5.6 μm pixel pitch wide-dynamic-range (WDR) CMOS image sensor has been developed using a lateral-over-flow-integration-capacitor (LOFIC) in a pixel. The sensor chips are fabricated through 0.18 μm 2P3M process with totally optimized front-end-of-line (FEOL) & back-end-of-line (BEOL) for a lower dark current. By implementing a low electrical field potential design for photodiodes, reducing damages, recovering crystal defects and terminating interface states in the FEOL+BEOL, the dark current is improved to 12 e - /pixel-sec at 60 deg.C with 50% reduction from the previous very-low-dark-current (VLDC) FEOL and its contribution to the temporal noise is improved. Furthermore, design optimizations of the readout circuits, especially a signal-and noise-hold circuit and a programmable-gain-amplifier (PGA) are also implemented. The measured temporal noise is 2.4 e -rms at 60 fps (:36 MHz operation). The dynamic-range (DR) is extended to 100 dB with 237 ke - full well capacity. In order to secure the temperature-resistance, the sensor chip also receives both an inorganic cap onto micro lens and a metal hermetic seal package assembly. Image samples at low & high temperatures show significant improvement in image qualities.

  15. A Digitally Dynamic Power Supply Technique for 16-Channel 12 V-Tolerant Stimulator Realized in a 0.18- μm 1.8-V/3.3-V Low-Voltage CMOS Process.

    Science.gov (United States)

    Luo, Zhicong; Ker, Ming-Dou; Yang, Tzu-Yi; Cheng, Wan-Hsueh

    2017-10-01

    A new digitally dynamic power supply technique for 16-channel 12-V-tolerant stimulator is proposed and realized in a 0.18-μm 1.8-V/3.3-V CMOS process. The proposed stimulator uses four stacked transistors as the pull-down switch and pull-up switch to withstand 4 times the nominal supply voltage (4 × V DD ). With the dc input voltage of 3.3 V, the regulated three-stage charge pump, which is capable of providing 11.3-V voltage at 3-mA loading current, achieves dc conversion efficiency of up to 69% with 400-pF integrated capacitance. Power consumption is reduced by implementing the regulated charge pump to provide a dynamic dc output voltage with a 0.5-V step. The proposed digitally dynamic power supply technique, which is implemented by using a p-type metal oxide semiconductor (PMOS) inverter with pull-down current source and digital controller, greatly improves the power efficiency of a system. The silicon area of the stimulator is approximately 3.5 mm 2 for a 16-channel implementation. The functionalities of the proposed stimulator have been successfully verified through animal test.

  16. Ozon Generation During High Voltage Leak Detection. Fiction or Reality?

    Science.gov (United States)

    Becker, Sophie; Bickert, Dr Volker; Reimers, Kai; Becker, Dr Martin

    2018-02-14

    In order to further clarify if and how much Ozone is generated during HVLD and to identify measures to reduce the impact of Ozone generation on product quality a highly sensitive analytical system [4] was employed to investigate the generation of Ozone at different operational conditions of HVLD integrity testing. The analytical system is based on oxidation of Iodide ions in solution and identification of the Iodine formed by N, N-Diethyl-p-phenylendiamine (DPD) according to DIN 38403 [4].Sensitivity of the system was found suitable to detect Ozone levels as low as 0.025 ppm (mg/l). HVLD process parameters inspection speed, high voltage, filling level of the ampoule and exposure time to the ampoule to high voltage were varied between maximum and minimum values ap-plicable in integrity testing of different ampoule sizes. For variation of exposure time ampoules were repetitively tested by the leak testing machine to acchive a maximum exposure time of the ampoule up to 24 sec (exposure time during production detected during the study under all inspection conditions. Even repeated exposure of the ampoules to high voltage leak detection did not result in generation of measurable Ozone levels. It has to be concluded that high voltage leak detection is not prone to cause oxidation of the drug products. Copyright © 2018, Parenteral Drug Association.

  17. Ultra-compact Marx-type high-voltage generator

    Science.gov (United States)

    Goerz, David A.; Wilson, Michael J.

    2000-01-01

    An ultra-compact Marx-type high-voltage generator includes individual high-performance components that are closely coupled and integrated into an extremely compact assembly. In one embodiment, a repetitively-switched, ultra-compact Marx generator includes low-profile, annular-shaped, high-voltage, ceramic capacitors with contoured edges and coplanar extended electrodes used for primary energy storage; low-profile, low-inductance, high-voltage, pressurized gas switches with compact gas envelopes suitably designed to be integrated with the annular capacitors; feed-forward, high-voltage, ceramic capacitors attached across successive switch-capacitor-switch stages to couple the necessary energy forward to sufficiently overvoltage the spark gap of the next in-line switch; optimally shaped electrodes and insulator surfaces to reduce electric field stresses in the weakest regions where dissimilar materials meet, and to spread the fields more evenly throughout the dielectric materials, allowing them to operate closer to their intrinsic breakdown levels; and uses manufacturing and assembly methods to integrate the capacitors and switches into stages that can be arranged into a low-profile Marx generator.

  18. Studies for a 10{mu}s, thin, high resolution CMOS pixel sensor for future vertex detectors

    Energy Technology Data Exchange (ETDEWEB)

    Voutsinas, G. [IPHC/IN2P3/CNRS and Universite de Strasbourg, Strasbourg (France); Amar-Youcef, S. [IFK, Goethe-Universitaet, Frankfurt am Main (Germany); Baudot, J.; Bertolone, G.; Brogna, A.; Chon-Sen, N.; Claus, G.; Colledani, C.; Dorokhov, A.; Doziere, G.; Dulinski, W. [IPHC/IN2P3/CNRS and Universite de Strasbourg, Strasbourg (France); Degerli, Y. [IRFU / SEDI (CEA) Saclay (France); De Masi, R. [IPHC/IN2P3/CNRS and Universite de Strasbourg, Strasbourg (France); Deveaux, M. [IFK, Goethe-Universitaet, Frankfurt am Main (Germany); Gelin, M.; Goffe, M.; Hu-Guo, Ch.; Himmi, A.; Jaaskelainen, K.; Koziel, M. [IPHC/IN2P3/CNRS and Universite de Strasbourg, Strasbourg (France)

    2011-06-15

    Future high energy physics (HEP) experiments require detectors with unprecedented performances for track and vertex reconstruction. These requirements call for high precision sensors, with low material budget and short integration time. The development of CMOS sensors for HEP applications was initiated at IPHC Strasbourg more than 10 years ago, motivated by the needs for vertex detectors at the International Linear Collider (ILC) [R. Turchetta et al, NIM A 458 (2001) 677]. Since then several other applications emerged. The first real scale digital CMOS sensor MIMOSA26 equips Flavour Tracker at RHIC, as well as for the microvertex detector of the CBM experiment at FAIR. MIMOSA sensors may also offer attractive performances for the ALICE upgrade at LHC. This paper will demonstrate the substantial performance improvement of CMOS sensors based on a high resistivity epitaxial layer. First studies for integrating the sensors into a detector system will be addressed and finally the way to go to a 10{mu}s readout sensor will be discussed.

  19. Experimental measurement of a high resolution CMOS detector coupled to CsI scintillators under X-ray radiation

    International Nuclear Information System (INIS)

    Michail, C.; Valais, I.; Seferis, I.; Kalyvas, N.; Fountos, G.; Kandarakis, I.

    2015-01-01

    The purpose of the present study was to assess the information content of structured CsI:Tl scintillating screens, specially treated to be compatible to a CMOS digital imaging optical sensor, in terms of the information capacity (IC), based on Shannon's mathematical communication theory. IC was assessed after the experimental determination of the Modulation Transfer Function (MTF) and the Normalized Noise Power Spectrum (NNPS) in the mammography and general radiography energy range. The CMOS sensor was coupled to three columnar CsI:Tl scintillator screens obtained from the same manufacturer with thicknesses of 130, 140 and 170 μm respectively, which were placed in direct contact with the optical sensor. The MTF was measured using the slanted-edge method while NNPS was determined by 2D Fourier transforming of uniformly exposed images. Both parameters were assessed by irradiation under the mammographic W/Rh (130, 140 and 170 μm CsI screens) and the RQA-5 (140 and 170 μm CsI screens) (IEC 62220-1) beam qualities. The detector response function was linear for the exposure range under investigation. At 70 kVp, under the RQA-5 conditions IC values were found to range between 2229 and 2340 bits/mm 2 . At 28 kVp the corresponding IC values were found to range between 2262 and 2968 bits/mm 2 . The information content of CsI:Tl scintillating screens in combination to the high resolution CMOS sensor, investigated in the present study, where found optimized for use in digital mammography imaging systems. - Highlights: • Three structured CsI:Tl screens (130,140 & 170 um) were coupled to a CMOS sensor. • MTF of the CsI/CMOS was higher than GOS:Tb and CsI based digital imaging systems. • IC of CsI:Tl/CMOS was found optimized for use in digital mammography systems

  20. Review of mixer design for low voltage - low power applications

    Science.gov (United States)

    Nurulain, D.; Musa, F. A. S.; Isa, M. Mohamad; Ahmad, N.; Kasjoo, S. R.

    2017-09-01

    A mixer is used in almost all radio frequency (RF) or microwave systems for frequency translation. Nowadays, the increase market demand encouraged the industry to deliver circuit designs to create proficient and convenient equipment with very low power (LP) consumption and low voltage (LV) supply in both digital and analogue circuits. This paper focused on different Complementary Metal Oxide Semiconductor (CMOS) design topologies for LV and LP mixer design. Floating Gate Metal Oxide Semiconductor (FGMOS) is an alternative technology to replace CMOS due to their high ability for LV and LP applications. FGMOS only required a few transistors per gate and can have a shift in threshold voltage (VTH) to increase the LP and LV performances as compared to CMOS, which makes an attractive option to replace CMOS.

  1. A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

    Science.gov (United States)

    Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

    2013-03-01

    Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

  2. Digital measurement system for the LHC klystron high voltage modulator.

    CERN Document Server

    Mikkelsen, Anders

    Accelerating voltage in the Large Hadron Collider (LHC) is created by a means of 16 superconducting standing wave RF cavities, each fed by a 400MHz/300kW continuous wave klystron amplifier. Part of the upgrade program for the LHC long shutdown one is to replace the obsolete analogue current and voltage measurement circuitry located in the high voltage bunkers by a new, digital system, using ADCs and optical fibres. A digital measurement card is implemented and integrated into the current HV modulator oil tank (floating at -58kV) and interfaced to the existing digital VME boards collecting the data for several klystrons at the ground potential. Measured signals are stored for the logging, diagnostics and post-mortem analysis purposes.

  3. Medium and high voltage power cables market in Europe

    International Nuclear Information System (INIS)

    Kupiec, M.

    1992-06-01

    This note gives an overview of the European market for medium and high voltage power cables. In this text, emphasis is placed on suppliers and important European clients; there is also a brief review of the different techniques for cable laying and utilization in Europe. This not has mainly been drafted from informations supplied by EUROPACABLE

  4. Space charge accumulation in polymeric high voltage DC cable systems

    NARCIS (Netherlands)

    Bodega, R.

    2006-01-01

    One of the intrinsic properties of the polymeric high voltage (HV) direct current (DC) cable insulation is the accumulation of electrostatic charges. Accumulated charges distort the initial Laplacian distribution of the electric field, leading to a local field enhancement that may cause insulation

  5. Proximity effects of high voltage electric power transmission lines on ...

    African Journals Online (AJOL)

    Yomi

    2010-08-18

    Aug 18, 2010 ... The proximity effects of high voltage electric power transmission lines on Leyland Cypress. (xCupressocyparis leylandii (Dallim. and A.B. Jacks.) Dallim) and Japanese Privet (Ligustrum japonicum. Thunb.) growth were examined in a private nursery located in Sakarya, Turkey. Five transect were randomly ...

  6. A Review of High Voltage Drive Amplifiers for Capacitive Actuators

    DEFF Research Database (Denmark)

    Huang, Lina; Zhang, Zhe; Andersen, Michael A. E.

    2012-01-01

    This paper gives an overview of the high voltage amplifiers, which are used to drive capacitive actuators. The amplifiers for both piezoelectric and DEAP (dielectric electroactive polymer) actuator are discussed. The suitable topologies for driving capacitive actuators are illustrated in detail...

  7. Proximity effects of high voltage electric power transmission lines on ...

    African Journals Online (AJOL)

    The proximity effects of high voltage electric power transmission lines on Leyland Cypress (xCupressocyparis leylandii (Dallim. and A.B. Jacks.) Dallim) and Japanese Privet (Ligustrum japonicum Thunb.) growth were examined in a private nursery located in Sakarya, Turkey. Five transect were randomly chosen in both ...

  8. Intense neutron source: high-voltage power supply specifications

    International Nuclear Information System (INIS)

    Riedel, A.A.

    1980-08-01

    This report explains the need for and sets forth the electrical, mechanical and safety specifications for a high-voltage power supply to be used with the intense neutron source. It contains sufficient information for a supplier to bid on such a power supply

  9. High Voltage Electrical Injuries In The University Of Calabar ...

    African Journals Online (AJOL)

    Even when patients present relatively early and are resuscitated and treated, complete prosthetic rehabilitation is difficult because of poverty and lack of social support systems. Case Report: This review presents three cases of high voltage electrical burns resulting from typical 11KVA burns as well as lightning strike.

  10. Characterization of various Si-photodiode junction combinations and layout specialities in 0.18µm CMOS and HV-CMOS technologies

    Science.gov (United States)

    Jonak-Auer, I.; Synooka, O.; Kraxner, A.; Roger, F.

    2017-12-01

    With the ongoing miniaturization of CMOS technologies the need for integrated optical sensors on smaller scale CMOS nodes arises. In this paper we report on the development and implementation of different optical sensor concepts in high performance 0.18µm CMOS and high voltage (HV) CMOS technologies on three different substrate materials. The integration process is such that complete modularity of the CMOS processes remains untouched and no additional masks or ion implantation steps are necessary for the sensor integration. The investigated processes support 1.8V and 3V standard CMOS functionality as well as HV transistors capable of operating voltages of 20V and 50V. These processes intrinsically offer a wide variety of junction combinations, which can be exploited for optical sensing purposes. The availability of junction depths from submicron to several microns enables the selection of spectral range from blue to infrared wavelengths. By appropriate layout the contributions of photo-generated carriers outside the target spectral range can be kept to a minimum. Furthermore by making use of other features intrinsically available in 0.18µm CMOS and HV-CMOS processes dark current rates of optoelectronic devices can be minimized. We present TCAD simulations as well as spectral responsivity, dark current and capacitance data measured for various photodiode layouts and the influence of different EPI and Bulk substrate materials thereon. We show examples of spectral responsivity of junction combinations optimized for peak sensitivity in the ranges of 400-500nm, 550-650nm and 700-900nm. Appropriate junction combination enables good spectral resolution for colour sensing applications even without any additional filter implementation. We also show that by appropriate use of shallow trenches dark current values of photodiodes can further be reduced.

  11. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    Science.gov (United States)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A. A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.; Vigani, L.; Bates, R.; Blue, A.; Buttar, C.; Kanisauskas, K.; Maneuski, D.; Benoit, M.; Di Bello, F.; Caragiulo, P.; Dragone, A.; Grenier, P.; Kenney, C.; Rubbo, F.; Segal, J.; Su, D.; Tamma, C.; Das, D.; Dopke, J.; Turchetta, R.; Wilson, F.; Worm, S.; Ehrler, F.; Peric, I.; Gregor, I. M.; Stanitzki, M.; Hoeferkamp, M.; Seidel, S.; Hommels, L. B. A.; Kramberger, G.; Mandić, I.; Mikuž, M.; Muenstermann, D.; Wang, R.; Zhang, J.; Warren, M.; Song, W.; Xiu, Q.; Zhu, H.

    2016-09-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  12. Reliability Estimation of High Voltage Ceramic Capacitor by Failure Analysis

    International Nuclear Information System (INIS)

    Yang, Seok Jun; Kim, Jin Woo; Shin, Seung Woo; Lee, Hee Jin; Shin, Seung Hun; Ryu, Dong Su; Chang, Seog Weon

    2001-01-01

    This paper presents a result of failure analysis and reliability evaluation for high voltage ceramic capacitors. The failure modes and failure mechanisms were studied in two ways in order to estimate component life and failure rate. The causes of failure mechanisms for zero resistance phenomena under withstanding voltage test in high voltage ceramic capacitors molded by epoxy resin were studied by establishing an effective root cause failure analysis. Particular emphasis was placed on breakdown phenomena at the ceramic-epoxy interface. The validity of the results in this study was confirmed by the results of accelerated testing. Thermal cycling test for high voltage ceramic capacitor mounted on a magnetron were implemented. Delamination between ceramic and epoxy, which might cause electrical short in underlying circuitry, can occur during curing or thermal cycle. The results can be conveniently used to quickly identify defective lots, determine B 10 life estimation each lot at the level of inspection, and detect major changes in the vendors processes. Also, the condition for dielectric breakdown was investigated for the estimation of failure rate with load-strength interference model

  13. Investigation of a high voltage hollow cathode electron beam source

    International Nuclear Information System (INIS)

    Hansen, Johnny.

    1977-04-01

    An investigation is presented of the possibility of developing an electron accelerator comprising several radiation units with a relatively low power per unit, and without the many elements such as accelerator tube, focusing and scanning systems. A study was desired of an electron gun operated at 200 kV vased on the cold, hollow-cathode principle, where problems concentrated on the design of an electrode configuration that could withstand the high voltage at a pressure where a plasma could be generated too. Studies concentrated on the high voltage breakdown criterion in the pressure range 10 -3 to 10 -2 torr and on the plasma formation in a low pressure gas discharge. Controlled beams with energies up to 130 keV were generated in nitrogen at a pressure of 2 x 10 -3 torr with a beam current of about 1 mA in a continuous operation. The high voltage was limited by the existing power supply in the laboratory; however, a decision was taken not to purchase a power supply that could have delivered the required voltage. (author)

  14. High Voltage Batteries For Space And Near-Space Applications

    Science.gov (United States)

    Gitzendanner, Rob; Skelton, Jim; Walker, John; Terminesi, Dan; Bibo, Paul

    2011-10-01

    Satellites and other space systems continue to transition towards higher voltage power busses from more traditional 28V power systems. The International Space System (ISS) was built around a 120V power bus, and the Orion Crew Exploration Vehicle (CEV) has adopted a similar design for reduced current and cable size/weight, compatibility, and improved power distribution. Other high voltage systems are employed to power electromechanical actuators on flight surfaces of re-entry modules and similar systems. The design and development of the batteries for these high voltage applications needs to be ever more vigilant with issues of system safety, cell monitoring and equilibration, power distribution and handling and operation procedures. Yardney Technical Products is developing the 120V batteries for the Orion CEV, 150V batteries for other space applications and a 200V battery for missile flight systems (as well as a 400V modular system for Naval applications). The design, modularity, electronics monitoring and control, manufacturing and operating considerations, and overall system safety concerns for these batteries are of special concern for such high voltage systems.

  15. Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process

    Science.gov (United States)

    Song, Ki-Whan; Lee, Yong Kyu; Sim, Jae Sung; Kim, Kyung Rok; Lee, Jong Duk; Park, Byung-Gook; You, Young Sub; Park, Joo-On; Jin, You Seung; Kim, Young-Wug

    2005-04-01

    We propose a complementary self-biasing method which enables the single-electron transistor (SET)/complementary metal-oxide semiconductor (CMOS) hybrid multi-valued logics (MVLs) to operate well at high temperatures, where the peak-to-valley current ratio (PVCR) of the Coulomb oscillation markedly decreases. The new architecture is implemented with a few transistors by utilizing the phase control capability of the sidewall depletion gates in dual-gate single-electron transistors (DGSETs). The suggested scheme is evaluated by a SPICE simulation with an analytical DGSET model. Furthermore, we have developed a new process technology for the SET/CMOS hybrid systems. We have confirmed that both of the fabricated devices, namely, SET and CMOS transistors, exhibit the ideal characteristics for the complementary self-biasing scheme: the SET shows clear Coulomb oscillations with a 100 mV period and the CMOS transistors show a high voltage gain.

  16. Design and development of high voltage high power operational ...

    Indian Academy of Sciences (India)

    Normally power opamps can deliver current more than 50 mA and can operate on the supply voltage more than ±25 V. This paper gives the details of one of the power opamps developed to drive the Piezo Actuators for Active Vibration Control (AVC) of aircraft/aerospace structures. The designed power opamp will work on ...

  17. Operational characteristics of a high voltage dense plasma focus

    Science.gov (United States)

    Woodall, D. M.

    1985-11-01

    A high voltage dense plasma focus powered by a single stage Marx bank was designed, built and operated. The maximum bank parameters are: voltage--120 kV, energy--20 kJ, short circuit current--600kA. The bank impedance is about 200 millohms. The plasma focus center electrode diameter is 1.27 cm. The outer electrode diameter is 10.16 cm. Rundown length is about 10 cm, corresponding to a bank quarter period of about 900 millohms ns. Rundown L is about 50 milliohms. The context of this work is established with a review of previous plasma focus theoretical, experimental and computational work and related topics. Theoretical motivation for high voltage operation is presented. The design, construction and operation of this device are discussed in detail. Results and analysis of measurements obtained are presented. Device operation was investigated primarily at 80 kV (9 kJ), with a gas fill of about 1 torr H2, plus 3-5 percent A. The following diagnostics were used: gun voltage and current measurements; filtered, time resolved x ray PIN measurements of the pinch region; time integrated x ray pinhole photographs of the pinch region; fast frame visible light photographs of the sheath during rundown; and B probe measurements of the current sheath shortly before collapse.

  18. Principles for the establishment and rationalization of high voltage systems

    International Nuclear Information System (INIS)

    1995-06-01

    The Danish Ministry of the Environment appointed a working group to clarify some principles on which the choice between overhead and underground electric cables could be based. It is a growing wish in the country that overhead cables should be avoided in urban areas and also a strong desire to preserve the countryside from them. Thus protected areas must not be used for this purpose. A specific assessment must be made whenever a major line is to be established where electricity supply, reliability, economy, aesthetic and environmental interests, and possible alternative solutions are taken into consideration. The document presents the group's report on the reconstruction of old and the construction of new high voltage networks dealing with the aspects of protecting the natural landscape and the technical opportunities for laying the cables underground at various voltage levels in addition to cost estimates. Emphasis is on high voltage systems of 50 kW and above. Currently it is 6-20 times more expensive to use underground 400 kW alternating cable connections and 4-6 times more to use underground 150/132 AC connections. Costs vary in accordance with different voltage levels, dependent on local conditions. The undergrounding of existing 60/50 kW overhead lines is much more expensive than continuous maintenance. It is agreed that electricity utilities and regional authorities should cooperate on management and long-term planning and in structuring a detailed prioritization of the changes of the existing high-voltage network and future extension. Principles for the basis of this prioritization are given in detail. (AB)

  19. Square-Wave Voltage Injection Algorithm for PMSM Position Sensorless Control With High Robustness to Voltage Errors

    DEFF Research Database (Denmark)

    Ni, Ronggang; Xu, Dianguo; Blaabjerg, Frede

    2017-01-01

    relationship with the magnetic field distortion. Position estimation errors caused by higher order harmonic inductances and voltage harmonics generated by the SVPWM are also discussed. Both simulations and experiments are carried out based on a commercial PMSM to verify the superiority of the proposed method......Rotor position estimated with high-frequency (HF) voltage injection methods can be distorted by voltage errors due to inverter nonlinearities, motor resistance, and rotational voltage drops, etc. This paper proposes an improved HF square-wave voltage injection algorithm, which is robust to voltage...... errors without any compensations meanwhile has less fluctuation in the position estimation error. The average position estimation error is investigated based on the analysis of phase harmonic inductances, and deduced in the form of the phase shift of the second-order harmonic inductances to derive its...

  20. High voltage measurements on metal-oxide surge arresters

    Energy Technology Data Exchange (ETDEWEB)

    Yli-Aeyhoe, S. [Tampere University of Technology (Finland). High Voltage Laboratory

    2000-07-01

    Metal-oxide surge arresters (MOA) are used to prevent damages caused by overvoltages and currents. Because of the function of MOAs they have to be tested with high voltage and with high current. The aim of this seminar paper is to give some information how MOAs can be tested in laboratory circumstances and on- site. Few new test methods are introduced as well. (orig.)

  1. Calculation of the soft error rate of submicron CMOS logic circuits

    International Nuclear Information System (INIS)

    Juhnke, T.; Klar, H.

    1995-01-01

    A method to calculate the soft error rate (SER) of CMOS logic circuits with dynamic pipeline registers is described. This method takes into account charge collection by drift and diffusion. The method is verified by comparison of calculated SER's to measurement results. Using this method, the SER of a highly pipelined multiplier is calculated as a function of supply voltage for a 0.6 microm, 0.3 microm, and 0.12 microm technology, respectively. It has been found that the SER of such highly pipelined submicron CMOS circuits may become too high so that countermeasures have to be taken. Since the SER greatly increases with decreasing supply voltage, low-power/low-voltage circuits may show more than eight times the SER for half the normal supply voltage as compared to conventional designs

  2. High-voltage pulsed life for multistressed polypropylene capacitor dielectric

    Science.gov (United States)

    Laghari, J. R.

    1992-02-01

    High-voltage polypropylene capacitors were aged under singular as well as simultaneous multiple stresses (electrical, thermal, and radiation) at the University at Buffalo's 2-MW thermal nuclear reactor. These stresses were combined neutron-gamma radiation with a total dose of 1.6*10/sup 6/ rad, electrical stress at 40 V/sub rms// mu m, and thermal stress at 90 degrees C. After exposure, the polypropylene dielectric was tested for life (number of pulses to fail) under high-voltage high-repetition-rate (100 pps) pulses. Pulsed life data were also compared with AC life data. Results show that radiation stress causes the most degradation in life, either acting alone or in combination with other stresses.

  3. High-voltage pulsed life of multistressed polypropylene capacitor dielectric

    International Nuclear Information System (INIS)

    Laghari, J.R.

    1992-01-01

    High-voltage polypropylene capacitors were aged under singular as well as simultaneous multiple stresses (electrical, thermal, and radiation) at the University of Buffalo's 2 MW thermal nuclear reactor. These stresses were combined neutron-gamma radiation with a total dose of 1.6 x 10 6 rad, electrical stress at 40 V rms /μm, and thermal stress at 90 degrees C. After exposure, the polypropylene dielectric was tested for life (number of pulses to fail) under high-voltage high-repetition-rate (100 pps) pulses. Pulsed life data were also compared with ac life data. Results show that radiation stress causes the most degradation in life, either acting alone or in combination with other stresses. The largest reduction in life occurs when polypropylene is aged under simultaneous multiple stresses (electrical, thermal, and radiation). In this paper, it is shown that pulsed life can be equivalently compared with ac life

  4. Highly Reliable NPP Instrumentation Using Constant Voltage Feedback Circuits

    Energy Technology Data Exchange (ETDEWEB)

    Yoo, Seung J.; Choi, Bo H.; Kim, Ji H.; Rim, Chun T. [KAIST, Daejeon (Korea, Republic of)

    2014-08-15

    A highly reliable nuclear power plant (NPP) instrumentation using constant voltage feedback circuits is proposed. Contrary to conventional NPP instrumentation, two operational amplifiers are used at auxiliary building to supply constant DC voltage across the potentiometer or wheatstone bridge type sensors, such as resistance temperature detectors (RTD) and strain gauges. The proposed constant voltage feedback circuits maintain its output voltage as constant regardless of the length of lead wire from the auxiliary building to the sensors. A detail analysis of the proposed feedback circuits and design procedures including the internal resistance and parasitic LC components of lead wire are presented. A prototype with lumped RLC values for modeling lead wires is fabricated and experimentally verified to supply constant 10V up to 200m distance under 0.8% error. Due to its versatile characteristics with cost effective structure, the proposed scheme can be generally extended to pressure meters and water-level recorders to guarantee robust measurements without conventional current transducers under severe accidents.

  5. High-voltage, high-power architecture considerations

    International Nuclear Information System (INIS)

    Moser, R.L.

    1985-01-01

    Three basic EPS architectures, direct energy transfer, peak-power tracking, and a potential EPS architecture for a nuclear reactor are described and compared. Considerations for the power source and energy storage are discussed. Factors to be considered in selecting the operating voltage are pointed out. Other EPS architecture considerations are autonomy, solar array degrees of freedom, and EPS modularity. It was concluded that selection of the power source and energy storage has major impacts on the spacecraft architecture and mass

  6. Integrated tunable CMOS laser.

    Science.gov (United States)

    Creazzo, Timothy; Marchena, Elton; Krasulick, Stephen B; Yu, Paul K L; Van Orden, Derek; Spann, John Y; Blivin, Christopher C; He, Lina; Cai, Hong; Dallesasse, John M; Stone, Robert J; Mizrahi, Amit

    2013-11-18

    An integrated tunable CMOS laser for silicon photonics, operating at the C-band, and fabricated in a commercial CMOS foundry is presented. The III-V gain medium section is embedded in the silicon chip, and is hermetically sealed. The gain section is metal bonded to the silicon substrate creating low thermal resistance into the substrate and avoiding lattice mismatch problems. Optical characterization shows high performance in terms of side mode suppression ratio, relative intensity noise, and linewidth that is narrow enough for coherent communications.

  7. A High Resolution Switched Capacitor 1bit Sigma-Delta Modulator for Low-Voltage/Low-Power Applications

    DEFF Research Database (Denmark)

    Furst, Claus Efdmann

    1996-01-01

    A high resolution 1bit Sigma-Delta modulator for low power/low voltage applications is presented. The modulator operates at a supply of 1-1.5V, the current drain is 0.1mA. The maximum resolution is 87dB equivalent to 14 bits of resolution. This is achieved with a signal-band of 5kHz, over......-sampling ratio (OSR) of 128 and a sampling frequency of 1.28MHz. The very low power consumption is achieved by using a new type of efficient class AB amplifiers in a fully differential configuration. The modulator is implemented in a 0.7 micron n-well CMOS technology. Optimisation details concerning modulator...

  8. Bottlenecks reduction using superconductors in high voltage transmission lines

    Directory of Open Access Journals (Sweden)

    Daloub Labib

    2016-01-01

    Full Text Available Energy flow bottlenecks in high voltage transmission lines known as congestions are one of the challenges facing power utilities in fast developing countries. Bottlenecks occur in selected power lines when transmission systems are operated at or beyond their transfer limits. In these cases, congestions result in preventing new power supply contracts, infeasibility in existing contracts, price spike and market power abuse. The “Superconductor Technology” in electric power transmission cables has been used as a solution to solve the problem of bottlenecks in energy transmission at high voltage underground cables and overhead lines. The increase in demand on power generation and transmission happening due to fast development and linked to the intensive usage of transmission network in certain points, which in turn, lead to often frequent congestion in getting the required power across to where it is needed. In this paper, a bottleneck in high voltage double overhead transmission line with Aluminum Conductor Steel Reinforced was modeled using conductor parameters and replaced by Gap-Type Superconductor to assess the benefit of upgrading to higher temperature superconductor and obtain higher current carrying capacity. This proved to reduce the high loading of traditional aluminum conductors and allow more power transfer over the line using superconductor within the same existing right-of-way, steel towers, insulators and fittings, thus reducing the upgrade cost of building new lines.

  9. Rapid high voltage isoelectric focusing of proteins in rod gels.

    Science.gov (United States)

    Das, J

    1991-09-01

    A rapid procedure of isoelectric focusing (IEF) of proteins in polyacrylamide rod gels (i.d., 1.1 mm; length, 7.5 cm) is described. The time required for IEF can be reduced to 0.5 h by using high voltages up to 3000 V in the presence or absence of urea in the gels. When used as the first dimension of a two-dimensional technique for IEF sodium dodecyl sulphate electrophoresis, high voltage IEF gives smaller protein spots on the second dimension gel, associated with an increase in resolution. The method has been tested by a two-dimensional separation of an eye sample of the goodeid fish Xenotoca eiseni.

  10. High voltage processing of the SLC polarized electron gun

    International Nuclear Information System (INIS)

    Saez, P.; Clendenin, J.; Garden, C.; Hoyt, E.; Klaisner, L.; Prescott, C.; Schultz, D.; Tang, H.

    1993-04-01

    The SLC polarized electron gun operates at 120 kV with very low dark current to maintain the ultra high vacuum (UHV). This strict requirement protects the extremely sensitive photocathode from contaminants caused by high voltage (HV) activity. Thorough HV processing is thus required x-ray sensitive photographic film, a nanoammeter in series with gun power supply, a radiation meter, a sensitive residual gas analyzer and surface x-ray spectrometry were used to study areas in the gun where HV activity occurred. By reducing the electric field gradients, carefully preparing the HV surfaces and adhering to very strict clean assembly procedures, we found it possible to process the gun so as to reduce both the dark current at operating voltage and the probability of HV discharge. These HV preparation and processing techniques are described

  11. Design and implementation of the wireless high voltage control system

    International Nuclear Information System (INIS)

    Srivastava, Saurabh; Misra, A.; Pandey, H.K.; Thakur, S.K.; Pandit, V.S.

    2011-01-01

    In this paper we will describe the implementation of the wireless link for controlling and monitoring the serial data between control PC and the interface card (general DAQ card), by replacing existing RS232 based remote control system for controlling and monitoring High Voltage Power Supply (120kV/50mA). The enhancement in the reliability is achieved by replacing old RS232 based control system with wireless system by isolating ground loop. (author)

  12. Digital Detection of Oxide Breakdown and Life-Time Extension in Submicron CMOS Technology

    NARCIS (Netherlands)

    Acar, M.; Annema, Anne J.; Nauta, Bram

    2008-01-01

    An approach is introduced to extend the lifetime of high-voltage analog circuits in CMOS technologies based on redundancy, like that known for DRAMS. A large power transistor is segmented into N smaller ones in parallel. If a sub-transistor is broken, it is removed automatically from the compound

  13. High voltage systems (tube-type microwave)/low voltage system (solid-state microwave) power distribution

    Science.gov (United States)

    Nussberger, A. A.; Woodcock, G. R.

    1980-01-01

    SPS satellite power distribution systems are described. The reference Satellite Power System (SPS) concept utilizes high-voltage klystrons to convert the onboard satellite power from dc to RF for transmission to the ground receiving station. The solar array generates this required high voltage and the power is delivered to the klystrons through a power distribution subsystem. An array switching of solar cell submodules is used to maintain bus voltage regulation. Individual klystron dc voltage conversion is performed by centralized converters. The on-board data processing system performs the necessary switching of submodules to maintain voltage regulation. Electrical power output from the solar panels is fed via switch gears into feeder buses and then into main distribution buses to the antenna. Power also is distributed to batteries so that critical functions can be provided through solar eclipses.

  14. CMOS Integrated Carbon Nanotube Sensor

    International Nuclear Information System (INIS)

    Perez, M. S.; Lerner, B.; Boselli, A.; Lamagna, A.; Obregon, P. D. Pareja; Julian, P. M.; Mandolesi, P. S.; Buffa, F. A.

    2009-01-01

    Recently carbon nanotubes (CNTs) have been gaining their importance as sensors for gases, temperature and chemicals. Advances in fabrication processes simplify the formation of CNT sensor on silicon substrate. We have integrated single wall carbon nanotubes (SWCNTs) with complementary metal oxide semiconductor process (CMOS) to produce a chip sensor system. The sensor prototype was designed and fabricated using a 0.30 um CMOS process. The main advantage is that the device has a voltage amplifier so the electrical measure can be taken and amplified inside the sensor. When the conductance of the SWCNTs varies in response to media changes, this is observed as a variation in the output tension accordingly.

  15. Gate induced drain leakage reduction with analysis of gate fringing field effect on high-κ/metal gate CMOS technology

    Science.gov (United States)

    Jang, Esan; Shin, Sunhae; Jung, Jae Won; Rok Kim, Kyung

    2015-06-01

    We suggest the optimum permittivity for a high-κ/metal gate (HKMG) CMOS structure based on the trade-off characteristics between the fringing field induced barrier lowering (FIBL) and gate induced drain leakage (GIDL). By adopting the high-κ gate dielectric, the GIDL from the band-to-band tunneling at the interface of gate and lightly doped drain (LDD) is suppressed with wide tunneling width owing to the enhanced fringing field, while the FIBL effects is degenerated as the previous reports. These two effects from the gate fringing field are studied extensively to manage the leakage current of HKMG for low power applications.

  16. High-voltage therapy of carcinoma of the prostate

    International Nuclear Information System (INIS)

    Schnorr, D.; Kelly, L.U.; Guddat, H.M.; Schubert, J.; Gorski, J.; Schorcht, J.; Mau, S.; Wehnert, J.; Medizinische Akademie, Dresden

    1983-01-01

    High-voltage therapy is becoming increasingly important as a form of individual differential therapy of carcinoma of the prostate. Around 40% of all patients with a diagnosis of carcinoma of the prostate can be treated with high-voltage therapy. The precondition is the absence of bone and soft tissue metastases and of juxtaregional lymph node metastases. Individual carcinoma therapy is based on pre therapeutic tumor classification according to the TNM system. The 5-year survival rates are presented from a retrospective study carried out using primary radiation monotherapy and a combined hormone and radiation therapy; these figures were calculated by the life-table method. The study revealed no significant differences between the two forms of therapy as regards 5-year survival rates. The 5-year survival rates of all patients of the classifications T 0 -T 3 N/sub x/-N 2 M 0 irradiated (n: 198) (72% +- 11% for hormone plus radiation therapy and 74% +- 11% for radiation monotherapy) did not differ greatly from those of a normal male population of the same age (77%). High-voltage therapy of carcinoma of the prostate can thus be classified as a curative method of treatment. (author)

  17. Prototype high voltage bushing: Configuration to its operational demonstration

    Energy Technology Data Exchange (ETDEWEB)

    Shah, Sejal, E-mail: sshah@iter-india.org [ITER-India, Institute for Plasma Research, Bhat, Gandhinagar 382428 (India); Sharma, D. [Institute for Plasma Research, Bhat, Gandhinagar 382428 (India); Parmar, D.; Tyagi, H.; Joshi, K.; Shishangiya, H.; Bandyopadhyay, M.; Rotti, C.; Chakraborty, A. [ITER-India, Institute for Plasma Research, Bhat, Gandhinagar 382428 (India)

    2016-12-15

    High Voltage Bushing (HVB) is the key component of Diagnostic Neutral Beam (DNB) system of ITER as it provides access to high voltage electrical, hydraulic, gas and diagnostic feedlines to the beam source with isolation from grounded vessel. HVB also provides primary vacuum confinement for the DNB system. Being Safety Important Class (SIC) component of ITER, it involves several configurational, technological and operational challenges. To ensure its operational performance & reliability, particularly electrostatic behavior, half scale down Prototype High Voltage Bushing (PHVB) is designed considering same design criteria of DNB HVB. Design optimization has been carried out followed by finite element (FE) analysis to obtain DNB HVB equivalent electric stress on different parts of PHVB, taking into account all design, manufacturing & space constraints. PHVB was tested up to 60 kV without breakdown, which validates its design for the envisaged operation of 50 kV DC. This paper presents the design of PHVB, FEA validation, manufacturing constraints, experimental layout with interfacing auxiliary systems and operational results related to functional performance.

  18. Design and Implementation of a High-Voltage Generator with Output Voltage Control for Vehicle ER Shock-Absorber Applications

    Directory of Open Access Journals (Sweden)

    Chih-Lung Shen

    2013-01-01

    Full Text Available A self-oscillating high-voltage generator is proposed to supply voltage for a suspension system in order to control the damping force of an electrorheological (ER fluid shock absorber. By controlling the output voltage level of the generator, the damping force in the ER fluid shock absorber can be adjusted immediately. The shock absorber is part of the suspension system. The high-voltage generator drives a power transistor based on self-excited oscillation, which converts dc to ac. A high-frequency transformer with high turns ratio is used to increase the voltage. In addition, the system uses the car battery as dc power supply. By regulating the duty cycle of the main switch in the buck converter, the output voltage of the buck converter can be linearly adjusted so as to obtain a specific high voltage for ER. The driving system is self-excited; that is, no additional external driving circuit is required. Thus, it reduces cost and simplifies system structure. A prototype version of the actual product is studied to measure and evaluate the key waveforms. The feasibility of the proposed system is verified based on experimental results.

  19. Critical parameters affecting the design of high frequency transmission lines in standard CMOS technology

    KAUST Repository

    Al Attar, Talal

    2017-05-13

    Different structures of transmission lines were designed and fabricated in standard CMOS technology to estimate some critical parameters including the RMS value of the surface roughness and the loss tangent. The input impedances for frequencies up to 50 GHz were modeled and compared with measurements. The results demonstrated a strong correlation between the used model with the proposed coefficients and the measured results, attesting the robustness of the model and the reliability of the incorporated coefficients values.

  20. High Voltage Power Supply With High Output Current and Low Power Consumption for Photomultiplier Tubes

    Science.gov (United States)

    Cunha, José Paulo V. S.; Begalli, Marcia; Bellar, Maria Dias

    2012-04-01

    In some applications, photomultiplier tubes (PMTs) are powered by battery based circuits, where the available energy is severely limited. The most simple approach to design high voltage power supplies (HVPS) for PMTs has considered resistive voltage dividers in order to bias the dynodes. However, this approach usually results in high power losses and, consequently, this undermines the PMT performance. In this work, the proposed solution is the use of a power circuit based on the forward converter connected to a transformer built with several secondary windings. Each secondary voltage is rectified and filtered to eliminate voltage ripple. Each dynode voltage is supplied by a rectified secondary voltage. The proposed topology provides low power consumption as well as low sensitivity of the PMT gain with respect to the dynode currents. Taking into account the Waste Electrical and Electronic Equipment Directive (WEEE), this HVPS has been designed to allow the recycling of old PMTs.

  1. Computer controlled multichannel high voltage supply system for GRACE instrumentation

    International Nuclear Information System (INIS)

    Manna, A.; Chakrabarti, S.; Mukhopadhyay, P.K.

    2001-01-01

    The high energy gamma ray telescopes being set up by NRL, BARC as part of the GRACE project, require a very large number of (∼ 1000 nos.) programmable high voltage power supplies for biasing photomultiplier tubes for the detection and characterization of the atmospheric Cerenkov events. These H.V. supplies need to be very compact and lightweight, as they will be mounted on moving telescopes. This paper describes the design aspects of the overall HV system and some preliminary results of the prototype HV modules being developed for such applications. In the new design, the switching frequency of the converters in the H.V. supplies has been increased by a factor of three times as compared to the earlier design, and surface mounted devices has been used to achieve size and weight reductions. The HV system that is designed for modular construction consists of multiple HV modules, each containing 16 independently adjustable HV supplies. All the HV modules in the system are interconnected via a serial I 2 C bus. Each HV supply has built in over voltage/current, thermal overload protections with output voltage read back and adjustable slew rate control facilities. (author)

  2. Design of a single phase high voltage DC power supply at 15 kV output using voltage doubler circuit

    Energy Technology Data Exchange (ETDEWEB)

    Mariun, N.; Anayet, K.; Khan, N.; Amran, M. [Putra Malaysia Univ., Serdang (Malaysia). Dept. of Electrical and Electronic Engineering

    2006-07-01

    High voltage testing equipment is normally used in research laboratories and routine testing laboratories. However, the work carried out in research laboratories varies significantly from one establishment to the other. In addition, the type of equipment needed varies accordingly. A general high voltage laboratory may include equipment for all classes of routine tests, with testing equipment such as transformer, switchgear, bushings as well as cables. In the industry, the main application of the direct current (DC) high voltage is for testing cables with a relatively large capacitance, which takes a very large current if it is tested with alternating current (AC) voltages. This paper presented the results of a study that examined the voltage doubler circuit based on simulation, hardware implementation, and on Cockcroft-Walton (C-W) voltage multiplier circuits to fabricate a DC power supply in the laboratory at the output range of 15 kV. The paper provided a detailed description of the simulation, design, development and implementation of the hardware needed in order to build a high voltage DC power supply in the laboratory. The simulation and experimental results were also presented using EMTDC PSCAD software. 7 refs., 1 tab., 10 figs.

  3. An isolated SNM model for high-stability multi-port register file in 65 nm CMOS

    Science.gov (United States)

    Zhang, Yuejun; Wang, Pengjun; Li, Gang

    2017-09-01

    In modern microprocessors, the multi-port register file is one of the key modules which provides fast and multiple data access for instructions. As the number of access ports in register files increases, stability becomes a key issue due to the voltage fluctuation on bit lines. We propose to apply an isolated inverter to address the voltage fluctuation. To assess the register stability, we derive a closed-form expression of static noise margin (SNM) for our register file. The proposed SNM model can be used as a guideline to predict the impact of several register parameters on the stability and optimize register file designs. To validate the proposed SNM model, we fabricated a test chip of two-write-four-read (2W4R) 1024 bits register file in a TSMC 65 nm low-power CMOS technology. The experimental result shows that the stability of our register file cells with an isolated inverter improve the conventional cells by approximately 2.4 times. Also, the supply voltage causes a fluctuation of SNM of about 65%, while temperature and transistor mismatch cause a fluctuation of SNM of about 20%. Project supported by the National Natural Science Foundation of China (Nos, 61404076, 61474068), the Zhejiang Provincial Natural Science Foundation of China (No. LQ14F040001), the S&T Plan of Zhejiang Provincial Science and Technology Department (No. 2015C31010), the China Spark Program (No. 2015GA701053), the Ningbo Natural Science Foundation (Nos. 2014A610148, 2015A610107), and the K. C. Wong Magna Fund in Ningbo University, China.

  4. Experimental validation of a high voltage pulse measurement method.

    Energy Technology Data Exchange (ETDEWEB)

    Cular, Stefan; Patel, Nishant Bhupendra; Branch, Darren W.

    2013-09-01

    This report describes X-cut lithium niobates (LiNbO3) utilization for voltage sensing by monitoring the acoustic wave propagation changes through LiNbO3 resulting from applied voltage. Direct current (DC), alternating current (AC) and pulsed voltage signals were applied to the crystal. Voltage induced shift in acoustic wave propagation time scaled quadratically for DC and AC voltages and linearly for pulsed voltages. The measured values ranged from 10 - 273 ps and 189 ps 2 ns for DC and non-DC voltages, respectively. Data suggests LiNbO3 has a frequency sensitive response to voltage. If voltage source error is eliminated through physical modeling from the uncertainty budget, the sensors U95 estimated combined uncertainty could decrease to ~0.025% for DC, AC, and pulsed voltage measurements.

  5. Probing/Manipulating the Interfacial Atomic Bonding between High k Dielectrics and InGaAs for Ultimate CMOS

    Science.gov (United States)

    2015-04-24

    region of n-In0.53Ga0.47As MOSCAP. 15. SUBJECT TERMS CMOS, Magneto-optical imaging , Nanotechnology, Indium Gallium Arsenide 16...Nanotechnology, Indium Gallium Arsenide 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT Same as Report (SAR) 18. NUMBER OF PAGES 11 19a...structure of trimethyl- aluminum and water on an In0.2Ga0.8As(001) -4x2 surface: A high-resolution core-level photoemission study”, T. W. Pi, H. Y. Lin T

  6. A Nordic Project Project on High Speed Low Power Design in Sub-micron CMOS Technology for Mobile

    DEFF Research Database (Denmark)

    Olesen, Ole

    1997-01-01

    digital base-band processing on the same chip. Presently, only few examples of CMOS used for RF front-end circuits have been presented by academia, and so far no commercial products exist. The approach has been to do a CMOS block by block replacement of the blocks in traditional transceiver architectures......This paper is a survey paper presenting the Nordic CONFRONT project and reporting some results from the group at CIE/DTU, Denmark. The objective of the project is to demonstrate the feasibility of sub-micron CMOS for the realisation of RF front-end circuits operating at frequencies in the 1...... circuit design is based on state-of-the-art CMOS technology (0.5µm and below) including circuits operating at 2GHz. CMOS technology is chosen, since a CMOS implementation is likely to be significantly cheaper than a bipolar or a BiCMOS solution, and it offers the possibility to integrate the predominantly...

  7. Piezoelectric self sensing actuators for high voltage excitation

    International Nuclear Information System (INIS)

    Grasso, E; Totaro, N; Janocha, H; Naso, D

    2013-01-01

    Self sensing techniques allow the use of a piezoelectric transducer simultaneously as an actuator and as a sensor. Such techniques are based on knowledge of the transducer behaviour and on measurements of electrical quantities, in particular voltage and charge. Past research work has mainly considered the linear behaviour of piezoelectric transducers, consequently restricting the operating driving voltages to low values. In this work a new self sensing technique is proposed which is able to perform self sensing reconstruction both at low and at high driving voltages. This technique, in fact, makes use of a hysteretic model to describe the nonlinear piezoelectric capacitance necessary for self sensing reconstruction. The capacitance can be measured and identified at the antiresonances of a vibrating structure with a good approximation. After providing a mathematical background to deal with the main aspects of self sensing, this technique is compared theoretically and experimentally to a typical linear one by using an aluminum plate with one bonded self sensing transducer and a positive position feedback (PPF) controller to verify the performance in self sensing based vibration control. (paper)

  8. New perspectives in vacuum high voltage insulation. II. Gas desorption

    CERN Document Server

    Diamond, W T

    1998-01-01

    An examination has been made of gas desorption from unbaked electrodes of copper, niobium, aluminum, and titanium subjected to high voltage in vacuum. It has been shown that the gas is composed of water vapor, carbon monoxide, and carbon dioxide, the usual components of vacuum outgassing, plus an increased yield of hydrogen and light hydrocarbons. The gas desorption was driven by anode conditioning as the voltage was increased between the electrodes. The gas is often desorbed as microdischarges-pulses of a few to hundreds of microseconds-and less frequently in a more continuous manner without the obvious pulsed structure characteristic of microdischarge activity. The quantity of gas released was equivalent to many monolayers and consisted mostly of neutral molecules with an ionic component of a few percent. A very significant observation was that the gas desorption was more dependent on the total voltage between the electrodes than on the electric field. It was not triggered by field-emitted electrons but oft...

  9. A 3.1-4.8 GHz transmitter with a high frequency divider in 0.18 μm CMOS for OFDM-UWB

    International Nuclear Information System (INIS)

    Zheng Renliang; Ren Junyan; Li Wei; Li Ning

    2009-01-01

    A fully integrated low power RF transmitter for a WiMedia 3.1-4.8 GHz multiband orthogonal frequency division multiplexing ultra-wideband system is presented. With a separate transconductance stage, the quadrature up-conversion modulator achieves high linearity with low supply voltage. The co-design of different resonant frequencies of the modulator and the differential to single (D2S) converter ensures in-band gain flatness. By means of a series inductor peaking technique, the D2S converter obtains 9 dB more gain without extra power consumption. A divided-by-2 divider is used for carrier signal generation. The measurement results show an output power between -10.7 and -3.1 dBm with 7.6 dB control range, an OIP3 up to 12 dBm, a sideband rejection of 35 dBc and a carrier rejection of 30 dBc. The ESD protected chip is fabricated in the Jazz 0.18 μm RF CMOS process with an area of 1.74 mm 2 and only consumes 32 mA current (at 1.8 V) including the test associated parts. (semiconductor integrated circuits)

  10. A 3.1-4.8 GHz transmitter with a high frequency divider in 0.18 {mu}m CMOS for OFDM-UWB

    Energy Technology Data Exchange (ETDEWEB)

    Zheng Renliang; Ren Junyan; Li Wei; Li Ning, E-mail: jyren@fudan.edu.c [Micro/Nano Science and Innovation Platform, State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2009-12-15

    A fully integrated low power RF transmitter for a WiMedia 3.1-4.8 GHz multiband orthogonal frequency division multiplexing ultra-wideband system is presented. With a separate transconductance stage, the quadrature up-conversion modulator achieves high linearity with low supply voltage. The co-design of different resonant frequencies of the modulator and the differential to single (D2S) converter ensures in-band gain flatness. By means of a series inductor peaking technique, the D2S converter obtains 9 dB more gain without extra power consumption. A divided-by-2 divider is used for carrier signal generation. The measurement results show an output power between -10.7 and -3.1 dBm with 7.6 dB control range, an OIP3 up to 12 dBm, a sideband rejection of 35 dBc and a carrier rejection of 30 dBc. The ESD protected chip is fabricated in the Jazz 0.18 {mu}m RF CMOS process with an area of 1.74 mm{sup 2} and only consumes 32 mA current (at 1.8 V) including the test associated parts. (semiconductor integrated circuits)

  11. Hyperspectral CMOS imager

    Science.gov (United States)

    Jerram, P. A.; Fryer, M.; Pratlong, J.; Pike, A.; Walker, A.; Dierickx, B.; Dupont, B.; Defernez, A.

    2017-11-01

    CCDs have been used for many years for Hyperspectral imaging missions and have been extremely successful. These include the Medium Resolution Imaging Spectrometer (MERIS) [1] on Envisat, the Compact High Resolution Imaging Spectrometer (CHRIS) on Proba and the Ozone Monitoring Instrument operating in the UV spectral region. ESA are also planning a number of further missions that are likely to use CCD technology (Sentinel 3, 4 and 5). However CMOS sensors have a number of advantages which means that they will probably be used for hyperspectral applications in the longer term. There are two main advantages with CMOS sensors: First a hyperspectral image consists of spectral lines with a large difference in intensity; in a frame transfer CCD the faint spectral lines have to be transferred through the part of the imager illuminated by intense lines. This can lead to cross-talk and whilst this problem can be reduced by the use of split frame transfer and faster line rates CMOS sensors do not require a frame transfer and hence inherently will not suffer from this problem. Second, with a CMOS sensor the intense spectral lines can be read multiple times within a frame to give a significant increase in dynamic range. We will describe the design, and initial test of a CMOS sensor for use in hyperspectral applications. This device has been designed to give as high a dynamic range as possible with minimum cross-talk. The sensor has been manufactured on high resistivity epitaxial silicon wafers and is be back-thinned and left relatively thick in order to obtain the maximum quantum efficiency across the entire spectral range

  12. Calibration of the ISOLDE acceleration voltage using a high-precision voltage divider and applying collinear fast beam laser spectroscopy

    CERN Document Server

    Krieger, A.; Catherall, R.; Hochschulz, F.; Kramer, J.; Neugart, R.; Rosendahl, S.; Schipper, J.; Siesling, E.; Weinheimer, Ch.; Yordanov, D.T.; Nortershauser, W.

    2011-01-01

    A high-voltage divider with accuracy at the ppm level and collinear laser spectroscopy were used to calibrate the highvoltage installation at the radioactive ion beam facility ISOLDE at CERN. The accurate knowledge of this voltage is particularly important for collinear laser spectroscopy measurements. Beam velocity measurements using frequencycomb based collinear laser spectroscopy agree with the new calibration. Applying this, one obtains consistent results for isotope shifts of stable magnesium isotopes measured using collinear spectroscopy and laser spectroscopy on laser-cooled ions in a trap. The long-term stability and the transient behavior during recovery from a voltage dropout were investigated for the different power supplies currently applied at ISOLDE.

  13. High-Voltage and High-Power Multi-Power Source

    National Research Council Canada - National Science Library

    Smith, Ivor R

    2001-01-01

    ...: The contractor will develop a method of generating multiple high-power and high-voltage pulses, from the single discharge of a capacitor source, with the pulses produced by an array of specially...

  14. Properties of Polymer Composites Used in High-Voltage Applications

    Directory of Open Access Journals (Sweden)

    Ilona Pleşa

    2016-04-01

    Full Text Available The present review article represents a comprehensive study on polymer micro/nanocomposites that are used in high-voltage applications. Particular focus is on the structure-property relationship of composite materials used in power engineering, by exploiting fundamental theory as well as numerical/analytical models and the influence of material design on electrical, mechanical and thermal properties. In addition to describing the scientific development of micro/nanocomposites electrical features desired in power engineering, the study is mainly focused on the electrical properties of insulating materials, particularly cross-linked polyethylene (XLPE and epoxy resins, unfilled and filled with different types of filler. Polymer micro/nanocomposites based on XLPE and epoxy resins are usually used as insulating systems for high-voltage applications, such as: cables, generators, motors, cast resin dry-type transformers, etc. Furthermore, this paper includes ample discussions regarding the advantages and disadvantages resulting in the electrical, mechanical and thermal properties by the addition of micro- and nanofillers into the base polymer. The study goals are to determine the impact of filler size, type and distribution of the particles into the polymer matrix on the electrical, mechanical and thermal properties of the polymer micro/nanocomposites compared to the neat polymer and traditionally materials used as insulation systems in high-voltage engineering. Properties such as electrical conductivity, relative permittivity, dielectric losses, partial discharges, erosion resistance, space charge behavior, electric breakdown, tracking and electrical tree resistance, thermal conductivity, tensile strength and modulus, elongation at break of micro- and nanocomposites based on epoxy resin and XLPE are analyzed. Finally, it was concluded that the use of polymer micro/nanocomposites in electrical engineering is very promising and further research work

  15. Increasing of Switching Abilities of High Voltage Circuit Breakers

    OpenAIRE

    RUSTEMLI, Sabir

    2015-01-01

    The most effective way of increasing switching abilities of high voltage circuit breakers in energy transmission systems is to influence around zero degree to short circuit currents (Maljkovic Z et al 2000; Gashimov, A.M et al. 2001;Antipov, K.M et al. 1985; Gashimov A.M 1991). For this reason, transformers neutral points should be grounded variously for limitation of asymmetric short circuit currents. But another way for this limitation is grounded of transformers neutral points over non-lin...

  16. High-Voltage Power Supply System for Laser Isotope Separation

    Energy Technology Data Exchange (ETDEWEB)

    Ketaily, E.C.; Buckner, R.P.; Uhrik, R.L.

    1979-06-26

    This report presents several concepts for Laser High-Voltage Power Supply (HVPS) Systems for a Laser Isotope Separation facility. Selection of equipments and their arrangement into operational systems is based on proven designs and on application concepts now being developed. This report has identified a number of alternative system arrangements and has provided preliminary cost estimates for each. The report includes a recommendation for follow-on studies that will further define the optimum Laser HVPS Systems. Brief descriptions are given of Modulator/Regulator circuit trade-offs, system control interfaces, and their impact on costs.

  17. Reproductive hazards among workers at high voltage substations.

    Science.gov (United States)

    Nordström, S; Birke, E; Gustavsson, L

    1983-01-01

    A retrospective study on reproductive hazards was performed among 542 employees at Swedish power plants. Questionnaires were answered by 89% of the employees. Data on pregnancies were checked by studying hospital case records. There was a statistically significant, decreased frequency of "normal" pregnancy outcome, almost exclusively due to an increased frequency of congenital malformations, when the father was a high-voltage switchyard worker. The differences in pregnancy outcome could not be explained by any of the confounding factors analyzed. The total number of children with malformations (26) and the total number of pregnancies in this study, however, were very small.

  18. 76 FR 70721 - Voltage Coordination on High Voltage Grids; Notice of Staff Workshop

    Science.gov (United States)

    2011-11-15

    ... software could improve reliability and market efficiency. The workshop will address how entities currently coordinate economic dispatch and voltage control and the capability of existing and emerging software to...

  19. Development of a 55 μm pitch 8 inch CMOS image sensor for the high resolution NDT application

    Science.gov (United States)

    Kim, M. S.; Kim, G.; Cho, G.; Kim, D.

    2016-11-01

    A CMOS image sensor (CIS) with a large area for the high resolution X-ray imaging was designed. The sensor has an active area of 125 × 125 mm2 comprised with 2304 × 2304 pixels and a pixel size of 55 × 55 μm2. First batch samples were fabricated by using an 8 inch silicon CMOS image sensor process with a stitching method. In order to evaluate the performance of the first batch samples, the electro-optical test and the X-ray test after coupling with an image intensifier screen were performed. The primary results showed that the performance of the manufactured sensors was limited by a large stray capacitance from the long path length between the analog multiplexer on the chip and the bank ADC on the data acquisition board. The measured speed and dynamic range were limited up to 12 frame per sec and 55 dB respectively, but other parameters such as the MTF, NNPS and DQE showed a good result as designed. Based on this study, the new X-ray CIS with ~ 50 μm pitch and ~ 150 cm2 active area are going to be designed for the high resolution X-ray NDT equipment for semiconductor and PCB inspections etc.

  20. An accurate continuous calibration system for high voltage current transformer.

    Science.gov (United States)

    Tong, Yue; Li, Bin Hong

    2011-02-01

    A continuous calibration system for high voltage current transformers is presented in this paper. The sensor of this system is based on a kind of electronic instrument current transformer, which is a clamp-shape air core coil. This system uses an optical fiber transmission system for its signal transmission and power supply. Finally the digital integrator and fourth-order convolution window algorithm as error calculation methods are realized by the virtual instrument with a personal computer. It is found that this system can calibrate a high voltage current transformer while energized, which means avoiding a long calibrating period in the power system and the loss of power metering expense. At the same time, it has a wide dynamic range and frequency band, and it can achieve a high accuracy measurement in a complex electromagnetic field environment. The experimental results and the on-site operation results presented in the last part of the paper, prove that it can reach the 0.05 accuracy class and is easy to operate on site.

  1. Survey of high voltage electron microscopy worldwide in 1998.

    Energy Technology Data Exchange (ETDEWEB)

    Allen, C. W.

    1998-03-05

    High voltage TEMs were introduced commercially thirty years ago, with the installations of 500 kV Hitachi instruments at the Universities of Nagoya and Tokyo. Since that time 53 commercial instruments, having maximum accelerating potentials of 0.5-3.5 MV, will have been delivered by the end of 1998. Table 1 summarizes the sites and some information regarding those HVEMS which are available in 1998. This corrects, updates and expands an earlier report of this sort [2]. There have been three commercial HVEM manufacturers: AEI (UK), Hitachi and JEOL (Japan). The proportion of the total number of HVEMS produced by each manufacturer is similar to that reflected in Table 1: AEI and Kratos/AEI (12), Hitachi (20) and JEOL (21). The term Kratos/AEI refers to instruments delivered after the takeover of AEI by Grates in the late 1970's. In Table 1 only maximum accelerating potentials are listed, which is generally also the design value for which the resolution for imaging was optimized. It is important to realize that in many applications, especially those studying irradiation effects, much lower voltages may be employed somewhat routinely to minimize atom displacements by the incident electron beam during analysis. These minimum values range from 100 kV for the AEI and Kratos/AEI instruments to typically 400 kV for the current generation of atomic resolution instruments, the latter being well above the thresholds for displacement in light elements such as Al and Si and for displacement of anions in many ceramic materials such as the high Tc superconductors, for example. An additional potential problem is electron-induced sputtering and differential sputtering (unequal sputtering rates in multicomponent materials), especially when accurate elemental microanalysis is being attempted. These same issues may arise for intermediate voltage TEMs as well, of course.

  2. Novel Interleaved Converter with Extra-High Voltage Gain to Process Low-Voltage Renewable-Energy Generation

    Directory of Open Access Journals (Sweden)

    Chih-Lung Shen

    2016-10-01

    Full Text Available This paper presents a novel interleaved converter (NIC with extra-high voltage gain to process the power of low-voltage renewable-energy generators such as photovoltaic (PV panel, wind turbine, and fuel cells. The NIC can boost a low input voltage to a much higher voltage level to inject renewable energy to DC bus for grid applications. Since the NIC has two circuit branches in parallel at frond end to share input current, it is suitable for high power applications. In addition, the NIC is controlled in an interleaving pattern, which has the advantages that the NIC has lower input current ripple, and the frequency of the ripple is twice the switching frequency. Two coupled inductors and two switched capacitors are incorporated to achieve a much higher voltage gain than conventional high step-up converters. The proposed NIC has intrinsic features such as leakage energy totally recycling and low voltage stress on power semiconductor. Thorough theoretical analysis and key parameter design are presented in this paper. A prototype is built for practical measurements to validate the proposed NIC.

  3. Design of high-throughput and low-power true random number generator utilizing perpendicularly magnetized voltage-controlled magnetic tunnel junction

    Directory of Open Access Journals (Sweden)

    Hochul Lee

    2017-05-01

    Full Text Available A true random number generator based on perpendicularly magnetized voltage-controlled magnetic tunnel junction devices (MRNG is presented. Unlike MTJs used in memory applications where a stable bit is needed to store information, in this work, the MTJ is intentionally designed with small perpendicular magnetic anisotropy (PMA. This allows one to take advantage of the thermally activated fluctuations of its free layer as a stochastic noise source. Furthermore, we take advantage of the voltage dependence of anisotropy to temporarily change the MTJ state into an unstable state when a voltage is applied. Since the MTJ has two energetically stable states, the final state is randomly chosen by thermal fluctuation. The voltage controlled magnetic anisotropy (VCMA effect is used to generate the metastable state of the MTJ by lowering its energy barrier. The proposed MRNG achieves a high throughput (32 Gbps by implementing a 64×64 MTJ array into CMOS circuits and executing operations in a parallel manner. Furthermore, the circuit consumes very low energy to generate a random bit (31.5 fJ/bit due to the high energy efficiency of the voltage-controlled MTJ switching.

  4. A high-speed low-noise transimpedance amplifier in a 025 mum CMOS technology

    CERN Document Server

    Anelli, G; Casagrande, L; Despeisse, Matthieu; Jarron, Pierre; Pelloux, Nicolas; Saramad, Shahyar

    2003-01-01

    We present the simulated and measured performance of a transimpedance amplifier designed in a quarter micron CMOS process. Containing only NMOS and PMOS devices, this amplifier can be integrated in any submicron CMOS process. The main feature of this design is the use of a transistor in the feedback path instead of a resistor. The circuit has been optimized for reading signals coming from silicon strip detectors with few pF input capacitance. For an input charge of 4fC, an input capacitance of 4pF and a transresistance of 135kOmega, we have measured an output pulse fall time of 3ns and an Equivalent Noise Charge (ENC) of around 350 electrons rms. In view of the operation of the chip at cryogenic temperatures, measurements at 130K have also been carried out, showing an overall improvement in the performance of the chip. Fall times down to 1.5ns have been measured. An integrated circuit containing 32 channels has been designed and wire bonded to a silicon strip detector and successfully used for the constructio...

  5. 30 CFR 75.812-2 - High-voltage power centers and transformers; record of examination.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage power centers and transformers; record of examination. 75.812-2 Section 75.812-2 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... High-Voltage Distribution § 75.812-2 High-voltage power centers and transformers; record of examination...

  6. 75 FR 17529 - High-Voltage Continuous Mining Machine Standard for Underground Coal Mines

    Science.gov (United States)

    2010-04-06

    ... Safety Standards--Underground Coal Mines Section 75.823 High-Voltage Continuous Mining Machines; Scope... High-Voltage Continuous Mining Machine Standard for Underground Coal Mines AGENCY: Mine Safety and... of high-voltage continuous mining machines in underground coal mines. It also revises MSHA's design...

  7. 30 CFR 18.53 - High-voltage longwall mining systems.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage longwall mining systems. 18.53..., EVALUATION, AND APPROVAL OF MINING PRODUCTS ELECTRIC MOTOR-DRIVEN MINE EQUIPMENT AND ACCESSORIES Construction and Design Requirements § 18.53 High-voltage longwall mining systems. (a) In each high-voltage motor...

  8. Lightning performance assessment of Hellenic high voltage transmission lines

    Energy Technology Data Exchange (ETDEWEB)

    Ekonomou, Lambros [Hellenic American University, 12 Kaplanon Str., 106 80 Athens (Greece); Gonos, Ioannis F.; Stathopulos, Ioannis A. [National Technical University of Athens, School of Electrical and Computer Engineering, High Voltage Laboratory, 9 Iroon Politechniou St., Zografou Campus, 157 80 Athens (Greece)

    2008-04-15

    A methodology for assessing the lightning performance of Hellenic high voltage transmission lines has been developed. Its main advantage is that the analysed transmission line is divided into regions and the analysis is conducted separately for each one region, taking into account the individual characteristics, which exist in each one of them. The developed approach intends to offer more accuracy in the assessment of lightning performance of Hellenic high voltage transmission lines and of similar lines, where they run at the same time through a plain region, a coastline and/or a mountainous region. The aims of the paper are to describe in detail the proposed methodology and to present results obtained by its application on operating Hellenic transmission lines of 150 and 400 kV. The computed results are compared with the results produced by another software tool published in the technical literature and with the real records of outage rate showing a good agreement. The presented methodology, which is coded in a comprehensive computer program, can be proved valuable to the studies of electric power systems designers intending in a more effective lightning protection. (author)

  9. Topics in recent studies with high-voltage electron microscopes.

    Science.gov (United States)

    Mori, Hirotaro

    2011-01-01

    In this article, topics in recent studies with high-voltage electron microscopes (HVEMs) are reviewed. High-voltage electron microscopy possesses a number of advantages that cannot be afforded by conventional electron microscopy, thus providing a unique microscopy technique in both materials science and biological science. One of these advantages is the capability of continuously observing phenomena using a variety of electron microscopy techniques simultaneously with the introduction of the displacement of atoms from lattice points. This has enabled in-depth studies on such fundamental subjects as the crystalline-to-amorphous-to-crystalline transition, the motion properties of point defects and the one-dimensional diffusion of dislocation loops. Electron tomography studies using HVEMs take advantage of the large observable thickness of a specimen. In addition, by combining different advantages, a number of advanced applications in materials science have been carried out, including analyses of the atomic structure of a reduction-induced reconstructed surface and the atomic mechanism behind the self-catalytic vapor-liquid-solid growth of an oxide nanowire. As long as excellent and invaluable studies that cannot be carried out without HVEMs appear in succession, it is necessary to make the utmost efforts to improve these microscopes.

  10. A high-voltage rechargeable magnesium-sodium hybrid battery

    Energy Technology Data Exchange (ETDEWEB)

    Li, Yifei; An, Qinyou; Cheng, Yingwen; Liang, Yanliang; Ren, Yang; Sun, Cheng-Jun; Dong, Hui; Tang, Zhongjia; Li, Guosheng; Yao, Yan

    2017-04-01

    Growing global demand of safe and low-cost energy storage technology triggers strong interests in novel battery concepts beyond state-of-art Li-ion batteries. Here we report a high-voltage rechargeable Mg–Na hybrid battery featuring dendrite-free deposition of Mg anode and Na-intercalation cathode as a low-cost and safe alternative to Li-ion batteries for large-scale energy storage. A prototype device using a Na3V2(PO4)3 cathode, a Mg anode, and a Mg–Na dual salt electrolyte exhibits the highest voltage (2.60 V vs. Mg) and best rate performance (86% capacity retention at 10C rate) among reported hybrid batteries. Synchrotron radiation-based X-ray absorption near edge structure (XANES), atomic-pair distribution function (PDF), and high-resolution X-ray diffraction (HRXRD) studies reveal the chemical environment and structural change of Na3V2(PO4)3 cathode during the Na ion insertion/deinsertion process. XANES study shows a clear reversible shift of vanadium K-edge and HRXRD and PDF studies reveal a reversible two-phase transformation and V–O bond length change during cycling. The energy density of the hybrid cell could be further improved by developing electrolytes with a higher salt concentration and wider electrochemical window. This work represents a significant step forward for practical safe and low-cost hybrid batteries.

  11. Pollution Maintenance Techniques in Coastal High Voltage Installations

    Directory of Open Access Journals (Sweden)

    E. Pyrgioti

    2011-02-01

    Full Text Available Pollution of outdoor high voltage insulators is a common problem for utilities, with a considerable impact to power system reliability. In an effort to prevent possible flashovers due to pollution, many methods have been applied, aiming to improve the insulation performance, either by suppressing the formation of surface conductivity or by increasing the possible insulation level. In the case of substations, the selection of the appropriate technique is complex due to certain issues correlated to the nature of the installation. In this paper, several techniques usually implemented by utilities, are investigated based on the experienced gained in the case of Crete, a Greek island in southern Europe, where due to the coastal development of the power system, the majority of high voltage installations are exposed to intense marine pollution. The technique of coating insulators with Room Temperature Vulcanized Silicone Rubber (RTV SIR has proved rather efficient and therefore is presented extendedly. Correlation of the material behaviour with environmental conditions is discussed and results from long term monitoring, including environmental parameters and leakage current measurements, in a 150 kV Substation are presented. It is shown that RTV SIR coatings have remarkably suppressed surface activity and that porcelain insulators exhibit different activity period when coated.

  12. A CMOS application-specified-integrated-circuit for 40 GHz high-electron-mobility-transistors automatic biasing

    Science.gov (United States)

    De Matteis, M.; De Blasi, M.; Vallicelli, E. A.; Zannoni, M.; Gervasi, M.; Bau, A.; Passerini, A.; Baschirotto, A.

    2017-02-01

    This paper presents the design and the experimental results of a CMOS Automatic Control System (ACS) for the biasing of High-Electron-Mobility-Transistors (HEMT). The ACS is the first low-power mixed-signal Application-Specified-Integrated-Circuit (ASIC) able to automatically set and regulate the operating point of an off-chip 6 HEMT Low-Noise-Amplifiers (LNAs), hence it composes a two-chip system (the ACS+LNAs) to be used in the Large Scale Polarization Explorer (LSPE) stratospheric balloon for Cosmic Microwave Background (CMB) signal observation. The hereby presented ACS ASIC provides a reliable instrumentation for gradual and very stable LNAs characterization, switching-on, and operating point (digital programmable device components. The ASIC prototype has been implemented in a CMOS 0.35 μ m technology (12 mm2 area occupancy). It operates at 4 kHz clock frequency. The power consumption of one-channel ASIC (biasing one LNA) is 3.6 mW, whereas 30 mW are consumed by a single LNA device.

  13. Electrical characterization of thulium silicate interfacial layers for integration in high-k/metal gate CMOS technology

    Science.gov (United States)

    Dentoni Litta, Eugenio; Hellström, Per-Erik; Henkel, Christoph; Östling, Mikael

    2014-08-01

    This work presents a characterization of the electrical properties of thulium silicate thin films, within the scope of a possible application as IL (interfacial layer) in scaled high-k/metal gate CMOS technology. Silicate formation is investigated over a wide temperature range (500-900 °C) through integration in MOS capacitor structures and analysis of the resulting electrical properties. The results are compared to those obtained from equivalent devices integrating lanthanum silicate interfacial layers. The thulium silicate IL is formed through a gate-last CMOS-compatible process flow, providing IL EOT of 0.1-0.3 nm at low formation temperature and interface state density at flatband condition below 2 × 1011 cm-2 eV-1. The effects of a possible integration in a gate-first process flow with a maximum thermal budget of 1000 °C are also evaluated, achieving an IL EOT of 0.2-0.5 nm, an interface state density at flatband condition ˜1 × 1011 cm-2 eV-1 and a reduction in gate leakage current density of one order of magnitude compared to the same stack without IL.

  14. Characterization of an industry-grade CMOS camera well suited for single molecule localization microscopy - high performance super-resolution at low cost.

    Science.gov (United States)

    Diekmann, Robin; Till, Katharina; Müller, Marcel; Simonis, Matthias; Schüttpelz, Mark; Huser, Thomas

    2017-10-31

    Many commercial as well as custom-built fluorescence microscopes use scientific-grade cameras that represent a substantial share of the instrument's cost. This holds particularly true for super-resolution localization microscopy where high demands are placed especially on the detector with respect to sensitivity, noise, and also image acquisition speed. Here, we present and carefully characterize an industry-grade CMOS camera as a cost-efficient alternative to commonly used scientific cameras. Direct experimental comparison of these two detector types shows widely similar performance for imaging by single molecule localization microscopy (SMLM). Furthermore, high image acquisition speeds are demonstrated for the CMOS detector by ultra-fast SMLM imaging.

  15. High precision, low disturbance calibration of the High Voltage system of the CMS Barrel Electromagnetic Calorimeter

    CERN Document Server

    Marzocchi, Badder

    2017-01-01

    The CMS Electromagnetic Calorimeter is made of scintillating lead tungstate crystals, using avalanche photodiodes (APD) as photo-detectors in the barrel part. The high voltage system, consisting of 1224 channels, biases groups of 50 APD pairs, each at a voltage of about 380 V. The APD gain dependence on the voltage is 3pct/V. A stability of better than 60 mV is needed to have negligible impact on the calorimeter energy resolution. Until 2015 manual calibrations were performed yearly. A new calibration system was deployed recently, which satisfies the requirement of low disturbance and high precision. The system is discussed in detail and first operational experience is presented.

  16. The design and development of low- and high-voltage ASICs for space-borne CCD cameras

    Science.gov (United States)

    Waltham, N.; Morrissey, Q.; Clapp, M.; Bell, S.; Jones, L.; Torbet, M.

    2017-12-01

    The CCD remains the pre-eminent visible and UV wavelength image sensor in space science, Earth and planetary remote sensing. However, the design of space-qualified CCD readout electronics is a significant challenge with requirements for low-volume, low-mass, low-power, high-reliability and tolerance to space radiation. Space-qualified components are frequently unavailable and up-screened commercial components seldom meet project or international space agency requirements. In this paper, we describe an alternative approach of designing and space-qualifying a series of low- and high-voltage mixed-signal application-specific integrated circuits (ASICs), the ongoing development of two low-voltage ASICs with successful flight heritage, and two new high-voltage designs. A challenging sub-system of any CCD camera is the video processing and digitisation electronics. We describe recent developments to improve performance and tolerance to radiation-induced single event latchup of a CCD video processing ASIC originally developed for NASA's Solar Terrestrial Relations Observatory and Solar Dynamics Observatory. We also describe a programme to develop two high-voltage ASICs to address the challenges presented with generating a CCD's bias voltages and drive clocks. A 0.35 μm, 50 V tolerant, CMOS process has been used to combine standard low-voltage 3.3 V transistors with high-voltage 50 V diffused MOSFET transistors that enable output buffers to drive CCD bias drains, gates and clock electrodes directly. We describe a CCD bias voltage generator ASIC that provides 24 independent and programmable 0-32 V outputs. Each channel incorporates a 10-bit digital-to-analogue converter, provides current drive of up to 20 mA into loads of 10 μF, and includes current-limiting and short-circuit protection. An on-chip telemetry system with a 12-bit analogue-to-digital converter enables the outputs and multiple off-chip camera voltages to be monitored. The ASIC can drive one or more CCDs and

  17. High-voltage high-current triggering vacuum switch

    International Nuclear Information System (INIS)

    Alferov, D.F.; Bunin, R.A.; Evsin, D.V.; Sidorov, V.A.

    2012-01-01

    Experimental investigations of switching and breaking capacities of the new high current triggered vacuum switch (TVS) are carried out at various parameters of discharge current. It has been shown that the high current triggered vacuum switch TVS can switch repeatedly a current from units up to ten kiloampers with duration up to ten millisecond [ru

  18. High-voltage atmospheric breakdown across intervening rutile dielectrics.

    Energy Technology Data Exchange (ETDEWEB)

    Williamson, Kenneth Martin; Simpson, Sean; Coats, Rebecca Sue; Jorgenson, Roy Eberhardt; Hjalmarson, Harold Paul; Pasik, Michael Francis

    2013-09-01

    This report documents work conducted in FY13 on electrical discharge experiments performed to develop predictive computational models of the fundamental processes of surface breakdown in the vicinity of high-permittivity material interfaces. Further, experiments were conducted to determine if free carrier electrons could be excited into the conduction band thus lowering the effective breakdown voltage when UV photons (4.66 eV) from a high energy pulsed laser were incident on the rutile sample. This report documents the numerical approach, the experimental setup, and summarizes the data and simulations. Lastly, it describes the path forward and challenges that must be overcome in order to improve future experiments for characterizing the breakdown behavior for rutile.

  19. Propylene based systems for high voltage cable insulation applications

    Science.gov (United States)

    Hosier, I. L.; Cozzarini, L.; Vaughan, A. S.; Swingler, S. G.

    2009-08-01

    Crosslinked polyethylene (XLPE) remains the material of choice for extruded high voltage cables, possessing excellent thermo-mechanical and electrical properties. However, it is not easily recyclable posing questions as to its long term sustainability. Whilst both polyethylene and polypropylene are widely recycled and provide excellent dielectric properties, polypropylene has significantly better mechanical integrity at high temperatures than polyethylene. However, while isotactic polypropylene is too stiff at room temperature for incorporation into a cable system, previous studies by the authors have indicated that this limitation can be overcome by using a propylene-ethylene copolymer. Whilst these previous studies considered unrelated systems, the current study aims to quantify the usefulness of a series of related random propylene-ethylene co-polymers and assesses their potential for replacing XLPE.

  20. CMOS Pixel Development for the ATLAS Experiment at HL-LHC

    CERN Document Server

    Ristic, Branislav; The ATLAS collaboration

    2017-01-01

    To cope with the rate and radiation environment expected at the HL-LHC new approaches are being developed on CMOS pixel detectors, providing charge collection in a depleted layer. They are based on technologies that allow to use high depletion voltages (HV-MAPS) and high resistivity wafers (HR-MAPS) for large depletion depths; radiation hard processed with multiple nested wells to allow CMOS electronics to be embedded safely into the sensor substrate. We are investigating depleted CMOS pixels with monolithic or hybrid designs concerning their suitability for high rate, fast timing and high radiation operation at LHC. This paper will discuss recent results on the main candidate technologies and the current development towards a monolithic solution.

  1. WE-AB-207A-01: BEST IN PHYSICS (IMAGING): High-Resolution Cone-Beam CT of the Extremities and Cancellous Bone Architecture with a CMOS Detector

    Energy Technology Data Exchange (ETDEWEB)

    Cao, Q; Brehler, M; Sisniega, A; Marinetto, E; Stayman, J; Siewerdsen, J; Zbijewski, W [Johns Hopkins University, Baltimore, MD (United States); Zyazin, A; Peters, I [Teledyne DALSA, Eindhoven (Netherlands); Yorkston, J [Carestream Health, Inc, Penfield, NY (United States)

    2016-06-15

    Purpose: Extremity cone-beam CT (CBCT) with an amorphous silicon (aSi) flat-panel detector (FPD) provides low-dose volumetric imaging with high spatial resolution. We investigate the performance of the newer complementary metal-oxide semiconductor (CMOS) detectors to enhance resolution of extremities CBCT to ∼0.1 mm, enabling morphological analysis of trabecular bone. Quantitative in-vivo imaging of bone microarchitecture could present an important advance for osteoporosis and osteoarthritis diagnosis and therapy assessment. Methods: Cascaded systems models of CMOS- and FPD-based extremities CBCT were implemented. Performance was compared for a range of pixel sizes (0.05–0.4 mm), focal spot sizes (0.3–0.6 FS), and x-ray techniques (0.05–0.8 mAs/projection) using detectability of high-, low-, and all-frequency tasks for a nonprewhitening observer. Test-bench implementation of CMOS-based extremity CBCT involved a Teledyne DALSA Xineos3030HR detector with 0.099 mm pixels and a compact rotating anode x-ray source with 0.3 FS (IMD RTM37). Metrics of bone morphology obtained using CMOS-based CBCT were compared in cadaveric specimens to FPD-based system using a Varian PaxScan4030 (0.194 mm pixels). Results: Finer pixel size and reduced electronic noise for CMOS (136 e compared to 2000 e for FPD) resulted in ∼1.9× increase in detectability for high-frequency tasks and ∼1.1× increase for all-frequency tasks. Incorporation of the new x-ray source with reduced focal spot size (0.3 FS vs. 0.5 FS used on current extremities CBCT) improved detectability for CMOS-based CBCT by ∼1.7× for high-frequency tasks. Compared to FPD CBCT, the CMOS detector yielded improved agreement with micro-CT in measurements of trabecular thickness (∼1.7× reduction in relative error), bone volume (∼1.5× reduction), and trabecular spacing (∼3.5× reduction). Conclusion: Imaging performance modelling and experimentation indicate substantial improvements for high

  2. WE-AB-207A-01: BEST IN PHYSICS (IMAGING): High-Resolution Cone-Beam CT of the Extremities and Cancellous Bone Architecture with a CMOS Detector

    International Nuclear Information System (INIS)

    Cao, Q; Brehler, M; Sisniega, A; Marinetto, E; Stayman, J; Siewerdsen, J; Zbijewski, W; Zyazin, A; Peters, I; Yorkston, J

    2016-01-01

    Purpose: Extremity cone-beam CT (CBCT) with an amorphous silicon (aSi) flat-panel detector (FPD) provides low-dose volumetric imaging with high spatial resolution. We investigate the performance of the newer complementary metal-oxide semiconductor (CMOS) detectors to enhance resolution of extremities CBCT to ∼0.1 mm, enabling morphological analysis of trabecular bone. Quantitative in-vivo imaging of bone microarchitecture could present an important advance for osteoporosis and osteoarthritis diagnosis and therapy assessment. Methods: Cascaded systems models of CMOS- and FPD-based extremities CBCT were implemented. Performance was compared for a range of pixel sizes (0.05–0.4 mm), focal spot sizes (0.3–0.6 FS), and x-ray techniques (0.05–0.8 mAs/projection) using detectability of high-, low-, and all-frequency tasks for a nonprewhitening observer. Test-bench implementation of CMOS-based extremity CBCT involved a Teledyne DALSA Xineos3030HR detector with 0.099 mm pixels and a compact rotating anode x-ray source with 0.3 FS (IMD RTM37). Metrics of bone morphology obtained using CMOS-based CBCT were compared in cadaveric specimens to FPD-based system using a Varian PaxScan4030 (0.194 mm pixels). Results: Finer pixel size and reduced electronic noise for CMOS (136 e compared to 2000 e for FPD) resulted in ∼1.9× increase in detectability for high-frequency tasks and ∼1.1× increase for all-frequency tasks. Incorporation of the new x-ray source with reduced focal spot size (0.3 FS vs. 0.5 FS used on current extremities CBCT) improved detectability for CMOS-based CBCT by ∼1.7× for high-frequency tasks. Compared to FPD CBCT, the CMOS detector yielded improved agreement with micro-CT in measurements of trabecular thickness (∼1.7× reduction in relative error), bone volume (∼1.5× reduction), and trabecular spacing (∼3.5× reduction). Conclusion: Imaging performance modelling and experimentation indicate substantial improvements for high

  3. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  4. Unique Power Dense, Configurable, Robust, High-Voltage Power Supplies Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Princeton Power will develop and deliver three small, lightweight 50 W high-voltage power supplies that have a configurable output voltage range from 500 to 50 kVDC....

  5. Design and development of high voltage high power operational ...

    Indian Academy of Sciences (India)

    and R1. A pre unity gain low pass filter also included in the designed power opamp with a cut-off frequency of 30 KHz. This is basically to filter out the high frequency noise in the input signal due to its application of driving the Piezo Actuator. The capacitive loads and high gain will cause the oscillations. The closed loop gain ...

  6. Comparators in nanometer CMOS technology

    CERN Document Server

    Goll, Bernhard

    2015-01-01

    This book covers the complete spectrum of the fundamentals of clocked, regenerative comparators, their state-of-the-art, advanced CMOS technologies, innovative comparators inclusive circuit aspects, their characterization and properties. Starting from the basics of comparators and the transistor characteristics in nanometer CMOS, seven high-performance comparators developed by the authors in 120nm and 65nm CMOS are described extensively. Methods and measurement circuits for the characterization of advanced comparators are introduced. A synthesis of the largely differing aspects of demands on modern comparators and the properties of devices being available in nanometer CMOS, which are posed by the so-called nanometer hell of physics, is accomplished. The book summarizes the state of the art in integrated comparators. Advanced measurement circuits for characterization will be introduced as well as the method of characterization by bit-error analysis usually being used for characterization of optical receivers. ...

  7. Implementation and low speed test of ultra-fast interface circuits for Josephson-CMOS hybrid memories

    Energy Technology Data Exchange (ETDEWEB)

    Fujiwara, K.; Miyakawa, H.; Yoshikawa, N.; Feng, Y.; Whiteley, S.R.; Van Duzer, T

    2003-10-15

    We have been developing Josephson-CMOS hybrid memories where high-density CMOS devices are used as storage cells. One of the key components in the system is the interface circuit, which amplifies the signal from the SFQ circuits into voltage level processible in the CMOS circuits at high-speed. In this paper, we have implemented the ultra-fast interface circuit, which is composed of a Josephson driver and a Josephson-CMOS hybrid amplifier. The propagation delay of the ultra-fast interface circuit is estimated to be about 60 ps assuming a 2.5 kA/cm{sup 2} Nb process and a 0.6 {mu}m CMOS process. A low speed test results of the interface circuit shows that it amplifies the input voltage of 80 {mu}V to 0.9 V. We have also investigated their propagation delay and output voltage swing assuming the spread of the critical current in the Josephson stack.

  8. 76 FR 72203 - Voltage Coordination on High Voltage Grids; Notice of Reliability Workshop Agenda

    Science.gov (United States)

    2011-11-22

    ... this event will be posted on the Calendar of Events on the Commission's Web site, http://www.ferc.gov...-11:30 a.m.--Current approaches and challenges to analyzing voltage support and reactive margin during... currently coordinate the dispatch of reactive resources to support forecasted loads, generation and...

  9. High voltage distribution scheme for large size GEM detector

    International Nuclear Information System (INIS)

    Saini, J.; Kumar, A.; Dubey, A.K.; Negi, V.S.; Chattopadhyay, S.

    2016-01-01

    Gas Electron Multiplier (GEM) detectors will be used for Muon tracking in the Compressed Baryonic Matter (CBM) experiment at the Facility for Anti-proton Ion Research (FAIR) at Darmstadt, Germany. The sizes of the detector modules in the Muon chambers are of the order of 1 metre x 0.5 metre. For construction of these chambers, three GEM foils are used per chamber. These foils are made by two layered 50μm thin kapton foil. Each GEM foil has millions of holes on it. In such a large scale manufacturing of the foils, even after stringent quality controls, some of the holes may still have defects or defects might develop over the time with operating conditions. These defects may result in short-circuit of the entire GEM foil. A short even in a single hole will make entire foil un-usable. To reduce such occurrences, high voltage (HV) segmentation within the foils has been introduced. These segments are powered either by individual HV supply per segment or through an active HV distribution to manage such a large number of segments across the foil. Individual supplies apart from being costly, are highly complex to implement. Additionally, CBM will have high intensity of particles bombarding on the detector causing the change of resistive chain current feeding the GEM detector with the variation in the intensity. This leads to voltage fluctuations across the foil resulting in the gain variation with the particle intensity. Hence, a low cost active HV distribution is designed to take care of the above discussed issues

  10. High efficiency transformation of E. coli by high voltage electroporation.

    OpenAIRE

    Dower, W J; Miller, J F; Ragsdale, C W

    1988-01-01

    E. coli can be transformed to extremely high efficiencies by subjecting a mixture of cells and DNA to brief but intense electrical fields of exponential decay waveform (electroporation). We have obtained 10(9) to 10(10) transformants/micrograms with strains LE392 and DH5 alpha, and plasmids pUC18 and pBR329. The process is highly dependent on two characteristics of the electrical pulse: the electric field strength and the pulse length (RC time constant). The frequency of transformation is a l...

  11. Design and development of high voltage high power operational ...

    Indian Academy of Sciences (India)

    A pre unity gain low pass filter also included in the designed power opamp with a cut-off frequency of 30 KHz. This is basically to filter out the high frequency noise in the input signal due to its application of ... power opamp, using chip passive components, semiconductor bare dice minimizes the size while increasing the ...

  12. A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier

    Directory of Open Access Journals (Sweden)

    De Xing Lioe

    2016-04-01

    Full Text Available A complementary metal-oxide semiconductor (CMOS lock-in pixel to observe stimulated Raman scattering (SRS using a high speed lateral electric field modulator (LEFM for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF and switched-capacitor (SC integrator with a fully CMOS differential amplifier. AC (modulated components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10−5 is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed.

  13. Investigating Enhancement Mode Gallium Nitride Power FETs in High Voltage, High Frequency Soft Switching Converters

    DEFF Research Database (Denmark)

    Nour, Yasser; Knott, Arnold; Jørgensen, Ivan Harald Holger

    2016-01-01

    An increased attention has been detected to develop smaller and lighter high voltage power converters in the range of 50V to 400V domain. The main applications for these converters are mainly focused for Power over Ethernet (PoE), LED lighting and AC adapters. This work will discuss a study...... of using enhancement mode gallium nitride switches to form a 50V quasi-square-wave zero-voltage-switching buck converter running at 2-6 MHz under full load. The designed converter achieved 83% efficiency converting 50V input voltage to 12.2V at 9W load....

  14. High Voltage Installation of PS Linac 1 Preinjector

    CERN Multimedia

    CERN PhotoLab

    1974-01-01

    The high-voltage installation of the linac 1 preinjector in its house-sized Faraday cage. Originally driven by a 520 kV Cockcroft-Walton generator, at the time of this picture the HV came from a 520 kV SAMES generator. The column in the front carries a capacitor. The cubicle in the right background is the electronics platform (see 7403120). The round structure at left houses the ion source, from where the protons (and sometimes other ions), electrostatically accelerated to 520 keV, enter the Alvarez structure of linac 1, to be accelerated to 50 MeV. Jean-Luc Vallet is busy with servicing the installation. See also 7403064X, 7403066X.

  15. Local high voltage radiotherapy with curative intent for prostatic carcinoma

    International Nuclear Information System (INIS)

    Jacobi, G.H.; Kurth, K.H.; Hohenfellner, R.

    1979-01-01

    In a 10-year interval 179 patients with prostatic carcinoma were treated by cobalt-60 teletherapy (7600 R). A selected group of 47 patients with localized disease and irradiated with curative intent had serial prostatic biopsies and were analized after a minimum follow-up of 1 year. Biopsies of half of the patients rendered definitively negative, on an average 14 months after radiotherapy. 8 patients with initial negative biopsy changed to positive secondarily. In one third of the patients histological conversion was missed, considered as radiation persister. Persistent carcinoma were of predominant low grade. 5 patients developed distant metastases 30 months after irradiation on an average. These patients had persistent positive tissue studies. Over all cumulative 5-years survival was 89%. In patients with prostatic carcinoma and local high voltage radiotherapy with curative intent (stage A through C) serial prostatic biopsies to document therapy effect seen mandatory. (orig.) 891 AJ/orig. 892 BRE [de

  16. Electric and magnetic field measurements in a high voltage center.

    Science.gov (United States)

    Safigianni, Anastasia S; Spyridopoulos, Anastasios I; Kanas, Vasilis L

    2012-01-01

    This paper investigates the electric and magnetic fields inside a large high voltage center constituted both of 400/150 and 150/20 kV substation areas. Results of previous field measurements and calculations in substations, made by the authors of this paper or other researchers, are presented first. The basic data distinguishing the examined center from previously examined substations follow. The main results of the field measurements in the areas of the above-mentioned center are presented in relevant diagrams. General conclusions arising from the comparison of the measured field values with relevant reference levels in force for safe public and occupational exposure as well as with the results of previous research are finally given.

  17. High-voltage, low-inductance gas switch

    Science.gov (United States)

    Gruner, Frederick R.; Stygar, William A.

    2016-03-22

    A low-inductance, air-insulated gas switch uses a de-enhanced annular trigger ring disposed between two opposing high voltage electrodes. The switch is DC chargeable to 200 kilovolts or more, triggerable, has low jitter (5 ns or less), has pre-fire and no-fire rates of no more than one in 10,000 shots, and has a lifetime of greater than 100,000 shots. Importantly, the switch also has a low inductance (less than 60 nH) and the ability to conduct currents with less than 100 ns rise times. The switch can be used with linear transformer drives or other pulsed-power systems.

  18. A CMOS 0.13 mu m, 5-Gb/s laser driver for high energy physics applications

    CERN Document Server

    Mazza, G; Moreira, P; Rivetti, A; Soos, C; Troska, J; Wyllie, K

    2012-01-01

    The GigaBit Laser Driver (GBLD) is a radiation tolerant ASIC designed to drive both edge emitting lasers and VCSELs at data rates up to 5 Gb/s. It is part of the GigaBit Transceiver (GBT) and Versatile Link projects, which are designing a bi-directional optical data transmission system capable of operating in the radiation environment of a typical HEP experiment. The GBLD can provide laser diode modulation currents up to 24 mA and laser bias currents up to 43 mA. Pre- and de-emphasis functions are implemented to compensate for high external capacitive loads and asymmetric laser response. The chip, designed in a 0.13 $\\mu$m CMOS technology, is powered by a single 2.5 V power supply and can be programmed via an $I2C$ interface.

  19. A CMOS 0.13 μm, 5 Gb/s Laser Driver for High Energy Physics Applications

    Science.gov (United States)

    Mazza, Giovanni; Gui, Ping; Moreira, Paulo; Rivetti, Angelo; Soos, Csaba; Troska, Jan; Wyllie, Ken

    2012-12-01

    The GigaBit Laser Driver (GBLD) is a radiation tolerant ASIC designed to drive both edge emitting lasers and VCSELs at data rates up to 5 Gb/s. It is part of the GigaBit Transceiver (GBT) and Versatile Link projects, which are designing a bi-directional optical data transmission system capable of operating in the radiation environment of a typical HEP experiment. The GBLD can provide laser diode modulation currents up to 24 mA and laser bias currents up to 43 mA. Pre- and de-emphasis functions are implemented to compensate for high external capacitive loads and asymmetric laser response. The chip, designed in a 0.13 μm CMOS technology, is powered by a single 2.5 V power supply and can be programmed via an I2C interface.

  20. Development of high voltage PEEK wire with radiation-resistance and cryogenic characteristics

    International Nuclear Information System (INIS)

    Fujita, T.; Hirata, T.; Araki, S.; Ohara, H.; Nishimura, H.

    1989-01-01

    High voltage electric wires insulated with highly-refined polyetheretherketone (PEEK) have been developed for the wiring in fusion reactors, where the wire is required to withstand high voltage under high vacuum up to 10 -5 Torr. The PEEK wires having the advantages of PEEK resin including superior radiation resistance and cryogenic characteristics are usable over a wide range of temperature and in radiation fields. The results of withstand voltage tests proved that the PEEK wires exceeding 0.8 mm in insulation thickness withstand such specified high voltage conditions as 24 kV for 1 minutes by 10 times and 6.6 kV for 110 hours. The results also revealed that the withstand voltage is improved by providing a jacket layer over the insulation and decreased by periodical voltage charge, by bending of the specimen and by water in the conductor. This paper deal with the withstand voltage test results under varied conditions of the PEEK wires. (author)

  1. First high-voltage measurements using Ca{sup +} ions at the ALIVE experiment

    Energy Technology Data Exchange (ETDEWEB)

    König, K., E-mail: kkoenig@ikp.tu-darmstadt.de [Technische Universität Darmstadt, Institut für Kernphysik (Germany); Geppert, Ch. [Universität Mainz, Institut für Kernchemie (Germany); Krämer, J.; Maaß, B. [Technische Universität Darmstadt, Institut für Kernphysik (Germany); Otten, E. W. [Universität Mainz, Institut für Physik (Germany); Ratajczyk, T.; Nörtershäuser, W. [Technische Universität Darmstadt, Institut für Kernphysik (Germany)

    2017-11-15

    Many physics experiments depend on accurate high-voltage measurements to determine for example the exact retardation potential of an electron spectrometer as in the KATRIN experiment or the acceleration voltage of the ions at ISOL facilities. Until now only precision high-voltage dividers can be used to measure voltages up to 65 kV with an accuracy of 1 ppm. However, these dividers need frequent calibration and cross-checking and the direct traceability is not given. In this article we will describe the status of an experiment which aims to measure high voltages using collinear laser spectroscopy and which has the potential to provide a high-voltage standard and hence, a calibration source for precision high-voltage dividers on the 1 ppm level.

  2. First high-voltage measurements using Ca+ ions at the ALIVE experiment

    Science.gov (United States)

    König, K.; Geppert, Ch.; Krämer, J.; Maaß, B.; Otten, E. W.; Ratajczyk, T.; Nörtershäuser, W.

    2017-11-01

    Many physics experiments depend on accurate high-voltage measurements to determine for example the exact retardation potential of an electron spectrometer as in the KATRIN experiment or the acceleration voltage of the ions at ISOL facilities. Until now only precision high-voltage dividers can be used to measure voltages up to 65 kV with an accuracy of 1 ppm. However, these dividers need frequent calibration and cross-checking and the direct traceability is not given. In this article we will describe the status of an experiment which aims to measure high voltages using collinear laser spectroscopy and which has the potential to provide a high-voltage standard and hence, a calibration source for precision high-voltage dividers on the 1 ppm level.

  3. High voltage and high specific capacity dual intercalating electrode Li-ion batteries

    Science.gov (United States)

    West, William C. (Inventor); Blanco, Mario (Inventor)

    2010-01-01

    The present invention provides high capacity and high voltage Li-ion batteries that have a carbonaceous cathode and a nonaqueous electrolyte solution comprising LiF salt and an anion receptor that binds the fluoride ion. The batteries can comprise dual intercalating electrode Li ion batteries. Methods of the present invention use a cathode and electrode pair, wherein each of the electrodes reversibly intercalate ions provided by a LiF salt to make a high voltage and high specific capacity dual intercalating electrode Li-ion battery. The present methods and systems provide high-capacity batteries particularly useful in powering devices where minimizing battery mass is important.

  4. Method and system for a gas tube switch-based voltage source high voltage direct current transmission system

    Science.gov (United States)

    She, Xu; Chokhawala, Rahul Shantilal; Zhou, Rui; Zhang, Di; Sommerer, Timothy John; Bray, James William

    2016-12-13

    A voltage source converter based high-voltage direct-current (HVDC) transmission system includes a voltage source converter (VSC)-based power converter channel. The VSC-based power converter channel includes an AC-DC converter and a DC-AC inverter electrically coupled to the AC-DC converter. The AC-DC converter and a DC-AC inverter include at least one gas tube switching device coupled in electrical anti-parallel with a respective gas tube diode. The VSC-based power converter channel includes a commutating circuit communicatively coupled to one or more of the at least one gas tube switching devices. The commutating circuit is configured to "switch on" a respective one of the one or more gas tube switching devices during a first portion of an operational cycle and "switch off" the respective one of the one or more gas tube switching devices during a second portion of the operational cycle.

  5. Advances in high voltage insulation and arc interruption in SF6 and vacuum

    CERN Document Server

    Maller, V N

    1982-01-01

    Advances in High Voltage Insulation and Arc Interruption in SF6 and Vacuum deals with high voltage breakdown and arc extinction in sulfur hexafluoride (SF6) and high vacuum, with special emphasis on the application of these insulating media in high voltage power apparatus and devices. The design and developmental aspects of various high voltage power apparatus using SF6 and high vacuum are highlighted. This book is comprised of eight chapters and opens with a discussion on electrical discharges in SF6 and high vacuum, along with the properties and handling of SF6 gas. The following chapters fo

  6. Megahertz high voltage pulse generator suitable for capacitive load

    Science.gov (United States)

    Xu, Yu; Chen, Wei; Liang, Hao; Li, Yu-Huai; Liang, Fu-Tian; Shen, Qi; Liao, Sheng-Kai; Peng, Cheng-Zhi

    2017-11-01

    A high voltage pulse generator is presented to drive Pockels cell. The Pockels cell behaves like a capacitor which slows the rise/fall time of the pulse and restrains the repetition rate of the generator. To drive the Pockels cell applied in quantum communication system, it requires about 1 MHz repetition rate with the rise/fall time of the pulse less than 50 ns, adjustable amplitude up to 800 V and an adjustable duration. With the assistance of self-designed transformers, the circuits is simplified that a pair of high current radio frequency (RF) MOSFET drivers are employed to switch the power MOSFETs at a high speed, and the power MOSFETs shape the final output pulse with the requirements. From the tests, the generator can produce 800 V square pulses continously at 1 MHz rate with 46 ns in risetime and 31 ns in falltime when driving a 51 pF capacitive load. And the generator is now used to drive Pockels cell for encoding the polarization of photons.

  7. Performance of a 2-megawatt high voltage test load

    International Nuclear Information System (INIS)

    Horan, D.; Kustom, R.; Ferguson, M.

    1995-01-01

    A high-power, water-cooled resistive load which simulates the electrical load characteristics of a high-power klystron, capable of 2 megawatts dissipation at 95 kV DC, was built and installed at the Advanced Photon Source for use in load-testing high voltage power supplies. During this testing, the test load has logged approximately 35 hours of operation at power levels in excess of one mezawatt. Slight variations in the resistance of the load during operation indicate that leakage currents in the cooling water may be a significant factor affecting the performance of the load. Sufficient performance data have been collected to indicate that leakage current through the deionized (DI) water coolant shunts roughly 15 percent of the full-load current around the load resistor elements. The leakage current could cause deterioration of internal components of the load. The load pressure vessel was disassembled and inspected internally for any signs of significant wear and distress. Results of this inspection and possible modifications for improved performance will be discussed

  8. Latch-up control in CMOS integrated circuits

    International Nuclear Information System (INIS)

    Ochoa, A. Jr.; Estreich, D.B.; Dawes, W.R. Jr.

    1979-01-01

    The potential for latch-up, a pnpn self-sustaining low impedance state, is inherent in standard bulk CMOS structures. Under normal bias, the parasitic SCR is in its blocking state, but if subjected to a high-voltage spike or if exposed to an ionizing environment, triggering may occur. Prevention of latch-up has been achieved by lifetime control methods such as gold doping or neutron irradiation and by modifying the structure with buried layers. Smaller, next-generation CMOS designs will enhance parasitic action making the problem a concern for other than military or space applications alone. Latch-up control methods presently employed are surveyed. Their adaptability to VSLI designs is analyzed

  9. The Investigation of Field Plate Design in 500 V High Voltage NLDMOS

    Directory of Open Access Journals (Sweden)

    Donghua Liu

    2015-01-01

    Full Text Available This paper presents a 500 V high voltage NLDMOS with breakdown voltage (VBD improved by field plate technology. Effect of metal field plate (MFP and polysilicon field plate (PFP on breakdown voltage improvement of high voltage NLDMOS is studied. The coeffect of MFP and PFP on drain side has also been investigated. A 500 V NLDMOS is demonstrated with a 37 μm drift length and optimized MFP and PFP design. Finally the breakdown voltage 590 V and excellent on-resistance performance (Rsp = 7.88 ohm * mm2 are achieved.

  10. A CMOS time to digital converter with analog memory for high energy physics particle detectors

    International Nuclear Information System (INIS)

    Gerds, E.J.; Van der Spiegel, J.; Williams, H.H.; Van Berg, R.

    1994-01-01

    A data driven TDC (Time to Digital Converter) has been designed and fabricated in HP's 1.2 μm nwell CMOS process. The circuit was designed to work with the straw tube electronics of the Superconducting Supercollider (SSC), where the authors wish to measure the arrival time of electrons at a sense wire. The TCCAMU (Time to Charge Converter with an Analog Memory Unit) measures the time between an edge of the system clock and the leading edge of an asynchronous signal, and then gives a digital output representing that time measurement. Analog data sparsification occurs before the digitization with the help of an analog Level 1/Level 2 storage system; Level 1 to Level 2 data transfers are virtual, in the sense that one swaps capacitor addresses instead of moving charge. Two separate fabrication runs resulted in chips that have ∼ 108 ps/LSB resolution for any particular storage location. The measurement range is 8-24 ns, but adding digital logic to count the reference clock will extend the range to ∼ 1 second

  11. High-Voltage LED Light Engine with Integrated Driver

    Energy Technology Data Exchange (ETDEWEB)

    Soer, Wouter [Lumileds LLC, San Jose, CA (United States)

    2016-02-29

    LED luminaires have seen dramatic changes in cost breakdown over the past few years. The LED component cost, which until recently was the dominant portion of luminaire cost, has fallen to a level of the same order as the other luminaire components, such as the driver, housing, optics etc. With the current state of the technology, further luminaire performance improvement and cost reduction is realized most effectively by optimization of the whole system, rather than a single component. This project focuses on improving the integration between LEDs and drivers. Lumileds has developed a light engine platform based on low-cost high-power LEDs and driver topologies optimized for integration with these LEDs on a single substrate. The integration of driver and LEDs enables an estimated luminaire cost reduction of about 25% for targeted applications, mostly due to significant reductions in driver and housing cost. The high-power LEDs are based on Lumileds’ patterned sapphire substrate flip-chip (PSS-FC) technology, affording reduced die fabrication and packaging cost compared to existing technology. Two general versions of PSS-FC die were developed in order to create the desired voltage and flux increments for driver integration: (i) small single-junction die (0.5 mm2), optimal for distributed lighting applications, and (ii) larger multi-junction die (2 mm2 and 4 mm2) for high-power directional applications. Two driver topologies were developed: a tapped linear driver topology and a single-stage switch-mode topology, taking advantage of the flexible voltage configurations of the new PSS-FC die and the simplification opportunities enabled by integration of LEDs and driver on the same board. A prototype light engine was developed for an outdoor “core module” application based on the multi-junction PSS-FC die and the single-stage switch-mode driver. The light engine meets the project efficacy target of 128 lm/W at a luminous flux

  12. Microelectronic test structures for CMOS technology

    CERN Document Server

    Ketchen, Mark B

    2011-01-01

    Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and monitoring of CMOS technologies and products has become ever more important with the increased cost and complexity of development and manufacturing. In this timely volume, IBM scientists Manjul Bhushan and Mark Ketchen emphasize high speed characterization techniques for digital CMOS circuit applications and bridging between circuit performance an

  13. High Voltage Hybrid Electric Propulsion - Multilayered Functional Insulation System (MFIS) NASA-GRC

    Science.gov (United States)

    Lizcano, M.

    2017-01-01

    High power transmission cables pose a key challenge in future Hybrid Electric Propulsion Aircraft. The challenge arises in developing safe transmission lines that can withstand the unique environment found in aircraft while providing megawatts of power. High voltage AC, variable frequency cables do not currently exist and present particular electrical insulation challenges since electrical arcing and high heating are more prevalent at higher voltages and frequencies. Identifying and developing materials that maintain their dielectric properties at high voltage and frequencies is crucial.

  14. High voltage power supply with modular series resonant inverters

    Science.gov (United States)

    Dreifuerst, Gary R.; Merritt, Bernard T.

    1995-01-01

    A relatively small and compact high voltage, high current power supply for a laser utilizes a plurality of modules containing series resonant half bridge inverters. A pair of reverse conducting thyristors are incorporated in each series resonant inverter module such that the series resonant inverter modules are sequentially activated in phases 360.degree./n apart, where n=number of modules for n>2. Selective activation of the modules allows precise output control reducing ripple and improving efficiency. Each series resonant half bridge inverter module includes a transformer which has a cooling manifold for actively circulating a coolant such as water, to cool the transformer core as well as selected circuit elements. Conductors connecting and forming various circuit components comprise hollow, electrically conductive tubes such as copper. Coolant circulates through the tubes to remove heat. The conductive tubes act as electrically conductive lines for connecting various components of the power supply. Where it is desired to make electrical isolation breaks, tubes comprised of insulating material such as nylon are used to provide insulation and continue the fluid circuit.

  15. A Four-Phase High Voltage Conversion Ratio Bidirectional DC-DC Converter for Battery Applications

    Directory of Open Access Journals (Sweden)

    Li-Kun Xue

    2015-06-01

    Full Text Available This study presents a four-phase interleaved high voltage conversion ratio bidirectional DC-DC converter circuit based on coupled inductors and switched capacitors, which can eliminate the defects of conventional high voltage conversion ratio bidirectional DC-DC converters in terms of high-voltage/current stress, less efficiency and low-power limitation. Parallel channels are used to reduce current stress at the low-voltage side and series connected switched capacitors are used to enlarge voltage conversion ratio, reduce voltage stress and achieve auto current sharing. This paper proposes the operation principle, feature analysis and optimization design considerations. On this basis the objectives of high voltage conversion ratio, low voltage/current stress, high power density, high efficiency and high-power applications can be achieved. Some experimental results based on a 500 W prototype converter (24 V to 48 V at low-voltage side, 400 V at high-voltage side are given to verify the theoretical analysis and the effectiveness of the proposed converter.

  16. Photoresponse analysis of the CMOS photodiodes for CMOS x-ray image sensor

    International Nuclear Information System (INIS)

    Kim, Young Soo; Ha, Jang Ho; Kim, Han Soo; Yeo, Sun Mok

    2012-01-01

    Although in the short term CMOS active pixel sensors (APSs) cannot compete with the conventionally used charge coupled devices (CCDs) for high quality scientific imaging, recent development in CMOS APSs indicate that CMOS performance level of CCDs in several domains. CMOS APSs possess thereby a number of advantages such as simpler driving requirements and low power operation. CMOS image sensors can be processed in standard CMOS technologies and the potential of on-chip integration of analog and digital circuitry makes them more suitable for several vision systems where system cost is of importance. Moreover, CMOS imagers can directly benefit from on-going technological progress in the field of CMOS technologies. Due to these advantages, the CMOS APSs are currently being investigated actively for various applications such as star tracker, navigation camera and X-ray imaging etc. In most detection systems, it is thought that the sensor is most important, since this decides the signal and noise level. So, in CMOS APSs, the pixel is very important compared to other functional blocks. In order to predict the performance of such image sensor, a detailed understanding of the photocurrent generation in the photodiodes that comprise the CMOS APS is required. In this work, we developed the analytical model that can calculate the photocurrent generated in CMOS photodiode comprising CMOS APSs. The photocurrent calculations and photo response simulations with respect to the wavelength of the incident photon were performed using this model for four types of photodiodes that can be fabricated in standard CMOS process. n + /p - sub and n + /p - epi/p - sub photodiode show better performance compared to n - well/p - sub and n - well/p - epi/p - sub due to the wider depletion width. Comparing n + /p - sub and n + /p - epi/p - sub photodiode, n + /p - sub has higher photo-responsivity in longer wavelength because of the higher electron diffusion current

  17. High Voltage Staircase Drive Circuit for Triggered High-Intensity Focused Ultrasound Treatment

    Science.gov (United States)

    Takada, Keisuke; Okada, Jumpei; Nakamura, Kotaro; Yoshizawa, Shin; Umemura, Shin-ichiro

    2012-07-01

    In triggered high-intensity focused ultrasound (HIFU) treatment, cavitation clouds are produced by extremely high intensity trigger pulses and enhance the effect of following heating waves. The ultrasound intensity must be quickly changed from that for trigger pulses to that for heating waves before cavitation clouds vanish. We newly designed and constructed a class D amplifier based on a staircase voltage drive concept, which has the capability of outputting high voltage waves for trigger pulses and continuous waves for heating waves and the capability of fast switching between the two modes. Its efficacy was confirmed by an experiment with a BSA containing polyacrylamide gel.

  18. Application of high voltage electric field (HVEF) drying technology in potato chips

    International Nuclear Information System (INIS)

    Bai, Yaxiang; Shi, Hua; Yang, Yaxin

    2013-01-01

    In order to improve the drying efficiency and qualities of vegetable by high voltage electric field (HVEF), potato chips as a representative of vegetable was dried using a high voltage electric drying systems at 20°C. The shrinkage rate, water absorption and rehydration ratio of dried potato chips were measured. The results indicated that the drying rate of potato chips was significantly improved in the high voltage electric drying systems. The shrinkage rate of potato chips dried by high voltage electric field was 1.1% lower than that by oven drying method. And the rehydration rate of high voltage electric field was 24.6% higher than that by oven drying method. High voltage electric field drying is very advantageous and can be used as a substitute for traditional drying method.

  19. BEHAVIOUR OF BACKFILL MATERIALS FOR ELECTRICAL GROUNDING SYSTEMS UNDER HIGH VOLTAGE CONDITIONS

    Directory of Open Access Journals (Sweden)

    S. C. LIM

    2015-06-01

    Full Text Available Backfill materials like Bentonite and cement are effective in lowering grounding resistance of electrodes for a considerable period. During lightning, switching impulses and earth fault occurrences in medium and high voltage networks, the grounding system needs to handle extremely high currents either for a short duration or prolonged period respectively. This paper investigates the behaviour of bentonite, cement and sand under impulse and alternating high voltage (50Hz conditions. Fulguritic-formation was observed in all materials under alternating high voltage. The findings reveal that performance of grounding systems under high voltage conditions may significantly change from the outcomes anticipated at design stage.

  20. A New High Frequency Injection Method Based on Duty Cycle Shifting without Maximum Voltage Magnitude Loss

    DEFF Research Database (Denmark)

    Wang, Dong; Lu, Kaiyuan; Rasmussen, Peter Omand

    2015-01-01

    The conventional high frequency signal injection method is to superimpose a high frequency voltage signal to the commanded stator voltage before space vector modulation. Therefore, the magnitude of the voltage used for machine torque production is limited. In this paper, a new high frequency...... injection method, in which high frequency signal is generated by shifting the duty cycle between two neighboring switching periods, is proposed. This method allows injecting a high frequency signal at half of the switching frequency without the necessity to sacrifice the machine fundamental voltage...

  1. Using high frame rate CMOS sensors for three-dimensional eye tracking.

    Science.gov (United States)

    Clarke, A H; Ditterich, J; Drüen, K; Schönfeld, U; Steineke, C

    2002-11-01

    A novel three-dimensional eye tracker is described and its performance evaluated. In contrast to previous devices based on conventional video standards, the present eye tracker is based on programmable CMOS image sensors, interfaced directly to digital processing circuitry to permit real-time image acquisition and processing. This architecture provides a number of important advantages, including image sampling rates of up to 400/sec measurement, direct pixel addressing for preprocessing and acquisition,and hard-disk storage of relevant image data. The reconfigurable digital processing circuitry also facilitates inline optmization of the front-end, time-critical processes. The primary acquisition algorithm for tracking the pupil and other eye features is designed around the generalized Hough transform. The tracker permits comprehensive measurement of eye movement (three degrees of freedom) and head movement (six degrees of freedom), and thus provides the basis for many types of vestibulo-oculomotor and visual research. The device has been qualified by the German Space Agency (DLR) and NASA for deployment on the International Space Station. It is foreseen that the device will be used together with appropriate stimulus generators as a general purpose facility for visual and vestibular experiments. Initial verification studies with an artificial eye demonstrate a measurement resolution of better than 0.1 degrees in all three components (i.e.,system noise for each of the components measured as 0.006 degrees H, 0.005 degrees V, and 0.016 degrees T. Over a range of +/-20 degrees eye rotation, linearity was found to be <0.5% (H), <0.5% (V), and <2.0% (T). A comparison with the scleral search coil technique yielded near equivalent values for the system noise and the thickness of Listing's plane.

  2. High-voltage integrated linear regulator with current sinking capabilities for portable ultrasound scanners

    DEFF Research Database (Denmark)

    Pausas, Guifre Vendrell; Llimos Muntal, Pere; Jørgensen, Ivan Harald Holger

    2017-01-01

    This paper presents a high-voltage integrated regulator capable of sinking current for driving pulse-triggered level shifters in drivers for ultrasound applications. The regulator utilizes a new topology with a feedback loop and a current sinking circuit to satisfy the requirements of the portable...... ultrasound scanner: a great driving strength in the scanner's transducer and a low undershoot voltage in the output node. The design regulates an output voltage of 45 V from an input voltage of 50 V, and it can sink currents up to 100 mA using no external components with only 340 mV of undershoot voltage...

  3. High-Voltage, Multiphasic, Nanosecond Pulses to Modulate Cellular Responses.

    Science.gov (United States)

    Ryan, Hollie A; Hirakawa, Shinji; Yang, Enbo; Zhou, Chunrong; Xiao, Shu

    2018-04-01

    Nanosecond electric pulses are an effective power source in plasma medicine and biological stimulation, in which biophysical responses are governed by peak power and not energy. While uniphasic nanosecond pulse generators are widely available, the recent discovery that biological effects can be uniquely modulated by reversing the polarity of nanosecond duration pulses calls for the development of a multimodal pulse generator. This paper describes a method to generate nanosecond multiphasic pulses for biomedical use, and specifically demonstrates its ability to cancel or enhance cell swelling and blebbing. The generator consists of a series of the fundamental module, which includes a capacitor and a MOSFET switch. A positive or a negative phase pulse module can be produced based on how the switch is connected. Stacking the modules in series can increase the voltage up to 5 kV. Multiple stacks in parallel can create multiphase outputs. As each stack is independently controlled and charged, multiphasic pulses can be created to produce flexible and versatile pulse waveforms. The circuit topology can be used for high-frequency uniphasic or biphasic nanosecond burst pulse production, creating numerous opportunities for the generator in electroporation applications, tissue ablation, wound healing, and nonthermal plasma generation.

  4. High voltage tests of an electrostatic accelerator for different mixtures of gases at various pressures

    International Nuclear Information System (INIS)

    Hellborg, R.

    1996-01-01

    An account is given of high voltage tests of an electrostatic accelerator. High voltage conditioning is measured and is reported for the same accelerator tube after different periods of usage. Tests of different mixtures of sulphur hexafluoride and nitrogen have been performed. A considerable amount of data was obtained for various parameters connected with the high voltage system for different proportions of nitrogen in sulphur hexafluoride at various gas pressures. (orig.)

  5. Compact pulsed transformer power conditioning system for generating high voltage, high energy, rapid risetime pulses

    Science.gov (United States)

    Ranon, P. M.; Hall, D. J.; Hackett, K. E.; Holmes, J. L.; Scott, M. C.

    1989-01-01

    Compact, lightweight air-core pulse transformers in open air have been developed. A SHIVA Star capacitor bank module (36 micro-F, 120 kV, 260 kJ) was used to drive a transformer for generating high-voltage pulses into resistive loads. Voltages reaching 400 kV were delivered to a 6-Ohm load at a total energy delivery of 60 kJ to the load. In order to achieve single high-energy pulses to the load, several fused primary concepts were investigated and developed. These concepts along with transformer construction and first-order models of the system are presented.

  6. A new circuit technique for reduced leakage current in Deep Submicron CMOS technologies

    Directory of Open Access Journals (Sweden)

    A. Schmitz

    2005-01-01

    Full Text Available Modern CMOS processes in the Deep Submicron regime are restricted to supply voltages below 2 volts and further to account for the transistors' field strength limitations and to reduce the power per logic gate. To maintain the high switching performance, the threshold voltage must be scaled according with the supply voltage. However, this leads to an increased subthreshold current of the transistors in standby mode (VGS=0. Another source of leakage is gate current, which becomes significant for gate oxides of 3nm and below. We propose a Self-Biasing Virtual Rails (SBVR - CMOS technique which acts like an adaptive local supply voltage in case of standby mode. Most important sources of leakage currents are reduced by this technique. Moreover, SBVR-CMOS is capable of conserving stored information in sleep mode, which is vital for memory circuits. Memories are exposed to radiation causing soft errors. This well-known problem becomes even worse in standby mode of typical SRAMs, that have low driving performance to withstand alpha particle hits. In this paper, a 16-transistor SRAM cell is proposed, which combines the advantage of extremely low leakage currents with a very high soft error stability.

  7. The Thermal Regime Around Buried Submarine High-Voltage Cables

    Science.gov (United States)

    Emeana, C. J.; Dix, J.; Henstock, T.; Gernon, T.; Thompson, C.; Pilgrim, J.

    2015-12-01

    The expansion of offshore renewable energy infrastructure and the desire for "trans-continental shelf" power transmission, all require the use of submarine High Voltage (HV) cables. These cables have maximum operating surface temperatures of up to 70oC and are typically buried at depths of 1-2 m beneath the seabed, within the wide range of substrates found on the continental shelf. However, the thermal properties of near surface shelf sediments are poorly understood and this increases the uncertainty in determining the required cable current ratings, cable reliability and the potential effects on the sedimentary environments. We present temperature measurements from a 2D laboratory experiment, designed to represent a buried, submarine HV cable. We used a large (2.5 m-high) tank, filled with water-saturated ballotini and instrumented with 120 thermocouples, which measured the time-dependent 2D temperature distributions around the heat source. The experiments use a buried heat source to represent a series of realistic cable surface temperatures with the aim for identifying the thermal regimes generated within typical non-cohesive shelf sediments: coarse silt, fine sand and very coarse sand. The steady state heat flow regimes, and normalised and radial temperature distributions were assessed. Our results show that at temperatures up to 60°C above ambient, the thermal regimes are conductive for the coarse silt sediments and convective for the very coarse sand sediments even at 7°C above ambient. However, the heat flow pattern through the fine sand sediment shows a transition from conductive to convective heat flow at a temperature of approximately 20°C above ambient. These findings offer an important new understanding of the thermal regimes associated with submarine HV cables buried in different substrates and has huge impacts on cable ratings as the IEC 60287 standard only considers conductive heat flow as well as other potential near surface impacts.

  8. Design of auto-control high-voltage control system of pulsed neutron generator

    International Nuclear Information System (INIS)

    Lv Juntao

    2008-01-01

    It is difficult to produce multiple anode controlling time sequences under different logging mode for the high-voltage control system of the conventional pulsed neutron generator. It is also difficult realize sequential control among anode high-voltage, filament power supply and target voltage to make neutron yield stable. To these problems, an auto-control high-voltage system of neutron pulsed generator was designed. It not only can achieve anode high-voltage double blast time sequences, which can measure multiple neutron blast time sequences such as Σ, activated spectrum, etc. under inelastic scattering mode, but also can realize neutron generator real-time measurement of multi-state parameters and auto-control such as target voltage pulse width modulation (PWM), filament current, anode current, etc., there by it can produce stable neutron yield and realize stable and accurate measurement of the pulsed neutron full spectral loging tool. (authors)

  9. RF Circuit Design in Nanometer CMOS

    NARCIS (Netherlands)

    Nauta, Bram

    2007-01-01

    With CMOS technology entering the nanometer regime, the design of analog and RF circuits is complicated by low supply voltages, very non-linear (and nonquadratic) devices and large 1/f noise. At the same time, circuits are required to operate over increasingly wide bandwidths to implement modern

  10. Experimental comparison of the high-speed imaging performance of an EM-CCD and sCMOS camera in a dynamic live-cell imaging test case.

    Directory of Open Access Journals (Sweden)

    Hope T Beier

    Full Text Available The study of living cells may require advanced imaging techniques to track weak and rapidly changing signals. Fundamental to this need is the recent advancement in camera technology. Two camera types, specifically sCMOS and EM-CCD, promise both high signal-to-noise and high speed (>100 fps, leaving researchers with a critical decision when determining the best technology for their application. In this article, we compare two cameras using a live-cell imaging test case in which small changes in cellular fluorescence must be rapidly detected with high spatial resolution. The EM-CCD maintained an advantage of being able to acquire discernible images with a lower number of photons due to its EM-enhancement. However, if high-resolution images at speeds approaching or exceeding 1000 fps are desired, the flexibility of the full-frame imaging capabilities of sCMOS is superior.

  11. A highly symmetrical 10 transistor 2-read/write dual-port static random access memory bitcell design in 28 nm high-k/metal-gate planar bulk CMOS technology

    Science.gov (United States)

    Ishii, Yuichiro; Tanaka, Miki; Yabuuchi, Makoto; Sawada, Yohei; Tanaka, Shinji; Nii, Koji; Lu, Tien Yu; Huang, Chun Hsien; Sian Chen, Shou; Tse Kuo, Yu; Lung, Ching Cheng; Cheng, Osbert

    2018-04-01

    We propose a highly symmetrical 10 transistor (10T) 2-read/write (2RW) dual-port (DP) static random access memory (SRAM) bitcell in 28 nm high-k/metal-gate (HKMG) planar bulk CMOS. It replaces the conventional 8T 2RW DP SRAM bitcell without any area overhead. It significantly improves the robustness of process variations and an asymmetric issue between the true and bar bitline pairs. Measured data show that read current (I read) and read static noise margin (SNM) are respectively boosted by +20% and +15 mV by introducing the proposed bitcell with enlarged pull-down (PD) and pass-gate (PG) N-channel MOSs (NMOSs). The minimum operating voltage (V min) of the proposed 256 kbit 10T DP SRAM is 0.53 V in the TT process, 25 °C under the worst access condition with read/write disturbances, and improved by 90 mV (15%) compared with the conventional one.

  12. 30 CFR 18.54 - High-voltage continuous mining machines.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage continuous mining machines. 18.54... and Design Requirements § 18.54 High-voltage continuous mining machines. (a) Separation of high... ground. (e) Onboard ungrounded, three-phase power circuit. A continuous mining machine designed with an...

  13. An interleaved structure for a high-voltage planar transformer for a Travelling-wave Tube

    DEFF Research Database (Denmark)

    Zhao, Bin; Wang, Gang; Hurley, William G.

    2016-01-01

    Fully interleaved structure can significantly reduce leakage inductance in transformers, However, it is hard to apply them into high-voltage applications due to the electric insulation. In this paper, a partially interleaved structure that is suitable for high-voltage high frequency applications...

  14. Optoelectronic circuits in nanometer CMOS technology

    CERN Document Server

    Atef, Mohamed

    2016-01-01

    This book describes the newest implementations of integrated photodiodes fabricated in nanometer standard CMOS technologies. It also includes the required fundamentals, the state-of-the-art, and the design of high-performance laser drivers, transimpedance amplifiers, equalizers, and limiting amplifiers fabricated in nanometer CMOS technologies. This book shows the newest results for the performance of integrated optical receivers, laser drivers, modulator drivers and optical sensors in nanometer standard CMOS technologies. Nanometer CMOS technologies rapidly advanced, enabling the implementation of integrated optical receivers for high data rates of several Giga-bits per second and of high-pixel count optical imagers and sensors. In particular, low cost silicon CMOS optoelectronic integrated circuits became very attractive because they can be extensively applied to short-distance optical communications, such as local area network, chip-to-chip and board-to-board interconnects as well as to imaging and medical...

  15. High breakdown voltage Au/Pt/GaN Schottky diodes

    International Nuclear Information System (INIS)

    Dang, G. T.; Zhang, A. P.; Mshewa, M. M.; Ren, F.; Chyi, J.-I.; Lee, C.-M.; Chuo, C. C.; Chi, G. C.; Han, J.; Chu, S. N. G.

    2000-01-01

    Au/Pt/GaN Schottky diode rectifiers were fabricated with reverse breakdown voltage (V RB ) up to 550 V on vertically depleting structures and >2000 V on lateral devices. The figure-of-merit (V RB ) 2 /R ON , where R ON is the on-state resistance, had values between 4.2 and 4.8 MW cm -2 . The reverse leakage currents and forward on-voltages were still somewhat higher than the theoretical minimum values, but were comparable to SiC Schottky rectifiers reported in the literature. These devices show promise for use in ultrahigh-power switches. (c) 2000 American Vacuum Society

  16. The thermal regime around buried submarine high-voltage cables

    Science.gov (United States)

    Emeana, C. J.; Hughes, T. J.; Dix, J. K.; Gernon, T. M.; Henstock, T. J.; Thompson, C. E. L.; Pilgrim, J. A.

    2016-08-01

    The expansion of offshore renewable energy infrastructure and the need for trans-continental shelf power transmission require the use of submarine high-voltage (HV) cables. These cables have maximum operating surface temperatures of up to 70 °C and are typically buried 1-2 m beneath the seabed, within the wide range of substrates found on the continental shelf. However, the heat flow pattern and potential effects on the sedimentary environments around such anomalously high heat sources in the near-surface sediments are poorly understood. We present temperature measurements from a 2-D laboratory experiment representing a buried submarine HV cable, and identify the thermal regimes generated within typical unconsolidated shelf sediments—coarse silt, fine sand and very coarse sand. We used a large (2 × 2.5 m2) tank filled with water-saturated spherical glass beads (ballotini) and instrumented with a buried heat source and 120 thermocouples to measure the time-dependent 2-D temperature distributions. The observed and corresponding Finite Element Method simulations of the steady state heat flow regimes and normalized radial temperature distributions were assessed. Our results show that the heat transfer and thus temperature fields generated from submarine HV cables buried within a range of sediments are highly variable. Coarse silts are shown to be purely conductive, producing temperature increases of >10 °C up to 40 cm from the source of 60 °C above ambient; fine sands demonstrate a transition from conductive to convective heat transfer between cf. 20 and 36 °C above ambient, with >10 °C heat increases occurring over a metre from the source of 55 °C above ambient; and very coarse sands exhibit dominantly convective heat transfer even at very low (cf. 7 °C) operating temperatures and reaching temperatures of up to 18 °C above ambient at a metre from the source at surface temperatures of only 18 °C. These findings are important for the surrounding near

  17. High precision, low disturbance calibration of the High Voltage system of the CMS Barrel Electromagnetic Calorimeter

    CERN Document Server

    Fasanella, Giuseppe

    2016-01-01

    The CMS Electromagnetic Calorimeter utilizes scintillating lead tungstate crystals, with avalanche photodiodes (APD) as photo-detectors in the barrel part. 1224 HV channels bias groups of 50 APD pairs, each at a voltage of about 380 V. The APD gain dependence on the voltage is 3pct/V. A stability of better than 60 mV is needed to have negligible impact on the calorimeter energy resolution. Until 2015 manual calibrations were performed yearly. A new calibration system was deployed recently, which satisfies the requirement of low disturbance and high precision. The system is discussed in detail and first operational experience is presented.

  18. CMOS RF switched capacitor bandpass filter tuned by ring VCO

    OpenAIRE

    El Oualkadi, Ahmed; Paillot, Jean-Marie; Guegnaud, Hervé; Allam, Rachid

    2005-01-01

    International audience; A new RF switched capacitor bandpass filter and its command circuit made up of a ring voltage controlled oscillator with 'XOR' gates are proposed. Implemented in a standard 0.35 m CMOS technology, this circuit is intended to be used in a subset of professional mobile phone applications [380-520 MHz]. Experiments carried out on a prototype show a tunable center frequency range of 260MHz [240-500 MHz], with a quality factor that can be as high as 300.

  19. 50V All-PMOS Charge Pumps Using Low-Voltage Capacitors

    KAUST Repository

    Emira, Ahmed

    2012-10-06

    In this work, two high-voltage charge pumps are introduced. In order to minimize the area of the pumping capacitors, which dominates the overall area of the charge pump, high density capacitors have been utilized. Nonetheless, these high density capacitors suffer from low breakdown voltage which is not compatible with the targeted high voltage application. To circumvent the breakdown limitation, a special clocking scheme is used to limit the maximum voltage across any pumping capacitor. The two charge pump circuits were fabricated in a 0:6m CMOS technology with poly0-poly1 capacitors. The output voltage of the two charge pumps reached 42:8V and 51V while the voltage across any capacitor did not exceed the value of the input voltage. Compared to other designs reported in the literature, the proposed charge pump provides the highest output voltage which makes it more suitable for tuning MEMS devices.

  20. A Review on Energy Efficient CMOS Digital Logic

    Directory of Open Access Journals (Sweden)

    B. L. Dokic

    2013-12-01

    Full Text Available Autonomy of power supply used in portable devices directly depends on energy efficiency of digital logic. This means that digital systems, beside high processing power and very complex functionality, must also have very low power consumption. Power consumption depends on many factors: system architecture, technology, basic cells topology-speed, and accuracy of assigned tasks. In this paper, a review and comparison of CMOS topologies techniques and operating modes is given, as CMOS technology is expected to be the optimum choice in the near future. It is shown that there is a full analogy in the behavior of digital circuits in sub-threshold and strong inversion. Therefore, synthesis of digital circuits is the same for both strong and weak operating modes. Analysis of the influence of the technology, MOS transistor threshold voltage (Vt and power supply voltage (Vdd on digital circuit power consumption and speed for both operating modes is given. It is shown that optimal power consumption (minimum power consumption for given speed depends on optimal choice of threshold, and power supply voltage. Multi Vdd /Vt techniques are analyzed as well. A review and analysis of alternative logical circuit's topologies – pass logic (PL, complementary pass logic (CPL, push-pull pass logic (PPL and adiabatic logic – is also given. As shown, adiabatic logic is the optimum choice regarding energy efficiency.

  1. Particle flows to shape and voltage surface discontinuities in the electron sheath surrounding a high voltage solar array in LEO

    Science.gov (United States)

    Metz, Roger N.

    1991-01-01

    This paper discusses the numerical modeling of electron flows from the sheath surrounding high positively biased objects in LEO (Low Earth Orbit) to regions of voltage or shape discontinuity on the biased surfaces. The sheath equations are derived from the Two-fluid, Warm Plasma Model. An equipotential corner and a plane containing strips of alternating voltage bias are treated in two dimensions. A self-consistent field solution of the sheath equations is outlined and is pursued through one cycle. The electron density field is determined by numerical solution of Poisson's equation for the electrostatic potential in the sheath using the NASCAP-LEO relation between electrostatic potential and charge density. Electron flows are calculated numerically from the electron continuity equation. Magnetic field effects are not treated.

  2. Two types of photomultiplier voltage dividers for high and changing count rates

    International Nuclear Information System (INIS)

    Reiter, W.L.; Stengl, G.

    1980-01-01

    We report on the design of two types of voltage distribution circuits for high stability photomultiplier operation. 'Type A' voltage divider is an ohmic voltage divider with high bleeder current (up to 10 mA) and the resistor chain split at one of the last dynodes, usually the dynode where the analog signal is derived from. This simple constructive measure improves the stability of the dynode voltage by a factor of 5 compared with an unsplit conventional resistor chain. 'Type B' is a novel active voltage divider using cold cathode tubes ar regulating elements. This voltage divider exhibits excellent temperature stability (about 10 -4 / 0 C). With 'type B' an equal stability compared with conventional ohmic dividers can be achieved at a bleeder current smaller by one order of magnitude. Of course both concepts, 'type A' and 'type B', can be combined. (orig.)

  3. High voltage bus and auxiliary heater control system for an electric or hybrid vehicle

    Science.gov (United States)

    Murty, Balarama Vempaty

    2000-01-01

    A control system for an electric or hybrid electric vehicle includes a vehicle system controller and a control circuit having an electric immersion heater. The heater is electrically connected to the vehicle's high voltage bus and is thermally coupled to a coolant loop containing a heater core for the vehicle's climate control system. The system controller responds to cabin heat requests from the climate control system by generating a pulse width modulated signal that is used by the control circuit to operate the heater at a duty cycle appropriate for the amount of cabin heating requested. The control system also uses the heater to dissipate excess energy produced by an auxiliary power unit and to provide electric braking when regenerative braking is not desirable and manual braking is not necessary. The control system further utilizes the heater to provide a safe discharge of a bank of energy storage capacitors following disconnection of the battery or one of the high voltage connectors used to transmit high voltage operating power to the various vehicle systems. The control circuit includes a high voltage clamping circuit that monitors the voltage on the bus and operates the heater to clamp down the bus voltage when it exceeds a pre-selected maximum voltage. The control system can also be used to phase in operation of the heater when the bus voltage exceeds a lower threshold voltage and can be used to phase out the auxiliary power unit charging and regenerative braking when the battery becomes fully charged.

  4. 30 CFR 77.802 - Protection of high-voltage circuits; neutral grounding resistors; disconnecting devices.

    Science.gov (United States)

    2010-07-01

    ... grounding resistors; disconnecting devices. 77.802 Section 77.802 Mineral Resources MINE SAFETY AND HEALTH... of high-voltage circuits; neutral grounding resistors; disconnecting devices. High-voltage circuits... grounded through a suitable resistor at the source transformers, and a grounding circuit, originating at...

  5. A novel series connected batteries state of high voltage safety monitor system for electric vehicle application.

    Science.gov (United States)

    Jiaxi, Qiang; Lin, Yang; Jianhui, He; Qisheng, Zhou

    2013-01-01

    Batteries, as the main or assistant power source of EV (Electric Vehicle), are usually connected in series with high voltage to improve the drivability and energy efficiency. Today, more and more batteries are connected in series with high voltage, if there is any fault in high voltage system (HVS), the consequence is serious and dangerous. Therefore, it is necessary to monitor the electric parameters of HVS to ensure the high voltage safety and protect personal safety. In this study, a high voltage safety monitor system is developed to solve this critical issue. Four key electric parameters including precharge, contact resistance, insulation resistance, and remaining capacity are monitored and analyzed based on the equivalent models presented in this study. The high voltage safety controller which integrates the equivalent models and control strategy is developed. By the help of hardware-in-loop system, the equivalent models integrated in the high voltage safety controller are validated, and the online electric parameters monitor strategy is analyzed and discussed. The test results indicate that the high voltage safety monitor system designed in this paper is suitable for EV application.

  6. A Novel Series Connected Batteries State of High Voltage Safety Monitor System for Electric Vehicle Application

    Directory of Open Access Journals (Sweden)

    Qiang Jiaxi

    2013-01-01

    Full Text Available Batteries, as the main or assistant power source of EV (Electric Vehicle, are usually connected in series with high voltage to improve the drivability and energy efficiency. Today, more and more batteries are connected in series with high voltage, if there is any fault in high voltage system (HVS, the consequence is serious and dangerous. Therefore, it is necessary to monitor the electric parameters of HVS to ensure the high voltage safety and protect personal safety. In this study, a high voltage safety monitor system is developed to solve this critical issue. Four key electric parameters including precharge, contact resistance, insulation resistance, and remaining capacity are monitored and analyzed based on the equivalent models presented in this study. The high voltage safety controller which integrates the equivalent models and control strategy is developed. By the help of hardware-in-loop system, the equivalent models integrated in the high voltage safety controller are validated, and the online electric parameters monitor strategy is analyzed and discussed. The test results indicate that the high voltage safety monitor system designed in this paper is suitable for EV application.

  7. A high-voltage, short-risetime pulse generator based on a ferrite pulse sharpener

    Science.gov (United States)

    Seddon, N.; Thornton, E.

    1988-11-01

    A high-voltage, short-risetime pulse generator is described. The generator consists of a Marx bank, which produces an initial high-voltage pulse, and a ferrite pulse sharpener that reduces the risetime of the pulse. The generator delivers 70-kV, 350-ps risetime pulses into a 50-Ω load.

  8. 30 CFR 75.705-1 - Work on high-voltage lines.

    Science.gov (United States)

    2010-07-01

    ... visual observation (1) determine that the disconnecting devices on the high-voltage circuit are in open... supported by any pole or structure which also supports other high-voltage lines until: (1) All lines supported on the pole or structure are deenergized and grounded in accordance with all of the provisions of...

  9. 30 CFR 77.704-1 - Work on high-voltage lines.

    Science.gov (United States)

    2010-07-01

    ... shall by visual observation (1) determine that the disconnecting devices on the high-voltage circuit are... supported by any pole or structure which also supports other high-voltage lines until: (1) All lines supported on the pole or structure are deenergized and grounded in accordance with all of the provisions of...

  10. 30 CFR 75.705 - Work on high-voltage lines; deenergizing and grounding.

    Science.gov (United States)

    2010-07-01

    ... grounding. 75.705 Section 75.705 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF LABOR COAL MINE SAFETY AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Grounding § 75.705 Work on high-voltage lines; deenergizing and grounding. [Statutory Provisions] High-voltage lines, both...

  11. 30 CFR 75.811 - High-voltage underground equipment; grounding.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage underground equipment; grounding. 75.811 Section 75.811 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF LABOR... Distribution § 75.811 High-voltage underground equipment; grounding. [Statutory Provisions] Frames, supporting...

  12. 30 CFR 77.704 - Work on high-voltage lines; deenergizing and grounding.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Work on high-voltage lines; deenergizing and grounding. 77.704 Section 77.704 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT OF... OF UNDERGROUND COAL MINES Grounding § 77.704 Work on high-voltage lines; deenergizing and grounding...

  13. A Novel Series Connected Batteries State of High Voltage Safety Monitor System for Electric Vehicle Application

    Science.gov (United States)

    Jiaxi, Qiang; Lin, Yang; Jianhui, He; Qisheng, Zhou

    2013-01-01

    Batteries, as the main or assistant power source of EV (Electric Vehicle), are usually connected in series with high voltage to improve the drivability and energy efficiency. Today, more and more batteries are connected in series with high voltage, if there is any fault in high voltage system (HVS), the consequence is serious and dangerous. Therefore, it is necessary to monitor the electric parameters of HVS to ensure the high voltage safety and protect personal safety. In this study, a high voltage safety monitor system is developed to solve this critical issue. Four key electric parameters including precharge, contact resistance, insulation resistance, and remaining capacity are monitored and analyzed based on the equivalent models presented in this study. The high voltage safety controller which integrates the equivalent models and control strategy is developed. By the help of hardware-in-loop system, the equivalent models integrated in the high voltage safety controller are validated, and the online electric parameters monitor strategy is analyzed and discussed. The test results indicate that the high voltage safety monitor system designed in this paper is suitable for EV application. PMID:24194677

  14. Design and Implementation of a High Efficiency, Low Component Voltage Stress, Single-Switch High Step-Up Voltage Converter for Vehicular Green Energy Systems

    Directory of Open Access Journals (Sweden)

    Yu-En Wu

    2016-09-01

    Full Text Available In this study, a novel, non-isolated, cascade-type, single-switch, high step-up DC/DC converter was developed for green energy systems. An integrated coupled inductor and voltage lift circuit were applied to simplify the converter structure and satisfy the requirements of high efficiency and high voltage gain ratios. In addition, the proposed structure is controllable with a single switch, which effectively reduces the circuit cost and simplifies the control circuit. With the leakage inductor energy recovery function and active voltage clamp characteristics being present, the circuit yields optimizable conversion efficiency and low component voltage stress. After the operating principles of the proposed structure and characteristics of a steady-state circuit were analyzed, a converter prototype with 450 W, 40 V of input voltage, 400 V of output voltage, and 95% operating efficiency was fabricated. The Renesas MCU RX62T was employed to control the circuits. Experimental results were analyzed to validate the feasibility and effectiveness of the proposed system.

  15. DC High Voltage Conditioning of Photoemission Guns at Jefferson Lab FEL

    International Nuclear Information System (INIS)

    DC high voltage photoemission electron guns with GaAs photocathodes have been used to produce polarized electron beams for nuclear physics experiments for about 3 decades with great success. In the late 1990s, Jefferson Lab adopted this gun technology for a free electron laser (FEL), but to assist with high bunch charge operation, considerably higher bias voltage is required compared to the photoguns used at the Jefferson Lab Continuous Electron Beam Accelerator Facility. The FEL gun has been conditioned above 400 kV several times, albeit encountering non-trivial challenges with ceramic insulators and field emission from electrodes. Recently, high voltage processing with krypton gas was employed to process very stubborn field emitters. This work presents a summary of the high voltage techniques used to high voltage condition the Jefferson Lab FEL photoemission gun.

  16. The high voltage divider - a tool for comparison of measurement equipment in diagnostic radiology

    International Nuclear Information System (INIS)

    Slavchev, A.; Litchev, A.; Constantinov, B.

    2004-01-01

    The high voltage divider (HVD) is designed for control and analysis of the characteristics of the X-ray generator. The low voltage analogous signals produced by the divider are proportional to the high voltage (kVp) applied to the x-ray tube by a ratio 1:1000 or 1:10000 and can be measured with external test devices like storage oscilloscope (or digital multimeter). The exposure duration and the wave form may be visualized, too. Apart of this invasive way the high voltage also may be measured non-invasively by means of appropriate devices as well as indirectly through calculations. Since the invasive method of measurement with the high voltage divider is distinguished by a high accuracy, it may be utilized as an effective tool for calibration of different devices and for comparison of the measurement methods. (authors)

  17. A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier

    Directory of Open Access Journals (Sweden)

    Daehyeok Kim

    2015-03-01

    Full Text Available In order to increase the operating speed of a CMOS image sensor (CIS, a new technique of digital correlated double sampling (CDS is described. In general, the fixed pattern noise (FPN of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is because a single-slope analog-to-digital converter (ADC has been normally adopted in the conventional digital CDS with the reset ramp and signal ramp. Thus, the operating speed of a digital CDS is much slower than that of an analog CDS. In order to improve the operating speed, we propose a novel digital CDS based on a differential difference amplifier (DDA that compares the reset signal and the pixel signal using only one ramp. The prototype CIS has been fabricated with 0.13 µm CIS technology and it has the VGA resolution of 640 × 480. The measured conversion time is 16 µs, and a high frame rate of 131 fps is achieved at the VGA resolution.

  18. A high speed CMOS image sensor with a novel digital correlated double sampling and a differential difference amplifier.

    Science.gov (United States)

    Kim, Daehyeok; Bae, Jaeyoung; Song, Minkyu

    2015-03-02

    In order to increase the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, the fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is because a single-slope analog-to-digital converter (ADC) has been normally adopted in the conventional digital CDS with the reset ramp and signal ramp. Thus, the operating speed of a digital CDS is much slower than that of an analog CDS. In order to improve the operating speed, we propose a novel digital CDS based on a differential difference amplifier (DDA) that compares the reset signal and the pixel signal using only one ramp. The prototype CIS has been fabricated with 0.13 µm CIS technology and it has the VGA resolution of 640 × 480. The measured conversion time is 16 µs, and a high frame rate of 131 fps is achieved at the VGA resolution.

  19. A high-voltage test for the ATLAS RPC qualification

    CERN Document Server

    Aielli, G; Cardarelli, R; Di Ciaccio, A; Di Simone, A; Liberti, B; Santonico, R

    2004-01-01

    The RPC production sequence for the ATLAS experiment includes a specific test of current absorption at the operating point, which concerns the RPC "gas volumes", namely the bare detectors not yet assembled with the read-out panels and the mechanical support structures. The test, which is carried out at the production site, consists of two phases. The gas volumes are initially conditioned with pure argon, keeping the voltage constant just above the breakdown value of about 2 kV. The final test, performed after the volumes have undergone inner surface varnishing with linseed oil, is based on the measurement of the current-voltage characteristics with the binary operating gas, C//2H//2F//4/i-C//4H//1//0 = 95/5. The results presented here concern 45% of the total foreseen production.

  20. High-Capacity Cathode Material with High Voltage for Li-Ion Batteries.

    Science.gov (United States)

    Shi, Ji-Lei; Xiao, Dong-Dong; Ge, Mingyuan; Yu, Xiqian; Chu, Yong; Huang, Xiaojing; Zhang, Xu-Dong; Yin, Ya-Xia; Yang, Xiao-Qing; Guo, Yu-Guo; Gu, Lin; Wan, Li-Jun

    2018-03-01

    Electrochemical energy storage devices with a high energy density are an important technology in modern society, especially for electric vehicles. The most effective approach to improve the energy density of batteries is to search for high-capacity electrode materials. According to the concept of energy quality, a high-voltage battery delivers a highly useful energy, thus providing a new insight to improve energy density. Based on this concept, a novel and successful strategy to increase the energy density and energy quality by increasing the discharge voltage of cathode materials and preserving high capacity is proposed. The proposal is realized in high-capacity Li-rich cathode materials. The average discharge voltage is increased from 3.5 to 3.8 V by increasing the nickel content and applying a simple after-treatment, and the specific energy is improved from 912 to 1033 Wh kg -1 . The current work provides an insightful universal principle for developing, designing, and screening electrode materials for high energy density and energy quality. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter.

    Science.gov (United States)

    Boukhayma, Assim; Dupret, Antoine; Rostaing, Jean-Pierre; Enz, Christian

    2016-03-03

    This paper presents the first low noise complementary metal oxide semiconductor (CMOS) deletedCMOS terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31 × 31 focal plane array has been fully integrated in a 0 . 13 μ m standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0 . 2 μ V RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0 . 6 nW at 270 GHz and 0 . 8 nW at 600 GHz.

  2. Fast Coordinated Control of DFIG Wind Turbine Generators for Low and High Voltage Ride-Through

    Directory of Open Access Journals (Sweden)

    Yun Wang

    2014-06-01

    Full Text Available This paper presents a fast coordinated control scheme of the rotor side converter (RSC, the Direct Current (DC chopper and the grid side converter (GSC of doubly fed induction generator (DFIG wind turbine generators (WTGs to improve the low voltage ride through (LVRT and high voltage ride through (HVRT capability of the DFIG WTGs. The characteristics of DFIG WTGs under voltage sags and swells were studied focusing on the DFIG WTG stator flux and rotor voltages during the transient periods of grid voltage changes. The protection schemes of the rotor crowbar circuit and the DC chopper circuit were proposed considering the characteristics of the DFIG WTGs during voltage changes. The fast coordinated control of RSC and GSC were developed based on the characteristic analysis in order to realize efficient LVRT and HVRT of the DFIG WTGs. The proposed fast coordinated control schemes were verified by time domain simulations using Matlab-Simulink.

  3. Fast Coordinated Control of DFIG Wind Turbine Generators for Low and High Voltage Ride-Through

    DEFF Research Database (Denmark)

    Wang, Yun; Wu, Qiuwei; Xu, Honghua

    2014-01-01

    This paper presents a fast coordinated control scheme of the rotor side converter (RSC), the DC chopper and the grid side converter (GSC) of doubly fed induction generator (DFIG) wind turbine generators (WTGs) which is to improve the low voltage ride through (LVRT) and high voltage ride through...... (HVRT) capability of the DFIG WTGs. The characteristics of DFIG WTGs under voltage sags and swells were studied focusing on the DFIG WTG stator flux and rotor voltages during the transient periods of grid voltage changes. The protection schemes of the rotor crowbar circuit and the dc chopper circuit...... were proposed considering the characteristics of the DFIG WTGs during voltage changes. The fast coordinated control of RSC and GSC were developed based on the characteristic analysis in order to realize efficient LVRT and HVRT of the DFIG WTGs. The proposed fast coordinated control schemes were...

  4. High-voltage (100 V ChipfilmTM single-crystal silicon LDMOS transistor for integrated driver circuits in flexible displays

    Directory of Open Access Journals (Sweden)

    J. N. Burghartz

    2009-05-01

    Full Text Available System-in-Foil (SiF is an emerging field of large-area polymer electronics that employs new materials such as conductive polymers and electrophoretic micro-capsules (E-Ink along with ultra-thin and thus flexible chips. In flexible displays, the integration of gate and source drivers onto the flexible part increases the yield and enhances the reliability of the system. In this work we propose a high-voltage ChipfilmTM lateral diffused MOS transistor (LDMOS structure on ultra-thin single-crystalline silicon chips. The fabrication process is compatible with CMOS standard processing. This LDMOS structure proves to be well suited for providing adequately large switching voltages in spite of the thin (<10 μm substrate. A breakdown voltage of more than 100 volts with drain-to-source saturation current Ids(sat≈85 μA/μm for N-LDMOS and Ids(sat≈20 μA/μm for P-LDMOS is predicted through process and device simulations.

  5. X-ray spectral meter of high voltages for X-ray apparatuses

    International Nuclear Information System (INIS)

    Zubkov, I.P.; Larchikov, Yu.V.

    1993-01-01

    Design of the X-ray spectral meter of high voltages (XRSMHV) for medical X-ray apparatuses permitting to conduct the voltage measurements without connection to current circuits. The XRSMHV consists of two main units: the detector unit based on semiconductor detector and the LP4900B multichannel analyzer (Afora, Finland). The XRSMYV was tested using the pilot plant based on RUM-20 X-ray diagnostic apparatus with high-voltage regulator. It was shown that the developed XRSMHV could be certify in the range of high constant voltages form 40 up to 120 kV with the basic relative error limits ±0.15%. The XRSMHV is used at present as the reference means for calibration of high-voltage medical X-ray equipment

  6. Summary of transient high-voltage calculations for the FRX-C experiment

    International Nuclear Information System (INIS)

    Kewish, R.W. Jr.; Rej, D.J.

    1982-06-01

    Calculations of the electrical circuit equations are performed over a wide range of parameters corresponding to the FRX-C field-reversed THETA-pinch experiment at Los Alamos. Without any plasma or external damping, serious voltage doubling and quadrupling of the main capacitor bank charge voltage are observed. These oscillating high voltages are found to be adequately suppressed by the strategic placement of external snubber circuitry. On the other hand, no doubling of the THETA-pinch preionization bank charge voltage is found. Calculations of the equations for the z-pinch preionization circuit are also performed

  7. Low energy CMOS for space applications

    Science.gov (United States)

    Panwar, Ramesh; Alkalaj, Leon

    1992-01-01

    The current focus of NASA's space flight programs reflects a new thrust towards smaller, less costly, and more frequent space missions, when compared to missions such as Galileo, Magellan, or Cassini. Recently, the concept of a microspacecraft was proposed. In this concept, a small, compact spacecraft that weighs tens of kilograms performs focused scientific objectives such as imaging. Similarly, a Mars Lander micro-rover project is under study that will allow miniature robots weighing less than seven kilograms to explore the Martian surface. To bring the microspacecraft and microrover ideas to fruition, one will have to leverage compact 3D multi-chip module-based multiprocessors (MCM) technologies. Low energy CMOS will become increasingly important because of the thermodynamic considerations in cooling compact 3D MCM implementations and also from considerations of the power budget for space applications. In this paper, we show how the operating voltage is related to the threshold voltage of the CMOS transistors for accomplishing a task in VLSI with minimal energy. We also derive expressions for the noise margins at the optimal operating point. We then look at a low voltage CMOS (LVCMOS) technology developed at Stanford University which improves the power consumption over conventional CMOS by a couple of orders of magnitude and consider the suitability of the technology for space applications by characterizing its SEU immunity.

  8. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  9. Decal Electronics: Printable Packaged with 3D Printing High-Performance Flexible CMOS Electronic Systems

    KAUST Repository

    Sevilla, Galo T.

    2016-10-14

    High-performance complementary metal oxide semiconductor electronics are flexed, packaged using 3D printing as decal electronics, and then printed in roll-to-roll fashion for highly manufacturable printed flexible high-performance electronic systems.

  10. DEVELOPMENT OF HIGH-VOLTAGE HIGH-FREQUENCY POWER SUPPLY FOR OZONE GENERATION

    Directory of Open Access Journals (Sweden)

    NACERA HAMMADI

    2016-05-01

    Full Text Available A high-voltage high-frequency power supply for ozone generation is presented in this paper. Ozone generation is intended to be used in air and in water disinfection. A power stage consisting of a single-phase full bridge inverter for regulating the output power, a current push-pull inverter (driver and a control circuit are described and analyzed. This laboratory build power supply using a high voltage ferrite transformer and a PIC microcontroller was employed to energize a dielectric barrier discharge (DBD ozone generator. The inverter working on the basis of control strategy is of simple structure and has a variation range of the working frequency in order to obtain the optimal frequency value. The experimental results concerning electrical characterization and water treatment using a cylindrical DBD ozone generator supplied by this power supply are given in the end.

  11. Spatial and temporal instabilities in high voltage power devices

    Energy Technology Data Exchange (ETDEWEB)

    Milady, Saeed

    2010-01-29

    Dynamic avalanche can occur during the turn-off process of high voltage bipolar devices, e.g. IGBTs and p{sup +}n{sup -}n{sup +} power diodes, that may result in spatial instabilities of the homogeneous current density distribution across the device and the formation of current filaments. Filaments may cause the destruction of the device, mainly because of the high local temperatures. The first part of this work is dedicated to the current filament behavior. The positive feedback mechanisms caused by the transient current flow through the gate capacitance of an IGBT operating under short circuit conditions may result in oscillations and temporal instabilities of the IGBT current. The oscillations may cause electromagnetic interference (EMI). Furthermore, the positive feedback mechanism may accelerate the over-heating of the device and result in a thermal run-away. This is the subject of the second part of this work. In the first part of this work using the device simulation results of power diodes the underlying physical mechanisms of the filament dynamic is investigated. Simulation results of diode structures with evenly distributed doping inhomogeneities show that, the filament motion gets smoother as the distance between the inhomogeneities decreases. Hopping to faraway inhomogeneities turns into the hopping to neighboring ones and finally a smooth motion. In homogeneous structures the slow inhibitory effect of the electron-hole plasma extraction and the fast activation, due to hole current flowing along the filament, result in a smooth filament motion. An analytical model for the filament velocity under isothermal conditions is presented that can reproduce the simulation data satisfactorily. The influence of the boundary conditions on the filament behavior is discussed. The positive beveled edge termination prohibits a long stay of the filament at the edge reducing the risk of filament pinning. Self-heating effects may turn the initially electrically triggered

  12. Electronics drivers for high voltage dielectric electro active polymer (DEAP) applications

    DEFF Research Database (Denmark)

    Zhang, Zhe; Andersen, Michael A. E.

    2015-01-01

    ), but the voltage balancing across the series - connected high voltage IGBTs is a critical issue and accordi ngly a novel gate driver circuitry is proposed and equipped; due to the requirements of the audio products, such as low distortion and noise, the multi - level Buck converter based Class - D amplifier...

  13. The electric strength of high-voltage transformers insulation at effect of partial dischargers

    International Nuclear Information System (INIS)

    Khoshravan, E.; Zeraatparvar, A.; Gashimov, A.M.; Mehdizadeh, R.N.

    2001-01-01

    Full text : In paper the change of electric strength of high-voltage transformers insulation at the effect of partial discharges with space charge accumulation was investigated. It is revealed that the effect of partial discharges of insulation materials results the reduction of their pulsing electric strength which can restore the own initial value at releasing of saved charge the volume of a material under condition of absence the ineversible structural changes in it. Researches of high-voltage transformers insulation's non-failure operation conditions show, that at increasing of insulation work time in a strong electrical field the reduction of average breakdown voltages with simultaneous increasing of spread in discharge voltage values takes place. It authentically testifies to reduction of short-time discharge voltage of insulation materials during their electrical aging. As the basic reason of insulation electrical aging the partial discharges occurring in gas cavities inside insulation were considered. It is known that the space charges will be formed in insulation elements of high-voltage devices which effects in dielectrical property of these elements including the electric strength and the space charge formation can occur also at partial discharges in an alternating voltage while the service of high-voltage transformers. In the given work the experiments in revealing separate influence partial discharges in pulsing electric strength of insulation materials at presence and at absence inside them the space charge were spent

  14. Response of low voltage networks with high penetration of photovoltaic systems to transmission network faults

    NARCIS (Netherlands)

    Skaloumpakas, K.; Boemer, J.C.; Van Ruitenbeek, E.; Gibescu, M.

    2014-01-01

    The installed capacity of photovoltaic (PV) systems connected to low voltage (LV) networks in Germany has increased to more than 25 GW. Current grid codes still mandate these PV systems to disconnect in case of voltage dips below 0.8 p.u. The resulting response of LV distribution systems with high

  15. Analysis and design of a high-efficiency zero-voltage-switching step ...

    Indian Academy of Sciences (India)

    Recently, high-efficiency power conversion techniques have been researched due to the increas- ... They feature fixed switching frequency and ZVS of power .... and IDo1, respectively. 3. Design parameters. 3.1 Voltages across the split input filter capacitors CC f 1 and CC f 2. Since the average inductor voltage must be ...

  16. A nanosecond high voltage pulse device for accelerator time analytical system

    International Nuclear Information System (INIS)

    Lou Binqiao; Ding Furong; Xue Zhihua; Wang Xuemei; Shen Dingyu

    2002-01-01

    A nanosecond high voltage pulse device has been designed. The pulse rise time is 10 ns. The pulse voltage reached 16000 V. This device has been used to accelerator time analytical system, its resolution time is less than 0.8%

  17. LIMIT SOLUTIONS OF EQUATIONS OF A DC HIGH-VOLTAGE CASCADE GENERATOR

    Directory of Open Access Journals (Sweden)

    V. O. Brzhezitsky

    2015-04-01

    Full Text Available In the paper the issue of calculating the high voltage cascade mode oscillator with a nonlinear load using the analytical method under different conditions of selection values of its components is presented. The peculiarity of the method of the study is that during multivariate calculations output parameters load generator remain unchanged. For high-voltage cascade direct current power found conditions under which can be significantly reduced high capacity capacitors cascade generator. The calculations show that acceptable for practical applications of high-voltage characteristics of cascade generators can be achieved with substantial reduction of the volume of their constituents, and thus substantial decline in their value.

  18. Hybrid AC-High Voltage DC Grid Stability and Controls

    Science.gov (United States)

    Yu, Jicheng

    The growth of energy demands in recent years has been increasing faster than the expansion of transmission facility construction. This tendency cooperating with the continuous investing on the renewable energy resources drives the research, development, and construction of HVDC projects to create a more reliable, affordable, and environmentally friendly power grid. Constructing the hybrid AC-HVDC grid is a significant move in the development of the HVDC techniques; the form of dc system is evolving from the point-to-point stand-alone dc links to the embedded HVDC system and the multi-terminal HVDC (MTDC) system. The MTDC is a solution for the renewable energy interconnections, and the MTDC grids can improve the power system reliability, flexibility in economic dispatches, and converter/cable utilizing efficiencies. The dissertation reviews the HVDC technologies, discusses the stability issues regarding the ac and HVDC connections, proposes a novel power oscillation control strategy to improve system stability, and develops a nonlinear voltage droop control strategy for the MTDC grid. To verify the effectiveness the proposed power oscillation control strategy, a long distance paralleled AC-HVDC transmission test system is employed. Based on the PSCAD/EMTDC platform simulation results, the proposed power oscillation control strategy can improve the system dynamic performance and attenuate the power oscillations effectively. To validate the nonlinear voltage droop control strategy, three droop controls schemes are designed according to the proposed nonlinear voltage droop control design procedures. These control schemes are tested in a hybrid AC-MTDC system. The hybrid AC-MTDC system, which is first proposed in this dissertation, consists of two ac grids, two wind farms and a five-terminal HVDC grid connecting them. Simulation studies are performed in the PSCAD/EMTDC platform. According to the simulation results, all the three design schemes have their unique salient

  19. Turn up the lights: Deep-sea in situ application of a high-speed, high-resolution sCMOS camera to observe marine bioluminescence

    Science.gov (United States)

    Phillips, B. T.; Gruber, D. F.; Sparks, J. S.; Vasan, G.; Roman, C.; Pieribone, V. A.

    2016-02-01

    Observing and measuring marine bioluminescence presents unique challenges in situ. Technology is the greatest limiting factor in this endeavor, with sensitivity, speed and resolution constraining the imaging tools available to researchers. State-of-the-art microscopy cameras offer to bridge this gap. An ultra-low-light, scientific complimentary-metal-oxide-semiconductor (sCMOS) camera was outfitted for in-situ imaging of marine bioluminescence. This system was deployed on multiple deep-sea platforms (manned submersible, remotely operated vehicle, and towed body) in three oceanic regions (Western Tropical Pacific, Eastern Equatorial Pacific, and Northwestern Atlantic) to depths up to 2500m. Using light stimulation, bioluminescent responses were recorded at high frame rates and in high resolution, offering unprecedented low-light imagery of deep-sea bioluminescence in situ. The kinematics and physiology of light production in several zooplankton groups is presented, and luminescent responses at different depths are quantified as intensity vs. time.

  20. Efficient Parametric Identification Method for High Voltage Pulse Transformers

    CERN Document Server

    Aguglia, D; Viarouge, P; Cros, J

    2014-01-01

    This paper presents a new identification method for a pulse transformer equivalent circuit. It is based on an analytical approximation of the frequency-domain impedance data derived from a no-load test with open-circuited secondary winding and only requires measurements of primary current and voltage without phase data. Compared with time consuming and complex methods based on off-line non-linear identification procedures, this simple method also gives an estimation of the error on the identified parameters. The method is validated on an existing pulse transformer.

  1. Light-weight DC to very high voltage DC converter

    Science.gov (United States)

    Druce, R.L.; Kirbie, H.C.; Newton, M.A.

    1998-06-30

    A DC-DC converter capable of generating outputs of 100 KV without a transformer comprises a silicon opening switch (SOS) diode connected to allow a charging current from a capacitor to flow into an inductor. When a specified amount of charge has flowed through the SOS diode, it opens up abruptly; and the consequential collapsing field of the inductor causes a voltage and current reversal that is steered into a load capacitor by an output diode. A switch across the series combination of the capacitor, inductor, and SOS diode closes to periodically reset the SOS diode by inducing a forward-biased current. 1 fig.

  2. High Voltage Power Converter for Large Wind Turbine

    DEFF Research Database (Denmark)

    Sztykiel, Michal

    system operates at 20 kV level - identical as for the collector distribution network. Medium voltage operation allows the converter unit along with the filter to be installed on the base platform inside the tower. In this manner, more space in the nacelle can be flexibly accommodated by the mechanical...... performance has been achieved by the transformer-less turbine with a back-to-back modular multilevel converter (MMC) topology, which is single grounded only through its DC link common-mode point. It has also occurred that the results derived from losses and short circuit analyses have become advantageous over...

  3. Low Voltage, High-Q SOI MEMS Varactors for RF Applications

    DEFF Research Database (Denmark)

    Yalcinkaya, Arda Deniz; Jensen, Søren; Hansen, Ole

    2003-01-01

    A micro electromechanical tunable capacitor with a low control voltage, a wide tuning range and high electrical quality factor is presented with detailed characterizations. A 50μm thick single-crystalline silicon layer was etched using deep reactive ion etching (DRIE) for obtaining high-aspect ra...... is a suitable passive component to be used in band-pass filtering, voltage controlled oscillator or impedance matching applications on the very high frequency(VHF) and ultra high frequency (UHF) bands....

  4. High-power high-voltage pulse generator for supplying electrostatic precipitators of dust

    International Nuclear Information System (INIS)

    Radu, A.; Martin, D.

    1992-01-01

    The study and development of an experimental high voltage generator specialized in the supply of electrostatic precipitators are presented. The main parameters of the pulse generator are: U = -30 kV, I = 8.8 A, τ = 120μs, f r = 150 Hz. The pulse generator was tested on a laboratory electrostatic precipitator with nominal capacitance C = 25 nF, biased at -40 kV by means of a separate high voltage rectifier. The experimental results will be used for the creation of a more powerful pulse generator, a prototype for the supply of a real industrial electrostatic precipitator: U = -50 kV, I = 313 A, τ = 100μs, f r = 300 Hz, C = 100 nF. (Author)

  5. On-chip high-voltage generator design design methodology for charge pumps

    CERN Document Server

    Tanzawa, Toru

    2016-01-01

    This book provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators.  Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.  This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.

  6. A Nordic project on high speed low power design in sub-micron CMOS technology for mobile phones

    DEFF Research Database (Denmark)

    Olesen, Ole

    This paper is a survey paper presenting the Nordic CONFRONT project and reporting some results from the group at CIE/DTU, Denmark. The objective of the project is to demonstrate the feasibility of sub-micron CMOS for the realisation of RF front-end circuits operating at frequencies in the 1.8-2.0...

  7. Low-power high-accuracy micro-digital sun sensor by means of a CMOS image sensor

    NARCIS (Netherlands)

    Xie, N.; Theuwissen, A.J.P.

    2013-01-01

    A micro-digital sun sensor (?DSS) is a sun detector which senses a satellite’s instant attitude angle with respect to the sun. The core of this sensor is a system-on-chip imaging chip which is referred to as APS+. The APS+ integrates a CMOS active pixel sensor (APS) array of 368×368??pixels , a

  8. Process engineering of high voltage alginate encapsulation of mesenchymal stem cells

    Energy Technology Data Exchange (ETDEWEB)

    Gryshkov, Oleksandr, E-mail: gryshkov@imp.uni-hannover.de [Institute for Multiphase Processes, Leibniz University Hannover, D-30167 Hannover (Germany); Pogozhykh, Denys, E-mail: pogozhykh@imp.uni-hannover.de [Institute for Multiphase Processes, Leibniz University Hannover, D-30167 Hannover (Germany); Zernetsch, Holger, E-mail: zernetsch@imp.uni-hannover.de [Institute for Multiphase Processes, Leibniz University Hannover, D-30167 Hannover (Germany); Hofmann, Nicola, E-mail: hofmann@imp.uni-hannover.de [Institute for Multiphase Processes, Leibniz University Hannover, D-30167 Hannover (Germany); Mueller, Thomas, E-mail: mueller.thomas@mh-hannover.de [Institute for Transfusion Medicine, Medical School Hannover, D-30625 Hannover (Germany); Glasmacher, Birgit, E-mail: glasmacher@imp.uni-hannover.de [Institute for Multiphase Processes, Leibniz University Hannover, D-30167 Hannover (Germany)

    2014-03-01

    Encapsulation of stem cells in alginate beads is promising as a sophisticated drug delivery system in treatment of a wide range of acute and chronic diseases. However, common use of air flow encapsulation of cells in alginate beads fails to produce beads with narrow size distribution, intact spherical structure and controllable sizes that can be scaled up. Here we show that high voltage encapsulation (≥ 15 kV) can be used to reproducibly generate spherical alginate beads (200–400 μm) with narrow size distribution (± 5–7%) in a controlled manner under optimized process parameters. Flow rate of alginate solution ranged from 0.5 to 10 ml/h allowed producing alginate beads with a size of 320 and 350 μm respectively, suggesting that this approach can be scaled up. Moreover, we found that applied voltages (15–25 kV) did not alter the viability and proliferation of encapsulated mesenchymal stem cells post-encapsulation and cryopreservation as compared to air flow. We are the first who employed a comparative analysis of electro-spraying and air flow encapsulation to study the effect of high voltage on alginate encapsulated cells. This report provides background in application of high voltage to encapsulate living cells for further medical purposes. Long-term comparison and work on alginate–cell interaction within these structures will be forthcoming. - Highlights: • High voltage alginate encapsulation of mesenchymal stem cells (MSCs) was designed. • Reproducible and spherical alginate beads were generated via high voltage. • Air flow encapsulation was utilized as a comparative approach to high voltage. • High voltage did not alter the viability and proliferation of encapsulated MSCs. • High voltage encapsulation can be scaled up and applied in cell-based therapy.

  9. A new VME-based high voltage power supply for large photomultiplier systems

    International Nuclear Information System (INIS)

    Neumaier, S.; Hubbeling, T.; Kolb, B.W.; Purschke, M.L.; Ippolitov, M.; Blume, C.; Bohne, E.M.; Bucher, D.; Claussen, A.; Peitzmann, T.; Schepers, G.; Schlagheck, H.

    1995-01-01

    We describe a new high voltage power supply, developed for the leadglass calorimeter of the WA98 experiment at CERN. The high voltage is produced for each of the 10,080 photomultiplier tubes of the detector individually, by the same number of active bases with on-board Greinacher voltage multipliers. The full VME-based HV controller system, which addresses each base via bus cables once per second, is miniaturized and fits into a single VME crate. The main advantages of this approach are the low heat dissipation, the considerably reduced amount of cabling and cost, as well as the high stability and low noise of the system. (orig.)

  10. Design of high voltage power supply of miniature X-ray tube based on resonant Royer

    International Nuclear Information System (INIS)

    Liu Xiyao; Zeng Guoqiang; Tan Chengjun; Luo Qun; Gong Chunhui; Huang Rui

    2013-01-01

    Background: In recent years, X rays are widely used in various fields. With the rapid development of national economy, the demand of high quality, high reliability, and high stability miniature X-ray tube has grown rapidly. As an important core component of miniature X-ray tube, high voltage power supply has attracted wide attention. Purpose: To match miniature, the high voltage power supply should be small, lightweight, good quality, etc. Based on the basic performance requirements of existing micro-X-ray tube high voltage power supply, this paper designs an output from 0 to -30 kV adjustable miniature X-ray tube voltage DC power supply. Compared to half-bridge and full-bridge switching-mode power supply, its driving circuit is simple. With working on the linear condition, it has no switching noise. Methods: The main circuit makes use of DC power supply to provide the energy. The resonant Royer circuit supplies sine wave which drives to the high frequency transformer's primary winding with resultant sine-like high voltage appearing across the secondary winding. Then, the voltage doubling rectifying circuit would achieve further boost. In the regulator circuit, a feedback control resonant transistor base current is adopted. In order to insulate air, a silicone rubber is used for high pressure part packaging, and the output voltage is measured by the dividing voltage below -5 kV. Results: The stability of circuit is better than 0.2%/6 h and the percent of the output ripple voltage is less than 0.3%. Keeping the output voltage constant, the output current can reach 57 μA by changing the size of load resistor. This high voltage power supply based on resonant Royer can meet the requirement of miniature X-ray tube. Conclusions: The circuit can satisfy low noise, low ripple, low power and high voltage regulator power supply design. However, its efficiency is not high enough because of the linear condition. In the next design, to further reduce power consumption, we

  11. Multilayered Functional Insulation System (MFIS) for AC Power Transmission in High Voltage Hybrid Electrical Propulsion

    Science.gov (United States)

    Lizcano, Maricela

    2017-01-01

    High voltage hybrid electric propulsion systems are now pushing new technology development efforts for air transportation. A key challenge in hybrid electric aircraft is safe high voltage distribution and transmission of megawatts of power (>20 MW). For the past two years, a multidisciplinary materials research team at NASA Glenn Research Center has investigated the feasibility of distributing high voltage power on future hybrid electric aircraft. This presentation describes the team's approach to addressing this challenge, significant technical findings, and next steps in GRC's materials research effort for MW power distribution on aircraft.

  12. A compact, high-voltage pulsed charging system based on an air-core pulse transformer.

    Science.gov (United States)

    Zhang, Tianyang; Chen, Dongqun; Liu, Jinliang; Liu, Chebo; Yin, Yi

    2015-09-01

    Charging systems of pulsed power generators on mobile platforms are expected to be compact and provide high pulsed power, high voltage output, and high repetition rate. In this paper, a high-voltage pulsed charging system with the aforementioned characteristics is introduced, which can be applied to charge a high-voltage load capacitor. The operating principle of the system and the technical details of the components in the system are described in this paper. The experimental results show that a 600 nF load capacitor can be charged to 60 kV at 10 Hz by the high-voltage pulsed charging system for a burst of 0.5 s. The weight and volume of the system are 60 kg and 600 × 500 × 380 mm(3), respectively.

  13. Analog Amplitude Modulation of a High Voltage, Solid State Inductive Adder, Pulse Generator Using MOSFETS

    International Nuclear Information System (INIS)

    Gower, E J; Sullivan, J S

    2002-01-01

    High voltage, solid state, inductive adder, pulse generators have found increasing application as fast kicker pulse modulators for charged particle beams. The solid state, inductive adder, pulse generator is similar in operation to the linear induction accelerator. The main difference is that the solid state, adder couples energy by transformer action from multiple primaries to a voltage summing stalk, instead of an electron beam. Ideally, the inductive adder produces a rectangular voltage pulse at the load. In reality, there is usually some voltage variation at the load due to droop on primary circuit storage capacitors, or, temporal variations in the load impedance. Power MOSFET circuits have been developed to provide analog modulation of the output voltage amplitude of a solid state, inductive adder, pulse generator. The modulation is achieved by including MOSFET based, variable subtraction circuits in the multiple primary stack. The subtraction circuits can be used to compensate for voltage droop, or, to tailor the output pulse amplitude to provide a desired effect in the load. Power MOSFET subtraction circuits have been developed to modulate short, temporal (60-400 ns), voltage and current pulses. MOSFET devices have been tested up to 20 amps and 800 Volts with a band pass of 50 MHz. An analog modulation cell has been tested in a five cell high, voltage adder stack

  14. The project of autocontrol for CAEN high voltage systems in high energy physics experiments

    International Nuclear Information System (INIS)

    Qian Sen; Wang Zhimin; Chinese Academy of Sciences, Beijing; Cai Xiao; Wang Yifang; Zhang Jiawen; Yang Changgen

    2008-01-01

    Based on TCP/IP network communication techniques, CAMAC Bus Technology, PCI Bus Technology and RS232 Serial Communication Technique, we developed and established a serial of software in Linux or Win32 system to auto control these high voltage systems made by CAEN Company, which are always used in high energy physics experiments. The operator can use this software to control and monitor the system independently, or encapsulate it into the DAQ system to control the test system and acquire data synchronously and high-efficaciously. (authors)

  15. Characterisation of diode-connected SiGe BiCMOS HBTs for space applications

    Science.gov (United States)

    Venter, Johan; Sinha, Saurabh; Lambrechts, Wynand

    2016-02-01

    Silicon-germanium (SiGe) bipolar complementary metal-oxide semiconductor (BiCMOS) transistors have vertical doping profiles reaching deeper into the substrate when compared to lateral CMOS transistors. Apart from benefiting from high-speed, high current gain and low-output resistance due to its vertical profile, BiCMOS technology is increasingly becoming a preferred technology for researchers to realise next-generation space-based optoelectronic applications. BiCMOS transistors have inherent radiation hardening, to an extent predictable cryogenic performance and monolithic integration potential. SiGe BiCMOS transistors and p-n junction diodes have been researched and used as a primary active component for over the last two decades. However, further research can be conducted with diode-connected heterojunction bipolar transistors (HBTs) operating at cryogenic temperatures. This work investigates these characteristics and models devices by adapting standard fabrication technology components. This work focuses on measurements of the current-voltage relationship (I-V curves) and capacitance-voltage relationships (C-V curves) of diode-connected HBTs. One configuration is proposed and measured, which is emitterbase shorted. The I-V curves are measured for various temperature points ranging from room temperature (300 K) to the temperature of liquid nitrogen (77 K). The measured datasets are used to extract a model of the formed diode operating at cryogenic temperatures and used as a standard library component in computer aided software designs. The advantage of having broad-range temperature models of SiGe transistors becomes apparent when considering implementation of application-specific integrated circuits and silicon-based infrared radiation photodetectors on a single wafer, thus shortening interconnects and lowering parasitic interference, decreasing the overall die size and improving on overall cost-effectiveness. Primary applications include space-based geothermal

  16. A low knee voltage and high breakdown voltage of 4H-SiC TSBS employing poly-Si/Ni Schottky scheme

    Science.gov (United States)

    Kim, Dong Young; Seok, Ogyun; Park, Himchan; Bahng, Wook; Kim, Hyoung Woo; Park, Ki Cheol

    2018-02-01

    We report a low knee voltage and high breakdown voltage 4H-SiC TSBS employing poly-Si/Ni dual Schottky contacts. A knee voltage was significantly improved from 0.75 to 0.48 V by utilizing an alternative low work-function material of poly-Si as an anode electrode. Also, reverse breakdown voltage was successfully improved from 901 to 1154 V due to a shrunk low-work-function Schottky region by a proposed self-align etching process between poly-Si and SiC. SiC TSBS with poly-Si/Ni dual Schottky scheme is a suitable structure for high-efficiency rectification and high-voltage blocking operation.

  17. Coordination of voltage and reactive power control in the extra high voltage substations based on the example of solutions applied in the national power system

    Directory of Open Access Journals (Sweden)

    Dariusz Kołodziej

    2012-06-01

    Full Text Available This paper presents examples of coordination between automatic voltage and reactive power control systems (ARST covering adjacent and strongly related extra high voltage substations. Included are conclusions resulting from the use of these solutions. The Institute of Power Engineering, Gdańsk Division has developed and deployed ARST systems in the national power system for a dozen or so years.

  18. High-Aspect-Ratio CMOS add-on modules for RF passive components

    NARCIS (Netherlands)

    Sagkol, H.

    2011-01-01

    Commercial wireless communication technologies stemmed mostly from the research done through and after the Second World War as outlined in Chapter 1. Earlier systems were intended for military applications, hence had very high performance and were very expensive and bulky. Later, with the dawn of

  19. An Annotated Bibliography of High-Voltage Direct-Current Transmission and Flexible AC Transmission (FACTS) Devices, 1991-1993.

    Energy Technology Data Exchange (ETDEWEB)

    Litzenberger, Wayne; Lava, Val

    1994-08-01

    References are contained for HVDC systems, converter stations and components, overhead transmission lines, cable transmission, system design and operations, simulation of high voltage direct current systems, high-voltage direct current installations, and flexible AC transmission system (FACTS).

  20. Insulation co-ordination in high-voltage electric power systems

    CERN Document Server

    Diesendorf, W

    2015-01-01

    Insulation Co-ordination in High-Voltage Electric Power Systems deals with the methods of insulation needed in different circumstances. The book covers topics such as overvoltages and lightning surges; disruptive discharge and withstand voltages; self-restoring and non-self-restoring insulation; lightning overvoltages on transmission lines; and the attenuation and distortion of lightning surges. Also covered in the book are topics such as the switching surge designs of transmission lines, as well as the insulation coordination of high-voltage stations. The text is recommended for electrical en

  1. Electromagnetic field model for the numerical computation of voltages induced on buried pipelines by high voltage overhead power lines

    Science.gov (United States)

    Munteanu, C.; Mates, G.; Purcar, M.; Topa, V.; Pop, I. T.; Grindei, L.; Racasan, A.

    2012-07-01

    This paper proposes an innovative, generally applicable numerical model for the calculation of the three-dimensional (3D) electromagnetic field generated by high voltage (HV) overhead power transmission lines (OHL) on the buried metallic structures (e.g., pipeline networks). The numerical analysis is based on a coupled finite element-boundary element model (FEM-BEM) designed to calculate the induced potential on buried pipelines for complex geometrical structures of HV OHL networks working on normal or fault conditions. The one-dimensional (1D) FEM technique based on pipe elements is used to discretize the mathematical model that describes the interior of the pipe and is coupled with the mathematical model that describes the exterior of the pipe using 3D-BEM integral equations. The full electromagnetic field model gives the flexibility to calculate the potential distribution in any point of the soil, providing useful information for the step and touching voltages. The computation accuracy of the numerical algorithm implemented is verified through two test problems by comparing the numerical results with those obtained using a software package based on the Transmission Line Method (TLM) and CIGRE formulae. Last part of the paper presents calculations of the induced potential on buried pipeline in the vicinity of a complex HV OHL working on normal and fault condition. The influence of the currents' direction and magnitude flowing on the HV OHL on the induced pipeline potential distribution is analyzed.

  2. Charged particle detection performances of CMOS pixel sensors produced in a 0.18μm process with a high resistivity epitaxial layer

    Energy Technology Data Exchange (ETDEWEB)

    Senyukov, S., E-mail: serhiy.senyukov@cern.ch; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz0.18μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 10{sup 13}n{sub eq}/cm{sup 2} was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz0.18μm CMOS process for the ALICE ITS upgrade.

  3. High voltage time domain response of cMUT membrane: Laser interferometry measurements

    Science.gov (United States)

    Sénégond, Nicolas; Teston, Franck; Royer, Daniel; Meynier, Cyril; Certon, Dominique

    2010-01-01

    This paper deals with the understanding of cMUT membrane behavior during a high-voltage excitation. Measurements were performed with a homemade interferometer system. Experimental results in air and fluid (here oil) are discussed.

  4. Lithium-Ion Electrolytes with Improved Safety Tolerance to High Voltage Systems

    Science.gov (United States)

    Smart, Marshall C. (Inventor); Bugga, Ratnakumar V. (Inventor); Prakash, Surya G. (Inventor); Krause, Frederick C. (Inventor)

    2015-01-01

    The invention discloses various embodiments of electrolytes for use in lithium-ion batteries, the electrolytes having improved safety and the ability to operate with high capacity anodes and high voltage cathodes. In one embodiment there is provided an electrolyte for use in a lithium-ion battery comprising an anode and a high voltage cathode. The electrolyte has a mixture of a cyclic carbonate of ethylene carbonate (EC) or mono-fluoroethylene carbonate (FEC) co-solvent, ethyl methyl carbonate (EMC), a flame retardant additive, a lithium salt, and an electrolyte additive that improves compatibility and performance of the lithium-ion battery with a high voltage cathode. The lithium-ion battery is charged to a voltage in a range of from about 2.0 V (Volts) to about 5.0 V (Volts).

  5. Use of high voltage electron microscope to simulate radiation damage by neutrons

    International Nuclear Information System (INIS)

    Mayer, R.M.

    1976-01-01

    The use of the high voltage electron microscope to simulate radiation damage by neutrons is briefly reviewed. This information is important in explaining how alloying affects void formation during neutron irradiation

  6. Project resumes: biological effects from electric fields associated with high-voltage transmission lines

    Energy Technology Data Exchange (ETDEWEB)

    None

    1980-01-01

    Abstracts of research projects are presented in the following areas: measurements and special facilities; cellular and subcellular studies; physiology; behavior; environmental effects; modeling, scaling and dosimetry; and high voltage direct current. (ACR)

  7. Carbon Nanotube Integration with a CMOS Process

    Science.gov (United States)

    Perez, Maximiliano S.; Lerner, Betiana; Resasco, Daniel E.; Pareja Obregon, Pablo D.; Julian, Pedro M.; Mandolesi, Pablo S.; Buffa, Fabian A.; Boselli, Alfredo; Lamagna, Alberto

    2010-01-01

    This work shows the integration of a sensor based on carbon nanotubes using CMOS technology. A chip sensor (CS) was designed and manufactured using a 0.30 μm CMOS process, leaving a free window on the passivation layer that allowed the deposition of SWCNTs over the electrodes. We successfully investigated with the CS the effect of humidity and temperature on the electrical transport properties of SWCNTs. The possibility of a large scale integration of SWCNTs with CMOS process opens a new route in the design of more efficient, low cost sensors with high reproducibility in their manufacture. PMID:22319330

  8. Ultra Low Voltage Class AB Switched Current Memory Cells Based on Floating Gate Transistors

    DEFF Research Database (Denmark)

    Mucha, Igor

    1999-01-01

    A proposal for a class AB switched current memory cell, suitable for ultra-low-voltage applications is presented. The proposal employs transistors with floating gates, allowing to build analog building blocks for ultralow supply voltage operation also in CMOS processes with high threshold voltages....... This paper presents the theoretical basis for the design of "floating-gate'' switched current memory cells by giving a detailed description and analysis of the most important impacts degrading the performance of the cells. To support the theoretical assumptions circuits based on "floating-gate'' switched...... current memory cells were designed using a CMOS process with threshold voltages V-T0n = \\V-T0p\\ = 0.9 V for the n- and p-channel devices. Both hand calculations and PSPICE simulations showed that the designed example switched current memory cell allowed a maximum signal range better than +/-18 mu...

  9. Application of magnetically insulated transmission lines for high current, high voltage electron beam accelerators

    International Nuclear Information System (INIS)

    Shope, S.L.; Mazarakis, M.G.; Frost, C.A.; Poukey, J.W.; Turman, B.N.

    1993-01-01

    Self Magnetically Insulated Transmission Lines (MITL) adders have been used successfully in a number of Sandia accelerators such as HELIA, HERMES III, and SABRE. Most recently the authors used a MITL adder in the RADLAC/SMILE electron beam accelerator to produce high quality, small radius (r b < 2 cm), 11 to 15 MeV, 50 to 100-kA beams with a small transverse velocity v perpendicular/c = β perpendicular ≤ 0.1. In RADLAC/SMILE, a coaxial MITL passed through the eight, 2 MV vacuum envelopes. The MITL summed the voltages of all eight feeds to a single foilless diode. The experimental results are in good agreement with code simulations. The authors' success with the MITL technology led them to investigate the application to higher energy accelerator designs. They have a conceptual design for a cavity-fed MITL that sums the voltages from 100 identical, inductively-isolated cavities. Each cavity is a toroidal structure that is driven simultaneously by four 8-ohm pulse-forming lines, providing a 1-MV voltage pulse to each of the 100 cavities. The point design accelerator is 100 MV, 500 kA, with a 30-50-ns FWHM output pulse

  10. Application of Magnetically Insulated Transmission Lines for high current, high voltage electron beam accelerators

    International Nuclear Information System (INIS)

    Shope, S.L.; Mazarakis, M.G.; Frost, C.A.; Poukey, J.W.; Turman, B.N.

    1991-01-01

    Self Magnetically Insulated Transmission Lines (MITL) adders have been used successfully in a number of Sandia accelerators such as HELIA, HERMES III, and SABRE. Most recently we used at MITL adder in the RADLAC/SMILE electron beam accelerator to produce high quality, small radius (r ρ < 2 cm), 11 to 15 MeV, 50 to 100-kA beams with a small transverse velocity v perpendicular/c = β perpendicular ≤ 0.1. In RADLAC/SMILE, a coaxial MITL passed through the eight, 2 MV vacuum envelopes. The MITL summed the voltages of all eight feeds to a single foilless diode. The experimental results are in good agreement with code simulations. Our success with the MITL technology led us to investigate the application to higher energy accelerator designs. We have a conceptual design for a cavity-fed MITL that sums the voltages from 100 identical, inductively-isolated cavities. Each cavity is a toroidal structure that is driven simultaneously by four 8-ohm pulse-forming lines, providing a 1-MV voltage pulse to each of the 100 cavities. The point design accelerator is 100 MV, 500 kA, with a 30--50 ns FWHM output pulse. 10 refs

  11. High resolution and high voltage electron microscopy at the University of California, Berkeley

    International Nuclear Information System (INIS)

    Thomas, G.; Westmacott, K.H.

    1978-01-01

    Recent applications of high-resolution and high-voltage techniques at Berkely are described, using 100-kV TEMs and a standard 650-keV HVEM: grain boundary precipitation in Al--Zn, lattice imaging of grain boundaries in ceramics, steels, phase transitions and magnetic properties of ferrites, lattice defects, precipitation in Al--Si and behavior of interstitial dislocations under electron irradiation, effect of oxide films on loop formation in Al--Mg, and polytypism in magnesium Sialon. 13 refs. 12 figs

  12. FEA identification of high order generalized equivalent circuits for MF high voltage transformers

    CERN Document Server

    Candolfi, Sylvain; Cros, Jérôme; Aguglia, Davide

    2015-01-01

    This paper presents a specific methodology to derive high order generalized equivalent circuits from electromagnetic finite element analysis for high voltage medium frequency and pulse transformers by splitting the main windings in an arbitrary number of elementary windings. With this modeling approach, the dynamic model of the transformer over a large bandwidth is improved and the order of the generalized equivalent circuit can be adapted to a specified bandwidth. This efficient tool can be used by the designer to quantify the influence of the local structure of transformers on their dynamic behavior. The influence of different topologies and winding configurations is investigated. Several application examples and an experimental validation are also presented.

  13. Energy Storage Devices as Prime Power Supplies for Low Energy, High Voltage Marx Generators

    Science.gov (United States)

    2017-10-30

    ENERGY STORAGE DEVICES AS PRIME POWER SUPPLIES FOR LOW ENERGY , HIGH VOLTAGE MARX GENERATORS David Wetz University of Texas at Arlington...DISTRIBUTION IS UNLIMITED. AIR FORCE RESEARCH LABORATORY Directed Energy Directorate 3550 Aberdeen Ave SE AIR FORCE MATERIEL COMMAND...30-09-2017 4. TITLE AND SUBTITLE Energy Storage Devices as Prime Power Supplies for Low Energy , High Voltage Marx Generators 5a. CONTRACT NUMBER

  14. INVESTIGATION WITH MODAL ANALYSIS OF EFFECTS OF HIGH PV PENETRATION ON POWER SYSTEM VOLTAGE STABILITY

    OpenAIRE

    YILDIRIM, Burak

    2017-01-01

    This paper shows the effects of high PVintegration on the power system voltage stability. PV power plant was appliedto the IEEE 30 bus test system. Modal analysis method is used to show theeffect of PV integration on power system voltage stability. The power rate ofsynchronous generator in the IEEE 30 bus system is increased to show the powersystem stability effect of high PV penetration and then the PV generation withthe same power rate is connected appropriate bus in power system. The modal...

  15. Analysis and mitigation of external factors induced failures in high voltage equipment

    OpenAIRE

    AKALP, Onur; KAYA, İbrahim; EFE, Serhat Berat

    2016-01-01

    In this study, insulators and switchyard equipment with porcelain outer surface with the most experienced equipment failures in high voltage power systems have been investigated. The effects of the external environment cause malfunctions in these equipments are determined. Due to the external environment effects failures occurring in equipment were examined. Firstly, high-voltage switchgear equipments which are the subject of study are explained. These include circuit breakers, disconnectors,...

  16. Static Electricity as Part of Electromagnetic Environment on High-Voltage Electrical Substation

    Directory of Open Access Journals (Sweden)

    M. I. Fursanov

    2012-01-01

    Full Text Available Causes of occurrences electrostatic discharges (ESD on high-voltage electric substation were investigated and dependences values ESD’s on parameters interaction structures, humidity of air were found. Experimental research values ESD’s on high-voltage electric substation and in man-made conditions was fulfilled. Uncertainty measurement’s was taken into consideration by research results analyze. Matching with research of other authors was made. Danger ESD’s for electric devises was established.

  17. Finite Element Based Optimal Design Approach for High Voltage Pulse Transformers

    CERN Document Server

    Aguglia, D; Viarouge, P; Cros, J

    2014-01-01

    This paper presents an optimal design methodology of monolithic high voltage pulse transformers based on the direct 2D FEA identification of the electrical equivalent circuit parameters. This method is applied to the preliminary optimal design of the monolithic high voltage pulse transformer for the future CLIC modulators under study at CERN. The feasibility of such a transformer with tight specifications is demonstrated. The predicted performances obtained with the direct 2D FEA optimization process is validated by 3D FEA simulation.

  18. Detailed Behavior Analysis for High Voltage Bidirectional Flyback Converter Driving DEAP Actuator

    DEFF Research Database (Denmark)

    Huang, Lina; Zhang, Zhe; Andersen, Michael A. E.

    2013-01-01

    flyback based converter has been implemented. The parasitic elements have serious influence for the operation of the converter, especially in the high output voltage condition. The detailed behavior analysis has been performed considering the impact of the critical parasitic parameters. The converter has...... been analyzed for both charging and discharging processes in low and high output voltage operating occasions. The experimental waveforms can validate the analysis....

  19. High voltage transmission lines studies with the use of artificial intelligence

    Energy Technology Data Exchange (ETDEWEB)

    Ekonomou, L. [A.S.PE.T.E. - School of Pedagogical and Technological Education, Department of Electrical Engineering Educators, N. Heraklion, 141 21 Athens (Greece)

    2009-12-15

    The paper presents an alternative approach for the studies of high voltage transmission lines based on artificial intelligence and more specifically artificial neural networks (ANNs). In contrast to the existing conventional-analytical techniques and simulations which are using in the calculations empirical and/or approximating equations, this approach is based only on actual field data and actual measurements. The proposed approach is applied on high voltage transmission lines in order to calculate the lightning outages, on grounding systems in order to assess the grounding resistance and on high voltage transmission lines' polluted insulators in order to estimate the critical flashover voltage. The obtained results are very close to the actual ones for all three case studies, something which clearly implies that the ANN approach is well working and has an acceptable accuracy, constituting an additional tool of electric engineers. (author)

  20. Environmental and biotechnological applications of high-voltage pulsed discharges in water

    International Nuclear Information System (INIS)

    Sato, Masayuki

    2008-01-01

    A high-voltage pulse has wide application in fields such as chemistry, physics and biology and their combinations. The high-voltage pulse forms two kinds of physical processes in water, namely (a) a pulsed electric field (PEF) in the parallel electrode configuration and (b) plasma generation by a pulsed discharge in the water phase with a concentrated electric field. The PEF can be used for inactivation of bacteria in liquid foods as a non-thermal process, and the underwater plasma is applicable not only for the decomposition of organic materials in water but also for biological treatment of wastewater. These discharge states are controlled mainly by the applied pulse voltage and the electrode shape. Some examples of environmental and biotechnological applications of a high-voltage pulse are reviewed.

  1. Design and Development of Autonomous High Voltage Driving System for DEAP Actuator in Radiator Thermostat

    DEFF Research Database (Denmark)

    Huang, Lina; Zhang, Zhe; Andersen, Michael A. E.

    2014-01-01

    make a high voltage capacitive load driving system to be necessary. The only energy source battery determines it needs to be an autonomous system. The detailed system specifications have been introduced and the corresponding system level design has been proposed. In addition, the detailed design......In radiator thermostat applications, DEAP (Dielectric Electro Active Polymer) actuator tends to be a good candidate to replace the conventional self-actuating or step motor based actuator due to its intrinsic advantages. The capacitive property and high voltage (HV) driving demand of DEAP actuator...... and implementation information has been provided as well, including the power and control stage inside the high voltage converter, the output voltage measurement circuit, the feedback control, etc. Finally, the experimental results have been provided to validate the capability and performance of the driving system....

  2. A New Approach to High Efficincy in Isolated Boost Converters for High-Power Low-Voltage Fuel Cell Apllications

    DEFF Research Database (Denmark)

    Nymand, Morten; Andersen, Michael A. E.

    2008-01-01

    A new low-leakage-inductance low-resistance design approach to low-voltage high-power isolated boost converters is presented. Very low levels of parasitic circuit inductances are achieved by optimizing transformer design and circuit lay-out. Primary side voltage clamp circuits can be eliminated...

  3. Electronically Tunable Current-mode High-order Ladder Low-pass Filters Based on CMOS Technology

    Directory of Open Access Journals (Sweden)

    T. Kunto

    2015-12-01

    Full Text Available This paper describes the design of current mode low-pass ladder filters based on CMOS technology. The filters are derived from passive RLC ladder filter prototypes using new CMOS lossy and lossless integrators. The all-pole and Elliptic approximations are used in the proposed low-pass filter realizations. The proposed two types of filter can be electronically tuned between 10kHz and 100MHz through bias current from 0.03µA to 300µA. The proposed filters use 1.5 V power supply with 3 mW power consumption at 300 µA bias current. The proposed filters are resistorless, use grounded capacitors and are suitable for further integration. The total harmonic distortion (THD of the low-pass filters is less than 1% over the operating frequency range. PSPICE simulation results, obtained by using TSMC 0.18µm technology, confirm the presented theory.

  4. Modified High Voltage Conversion Inverting Cuk DC-DC Converter for Renewable Energy Application

    DEFF Research Database (Denmark)

    Maroti, Pandav Kiran; Padmanaban, Sanjeevikumar; Wheeler, Patrick

    2017-01-01

    The proposed exertion represents the modified high voltage conversion Cuk converter for renewable energy application. The proposed Cuk converter is a combination of the conventional boost converter and Cuk converter. The arrangement of the proposed converter make, such as, it becomes the single...... controlled device DC-DC topology. The voltage conversion ratio of proposed converter has increased by ten times of the conventional Cuk converterat a duty ratio of 90%. The detailed analysis of the voltage conversion ratio and losses occur due to internal resistance of components is done in the paper...

  5. Mobile high-voltage switchboard. Variable and uncomplicated; Mobile Hochspannungsschaltanlage. Variabel und unkompliziert in der Anwendung

    Energy Technology Data Exchange (ETDEWEB)

    Albert, Andreas [Siemens AG, Erlangen (Germany). Sector Energy

    2009-07-13

    The mobile high-voltage switchboard ''REE-Movil 2'' for voltages up to 245 kV provides a complete and nearly autonomous switchboard in a container, a solution that has been available in the medium-voltage sector for some time already. It can be used whenever a quick replacement of a switchboard section or a temporary supplement to a switching substation is needed. The container is mounted on a trailer for maximum flexibility and mobility. (orig.)

  6. Behavior of AC High Voltage Polyamide Insulators: Evolution of Leakage Current in Different Surface Conditions

    Directory of Open Access Journals (Sweden)

    Mohammed El Amine Slama

    2015-01-01

    Full Text Available This paper is aimed at a systematic study of the leakage current of high voltage polyamide insulator string under different conditions of pollution for possible application in the electric locomotive systems. It is shown that in the case of clean/dry and clean/wetted insulators, the leakage current and applied voltage are linear. While in the case of pollution with saline spray, the leakage current and the applied voltage are not linear; the leakage current changes from a linear regime to a nonlinear regime up to total flashover of the insulators sting. Traces of erosion and tracking of insulators resulting of partial discharges are observed.

  7. Voltage magnitude and margin controller for remote industrial microgrid with high wind penetration

    DEFF Research Database (Denmark)

    Cai, Yu; Lin, Jin; Song, Yonghua

    2013-01-01

    It is well known that the remote industrial microgrid is located at the periphery of the grid, which is weakly connected to the main grid. In order to enhance the voltage stability and ensure a good power quality for industries, a voltage magnitude and margin controller based on wind turbines is ...... is proposed in this paper. This controller includes two parts to improve voltage stability in different time scales by using local measurements. Case studies conducted for a remote microgrid with high wind penetration have proved the effectiveness of the proposed control scheme....

  8. Electric Field Simulations and Analysis for High Voltage High Power Medium Frequency Transformer

    Directory of Open Access Journals (Sweden)

    Pei Huang

    2017-03-01

    Full Text Available The electronic power transformer (EPT raises concerns for its notable size and volume reduction compared with traditional line frequency transformers. Medium frequency transformers (MFTs are important components in high voltage and high power energy conversion systems such as EPTs. High voltage and high power make the reliable insulation design of MFT more difficult. In this paper, the influence of wire type and interleaved winding structure on the electric field distribution of MFT is discussed in detail. The electric field distributions for six kinds of typical non-interleaved windings with different wire types are researched using a 2-D finite element method (FEM. The electric field distributions for one non-interleaved winding and two interleaved windings are also studied using 2-D FEM. Furthermore, the maximum electric field intensities are obtained and compared. The results show that, in this case study, compared with foil conductor, smaller maximum electric field intensity can be achieved using litz wire in secondary winding. Besides, interleaving can increase the maximum electric field intensity when insulation distance is constant. The proposed method of studying the electric field distribution and analysis results are expected to make a contribution to the improvement of electric field distribution in transformers.

  9. A CMOS-MEMS arrayed resonant-gate field effect transistor (RGFET) oscillator

    Science.gov (United States)

    Chin, Chi-Hang; Li, Ming-Huang; Chen, Chao-Yu; Wang, Yu-Lin; Li, Sheng-Shian

    2015-11-01

    A high-frequency CMOS-MEMS arrayed resonant-gate field effect transistor (RGFET) fabricated by a standard 0.35 μm 2-poly-4-metal CMOS-MEMS platform is implemented to enable a Pierce-type oscillator. The proposed arrayed RGFET exhibits low motional impedance of only 5 kΩ under a purely capacitive transduction and decent power handling capability. With such features, the implemented oscillator shows impressive phase noise of  -117 dBc Hz-1 at the far-from-carrier offset (1 MHz). In this work, we design a clamped-clamped beam (CCB) arrayed resonator utilizing a high-velocity mechanical coupling scheme to serve as the resonant-gate array. To achieve a functional arrayed RGFET, a corresponding FET array is directly placed underneath the resonant gate array to convert the motional current on the resonant-gate array into a voltage output with a tunable transconductance gain. To understand the behavior of the proposed device, an equivalent circuit model consisting of the resonant unit and FET is also provided. To verify the effects of the post-CMOS process on device performance, a conventional MOS I D current measurement is carried out. Finally, a CMOS-MEMS arrayed RGFET oscillator is realized by utilizing a Pierce oscillator architecture, showing decent phase noise performance that benefits from the array design to alleviate the nonlinear effect of the resonant gate.

  10. Novel High-Voltage, High-Power Piezoelectric Transformer Developed and Demonstrated for Space Communications Applications

    Science.gov (United States)

    Carazo, Alfredo V.; Wintucky, Edwin G.

    2004-01-01

    Improvements in individual piezoelectric transformer (PT) performance and the combination of these PTs in a unique modular topology under a Phase I contract with the NASA Glenn Research Center have enabled for the first time the simultaneous achievement of both high voltage and high power at much higher levels than previously obtained with any PT. Feasibility was demonstrated by a prototype transformer (called a Tap-Soner), which is shown in the preceding photograph as part of a direct-current to direct-current (dc-dc) converter having two outputs rated at 1.5 kV/5 W and 4.5 kV/20 W. The power density of 3.5 W/cm3 is significantly lower than for magnetic transformers with the same voltage and power output. This development, which is being done under a Small Business Innovation Research (SBIR) contract by Face Electronics, LC (Norfolk, VA), is based on improvements in the materials and design of Face's basic patented Transoner-T3 PT, shown in the left in the following figure. The T3 PT is most simply described as a resonant multilayer transducer where electrical energy at the input section is efficiently mechanically coupled to the output section, which then vibrates in a fundamental longitudinal mode to generate a high gain in voltage. The piezoelectric material used is a modified lead-zirconium-titanate-based ceramic. One of the significant improvements in PT design was the incorporation of a symmetrical double input layer, shown on the right in the following figure, which eliminated the lossy bending vibration modes characteristic of a single input layer. The performance of the improved PT was optimized to 1.5 kV/5 W. The next step was devising a way to combine the individual PTs in a modular circuit topology needed to achieve the desired high voltage and power output. Since the optimum performance of the individual PT occurs at resonance, the most efficient operation of the modular transformer was achieved by using a separate drive circuit for each PT. The

  11. High Voltage Gain Dual Active Bridge Converter with an Extended Operation Range for Renewable Energy Systems

    DEFF Research Database (Denmark)

    Zhang, Zhe; Tomas Manez, Kevin; Yudi, Xiao

    2018-01-01

    Bridge (P2DAB) converter, i.e. low-voltage (LV) side parallel and high-voltage (HV) side series, is proposed to achieve high voltage gain and low current stress over switching devices and transformer windings. Given the unmodified P2DAB power stage, by regulating the phase-shift angle between......Developing bidirectional dc-dc converters has become a critical research topic and gains more and more attention in recent years due to the extensive applications of smart grids with energy storages, hybrid and electrical vehicles and dc microgrids. In this paper, a Partial Parallel Dual Active...... the paralleled active bridges, the power equations and voltage gain are then modified, and therefore the operation range can be extended effectively. The operating principles of the proposed converter and its power characteristics under various operation modes are studied, and the design constraints...

  12. DC-link voltage oscillations reduction during unbalanced grid faults for high power wind turbines

    DEFF Research Database (Denmark)

    Delpino, Hernan Anres Miranda; Teodorescu, Remus; Rodriguez, Pedro

    2011-01-01

    During unbalanced grid voltage faults the Power injected to the grid experiences 100Hz oscillations as a result of interactions between positive and negative sequence components of three-phase voltages and currents. These oscillations can become as high as %50 percent of the rated power. In this ......During unbalanced grid voltage faults the Power injected to the grid experiences 100Hz oscillations as a result of interactions between positive and negative sequence components of three-phase voltages and currents. These oscillations can become as high as %50 percent of the rated power....... In this article an improved controller is proposed which present different behavior during normal operation and faults to keep track of non-sinusoidal current reference signals. The reference signals are calculated to obtain zero power oscillations. Reconfigurable resonant controllers are used for this purpose...

  13. High voltage series protection of neutral injectors with crossed-field tubes

    International Nuclear Information System (INIS)

    Hofmann, G.A.; Thomas, D.G.

    1976-01-01

    High voltage neutral beam injectors for fusion machines require either parallel or series protection schemes to limit fault currents in case of arcing to safe levels. The protection device is usually located between the high voltage supply and beam injector and either crowbars (parallel protection) or disconnects (series protection) the high voltage supply when a fault occurs. Because of its isolating property, series protection is preferred. The Hughes crossed-field tube is uniquely suited for series protection schemes. The tube can conduct 40 A continuously upon application of voltage (approximately 300 V) and a static magnetic field (approximately 100 G). It is also capable of interrupting currents of 1000 A within 10 μs and withstand voltage of more than 120 kV. Experiments were performed to simulate the duty of a crossed-field tube as a series protection element in a neutral injector circuit under fault conditions. Results of on-switching tests under high and low voltage and interruption of fault currents are presented. An example of a possible protection circuit with crossed-field tubes is discussed

  14. Extra-High-Voltage DC-DC Boost Converters Topology with Simple Control Strategy

    Directory of Open Access Journals (Sweden)

    P. Sanjeevikumar

    2008-01-01

    Full Text Available This paper presents the topology of operating DC-DC buck converter in boost mode for extra-high-voltage applications. Traditional DC-DC boost converters are used in high-voltage applications, but they are not economical due to the limited output voltage, efficiency and they require two sensors with complex control algorithm. Moreover, due to the effect of parasitic elements the output voltage and power transfer efficiency of DC-DC converters are limited. These limitations are overcome by using the voltage lift technique, opens a good way to improve the performance characteristics of DC-DC converter. The technique is applied to DC-DC converter and a simplified control algorithm in this paper. The performance of the controller is studied for both line and load disturbances. These converters perform positive DC-DC voltage increasing conversion with high power density, high efficiency, low cost in simple structure, small ripples, and wide range of control. Simulation results along theoretical analysis are provided to verify its performance.

  15. Poisson simulation for high voltage terminal of test stand for 1MV electrostatic accelerator

    International Nuclear Information System (INIS)

    Park, Sae-Hoon; Kim, Jeong-Tae; Kwon, Hyeok-Jung; Cho, Yong-Sub; Kim, Yu-Seok

    2014-01-01

    KOMAC provide ion beam to user which energy range need to expand to MeV range and develop 1 MV electrostatic accelerator. The specifications of the electrostatic accelerator are 1MV acceleration voltage, 10 mA peak current and variable gas ion. We are developing test stand before set up 1 MV electrostatic accelerator. The test stand voltage is 300 kV and operating time is 8 hours. The test stand is consist of 300 kV high voltage terminal, DC-AC-DC inverter, power supply device inside terminal, 200MHz RF power, 5 kV extraction power supply, 300 kV accelerating tube and vacuum system.. The beam measurement system and beam dump will be installed next to accelerating tube. Poisson code simulation results of the high voltage terminal are presented in this paper. Poisson code has been used to calculate the electric field for high voltage terminal. The results of simulation were verified with reasonable results. The poisson code structure could be apply to the high voltage terminal of the test stand

  16. A capacitor-free CMOS LDO regulator with AC-boosting and active-feedback frequency compensation

    International Nuclear Information System (INIS)

    Zhou Qianneng; Wang Yongsheng; Lai Fengchang

    2009-01-01

    A capacitor-free CMOS low-dropout (LDO) regulator for system-on-chip (SoC) applications is presented. By adopting AC-boosting and active-feedback frequency compensation (ACB-AFFC), the proposed LDO regulator, which is independent of an off-chip capacitor, provides high closed-loop stability. Moreover, a slew rate enhancement circuit is adopted to increase the slew rate and decrease the output voltage dips when the load current is suddenly switched from low to high. The LDO regulator is designed and fabricated in a 0.6 μm CMOS process. The active silicon area is only 770 x 472 μm 2 . Experimental results show that the total error of the output voltage due to line variation is less than ±0.197%. The load regulation is only 0.35 mV/mA when the load current changes from 0 to 100 mA.

  17. High Order Voltage and Current Harmonic Mitigation Using the Modular Multilevel Converter STATCOM

    DEFF Research Database (Denmark)

    Kontos, Epameinondas; Tsolaridis, Georgios; Teodorescu, Remus

    2017-01-01

    Due to the increase of power electronic-based loads, the maintenance of high power quality poses a challenge in modern power systems. To limit the total harmonic distortion in the line voltage and currents at the point of the common coupling (PCC), active power filters are commonly employed...... and PCC voltage harmonics. The results verify the capability of the MMC to mitigate harmonics up to the thirteenth order, while maintaining a low effective switching frequency and thus, low switching losses....

  18. Multiloop Rapid-Rise/Rapid Fall High-Voltage Power Supply

    Science.gov (United States)

    Bearden, Douglas

    2007-01-01

    A proposed multiloop power supply would generate a potential as high as 1.25 kV with rise and fall times power supply would, moreover, be programmable to generate output potentials from 20 to 1,250 V and would be capable of supplying a current of at least 300 A at 1,250 V. This power supply is intended to be a means of electronic shuttering of a microchannel plate that would be used to intensify the output of a charge-coupled-device imager to obtain exposure times as short as 1 ms. The basic design of this power supply could also be adapted to other applications in which high voltages and high slew rates are needed. At the time of reporting the information for this article, there was no commercially available power supply capable of satisfying the stated combination of voltage, rise-time, and fall-time requirements. The power supply would include a preregulator that would be used to program a voltage 1/30 of the desired output voltage. By means of a circuit that would include a pulse-width modulator (PWM), two voltage doublers, and a transformer having two primary and two secondary windings, the preregulator output voltage would be amplified by a factor of 30. A resistor would limit the current by controlling a drive voltage applied to field-effect transistors (FETs) during turn-on of the PWM. Two feedback loops would be used to regulate the high output voltage. A pulse transformer would be used to turn on four FETs to short-circuit output capacitors when the outputs of the PWM were disabled. Application of a 0-to-5-V square to a PWM shut-down pin would cause a 20-to-1,250-V square wave to appear at the output.

  19. All solid state high voltage power supply for neutral beam sources

    International Nuclear Information System (INIS)

    Praeg, W.F.

    1984-01-01

    The conceptual design of a high frequency solid state, high power, high voltage, power system that reacts fast enough to be compatible with the requirements of a neutral beam source is presented. The system offers the potential of significant advantages over conventional power line frequency systems; such as high reliability, long life, relatively little maintenance requirements, compact size and modular design

  20. A new high-voltage interconnection shielding method for SOI monolithic ICs

    Science.gov (United States)

    Zhang, Long; Zhu, Jing; Sun, Weifeng; Huang, Xuequan; Zhao, Minna; Chen, Jiajun; Shi, Longxing; Chen, Jian; Ding, Desheng

    2017-07-01

    The high-voltage interconnection (HVI) issue becomes severe in the high-voltage monolithic ICs when single-layer metal is used for lowering the cost. This paper proposes a dual deep-oxide trenches (DDOT) structure for 500 V Silicon-on-Insulator Lateral Insulated Gate Bipolar Transistor (SOI-LIGBT) to shield the influence of HVI on the breakdown voltage. Compared with the conventional DDOT structure, HVI region of the proposed DDOT structure is shrunk by employing a shallow trench (T1) and a deep trench (T2). Besides the breakdown mechanism in the off-state, the current density and impact ionization rate distributions in the on-state of the proposed structure are also investigated. The experiments demonstrate that the proposed DDOT structure can fully shield the influence of HVI with significant reduction in the area of silicon region beneath the HVI. With almost the same off-state breakdown voltage (BVoff) of 550 V as the conventional DDOT structure, the length of the silicon region under the HVI in the proposed structure is shortened from 45 μm to 15 μm. Meanwhile, no on-state breakdown voltage (BVon) degradation is observed according to the measured results. The new method proposed in this work can also be used for other types of high-voltage devices such as LDMOS and free-wheeling diode in SOI Monolithic ICs.