High-speed architecture for the decoding of trellis-coded modulation

Science.gov (United States)

Osborne, William P.

1992-01-01

Since 1971, when the Viterbi Algorithm was introduced as the optimal method of decoding convolutional codes, improvements in circuit technology, especially VLSI, have steadily increased its speed and practicality. Trellis-Coded Modulation (TCM) combines convolutional coding with higher level modulation (non-binary source alphabet) to provide forward error correction and spectral efficiency. For binary codes, the current stare-of-the-art is a 64-state Viterbi decoder on a single CMOS chip, operating at a data rate of 25 Mbps. Recently, there has been an interest in increasing the speed of the Viterbi Algorithm by improving the decoder architecture, or by reducing the algorithm itself. Designs employing new architectural techniques are now in existence, however these techniques are currently applied to simpler binary codes, not to TCM. The purpose of this report is to discuss TCM architectural considerations in general, and to present the design, at the logic gate level, or a specific TCM decoder which applies these considerations to achieve high-speed decoding.

Reprogrammable Controller Design From High-Level Specification

Directory of Open Access Journals (Sweden)

M. Benmohammed

2003-10-01

Full Text Available Existing techniques in high-level synthesis mostly assume a simple controller architecture model in the form of a single FSM. However, in reality more complex controller architectures are often used. On the other hand, in the case of programmable processors, the controller architecture is largely defined by the available control-flow instructions in the instruction set. With the wider acceptance of behavioral synthesis, the application of these methods for the design of programmable controllers is of fundamental importance in embedded system technology. This paper describes an important extension of an existing architectural synthesis system targeting the generation of ASIP reprogrammable architectures. The designer can then generate both style of architecture, hardwired and programmable, using the same synthesis system and can quickly evaluate the trade-offs of hardware decisions.

Implementations of a four-level mechanical architecture for fault-tolerant robots

International Nuclear Information System (INIS)

Hooper, Richard; Sreevijayan, Dev; Tesar, Delbert; Geisinger, Joseph; Kapoor, Chelan

1996-01-01

This paper describes a fault tolerant mechanical architecture with four levels devised and implemented in concert with NASA (Tesar, D. and Sreevijayan, D., Four-level fault tolerance in manipulator design for space operations. In First Int. Symp. Measurement and Control in Robotics (ISMCR '90), Houston, Texas, 20-22 June 1990.) Subsequent work has clarified and revised the architecture. The four levels proceed from fault tolerance at the actuator level, to fault tolerance via in-parallel chains, to fault tolerance using serial kinematic redundancy, and finally to the fault tolerance multiple arm systems provide. This is a subsumptive architecture because each successive layer can incorporate the fault tolerance provided by all layers beneath. For instance a serially-redundant robot can incorporate dual fault-tolerant actuators. Redundant systems provide the fault tolerance, but the guiding principle of this architecture is that functional redundancies actively increase the performance of the system. Redundancies do not simply remain dormant until needed. This paper includes specific examples of hardware and/or software implementation at all four levels

Evaluation of noise level in architecture department building in University of Sumatera Utara

Science.gov (United States)

Amran, Novrial; Damanik, Novita Hillary Christy

2018-03-01

Noise is one the comfort factors that need to be noticed, particularly in an educational environment. Hearing a high noise in a period can affect students’ learning performance. The aims of this study were to know the noise level and get an appropriate design to reduce noise in Architecture Department building in the University of Sumatera Utara, considering that architecture students often spend most of their time inside the room. The measurement was conducted in four rooms for two days each from 09:00 – 12:00 and from 13:00 – 16:00 by using Sound Level Meter that placed near the noise source of the room. The result indicated that the average of noise level exceeded the 55 dB(A) so it still needs the appropriate design to reduce the noise that occurs in the building.

The ATLAS Level-1 Calorimeter Trigger Architecture

CERN Document Server

Garvey, J; Mahout, G; Moye, T H; Staley, R J; Watkins, P M; Watson, A T; Achenbach, R; Hanke, P; Kluge, E E; Meier, K; Meshkov, P; Nix, O; Penno, K; Schmitt, K; Ay, Cc; Bauss, B; Dahlhoff, A; Jakobs, K; Mahboubi, K; Schäfer, U; Trefzger, T M; Eisenhandler, E F; Landon, M; Moyse, E; Thomas, J; Apostoglou, P; Barnett, B M; Brawn, I P; Davis, A O; Edwards, J; Gee, C N P; Gillman, A R; Perera, V J O; Qian, W; Bohm, C; Hellman, S; Hidvégi, A; Silverstein, S; RT 2003 13th IEEE-NPSS Real Time Conference

2004-01-01

The architecture of the ATLAS Level-1 Calorimeter Trigger system (L1Calo) is presented. Common approaches have been adopted for data distribution, result merging, readout, and slow control across the three different subsystems. A significant amount of common hardware is utilized, yielding substantial savings in cost, spares, and development effort. A custom, high-density backplane has been developed with data paths suitable for both the em/tt cluster processor (CP) and jet/energy-summation processor (JEP) subsystems. Common modules also provide interfaces to VME, CANbus and the LHC Timing, Trigger and Control system (TTC). A common data merger module (CMM) uses FPGAs with multiple configurations for summing electron/photon and tau/hadron cluster multiplicities, jet multiplicities, or total and missing transverse energy. The CMM performs both crate- and system-level merging. A common, FPGA-based readout driver (ROD) is used by all of the subsystems to send input, intermediate and output data to the data acquis...

Experimental high energy physics and modern computer architectures

International Nuclear Information System (INIS)

Hoek, J.

1988-06-01

The paper examines how experimental High Energy Physics can use modern computer architectures efficiently. In this connection parallel and vector architectures are investigated, and the types available at the moment for general use are discussed. A separate section briefly describes some architectures that are either a combination of both, or exemplify other architectures. In an appendix some directions in which computing seems to be developing in the USA are mentioned. (author)

Component-Level Electronic-Assembly Repair (CLEAR) System Architecture

Science.gov (United States)

Oeftering, Richard C.; Bradish, Martin A.; Juergens, Jeffrey R.; Lewis, Michael J.; Vrnak, Daniel R.

2011-01-01

This document captures the system architecture for a Component-Level Electronic-Assembly Repair (CLEAR) capability needed for electronics maintenance and repair of the Constellation Program (CxP). CLEAR is intended to improve flight system supportability and reduce the mass of spares required to maintain the electronics of human rated spacecraft on long duration missions. By necessity it allows the crew to make repairs that would otherwise be performed by Earth based repair depots. Because of practical knowledge and skill limitations of small spaceflight crews they must be augmented by Earth based support crews and automated repair equipment. This system architecture covers the complete system from ground-user to flight hardware and flight crew and defines an Earth segment and a Space segment. The Earth Segment involves database management, operational planning, and remote equipment programming and validation processes. The Space Segment involves the automated diagnostic, test and repair equipment required for a complete repair process. This document defines three major subsystems including, tele-operations that links the flight hardware to ground support, highly reconfigurable diagnostics and test instruments, and a CLEAR Repair Apparatus that automates the physical repair process.

Alternatives generation and analysis report for immobilized low-level waste interim storage architecture

Energy Technology Data Exchange (ETDEWEB)

Burbank, D.A., Westinghouse Hanford

1996-09-01

The Immobilized Low-Level Waste Interim Storage subproject will provide storage capacity for immobilized low-level waste product sold to the U.S. Department of Energy by the privatization contractor. This report describes alternative Immobilized Low-Level Waste storage system architectures, evaluation criteria, and evaluation results to support the Immobilized Low-Level Waste storage system architecture selection decision process.

High-voltage, high-power architecture considerations

International Nuclear Information System (INIS)

Moser, R.L.

1985-01-01

Three basic EPS architectures, direct energy transfer, peak-power tracking, and a potential EPS architecture for a nuclear reactor are described and compared. Considerations for the power source and energy storage are discussed. Factors to be considered in selecting the operating voltage are pointed out. Other EPS architecture considerations are autonomy, solar array degrees of freedom, and EPS modularity. It was concluded that selection of the power source and energy storage has major impacts on the spacecraft architecture and mass

Instrumentation Standard Architectures for Future High Availability Control Systems

International Nuclear Information System (INIS)

Larsen, R.S.

2005-01-01

Architectures for next-generation modular instrumentation standards should aim to meet a requirement of High Availability, or robustness against system failure. This is particularly important for experiments both large and small mounted on production accelerators and light sources. New standards should be based on architectures that (1) are modular in both hardware and software for ease in repair and upgrade; (2) include inherent redundancy at internal module, module assembly and system levels; (3) include modern high speed serial inter-module communications with robust noise-immune protocols; and (4) include highly intelligent diagnostics and board-management subsystems that can predict impending failure and invoke evasive strategies. The simple design principles lead to fail-soft systems that can be applied to any type of electronics system, from modular instruments to large power supplies to pulsed power modulators to entire accelerator systems. The existing standards in use are briefly reviewed and compared against a new commercial standard which suggests a powerful model for future laboratory standard developments. The past successes of undertaking such projects through inter-laboratory engineering-physics collaborations will be briefly summarized

MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture

DEFF Research Database (Denmark)

Wu, Kehuai; Kanstein, Andreas; Madsen, Jan

2007-01-01

The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high-ILP archi......The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high......-ILP architectures achieve only low parallelism when executing partially sequential code segments, which is also known as Amdahl’s law, this paper proposes to extend ADRES to MT-ADRES (Multi-Threaded ADRES) to also exploit thread-level parallelism. On MT-ADRES architectures, the array can be partitioned in multiple...

UTBB FDSOI suitability for IoT applications: Investigations at device, design and architectural levels

Science.gov (United States)

Berthier, Florent; Beigne, Edith; Heitzmann, Frédéric; Debicki, Olivier; Christmann, Jean-Frédéric; Valentian, Alexandre; Billoint, Olivier; Amat, Esteve; Morche, Dominique; Chairat, Soundous; Sentieys, Olivier

2016-11-01

In this paper, we propose to analyze Ultra Thin Body and Box FDSOI technology suitability and architectural solutions for IoT applications and more specifically for autonomous Wireless Sensor Nodes (WSNs). As IoT applications are extremely diversified there is a strong need for flexible solutions at design, architectural level but also at technological level. Moreover, as most of those systems are recovering their energy from the environment, they are challenged by low voltage supplies and low leakage functionalities. We detail in this paper some Ultra Thin Body and Box FDSOI 28 nm characteristics and results demonstrating that this technology could be a perfect option for multidisciplinary IoT devices. Back biasing capabilities and low voltage features are investigated demonstrating efficient high speed/low leakage flexibility. In addition, architectural solutions for WSNs microcontroller are also proposed taking advantage of Ultra Thin Body and Box FDSOI characteristics for full user applicative flexibility. A partitioned architecture between an Always Responsive part with an asynchronous Wake Up Controller (WUC) managing WSN current tasks and an On Demand part with a main processor for application maintenance is presented. First results of the Always Responsive part implemented in Ultra Thin Body and Box FDSOI 28 nm are also exposed.

Disruptive Logic Architectures and Technologies From Device to System Level

CERN Document Server

Gaillardon, Pierre-Emmanuel; Clermidy, Fabien

2012-01-01

This book discusses the opportunities offered by disruptive technologies to overcome the economical and physical limits currently faced by the electronics industry. It provides a new methodology for the fast evaluation of an emerging technology from an architectural perspective and discusses the implications from simple circuits to complex architectures. Several technologies are discussed, ranging from 3-D integration of devices (Phase Change Memories, Monolithic 3-D, Vertical NanoWires-based transistors) to dense 2-D arrangements (Double-Gate Carbon Nanotubes, Sublithographic Nanowires, Lithographic Crossbar arrangements). Novel architectural organizations, as well as the associated tools, are presented in order to explore this freshly opened design space. Describes a novel architectural organization for future reconfigurable systems; Includes a complete benchmarking toolflow for emerging technologies; Generalizes the description of reconfigurable circuits in terms of hierarchical levels; Assesses disruptive...

Instrumentation of a Level-1 Track Trigger at ATLAS with Double Buffer Front-End Architecture

CERN Document Server

Cooper, B; The ATLAS collaboration

2012-01-01

Around 2021 the Large Hadron Collider will be upgraded to provide instantaneous luminosities 5x10^34, leading to excessive rates from the ATLAS Level-1 trigger. We describe a double-buffer front-end architecture for the ATLAS tracker replacement which should enable tracking information to be used in the Level-1 decision. This will allow Level-1 rates to be controlled whilst preserving high efficiency for single lepton triggers at relatively low transverse momentum thresholds pT ~25 GeV, enabling ATLAS to remain sensitive to physics at the electroweak scale. In particular, a potential hardware solution for the communication between the upgraded silicon barrel strip detectors and the external processing within this architecture will be described, and discrete event simulations used to demonstrate that this fits within the tight latency constraints.

DSP Architecture Design Essentials

CERN Document Server

Marković, Dejan

2012-01-01

In DSP Architecture Design Essentials, authors Dejan Marković and Robert W. Brodersen cover a key subject for the successful realization of DSP algorithms for communications, multimedia, and healthcare applications. The book addresses the need for DSP architecture design that maps advanced DSP algorithms to hardware in the most power- and area-efficient way. The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as automated word-length reduction and intrinsic data properties that can be leveraged to reduce hardware complexity. From a high-level data-flow graph model, an architecture exploration methodology based on linear programming is used to create an array of architectural solutions tailored to the underlying hardware technology. The book is supplemented with online material: bibliography, design examples, CAD tutorials and custom software.

MT-ADRES: multi-threading on coarse-grained reconfigurable architecture

DEFF Research Database (Denmark)

Wu, Kehuai; Kanstein, Andreas; Madsen, Jan

2008-01-01

The coarse-grained reconfigurable architecture ADRES (architecture for dynamically reconfigurable embedded systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high-ILP archi......The coarse-grained reconfigurable architecture ADRES (architecture for dynamically reconfigurable embedded systems) and its compiler offer high instruction-level parallelism (ILP) to applications by means of a sparsely interconnected array of functional units and register files. As high......-ILP architectures achieve only low parallelism when executing partially sequential code segments, which is also known as Amdahl's law, this article proposes to extend ADRES to MT-ADRES (multi-threaded ADRES) to also exploit thread-level parallelism. On MT-ADRES architectures, the array can be partitioned...

A meta-level architecture for strategic reasoning in naval planning (Extended abstract)

NARCIS (Netherlands)

Hoogendoorn, M.; Jonker, C.M.; van Maanen, P.P.; Treur, J.

2005-01-01

The management of naval organizations aims at the maximization of mission success by means of monitoring, planning, and strategic reasoning. This paper presents a meta-level architecture for strategic reasoning in naval planning. The architecture is instantiated with decision knowledge acquired from

High-Efficient Parallel CAVLC Encoders on Heterogeneous Multicore Architectures

Directory of Open Access Journals (Sweden)

H. Y. Su

2012-04-01

Full Text Available This article presents two high-efficient parallel realizations of the context-based adaptive variable length coding (CAVLC based on heterogeneous multicore processors. By optimizing the architecture of the CAVLC encoder, three kinds of dependences are eliminated or weaken, including the context-based data dependence, the memory accessing dependence and the control dependence. The CAVLC pipeline is divided into three stages: two scans, coding, and lag packing, and be implemented on two typical heterogeneous multicore architectures. One is a block-based SIMD parallel CAVLC encoder on multicore stream processor STORM. The other is a component-oriented SIMT parallel encoder on massively parallel architecture GPU. Both of them exploited rich data-level parallelism. Experiments results show that compared with the CPU version, more than 70 times of speedup can be obtained for STORM and over 50 times for GPU. The implementation of encoder on STORM can make a real-time processing for 1080p @30fps and GPU-based version can satisfy the requirements for 720p real-time encoding. The throughput of the presented CAVLC encoders is more than 10 times higher than that of published software encoders on DSP and multicore platforms.

Readout Architecture for Hybrid Pixel Readout Chips

CERN Document Server

AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

High-performance full adder architecture in quantum-dot cellular automata

Directory of Open Access Journals (Sweden)

Hamid Rashidi

2017-06-01

Full Text Available Quantum-dot cellular automata (QCA is a new and promising computation paradigm, which can be a viable replacement for the complementary metal–oxide–semiconductor technology at nano-scale level. This technology provides a possible solution for improving the computation in various computational applications. Two QCA full adder architectures are presented and evaluated: a new and efficient 1-bit QCA full adder architecture and a 4-bit QCA ripple carry adder (RCA architecture. The proposed architectures are simulated using QCADesigner tool version 2.0.1. These architectures are implemented with the coplanar crossover approach. The simulation results show that the proposed 1-bit QCA full adder and 4-bit QCA RCA architectures utilise 33 and 175 QCA cells, respectively. Our simulation results show that the proposed architectures outperform most results so far in the literature.

Contemporary moment of residential architecture at the global level: HOUSING 15

Directory of Open Access Journals (Sweden)

Petrović Vladana

2017-01-01

Full Text Available 'That architectonic exhibitions are an indispensable and significant part of the history of architecture has been proven by numerous exhibitions dating back from the first decades of the 20th century, the Paris exhibitions (Salon d'Automne, where three manifest exhibition designs by Le Corbusier were presented, promoting a new system of values of the forthcoming modernist movement, then the Berlin exhibitions in the second half of the 20th century (Interbau 1957, IBA 1987 where the Postmodern was promoted, up to the second decade of the 21st century and the Biennial in Venice (La Biennale di Venezia, 2014, whose uniting topic was One Hundred Years of ,Modernity' (prof arch Darko Marušić, quote from the catalogue of the HOUSING 15. HOUSING 15 is an exhibition that was created on the initiative of the Department of Residential Building, Faculty of Civil Engineering and Architecture, University of Nis, in order to present the modern housing architecture at the global level. The exhibition was shown at the BINA 2016 and was followed by a round table discussion upon the topic Contemporary moment of residential architecture at the global level. The idea of the round table was to compare domestic and international experience in this field and draw attention toward the attitude on the present, electronic time considering the development of the residential architecture. The specificity of this exhibition, compared to the other events of a similar nature, is that in addition to architectural design the scientific expert reviews for the selected works are also presented, given by the international scientific and artistic committee of the exhibition. The paper is the summary of the discussion held at the round table, and it presents the potential problems, answers and conclusions relating to residential architecture today from the professional perspective.

Immobilized high-level waste interim storage alternatives generation and analysis and decision report

International Nuclear Information System (INIS)

CALMUS, R.B.

1999-01-01

This report presents a study of alternative system architectures to provide onsite interim storage for the immobilized high-level waste produced by the Tank Waste Remediation System (TWRS) privatization vendor. It examines the contract and program changes that have occurred and evaluates their impacts on the baseline immobilized high-level waste (IHLW) interim storage strategy. In addition, this report documents the recommended initial interim storage architecture and implementation path forward

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

Science.gov (United States)

Dias, Tiago; Roma, Nuno; Sousa, Leonel

2014-12-01

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e.g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 × 4,320 at 30 fps) in real time.

Mathematical modelling of Bit-Level Architecture using Reciprocal Quantum Logic

Science.gov (United States)

Narendran, S.; Selvakumar, J.

2018-04-01

Efficiency of high-performance computing is on high demand with both speed and energy efficiency. Reciprocal Quantum Logic (RQL) is one of the technology which will produce high speed and zero static power dissipation. RQL uses AC power supply as input rather than DC input. RQL has three set of basic gates. Series of reciprocal transmission lines are placed in between each gate to avoid loss of power and to achieve high speed. Analytical model of Bit-Level Architecture are done through RQL. Major drawback of reciprocal Quantum Logic is area, because of lack in proper power supply. To achieve proper power supply we need to use splitters which will occupy large area. Distributed arithmetic uses vector- vector multiplication one is constant and other is signed variable and each word performs as a binary number, they rearranged and mixed to form distributed system. Distributed arithmetic is widely used in convolution and high performance computational devices.

All passive architecture for high efficiency cascaded Raman conversion

Science.gov (United States)

Balaswamy, V.; Arun, S.; Chayran, G.; Supradeepa, V. R.

2018-02-01

Cascaded Raman fiber lasers have offered a convenient method to obtain scalable, high-power sources at various wavelength regions inaccessible with rare-earth doped fiber lasers. A limitation previously was the reduced efficiency of these lasers. Recently, new architectures have been proposed to enhance efficiency, but this came at the cost of enhanced complexity, requiring an additional low-power, cascaded Raman laser. In this work, we overcome this with a new, all-passive architecture for high-efficiency cascaded Raman conversion. We demonstrate our architecture with a fifth-order cascaded Raman converter from 1117nm to 1480nm with output power of ~64W and efficiency of 60%.

Human Value And Soft Skill In Diploma Level Architectural Education

Directory of Open Access Journals (Sweden)

Dr. Sarita Dash

2017-09-01

Full Text Available In todays economic scenario the rising incomes and expectations in the wake of rapid urbanization has created a crying need for creation of value concept in the appropriate climate which will encourage emergence of good human-beings a band of worthy as well as socially responsible professionals and will eventually lead to the creation of a good society. So this paper has been designed to look at the present status of Architectural Education at Diploma level in a dynamic society. To meet the demands of the changing needs of the changing society the future architectural education should address some pertinent issues regarding soft skills which has been discussed in this paper. A little measure has been taken to explain that the innovations and practices in architectural education will impose new demands on the teachers who are mainly responsible for the rectification of the foundation at root level to cultivate the human values as a part of their teachings. The paper has also talked about the outcome of evaluation that necessitates the change in education to express the qualitative significance to human consciousness.

Efficient Architectures for Low Latency and High Throughput Trading Systems on the JVM

Directory of Open Access Journals (Sweden)

Alexandru LIXANDRU

2013-01-01

Full Text Available The motivation for our research starts from the common belief that the Java platform is not suitable for implementing ultra-high performance applications. Java is one of the most widely used software development platform in the world, and it provides the means for rapid development of robust and complex applications that are easy to extend, ensuring short time-to-market of initial deliveries and throughout the lifetime of the system. The Java runtime environment, and especially the Java Virtual Machine, on top of which applications are executed, is the principal source of concerns in regards to its suitability in the electronic trading environment, mainly because of its implicit memory management. In this paper, we intend to identify some of the most common measures that can be taken, both at the Java runtime environment level and at the application architecture level, which can help Java applications achieve ultra-high performance. We also propose two efficient architectures for exchange trading systems that allow for ultra-low latencies and high throughput.

High Dynamic Range adaptive ΔΣ-based Focal Plane Array architecture

KAUST Repository

Yao, Shun

2012-10-16

In this paper, an Adaptive Delta-Sigma based architecture for High Dynamic Range (HDR) Focal Plane Arrays is presented. The noise shaping effect of the Delta-Sigma modulation in the low end, and the distortion noise induced in the high end of Photo-diode current were analyzed in detail. The proposed architecture can extend the DR for about 20N log2 dB at the high end of Photo-diode current with an N bit Up-Down counter. At the low end, it can compensate for the larger readout noise by employing Extended Counting. The Adaptive Delta-Sigma architecture employing a 4-bit Up-Down counter achieved about 160dB in the DR, with a Peak SNR (PSNR) of 80dB at the high end. Compared to the other HDR architectures, the Adaptive Delta-Sigma based architecture provides the widest DR with the best SNR performance in the extended range.

Factoring symmetric indefinite matrices on high-performance architectures

Science.gov (United States)

Jones, Mark T.; Patrick, Merrell L.

1990-01-01

The Bunch-Kaufman algorithm is the method of choice for factoring symmetric indefinite matrices in many applications. However, the Bunch-Kaufman algorithm does not take advantage of high-performance architectures such as the Cray Y-MP. Three new algorithms, based on Bunch-Kaufman factorization, that take advantage of such architectures are described. Results from an implementation of the third algorithm are presented.

High Efficiency EBCOT with Parallel Coding Architecture for JPEG2000

Directory of Open Access Journals (Sweden)

Chiang Jen-Shiun

2006-01-01

Full Text Available This work presents a parallel context-modeling coding architecture and a matching arithmetic coder (MQ-coder for the embedded block coding (EBCOT unit of the JPEG2000 encoder. Tier-1 of the EBCOT consumes most of the computation time in a JPEG2000 encoding system. The proposed parallel architecture can increase the throughput rate of the context modeling. To match the high throughput rate of the parallel context-modeling architecture, an efficient pipelined architecture for context-based adaptive arithmetic encoder is proposed. This encoder of JPEG2000 can work at 180 MHz to encode one symbol each cycle. Compared with the previous context-modeling architectures, our parallel architectures can improve the throughput rate up to 25%.

Innovative on board payload optical architecture for high throughput satellites

Science.gov (United States)

Baudet, D.; Braux, B.; Prieur, O.; Hughes, R.; Wilkinson, M.; Latunde-Dada, K.; Jahns, J.; Lohmann, U.; Fey, D.; Karafolas, N.

2017-11-01

For the next generation of HighThroughPut (HTP) Telecommunications Satellites, space end users' needs will result in higher link speeds and an increase in the number of channels; up to 512 channels running at 10Gbits/s. By keeping electrical interconnections based on copper, the constraints in term of power dissipation, number of electrical wires and signal integrity will become too demanding. The replacement of the electrical links by optical links is the most adapted solution as it provides high speed links with low power consumption and no EMC/EMI. But replacing all electrical links by optical links of an On Board Payload (OBP) is challenging. It is not simply a matter of replacing electrical components with optical but rather the whole concept and architecture have to be rethought to achieve a high reliability and high performance optical solution. In this context, this paper will present the concept of an Innovative OBP Optical Architecture. The optical architecture was defined to meet the critical requirements of the application: signal speed, number of channels, space reliability, power dissipation, optical signals crossing and components availability. The resulting architecture is challenging and the need for new developments is highlighted. But this innovative optically interconnected architecture will substantially outperform standard electrical ones.

Architecture Of High Speed Image Processing System

Science.gov (United States)

Konishi, Toshio; Hayashi, Hiroshi; Ohki, Tohru

1988-01-01

One of architectures for a high speed image processing system which corresponds to a new algorithm for a shape understanding is proposed. And the hardware system which is based on the archtecture was developed. Consideration points of the architecture are mainly that using processors should match with the processing sequence of the target image and that the developed system should be used practically in an industry. As the result, it was possible to perform each processing at a speed of 80 nano-seconds a pixel.

High-Level Management of Communication Schedules in HPF-like Languages

National Research Council Canada - National Science Library

Benkner, Siegfried

1997-01-01

..., providing the users with a high-level language interface for programming scalable parallel architectures and delegating to the compiler the task of producing an explicitly parallel message-passing program...

FY1995 study of design methodology and environment of high-performance processor architectures; 1995 nendo koseino processor architecture sekkeiho to sekkei kankyo no kenkyu

Energy Technology Data Exchange (ETDEWEB)

NONE

1997-03-01

The aim of our project is to develop high-performance processor architectures for both general purpose and application-specific purpose. We also plan to develop basic softwares, such as compliers, and various design aid tools for those architectures. We are particularly interested in performance evaluation at architecture design phase, design optimization, automatic generation of compliers from processor designs, and architecture design methodologies combined with circuit layout. We have investigated both microprocessor architectures and design methodologies / environments for the processors. Our goal is to establish design technologies for high-performance, low-power, low-cost and highly-reliable systems in system-on-silicon era. We have proposed PPRAM architecture for high-performance system using DRAM and logic mixture technology, Softcore processor architecture for special purpose processors in embedded systems, and Power-Pro architecture for low power systems. We also developed design methodologies and design environments for the above architectures as well as a new method for design verification of microprocessors. (NEDO)

Innovation in high-level capture and diffusion of tacit architectural knowledge

OpenAIRE

Burry, Mark

2017-01-01

This paper focusses on an ‘Embedded Doctoral Design Program’ (EDDP), comprising a cohort of design PhD candidates who are ‘embedded’ outside the university for a substantial part of their candidature. Specifically, the paper details the framework and outcome for Australian doctoral candidates in architecture placed in contexts outside their experience and immediate expertise, and outside the traditional academic research setting. These contexts can be drawn potentially from professional pract...

A high-level power model for MPSoC on FPGA

NARCIS (Netherlands)

Piscitelli, R.; Pimentel, A.D.

2011-01-01

This paper presents a framework for high-level power estimation of multiprocessor systems-on-chip (MPSoC) architectures on FPGA. The technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, e.g., commonly-used instruction-set

Power-efficient computer architectures recent advances

CERN Document Server

Själander, Magnus; Kaxiras, Stefanos

2014-01-01

As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture.Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Sp

High-performance, scalable optical network-on-chip architectures

Science.gov (United States)

Tan, Xianfang

The rapid advance of technology enables a large number of processing cores to be integrated into a single chip which is called a Chip Multiprocessor (CMP) or a Multiprocessor System-on-Chip (MPSoC) design. The on-chip interconnection network, which is the communication infrastructure for these processing cores, plays a central role in a many-core system. With the continuously increasing complexity of many-core systems, traditional metallic wired electronic networks-on-chip (NoC) became a bottleneck because of the unbearable latency in data transmission and extremely high energy consumption on chip. Optical networks-on-chip (ONoC) has been proposed as a promising alternative paradigm for electronic NoC with the benefits of optical signaling communication such as extremely high bandwidth, negligible latency, and low power consumption. This dissertation focus on the design of high-performance and scalable ONoC architectures and the contributions are highlighted as follow: 1. A micro-ring resonator (MRR)-based Generic Wavelength-routed Optical Router (GWOR) is proposed. A method for developing any sized GWOR is introduced. GWOR is a scalable non-blocking ONoC architecture with simple structure, low cost and high power efficiency compared to existing ONoC designs. 2. To expand the bandwidth and improve the fault tolerance of the GWOR, a redundant GWOR architecture is designed by cascading different type of GWORs into one network. 3. The redundant GWOR built with MRR-based comb switches is proposed. Comb switches can expand the bandwidth while keep the topology of GWOR unchanged by replacing the general MRRs with comb switches. 4. A butterfly fat tree (BFT)-based hybrid optoelectronic NoC (HONoC) architecture is developed in which GWORs are used for global communication and electronic routers are used for local communication. The proposed HONoC uses less numbers of electronic routers and links than its counterpart of electronic BFT-based NoC. It takes the advantages of

Power efficient and high performance VLSI architecture for AES algorithm

Directory of Open Access Journals (Sweden)

K. Kalaiselvi

2015-09-01

Full Text Available Advanced encryption standard (AES algorithm has been widely deployed in cryptographic applications. This work proposes a low power and high throughput implementation of AES algorithm using key expansion approach. We minimize the power consumption and critical path delay using the proposed high performance architecture. It supports both encryption and decryption using 256-bit keys with a throughput of 0.06 Gbps. The VHDL language is utilized for simulating the design and an FPGA chip has been used for the hardware implementations. Experimental results reveal that the proposed AES architectures offer superior performance than the existing VLSI architectures in terms of power, throughput and critical path delay.

An Architecture Offering Mobile Pollution Sensing with High Spatial Resolution

Directory of Open Access Journals (Sweden)

Oscar Alvear

2016-01-01

Full Text Available Mobile sensing is becoming the best option to monitor our environment due to its ease of use, high flexibility, and low price. In this paper, we present a mobile sensing architecture able to monitor different pollutants using low-end sensors. Although the proposed solution can be deployed everywhere, it becomes especially meaningful in crowded cities where pollution values are often high, being of great concern to both population and authorities. Our architecture is composed of three different modules: a mobile sensor for monitoring environment pollutants, an Android-based device for transferring the gathered data to a central server, and a central processing server for analyzing the pollution distribution. Moreover, we analyze different issues related to the monitoring process: (i filtering captured data to reduce the variability of consecutive measurements; (ii converting the sensor output to actual pollution levels; (iii reducing the temporal variations produced by mobile sensing process; and (iv applying interpolation techniques for creating detailed pollution maps. In addition, we study the best strategy to use mobile sensors by first determining the influence of sensor orientation on the captured values and then analyzing the influence of time and space sampling in the interpolation process.

Embedded Real-Time Architecture for Level-Set-Based Active Contours

Directory of Open Access Journals (Sweden)

Dejnožková Eva

2005-01-01

Full Text Available Methods described by partial differential equations have gained a considerable interest because of undoubtful advantages such as an easy mathematical description of the underlying physics phenomena, subpixel precision, isotropy, or direct extension to higher dimensions. Though their implementation within the level set framework offers other interesting advantages, their vast industrial deployment on embedded systems is slowed down by their considerable computational effort. This paper exploits the high parallelization potential of the operators from the level set framework and proposes a scalable, asynchronous, multiprocessor platform suitable for system-on-chip solutions. We concentrate on obtaining real-time execution capabilities. The performance is evaluated on a continuous watershed and an object-tracking application based on a simple gradient-based attraction force driving the active countour. The proposed architecture can be realized on commercially available FPGAs. It is built around general-purpose processor cores, and can run code developed with usual tools.

Midcentury Modern High Schools: Rebooting the Architecture

Science.gov (United States)

Havens, Kevin

2010-01-01

A high school is more than a building; it's a repository of memories for many community members. High schools built at the turn of the century are not only cultural and civic landmarks, they are also often architectural treasures. When these facilities become outdated, a renovation that preserves the building's aesthetics and character is usually…

High-rise architecture in Ufa, Russia, based on crystallography canons

Science.gov (United States)

Narimanovich Sabitov, Ildar; Radikovna Kudasheva, Dilara; Yaroslavovich Vdovin, Denis

2018-03-01

The article considers fundamental steps of high-rise architecture forming stylistic tendencies, based on C. Willis and M. A. Korotich's studies. Crystallographic shaping as a direction is assigned on basis of classification by M. A. Korotich's. This direction is particularly examined and the main high-rise architecture forming aspects on basis of natural polycrystals forming principles are assigned. The article describes crystal forms transformation into an architectural composition, analyzes constructive systems within the framework of CTBUH (Council on Tall Buildings and Urban Habitat) classification, and picks out one of its types as the most optimal for using in buildings-crystals. The last stage of our research is the theoretical principles approbation into an experimental project of high-rise building in Ufa with the description of its contextual dislocation aspects.

The architecture of the CMS Level-1 Trigger Control and Monitoring System using UML

International Nuclear Information System (INIS)

Magrans de Abril, Marc; Ghabrous Larrea, Carlos; Lazaridis, Christos; Da Rocha Melo, Jose L; Hammer, Josef; Hartl, Christian

2011-01-01

The architecture of the Compact Muon Solenoid (CMS) Level-1 Trigger Control and Monitoring software system is presented. This system has been installed and commissioned on the trigger online computers and is currently used for data taking. It has been designed to handle the trigger configuration and monitoring during data taking as well as all communications with the main run control of CMS. Furthermore its design has foreseen the provision of the software infrastructure for detailed testing of the trigger system during beam down time. This is a medium-size distributed system that runs over 40 PCs and 200 processes that control about 4000 electronic boards. The architecture of this system is described using the industry-standard Universal Modeling Language (UML). This way the relationships between the different subcomponents of the system become clear and all software upgrades and modifications are simplified. The described architecture has allowed for frequent upgrades that were necessary during the commissioning phase of CMS when the trigger system evolved constantly. As a secondary objective, the paper provides a UML usage example and tries to encourage the standardization of the software documentation of large projects across the LHC and High Energy Physics community.

The architecture of the CMS Level-1 Trigger Control and Monitoring System using UML

Science.gov (United States)

Magrans de Abril, Marc; Da Rocha Melo, Jose L.; Ghabrous Larrea, Carlos; Hammer, Josef; Hartl, Christian; Lazaridis, Christos

2011-12-01

The architecture of the Compact Muon Solenoid (CMS) Level-1 Trigger Control and Monitoring software system is presented. This system has been installed and commissioned on the trigger online computers and is currently used for data taking. It has been designed to handle the trigger configuration and monitoring during data taking as well as all communications with the main run control of CMS. Furthermore its design has foreseen the provision of the software infrastructure for detailed testing of the trigger system during beam down time. This is a medium-size distributed system that runs over 40 PCs and 200 processes that control about 4000 electronic boards. The architecture of this system is described using the industry-standard Universal Modeling Language (UML). This way the relationships between the different subcomponents of the system become clear and all software upgrades and modifications are simplified. The described architecture has allowed for frequent upgrades that were necessary during the commissioning phase of CMS when the trigger system evolved constantly. As a secondary objective, the paper provides a UML usage example and tries to encourage the standardization of the software documentation of large projects across the LHC and High Energy Physics community.

High accuracy amplitude and phase measurements based on a double heterodyne architecture

International Nuclear Information System (INIS)

Zhao Danyang; Wang Guangwei; Pan Weimin

2015-01-01

In the digital low level RF (LLRF) system of a circular (particle) accelerator, the RF field signal is usually down converted to a fixed intermediate frequency (IF). The ratio of IF and sampling frequency determines the processing required, and differs in various LLRF systems. It is generally desirable to design a universally compatible architecture for different IFs with no change to the sampling frequency and algorithm. A new RF detection method based on a double heterodyne architecture for wide IF range has been developed, which achieves the high accuracy requirement of modern LLRF. In this paper, the relation of IF and phase error is systematically analyzed for the first time and verified by experiments. The effects of temperature drift for 16 h IF detection are inhibited by the amplitude and phase calibrations. (authors)

Advanced laser architectures for high power eyesafe illuminators

Science.gov (United States)

Baranova, N.; Pati, B.; Stebbins, K.; Bystryak, I.; Rayno, M.; Ezzo, K.; DePriest, C.

2018-02-01

Q-Peak has demonstrated a novel pulsed eyesafe laser architecture operating with >50 mJ pulse energies at Pulse Repetition Frequencies (PRFs) as high as 320 Hz. The design leverages an Optical Parametric Oscillator (OPO) and Optical Parametric Amplifier (OPA) geometry, which provides the unique capability for high power in a comparatively compact package, while also offering the potential for additional eyesafe power scaling. The laser consists of a Commercial Off-the-Shelf (COTS) Q-switched front-end seed laser to produce pulse-widths around 10 ns at 1.06-μm, which is then followed by a pair of Multi-Pass Amplifier (MPA) architectures (comprised of side-pumped, multi-pass Nd:YAG slabs with a compact diode-pump-array imaging system), and finally involving two sequential nonlinear optical conversion architectures for transfer into the eyesafe regime. The initial seed beam is first amplified through the MPA, and then split into parallel optical paths. An OPO provides effective nonlinear conversion on one optical path, while a second MPA further amplifies the 1.06-μm beam for use in pumping an OPA on the second optical path. These paths are then recombined prior to seeding the OPA. Each nonlinear conversion subsystem utilizes Potassium Titanyl Arsenate (KTA) for effective nonlinear conversion with lower risk to optical damage. This laser architecture efficiently produces pulse energies of >50 mJ in the eyesafe band at PRFs as high as 320 Hz, and has been designed to fit within a volume of 4,500 in3 (0.074 m3 ). We will discuss theoretical and experimental details of the nonlinear optical system for achieving higher eyesafe powers.

A high level implementation and performance evaluation of level-I asynchronous cache on FPGA

Directory of Open Access Journals (Sweden)

Mansi Jhamb

2017-07-01

Full Text Available To bridge the ever-increasing performance gap between the processor and the main memory in a cost-effective manner, novel cache designs and implementations are indispensable. Cache is responsible for a major part of energy consumption (approx. 50% of processors. This paper presents a high level implementation of a micropipelined asynchronous architecture of L1 cache. Due to the fact that each cache memory implementation is time consuming and error-prone process, a synthesizable and a configurable model proves out to be of immense help as it aids in generating a range of caches in a reproducible and quick fashion. The micropipelined cache, implemented using C-Elements acts as a distributed message-passing system. The RTL cache model implemented in this paper, comprising of data and instruction caches has a wide array of configurable parameters. In addition to timing robustness our implementation has high average cache throughput and low latency. The implemented architecture comprises of two direct-mapped, write-through caches for data and instruction. The architecture is implemented in a Field Programmable Gate Array (FPGA chip using Very High Speed Integrated Circuit Hardware Description Language (VHSIC HDL along with advanced synthesis and place-and-route tools.

Dynamic Weather Routes Architecture Overview

Science.gov (United States)

Eslami, Hassan; Eshow, Michelle

2014-01-01

Dynamic Weather Routes Architecture Overview, presents the high level software architecture of DWR, based on the CTAS software framework and the Direct-To automation tool. The document also covers external and internal data flows, required dataset, changes to the Direct-To software for DWR, collection of software statistics, and the code structure.

Progress in a novel architecture for high performance processing

Science.gov (United States)

Zhang, Zhiwei; Liu, Meng; Liu, Zijun; Du, Xueliang; Xie, Shaolin; Ma, Hong; Ding, Guangxin; Ren, Weili; Zhou, Fabiao; Sun, Wenqin; Wang, Huijuan; Wang, Donglin

2018-04-01

The high performance processing (HPP) is an innovative architecture which targets on high performance computing with excellent power efficiency and computing performance. It is suitable for data intensive applications like supercomputing, machine learning and wireless communication. An example chip with four application-specific integrated circuit (ASIC) cores which is the first generation of HPP cores has been taped out successfully under Taiwan Semiconductor Manufacturing Company (TSMC) 40 nm low power process. The innovative architecture shows great energy efficiency over the traditional central processing unit (CPU) and general-purpose computing on graphics processing units (GPGPU). Compared with MaPU, HPP has made great improvement in architecture. The chip with 32 HPP cores is being developed under TSMC 16 nm field effect transistor (FFC) technology process and is planed to use commercially. The peak performance of this chip can reach 4.3 teraFLOPS (TFLOPS) and its power efficiency is up to 89.5 gigaFLOPS per watt (GFLOPS/W).

An architecture for human-network interfaces

DEFF Research Database (Denmark)

Sonnenwald, Diane H.

1990-01-01

Some of the issues (and their consequences) that arise when human-network interfaces (HNIs) are viewed from the perspective of people who use and develop them are examined. Target attributes of HNI architecture are presented. A high-level architecture model that supports the attributes is discussed...

Validating Avionics Conceptual Architectures with Executable Specifications

Directory of Open Access Journals (Sweden)

Nils Fischer

2012-08-01

Full Text Available Current avionics systems specifications, developed after conceptual design, have a high degree of uncertainty. Since specifications are not sufficiently validated in the early development process and no executable specification exists at aircraft level, system designers cannot evaluate the impact of their design decisions at aircraft or aircraft application level. At the end of the development process of complex systems, e. g. aircraft, an average of about 65 per cent of all specifications have to be changed because they are incorrect, incomplete or too vaguely described. In this paper, a model-based design methodology together with a virtual test environment is described that makes complex high level system specifications executable and testable during the very early levels of system design. An aircraft communication system and its system context is developed to demonstrate the proposed early validation methodology. Executable specifications for early conceptual system architectures enable system designers to couple functions, architecture elements, resources and performance parameters, often called non-functional parameters. An integrated executable specification at Early Conceptual Architecture Level is developed and used to determine the impact of different system architecture decisions on system behavior and overall performance.

A high-level power model for MPSoC on FPGA

NARCIS (Netherlands)

Piscitelli, R.; Pimentel, A.D.

2012-01-01

This paper presents a framework for high-level power estimation of multiprocessor systems-on-chip (MPSoC) architectures on FPGA. The technique is based on abstract execution profiles, called event signatures. As a result, it is capable of achieving good evaluation performance, thereby making the

L1Track: A fast Level 1 track trigger for the ATLAS high luminosity upgrade

International Nuclear Information System (INIS)

Cerri, Alessandro

2016-01-01

With the planned high-luminosity upgrade of the LHC (HL-LHC), the ATLAS detector will see its collision rate increase by approximately a factor of 5 with respect to the current LHC operation. The earliest hardware-based ATLAS trigger stage (“Level 1”) will have to provide a higher rejection factor in a more difficult environment: a new improved Level 1 trigger architecture is under study, which includes the possibility of extracting with low latency and high accuracy tracking information in time for the decision taking process. In this context, the feasibility of potential approaches aimed at providing low-latency high-quality tracking at Level 1 is discussed. - Highlights: • HL-LH requires highly performing event selection. • ATLAS is studying the implementation of tracking at the very first trigger level. • Low latency and high-quality seem to be achievable with dedicated hardware and adequate detector readout architecture.

Neural codes of seeing architectural styles.

Science.gov (United States)

Choo, Heeyoung; Nasar, Jack L; Nikrahei, Bardia; Walther, Dirk B

2017-01-10

Images of iconic buildings, such as the CN Tower, instantly transport us to specific places, such as Toronto. Despite the substantial impact of architectural design on people's visual experience of built environments, we know little about its neural representation in the human brain. In the present study, we have found patterns of neural activity associated with specific architectural styles in several high-level visual brain regions, but not in primary visual cortex (V1). This finding suggests that the neural correlates of the visual perception of architectural styles stem from style-specific complex visual structure beyond the simple features computed in V1. Surprisingly, the network of brain regions representing architectural styles included the fusiform face area (FFA) in addition to several scene-selective regions. Hierarchical clustering of error patterns further revealed that the FFA participated to a much larger extent in the neural encoding of architectural styles than entry-level scene categories. We conclude that the FFA is involved in fine-grained neural encoding of scenes at a subordinate-level, in our case, architectural styles of buildings. This study for the first time shows how the human visual system encodes visual aspects of architecture, one of the predominant and longest-lasting artefacts of human culture.

The Hi-Ring architecture for datacentre networks

DEFF Research Database (Denmark)

Galili, Michael; Kamchevska, Valerija; Ding, Yunhong

2016-01-01

This paper summarizes recent work on a hierarchical ring-based network architecture (Hi-Ring) for datacentre and short-range applications. The architecture allows leveraging benefits of optical switching technologies while maintaining a high level of connection granularity. We discuss results...

A high performance architecture for accelerator controls

International Nuclear Information System (INIS)

Allen, M.; Hunt, S.M; Lue, H.; Saltmarsh, C.G.; Parker, C.R.C.B.

1991-01-01

The demands placed on the Superconducting Super Collider (SSC) control system due to large distances, high bandwidth and fast response time required for operation will require a fresh approach to the data communications architecture of the accelerator. The prototype design effort aims at providing deterministic communication across the accelerator complex with a response time of < 100 ms and total bandwidth of 2 Gbits/sec. It will offer a consistent interface for a large number of equipment types, from vacuum pumps to beam position monitors, providing appropriate communications performance for each equipment type. It will consist of highly parallel links to all equipment: those with computing resources, non-intelligent direct control interfaces, and data concentrators. This system will give each piece of equipment a dedicated link of fixed bandwidth to the control system. Application programs will have access to all accelerator devices which will be memory mapped into a global virtual addressing scheme. Links to devices in the same geographical area will be multiplexed using commercial Time Division Multiplexing equipment. Low-level access will use reflective memory techniques, eliminating processing overhead and complexity of traditional data communication protocols. The use of commercial standards and equipment will enable a high performance system to be built at low cost

A high performance architecture for accelerator controls

International Nuclear Information System (INIS)

Allen, M.; Hunt, S.M.; Lue, H.; Saltmarsh, C.G.; Parker, C.R.C.B.

1991-03-01

The demands placed on the Superconducting Super Collider (SSC) control system due to large distances, high bandwidth and fast response time required for operation will require a fresh approach to the data communications architecture of the accelerator. The prototype design effort aims at providing deterministic communication across the accelerator complex with a response time of <100 ms and total bandwidth of 2 Gbits/sec. It will offer a consistent interface for a large number of equipment types, from vacuum pumps to beam position monitors, providing appropriate communications performance for each equipment type. It will consist of highly parallel links to all equipments: those with computing resources, non-intelligent direct control interfaces, and data concentrators. This system will give each piece of equipment a dedicated link of fixed bandwidth to the control system. Application programs will have access to all accelerator devices which will be memory mapped into a global virtual addressing scheme. Links to devices in the same geographical area will be multiplexed using commercial Time Division Multiplexing equipment. Low-level access will use reflective memory techniques, eliminating processing overhead and complexity of traditional data communication protocols. The use of commercial standards and equipment will enable a high performance system to be built at low cost. 1 fig

Scalable Intersample Interpolation Architecture for High-channel-count Beamformers

DEFF Research Database (Denmark)

Tomov, Borislav Gueorguiev; Nikolov, Svetoslav I; Jensen, Jørgen Arendt

2011-01-01

Modern ultrasound scanners utilize digital beamformers that operate on sampled and quantized echo signals. Timing precision is of essence for achieving good focusing. The direct way to achieve it is through the use of high sampling rates, but that is not economical, so interpolation between echo...... samples is used. This paper presents a beamformer architecture that combines a band-pass filter-based interpolation algorithm with the dynamic delay-and-sum focusing of a digital beamformer. The reduction in the number of multiplications relative to a linear perchannel interpolation and band-pass per......-channel interpolation architecture is respectively 58 % and 75 % beamformer for a 256-channel beamformer using 4-tap filters. The approach allows building high channel count beamformers while maintaining high image quality due to the use of sophisticated intersample interpolation....

Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification

Directory of Open Access Journals (Sweden)

Pierangelo Terreni

2010-01-01

Full Text Available The paper addresses the algorithmic and architectural design of digital input power audio amplifiers. A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Different amplifier architectures are configured and compared to find optimal trade-offs among different cost-functions: low distortion, high efficiency, low circuit complexity and low sensitivity to parameter changes. A novel amplifier architecture is derived; its prototype implements digital processing IP macrocells (oversampler, interpolating filter, PWM cross-point deriver, noise shaper, multilevel PWM modulator, dead time compensator on a single low-complexity FPGA while off-chip components are used only for the power output stage (LC filter and power MOS bridge; no heatsink is required. The resulting digital input amplifier features a power efficiency higher than 90% and a total harmonic distortion down to 0.13% at power levels of tens of Watts. Discussions towards the full-silicon integration of the mixed-signal amplifier in embedded devices, using BCD technology and targeting power levels of few Watts, are also reported.

Blaze-DEMGPU: Modular high performance DEM framework for the GPU architecture

Directory of Open Access Journals (Sweden)

Nicolin Govender

2016-01-01

Full Text Available Blaze-DEMGPU is a modular GPU based discrete element method (DEM framework that supports polyhedral shaped particles. The high level performance is attributed to the light weight and Single Instruction Multiple Data (SIMD that the GPU architecture offers. Blaze-DEMGPU offers suitable algorithms to conduct DEM simulations on the GPU and these algorithms can be extended and modified. Since a large number of scientific simulations are particle based, many of the algorithms and strategies for GPU implementation present in Blaze-DEMGPU can be applied to other fields. Blaze-DEMGPU will make it easier for new researchers to use high performance GPU computing as well as stimulate wider GPU research efforts by the DEM community.

Architectures of electro-optical packet switched networks

DEFF Research Database (Denmark)

Berger, Michael Stubert

2004-01-01

and examines possible architectures for future high capacity networks with high capacity nodes. It is assumed that optics will play a key role in this scenario, and in this respect, the European IST research project DAVID aimed at proposing viable architectures for optical packet switching, exploiting the best...... from optics and electronics. An overview of the DAVID network architecture is given, focusing on the MAN and WAN architecture as well as the MPLS based network hierarchy. A statistical model of the optical slot generation process is presented and utilised to evaluate delay vs. efficiency. Furthermore...... architecture for a buffered crossbar switch is presented. The architecture uses two levels of backpressure (flow control) with different constraints on round trip time. No additional scheduling complexity is introduced, and for the actual example shown, a reduction in memory of 75% was obtained at the cost...

Real-time TPC analysis with the ALICE High-Level Trigger

International Nuclear Information System (INIS)

Lindenstruth, V.; Loizides, C.; Roehrich, D.; Skaali, B.; Steinbeck, T.; Stock, R.; Tilsner, H.; Ullaland, K.; Vestboe, A.; Vik, T.

2004-01-01

The ALICE High-Level Trigger processes data online, to either select interesting (sub-) events, or to compress data efficiently by modeling techniques. Focusing on the main data source, the Time Projection Chamber, the architecture of the system and the current state of the tracking and compression methods are outlined

A High Performance COTS Based Computer Architecture

Science.gov (United States)

Patte, Mathieu; Grimoldi, Raoul; Trautner, Roland

2014-08-01

Using Commercial Off The Shelf (COTS) electronic components for space applications is a long standing idea. Indeed the difference in processing performance and energy efficiency between radiation hardened components and COTS components is so important that COTS components are very attractive for use in mass and power constrained systems. However using COTS components in space is not straightforward as one must account with the effects of the space environment on the COTS components behavior. In the frame of the ESA funded activity called High Performance COTS Based Computer, Airbus Defense and Space and its subcontractor OHB CGS have developed and prototyped a versatile COTS based architecture for high performance processing. The rest of the paper is organized as follows: in a first section we will start by recapitulating the interests and constraints of using COTS components for space applications; then we will briefly describe existing fault mitigation architectures and present our solution for fault mitigation based on a component called the SmartIO; in the last part of the paper we will describe the prototyping activities executed during the HiP CBC project.

Connecting Architecture and Implementation

Science.gov (United States)

Buchgeher, Georg; Weinreich, Rainer

Software architectures are still typically defined and described independently from implementation. To avoid architectural erosion and drift, architectural representation needs to be continuously updated and synchronized with system implementation. Existing approaches for architecture representation like informal architecture documentation, UML diagrams, and Architecture Description Languages (ADLs) provide only limited support for connecting architecture descriptions and implementations. Architecture management tools like Lattix, SonarJ, and Sotoarc and UML-tools tackle this problem by extracting architecture information directly from code. This approach works for low-level architectural abstractions like classes and interfaces in object-oriented systems but fails to support architectural abstractions not found in programming languages. In this paper we present an approach for linking and continuously synchronizing a formalized architecture representation to an implementation. The approach is a synthesis of functionality provided by code-centric architecture management and UML tools and higher-level architecture analysis approaches like ADLs.

Accuracy Test of Software Architecture Compliance Checking Tools : Test Instruction

NARCIS (Netherlands)

Prof.dr. S. Brinkkemper; Dr. Leo Pruijt; C. Köppe; J.M.E.M. van der Werf

2015-01-01

Author supplied: "Abstract Software Architecture Compliance Checking (SACC) is an approach to verify conformance of implemented program code to high-level models of architectural design. Static SACC focuses on the modular software architecture and on the existence of rule violating dependencies

High Intensity Laser Power Beaming Architecture for Space and Terrestrial Missions

Science.gov (United States)

Nayfeh, Taysir; Fast, Brian; Raible, Daniel; Dinca, Dragos; Tollis, Nick; Jalics, Andrew

2011-01-01

High Intensity Laser Power Beaming (HILPB) has been developed as a technique to achieve Wireless Power Transmission (WPT) for both space and terrestrial applications. In this paper, the system architecture and hardware results for a terrestrial application of HILPB are presented. These results demonstrate continuous conversion of high intensity optical energy at near-IR wavelengths directly to electrical energy at output power levels as high as 6.24 W from the single cell 0.8 cm2 aperture receiver. These results are scalable, and may be realized by implementing receiver arraying and utilizing higher power source lasers. This type of system would enable long range optical refueling of electric platforms, such as MUAV s, airships, robotic exploration missions and provide power to spacecraft platforms which may utilize it to drive electric means of propulsion.

Genetic architecture of vitamin B12 and folate levels uncovered applying deeply sequenced large datasets

DEFF Research Database (Denmark)

Grarup, Niels; Sulem, Patrick; Sandholt, Camilla H

2013-01-01

of the underlying biology of human traits and diseases. Here, we used a large Icelandic whole genome sequence dataset combined with Danish exome sequence data to gain insight into the genetic architecture of serum levels of vitamin B12 (B12) and folate. Up to 22.9 million sequence variants were analyzed in combined...... in serum B12 or folate levels do not modify the risk of developing these conditions. Yet, the study demonstrates the value of combining whole genome and exome sequencing approaches to ascertain the genetic and molecular architectures underlying quantitative trait associations....

A high throughput architecture for a low complexity soft-output demapping algorithm

Science.gov (United States)

Ali, I.; Wasenmüller, U.; Wehn, N.

2015-11-01

Iterative channel decoders such as Turbo-Code and LDPC decoders show exceptional performance and therefore they are a part of many wireless communication receivers nowadays. These decoders require a soft input, i.e., the logarithmic likelihood ratio (LLR) of the received bits with a typical quantization of 4 to 6 bits. For computing the LLR values from a received complex symbol, a soft demapper is employed in the receiver. The implementation cost of traditional soft-output demapping methods is relatively large in high order modulation systems, and therefore low complexity demapping algorithms are indispensable in low power receivers. In the presence of multiple wireless communication standards where each standard defines multiple modulation schemes, there is a need to have an efficient demapper architecture covering all the flexibility requirements of these standards. Another challenge associated with hardware implementation of the demapper is to achieve a very high throughput in double iterative systems, for instance, MIMO and Code-Aided Synchronization. In this paper, we present a comprehensive communication and hardware performance evaluation of low complexity soft-output demapping algorithms to select the best algorithm for implementation. The main goal of this work is to design a high throughput, flexible, and area efficient architecture. We describe architectures to execute the investigated algorithms. We implement these architectures on a FPGA device to evaluate their hardware performance. The work has resulted in a hardware architecture based on the figured out best low complexity algorithm delivering a high throughput of 166 Msymbols/second for Gray mapped 16-QAM modulation on Virtex-5. This efficient architecture occupies only 127 slice registers, 248 slice LUTs and 2 DSP48Es.

Multiple Word-Length High-Level Synthesis

Directory of Open Access Journals (Sweden)

Coussy Philippe

2008-01-01

Full Text Available Abstract Digital signal processing (DSP applications are nowadays widely used and their complexity is ever growing. The design of dedicated hardware accelerators is thus still needed in system-on-chip and embedded systems. Realistic hardware implementation requires first to convert the floating-point data of the initial specification into arbitrary length data (finite-precision while keeping an acceptable computation accuracy. Next, an optimized hardware architecture has to be designed. Considering uniform bit-width specification allows to use traditional automated design flow. However, it leads to oversized design. On the other hand, considering non uniform bit-width specification allows to get a smaller circuit but requires complex design tasks. In this paper, we propose an approach that inputs a C/C++ specification. The design flow, based on high-level synthesis (HLS techniques, automatically generates a potentially pipeline RTL architecture described in VHDL. Both bitaccurate integer and fixed-point data types can be used in the input specification. The generated architecture uses components (operator, register, etc. that have different widths. The design constraints are the clock period and the throughput of the application. The proposed approach considers data word-length information in all the synthesis steps by using dedicated algorithms. We show in this paper the effectiveness of the proposed approach through several design experiments in the DSP domain.

Multiple Word-Length High-Level Synthesis

Directory of Open Access Journals (Sweden)

Dominique Heller

2008-09-01

Full Text Available Digital signal processing (DSP applications are nowadays widely used and their complexity is ever growing. The design of dedicated hardware accelerators is thus still needed in system-on-chip and embedded systems. Realistic hardware implementation requires first to convert the floating-point data of the initial specification into arbitrary length data (finite-precision while keeping an acceptable computation accuracy. Next, an optimized hardware architecture has to be designed. Considering uniform bit-width specification allows to use traditional automated design flow. However, it leads to oversized design. On the other hand, considering non uniform bit-width specification allows to get a smaller circuit but requires complex design tasks. In this paper, we propose an approach that inputs a C/C++ specification. The design flow, based on high-level synthesis (HLS techniques, automatically generates a potentially pipeline RTL architecture described in VHDL. Both bitaccurate integer and fixed-point data types can be used in the input specification. The generated architecture uses components (operator, register, etc. that have different widths. The design constraints are the clock period and the throughput of the application. The proposed approach considers data word-length information in all the synthesis steps by using dedicated algorithms. We show in this paper the effectiveness of the proposed approach through several design experiments in the DSP domain.

A scalable-low cost architecture for high gain beamforming antennas

KAUST Repository

Bakr, Omar; Johnson, Mark; Jungdong Park,; Adabi, Ehsan; Jones, Kevin; Niknejad, Ali

2010-01-01

Many state-of-the-art wireless systems, such as long distance mesh networks and high bandwidth networks using mm-wave frequencies, require high gain antennas to overcome adverse channel conditions. These networks could be greatly aided by adaptive beamforming antenna arrays, which can significantly simplify the installation and maintenance costs (e.g., by enabling automatic beam alignment). However, building large, low cost beamforming arrays is very complicated. In this paper, we examine the main challenges presented by large arrays, starting from electromagnetic and antenna design and proceeding to the signal processing and algorithms domain. We propose 3-dimensional antenna structures and hybrid RF/digital radio architectures that can significantly reduce the complexity and improve the power efficiency of adaptive array systems. We also present signal processing techniques based on adaptive filtering methods that enhance the robustness of these architectures. Finally, we present computationally efficient vector quantization techniques that significantly improve the interference cancellation capabilities of analog beamforming architectures. © 2010 IEEE.

A scalable-low cost architecture for high gain beamforming antennas

KAUST Repository

Bakr, Omar

2010-10-01

Many state-of-the-art wireless systems, such as long distance mesh networks and high bandwidth networks using mm-wave frequencies, require high gain antennas to overcome adverse channel conditions. These networks could be greatly aided by adaptive beamforming antenna arrays, which can significantly simplify the installation and maintenance costs (e.g., by enabling automatic beam alignment). However, building large, low cost beamforming arrays is very complicated. In this paper, we examine the main challenges presented by large arrays, starting from electromagnetic and antenna design and proceeding to the signal processing and algorithms domain. We propose 3-dimensional antenna structures and hybrid RF/digital radio architectures that can significantly reduce the complexity and improve the power efficiency of adaptive array systems. We also present signal processing techniques based on adaptive filtering methods that enhance the robustness of these architectures. Finally, we present computationally efficient vector quantization techniques that significantly improve the interference cancellation capabilities of analog beamforming architectures. © 2010 IEEE.

Parametric Approach to Assessing Performance of High-Lift Device Active Flow Control Architectures

Directory of Open Access Journals (Sweden)

Yu Cai

2017-02-01

Full Text Available Active Flow Control is at present an area of considerable research, with multiple potential aircraft applications. While the majority of research has focused on the performance of the actuators themselves, a system-level perspective is necessary to assess the viability of proposed solutions. This paper demonstrates such an approach, in which major system components are sized based on system flow and redundancy considerations, with the impacts linked directly to the mission performance of the aircraft. Considering the case of a large twin-aisle aircraft, four distinct active flow control architectures that facilitate the simplification of the high-lift mechanism are investigated using the demonstrated approach. The analysis indicates a very strong influence of system total mass flow requirement on architecture performance, both for a typical mission and also over the entire payload-range envelope of the aircraft.

High-Performance Monitoring Architecture for Large-Scale Distributed Systems Using Event Filtering

Science.gov (United States)

Maly, K.

1998-01-01

Monitoring is an essential process to observe and improve the reliability and the performance of large-scale distributed (LSD) systems. In an LSD environment, a large number of events is generated by the system components during its execution or interaction with external objects (e.g. users or processes). Monitoring such events is necessary for observing the run-time behavior of LSD systems and providing status information required for debugging, tuning and managing such applications. However, correlated events are generated concurrently and could be distributed in various locations in the applications environment which complicates the management decisions process and thereby makes monitoring LSD systems an intricate task. We propose a scalable high-performance monitoring architecture for LSD systems to detect and classify interesting local and global events and disseminate the monitoring information to the corresponding end- points management applications such as debugging and reactive control tools to improve the application performance and reliability. A large volume of events may be generated due to the extensive demands of the monitoring applications and the high interaction of LSD systems. The monitoring architecture employs a high-performance event filtering mechanism to efficiently process the large volume of event traffic generated by LSD systems and minimize the intrusiveness of the monitoring process by reducing the event traffic flow in the system and distributing the monitoring computation. Our architecture also supports dynamic and flexible reconfiguration of the monitoring mechanism via its Instrumentation and subscription components. As a case study, we show how our monitoring architecture can be utilized to improve the reliability and the performance of the Interactive Remote Instruction (IRI) system which is a large-scale distributed system for collaborative distance learning. The filtering mechanism represents an Intrinsic component integrated

High Quality Virtual Reality for Architectural Exhibitions

DEFF Research Database (Denmark)

Kreutzberg, Anette

2016-01-01

This paper will summarise the findings from creating and implementing a visually high quality Virtual Reality (VR) experiment as part of an international architecture exhibition. It was the aim to represent the architectural spatial qualities as well as the atmosphere created from combining natural...... and artificial lighting in a prominent not yet built project. The outcome is twofold: Findings concerning the integration of VR in an exhibition space and findings concerning the experience of the virtual space itself. In the exhibition, an important aspect was the unmanned exhibition space, requiring the VR...... experience to be self-explanatory. Observations of different visitor reactions to the unmanned VR experience compared with visitor reactions at guided tours with personal instructions are evaluated. Data on perception of realism, spatial quality and light in the VR model were collected with qualitative...

ECOSUSTAINABLE HIGH-RISE : The Environmentally Conscious Architecture of Skyscraper

Directory of Open Access Journals (Sweden)

Jimmy Priatman

2000-01-01

Full Text Available The term " green architecture " is related to evolving architecture which is sensitive to the environment and emerges from the environmental awareness due to the effects of destruction of air, water, energy and earth. It is characterized by improving energy efficiency, sustainability concept and holistic approach of the entire building enterprise, where all of the environmental factors are regarded as an objective. Although there are many of environmentally conscious architectural works today, but most of the building designers prefer to deal primarily with small-scale buildings (low to medium rise and often only in greenfield, rural or suburban sites. All those large scale, high-rise or tall buildings located in dense urban areas are regarded as avoidable objects that consumes a lot of energy, uses huge amounts of materials, and produces massive volumes of waste discharge into the environment. These intensive buildings deserve greater attention and should be designed by greater part of our expertise and effort to ecologically design than the smaller buildings with fewer problems. The paper discusses "green" dimensions applied to tall buildings/high-rise buildings with their innovative approach that leads to ecosustainable tall buildings.

Assessment of studies and researches on warehousing - High-level and intermediate-level-long-lived radioactive wastes - December 2012

International Nuclear Information System (INIS)

2013-01-01

This large report first presents the approach adopted for the study and research on the warehousing of high-level and intermediate-level-long-lived radioactive wastes. It outlines how reversible storage and warehousing are complementary, discusses the lessons learned from researches performed by the CEA on long duration warehousing, presents the framework of studies and researches performed since 2006, and presents the scientific and technical content of studies and researches (warehousing need analysis, search for technical options providing complementarity with storage, extension or creation of warehousing installations). The second part addresses high-level and intermediate-level-long-lived radioactive waste parcels, indicates their origins and quantities. The third part proposes an analysis of warehousing capacities: existing capacities, French industrial experience in waste parcel warehousing, foreign experience in waste warehousing. The fourth part addresses reversible storage in deep geological formation: storage safety functions, storage reversibility, storage parcels, storage architecture, chronicle draft. The fifth part proposes an inventory of warehousing needs in terms of additional capacities for the both types of wastes (high-level, and intermediate-level-long-lived), and discusses warehousing functionalities and safety objectives. The sixth and seventh parts propose a detailed overview of design options for warehousing installations, respectively for high-level and for intermediate-level-long-lived waste parcels: main technical issues, feasibility studies of different concepts or architecture shapes, results of previous studies and introduction to studies performed since 2011, possible evolutions of the HA1, HA2 and MAVL concepts. The eighth chapter reports a phenomenological analysis of warehousing and the optimisation of material selection and construction arrangements. The last part discusses the application of researches to the extension of the

Design of a Load-Balancing Architecture For Parallel Firewalls

National Research Council Canada - National Science Library

Joyner, William

1999-01-01

.... This thesis proposes a load-balancing firewall architecture to meet the Navy's needs. It first conducts an architectural analysis of the problem and then presents a high-level system design as a solution...

A First Step Towards High-Level Cost Models for the Implementation of SDRs on Multiprocessing Reconfigurable Systems

DEFF Research Database (Denmark)

Le Moullec, Yannick

2011-01-01

-In-Progress paper we introduce our set of high-level estimation models for Area-Time costs of applications mapped onto FPGA-based multiprocessing reconfigurable architectures. In particular, we suggest models for static and dynamic implementations, taking various internal and external architectural elements...... into account. We believe that such models could be used for rapidly comparing implementation alternatives at a high level of abstraction and for guiding the designer during the (pre)analysis phase of the design flow for the implementation of e.g. SDR platforms....

High Performance Motion-Planner Architecture for Hardware-In-the-Loop System Based on Position-Based-Admittance-Control

Directory of Open Access Journals (Sweden)

Francesco La Mura

2018-02-01

Full Text Available This article focuses on a Hardware-In-the-Loop application developed from the advanced energy field project LIFES50+. The aim is to replicate, inside a wind gallery test facility, the combined effect of aerodynamic and hydrodynamic loads on a floating wind turbine model for offshore energy production, using a force controlled robotic device, emulating floating substructure’s behaviour. In addition to well known real-time Hardware-In-the-Loop (HIL issues, the particular application presented has stringent safety requirements of the HIL equipment and difficult to predict operating conditions, so that extra computational efforts have to be spent running specific safety algorithms and achieving desired performance. To meet project requirements, a high performance software architecture based on Position-Based-Admittance-Control (PBAC is presented, combining low level motion interpolation techniques, efficient motion planning, based on buffer management and Time-base control, and advanced high level safety algorithms, implemented in a rapid real-time control architecture.

Benchmarking high performance computing architectures with CMS’ skeleton framework

Science.gov (United States)

Sexton-Kennedy, E.; Gartung, P.; Jones, C. D.

2017-10-01

In 2012 CMS evaluated which underlying concurrency technology would be the best to use for its multi-threaded framework. The available technologies were evaluated on the high throughput computing systems dominating the resources in use at that time. A skeleton framework benchmarking suite that emulates the tasks performed within a CMSSW application was used to select Intel’s Thread Building Block library, based on the measured overheads in both memory and CPU on the different technologies benchmarked. In 2016 CMS will get access to high performance computing resources that use new many core architectures; machines such as Cori Phase 1&2, Theta, Mira. Because of this we have revived the 2012 benchmark to test it’s performance and conclusions on these new architectures. This talk will discuss the results of this exercise.

A data acquisition architecture for the SSC

International Nuclear Information System (INIS)

Partridge, R.

1990-01-01

An SSC data acquisition architecture applicable to high-p T detectors is described. The architecture is based upon a small set of design principles that were chosen to simplify communication between data acquisition elements while providing the required level of flexibility and performance. The architecture features an integrated system for data collection, event building, and communication with a large processing farm. The interface to the front end electronics system is also discussed. A set of design parameters is given for a data acquisition system that should meet the needs of high-p T detectors at the SSC

How do architecture patterns and tactics interact? A model and annotation

NARCIS (Netherlands)

Harrison, Neil B.; Avgeriou, Paris

2010-01-01

Software architecture designers inevitably work with both architecture patterns and tactics. Architecture patterns describe the high-level structure and behavior of software systems as the solution to multiple system requirements, whereas tactics are design decisions that improve individual quality

Using High-Level RTOS Models for HW/SW Embedded Architecture Exploration: Case Study on Mobile Robotic Vision

Directory of Open Access Journals (Sweden)

Verdier François

2008-01-01

Full Text Available Abstract We are interested in the design of a system-on-chip implementing the vision system of a mobile robot. Following a biologically inspired approach, this vision architecture belongs to a larger sensorimotor loop. This regulation loop both creates and exploits dynamics properties to achieve a wide variety of target tracking and navigation objectives. Such a system is representative of numerous flexible and dynamic applications which are more and more encountered in embedded systems. In order to deal with all of the dynamic aspects of these applications, it appears necessary to embed a dedicated real-time operating system on the chip. The presence of this on-chip custom executive layer constitutes a major scientific obstacle in the traditional hardware and software design flows. Classical exploration and simulation tools are particularly inappropriate in this case. We detail in this paper the specific mechanisms necessary to build a high-level model of an embedded custom operating system able to manage such a real-time but flexible application. We also describe our executable RTOS model written in SystemC allowing an early simulation of our application on top of its specific scheduling layer. Based on this model, a methodology is discussed and results are given on the exploration and validation of a distributed platform adapted to this vision system.

Research on high availability architecture of SQL and NoSQL

Science.gov (United States)

Wang, Zhiguo; Wei, Zhiqiang; Liu, Hao

2017-03-01

With the advent of the era of big data, amount and importance of data have increased dramatically. SQL database develops in performance and scalability, but more and more companies tend to use NoSQL database as their databases, because NoSQL database has simpler data model and stronger extension capacity than SQL database. Almost all database designers including SQL database and NoSQL database aim to improve performance and ensure availability by reasonable architecture which can reduce the effects of software failures and hardware failures, so that they can provide better experiences for their customers. In this paper, I mainly discuss the architectures of MySQL, MongoDB, and Redis, which are high available and have been deployed in practical application environment, and design a hybrid architecture.

A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level

Directory of Open Access Journals (Sweden)

Anthony Barreteau

2012-01-01

Full Text Available Abstract models are necessary to assist system architects in the evaluation process of hardware/software architectures and to cope with the still increasing complexity of embedded systems. Efficient methods are required to create reliable models of system architectures and to allow early performance evaluation and fast exploration of the design space. In this paper, we present a specific transaction level modeling approach for performance evaluation of hardware/software architectures. This approach relies on a generic execution model that exhibits light modeling effort. Created models are used to evaluate by simulation expected processing and memory resources according to various architectures. The proposed execution model relies on a specific computation method defined to improve the simulation speed of transaction level models. The benefits of the proposed approach are highlighted through two case studies. The first case study is a didactic example illustrating the modeling approach. In this example, a simulation speed-up by a factor of 7,62 is achieved by using the proposed computation method. The second case study concerns the analysis of a communication receiver supporting part of the physical layer of the LTE protocol. In this case study, architecture exploration is led in order to improve the allocation of processing functions.

Transforming the existing building stock to high performed energy efficient and experienced architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

architectural heritage to energy efficiency and from architectural quality to sustainability. The first, second and third renovations are discussed from financial and sustainable view points. The role of housing related to the public energy supply system and the relation between the levels of renovation......The project Sustainable Renovation examines the challenge of the current and future architectural renovation of Danish suburbs which were designed in the period from 1945 to 1973. The research project takes its starting point in the perspectives of energy optimization and the fact that the building...

Design and Analysis of Architectures for Structural Health Monitoring Systems

Science.gov (United States)

Mukkamala, Ravi; Sixto, S. L. (Technical Monitor)

2002-01-01

During the two-year project period, we have worked on several aspects of Health Usage and Monitoring Systems for structural health monitoring. In particular, we have made contributions in the following areas. 1. Reference HUMS architecture: We developed a high-level architecture for health monitoring and usage systems (HUMS). The proposed reference architecture is shown. It is compatible with the Generic Open Architecture (GOA) proposed as a standard for avionics systems. 2. HUMS kernel: One of the critical layers of HUMS reference architecture is the HUMS kernel. We developed a detailed design of a kernel to implement the high level architecture.3. Prototype implementation of HUMS kernel: We have implemented a preliminary version of the HUMS kernel on a Unix platform.We have implemented both a centralized system version and a distributed version. 4. SCRAMNet and HUMS: SCRAMNet (Shared Common Random Access Memory Network) is a system that is found to be suitable to implement HUMS. For this reason, we have conducted a simulation study to determine its stability in handling the input data rates in HUMS. 5. Architectural specification.

High Data Rate Architecture (HiDRA)

Science.gov (United States)

Hylton, Alan; Raible, Daniel

2016-01-01

One of the greatest challenges in developing new space technology is in navigating the transition from ground based laboratory demonstration at Technology Readiness Level 6 (TRL-6) to conducting a prototype demonstration in space (TRL-7). This challenge is com- pounded by the relatively low availability of new spacecraft missions when compared with aeronautical craft to bridge this gap, leading to the general adoption of a low-risk stance by mission management to accept new, unproven technologies into the system. Also in consideration of risk, the limited selection and availability of proven space-grade components imparts a severe limitation on achieving high performance systems by current terrestrial technology standards. Finally from a space communications point of view the long duration characteristic of most missions imparts a major constraint on the entire space and ground network architecture, since any new technologies introduced into the system would have to be compliant with the duration of the currently deployed operational technologies, and in some cases may be limited by surrounding legacy capabilities. Beyond ensuring that the new technology is verified to function correctly and validated to meet the needs of the end users the formidable challenge then grows to additionally include: carefully timing the maturity path of the new technology to coincide with a feasible and accepting future mission so it flies before its relevancy has passed, utilizing a limited catalog of available components to their maximum potential to create meaningful and unprecedented new capabilities, designing and ensuring interoperability with aging space and ground infrastructures while simultaneously providing a growth path to the future. The International Space Station (ISS) is approaching 20 years of age. To keep the ISS relevant, technology upgrades are continuously taking place. Regarding communications, the state-of-the-art communication system upgrades underway include

Modeling Architectural Patterns’ Behavior Using Architectural Primitives

NARCIS (Netherlands)

Waqas Kamal, Ahmad; Avgeriou, Paris

2008-01-01

Architectural patterns have an impact on both the structure and the behavior of a system at the architecture design level. However, it is challenging to model patterns’ behavior in a systematic way because modeling languages do not provide the appropriate abstractions and because each pattern

The CMS High Level Trigger System

CERN Document Server

Afaq, A; Bauer, G; Biery, K; Boyer, V; Branson, J; Brett, A; Cano, E; Carboni, A; Cheung, H; Ciganek, M; Cittolin, S; Dagenhart, W; Erhan, S; Gigi, D; Glege, F; Gómez-Reino, Robert; Gulmini, M; Gutiérrez-Mlot, E; Gutleber, J; Jacobs, C; Kim, J C; Klute, M; Kowalkowski, J; Lipeles, E; Lopez-Perez, Juan Antonio; Maron, G; Meijers, F; Meschi, E; Moser, R; Murray, S; Oh, A; Orsini, L; Paus, C; Petrucci, A; Pieri, M; Pollet, L; Rácz, A; Sakulin, H; Sani, M; Schieferdecker, P; Schwick, C; Sexton-Kennedy, E; Sumorok, K; Suzuki, I; Tsirigkas, D; Varela, J

2007-01-01

The CMS Data Acquisition (DAQ) System relies on a purely software driven High Level Trigger (HLT) to reduce the full Level-1 accept rate of 100 kHz to approximately 100 Hz for archiving and later offline analysis. The HLT operates on the full information of events assembled by an event builder collecting detector data from the CMS front-end systems. The HLT software consists of a sequence of reconstruction and filtering modules executed on a farm of O(1000) CPUs built from commodity hardware. This paper presents the architecture of the CMS HLT, which integrates the CMS reconstruction framework in the online environment. The mechanisms to configure, control, and monitor the Filter Farm and the procedures to validate the filtering code within the DAQ environment are described.

Modelling of local/global architectures for second level trigger at the LHC experiment

International Nuclear Information System (INIS)

Hajduk, Z.; Iwanski, W.; Korecyl, K.; Strong, J.

1994-01-01

Different architectures of the second level triggering system for experiments on LHC have been simulated. The basic scheme was local/global system with distributed computing power. As a tool the authors have used the object-oriented MODSIM II language

Central system of Interlock of ITER, high integrity architecture

International Nuclear Information System (INIS)

Prieto, I.; Martinez, G.; Lopez, C.

2014-01-01

The CIS (Central Interlock System), along with the CODAC system and CSS (Central Safety System), form the central I and C systems of ITER. The CIS is responsible for implementing the core functions of protection (Central Interlock Functions) through different systems of plant (Plant Systems) within the overall strategy of investment protection for ITER. IBERDROLA supports engineering to define and develop the control architecture of CIS according to the stringent requirements of integrity, availability and response time. For functions with response times of the order of half a second is selected PLC High availability of industrial range. However, due to the nature of the machine itself, certain functions must be able to act under the millisecond, so it has had to develop a solution based on FPGA (Field Programmable Gate Array) capable of meeting the requirements architecture. In this article CIS architecture is described, as well as the process for the development and validation of the selected platforms. (Author)

Accuracy Test of Software Architecture Compliance Checking Tools – Test Instruction

NARCIS (Netherlands)

Pruijt, Leo; van der Werf, J.M.E.M.|info:eu-repo/dai/nl/36950674X; Brinkkemper., Sjaak|info:eu-repo/dai/nl/07500707X

2015-01-01

Software Architecture Compliance Checking (SACC) is an approach to verify conformance of implemented program code to high-level models of architectural design. Static SACC focuses on the modular software architecture and on the existence of rule violating dependencies between modules. Accurate tool

Architecture Governance: The Importance of Architecture Governance for Achieving Operationally Responsive Ground Systems

Science.gov (United States)

Kolar, Mike; Estefan, Jeff; Giovannoni, Brian; Barkley, Erik

2011-01-01

Topics covered (1) Why Governance and Why Now? (2) Characteristics of Architecture Governance (3) Strategic Elements (3a) Architectural Principles (3b) Architecture Board (3c) Architecture Compliance (4) Architecture Governance Infusion Process. Governance is concerned with decision making (i.e., setting directions, establishing standards and principles, and prioritizing investments). Architecture governance is the practice and orientation by which enterprise architectures and other architectures are managed and controlled at an enterprise-wide level

Analysis of facility needs level in architecture studio for students’ studio grades

Science.gov (United States)

Lubis, A. S.; Hamid, B.; Pane, I. F.; Marpaung, B. O. Y.

2018-03-01

Architects must be able to play an active role and contribute to the realization of a sustainable environment. Architectural education has inherited many education research used qualitative and quantitative methods. The data were gathered by conducting (a) observation,(b) interviews, (c) documentation, (d) literature study, and (e) Questionnaire. The gathered data were analyzed qualitatively to find out what equipment needed in the learning process in the Architecture Studio, USU. Questionnaires and Ms. Excel were used for the quantitative analysis. The tabulation of quantitative data would be correlated with the students’ studio grades. The result of the research showed that equipment with the highest level of needs was (1) drawing table, (2) Special room for each student, (3) Internet Network, (4) Air Conditioning, (5) Sufficient lighting.

Parallel Architectures and Parallel Algorithms for Integrated Vision Systems. Ph.D. Thesis

Science.gov (United States)

Choudhary, Alok Nidhi

1989-01-01

Computer vision is regarded as one of the most complex and computationally intensive problems. An integrated vision system (IVS) is a system that uses vision algorithms from all levels of processing to perform for a high level application (e.g., object recognition). An IVS normally involves algorithms from low level, intermediate level, and high level vision. Designing parallel architectures for vision systems is of tremendous interest to researchers. Several issues are addressed in parallel architectures and parallel algorithms for integrated vision systems.

Research of Smart Grid Cyber Architecture and Standards Deployment with High Adaptability for Security Monitoring

DEFF Research Database (Denmark)

Hu, Rui; Hu, Weihao; Chen, Zhe

2015-01-01

Security Monitoring is a critical function for smart grid. As a consequence of strongly relying on communication, cyber security must be guaranteed by the specific system. Otherwise, the DR signals and bidding information can be easily forged or intercepted. Customers’ privacy and safety may suffer...... huge losses. Although OpenADR specificationsprovide continuous, secure and reliable two-way communications in application level defined in ISO model, which is also an open architecture for security is adopted by it and no specific or proprietary technologies is restricted to OpenADR itself....... It is significant to develop a security monitoring system. This paper discussed the cyber architecture of smart grid with high adaptability for security monitoring. An adaptable structure with Demilitarized Zone (DMZ) is proposed. Focusing on this network structure, the rational utilization of standards...

The Software Architecture of the LHCb High Level Trigger

CERN Multimedia

CERN. Geneva

2012-01-01

The LHCb experiment is a spectrometer dedicated to the study of heavy flavor at the LHC. The rate of proton-proton collisions at the LHC is 15 MHz, but disk space limitations mean that only 3 kHz can be written to tape for offline processing. For this reason the LHCb data acquisition system -- trigger -- plays a key role in selecting signal events and rejecting background. In contrast to previous experiments at hadron colliders like for example CDF or D0, the bulk of the LHCb trigger is implemented in software and deployed on a farm of 20k parallel processing nodes. This system, called the High Level Trigger (HLT) is responsible for reducing the rate from the maximum at which the detector can be read out, 1.1 MHz, to the 3 kHz which can be processed offline,and has 20 ms in which to process and accept/reject each event. In order to minimize systematic uncertainties, the HLT was designed from the outset to reuse the offline reconstruction and selection code, and is based around multiple independent and redunda...

Architecture of high reliable control systems using complex software

International Nuclear Information System (INIS)

Tallec, M.

1990-01-01

The problems involved by the use of complex softwares in control systems that must insure a very high level of safety are examined. The first part makes a brief description of the prototype of PROSPER system. PROSPER means protection system for nuclear reactor with high performances. It has been installed on a French nuclear power plant at the beginnning of 1987 and has been continually working since that time. This prototype is realized on a multi-processors system. The processors communicate between themselves using interruptions and protected shared memories. On each processor, one or more protection algorithms are implemented. Those algorithms use data coming directly from the plant and, eventually, data computed by the other protection algorithms. Each processor makes its own acquisitions from the process and sends warning messages if some operating anomaly is detected. All algorithms are activated concurrently on an asynchronous way. The results are presented and the safety related problems are detailed. - The second part is about measurements' validation. First, we describe how the sensors' measurements will be used in a protection system. Then, a proposal for a method based on the techniques of artificial intelligence (expert systems and neural networks) is presented. - The last part is about the problems of architectures of systems including hardware and software: the different types of redundancies used till now and a proposition of a multi-processors architecture which uses an operating system that is able to manage several tasks implemented on different processors, which verifies the good operating of each of those tasks and of the related processors and which allows to carry on the operation of the system, even in a degraded manner when a failure has been detected are detailed [fr

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

CERN Document Server

Ahuja, Sumit; Shukla, Sandeep Kumar

2012-01-01

Low-power ASIC/FPGA based designs are important due to the need for extended battery life, reduced form factor, and lower packaging and cooling costs for electronic devices. These products require fast turnaround time because of the increasing demand for handheld electronic devices such as cell-phones, PDAs and high performance machines for data centers. To achieve short time to market, design flows must facilitate a much shortened time-to-product requirement. High-level modeling, architectural exploration and direct synthesis of design from high level description enable this design process. This book presents novel research techniques, algorithms,methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design. Integrates power estimation and reduction for high level synthesis, with low-power, high-level design; Shows spec...

Architectural switches in plant thylakoid membranes.

Science.gov (United States)

Kirchhoff, Helmut

2013-10-01

Recent progress in elucidating the structure of higher plants photosynthetic membranes provides a wealth of information. It allows generation of architectural models that reveal well-organized and complex arrangements not only on whole membrane level, but also on the supramolecular level. These arrangements are not static but highly responsive to the environment. Knowledge about the interdependency between dynamic structural features of the photosynthetic machinery and the functionality of energy conversion is central to understanding the plasticity of photosynthesis in an ever-changing environment. This review summarizes the architectural switches that are realized in thylakoid membranes of green plants.

Electrical system architecture having high voltage bus

Science.gov (United States)

Hoff, Brian Douglas [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL

2011-03-22

An electrical system architecture is disclosed. The architecture has a power source configured to generate a first power, and a first bus configured to receive the first power from the power source. The architecture also has a converter configured to receive the first power from the first bus and convert the first power to a second power, wherein a voltage of the second power is greater than a voltage of the first power, and a second bus configured to receive the second power from the converter. The architecture further has a power storage device configured to receive the second power from the second bus and deliver the second power to the second bus, a propulsion motor configured to receive the second power from the second bus, and an accessory motor configured to receive the second power from the second bus.

A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology

International Nuclear Information System (INIS)

Rota, L.; Vogelgesang, M.; Perez, L.E. Ardila; Caselle, M.; Chilingaryan, S.; Dritschler, T.; Zilio, N.; Kopmann, A.; Balzer, M.; Weber, M.

2016-01-01

Modern physics experiments produce multi-GB/s data rates. Fast data links and high performance computing stages are required for continuous data acquisition and processing. Because of their intrinsic parallelism and computational power, GPUs emerged as an ideal solution to process this data in high performance computing applications. In this paper we present a high-throughput platform based on direct FPGA-GPU communication. The architecture consists of a Direct Memory Access (DMA) engine compatible with the Xilinx PCI-Express core, a Linux driver for register access, and high- level software to manage direct memory transfers using AMD's DirectGMA technology. Measurements with a Gen3 x8 link show a throughput of 6.4 GB/s for transfers to GPU memory and 6.6 GB/s to system memory. We also assess the possibility of using the architecture in low latency systems: preliminary measurements show a round-trip latency as low as 1 μs for data transfers to system memory, while the additional latency introduced by OpenCL scheduling is the current limitation for GPU based systems. Our implementation is suitable for real-time DAQ system applications ranging from photon science and medical imaging to High Energy Physics (HEP) systems

Firewall Architectures for High-Speed Networks: Final Report

Energy Technology Data Exchange (ETDEWEB)

Errin W. Fulp

2007-08-20

Firewalls are a key component for securing networks that are vital to government agencies and private industry. They enforce a security policy by inspecting and filtering traffic arriving or departing from a secure network. While performing these critical security operations, firewalls must act transparent to legitimate users, with little or no effect on the perceived network performance (QoS). Packets must be inspected and compared against increasingly complex rule sets and tables, which is a time-consuming process. As a result, current firewall systems can introduce significant delays and are unable to maintain QoS guarantees. Furthermore, firewalls are susceptible to Denial of Service (DoS) attacks that merely overload/saturate the firewall with illegitimate traffic. Current firewall technology only offers a short-term solution that is not scalable; therefore, the \\textbf{objective of this DOE project was to develop new firewall optimization techniques and architectures} that meet these important challenges. Firewall optimization concerns decreasing the number of comparisons required per packet, which reduces processing time and delay. This is done by reorganizing policy rules via special sorting techniques that maintain the original policy integrity. This research is important since it applies to current and future firewall systems. Another method for increasing firewall performance is with new firewall designs. The architectures under investigation consist of multiple firewalls that collectively enforce a security policy. Our innovative distributed systems quickly divide traffic across different levels based on perceived threat, allowing traffic to be processed in parallel (beyond current firewall sandwich technology). Traffic deemed safe is transmitted to the secure network, while remaining traffic is forwarded to lower levels for further examination. The result of this divide-and-conquer strategy is lower delays for legitimate traffic, higher throughput

NSLS-II High Level Application Infrastructure And Client API Design

International Nuclear Information System (INIS)

Shen, G.; Yang, L.; Shroff, K.

2011-01-01

The beam commissioning software framework of NSLS-II project adopts a client/server based architecture to replace the more traditional monolithic high level application approach. It is an open structure platform, and we try to provide a narrow API set for client application. With this narrow API, existing applications developed in different language under different architecture could be ported to our platform with small modification. This paper describes system infrastructure design, client API and system integration, and latest progress. As a new 3rd generation synchrotron light source with ultra low emittance, there are new requirements and challenges to control and manipulate the beam. A use case study and a theoretical analysis have been performed to clarify requirements and challenges to the high level applications (HLA) software environment. To satisfy those requirements and challenges, adequate system architecture of the software framework is critical for beam commissioning, study and operation. The existing traditional approaches are self-consistent, and monolithic. Some of them have adopted a concept of middle layer to separate low level hardware processing from numerical algorithm computing, physics modelling, data manipulating, plotting, and error handling. However, none of the existing approaches can satisfy the requirement. A new design has been proposed by introducing service oriented architecture technology. The HLA is combination of tools for accelerator physicists and operators, which is same as traditional approach. In NSLS-II, they include monitoring applications and control routines. Scripting environment is very important for the later part of HLA and both parts are designed based on a common set of APIs. Physicists and operators are users of these APIs, while control system engineers and a few accelerator physicists are the developers of these APIs. With our Client/Server mode based approach, we leave how to retrieve information to the

Biosensor Architectures for High-Fidelity Reporting of Cellular Signaling

Science.gov (United States)

Dushek, Omer; Lellouch, Annemarie C.; Vaux, David J.; Shahrezaei, Vahid

2014-01-01

Understanding mechanisms of information processing in cellular signaling networks requires quantitative measurements of protein activities in living cells. Biosensors are molecular probes that have been developed to directly track the activity of specific signaling proteins and their use is revolutionizing our understanding of signal transduction. The use of biosensors relies on the assumption that their activity is linearly proportional to the activity of the signaling protein they have been engineered to track. We use mechanistic mathematical models of common biosensor architectures (single-chain FRET-based biosensors), which include both intramolecular and intermolecular reactions, to study the validity of the linearity assumption. As a result of the classic mechanism of zero-order ultrasensitivity, we find that biosensor activity can be highly nonlinear so that small changes in signaling protein activity can give rise to large changes in biosensor activity and vice versa. This nonlinearity is abolished in architectures that favor the formation of biosensor oligomers, but oligomeric biosensors produce complicated FRET states. Based on this finding, we show that high-fidelity reporting is possible when a single-chain intermolecular biosensor is used that cannot undergo intramolecular reactions and is restricted to forming dimers. We provide phase diagrams that compare various trade-offs, including observer effects, which further highlight the utility of biosensor architectures that favor intermolecular over intramolecular binding. We discuss challenges in calibrating and constructing biosensors and highlight the utility of mathematical models in designing novel probes for cellular signaling. PMID:25099816

A high-throughput two channel discrete wavelet transform architecture for the JPEG2000 standard

Science.gov (United States)

Badakhshannoory, Hossein; Hashemi, Mahmoud R.; Aminlou, Alireza; Fatemi, Omid

2005-07-01

The Discrete Wavelet Transform (DWT) is increasingly recognized in image and video compression standards, as indicated by its use in JPEG2000. The lifting scheme algorithm is an alternative DWT implementation that has a lower computational complexity and reduced resource requirement. In the JPEG2000 standard two lifting scheme based filter banks are introduced: the 5/3 and 9/7. In this paper a high throughput, two channel DWT architecture for both of the JPEG2000 DWT filters is presented. The proposed pipelined architecture has two separate input channels that process the incoming samples simultaneously with minimum memory requirement for each channel. The architecture had been implemented in VHDL and synthesized on a Xilinx Virtex2 XCV1000. The proposed architecture applies DWT on a 2K by 1K image at 33 fps with a 75 MHZ clock frequency. This performance is achieved with 70% less resources than two independent single channel modules. The high throughput and reduced resource requirement has made this architecture the proper choice for real time applications such as Digital Cinema.

High Dynamic Range adaptive ΔΣ-based Focal Plane Array architecture

KAUST Repository

Yao, Shun; Kavusi, Sam; Salama, Khaled N.

2012-01-01

In this paper, an Adaptive Delta-Sigma based architecture for High Dynamic Range (HDR) Focal Plane Arrays is presented. The noise shaping effect of the Delta-Sigma modulation in the low end, and the distortion noise induced in the high end of Photo

Neural codes of seeing architectural styles

OpenAIRE

Choo, Heeyoung; Nasar, Jack L.; Nikrahei, Bardia; Walther, Dirk B.

2017-01-01

Images of iconic buildings, such as the CN Tower, instantly transport us to specific places, such as Toronto. Despite the substantial impact of architectural design on people′s visual experience of built environments, we know little about its neural representation in the human brain. In the present study, we have found patterns of neural activity associated with specific architectural styles in several high-level visual brain regions, but not in primary visual cortex (V1). This finding sugges...

Mapping robust parallel multigrid algorithms to scalable memory architectures

Science.gov (United States)

Overman, Andrea; Vanrosendale, John

1993-01-01

The convergence rate of standard multigrid algorithms degenerates on problems with stretched grids or anisotropic operators. The usual cure for this is the use of line or plane relaxation. However, multigrid algorithms based on line and plane relaxation have limited and awkward parallelism and are quite difficult to map effectively to highly parallel architectures. Newer multigrid algorithms that overcome anisotropy through the use of multiple coarse grids rather than relaxation are better suited to massively parallel architectures because they require only simple point-relaxation smoothers. In this paper, we look at the parallel implementation of a V-cycle multiple semicoarsened grid (MSG) algorithm on distributed-memory architectures such as the Intel iPSC/860 and Paragon computers. The MSG algorithms provide two levels of parallelism: parallelism within the relaxation or interpolation on each grid and across the grids on each multigrid level. Both levels of parallelism must be exploited to map these algorithms effectively to parallel architectures. This paper describes a mapping of an MSG algorithm to distributed-memory architectures that demonstrates how both levels of parallelism can be exploited. The result is a robust and effective multigrid algorithm for distributed-memory machines.

Achieving High Performance With TCP Over 40 GbE on NUMA Architectures for CMS Data Acquisition

Energy Technology Data Exchange (ETDEWEB)

Bawej, Tomasz; et al.

2014-01-01

TCP and the socket abstraction have barely changed over the last two decades, but at the network layer there has been a giant leap from a few megabits to 100 gigabits in bandwidth. At the same time, CPU architectures have evolved into the multicore era and applications are expected to make full use of all available resources. Applications in the data acquisition domain based on the standard socket library running in a Non-Uniform Memory Access (NUMA) architecture are unable to reach full efficiency and scalability without the software being adequately aware about the IRQ (Interrupt Request), CPU and memory affinities. During the first long shutdown of LHC, the CMS DAQ system is going to be upgraded for operation from 2015 onwards and a new software component has been designed and developed in the CMS online framework for transferring data with sockets. This software attempts to wrap the low-level socket library to ease higher-level programming with an API based on an asynchronous event driven model similar to the DAT uDAPL API. It is an event-based application with NUMA optimizations, that allows for a high throughput of data across a large distributed system. This paper describes the architecture, the technologies involved and the performance measurements of the software in the context of the CMS distributed event building.

Maritime Domain Awareness Architecture Management Hub Strategy

National Research Council Canada - National Science Library

2008-01-01

This document provides an initial high level strategy for carrying out the responsibilities of the national Maritime Domain Awareness Architecture Management Hub to deliver a standards based service...

Enterprise architecture patterns practical solutions for recurring IT-architecture problems

CERN Document Server

Perroud, Thierry

2013-01-01

Every enterprise architect faces similar problems when designing and governing the enterprise architecture of a medium to large enterprise. Design patterns are a well-established concept in software engineering, used to define universally applicable solution schemes. By applying this approach to enterprise architectures, recurring problems in the design and implementation of enterprise architectures can be solved over all layers, from the business layer to the application and data layer down to the technology layer.Inversini and Perroud describe patterns at the level of enterprise architecture

SecureCore Software Architecture: Trusted Path Application (TPA) Requirements

National Research Council Canada - National Science Library

Clark, Paul C; Irvine, Cynthia E; Levin, Timothy E; Nguyen, Thuy D; Vidas, Timothy M

2007-01-01

.... A high-level architecture is described to provide such features. In addition, a usage scenario is described for a potential use of the architecture, with emphasis on the trusted path, a non-spoofable user interface to the trusted components of the system. Detailed requirements for the trusted path are provided.

High dynamic range imaging sensors and architectures

CERN Document Server

Darmont, Arnaud

2013-01-01

Illumination is a crucial element in many applications, matching the luminance of the scene with the operational range of a camera. When luminance cannot be adequately controlled, a high dynamic range (HDR) imaging system may be necessary. These systems are being increasingly used in automotive on-board systems, road traffic monitoring, and other industrial, security, and military applications. This book provides readers with an intermediate discussion of HDR image sensors and techniques for industrial and non-industrial applications. It describes various sensor and pixel architectures capable

Architecture and Intelligentsia

Directory of Open Access Journals (Sweden)

Alexander Rappaport

2015-08-01

Full Text Available The article observes intellectual and cultural level of architecture and its important functions in social process. Historical analysis shows constant decline of intellectual level of profession, as a reaction on radical changes in its social functions and mass scale, leading to degrading of individual critical reflection and growing dependence of architecture to political and economical bureaucracy.

Architecture and Intelligentsia

OpenAIRE

Alexander Rappaport

2015-01-01

The article observes intellectual and cultural level of architecture and its important functions in social process. Historical analysis shows constant decline of intellectual level of profession, as a reaction on radical changes in its social functions and mass scale, leading to degrading of individual critical reflection and growing dependence of architecture to political and economical bureaucracy.

A high-speed DAQ framework for future high-level trigger and event building clusters

International Nuclear Information System (INIS)

Caselle, M.; Perez, L.E. Ardila; Balzer, M.; Dritschler, T.; Kopmann, A.; Mohr, H.; Rota, L.; Vogelgesang, M.; Weber, M.

2017-01-01

Modern data acquisition and trigger systems require a throughput of several GB/s and latencies of the order of microseconds. To satisfy such requirements, a heterogeneous readout system based on FPGA readout cards and GPU-based computing nodes coupled by InfiniBand has been developed. The incoming data from the back-end electronics is delivered directly into the internal memory of GPUs through a dedicated peer-to-peer PCIe communication. High performance DMA engines have been developed for direct communication between FPGAs and GPUs using 'DirectGMA (AMD)' and 'GPUDirect (NVIDIA)' technologies. The proposed infrastructure is a candidate for future generations of event building clusters, high-level trigger filter farms and low-level trigger system. In this paper the heterogeneous FPGA-GPU architecture will be presented and its performance be discussed.

The development of an open architecture control system for CBN high speed grinding

OpenAIRE

Silva, E. Jannone da; Biffi, M.; Oliveira, J. F. G. de

2004-01-01

The aim of this project is the development of an open architecture controlling (OAC) system to be applied in the high speed grinding process using CBN tools. Besides other features, the system will allow a new monitoring and controlling strategy, by the adoption of open architecture CNC combined with multi-sensors, a PC and third-party software. The OAC system will be implemented in a high speed CBN grinding machine, which is being developed in a partnership between the University of São Paul...

An Intelligent Agent based Architecture for Visual Data Mining

OpenAIRE

Hamdi Ellouzi; Hela Ltifi; Mounir Ben Ayed

2016-01-01

the aim of this paper is to present an intelligent architecture of Decision Support System (DSS) based on visual data mining. This architecture applies the multi-agent technology to facilitate the design and development of DSS in complex and dynamic environment. Multi-Agent Systems add a high level of abstraction. To validate the proposed architecture, it is implemented to develop a distributed visual data mining based DSS to predict nosocomial infectionsoccurrence in intensive care units. Th...

Space Architecture: The Role, Work and Aptitude

Science.gov (United States)

Griffin, Brand

2014-01-01

Space architecture has been an emerging discipline for at least 40 years. Has it arrived? Is space architecture a legitimate vocation or an avocation? If it leads to a job, what do employers want? In 2002, NASA Headquarters created a management position for a space architect whose job was to "lead the development of strategic architectures and identify high level requirements for systems that will accomplish the Nation's space exploration vision." This is a good job description with responsibility at the right level in NASA, but unfortunately, the office was discontinued two years later. Even though there is no accredited academic program or professional licensing for space architecture, there is a community of practitioners. They are civil servants, contractors and academicians supporting International Space Station and space exploration programs. In various ways, space architects currently contribute to human spaceflight, but there is a way for the discipline to be more effective in developing solutions to large scale complex problems. This paper organizes contributions from engineers, architects and psychologists into recommendations on the role of space architects in the organization, the process of creating and selecting options, and intrinsic personality traits including why they must have a high tolerance for ambiguity.

FPGA based compute nodes for high level triggering in PANDA

International Nuclear Information System (INIS)

Kuehn, W; Gilardi, C; Kirschner, D; Lang, J; Lange, S; Liu, M; Perez, T; Yang, S; Schmitt, L; Jin, D; Li, L; Liu, Z; Lu, Y; Wang, Q; Wei, S; Xu, H; Zhao, D; Korcyl, K; Otwinowski, J T; Salabura, P

2008-01-01

PANDA is a new universal detector for antiproton physics at the HESR facility at FAIR/GSI. The PANDA data acquisition system has to handle interaction rates of the order of 10 7 /s and data rates of several 100 Gb/s. FPGA based compute nodes with multi-Gb/s bandwidth capability using the ATCA architecture are designed to handle tasks such as event building, feature extraction and high level trigger processing. Data connectivity is provided via optical links as well as multiple Gb Ethernet ports. The boards will support trigger algorithms such us pattern recognition for RICH detectors, EM shower analysis, fast tracking algorithms and global event characterization. Besides VHDL, high level C-like hardware description languages will be considered to implement the firmware

A Heterogeneous Quantum Computer Architecture

NARCIS (Netherlands)

Fu, X.; Riesebos, L.; Lao, L.; Garcia Almudever, C.; Sebastiano, F.; Versluis, R.; Charbon, E.; Bertels, K.

2016-01-01

In this paper, we present a high level view of the heterogeneous quantum computer architecture as any future quantum computer will consist of both a classical and quantum computing part. The classical part is needed for error correction as well as for the execution of algorithms that contain both

Prototype architecture for a VLSI level zero processing system. [Space Station Freedom

Science.gov (United States)

Shi, Jianfei; Grebowsky, Gerald J.; Horner, Ward P.; Chesney, James R.

1989-01-01

The prototype architecture and implementation of a high-speed level zero processing (LZP) system are discussed. Due to the new processing algorithm and VLSI technology, the prototype LZP system features compact size, low cost, high processing throughput, and easy maintainability and increased reliability. Though extensive control functions have been done by hardware, the programmability of processing tasks makes it possible to adapt the system to different data formats and processing requirements. It is noted that the LZP system can handle up to 8 virtual channels and 24 sources with combined data volume of 15 Gbytes per orbit. For greater demands, multiple LZP systems can be configured in parallel, each called a processing channel and assigned a subset of virtual channels. The telemetry data stream will be steered into different processing channels in accordance with their virtual channel IDs. This super system can cope with a virtually unlimited number of virtual channels and sources. In the near future, it is expected that new disk farms with data rate exceeding 150 Mbps will be available from commercial vendors due to the advance in disk drive technology.

Source-synchronous networks-on-chip circuit and architectural interconnect modeling

CERN Document Server

Mandal, Ayan; Mahapatra, Rabi

2014-01-01

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks.  The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized.  Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.   • Describes novel methods for high-speed network-on-chip (NoC) design; • Enables readers to understand NoC design from both circuit and architectural levels; • Provides circuit-level details of the NoC (including clocking, router design), along with a high-speed, resonant clocking style which is used in the NoC; • Includes architectural simulations of the NoC, demonstrating significantly superior performance over the state-of-the-art.

SABRE: a bio-inspired fault-tolerant electronic architecture

International Nuclear Information System (INIS)

Bremner, P; Samie, M; Dragffy, G; Pipe, A G; Liu, Y; Tempesti, G; Timmis, J; Tyrrell, A M

2013-01-01

As electronic devices become increasingly complex, ensuring their reliable, fault-free operation is becoming correspondingly more challenging. It can be observed that, in spite of their complexity, biological systems are highly reliable and fault tolerant. Hence, we are motivated to take inspiration for biological systems in the design of electronic ones. In SABRE (self-healing cellular architectures for biologically inspired highly reliable electronic systems), we have designed a bio-inspired fault-tolerant hierarchical architecture for this purpose. As in biology, the foundation for the whole system is cellular in nature, with each cell able to detect faults in its operation and trigger intra-cellular or extra-cellular repair as required. At the next level in the hierarchy, arrays of cells are configured and controlled as function units in a transport triggered architecture (TTA), which is able to perform partial-dynamic reconfiguration to rectify problems that cannot be solved at the cellular level. Each TTA is, in turn, part of a larger multi-processor system which employs coarser grain reconfiguration to tolerate faults that cause a processor to fail. In this paper, we describe the details of operation of each layer of the SABRE hierarchy, and how these layers interact to provide a high systemic level of fault tolerance. (paper)

Enterprise architecture evaluation using architecture framework and UML stereotypes

Directory of Open Access Journals (Sweden)

Narges Shahi

2014-08-01

Full Text Available There is an increasing need for enterprise architecture in numerous organizations with complicated systems with various processes. Support for information technology, organizational units whose elements maintain complex relationships increases. Enterprise architecture is so effective that its non-use in organizations is regarded as their institutional inability in efficient information technology management. The enterprise architecture process generally consists of three phases including strategic programing of information technology, enterprise architecture programing and enterprise architecture implementation. Each phase must be implemented sequentially and one single flaw in each phase may result in a flaw in the whole architecture and, consequently, in extra costs and time. If a model is mapped for the issue and then it is evaluated before enterprise architecture implementation in the second phase, the possible flaws in implementation process are prevented. In this study, the processes of enterprise architecture are illustrated through UML diagrams, and the architecture is evaluated in programming phase through transforming the UML diagrams to Petri nets. The results indicate that the high costs of the implementation phase will be reduced.

NEBULAS A High Performance Data-Driven Event-Building Architecture based on an Asynchronous Self-Routing Packet-Switching Network

CERN Multimedia

Costa, M; Letheren, M; Djidi, K; Gustafsson, L; Lazraq, T; Minerskjold, M; Tenhunen, H; Manabe, A; Nomachi, M; Watase, Y

2002-01-01

RD31 : The project is evaluating a new approach to event building for level-two and level-three processor farms at high rate experiments. It is based on the use of commercial switching fabrics to replace the traditional bus-based architectures used in most previous data acquisition sytems. Switching fabrics permit the construction of parallel, expandable, hardware-driven event builders that can deliver higher aggregate throughput than the bus-based architectures. A standard industrial switching fabric technology is being evaluated. It is based on Asynchronous Transfer Mode (ATM) packet-switching network technology. Commercial, expandable ATM switching fabrics and processor interfaces, now being developed for the future Broadband ISDN infrastructure, could form the basis of an implementation. The goals of the project are to demonstrate the viability of this approach, to evaluate the trade-offs involved in make versus buy options, to study the interfacing of the physics frontend data buffers to such a fabric, a...

High-Resolution Spore Coat Architecture and Assembly of Bacillus Spores

Energy Technology Data Exchange (ETDEWEB)

Malkin, A J; Elhadj, S; Plomp, M

2011-03-14

Elucidating the molecular architecture of bacterial and cellular surfaces and its structural dynamics is essential to understanding mechanisms of pathogenesis, immune response, physicochemical interactions, environmental resistance, and provide the means for identifying spore formulation and processing attributes. I will discuss the application of in vitro atomic force microscopy (AFM) for studies of high-resolution coat architecture and assembly of several Bacillus spore species. We have demonstrated that bacterial spore coat structures are phylogenetically and growth medium determined. We have proposed that strikingly different species-dependent coat structures of bacterial spore species are a consequence of sporulation media-dependent nucleation and crystallization mechanisms that regulate the assembly of the outer spore coat. Spore coat layers were found to exhibit screw dislocations and two-dimensional nuclei typically observed on inorganic and macromolecular crystals. This presents the first case of non-mineral crystal growth patterns being revealed for a biological organism, which provides an unexpected example of nature exploiting fundamental materials science mechanisms for the morphogenetic control of biological ultrastructures. We have discovered and validated, distinctive formulation-specific high-resolution structural spore coat and dimensional signatures of B. anthracis spores (Sterne strain) grown in different formulation condition. We further demonstrated that measurement of the dimensional characteristics of B. anthracis spores provides formulation classification and sample matching with high sensitivity and specificity. I will present data on the development of an AFM-based immunolabeling technique for the proteomic mapping of macromolecular structures on the B. anthracis surfaces. These studies demonstrate that AFM can probe microbial surface architecture, environmental dynamics and the life cycle of bacterial and cellular systems at near

Optical transmission of low-level signals with high dynamic range using the optically-coupled current-mirror architecture

International Nuclear Information System (INIS)

Camin, Daniel V.; Grassi, Valerio; De Donato, Cinzia

2007-01-01

In this paper we illustrate the application of a novel circuit architecture, the Optically-Coupled Current-Mirror (OCCM), conceived for the linear transmission of analogue signals via fibre optics. We installed 880 OCCMs in the PMTs of the first two telescopes of the cosmic-ray experiment Pierre Auger. The Pierre Auger Observatory (PAO) has been designed to increase the statistics of cosmic-rays with energies above 10 18 eV. Two different techniques have been adopted: the Surface Detector (SD) modules that comprise 1600 tanks spaced each other by 1.5km within an area of 3000km 2 . On the other side there are four buildings, the Optical Stations (OS), in which six telescopes are installed in each one of the four OS, at the periphery of the site, looking inwards. The telescopes are sensitive to the UV light created at the moment a high-energy shower develops in the atmosphere and is within the field-of-view (FOV) of the telescopes. The PAO is located in the Northern Patagonia, not far from the Cordillera de Los Andes, in Argentina. Both detector types, FD telescopes and SD modules, are sensitive to the UV light resulting from the interaction of high-energy particles and the nitrogen molecules in the atmosphere. The UV-sensitive telescopes operate only at night when the sky is completely dark. Otherwise, the light collected by the telescopes may give origin to severe damage in particular if those telescopes point at twilight or to artificial light sources. The duty cycle of the telescope's operation is therefore limited to about 10% or slightly more than that, if data are taken also when there is a partial presence of the Moon. The SD modules establish, independently of the telescopes, the geometry of the event. At the same time a shower reconstruction is performed using the telescope's data, independently of the SD modules. Use of both sets of data, taken by the FD telescopes and by the SD modules, allows the hybrid reconstruction that significantly improves the data

A proposed scalable parallel open architecture data acquisition system for low to high rate experiments, test beams and all SSC detectors

International Nuclear Information System (INIS)

Barsotti, E.; Booth, A.; Bowden, M.; Swoboda, C.; Lockyer, N.; Vanberg, R.

1990-01-01

A new era of high-energy physics research is beginning requiring accelerators with much higher luminosities and interaction rates in order to discover new elementary particles. As a consequence, both orders of magnitude higher data rates from the detector and online processing power, well beyond the capabilities of current high energy physics data acquisition systems, are required. This paper describes a proposed new data acquisition system architecture which draws heavily from the communications industry, is totally parallel (i.e., without any bottlenecks), is capable of data rates of hundreds of Gigabytes per second from the detector and into an array of online processors (i.e., processor farm), and uses an open systems architecture to guarantee compatibility with future commercially available online processor farms. The main features of the proposed Scalable Parallel Open Architecture data acquisition system are standard interface ICs to detector subsystems wherever possible, fiber optic digital data transmission from the near-detector electronics, a self-routing parallel event builder, and the use of industry-supported and high-level language programmable processors in the proposed BCD system for both triggers and online filters. A brief status report of an ongoing project at Fermilab to build a prototype of the proposed data acquisition system architecture is given in the paper. The major component of the system, a self-routing parallel event builder, is described in detail

Functional language and data flow architectures

Science.gov (United States)

Ercegovac, M. D.; Patel, D. R.; Lang, T.

1983-01-01

This is a tutorial article about language and architecture approaches for highly concurrent computer systems based on the functional style of programming. The discussion concentrates on the basic aspects of functional languages, and sequencing models such as data-flow, demand-driven and reduction which are essential at the machine organization level. Several examples of highly concurrent machines are described.

Design requirements of communication architecture of SMART safety system

International Nuclear Information System (INIS)

Park, H. Y.; Kim, D. H.; Sin, Y. C.; Lee, J. Y.

2001-01-01

To develop the communication network architecture of safety system of SMART, the evaluation elements for reliability and performance factors are extracted from commercial networks and classified the required-level by importance. A predictable determinacy, status and fixed based architecture, separation and isolation from other systems, high reliability, verification and validation are introduced as the essential requirements of safety system communication network. Based on the suggested requirements, optical cable, star topology, synchronous transmission, point-to-point physical link, connection-oriented logical link, MAC (medium access control) with fixed allocation are selected as the design elements. The proposed architecture will be applied as basic communication network architecture of SMART safety system

Predefined three tier business intelligence architecture in healthcare enterprise.

Science.gov (United States)

Wang, Meimei

2013-04-01

Business Intelligence (BI) has caused extensive concerns and widespread use in gathering, processing and analyzing data and providing enterprise users the methodology to make decisions. Different from traditional BI architecture, this paper proposes a new BI architecture, Top-Down Scalable BI architecture with defining mechanism for enterprise decision making solutions and aims at establishing a rapid, consistent, and scalable multiple applications on multiple platforms of BI mechanism. The two opposite information flows in our BI architecture offer the merits of having the high level of organizational prospects and making full use of the existing resources. We also introduced the avg-bed-waiting-time factor to evaluate hospital care capacity.

CMS High Level Trigger Timing Measurements

International Nuclear Information System (INIS)

Richardson, Clint

2015-01-01

The two-level trigger system employed by CMS consists of the Level 1 (L1) Trigger, which is implemented using custom-built electronics, and the High Level Trigger (HLT), a farm of commercial CPUs running a streamlined version of the offline CMS reconstruction software. The operational L1 output rate of 100 kHz, together with the number of CPUs in the HLT farm, imposes a fundamental constraint on the amount of time available for the HLT to process events. Exceeding this limit impacts the experiment's ability to collect data efficiently. Hence, there is a critical need to characterize the performance of the HLT farm as well as the algorithms run prior to start up in order to ensure optimal data taking. Additional complications arise from the fact that the HLT farm consists of multiple generations of hardware and there can be subtleties in machine performance. We present our methods of measuring the timing performance of the CMS HLT, including the challenges of making such measurements. Results for the performance of various Intel Xeon architectures from 2009-2014 and different data taking scenarios are also presented. (paper)

Experiences in messaging middle-ware for high-level control applications

International Nuclear Information System (INIS)

Wanga, N.; Shasharina, S.; Matykiewicz, J.; Rooparani Pundaleeka

2012-01-01

Existing high-level applications in accelerator control and modeling systems leverage many different languages, tools and frameworks that do not inter-operate with one another. As a result, the accelerator control community is moving toward the proven Service-Oriented Architecture (SOA) approach to address the inter-operability challenges among heterogeneous high-level application modules. Such SOA approach enables developers to package various control subsystems and activities into 'services' with well-defined 'interfaces' and make leveraging heterogeneous high-level applications via flexible composition possible. Examples of such applications include presentation panel clients based on Control System Studio (CSS) and middle-layer applications such as model/data servers. This paper presents our experiences in developing a demonstrative high-level application environment using emerging messaging middle-ware standards. In particular, we utilize new features in EPICS v4 and other emerging standards such as Data Distribution Service (DDS) and Extensible Type Interface by the Object Management Group. We first briefly review examples we developed previously. We then present our current effort in integrating DDS into such a SOA environment for control systems. Specifically, we illustrate how we are integrating DDS into CSS and develop a Python DDS mapping. (authors)

A memory-array architecture for computer vision

Energy Technology Data Exchange (ETDEWEB)

Balsara, P.T.

1989-01-01

With the fast advances in the area of computer vision and robotics there is a growing need for machines that can understand images at a very high speed. A conventional von Neumann computer is not suited for this purpose because it takes a tremendous amount of time to solve most typical image processing problems. Exploiting the inherent parallelism present in various vision tasks can significantly reduce the processing time. Fortunately, parallelism is increasingly affordable as hardware gets cheaper. Thus it is now imperative to study computer vision in a parallel processing framework. The author should first design a computational structure which is well suited for a wide range of vision tasks and then develop parallel algorithms which can run efficiently on this structure. Recent advances in VLSI technology have led to several proposals for parallel architectures for computer vision. In this thesis he demonstrates that a memory array architecture with efficient local and global communication capabilities can be used for high speed execution of a wide range of computer vision tasks. This architecture, called the Access Constrained Memory Array Architecture (ACMAA), is efficient for VLSI implementation because of its modular structure, simple interconnect and limited global control. Several parallel vision algorithms have been designed for this architecture. The choice of vision problems demonstrates the versatility of ACMAA for a wide range of vision tasks. These algorithms were simulated on a high level ACMAA simulator running on the Intel iPSC/2 hypercube, a parallel architecture. The results of this simulation are compared with those of sequential algorithms running on a single hypercube node. Details of the ACMAA processor architecture are also presented.

Confabulation Based Real-time Anomaly Detection for Wide-area Surveillance Using Heterogeneous High Performance Computing Architecture

Science.gov (United States)

2015-06-01

CONFABULATION BASED REAL-TIME ANOMALY DETECTION FOR WIDE-AREA SURVEILLANCE USING HETEROGENEOUS HIGH PERFORMANCE COMPUTING ARCHITECTURE SYRACUSE...DETECTION FOR WIDE-AREA SURVEILLANCE USING HETEROGENEOUS HIGH PERFORMANCE COMPUTING ARCHITECTURE 5a. CONTRACT NUMBER FA8750-12-1-0251 5b. GRANT...processors including graphic processor units (GPUs) and Intel Xeon Phi processors. Experimental results showed significant speedups, which can enable

Architectural analysis of Douglas-fir forests

NARCIS (Netherlands)

Kuiper, L.C.

1994-01-01

The architecture of natural and semi-natural Douglas-fir forest ecosystems in western Washington and western Oregon was analyzed by various case-studies, to yield vital information needed for the design of new silvicultural systems with a high level of biodiversity, intended for low-input

Multiprocessor architecture: Synthesis and evaluation

Science.gov (United States)

Standley, Hilda M.

1990-01-01

Multiprocessor computed architecture evaluation for structural computations is the focus of the research effort described. Results obtained are expected to lead to more efficient use of existing architectures and to suggest designs for new, application specific, architectures. The brief descriptions given outline a number of related efforts directed toward this purpose. The difficulty is analyzing an existing architecture or in designing a new computer architecture lies in the fact that the performance of a particular architecture, within the context of a given application, is determined by a number of factors. These include, but are not limited to, the efficiency of the computation algorithm, the programming language and support environment, the quality of the program written in the programming language, the multiplicity of the processing elements, the characteristics of the individual processing elements, the interconnection network connecting processors and non-local memories, and the shared memory organization covering the spectrum from no shared memory (all local memory) to one global access memory. These performance determiners may be loosely classified as being software or hardware related. This distinction is not clear or even appropriate in many cases. The effect of the choice of algorithm is ignored by assuming that the algorithm is specified as given. Effort directed toward the removal of the effect of the programming language and program resulted in the design of a high-level parallel programming language. Two characteristics of the fundamental structure of the architecture (memory organization and interconnection network) are examined.

Architecture design of the application software for the low-level RF control system of the free-electron laser at Hamburg

International Nuclear Information System (INIS)

Geng, Z.; Ayvazyan, V.; Simrock, S.

2012-01-01

The superconducting linear accelerator of the Free-Electron Laser at Hamburg (FLASH) provides high performance electron beams to the lasing system to generate synchrotron radiation to various users. The Low-Level RF (LLRF) system is used to maintain the beam stabilities by stabilizing the RF field in the superconducting cavities with feedback and feed forward algorithms. The LLRF applications are sets of software to perform RF system model identification, control parameters optimization, exception detection and handling, so as to improve the precision, robustness and operability of the LLRF system. In order to implement the LLRF applications in the hardware with multiple distributed processors, an optimized architecture of the software is required for good understandability, maintainability and extendibility. This paper presents the design of the LLRF application software architecture based on the software engineering approach for FLASH. (authors)

A computer architecture for intelligent machines

Science.gov (United States)

Lefebvre, D. R.; Saridis, G. N.

1992-01-01

The theory of intelligent machines proposes a hierarchical organization for the functions of an autonomous robot based on the principle of increasing precision with decreasing intelligence. An analytic formulation of this theory using information-theoretic measures of uncertainty for each level of the intelligent machine has been developed. The authors present a computer architecture that implements the lower two levels of the intelligent machine. The architecture supports an event-driven programming paradigm that is independent of the underlying computer architecture and operating system. Execution-level controllers for motion and vision systems are briefly addressed, as well as the Petri net transducer software used to implement coordination-level functions. A case study illustrates how this computer architecture integrates real-time and higher-level control of manipulator and vision systems.

The design of a fast Level-1 track trigger for the high luminosity upgrade of ATLAS.

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00413032; The ATLAS collaboration

2016-01-01

The high/luminosity upgrade of the LHC will increase the rate of the proton-proton collisions by approximately a factor of 5 with respect to the initial LHC-design. The ATLAS experiment will upgrade consequently, increasing its robustness and selectivity in the expected high radiation environment. In particular, the earliest, hardware based, ATLAS trigger stage ("Level 1") will require higher rejection power, still maintaining efficient selection on many various physics signatures. The key ingredient is the possibility of extracting tracking information from the brand new full-silicon detector and use it for the process. While fascinating, this solution poses a big challenge in the choice of the architecture, due to the reduced latency available at this trigger level (few tens of micro-seconds) and the high expected working rates (order of MHz). In this paper, we review the design possibilities of such a system in a potential new trigger and readout architecture, and present the performance resulting from a d...

FPGA Implementation of Blue Whale Calls Classifier Using High-Level Programming Tool

Directory of Open Access Journals (Sweden)

Mohammed Bahoura

2016-02-01

Full Text Available In this paper, we propose a hardware-based architecture for automatic blue whale calls classification based on short-time Fourier transform and multilayer perceptron neural network. The proposed architecture is implemented on field programmable gate array (FPGA using Xilinx System Generator (XSG and the Nexys-4 Artix-7 FPGA board. This high-level programming tool allows us to design, simulate and execute the compiled design in Matlab/Simulink environment quickly and easily. Intermediate signals obtained at various steps of the proposed system are presented for typical blue whale calls. Classification performances based on the fixed-point XSG/FPGA implementation are compared to those obtained by the floating-point Matlab simulation, using a representative database of the blue whale calls.

System architecture for high speed reconstruction in time-of-flight positron tomography

International Nuclear Information System (INIS)

Campagnolo, R.E.; Bouvier, A.; Chabanas, L.; Robert, C.

1985-06-01

A new generation of Time Of Flight (TOF) positron tomograph with high resolution and high count rate capabilities is under development in our group. After a short recall of the data acquisition process and image reconstruction in a TOF PET camera, we present the data acquisition system which achieves a data transfer rate of 0.8 mega events per second or more if necessary in list mode. We describe the reconstruction process based on a five stages pipe line architecture using home made processors. The expected performance with this architecture is a time reconstruction of six seconds per image (256x256 pixels) of one million events. This time could be reduce to 4 seconds. We conclude with the future developments of the system

2005 dossier: granite. Tome: architecture and management of the geologic disposal; Dossier 2005: granite. Tome architecture et gestion du stockage geologique

Energy Technology Data Exchange (ETDEWEB)

NONE

2005-07-01

This document makes a status of the researches carried out by the French national agency of radioactive wastes (ANDRA) about the geologic disposal of high-level and long-lived radioactive wastes in granite formations. Content: 1 - Approach of the study: main steps since the December 30, 1991 law, ANDRA's research program on disposal in granitic formations; 2 - high-level and long-lived (HLLL) wastes: production scenarios, waste categories, inventory model; 3 - disposal facility design in granitic environment: definition of the geologic disposal functions, the granitic material, general facility design options; 4 - general architecture of a disposal facility in granitic environment: surface facilities, underground facilities, disposal process, operational safety; 5 - B-type wastes disposal area: primary containers of B-type wastes, safety options, concrete containers, disposal alveoles, architecture of the B-type wastes disposal area, disposal process and feasibility aspects, functions of disposal components with time; 6 - C-type wastes disposal area: C-type wastes primary containers, safety options, super-containers, disposal alveoles, architecture of the C-type wastes disposal area, disposal process in a reversibility logics, functions of disposal components with time; 7 - spent fuels disposal area: spent fuel assemblies, safety options, spent fuel containers, disposal alveoles, architecture of the spent fuel disposal area, disposal process in a reversibility logics, functions of disposal components with time; 8 - conclusions: suitability of the architecture with various types of French granites, strong design, reversibility taken into consideration. (J.S.)

High Performance Systolic Array Core Architecture Design for DNA Sequencer

Directory of Open Access Journals (Sweden)

Saiful Nurdin Dayana

2018-01-01

Full Text Available This paper presents a high performance systolic array (SA core architecture design for Deoxyribonucleic Acid (DNA sequencer. The core implements the affine gap penalty score Smith-Waterman (SW algorithm. This time-consuming local alignment algorithm guarantees optimal alignment between DNA sequences, but it requires quadratic computation time when performed on standard desktop computers. The use of linear SA decreases the time complexity from quadratic to linear. In addition, with the exponential growth of DNA databases, the SA architecture is used to overcome the timing issue. In this work, the SW algorithm has been captured using Verilog Hardware Description Language (HDL and simulated using Xilinx ISIM simulator. The proposed design has been implemented in Xilinx Virtex -6 Field Programmable Gate Array (FPGA and improved in the core area by 90% reduction.

Architecture of a Level 1 Track Trigger for the CMS Experiment

CERN Document Server

Heintz, Ulrich

2010-01-01

The luminosity goal for the Super-LHC is 1035/cm2/s. At this luminosity the number of proton-proton interactions in each beam crossing will be in the hundreds. This will stress many components of the CMS detector. One system that has to be upgraded is the trigger system. To keep the rate at which the level 1 trigger fires manageable, information from the tracker has to be integrated into the level 1 trigger. Current design proposals foresee tracking detectors that perform on-detector filtering to reject hits from low-momentum particles. In order to build a trigger system, the filtered hit data from different layers and sectors of the tracker will have to be transmitted off the detector and brought together in a logic processor that generates trigger tracks within the time window allowed by the level 1 trigger latency. I will describe a possible architecture for the off-detector logic that accomplishes this goal.

The architecture of a video image processor for the space station

Science.gov (United States)

Yalamanchili, S.; Lee, D.; Fritze, K.; Carpenter, T.; Hoyme, K.; Murray, N.

1987-01-01

The architecture of a video image processor for space station applications is described. The architecture was derived from a study of the requirements of algorithms that are necessary to produce the desired functionality of many of these applications. Architectural options were selected based on a simulation of the execution of these algorithms on various architectural organizations. A great deal of emphasis was placed on the ability of the system to evolve and grow over the lifetime of the space station. The result is a hierarchical parallel architecture that is characterized by high level language programmability, modularity, extensibility and can meet the required performance goals.

Software architecture as a set of architectural design decisions

NARCIS (Netherlands)

Jansen, Anton; Bosch, Jan; Nord, R; Medvidovic, N; Krikhaar, R; Khrhaar, R; Stafford, J; Bosch, J

2006-01-01

Software architectures have high costs for change, are complex, and erode during evolution. We believe these problems are partially due to knowledge vaporization. Currently, almost all the knowledge and information about the design decisions the architecture is based on are implicitly embedded in

A computer architecture for the implementation of SDL

Energy Technology Data Exchange (ETDEWEB)

Crutcher, L A

1989-01-01

Finite State Machines (FSMs) are a part of well-established automata theory. The FSM model is useful in all stages of system design, from abstract specification to implementation in hardware. The FSM model has been studied as a technique in software design, and the implementation of this type of software considered. The Specification and Description Language (SDL) has been considered in detail as an example of this approach. The complexity of systems designed using SDL warrants their implementation through a programmed computer. A benchmark for the implementation of SDL has been established and the performance of SDL on three particular computer architectures investigated. Performance is judged according to this benchmark and also the ease of implementation, which is related to the confidence of a correct implementation. The implementation on 68000s and transputers is considered as representative of established and state-of-the-art microprocessors respectively. A third architecture that uses a processor that has been proposed specifically for the implementation of SDL is considered as a high-level custom architecture. Analysis and measurements of the benchmark on each architecture indicates that the execution time of SDL decreases by an order of magnitude from the 68000 to the transputer to the custom architecture. The ease of implementation is also greater when the execution time is reduced. A study of some real applications of SDL indicates that the benchmark figures are reflected in user-oriented measures of performance such as data throughput and response time. A high-level architecture such as the one proposed here for SDL can provide benefits in terms of execution time and correctness.

An Architecture for Open Learning Management Systems

NARCIS (Netherlands)

Avgeriou, Paris; Retalis, Simos; Skordalakis, Manolis

2003-01-01

There exists an urgent demand on defining architectures for Learning Management Systems, so that high-level frameworks for understanding these systems can be discovered, and quality attributes like portability, interoperability, reusability and modifiability can be achieved. In this paper we propose

Optical transmission of low-level signals with high dynamic range using the optically-coupled current-mirror architecture

Energy Technology Data Exchange (ETDEWEB)

Camin, Daniel V. [Dipartimento di Fisica dell' Universita degli Studi di Milano and INFN, Milan (Italy)]. E-mail: Daniel.Victor.Camin@mi.infn.it; Grassi, Valerio [Dipartimento di Fisica dell' Universita degli Studi di Milano and INFN, Milan (Italy); De Donato, Cinzia [Dipartimento di Fisica dell' Universita degli Studi di Milano and INFN, Milan (Italy)

2007-03-01

In this paper we illustrate the application of a novel circuit architecture, the Optically-Coupled Current-Mirror (OCCM), conceived for the linear transmission of analogue signals via fibre optics. We installed 880 OCCMs in the PMTs of the first two telescopes of the cosmic-ray experiment Pierre Auger. The Pierre Auger Observatory (PAO) has been designed to increase the statistics of cosmic-rays with energies above 10{sup 18}eV. Two different techniques have been adopted: the Surface Detector (SD) modules that comprise 1600 tanks spaced each other by 1.5km within an area of 3000km{sup 2}. On the other side there are four buildings, the Optical Stations (OS), in which six telescopes are installed in each one of the four OS, at the periphery of the site, looking inwards. The telescopes are sensitive to the UV light created at the moment a high-energy shower develops in the atmosphere and is within the field-of-view (FOV) of the telescopes. The PAO is located in the Northern Patagonia, not far from the Cordillera de Los Andes, in Argentina. Both detector types, FD telescopes and SD modules, are sensitive to the UV light resulting from the interaction of high-energy particles and the nitrogen molecules in the atmosphere. The UV-sensitive telescopes operate only at night when the sky is completely dark. Otherwise, the light collected by the telescopes may give origin to severe damage in particular if those telescopes point at twilight or to artificial light sources. The duty cycle of the telescope's operation is therefore limited to about 10% or slightly more than that, if data are taken also when there is a partial presence of the Moon. The SD modules establish, independently of the telescopes, the geometry of the event. At the same time a shower reconstruction is performed using the telescope's data, independently of the SD modules. Use of both sets of data, taken by the FD telescopes and by the SD modules, allows the hybrid reconstruction that significantly

Implementation of MP_Lite for the VI Architecture

Energy Technology Data Exchange (ETDEWEB)

Chen, Weiyi [Iowa State Univ., Ames, IA (United States)

2001-01-01

MP_Lite is a light weight message-passing library designed to deliver the maximum performance to applications in a portable and user friendly manner. The Virtual Interface (VI) architecture is a user-level communication protocol that bypasses the operating system to provide much better performance than traditional network architectures. By combining the high efficiency of MP_Lite and high performance of the VI architecture, they are able to implement a high performance message-passing library that has much lower latency and better throughput. The design and implementation of MP_Lite for M-VIA, which is a modular implementation of the VI architecture on Linux, is discussed in this thesis. By using the eager protocol for sending short messages, MP_Lite M-VIA has much lower latency on both Fast Ethernet and Gigabit Ethernet. The handshake protocol and RDMA mechanism provides double the throughput that MPICH can deliver for long messages. MP_Lite M-VIA also has the ability to channel-bonding multiple network interface cards to increase the potential bandwidth between nodes. Using multiple Fast Ethernet cards can double or even triple the maximum throughput without increasing the cost of a PC cluster greatly.

Architectural education and its role in teaching of art education in the second level of elementary schools

OpenAIRE

PRAŽANOVÁ, Markéta

2011-01-01

The goal of the work was effort to find reasons why to include the education in the field of architecture and environmental culture in teaching systems, mainly in the second level of elementary schools. I tried to apply these reasons into the topics of architecture training in the lessons of art education. The research among nearly 250 pupils of the 8.and 9.class of the elementary schools in big and small towns and last but not least also the discussion with the teachers of art education at e...

Language-based support for service oriented architectures

DEFF Research Database (Denmark)

Giambiagi, Pablo; Owe, Olaf; Ravn, Anders Peter

2006-01-01

The fast evolution of the Internet has popularized service-oriented architectures (SOA) with their promise of dynamic IT-supported inter-business collaborations. Yet this popularity does not reflect on the number of actual applications using the architecture. Programming models in use today make...... a poor match for the distributed, loosely-coupled, document-based nature of SOA. The gap is actually increasing. For example, interoperability between different organizations, requires contracts to reduce risks. Thus, high-level models of contracts are making their way into service-oriented architectures......, but application developers are still left to their own devices when it comes to writing code that will comply with a contract. This paper surveys existing and future directions regarding language-based solutions to the above problem....

Software Architecture Reconstruction Method, a Survey

OpenAIRE

Zainab Nayyar; Nazish Rafique

2014-01-01

Architecture reconstruction belongs to a reverse engineering process, in which we move from code to architecture level for reconstructing architecture. Software architectures are the blue prints of projects which depict the external overview of the software system. Mostly maintenance and testing cause the software to deviate from its original architecture, because sometimes for enhancing the functionality of a system the software deviates from its documented specifications, some new modules a...

Auxins differentially regulate root system architecture and cell cycle protein levels in maize seedlings.

Science.gov (United States)

Martínez-de la Cruz, Enrique; García-Ramírez, Elpidio; Vázquez-Ramos, Jorge M; Reyes de la Cruz, Homero; López-Bucio, José

2015-03-15

Maize (Zea mays) root system architecture has a complex organization, with adventitious and lateral roots determining its overall absorptive capacity. To generate basic information about the earlier stages of root development, we compared the post-embryonic growth of maize seedlings germinated in water-embedded cotton beds with that of plants obtained from embryonic axes cultivated in liquid medium. In addition, the effect of four different auxins, namely indole-3-acetic acid (IAA), 1-naphthaleneacetic acid (NAA), indole-3-butyric acid (IBA) and 2,4-dichlorophenoxyacetic acid (2,4-D) on root architecture and levels of the heat shock protein HSP101 and the cell cycle proteins CKS1, CYCA1 and CDKA1 were analyzed. Our data show that during the first days after germination, maize seedlings develop several root types with a simultaneous and/or continuous growth. The post-embryonic root development started with the formation of the primary root (PR) and seminal scutellar roots (SSR) and then continued with the formation of adventitious crown roots (CR), brace roots (BR) and lateral roots (LR). Auxins affected root architecture in a dose-response fashion; whereas NAA and IBA mostly stimulated crown root formation, 2,4-D showed a strong repressing effect on growth. The levels of HSP101, CKS1, CYCA1 and CDKA in root and leaf tissues were differentially affected by auxins and interestingly, HSP101 registered an auxin-inducible and root specific expression pattern. Taken together, our results show the timing of early branching patterns of maize and indicate that auxins regulate root development likely through modulation of the HSP101 and cell cycle proteins. Copyright © 2014 Elsevier GmbH. All rights reserved.

A high efficiency readout architecture for a large matrix of pixels.

Science.gov (United States)

Gabrielli, A.; Giorgi, F.; Villa, M.

2010-07-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

A high efficiency readout architecture for a large matrix of pixels

International Nuclear Information System (INIS)

Gabrielli, A; Giorgi, F; Villa, M

2010-01-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm 2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation

CERN Document Server

Palchaudhuri, Ayan

2016-01-01

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from us...

Cognitive Architectures and Autonomy: A Comparative Review

Science.gov (United States)

Thórisson, Kristinn; Helgasson, Helgi

2012-05-01

One of the original goals of artificial intelligence (AI) research was to create machines with very general cognitive capabilities and a relatively high level of autonomy. It has taken the field longer than many had expected to achieve even a fraction of this goal; the community has focused on building specific, targeted cognitive processes in isolation, and as of yet no system exists that integrates a broad range of capabilities or presents a general solution to autonomous acquisition of a large set of skills. Among the reasons for this are the highly limited machine learning and adaptation techniques available, and the inherent complexity of integrating numerous cognitive and learning capabilities in a coherent architecture. In this paper we review selected systems and architectures built expressly to address integrated skills. We highlight principles and features of these systems that seem promising for creating generally intelligent systems with some level of autonomy, and discuss them in the context of the development of future cognitive architectures. Autonomy is a key property for any system to be considered generally intelligent, in our view; we use this concept as an organizing principle for comparing the reviewed systems. Features that remain largely unaddressed in present research, but seem nevertheless necessary for such efforts to succeed, are also discussed.

Modelization of three-dimensional bone micro-architecture using Markov random fields with a multi-level clique system

International Nuclear Information System (INIS)

Lamotte, T.; Dinten, J.M.; Peyrin, F.

2004-01-01

Imaging trabecular bone micro-architecture in vivo non-invasively is still a challenging issue due to the complexity and small size of the structure. Thus, having a realistic 3D model of bone micro-architecture could be useful in image segmentation or image reconstruction. The goal of this work was to develop a 3D model of trabecular bone micro-architecture which can be seen as a problem of texture synthesis. We investigated a statistical model based on 3D Markov Random Fields (MRF's). Due to the Hammersley-Clifford theorem MRF's may equivalently be defined by an energy function on some set of cliques. In order to model 3D binary bone texture images (bone / background), we first used a particular well-known subclass of MRFs: the Ising model. The local energy function at some voxel depends on the closest neighbors of the voxels and on some parameters which control the shape and the proportion of bone. However, simulations yielded textures organized as connected clusters which even when varying the parameters did not approach the complexity of bone micro-architecture. Then, we introduced a second level of cliques taking into account neighbors located at some distance d from the site s and a new set of cliques allowing to control the plate thickness and spacing. The 3D bone texture images generated using the proposed model were analyzed using the usual bone-architecture quantification tools in order to relate the parameters of the MRF model to the characteristic parameters of bone micro-architecture (trabecular spacing, trabecular thickness, number of trabeculae...). (authors)

Microgrid cyber security reference architecture.

Energy Technology Data Exchange (ETDEWEB)

Veitch, Cynthia K.; Henry, Jordan M.; Richardson, Bryan T.; Hart, Derek H.

2013-07-01

This document describes a microgrid cyber security reference architecture. First, we present a high-level concept of operations for a microgrid, including operational modes, necessary power actors, and the communication protocols typically employed. We then describe our motivation for designing a secure microgrid; in particular, we provide general network and industrial control system (ICS)-speci c vulnerabilities, a threat model, information assurance compliance concerns, and design criteria for a microgrid control system network. Our design approach addresses these concerns by segmenting the microgrid control system network into enclaves, grouping enclaves into functional domains, and describing actor communication using data exchange attributes. We describe cyber actors that can help mitigate potential vulnerabilities, in addition to performance bene ts and vulnerability mitigation that may be realized using this reference architecture. To illustrate our design approach, we present a notional a microgrid control system network implementation, including types of communica- tion occurring on that network, example data exchange attributes for actors in the network, an example of how the network can be segmented to create enclaves and functional domains, and how cyber actors can be used to enforce network segmentation and provide the neces- sary level of security. Finally, we describe areas of focus for the further development of the reference architecture.

High-performance Sonitopia (Sonic Utopia): Hyper intelligent Material-based Architectural Systems for Acoustic Energy Harvesting

Science.gov (United States)

Heidari, F.; Mahdavinejad, M.

2017-08-01

The rate of energy consumption in all over the world, based on reliable statistics of international institutions such as the International Energy Agency (IEA) shows significant increase in energy demand in recent years. Periodical recorded data shows a continuous increasing trend in energy consumption especially in developed countries as well as recently emerged developing economies such as China and India. While air pollution and water contamination as results of high consumption of fossil energy resources might be consider as menace to civic ideals such as livability, conviviality and people-oriented cities. In other hand, automobile dependency, cars oriented design and other noisy activities in urban spaces consider as threats to urban life. Thus contemporary urban design and planning concentrates on rethinking about ecology of sound, reorganizing the soundscape of neighborhoods, redesigning the sonic order of urban space. It seems that contemporary architecture and planning trends through soundscape mapping look for sonitopia (Sonic + Utopia) This paper is to propose some interactive hyper intelligent material-based architectural systems for acoustic energy harvesting. The proposed architectural design system may be result in high-performance architecture and planning strategies for future cities. The ultimate aim of research is to develop a comprehensive system for acoustic energy harvesting which cover the aim of noise reduction as well as being in harmony with architectural design. The research methodology is based on a literature review as well as experimental and quasi-experimental strategies according the paradigm of designedly ways of doing and knowing. While architectural design has solution-focused essence in problem-solving process, the proposed systems had better be hyper intelligent rather than predefined procedures. Therefore, the steps of the inference mechanism of the research include: 1- understanding sonic energy and noise potentials as energy

QSPIN: A High Level Java API for Quantum Computing Experimentation

Science.gov (United States)

Barth, Tim

2017-01-01

QSPIN is a high level Java language API for experimentation in QC models used in the calculation of Ising spin glass ground states and related quadratic unconstrained binary optimization (QUBO) problems. The Java API is intended to facilitate research in advanced QC algorithms such as hybrid quantum-classical solvers, automatic selection of constraint and optimization parameters, and techniques for the correction and mitigation of model and solution errors. QSPIN includes high level solver objects tailored to the D-Wave quantum annealing architecture that implement hybrid quantum-classical algorithms [Booth et al.] for solving large problems on small quantum devices, elimination of variables via roof duality, and classical computing optimization methods such as GPU accelerated simulated annealing and tabu search for comparison. A test suite of documented NP-complete applications ranging from graph coloring, covering, and partitioning to integer programming and scheduling are provided to demonstrate current capabilities.

Instrumentation of a Level-1 Track Trigger in the ATLAS detector for the High Luminosity LHC

CERN Document Server

Boisvert, V; The ATLAS collaboration

2012-01-01

One of the main challenges in particle physics experiments at hadron colliders is to build detector systems that can take advantage of the future luminosity increase that will take place during the next decade. More than 200 simultaneous collisions will be recorded in a single event which will make the task to extract the interesting physics signatures harder than ever before. Not all events can be recorded hence a fast trigger system is required to select events that will be stored for further analysis. In the ATLAS experiment at the Large Hadron Collider (LHC) two different architectures for accommodating a level-1 track trigger are being investigated. The tracker has more readout channels than can be readout in time for the trigger decision. Both architectures aim for a data reduction of 10-100 in order to make readout of data possible in time for a level-1 trigger decision. In the first architecture the data reduction is achieved by reading out only parts of the detector seeded by a high rate pre-trigger ...

Aquaponic Growbed Water Level Control Using Fog Architecture

Science.gov (United States)

Asmi Romli, Muhamad; Daud, Shuhaizar; Raof, Rafikha Aliana A.; Awang Ahmad, Zahari; Mahrom, Norfadilla

2018-05-01

Integrated Multi-Trophic Aquaculture (IMTA) is an advance method of aquaculture which combines species with different nutritional needs to live together. The combination between aquatic live and crops is called aquaponics. Aquatic waste that normally removed by biofilters in normal aquaculture practice will be absorbed by crops in this practice. Aquaponics have few common components and growbed provide the best filtration function. In growbed a siphon act as mechanical structure to control water fill and flush process. Water to the growbed comes from fish tank with multiple flow speeds based on the pump specification and height. Too low speed and too fast flow rate can result in siphon malfunctionality. Pumps with variable speed do exist but it is costly. Majority of the aquaponic practitioner use single speed pump and try to match the pump speed with siphon operational requirement. In order to remove the matching requirement some control need to be introduced. Preliminarily this research will show the concept of fill-and-flush for multiple pumping speeds. The final aim of this paper is to show how water level management can be done to remove the speed dependency. The siphon tried to be controlled remotely since wireless data transmission quite practical in vast operational area. Fog architecture will be used in order to transmit sensor data and control command. This paper able to show the water able to be retented in the growbed within suggested duration by stopping the flow in once predefined level.

Non-Planar Nanotube and Wavy Architecture Based Ultra-High Performance Field Effect Transistors

KAUST Repository

Hanna, Amir

2016-11-01

This dissertation presents a unique concept for a device architecture named the nanotube (NT) architecture, which is capable of higher drive current compared to the Gate-All-Around Nanowire architecture when applied to heterostructure Tunnel Field Effect Transistors. Through the use of inner/outer core-shell gates, heterostructure NT TFET leverages physically larger tunneling area thus achieving higher driver current (ION) and saving real estates by eliminating arraying requirement. We discuss the physics of p-type (Silicon/Indium Arsenide) and n-type (Silicon/Germanium hetero-structure) based TFETs. Numerical TCAD simulations have shown that NT TFETs have 5x and 1.6 x higher normalized ION when compared to GAA NW TFET for p and n-type TFETs, respectively. This is due to the availability of larger tunneling junction cross sectional area, and lower Shockley-Reed-Hall recombination, while achieving sub 60 mV/dec performance for more than 5 orders of magnitude of drain current, thus enabling scaling down of Vdd to 0.5 V. This dissertation also introduces a novel thin-film-transistors architecture that is named the Wavy Channel (WC) architecture, which allows for extending device width by integrating vertical fin-like substrate corrugations giving rise to up to 50% larger device width, without occupying extra chip area. The novel architecture shows 2x higher output drive current per unit chip area when compared to conventional planar architecture. The current increase is attributed to both the extra device width and 50% enhancement in field effect mobility due to electrostatic gating effects. Digital circuits are fabricated to demonstrate the potential of integrating WC TFT based circuits. WC inverters have shown 2× the peak-to-peak output voltage for the same input, and ~2× the operation frequency of the planar inverters for the same peak-to-peak output voltage. WC NAND circuits have shown 2× higher peak-to-peak output voltage, and 3× lower high-to-low propagation

Building and measuring a high performance network architecture

Energy Technology Data Exchange (ETDEWEB)

Kramer, William T.C.; Toole, Timothy; Fisher, Chuck; Dugan, Jon; Wheeler, David; Wing, William R; Nickless, William; Goddard, Gregory; Corbato, Steven; Love, E. Paul; Daspit, Paul; Edwards, Hal; Mercer, Linden; Koester, David; Decina, Basil; Dart, Eli; Paul Reisinger, Paul; Kurihara, Riki; Zekauskas, Matthew J; Plesset, Eric; Wulf, Julie; Luce, Douglas; Rogers, James; Duncan, Rex; Mauth, Jeffery

2001-04-20

Once a year, the SC conferences present a unique opportunity to create and build one of the most complex and highest performance networks in the world. At SC2000, large-scale and complex local and wide area networking connections were demonstrated, including large-scale distributed applications running on different architectures. This project was designed to use the unique opportunity presented at SC2000 to create a testbed network environment and then use that network to demonstrate and evaluate high performance computational and communication applications. This testbed was designed to incorporate many interoperable systems and services and was designed for measurement from the very beginning. The end results were key insights into how to use novel, high performance networking technologies and to accumulate measurements that will give insights into the networks of the future.

The Ragnarok Architectural Software Configuration Management Model

DEFF Research Database (Denmark)

Christensen, Henrik Bærbak

1999-01-01

The architecture is the fundamental framework for designing and implementing large scale software, and the ability to trace and control its evolution is essential. However, many traditional software configuration management tools view 'software' merely as a set of files, not as an architecture....... This introduces an unfortunate impedance mismatch between the design domain (architecture level) and configuration management domain (file level.) This paper presents a software configuration management model that allows tight version control and configuration management of the architecture of a software system...

Deep Space Network information system architecture study

Science.gov (United States)

Beswick, C. A.; Markley, R. W. (Editor); Atkinson, D. J.; Cooper, L. P.; Tausworthe, R. C.; Masline, R. C.; Jenkins, J. S.; Crowe, R. A.; Thomas, J. L.; Stoloff, M. J.

1992-01-01

The purpose of this article is to describe an architecture for the DSN information system in the years 2000-2010 and to provide guidelines for its evolution during the 1990's. The study scope is defined to be from the front-end areas at the antennas to the end users (spacecraft teams, principal investigators, archival storage systems, and non-NASA partners). The architectural vision provides guidance for major DSN implementation efforts during the next decade. A strong motivation for the study is an expected dramatic improvement in information-systems technologies--i.e., computer processing, automation technology (including knowledge-based systems), networking and data transport, software and hardware engineering, and human-interface technology. The proposed Ground Information System has the following major features: unified architecture from the front-end area to the end user; open-systems standards to achieve interoperability; DSN production of level 0 data; delivery of level 0 data from the Deep Space Communications Complex, if desired; dedicated telemetry processors for each receiver; security against unauthorized access and errors; and highly automated monitor and control.

An energy efficient and high speed architecture for convolution computing based on binary resistive random access memory

Science.gov (United States)

Liu, Chen; Han, Runze; Zhou, Zheng; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

In this work we present a novel convolution computing architecture based on metal oxide resistive random access memory (RRAM) to process the image data stored in the RRAM arrays. The proposed image storage architecture shows performances of better speed-device consumption efficiency compared with the previous kernel storage architecture. Further we improve the architecture for a high accuracy and low power computing by utilizing the binary storage and the series resistor. For a 28 × 28 image and 10 kernels with a size of 3 × 3, compared with the previous kernel storage approach, the newly proposed architecture shows excellent performances including: 1) almost 100% accuracy within 20% LRS variation and 90% HRS variation; 2) more than 67 times speed boost; 3) 71.4% energy saving.

Architecture Of Uzbekistan Of The Ancient Period Style Features And Composition Laws

Directory of Open Access Journals (Sweden)

Nurmukhamedova Shoira Zahidovna

2015-08-01

Full Text Available Specific features of the development of architecture in Uzbekistan in ancient period are considered in the paper. The author emphasizes the role of building materials and structures studies the composition of ancient settlements in Khorezm and Bactria reveals a high level of military architecture and planning principles of residential and castle structures.

Capital Architecture: Situating symbolism parallel to architectural methods and technology

Science.gov (United States)

Daoud, Bassam

Capital Architecture is a symbol of a nation's global presence and the cultural and social focal point of its inhabitants. Since the advent of High-Modernism in Western cities, and subsequently decolonised capitals, civic architecture no longer seems to be strictly grounded in the philosophy that national buildings shape the legacy of government and the way a nation is regarded through its built environment. Amidst an exceedingly globalized architectural practice and with the growing concern of key heritage foundations over the shortcomings of international modernism in representing its immediate socio-cultural context, the contextualization of public architecture within its sociological, cultural and economic framework in capital cities became the key denominator of this thesis. Civic architecture in capital cities is essential to confront the challenges of symbolizing a nation and demonstrating the legitimacy of the government'. In today's dominantly secular Western societies, governmental architecture, especially where the seat of political power lies, is the ultimate form of architectural expression in conveying a sense of identity and underlining a nation's status. Departing with these convictions, this thesis investigates the embodied symbolic power, the representative capacity, and the inherent permanence in contemporary architecture, and in its modes of production. Through a vast study on Modern architectural ideals and heritage -- in parallel to methodologies -- the thesis stimulates the future of large scale governmental building practices and aims to identify and index the key constituents that may respond to the lack representation in civic architecture in capital cities.

High Dynamic Range Cognitive Radio Front Ends: Architecture to Evaluation

Science.gov (United States)

Ashok, Arun; Subbiah, Iyappan; Varga, Gabor; Schrey, Moritz; Heinen, Stefan

2016-07-01

Advent of TV white space digitization has released frequencies from 470 MHz to 790 MHz to be utilized opportunistically. The secondary user can utilize these so called TV spaces in the absence of primary users. The most important challenge for this coexistence is mutual interference. While the strong TV stations can completely saturate the receiver of the cognitive radio (CR), the cognitive radio spurious tones can disturb other primary users and white space devices. The aim of this paper is to address the challenges for enabling cognitive radio applications in WLAN and LTE. In this process, architectural considerations for the design of cognitive radio front ends are discussed. With high-IF converters, faster and flexible implementation of CR enabled WLAN and LTE are shown. The effectiveness of the architecture is shown by evaluating the CR front ends for compliance of standards namely 802.11b/g (WLAN) and 3GPP TS 36.101 (LTE).

Design and Verification of Digital Architecture of 65K Pixel Readout Chip for High-Energy Physics

CERN Document Server

Poikela, Tuomas; Paakkulainen, J

2010-01-01

The feasibility to design and implement a front-end ASIC for the upgrade of the VELO detector of LHCb experiment at CERN using IBM’s 130nm standard CMOS process and a standard cell library is studied in this thesis. The proposed architecture is a design to cope with high data rates and continuous data taking. The architecture is designed to operate without any external trigger to record every hit signal the ASIC receives from a sensor chip, and then to transmit the information to the next level of electronics, for example to FPGAs. This thesis focuses on design, implementation and functional verification of the digital electronics of the active pixel area. The area requirements are dictated by the geometry of pixels (55$mu$m x 55$mu$m), power requirements (20W/module) by restricted cooling capabilities of the module consisting of 10 chips and output bandwidth requirements by data rate (< 10 Gbit/s) produced by a particle flux passing through the chip. The design work was carried out using transaction...

ZnO@TiO2 Architectures for a High Efficiency Dye-Sensitized Solar Cell

International Nuclear Information System (INIS)

Lei, Jianfei; Liu, Shuli; Du, Kai; Lv, Shijie; Liu, Chaojie; Zhao, Lingzhi

2015-01-01

Graphical Abstract: A fast and improved electrochemical process was reported to fabricate ZnO@TiO 2 heterogeneous architectures with enhanced power conversion efficiency (ƞ = 2.16%). This paper focuses on achieving high dye loading via binding noncorrosive TiO 2 nanocones to the outermost layer, while retaining the excellent electron transport behavior of the ZnO-based internal layer. Display Omitted -- Highlights: • Nanoconic TiO 2 particles are loaded on the surface of aligned ZnO NWs successfully by a liquid phase deposition method. • ZnO@TiO 2 architectures exhibit high efficiency of the DSSCs. -- Abstract: Instead of the spin coating step, an improved electrochemical process is reported in this paper to prepare ZnO seeded substrates and ZnO nanowires (ZnO NWs). Vertically aligned ZnO NWs are deposited electrochemically on the ZnO seeded substrates directly forming backbones for loading nanoconic TiO 2 particles, and hence ZnO@TiO 2 heterogeneous architectures are obtained. When used as photoanode materials of the dye-sensitized solar cells (DSSCs), ZnO@TiO 2 architectures exhibit enhanced power conversion efficiency (PCE) of the DSSCs. Results of the solar cell testing show that addition of TiO 2 shells to the ZnO NWs significantly increases short circuit current (from 2.6 to 4.7 mA cm −2 ), open circuit voltage (from 0.53 V to 0.77 V) and fill factor (from 0.30 to 0.59). The PCE jumped from 0.4% for bare ZnO NWs to 2.16% for ZnO@TiO 2 architectures under 100 mW cm −2 of AM 1.5 G illumination

Development of the Lymphoma Enterprise Architecture Database: a caBIG Silver level compliant system.

Science.gov (United States)

Huang, Taoying; Shenoy, Pareen J; Sinha, Rajni; Graiser, Michael; Bumpers, Kevin W; Flowers, Christopher R

2009-04-03

Lymphomas are the fifth most common cancer in United States with numerous histological subtypes. Integrating existing clinical information on lymphoma patients provides a platform for understanding biological variability in presentation and treatment response and aids development of novel therapies. We developed a cancer Biomedical Informatics Grid (caBIG) Silver level compliant lymphoma database, called the Lymphoma Enterprise Architecture Data-system (LEAD), which integrates the pathology, pharmacy, laboratory, cancer registry, clinical trials, and clinical data from institutional databases. We utilized the Cancer Common Ontological Representation Environment Software Development Kit (caCORE SDK) provided by National Cancer Institute's Center for Bioinformatics to establish the LEAD platform for data management. The caCORE SDK generated system utilizes an n-tier architecture with open Application Programming Interfaces, controlled vocabularies, and registered metadata to achieve semantic integration across multiple cancer databases. We demonstrated that the data elements and structures within LEAD could be used to manage clinical research data from phase 1 clinical trials, cohort studies, and registry data from the Surveillance Epidemiology and End Results database. This work provides a clear example of how semantic technologies from caBIG can be applied to support a wide range of clinical and research tasks, and integrate data from disparate systems into a single architecture. This illustrates the central importance of caBIG to the management of clinical and biological data.

Hybrid architecture for building secure sensor networks

Science.gov (United States)

Owens, Ken R., Jr.; Watkins, Steve E.

2012-04-01

Sensor networks have various communication and security architectural concerns. Three approaches are defined to address these concerns for sensor networks. The first area is the utilization of new computing architectures that leverage embedded virtualization software on the sensor. Deploying a small, embedded virtualization operating system on the sensor nodes that is designed to communicate to low-cost cloud computing infrastructure in the network is the foundation to delivering low-cost, secure sensor networks. The second area focuses on securing the sensor. Sensor security components include developing an identification scheme, and leveraging authentication algorithms and protocols that address security assurance within the physical, communication network, and application layers. This function will primarily be accomplished through encrypting the communication channel and integrating sensor network firewall and intrusion detection/prevention components to the sensor network architecture. Hence, sensor networks will be able to maintain high levels of security. The third area addresses the real-time and high priority nature of the data that sensor networks collect. This function requires that a quality-of-service (QoS) definition and algorithm be developed for delivering the right data at the right time. A hybrid architecture is proposed that combines software and hardware features to handle network traffic with diverse QoS requirements.

Modern architecture in a life cycle perspective

DEFF Research Database (Denmark)

Vestergaard, Inge

2017-01-01

By confronting the mistakes from the Modern Movement, the ideas of modernistic architecture are under pressure. This paper will summarize the primary architectural mistakes of the mono-functional thinking in planning and building and the non-appropriate environmental dispositions of the big plans...... architectural transformations on city level and on housing level. The transformation goals are to secure the economy and the social and the environmental aspects in the transformation´s life-cycle perspective in order to make the buildings and the districts interact with and adapt to society. The conclusion...... points out the architectural consequences of prioritizing in the transformation process the social parameters higher than the original rigid architectural theories....

Fuzzy logic controller architecture for water level control in nuclear power plant steam generator using ANFIS training method

International Nuclear Information System (INIS)

Vosoughi, Naser; Ekrami, AmirHasan; Naseri, Zahra

2003-01-01

Since suitable control of water level can greatly enhance the operation of a power station, a fuzzy logic controller is applied to control the steam generator water level in a pressurized water reactor. The method does not require a detailed mathematical model of the object to be controlled. It is shown that two inputs, a single output and the least number of rules (9 rules) are considered for a controller, and the ANFIS training method is employed to model functions in a controlled system. By using ANFIS training method, initial membership functions will be trained and appropriate functions are generated to control water level inside the steam generator while using the stated rules. The proposed architecture can construct an input-output mapping based on both human knowledge (in the from of fuzzy if - then rules) and stipulated input-output data. This fuzzy logic controller is applied to the steam generator level control by computer simulations. The simulation results confirm the excellent performance of this control architecture in compare with a well-turned PID controller. (author)

From green architecture to architectural green

DEFF Research Database (Denmark)

Earon, Ofri

2011-01-01

that describes the architectural exclusivity of this particular architecture genre. The adjective green expresses architectural qualities differentiating green architecture from none-green architecture. Currently, adding trees and vegetation to the building’s facade is the main architectural characteristics...... they have overshadowed the architectural potential of green architecture. The paper questions how a green space should perform, look like and function. Two examples are chosen to demonstrate thorough integrations between green and space. The examples are public buildings categorized as pavilions. One......The paper investigates the topic of green architecture from an architectural point of view and not an energy point of view. The purpose of the paper is to establish a debate about the architectural language and spatial characteristics of green architecture. In this light, green becomes an adjective...

Efficiency of High Order Spectral Element Methods on Petascale Architectures

KAUST Repository

Hutchinson, Maxwell; Heinecke, Alexander; Pabst, Hans; Henry, Greg; Parsani, Matteo; Keyes, David E.

2016-01-01

High order methods for the solution of PDEs expose a tradeoff between computational cost and accuracy on a per degree of freedom basis. In many cases, the cost increases due to higher arithmetic intensity while affecting data movement minimally. As architectures tend towards wider vector instructions and expect higher arithmetic intensities, the best order for a particular simulation may change. This study highlights preferred orders by identifying the high order efficiency frontier of the spectral element method implemented in Nek5000 and NekBox: the set of orders and meshes that minimize computational cost at fixed accuracy. First, we extract Nek’s order-dependent computational kernels and demonstrate exceptional hardware utilization by hardware-aware implementations. Then, we perform productionscale calculations of the nonlinear single mode Rayleigh-Taylor instability on BlueGene/Q and Cray XC40-based supercomputers to highlight the influence of the architecture. Accuracy is defined with respect to physical observables, and computational costs are measured by the corehour charge of the entire application. The total number of grid points needed to achieve a given accuracy is reduced by increasing the polynomial order. On the XC40 and BlueGene/Q, polynomial orders as high as 31 and 15 come at no marginal cost per timestep, respectively. Taken together, these observations lead to a strong preference for high order discretizations that use fewer degrees of freedom. From a performance point of view, we demonstrate up to 60% full application bandwidth utilization at scale and achieve ≈1PFlop/s of compute performance in Nek’s most flop-intense methods.

Efficiency of High Order Spectral Element Methods on Petascale Architectures

KAUST Repository

Hutchinson, Maxwell

2016-06-14

High order methods for the solution of PDEs expose a tradeoff between computational cost and accuracy on a per degree of freedom basis. In many cases, the cost increases due to higher arithmetic intensity while affecting data movement minimally. As architectures tend towards wider vector instructions and expect higher arithmetic intensities, the best order for a particular simulation may change. This study highlights preferred orders by identifying the high order efficiency frontier of the spectral element method implemented in Nek5000 and NekBox: the set of orders and meshes that minimize computational cost at fixed accuracy. First, we extract Nek’s order-dependent computational kernels and demonstrate exceptional hardware utilization by hardware-aware implementations. Then, we perform productionscale calculations of the nonlinear single mode Rayleigh-Taylor instability on BlueGene/Q and Cray XC40-based supercomputers to highlight the influence of the architecture. Accuracy is defined with respect to physical observables, and computational costs are measured by the corehour charge of the entire application. The total number of grid points needed to achieve a given accuracy is reduced by increasing the polynomial order. On the XC40 and BlueGene/Q, polynomial orders as high as 31 and 15 come at no marginal cost per timestep, respectively. Taken together, these observations lead to a strong preference for high order discretizations that use fewer degrees of freedom. From a performance point of view, we demonstrate up to 60% full application bandwidth utilization at scale and achieve ≈1PFlop/s of compute performance in Nek’s most flop-intense methods.

Evaluation of CNN architectures for gait recognition based on optical flow maps

OpenAIRE

Castro, F. M.; Marín-Jiménez, M.J.; Guil, N.; López-Tapia, S.; Pérez de la Blanca, N.

2017-01-01

This work targets people identification in video based on the way they walk (\\ie gait) by using deep learning architectures. We explore the use of convolutional neural networks (CNN) for learning high-level descriptors from low-level motion features (\\ie optical flow components). The low number of training samples for each subject and the use of a test set containing subjects different from the training ones makes the search of a good CNN architecture a challenging task. Universidad de Mál...

The high speed interconnect system architecture and operation

Science.gov (United States)

Anderson, Steven C.

The design and operation of a fiber-optic high-speed interconnect system (HSIS) being developed to meet the requirements of future avionics and flight-control hardware with distributed-system architectures are discussed. The HSIS is intended for 100-Mb/s operation of a local-area network with up to 256 stations. It comprises a bus transmission system (passive star couplers and linear media linked by active elements) and network interface units (NIUs). Each NIU is designed to perform the physical, data link, network, and transport functions defined by the ISO OSI Basic Reference Model (1982 and 1983) and incorporates a fiber-optic transceiver, a high-speed protocol based on the SAE AE-9B linear token-passing data bus (1986), and a specialized application interface unit. The operating modes and capabilities of HSIS are described in detail and illustrated with diagrams.

Designing an architectural style for Pervasive Healthcare systems.

Science.gov (United States)

Rafe, Vahid; Hajvali, Masoumeh

2013-04-01

Nowadays, the Pervasive Healthcare (PH) systems are considered as an important research area. These systems have a dynamic structure and configuration. Therefore, an appropriate method for designing such systems is necessary. The Publish/Subscribe Architecture (pub/sub) is one of the convenient architectures to support such systems. PH systems are safety critical; hence, errors can bring disastrous results. To prevent such problems, a powerful analytical tool is required. So using a proper formal language like graph transformation systems for developing of these systems seems necessary. But even if software engineers use such high level methodologies, errors may occur in the system under design. Hence, it should be investigated automatically and formally that whether this model of system satisfies all their requirements or not. In this paper, a dynamic architectural style for developing PH systems is presented. Then, the behavior of these systems is modeled and evaluated using GROOVE toolset. The results of the analysis show its high reliability.

Architecture Without Explicit Locks for Logic Simulation on SIMD Machines

OpenAIRE

Cockshott, W. Paul; Chimeh, Mozhgan Kabiri

2016-01-01

The presentation describes an architecture for logic simulation that takes advantages of the features of multi-core SIMD architectures. It uses neither explicit locks nor queues, using instead oblivious simulation. Data structures are targeted to efficient SIMD and multi-core cache operation. We demonstrate high levels of parallelisation on Xeon Phi and AMD multi-core machines. Performance on a Xeon Phi is comparable to or better than on a 1000 core Blue Gene machine.

Architecture is always in the middle…

Directory of Open Access Journals (Sweden)

Tim Gough

2015-12-01

Full Text Available This essay proposes an ontology of architecture that takes its lead from the bread and butter of architecture: a flat ontology opposed to Cartesianism in the sense that no differentiation between realms (body/mind, high/low is accepted. The work of Spinoza and Deleuze is referred to in order to flesh out such an ontology, whose aim is to destroy the very desire for architecture and architectural theory to even pose the question about the difference between bread-and-butter architecture and high architecture. Architecture is shown to be of the nature of an assemblage, of a machine or a haecceity (to use Deleuze and Guattari’s phrase, and the implications of this in relation to the question of composition and reception are outlined.

Information management architecture for an integrated computing environment for the Environmental Restoration Program. Environmental Restoration Program, Volume 3, Interim technical architecture

International Nuclear Information System (INIS)

1994-09-01

This third volume of the Information Management Architecture for an Integrated Computing Environment for the Environmental Restoration Program--the Interim Technical Architecture (TA) (referred to throughout the remainder of this document as the ER TA)--represents a key milestone in establishing a coordinated information management environment in which information initiatives can be pursued with the confidence that redundancy and inconsistencies will be held to a minimum. This architecture is intended to be used as a reference by anyone whose responsibilities include the acquisition or development of information technology for use by the ER Program. The interim ER TA provides technical guidance at three levels. At the highest level, the technical architecture provides an overall computing philosophy or direction. At this level, the guidance does not address specific technologies or products but addresses more general concepts, such as the use of open systems, modular architectures, graphical user interfaces, and architecture-based development. At the next level, the technical architecture provides specific information technology recommendations regarding a wide variety of specific technologies. These technologies include computing hardware, operating systems, communications software, database management software, application development software, and personal productivity software, among others. These recommendations range from the adoption of specific industry or Martin Marietta Energy Systems, Inc. (Energy Systems) standards to the specification of individual products. At the third level, the architecture provides guidance regarding implementation strategies for the recommended technologies that can be applied to individual projects and to the ER Program as a whole

Architecture on Architecture

DEFF Research Database (Denmark)

Olesen, Karen

2016-01-01

that is not scientific or academic but is more like a latent body of data that we find embedded in existing works of architecture. This information, it is argued, is not limited by the historical context of the work. It can be thought of as a virtual capacity – a reservoir of spatial configurations that can...... correlation between the study of existing architectures and the training of competences to design for present-day realities.......This paper will discuss the challenges faced by architectural education today. It takes as its starting point the double commitment of any school of architecture: on the one hand the task of preserving the particular knowledge that belongs to the discipline of architecture, and on the other hand...

Augmenting interoperability across repositories architectural ideas

CERN Multimedia

CERN. Geneva

2005-01-01

The aDORe digital repository architecture designed and implemented by the Los Alamos Research Library is fully standards-based and highly modular, with the various components of the architecture interacting in a protocol-driven manner. Although aDORe was designed for use in the context of the Los Alamos Library, its modular and standards-based design has led to interesting insights regarding possible new levels of interoperability in a federation of heterogeneous repositories. The presentation will discuss these insights, and will illustrate that attractive federations of repositories can be built by introducing rather basic interoperability requirements. The presentation will also show that, once these requirements are met, a powerful service framework that overlays the federation can emerge.

A High-Throughput, High-Accuracy System-Level Simulation Framework for System on Chips

Directory of Open Access Journals (Sweden)

Guanyi Sun

2011-01-01

Full Text Available Today's System-on-Chips (SoCs design is extremely challenging because it involves complicated design tradeoffs and heterogeneous design expertise. To explore the large solution space, system architects have to rely on system-level simulators to identify an optimized SoC architecture. In this paper, we propose a system-level simulation framework, System Performance Simulation Implementation Mechanism, or SPSIM. Based on SystemC TLM2.0, the framework consists of an executable SoC model, a simulation tool chain, and a modeling methodology. Compared with the large body of existing research in this area, this work is aimed at delivering a high simulation throughput and, at the same time, guaranteeing a high accuracy on real industrial applications. Integrating the leading TLM techniques, our simulator can attain a simulation speed that is not slower than that of the hardware execution by a factor of 35 on a set of real-world applications. SPSIM incorporates effective timing models, which can achieve a high accuracy after hardware-based calibration. Experimental results on a set of mobile applications proved that the difference between the simulated and measured results of timing performance is within 10%, which in the past can only be attained by cycle-accurate models.

The Simulation Intranet Architecture

Energy Technology Data Exchange (ETDEWEB)

Holmes, V.P.; Linebarger, J.M.; Miller, D.J.; Vandewart, R.L.

1998-12-02

The Simdarion Infranet (S1) is a term which is being used to dcscribc one element of a multidisciplinary distributed and distance computing initiative known as DisCom2 at Sandia National Laboratory (http ct al. 1998). The Simulation Intranet is an architecture for satisfying Sandia's long term goal of providing an end- to-end set of scrviccs for high fidelity full physics simu- lations in a high performance, distributed, and distance computing environment. The Intranet Architecture group was formed to apply current distributed object technologies to this problcm. For the hardware architec- tures and software models involved with the current simulation process, a CORBA-based architecture is best suited to meet Sandia's needs. This paper presents the initial desi-a and implementation of this Intranct based on a three-tier Network Computing Architecture(NCA). The major parts of the architecture include: the Web Cli- ent, the Business Objects, and Data Persistence.

A new architecture for low-power high-speed pipelined ADCs using double-sampling and opamp-sharing techniques

NARCIS (Netherlands)

Abdinia, S.; Yavari, M.

2009-01-01

This paper presents a low-voltage low-power pipelined ADC with 1V supply voltage in a 90nm CMOS process. A new architecture is proposed to reduce the power consumption in high-speed pipelined analog-to-digital converters (ADCs). The presented architecture utilizes a combination of two current

Behavioral Simulation and Performance Evaluation of Multi-Processor Architectures

Directory of Open Access Journals (Sweden)

Ausif Mahmood

1996-01-01

Full Text Available The development of multi-processor architectures requires extensive behavioral simulations to verify the correctness of design and to evaluate its performance. A high level language can provide maximum flexibility in this respect if the constructs for handling concurrent processes and a time mapping mechanism are added. This paper describes a novel technique for emulating hardware processes involved in a parallel architecture such that an object-oriented description of the design is maintained. The communication and synchronization between hardware processes is handled by splitting the processes into their equivalent subprograms at the entry points. The proper scheduling of these subprograms is coordinated by a timing wheel which provides a time mapping mechanism. Finally, a high level language pre-processor is proposed so that the timing wheel and the process emulation details can be made transparent to the user.

Generic robot architecture

Science.gov (United States)

Bruemmer, David J [Idaho Falls, ID; Few, Douglas A [Idaho Falls, ID

2010-09-21

The present invention provides methods, computer readable media, and apparatuses for a generic robot architecture providing a framework that is easily portable to a variety of robot platforms and is configured to provide hardware abstractions, abstractions for generic robot attributes, environment abstractions, and robot behaviors. The generic robot architecture includes a hardware abstraction level and a robot abstraction level. The hardware abstraction level is configured for developing hardware abstractions that define, monitor, and control hardware modules available on a robot platform. The robot abstraction level is configured for defining robot attributes and provides a software framework for building robot behaviors from the robot attributes. Each of the robot attributes includes hardware information from at least one hardware abstraction. In addition, each robot attribute is configured to substantially isolate the robot behaviors from the at least one hardware abstraction.

Knowledge and Architectural Practice

DEFF Research Database (Denmark)

Verbeke, Johan

2017-01-01

of the level of research methods and will explain that the research methods and processes in creative practice research are very similar to grounded theory which is an established research method in the social sciences. Finally, an argument will be made for a more explicit research attitude in architectural......This paper focuses on the specific knowledge residing in architectural practice. It is based on the research of 35 PhD fellows in the ADAPT-r (Architecture, Design and Art Practice Training-research) project. The ADAPT-r project innovates architectural research in combining expertise from academia...... and from practice in order to highlight and extract the specific kind of knowledge which resides and is developed in architectural practice (creative practice research). The paper will discuss three ongoing and completed PhD projects and focusses on the outcomes and their contribution to the field...

Alveolar architecture of clear cell renal carcinomas (≤5.0 cm) show high attenuation on dynamic CT scanning

International Nuclear Information System (INIS)

Fujimoto, Hiroyuki; Wakao, Fumihiko; Moriyama, Noriyuki; Tobisu, Kenichi; Kakizoe, Tadao; Sakamoto, Michiie

1999-01-01

To establish the correlation between tumor appearance on CT and tumor histology in renal cell carcinomas. The density and attenuation patterns of 96 renal cell carcinomas, each ≤5 cm in greatest diameter, were studied by non-enhanced CT and early and late after bolus injection of contrast medium using dynamic CT. The density and attenuation patterns and pathological maps of each tumor were individually correlated. High attenuated areas were present in 72 of the 96 tumors on early enhanced dynamic CT scanning. All 72 high attenuated areas were of the clear cell renal cell carcinoma and had alveolar architecture. The remaining 24 tumors that did not demonstrate high attenuated foci on early enhanced scanning included three clear cell, nine granular cell, six papillary, five chromophobe and one collecting duct type. With respect to tumor architecture, all clear cell tumors of alveolar architecture demonstrated high attenuation on early enhanced scanning. Clear cell renal cell carcinomas of alveolar architecture show high attenuation on early enhanced dynamic CT scanning. A larger number of patients are indispensable to obtaining clear results. However, these findings seem to be an important clue to the diagnosis of renal cell carcinomas as having an alveolar structure. (author)

An Energy-Efficient and High-Quality Video Transmission Architecture in Wireless Video-Based Sensor Networks

Directory of Open Access Journals (Sweden)

Yasaman Samei

2008-08-01

Full Text Available Technological progress in the fields of Micro Electro-Mechanical Systems (MEMS and wireless communications and also the availability of CMOS cameras, microphones and small-scale array sensors, which may ubiquitously capture multimedia content from the field, have fostered the development of low-cost limited resources Wireless Video-based Sensor Networks (WVSN. With regards to the constraints of videobased sensor nodes and wireless sensor networks, a supporting video stream is not easy to implement with the present sensor network protocols. In this paper, a thorough architecture is presented for video transmission over WVSN called Energy-efficient and high-Quality Video transmission Architecture (EQV-Architecture. This architecture influences three layers of communication protocol stack and considers wireless video sensor nodes constraints like limited process and energy resources while video quality is preserved in the receiver side. Application, transport, and network layers are the layers in which the compression protocol, transport protocol, and routing protocol are proposed respectively, also a dropping scheme is presented in network layer. Simulation results over various environments with dissimilar conditions revealed the effectiveness of the architecture in improving the lifetime of the network as well as preserving the video quality.

An Energy-Efficient and High-Quality Video Transmission Architecture in Wireless Video-Based Sensor Networks.

Science.gov (United States)

Aghdasi, Hadi S; Abbaspour, Maghsoud; Moghadam, Mohsen Ebrahimi; Samei, Yasaman

2008-08-04

Technological progress in the fields of Micro Electro-Mechanical Systems (MEMS) and wireless communications and also the availability of CMOS cameras, microphones and small-scale array sensors, which may ubiquitously capture multimedia content from the field, have fostered the development of low-cost limited resources Wireless Video-based Sensor Networks (WVSN). With regards to the constraints of videobased sensor nodes and wireless sensor networks, a supporting video stream is not easy to implement with the present sensor network protocols. In this paper, a thorough architecture is presented for video transmission over WVSN called Energy-efficient and high-Quality Video transmission Architecture (EQV-Architecture). This architecture influences three layers of communication protocol stack and considers wireless video sensor nodes constraints like limited process and energy resources while video quality is preserved in the receiver side. Application, transport, and network layers are the layers in which the compression protocol, transport protocol, and routing protocol are proposed respectively, also a dropping scheme is presented in network layer. Simulation results over various environments with dissimilar conditions revealed the effectiveness of the architecture in improving the lifetime of the network as well as preserving the video quality.

System engineering in the Nuclear Regulatory Commission licensing process: Program architecture process and structure

International Nuclear Information System (INIS)

Romine, D.T.

1989-01-01

In October 1987, the U.S. Nuclear Regulatory Commission (NRC) established the Center for Nuclear Waste Regulatory Analyses at Southwest Research Institute in San Antonio, Texas. The overall mission of the center is to provide a sustained level of high-quality research and technical assistance in support of NRC regulatory responsibilities under the Nuclear Waste Policy Act (NWPA). A key part of that mission is to assist the NRC in the development of the program architecture - the systems approach to regulatory analysis for the NRC high-level waste repository licensing process - and the development and implementation of the computer-based Program Architecture Support System (PASS). This paper describes the concept of program architecture, summarizes the process and basic structure of the PASS relational data base, and describes the applications of the system

The Architecture of the CMS Level-1 Trigger Control and Monitoring System

CERN Document Server

Magrans de Abril, Marc; Hammer, Josef; Hartl, Christian; Xie, Zhen

2011-01-01

The architecture of the Level-1 Trigger Control and Monitoring system for the CMS experiment is presented. This system has been installed and commissioned on the trigger online computers and is currently used for data taking at the LHC. This is a medium-size distributed system that runs over 40 PCs and 200 processes that control about 4000 electronic boards. It has been designed to handle the trigger configuration and monitoring during data taking as well as all communications with the main run control of CMS. Furthermore its design has foreseen the provision of the software infrastructure for detailed testing of the trigger system during beam down time.

Unraveling Supply-Driven Business Models of Architectural Firms

NARCIS (Netherlands)

Bos-De Vos, M.; Volker, L.; Wamelink, J.W.F.; Kaminsky, Jessica; Zerjav, Vedran

2016-01-01

Architectural firms deliver services for various, unique projects that are all characterized by a high level of uncertainty. To successfully propose, create and capture value, they need business models that are able to deal with this variety and uncertainty. So far, little is known about the

A scalable parallel open architecture data acquisition system for low to high rate experiments, test beams and all SSC [Superconducting Super Collider] detectors

International Nuclear Information System (INIS)

Barsotti, E.; Booth, A.; Bowden, M.; Swoboda, C.; Lockyer, N.; VanBerg, R.

1989-12-01

A new era of high-energy physics research is beginning requiring accelerators with much higher luminosities and interaction rates in order to discover new elementary particles. As a consequences, both orders of magnitude higher data rates from the detector and online processing power, well beyond the capabilities of current high energy physics data acquisition systems, are required. This paper describes a new data acquisition system architecture which draws heavily from the communications industry, is totally parallel (i.e., without any bottlenecks), is capable of data rates of hundreds of GigaBytes per second from the detector and into an array of online processors (i.e., processor farm), and uses an open systems architecture to guarantee compatibility with future commercially available online processor farms. The main features of the system architecture are standard interface ICs to detector subsystems wherever possible, fiber optic digital data transmission from the near-detector electronics, a self-routing parallel event builder, and the use of industry-supported and high-level language programmable processors in the proposed BCD system for both triggers and online filters. A brief status report of an ongoing project at Fermilab to build the self-routing parallel event builder will also be given in the paper. 3 figs., 1 tab

Space-Filling Supercapacitor Carpets: Highly scalable fractal architecture for energy storage

Science.gov (United States)

Tiliakos, Athanasios; Trefilov, Alexandra M. I.; Tanasǎ, Eugenia; Balan, Adriana; Stamatin, Ioan

2018-04-01

Revamping ground-breaking ideas from fractal geometry, we propose an alternative micro-supercapacitor configuration realized by laser-induced graphene (LIG) foams produced via laser pyrolysis of inexpensive commercial polymers. The Space-Filling Supercapacitor Carpet (SFSC) architecture introduces the concept of nested electrodes based on the pre-fractal Peano space-filling curve, arranged in a symmetrical equilateral setup that incorporates multiple parallel capacitor cells sharing common electrodes for maximum efficiency and optimal length-to-area distribution. We elucidate on the theoretical foundations of the SFSC architecture, and we introduce innovations (high-resolution vector-mode printing) in the LIG method that allow for the realization of flexible and scalable devices based on low iterations of the Peano algorithm. SFSCs exhibit distributed capacitance properties, leading to capacitance, energy, and power ratings proportional to the number of nested electrodes (up to 4.3 mF, 0.4 μWh, and 0.2 mW for the largest tested model of low iteration using aqueous electrolytes), with competitively high energy and power densities. This can pave the road for full scalability in energy storage, reaching beyond the scale of micro-supercapacitors for incorporating into larger and more demanding applications.

High-Resolution X-Ray Tomography: A 3D Exploration Into the Skeletal Architecture in Mouse Models Submitted to Microgravity Constraints

Directory of Open Access Journals (Sweden)

Alessandra Giuliani

2018-03-01

Full Text Available Bone remodeling process consists in a slow building phase and in faster resorption with the objective to maintain a functional skeleton locomotion to counteract the Earth gravity. Thus, during spaceflights, the skeleton does not act against gravity, with a rapid decrease of bone mass and density, favoring bone fracture. Several studies approached the problem by imaging the bone architecture and density of cosmonauts returned by the different spaceflights. However, the weaknesses of the previously reported studies was two-fold: on the one hand the research suffered the small statistical sample size of almost all human spaceflight studies, on the other the results were not fully reliable, mainly due to the fact that the observed bone structures were small compared with the spatial resolution of the available imaging devices. The recent advances in high-resolution X-ray tomography have stimulated the study of weight-bearing skeletal sites by novel approaches, mainly based on the use of the mouse and its various strains as an animal model, and sometimes taking advantage of the synchrotron radiation support to approach studies of 3D bone architecture and mineralization degree mapping at different hierarchical levels. Here we report the first, to our knowledge, systematic review of the recent advances in studying the skeletal bone architecture by high-resolution X-ray tomography after submission of mice models to microgravity constrains.

Analyzing Resiliency of the Smart Grid Communication Architectures

Energy Technology Data Exchange (ETDEWEB)

None, None

2016-08-01

Smart grids are susceptible to cyber-attack as a result of new communication, control and computation techniques employed in the grid. In this paper, we characterize and analyze the resiliency of smart grid communication architecture, specifically an RF mesh based architecture, under cyber attacks. We analyze the resiliency of the communication architecture by studying the performance of high-level smart grid functions such as metering, and demand response which depend on communication. Disrupting the operation of these functions impacts the operational resiliency of the smart grid. Our analysis shows that it takes an attacker only a small fraction of meters to compromise the communication resiliency of the smart grid. We discuss the implications of our result to critical smart grid functions and to the overall security of the smart grid.

An ODMG-compatible testbed architecture for scalable management and analysis of physics data

International Nuclear Information System (INIS)

Malon, D.M.; May, E.N.

1997-01-01

This paper describes a testbed architecture for the investigation and development of scalable approaches to the management and analysis of massive amounts of high energy physics data. The architecture has two components: an interface layer that is compliant with a substantial subset of the ODMG-93 Version 1.2 specification, and a lightweight object persistence manager that provides flexible storage and retrieval services on a variety of single- and multi-level storage architectures, and on a range of parallel and distributed computing platforms

Insider Threat Security Reference Architecture

Science.gov (United States)

2012-04-01

this challenge. CMU/SEI-2012-TR-007 | 2 2 The Components of the ITSRA Figure 2 shows the four layers of the ITSRA. The Business Security layer......organizations improve their level of preparedness to address the insider threat. Business Security Architecture Data Security Architecture

MC 68020 μp architecture

International Nuclear Information System (INIS)

Casals, O.; Dejuan, E.; Labarta, J.

1988-01-01

The MC68020 is a 32-bit microprocessor object code compatible with the earlier MC68000 and MC68010. In this paper we describe its architecture and two coprocessors: the MC68851 paged memory management unit and the MC68882 floating point coprocessor. Between its most important characteristics we can point up: addressing mode extensions for enhanced support of high level languages, an on-chip instruction cache and full support of virtual memory. (Author)

Designing bioinspired composite reinforcement architectures via 3D magnetic printing

Science.gov (United States)

Martin, Joshua J.; Fiore, Brad E.; Erb, Randall M.

2015-10-01

Discontinuous fibre composites represent a class of materials that are strong, lightweight and have remarkable fracture toughness. These advantages partially explain the abundance and variety of discontinuous fibre composites that have evolved in the natural world. Many natural structures out-perform the conventional synthetic counterparts due, in part, to the more elaborate reinforcement architectures that occur in natural composites. Here we present an additive manufacturing approach that combines real-time colloidal assembly with existing additive manufacturing technologies to create highly programmable discontinuous fibre composites. This technology, termed as `3D magnetic printing', has enabled us to recreate complex bioinspired reinforcement architectures that deliver enhanced material performance compared with monolithic structures. Further, we demonstrate that we can now design and evolve elaborate reinforcement architectures that are not found in nature, demonstrating a high level of possible customization in discontinuous fibre composites with arbitrary geometries.

Designing bioinspired composite reinforcement architectures via 3D magnetic printing.

Science.gov (United States)

Martin, Joshua J; Fiore, Brad E; Erb, Randall M

2015-10-23

Discontinuous fibre composites represent a class of materials that are strong, lightweight and have remarkable fracture toughness. These advantages partially explain the abundance and variety of discontinuous fibre composites that have evolved in the natural world. Many natural structures out-perform the conventional synthetic counterparts due, in part, to the more elaborate reinforcement architectures that occur in natural composites. Here we present an additive manufacturing approach that combines real-time colloidal assembly with existing additive manufacturing technologies to create highly programmable discontinuous fibre composites. This technology, termed as '3D magnetic printing', has enabled us to recreate complex bioinspired reinforcement architectures that deliver enhanced material performance compared with monolithic structures. Further, we demonstrate that we can now design and evolve elaborate reinforcement architectures that are not found in nature, demonstrating a high level of possible customization in discontinuous fibre composites with arbitrary geometries.

Software architecture for control and data acquisition of linear plasma generator Magnum-PSI

International Nuclear Information System (INIS)

Groen, P.W.C.; Beveren, V. van; Broekema, A.; Busch, P.J.; Genuit, J.W.; Kaas, G.; Poelman, A.J.; Scholten, J.; Zeijlmans van Emmichoven, P.A.

2013-01-01

Highlights: ► An architecture based on a modular design. ► The design offers flexibility and extendability. ► The design covers the overall software architecture. ► It also covers its (sub)systems’ internal structure. -- Abstract: The FOM Institute DIFFER – Dutch Institute for Fundamental Energy Research has completed the construction phase of Magnum-PSI, a magnetized, steady-state, large area, high-flux linear plasma beam generator to study plasma surface interactions under ITER divertor conditions. Magnum-PSI consists of several hardware subsystems, and a variety of diagnostic systems. The COntrol, Data Acquisition and Communication (CODAC) system integrates these subsystems and provides a complete interface for the Magnum-PSI users. Integrating it all, from the lowest hardware level of sensors and actuators, via the level of networked PLCs and computer systems, up to functions and classes in programming languages, demands a sound and modular software architecture, which is extendable and scalable for future changes. This paper describes this architecture, and the modular design of the software subsystems. The design is implemented in the CODAC system at the level of services and subsystems (the overall software architecture), as well as internally in the software subsystems

Iraqi architecture in mogul period

Directory of Open Access Journals (Sweden)

Hasan Shatha

2018-01-01

Full Text Available Iraqi architecture have many periods passed through it until now, each on from these periods have it is architectural style, also through time these styles interacted among us, to creating kind of space forming, space relationships, and architectural elements (detailed treatments, the research problem being from the multi interacted architectural styles causing some of confused of general characteristic to every style, that we could distinguish by it. Research tries to study architecture style through Mogul Conquest to Baghdad. Aim of research follow main characteristic for this architectural style in the Mogul periods on the level of form, elements, and treatments. Research depending on descriptive and analytical all buildings belong to this period, so from analyzing there style by, general form for building, architectural elements, and it architectural treatment, therefore; repeating this procedures to every building we get some similarities, from these similarities we can making conclusion about pure characteristic of the style of these period. Other side, we also discover some Dissimilar in the building periods, these will lead research to make what interacting among styles in this period, after all that we can drew clearly main characteristic of Architectural Style for Mogul Conquest in Baghdad

Design and Test Space Exploration of Transport-Triggered Architectures

NARCIS (Netherlands)

Zivkovic, V.; Tangelder, R.J.W.T.; Kerkhoff, Hans G.

2000-01-01

This paper describes a new approach in the high level design and test of transport-triggered architectures (TTA), a special type of application specific instruction processors (ASIP). The proposed method introduces the test as an additional constraint, besides throughput and circuit area. The

Millimeterwave Space Power Grid architecture development 2012

Science.gov (United States)

Komerath, Narayanan; Dessanti, Brendan; Shah, Shaan

This is an update of the Space Power Grid architecture for space-based solar power with an improved design of the collector/converter link, the primary heater and the radiator of the active thermal control system. The Space Power Grid offers an evolutionary approach towards TeraWatt-level Space-based solar power. The use of millimeter wave frequencies (around 220GHz) and Low-Mid Earth Orbits shrinks the size of the space and ground infrastructure to manageable levels. In prior work we showed that using Brayton cycle conversion of solar power allows large economies of scale compared to the linear mass-power relationship of photovoltaic conversion. With high-temperature materials permitting 3600 K temperature in the primary heater, over 80 percent cycle efficiency was shown with a closed helium cycle for the 1GW converter satellite which formed the core element of the architecture. Work done since the last IEEE conference has shown that the use of waveguides incorporated into lighter-than-air antenna platforms, can overcome the difficulties in transmitting millimeter wave power through the moist, dense lower atmosphere. A graphene-based radiator design conservatively meets the mass budget for the waste heat rejection system needed for the compressor inlet temperature. Placing the ultralight Mirasol collectors in lower orbits overcomes the solar beam spot size problem of high-orbit collection. The architecture begins by establishing a power exchange with terrestrial renewable energy plants, creating an early revenue generation approach with low investment. The approach allows for technology development and demonstration of high power millimeter wave technology. A multinational experiment using the International Space Station and another power exchange satellite is proposed to gather required data and experience, thus reducing the technical and policy risks. The full-scale architecture deploys pairs of Mirasol sunlight collectors and Girasol 1 GW converter satellites t

High performance cellular level agent-based simulation with FLAME for the GPU.

Science.gov (United States)

Richmond, Paul; Walker, Dawn; Coakley, Simon; Romano, Daniela

2010-05-01

Driven by the availability of experimental data and ability to simulate a biological scale which is of immediate interest, the cellular scale is fast emerging as an ideal candidate for middle-out modelling. As with 'bottom-up' simulation approaches, cellular level simulations demand a high degree of computational power, which in large-scale simulations can only be achieved through parallel computing. The flexible large-scale agent modelling environment (FLAME) is a template driven framework for agent-based modelling (ABM) on parallel architectures ideally suited to the simulation of cellular systems. It is available for both high performance computing clusters (www.flame.ac.uk) and GPU hardware (www.flamegpu.com) and uses a formal specification technique that acts as a universal modelling format. This not only creates an abstraction from the underlying hardware architectures, but avoids the steep learning curve associated with programming them. In benchmarking tests and simulations of advanced cellular systems, FLAME GPU has reported massive improvement in performance over more traditional ABM frameworks. This allows the time spent in the development and testing stages of modelling to be drastically reduced and creates the possibility of real-time visualisation for simple visual face-validation.

Integrated Nationwide Electronic Health Records system: Semi-distributed architecture approach.

Science.gov (United States)

Fragidis, Leonidas L; Chatzoglou, Prodromos D; Aggelidis, Vassilios P

2016-11-14

The integration of heterogeneous electronic health records systems by building an interoperable nationwide electronic health record system provides undisputable benefits in health care, like superior health information quality, medical errors prevention and cost saving. This paper proposes a semi-distributed system architecture approach for an integrated national electronic health record system incorporating the advantages of the two dominant approaches, the centralized architecture and the distributed architecture. The high level design of the main elements for the proposed architecture is provided along with diagrams of execution and operation and data synchronization architecture for the proposed solution. The proposed approach effectively handles issues related to redundancy, consistency, security, privacy, availability, load balancing, maintainability, complexity and interoperability of citizen's health data. The proposed semi-distributed architecture offers a robust interoperability framework without healthcare providers to change their local EHR systems. It is a pragmatic approach taking into account the characteristics of the Greek national healthcare system along with the national public administration data communication network infrastructure, for achieving EHR integration with acceptable implementation cost.

Information security architecture an integrated approach to security in the organization

CERN Document Server

Killmeyer, Jan

2000-01-01

An information security architecture is made up of several components. Each component in the architecture focuses on establishing acceptable levels of control. These controls are then applied to the operating environment of an organization. Functionally, information security architecture combines technical, practical, and cost-effective solutions to provide an adequate and appropriate level of security.Information Security Architecture: An Integrated Approach to Security in the Organization details the five key components of an information security architecture. It provides C-level executives

OS Friendly Microprocessor Architecture

Science.gov (United States)

2017-04-01

NOTES Patrick La Fratta is now affiliated with Micron Technology, Inc., Boise, Idaho. 14. ABSTRACT We present an introduction to the patented ...Operating System Friendly Microprocessor Architecture (OSFA). The software framework to support the hardware-level security features is currently patent ...Army is assignee. OS Friendly Microprocessor Architecture. United States Patent 9122610. 2015 Sep. 2. Jungwirth P, inventor; US Army is assignee

Highly Adjustable Systems: An Architecture for Future Space Observatories

Science.gov (United States)

Arenberg, Jonathan; Conti, Alberto; Redding, David; Lawrence, Charles R.; Hachkowski, Roman; Laskin, Robert; Steeves, John

2017-06-01

Mission costs for ground breaking space astronomical observatories are increasing to the point of unsustainability. We are investigating the use of adjustable or correctable systems as a means to reduce development and therefore mission costs. The poster introduces the promise and possibility of realizing a “net zero CTE” system for the general problem of observatory design and introduces the basic systems architecture we are considering. This poster concludes with an overview of our planned study and demonstrations for proving the value and worth of highly adjustable telescopes and systems ahead of the upcoming decadal survey.

2005 dossier: granite. Tome: architecture and management of the geologic disposal

International Nuclear Information System (INIS)

2005-01-01

This document makes a status of the researches carried out by the French national agency of radioactive wastes (ANDRA) about the geologic disposal of high-level and long-lived radioactive wastes in granite formations. Content: 1 - Approach of the study: main steps since the December 30, 1991 law, ANDRA's research program on disposal in granitic formations; 2 - high-level and long-lived (HLLL) wastes: production scenarios, waste categories, inventory model; 3 - disposal facility design in granitic environment: definition of the geologic disposal functions, the granitic material, general facility design options; 4 - general architecture of a disposal facility in granitic environment: surface facilities, underground facilities, disposal process, operational safety; 5 - B-type wastes disposal area: primary containers of B-type wastes, safety options, concrete containers, disposal alveoles, architecture of the B-type wastes disposal area, disposal process and feasibility aspects, functions of disposal components with time; 6 - C-type wastes disposal area: C-type wastes primary containers, safety options, super-containers, disposal alveoles, architecture of the C-type wastes disposal area, disposal process in a reversibility logics, functions of disposal components with time; 7 - spent fuels disposal area: spent fuel assemblies, safety options, spent fuel containers, disposal alveoles, architecture of the spent fuel disposal area, disposal process in a reversibility logics, functions of disposal components with time; 8 - conclusions: suitability of the architecture with various types of French granites, strong design, reversibility taken into consideration. (J.S.)

Advanced control architecture for autonomous vehicles

Science.gov (United States)

Maurer, Markus; Dickmanns, Ernst D.

1997-06-01

An advanced control architecture for autonomous vehicles is presented. The hierarchical architecture consists of four levels: a vehicle level, a control level, a rule-based level and a knowledge-based level. A special focus is on forms of internal representation, which have to be chosen adequately for each level. The control scheme is applied to VaMP, a Mercedes passenger car which autonomously performs missions on German freeways. VaMP perceives the environment with its sense of vision and conventional sensors. It controls its actuators for locomotion and attention focusing. Modules for perception, cognition and action are discussed.

Can You Hear Architecture

DEFF Research Database (Denmark)

Ryhl, Camilla

2016-01-01

Taking an off set in the understanding of architectural quality being based on multisensory architecture, the paper aims to discuss the current acoustic discourse in inclusive design and its implications to the integration of inclusive design in architectural discourse and practice as well...... as the understanding of user needs. The paper further points to the need to elaborate and nuance the discourse much more, in order to assure inclusion to the many users living with a hearing impairment or, for other reasons, with a high degree of auditory sensitivity. Using the authors’ own research on inclusive...... design and architectural quality for people with a hearing disability and a newly conducted qualitative evaluation research in Denmark as well as architectural theories on multisensory aspects of architectural experiences, the paper uses examples of existing Nordic building cases to discuss the role...

Insulator function and topological domain border strength scale with architectural protein occupancy

Science.gov (United States)

2014-01-01

Background Chromosome conformation capture studies suggest that eukaryotic genomes are organized into structures called topologically associating domains. The borders of these domains are highly enriched for architectural proteins with characterized roles in insulator function. However, a majority of architectural protein binding sites localize within topological domains, suggesting sites associated with domain borders represent a functionally different subclass of these regulatory elements. How topologically associating domains are established and what differentiates border-associated from non-border architectural protein binding sites remain unanswered questions. Results By mapping the genome-wide target sites for several Drosophila architectural proteins, including previously uncharacterized profiles for TFIIIC and SMC-containing condensin complexes, we uncover an extensive pattern of colocalization in which architectural proteins establish dense clusters at the borders of topological domains. Reporter-based enhancer-blocking insulator activity as well as endogenous domain border strength scale with the occupancy level of architectural protein binding sites, suggesting co-binding by architectural proteins underlies the functional potential of these loci. Analyses in mouse and human stem cells suggest that clustering of architectural proteins is a general feature of genome organization, and conserved architectural protein binding sites may underlie the tissue-invariant nature of topologically associating domains observed in mammals. Conclusions We identify a spectrum of architectural protein occupancy that scales with the topological structure of chromosomes and the regulatory potential of these elements. Whereas high occupancy architectural protein binding sites associate with robust partitioning of topologically associating domains and robust insulator function, low occupancy sites appear reserved for gene-specific regulation within topological domains. PMID

Minimalism in architecture: Abstract conceptualization of architecture

Directory of Open Access Journals (Sweden)

Vasilski Dragana

2015-01-01

Full Text Available Minimalism in architecture contains the idea of the minimum as a leading creative tend to be considered and interpreted in working through phenomena of empathy and abstraction. In the Western culture, the root of this idea is found in empathy of Wilhelm Worringer and abstraction of Kasimir Malevich. In his dissertation, 'Abstraction and Empathy' Worringer presented his thesis on the psychology of style through which he explained the two opposing basic forms: abstraction and empathy. His conclusion on empathy as a psychological basis of observation expression is significant due to the verbal congruence with contemporary minimalist expression. His intuition was enhenced furthermore by figure of Malevich. Abstraction, as an expression of inner unfettered inspiration, has played a crucial role in the development of modern art and architecture of the twentieth century. Abstraction, which is one of the basic methods of learning in psychology (separating relevant from irrelevant features, Carl Jung is used to discover ideas. Minimalism in architecture emphasizes the level of abstraction to which the individual functions are reduced. Different types of abstraction are present: in the form as well as function of the basic elements: walls and windows. The case study is an example of Sou Fujimoto who is unequivocal in its commitment to the autonomy of abstract conceptualization of architecture.

Implementing An Image Understanding System Architecture Using Pipe

Science.gov (United States)

Luck, Randall L.

1988-03-01

This paper will describe PIPE and how it can be used to implement an image understanding system. Image understanding is the process of developing a description of an image in order to make decisions about its contents. The tasks of image understanding are generally split into low level vision and high level vision. Low level vision is performed by PIPE -a high performance parallel processor with an architecture specifically designed for processing video images at up to 60 fields per second. High level vision is performed by one of several types of serial or parallel computers - depending on the application. An additional processor called ISMAP performs the conversion from iconic image space to symbolic feature space. ISMAP plugs into one of PIPE's slots and is memory mapped into the high level processor. Thus it forms the high speed link between the low and high level vision processors. The mechanisms for bottom-up, data driven processing and top-down, model driven processing are discussed.

User-Defined Data Distributions in High-Level Programming Languages

Science.gov (United States)

Diaconescu, Roxana E.; Zima, Hans P.

2006-01-01

One of the characteristic features of today s high performance computing systems is a physically distributed memory. Efficient management of locality is essential for meeting key performance requirements for these architectures. The standard technique for dealing with this issue has involved the extension of traditional sequential programming languages with explicit message passing, in the context of a processor-centric view of parallel computation. This has resulted in complex and error-prone assembly-style codes in which algorithms and communication are inextricably interwoven. This paper presents a high-level approach to the design and implementation of data distributions. Our work is motivated by the need to improve the current parallel programming methodology by introducing a paradigm supporting the development of efficient and reusable parallel code. This approach is currently being implemented in the context of a new programming language called Chapel, which is designed in the HPCS project Cascade.

(Invited) Wavy Channel TFT Architecture for High Performance Oxide Based Displays

KAUST Repository

Hanna, Amir; Hussain, Aftab M.; Hussain, Aftab M.; Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Sevilla, Galo T.; Hussain, Muhammad Mustafa

2015-01-01

We show the effectiveness of wavy channel architecture for thin film transistor application for increased output current. This specific architecture allows increased width of the device by adopting a corrugated shape of the substrate without any further real estate penalty. The performance improvement is attributed not only to the increased transistor width, but also to enhanced applied electric field in the channel due to the wavy architecture.

(Invited) Wavy Channel TFT Architecture for High Performance Oxide Based Displays

KAUST Repository

Hanna, Amir

2015-05-22

We show the effectiveness of wavy channel architecture for thin film transistor application for increased output current. This specific architecture allows increased width of the device by adopting a corrugated shape of the substrate without any further real estate penalty. The performance improvement is attributed not only to the increased transistor width, but also to enhanced applied electric field in the channel due to the wavy architecture.

Development of the Lymphoma Enterprise Architecture Database: A caBIG(TM Silver Level Compliant System

Directory of Open Access Journals (Sweden)

Taoying Huang

2009-01-01

Full Text Available Lymphomas are the fifth most common cancer in United States with numerous histological subtypes. Integrating existing clinical information on lymphoma patients provides a platform for understanding biological variability in presentation and treatment response and aids development of novel therapies. We developed a cancer Biomedical Informatics Grid™ (caBIG™ Silver level compliant lymphoma database, called the Lymphoma Enterprise Architecture Data-system™ (LEAD™, which integrates the pathology, pharmacy, laboratory, cancer registry, clinical trials, and clinical data from institutional databases. We utilized the Cancer Common Ontological Representation Environment Software Development Kit (caCORE SDK provided by National Cancer Institute’s Center for Bioinformatics to establish the LEAD™ platform for data management. The caCORE SDK generated system utilizes an n-tier architecture with open Application Programming Interfaces, controlled vocabularies, and registered metadata to achieve semantic integration across multiple cancer databases. We demonstrated that the data elements and structures within LEAD™ could be used to manage clinical research data from phase 1 clinical trials, cohort studies, and registry data from the Surveillance Epidemiology and End Results database. This work provides a clear example of how semantic technologies from caBIG™ can be applied to support a wide range of clinical and research tasks, and integrate data from disparate systems into a single architecture. This illustrates the central importance of caBIG™ to the management of clinical and biological data.

Development of the Lymphoma Enterprise Architecture Database: A caBIG(TM Silver Level Compliant System

Directory of Open Access Journals (Sweden)

Taoying Huang

2009-04-01

Full Text Available Lymphomas are the fifth most common cancer in United States with numerous histological subtypes. Integrating existing clinical information on lymphoma patients provides a platform for understanding biological variability in presentation and treatment response and aids development of novel therapies. We developed a cancer Biomedical Informatics Grid™ (caBIG™ Silver level compliant lymphoma database, called the Lymphoma Enterprise Architecture Data-system™ (LEAD™, which integrates the pathology, pharmacy, laboratory, cancer registry, clinical trials, and clinical data from institutional databases. We utilized the Cancer Common Ontological Representation Environment Software Development Kit (caCORE SDK provided by National Cancer Institute’s Center for Bioinformatics to establish the LEAD™ platform for data management. The caCORE SDK generated system utilizes an n-tier architecture with open Application Programming Interfaces, controlled vocabularies, and registered metadata to achieve semantic integration across multiple cancer databases. We demonstrated that the data elements and structures within LEAD™ could be used to manage clinical research data from phase 1 clinical trials, cohort studies, and registry data from the Surveillance Epidemiology and End Results database. This work provides a clear example of how semantic technologies from caBIG™ can be applied to support a wide range of clinical and research tasks, and integrate data from disparate systems into a single architecture. This illustrates the central importance of caBIG™ to the management of clinical and biological data.

Development of the Lymphoma Enterprise Architecture Database: A caBIG(tm) Silver level compliant System

Science.gov (United States)

Huang, Taoying; Shenoy, Pareen J.; Sinha, Rajni; Graiser, Michael; Bumpers, Kevin W.; Flowers, Christopher R.

2009-01-01

Lymphomas are the fifth most common cancer in United States with numerous histological subtypes. Integrating existing clinical information on lymphoma patients provides a platform for understanding biological variability in presentation and treatment response and aids development of novel therapies. We developed a cancer Biomedical Informatics Grid™ (caBIG™) Silver level compliant lymphoma database, called the Lymphoma Enterprise Architecture Data-system™ (LEAD™), which integrates the pathology, pharmacy, laboratory, cancer registry, clinical trials, and clinical data from institutional databases. We utilized the Cancer Common Ontological Representation Environment Software Development Kit (caCORE SDK) provided by National Cancer Institute’s Center for Bioinformatics to establish the LEAD™ platform for data management. The caCORE SDK generated system utilizes an n-tier architecture with open Application Programming Interfaces, controlled vocabularies, and registered metadata to achieve semantic integration across multiple cancer databases. We demonstrated that the data elements and structures within LEAD™ could be used to manage clinical research data from phase 1 clinical trials, cohort studies, and registry data from the Surveillance Epidemiology and End Results database. This work provides a clear example of how semantic technologies from caBIG™ can be applied to support a wide range of clinical and research tasks, and integrate data from disparate systems into a single architecture. This illustrates the central importance of caBIG™ to the management of clinical and biological data. PMID:19492074

Execution Management in the Virtual Ship Architecture Issue 1.00

National Research Council Canada - National Science Library

Cramp, Anthony

2000-01-01

The Virtual Ship is an application of the High Level Architecture (HLA) in which simulation models that represent the components of a warship are brought together in a distributed manner to create a virtual representation of a warship...

Digital Architecture – Results From a Gap Analysis

Energy Technology Data Exchange (ETDEWEB)

Oxstrand, Johanna Helene [Idaho National Lab. (INL), Idaho Falls, ID (United States); Thomas, Kenneth David [Idaho National Lab. (INL), Idaho Falls, ID (United States); Fitzgerald, Kirk [Idaho National Lab. (INL), Idaho Falls, ID (United States)

2015-09-01

The digital architecture is defined as a collection of IT capabilities needed to support and integrate a wide-spectrum of real-time digital capabilities for nuclear power plant performance improvements. The digital architecture can be thought of as an integration of the separate I&C and information systems already in place in NPPs, brought together for the purpose of creating new levels of automation in NPP work activities. In some cases, it might be an extension of the current communication systems, to provide digital communications where they are currently analog only. This collection of IT capabilities must in turn be based on a set of user requirements that must be supported for the interconnected technologies to operate in an integrated manner. These requirements, simply put, are a statement of what sorts of digital work functions will be exercised in a fully-implemented seamless digital environment and how much they will be used. The goal of the digital architecture research is to develop a methodology for mapping nuclear power plant operational and support activities into the digital architecture, which includes the development of a consensus model for advanced information and control architecture. The consensus model should be developed at a level of detail that is useful to the industry. In other words, not so detailed that it specifies specific protocols and not so vague that it is only provides a high level description of technology. The next step towards the model development is to determine the current state of digital architecture at typical NPPs. To investigate the current state, the researchers conducted a gap analysis to determine to what extent the NPPs can support the future digital technology environment with their existing I&C and IT structure, and where gaps exist with respect to the full deployment of technology over time. The methodology, result, and conclusions from the gap analysis are described in this report.

Selecting a High-Quality Central Model for Sharing Architectural Knowledge

NARCIS (Netherlands)

Liang, Peng; Jansen, Anton; Avgeriou, Paris; Zhu, H

2008-01-01

In the field of software architecture, there has been a paradigm shift front describing the outcome of architecting process to documenting Architectural Knowledge (AK), such as design decisions and rationale. To this end, a series of domain models have been proposed for defining the concepts and

RWebData: A High-Level Interface to the Programmable Web

Directory of Open Access Journals (Sweden)

Ulrich Matter

2018-02-01

Full Text Available The rise of the programmable web offers new opportunities for the empirically driven sciences. The access to, compilation and preparation of data from the programmable web for statistical analysis can, however, involve substantial up-front costs for the practical researcher. The 'R'-package RWebData provides a high-level framework that allows data to be easily collected from the programmable web in a format that can be used directly for statistical analysis in 'R' without bothering about the data’s initial format and nesting structure. It was developed specifically for users who have no experience with web technologies and merely use 'R' as statistics software. This paper provides an overview of the high-level functions, explains the basic architecture of the package, illustrates the implemented data mapping algorithm, and discusses RWebData’s further development and reuse potential.   Funding statement: The author acknowledges financial support from the University of Basel Research Fund as well as support from the Swiss National Science Foundation (grant 168848.

The FAIR timing master: a discussion of performance requirements and architectures for a high-precision timing system

International Nuclear Information System (INIS)

Kreider, M.

2012-01-01

Production chains in a particle accelerator are complex structures with many inter-dependencies and multiple paths to consider. This ranges from system initialization and synchronization of numerous machines to interlock handling and appropriate contingency measures like beam dump scenarios. The FAIR facility will employ White-Rabbit, a time based system which delivers an instruction and a corresponding execution time to a machine. In order to meet the deadlines in any given production chain, instructions need to be sent out ahead of time. For this purpose, code execution and message delivery times need to be known in advance. The FAIR Timing Master needs to be reliably capable of satisfying these timing requirements as well as being fault tolerant. Event sequences of recorded production chains indicate that low reaction times to internal and external events and fast, parallel execution are required. This suggests a slim architecture, especially devised for this purpose. Using the thread model of an OS or other high level programs on a generic CPU would be counterproductive when trying to achieve deterministic processing times. This paper deals with the analysis of said requirements as well as a comparison of known processor and virtual machine architectures and the possibilities of parallelization in programmable hardware. In addition, existing proposals at GSI will be checked against these findings. The final goal will be to determine the best instruction set for modeling any given production chain and devising a suitable architecture to execute these models. (authors)

L-Band Digital Aeronautical Communications System Engineering - Concepts of Use, Systems Performance, Requirements, and Architectures

Science.gov (United States)

Zelkin, Natalie; Henriksen, Stephen

2010-01-01

This NASA Contractor Report summarizes and documents the work performed to develop concepts of use (ConUse) and high-level system requirements and architecture for the proposed L-band (960 to 1164 MHz) terrestrial en route communications system. This work was completed as a follow-on to the technology assessment conducted by NASA Glenn Research Center and ITT for the Future Communications Study (FCS). ITT assessed air-to-ground (A/G) communications concepts of use and operations presented in relevant NAS-level, international, and NAS-system-level documents to derive the appropriate ConUse relevant to potential A/G communications applications and services for domestic continental airspace. ITT also leveraged prior concepts of use developed during the earlier phases of the FCS. A middle-out functional architecture was adopted by merging the functional system requirements identified in the bottom-up assessment of existing requirements with those derived as a result of the top-down analysis of ConUse and higher level functional requirements. Initial end-to-end system performance requirements were derived to define system capabilities based on the functional requirements and on NAS-SR-1000 and the Operational Performance Assessment conducted as part of the COCR. A high-level notional architecture of the L-DACS supporting A/G communication was derived from the functional architecture and requirements.

Nest-like LiFePO4/C architectures for high performance lithium ion batteries

International Nuclear Information System (INIS)

Deng Honggui; Jin Shuangling; Zhan Liang; Qiao Wenming; Ling Licheng

2012-01-01

Highlights: ► Nest-like LiFePO 4 /C architectures (nest-like LPCs) were synthesized by solvothermal method. ► The microstructures of nest-like LPCs are very stable constructed by many nanosheets. ► The unique structures offer nest-like LPC electrode with high rate performance. ► The reversible capacity of nest-like LPCs electrode is as high as 120 mAh g −1 at 10 C. - Abstract: A novel kind of microsized nest-like LiFePO 4 /C architectures was synthesized by solvothermal method using inexpensive and stable Fe 3+ salt as iron source and ethylene glycol as mediate. A layer of carbon could be coated directly on the surface of LiFePO 4 crystals and the nest-like unique structures offer the cathode materials with high reversible capacity, excellent cycling stability and high rate performance. The reversible capacity can maintain 159 mAh g −1 at 0.1 C and 120 mAh g −1 at 10 C.

Network architectures and protocols for the integration of ACTS and ISDN

Science.gov (United States)

Chitre, D. M.; Lowry, P. A.

1992-01-01

A close integration of satellite networks and the integrated services digital network (ISDN) is essential for satellite networks to carry ISDN traffic effectively. This also shows how a given (pre-ISDN) satellite network architecture can be enhanced to handle ISDN signaling and provide ISDN services. It also describes the functional architecture and high-level protocols that could be implemented in the NASA Advanced Communications Technology Satellite (ACTS) low burst rate communications system to provide ISDN services.

A Layered Component-Based Architecture of a Virtual Learning Environment

NARCIS (Netherlands)

Avgeriou, Paris; Retalis, Simos; Skordalakis, Manolis; Psaromiligos, Yiannis

2001-01-01

There exists an urgent demand on defining architectures for Virtual Learning Environments (VLEs), so that high-level frameworks for understanding these systems can be discovered, portability, interoperability and reusability can be achieved and adaptability over time can be accomplished. In this

A supportive architecture for CFD-based design optimisation

Science.gov (United States)

Li, Ni; Su, Zeya; Bi, Zhuming; Tian, Chao; Ren, Zhiming; Gong, Guanghong

2014-03-01

Multi-disciplinary design optimisation (MDO) is one of critical methodologies to the implementation of enterprise systems (ES). MDO requiring the analysis of fluid dynamics raises a special challenge due to its extremely intensive computation. The rapid development of computational fluid dynamic (CFD) technique has caused a rise of its applications in various fields. Especially for the exterior designs of vehicles, CFD has become one of the three main design tools comparable to analytical approaches and wind tunnel experiments. CFD-based design optimisation is an effective way to achieve the desired performance under the given constraints. However, due to the complexity of CFD, integrating with CFD analysis in an intelligent optimisation algorithm is not straightforward. It is a challenge to solve a CFD-based design problem, which is usually with high dimensions, and multiple objectives and constraints. It is desirable to have an integrated architecture for CFD-based design optimisation. However, our review on existing works has found that very few researchers have studied on the assistive tools to facilitate CFD-based design optimisation. In the paper, a multi-layer architecture and a general procedure are proposed to integrate different CFD toolsets with intelligent optimisation algorithms, parallel computing technique and other techniques for efficient computation. In the proposed architecture, the integration is performed either at the code level or data level to fully utilise the capabilities of different assistive tools. Two intelligent algorithms are developed and embedded with parallel computing. These algorithms, together with the supportive architecture, lay a solid foundation for various applications of CFD-based design optimisation. To illustrate the effectiveness of the proposed architecture and algorithms, the case studies on aerodynamic shape design of a hypersonic cruising vehicle are provided, and the result has shown that the proposed architecture

Extending enterprise architecture modelling with business goals and requirements

Science.gov (United States)

Engelsman, Wilco; Quartel, Dick; Jonkers, Henk; van Sinderen, Marten

2011-02-01

The methods for enterprise architecture (EA), such as The Open Group Architecture Framework, acknowledge the importance of requirements modelling in the development of EAs. Modelling support is needed to specify, document, communicate and reason about goals and requirements. The current modelling techniques for EA focus on the products, services, processes and applications of an enterprise. In addition, techniques may be provided to describe structured requirements lists and use cases. Little support is available however for modelling the underlying motivation of EAs in terms of stakeholder concerns and the high-level goals that address these concerns. This article describes a language that supports the modelling of this motivation. The definition of the language is based on existing work on high-level goal and requirements modelling and is aligned with an existing standard for enterprise modelling: the ArchiMate language. Furthermore, the article illustrates how EA can benefit from analysis techniques from the requirements engineering domain.

Building Design Guidelines of Interior Architecture for Bio safety Levels of Biology Laboratories

International Nuclear Information System (INIS)

ElDib, A.A.

2014-01-01

This paper discusses the pivotal role of the Interior Architecture As one of the scientific disciplines minute to complete the Architectural Sciences, which relied upon the achievement and development of facilities containing scientific research laboratories, in terms of planning and design, particularly those containing biological laboratories using radioactive materials, adding to that, the application of the materials or raw materials commensurate with each discipline of laboratory and its work nature, and by the discussion the processing of design techniques and requirements of interior architecture dealing with Research Laboratory for electronic circuits an their applications with the making of its prototypes

TS-05: 150 lines of java with high architectural complexity

DEFF Research Database (Denmark)

Christensen, Henrik Bærbak

2005-01-01

In the short time span available in a software architecture course, it is difficult to find a software system that is both interesting from an architectural perspective and so small that it does not overwhelm the students.We present TS-05 which is a bare 150 line Java "toy-system" that never...

Models for Evaluating and Improving Architecture Competence

National Research Council Canada - National Science Library

Bass, Len; Clements, Paul; Kazman, Rick; Klein, Mark

2008-01-01

... producing high-quality architectures. This report lays out the basic concepts of software architecture competence and describes four models for explaining, measuring, and improving the architecture competence of an individual...

The column architecture -- A novel architecture for event driven 2D pixel imagers

International Nuclear Information System (INIS)

Millaud, J.; Nygren, D.

1996-01-01

The authors describe an electronic architecture for two-dimensional pixel arrays that permits very large increases in rate capability for event- or data-driven applications relative to conventional x-y architectures. The column architecture also permits more efficient use of silicon area in applications requiring local buffering, frameless data acquisition, and it avoids entirely the problem of ambiguities that may arise in conventional approaches. Two examples of active implementation are described: high energy physics and protein crystallography

High Resolution Genomic Scans Reveal Genetic Architecture Controlling Alcohol Preference in Bidirectionally Selected Rat Model.

Directory of Open Access Journals (Sweden)

Chiao-Ling Lo

2016-08-01

Full Text Available Investigations on the influence of nature vs. nurture on Alcoholism (Alcohol Use Disorder in human have yet to provide a clear view on potential genomic etiologies. To address this issue, we sequenced a replicated animal model system bidirectionally-selected for alcohol preference (AP. This model is uniquely suited to map genetic effects with high reproducibility, and resolution. The origin of the rat lines (an 8-way cross resulted in small haplotype blocks (HB with a corresponding high level of resolution. We sequenced DNAs from 40 samples (10 per line of each replicate to determine allele frequencies and HB. We achieved ~46X coverage per line and replicate. Excessive differentiation in the genomic architecture between lines, across replicates, termed signatures of selection (SS, were classified according to gene and region. We identified SS in 930 genes associated with AP. The majority (50% of the SS were confined to single gene regions, the greatest numbers of which were in promoters (284 and intronic regions (169 with the least in exon's (4, suggesting that differences in AP were primarily due to alterations in regulatory regions. We confirmed previously identified genes and found many new genes associated with AP. Of those newly identified genes, several demonstrated neuronal function involved in synaptic memory and reward behavior, e.g. ion channels (Kcnf1, Kcnn3, Scn5a, excitatory receptors (Grin2a, Gria3, Grip1, neurotransmitters (Pomc, and synapses (Snap29. This study not only reveals the polygenic architecture of AP, but also emphasizes the importance of regulatory elements, consistent with other complex traits.

High Resolution Genomic Scans Reveal Genetic Architecture Controlling Alcohol Preference in Bidirectionally Selected Rat Model.

Science.gov (United States)

Lo, Chiao-Ling; Lossie, Amy C; Liang, Tiebing; Liu, Yunlong; Xuei, Xiaoling; Lumeng, Lawrence; Zhou, Feng C; Muir, William M

2016-08-01

Investigations on the influence of nature vs. nurture on Alcoholism (Alcohol Use Disorder) in human have yet to provide a clear view on potential genomic etiologies. To address this issue, we sequenced a replicated animal model system bidirectionally-selected for alcohol preference (AP). This model is uniquely suited to map genetic effects with high reproducibility, and resolution. The origin of the rat lines (an 8-way cross) resulted in small haplotype blocks (HB) with a corresponding high level of resolution. We sequenced DNAs from 40 samples (10 per line of each replicate) to determine allele frequencies and HB. We achieved ~46X coverage per line and replicate. Excessive differentiation in the genomic architecture between lines, across replicates, termed signatures of selection (SS), were classified according to gene and region. We identified SS in 930 genes associated with AP. The majority (50%) of the SS were confined to single gene regions, the greatest numbers of which were in promoters (284) and intronic regions (169) with the least in exon's (4), suggesting that differences in AP were primarily due to alterations in regulatory regions. We confirmed previously identified genes and found many new genes associated with AP. Of those newly identified genes, several demonstrated neuronal function involved in synaptic memory and reward behavior, e.g. ion channels (Kcnf1, Kcnn3, Scn5a), excitatory receptors (Grin2a, Gria3, Grip1), neurotransmitters (Pomc), and synapses (Snap29). This study not only reveals the polygenic architecture of AP, but also emphasizes the importance of regulatory elements, consistent with other complex traits.

Space Elevators Preliminary Architectural View

Science.gov (United States)

Pullum, L.; Swan, P. A.

Space Systems Architecture has been expanded into a process by the US Department of Defense for their large scale systems of systems development programs. This paper uses the steps in the process to establishes a framework for Space Elevator systems to be developed and provides a methodology to manage complexity. This new approach to developing a family of systems is based upon three architectural views: Operational View OV), Systems View (SV), and Technical Standards View (TV). The top level view of the process establishes the stages for the development of the first Space Elevator and is called Architectural View - 1, Overview and Summary. This paper will show the guidelines and steps of the process while focusing upon components of the Space Elevator Preliminary Architecture View. This Preliminary Architecture View is presented as a draft starting point for the Space Elevator Project.

Style grammars for interactive visualization of architecture.

Science.gov (United States)

Aliaga, Daniel G; Rosen, Paul A; Bekins, Daniel R

2007-01-01

Interactive visualization of architecture provides a way to quickly visualize existing or novel buildings and structures. Such applications require both fast rendering and an effortless input regimen for creating and changing architecture using high-level editing operations that automatically fill in the necessary details. Procedural modeling and synthesis is a powerful paradigm that yields high data amplification and can be coupled with fast-rendering techniques to quickly generate plausible details of a scene without much or any user interaction. Previously, forward generating procedural methods have been proposed where a procedure is explicitly created to generate particular content. In this paper, we present our work in inverse procedural modeling of buildings and describe how to use an extracted repertoire of building grammars to facilitate the visualization and quick modification of architectural structures and buildings. We demonstrate an interactive application where the user draws simple building blocks and, using our system, can automatically complete the building "in the style of" other buildings using view-dependent texture mapping or nonphotorealistic rendering techniques. Our system supports an arbitrary number of building grammars created from user subdivided building models and captured photographs. Using only edit, copy, and paste metaphors, the entire building styles can be altered and transferred from one building to another in a few operations, enhancing the ability to modify an existing architectural structure or to visualize a novel building in the style of the others.

Making sense of mobile health data: an open architecture to improve individual- and population-level health.

Science.gov (United States)

Chen, Connie; Haddad, David; Selsky, Joshua; Hoffman, Julia E; Kravitz, Richard L; Estrin, Deborah E; Sim, Ida

2012-08-09

Mobile phones and devices, with their constant presence, data connectivity, and multiple intrinsic sensors, can support around-the-clock chronic disease prevention and management that is integrated with daily life. These mobile health (mHealth) devices can produce tremendous amounts of location-rich, real-time, high-frequency data. Unfortunately, these data are often full of bias, noise, variability, and gaps. Robust tools and techniques have not yet been developed to make mHealth data more meaningful to patients and clinicians. To be most useful, health data should be sharable across multiple mHealth applications and connected to electronic health records. The lack of data sharing and dearth of tools and techniques for making sense of health data are critical bottlenecks limiting the impact of mHealth to improve health outcomes. We describe Open mHealth, a nonprofit organization that is building an open software architecture to address these data sharing and "sense-making" bottlenecks. Our architecture consists of open source software modules with well-defined interfaces using a minimal set of common metadata. An initial set of modules, called InfoVis, has been developed for data analysis and visualization. A second set of modules, our Personal Evidence Architecture, will support scientific inferences from mHealth data. These Personal Evidence Architecture modules will include standardized, validated clinical measures to support novel evaluation methods, such as n-of-1 studies. All of Open mHealth's modules are designed to be reusable across multiple applications, disease conditions, and user populations to maximize impact and flexibility. We are also building an open community of developers and health innovators, modeled after the open approach taken in the initial growth of the Internet, to foster meaningful cross-disciplinary collaboration around new tools and techniques. An open mHealth community and architecture will catalyze increased mHealth efficiency

Investigation of Transformer Winding Architectures for High Voltage Capacitor Charging Applications

DEFF Research Database (Denmark)

Schneider, Henrik; Thummala, Prasanth; Huang, Lina

2014-01-01

Transformer parameters such as leakage inductance and self-capacitance are rarely calculated in advance during the design phase, because of the complexity and huge analytical error margins caused by practical winding implementation issues. Thus, choosing one transformer architecture over another ...... converter used to drive a dielectric electro active polymer based incremental actuator. The total losses due to the transformer parasitics for the best transformer architectures is reduced by more than a factor of ten compared to the worst case transformer architectures....

Computer programming and architecture the VAX

CERN Document Server

Levy, Henry

2014-01-01

Takes a unique systems approach to programming and architecture of the VAXUsing the VAX as a detailed example, the first half of this book offers a complete course in assembly language programming. The second describes higher-level systems issues in computer architecture. Highlights include the VAX assembler and debugger, other modern architectures such as RISCs, multiprocessing and parallel computing, microprogramming, caches and translation buffers, and an appendix on the Berkeley UNIX assembler.

Sustainable, Reliable Mission-Systems Architecture

Science.gov (United States)

O'Neil, Graham; Orr, James K.; Watson, Steve

2007-01-01

A mission-systems architecture, based on a highly modular infrastructure utilizing: open-standards hardware and software interfaces as the enabling technology is essential for affordable and sustainable space exploration programs. This mission-systems architecture requires (a) robust communication between heterogeneous system, (b) high reliability, (c) minimal mission-to-mission reconfiguration, (d) affordable development, system integration, and verification of systems, and (e) minimal sustaining engineering. This paper proposes such an architecture. Lessons learned from the Space Shuttle program and Earthbound complex engineered system are applied to define the model. Technology projections reaching out 5 years are mde to refine model details.

Transcriptional decomposition reveals active chromatin architectures and cell specific regulatory interactions

DEFF Research Database (Denmark)

Rennie, Sarah; Dalby, Maria; van Duin, Lucas

2018-01-01

Transcriptional regulation is tightly coupled with chromosomal positioning and three-dimensional chromatin architecture. However, it is unclear what proportion of transcriptional activity is reflecting such organisation, how much can be informed by RNA expression alone and how this impacts disease...... proportion of total levels and is highly informative of topological associating domain activities and organisation, revealing boundaries and chromatin compartments. Furthermore, expression data alone accurately predict individual enhancer-promoter interactions, drawing features from expression strength...... between transcription and chromatin architecture....

Architectural frameworks: defining the structures for implementing learning health systems.

Science.gov (United States)

Lessard, Lysanne; Michalowski, Wojtek; Fung-Kee-Fung, Michael; Jones, Lori; Grudniewicz, Agnes

2017-06-23

The vision of transforming health systems into learning health systems (LHSs) that rapidly and continuously transform knowledge into improved health outcomes at lower cost is generating increased interest in government agencies, health organizations, and health research communities. While existing initiatives demonstrate that different approaches can succeed in making the LHS vision a reality, they are too varied in their goals, focus, and scale to be reproduced without undue effort. Indeed, the structures necessary to effectively design and implement LHSs on a larger scale are lacking. In this paper, we propose the use of architectural frameworks to develop LHSs that adhere to a recognized vision while being adapted to their specific organizational context. Architectural frameworks are high-level descriptions of an organization as a system; they capture the structure of its main components at varied levels, the interrelationships among these components, and the principles that guide their evolution. Because these frameworks support the analysis of LHSs and allow their outcomes to be simulated, they act as pre-implementation decision-support tools that identify potential barriers and enablers of system development. They thus increase the chances of successful LHS deployment. We present an architectural framework for LHSs that incorporates five dimensions-goals, scientific, social, technical, and ethical-commonly found in the LHS literature. The proposed architectural framework is comprised of six decision layers that model these dimensions. The performance layer models goals, the scientific layer models the scientific dimension, the organizational layer models the social dimension, the data layer and information technology layer model the technical dimension, and the ethics and security layer models the ethical dimension. We describe the types of decisions that must be made within each layer and identify methods to support decision-making. In this paper, we outline

Space and Architecture's Current Line of Research? A Lunar Architecture Workshop With An Architectural Agenda.

Science.gov (United States)

Solomon, D.; van Dijk, A.

space context that will be useful on Earth on a conceptual and practical level? * In what ways could architecture's field of reference offer building on the Moon (and other celestial bodies) a paradigm shift? 1 In addition to their models and designs, workshop participants will begin authoring a design recommendation for the building of (infra-) structures and habitats on celestial bodies in particular the Moon and Mars. The design recommendation, a substantiated aesthetic code of conduct (not legally binding) will address long term planning and incorporate issues of sustainability, durability, bio-diversity, infrastructure, CHANGE, and techniques that lend themselves to Earth-bound applications. It will also address the cultural implications of architectural design might have within the context of space exploration. The design recommendation will ultimately be presented for peer review to both the space and architecture communities. What would the endorsement from the architectural community of such a document mean to the space community? The Lunar Architecture Workshop is conceptualised, produced and organised by(in alphabetical order): Alexander van Dijk, Art Race in Space, Barbara Imhof; ES- CAPE*spHERE, Vienna, University of Technology, Institute for Design and Building Construction, Vienna, Bernard Foing; ESA SMART1 Project Scientist, Susmita Mo- hanty; MoonFront, LLC, Hans Schartner' Vienna University of Technology, Institute for Design and Building Construction, Debra Solomon; Art Race in Space, Dutch Art Institute, Paul van Susante; Lunar Explorers Society. Workshop locations: ESTEC, Noordwijk, NL and V2_Lab, Rotterdam, NL Workshop dates: June 3-16, 2002 (a Call for Participation will be made in March -April 2002.) 2

An ontology-based approach for modelling architectural styles

OpenAIRE

Pahl, Claus; Giesecke, Simon; Hasselbring, Wilhelm

2007-01-01

peer-reviewed The conceptual modelling of software architectures is of central importance for the quality of a software system. A rich modelling language is required to integrate the different aspects of architecture modelling, such as architectural styles, structural and behavioural modelling, into a coherent framework.We propose an ontological approach for architectural style modelling based on description logic as an abstract, meta-level modelling instrument. Architect...

Ultra-High Density Holographic Memory Module with Solid-State Architecture

Science.gov (United States)

Markov, Vladimir B.

2000-01-01

NASA's terrestrial. space, and deep-space missions require technology that allows storing. retrieving, and processing a large volume of information. Holographic memory offers high-density data storage with parallel access and high throughput. Several methods exist for data multiplexing based on the fundamental principles of volume hologram selectivity. We recently demonstrated that a spatial (amplitude-phase) encoding of the reference wave (SERW) looks promising as a way to increase the storage density. The SERW hologram offers a method other than traditional methods of selectivity, such as spatial de-correlation between recorded and reconstruction fields, In this report we present the experimental results of the SERW-hologram memory module with solid-state architecture, which is of particular interest for space operations.

Experimental Demonstration of a Self-organized Architecture for Emerging Grid Computing Applications on OBS Testbed

Science.gov (United States)

Liu, Lei; Hong, Xiaobin; Wu, Jian; Lin, Jintong

As Grid computing continues to gain popularity in the industry and research community, it also attracts more attention from the customer level. The large number of users and high frequency of job requests in the consumer market make it challenging. Clearly, all the current Client/Server(C/S)-based architecture will become unfeasible for supporting large-scale Grid applications due to its poor scalability and poor fault-tolerance. In this paper, based on our previous works [1, 2], a novel self-organized architecture to realize a highly scalable and flexible platform for Grids is proposed. Experimental results show that this architecture is suitable and efficient for consumer-oriented Grids.

The architecture and artistic features of high-rise buildings in USSR and the United States of America during the first half of the twentieth century

Directory of Open Access Journals (Sweden)

Golovina Svetlana

2018-01-01

Full Text Available Skyscraper is a significant architectural structure in the world's largest cities. The appearance of a skyscraper in the city's architectural composition enhances its status, introduces dynamics into the shape of the city, modernizes the existing environment. Its architectural structure which can have both expressive triumphal forms and ascetic ones. For a deep understanding of the architecture of high-rise buildings must be considered by several criteria. Various approaches can be found in the competitive development of high-rise buildings in Moscow and the US cities in the middle of the twentieth century In this article we will consider how and on the basis of what the architectural decisions of high-rise buildings were formed.

The architecture and artistic features of high-rise buildings in USSR and the United States of America during the first half of the twentieth century

Science.gov (United States)

Golovina, Svetlana; Oblasov, Yurii

2018-03-01

Skyscraper is a significant architectural structure in the world's largest cities. The appearance of a skyscraper in the city's architectural composition enhances its status, introduces dynamics into the shape of the city, modernizes the existing environment. Its architectural structure which can have both expressive triumphal forms and ascetic ones. For a deep understanding of the architecture of high-rise buildings must be considered by several criteria. Various approaches can be found in the competitive development of high-rise buildings in Moscow and the US cities in the middle of the twentieth century In this article we will consider how and on the basis of what the architectural decisions of high-rise buildings were formed.

An integrated architecture for shallow and deep processing

OpenAIRE

Crysmann, Berthold; Frank, Anette; Kiefer, Bernd; Müller, Stefan; Neumann, Günter; Piskorski, Jakub; Schäfer, Ulrich; Siegel, Melanie; Uszkoreit, Hans; Xu, Feiyu; Becker, Markus; Krieger, Hans-Ulrich

2011-01-01

We present an architecture for the integration of shallow and deep NLP components which is aimed at flexible combination of different language technologies for a range of practical current and future applications. In particular, we describe the integration of a high-level HPSG parsing system with different high-performance shallow components, ranging from named entity recognition to chunk parsing and shallow clause recognition. The NLP components enrich a representation of natural language te...

Architecture Between Mind and Empirical Experience

Directory of Open Access Journals (Sweden)

Shatha Abbas Hassan

2016-10-01

Full Text Available The research aims to identify the level of balance in the architectural thought influenced by the rational type human consciousness, the materialistic based on the Empirical type, moral based on human experience as source of knowledge. This was reflected in architecture in the specialized thought that the mind is the source of knowledge which explains the phenomena of life. The rational approach based on objectivity and methodology in (Form Production, the other approach is based on subjectivity in form production (Form Inspiration. The research problem is that there is imbalance in the relationship between the rational side and the human experience in architecture, which led into imbalance between theory and application in architecture according to architectural movements.

DReAM: Demand Response Architecture for Multi-level District Heating and Cooling Networks

Energy Technology Data Exchange (ETDEWEB)

Bhattacharya, Saptarshi; Chandan, Vikas; Arya, Vijay; Kar, Koushik

2017-05-19

In this paper, we exploit the inherent hierarchy of heat exchangers in District Heating and Cooling (DHC) networks and propose DReAM, a novel Demand Response (DR) architecture for Multi-level DHC networks. DReAM serves to economize system operation while still respecting comfort requirements of individual consumers. Contrary to many present day DR schemes that work on a consumer level granularity, DReAM works at a level of hierarchy above buildings, i.e. substations that supply heat to a group of buildings. This improves the overall DR scalability and reduce the computational complexity. In the first step of the proposed approach, mathematical models of individual substations and their downstream networks are abstracted into appropriately constructed low-complexity structural forms. In the second step, this abstracted information is employed by the utility to perform DR optimization that determines the optimal heat inflow to individual substations rather than buildings, in order to achieve the targeted objectives across the network. We validate the proposed DReAM framework through experimental results under different scenarios on a test network.

A hardware architecture for real-time shadow removal in high-contrast video

Science.gov (United States)

Verdugo, Pablo; Pezoa, Jorge E.; Figueroa, Miguel

2017-09-01

Broadcasting an outdoor sports event at daytime is a challenging task due to the high contrast that exists between areas in the shadow and light conditions within the same scene. Commercial cameras typically do not handle the high dynamic range of such scenes in a proper manner, resulting in broadcast streams with very little shadow detail. We propose a hardware architecture for real-time shadow removal in high-resolution video, which reduces the shadow effect and simultaneously improves shadow details. The algorithm operates only on the shadow portions of each video frame, thus improving the results and producing more realistic images than algorithms that operate on the entire frame, such as simplified Retinex and histogram shifting. The architecture receives an input in the RGB color space, transforms it into the YIQ space, and uses color information from both spaces to produce a mask of the shadow areas present in the image. The mask is then filtered using a connected components algorithm to eliminate false positives and negatives. The hardware uses pixel information at the edges of the mask to estimate the illumination ratio between light and shadow in the image, which is then used to correct the shadow area. Our prototype implementation simultaneously processes up to 7 video streams of 1920×1080 pixels at 60 frames per second on a Xilinx Kintex-7 XC7K325T FPGA.

A Systems Engineering Approach to Architecture Development

Science.gov (United States)

Di Pietro, David A.

2015-01-01

Architecture development is often conducted prior to system concept design when there is a need to determine the best-value mix of systems that works collectively in specific scenarios and time frames to accomplish a set of mission area objectives. While multiple architecture frameworks exist, they often require use of unique taxonomies and data structures. In contrast, this paper characterizes architecture development using terminology widely understood within the systems engineering community. Using a notional civil space architecture example, it employs a multi-tier framework to describe the enterprise level architecture and illustrates how results of lower tier, mission area architectures integrate into the enterprise architecture. It also presents practices for conducting effective mission area architecture studies, including establishing the trade space, developing functions and metrics, evaluating the ability of potential design solutions to meet the required functions, and expediting study execution through the use of iterative design cycles

Roofline model toolkit: A practical tool for architectural and program analysis

Energy Technology Data Exchange (ETDEWEB)

Lo, Yu Jung [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Williams, Samuel [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Van Straalen, Brian [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Ligocki, Terry J. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Cordery, Matthew J. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Wright, Nicholas J. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Hall, Mary W. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Oliker, Leonid [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)

2015-04-18

We present preliminary results of the Roofline Toolkit for multicore, many core, and accelerated architectures. This paper focuses on the processor architecture characterization engine, a collection of portable instrumented micro benchmarks implemented with Message Passing Interface (MPI), and OpenMP used to express thread-level parallelism. These benchmarks are specialized to quantify the behavior of different architectural features. Compared to previous work on performance characterization, these microbenchmarks focus on capturing the performance of each level of the memory hierarchy, along with thread-level parallelism, instruction-level parallelism and explicit SIMD parallelism, measured in the context of the compilers and run-time environments. We also measure sustained PCIe throughput with four GPU memory managed mechanisms. By combining results from the architecture characterization with the Roofline model based solely on architectural specifications, this work offers insights for performance prediction of current and future architectures and their software systems. To that end, we instrument three applications and plot their resultant performance on the corresponding Roofline model when run on a Blue Gene/Q architecture.

The CMS High Level Trigger System: Experience and Future Development

CERN Document Server

Bauer, Gerry; Bowen, Matthew; Branson, James G; Bukowiec, Sebastian; Cittolin, Sergio; Coarasa, J A; Deldicque, Christian; Dobson, Marc; Dupont, Aymeric; Erhan, Samim; Flossdorf, Alexander; Gigi, Dominique; Glege, Frank; Gomez-Reino, R; Hartl, Christian; Hegeman, Jeroen; Holzner, André; Y L Hwong; Masetti, Lorenzo; Meijers, Frans; Meschi, Emilio; Mommsen, R K; O'Dell, Vivian; Orsini, Luciano; Paus, Christoph; Petrucci, Andrea; Pieri, Marco; Polese, Giovanni; Racz, Attila; Raginel, Olivier; Sakulin, Hannes; Sani, Matteo; Schwick, Christoph; Shpakov, Dennis; Simon, M; Spataru, A C; Sumorok, Konstanty

2012-01-01

The CMS experiment at the LHC features a two-level trigger system. Events accepted by the first level trigger, at a maximum rate of 100 kHz, are read out by the Data Acquisition system (DAQ), and subsequently assembled in memory in a farm of computers running a software high-level trigger (HLT), which selects interesting events for offline storage and analysis at a rate of order few hundred Hz. The HLT algorithms consist of sequences of offline-style reconstruction and filtering modules, executed on a farm of 0(10000) CPU cores built from commodity hardware. Experience from the operation of the HLT system in the collider run 2010/2011 is reported. The current architecture of the CMS HLT, its integration with the CMS reconstruction framework and the CMS DAQ, are discussed in the light of future development. The possible short- and medium-term evolution of the HLT software infrastructure to support extensions of the HLT computing power, and to address remaining performance and maintenance issues, are discussed.

ARCHITECTURE IN EFFECT: A Glance at Critical Historiography

Directory of Open Access Journals (Sweden)

Navid Gohardani

2014-03-01

Full Text Available Historiography marks a relatively unexplored research domain in architecture. Despite the obscure nature of this subject matter, architectural historiography equally illuminates a hidden pathway to the historical interaction of architecture with art or literature. Critical historiography adds another dimension to this emerging research topic that further encapsulates multiple levels of criticism. In recognition of a growing interest for historiography, it can be argued that the critical aspects of historiography may serve as crucial instruments for an enhanced understanding of architectural historiography. In this article, the realm of architectural historiography is investigated through a multidisciplinary perspective that revisits architectural criticism, critical historiography, modern architecture, phenomenology, and a number of aspects of architectural historiography in the Swedish Million Homes Program.

MOVE-Pro: a low power and high code density TTA architecture

NARCIS (Netherlands)

He, Y.; She, D.; Mesman, B.; Corporaal, H.

2011-01-01

Transport Triggered Architectures (TTAs) possess many advantageous, such as modularity, flexibility, and scalability. As an exposed datapath architecture, TTAs can effectively reduce the register file (RF) pressure in both number of accesses and number of RF ports. However, the conventional TTAs

An Evaluation of ADLs on Modeling Patterns for Software Architecture

NARCIS (Netherlands)

Waqas Kamal, Ahmad; Avgeriou, Paris

2007-01-01

Architecture patterns provide solutions to recurring design problems at the architecture level. In order to model patterns during software architecture design, one may use a number of existing Architecture Description Languages (ADLs), including the UML, a generic language but also a de facto

Lifecycle Prognostics Architecture for Selected High-Cost Active Components

Energy Technology Data Exchange (ETDEWEB)

N. Lybeck; B. Pham; M. Tawfik; J. B. Coble; R. M. Meyer; P. Ramuhalli; L. J. Bond

2011-08-01

There are an extensive body of knowledge and some commercial products available for calculating prognostics, remaining useful life, and damage index parameters. The application of these technologies within the nuclear power community is still in its infancy. Online monitoring and condition-based maintenance is seeing increasing acceptance and deployment, and these activities provide the technological bases for expanding to add predictive/prognostics capabilities. In looking to deploy prognostics there are three key aspects of systems that are presented and discussed: (1) component/system/structure selection, (2) prognostic algorithms, and (3) prognostics architectures. Criteria are presented for component selection: feasibility, failure probability, consequences of failure, and benefits of the prognostics and health management (PHM) system. The basis and methods commonly used for prognostics algorithms are reviewed and summarized. Criteria for evaluating PHM architectures are presented: open, modular architecture; platform independence; graphical user interface for system development and/or results viewing; web enabled tools; scalability; and standards compatibility. Thirteen software products were identified and discussed in the context of being potentially useful for deployment in a PHM program applied to systems in a nuclear power plant (NPP). These products were evaluated by using information available from company websites, product brochures, fact sheets, scholarly publications, and direct communication with vendors. The thirteen products were classified into four groups of software: (1) research tools, (2) PHM system development tools, (3) deployable architectures, and (4) peripheral tools. Eight software tools fell into the deployable architectures category. Of those eight, only two employ all six modules of a full PHM system. Five systems did not offer prognostic estimates, and one system employed the full health monitoring suite but lacked operations and

Lifecycle Prognostics Architecture for Selected High-Cost Active Components

International Nuclear Information System (INIS)

Lybeck, N.; Pham, B.; Tawfik, M.; Coble, J.B.; Meyer, R.M.; Ramuhalli, P.; Bond, L.J.

2011-01-01

There are an extensive body of knowledge and some commercial products available for calculating prognostics, remaining useful life, and damage index parameters. The application of these technologies within the nuclear power community is still in its infancy. Online monitoring and condition-based maintenance is seeing increasing acceptance and deployment, and these activities provide the technological bases for expanding to add predictive/prognostics capabilities. In looking to deploy prognostics there are three key aspects of systems that are presented and discussed: (1) component/system/structure selection, (2) prognostic algorithms, and (3) prognostics architectures. Criteria are presented for component selection: feasibility, failure probability, consequences of failure, and benefits of the prognostics and health management (PHM) system. The basis and methods commonly used for prognostics algorithms are reviewed and summarized. Criteria for evaluating PHM architectures are presented: open, modular architecture; platform independence; graphical user interface for system development and/or results viewing; web enabled tools; scalability; and standards compatibility. Thirteen software products were identified and discussed in the context of being potentially useful for deployment in a PHM program applied to systems in a nuclear power plant (NPP). These products were evaluated by using information available from company websites, product brochures, fact sheets, scholarly publications, and direct communication with vendors. The thirteen products were classified into four groups of software: (1) research tools, (2) PHM system development tools, (3) deployable architectures, and (4) peripheral tools. Eight software tools fell into the deployable architectures category. Of those eight, only two employ all six modules of a full PHM system. Five systems did not offer prognostic estimates, and one system employed the full health monitoring suite but lacked operations and

Innovative architecture design for high performance organic and hybrid multi-junction solar cells

Science.gov (United States)

Li, Ning; Spyropoulos, George D.; Brabec, Christoph J.

2017-08-01

The multi-junction concept is especially attractive for the photovoltaic (PV) research community owing to its potential to overcome the Schockley-Queisser limit of single-junction solar cells. Tremendous research interests are now focused on the development of high-performance absorbers and novel device architectures for emerging PV technologies, such as organic and perovskite PVs. It has been predicted that the multi-junction concept is able to boost the organic and perovskite PV technologies approaching the 20% and 30% benchmarks, respectively, showing a bright future of commercialization of the emerging PV technologies. In this contribution, we will demonstrate innovative architecture design for solution-processed, highly functional organic and hybrid multi-junction solar cells. A simple but elegant approach to fabricating organic and hybrid multi-junction solar cells will be introduced. By laminating single organic/hybrid solar cells together through an intermediate layer, the manufacturing cost and complexity of large-scale multi-junction solar cells can be significantly reduced. This smart approach to balancing the photocurrents as well as open circuit voltages in multi-junction solar cells will be demonstrated and discussed in detail.

Recording Information on Architectural Heritage Should Meet the Requirements for Conservation Digital Recording Practices at the Summer Palace

Science.gov (United States)

Zhang, L.; Cong, Y.; Wu, C.; Bai, C.; Wu, C.

2017-08-01

The recording of Architectural heritage information is the foundation of research, conservation, management, and the display of architectural heritage. In other words, the recording of architectural heritage information supports heritage research, conservation, management and architectural heritage display. What information do we record and collect and what technology do we use for information recording? How do we determine the level of accuracy required when recording architectural information? What method do we use for information recording? These questions should be addressed in relation to the nature of the particular heritage site and the specific conditions for the conservation work. In recent years, with the rapid development of information acquisition technology such as Close Range Photogrammetry, 3D Laser Scanning as well as high speed and high precision Aerial Photogrammetry, many Chinese universities, research institutes and heritage management bureaux have purchased considerable equipment for information recording. However, the lack of understanding of both the nature of architectural heritage and the purpose for which the information is being collected has led to several problems. For example: some institutions when recording architectural heritage information aim solely at high accuracy. Some consider that advanced measuring methods must automatically replace traditional measuring methods. Information collection becomes the purpose, rather than the means, of architectural heritage conservation. Addressing these issues, this paper briefly reviews the history of architectural heritage information recording at the Summer Palace (Yihe Yuan, first built in 1750), Beijing. Using the recording practices at the Summer Palace during the past ten years as examples, we illustrate our achievements and lessons in recording architectural heritage information with regard to the following aspects: (buildings') ideal status desired, (buildings') current status

Genetic architecture of circulating lipid levels

DEFF Research Database (Denmark)

Demirkan, Ayşe; Amin, Najaf; Isaacs, Aaron

2011-01-01

Serum concentrations of low-density lipoprotein cholesterol (LDL-C), high-density lipoprotein cholesterol (HDL-C), triglycerides (TGs) and total cholesterol (TC) are important heritable risk factors for cardiovascular disease. Although genome-wide association studies (GWASs) of circulating lipid...... the ENGAGE Consortium GWAS on serum lipids, were applied to predict lipid levels in an independent population-based study, the Rotterdam Study-II (RS-II). We additionally tested for evidence of a shared genetic basis for different lipid phenotypes. Finally, the polygenic score approach was used to identify...... an alternative genome-wide significance threshold before pathway analysis and those results were compared with those based on the classical genome-wide significance threshold. Our study provides evidence suggesting that many loci influencing circulating lipid levels remain undiscovered. Cross-prediction models...

An Internet of Things Generic Reference Architecture

DEFF Research Database (Denmark)

Bhalerao, Dipashree M.; Riaz, Tahir; Madsen, Ole Brun

2013-01-01

Internet of things Network is a future application of Internet. This network has three major basic blocks as business process or Application, core network or internetwork and peripheral network as Things or objects. The assembly has the basic intention of connecting all physical and virtual things......, and keeping track of all these things for monitoring and controlling some information. IoT architecture is studied from software architecture, overall system architecture and network architecture point of view. Paper puts forward the requirements of software architecture along with, its component...... and deployment diagram, process and interface diagram at abstract level. Paper proposes the abstract generic IoT reference and concrete abstract generic IoT reference architectures. Network architecture is also put up as a state of the art. Paper shortly gives overviews of protocols used for IoT. Some...

Memristor-Based Synapse Design and Training Scheme for Neuromorphic Computing Architecture

Science.gov (United States)

2012-06-01

system level built upon the conventional Von Neumann computer architecture [2][3]. Developing the neuromorphic architecture at chip level by...SCHEME FOR NEUROMORPHIC COMPUTING ARCHITECTURE 5a. CONTRACT NUMBER FA8750-11-2-0046 5b. GRANT NUMBER N/A 5c. PROGRAM ELEMENT NUMBER 62788F 6...creation of memristor-based neuromorphic computing architecture. Rather than the existing crossbar-based neuron network designs, we focus on memristor

A design control structure for architectural firms in a highly complex and uncertain situation

NARCIS (Netherlands)

Schijlen, J.T.H.A.M.; Otter, den A.F.H.J.; Pels, H.J.

2011-01-01

A large architectural firm in a highly complex and uncertain production situation asked to improve its existing ?production control? system for design projects. To that account a research and design project of nine months at the spot was defined. The production control in the organization was based

Towards a preliminary design of the ITER plasma control system architecture

International Nuclear Information System (INIS)

Treutterer, W.; Rapson, C.J.; Raupp, G.; Snipes, J.; Vries, P. de; Winter, A.; Humphreys, D.A.; Walker, M.; Tommasi, G. de; Cinque, M.; Bremond, S.; Moreau, P.; Nouailletas, R.; Felton, R.

2017-01-01

Highlights: • ITER control requirements and use scenarios for initial plasma operation have been analysed. • Basic choices from conceptual design could be confirmed. • Architectural design considers dynamic structure changes. • All PCS components are integrated in an exception handling hierarchy. - Abstract: Design of the ITER plasma control system is proceeding towards its next – preliminary design – stage. During the conceptual design in 2013 an overall assessment of high-level control tasks and their relationships has been conducted. The goal of the preliminary design is to show, that a reasonable implementation of the proposed concepts exists which fulfills the high-level requirements and is suitable for realistic use cases. This verification is conducted with focus on the concrete use cases of early operation and first plasma, since these phases are mandatory for ITER startup. In particular, detailed control requirements and functions for commissioning and first plasma operation including breakdown, burn-through and ramp-up in L-mode, as well as for planned or exceptional shutdown are identified. Control functions related to those operational phases and the underlying control system architecture are modeled. The goal is to check whether the flexibility of the conceptual architectural approach is adequate also in consideration of the more elaborate definitions for control functions and their interactions. In addition, architecture shall already be prepared for extension to H-mode operation and burn-control, even if the related control functions are only roughly defined at the moment. As a consequence, the architectural design is amended where necessary and converted into base components and infrastructure services allowing to deploy control and exception handling algorithms for the concrete first-plasma operation.

Towards a preliminary design of the ITER plasma control system architecture

Energy Technology Data Exchange (ETDEWEB)

Treutterer, W., E-mail: Wolfgang.Treutterer@ipp.mpg.de [Max-Planck-Institut für Plasmaphysik, Boltzmannstraße 2, 85748 Garching (Germany); Rapson, C.J.; Raupp, G. [Max-Planck-Institut für Plasmaphysik, Boltzmannstraße 2, 85748 Garching (Germany); Snipes, J.; Vries, P. de; Winter, A. [ITER Organization, Route de Vinon sur Verdon, 13067 St Paul Lez Durance (France); Humphreys, D.A.; Walker, M. [General Atomics, PO Box 85608, San Diego, CA 92186-5608 (United States); Tommasi, G. de; Cinque, M. [CREATE/Università di Napoli Federico II, Napoli (Italy); Bremond, S.; Moreau, P.; Nouailletas, R. [Association CEA pour la Fusion Contrôlée, CEA Cadarache, 13108 St Paul les Durance (France); Felton, R. [CCFE Fusion Association, Culham Centre for Fusion Energy, Culham Science Centre, Oxfordshire, OX14 3DB (United Kingdom)

2017-02-15

Highlights: • ITER control requirements and use scenarios for initial plasma operation have been analysed. • Basic choices from conceptual design could be confirmed. • Architectural design considers dynamic structure changes. • All PCS components are integrated in an exception handling hierarchy. - Abstract: Design of the ITER plasma control system is proceeding towards its next – preliminary design – stage. During the conceptual design in 2013 an overall assessment of high-level control tasks and their relationships has been conducted. The goal of the preliminary design is to show, that a reasonable implementation of the proposed concepts exists which fulfills the high-level requirements and is suitable for realistic use cases. This verification is conducted with focus on the concrete use cases of early operation and first plasma, since these phases are mandatory for ITER startup. In particular, detailed control requirements and functions for commissioning and first plasma operation including breakdown, burn-through and ramp-up in L-mode, as well as for planned or exceptional shutdown are identified. Control functions related to those operational phases and the underlying control system architecture are modeled. The goal is to check whether the flexibility of the conceptual architectural approach is adequate also in consideration of the more elaborate definitions for control functions and their interactions. In addition, architecture shall already be prepared for extension to H-mode operation and burn-control, even if the related control functions are only roughly defined at the moment. As a consequence, the architectural design is amended where necessary and converted into base components and infrastructure services allowing to deploy control and exception handling algorithms for the concrete first-plasma operation.

Architectural slicing

DEFF Research Database (Denmark)

Christensen, Henrik Bærbak; Hansen, Klaus Marius

2013-01-01

Architectural prototyping is a widely used practice, con- cerned with taking architectural decisions through experiments with light- weight implementations. However, many architectural decisions are only taken when systems are already (partially) implemented. This is prob- lematic in the context...... of architectural prototyping since experiments with full systems are complex and expensive and thus architectural learn- ing is hindered. In this paper, we propose a novel technique for harvest- ing architectural prototypes from existing systems, \\architectural slic- ing", based on dynamic program slicing. Given...... a system and a slicing criterion, architectural slicing produces an architectural prototype that contain the elements in the architecture that are dependent on the ele- ments in the slicing criterion. Furthermore, we present an initial design and implementation of an architectural slicer for Java....

A high performance 90 nm CMOS SAR ADC with hybrid architecture

International Nuclear Information System (INIS)

Tong Xingyuan; Zhu Zhangming; Yang Yintang; Chen Jianming

2010-01-01

A 10-bit 2.5 MS/s SAR A/D converter is presented. In the circuit design, an R-C hybrid architecture D/A converter, pseudo-differential comparison architecture and low power voltage level shifters are utilized. Design challenges and considerations are also discussed. In the layout design, each unit resistor is sided by dummies for good matching performance, and the capacitors are routed with a common-central symmetry method to reduce the nonlin-earity error. This proposed converter is implemented based on 90 nm CMOS logic process. With a 3.3 V analog supply and a 1.0 V digital supply, the differential and integral nonlinearity are measured to be less than 0.36 LSB and 0.69 LSB respectively. With an input frequency of 1.2 MHz at 2.5 MS/s sampling rate, the SFDR and ENOB are measured to be 72.86 dB and 9.43 bits respectively, and the power dissipation is measured to be 6.62 mW including the output drivers. This SAR A/D converter occupies an area of 238 x 214 μm 2 . The design results of this converter show that it is suitable for multi-supply embedded SoC applications. (semiconductor integrated circuits)

METRIC context unit architecture

Energy Technology Data Exchange (ETDEWEB)

Simpson, R.O.

1988-01-01

METRIC is an architecture for a simple but powerful Reduced Instruction Set Computer (RISC). Its speed comes from the simultaneous processing of several instruction streams, with instructions from the various streams being dispatched into METRIC's execution pipeline as they become available for execution. The pipeline is thus kept full, with a mix of instructions for several contexts in execution at the same time. True parallel programming is supported within a single execution unit, the METRIC Context Unit. METRIC's architecture provides for expansion through the addition of multiple Context Units and of specialized Functional Units. The architecture thus spans a range of size and performance from a single-chip microcomputer up through large and powerful multiprocessors. This research concentrates on the specification of the METRIC Context Unit at the architectural level. Performance tradeoffs made during METRIC's design are discussed, and projections of METRIC's performance are made based on simulation studies.

Wavy channel thin film transistor architecture for area efficient, high performance and low power displays

KAUST Repository

Hanna, Amir

2013-12-23

We demonstrate a new thin film transistor (TFT) architecture that allows expansion of the device width using continuous fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor width in a direction perpendicular to the substrate, thus not consuming extra chip area, achieving area efficiency. The devices have shown for a 13% increase in the device width resulting in a maximum 2.5× increase in \\'ON\\' current value of the WCTFT, when compared to planar devices consuming the same chip area, while using atomic layer deposition based zinc oxide (ZnO) as the channel material. The WCTFT devices also maintain similar \\'OFF\\' current value, ~100 pA, when compared to planar devices, thus not compromising on power consumption for performance which usually happens with larger width devices. This work offers an interesting opportunity to use WCTFTs as backplane circuitry for large-area high-resolution display applications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

SUSTAINABLE ARCHITECTURE : WHAT ARCHITECTURE STUDENTS THINK

OpenAIRE

SATWIKO, PRASASTO

2013-01-01

Sustainable architecture has become a hot issue lately as the impacts of climate change become more intense. Architecture educations have responded by integrating knowledge of sustainable design in their curriculum. However, in the real life, new buildings keep coming with designs that completely ignore sustainable principles. This paper discusses the results of two national competitions on sustainable architecture targeted for architecture students (conducted in 2012 and 2013). The results a...

Architecture of Environmental Engineering

DEFF Research Database (Denmark)

Wenzel, Henrik; Alting, Leo

2006-01-01

An architecture of Environmental Engineering has been developed comprising the various disciplines and tools involved. It identifies industry as the major actor and target group, and it builds on the concept of Eco-efficiency. To improve Eco-efficiency, there is a limited number of intervention......-efficiency is the aim of Environmental Engineering, the discipline of synthesis – design and creation of solutions – will form a core pillar of the architecture. Other disciplines of Environmental Engineering exist forming the necessary background and frame for the synthesis. Environmental Engineering, thus, in essence...... comprise the disciplines of: management, system description & inventory, analysis & assessment, prioritisation, synthesis, and communication, each existing at all levels of intervention. The developed architecture of Environmental Engineering, thus, consists of thirty individual disciplines, within each...

Architecture of Environmental Engineering

DEFF Research Database (Denmark)

Wenzel, Henrik; Alting, Leo

2004-01-01

An architecture of Environmental Engineering has been developed comprising the various disciplines and tools involved. It identifies industry as the major actor and target group, and it builds on the concept of Eco-efficiency. To improve Eco-efficiency, there is a limited number of intervention...... of Eco-efficiency is the aim of Environmental Engineering, the discipline of synthesis – design and creation of solutions – will form a core pillar of the architecture. Other disciplines of Environmental Engineering exist forming the necessary background and frame for the synthesis. Environmental...... Engineering, thus, in essence comprise the disciplines of: management, system description & inventory, analysis & assessment, prioritisation, synthesis, and communication, each existing at all levels of intervention. The developed architecture of Environmental Engineering, thus, consists of thirty individual...

Revolution of Chinese architectural design at the new-type urbanization stage

Directory of Open Access Journals (Sweden)

Jianguo Wang

2015-09-01

Full Text Available Witnessing more than three decades of sustained and rapid economic growth, China has become a nation that enjoys the fastest rate of urbanization; the largest quantities of civil construction; the most obvious urban development to be “newer”, “bigger” and “higher”; and the most prosperous architectural design market worldwide. In terms of the construction industry, housing construction totals 31.3 billion square meters, occupying more than 70% of the floor area of the existing stock houses. It is safe to say that the construction industry significantly boosts GDP growth, expands the number of jobs, and improves the living conditions of the masses. Related to this is the need to end the architectural guidelines of the planned economy era economizing on food and clothing and instead step into a new historic stage allowing bold pursuit of architectural aesthetics and individuality. A group of architects who have social ideals, adhere faithfully to professional standards and pledge to pursue architectural innovation are active in China. Instead of simply converting the overwhelming opportunities brought to carry economic benefits, they dare to embrace the challenges imposed on enhancing architectural connotation and create a batch of high-level work that lives up to expectations of the era, marking the achievement of reform and rapid urbanization in China. Yet, as time goes on, the promotion of national development concepts, ideas of social consumption and the masses’ cultural level establishes new requirements for the architectural design industry, architects and architectural design works. An appeal is thus made against Chinese architects for a summary, reflection and proactive anticipation to respond to the new requirements of the era.

Architecture

OpenAIRE

Clear, Nic

2014-01-01

When discussing science fiction’s relationship with architecture, the usual practice is to look at the architecture “in” science fiction—in particular, the architecture in SF films (see Kuhn 75-143) since the spaces of literary SF present obvious difficulties as they have to be imagined. In this essay, that relationship will be reversed: I will instead discuss science fiction “in” architecture, mapping out a number of architectural movements and projects that can be viewed explicitly as scien...

Radiology systems architecture.

Science.gov (United States)

Deibel, S R; Greenes, R A

1996-05-01

This article focuses on the software requirements for enterprise integration in radiology. The needs of a future radiology systems architecture are examined, both at a concrete functional level and at an abstract system-properties level. A component-based approach to software development is described and is validated in the context of each of the abstract system requirements for future radiology computing environments.

2005 dossier: clay. Tome: architecture and management of the geologic disposal facility

International Nuclear Information System (INIS)

2005-01-01

This document makes a status of the researches carried out by the French national agency of radioactive wastes (ANDRA) about the design of a geologic disposal facility for high-level and long-lived radioactive wastes in argilite formations. Content: 1 - approach of the study: goal, main steps of the design study, iterative approach, content; 2 - general description: high-level and long-lived radioactive wastes, purposes of a reversible disposal, geologic context of the Meuse/Haute-Marne site - the Callovo-Oxfordian formation, design principles of the disposal facility architecture, role of the different disposal components; 3 - high-level and long-lived wastes: production scenarios, description of primary containers, inventory model, hypotheses about receipt fluxes of primary containers; 4- disposal containers: B-type waste containers, C-type waste containers, spent fuel disposal containers; 5 - disposal modules: B-type waste disposal modules, C-type waste disposal modules, spent-fuel disposal modules; 6 - overall underground architecture: main safety questions, overall design, dimensioning factors, construction logic and overall exploitation of the facility, dimensioning of galleries, underground architecture adaptation to different scenarios; 7 - boreholes and galleries: general needs, design principles retained, boreholes description, galleries description, building up of boreholes and galleries, durability of facilities, backfilling and sealing up of boreholes and galleries; 8 - surface facilities: general organization, nuclear area, industrial and administrative area, tailings area; 9 - nuclear exploitation means of the facility: receipt of primary containers and preparation of disposal containers, transfer of disposal containers from the surface to the disposal alveoles, setting up of containers inside alveoles; 10 - reversible management of the disposal: step by step disposal process, mastery of disposal behaviour and action capacity, observation and

Image processing methods and architectures in diagnostic pathology.

Directory of Open Access Journals (Sweden)

Oscar DĂŠniz

2010-05-01

Full Text Available Grid technology has enabled the clustering and the efficient and secure access to and interaction among a wide variety of geographically distributed resources such as: supercomputers, storage systems, data sources, instruments and special devices and services. Their main applications include large-scale computational and data intensive problems in science and engineering. General grid structures and methodologies for both software and hardware in image analysis for virtual tissue-based diagnosis has been considered in this paper. This methods are focus on the user level middleware. The article describes the distributed programming system developed by the authors for virtual slide analysis in diagnostic pathology. The system supports different image analysis operations commonly done in anatomical pathology and it takes into account secured aspects and specialized infrastructures with high level services designed to meet application requirements. Grids are likely to have a deep impact on health related applications, and therefore they seem to be suitable for tissue-based diagnosis too. The implemented system is a joint application that mixes both Web and Grid Service Architecture around a distributed architecture for image processing. It has shown to be a successful solution to analyze a big and heterogeneous group of histological images under architecture of massively parallel processors using message passing and non-shared memory.

Multi-level Control Framework for Enhanced Flexibility of Active Distribution Network

DEFF Research Database (Denmark)

Nainar, Karthikeyan; Pokhrel, Basanta Raj; Pillai, Jayakrishnan Radhakrishna

2017-01-01

In this paper, the control objectives of future active distribution networks with high penetration of renewables and flexible loads are analyzed and reviewed. From a state of the art review, the important control objectives seen from the perspective of a distribution system operator are identifie......-ordination and management of the network assets at different voltage levels and geographical locations. The paper finally shows the applicability of the multi-level control architecture to some of the key challenges in the distribution system operation by relevant scenarios....... to be hosting capacity improvement, high reliable operation and cost effective network management. Based on this review and a state of the art review concerning future distribution network control methods, a multi-level control architecture is constructed for an active distribution network, which satisfies...... the selected control objectives and provides enhanced flexibility. The control architecture is supported by generation/load forecasting and distribution state estimation techniques to improve the controllability of the network. The multi-level control architecture consists of three levels of hierarchical...

Service Modularity and Architecture

DEFF Research Database (Denmark)

Brax, Saara A.; Bask, Anu; Hsuan, Juliana

2017-01-01

, platform-based and mass-customized service business models, comparative research designs, customer perspectives and service experience, performance in context of modular services, empirical evidence of benefits and challenges, architectural innovation in services, modularization in multi-provider contexts......Purpose: Services are highly important in a world economy which has increasingly become service driven. There is a growing need to better understand the possibilities for, and requirements of, designing modular service architectures. The purpose of this paper is to elaborate on the roots...... of the emerging research stream on service modularity, provide a concise overview of existing work on the subject, and outline an agenda for future research on service modularity and architecture. The articles in the special issue offer four diverse sets of research on service modularity and architecture. Design...

Sensor Webs with a Service-Oriented Architecture for On-demand Science Products

Science.gov (United States)

Mandl, Daniel; Ungar, Stephen; Ames, Troy; Justice, Chris; Frye, Stuart; Chien, Steve; Tran, Daniel; Cappelaere, Patrice; Derezinsfi, Linda; Paules, Granville;

Implementation of high-speed–low-power adaptive finite impulse response filter with novel architecture

Directory of Open Access Journals (Sweden)

Manish Jaiswal

2015-03-01

Full Text Available An energy efficient high-speed adaptive finite impulse response filter with novel architecture is developed. Synthesis results along with novel architecture on different complementary metal–oxide semiconductor (CMOS families are presented. Analysis is performed using Artix-7, Spartan-6 and Virtex-4 for most popular adaptive least mean square filter for different orders such as N = 8, 16, 32. The presented work is done using MATLAB (2013b and Xilinx (14.2. From the synthesis results, it can be found that CMOS (28 nm achieves the lowest power and critical path delay compared to others, and thus proves its efficiency in terms of energy. Different parameters are considered such as look up tables and input–output blocks, along with their optimised results.

Modeling Architectural Patterns Using Architectural Primitives

NARCIS (Netherlands)

Zdun, Uwe; Avgeriou, Paris

2005-01-01

Architectural patterns are a key point in architectural documentation. Regrettably, there is poor support for modeling architectural patterns, because the pattern elements are not directly matched by elements in modeling languages, and, at the same time, patterns support an inherent variability that

An Enterprise Security Program and Architecture to Support Business Drivers

Directory of Open Access Journals (Sweden)

Brian Ritchot

2013-08-01

Full Text Available This article presents a business-focused approach to developing and delivering enterprise security architecture that is focused on enabling business objectives while providing a sensible and balanced approach to risk management. A balanced approach to enterprise security architecture can create the important linkages between the goals and objectives of a business, and it provides appropriate measures to protect the most critical assets within an organization while accepting risk where appropriate. Through a discussion of information assurance, this article makes a case for leveraging enterprise security architectures to meet an organizations' need for information assurance. The approach is derived from the Sherwood Applied Business Security Architecture (SABSA methodology, as put into practice by Seccuris Inc., an information assurance integrator. An understanding of Seccuris’ approach will illustrate the importance of aligning security activities with high-level business objectives while creating increased awareness of the duality of risk. This business-driven approach to enterprise security architecture can help organizations change the perception of IT security, positioning it as a tool to enable and assure business success, rather than be perceived as an obstacle to be avoided.

Advances in quantum control of three-level superconducting circuit architectures

Energy Technology Data Exchange (ETDEWEB)

Falci, G.; Paladino, E. [Dipartimento di Fisica e Astronomia, Universita di Catania (Italy); CNR-IMM UOS Universita (MATIS), Consiglio Nazionale delle Ricerche, Catania (Italy); INFN, Sezione di Catania (Italy); Di Stefano, P.G. [Dipartimento di Fisica e Astronomia, Universita di Catania (Italy); Centre for Theoretical Atomic, Molecular and Optical Physics, School of Mathematics and Physics, Queen' s University Belfast(United Kingdom); Ridolfo, A.; D' Arrigo, A. [Dipartimento di Fisica e Astronomia, Universita di Catania (Italy); Paraoanu, G.S. [Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science (Finland)

2017-06-15

Advanced control in Lambda (Λ) scheme of a solid state architecture of artificial atoms and quantized modes would allow the translation to the solid-state realm of a whole class of phenomena from quantum optics, thus exploiting new physics emerging in larger integrated quantum networks and for stronger couplings. However control solid-state devices has constraints coming from selection rules, due to symmetries which on the other hand yield protection from decoherence, and from design issues, for instance that coupling to microwave cavities is not directly switchable. We present two new schemes for the Λ-STIRAP control problem with the constraint of one or two classical driving fields being always-on. We show how these protocols are converted to apply to circuit-QED architectures. We finally illustrate an application to coherent spectroscopy of the so called ultrastrong atom-cavity coupling regime. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Hybrid Architecture for Coordination of AGVs in FMS

Directory of Open Access Journals (Sweden)

Eduardo G. Hernandez-Martinez

2014-03-01

Full Text Available This paper presents a hybrid control architecture that coordinates the motion of groups of automated guided vehicles in flexible manufacturing systems. The high-level control is based on a Petri net model, using the industrial standard ISA-95, obtaining a task-based coordination of equipment and storage considering process restrictions, logical precedences, shared resources and the assignment of robots to move workpieces individually or in subgroups. On the other hand, in the low-level control, three basic control laws are designed for unicycle-type robots in order to achieve desired formation patterns and marching behaviours, avoiding inter-robot collisions. The control scheme combines the task assignment for the robots obtained from the discrete-event model and the implementation of formation and marching continuous control laws applied to the motion of the mobile robots. The hybrid architecture is implemented and validated for the case of a flexible manufacturing system and four mobile robots using a virtual reality platform.

How Do Open Source Communities Document Software Architecture: An Exploratory Survey

NARCIS (Netherlands)

Ding, W.; Liang, P.; Tang, A.; Van Vliet, H.; Shahin, M.

2014-01-01

Software architecture (SA) documentation provides a blueprint of a software-intensive system for the communication between stakeholders about the high-level design of the system. In open source software (OSS) development, a lack of SA documentation may hinder the use and further development of OSS,

SCC500: next-generation infrared imaging camera core products with highly flexible architecture for unique camera designs

Science.gov (United States)

Rumbaugh, Roy N.; Grealish, Kevin; Kacir, Tom; Arsenault, Barry; Murphy, Robert H.; Miller, Scott

2003-09-01

A new 4th generation MicroIR architecture is introduced as the latest in the highly successful Standard Camera Core (SCC) series by BAE SYSTEMS to offer an infrared imaging engine with greatly reduced size, weight, power, and cost. The advanced SCC500 architecture provides great flexibility in configuration to include multiple resolutions, an industry standard Real Time Operating System (RTOS) for customer specific software application plug-ins, and a highly modular construction for unique physical and interface options. These microbolometer based camera cores offer outstanding and reliable performance over an extended operating temperature range to meet the demanding requirements of real-world environments. A highly integrated lens and shutter is included in the new SCC500 product enabling easy, drop-in camera designs for quick time-to-market product introductions.

Integration of highly probabilistic sources into optical quantum architectures: perpetual quantum computation

International Nuclear Information System (INIS)

Devitt, Simon J; Stephens, Ashley M; Munro, William J; Nemoto, Kae

2011-01-01

In this paper, we introduce a design for an optical topological cluster state computer constructed exclusively from a single quantum component. Unlike previous efforts we eliminate the need for on demand, high fidelity photon sources and detectors and replace them with the same device utilized to create photon/photon entanglement. This introduces highly probabilistic elements into the optical architecture while maintaining complete specificity of the structure and operation for a large-scale computer. Photons in this system are continually recycled back into the preparation network, allowing for an arbitrarily deep three-dimensional cluster to be prepared using a comparatively small number of photonic qubits and consequently the elimination of high-frequency, deterministic photon sources.

Design of a highly parallel board-level-interconnection with 320 Gbps capacity

Science.gov (United States)

Lohmann, U.; Jahns, J.; Limmer, S.; Fey, D.; Bauer, H.

2012-01-01

A parallel board-level interconnection design is presented consisting of 32 channels, each operating at 10 Gbps. The hardware uses available optoelectronic components (VCSEL, TIA, pin-diodes) and a combination of planarintegrated free-space optics, fiber-bundles and available MEMS-components, like the DMD™ from Texas Instruments. As a specific feature, we present a new modular inter-board interconnect, realized by 3D fiber-matrix connectors. The performance of the interconnect is evaluated with regard to optical properties and power consumption. Finally, we discuss the application of the interconnect for strongly distributed system architectures, as, for example, in high performance embedded computing systems and data centers.

Software Defined Networking (SDN) controlled all optical switching networks with multi-dimensional switching architecture

Science.gov (United States)

Zhao, Yongli; Ji, Yuefeng; Zhang, Jie; Li, Hui; Xiong, Qianjin; Qiu, Shaofeng

2014-08-01

Ultrahigh throughout capacity requirement is challenging the current optical switching nodes with the fast development of data center networks. Pbit/s level all optical switching networks need to be deployed soon, which will cause the high complexity of node architecture. How to control the future network and node equipment together will become a new problem. An enhanced Software Defined Networking (eSDN) control architecture is proposed in the paper, which consists of Provider NOX (P-NOX) and Node NOX (N-NOX). With the cooperation of P-NOX and N-NOX, the flexible control of the entire network can be achieved. All optical switching network testbed has been experimentally demonstrated with efficient control of enhanced Software Defined Networking (eSDN). Pbit/s level all optical switching nodes in the testbed are implemented based on multi-dimensional switching architecture, i.e. multi-level and multi-planar. Due to the space and cost limitation, each optical switching node is only equipped with four input line boxes and four output line boxes respectively. Experimental results are given to verify the performance of our proposed control and switching architecture.

Architectures of prototypes and architectural prototyping

DEFF Research Database (Denmark)

Hansen, Klaus Marius; Christensen, Michael; Sandvad, Elmer

1998-01-01

together as a team, but developed a prototype that more than fulfilled the expectations of the shipping company. The prototype should: - complete the first major phase within 10 weeks, - be highly vertical illustrating future work practice, - continuously live up to new requirements from prototyping......This paper reports from experience obtained through development of a prototype of a global customer service system in a project involving a large shipping company and a university research group. The research group had no previous knowledge of the complex business of shipping and had never worked...... sessions with users, - evolve over a long period of time to contain more functionality - allow for 6-7 developers working intensively in parallel. Explicit focus on the software architecture and letting the architecture evolve with the prototype played a major role in resolving these conflicting...

Hierarchical architecture of active knits

International Nuclear Information System (INIS)

Abel, Julianna; Luntz, Jonathan; Brei, Diann

2013-01-01

Nature eloquently utilizes hierarchical structures to form the world around us. Applying the hierarchical architecture paradigm to smart materials can provide a basis for a new genre of actuators which produce complex actuation motions. One promising example of cellular architecture—active knits—provides complex three-dimensional distributed actuation motions with expanded operational performance through a hierarchically organized structure. The hierarchical structure arranges a single fiber of active material, such as shape memory alloys (SMAs), into a cellular network of interlacing adjacent loops according to a knitting grid. This paper defines a four-level hierarchical classification of knit structures: the basic knit loop, knit patterns, grid patterns, and restructured grids. Each level of the hierarchy provides increased architectural complexity, resulting in expanded kinematic actuation motions of active knits. The range of kinematic actuation motions are displayed through experimental examples of different SMA active knits. The results from this paper illustrate and classify the ways in which each level of the hierarchical knit architecture leverages the performance of the base smart material to generate unique actuation motions, providing necessary insight to best exploit this new actuation paradigm. (paper)

Fiber-wireless convergence in next-generation communication networks systems, architectures, and management

CERN Document Server

Chang, Gee-Kung; Ellinas, Georgios

2017-01-01

This book investigates new enabling technologies for Fi-Wi convergence. The editors discuss Fi-Wi technologies at the three major network levels involved in the path towards convergence: system level, network architecture level, and network management level. The main topics will be: a. At system level: Radio over Fiber (digitalized vs. analogic, standardization, E-band and beyond) and 5G wireless technologies; b. Network architecture level: NGPON, WDM-PON, BBU Hotelling, Cloud Radio Access Networks (C-RANs), HetNets. c. Network management level: SDN for convergence, Next-generation Point-of-Presence, Wi-Fi LTE Handover, Cooperative MultiPoint. • Addresses the Fi-Wi convergence issues at three different levels, namely at the system level, network architecture level, and network management level • Provides approaches in communication systems, network architecture, and management that are expected to steer the evolution towards fiber-wireless convergence • Contributions from leading experts in the field of...

A heterogeneous hierarchical architecture for real-time computing

Energy Technology Data Exchange (ETDEWEB)

Skroch, D.A.; Fornaro, R.J.

1988-12-01

The need for high-speed data acquisition and control algorithms has prompted continued research in the area of multiprocessor systems and related programming techniques. The result presented here is a unique hardware and software architecture for high-speed real-time computer systems. The implementation of a prototype of this architecture has required the integration of architecture, operating systems and programming languages into a cohesive unit. This report describes a Heterogeneous Hierarchial Architecture for Real-Time (H{sup 2} ART) and system software for program loading and interprocessor communication.

New energy storage option: toward ZnCo2O4 nanorods/nickel foam architectures for high-performance supercapacitors.

Science.gov (United States)

Liu, Bin; Liu, Boyang; Wang, Qiufan; Wang, Xianfu; Xiang, Qingyi; Chen, Di; Shen, Guozhen

2013-10-23

Hierarchical ZnCo2O4/nickel foam architectures were first fabricated from a simple scalable solution approach, exhibiting outstanding electrochemical performance in supercapacitors with high specific capacitance (∼1400 F g(-1) at 1 A g(-1)), excellent rate capability (72.5% capacity retention at 20 A g(-1)), and good cycling stability (only 3% loss after 1000 cycles at 6 A g(-1)). All-solid-state supercapacitors were also fabricated by assembling two pieces of the ZnCo2O4-based electrodes, showing superior performance in terms of high specific capacitance and long cycling stability. Our work confirms that the as-prepared architectures can not only be applied in high energy density fields, but also be used in high power density applications, such as electric vehicles, flexible electronics, and energy storage devices.

Real-time FPGA architectures for computer vision

Science.gov (United States)

Arias-Estrada, Miguel; Torres-Huitzil, Cesar

2000-03-01

This paper presents an architecture for real-time generic convolution of a mask and an image. The architecture is intended for fast low level image processing. The FPGA-based architecture takes advantage of the availability of registers in FPGAs to implement an efficient and compact module to process the convolutions. The architecture is designed to minimize the number of accesses to the image memory and is based on parallel modules with internal pipeline operation in order to improve its performance. The architecture is prototyped in a FPGA, but it can be implemented on a dedicated VLSI to reach higher clock frequencies. Complexity issues, FPGA resources utilization, FPGA limitations, and real time performance are discussed. Some results are presented and discussed.

Unprecedented high-resolution view of bacterial operon architecture revealed by RNA sequencing.

Science.gov (United States)

Conway, Tyrrell; Creecy, James P; Maddox, Scott M; Grissom, Joe E; Conkle, Trevor L; Shadid, Tyler M; Teramoto, Jun; San Miguel, Phillip; Shimada, Tomohiro; Ishihama, Akira; Mori, Hirotada; Wanner, Barry L

2014-07-08

We analyzed the transcriptome of Escherichia coli K-12 by strand-specific RNA sequencing at single-nucleotide resolution during steady-state (logarithmic-phase) growth and upon entry into stationary phase in glucose minimal medium. To generate high-resolution transcriptome maps, we developed an organizational schema which showed that in practice only three features are required to define operon architecture: the promoter, terminator, and deep RNA sequence read coverage. We precisely annotated 2,122 promoters and 1,774 terminators, defining 1,510 operons with an average of 1.98 genes per operon. Our analyses revealed an unprecedented view of E. coli operon architecture. A large proportion (36%) of operons are complex with internal promoters or terminators that generate multiple transcription units. For 43% of operons, we observed differential expression of polycistronic genes, despite being in the same operons, indicating that E. coli operon architecture allows fine-tuning of gene expression. We found that 276 of 370 convergent operons terminate inefficiently, generating complementary 3' transcript ends which overlap on average by 286 nucleotides, and 136 of 388 divergent operons have promoters arranged such that their 5' ends overlap on average by 168 nucleotides. We found 89 antisense transcripts of 397-nucleotide average length, 7 unannotated transcripts within intergenic regions, and 18 sense transcripts that completely overlap operons on the opposite strand. Of 519 overlapping transcripts, 75% correspond to sequences that are highly conserved in E. coli (>50 genomes). Our data extend recent studies showing unexpected transcriptome complexity in several bacteria and suggest that antisense RNA regulation is widespread. Importance: We precisely mapped the 5' and 3' ends of RNA transcripts across the E. coli K-12 genome by using a single-nucleotide analytical approach. Our resulting high-resolution transcriptome maps show that ca. one-third of E. coli operons are

Architecture for high performance stereoscopic game rendering on Android

Science.gov (United States)

Flack, Julien; Sanderson, Hugh; Shetty, Sampath

2014-03-01

Stereoscopic gaming is a popular source of content for consumer 3D display systems. There has been a significant shift in the gaming industry towards casual games for mobile devices running on the Android™ Operating System and driven by ARM™ and other low power processors. Such systems are now being integrated directly into the next generation of 3D TVs potentially removing the requirement for an external games console. Although native stereo support has been integrated into some high profile titles on established platforms like Windows PC and PS3 there is a lack of GPU independent 3D support for the emerging Android platform. We describe a framework for enabling stereoscopic 3D gaming on Android for applications on mobile devices, set top boxes and TVs. A core component of the architecture is a 3D game driver, which is integrated into the Android OpenGL™ ES graphics stack to convert existing 2D graphics applications into stereoscopic 3D in real-time. The architecture includes a method of analyzing 2D games and using rule based Artificial Intelligence (AI) to position separate objects in 3D space. We describe an innovative stereo 3D rendering technique to separate the views in the depth domain and render directly into the display buffer. The advantages of the stereo renderer are demonstrated by characterizing the performance in comparison to more traditional render techniques, including depth based image rendering, both in terms of frame rates and impact on battery consumption.

High Speed Frame Synchronization and Viterbi Decoding

DEFF Research Database (Denmark)

Paaske, Erik; Justesen, Jørn; Larsen, Knud J.

1996-01-01

The purpose of Phase 1 of the study is to describe the system structure and algorithms in sufficient detail to allow drawing the high level architecture of units containing frame synchronization and Viterbi decoding. The systems we consider are high data rate space communication systems. Also...... components. Node synchronization performed within a Viterbi decoder is discussed, and algorithms for frame synchronization are described and analyzed. We present a list of system configurations that we find potentially useful. Further, the high level architecture of units that contain frame synchronization...... and various other functions needed in a complete system is presented. Two such units are described, one for placement before the Viterbi decoder and another for placement after the decoder. The high level architectures of three possible implementations of Viterbi decoders are described: The first...

FPGA-based architecture for motion recovering in real-time

Science.gov (United States)

Arias-Estrada, Miguel; Maya-Rueda, Selene E.; Torres-Huitzil, Cesar

2002-03-01

A key problem in the computer vision field is the measurement of object motion in a scene. The main goal is to compute an approximation of the 3D motion from the analysis of an image sequence. Once computed, this information can be used as a basis to reach higher level goals in different applications. Motion estimation algorithms pose a significant computational load for the sequential processors limiting its use in practical applications. In this work we propose a hardware architecture for motion estimation in real time based on FPGA technology. The technique used for motion estimation is Optical Flow due to its accuracy, and the density of velocity estimation, however other techniques are being explored. The architecture is composed of parallel modules working in a pipeline scheme to reach high throughput rates near gigaflops. The modules are organized in a regular structure to provide a high degree of flexibility to cover different applications. Some results will be presented and the real-time performance will be discussed and analyzed. The architecture is prototyped in an FPGA board with a Virtex device interfaced to a digital imager.

Domain architecture conservation in orthologs

Science.gov (United States)

2011-01-01

Background As orthologous proteins are expected to retain function more often than other homologs, they are often used for functional annotation transfer between species. However, ortholog identification methods do not take into account changes in domain architecture, which are likely to modify a protein's function. By domain architecture we refer to the sequential arrangement of domains along a protein sequence. To assess the level of domain architecture conservation among orthologs, we carried out a large-scale study of such events between human and 40 other species spanning the entire evolutionary range. We designed a score to measure domain architecture similarity and used it to analyze differences in domain architecture conservation between orthologs and paralogs relative to the conservation of primary sequence. We also statistically characterized the extents of different types of domain swapping events across pairs of orthologs and paralogs. Results The analysis shows that orthologs exhibit greater domain architecture conservation than paralogous homologs, even when differences in average sequence divergence are compensated for, for homologs that have diverged beyond a certain threshold. We interpret this as an indication of a stronger selective pressure on orthologs than paralogs to retain the domain architecture required for the proteins to perform a specific function. In general, orthologs as well as the closest paralogous homologs have very similar domain architectures, even at large evolutionary separation. The most common domain architecture changes observed in both ortholog and paralog pairs involved insertion/deletion of new domains, while domain shuffling and segment duplication/deletion were very infrequent. Conclusions On the whole, our results support the hypothesis that function conservation between orthologs demands higher domain architecture conservation than other types of homologs, relative to primary sequence conservation. This supports the

The Software Architecture of Global Climate Models

Science.gov (United States)

Alexander, K. A.; Easterbrook, S. M.

2011-12-01

It has become common to compare and contrast the output of multiple global climate models (GCMs), such as in the Climate Model Intercomparison Project Phase 5 (CMIP5). However, intercomparisons of the software architecture of GCMs are almost nonexistent. In this qualitative study of seven GCMs from Canada, the United States, and Europe, we attempt to fill this gap in research. We describe the various representations of the climate system as computer programs, and account for architectural differences between models. Most GCMs now practice component-based software engineering, where Earth system components (such as the atmosphere or land surface) are present as highly encapsulated sub-models. This architecture facilitates a mix-and-match approach to climate modelling that allows for convenient sharing of model components between institutions, but it also leads to difficulty when choosing where to draw the lines between systems that are not encapsulated in the real world, such as sea ice. We also examine different styles of couplers in GCMs, which manage interaction and data flow between components. Finally, we pay particular attention to the varying levels of complexity in GCMs, both between and within models. Many GCMs have some components that are significantly more complex than others, a phenomenon which can be explained by the respective institution's research goals as well as the origin of the model components. In conclusion, although some features of software architecture have been adopted by every GCM we examined, other features show a wide range of different design choices and strategies. These architectural differences may provide new insights into variability and spread between models.

Performance Analysis of Multiradio Transmitter with Polar or Cartesian Architectures Associated with High Efficiency Switched-Mode Power Amplifiers (invited paper

Directory of Open Access Journals (Sweden)

F. Robert

2010-12-01

Full Text Available This paper deals with wireless multi-radio transmitter architectures operating in the frequency band of 800 MHz – 6 GHz. As a consequence of the constant evolution in the communication systems, mobile transmitters must be able to operate at different frequency bands and modes according to existing standards specifications. The concept of a unique multiradio architecture is an evolution of the multistandard transceiver characterized by a parallelization of circuits for each standard. Multi-radio concept optimizes surface and power consumption. Transmitter architectures using sampling techniques and baseband ΣΔ or PWM coding of signals before their amplification appear as good candidates for multiradio transmitters for several reasons. They allow using high efficiency power amplifiers such as switched-mode PAs. They are highly flexible and easy to integrate because of their digital nature. But when the transmitter efficiency is considered, many elements have to be taken into account: signal coding efficiency, PA efficiency, RF filter. This paper investigates the interest of these architectures for a multiradio transmitter able to support existing wireless communications standards between 800 MHz and 6 GHz. It evaluates and compares the different possible architectures for WiMAX and LTE standards in terms of signal quality and transmitter power efficiency.

Hybrid POMDP-BDI Agent Architecture with Online Stochastic Planning and Desires with Changing Intensity Levels

CSIR Research Space (South Africa)

Rens, GB

2015-01-01

Full Text Available The authors propose an agent architecture which combines Partially observable Markov decision processes (POMDPs) and the belief-desire-intention (BDI) framework have several complementary strengths. The authors propose an agent architecture, which...

Clock generators for SOC processors circuits and architectures

CERN Document Server

Fahim, Amr

2004-01-01

This book explores the design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. The text takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The comprehensive coverage includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discrete-time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The book provides numerous real world applications, as well as practical rules-of-thumb for modern designers to use at the system, architectural, as well as the circuit level.

An overview of an architecture proposal for a high energy physics Grid

CERN Document Server

Wäänänen, A; Konstantinov, A S; Kónya, B; Smirnova, O G

2002-01-01

The article gives an overview of a Grid testbed architecture proposal for the NorduGrid project. The aim of the project is to establish an inter-Nordic (Denmark, Norway, Sweden and Finland) testbed facility for implementation of wide area computing and data handling. The architecture is supposed to define a Grid system suitable for solving data intensive problems at the Large Hadron Collider at CERN. We present the various architecture components needed for such a system. After that we go on to give a description of the dynamics by showing the task flow. (12 refs).

Effect of Ceramic Scaffold Architectural Parameters on Biological Response

Directory of Open Access Journals (Sweden)

Maria Isabella eGariboldi

2015-10-01

Full Text Available Numerous studies have focused on the optimization of ceramic architectures to fulfill a variety of scaffold functional requirements and improve biological response. Conventional fabrication techniques, however, do not allow for the production of geometrically controlled, reproducible structures and often fail to allow the independent variation of individual geometric parameters. Current developments in additive manufacturing technologies suggest that 3D printing will allow a more controlled and systematic exploration of scaffold architectures. This more direct translation of design into structure requires a pipeline for design-driven optimization. A theoretical framework for systematic design and evaluation of architectural parameters on biological response is presented. Four levels of architecture are considered, namely (1 surface topography, (2 pore size and geometry, (3 porous networks and (4 macroscopic pore arrangement, including the potential for spatially varied architectures. Studies exploring the effect of various parameters within these levels are reviewed. This framework will hopefully allow uncovering of new relationships between architecture and biological response in a more systematic way, as well as inform future refinement of fabrication techniques to fulfill architectural necessities with a consideration of biological implications.

Holey Nanocarbon Architectures for High-Performance Lithium-Air Batteries

Data.gov (United States)

National Aeronautics and Space Administration — The objective of this proposal is to develop 3-dimensional hierarchical mesoporous nanocarbon architecture using primarily our unique holey nanocarbon platforms...

ALLIANCE: An architecture for fault tolerant multi-robot cooperation

Energy Technology Data Exchange (ETDEWEB)

Parker, L.E.

1995-02-01

ALLIANCE is a software architecture that facilitates the fault tolerant cooperative control of teams of heterogeneous mobile robots performing missions composed of loosely coupled, largely independent subtasks. ALLIANCE allows teams of robots, each of which possesses a variety of high-level functions that it can perform during a mission, to individually select appropriate actions throughout the mission based on the requirements of the mission, the activities of other robots, the current environmental conditions, and the robot`s own internal states. ALLIANCE is a fully distributed, behavior-based architecture that incorporates the use of mathematically modeled motivations (such as impatience and acquiescence) within each robot to achieve adaptive action selection. Since cooperative robotic teams usually work in dynamic and unpredictable environments, this software architecture allows the robot team members to respond robustly, reliably, flexibly, and coherently to unexpected environmental changes and modifications in the robot team that may occur due to mechanical failure, the learning of new skills, or the addition or removal of robots from the team by human intervention. The feasibility of this architecture is demonstrated in an implementation on a team of mobile robots performing a laboratory version of hazardous waste cleanup.

ALLIANCE: An architecture for fault tolerant multi-robot cooperation

International Nuclear Information System (INIS)

Parker, L.E.

1995-02-01

ALLIANCE is a software architecture that facilitates the fault tolerant cooperative control of teams of heterogeneous mobile robots performing missions composed of loosely coupled, largely independent subtasks. ALLIANCE allows teams of robots, each of which possesses a variety of high-level functions that it can perform during a mission, to individually select appropriate actions throughout the mission based on the requirements of the mission, the activities of other robots, the current environmental conditions, and the robot's own internal states. ALLIANCE is a fully distributed, behavior-based architecture that incorporates the use of mathematically modeled motivations (such as impatience and acquiescence) within each robot to achieve adaptive action selection. Since cooperative robotic teams usually work in dynamic and unpredictable environments, this software architecture allows the robot team members to respond robustly, reliably, flexibly, and coherently to unexpected environmental changes and modifications in the robot team that may occur due to mechanical failure, the learning of new skills, or the addition or removal of robots from the team by human intervention. The feasibility of this architecture is demonstrated in an implementation on a team of mobile robots performing a laboratory version of hazardous waste cleanup

Development of economically viable, highly integrated, highly modular SEGIS architecture.

Energy Technology Data Exchange (ETDEWEB)

Enslin, Johan (Petra Solar, Inc., South Plainfield, NJ); Hamaoui, Ronald (Petra Solar, Inc., South Plainfield, NJ); Gonzalez, Sigifredo; Haddad, Ghaith (Petra Solar, Inc., South Plainfield, NJ); Rustom, Khalid (Petra Solar, Inc., South Plainfield, NJ); Stuby, Rick (Petra Solar, Inc., South Plainfield, NJ); Kuran, Mohammad (Petra Solar, Inc., South Plainfield, NJ); Mark, Evlyn (Petra Solar, Inc., South Plainfield, NJ); Amarin, Ruba (Petra Solar, Inc., South Plainfield, NJ); Alatrash, Hussam (Petra Solar, Inc., South Plainfield, NJ); Bower, Ward Isaac; Kuszmaul, Scott S.; Sena-Henderson, Lisa; David, Carolyn; Akhil, Abbas Ali

2012-03-01

Initiated in 2008, the SEGIS initiative is a partnership involving the U.S. DOE, Sandia National Laboratories, private sector companies, electric utilities, and universities. Projects supported under the initiative have focused on the complete-system development of solar technologies, with the dual goal of expanding renewable PV applications and addressing new challenges of connecting large-scale solar installations in higher penetrations to the electric grid. Petra Solar, Inc., a New Jersey-based company, received SEGIS funds to develop solutions to two of these key challenges: integrating increasing quantities of solar resources into the grid without compromising (and likely improving) power quality and reliability, and moving the design from a concept of intelligent system controls to successful commercialization. The resulting state-of-the art technology now includes a distributed photovoltaic (PV) architecture comprising AC modules that not only feed directly into the electrical grid at distribution levels but are equipped with new functions that improve voltage stability and thus enhance overall grid stability. This integrated PV system technology, known as SunWave, has applications for 'Power on a Pole,' and comes with a suite of technical capabilities, including advanced inverter and system controls, micro-inverters (capable of operating at both the 120V and 240V levels), communication system, network management system, and semiconductor integration. Collectively, these components are poised to reduce total system cost, increase the system's overall value and help mitigate the challenges of solar intermittency. Designed to be strategically located near point of load, the new SunWave technology is suitable for integration directly into the electrical grid but is also suitable for emerging microgrid applications. SunWave was showcased as part of a SEGIS Demonstration Conference at Pepco Holdings, Inc., on September 29, 2011, and is presently

Architecture, design and protection of electrical distribution networks

Energy Technology Data Exchange (ETDEWEB)

Sorrel, J.P. [Schneider electric Industries SA (France)

2000-07-01

Architectures related to AII Electric Ship (AES) require high level of propulsion power. Merchant ships and obviously warships require a low vulnerability, a high reliability and availability, a simple maintainability as well as an ordinary ode of operation. These constraints converge to an optimum single line diagram. We will focus on the mode of operation of the network, its constraints, the facilities to use a ring distribution for the ship service distribution system, the earthing of HV network as well as future developments. (author)

A Router Architecture for Connection-Oriented Service Guarantees in the MANGO Clockless Network-on-Chip

DEFF Research Database (Denmark)

Bjerregaard, Tobias; Sparsø, Jens

2005-01-01

On-chip networks for future system-on-chip designs need simple, high performance implementations. In order to promote system-level integrity, guaranteed services (GS) need to be provided. We propose a network-on-chip (NoC) router architecture to support this, and demonstrate with a CMOS standard...... cell design. Our implementation is based on clockless circuit techniques, and thus inherently supports a modular, GALS-oriented design flow. Our router exploits virtual channels to provide connection-oriented GS, as well as connection-less best-effort (BE) routing. The architecture is highly flexible...

Architecture as mediator of culture, democracy and hope: XXIII World Congress of Architecture in Turin

Directory of Open Access Journals (Sweden)

Bogdanov Ana

2009-01-01

Full Text Available The XXIII World Congress of Architecture organized by The International Union of Architects (UIA was held in Turin from June 29 to July 03. Every third year this great architectural event gathers together more than one thousand professionals and students from 126 countries that UIA encompasses today. The main topic of the this year Congress was 'Transmitting Architecture' suggesting that future architecture will increasingly depend on communication and integration. It also suggests that global problems which architecture has been encountered with in recent years should be considered at all levels through ever active network of information and communications. In that term exchanging and sharing knowledge and experience among architects of different national and social backgrounds are crucial. Besides, transmitting architecture has also a faint futuristic sound which points out new technologies and their increasing importance in architecture. At last, this topic emphasize that the Congress has been oriented towards and open to not only academic discussions, but to younger generations and students who have always been most experienced in using digital technologies. Throughout the Congress Programme which consisted of lectures, debates, workshops exhibitions, where more than 600 speakers participated, various topics were discussed with a common aim to gain an insight into the situation on current architectural scene, to realize the position of architects and architecture in today's sphere of social, political, cultural, technical and technological factors, and consequently to establish possible tracks and offer recommendations for further progress in this field. Out of Congress, the participants had the opportunity of being introduced to Turin, the city of vision and sustainability put into action.

A Distributed Architecture for Tsunami Early Warning and Collaborative Decision-support in Crises

Science.gov (United States)

Moßgraber, J.; Middleton, S.; Hammitzsch, M.; Poslad, S.

2012-04-01

The presentation will describe work on the system architecture that is being developed in the EU FP7 project TRIDEC on "Collaborative, Complex and Critical Decision-Support in Evolving Crises". The challenges for a Tsunami Early Warning System (TEWS) are manifold and the success of a system depends crucially on the system's architecture. A modern warning system following a system-of-systems approach has to integrate various components and sub-systems such as different information sources, services and simulation systems. Furthermore, it has to take into account the distributed and collaborative nature of warning systems. In order to create an architecture that supports the whole spectrum of a modern, distributed and collaborative warning system one must deal with multiple challenges. Obviously, one cannot expect to tackle these challenges adequately with a monolithic system or with a single technology. Therefore, a system architecture providing the blueprints to implement the system-of-systems approach has to combine multiple technologies and architectural styles. At the bottom layer it has to reliably integrate a large set of conventional sensors, such as seismic sensors and sensor networks, buoys and tide gauges, and also innovative and unconventional sensors, such as streams of messages from social media services. At the top layer it has to support collaboration on high-level decision processes and facilitates information sharing between organizations. In between, the system has to process all data and integrate information on a semantic level in a timely manner. This complex communication follows an event-driven mechanism allowing events to be published, detected and consumed by various applications within the architecture. Therefore, at the upper layer the event-driven architecture (EDA) aspects are combined with principles of service-oriented architectures (SOA) using standards for communication and data exchange. The most prominent challenges on this layer

High-level verification

CERN Document Server

Lerner, Sorin; Kundu, Sudipta

2011-01-01

Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog for system-level design. While a major goal of these high-level languages is to enable verification at a higher level of abstraction, allowing early exploration of system-level designs, the focus so far for validation purposes has been on traditional testing techniques such as random testing and scenario-based

Integrated Optical Interconnect Architectures for Embedded Systems

CERN Document Server

Nicolescu, Gabriela

2013-01-01

This book provides a broad overview of current research in optical interconnect technologies and architectures. Introductory chapters on high-performance computing and the associated issues in conventional interconnect architectures, and on the fundamental building blocks for integrated optical interconnect, provide the foundations for the bulk of the book which brings together leading experts in the field of optical interconnect architectures for data communication. Particular emphasis is given to the ways in which the photonic components are assembled into architectures to address the needs of data-intensive on-chip communication, and to the performance evaluation of such architectures for specific applications.   Provides state-of-the-art research on the use of optical interconnects in Embedded Systems; Begins with coverage of the basics for high-performance computing and optical interconnect; Includes a variety of on-chip optical communication topologies; Features coverage of system integration and opti...

Bridging a divide: architecture for a joint hospital-primary care data warehouse.

Science.gov (United States)

An, Jeff; Keshavjee, Karim; Mirza, Kashif; Vassanji, Karim; Greiver, Michelle

2015-01-01

Healthcare costs are driven by a surprisingly small number of patients. Predicting who is likely to require care in the near future could help reduce costs by pre-empting use of expensive health care resources such as emergency departments and hospitals. We describe the design of an architecture for a joint hospital-primary care data warehouse (JDW) that can monitor the effectiveness of in-hospital interventions in reducing readmissions and predict which patients are most likely to be admitted to hospital in the near future. The design identifies the key governance elements, the architectural principles, the business case, the privacy architecture, future work flows, the IT infrastructure, the data analytics and the high level implementation plan for realization of the JDW. This architecture fills a gap in bridging data from two separate hospital and primary care organizations, not a single managed care entity with multiple locations. The JDW architecture design was well received by the stakeholders engaged and by senior leadership at the hospital and the primary care organization. Future plans include creating a demonstration system and conducting a pilot study.

Polarity-specific high-level information propagation in neural networks.

Science.gov (United States)

Lin, Yen-Nan; Chang, Po-Yen; Hsiao, Pao-Yueh; Lo, Chung-Chuan

2014-01-01

Analyzing the connectome of a nervous system provides valuable information about the functions of its subsystems. Although much has been learned about the architectures of neural networks in various organisms by applying analytical tools developed for general networks, two distinct and functionally important properties of neural networks are often overlooked. First, neural networks are endowed with polarity at the circuit level: Information enters a neural network at input neurons, propagates through interneurons, and leaves via output neurons. Second, many functions of nervous systems are implemented by signal propagation through high-level pathways involving multiple and often recurrent connections rather than by the shortest paths between nodes. In the present study, we analyzed two neural networks: the somatic nervous system of Caenorhabditis elegans (C. elegans) and the partial central complex network of Drosophila, in light of these properties. Specifically, we quantified high-level propagation in the vertical and horizontal directions: the former characterizes how signals propagate from specific input nodes to specific output nodes and the latter characterizes how a signal from a specific input node is shared by all output nodes. We found that the two neural networks are characterized by very efficient vertical and horizontal propagation. In comparison, classic small-world networks show a trade-off between vertical and horizontal propagation; increasing the rewiring probability improves the efficiency of horizontal propagation but worsens the efficiency of vertical propagation. Our result provides insights into how the complex functions of natural neural networks may arise from a design that allows them to efficiently transform and combine input signals.

High Insulin Levels in KK-Ay Diabetic Mice Cause Increased Cortical Bone Mass and Impaired Trabecular Micro-Structure

Directory of Open Access Journals (Sweden)

Cen Fu

2015-04-01

Full Text Available Type 2 diabetes mellitus (T2DM is a chronic disease characterized by hyperglycemia, hyperinsulinemia and complications, including obesity and osteoporosis. Rodents have been widely used to model human T2DM and investigate its effect on the skeleton. We aimed to investigate skeletal alterations in Yellow Kuo Kondo (KK-Ay diabetic mice displaying high insulin and glucose levels. Bone mineral density (BMD, micro-architecture and bone metabolism-related genes were analyzed. The total femoral areal BMD (aBMD, cortical volumetric BMD (vBMD and thickness were significantly increased in KK-Ay mice, while the trabecular vBMD and mineralized bone volume/tissue volume (BV/TV, trabecular thickness and number were decreased compared to C57BL mice. The expression of both osteoblast-related genes, such as osteocalcin (OC, bone sialoprotein, Type I Collagen, osteonectin, RUNX2 and OSX, and osteoclast-related genes, such as TRAP and TCIRG, were up-regulated in KK-Ay mice. Correlation analyses showed that serum insulin levels were positively associated with aBMD, cortical vBMD and thickness and negatively associated with trabecular vBMD and micro-architecture. In addition, serum insulin levels were positively related to osteoblast-related and osteoclast-related gene expression. Our data suggest that high insulin levels in KK-Ay diabetic mice may increase cortical bone mass and impair trabecular micro-structure by up-regulating osteoblast-and osteoclast-related gene expression.

An integrated command and control architecture concept for unmanned systems in the year 2030

OpenAIRE

Johnson, Jamarr J.; Buckley, Omari D.; Cunningham, Dustin; Matthews, Adam; Quincy, Keith E.; Fontenot, Dion G.; Moran, Michael G.; Tham, Gabriel; Wong, Jason; Quah, Raymond; Chia, Tommy; Costica, Yionon; Gho, Delvin; Seet, Henry; Ang, Teo Hong

2010-01-01

Approved for public release; distribution is unlimited. U.S. Forces require an integrated Command and Control Architecture that enables operations of a dynamic mix of manned and unmanned systems. The level of autonomous behavior correlates to: 1) the amount of trust with the reporting vehicles, and 2) the multi-spectral perspective of the observations. The intent to illuminate the architectural issues for force protection in 2030 was based on a multi-phased analytical model of High Value ...

Highly efficient phosphorescent blue and white organic light-emitting devices with simplified architectures

Energy Technology Data Exchange (ETDEWEB)

Chang, Chih-Hao, E-mail: chc@saturn.yzu.edu.tw [Department of Photonics Engineering, Yuan Ze University, Chung-Li, Taiwan 32003 (China); Ding, Yong-Shung; Hsieh, Po-Wei; Chang, Chien-Ping; Lin, Wei-Chieh [Department of Photonics Engineering, Yuan Ze University, Chung-Li, Taiwan 32003 (China); Chang, Hsin-Hua, E-mail: hhua3@mail.vnu.edu.tw [Department of Electro-Optical Engineering, Vanung University, Chung-Li, Taiwan 32061 (China)

2011-09-01

Blue phosphorescent organic light-emitting devices (PhOLEDs) with quantum efficiency close to the theoretical maximum were achieved by utilizing a double-layer architecture. Two wide-triplet-gap materials, 1,3-bis(9-carbazolyl)benzene and 1,3,5-tri[(3-pyridyl)-phen-3-yl]benzene, were employed in the emitting and electron-transport layers respectively. The opposite carrier-transport characteristics of these two materials were leveraged to define the exciton formation zone and thus increase the probability of recombination. The efficiency at practical luminance (100 cd/m{sup 2}) was as high as 20.8%, 47.7 cd/A and 31.2 lm/W, respectively. Furthermore, based on the design concept of this simplified architecture, efficient warmish-white PhOLEDs were developed. Such two-component white organic light-emitting devices exhibited rather stable colors over a wide brightness range and yielded electroluminescence efficiencies of 15.3%, 33.3 cd/A, and 22.7 lm/W in the forward directions.

Highly efficient phosphorescent blue and white organic light-emitting devices with simplified architectures

International Nuclear Information System (INIS)

Chang, Chih-Hao; Ding, Yong-Shung; Hsieh, Po-Wei; Chang, Chien-Ping; Lin, Wei-Chieh; Chang, Hsin-Hua

2011-01-01

Blue phosphorescent organic light-emitting devices (PhOLEDs) with quantum efficiency close to the theoretical maximum were achieved by utilizing a double-layer architecture. Two wide-triplet-gap materials, 1,3-bis(9-carbazolyl)benzene and 1,3,5-tri[(3-pyridyl)-phen-3-yl]benzene, were employed in the emitting and electron-transport layers respectively. The opposite carrier-transport characteristics of these two materials were leveraged to define the exciton formation zone and thus increase the probability of recombination. The efficiency at practical luminance (100 cd/m 2 ) was as high as 20.8%, 47.7 cd/A and 31.2 lm/W, respectively. Furthermore, based on the design concept of this simplified architecture, efficient warmish-white PhOLEDs were developed. Such two-component white organic light-emitting devices exhibited rather stable colors over a wide brightness range and yielded electroluminescence efficiencies of 15.3%, 33.3 cd/A, and 22.7 lm/W in the forward directions.

Access control and service-oriented architectures

NARCIS (Netherlands)

Leune, C.J.

2007-01-01

Access Control and Service-Oriented Architectures" investigates in which way logical access control can be achieved effectively, in particular in highly dynamic environments such as service-oriented architectures (SOA's). The author combines state-of-the-art best-practice and projects these onto the

The ATLAS online High Level Trigger framework: Experience reusing offline software components in the ATLAS trigger

International Nuclear Information System (INIS)

Wiedenmann, Werner

2010-01-01

Event selection in the ATLAS High Level Trigger is accomplished to a large extent by reusing software components and event selection algorithms developed and tested in an offline environment. Many of these offline software modules are not specifically designed to run in a heavily multi-threaded online data flow environment. The ATLAS High Level Trigger (HLT) framework based on the GAUDI and ATLAS ATHENA frameworks, forms the interface layer, which allows the execution of the HLT selection and monitoring code within the online run control and data flow software. While such an approach provides a unified environment for trigger event selection across all of ATLAS, it also poses strict requirements on the reused software components in terms of performance, memory usage and stability. Experience of running the HLT selection software in the different environments and especially on large multi-node trigger farms has been gained in several commissioning periods using preloaded Monte Carlo events, in data taking periods with cosmic events and in a short period with proton beams from LHC. The contribution discusses the architectural aspects of the HLT framework, its performance and its software environment within the ATLAS computing, trigger and data flow projects. Emphasis is also put on the architectural implications for the software by the use of multi-core processors in the computing farms and the experiences gained with multi-threading and multi-process technologies.

Exploring multiple feature combination strategies with a recurrent neural network architecture for off-line handwriting recognition

Science.gov (United States)

Mioulet, L.; Bideault, G.; Chatelain, C.; Paquet, T.; Brunessaux, S.

2015-01-01

The BLSTM-CTC is a novel recurrent neural network architecture that has outperformed previous state of the art algorithms in tasks such as speech recognition or handwriting recognition. It has the ability to process long term dependencies in temporal signals in order to label unsegmented data. This paper describes different ways of combining features using a BLSTM-CTC architecture. Not only do we explore the low level combination (feature space combination) but we also explore high level combination (decoding combination) and mid-level (internal system representation combination). The results are compared on the RIMES word database. Our results show that the low level combination works best, thanks to the powerful data modeling of the LSTM neurons.

Architectural prototyping

DEFF Research Database (Denmark)

Bardram, Jakob Eyvind; Christensen, Henrik Bærbak; Hansen, Klaus Marius

2004-01-01

A major part of software architecture design is learning how specific architectural designs balance the concerns of stakeholders. We explore the notion of "architectural prototypes", correspondingly architectural prototyping, as a means of using executable prototypes to investigate stakeholders...

Negative price-image effects of appealing store architecture

DEFF Research Database (Denmark)

Zielke, Stephan; Toporowski, Waldemar

2012-01-01

Retailers often worry about the negative effects of appealing exterior architecture on their store's price image, especially the price-level perception and the ease of price evaluation. Findings from prior laboratory experiments support these concerns, while field studies find no such effects. Th....... The availability of price information neutralizes the negative effects of appealing architecture on the price-level perception, but not on the ease of price evaluation....

High-performance bidiagonal reduction using tile algorithms on homogeneous multicore architectures

KAUST Repository

Ltaief, Hatem

2013-04-01

This article presents a new high-performance bidiagonal reduction (BRD) for homogeneous multicore architectures. This article is an extension of the high-performance tridiagonal reduction implemented by the same authors [Luszczek et al., IPDPS 2011] to the BRD case. The BRD is the first step toward computing the singular value decomposition of a matrix, which is one of the most important algorithms in numerical linear algebra due to its broad impact in computational science. The high performance of the BRD described in this article comes from the combination of four important features: (1) tile algorithms with tile data layout, which provide an efficient data representation in main memory; (2) a two-stage reduction approach that allows to cast most of the computation during the first stage (reduction to band form) into calls to Level 3 BLAS and reduces the memory traffic during the second stage (reduction from band to bidiagonal form) by using high-performance kernels optimized for cache reuse; (3) a data dependence translation layer that maps the general algorithm with column-major data layout into the tile data layout; and (4) a dynamic runtime system that efficiently schedules the newly implemented kernels across the processing units and ensures that the data dependencies are not violated. A detailed analysis is provided to understand the critical impact of the tile size on the total execution time, which also corresponds to the matrix bandwidth size after the reduction of the first stage. The performance results show a significant improvement over currently established alternatives. The new high-performance BRD achieves up to a 30-fold speedup on a 16-core Intel Xeon machine with a 12000×12000 matrix size against the state-of-the-art open source and commercial numerical software packages, namely LAPACK, compiled with optimized and multithreaded BLAS from MKL as well as Intel MKL version 10.2. © 2013 ACM.

Thread-level parallelization and optimization of NWChem for the Intel MIC architecture

Energy Technology Data Exchange (ETDEWEB)

Shan, Hongzhang [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Williams, Samuel [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); de Jong, Wibe [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Oliker, Leonid [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)

2015-01-01

In the multicore era it was possible to exploit the increase in on-chip parallelism by simply running multiple MPI processes per chip. Unfortunately, manycore processors' greatly increased thread- and data-level parallelism coupled with a reduced memory capacity demand an altogether different approach. In this paper we explore augmenting two NWChem modules, triples correction of the CCSD(T) and Fock matrix construction, with OpenMP in order that they might run efficiently on future manycore architectures. As the next NERSC machine will be a self-hosted Intel MIC (Xeon Phi) based supercomputer, we leverage an existing MIC testbed at NERSC to evaluate our experiments. In order to proxy the fact that future MIC machines will not have a host processor, we run all of our experiments in native mode. We found that while straightforward application of OpenMP to the deep loop nests associated with the tensor contractions of CCSD(T) was sufficient in attaining high performance, significant e ort was required to safely and efeciently thread the TEXAS integral package when constructing the Fock matrix. Ultimately, our new MPI+OpenMP hybrid implementations attain up to 65× better performance for the triples part of the CCSD(T) due in large part to the fact that the limited on-card memory limits the existing MPI implementation to a single process per card. Additionally, we obtain up to 1.6× better performance on Fock matrix constructions when compared with the best MPI implementations running multiple processes per card.

Thread-Level Parallelization and Optimization of NWChem for the Intel MIC Architecture

Energy Technology Data Exchange (ETDEWEB)

Shan, Hongzhang; Williams, Samuel; Jong, Wibe de; Oliker, Leonid

2014-10-10

In the multicore era it was possible to exploit the increase in on-chip parallelism by simply running multiple MPI processes per chip. Unfortunately, manycore processors' greatly increased thread- and data-level parallelism coupled with a reduced memory capacity demand an altogether different approach. In this paper we explore augmenting two NWChem modules, triples correction of the CCSD(T) and Fock matrix construction, with OpenMP in order that they might run efficiently on future manycore architectures. As the next NERSC machine will be a self-hosted Intel MIC (Xeon Phi) based supercomputer, we leverage an existing MIC testbed at NERSC to evaluate our experiments. In order to proxy the fact that future MIC machines will not have a host processor, we run all of our experiments in tt native mode. We found that while straightforward application of OpenMP to the deep loop nests associated with the tensor contractions of CCSD(T) was sufficient in attaining high performance, significant effort was required to safely and efficiently thread the TEXAS integral package when constructing the Fock matrix. Ultimately, our new MPI OpenMP hybrid implementations attain up to 65x better performance for the triples part of the CCSD(T) due in large part to the fact that the limited on-card memory limits the existing MPI implementation to a single process per card. Additionally, we obtain up to 1.6x better performance on Fock matrix constructions when compared with the best MPI implementations running multiple processes per card.

Architectural communication: Intra and extra activity of architecture

Directory of Open Access Journals (Sweden)

Stamatović-Vučković Slavica

2013-01-01

Full Text Available Apart from a brief overview of architectural communication viewed from the standpoint of theory of information and semiotics, this paper contains two forms of dualistically viewed architectural communication. The duality denotation/connotation (”primary” and ”secondary” architectural communication is one of semiotic postulates taken from Umberto Eco who viewed architectural communication as a semiotic phenomenon. In addition, architectural communication can be viewed as an intra and an extra activity of architecture where the overall activity of the edifice performed through its spatial manifestation may be understood as an act of communication. In that respect, the activity may be perceived as the ”behavior of architecture”, which corresponds to Lefebvre’s production of space.

Enterprise architecture, a blueprint for enterprise logistics rollout

CSIR Research Space (South Africa)

Coetzee, J

2013-08-01

Full Text Available In this paper it is proposed that Enterprise architecture in principle develops the Logistic Support model for systems on System Hierarchical Level 6 and higher. The Enterprise architectural model is a blue print, like the DNA for biological systems...

Architecture of 32 bit CISC (Complex Instruction Set Computer) microprocessors

International Nuclear Information System (INIS)

Jove, T.M.; Ayguade, E.; Valero, M.

1988-01-01

In this paper we describe the main topics about the architecture of the best known 32-bit CISC microprocessors; i80386, MC68000 family, NS32000 series and Z80000. We focus on the high level languages support, operating system design facilities, memory management, techniques to speed up the overall performance and program debugging facilities. (Author)

High Speed Frame Synchronization and Viterbi Decoding

DEFF Research Database (Denmark)

Paaske, Erik; Justesen, Jørn; Larsen, Knud J.

1998-01-01

The study has been divided into two phases. The purpose of Phase 1 of the study was to describe the system structure and algorithms in sufficient detail to allow drawing the high level architecture of units containing frame synchronization and Viterbi decoding. After selection of which specific...... potentially useful.Algorithms for frame synchronization are described and analyzed. Further, the high level architecture of units that contain frame synchronization and various other functions needed in a complete system is presented. Two such units are described, one for placement before the Viterbi decoder...... towards a realization in an FPGA.Node synchronization performed within a Viterbi decoder is discussed, and the high level architectures of three possible implementations of Viterbi decoders are described: The first implementation uses a number of commercially available decoders while the the two others...

Architectural freedom and industrialized architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

2012-01-01

to explain that architecture can be thought as a complex and diverse design through customization, telling exactly the revitalized storey about the change to a contemporary sustainable and better performing expression in direct relation to the given context. Through the last couple of years we have...... proportions, to organize the process on site choosing either one room wall components or several rooms wall components – either horizontally or vertically. Combined with the seamless joint the playing with these possibilities the new industrialized architecture can deliver variations in choice of solutions...... for retrofit design. If we add the question of the installations e.g. ventilation to this systematic thinking of building technique we get a diverse and functional architecture, thereby creating a new and clearer story telling about new and smart system based thinking behind architectural expression....

Architectural freedom and industrialized architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

2012-01-01

to explain that architecture can be thought as a complex and diverse design through customization, telling exactly the revitalized storey about the change to a contemporary sustainable and better performing expression in direct relation to the given context. Through the last couple of years we have...... expression in the specific housing area. It is the aim of this article to expand the different design strategies which architects can use – to give the individual project attitudes and designs with architectural quality. Through the customized component production it is possible to choose different...... for retrofit design. If we add the question of the installations e.g. ventilation to this systematic thinking of building technique we get a diverse and functional architecture, thereby creating a new and clearer story telling about new and smart system based thinking behind architectural expression....

Architectural freedom and industrialised architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

2012-01-01

Architectural freedom and industrialized architecture. Inge Vestergaard, Associate Professor, Cand. Arch. Aarhus School of Architecture, Denmark Noerreport 20, 8000 Aarhus C Telephone +45 89 36 0000 E-mai l inge.vestergaard@aarch.dk Based on the repetitive architecture from the "building boom" 1960...... customization, telling exactly the revitalized storey about the change to a contemporary sustainable and better performed expression in direct relation to the given context. Through the last couple of years we have in Denmark been focusing a more sustainable and low energy building technique, which also include...... to the building physic problems a new industrialized period has started based on light weight elements basically made of wooden structures, faced with different suitable materials meant for individual expression for the specific housing area. It is the purpose of this article to widen up the different design...

Optical linear algebra processors - Architectures and algorithms

Science.gov (United States)

Casasent, David

1986-01-01

Attention is given to the component design and optical configuration features of a generic optical linear algebra processor (OLAP) architecture, as well as the large number of OLAP architectures, number representations, algorithms and applications encountered in current literature. Number-representation issues associated with bipolar and complex-valued data representations, high-accuracy (including floating point) performance, and the base or radix to be employed, are discussed, together with case studies on a space-integrating frequency-multiplexed architecture and a hybrid space-integrating and time-integrating multichannel architecture.

Motion camera based on a custom vision sensor and an FPGA architecture

Science.gov (United States)

Arias-Estrada, Miguel

1998-09-01

A digital camera for custom focal plane arrays was developed. The camera allows the test and development of analog or mixed-mode arrays for focal plane processing. The camera is used with a custom sensor for motion detection to implement a motion computation system. The custom focal plane sensor detects moving edges at the pixel level using analog VLSI techniques. The sensor communicates motion events using the event-address protocol associated to a temporal reference. In a second stage, a coprocessing architecture based on a field programmable gate array (FPGA) computes the time-of-travel between adjacent pixels. The FPGA allows rapid prototyping and flexible architecture development. Furthermore, the FPGA interfaces the sensor to a compact PC computer which is used for high level control and data communication to the local network. The camera could be used in applications such as self-guided vehicles, mobile robotics and smart surveillance systems. The programmability of the FPGA allows the exploration of further signal processing like spatial edge detection or image segmentation tasks. The article details the motion algorithm, the sensor architecture, the use of the event- address protocol for velocity vector computation and the FPGA architecture used in the motion camera system.

The NOAA Satellite Observing System Architecture Study

Science.gov (United States)

Volz, Stephen; Maier, Mark; Di Pietro, David

2016-01-01

NOAA is beginning a study, the NOAA Satellite Observing System Architecture (NSOSA) study, to plan for the future operational environmental satellite system that will follow GOES and JPSS, beginning about 2030. This is an opportunity to design a modern architecture with no pre-conceived notions regarding instruments, platforms, orbits, etc. The NSOSA study will develop and evaluate architecture alternatives to include partner and commercial alternatives that are likely to become available. The objectives will include both functional needs and strategic characteristics (e.g., flexibility, responsiveness, sustainability). Part of this study is the Space Platform Requirements Working Group (SPRWG), which is being commissioned by NESDIS. The SPRWG is charged to assess new or existing user needs and to provide relative priorities for observational needs in the context of the future architecture. SPRWG results will serve as input to the process for new foundational (Level 0 and Level 1) requirements for the next generation of NOAA satellites that follow the GOES-R, JPSS, DSCOVR, Jason-3, and COSMIC-2 missions.

Genotypic differences in architectural and physiological responses to water restriction in rose bush

Science.gov (United States)

Li-Marchetti, Camille; Le Bras, Camille; Relion, Daniel; Citerne, Sylvie; Huché-Thélier, Lydie; Sakr, Soulaiman; Morel, Philippe; Crespel, Laurent

2015-01-01

The shape and, therefore, the architecture of the plant are dependent on genetic and environmental factors such as water supply. The architecture determines the visual quality, a key criterion underlying the decision to purchase an ornamental potted plant. The aim of this study was to analyze genotypic responses of eight rose bush cultivars to alternation of water restriction and re-watering periods, with soil water potential of -20 and -10 kPa respectively. Responses were evaluated at the architectural level through 3D digitalization using six architectural variables and at the physiological level by measuring stomatal conductance, water content, hormones [abscisic acid (ABA), auxin, cytokinins, jasmonic acid, and salicylic acid (SA)], sugars (sucrose, fructose, and glucose), and proline. Highly significant genotype and watering effects were revealed for all the architectural variables measured, as well as genotype × watering interaction, with three distinct genotypic architectural responses to water restriction – weak, moderate and strong – represented by Hw336, ‘Baipome’ and ‘The Fairy,’ respectively. The physiological analysis explained, at least in part, the more moderate architectural response of ‘Baipome’ compared to ‘The Fairy,’ but not that of Hw336 which is an interspecific hybrid. Such physiological responses in ‘Baipome’ could be related to: (i) the maintenance of the stimulation of budbreak and photosynthetic activity during water restriction periods due to a higher concentration in conjugated cytokinins (cCK) and to a lower concentration in SA; (ii) a better resumption of budbreak during the re-watering periods due to a lower concentration in ABA during this period. When associated with the six architectural descriptors, cCK, SA and ABA, which explained the genotypic differences in this study, could be used as selection criteria for breeding programs aimed at improving plant shape and tolerance to water restriction. PMID

High-bandwidth memory interface

CERN Document Server

Kim, Chulwoo; Song, Junyoung

2014-01-01

This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.   • Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design; • Presents state-of-the-art techniques for memory interface design; • Covers memory interface design at both the circuit level and system architecture level.

Non-Planar Nanotube and Wavy Architecture Based Ultra-High Performance Field Effect Transistors

KAUST Repository

Hanna, Amir

2016-01-01

This dissertation also introduces a novel thin-film-transistors architecture that is named the Wavy Channel (WC) architecture, which allows for extending device width by integrating vertical fin-like substrate corrugations giving

Performances of multiprocessor multidisk architectures for continuous media storage

Science.gov (United States)

Gennart, Benoit A.; Messerli, Vincent; Hersch, Roger D.

1996-03-01

Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In order to fulfill these requirements, we consider a parallel image server architecture which relies on arrays of intelligent disk nodes, each disk node being composed of one processor and one or more disks. This contribution analyzes through bottleneck performance evaluation and simulation the behavior of two multi-processor multi-disk architectures: a point-to-point architecture and a shared-bus architecture similar to current multiprocessor workstation architectures. We compare the two architectures on the basis of two multimedia algorithms: the compute-bound frame resizing by resampling and the data-bound disk-to-client stream transfer. The results suggest that the shared bus is a potential bottleneck despite its very high hardware throughput (400Mbytes/s) and that an architecture with addressable local memories located closely to their respective processors could partially remove this bottleneck. The point- to-point architecture is scalable and able to sustain high throughputs for simultaneous compute- bound and data-bound operations.

Enhanced high-frequency microwave absorption of Fe3O4 architectures based on porous nanoflake

DEFF Research Database (Denmark)

Wang, Xiaoliang; Liu, Yanguo; Han, Hongyan

2017-01-01

Hierarchical Fe3O4 architectures assembled with porous nanoplates (p-Fe3O4) were synthesized. Due to the strong shape anisotropy of the nanoplates, the p-Fe3O4 exhibits increased microwave resonance towards high frequency range. The improved microwave absorption properties of the p-Fe3O4, including...

Enhanced high-frequency microwave absorption of Fe3O4 architectures based on porous nanoflake

DEFF Research Database (Denmark)

Wang, Xiaoliang; Liu, Yanguo; Han, Hongyan

2017-01-01

Hierarchical Fe3O4 architectures assembled with porous nanoplates (p-Fe3O4) were synthesized. Due to the strong shape anisotropy of the nanoplates, the p-Fe3O4 exhibits increased microwave resonance towards high frequency range. The improved microwave absorption properties of the p-Fe3O4, includi...

The detailed 3D multi-loop aggregate/rosette chromatin architecture and functional dynamic organization of the human and mouse genomes

DEFF Research Database (Denmark)

Knoch, Tobias A; Wachsmuth, Malte; Kepper, Nick

2016-01-01

BACKGROUND: The dynamic three-dimensional chromatin architecture of genomes and its co-evolutionary connection to its function-the storage, expression, and replication of genetic information-is still one of the central issues in biology. Here, we describe the much debated 3D architecture...... of the human and mouse genomes from the nucleosomal to the megabase pair level by a novel approach combining selective high-throughput high-resolution chromosomal interaction capture (T2C), polymer simulations, and scaling analysis of the 3D architecture and the DNA sequence. RESULTS: The genome is compacted...... into a chromatin quasi-fibre with ~5 ± 1 nucleosomes/11 nm, folded into stable ~30-100 kbp loops forming stable loop aggregates/rosettes connected by similar sized linkers. Minor but significant variations in the architecture are seen between cell types and functional states. The architecture and the DNA sequence...

Software architecture 2

CERN Document Server

Oussalah, Mourad Chabanne

2014-01-01

Over the past 20 years, software architectures have significantly contributed to the development of complex and distributed systems. Nowadays, it is recognized that one of the critical problems in the design and development of any complex software system is its architecture, i.e. the organization of its architectural elements. Software Architecture presents the software architecture paradigms based on objects, components, services and models, as well as the various architectural techniques and methods, the analysis of architectural qualities, models of representation of architectural templa

Lightweight enterprise architectures

CERN Document Server

Theuerkorn, Fenix

2004-01-01

STATE OF ARCHITECTUREArchitectural ChaosRelation of Technology and Architecture The Many Faces of Architecture The Scope of Enterprise Architecture The Need for Enterprise ArchitectureThe History of Architecture The Current Environment Standardization Barriers The Need for Lightweight Architecture in the EnterpriseThe Cost of TechnologyThe Benefits of Enterprise Architecture The Domains of Architecture The Gap between Business and ITWhere Does LEA Fit? LEA's FrameworkFrameworks, Methodologies, and Approaches The Framework of LEATypes of Methodologies Types of ApproachesActual System Environmen

Software architecture 1

CERN Document Server

Oussalah , Mourad Chabane

2014-01-01

Over the past 20 years, software architectures have significantly contributed to the development of complex and distributed systems. Nowadays, it is recognized that one of the critical problems in the design and development of any complex software system is its architecture, i.e. the organization of its architectural elements. Software Architecture presents the software architecture paradigms based on objects, components, services and models, as well as the various architectural techniques and methods, the analysis of architectural qualities, models of representation of architectural template

Evolution of the Ethane Architecture

National Research Council Canada - National Science Library

Casado, Martin; Shenker, Scott

2009-01-01

The Ethane architecture, developed at Stanford University, demonstrated that a novel approach to building secure networks could support superior low-level security and flexible policy-based control over individual flows...

Implementing the Freight Transportation Data Architecture : Data Element Dictionary

Science.gov (United States)

2015-01-01

NCFRP Report 9: Guidance for Developing a Freight Data Architecture articulates the value of establishing architecture for linking data across modes, subjects, and levels of geography to obtain essential information for decision making. Central to th...

A task-based parallelism and vectorized approach to 3D Method of Characteristics (MOC) reactor simulation for high performance computing architectures

Science.gov (United States)

Tramm, John R.; Gunow, Geoffrey; He, Tim; Smith, Kord S.; Forget, Benoit; Siegel, Andrew R.

2016-05-01

In this study we present and analyze a formulation of the 3D Method of Characteristics (MOC) technique applied to the simulation of full core nuclear reactors. Key features of the algorithm include a task-based parallelism model that allows independent MOC tracks to be assigned to threads dynamically, ensuring load balancing, and a wide vectorizable inner loop that takes advantage of modern SIMD computer architectures. The algorithm is implemented in a set of highly optimized proxy applications in order to investigate its performance characteristics on CPU, GPU, and Intel Xeon Phi architectures. Speed, power, and hardware cost efficiencies are compared. Additionally, performance bottlenecks are identified for each architecture in order to determine the prospects for continued scalability of the algorithm on next generation HPC architectures.

Indigenous architecture as a context-oriented architecture, a look at ...

African Journals Online (AJOL)

What has become problematic as the achievement of international style and globalization of architecture during the time has been the purely technological look at architecture, and the architecture without belonging to a place. In recent decades, the topic of sustainable architecture and reconsidering indigenous architecture ...

Co3O4 based non-enzymatic glucose sensor with high sensitivity and reliable stability derived from hollow hierarchical architecture

Science.gov (United States)

Tian, Liangliang; He, Gege; Cai, Yanhua; Wu, Shenping; Su, Yongyao; Yan, Hengqing; Yang, Cong; Chen, Yanling; Li, Lu

2018-02-01

Inspired by kinetics, the design of hollow hierarchical electrocatalysts through large-scale integration of building blocks is recognized as an effective approach to the achievement of superior electrocatalytic performance. In this work, a hollow, hierarchical Co3O4 architecture (Co3O4 HHA) was constructed using a coordinated etching and precipitation (CEP) method followed by calcination. The resulting Co3O4 HHA electrode exhibited excellent electrocatalytic activity in terms of high sensitivity (839.3 μA mM-1 cm-2) and reliable stability in glucose detection. The high sensitivity could be attributed to the large specific surface area (SSA), ample unimpeded penetration diffusion paths and high electron transfer rate originating from the unique two-dimensional (2D) sheet-like character and hollow porous architecture. The hollow hierarchical structure also affords sufficient interspace for accommodation of volume change and structural strain, resulting in enhanced stability. The results indicate that Co3O4 HHA could have potential for application in the design of non-enzymatic glucose sensors, and that the construction of hollow hierarchical architecture provides an efficient way to design highly active, stable electrocatalysts.

The Politics of Governance Architectures

DEFF Research Database (Denmark)

Borrás, Susana; Radaelli, Claudio M.

2011-01-01

Governance architectures are strategic and long-term institutional arrangements of international organizations exhibiting three features; namely, they address strategic and long-term problems in a holistic manner, they set substantive output-oriented goals, and they are implemented through...... not being identified as an object of study on its own right. We define the Lisbon Strategy as a case of governance architecture, raising questions about its creation, evolution and impact at the national level. We tackle these questions by drawing on institutional theories about emergence and change...

CVISN operational and architectural compatibility handbook (COACH). Part 1, Operational concept and top-level design checklists

Science.gov (United States)

1999-04-22

The CVISN Operational and Architectural Compatibility Handbook (COACH) provides a comprehensive checklist of what is required to conform with the Commercial Vehicle Information Systems and Networks (CVISN) operational concepts and architecture. It is...

Experiences from the Architectural Migration of a Joint Replacement Surgery Information System

Directory of Open Access Journals (Sweden)

Samuli Niiranen

2008-01-01

Full Text Available The goal of this study is to present the experiences gathered from the migration of an existing and deployed joint replacement surgery information system from a classical 2-tier architecture to a 4-tier architecture. These include discussion on the motivation for the migration and on the technical benefits of the chosen technical migration path and an evaluation of user experiences. The results from the analysis of clinical end-user and administrator experiences show an increase in the perceived performance and maintainability of the system and a high level of acceptance for the new system version.

Architecture in the Islamic Civilization: Muslim Building or Islamic Architecture

OpenAIRE

Yassin, Ayat Ali; Utaberta, Dr. Nangkula

2012-01-01

The main problem of the theory in the arena of islamic architecture is affected by some of its Westernthoughts, and stereotyping the islamic architecture according to Western thoughts; this leads to the breakdownof the foundations in the islamic architecture. It is a myth that islamic architecture is subjected to theinfluence from foreign architectures. This paper will highlight the dialectical concept of islamic architecture ormuslim buildings and the areas of recognition in islamic architec...

Architectural and Algorithmic Requirements for a Next-Generation System Analysis Code

Energy Technology Data Exchange (ETDEWEB)

V.A. Mousseau

2010-05-01

This document presents high-level architectural and system requirements for a next-generation system analysis code (NGSAC) to support reactor safety decision-making by plant operators and others, especially in the context of light water reactor plant life extension. The capabilities of NGSAC will be different from those of current-generation codes, not only because computers have evolved significantly in the generations since the current paradigm was first implemented, but because the decision-making processes that need the support of next-generation codes are very different from the decision-making processes that drove the licensing and design of the current fleet of commercial nuclear power reactors. The implications of these newer decision-making processes for NGSAC requirements are discussed, and resulting top-level goals for the NGSAC are formulated. From these goals, the general architectural and system requirements for the NGSAC are derived.

Fault tolerant architecture for artificial olfactory system

International Nuclear Information System (INIS)

Lotfivand, Nasser; Hamidon, Mohd Nizar; Abdolzadeh, Vida

2015-01-01

In this paper, to cover and mask the faults that occur in the sensing unit of an artificial olfactory system, a novel architecture is offered. The proposed architecture is able to tolerate failures in the sensors of the array and the faults that occur are masked. The proposed architecture for extracting the correct results from the output of the sensors can provide the quality of service for generated data from the sensor array. The results of various evaluations and analysis proved that the proposed architecture has acceptable performance in comparison with the classic form of the sensor array in gas identification. According to the results, achieving a high odor discrimination based on the suggested architecture is possible. (paper)

Genetic dissection of maize plant architecture with an ultra-high density bin map based on recombinant inbred lines.

Science.gov (United States)

Zhou, Zhiqiang; Zhang, Chaoshu; Zhou, Yu; Hao, Zhuanfang; Wang, Zhenhua; Zeng, Xing; Di, Hong; Li, Mingshun; Zhang, Degui; Yong, Hongjun; Zhang, Shihuang; Weng, Jianfeng; Li, Xinhai

2016-03-03

Plant architecture attributes, such as plant height, ear height, and internode number, have played an important role in the historical increases in grain yield, lodging resistance, and biomass in maize (Zea mays L.). Analyzing the genetic basis of variation in plant architecture using high density QTL mapping will be of benefit for the breeding of maize for many traits. However, the low density of molecular markers in existing genetic maps has limited the efficiency and accuracy of QTL mapping. Genotyping by sequencing (GBS) is an improved strategy for addressing a complex genome via next-generation sequencing technology. GBS has been a powerful tool for SNP discovery and high-density genetic map construction. The creation of ultra-high density genetic maps using large populations of advanced recombinant inbred lines (RILs) is an efficient way to identify QTL for complex agronomic traits. A set of 314 RILs derived from inbreds Ye478 and Qi319 were generated and subjected to GBS. A total of 137,699,000 reads with an average of 357,376 reads per individual RIL were generated, which is equivalent to approximately 0.07-fold coverage of the maize B73 RefGen_V3 genome for each individual RIL. A high-density genetic map was constructed using 4183 bin markers (100-Kb intervals with no recombination events). The total genetic distance covered by the linkage map was 1545.65 cM and the average distance between adjacent markers was 0.37 cM with a physical distance of about 0.51 Mb. Our results demonstrated a relatively high degree of collinearity between the genetic map and the B73 reference genome. The quality and accuracy of the bin map for QTL detection was verified by the mapping of a known gene, pericarp color 1 (P1), which controls the color of the cob, with a high LOD value of 80.78 on chromosome 1. Using this high-density bin map, 35 QTL affecting plant architecture, including 14 for plant height, 14 for ear height, and seven for internode number were detected

Preliminary study on the three-dimensional geoscience information system of high-level radioactive waste geological disposal

International Nuclear Information System (INIS)

Li Peinan; Zhu Hehua; Li Xiaojun; Wang Ju; Zhong Xia

2010-01-01

The 3D geosciences information system of high-level radioactive waste geological disposal is an important research direction in the current high-level radioactive waste disposal project and a platform of information integration and publishing can be used for the relevant research direction based on the provided data and models interface. Firstly, this paper introduces the basic features about the disposal project of HLW and the function and requirement of the system, which includes the input module, the database management module, the function module, the maintenance module and the output module. Then, the framework system of the high-level waste disposal project information system has been studied, and the overall system architecture has been proposed. Finally, based on the summary and analysis of the database management, the 3D modeling, spatial analysis, digital numerical integration and visualization of underground project, the implementations of key functional modules and the platform have been expounded completely, and the conclusion has been drawn that the component-based software development method should be utilized in system development. (authors)

The ATLAS Data Acquisition and High Level Trigger Systems: Experience and Upgrade Plans

CERN Document Server

Hauser, R; The ATLAS collaboration

2012-01-01

The ATLAS DAQ/HLT system reduces the Level 1 rate of 75 kHz to a few kHz event build rate after Level 2 and a few hundred Hz out output rate to disk. It has operated with an average data taking efficiency of about 94% during the recent years. The performance has far exceeded the initial requirements, with about 5 kHz event building rate and 500 Hz of output rate in 2012, driven mostly by physics requirements. Several improvements and upgrades are foreseen in the upcoming long shutdowns, both to simplify the existing architecture and improve the performance. On the network side new core switches will be deployed and possible use of 10GBit Ethernet links for critical areas is foreseen. An improved read-out system to replace the existing solution based on PCI is under development. A major evolution of the high level trigger system foresees a merging of the Level 2 and Event Filter functionality on a single node, including the event building. This will represent a big simplification of the existing system, while ...

Proactive Modeling of Market, Product and Production Architectures

DEFF Research Database (Denmark)

Mortensen, Niels Henrik; Hansen, Christian Lindschou; Hvam, Lars

2011-01-01

This paper presents an operational model that allows description of market, products and production architectures. The main feature of this model is the ability to describe both structural and functional aspect of architectures. The structural aspect is an answer to the question: What constitutes...... the architecture, e.g. standard designs, design units and interfaces? The functional aspect is an answer to the question: What is the behaviour or the architecture, what is it able to do, i.e. which products at which performance levels can be derived from the architecture? Among the most important benefits...... of this model is the explicit ability to describe what the architecture is prepared for, and what it is not prepared for - concerning development of future derivative products. The model has been applied in a large scale global product development project. Among the most important benefits is contribution to...

High-Precision Phenotyping of Grape Bunch Architecture Using Fast 3D Sensor and Automation.

Science.gov (United States)

Rist, Florian; Herzog, Katja; Mack, Jenny; Richter, Robert; Steinhage, Volker; Töpfer, Reinhard

2018-03-02

Wine growers prefer cultivars with looser bunch architecture because of the decreased risk for bunch rot. As a consequence, grapevine breeders have to select seedlings and new cultivars with regard to appropriate bunch traits. Bunch architecture is a mosaic of different single traits which makes phenotyping labor-intensive and time-consuming. In the present study, a fast and high-precision phenotyping pipeline was developed. The optical sensor Artec Spider 3D scanner (Artec 3D, L-1466, Luxembourg) was used to generate dense 3D point clouds of grapevine bunches under lab conditions and an automated analysis software called 3D-Bunch-Tool was developed to extract different single 3D bunch traits, i.e., the number of berries, berry diameter, single berry volume, total volume of berries, convex hull volume of grapes, bunch width and bunch length. The method was validated on whole bunches of different grapevine cultivars and phenotypic variable breeding material. Reliable phenotypic data were obtained which show high significant correlations (up to r² = 0.95 for berry number) compared to ground truth data. Moreover, it was shown that the Artec Spider can be used directly in the field where achieved data show comparable precision with regard to the lab application. This non-invasive and non-contact field application facilitates the first high-precision phenotyping pipeline based on 3D bunch traits in large plant sets.

A High Performance VLSI Computer Architecture For Computer Graphics

Science.gov (United States)

Chin, Chi-Yuan; Lin, Wen-Tai

1988-10-01

A VLSI computer architecture, consisting of multiple processors, is presented in this paper to satisfy the modern computer graphics demands, e.g. high resolution, realistic animation, real-time display etc.. All processors share a global memory which are partitioned into multiple banks. Through a crossbar network, data from one memory bank can be broadcasted to many processors. Processors are physically interconnected through a hyper-crossbar network (a crossbar-like network). By programming the network, the topology of communication links among processors can be reconfigurated to satisfy specific dataflows of different applications. Each processor consists of a controller, arithmetic operators, local memory, a local crossbar network, and I/O ports to communicate with other processors, memory banks, and a system controller. Operations in each processor are characterized into two modes, i.e. object domain and space domain, to fully utilize the data-independency characteristics of graphics processing. Special graphics features such as 3D-to-2D conversion, shadow generation, texturing, and reflection, can be easily handled. With the current high density interconnection (MI) technology, it is feasible to implement a 64-processor system to achieve 2.5 billion operations per second, a performance needed in most advanced graphics applications.

Transverse pumped laser amplifier architecture

Science.gov (United States)

Bayramian, Andrew James; Manes, Kenneth; Deri, Robert; Erlandson, Al; Caird, John; Spaeth, Mary

2013-07-09

An optical gain architecture includes a pump source and a pump aperture. The architecture also includes a gain region including a gain element operable to amplify light at a laser wavelength. The gain region is characterized by a first side intersecting an optical path, a second side opposing the first side, a third side adjacent the first and second sides, and a fourth side opposing the third side. The architecture further includes a dichroic section disposed between the pump aperture and the first side of the gain region. The dichroic section is characterized by low reflectance at a pump wavelength and high reflectance at the laser wavelength. The architecture additionally includes a first cladding section proximate to the third side of the gain region and a second cladding section proximate to the fourth side of the gain region.

The possibility of use of Kremicj granitoid (Serbia) as an architectural stone

International Nuclear Information System (INIS)

Kureshevicj, Lidja

2010-01-01

The stone from the granitoid pluton of Kremić in southern Serbia has been examined in order to evaluate the possibility of its use as an architectural stone. Both field observations and laboratory testing of specimens have been performed. Although the specimens were collected from the field surface level, their physicomechanical lab test results have shown that the rock mass itself fulfils all the requirements for use as an architectural stone set by the State through Serbian standards. Also, the stone quality is higher in deeper ground levels, where the weathering agents have less intense effects. This stone does not have high ornamental properties, but it has a finegrained texture and low mica content which has a positive effect on its technical characteristics and susceptibility to processing. (Author)

Modular open RF architecture: extending VICTORY to RF systems

Science.gov (United States)

Melber, Adam; Dirner, Jason; Johnson, Michael

2015-05-01

Radio frequency products spanning multiple functions have become increasingly critical to the warfighter. Military use of the electromagnetic spectrum now includes communications, electronic warfare (EW), intelligence, and mission command systems. Due to the urgent needs of counterinsurgency operations, various quick reaction capabilities (QRCs) have been fielded to enhance warfighter capability. Although these QRCs were highly successfully in their respective missions, they were designed independently resulting in significant challenges when integrated on a common platform. This paper discusses how the Modular Open RF Architecture (MORA) addresses these challenges by defining an open architecture for multifunction missions that decomposes monolithic radio systems into high-level components with welldefined functions and interfaces. The functional decomposition maximizes hardware sharing while minimizing added complexity and cost due to modularization. MORA achieves significant size, weight and power (SWaP) savings by allowing hardware such as power amplifiers and antennas to be shared across systems. By separating signal conditioning from the processing that implements the actual radio application, MORA exposes previously inaccessible architecture points, providing system integrators with the flexibility to insert third-party capabilities to address technical challenges and emerging requirements. MORA leverages the Vehicular Integration for Command, Control, Communication, Computers, Intelligence, Surveillance, and Reconnaissance (C4ISR)/EW Interoperability (VICTORY) framework. This paper concludes by discussing how MORA, VICTORY and other standards such as OpenVPX are being leveraged by the U.S. Army Research, Development, and Engineering Command (RDECOM) Communications Electronics Research, Development, and Engineering Center (CERDEC) to define a converged architecture enabling rapid technology insertion, interoperability and reduced SWaP.

ISLAMIZATION OF CONTEMPORARY ARCHITECTURE: SHIFTING THE PARADIGM OF ISLAMIC ARCHITECTURE

Directory of Open Access Journals (Sweden)

Mustapha Ben- Hamouche

2012-03-01

Full Text Available Islamic architecture is often thought as a history course and thus finds its material limited to the cataloguing and studying of legacies of successive empires or various geographic regions of the Islamic world. In practice, adherent professionals tend to reproduce high styles such as Umayyad, Abassid, Fatimid, Ottoman, etc., or recycle well known elements such as the minarets, courtyards, and mashrabiyyahs. This approach, endorsed by the present comprehensive Islamic revival, is believed to be the way to defend and revitalize the identity of Muslim societies that was initially affected by colonization and now is being offended by globalization. However, this approach often clashes with the contemporary trends in architecture that do not necessarily oppose the essence of Islamic architecture. Furthermore, it sometimes lead to an erroneous belief that consists of relating a priori forms to Islam and that clashes with the timeless and universal character of the Islamic religion. The key question to be asked then is, beyond this historicist view, what would be an “Islamic architec-ture” of nowadays that originates from the essence of Islam and that responds to contemporary conditions, needs, aspirations of present Muslim societies and individuals. To what extends can Islamic architecture bene-fits from modern progress and contemporary thought in resurrecting itself without loosing its essence. The hypothesis of the study is that, just as early Muslim architecture started from the adoption, use and re-use of early pre-Islamic architectures before reaching originality, this process, called Islamization, could also take place nowadays with the contemporary thought that is mostly developed in Western and non-Islamic environ-ments. Mechanisms in Islam that allowed the “absorption” of pre-existing civilizations should thus structure the islamization approach and serve the scholars and professionals to reach the new Islamic architecture. The

Computer architecture evaluation for structural dynamics computations: Project summary

Science.gov (United States)

Standley, Hilda M.

1989-01-01

The intent of the proposed effort is the examination of the impact of the elements of parallel architectures on the performance realized in a parallel computation. To this end, three major projects are developed: a language for the expression of high level parallelism, a statistical technique for the synthesis of multicomputer interconnection networks based upon performance prediction, and a queueing model for the analysis of shared memory hierarchies.

MZDASoft: a software architecture that enables large-scale comparison of protein expression levels over multiple samples based on liquid chromatography/tandem mass spectrometry.

Science.gov (United States)

Ghanat Bari, Mehrab; Ramirez, Nelson; Wang, Zhiwei; Zhang, Jianqiu Michelle

2015-10-15

Without accurate peak linking/alignment, only the expression levels of a small percentage of proteins can be compared across multiple samples in Liquid Chromatography/Mass Spectrometry/Tandem Mass Spectrometry (LC/MS/MS) due to the selective nature of tandem MS peptide identification. This greatly hampers biomedical research that aims at finding biomarkers for disease diagnosis, treatment, and the understanding of disease mechanisms. A recent algorithm, PeakLink, has allowed the accurate linking of LC/MS peaks without tandem MS identifications to their corresponding ones with identifications across multiple samples collected from different instruments, tissues and labs, which greatly enhanced the ability of comparing proteins. However, PeakLink cannot be implemented practically for large numbers of samples based on existing software architectures, because it requires access to peak elution profiles from multiple LC/MS/MS samples simultaneously. We propose a new architecture based on parallel processing, which extracts LC/MS peak features, and saves them in database files to enable the implementation of PeakLink for multiple samples. The software has been deployed in High-Performance Computing (HPC) environments. The core part of the software, MZDASoft Parallel Peak Extractor (PPE), can be downloaded with a user and developer's guide, and it can be run on HPC centers directly. The quantification applications, MZDASoft TandemQuant and MZDASoft PeakLink, are written in Matlab, which are compiled with a Matlab runtime compiler. A sample script that incorporates all necessary processing steps of MZDASoft for LC/MS/MS quantification in a parallel processing environment is available. The project webpage is http://compgenomics.utsa.edu/zgroup/MZDASoft. The proposed architecture enables the implementation of PeakLink for multiple samples. Significantly more (100%-500%) proteins can be compared over multiple samples with better quantification accuracy in test cases. MZDASoft

Architecture and VHDL behavioural validation of a parallel processor dedicated to computer vision

International Nuclear Information System (INIS)

Collette, Thierry

1992-01-01

Speeding up image processing is mainly obtained using parallel computers; SIMD processors (single instruction stream, multiple data stream) have been developed, and have proven highly efficient regarding low-level image processing operations. Nevertheless, their performances drop for most intermediate of high level operations, mainly when random data reorganisations in processor memories are involved. The aim of this thesis was to extend the SIMD computer capabilities to allow it to perform more efficiently at the image processing intermediate level. The study of some representative algorithms of this class, points out the limits of this computer. Nevertheless, these limits can be erased by architectural modifications. This leads us to propose SYMPATIX, a new SIMD parallel computer. To valid its new concept, a behavioural model written in VHDL - Hardware Description Language - has been elaborated. With this model, the new computer performances have been estimated running image processing algorithm simulations. VHDL modeling approach allows to perform the system top down electronic design giving an easy coupling between system architectural modifications and their electronic cost. The obtained results show SYMPATIX to be an efficient computer for low and intermediate level image processing. It can be connected to a high level computer, opening up the development of new computer vision applications. This thesis also presents, a top down design method, based on the VHDL, intended for electronic system architects. (author) [fr

Recent experience and future evolution of the CMS High Level Trigger System

CERN Document Server

Bauer, Gerry; Branson, James; Bukowiec, Sebastian Czeslaw; Chaze, Olivier; Cittolin, Sergio; Coarasa Perez, Jose Antonio; Deldicque, Christian; Dobson, Marc; Dupont, Aymeric; Erhan, Samim; Gigi, Dominique; Glege, Frank; Gomez-Reino Garrido, Robert; Hartl, Christian; Holzner, Andre Georg; Masetti, Lorenzo; Meijers, Franciscus; Meschi, Emilio; Mommsen, Remigius; Nunez Barranco Fernandez, Carlos; O'Dell, Vivian; Orsini, Luciano; Paus, Christoph Maria Ernst; Petrucci, Andrea; Pieri, Marco; Polese, Giovanni; Racz, Attila; Raginel, Olivier; Sakulin, Hannes; Sani, Matteo; Schwick, Christoph; Spataru, Andrei Cristian; Stoeckli, Fabian; Sumorok, Konstanty

2012-01-01

The CMS experiment at the LHC uses a two-stage trigger system, with events flowing from the first level trigger at a rate of 100 kHz. These events are read out by the Data Acquisition system (DAQ), assembled in memory in a farm of computers, and finally fed into the high-level trigger (HLT) software running on the farm. The HLT software selects interesting events for offline storage and analysis at a rate of a few hundred Hz. The HLT algorithms consist of sequences of offline-style reconstruction and filtering modules, executed on a farm of 0(10000) CPU cores built from commodity hardware. Experience from the 2010-2011 collider run is detailed, as well as the current architecture of the CMS HLT, and its integration with the CMS reconstruction framework and CMS DAQ. The short- and medium-term evolution of the HLT software infrastructure is discussed, with future improvements aimed at supporting extensions of the HLT computing power, and addressing remaining performance and maintenance issues.

Biophilic architecture: a review of the rationale and outcomes

Directory of Open Access Journals (Sweden)

Jana Söderlund

2015-12-01

Full Text Available Contemporary cities have high stress levels, mental health issues, high crime levels and ill health, while the built environment shows increasing problems with urban heat island effects and air and water pollution. Emerging from these concerns is a new set of design principles and practices where nature needs to play a bigger part called “biophilic architecture”. This design approach asserts that humans have an innate connection with nature that can assist to make buildings and cities more effective human abodes. This paper examines the evidence for this innate human psychological and physiological link to nature and then assesses the emerging research supporting the multiple social, environmental and economic benefits of biophilic architecture.

Optimizations of Unstructured Aerodynamics Computations for Many-core Architectures

KAUST Repository

Al Farhan, Mohammed Ahmed

2018-04-13

We investigate several state-of-the-practice shared-memory optimization techniques applied to key routines of an unstructured computational aerodynamics application with irregular memory accesses. We illustrate for the Intel KNL processor, as a representative of the processors in contemporary leading supercomputers, identifying and addressing performance challenges without compromising the floating point numerics of the original code. We employ low and high-level architecture-specific code optimizations involving thread and data-level parallelism. Our approach is based upon a multi-level hierarchical distribution of work and data across both the threads and the SIMD units within every hardware core. On a 64-core KNL chip, we achieve nearly 2.9x speedup of the dominant routines relative to the baseline. These exhibit almost linear strong scalability up to 64 threads, and thereafter some improvement with hyperthreading. At substantially fewer Watts, we achieve up to 1.7x speedup relative to the performance of 72 threads of a 36-core Haswell CPU and roughly equivalent performance to 112 threads of a 56-core Skylake scalable processor. These optimizations are expected to be of value for many other unstructured mesh PDE-based scientific applications as multi and many-core architecture evolves.

Software architecture analysis tool : software architecture metrics collection

NARCIS (Netherlands)

Muskens, J.; Chaudron, M.R.V.; Westgeest, R.

2002-01-01

The Software Engineering discipline lacks the ability to evaluate software architectures. Here we describe a tool for software architecture analysis that is based on metrics. Metrics can be used to detect possible problems and bottlenecks in software architectures. Even though metrics do not give a

The application of diagrams in architectural design

Directory of Open Access Journals (Sweden)

Dulić Olivera

2014-01-01

Full Text Available Diagrams in architecture represent the visualization of the thinking process, or selective abstraction of concepts or ideas translated into the form of drawings. In addition, they provide insight into the way of thinking about and in architecture, thus creating a balance between the visual and the conceptual. The subject of research presented in this paper are diagrams as a specific kind of architectural representation, and possibilities and importance of their application in the design process. Diagrams are almost old as architecture itself, and they are an element of some of the most important studies of architecture during all periods of history - which results in a large number of different definitions of diagrams, but also very different conceptualizations of their features, functions and applications. The diagrams become part of contemporary architectural discourse during the eighties and nineties of the twentieth century, especially through the work of architects like Bernard Tschumi, Peter Eisenman, Rem Koolhaas, SANAA and others. The use of diagrams in the design process allows unification of some of the essential aspects of the profession: architectural representation and design process, as well as the question of the concept of architectural and urban design at a time of rapid changes at all levels of contemporary society. The aim of the research is the analysis of the diagram as a specific medium for processing large amounts of information that the architect should consider and incorporate into the architectural work. On that basis, it is assumed that an architectural diagram allows the creator the identification and analysis of specific elements or ideas of physical form, thereby constantly maintaining concept of the integrity of the architectural work.

Full integrated system of real-time monitoring based on distributed architecture for the high temperature engineering test reactor (HTTR)

International Nuclear Information System (INIS)

Subekti, Muhammad; Ohno, Tomio; Kudo, Kazuhiko; Takamatsu, Kuniyoshi; Nabeshima, Kunihiko

2005-01-01

A new monitoring system scheme based on distributed architecture for the High Temperature Engineering Test Reactor (HTTR) is proposed to assure consistency of the real-time process of expanded system. A distributed monitoring task on client PCs as an alternative architecture maximizes the throughput and capabilities of the system even if the monitoring tasks suffer a shortage of bandwidth. The prototype of the on-line monitoring system has been developed successfully and will be tested at the actual HTTR site. (author)

Web Service Architecture for e-Learning

Directory of Open Access Journals (Sweden)

Xiaohong Qiu

2005-10-01

Full Text Available Message-based Web Service architecture provides a unified approach to applications and Web Services that incorporates the flexibility of messaging and distributed components. We propose SMMV and MMMV collaboration as the general architecture of collaboration based on a Web service model, which accommodates both instructor-led learning and participatory learning. This approach derives from our message-based Model-View-Controller (M-MVC architecture of Web applications, comprises an event-driven Publish/Subscribe scheme, and provides effective collaboration with high interactivity of rich Web content for diverse clients over heterogeneous network environments.

Preindustrial versus postindustrial Architecture and Building Techniques

DEFF Research Database (Denmark)

Vestergaard, Inge

2014-01-01

How can preindustrial architecture inspire sustainable thinking in postindustrial architectural design? How can we learn from experience and how can social, economic and environmental conditions give perspectives and guide a knowledge based evolution of basic experience towards modern industriali......How can preindustrial architecture inspire sustainable thinking in postindustrial architectural design? How can we learn from experience and how can social, economic and environmental conditions give perspectives and guide a knowledge based evolution of basic experience towards modern...... industrialized building processes? Identification of sustainable parameters related to change in society, to building technique and to comfort are illustrated through two Danish building types, which are different in time, but similar in function. One representing evolution and experience based countryside...... fisherman’s house built around year 1700; and second a frontrunner suburban family house built year 2008. The analysis involves architectural, technical and comfort matters and will state the levels of design, social conditions, sustainable and energy efficient parameters. Results will show lessons learned...

Integrating hospital information systems in healthcare institutions: a mediation architecture.

Science.gov (United States)

El Azami, Ikram; Cherkaoui Malki, Mohammed Ouçamah; Tahon, Christian

2012-10-01

Many studies have examined the integration of information systems into healthcare institutions, leading to several standards in the healthcare domain (CORBAmed: Common Object Request Broker Architecture in Medicine; HL7: Health Level Seven International; DICOM: Digital Imaging and Communications in Medicine; and IHE: Integrating the Healthcare Enterprise). Due to the existence of a wide diversity of heterogeneous systems, three essential factors are necessary to fully integrate a system: data, functions and workflow. However, most of the previous studies have dealt with only one or two of these factors and this makes the system integration unsatisfactory. In this paper, we propose a flexible, scalable architecture for Hospital Information Systems (HIS). Our main purpose is to provide a practical solution to insure HIS interoperability so that healthcare institutions can communicate without being obliged to change their local information systems and without altering the tasks of the healthcare professionals. Our architecture is a mediation architecture with 3 levels: 1) a database level, 2) a middleware level and 3) a user interface level. The mediation is based on two central components: the Mediator and the Adapter. Using the XML format allows us to establish a structured, secured exchange of healthcare data. The notion of medical ontology is introduced to solve semantic conflicts and to unify the language used for the exchange. Our mediation architecture provides an effective, promising model that promotes the integration of hospital information systems that are autonomous, heterogeneous, semantically interoperable and platform-independent.

Sonographic ally Detected Architectural Distortion: Clinical Significance

Energy Technology Data Exchange (ETDEWEB)

Kim, Shin Kee; Seo, Bo Kyoung; Yi, Ann; Cha, Sang Hoon; Kim, Baek Hyun; Cho, Kyu Ran; Kim, Young Sik; Son, Gil Soo; Kim, Young Soo; Kim, Hee Young [Korea University Ansan Hospital, Ansan (Korea, Republic of)

2008-12-15

Architectural distortion is a suspicious abnormality for the diagnosis of breast cancer. The aim of this study was to investigate the clinical significance of sonographic ally detected architectural distortion. From January 2006 to June 2008, 20 patients were identified who had sonographic ally detected architectural distortions without a history of trauma or surgery and abnormal mammographic findings related to an architectural distortion. All of the lesions were pathologically verified. We evaluated the clinical and pathological findings and then assessed the clinical significance of the sonographic ally detected architectural distortions. Based on the clinical findings, one (5%) of the 20 patients had a palpable lump and the remaining 19 patients had no symptoms. No patient had a family history of breast cancer. Based on the pathological findings, three (15%) patients had malignancies. The malignant lesions included invasive ductal carcinomas (n = 2) and ductal carcinoma in situ (n = 1). Four (20%) patients had high-risk lesions: atypical ductal hyperplasia (n = 3) and lobular carcinoma in situ (n = 1). The remaining 13 (65%) patients had benign lesions, however, seven (35%) out of 13 patients had mild-risk lesions (three intraductal papillomas, three moderate or florid epithelial hyperplasia and one sclerosing adenosis). Of the sonographic ally detected architectural distortions, 35% were breast cancers or high-risk lesions and 35% were mild-risk lesions. Thus, a biopsy might be needed for an architectural distortion without an associated mass as depicted on breast ultrasound, even though the mammographic findings are normal

Sonographic ally Detected Architectural Distortion: Clinical Significance

International Nuclear Information System (INIS)

Kim, Shin Kee; Seo, Bo Kyoung; Yi, Ann; Cha, Sang Hoon; Kim, Baek Hyun; Cho, Kyu Ran; Kim, Young Sik; Son, Gil Soo; Kim, Young Soo; Kim, Hee Young

2008-01-01

Architectural distortion is a suspicious abnormality for the diagnosis of breast cancer. The aim of this study was to investigate the clinical significance of sonographic ally detected architectural distortion. From January 2006 to June 2008, 20 patients were identified who had sonographic ally detected architectural distortions without a history of trauma or surgery and abnormal mammographic findings related to an architectural distortion. All of the lesions were pathologically verified. We evaluated the clinical and pathological findings and then assessed the clinical significance of the sonographic ally detected architectural distortions. Based on the clinical findings, one (5%) of the 20 patients had a palpable lump and the remaining 19 patients had no symptoms. No patient had a family history of breast cancer. Based on the pathological findings, three (15%) patients had malignancies. The malignant lesions included invasive ductal carcinomas (n = 2) and ductal carcinoma in situ (n = 1). Four (20%) patients had high-risk lesions: atypical ductal hyperplasia (n = 3) and lobular carcinoma in situ (n = 1). The remaining 13 (65%) patients had benign lesions, however, seven (35%) out of 13 patients had mild-risk lesions (three intraductal papillomas, three moderate or florid epithelial hyperplasia and one sclerosing adenosis). Of the sonographic ally detected architectural distortions, 35% were breast cancers or high-risk lesions and 35% were mild-risk lesions. Thus, a biopsy might be needed for an architectural distortion without an associated mass as depicted on breast ultrasound, even though the mammographic findings are normal

Design of low-power coarse-grained reconfigurable architectures

CERN Document Server

Kim, Yoonjin

2010-01-01

Coarse-grained reconfigurable architecture (CGRA) has emerged as a solution for flexible, application-specific optimization of embedded systems. Helping you understand the issues involved in designing and constructing embedded systems, Design of Low-Power Coarse-Grained Reconfigurable Architectures offers new frameworks for optimizing the architecture of components in embedded systems in order to decrease area and save power. Real application benchmarks and gate-level simulations substantiate these frameworks.The first half of the book explains how to reduce power in the configuration cache. T

Tectonic thinking in contemporary industrialized architecture

DEFF Research Database (Denmark)

Beim, Anne

2013-01-01

a creative force in building constructions, structural features and architectural design (construing) – helps to identify and refine technology transfer in contemporary industrialized building construction’. Through various references from the construction industry, business theory and architectural practice......This paper argues for a new critical approach to the ways architectural design strategies are developing. Contemporary construction industry appears to evolve into highly specialized and optimized processes driven by industrialized manufacturing, therefore the role of the architect...... and the understanding of the architectural design process ought to be revised. The paper is based on the following underlying hypothesis: ‘Tectonic thinking – defined as a central attention towards the nature, the properties, and the application of building materials (construction) and how this attention forms...

Open architecture design and approach for the Integrated Sensor Architecture (ISA)

Science.gov (United States)

Moulton, Christine L.; Krzywicki, Alan T.; Hepp, Jared J.; Harrell, John; Kogut, Michael

2015-05-01

Integrated Sensor Architecture (ISA) is designed in response to stovepiped integration approaches. The design, based on the principles of Service Oriented Architectures (SOA) and Open Architectures, addresses the problem of integration, and is not designed for specific sensors or systems. The use of SOA and Open Architecture approaches has led to a flexible, extensible architecture. Using these approaches, and supported with common data formats, open protocol specifications, and Department of Defense Architecture Framework (DoDAF) system architecture documents, an integration-focused architecture has been developed. ISA can help move the Department of Defense (DoD) from costly stovepipe solutions to a more cost-effective plug-and-play design to support interoperability.

Is the materialization of architecture necessarily material?

Directory of Open Access Journals (Sweden)

Čarapić Ana

2008-01-01

Full Text Available Architectural dematerialization process has started in the first half of the previous century, and has intensively developed at the beginning of this one. Architectural form decomposition on homo­geneous envelope and dependent internal structure, affect on façade materials to liberate from the ballast of supported role, and to gain the privilege to be the main holder of symbolic and sensual dimension. Therefore, on semantic level, they became primary driving force of dematerialization of form, and architecture in the whole. With new technological development, continuity in 'relieving' of matter has been brought to the extreme. Striving for complete liberty of conventional firmness and stability (in functional and phenomenal mode architecture take over the efemer 'week' substances from nature: water, air light, sound, and turn them in it's proper frame. Therefore, the general thesis of this paper is the absurd of architectural materialization with it's on demateriality. Being brought to the turning point, this absurd transforms both architecture (as artificial matter as well as nature itself. The goal of this paper is to predicate principles of material, formal and architectural genesis, in relation to the theoretical sources, as well as by examples of two developed constructions (pavilion 'Blur building' by Diller & Skofidio, and 'Tower of sound' by Toyo Ito.

Control Architecture for Intentional Island Operation in Distribution Network with High Penetration of Distributed Generation

DEFF Research Database (Denmark)

Chen, Yu

, the feasibility of the application of Artificial Neural Network (ANN) to ICA is studied, in order to improve the computation efficiency for ISR calculation. Finally, the integration of ICA into Dynamic Security Assessment (DSA), the ICA implementation, and the development of ICA are discussed....... to utilize them for maintaining the security of the power supply under the emergency situations, has been of great interest for study. One proposal is the intentional island operation. This PhD project is intended to develop a control architecture for the island operation in distribution system with high...... amount of DGs. As part of the NextGen project, this project focuses on the system modeling and simulation regarding the control architecture and recommends the development of a communication and information exchange system based on IEC 61850. This thesis starts with the background of this PhD project...

Penning traps with unitary architecture for storage of highly charged ions.

Science.gov (United States)

Tan, Joseph N; Brewer, Samuel M; Guise, Nicholas D

2012-02-01

Penning traps are made extremely compact by embedding rare-earth permanent magnets in the electrode structure. Axially-oriented NdFeB magnets are used in unitary architectures that couple the electric and magnetic components into an integrated structure. We have constructed a two-magnet Penning trap with radial access to enable the use of laser or atomic beams, as well as the collection of light. An experimental apparatus equipped with ion optics is installed at the NIST electron beam ion trap (EBIT) facility, constrained to fit within 1 meter at the end of a horizontal beamline for transporting highly charged ions. Highly charged ions of neon and argon, extracted with initial energies up to 4000 eV per unit charge, are captured and stored to study the confinement properties of a one-magnet trap and a two-magnet trap. Design considerations and some test results are discussed.

Penning traps with unitary architecture for storage of highly charged ions

International Nuclear Information System (INIS)

Tan, Joseph N.; Guise, Nicholas D.; Brewer, Samuel M.

2012-01-01

Penning traps are made extremely compact by embedding rare-earth permanent magnets in the electrode structure. Axially-oriented NdFeB magnets are used in unitary architectures that couple the electric and magnetic components into an integrated structure. We have constructed a two-magnet Penning trap with radial access to enable the use of laser or atomic beams, as well as the collection of light. An experimental apparatus equipped with ion optics is installed at the NIST electron beam ion trap (EBIT) facility, constrained to fit within 1 meter at the end of a horizontal beamline for transporting highly charged ions. Highly charged ions of neon and argon, extracted with initial energies up to 4000 eV per unit charge, are captured and stored to study the confinement properties of a one-magnet trap and a two-magnet trap. Design considerations and some test results are discussed.

Multiple-image authentication with a cascaded multilevel architecture based on amplitude field random sampling and phase information multiplexing.

Science.gov (United States)

Fan, Desheng; Meng, Xiangfeng; Wang, Yurong; Yang, Xiulun; Pan, Xuemei; Peng, Xiang; He, Wenqi; Dong, Guoyan; Chen, Hongyi

2015-04-10

A multiple-image authentication method with a cascaded multilevel architecture in the Fresnel domain is proposed, in which a synthetic encoded complex amplitude is first fabricated, and its real amplitude component is generated by iterative amplitude encoding, random sampling, and space multiplexing for the low-level certification images, while the phase component of the synthetic encoded complex amplitude is constructed by iterative phase information encoding and multiplexing for the high-level certification images. Then the synthetic encoded complex amplitude is iteratively encoded into two phase-type ciphertexts located in two different transform planes. During high-level authentication, when the two phase-type ciphertexts and the high-level decryption key are presented to the system and then the Fresnel transform is carried out, a meaningful image with good quality and a high correlation coefficient with the original certification image can be recovered in the output plane. Similar to the procedure of high-level authentication, in the case of low-level authentication with the aid of a low-level decryption key, no significant or meaningful information is retrieved, but it can result in a remarkable peak output in the nonlinear correlation coefficient of the output image and the corresponding original certification image. Therefore, the method realizes different levels of accessibility to the original certification image for different authority levels with the same cascaded multilevel architecture.

Analysis of Architecture Pattern Usage in Legacy System Architecture Documentation

NARCIS (Netherlands)

Harrison, Neil B.; Avgeriou, Paris

2008-01-01

Architecture patterns are an important tool in architectural design. However, while many architecture patterns have been identified, there is little in-depth understanding of their actual use in software architectures. For instance, there is no overview of how many patterns are used per system or

Mexican Art and Architecture Databases: Needs, Achievements, Problems.

Science.gov (United States)

Barberena, Elsa

At the international level, a lack of diffusion of Mexican art and architecture in indexes and abstracts has been detected. Reasons for this could be lack of continuity in publications, the use of the Spanish language, lack of interest in Mexican art and architecture, and sporadic financial resources. Nevertheless, even though conditions are not…

A First-level Event Selector for the CBM Experiment at FAIR

International Nuclear Information System (INIS)

Cuveland, J de; Lindenstruth, V

2011-01-01

The CBM experiment at the upcoming FAIR accelerator aims to create highest baryon densities in nucleus-nucleus collisions and to explore the properties of super-dense nuclear matter. Event rates of 10 MHz are needed for high-statistics measurements of rare probes, while event selection requires complex global triggers like secondary vertex search. To meet these demands, the CBM experiment uses self-triggered detector front-ends and a data push readout architecture. The First-level Event Selector (FLES) is the central physics selection system in CBM. It receives all hits and performs online event selection on the 1 TByte/s input data stream. The event selection process requires high-throughput event building and full event reconstruction using fast, vectorized track reconstruction algorithms. The current FLES architecture foresees a scalable high-performance computer. To achieve the high throughput and computation efficiency, all available computing devices will have to be used, in particular FPGAs at the first stages of the system and heterogeneous many-core architectures such as CPUs for efficient track reconstruction. A high-throughput network infrastructure and flow control in the system are other key aspects. In this paper, we present the foreseen architecture of the First-level Event Selector.