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Sample records for high current transistor

  1. High current transistor pulse generator

    International Nuclear Information System (INIS)

    Nesterov, V.; Cassel, R.

    1991-05-01

    A solid state pulse generator capable of delivering high current trapezoidally shaped pulses into an inductive load has been developed at SLAC. Energy stored in the capacitor bank of the pulse generator is switched to the load through a pair of Darlington transistors. A combination of diodes and Darlington transistors is used to obtain trapezoidal or triangular shaped current pulses into an inductive load and to recover the remaining energy in the same capacitor bank without reversing capacitor voltage. The transistors work in the switch mode, and the power losses are low. The rack mounted pulse generators presently used at SLAC contain a 660 microfarad storage capacitor bank and can deliver 400 amps at 800 volts into inductive loads up to 3 mH. The pulse generators are used in several different power systems, including pulse to pulse bipolar power supplies and in application with current pulses distributed into different inductive loads. The current amplitude and discharge time are controlled by the central computer system through a specially developed multichannel controller. Several years of operation with the pulse generators have proven their consistent performance and reliability. 8 figs

  2. Power transistor module for high current applications

    International Nuclear Information System (INIS)

    Cilyo, F.F.

    1975-01-01

    One of the parts needed for the control system of the 400-GeV accelerator at Fermilab was a power transistor with a safe operating area of 1800A at 50V, dc current gain of 100,000 and 20 kHz bandwidth. Since the commercially available discrete devices and power hybrid packages did not meet these requirements, a power transistor module was developed which performed satisfactorily. By connecting 13 power transistors in parallel, with due consideration for network and heat dissipation problems, and by driving these 13 with another power transistor, a super power transistor is made, having an equivalent current, power, and safe operating area capability of 13 transistors. For higher capabilities, additional modules can be conveniently added. (auth)

  3. A high current, high speed pulser using avalanche transistors

    International Nuclear Information System (INIS)

    Hosono, Yoneichi; Hasegawa, Ken-ichi

    1985-01-01

    A high current, high speed pulser for the beam pulsing of a linear accelerator is described. It uses seven avalanche transistors in cascade. Design of a trigger circuit to obtain fast rise time is discussed. The characteristics of the pulser are : (a) Rise time = 0.9 ns (FWHM) and (d) Life time asymptotically equals 2000 -- 3000 hr (at 50 Hz). (author)

  4. High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures.

    Science.gov (United States)

    Liu, Yuan; Sheng, Jiming; Wu, Hao; He, Qiyuan; Cheng, Hung-Chieh; Shakir, Muhammad Imran; Huang, Yu; Duan, Xiangfeng

    2016-06-01

    Scalable fabrication of vertical-tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm(-2) . This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene-silicon heterostructures. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. High-Current Gain Two-Dimensional MoS 2 -Base Hot-Electron Transistors

    KAUST Repository

    Torres, Carlos M.

    2015-12-09

    The vertical transport of nonequilibrium charge carriers through semiconductor heterostructures has led to milestones in electronics with the development of the hot-electron transistor. Recently, significant advances have been made with atomically sharp heterostructures implementing various two-dimensional materials. Although graphene-base hot-electron transistors show great promise for electronic switching at high frequencies, they are limited by their low current gain. Here we show that, by choosing MoS2 and HfO2 for the filter barrier interface and using a noncrystalline semiconductor such as ITO for the collector, we can achieve an unprecedentedly high-current gain (α ∼ 0.95) in our hot-electron transistors operating at room temperature. Furthermore, the current gain can be tuned over 2 orders of magnitude with the collector-base voltage albeit this feature currently presents a drawback in the transistor performance metrics such as poor output resistance and poor intrinsic voltage gain. We anticipate our transistors will pave the way toward the realization of novel flexible 2D material-based high-density, low-energy, and high-frequency hot-carrier electronic applications. © 2015 American Chemical Society.

  6. High-Current Gain Two-Dimensional MoS 2 -Base Hot-Electron Transistors

    KAUST Repository

    Torres, Carlos M.; Lan, Yann Wen; Zeng, Caifu; Chen, Jyun Hong; Kou, Xufeng; Navabi, Aryan; Tang, Jianshi; Montazeri, Mohammad; Adleman, James R.; Lerner, Mitchell B.; Zhong, Yuan Liang; Li, Lain-Jong; Chen, Chii Dong; Wang, Kang L.

    2015-01-01

    The vertical transport of nonequilibrium charge carriers through semiconductor heterostructures has led to milestones in electronics with the development of the hot-electron transistor. Recently, significant advances have been made with atomically sharp heterostructures implementing various two-dimensional materials. Although graphene-base hot-electron transistors show great promise for electronic switching at high frequencies, they are limited by their low current gain. Here we show that, by choosing MoS2 and HfO2 for the filter barrier interface and using a noncrystalline semiconductor such as ITO for the collector, we can achieve an unprecedentedly high-current gain (α ∼ 0.95) in our hot-electron transistors operating at room temperature. Furthermore, the current gain can be tuned over 2 orders of magnitude with the collector-base voltage albeit this feature currently presents a drawback in the transistor performance metrics such as poor output resistance and poor intrinsic voltage gain. We anticipate our transistors will pave the way toward the realization of novel flexible 2D material-based high-density, low-energy, and high-frequency hot-carrier electronic applications. © 2015 American Chemical Society.

  7. Problems of noise modeling in the presence of total current branching in high electron mobility transistor and field-effect transistor channels

    International Nuclear Information System (INIS)

    Shiktorov, P; Starikov, E; Gružinskis, V; Varani, L; Sabatini, G; Marinchio, H; Reggiani, L

    2009-01-01

    In the framework of analytical and hydrodynamic models for the description of carrier transport and noise in high electron mobility transistor/field-effect transistor channels the main features of the intrinsic noise of transistors are investigated under continuous branching of the current between channel and gate. It is shown that the current-noise and voltage-noise spectra at the transistor terminals contain an excess noise related to thermal excitation of plasma wave modes in the dielectric layer between the channel and gate. It is found that the set of modes of excited plasma waves can be governed by the external embedding circuits, thus violating a universal description of noise in terms of Norton and Thevenin noise generators

  8. Establishment of design space for high current gain in III-N hot electron transistors

    Science.gov (United States)

    Gupta, Geetak; Ahmadi, Elaheh; Suntrup, Donald J., III; Mishra, Umesh K.

    2018-01-01

    This paper establishes the design space of III-N hot electron transistors (HETs) for high current gain by designing and fabricating HETs with scaled base thickness. The device structure consists of GaN-based emitter, base and collector regions where emitter and collector barriers are implemented using AlN and InGaN layers, respectively, as polarization-dipoles. Electrons tunnel through the AlN layer to be injected into the base at a high energy where they travel in a quasi-ballistic manner before being collected. Current gain increases from 1 to 3.5 when base thickness is reduced from 7 to 4 nm. The extracted mean free path (λ mfp) is 5.8 nm at estimated injection energy of 1.5 eV.

  9. Demonstration of high current carbon nanotube enabled vertical organic field effect transistors at industrially relevant voltages

    Science.gov (United States)

    McCarthy, Mitchell

    The display market is presently dominated by the active matrix liquid crystal display (LCD). However, the active matrix organic light emitting diode (AMOLED) display is argued to become the successor to the LCD, and is already beginning its way into the market, mainly in small size displays. But, for AMOLED technology to become comparable in market share to LCD, larger size displays must become available at a competitive price with their LCD counterparts. A major issue preventing low-cost large AMOLED displays is the thin-film transistor (TFT) technology. Unlike the voltage driven LCD, the OLEDs in the AMOLED display are current driven. Because of this, the mature amorphous silicon TFT backplane technology used in the LCD must be upgraded to a material possessing a higher mobility. Polycrystalline silicon and transparent oxide TFT technologies are being considered to fill this need. But these technologies bring with them significant manufacturing complexity and cost concerns. Carbon nanotube enabled vertical organic field effect transistors (CN-VFETs) offer a unique solution to this problem (now known as the AMOLED backplane problem). The CN-VFET allows the use of organic semiconductors to be used for the semiconductor layer. Organics are known for their low-cost large area processing compatibility. Although the mobility of the best organics is only comparable to that of amorphous silicon, the CN-VFET makes up for this by orienting the channel vertically, as opposed to horizontally (like in conventional TFTs). This allows the CN-VFET to achieve sub-micron channel lengths without expensive high resolution patterning. Additionally, because the CN-VFET can be easily converted into a light emitting transistor (called the carbon nanotube enabled vertical organic light emitting transistor---CN-VOLET) by essentially stacking an OLED on top of the CN-VFET, more potential benefits can be realized. These potential benefits include, increased aperture ratio, increased OLED

  10. Study of surface leakage current of AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Chen, YongHe; Zhang, Kai; Cao, MengYi; Zhao, ShengLei; Zhang, JinCheng; Hao, Yue; Ma, XiaoHua

    2014-01-01

    Temperature-dependent surface current measurements were performed to analyze the mechanism of surface conductance of AlGaN/GaN channel high-electron-mobility transistors by utilizing process-optimized double gate structures. Different temperatures and electric field dependence have been found in surface current measurements. At low electric field, the mechanism of surface conductance is considered to be two-dimensional variable range hopping. At elevated electric field, the Frenkel–Poole trap assisted emission governs the main surface electrons transportation. The extracted energy barrier height of electrons emitting from trapped state near Fermi energy level into a threading dislocations-related continuum state is 0.38 eV. SiN passivation reduces the surface leakage current by two order of magnitude and nearly 4 orders of magnitude at low and high electric fields, respectively. SiN also suppresses the Frenkel–Poole conductance at high temperature by improving the surface states of AlGaN/GaN. A surface treatment process has been introduced to further suppress the surface leakage current at high temperature and high field, which results in a decrease in surface current of almost 3 orders of magnitude at 476 K

  11. Logarithmic current-measuring transistor circuits

    DEFF Research Database (Denmark)

    Højberg, Kristian Søe

    1967-01-01

    Describes two transistorized circuits for the logarithmic measurement of small currents suitable for nuclear reactor instrumentation. The logarithmic element is applied in the feedback path of an amplifier, and only one dual transistor is used as logarithmic diode and temperature compensating...... transistor. A simple one-amplifier circuit is compared with a two-amplifier system. The circuits presented have been developed in connexion with an amplifier using a dual m.o.s. transistor input stage with diode-protected gates....

  12. Correlation of AlGaN/GaN high-electron-mobility transistors electroluminescence characteristics with current collapse

    Science.gov (United States)

    Ohi, Shintaro; Yamazaki, Taisei; Asubar, Joel T.; Tokuda, Hirokuni; Kuzuhara, Masaaki

    2018-02-01

    We report on the correlation between the electroluminescence and current collapse of AlGaN/GaN high-electron-mobility transistors (HEMTs). Standard passivated devices suffering from severe current collapse exhibited high-intensity whitish electroluminescence confined near the drain contact. In contrast, devices with reduced current collapse resulting from oxygen plasma treatment or GaN capping showed low-intensity reddish emission across the entire gate-drain access region. A qualitative explanation of this observed correlation between the current collapse and electroluminescence is presented. Our results demonstrate that electroluminescence analysis is a powerful tool not only for identifying high-field regions but also for assessing the degree of current collapse in AlGaN/GaN HEMTs.

  13. High-temperature performance of MoS{sub 2} thin-film transistors: Direct current and pulse current-voltage characteristics

    Energy Technology Data Exchange (ETDEWEB)

    Jiang, C.; Samnakay, R.; Balandin, A. A., E-mail: balandin@ee.ucr.edu [Nano-Device Laboratory (NDL), Department of Electrical Engineering, Bourns College of Engineering, University of California—Riverside, Riverside, California 92521 (United States); Phonon Optimized Engineered Materials (POEM) Center, Materials Science and Engineering Program, University of California—Riverside, Riverside, California 92521 (United States); Rumyantsev, S. L. [Department of Electrical, Computer, and Systems Engineering, Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York 12180 (United States); Ioffe Physical-Technical Institute, St. Petersburg 194021 (Russian Federation); Shur, M. S. [Department of Electrical, Computer, and Systems Engineering, Center for Integrated Electronics, Rensselaer Polytechnic Institute, Troy, New York 12180 (United States)

    2015-02-14

    We report on fabrication of MoS{sub 2} thin-film transistors (TFTs) and experimental investigations of their high-temperature current-voltage characteristics. The measurements show that MoS{sub 2} devices remain functional to temperatures of at least as high as 500 K. The temperature increase results in decreased threshold voltage and mobility. The comparison of the direct current (DC) and pulse measurements shows that the direct current sub-linear and super-linear output characteristics of MoS{sub 2} thin-films devices result from the Joule heating and the interplay of the threshold voltage and mobility temperature dependences. At temperatures above 450 K, a kink in the drain current occurs at zero gate voltage irrespective of the threshold voltage value. This intriguing phenomenon, referred to as a “memory step,” was attributed to the slow relaxation processes in thin films similar to those in graphene and electron glasses. The fabricated MoS{sub 2} thin-film transistors demonstrated stable operation after two months of aging. The obtained results suggest new applications for MoS{sub 2} thin-film transistors in extreme-temperature electronics and sensors.

  14. Investigation of surface related leakage current in AlGaN/GaN High Electron Mobility Transistors

    Energy Technology Data Exchange (ETDEWEB)

    Kaushik, J.K., E-mail: janeshkaushik@sspl.drdo.in [Solid State Physics Laboratory, Delhi 110054 (India); Balakrishnan, V.R.; Mongia, D.; Kumar, U.; Dayal, S. [Solid State Physics Laboratory, Delhi 110054 (India); Panwar, B.S. [Indian Institute of Technology Delhi, Hauz Khas, New Delhi 110016 (India); Muralidharan, R. [Indian Institute of Science, Bengaluru, Karnataka 560012 (India)

    2016-08-01

    This paper reports the study of surface-related mechanisms to explain the high reverse leakage current observed in the in-house fabricated Si{sub 3}N{sub 4} passivated AlGaN/GaN High Electron Mobility Transistors. We propose that the Si{sub 3}N{sub 4}/AlGaN interface in the un-gated regions provides an additional leakage path between the gate and source/drain and may constitute a large component of reverse current. This surface related leakage component of current exhibits both temperature and electric field dependence and its Arrhenius behavior has been experimentally verified using Conductance Deep Level Transient Spectroscopy and temperature dependent reverse leakage current measurements. A thin interfacial amorphous semiconductor layer formed due to inter diffusion at Si{sub 3}N{sub 4}/AlGaN interface has been presumed as the source for this surface related leakage. We, therefore, conclude that optimum Si{sub 3}N{sub 4} deposition conditions and careful surface preparation prior to passivation can limit the extent of surface leakage and can thus vastly improve the device performance. - Highlights: • Enhanced leakage in AlGaN/GaN High Electron Mobility Transistors after passivation • Experimental evidence of the presence of extrinsic traps at Si{sub 3}N{sub 4}/AlGaN interface • Electron hopping in shallower extended defects and band tail traps at the interface. • Reduction in current collapse due to the virtual gate inhibition by this conduction • However, limitation on the operating voltages due to decrease in breakdown voltage.

  15. Viscosity-dependent drain current noise of AlGaN/GaN high electron mobility transistor in polar liquids

    International Nuclear Information System (INIS)

    Fang, J. Y.; Hsu, C. P.; Kang, Y. W.; Fang, K. C.; Kao, W. L.; Yao, D. J.; Chen, C. C.; Li, S. S.; Yeh, J. A.; Wang, Y. L.; Lee, G. Y.; Chyi, J. I.; Hsu, C. H.; Huang, Y. F.; Ren, F.

    2013-01-01

    The drain current fluctuation of ungated AlGaN/GaN high electron mobility transistors (HEMTs) measured in different fluids at a drain-source voltage of 0.5 V was investigated. The HEMTs with metal on the gate region showed good current stability in deionized water, while a large fluctuation in drain current was observed for HEMTs without gate metal. The fluctuation in drain current for the HEMTs without gate metal was observed and calculated as standard deviation from a real-time measurement in air, deionized water, ethanol, dimethyl sulfoxide, ethylene glycol, 1,2-butanediol, and glycerol. At room temperature, the fluctuation in drain current for the HEMTs without gate metal was found to be relevant to the dipole moment and the viscosity of the liquids. A liquid with a larger viscosity showed a smaller fluctuation in drain current. The viscosity-dependent fluctuation of the drain current was ascribed to the Brownian motions of the liquid molecules, which induced a variation in the surface dipole of the gate region. This study uncovers the causes of the fluctuation in drain current of HEMTs in fluids. The results show that the AlGaN/GaN HEMTs may be used as sensors to measure the viscosity of liquids within a certain range of viscosity

  16. Analysis of current instabilities of thin AlN/GaN/AlN double heterostructure high electron mobility transistors

    International Nuclear Information System (INIS)

    Zervos, Ch; Adikimenakis, A; Bairamis, A; Kostopoulos, A; Kayambaki, M; Tsagaraki, K; Konstantinidis, G; Georgakilas, A

    2016-01-01

    The current instabilities of high electron mobility transistors (HEMTs), based on thin double AlN/GaN/AlN heterostructures (∼0.5 μm total thickness), directly grown on sapphire substrates, have been analyzed and compared for different AlN top barrier thicknesses. The structures were capped by 1 nm GaN and non-passivated 1 μm gate-length devices were processed. Pulsed I–V measurements resulted in a maximum cold pulsed saturation current of 1.4 A mm −1 at a gate-source voltage of +3 V for 3.7 nm AlN thickness. The measured gate and drain lag for 500 ns pulse-width varied between 6%–12% and 10%–18%, respectively. Furthermore, a small increase in the threshold voltage was observed for all the devices, possibly due to the trapping of electrons under the gate contact. The off-state breakdown voltage of V br  = 70 V, for gate-drain spacing of 2 μm, was approximately double the value measured for a single AlN/GaN HEMT structure grown on a thick GaN buffer layer. The results suggest that the double AlN/GaN/AlN heterostructures may offer intrinsic advantages for the breakdown and current stability characteristics of high current HEMTs. (paper)

  17. An Investigation of Carbon-Doping-Induced Current Collapse in GaN-on-Si High Electron Mobility Transistors

    Directory of Open Access Journals (Sweden)

    An-Jye Tzou

    2016-06-01

    Full Text Available This paper reports the successful fabrication of a GaN-on-Si high electron mobility transistor (HEMT with a 1702 V breakdown voltage (BV and low current collapse. The strain and threading dislocation density were well-controlled by 100 pairs of AlN/GaN superlattice buffer layers. Relative to the carbon-doped GaN spacer layer, we grew the AlGaN back barrier layer at a high temperature, resulting in a low carbon-doping concentration. The high-bandgap AlGaN provided an effective barrier for blocking leakage from the channel to substrate, leading to a BV comparable to the ordinary carbon-doped GaN HEMTs. In addition, the AlGaN back barrier showed a low dispersion of transiently pulsed ID under substrate bias, implying that the buffer traps were effectively suppressed. Therefore, we obtained a low-dynamic on-resistance with this AlGaN back barrier. These two approaches of high BV with low current collapse improved the device performance, yielding a device that is reliable in power device applications.

  18. Comparison of Surface Passivation Films for Reduction of Current Collapse in AlGaN/GaN High Electron Mobility Transistors (HEMTs)

    National Research Council Canada - National Science Library

    Fitch, R

    2002-01-01

    Three different passivation layers (SiN(x), MgO, and Sc2O3) were examined for their effectiveness in mitigating surface-state-induced current collapse in AlGaN/GaN high electron mobility transistors (HEMTs...

  19. An analytic current-voltage model for quasi-ballistic III-nitride high electron mobility transistors

    Science.gov (United States)

    Li, Kexin; Rakheja, Shaloo

    2018-05-01

    We present an analytic model to describe the DC current-voltage (I-V) relationship in scaled III-nitride high electron mobility transistors (HEMTs) in which transport within the channel is quasi-ballistic in nature. Following Landauer's transport theory and charge calculation based on two-dimensional electrostatics that incorporates negative momenta states from the drain terminal, an analytic expression for current as a function of terminal voltages is developed. The model interprets the non-linearity of access regions in non-self-aligned HEMTs. Effects of Joule heating with temperature-dependent thermal conductivity are incorporated in the model in a self-consistent manner. With a total of 26 input parameters, the analytic model offers reduced empiricism compared to existing GaN HEMT models. To verify the model, experimental I-V data of InAlN/GaN with InGaN back-barrier HEMTs with channel lengths of 42 and 105 nm are considered. Additionally, the model is validated against numerical I-V data obtained from DC hydrodynamic simulations of an unintentionally doped AlGaN-on-GaN HEMT with 50-nm gate length. The model is also verified against pulsed I-V measurements of a 150-nm T-gate GaN HEMT. Excellent agreement between the model and experimental and numerical results for output current, transconductance, and output conductance is demonstrated over a broad range of bias and temperature conditions.

  20. Field emission current from a junction field-effect transistor

    International Nuclear Information System (INIS)

    Monshipouri, Mahta; Abdi, Yaser

    2015-01-01

    Fabrication of a titanium dioxide/carbon nanotube (TiO 2 /CNT)-based transistor is reported. The transistor can be considered as a combination of a field emission transistor and a junction field-effect transistor. Using direct current plasma-enhanced chemical vapor deposition (DC-PECVD) technique, CNTs were grown on a p-typed (100)-oriented silicon substrate. The CNTs were then covered by TiO 2 nanoparticles 2–5 nm in size, using an atmospheric pressure CVD technique. In this device, TiO 2 /CNT junction is responsible for controlling the emission current. High on/off-current ratio and proper gate control are the most important advantages of device. A model based on Fowler–Nordheim equation is utilized for calculation of the emission current and the results are compared with experimental data. The effect of TiO 2 /CNT hetero-structure is also investigated, and well modeled

  1. High-performance vertical organic transistors.

    Science.gov (United States)

    Kleemann, Hans; Günther, Alrun A; Leo, Karl; Lüssem, Björn

    2013-11-11

    Vertical organic thin-film transistors (VOTFTs) are promising devices to overcome the transconductance and cut-off frequency restrictions of horizontal organic thin-film transistors. The basic physical mechanisms of VOTFT operation, however, are not well understood and VOTFTs often require complex patterning techniques using self-assembly processes which impedes a future large-area production. In this contribution, high-performance vertical organic transistors comprising pentacene for p-type operation and C60 for n-type operation are presented. The static current-voltage behavior as well as the fundamental scaling laws of such transistors are studied, disclosing a remarkable transistor operation with a behavior limited by injection of charge carriers. The transistors are manufactured by photolithography, in contrast to other VOTFT concepts using self-assembled source electrodes. Fluorinated photoresist and solvent compounds allow for photolithographical patterning directly and strongly onto the organic materials, simplifying the fabrication protocol and making VOTFTs a prospective candidate for future high-performance applications of organic transistors. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. High transconductance organic electrochemical transistors

    Science.gov (United States)

    Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

    2013-07-01

    The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications.

  3. High transconductance organic electrochemical transistors

    Science.gov (United States)

    Khodagholy, Dion; Rivnay, Jonathan; Sessolo, Michele; Gurfinkel, Moshe; Leleux, Pierre; Jimison, Leslie H.; Stavrinidou, Eleni; Herve, Thierry; Sanaur, Sébastien; Owens, Róisín M.; Malliaras, George G.

    2013-01-01

    The development of transistors with high gain is essential for applications ranging from switching elements and drivers to transducers for chemical and biological sensing. Organic transistors have become well-established based on their distinct advantages, including ease of fabrication, synthetic freedom for chemical functionalization, and the ability to take on unique form factors. These devices, however, are largely viewed as belonging to the low-end of the performance spectrum. Here we present organic electrochemical transistors with a transconductance in the mS range, outperforming transistors from both traditional and emerging semiconductors. The transconductance of these devices remains fairly constant from DC up to a frequency of the order of 1 kHz, a value determined by the process of ion transport between the electrolyte and the channel. These devices, which continue to work even after being crumpled, are predicted to be highly relevant as transducers in biosensing applications. PMID:23851620

  4. High Accuracy Transistor Compact Model Calibrations

    Energy Technology Data Exchange (ETDEWEB)

    Hembree, Charles E. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Mar, Alan [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Robertson, Perry J. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)

    2015-09-01

    Typically, transistors are modeled by the application of calibrated nominal and range models. These models consists of differing parameter values that describe the location and the upper and lower limits of a distribution of some transistor characteristic such as current capacity. Correspond- ingly, when using this approach, high degrees of accuracy of the transistor models are not expected since the set of models is a surrogate for a statistical description of the devices. The use of these types of models describes expected performances considering the extremes of process or transistor deviations. In contrast, circuits that have very stringent accuracy requirements require modeling techniques with higher accuracy. Since these accurate models have low error in transistor descriptions, these models can be used to describe part to part variations as well as an accurate description of a single circuit instance. Thus, models that meet these stipulations also enable the calculation of quantifi- cation of margins with respect to a functional threshold and uncertainties in these margins. Given this need, new model high accuracy calibration techniques for bipolar junction transis- tors have been developed and are described in this report.

  5. Effects of SiNx on two-dimensional electron gas and current collapse of AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Fan, Ren; Zhi-Biao, Hao; Lei, Wang; Lai, Wang; Hong-Tao, Li; Yi, Luo

    2010-01-01

    SiN x is commonly used as a passivation material for AlGaN/GaN high electron mobility transistors (HEMTs). In this paper, the effects of SiN x passivation film on both two-dimensional electron gas characteristics and current collapse of AlGaN/GaN HEMTs are investigated. The SiN x films are deposited by high- and low-frequency plasma-enhanced chemical vapour deposition, and they display different strains on the AlGaN/GaN heterostructure, which can explain the experiment results. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  6. Field emission current from a junction field-effect transistor

    Energy Technology Data Exchange (ETDEWEB)

    Monshipouri, Mahta; Abdi, Yaser, E-mail: y.abdi@ut.ac.ir [University of Tehran, Nano-Physics Research Laboratory, Department of Physics (Iran, Islamic Republic of)

    2015-04-15

    Fabrication of a titanium dioxide/carbon nanotube (TiO{sub 2}/CNT)-based transistor is reported. The transistor can be considered as a combination of a field emission transistor and a junction field-effect transistor. Using direct current plasma-enhanced chemical vapor deposition (DC-PECVD) technique, CNTs were grown on a p-typed (100)-oriented silicon substrate. The CNTs were then covered by TiO{sub 2} nanoparticles 2–5 nm in size, using an atmospheric pressure CVD technique. In this device, TiO{sub 2}/CNT junction is responsible for controlling the emission current. High on/off-current ratio and proper gate control are the most important advantages of device. A model based on Fowler–Nordheim equation is utilized for calculation of the emission current and the results are compared with experimental data. The effect of TiO{sub 2}/CNT hetero-structure is also investigated, and well modeled.

  7. Investigation of the current collapse induced in InGaN back barrier AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Wan Xiaojia; Wang Xiaoliang; Xiao Hongling; Feng Chun; Jiang Lijuan; Qu Shenqi; Wang Zhanguo; Hou Xun

    2013-01-01

    Current collapses were studied, which were observed in AlGaN/GaN high electron mobility transistors (HEMTs) with and without InGaN back barrier (BB) as a result of short-term bias stress. More serious drain current collapses were observed in InGaN BB AlGaN/GaN HEMTs compared with the traditional HEMTs. The results indicate that the defects and surface states induced by the InGaN BB layer may enhance the current collapse. The surface states may be the primary mechanism of the origination of current collapse in AlGaN/GaN HEMTs for short-term direct current stress. (semiconductor devices)

  8. Electric-stress reliability and current collapse of different thickness SiNx passivated AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Ling, Yang; Gui-Zhou, Hu; Yue, Hao; Xiao-Hua, Ma; Si, Quan; Li-Yuan, Yang; Shou-Gao, Jiang

    2010-01-01

    This paper investigates the impact of electrical degradation and current collapse on different thickness SiN x passivated AlGaN/GaN high electron mobility transistors. It finds that higher thickness SiN x passivation can significantly improve the high-electric-field reliability of a device. The degradation mechanism of the SiN x passivation layer under ON-state stress has also been discussed in detail. Under the ON-state stress, the strong electric-field led to degradation of SiN x passivation located in the gate-drain region. As the thickness of SiN x passivation increases, the density of the surface state will be increased to some extent. Meanwhile, it is found that the high NH 3 flow in the plasma enhanced chemical vapour deposition process could reduce the surface state and suppress the current collapse. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  9. Current collapse imaging of Schottky gate AlGaN/GaN high electron mobility transistors by electric field-induced optical second-harmonic generation measurement

    International Nuclear Information System (INIS)

    Katsuno, Takashi; Ishikawa, Tsuyoshi; Ueda, Hiroyuki; Uesugi, Tsutomu; Manaka, Takaaki; Iwamoto, Mitsumasa

    2014-01-01

    Two-dimensional current collapse imaging of a Schottky gate AlGaN/GaN high electron mobility transistor device was achieved by optical electric field-induced second-harmonic generation (EFISHG) measurements. EFISHG measurements can detect the electric field produced by carriers trapped in the on-state of the device, which leads to current collapse. Immediately after (e.g., 1, 100, or 800 μs) the completion of drain-stress voltage (200 V) in the off-state, the second-harmonic (SH) signals appeared within 2 μm from the gate edge on the drain electrode. The SH signal intensity became weak with time, which suggests that the trapped carriers are emitted from the trap sites. The SH signal location supports the well-known virtual gate model for current collapse.

  10. High-conductance low-voltage organic thin film transistor with locally rearranged poly(3-hexylthiophene) domain by current annealing on plastic substrate

    Science.gov (United States)

    Pei, Zingway; Tsai, Hsing-Wang; Lai, Hsin-Cheng

    2016-02-01

    The organic material based thin film transistors (TFTs) are attractive for flexible optoelectronics applications due to the ability of lager area fabrication by solution and low temperature process on plastic substrate. Recently, the research of organic TFT focus on low operation voltage and high output current to achieve a low power organic logic circuit for optoelectronic device,such as e-paper or OLED displayer. To obtain low voltage and high output current, high gate capacitance and high channel mobility are key factors. The well-arranged polymer chain by a high temperature postannealing, leading enhancement conductivity of polymer film was a general method. However, the thermal annealing applying heat for all device on the substrate and may not applicable to plastic substrate. Therefore, in this work, the low operation voltage and high output current of polymer TFTs was demonstrated by locally electrical bias annealing. The poly(styrene-comethyl methacrylate) (PS-r-PMMA) with ultra-thin thickness is used as gate dielectric that the thickness is controlled by thermal treatment after spin coated on organic electrode. In electrical bias-annealing process, the PS-r- PMMA is acted a heating layer. After electrical bias-annealing, the polymer TFTs obtain high channel mobility at low voltage that lead high output current by a locally annealing of P3HT film. In the future, the locally electrical biasannealing method could be applied on plastic substrate for flexible optoelectronic application.

  11. A High-Voltage Level Tolerant Transistor Circuit

    NARCIS (Netherlands)

    Annema, Anne J.; Geelen, Godefridus Johannes Gertrudis Maria

    2001-01-01

    A high-voltage level tolerant transistor circuit, comprising a plurality of cascoded transistors, including a first transistor (T1) operatively connected to a high-voltage level node (3) and a second transistor (T2) operatively connected to a low-voltage level node (2). The first transistor (T1)

  12. High-current and low acceleration voltage arsenic ion implanted polysilicon-gate and source-drain electrode Si mos transistor

    International Nuclear Information System (INIS)

    Saito, Yasuyuki; Sugimura, Yoshiro; Sugihara, Michiyuki

    1993-01-01

    The fabrication process of high current arsenic (As) ion implanted polysilicon (Si) gate and source drain (SD) electrode Si n-channel metal oxide-semiconductor field effect transistor (MOSFET) was examined. Poly Si film n-type doping was performed by using high current (typical current: 2mA) and relatively low acceleration voltage (40keV) As ion implantation technique (Lintott series 3). It was observed that high dose As implanted poly Si films as is show refractoriness against radical fluorine excited by microwave. Using GCA MANN4800 (m/c ID No.2, resist: OFPR) mask pattern printing technique, the high current As ion implantation technique and radical fluorine gas phase etching (Chemical dry etching: CDE) technique, the n-channel Poly Si gate (ρs = ≅100Ω/□) enhancement MQSFETs(ρs source drain = ≅50Ω/□, SiO 2 gate=380 angstrom) with off-leak-less were obtained on 3 inch Czochralski grown 2Ωcm boron doped p type wafers (Osaka titanium). By the same process, a 8 bit single chip μ-processor with 26MHz full operation was performed

  13. High-Performance Vertical Organic Electrochemical Transistors.

    Science.gov (United States)

    Donahue, Mary J; Williamson, Adam; Strakosas, Xenofon; Friedlein, Jacob T; McLeod, Robert R; Gleskova, Helena; Malliaras, George G

    2018-02-01

    Organic electrochemical transistors (OECTs) are promising transducers for biointerfacing due to their high transconductance, biocompatibility, and availability in a variety of form factors. Most OECTs reported to date, however, utilize rather large channels, limiting the transistor performance and resulting in a low transistor density. This is typically a consequence of limitations associated with traditional fabrication methods and with 2D substrates. Here, the fabrication and characterization of OECTs with vertically stacked contacts, which overcome these limitations, is reported. The resulting vertical transistors exhibit a reduced footprint, increased intrinsic transconductance of up to 57 mS, and a geometry-normalized transconductance of 814 S m -1 . The fabrication process is straightforward and compatible with sensitive organic materials, and allows exceptional control over the transistor channel length. This novel 3D fabrication method is particularly suited for applications where high density is needed, such as in implantable devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Various Recipes of SiNx Passivated AlGaN/GaN High Electron Mobility Transistors in Correlation with Current Slump

    International Nuclear Information System (INIS)

    Ling, Yang; Yue, Hao; Xiao-Hua, Ma; Si, Quan; Gui-Zhou, Hu; Shou-Gao, Jiang; Li-Yuan, Yang

    2009-01-01

    The current slump of different recipes of SiN x passivated AlGaN/GaN high electron mobility transistors (HEMTs) is investigated. The dc and pulsed current-voltage curves of AlGaN/GaN HEMTs using different recipes are analyzed. It is found that passivation leakage has a strong relationship with NH 3 flow in the plasma-enhanced chemical vapor phase deposition process, which has impacted on the current collapse of SiN x passivated devices. We analyze the pulsed I DS – V DS characteristics of different recipes of SiN x passivation devices for different combinations of gate and drain quiescent biases (V GS0 , V DS0 ) of (0, 0), (−6, 0), (−6, 15) and (0, 15)V. The possible mechanisms are the traps in SiN x passivation capturing the electrons and the surface states at the SiN x /AlGaN interface, which can affect the channel of two-dimensional electron gas and cause the current collapse. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  15. A silicon doped hafnium oxide ferroelectric p–n–p–n SOI tunneling field–effect transistor with steep subthreshold slope and high switching state current ratio

    Directory of Open Access Journals (Sweden)

    Saeid Marjani

    2016-09-01

    Full Text Available In this paper, a silicon–on–insulator (SOI p–n–p–n tunneling field–effect transistor (TFET with a silicon doped hafnium oxide (Si:HfO2 ferroelectric gate stack is proposed and investigated via 2D device simulation with a calibrated nonlocal band–to–band tunneling model. Utilization of Si:HfO2 instead of conventional perovskite ferroelectrics such as lead zirconium titanate (PbZrTiO3 and strontium bismuth tantalate (SrBi2Ta2O9 provides compatibility to the CMOS process as well as improved device scalability. By using Si:HfO2 ferroelectric gate stack, the applied gate voltage is effectively amplified that causes increased electric field at the tunneling junction and reduced tunneling barrier width. Compared with the conventional p–n–p–n SOI TFET, the on–state current and switching state current ratio are appreciably increased; and the average subthreshold slope (SS is effectively reduced. The simulation results of Si:HfO2 ferroelectric p–n–p–n SOI TFET show significant improvement in transconductance (∼9.8X enhancement at high overdrive voltage and average subthreshold slope (∼35% enhancement over nine decades of drain current at room temperature, indicating that this device is a promising candidate to strengthen the performance of p–n–p–n and conventional TFET for a switching performance.

  16. Current linearity and operation stability in Al2O3-gate AlGaN/GaN MOS high electron mobility transistors

    Science.gov (United States)

    Nishiguchi, Kenya; Kaneki, Syota; Ozaki, Shiro; Hashizume, Tamotsu

    2017-10-01

    To investigate current linearity and operation stability of metal-oxide-semiconductor (MOS) AlGaN/GaN high electron mobility transistors (HEMTs), we have fabricated and characterized the Al2O3-gate MOS-HEMTs without and with a bias annealing in air at 300 °C. Compared with the as-fabricated (unannealed) MOS HEMTs, the bias-annealed devices showed improved linearity of I D-V G curves even in the forward bias regime, resulting in increased maximum drain current. Lower subthreshold slope was also observed after bias annealing. From the precise capacitance-voltage analysis on a MOS diode fabricated on the AlGaN/GaN heterostructure, it was found that the bias annealing effectively reduced the state density at the Al2O3/AlGaN interface. This led to efficient modulation of the AlGaN surface potential close to the conduction band edge, resulting in good gate control of two-dimensional electron gas density even at forward bias. In addition, the bias-annealed MOS HEMT showed small threshold voltage shift after applying forward bias stress and stable operation even at high temperatures.

  17. AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors with reduced leakage current and enhanced breakdown voltage using aluminum ion implantation

    Energy Technology Data Exchange (ETDEWEB)

    Sun, Shichuang [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan 430074 (China); Key Laboratory of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, CAS, Suzhou 215123 (China); Fu, Kai, E-mail: kfu2009@sinano.ac.cn, E-mail: cqchen@mail.hust.edu.cn; Yu, Guohao; Zhang, Zhili; Song, Liang; Deng, Xuguang; Li, Shuiming; Sun, Qian; Cai, Yong; Zhang, Baoshun [Key Laboratory of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, CAS, Suzhou 215123 (China); Qi, Zhiqiang; Dai, Jiangnan; Chen, Changqing, E-mail: kfu2009@sinano.ac.cn, E-mail: cqchen@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan 430074 (China)

    2016-01-04

    This letter has studied the performance of AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors on silicon substrate with GaN buffer treated by aluminum ion implantation for insulating followed by a channel regrown by metal–organic chemical vapor deposition. For samples with Al ion implantation of multiple energies of 140 keV (dose: 1.4 × 10{sup 14} cm{sup −2}) and 90 keV (dose: 1 × 10{sup 14} cm{sup −2}), the OFF-state leakage current is decreased by more than 3 orders and the breakdown voltage is enhanced by nearly 6 times compared to the samples without Al ion implantation. Besides, little degradation of electrical properties of the 2D electron gas channel is observed where the maximum drain current I{sub DSmax} at a gate voltage of 3 V was 701 mA/mm and the maximum transconductance g{sub mmax} was 83 mS/mm.

  18. Top-gated chemical vapor deposition grown graphene transistors with current saturation.

    Science.gov (United States)

    Bai, Jingwei; Liao, Lei; Zhou, Hailong; Cheng, Rui; Liu, Lixin; Huang, Yu; Duan, Xiangfeng

    2011-06-08

    Graphene transistors are of considerable interest for radio frequency (rf) applications. In general, transistors with large transconductance and drain current saturation are desirable for rf performance, which is however nontrivial to achieve in graphene transistors. Here we report high-performance top-gated graphene transistors based on chemical vapor deposition (CVD) grown graphene with large transconductance and drain current saturation. The graphene transistors were fabricated with evaporated high dielectric constant material (HfO(2)) as the top-gate dielectrics. Length scaling studies of the transistors with channel length from 5.6 μm to 100 nm show that complete current saturation can be achieved in 5.6 μm devices and the saturation characteristics degrade as the channel length shrinks down to the 100-300 nm regime. The drain current saturation was primarily attributed to drain bias induced shift of the Dirac points. With the selective deposition of HfO(2) gate dielectrics, we have further demonstrated a simple scheme to realize a 300 nm channel length graphene transistors with self-aligned source-drain electrodes to achieve the highest transconductance of 250 μS/μm reported in CVD graphene to date.

  19. Electron density and currents of AlN/GaN high electron mobility transistors with thin GaN/AlN buffer layer

    International Nuclear Information System (INIS)

    Bairamis, A.; Zervos, Ch.; Georgakilas, A.; Adikimenakis, A.; Kostopoulos, A.; Kayambaki, M.; Tsagaraki, K.; Konstantinidis, G.

    2014-01-01

    AlN/GaN high electron mobility transistor (HEMT) structures with thin GaN/AlN buffer layer have been analyzed theoretically and experimentally, and the effects of the AlN barrier and GaN buffer layer thicknesses on two-dimensional electron gas (2DEG) density and transport properties have been evaluated. HEMT structures consisting of [300 nm GaN/ 200 nm AlN] buffer layer on sapphire were grown by plasma-assisted molecular beam epitaxy and exhibited a remarkable agreement with the theoretical calculations, suggesting a negligible influence of the crystalline defects that increase near the heteroepitaxial interface. The 2DEG density varied from 6.8 × 10 12 to 2.1 × 10 13 cm −2 as the AlN barrier thickness increased from 2.2 to 4.5 nm, while a 4.5 nm AlN barrier would result to 3.1 × 10 13 cm −2 on a GaN buffer layer. The 3.0 nm AlN barrier structure exhibited the highest 2DEG mobility of 900 cm 2 /Vs for a density of 1.3 × 10 13 cm −2 . The results were also confirmed by the performance of 1 μm gate-length transistors. The scaling of AlN barrier thickness from 1.5 nm to 4.5 nm could modify the drain-source saturation current, for zero gate-source voltage, from zero (normally off condition) to 0.63 A/mm. The maximum drain-source current was 1.1 A/mm for AlN barrier thickness of 3.0 nm and 3.7 nm, and the maximum extrinsic transconductance was 320 mS/mm for 3.0 nm AlN barrier.

  20. Electron density and currents of AlN/GaN high electron mobility transistors with thin GaN/AlN buffer layer

    Energy Technology Data Exchange (ETDEWEB)

    Bairamis, A.; Zervos, Ch.; Georgakilas, A., E-mail: alexandr@physics.uoc.gr [Microelectronics Research Group, IESL, Foundation for Research and Technology-Hellas (FORTH), P.O. Box 1385, GR-71110 Heraklion, Crete (Greece); Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece); Adikimenakis, A.; Kostopoulos, A.; Kayambaki, M.; Tsagaraki, K.; Konstantinidis, G. [Microelectronics Research Group, IESL, Foundation for Research and Technology-Hellas (FORTH), P.O. Box 1385, GR-71110 Heraklion, Crete (Greece)

    2014-09-15

    AlN/GaN high electron mobility transistor (HEMT) structures with thin GaN/AlN buffer layer have been analyzed theoretically and experimentally, and the effects of the AlN barrier and GaN buffer layer thicknesses on two-dimensional electron gas (2DEG) density and transport properties have been evaluated. HEMT structures consisting of [300 nm GaN/ 200 nm AlN] buffer layer on sapphire were grown by plasma-assisted molecular beam epitaxy and exhibited a remarkable agreement with the theoretical calculations, suggesting a negligible influence of the crystalline defects that increase near the heteroepitaxial interface. The 2DEG density varied from 6.8 × 10{sup 12} to 2.1 × 10{sup 13} cm{sup −2} as the AlN barrier thickness increased from 2.2 to 4.5 nm, while a 4.5 nm AlN barrier would result to 3.1 × 10{sup 13} cm{sup −2} on a GaN buffer layer. The 3.0 nm AlN barrier structure exhibited the highest 2DEG mobility of 900 cm{sup 2}/Vs for a density of 1.3 × 10{sup 13} cm{sup −2}. The results were also confirmed by the performance of 1 μm gate-length transistors. The scaling of AlN barrier thickness from 1.5 nm to 4.5 nm could modify the drain-source saturation current, for zero gate-source voltage, from zero (normally off condition) to 0.63 A/mm. The maximum drain-source current was 1.1 A/mm for AlN barrier thickness of 3.0 nm and 3.7 nm, and the maximum extrinsic transconductance was 320 mS/mm for 3.0 nm AlN barrier.

  1. Controlling charge current through a DNA based molecular transistor

    Energy Technology Data Exchange (ETDEWEB)

    Behnia, S., E-mail: s.behnia@sci.uut.ac.ir; Fathizadeh, S.; Ziaei, J.

    2017-01-05

    Molecular electronics is complementary to silicon-based electronics and may induce electronic functions which are difficult to obtain with conventional technology. We have considered a DNA based molecular transistor and study its transport properties. The appropriate DNA sequence as a central chain in molecular transistor and the functional interval for applied voltages is obtained. I–V characteristic diagram shows the rectifier behavior as well as the negative differential resistance phenomenon of DNA transistor. We have observed the nearly periodic behavior in the current flowing through DNA. It is reported that there is a critical gate voltage for each applied bias which above it, the electrical current is always positive. - Highlights: • Modeling a DNA based molecular transistor and studying its transport properties. • Choosing the appropriate DNA sequence using the quantum chaos tools. • Choosing the functional interval for voltages via the inverse participation ratio tool. • Detecting the rectifier and negative differential resistance behavior of DNA.

  2. Ultra-high gain diffusion-driven organic transistor

    Science.gov (United States)

    Torricelli, Fabrizio; Colalongo, Luigi; Raiteri, Daniele; Kovács-Vajna, Zsolt Miklós; Cantatore, Eugenio

    2016-01-01

    Emerging large-area technologies based on organic transistors are enabling the fabrication of low-cost flexible circuits, smart sensors and biomedical devices. High-gain transistors are essential for the development of large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show a new organic field-effect transistor architecture with a gain larger than 700. This is the highest gain ever reported for organic field-effect transistors. In the proposed organic field-effect transistor, the charge injection and extraction at the metal–semiconductor contacts are driven by the charge diffusion. The ideal conditions of ohmic contacts with negligible contact resistance and flat current saturation are demonstrated. The approach is general and can be extended to any thin-film technology opening unprecedented opportunities for the development of high-performance flexible electronics. PMID:26829567

  3. High Stability Pentacene Transistors Using Polymeric Dielectric Surface Modifier.

    Science.gov (United States)

    Wang, Xiaohong; Lin, Guangqing; Li, Peng; Lv, Guoqiang; Qiu, Longzhen; Ding, Yunsheng

    2015-08-01

    1,6-bis(trichlorosilyl)hexane (C6Cl), polystyrene (PS), and cross-linked polystyrene (CPS) were investigated as gate dielectric modified layers for high performance organic transistors. The influence of the surface energy, roughness and morphology on the charge transport of the organic thin-film transistors (OTFTs) was investigated. The surface energy and roughness both affect the grain size of the pentacene films which will control the charge carrier mobility of the devices. Pentacene thin-film transistors fabricated on the CPS modified dielectric layers exhibited charge carrier mobility as high as 1.11 cm2 V-1 s-1. The bias stress stability for the CPS devices shows that the drain current only decays 1% after 1530 s and the mobility never decreases until 13530 s.

  4. Osteoblastic cells trigger gate currents on nanocrystalline diamond transistor

    Czech Academy of Sciences Publication Activity Database

    Ižák, Tibor; Krátká, Marie; Kromka, Alexander; Rezek, Bohuslav

    2015-01-01

    Roč. 129, May (2015), 95-99 ISSN 0927-7765 R&D Projects: GA ČR GAP108/12/0996 Grant - others:AVČR(CZ) M100101209 Institutional support: RVO:68378271 Keywords : field-effect transistors * nanocrystalline diamond * osteoblastic cells * leakage currents Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.902, year: 2015

  5. Electrothermal Behavior of High-Frequency Silicon-On-Glass Transistors

    NARCIS (Netherlands)

    Nenadovic, N.

    2004-01-01

    In this thesis, research is focused on the investigation of electrothermal effects in high-speed silicon transistors. At high current levels the power dissipation in these devices can lead to heating of both the device itself and the adjacent devices. In advanced transistors these effects are

  6. High mobility polymer gated organic field effect transistor using zinc ...

    Indian Academy of Sciences (India)

    Organic thin film transistors were fabricated using evaporated zinc phthalocyanine as the active layer. Parylene film ... At room temperature, these transistors exhibit p-type conductivity with field-effect ... Keywords. Organic semiconductor; field effect transistor; phthalocyanine; high mobility. ... The evaporation rate was kept at ...

  7. Impact of doped boron concentration in emitter on high- and low-dose-rate damage in lateral PNP transistors

    International Nuclear Information System (INIS)

    Zheng Yuzhan; Lu Wu; Ren Diyuan; Wang Yiyuan; Wang Zhikuan; Yang Yonghui

    2010-01-01

    The characteristics of radiation damage under a high or low dose rate in lateral PNP transistors with a heavily or lightly doped emitter is investigated. Experimental results show that as the total dose increases, the base current of transistors would increase and the current gain decreases. Furthermore, more degradation has been found in lightly-doped PNP transistors, and an abnormal effect is observed in heavily doped transistors. The role of radiation defects, especially the double effects of oxide trapped charge, is discussed in heavily or lightly doped transistors. Finally, through comparison between the high- and low-dose-rate response of the collector current in heavily doped lateral PNP transistors, the abnormal effect can be attributed to the annealing of the oxide trapped charge. The response of the collector current, in heavily doped PNP transistors under high- and low-dose-rate irradiation is described in detail. (semiconductor integrated circuits)

  8. Suppression of tunneling leakage current in junctionless nanowire transistors

    International Nuclear Information System (INIS)

    Lou, Haijun; Li, Dan; Dong, Yan; Lin, Xinnan; He, Jin; Yang, Shengqi; Chan, Mansun

    2013-01-01

    In this paper, the characteristics of tunneling leakage current for the dual-material gate junctionless nanowire transistor (DMG-JNT) are investigated by three-dimensional numerical simulations and compared with conventional junctionless nanowire transistor (JNT). The suppression of the tunneling leakage current on the JNT by introducing an energy band step with the DMG structure is verified and presented for the first time. The effects of channel length on the DMG-JNT and the JNT are also studied. Results showed that the tunneling leakage current of the DMG-JNT is two orders smaller than that of the JNT, and further, the DMG-JNT exhibits superior scaling capability. Two key design parameters of the DMG-JNT, control gate ratio (Ra) and work function difference (δW), have been optimized and the optimal ranges of Ra and δW are pointed out. (paper)

  9. Suppression of tunneling leakage current in junctionless nanowire transistors

    Science.gov (United States)

    Lou, Haijun; Li, Dan; Dong, Yan; Lin, Xinnan; He, Jin; Yang, Shengqi; Chan, Mansun

    2013-12-01

    In this paper, the characteristics of tunneling leakage current for the dual-material gate junctionless nanowire transistor (DMG-JNT) are investigated by three-dimensional numerical simulations and compared with conventional junctionless nanowire transistor (JNT). The suppression of the tunneling leakage current on the JNT by introducing an energy band step with the DMG structure is verified and presented for the first time. The effects of channel length on the DMG-JNT and the JNT are also studied. Results showed that the tunneling leakage current of the DMG-JNT is two orders smaller than that of the JNT, and further, the DMG-JNT exhibits superior scaling capability. Two key design parameters of the DMG-JNT, control gate ratio (Ra) and work function difference (δW), have been optimized and the optimal ranges of Ra and δW are pointed out.

  10. Current-Induced Transistor Sensorics with Electrogenic Cells

    Directory of Open Access Journals (Sweden)

    Peter Fromherz

    2016-04-01

    Full Text Available The concepts of transistor recording of electroactive cells are considered, when the response is determined by a current-induced voltage in the electrolyte due to cellular activity. The relationship to traditional transistor recording, with an interface-induced response due to interactions with the open gate oxide, is addressed. For the geometry of a cell-substrate junction, the theory of a planar core-coat conductor is described with a one-compartment approximation. The fast electrical relaxation of the junction and the slow change of ion concentrations are pointed out. On that basis, various recording situations are considered and documented by experiments. For voltage-gated ion channels under voltage clamp, the effects of a changing extracellular ion concentration and the enhancement/depletion of ion conductances in the adherent membrane are addressed. Inhomogeneous ion conductances are crucial for transistor recording of neuronal action potentials. For a propagating action potential, the effects of an axon-substrate junction and the surrounding volume conductor are distinguished. Finally, a receptor-transistor-sensor is described, where the inhomogeneity of a ligand–activated ion conductance is achieved by diffusion of the agonist and inactivation of the conductance. Problems with regard to a development of reliable biosensors are mentioned.

  11. Giant current fluctuations in an overheated single-electron transistor

    Science.gov (United States)

    Laakso, M. A.; Heikkilä, T. T.; Nazarov, Yuli V.

    2010-11-01

    Interplay of cotunneling and single-electron tunneling in a thermally isolated single-electron transistor leads to peculiar overheating effects. In particular, there is an interesting crossover interval where the competition between cotunneling and single-electron tunneling changes to the dominance of the latter. In this interval, the current exhibits anomalous sensitivity to the effective electron temperature of the transistor island and its fluctuations. We present a detailed study of the current and temperature fluctuations at this interesting point. The methods implemented allow for a complete characterization of the distribution of the fluctuating quantities, well beyond the Gaussian approximation. We reveal and explore the parameter range where, for sufficiently small transistor islands, the current fluctuations become gigantic. In this regime, the optimal value of the current, its expectation value, and its standard deviation differ from each other by parametrically large factors. This situation is unique for transport in nanostructures and for electron transport in general. The origin of this spectacular effect is the exponential sensitivity of the current to the fluctuating effective temperature.

  12. High mobility and quantum well transistors design and TCAD simulation

    CERN Document Server

    Hellings, Geert

    2013-01-01

    For many decades, the semiconductor industry has miniaturized transistors, delivering increased computing power to consumers at decreased cost. However, mere transistor downsizing does no longer provide the same improvements. One interesting option to further improve transistor characteristics is to use high mobility materials such as germanium and III-V materials. However, transistors have to be redesigned in order to fully benefit from these alternative materials. High Mobility and Quantum Well Transistors: Design and TCAD Simulation investigates planar bulk Germanium pFET technology in chapters 2-4, focusing on both the fabrication of such a technology and on the process and electrical TCAD simulation. Furthermore, this book shows that Quantum Well based transistors can leverage the benefits of these alternative materials, since they confine the charge carriers to the high-mobility material using a heterostructure. The design and fabrication of one particular transistor structure - the SiGe Implant-Free Qu...

  13. Highly Crumpled All-Carbon Transistors for Brain Activity Recording.

    Science.gov (United States)

    Yang, Long; Zhao, Yan; Xu, Wenjing; Shi, Enzheng; Wei, Wenjing; Li, Xinming; Cao, Anyuan; Cao, Yanping; Fang, Ying

    2017-01-11

    Neural probes based on graphene field-effect transistors have been demonstrated. Yet, the minimum detectable signal of graphene transistor-based probes is inversely proportional to the square root of the active graphene area. This fundamentally limits the scaling of graphene transistor-based neural probes for improved spatial resolution in brain activity recording. Here, we address this challenge using highly crumpled all-carbon transistors formed by compressing down to 16% of its initial area. All-carbon transistors, chemically synthesized by seamless integration of graphene channels and hybrid graphene/carbon nanotube electrodes, maintained structural integrity and stable electronic properties under large mechanical deformation, whereas stress-induced cracking and junction failure occurred in conventional graphene/metal transistors. Flexible, highly crumpled all-carbon transistors were further verified for in vivo recording of brain activity in rats. These results highlight the importance of advanced material and device design concepts to make improvements in neuroelectronics.

  14. High mobility solution-processed hybrid light emitting transistors

    International Nuclear Information System (INIS)

    Walker, Bright; Kim, Jin Young; Ullah, Mujeeb; Burn, Paul L.; Namdas, Ebinazar B.; Chae, Gil Jo; Cho, Shinuk; Seo, Jung Hwa

    2014-01-01

    We report the design, fabrication, and characterization of high-performance, solution-processed hybrid (inorganic-organic) light emitting transistors (HLETs). The devices employ a high-mobility, solution-processed cadmium sulfide layer as the switching and transport layer, with a conjugated polymer Super Yellow as an emissive material in non-planar source/drain transistor geometry. We demonstrate HLETs with electron mobilities of up to 19.5 cm 2 /V s, current on/off ratios of >10 7 , and external quantum efficiency of 10 −2 % at 2100 cd/m 2 . These combined optical and electrical performance exceed those reported to date for HLETs. Furthermore, we provide full analysis of charge injection, charge transport, and recombination mechanism of the HLETs. The high brightness coupled with a high on/off ratio and low-cost solution processing makes this type of hybrid device attractive from a manufacturing perspective

  15. Wavy channel transistor for area efficient high performance operation

    KAUST Repository

    Fahad, Hossain M.

    2013-04-05

    We report a wavy channel FinFET like transistor where the channel is wavy to increase its width without any area penalty and thereby increasing its drive current. Through simulation and experiments, we show the effectiveness of such device architecture is capable of high performance operation compared to conventional FinFETs with comparatively higher area efficiency and lower chip latency as well as lower power consumption.

  16. Research of the voltage and current stabilization processes by using the silicon field-effect transistor

    International Nuclear Information System (INIS)

    Karimov, A.V.; Yodgorova, D.M.; Kamanov, B.M.; Giyasova, F.A.; Yakudov, A.A.

    2012-01-01

    The silicon field-effect transistors were investigated to use in circuits for stabilization of current and voltage. As in gallium arsenide field-effect transistors, in silicon field-effect transistors with p-n-junction a new mechanism of saturation of the drain current is experimentally found out due to both transverse and longitudinal compression of channel by additional resistance between the source and the gate of the transistor. The criteria for evaluating the coefficients of stabilization of transient current suppressors and voltage stabilizator based on the field-effect transistor are considered. (authors)

  17. Two-Dimensional Modeling of Aluminum Gallium Nitride/Gallium Nitride High Electron Mobility Transistor

    National Research Council Canada - National Science Library

    Holmes, Kenneth

    2002-01-01

    Gallium Nitride (GaN) High Electron Mobility Transistors (HEMT's) are microwave power devices that have the performance characteristics to improve the capabilities of current and future Navy radar and communication systems...

  18. Investigation of effective base transit time and current gain modulation of light-emitting transistors under different ambient temperatures

    Energy Technology Data Exchange (ETDEWEB)

    Yang, Hao-Hsiang; Tu, Wen-Chung; Wang, Hsiao-Lun [Graduate Institute of Photonics and Optoelectronics, National Taiwan University, 1, Roosevelt Road, Sec. 4, Taipei 106, Taiwan (China); Wu, Chao-Hsin, E-mail: chaohsinwu@ntu.edu.tw [Graduate Institute of Photonics and Optoelectronics, National Taiwan University, 1, Roosevelt Road, Sec. 4, Taipei 106, Taiwan (China); Graduate Institute of Electronics Engineering, National Taiwan University, 1, Roosevelt Road, Sec. 4, Taipei106, Taiwan (China)

    2014-11-03

    In this report, the modulation of current gain of InGaP/GaAs light-emitting transistors under different ambient temperatures are measured and analyzed using thermionic emission model of quantum well embedded in the transistor base region. Minority carriers captured by quantum wells gain more energy at high temperatures and escape from quantum wells resulting in an increase of current gain and lower optical output, resulting in different I-V characteristics from conventional heterojunction bipolar transistors. The effect of the smaller thermionic lifetime thus reduces the effective base transit time of transistors at high temperatures. The unique current gain enhancement of 27.61% is achieved when operation temperature increase from 28 to 85 °C.

  19. Investigation of defect-induced abnormal body current in fin field-effect-transistors

    International Nuclear Information System (INIS)

    Liu, Kuan-Ju; Tsai, Jyun-Yu; Lu, Ying-Hsin; Liu, Xi-Wen; Chang, Ting-Chang; Chen, Ching-En; Yang, Ren-Ya; Cheng, Osbert; Huang, Cheng-Tung

    2015-01-01

    This letter investigates the mechanism of abnormal body current at the linear region in n-channel high-k/metal gate stack fin field effect transistors. Unlike body current, which is generated by impact ionization at high drain voltages, abnormal body current was found to increase with decreasing drain voltages. Notably, the unusual body leakage only occurs in three-dimensional structure devices. Based on measurements under different operation conditions, the abnormal body current can be attributed to fin surface defect-induced leakage current, and the mechanism is electron tunneling to the fin via the defects, resulting in holes left at the body terminal

  20. Investigation of abrupt degradation of drain current caused by under-gate crack in AlGaN/GaN high electron mobility transistors during high temperature operation stress

    Energy Technology Data Exchange (ETDEWEB)

    Zeng, Chang; Liao, XueYang; Li, RuGuan; Wang, YuanSheng; Chen, Yiqiang, E-mail: yiqiang-chen@hotmail.com; Su, Wei; Liu, Yuan; Wang, Li Wei; Lai, Ping; Huang, Yun; En, YunFei [Science and Technology on Reliability Physics and Application of Electronic Component Laboratory, The 5th Electronics Research Institute of the Ministry of Industry and Information Technology, 510610 Guangzhou (China)

    2015-09-28

    In this paper, we investigate the degradation mode and mechanism of AlGaN/GaN based high electron mobility transistors (HEMTs) during high temperature operation (HTO) stress. It demonstrates that there was abrupt degradation mode of drain current during HTO stress. The abrupt degradation is ascribed to the formation of crack under the gate which was the result of the brittle fracture of epilayer based on failure analysis. The origin of the mechanical damage under the gate is further investigated and discussed based on top-down scanning electron microscope, cross section transmission electron microscope and energy dispersive x-ray spectroscopy analysis, and stress simulation. Based on the coupled analysis of the failure physical feature and stress simulation considering the coefficient of thermal expansion (CTE) mismatch in different materials in gate metals/semiconductor system, the mechanical damage under the gate is related to mechanical stress induced by CTE mismatch in Au/Ti/Mo/GaN system and stress concentration caused by the localized structural damage at the drain side of the gate edge. These results indicate that mechanical stress induced by CTE mismatch of materials inside the device plays great important role on the reliability of AlGaN/GaN HEMTs during HTO stress.

  1. Oscillation of Critical Current by Gate Voltage in Cooper Pair Transistor

    International Nuclear Information System (INIS)

    Kim, N.; Cheong, Y.; Song, W.

    2010-01-01

    We measured the critical current of a Cooper pair transistor consisting of two Josephson junctions and a gate electrode. The Cooper pair transistors were fabricated by using electron-beam lithography and double-angle evaporation technique. The Gate voltage dependence of critical current was measured by observing voltage jumps at various gate voltages while sweeping bias current. The observed oscillation was 2e-periodic, which shows the Cooper pair transistor had low level of quasiparticle poisoning.

  2. Polarization sensitive detection of 100 GHz radiation by high mobility field-effect transistors

    International Nuclear Information System (INIS)

    Sakowicz, M.; Lusakowski, J.; Karpierz, K.; Grynberg, M.; Knap, W.; Gwarek, W.

    2008-01-01

    Detection of 100 GHz electromagnetic radiation by a GaAs/AlGaAs high electron mobility field-effect transistor was investigated at 300 K as a function of the angle α between the direction of linear polarization of the radiation and the symmetry axis of the transistor. The angular dependence of the detected signal was found to be A 0 cos 2 (α-α 0 )+C with A 0 , α 0 , and C dependent on the electrical polarization of the transistor gate. This dependence is interpreted as due to excitation of two crossed phase-shifted oscillators. A response of the transistor chip (including bonding wires and the substrate) to 100 GHz radiation was numerically simulated. Results of calculations confirmed experimentally observed dependencies and showed that the two oscillators result from an interplay of 100 GHz currents defined by the transistor impedance together with bonding wires and substrate related modes

  3. Subthreshold currents in CMOS transistors made on oxygen-implanted silicon

    International Nuclear Information System (INIS)

    Foster, D.J.

    1983-01-01

    Kinks have been observed in subthreshold current plots of mesa-shaped n-channel transistors made on oxygen-implanted silicon substrates. The kinks represent additional current flow and are due to overlapping fields from the gate electrode causing early corner inversion and to a Qsub(ss) side-wall effect. Subthreshold currents in n-channel transistors are dominated by the two effects which, as a consequence, reduce threshold voltages especially in narrow n-channel transistors. The subthreshold characteristics of p-channel transistors were not affected in the same way. (author)

  4. Wavy channel transistor for area efficient high performance operation

    KAUST Repository

    Fahad, Hossain M.; Hussain, Aftab M.; Hussain, Muhammad Mustafa; Sevilla, Galo T.

    2013-01-01

    We report a wavy channel FinFET like transistor where the channel is wavy to increase its width without any area penalty and thereby increasing its drive current. Through simulation and experiments, we show the effectiveness of such device

  5. A III-V nanowire channel on silicon for high-performance vertical transistors.

    Science.gov (United States)

    Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

    2012-08-09

    Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

  6. Transistor data book

    International Nuclear Information System (INIS)

    1988-03-01

    It introduces how to use this book. It lists transistor data and index, which are Type No, Cross index, Germanium PNP low power transistors, silicon NPN low power transistors, Germanium PNP high power transistors, Switching transistors, transistor arrays, Miscellaneous transistors, types with U.S military specifications, direct replacement transistors, suggested replacement transistors, schematic drawings, outline drawings, device number keys and manufacturer's logos.

  7. Nonlinear photoresponse of field effect transistors terahertz detectors at high irradiation intensities

    International Nuclear Information System (INIS)

    But, D. B.; Drexler, C.; Ganichev, S. D.; Sakhno, M. V.; Sizov, F. F.; Dyakonova, N.; Drachenko, O.; Gutin, A.; Knap, W.

    2014-01-01

    Terahertz power dependence of the photoresponse of field effect transistors, operating at frequencies from 0.1 to 3 THz for incident radiation power density up to 100 kW/cm 2 was studied for Si metal–oxide–semiconductor field-effect transistors and InGaAs high electron mobility transistors. The photoresponse increased linearly with increasing radiation intensity up to the kW/cm 2 range. Nonlinearity followed by saturation of the photoresponse was observed for all investigated field effect transistors for intensities above several kW/cm 2 . The observed photoresponse nonlinearity is explained by nonlinearity and saturation of the transistor channel current. A theoretical model of terahertz field effect transistor photoresponse at high intensity was developed. The model explains quantitative experimental data both in linear and nonlinear regions. Our results show that dynamic range of field effect transistors is very high and can extend over more than six orders of magnitudes of power densities (from ∼0.5 mW/cm 2 to ∼5 kW/cm 2 )

  8. Photoionization spectroscopy of deep defects responsible for current collapse in nitride-based field effect transistors

    International Nuclear Information System (INIS)

    Klein, P B; Binari, S C

    2003-01-01

    This review is concerned with the characterization and identification of the deep centres that cause current collapse in nitride-based field effect transistors. Photoionization spectroscopy is an optical technique that has been developed to probe the characteristics of these defects. Measured spectral dependences provide information on trap depth, lattice coupling and on the location of the defects in the device structure. The spectrum of an individual trap may also be regarded as a 'fingerprint' of the defect, allowing the trap to be followed in response to the variation of external parameters. The basis for these measurements is derived through a modelling procedure that accounts quantitatively for the light-induced drain current increase in the collapsed device. Applying the model to fit the measured variation of drain current increase with light illumination provides an estimate of the concentrations and photoionization cross-sections of the deep defects. The results of photoionization studies of GaN metal-semiconductor field effect transistors and AlGaN/GaN high electron mobility transistors (HEMTs) grown by metal-organic chemical vapour deposition (MOCVD) are presented and the conclusions regarding the nature of the deep traps responsible are discussed. Finally, recent photoionization studies of current collapse induced by short-term (several hours) bias stress in AlGaN/GaN HEMTs are described and analysed for devices grown by both MOCVD and molecular beam epitaxy. (topical review)

  9. High-performance radio frequency transistors based on diameter-separated semiconducting carbon nanotubes

    Energy Technology Data Exchange (ETDEWEB)

    Cao, Yu; Che, Yuchi; Zhou, Chongwu, E-mail: chongwuz@usc.edu [Department of Electrical Engineering, University of Southern California, Los Angeles, California 90089 (United States); Seo, Jung-Woo T.; Hersam, Mark C. [Department of Materials Science and Engineering and Department of Chemistry, Northwestern University, Evanston, Illinois 60208 (United States); Gui, Hui [Department of Chemical Engineering and Materials Science, University of Southern California, Los Angeles, California 90089 (United States)

    2016-06-06

    In this paper, we report the high-performance radio-frequency transistors based on the single-walled semiconducting carbon nanotubes with a refined average diameter of ∼1.6 nm. These diameter-separated carbon nanotube transistors show excellent transconductance of 55 μS/μm and desirable drain current saturation with an output resistance of ∼100 KΩ μm. An exceptional radio-frequency performance is also achieved with current gain and power gain cut-off frequencies of 23 GHz and 20 GHz (extrinsic) and 65 GHz and 35 GHz (intrinsic), respectively. These radio-frequency metrics are among the highest reported for the carbon nanotube thin-film transistors. This study provides demonstration of radio frequency transistors based on carbon nanotubes with tailored diameter distributions, which will guide the future application of carbon nanotubes in radio-frequency electronics.

  10. Parametrization of the radiation induced leakage current increase of NMOS transistors

    CERN Document Server

    Backhaus, Malte

    2017-01-13

    The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to si...

  11. Drain current enhancement induced by hole injection from gate of 600-V-class normally off gate injection transistor under high temperature conditions up to 200 °C

    Science.gov (United States)

    Ishii, Hajime; Ueno, Hiroaki; Ueda, Tetsuzo; Endoh, Tetsuo

    2018-06-01

    In this paper, the current–voltage (I–V) characteristics of a 600-V-class normally off GaN gate injection transistor (GIT) from 25 to 200 °C are analyzed, and it is revealed that the drain current of the GIT increases during high-temperature operation. It is found that the maximum drain current (I dmax) of the GIT is 86% higher than that of a conventional 600-V-class normally off GaN metal insulator semiconductor hetero-FET (MIS-HFET) at 150 °C, whereas the GIT obtains 56% I dmax even at 200 °C. Moreover, the mechanism of the drain current increase of the GIT is clarified by examining the relationship between the temperature dependence of the I–V characteristics of the GIT and the gate hole injection effect determined from the shift of the second transconductance (g m) peak of the g m–V g characteristic. From the above, the GIT is a promising device with enough drivability for future power switching applications even under high-temperature conditions.

  12. Transistor reset preamplifier for high-rate high-resolution spectroscopy

    International Nuclear Information System (INIS)

    Landis, D.A.; Cork, C.P.; Madden, N.W.; Goulding, F.S.

    1981-10-01

    Pulsed transistor reset of high resolution charge sensitive preamplifiers used in cooled semiconductor spectrometers can sometimes have an advantage over pulsed light reset systems. Several versions of transistor reset spectrometers using both silicon and germanium detectors have been built. This paper discusses the advantages of the transistor reset system and illustrates several configurations of the packages used for the FET and reset transistor. It also describes the preamplifer circuit and shows the performance of the spectrometer at high rates

  13. Charge fluctuations in high-electron-mobility transistors: a review

    International Nuclear Information System (INIS)

    Green, F.

    1993-01-01

    The quasi-two-dimensional carrier population, free to move within a near-perfect crystalline matrix, is the key to remarkable improvements in signal gain, current density and quiet operation. Current-fluctuation effects are central to all of these properties. Some of these are easily understood within linear-response theory, but other fluctuation phenomena are less tractable. In particular, nonequilibrium noise poses significant theoretical challenges, both descriptive and predictive. This paper examines a few of the basic physical issues which motivate device-noise theory. The structure and operation of high-electron-mobility transistor are first reviewed. The recent nonlinear fluctuation theory of Stanton and Wilkins (1987) help to identify at least some of the complicated noise physics which can arise when carriers in GaAs-like conduction bands are subjected to high fields. Simple examples of fluctuation-dominated behaviour are discussed, with numerical illustrations. 20 refs., 9 figs

  14. Combined effects of 60Co dose and high frequency interferences on a discrete bipolar transistor

    International Nuclear Information System (INIS)

    Doridant, A.; Raoult, J.; Jarrix, S.; Blain, A.; Dusseau, L.; Hoffmann, P.; Chatry, N.; Calvel, P.

    2012-01-01

    This paper concerns bipolar transistors subject to a double aggression: dose irradiation and high-frequency interference. The electromagnetic interference is injected in a contactless way in the near-field zone around the device. Parameters of the interference are power and frequency, the latter largely out of band of operation of the transistors. The output voltage of the transistor exhibits changes, due to rectification and to some extent to current crowding. The importance of the base bias set-up for the type of change occurring in voltage is displayed. After irradiation with a 60 Co source, the voltage output will change under electromagnetic interference but sometimes in an opposite way as initially measured. The impact of the irradiation with respect to electromagnetic susceptibility is highlighted from a physical point of view. Finally preliminary results of simulation for susceptibility prediction are given and a discussion is given on the limits of the transistor model used. (authors)

  15. Temperature dependence of the current in Schottky-barrier source-gated transistors

    Science.gov (United States)

    Sporea, R. A.; Overy, M.; Shannon, J. M.; Silva, S. R. P.

    2015-05-01

    The temperature dependence of the drain current is an important parameter in thin-film transistors. In this paper, we propose that in source-gated transistors (SGTs), this temperature dependence can be controlled and tuned by varying the length of the source electrode. SGTs comprise a reverse biased potential barrier at the source which controls the current. As a result, a large activation energy for the drain current may be present which, although useful in specific temperature sensing applications, is in general deleterious in many circuit functions. With support from numerical simulations with Silvaco Atlas, we describe how increasing the length of the source electrode can be used to reduce the activation energy of SGT drain current, while maintaining the defining characteristics of SGTs: low saturation voltage, high output impedance in saturation, and tolerance to geometry variations. In this study, we apply the dual current injection modes to obtain drain currents with high and low activation energies and propose mechanisms for their exploitation in future large-area integrated circuit designs.

  16. Depth-resolved ultra-violet spectroscopic photo current-voltage measurements for the analysis of AlGaN/GaN high electron mobility transistor epilayer deposited on Si

    International Nuclear Information System (INIS)

    Ozden, Burcu; Yang, Chungman; Tong, Fei; Khanal, Min P.; Mirkhani, Vahid; Sk, Mobbassar Hassan; Ahyi, Ayayi Claude; Park, Minseo

    2014-01-01

    We have demonstrated that the depth-dependent defect distribution of the deep level traps in the AlGaN/GaN high electron mobility transistor (HEMT) epi-structures can be analyzed by using the depth-resolved ultra-violet (UV) spectroscopic photo current-voltage (IV) (DR-UV-SPIV). It is of great importance to analyze deep level defects in the AlGaN/GaN HEMT structure, since it is recognized that deep level defects are the main source for causing current collapse phenomena leading to reduced device reliability. The AlGaN/GaN HEMT epi-layers were grown on a 6 in. Si wafer by metal-organic chemical vapor deposition. The DR-UV-SPIV measurement was performed using a monochromatized UV light illumination from a Xe lamp. The key strength of the DR-UV-SPIV is its ability to provide information on the depth-dependent electrically active defect distribution along the epi-layer growth direction. The DR-UV-SPIV data showed variations in the depth-dependent defect distribution across the wafer. As a result, rapid feedback on the depth-dependent electrical homogeneity of the electrically active defect distribution in the AlGaN/GaN HEMT epi-structure grown on a Si wafer with minimal sample preparation can be elucidated from the DR-UV-SPIV in combination with our previously demonstrated spectroscopic photo-IV measurement with the sub-bandgap excitation.

  17. Depth-resolved ultra-violet spectroscopic photo current-voltage measurements for the analysis of AlGaN/GaN high electron mobility transistor epilayer deposited on Si

    Energy Technology Data Exchange (ETDEWEB)

    Ozden, Burcu; Yang, Chungman; Tong, Fei; Khanal, Min P.; Mirkhani, Vahid; Sk, Mobbassar Hassan; Ahyi, Ayayi Claude; Park, Minseo, E-mail: park@physics.auburn.edu [Department of Physics, Auburn University, Auburn, Alabama 36849 (United States)

    2014-10-27

    We have demonstrated that the depth-dependent defect distribution of the deep level traps in the AlGaN/GaN high electron mobility transistor (HEMT) epi-structures can be analyzed by using the depth-resolved ultra-violet (UV) spectroscopic photo current-voltage (IV) (DR-UV-SPIV). It is of great importance to analyze deep level defects in the AlGaN/GaN HEMT structure, since it is recognized that deep level defects are the main source for causing current collapse phenomena leading to reduced device reliability. The AlGaN/GaN HEMT epi-layers were grown on a 6 in. Si wafer by metal-organic chemical vapor deposition. The DR-UV-SPIV measurement was performed using a monochromatized UV light illumination from a Xe lamp. The key strength of the DR-UV-SPIV is its ability to provide information on the depth-dependent electrically active defect distribution along the epi-layer growth direction. The DR-UV-SPIV data showed variations in the depth-dependent defect distribution across the wafer. As a result, rapid feedback on the depth-dependent electrical homogeneity of the electrically active defect distribution in the AlGaN/GaN HEMT epi-structure grown on a Si wafer with minimal sample preparation can be elucidated from the DR-UV-SPIV in combination with our previously demonstrated spectroscopic photo-IV measurement with the sub-bandgap excitation.

  18. Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

    Science.gov (United States)

    Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

    2012-01-01

    Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

  19. GaN transistors on Si for switching and high-frequency applications

    Science.gov (United States)

    Ueda, Tetsuzo; Ishida, Masahiro; Tanaka, Tsuyoshi; Ueda, Daisuke

    2014-10-01

    In this paper, recent advances of GaN transistors on Si for switching and high-frequency applications are reviewed. Novel epitaxial structures including superlattice interlayers grown by metal organic chemical vapor deposition (MOCVD) relieve the strain and eliminate the cracks in the GaN over large-diameter Si substrates up to 8 in. As a new device structure for high-power switching application, Gate Injection Transistors (GITs) with a p-AlGaN gate over an AlGaN/GaN heterostructure successfully achieve normally-off operations maintaining high drain currents and low on-state resistances. Note that the GITs on Si are free from current collapse up to 600 V, by which the drain current would be markedly reduced after the application of high drain voltages. Highly efficient operations of an inverter and DC-DC converters are presented as promising applications of GITs for power switching. The high efficiencies in an inverter, a resonant LLC converter, and a point-of-load (POL) converter demonstrate the superior potential of the GaN transistors on Si. As for high-frequency transistors, AlGaN/GaN heterojuction field-effect transistors (HFETs) on Si designed specifically for microwave and millimeter-wave frequencies demonstrate a sufficiently high output power at these frequencies. Output powers of 203 W at 2.5 GHz and 10.7 W at 26.5 GHz are achieved by the fabricated GaN transistors. These devices for switching and high-frequency applications are very promising as future energy-efficient electronics because of their inherent low fabrication cost and superior device performance.

  20. Rendering high charge density of states in ionic liquid-gated MoS 2 transistors

    NARCIS (Netherlands)

    Lee, Y.; Lee, J.; Kim, S.; Park, H.S.

    2014-01-01

    We investigated high charge density of states (DOS) in the bandgap of MoS2 nanosheets with variable temperature measurements on ionic liquid-gated MoS2 transistors. The thermally activated charge transport indicates that the electrical current in the two-dimensional MoS 2 nanosheets under high

  1. Parametrization of the radiation induced leakage current increase of NMOS transistors

    International Nuclear Information System (INIS)

    Backhaus, M.

    2017-01-01

    The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to silicon dioxide interface the leakage current results as a function of the exposure time to ionizing radiation. This function is fitted to data of the leakage current of single transistors as well as to data of the supply current of full ASICs.

  2. Study on GaN buffer leakage current in AlGaN/GaN high electron mobility transistor structures grown by ammonia-molecular beam epitaxy on 100-mm Si(111)

    International Nuclear Information System (INIS)

    Ravikiran, L.; Radhakrishnan, K.; Ng, G. I.; Munawar Basha, S.; Dharmarasu, N.; Agrawal, M.; Manoj kumar, C. M.; Arulkumaran, S.

    2015-01-01

    The effect of carbon doping on the structural and electrical properties of GaN buffer layer of AlGaN/GaN high electron mobility transistor (HEMT) structures has been studied. In the undoped HEMT structures, oxygen was identified as the dominant impurity using secondary ion mass spectroscopy and photoluminescence (PL) measurements. In addition, a notable parallel conduction channel was identified in the GaN buffer at the interface. The AlGaN/GaN HEMT structures with carbon doped GaN buffer using a CBr 4 beam equivalent pressure of 1.86 × 10 −7 mTorr showed a reduction in the buffer leakage current by two orders of magnitude. Carbon doped GaN buffers also exhibited a slight increase in the crystalline tilt with some pits on the growth surface. PL and Raman measurements indicated only a partial compensation of donor states with carbon acceptors. However, AlGaN/GaN HEMT structures with carbon doped GaN buffer with 200 nm thick undoped GaN near the channel exhibited good 2DEG characteristics

  3. Study on GaN buffer leakage current in AlGaN/GaN high electron mobility transistor structures grown by ammonia-molecular beam epitaxy on 100-mm Si(111)

    Energy Technology Data Exchange (ETDEWEB)

    Ravikiran, L.; Radhakrishnan, K., E-mail: ERADHA@e.ntu.edu.sg; Ng, G. I. [NOVITAS-Nanoelectronics, Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 (Singapore); Munawar Basha, S.; Dharmarasu, N.; Agrawal, M.; Manoj kumar, C. M.; Arulkumaran, S. [Temasek Laboratories@NTU, Nanyang Technological University, Singapore 637553 (Singapore)

    2015-06-28

    The effect of carbon doping on the structural and electrical properties of GaN buffer layer of AlGaN/GaN high electron mobility transistor (HEMT) structures has been studied. In the undoped HEMT structures, oxygen was identified as the dominant impurity using secondary ion mass spectroscopy and photoluminescence (PL) measurements. In addition, a notable parallel conduction channel was identified in the GaN buffer at the interface. The AlGaN/GaN HEMT structures with carbon doped GaN buffer using a CBr{sub 4} beam equivalent pressure of 1.86 × 10{sup −7} mTorr showed a reduction in the buffer leakage current by two orders of magnitude. Carbon doped GaN buffers also exhibited a slight increase in the crystalline tilt with some pits on the growth surface. PL and Raman measurements indicated only a partial compensation of donor states with carbon acceptors. However, AlGaN/GaN HEMT structures with carbon doped GaN buffer with 200 nm thick undoped GaN near the channel exhibited good 2DEG characteristics.

  4. Giant current fluctuations in an overheated single-electron transistor

    NARCIS (Netherlands)

    Laakso, M.A.; Heikkilä, T.T.; Nazarov, Y.V.

    2010-01-01

    Interplay of cotunneling and single-electron tunneling in a thermally isolated single-electron transistor leads to peculiar overheating effects. In particular, there is an interesting crossover interval where the competition between cotunneling and single-electron tunneling changes to the dominance

  5. Negative Offset Operation of Four-Transistor CMOS Image Pixels for Increased Well Capacity and Suppressed Dark Current

    NARCIS (Netherlands)

    Mheen, B.; Song, Y.J.; Theuwissen, J.P.

    2008-01-01

    This letter presents an electrical method to reduce dark current as well as increase well capacity of four-transistor pixels in a CMOS image sensor, utilizing a small negative offset voltage to the gate of the transfer (TX) transistor particularly only when the TX transistor is off. As a result,

  6. Ultra Low Voltage Class AB Switched Current Memory Cells Based on Floating Gate Transistors

    DEFF Research Database (Denmark)

    Mucha, Igor

    1999-01-01

    current memory cells were designed using a CMOS process with threshold voltages V-T0n = \\V-T0p\\ = 0.9 V for the n- and p-channel devices. Both hand calculations and PSPICE simulations showed that the designed example switched current memory cell allowed a maximum signal range better than +/-18 mu......A proposal for a class AB switched current memory cell, suitable for ultra-low-voltage applications is presented. The proposal employs transistors with floating gates, allowing to build analog building blocks for ultralow supply voltage operation also in CMOS processes with high threshold voltages....... This paper presents the theoretical basis for the design of "floating-gate'' switched current memory cells by giving a detailed description and analysis of the most important impacts degrading the performance of the cells. To support the theoretical assumptions circuits based on "floating-gate'' switched...

  7. Subthreshold Schottky-barrier thin-film transistors with ultralow power and high intrinsic gain

    Science.gov (United States)

    Lee, Sungsik; Nathan, Arokia

    2016-10-01

    The quest for low power becomes highly compelling in newly emerging application areas related to wearable devices in the Internet of Things. Here, we report on a Schottky-barrier indium-gallium-zinc-oxide thin-film transistor operating in the deep subthreshold regime (i.e., near the OFF state) at low supply voltages (400) that was both bias and geometry independent. The transistor reported here is useful for sensor interface circuits in wearable devices where high current sensitivity and ultralow power are vital for battery-less operation.

  8. High current, high bandwidth laser diode current driver

    Science.gov (United States)

    Copeland, David J.; Zimmerman, Robert K., Jr.

    1991-01-01

    A laser diode current driver has been developed for free space laser communications. The driver provides 300 mA peak modulation current and exhibits an optical risetime of less than 400 ps. The current and optical pulses are well behaved and show minimal ringing. The driver is well suited for QPPM modulation at data rates up to 440 Mbit/s. Much previous work has championed current steering circuits; in contrast, the present driver is a single-ended on/off switch. This results in twice the power efficiency as a current steering driver. The driver electrical efficiency for QPPM data is 34 percent. The high speed switch is realized with a Ku-band GaAsFET transistor, with a suitable pre-drive circuit, on a hybrid microcircuit adjacent to the laser diode.

  9. ON current enhancement of nanowire Schottky barrier tunnel field effect transistors

    Science.gov (United States)

    Takei, Kohei; Hashimoto, Shuichiro; Sun, Jing; Zhang, Xu; Asada, Shuhei; Xu, Taiyu; Matsukawa, Takashi; Masahara, Meishoku; Watanabe, Takanobu

    2016-04-01

    Silicon nanowire Schottky barrier tunnel field effect transistors (NW-SBTFETs) are promising structures for high performance devices. In this study, we fabricated NW-SBTFETs to investigate the effect of nanowire structure on the device characteristics. The NW-SBTFETs were operated with a backgate bias, and the experimental results demonstrate that the ON current density is enhanced by narrowing the width of the nanowire. We confirmed using the Fowler-Nordheim plot that the drain current in the ON state mainly comprises the quantum tunneling component through the Schottky barrier. Comparison with a technology computer aided design (TCAD) simulation revealed that the enhancement is attributed to the electric field concentration at the corners of cross-section of the NW. The study findings suggest an effective approach to securing the ON current by Schottky barrier width modulation.

  10. Biofunctionalized Zinc Oxide Field Effect Transistors for Selective Sensing of Riboflavin with Current Modulation

    Directory of Open Access Journals (Sweden)

    Morley O. Stone

    2011-06-01

    Full Text Available Zinc oxide field effect transistors (ZnO-FET, covalently functionalized with single stranded DNA aptamers, provide a highly selective platform for label-free small molecule sensing. The nanostructured surface morphology of ZnO provides high sensitivity and room temperature deposition allows for a wide array of substrate types. Herein we demonstrate the selective detection of riboflavin down to the pM level in aqueous solution using the negative electrical current response of the ZnO-FET by covalently attaching a riboflavin binding aptamer to the surface. The response of the biofunctionalized ZnO-FET was tuned by attaching a redox tag (ferrocene to the 3’ terminus of the aptamer, resulting in positive current modulation upon exposure to riboflavin down to pM levels.

  11. Interface-controlled, high-mobility organic transistors

    NARCIS (Netherlands)

    Jurchescu, Oana D.; Popinciuc, Mihaita; van Wees, Bart J.; Palstra, Thomas T. M.

    2007-01-01

    The achievement of high mobilities in field-effect transistors (FETs) is one of the main challenges for the widespread application of organic conductors in devices. Good device performance of a single-crystal pentacene FET requires both removal of impurity molecules from the bulk and the

  12. Highly stable thin film transistors using multilayer channel structure

    KAUST Repository

    Nayak, Pradipta K.; Wang, Zhenwei; Anjum, Dalaver H.; Hedhili, Mohamed N.; Alshareef, Husam N.

    2015-01-01

    We report highly stable gate-bias stress performance of thin film transistors (TFTs) using zinc oxide (ZnO)/hafnium oxide (HfO2) multilayer structure as the channel layer. Positive and negative gate-bias stress stability of the TFTs was measured

  13. Current Analysis and Modeling of Fullerene Single-Electron Transistor at Room Temperature

    Science.gov (United States)

    Khadem Hosseini, Vahideh; Ahmadi, Mohammad Taghi; Afrang, Saeid; Ismail, Razali

    2017-07-01

    Single-electron transistors (SETs) are interesting electronic devices that have become key elements in modern nanoelectronic systems. SETs operate quickly because they use individual electrons, with the number transferred playing a key role in their switching behavior. However, rapid transmission of electrons can cause their accumulation at the island, affecting the I- V characteristic. Selection of fullerene as a nanoscale zero-dimensional material with high stability, and controllable size in the fabrication process, can overcome this charge accumulation issue and improve the reliability of SETs. Herein, the current in a fullerene SET is modeled and compared with experimental data for a silicon SET. Furthermore, a weaker Coulomb staircase and improved reliability are reported. Moreover, the applied gate voltage and fullerene diameter are found to be directly associated with the I- V curve, enabling the desired current to be achieved by controlling the fullerene diameter.

  14. Graphene as tunable contact for high performance thin film transistor

    Science.gov (United States)

    Liu, Yuan

    Graphene has been one of the most extensively studied materials due to its unique band structure, the linear dispersion at the K point. It gives rise to novel phenomena, such as the anomalous quantum Hall effect, and has opened up a new category of "Fermi-Dirac" physics. Graphene has also attracted enormous attention for future electronics because of its exceptional high carrier mobility, high carrier saturation velocity, and large critical current density. However, graphene has zero intrinsic band gap, thus can not be used as the active channel material for logic transistors with sufficient on/off current ratio. Previous approaches to address this challenge include the induction of a transport gap in graphene nanostructures or bilayer graphene. However, these approaches have proved successful in improving the on-- off ratio of the resulting devices, but often at a severe sacrifice of the deliverable current density. Alternatively, with a finite density of states, tunable work-function and optical transparency, graphene can function as a unique tunable contact material to create a new structure of electronic devices. In this thesis, I will present my effort toward on-off ratio of graphene based vertical thin film transistor. I will include the work form four of my first author publication. I will first present my research studies on the a dramatic enhancement of the overall quantum efficiency and spectral selectivity of graphene photodetector, by coupling with plasmonic nanostructures. It is observed that metallic plasmonic nanostructures can be integrated with graphene photodetectors to greatly enhance the photocurrent and external quantum efficiency by up to 1,500%. Plasmonic nanostructures of variable resonance frequencies selectively amplify the photoresponse of graphene to light of different wavelengths, enabling highly specific detection of multicolours. Then I will show a new design of highly flexible vertical TFTs (VTFTs) with superior electrical

  15. High-frequency self-aligned graphene transistors with transferred gate stacks

    Science.gov (United States)

    Cheng, Rui; Bai, Jingwei; Liao, Lei; Zhou, Hailong; Chen, Yu; Liu, Lixin; Lin, Yung-Chen; Jiang, Shan; Huang, Yu; Duan, Xiangfeng

    2012-01-01

    Graphene has attracted enormous attention for radio-frequency transistor applications because of its exceptional high carrier mobility, high carrier saturation velocity, and large critical current density. Herein we report a new approach for the scalable fabrication of high-performance graphene transistors with transferred gate stacks. Specifically, arrays of gate stacks are first patterned on a sacrificial substrate, and then transferred onto arbitrary substrates with graphene on top. A self-aligned process, enabled by the unique structure of the transferred gate stacks, is then used to position precisely the source and drain electrodes with minimized access resistance or parasitic capacitance. This process has therefore enabled scalable fabrication of self-aligned graphene transistors with unprecedented performance including a record-high cutoff frequency up to 427 GHz. Our study defines a unique pathway to large-scale fabrication of high-performance graphene transistors, and holds significant potential for future application of graphene-based devices in ultra–high-frequency circuits. PMID:22753503

  16. High-mobility pyrene-based semiconductor for organic thin-film transistors.

    Science.gov (United States)

    Cho, Hyunduck; Lee, Sunyoung; Cho, Nam Sung; Jabbour, Ghassan E; Kwak, Jeonghun; Hwang, Do-Hoon; Lee, Changhee

    2013-05-01

    Numerous conjugated oligoacenes and polythiophenes are being heavily studied in the search for high-mobility organic semiconductors. Although many researchers have designed fused aromatic compounds as organic semiconductors for organic thin-film transistors (OTFTs), pyrene-based organic semiconductors with high mobilities and on-off current ratios have not yet been reported. Here, we introduce a new pyrene-based p-type organic semiconductor showing liquid crystal behavior. The thin film characteristics of this material are investigated by varying the substrate temperature during the deposition and the gate dielectric condition using the surface modification with a self-assembled monolayer, and systematically studied in correlation with the performances of transistor devices with this compound. OTFT fabricated under the optimum deposition conditions of this compound, namely, 1,6-bis(5'-octyl-2,2'-bithiophen-5-yl)pyrene (BOBTP) shows a high-performance transistor behavior with a field-effect mobility of 2.1 cm(2) V(-1) s(-1) and an on-off current ratio of 7.6 × 10(6) and enhanced long-term stability compared to the pentacene thin-film transistor.

  17. Analytical Model of Subthreshold Drain Current Characteristics of Ballistic Silicon Nanowire Transistors

    Directory of Open Access Journals (Sweden)

    Wanjie Xu

    2015-01-01

    Full Text Available A physically based subthreshold current model for silicon nanowire transistors working in the ballistic regime is developed. Based on the electric potential distribution obtained from a 2D Poisson equation and by performing some perturbation approximations for subband energy levels, an analytical model for the subthreshold drain current is obtained. The model is further used for predicting the subthreshold slopes and threshold voltages of the transistors. Our results agree well with TCAD simulation with different geometries and under different biasing conditions.

  18. Revisiting the role of trap-assisted-tunneling process on current-voltage characteristics in tunnel field-effect transistors

    Science.gov (United States)

    Omura, Yasuhisa; Mori, Yoshiaki; Sato, Shingo; Mallik, Abhijit

    2018-04-01

    This paper discusses the role of trap-assisted-tunneling process in controlling the ON- and OFF-state current levels and its impacts on the current-voltage characteristics of a tunnel field-effect transistor. Significant impacts of high-density traps in the source region are observed that are discussed in detail. With regard to recent studies on isoelectronic traps, it has been discovered that deep level density must be minimized to suppress the OFF-state leakage current, as is well known, whereas shallow levels can be utilized to control the ON-state current level. A possible mechanism is discussed based on simulation results.

  19. High sensitivity pH sensing on the BEOL of industrial FDSOI transistors

    Science.gov (United States)

    Rahhal, Lama; Ayele, Getenet Tesega; Monfray, Stéphane; Cloarec, Jean-Pierre; Fornacciari, Benjamin; Pardoux, Eric; Chevalier, Celine; Ecoffey, Serge; Drouin, Dominique; Morin, Pierre; Garnier, Philippe; Boeuf, Frederic; Souifi, Abdelkader

    2017-08-01

    In this work we demonstrate the use of Fully Depleted Silicon On Insulator (FDSOI) transistors as pH sensors with a 23 nm silicon nitride sensing layer built in the Back-End-Of-Line (BEOL). The back end process to deposit the sensing layer and fabricate the electrical structures needed for testing is detailed. A series of tests employing different pH buffer solutions has been performed on transistors of different geometries, controlled via the back gate. The main findings show a shift of the drain current (ID) as a function of the back gate voltage (VB) when different pH buffer solutions are probed in the range of pH 6 to pH 8. This shift is observed at VB voltages swept from 0 V to 3 V, demonstrating the sensor operation at low voltage. A high sensitivity of up to 250 mV/pH unit (more than 4-fold larger than Nernstian response) is observed on FDSOI MOS transistors of 0.06 μm gate length and 0.08 μm gate width. She is currently working as a Postdoctoral researcher at Institut des nanotechnologies de Lyon in collaboration with STMicroelectronics and Université de Sherbrook (Canada) working on ;Integration of ultra-low-power gas and pH sensors with advanced technologies;. Her research interest includes selection, machining, optimisation and electrical characterisation of the sensitive layer for a low power consumption gas sensor based on advanced MOS transistors.

  20. Kinase detection with gallium nitride based high electron mobility transistors.

    Science.gov (United States)

    Makowski, Matthew S; Bryan, Isaac; Sitar, Zlatko; Arellano, Consuelo; Xie, Jinqiao; Collazo, Ramon; Ivanisevic, Albena

    2013-07-01

    A label-free kinase detection system was fabricated by the adsorption of gold nanoparticles functionalized with kinase inhibitor onto AlGaN/GaN high electron mobility transistors (HEMTs). The HEMTs were operated near threshold voltage due to the greatest sensitivity in this operational region. The Au NP/HEMT biosensor system electrically detected 1 pM SRC kinase in ionic solutions. These results are pertinent to drug development applications associated with kinase sensing.

  1. High reliability EPI-base radiation hardened power transistor

    International Nuclear Information System (INIS)

    Clark, L.E.; Saltich, J.L.

    1978-01-01

    A high-voltage power transistor is described which is able to withstand fluences as high as 3 x 10 14 neutrons per square centimeter and still be able to operate satisfactorily. The collector may be made essentially half as thick and twice as heavily doped as normally and its base is made in two regions which together are essentially four times as thick as the normal power transistor base region. The base region has a heavily doped upper region and a lower region intermediate the upper heavily doped region and the collector. The doping in the intermediate region is as close to intrinsic as possible, in any event less than about 3 x 10 15 impurities per cubic centimeter. The second base region has small width in comparison to the first base region, the ratio of the first to the second being at least about 5 to 1. The base region having the upper heavily doped region and the intermediate or lower low doped region contributes to the higher breakdown voltage which the transistor is able to withstand. The high doping of the collector region essentially lowers that portion of the breakdown voltage achieved by the collector region. Accordingly, it is necessary to transfer certain of this breakdown capability to the base region and this is achieved by using the upper region of heavily doped and an intermediate or lower region of low doping

  2. Irradiation of graphene field effect transistors with highly charged ions

    Energy Technology Data Exchange (ETDEWEB)

    Ernst, P.; Kozubek, R.; Madauß, L.; Sonntag, J.; Lorke, A.; Schleberger, M., E-mail: marika.schleberger@uni-due.de

    2016-09-01

    In this work, graphene field-effect transistors are used to detect defects due to irradiation with slow, highly charged ions. In order to avoid contamination effects, a dedicated ultra-high vacuum set up has been designed and installed for the in situ cleaning and electrical characterization of graphene field-effect transistors during irradiation. To investigate the electrical and structural modifications of irradiated graphene field-effect transistors, their transfer characteristics as well as the corresponding Raman spectra are analyzed as a function of ion fluence for two different charge states. The irradiation experiments show a decreasing mobility with increasing fluences. The mobility reduction scales with the potential energy of the ions. In comparison to Raman spectroscopy, the transport properties of graphene show an extremely high sensitivity with respect to ion irradiation: a significant drop of the mobility is observed already at fluences below 15 ions/μm{sup 2}, which is more than one order of magnitude lower than what is required for Raman spectroscopy.

  3. Low Noise Bias Current/Voltage References Based on Floating-Gate MOS Transistors

    DEFF Research Database (Denmark)

    Igor, Mucha

    1997-01-01

    The exploitation of floating-gate MOS transistors as reference current and voltage sources is investigated. Test structures of common source and common drain floating-gate devices have been implemented in a commercially available 0.8 micron double-poly CMOS process. The measurements performed...

  4. Enhanced plasma wave detection of terahertz radiation using multiple high electron-mobility transistors connected in series

    KAUST Repository

    Elkhatib, Tamer A.; Kachorovskiǐ, Valentin Yu; Stillman, William J.; Veksler, Dmitry B.; Salama, Khaled N.; Zhang, Xicheng; Shur, Michael S.

    2010-01-01

    We report on enhanced room-temperature detection of terahertz radiation by several connected field-effect transistors. For this enhanced nonresonant detection, we have designed, fabricated, and tested plasmonic structures consisting of multiple InGaAs/GaAs pseudomorphic high electron-mobility transistors connected in series. Results show a 1.63-THz response that is directly proportional to the number of detecting transistors biased by a direct drain current at the same gate-to-source bias voltages. The responsivity in the saturation regime was found to be 170 V/W with the noise equivalent power in the range of 10-7 W/Hz0.5. The experimental data are in agreement with the detection mechanism based on the rectification of overdamped plasma waves excited by terahertz radiation in the transistor channel. © 2010 IEEE.

  5. Enhanced plasma wave detection of terahertz radiation using multiple high electron-mobility transistors connected in series

    KAUST Repository

    Elkhatib, Tamer A.

    2010-02-01

    We report on enhanced room-temperature detection of terahertz radiation by several connected field-effect transistors. For this enhanced nonresonant detection, we have designed, fabricated, and tested plasmonic structures consisting of multiple InGaAs/GaAs pseudomorphic high electron-mobility transistors connected in series. Results show a 1.63-THz response that is directly proportional to the number of detecting transistors biased by a direct drain current at the same gate-to-source bias voltages. The responsivity in the saturation regime was found to be 170 V/W with the noise equivalent power in the range of 10-7 W/Hz0.5. The experimental data are in agreement with the detection mechanism based on the rectification of overdamped plasma waves excited by terahertz radiation in the transistor channel. © 2010 IEEE.

  6. Few-layer SnSe{sub 2} transistors with high on/off ratios

    Energy Technology Data Exchange (ETDEWEB)

    Pei, Tengfei; Bao, Lihong, E-mail: lhbao@iphy.ac.cn; Wang, Guocai; Ma, Ruisong; Yang, Haifang; Li, Junjie; Gu, Changzhi; Du, Shixuan; Gao, Hong-jun [Institute of Physics, Chinese Academy of Sciences, P. O. Box 603, Beijing 100190 (China); Pantelides, Sokrates [Department of Physics and Astronomy, Vanderbilt University, Nashville, Tennessee 37235 (United States); Material Science and Technology Division, Oak Ridge National Laboratory, Oak Ridge, Tennessee 37381 (United States)

    2016-02-01

    We report few-layer SnSe{sub 2} field effect transistors (FETs) with high current on/off ratios. By trying different gate configurations, 300 nm SiO{sub 2} and 70 nm HfO{sub 2} as back gate only and 70 nm HfO{sub 2} as back gate combined with a top capping layer of polymer electrolyte, few-layer SnSe{sub 2} FET with a current on/off ratio of 10{sup 4} can be obtained. This provides a reliable solution for electrically modulating quasi-two-dimensional materials with high electron density (over 10{sup 13} cm{sup −2}) for field-effect transistor applications.

  7. Radio Frequency Transistors Using Aligned Semiconducting Carbon Nanotubes with Current-Gain Cutoff Frequency and Maximum Oscillation Frequency Simultaneously Greater than 70 GHz.

    Science.gov (United States)

    Cao, Yu; Brady, Gerald J; Gui, Hui; Rutherglen, Chris; Arnold, Michael S; Zhou, Chongwu

    2016-07-26

    In this paper, we report record radio frequency (RF) performance of carbon nanotube transistors based on combined use of a self-aligned T-shape gate structure, and well-aligned, high-semiconducting-purity, high-density polyfluorene-sorted semiconducting carbon nanotubes, which were deposited using dose-controlled, floating evaporative self-assembly method. These transistors show outstanding direct current (DC) performance with on-current density of 350 μA/μm, transconductance as high as 310 μS/μm, and superior current saturation with normalized output resistance greater than 100 kΩ·μm. These transistors create a record as carbon nanotube RF transistors that demonstrate both the current-gain cutoff frequency (ft) and the maximum oscillation frequency (fmax) greater than 70 GHz. Furthermore, these transistors exhibit good linearity performance with 1 dB gain compression point (P1dB) of 14 dBm and input third-order intercept point (IIP3) of 22 dBm. Our study advances state-of-the-art of carbon nanotube RF electronics, which have the potential to be made flexible and may find broad applications for signal amplification, wireless communication, and wearable/flexible electronics.

  8. High current high accuracy IGBT pulse generator

    International Nuclear Information System (INIS)

    Nesterov, V.V.; Donaldson, A.R.

    1995-05-01

    A solid state pulse generator capable of delivering high current triangular or trapezoidal pulses into an inductive load has been developed at SLAC. Energy stored in a capacitor bank of the pulse generator is switched to the load through a pair of insulated gate bipolar transistors (IGBT). The circuit can then recover the remaining energy and transfer it back to the capacitor bank without reversing the capacitor voltage. A third IGBT device is employed to control the initial charge to the capacitor bank, a command charging technique, and to compensate for pulse to pulse power losses. The rack mounted pulse generator contains a 525 μF capacitor bank. It can deliver 500 A at 900V into inductive loads up to 3 mH. The current amplitude and discharge time are controlled to 0.02% accuracy by a precision controller through the SLAC central computer system. This pulse generator drives a series pair of extraction dipoles

  9. Organic transistors with high thermal stability for medical applications.

    Science.gov (United States)

    Kuribara, Kazunori; Wang, He; Uchiyama, Naoya; Fukuda, Kenjiro; Yokota, Tomoyuki; Zschieschang, Ute; Jaye, Cherno; Fischer, Daniel; Klauk, Hagen; Yamamoto, Tatsuya; Takimiya, Kazuo; Ikeda, Masaaki; Kuwabara, Hirokazu; Sekitani, Tsuyoshi; Loo, Yueh-Lin; Someya, Takao

    2012-03-06

    The excellent mechanical flexibility of organic electronic devices is expected to open up a range of new application opportunities in electronics, such as flexible displays, robotic sensors, and biological and medical electronic applications. However, one of the major remaining issues for organic devices is their instability, especially their thermal instability, because low melting temperatures and large thermal expansion coefficients of organic materials cause thermal degradation. Here we demonstrate the fabrication of flexible thin-film transistors with excellent thermal stability and their viability for biomedical sterilization processes. The organic thin-film transistors comprise a high-mobility organic semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene, and thin gate dielectrics comprising a 2-nm-thick self-assembled monolayer and a 4-nm-thick aluminium oxide layer. The transistors exhibit a mobility of 1.2 cm(2) V(-1)s(-1) within a 2 V operation and are stable even after exposure to conditions typically used for medical sterilization.

  10. High temperature study of flexible silicon-on-insulator fin field-effect transistors

    KAUST Repository

    Diab, Amer El Hajj

    2014-09-29

    We report high temperature electrical transport characteristics of a flexible version of the semiconductor industry\\'s most advanced architecture: fin field-effect transistor on silicon-on-insulator with sub-20 nm fins and high-κ/metal gate stacks. Characterization from room to high temperature (150 °C) was completed to determine temperature dependence of drain current (Ids), gate leakage current (Igs), transconductance (gm), and extracted low-field mobility (μ0). Mobility degradation with temperature is mainly caused by phonon scattering. The other device characteristics show insignificant difference at high temperature which proves the suitability of inorganic flexible electronics with advanced device architecture.

  11. Accurate characterization of organic thin film transistors in the presence of gate leakage current

    Directory of Open Access Journals (Sweden)

    Vinay K. Singh

    2011-12-01

    Full Text Available The presence of gate leakage through polymer dielectric in organic thin film transistors (OTFT prevents accurate estimation of transistor characteristics especially in subthreshold regime. To mitigate the impact of gate leakage on transfer characteristics and allow accurate estimation of mobility, subthreshold slope and on/off current ratio, a measurement technique involving simultaneous sweep of both gate and drain voltages is proposed. Two dimensional numerical device simulation is used to illustrate the validity of the proposed technique. Experimental results obtained with Pentacene/PMMA OTFT with significant gate leakage show a low on/off current ratio of ∼ 102 and subthreshold is 10 V/decade obtained using conventional measurement technique. The proposed technique reveals that channel on/off current ratio is more than two orders of magnitude higher at ∼104 and subthreshold slope is 4.5 V/decade.

  12. Microwave annealing effect for highly reliable biosensor: dual-gate ion-sensitive field-effect transistor using amorphous InGaZnO thin-film transistor.

    Science.gov (United States)

    Lee, In-Kyu; Lee, Kwan Hyi; Lee, Seok; Cho, Won-Ju

    2014-12-24

    We used a microwave annealing process to fabricate a highly reliable biosensor using amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs), which usually experience threshold voltage instability. Compared with furnace-annealed a-IGZO TFTs, the microwave-annealed devices showed superior threshold voltage stability and performance, including a high field-effect mobility of 9.51 cm(2)/V·s, a low threshold voltage of 0.99 V, a good subthreshold slope of 135 mV/dec, and an outstanding on/off current ratio of 1.18 × 10(8). In conclusion, by using the microwave-annealed a-IGZO TFT as the transducer in an extended-gate ion-sensitive field-effect transistor biosensor, we developed a high-performance biosensor with excellent sensing properties in terms of pH sensitivity, reliability, and chemical stability.

  13. Carbon nanotube transistor based high-frequency electronics

    Science.gov (United States)

    Schroter, Michael

    At the nanoscale carbon nanotubes (CNTs) have higher carrier mobility and carrier velocity than most incumbent semiconductors. Thus CNT based field-effect transistors (FETs) are being considered as strong candidates for replacing existing MOSFETs in digital applications. In addition, the predicted high intrinsic transit frequency and the more recent finding of ways to achieve highly linear transfer characteristics have inspired investigations on analog high-frequency (HF) applications. High linearity is extremely valuable for an energy efficient usage of the frequency spectrum, particularly in mobile communications. Compared to digital applications, the much more relaxed constraints for CNT placement and lithography combined with already achieved operating frequencies of at least 10 GHz for fabricated devices make an early entry in the low GHz HF market more feasible than in large-scale digital circuits. Such a market entry would be extremely beneficial for funding the development of production CNTFET based process technology. This talk will provide an overview on the present status and feasibility of HF CNTFET technology will be given from an engineering point of view, including device modeling, experimental results, and existing roadblocks. Carbon nanotube transistor based high-frequency electronics.

  14. Removing the current-limit of vertical organic field effect transistors

    Science.gov (United States)

    Sheleg, Gil; Greenman, Michael; Lussem, Bjorn; Tessler, Nir

    2017-11-01

    The reported Vertical Organic Field Effect Transistors (VOFETs) show either superior current and switching speeds or well-behaved transistor performance, especially saturation in the output characteristics. Through the study of the relationship between the device architecture or dimensions and the device performance, we find that achieving a saturation regime in the output characteristics requires that the device operates in the injection limited regime. In current structures, the existence of the injection limited regime depends on the source's injection barrier as well as on the buried semiconductor layer thickness. To overcome the injection limit imposed by the necessity of injection barrier, we suggest a new architecture to realize VOFETs. This architecture shows better gate control and is independent of the injection barrier at the source, thus allowing for several A cm-2 for a semiconductor having a mobility value of 0.1 cm2 V-1 s-1.

  15. Current Enhancement with Contact-Area-Limited Doping for Bottom-Gate, Bottom-Contact Organic Thin-Film Transistors

    Science.gov (United States)

    Noda, Kei; Wakatsuki, Yusuke; Yamagishi, Yuji; Wada, Yasuo; Toyabe, Toru; Matsushige, Kazumi

    2013-02-01

    The current enhancement mechanism in contact-area-limited doping for bottom-gate, bottom-contact (BGBC) p-channel organic thin-film transistors (OTFTs) was investigated both by simulation and experiment. Simulation results suggest that carrier shortage and large potential drop occur in the source-electrode/channel interface region in a conventional BGBC OTFT during operation, which results in a decrease in the effective field-effect mobility. These phenomena are attributed to the low carrier concentration of active semiconductor layers in OTFTs and can be alleviated by contact-area-limited doping, where highly doped layers are prepared over source-drain electrodes. According to two-dimensional current distribution obtained from the device simulation, a current flow from the source electrode to the channel region via highly doped layers is generated in addition to the direct carrier injection from the source electrode to the channel, leading to the enhancement of the drain current and effective field-effect mobility. The expected current enhancement mechanism in contact-area-limited doping was experimentally confirmed in typical α-sexithiophene (α-6T) BGBC thin-film transistors.

  16. Quasi-ballistic carbon nanotube array transistors with current density exceeding Si and GaAs

    Science.gov (United States)

    Brady, Gerald J.; Way, Austin J.; Safron, Nathaniel S.; Evensen, Harold T.; Gopalan, Padma; Arnold, Michael S.

    2016-01-01

    Carbon nanotubes (CNTs) are tantalizing candidates for semiconductor electronics because of their exceptional charge transport properties and one-dimensional electrostatics. Ballistic transport approaching the quantum conductance limit of 2G0 = 4e2/h has been achieved in field-effect transistors (FETs) containing one CNT. However, constraints in CNT sorting, processing, alignment, and contacts give rise to nonidealities when CNTs are implemented in densely packed parallel arrays such as those needed for technology, resulting in a conductance per CNT far from 2G0. The consequence has been that, whereas CNTs are ultimately expected to yield FETs that are more conductive than conventional semiconductors, CNTs, instead, have underperformed channel materials, such as Si, by sixfold or more. We report quasi-ballistic CNT array FETs at a density of 47 CNTs μm−1, fabricated through a combination of CNT purification, solution-based assembly, and CNT treatment. The conductance is as high as 0.46 G0 per CNT. In parallel, the conductance of the arrays reaches 1.7 mS μm−1, which is seven times higher than the previous state-of-the-art CNT array FETs made by other methods. The saturated on-state current density is as high as 900 μA μm−1 and is similar to or exceeds that of Si FETs when compared at and equivalent gate oxide thickness and at the same off-state current density. The on-state current density exceeds that of GaAs FETs as well. This breakthrough in CNT array performance is a critical advance toward the exploitation of CNTs in logic, high-speed communications, and other semiconductor electronics technologies. PMID:27617293

  17. Negative Offset Operation of Four-Transistor CMOS Image Pixels for Increased Well Capacity and Suppressed Dark Current

    OpenAIRE

    Mheen, B.; Song, Y.J.; Theuwissen, J.P.

    2008-01-01

    This letter presents an electrical method to reduce dark current as well as increase well capacity of four-transistor pixels in a CMOS image sensor, utilizing a small negative offset voltage to the gate of the transfer (TX) transistor particularly only when the TX transistor is off. As a result, using a commercial pixel in a 0.18 ?m CMOS process, the voltage drop due to dark current of the pinned photodiode (PPD) is reduced by 6.1 dB and the well capacity is enhanced by 4.4 dB, which is attri...

  18. A built-in current sensor using thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Hatzopoulos, A A [Department of Electrical and Computer Eng., Electronics Lab., Aristotle University of Thessaloniki, 54124 Thessaloniki (Greece); Siskos, S [Department of Physics, Electronics Lab., Aristotle University of Thessaloniki, 54124 Thessaloniki (Greece); Dimitriadis, C A [Department of Physics, Microelectronic device characterization and design Lab., Aristotle University of Thessaloniki, 54124 Thessaloniki (Greece); Papadopoulos, N [Department of Electrical and Computer Eng., Electronics Lab., Aristotle University of Thessaloniki, 54124 Thessaloniki (Greece); Pappas, I [Department of Physics, Electronics Lab., Aristotle University of Thessaloniki, 54124 Thessaloniki (Greece); Nalpantidis, L [Department of Physics, Electronics Lab., Aristotle University of Thessaloniki, 54124 Thessaloniki (Greece)

    2005-01-01

    A simple current mirror using TFTs with input terminals which are capacitively coupled to the TFT gate, is used in this work, to design a built-in current sensor (BICS). The important feature in this application is that the voltage drop across the sensing TFT device can be reduced to almost zero value, while preserving transistor operation in the saturation region. This makes the proposed BICS appropriate for TFT applications without affecting the circuit operation. It also results in adequate linearity for the current monitoring, making the structure applicable to digital as well as to analog and mixed-signal circuit testing.

  19. Silicon heterojunction transistor

    International Nuclear Information System (INIS)

    Matsushita, T.; Oh-uchi, N.; Hayashi, H.; Yamoto, H.

    1979-01-01

    SIPOS (Semi-insulating polycrystalline silicon) which is used as a surface passivation layer for highly reliable silicon devices constitutes a good heterojunction for silicon. P- or B-doped SIPOS has been used as the emitter material of a heterojunction transistor with the base and collector of silicon. An npn SIPOS-Si heterojunction transistor showing 50 times the current gain of an npn silicon homojunction transistor has been realized by high-temperature treatments in nitrogen and low-temperature annealing in hydrogen or forming gas

  20. Field-Effect Transistors Based on Networks of Highly Aligned, Chemically Synthesized N = 7 Armchair Graphene Nanoribbons.

    Science.gov (United States)

    Passi, Vikram; Gahoi, Amit; Senkovskiy, Boris V; Haberer, Danny; Fischer, Felix R; Grüneis, Alexander; Lemme, Max C

    2018-03-28

    We report on the experimental demonstration and electrical characterization of N = 7 armchair graphene nanoribbon (7-AGNR) field effect transistors. The back-gated transistors are fabricated from atomically precise and highly aligned 7-AGNRs, synthesized with a bottom-up approach. The large area transfer process holds the promise of scalable device fabrication with atomically precise nanoribbons. The channels of the FETs are approximately 30 times longer than the average nanoribbon length of 30 nm to 40 nm. The density of the GNRs is high, so that transport can be assumed well-above the percolation threshold. The long channel transistors exhibit a maximum I ON / I OFF current ratio of 87.5.

  1. Gallium nitride based transistors for high-efficiency microwave switch-mode amplifiers

    Energy Technology Data Exchange (ETDEWEB)

    Maroldt, Stephan

    2012-07-01

    circuit efficiency of >80% were achieved for an operation at 0.45 GHz when adjusting the transistor size for lower operation frequencies. A further decisive improvement of speed and circuit complexity was found by the implementation of enhancement-mode GaN transistors based on a high-transconductance gate-recess technology. Transistors with a threshold voltage of +1 V were demonstrated with a high current drive capability and a maximum transconductance of up to 600 mS/mm. Their reduced input voltage swing tremendously increases the compatibility of digital power amplifier circuits based on GaN and external digital driver and modulator circuits based on silicon technology. Moreover, an innovative development, the series-diode GaN transistor, replaces an off-chip hybrid diode in the class-S amplifier with an integrated solution. It reduces parasitic switching losses and improves the total amplifier properties in terms of operation frequency, efficiency, and circuit complexity. A differential switch-mode core chip featuring series-diode transistors and additional onchip filter elements enabled our partner EADS to realize the first class-S amplifier at 2 GHz worldwide in a module.

  2. Analysis of Co-Tunneling Current in Fullerene Single-Electron Transistor

    Science.gov (United States)

    KhademHosseini, Vahideh; Dideban, Daryoosh; Ahmadi, MohammadTaghi; Ismail, Razali

    2018-05-01

    Single-electron transistors (SETs) are nano devices which can be used in low-power electronic systems. They operate based on coulomb blockade effect. This phenomenon controls single-electron tunneling and it switches the current in SET. On the other hand, co-tunneling process increases leakage current, so it reduces main current and reliability of SET. Due to co-tunneling phenomenon, main characteristics of fullerene SET with multiple islands are modelled in this research. Its performance is compared with silicon SET and consequently, research result reports that fullerene SET has lower leakage current and higher reliability than silicon counterpart. Based on the presented model, lower co-tunneling current is achieved by selection of fullerene as SET island material which leads to smaller value of the leakage current. Moreover, island length and the number of islands can affect on co-tunneling and then they tune the current flow in SET.

  3. Impurity Deionization Effects on Surface Recombination DC Current-Voltage Characteristics in MOS Transistors

    International Nuclear Information System (INIS)

    Chen Zuhui; Jie Binbin; Sah Chihtang

    2010-01-01

    Impurity deionization on the direct-current current-voltage characteristics from electron-hole recombination (R-DCIV) at SiO 2 /Si interface traps in MOS transistors is analyzed using the steady-state Shockley-Read-Hall recombination kinetics and the Fermi distributions for electrons and holes. Insignificant distortion is observed over 90% of the bell-shaped R-DCIV curves centered at their peaks when impurity deionization is excluded in the theory. This is due to negligible impurity deionization because of the much lower electron and hole concentrations at the interface than the impurity concentration in the 90% range. (invited papers)

  4. Current transport modeling and experimental study of THz room temperature ballistic deflection transistors

    Energy Technology Data Exchange (ETDEWEB)

    Kaushal, Vikas; Margala, Martin [Department of Electrical and Computer Engineering, University of Massachusetts Lowell, MA, 01854 (United States); Yu Qiaoyan; Ampadu, Paul; Guarino, Gregg; Sobolewski, Roman, E-mail: vikas_kaushal@student.uml.ed [Department of Electrical and Computer Engineering, University of Rochester, NY, 14627 (United States)

    2009-11-15

    In this paper, two different theoretical models, Comsol Multiphysics{sup TM} (a Finite Element Analysis tool), and a field solver Atlas/Blaze from Silvaco, are compared qualitatively to study the effect of the deflector position, its size and electric field on the charge transport and its distribution along the channel, resulting in current outputs and leakages in ballistic deflection transistors (BDT). Silvaco simulations and experimental results were then used to study the lateral charge transport as a result of variation in electric field distribution, which controls the charge current along the channel in BDT. The electric field dependence of gain is also studied with experimental and theoretical results.

  5. Current transport modeling and experimental study of THz room temperature ballistic deflection transistors

    International Nuclear Information System (INIS)

    Kaushal, Vikas; Margala, Martin; Yu Qiaoyan; Ampadu, Paul; Guarino, Gregg; Sobolewski, Roman

    2009-01-01

    In this paper, two different theoretical models, Comsol Multiphysics TM (a Finite Element Analysis tool), and a field solver Atlas/Blaze from Silvaco, are compared qualitatively to study the effect of the deflector position, its size and electric field on the charge transport and its distribution along the channel, resulting in current outputs and leakages in ballistic deflection transistors (BDT). Silvaco simulations and experimental results were then used to study the lateral charge transport as a result of variation in electric field distribution, which controls the charge current along the channel in BDT. The electric field dependence of gain is also studied with experimental and theoretical results.

  6. Enhancement of tunneling current in phosphorene tunnel field effect transistors by surface defects.

    Science.gov (United States)

    Lu, Juan; Fan, Zhi-Qiang; Gong, Jian; Chen, Jie-Zhi; ManduLa, Huhe; Zhang, Yan-Yang; Yang, Shen-Yuan; Jiang, Xiang-Wei

    2018-02-21

    The effects of the staggered double vacancies, hydrogen (H), 3d transition metals, for example cobalt, and semiconductor covalent atoms, for example, germanium, nitrogen, phosphorus (P) and silicon adsorption on the transport properties of monolayer phosphorene were studied using density functional theory and non-equilibrium Green's function formalism. It was observed that the performance of the phosphorene tunnel field effect transistors (TFETs) with an 8.8 nm scaling channel length could be improved most effectively, if the adatoms or vacancies were introduced at the source channel interface. For H and P doped devices, the upper limit of on-state currents of phosphorene TFETs were able to be quickly increased to 2465 μA μm -1 and 1652 μA μm -1 , respectively, which not only outperformed the pristine sample, but also met the requirements for high performance logic applications for the next decade in the International Technology Roadmap for Semiconductors (ITRS). It was proved that the defect-induced band gap states make the effective tunneling path between the conduction band (CB) and valence band (VB) much shorter, so that the carriers can be injected easily from the left electrode, then transfer to the channel. In this regard, the tunneling properties of phosphorene TFETs can be manipulated using surface defects. In addition, the effects of spin polarization on the transport properties of doped phosphorene TFETs were also rigorously considered, H and P doped TFETs could achieve a high ON current of 1795 μA μm -1 and 1368 μA μm -1 , respectively, which is closer to realistic nanodevices.

  7. Superconducting transistor

    International Nuclear Information System (INIS)

    Gray, K.E.

    1978-01-01

    A three film superconducting tunneling device, analogous to a semiconductor transistor, is presented, including a theoretical description and experimental results showing a current gain of four. Much larger current gains are shown to be feasible. Such a development is particularly interesting because of its novelty and the striking analogies with the semiconductor junction transistor

  8. Strain-effect transistors: Theoretical study on the effects of external strain on III-nitride high-electron-mobility transistors on flexible substrates

    Energy Technology Data Exchange (ETDEWEB)

    Shervin, Shahab; Asadirad, Mojtaba [Department of Mechanical Engineering, University of Houston, Houston, Texas 77204-4006 (United States); Materials Science and Engineering Program, University of Houston, Houston, Texas 77204 (United States); Kim, Seung-Hwan; Ravipati, Srikanth; Lee, Keon-Hwa [Department of Mechanical Engineering, University of Houston, Houston, Texas 77204-4006 (United States); Bulashevich, Kirill [STR Group, Inc., Engels av. 27, P.O. Box 89, 194156, St. Petersburg (Russian Federation); Ryou, Jae-Hyun, E-mail: jryou@uh.edu [Department of Mechanical Engineering, University of Houston, Houston, Texas 77204-4006 (United States); Materials Science and Engineering Program, University of Houston, Houston, Texas 77204 (United States); Texas Center for Superconductivity at the University of Houston (TcSUH), University of Houston, Houston, Texas 77204 (United States)

    2015-11-09

    This paper presents strain-effect transistors (SETs) based on flexible III-nitride high-electron-mobility transistors (HEMTs) through theoretical calculations. We show that the electronic band structures of InAlGaN/GaN thin-film heterostructures on flexible substrates can be modified by external bending with a high degree of freedom using polarization properties of the polar semiconductor materials. Transfer characteristics of the HEMT devices, including threshold voltage and transconductance, are controlled by varied external strain. Equilibrium 2-dimensional electron gas (2DEG) is enhanced with applied tensile strain by bending the flexible structure with the concave-side down (bend-down condition). 2DEG density is reduced and eventually depleted with increasing compressive strain in bend-up conditions. The operation mode of different HEMT structures changes from depletion- to enchantment-mode or vice versa depending on the type and magnitude of external strain. The results suggest that the operation modes and transfer characteristics of HEMTs can be engineered with an optimum external bending strain applied in the device structure, which is expected to be beneficial for both radio frequency and switching applications. In addition, we show that drain currents of transistors based on flexible InAlGaN/GaN can be modulated only by external strain without applying electric field in the gate. The channel conductivity modulation that is obtained by only external strain proposes an extended functional device, gate-free SETs, which can be used in electro-mechanical applications.

  9. Unijunction transistors

    International Nuclear Information System (INIS)

    1981-01-01

    The electrical characteristics of unijunction transistors can be modified by irradiation with electron beams in excess of 400 KeV and at a dose rate of 10 13 to 10 16 e/cm 2 . Examples are given of the effect of exposing the emitter-base junctions of transistors to such lattice defect causing radiation for a time sufficient to change the valley current of the transistor. (U.K.)

  10. Vertical organic transistors.

    Science.gov (United States)

    Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl

    2015-11-11

    Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted.

  11. Very High Frequency Two-Port Characterization of Transistors

    DEFF Research Database (Denmark)

    Hertel, Jens Christian; Nour, Yasser; Jørgensen, Ivan Harald Holger

    To properly use transistors in VHF converters, they need to be characterized under similar conditions. This research presents a two-port method, using a network analyzer (NWA) with a S-port setup. The method is a one-shot method, providing fast results of the off-state parasitics of the transistors....

  12. Highly stable thin film transistors using multilayer channel structure

    KAUST Repository

    Nayak, Pradipta K.

    2015-03-09

    We report highly stable gate-bias stress performance of thin film transistors (TFTs) using zinc oxide (ZnO)/hafnium oxide (HfO2) multilayer structure as the channel layer. Positive and negative gate-bias stress stability of the TFTs was measured at room temperature and at 60°C. A tremendous improvement in gate-bias stress stability was obtained in case of the TFT with multiple layers of ZnO embedded between HfO2 layers compared to the TFT with a single layer of ZnO as the semiconductor. The ultra-thin HfO2 layers act as passivation layers, which prevent the adsorption of oxygen and water molecules in the ZnO layer and hence significantly improve the gate-bias stress stability of ZnO TFTs.

  13. Base profile design for high-performance operation of bipolar transistors at liquid-nitrogen temperature

    International Nuclear Information System (INIS)

    Stork, J.M.C.; Harame, D.L.; Meyerson, B.S.; Nguyen, T.N.

    1989-01-01

    The base profile requirements of Si bipolar junction transistors (BJT's) high-performance operation at liquid-nitrogen temperature are examined. Measurements of thin epitaxial-base polysilicon-emitter n-p-n transistors with increasing base doping show the effects of bandgap narrowing, mobility changes, and carrier freezeout. At room temperature the collector current at low injection is proportional to the integrated base charge, independent of the impurity distribution. At temperatures below 150 Κ, however, minority injection is dominated by the peak base doping because of the greater effectiveness of bandgap narrowing. When the peak doping in the base approaches 10 19 cm -3 , the bandgap difference between emitter and base is sufficiently small that the current gain no longer monotonically decreases with lower temperature but instead shows a maximum as low as 180 Κ. The device design window appears limited at the low-current end by increased base-emitter leakage due to tunneling and by resistance control at the high-current end. Using the measured dc characteristics, circuit delay calculations are made to estimate the performance of an ECL ring oscillator at room and liquid-nitrogen temperatures. It is shown that if the base doping can be raised to 10 19 cm -3 while keeping the base thickness constant, the minimum delay at liquid nitrogen can approach the delay of optimized devices at room temperature

  14. Improving the Stability of High-Performance Multilayer MoS2 Field-Effect Transistors.

    Science.gov (United States)

    Liu, Na; Baek, Jongyeol; Kim, Seung Min; Hong, Seongin; Hong, Young Ki; Kim, Yang Soo; Kim, Hyun-Suk; Kim, Sunkook; Park, Jozeph

    2017-12-13

    In this study, we propose a method for improving the stability of multilayer MoS 2 field-effect transistors (FETs) by O 2 plasma treatment and Al 2 O 3 passivation while sustaining the high performance of bulk MoS 2 FET. The MoS 2 FETs were exposed to O 2 plasma for 30 s before Al 2 O 3 encapsulation to achieve a relatively small hysteresis and high electrical performance. A MoO x layer formed during the plasma treatment was found between MoS 2 and the top passivation layer. The MoO x interlayer prevents the generation of excess electron carriers in the channel, owing to Al 2 O 3 passivation, thereby minimizing the shift in the threshold voltage (V th ) and increase of the off-current leakage. However, prolonged exposure of the MoS 2 surface to O 2 plasma (90 and 120 s) was found to introduce excess oxygen into the MoO x interlayer, leading to more pronounced hysteresis and a high off-current. The stable MoS 2 FETs were also subjected to gate-bias stress tests under different conditions. The MoS 2 transistors exhibited negligible decline in performance under positive bias stress, positive bias illumination stress, and negative bias stress, but large negative shifts in V th were observed under negative bias illumination stress, which is attributed to the presence of sulfur vacancies. This simple approach can be applied to other transition metal dichalcogenide materials to understand their FET properties and reliability, and the resulting high-performance hysteresis-free MoS 2 transistors are expected to open up new opportunities for the development of sophisticated electronic applications.

  15. High current ion sources

    International Nuclear Information System (INIS)

    Brown, I.G.

    1989-06-01

    The concept of high current ion source is both relative and evolutionary. Within the domain of one particular kind of ion source technology a current of microamperers might be 'high', while in another area a current of 10 Amperes could 'low'. Even within the domain of a single ion source type, what is considered high current performance today is routinely eclipsed by better performance and higher current output within a short period of time. Within their fields of application, there is a large number of kinds of ion sources that can justifiably be called high current. Thus, as a very limited example only, PIGs, Freemen sources, ECR sources, duoplasmatrons, field emission sources, and a great many more all have their high current variants. High current ion beams of gaseous and metallic species can be generated in a number of different ways. Ion sources of the kind developed at various laboratories around the world for the production of intense neutral beams for controlled fusion experiments are used to form large area proton deuteron beams of may tens of Amperes, and this technology can be used for other applications also. There has been significant progress in recent years in the use of microwave ion sources for high current ion beam generation, and this method is likely to find wide application in various different field application. Finally, high current beams of metal ions can be produced using metal vapor vacuum arc ion source technology. After a brief consideration of high current ion source design concepts, these three particular methods are reviewed in this paper

  16. Quantitative analysis of Josephson-quasiparticle current in superconducting single-electron transistors

    International Nuclear Information System (INIS)

    Nakamura, Y.; Chen, C.D.; Tsai, J.S.

    1996-01-01

    We have investigated Josephson-quasiparticle (JQP) current in superconducting single-electron transistors in which charging energy E C was larger than superconducting gap energy Δ and junction resistances were much larger than R Q ≡h/4e 2 . We found that not only the shapes of the JQP peaks but also their absolute height were reproduced quantitatively with a theory by Averin and Aleshkin using a Josephson energy of Ambegaokar-Baratoff close-quote s value. copyright 1996 The American Physical Society

  17. Large-current-controllable carbon nanotube field-effect transistor in electrolyte solution

    Science.gov (United States)

    Myodo, Miho; Inaba, Masafumi; Ohara, Kazuyoshi; Kato, Ryogo; Kobayashi, Mikinori; Hirano, Yu; Suzuki, Kazuma; Kawarada, Hiroshi

    2015-05-01

    Large-current-controllable carbon nanotube field-effect transistors (CNT-FETs) were fabricated with mm-long CNT sheets. The sheets, synthesized by remote-plasma-enhanced CVD, contained both single- and double-walled CNTs. Titanium was deposited on the sheet as source and drain electrodes, and an electrolyte solution was used as a gate electrode (solution gate) to apply a gate voltage to the CNTs through electric double layers formed around the CNTs. The drain current came to be well modulated as electrolyte solution penetrated into the sheets, and one of the solution gate CNT-FETs was able to control a large current of over 2.5 A. In addition, we determined the transconductance parameter per tube and compared it with values for other CNT-FETs. The potential of CNT sheets for applications requiring the control of large current is exhibited in this study.

  18. Analysis of transistor and snubber turn-off dynamics in high-frequency high-voltage high-power converters

    Science.gov (United States)

    Wilson, P. M.; Wilson, T. G.; Owen, H. A., Jr.

    Dc to dc converters which operate reliably and efficiently at switching frequencies high enough to effect substantial reductions in the size and weight of converter energy storage elements are studied. A two winding current or voltage stepup (buck boost) dc-to-dc converter power stage submodule designed to operate in the 2.5-kW range, with an input voltage range of 110 to 180 V dc, and an output voltage of 250 V dc is emphasized. In order to assess the limitations of present day component and circuit technologies, a design goal switching frequency of 10 kHz was maintained. The converter design requirements represent a unique combination of high frequency, high voltage, and high power operation. The turn off dynamics of the primary circuit power switching transistor and its associated turn off snubber circuitry are investigated.

  19. High PRF high current switch

    Science.gov (United States)

    Moran, Stuart L.; Hutcherson, R. Kenneth

    1990-03-27

    A triggerable, high voltage, high current, spark gap switch for use in pu power systems. The device comprises a pair of electrodes in a high pressure hydrogen environment that is triggered by introducing an arc between one electrode and a trigger pin. Unusually high repetition rates may be obtained by undervolting the switch, i.e., operating the trigger at voltages much below the self-breakdown voltage of the device.

  20. Dual-Gate p-GaN Gate High Electron Mobility Transistors for Steep Subthreshold Slope.

    Science.gov (United States)

    Bae, Jong-Ho; Lee, Jong-Ho

    2016-05-01

    A steep subthreshold slope characteristic is achieved through p-GaN gate HEMT with dual-gate structure. Obtained subthreshold slope is less than 120 μV/dec. Based on the measured and simulated data obtained from single-gate device, breakdown of parasitic floating-base bipolar transistor and floating gate charged with holes are responsible to increase abruptly in drain current. In the dual-gate device, on-current degrades with high temperature but subthreshold slope is not changed. To observe the switching speed of dual-gate device and transient response of drain current are measured. According to the transient responses of drain current, switching speed of the dual-gate device is about 10(-5) sec.

  1. Anomalous high photoconductivity in short channel indium-zinc-oxide photo-transistors

    International Nuclear Information System (INIS)

    Choi, Hyun-Sik; Jeon, Sanghun

    2015-01-01

    Upon light exposure, an indium-zinc-oxide (IZO) thin-film transistor (TFT) presents higher photoconductivity by several orders of magnitude at the negative gate bias region. Among various device geometrical factors, scaling down the channel length of the photo-transistor results in an anomalous increase in photoconductivity. To probe the origin of this high photoconductivity in short-channel device, we measured transient current, current–voltage, and capacitance–voltage characteristics of IZO–TFTs with various channel lengths and widths before and after illumination. Under the illumination, the equilibrium potential region which lies far from front interface exists only in short-channel devices, forming the un-depleted conducting back channel. This region plays an important role in carrier transport under the illumination, leading to high photoconductivity in short-channel devices. Photon exposure coupled with gate-modulated band bending for short-channel devices leads to the accumulation of V o ++ at the front channel and screening negative gate bias, thereby generating high current flow in the un-depleted back-channel region

  2. Radio frequency and linearity performance of transistors using high-purity semiconducting carbon nanotubes.

    Science.gov (United States)

    Wang, Chuan; Badmaev, Alexander; Jooyaie, Alborz; Bao, Mingqiang; Wang, Kang L; Galatsis, Kosmas; Zhou, Chongwu

    2011-05-24

    This paper reports the radio frequency (RF) and linearity performance of transistors using high-purity semiconducting carbon nanotubes. High-density, uniform semiconducting nanotube networks are deposited at wafer scale using our APTES-assisted nanotube deposition technique, and RF transistors with channel lengths down to 500 nm are fabricated. We report on transistors exhibiting a cutoff frequency (f(t)) of 5 GHz and with maximum oscillation frequency (f(max)) of 1.5 GHz. Besides the cutoff frequency, the other important figure of merit for the RF transistors is the device linearity. For the first time, we report carbon nanotube RF transistor linearity metrics up to 1 GHz. Without the use of active probes to provide the high impedance termination, the measurement bandwidth is therefore not limited, and the linearity measurements can be conducted at the frequencies where the transistors are intended to be operating. We conclude that semiconducting nanotube-based transistors are potentially promising building blocks for highly linear RF electronics and circuit applications.

  3. Cryogenic high current discharges

    International Nuclear Information System (INIS)

    Meierovich, B.E.

    1994-01-01

    Z-pinches formed from frozen deuterium fibers by a rapidly rising current have enhanced stability and high neutron yield. The efforts to understand the enhanced stability and neutron yield on the basis of classical picture of Bennett equilibrium of the current channel has not given satisfactory results. The traditional approach does not take into account the essential difference between the frozen deuterium fiber Z-pinches and the usual Z-pinches such as exploding wires or classical gas-puffed Z-pinches. The very low temperature of the fiber atoms (10 K), together with the rapidly rising current, result in the coexistence of a high current channel with unionized fiber atoms for a substantial period of time. This phenomena lasts during the risetime. This approach takes into account the difference of the breakdown in a dielectric deuterium fiber and the breakdown in a metallic wire. This difference is essential to the understanding of specific features of cryogenic high current discharges. Z-pinches in frozen deuterium fibers should be considered as a qualitatively new phenomenon on the boundary of cryogenic and high current physics. It is a start of a new branch in plasma physics: the physics of cryogenic high current discharges

  4. Fabrication of enhancement-mode AlGaN/GaN high electron mobility transistors using double plasma treatment

    Energy Technology Data Exchange (ETDEWEB)

    Lim, Jong-Won, E-mail: jwlim@etri.re.kr [Photonic/Wireless Convergence Components Dept., IT Materials and Components Lab., Electronics and Telecommunications Research Institute, Daejeon 305-700 (Korea, Republic of); Ahn, Ho-Kyun; Kim, Seong-il; Kang, Dong-Min; Lee, Jong-Min; Min, Byoung-Gue; Lee, Sang-Heung; Yoon, Hyung-Sup; Ju, Chull-Won; Kim, Haecheon; Mun, Jae-Kyoung; Nam, Eun-Soo [Photonic/Wireless Convergence Components Dept., IT Materials and Components Lab., Electronics and Telecommunications Research Institute, Daejeon 305-700 (Korea, Republic of); Park, Hyung-Moo [Photonic/Wireless Convergence Components Dept., IT Materials and Components Lab., Electronics and Telecommunications Research Institute, Daejeon 305-700 (Korea, Republic of); Division of Electronics and Electrical Engineering, Dongguk University, Seoul (Korea, Republic of)

    2013-11-29

    We report the fabrication and DC and microwave characteristics of 0.5 μm AlGaN/GaN high electron mobility transistors using double plasma treatment process. Silicon nitride layers 700 and 150 Å thick were deposited by plasma-enhanced chemical vapor deposition at 260 °C to protect the device and to define the gate footprint. The double plasma process was carried out by two different etching techniques to obtain enhancement-mode AlGaN/GaN high electron mobility transistors with 0.5 μm gate lengths. The enhancement-mode AlGaN/GaN high electron mobility transistor was prepared in parallel to the depletion-mode AlGaN/GaN high electron mobility transistor device on one wafer. Completed double plasma treated 0.5 μm AlGaN/GaN high electron mobility transistor devices fabricated by dry etching exhibited a peak transconductance, gm, of 330 mS/mm, a breakdown voltage of 115 V, a current-gain cutoff frequency (f{sub T}) of 18 GHz, and a maximum oscillation frequency (f{sub max}) of 66 GHz. - Highlights: • The double plasma process was carried out by two different etching techniques. • Double plasma treated device exhibited a transconductance of 330 mS/mm. • Completed 0.5 μm gate device exhibited a current-gain cutoff frequency of 18 GHz. • The off-state breakdown voltage of 115 V for 0.5 μm gate device was obtained. • Continuous-wave output power density of 4.3 W/mm was obtained at 2.4 GHz.

  5. Fabrication of enhancement-mode AlGaN/GaN high electron mobility transistors using double plasma treatment

    International Nuclear Information System (INIS)

    Lim, Jong-Won; Ahn, Ho-Kyun; Kim, Seong-il; Kang, Dong-Min; Lee, Jong-Min; Min, Byoung-Gue; Lee, Sang-Heung; Yoon, Hyung-Sup; Ju, Chull-Won; Kim, Haecheon; Mun, Jae-Kyoung; Nam, Eun-Soo; Park, Hyung-Moo

    2013-01-01

    We report the fabrication and DC and microwave characteristics of 0.5 μm AlGaN/GaN high electron mobility transistors using double plasma treatment process. Silicon nitride layers 700 and 150 Å thick were deposited by plasma-enhanced chemical vapor deposition at 260 °C to protect the device and to define the gate footprint. The double plasma process was carried out by two different etching techniques to obtain enhancement-mode AlGaN/GaN high electron mobility transistors with 0.5 μm gate lengths. The enhancement-mode AlGaN/GaN high electron mobility transistor was prepared in parallel to the depletion-mode AlGaN/GaN high electron mobility transistor device on one wafer. Completed double plasma treated 0.5 μm AlGaN/GaN high electron mobility transistor devices fabricated by dry etching exhibited a peak transconductance, gm, of 330 mS/mm, a breakdown voltage of 115 V, a current-gain cutoff frequency (f T ) of 18 GHz, and a maximum oscillation frequency (f max ) of 66 GHz. - Highlights: • The double plasma process was carried out by two different etching techniques. • Double plasma treated device exhibited a transconductance of 330 mS/mm. • Completed 0.5 μm gate device exhibited a current-gain cutoff frequency of 18 GHz. • The off-state breakdown voltage of 115 V for 0.5 μm gate device was obtained. • Continuous-wave output power density of 4.3 W/mm was obtained at 2.4 GHz

  6. Ultimate response time of high electron mobility transistors

    International Nuclear Information System (INIS)

    Rudin, Sergey; Rupper, Greg; Shur, Michael

    2015-01-01

    We present theoretical studies of the response time of the two-dimensional gated electron gas to femtosecond pulses. Our hydrodynamic simulations show that the device response to a short pulse or a step-function signal is either smooth or oscillating time-decay at low and high mobility, μ, values, respectively. At small gate voltage swings, U 0  = U g  − U th , where U g is the gate voltage and U th is the threshold voltage, such that μU 0 /L < v s , where L is the channel length and v s is the effective electron saturation velocity, the decay time in the low mobility samples is on the order of L 2 /(μU 0 ), in agreement with the analytical drift model. However, the decay is preceded by a delay time on the order of L/s, where s is the plasma wave velocity. This delay is the ballistic transport signature in collision-dominated devices, which becomes important during very short time periods. In the high mobility devices, the period of the decaying oscillations is on the order of the plasma wave velocity transit time. Our analysis shows that short channel field effect transistors operating in the plasmonic regime can meet the requirements for applications as terahertz detectors, mixers, delay lines, and phase shifters in ultra high-speed wireless communication circuits

  7. Area and energy efficient high-performance ZnO wavy channel thin-film transistor

    KAUST Repository

    Hanna, Amir

    2014-09-01

    Increased output current while maintaining low power consumption in thin-film transistors (TFTs) is essential for future generation large-area high-resolution displays. Here, we show wavy channel (WC) architecture in TFT that allows the expansion of the transistor width in the direction perpendicular to the substrate through integrating continuous fin features on the underlying substrate. This architecture enables expanding the TFT width without consuming any additional chip area, thus enabling increased performance while maintaining the real estate integrity. The experimental WCTFTs show a linear increase in output current as a function of number of fins per device resulting in (3.5×) increase in output current when compared with planar counterparts that consume the same chip area. The new architecture also allows tuning the threshold voltage as a function of the number of fin features included in the device, as threshold voltage linearly decreased from 6.8 V for planar device to 2.6 V for WC devices with 32 fins. This makes the new architecture more power efficient as lower operation voltages could be used for WC devices compared with planar counterparts. It was also found that field effect mobility linearly increases with the number of fins included in the device, showing almost \\\\(1.8×) enhancements in the field effect mobility than that of the planar counterparts. This can be attributed to higher electric field in the channel due to the fin architecture and threshold voltage shift. © 2014 IEEE.

  8. Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

    KAUST Repository

    Hanna, Amir; Hussain, Aftab M.; Omran, Hesham; Alshareef, Sarah; Salama, Khaled N.; Hussain, Muhammad Mustafa

    2015-01-01

    High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (Zn

  9. Diketopyrrolopyrrole-diketopyrrolopyrrole-based conjugated copolymer for high-mobility organic field-effect transistors

    KAUST Repository

    Kanimozhi, Catherine K.; Yaacobi-Gross, Nir; Chou, Kang Wei; Amassian, Aram; Anthopoulos, Thomas D.; Patil, Satish P.

    2012-01-01

    In this communication, we report the synthesis of a novel diketopyrrolopyrrole-diketopyrrolopyrrole (DPP-DPP)-based conjugated copolymer and its application in high-mobility organic field-effect transistors. Copolymerization of DPP with DPP yields a

  10. Ultrasensitive detection of Hg2+ using oligonucleotide-functionalized AlGaN/GaN high electron mobility transistor

    International Nuclear Information System (INIS)

    Cheng, Junjie; Li, Jiadong; Miao, Bin; Wu, Dongmin; Wang, Jine; Pei, Renjun; Wu, Zhengyan

    2014-01-01

    An oligonucleotide-functionalized ion sensitive AlGaN/GaN high electron mobility transistor (HEMT) was fabricated to detect trace amounts of Hg 2+ . The advantages of ion sensitive AlGaN/GaN HEMT and highly specific binding interaction between Hg 2+ and thymines were combined. The current response of this Hg 2+ ultrasensitive transistor was characterized. The current increased due to the accumulation of Hg 2+ ions on the surface by the highly specific thymine-Hg 2+ -thymine recognition. The dynamic linear range for Hg 2+ detection has been determined in the concentrations from 10 −14 to 10 −8 M and a detection limit below 10 −14 M level was estimated, which is the best result of AlGaN/GaN HEMT biosensors for Hg 2+ detection till now.

  11. Thermal Investigation of Three-Dimensional GaN-on-SiC High Electron Mobility Transistors

    Science.gov (United States)

    2017-07-01

    University of L’Aquila, (2011). 23 Rao, H. & Bosman, G. Hot-electron induced defect generation in AlGaN/GaN high electron mobility transistors. Solid...AFRL-RY-WP-TR-2017-0143 THERMAL INVESTIGATION OF THREE- DIMENSIONAL GaN-on-SiC HIGH ELECTRON MOBILITY TRANSISTORS Qing Hao The University of Arizona...clarification memorandum dated 16 Jan 09. This report is available to the general public, including foreign nationals. Copies may be obtained from the

  12. High-voltage, high-current, solid-state closing switch

    Science.gov (United States)

    Focia, Ronald Jeffrey

    2017-08-22

    A high-voltage, high-current, solid-state closing switch uses a field-effect transistor (e.g., a MOSFET) to trigger a high-voltage stack of thyristors. The switch can have a high hold-off voltage, high current carrying capacity, and high time-rate-of-change of current, di/dt. The fast closing switch can be used in pulsed power applications.

  13. A high-performance complementary inverter based on transition metal dichalcogenide field-effect transistors.

    Science.gov (United States)

    Cho, Ah-Jin; Park, Kee Chan; Kwon, Jang-Yeon

    2015-01-01

    For several years, graphene has been the focus of much attention due to its peculiar characteristics, and it is now considered to be a representative 2-dimensional (2D) material. Even though many research groups have studied on the graphene, its intrinsic nature of a zero band-gap, limits its use in practical applications, particularly in logic circuits. Recently, transition metal dichalcogenides (TMDs), which are another type of 2D material, have drawn attention due to the advantage of having a sizable band-gap and a high mobility. Here, we report on the design of a complementary inverter, one of the most basic logic elements, which is based on a MoS2 n-type transistor and a WSe2 p-type transistor. The advantages provided by the complementary metal-oxide-semiconductor (CMOS) configuration and the high-performance TMD channels allow us to fabricate a TMD complementary inverter that has a high-gain of 13.7. This work demonstrates the operation of the MoS2 n-FET and WSe2 p-FET on the same substrate, and the electrical performance of the CMOS inverter, which is based on a different driving current, is also measured.

  14. Wavy channel thin film transistor architecture for area efficient, high performance and low power displays

    KAUST Repository

    Hanna, Amir

    2013-12-23

    We demonstrate a new thin film transistor (TFT) architecture that allows expansion of the device width using continuous fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor width in a direction perpendicular to the substrate, thus not consuming extra chip area, achieving area efficiency. The devices have shown for a 13% increase in the device width resulting in a maximum 2.5× increase in \\'ON\\' current value of the WCTFT, when compared to planar devices consuming the same chip area, while using atomic layer deposition based zinc oxide (ZnO) as the channel material. The WCTFT devices also maintain similar \\'OFF\\' current value, ~100 pA, when compared to planar devices, thus not compromising on power consumption for performance which usually happens with larger width devices. This work offers an interesting opportunity to use WCTFTs as backplane circuitry for large-area high-resolution display applications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  15. Wavy channel Thin Film Transistor for area efficient, high performance and low power applications

    KAUST Repository

    Hanna, Amir

    2014-06-01

    We report a new Thin Film Transistor (TFT) architecture that allows expansion of the device width using wavy (continuous without separation) fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor width in a direction perpendicular to the substrate, thus not consuming extra chip area, achieving area efficiency. The devices have shown for a 13% increase in the device width resulting in a maximum 2.4x increase in \\'ON\\' current value of the WCTFT, when compared to planar devices consuming the same chip area, while using atomic layer deposition based zinc oxide (ZnO) as the channel material. The WCTFT devices also maintain similar \\'OFF\\' current value, similar to 100 pA, when compared to planar devices, thus not compromising on power consumption for performance which usually happens with larger width devices. This work offers a pragmatic opportunity to use WCTFTs as backplane circuitry for large-area high-resolution display applications without any limitation any TFT materials.

  16. High performance transistors via aligned polyfluorene-sorted carbon nanotubes

    Science.gov (United States)

    Brady, Gerald J.; Joo, Yongho; Singha Roy, Susmit; Gopalan, Padma; Arnold, Michael S.

    2014-02-01

    We evaluate the performance of exceptionally electronic-type sorted, semiconducting, aligned single-walled carbon nanotubes (s-SWCNTs) in field effect transistors (FETs). High on-conductance and high on/off conductance modulation are simultaneously achieved at channel lengths which are both shorter and longer than individual s-SWCNTs. The s-SWCNTs are isolated from heterogeneous mixtures using a polyfluorene-derivative as a selective agent and aligned on substrates via dose-controlled, floating evaporative self-assembly at densities of ˜50 s-SWCNTs μm-1. At a channel length of 9 μm the s-SWCNTs percolate to span the FET channel, and the on/off ratio and charge transport mobility are 2.2 × 107 and 46 cm2 V-1 s-1, respectively. At a channel length of 400 nm, a large fraction of the s-SWCNTs directly span the channel, and the on-conductance per width is 61 μS μm-1 and the on/off ratio is 4 × 105. These results are considerably better than previous solution-processed FETs, which have suffered from poor on/off ratio due to spurious metallic nanotubes that bridge the channel. 4071 individual and small bundles of s-SWCNTs are tested in 400 nm channel length FETs, and all show semiconducting behavior, demonstrating the high fidelity of polyfluorenes as selective agents and the promise of assembling s-SWCNTs from solution to create high performance semiconductor electronic devices.

  17. High performance transistors via aligned polyfluorene-sorted carbon nanotubes

    International Nuclear Information System (INIS)

    Brady, Gerald J.; Joo, Yongho; Singha Roy, Susmit; Gopalan, Padma; Arnold, Michael S.

    2014-01-01

    We evaluate the performance of exceptionally electronic-type sorted, semiconducting, aligned single-walled carbon nanotubes (s-SWCNTs) in field effect transistors (FETs). High on-conductance and high on/off conductance modulation are simultaneously achieved at channel lengths which are both shorter and longer than individual s-SWCNTs. The s-SWCNTs are isolated from heterogeneous mixtures using a polyfluorene-derivative as a selective agent and aligned on substrates via dose-controlled, floating evaporative self-assembly at densities of ∼50 s-SWCNTs μm −1 . At a channel length of 9 μm the s-SWCNTs percolate to span the FET channel, and the on/off ratio and charge transport mobility are 2.2 × 10 7 and 46 cm 2  V −1  s −1 , respectively. At a channel length of 400 nm, a large fraction of the s-SWCNTs directly span the channel, and the on-conductance per width is 61 μS μm −1 and the on/off ratio is 4 × 10 5 . These results are considerably better than previous solution-processed FETs, which have suffered from poor on/off ratio due to spurious metallic nanotubes that bridge the channel. 4071 individual and small bundles of s-SWCNTs are tested in 400 nm channel length FETs, and all show semiconducting behavior, demonstrating the high fidelity of polyfluorenes as selective agents and the promise of assembling s-SWCNTs from solution to create high performance semiconductor electronic devices

  18. High performance transistors via aligned polyfluorene-sorted carbon nanotubes

    Energy Technology Data Exchange (ETDEWEB)

    Brady, Gerald J.; Joo, Yongho; Singha Roy, Susmit; Gopalan, Padma; Arnold, Michael S., E-mail: msarnold@wisc.edu [Department of Materials Science and Engineering, University of Wisconsin-Madison, 1509 University Avenue, Madison, Wisconsin 53706 (United States)

    2014-02-24

    We evaluate the performance of exceptionally electronic-type sorted, semiconducting, aligned single-walled carbon nanotubes (s-SWCNTs) in field effect transistors (FETs). High on-conductance and high on/off conductance modulation are simultaneously achieved at channel lengths which are both shorter and longer than individual s-SWCNTs. The s-SWCNTs are isolated from heterogeneous mixtures using a polyfluorene-derivative as a selective agent and aligned on substrates via dose-controlled, floating evaporative self-assembly at densities of ∼50 s-SWCNTs μm{sup −1}. At a channel length of 9 μm the s-SWCNTs percolate to span the FET channel, and the on/off ratio and charge transport mobility are 2.2 × 10{sup 7} and 46 cm{sup 2} V{sup −1} s{sup −1}, respectively. At a channel length of 400 nm, a large fraction of the s-SWCNTs directly span the channel, and the on-conductance per width is 61 μS μm{sup −1} and the on/off ratio is 4 × 10{sup 5}. These results are considerably better than previous solution-processed FETs, which have suffered from poor on/off ratio due to spurious metallic nanotubes that bridge the channel. 4071 individual and small bundles of s-SWCNTs are tested in 400 nm channel length FETs, and all show semiconducting behavior, demonstrating the high fidelity of polyfluorenes as selective agents and the promise of assembling s-SWCNTs from solution to create high performance semiconductor electronic devices.

  19. Carbon nanotube feedback-gate field-effect transistor: suppressing current leakage and increasing on/off ratio.

    Science.gov (United States)

    Qiu, Chenguang; Zhang, Zhiyong; Zhong, Donglai; Si, Jia; Yang, Yingjun; Peng, Lian-Mao

    2015-01-27

    Field-effect transistors (FETs) based on moderate or large diameter carbon nanotubes (CNTs) usually suffer from ambipolar behavior, large off-state current and small current on/off ratio, which are highly undesirable for digital electronics. To overcome these problems, a feedback-gate (FBG) FET structure is designed and tested. This FBG FET differs from normal top-gate FET by an extra feedback-gate, which is connected directly to the drain electrode of the FET. It is demonstrated that a FBG FET based on a semiconducting CNT with a diameter of 1.5 nm may exhibit low off-state current of about 1 × 10(-13) A, high current on/off ratio of larger than 1 × 10(8), negligible drain-induced off-state leakage current, and good subthreshold swing of 75 mV/DEC even at large source-drain bias and room temperature. The FBG structure is promising for CNT FETs to meet the standard for low-static-power logic electronics applications, and could also be utilized for building FETs using other small band gap semiconductors to suppress leakage current.

  20. β-Ga2O3 on insulator field-effect transistors with drain currents exceeding 1.5 A/mm and their self-heating effect

    Science.gov (United States)

    Zhou, Hong; Maize, Kerry; Qiu, Gang; Shakouri, Ali; Ye, Peide D.

    2017-08-01

    We have demonstrated that depletion/enhancement-mode β-Ga2O3 on insulator field-effect transistors can achieve a record high drain current density of 1.5/1.0 A/mm by utilizing a highly doped β-Ga2O3 nano-membrane as the channel. β-Ga2O3 on insulator field-effect transistor (GOOI FET) shows a high on/off ratio of 1010 and low subthreshold slope of 150 mV/dec even with 300 nm thick SiO2. The enhancement-mode GOOI FET is achieved through surface depletion. An ultra-fast, high resolution thermo-reflectance imaging technique is applied to study the self-heating effect by directly measuring the local surface temperature. High drain current, low Rc, and wide bandgap make the β-Ga2O3 on insulator field-effect transistor a promising candidate for future power electronics applications.

  1. A photocurrent compensation method of bipolar transistors under high dose rate radiation and its experimental research

    International Nuclear Information System (INIS)

    Yin Xuesong; Liu Zhongli; Li Chunji; Yu Fang

    2005-01-01

    Experiment using discrete bipolar transistors has been performed to verify the effect of the photocurrent compensation method. The theory of the dose rate effects of bipolar transistors and the photocurrent compensation method are introduced. The comparison between the response of hardened and unhardened circuits under high dose rate radiation is discussed. The experimental results show instructiveness to the hardness of bipolar integrated circuits under transient radiation. (authors)

  2. Flexible low-voltage organic transistors with high thermal stability at 250 °C.

    Science.gov (United States)

    Yokota, Tomoyuki; Kuribara, Kazunori; Tokuhara, Takeyoshi; Zschieschang, Ute; Klauk, Hagen; Takimiya, Kazuo; Sadamitsu, Yuji; Hamada, Masahiro; Sekitani, Tsuyoshi; Someya, Takao

    2013-07-19

    Low-operating-voltage flexible organic thin-film transistors with high thermal stability using DPh-DNTT and SAM gate dielectrics are reported. The mobility of the transistors are decreased by 23% after heating to 250 °C for 30 min. Furthermore, flexible organic pseudo-CMOS inverter circuits, which are functional after heating to 200 °C, are demonstrated. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. Atmospheric pressure chemical vapor deposition (APCVD) grown bi-layer graphene transistor characteristics at high temperature

    KAUST Repository

    Qaisi, Ramy M.

    2014-05-15

    We report the characteristics of atmospheric chemical vapor deposition grown bilayer graphene transistors fabricated on ultra-scaled (10 nm) high-κ dielectric aluminum oxide (Al2O3) at elevated temperatures. We observed that the drive current increased by >400% as temperature increased from room temperature to 250 °C. Low gate leakage was maintained for prolonged exposure at 100 °C but increased significantly at temperatures >200 °C. These results provide important insights for considering chemical vapor deposition graphene on aluminum oxide for high temperature applications where low power and high frequency operation are required. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Atmospheric pressure chemical vapor deposition (APCVD) grown bi-layer graphene transistor characteristics at high temperature

    KAUST Repository

    Qaisi, Ramy M.; Smith, Casey; Hussain, Muhammad Mustafa

    2014-01-01

    We report the characteristics of atmospheric chemical vapor deposition grown bilayer graphene transistors fabricated on ultra-scaled (10 nm) high-κ dielectric aluminum oxide (Al2O3) at elevated temperatures. We observed that the drive current increased by >400% as temperature increased from room temperature to 250 °C. Low gate leakage was maintained for prolonged exposure at 100 °C but increased significantly at temperatures >200 °C. These results provide important insights for considering chemical vapor deposition graphene on aluminum oxide for high temperature applications where low power and high frequency operation are required. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Non-Planar Nanotube and Wavy Architecture Based Ultra-High Performance Field Effect Transistors

    KAUST Repository

    Hanna, Amir

    2016-11-01

    This dissertation presents a unique concept for a device architecture named the nanotube (NT) architecture, which is capable of higher drive current compared to the Gate-All-Around Nanowire architecture when applied to heterostructure Tunnel Field Effect Transistors. Through the use of inner/outer core-shell gates, heterostructure NT TFET leverages physically larger tunneling area thus achieving higher driver current (ION) and saving real estates by eliminating arraying requirement. We discuss the physics of p-type (Silicon/Indium Arsenide) and n-type (Silicon/Germanium hetero-structure) based TFETs. Numerical TCAD simulations have shown that NT TFETs have 5x and 1.6 x higher normalized ION when compared to GAA NW TFET for p and n-type TFETs, respectively. This is due to the availability of larger tunneling junction cross sectional area, and lower Shockley-Reed-Hall recombination, while achieving sub 60 mV/dec performance for more than 5 orders of magnitude of drain current, thus enabling scaling down of Vdd to 0.5 V. This dissertation also introduces a novel thin-film-transistors architecture that is named the Wavy Channel (WC) architecture, which allows for extending device width by integrating vertical fin-like substrate corrugations giving rise to up to 50% larger device width, without occupying extra chip area. The novel architecture shows 2x higher output drive current per unit chip area when compared to conventional planar architecture. The current increase is attributed to both the extra device width and 50% enhancement in field effect mobility due to electrostatic gating effects. Digital circuits are fabricated to demonstrate the potential of integrating WC TFT based circuits. WC inverters have shown 2× the peak-to-peak output voltage for the same input, and ~2× the operation frequency of the planar inverters for the same peak-to-peak output voltage. WC NAND circuits have shown 2× higher peak-to-peak output voltage, and 3× lower high-to-low propagation

  6. Current fluctuation of electron and hole carriers in multilayer WSe{sub 2} field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Ko, Seung-Pil; Shin, Jong Mok; Jang, Ho-Kyun; Jin, Jun Eon; Kim, Gyu-Tae, E-mail: gtkim@korea.ac.kr [School of Electrical Engineering, Korea University, Seoul 02481 (Korea, Republic of); Kim, Yong Jin; Kim, Young Keun [Department of Materials Science and Engineering, Korea University, Seoul 02481 (Korea, Republic of); Shin, Minju [School of Electrical Engineering, Korea University, Seoul 02481 (Korea, Republic of); IMEP-LAHC, Grenoble INP-MINATEC, 3 Parvis Louis Neel, 38016 Grenoble (France)

    2015-12-14

    Two-dimensional materials have outstanding scalability due to their structural and electrical properties for the logic devices. Here, we report the current fluctuation in multilayer WSe{sub 2} field effect transistors (FETs). In order to demonstrate the impact on carrier types, n-type and p-type WSe{sub 2} FETs are fabricated with different work function metals. Each device has similar electrical characteristics except for the threshold voltage. In the low frequency noise analysis, drain current power spectral density (S{sub I}) is inversely proportional to frequency, indicating typical 1/f noise behaviors. The curves of the normalized drain current power spectral density (NS{sub I}) as a function of drain current at the 10 Hz of frequency indicate that our devices follow the carrier number fluctuation with correlated mobility fluctuation model. This means that current fluctuation depends on the trapping-detrapping motion of the charge carriers near the channel interface. No significant difference is observed in the current fluctuation according to the charge carrier type, electrons and holes that occurred in the junction and channel region.

  7. Nanoscale investigation of AlGaN/GaN-on-Si high electron mobility transistors.

    Science.gov (United States)

    Fontserè, A; Pérez-Tomás, A; Placidi, M; Llobet, J; Baron, N; Chenot, S; Cordier, Y; Moreno, J C; Jennings, M R; Gammon, P M; Fisher, C A; Iglesias, V; Porti, M; Bayerl, A; Lanza, M; Nafría, M

    2012-10-05

    AlGaN/GaN HEMTs are devices which are strongly influenced by surface properties such as donor states, roughness or any kind of inhomogeneity. The electron gas is only a few nanometers away from the surface and the transistor forward and reverse currents are considerably affected by any variation of surface property within the atomic scale. Consequently, we have used the technique known as conductive AFM (CAFM) to perform electrical characterization at the nanoscale. The AlGaN/GaN HEMT ohmic (drain and source) and Schottky (gate) contacts were investigated by the CAFM technique. The estimated area of these highly conductive pillars (each of them of approximately 20-50 nm radius) represents around 5% of the total contact area. Analogously, the reverse leakage of the gate Schottky contact at the nanoscale seems to correlate somehow with the topography of the narrow AlGaN barrier regions producing larger currents.

  8. DEVICE TECHNOLOGY. Nanomaterials in transistors: From high-performance to thin-film applications.

    Science.gov (United States)

    Franklin, Aaron D

    2015-08-14

    For more than 50 years, silicon transistors have been continuously shrunk to meet the projections of Moore's law but are now reaching fundamental limits on speed and power use. With these limits at hand, nanomaterials offer great promise for improving transistor performance and adding new applications through the coming decades. With different transistors needed in everything from high-performance servers to thin-film display backplanes, it is important to understand the targeted application needs when considering new material options. Here the distinction between high-performance and thin-film transistors is reviewed, along with the benefits and challenges to using nanomaterials in such transistors. In particular, progress on carbon nanotubes, as well as graphene and related materials (including transition metal dichalcogenides and X-enes), outlines the advances and further research needed to enable their use in transistors for high-performance computing, thin films, or completely new technologies such as flexible and transparent devices. Copyright © 2015, American Association for the Advancement of Science.

  9. High current induction linacs

    International Nuclear Information System (INIS)

    Barletta, W.; Faltens, A.; Henestroza, E.; Lee, E.

    1994-07-01

    Induction linacs are among the most powerful accelerators in existence. They have accelerated electron bunches of several kiloamperes, and are being investigated as drivers for heavy ion driven inertial confinement fusion (HIF), which requires peak beam currents of kiloamperes and average beam powers of some tens of megawatts. The requirement for waste transmutation with an 800 MeV proton or deuteron beam with an average current of 50 mA and an average power of 40 MW lies midway between the electron machines and the heavy ion machines in overall difficulty. Much of the technology and understanding of beam physics carries over from the previous machines to the new requirements. The induction linac allows use of a very large beam aperture, which may turn out to be crucial to reducing beam loss and machine activation from the beam halo. The major issues addressed here are transport of high intensity beams, availability of sources, efficiency of acceleration, and the state of the needed technology for the waste treatment application. Because of the transformer-like action of an induction core and the accompanying magnetizing current, induction linacs make the most economic sense and have the highest efficiencies with large beam currents. Based on present understanding of beam transport limits, induction core magnetizing current requirements, and pulse modulators, the efficiencies could be very high. The study of beam transport at high intensities has been the major activity of the HIF community. Beam transport and sources are limiting at low energies but are not significant constraints at the higher energies. As will be shown, the proton beams will be space-charge-dominated, for which the emittance has only a minor effect on the overall beam diameter but does determine the density falloff at the beam edge

  10. Degradation Mechanisms for GaN and GaAs High Speed Transistors

    Directory of Open Access Journals (Sweden)

    Fan Ren

    2012-11-01

    Full Text Available We present a review of reliability issues in AlGaN/GaN and AlGaAs/GaAs high electron mobility transistors (HEMTs as well as Heterojunction Bipolar Transistors (HBTs in the AlGaAs/GaAs materials systems. Because of the complex nature and multi-faceted operation modes of these devices, reliability studies must go beyond the typical Arrhenius accelerated life tests. We review the electric field driven degradation in devices with different gate metallization, device dimensions, electric field mitigation techniques (such as source field plate, and the effect of device fabrication processes for both DC and RF stress conditions. We summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported, but differ in the two device technologies: For HEMTs, the layers are thin and relatively lightly doped compared to HBT structures and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only Ohmic contacts. This leads to different degradation mechanisms for the two types of devices.

  11. Polymer-Sorted Semiconducting Carbon Nanotube Networks for High-Performance Ambipolar Field-Effect Transistors

    Science.gov (United States)

    2014-01-01

    Efficient selection of semiconducting single-walled carbon nanotubes (SWNTs) from as-grown nanotube samples is crucial for their application as printable and flexible semiconductors in field-effect transistors (FETs). In this study, we use atactic poly(9-dodecyl-9-methyl-fluorene) (a-PF-1-12), a polyfluorene derivative with asymmetric side-chains, for the selective dispersion of semiconducting SWNTs with large diameters (>1 nm) from plasma torch-grown SWNTs. Lowering the molecular weight of the dispersing polymer leads to a significant improvement of selectivity. Combining dense semiconducting SWNT networks deposited from an enriched SWNT dispersion with a polymer/metal-oxide hybrid dielectric enables transistors with balanced ambipolar, contact resistance-corrected mobilities of up to 50 cm2·V–1·s–1, low ohmic contact resistance, steep subthreshold swings (0.12–0.14 V/dec) and high on/off ratios (106) even for short channel lengths (<10 μm). These FETs operate at low voltages (<3 V) and show almost no current hysteresis. The resulting ambipolar complementary-like inverters exhibit gains up to 61. PMID:25493421

  12. Degradation Mechanisms for GaN and GaAs High Speed Transistors

    Science.gov (United States)

    Cheney, David J.; Douglas, Erica A.; Liu, Lu; Lo, Chien-Fong; Gila, Brent P.; Ren, Fan; Pearton, Stephen J.

    2012-01-01

    We present a review of reliability issues in AlGaN/GaN and AlGaAs/GaAs high electron mobility transistors (HEMTs) as well as Heterojunction Bipolar Transistors (HBTs) in the AlGaAs/GaAs materials systems. Because of the complex nature and multi-faceted operation modes of these devices, reliability studies must go beyond the typical Arrhenius accelerated life tests. We review the electric field driven degradation in devices with different gate metallization, device dimensions, electric field mitigation techniques (such as source field plate), and the effect of device fabrication processes for both DC and RF stress conditions. We summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported, but differ in the two device technologies: For HEMTs, the layers are thin and relatively lightly doped compared to HBT structures and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only Ohmic contacts. This leads to different degradation mechanisms for the two types of devices.

  13. A Drain Current Model Based on the Temperature Effect of a-Si:H Thin-Film Transistors

    International Nuclear Information System (INIS)

    Qiang Lei; Yao Ruo-He

    2012-01-01

    Based on the differential Ohm's law and Poisson's equation, an analytical model of the drain current for a-Si:H thin-film transistors is developed. This model is proposed to elaborate the temperature effect on the drain current, which indicates that the drain current is linear with temperature in the range of 290-360 K, and the results fit well with the experimental data

  14. Effect of traps and defects on high temperature performance of Ge channel junctionless nanowire transistors

    Directory of Open Access Journals (Sweden)

    Chuanchuan Sun

    2017-07-01

    Full Text Available We investigate the effect of traps and defects on high temperature performance of p-type germanium-on-insulator (GOI based junctionless nanowire transistors (JNTs at temperatures ranging from 300 to 450 K. Temperature dependence of the main electrical parameters, such as drive current (Ion, leakage current (Ioff, threshold voltage (Vt, transconductance (Gm and subthreshold slope (SS are extracted and compared with the reported results of conventional inversion mode (IM MOSFETs and Si based JNTs. The results show that the high interface trap density (Dit and defects can degrade high temperature reliability of GOI based JNTs significantly, in terms of Ioff, Vt variation, Gm-max and SS values. The Ioff is much more dependent on temperature than Ion and mainly affected by trap-assisted-tunneling (TAT current. The Vt variation with temperature is larger than that for IM MOSFETs and SOI based JNTs, which can be mostly attributed to the high Dit. The high Dit can also induce high SS values. The maximum Gm has a weak dependence on temperature and is significantly influenced by neutral defects scattering. Limiting the Dit and neutral defect densities is critical for the reliability of GOI based JNTs working at high temperatures.

  15. Design and simulation of a novel GaN based resonant tunneling high electron mobility transistor on a silicon substrate

    International Nuclear Information System (INIS)

    Chowdhury, Subhra; Biswas, Dhrubes; Chattaraj, Swarnabha

    2015-01-01

    For the first time, we have introduced a novel GaN based resonant tunneling high electron mobility transistor (RTHEMT) on a silicon substrate. A monolithically integrated GaN based inverted high electron mobility transistor (HEMT) and a resonant tunneling diode (RTD) are designed and simulated using the ATLAS simulator and MATLAB in this study. The 10% Al composition in the barrier layer of the GaN based RTD structure provides a peak-to-valley current ratio of 2.66 which controls the GaN based HEMT performance. Thus the results indicate an improvement in the current–voltage characteristics of the RTHEMT by controlling the gate voltage in this structure. The introduction of silicon as a substrate is a unique step taken by us for this type of RTHEMT structure. (paper)

  16. Synergetic effects of radiation stress and hot-carrier stress on the current gain of npn bipolar junction transistors

    International Nuclear Information System (INIS)

    Witczak, S.C.; Kosier, S.L.; Schrimpf, R.D.; Galloway, K.F.

    1994-01-01

    The combined effects of ionizing radiation and hot-carrier stress on the current gain of npn bipolar junction transistors were investigated. The analysis was carried out experimentally by examining the consequences of interchanging the order in which the two stress types were applied to identical transistors which were stressed to various levels of damage. The results indicate that the hot-carrier response of the transistor is improved by radiation damage, whereas hot-carrier damage has little effect on subsequent radiation stress. Characterization of the temporal progression of hot-carrier effects revealed that hot-carrier stress acts initially to reduce excess base current and improve current gain in irradiated transistors. PISCES simulations show that the magnitude of the peak electric-field within the emitter-base depletion region is reduced significantly by net positive oxide charges induced by radiation. The interaction of the two stress types is explained in a qualitative model based on the probability of hot-carrier injection determined by radiation damage and on the neutralization and compensation of radiation-induced positive oxide charges by injected electrons. The result imply that a bound on damage due to the combined stress types is achieved when hot-carrier stress precedes any irradiation

  17. Effect of germanium concentrations on tunnelling current calculation of Si/Si1-xGex/Si heterojunction bipolar transistor

    Science.gov (United States)

    Hasanah, L.; Suhendi, E.; Khairrurijal

    2018-05-01

    Tunelling current calculation on Si/Si1-xGex/Si heterojunction bipolar transistor was carried out by including the coupling between transversal and longitudinal components of electron motion. The calculation results indicated that the coupling between kinetic energy in parallel and perpendicular to S1-xGex barrier surface affected tunneling current significantly when electron velocity was faster than 1x105 m/s. This analytical tunneling current model was then used to study how the germanium concentration in base to Si/Si1-xGex/Si heterojunction bipolar transistor influenced the tunneling current. It is obtained that tunneling current increased as the germanium concentration given in base decreased.

  18. High Charge Carrier Mobility Polymers for Organic Transistors

    OpenAIRE

    Erdmann, Tim

    2017-01-01

    I) Introduction p-Conjugated polymers inherently combine electronic properties of inorganic semiconductor crystals and material characteristics of organic plastics due to their special molecular design. This unique combination has led to developing new unconventional optoelectronic technologies and, further, resulted in the evolution of semiconducting polymers (SCPs) as fundamental components for novel electronic devices, such as organic field-effect transistors (OFETs), organic light-emit...

  19. Very high channel conductivity in low-defect AlN/GaN high electron mobility transistor structures

    International Nuclear Information System (INIS)

    Dabiran, A. M.; Wowchak, A. M.; Osinsky, A.; Xie, J.; Hertog, B.; Cui, B.; Chow, P. P.; Look, D. C.

    2008-01-01

    Low defect AlN/GaN high electron mobility transistor (HEMT) structures, with very high values of electron mobility (>1800 cm 2 /V s) and sheet charge density (>3x10 13 cm -2 ), were grown by rf plasma-assisted molecular beam epitaxy (MBE) on sapphire and SiC, resulting in sheet resistivity values down to ∼100 Ω/□ at room temperature. Fabricated 1.2 μm gate devices showed excellent current-voltage characteristics, including a zero gate saturation current density of ∼1.3 A/mm and a peak transconductance of ∼260 mS/mm. Here, an all MBE growth of optimized AlN/GaN HEMT structures plus the results of thin-film characterizations and device measurements are presented

  20. Optimization of L-shaped tunneling field-effect transistor for ambipolar current suppression and Analog/RF performance enhancement

    Science.gov (United States)

    Li, Cong; Zhao, Xiaolong; Zhuang, Yiqi; Yan, Zhirui; Guo, Jiaming; Han, Ru

    2018-03-01

    L-shaped tunneling field-effect transistor (LTFET) has larger tunnel area than planar TFET, which leads to enhanced on-current ION . However, LTFET suffers from severe ambipolar behavior, which needs to be further optimized for low power and high-frequency applications. In this paper, both hetero-gate-dielectric (HGD) and lightly doped drain (LDD) structures are introduced into LTFET for suppression of ambipolarity and improvement of analog/RF performance of LTFET. Current-voltage characteristics, the variation of energy band diagrams, distribution of band-to-band tunneling (BTBT) generation and distribution of electric field are analyzed for our proposed HGD-LDD-LTFET. In addition, the effect of LDD on the ambipolar behavior of LTFET is investigated, the length and doping concentration of LDD is also optimized for better suppression of ambipolar current. Finally, analog/RF performance of HGD-LDD-LTFET are studied in terms of gate-source capacitance, gate-drain capacitance, cut-off frequency, and gain bandwidth production. TCAD simulation results show that HGD-LDD-LTFET not only drastically suppresses ambipolar current but also improves analog/RF performance compared with conventional LTFET.

  1. High performance and transparent multilayer MoS2 transistors: Tuning Schottky barrier characteristics

    Directory of Open Access Journals (Sweden)

    Young Ki Hong

    2016-05-01

    Full Text Available Various strategies and mechanisms have been suggested for investigating a Schottky contact behavior in molybdenum disulfide (MoS2 thin-film transistor (TFT, which are still in much debate and controversy. As one of promising breakthrough for transparent electronics with a high device performance, we have realized MoS2 TFTs with source/drain electrodes consisting of transparent bi-layers of a conducting oxide over a thin film of low work function metal. Intercalation of a low work function metal layer, such as aluminum, between MoS2 and transparent source/drain electrodes makes it possible to optimize the Schottky contact characteristics, resulting in about 24-fold and 3 orders of magnitude enhancement of the field-effect mobility and on-off current ratio, respectively, as well as transmittance of 87.4 % in the visible wavelength range.

  2. High performance and transparent multilayer MoS{sub 2} transistors: Tuning Schottky barrier characteristics

    Energy Technology Data Exchange (ETDEWEB)

    Hong, Young Ki; Kwon, Junyeon; Hong, Seongin; Song, Won Geun; Liu, Na; Omkaram, Inturu; Kim, Sunkook, E-mail: kimskcnt@gmail.com, E-mail: ohms@keti.re.kr [Multi-Functional Bio/Nano Lab., Kyung Hee University, Gyeonggi 446-701 (Korea, Republic of); Yoo, Geonwook; Yoo, Byungwook; Oh, Min Suk, E-mail: kimskcnt@gmail.com, E-mail: ohms@keti.re.kr [Display Convergence Research Center, Korea Electronics Technology Institute, Gyeonggi 463-816 (Korea, Republic of); Ju, Sanghyun [Department of Physics, Kyonggi University, Suwon, Gyeonggi-Do 443-760 (Korea, Republic of)

    2016-05-15

    Various strategies and mechanisms have been suggested for investigating a Schottky contact behavior in molybdenum disulfide (MoS{sub 2}) thin-film transistor (TFT), which are still in much debate and controversy. As one of promising breakthrough for transparent electronics with a high device performance, we have realized MoS{sub 2} TFTs with source/drain electrodes consisting of transparent bi-layers of a conducting oxide over a thin film of low work function metal. Intercalation of a low work function metal layer, such as aluminum, between MoS{sub 2} and transparent source/drain electrodes makes it possible to optimize the Schottky contact characteristics, resulting in about 24-fold and 3 orders of magnitude enhancement of the field-effect mobility and on-off current ratio, respectively, as well as transmittance of 87.4 % in the visible wavelength range.

  3. Botulinum toxin detection using AlGaN /GaN high electron mobility transistors

    Science.gov (United States)

    Wang, Yu-Lin; Chu, B. H.; Chen, K. H.; Chang, C. Y.; Lele, T. P.; Tseng, Y.; Pearton, S. J.; Ramage, J.; Hooten, D.; Dabiran, A.; Chow, P. P.; Ren, F.

    2008-12-01

    Antibody-functionalized, Au-gated AlGaN /GaN high electron mobility transistors (HEMTs) were used to detect botulinum toxin. The antibody was anchored to the gate area through immobilized thioglycolic acid. The AlGaN /GaN HEMT drain-source current showed a rapid response of less than 5s when the target toxin in a buffer was added to the antibody-immobilized surface. We could detect a range of concentrations from 1to10ng/ml. These results clearly demonstrate the promise of field-deployable electronic biological sensors based on AlGaN /GaN HEMTs for botulinum toxin detection.

  4. Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

    Science.gov (United States)

    Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

    2018-01-01

    Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

    Science.gov (United States)

    Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

    2018-04-01

    Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

  6. Measurement of low-frequency base and collector current noise and coherence in SiGe heterojunction bipolar transistors using transimpedance amplifiers

    NARCIS (Netherlands)

    Bruce, S.P.O.; Vandamme, L.K.J.; Rydberg, A.

    1999-01-01

    Transimpedance amplifiers have been used for direct study of current noise in silicon germanium (SiGe) heterojunction bipolar transistors (HBT's) at different biasing conditions. This has facilitated a wider range of resistances in the measurement circuit around the transistor than is possible when

  7. A self-amplified transistor immunosensor under dual gate operation: highly sensitive detection of hepatitis B surface antigen

    Science.gov (United States)

    Lee, I.-K.; Jeun, M.; Jang, H.-J.; Cho, W.-J.; Lee, K. H.

    2015-10-01

    Ion-sensitive field-effect transistors (ISFETs), although they have attracted considerable attention as effective immunosensors, have still not been adopted for practical applications owing to several problems: (1) the poor sensitivity caused by the short Debye screening length in media with high ion concentration, (2) time-consuming preconditioning processes for achieving the highly-diluted media, and (3) the low durability caused by undesirable ions such as sodium chloride in the media. Here, we propose a highly sensitive immunosensor based on a self-amplified transistor under dual gate operation (immuno-DG ISFET) for the detection of hepatitis B surface antigen. To address the challenges in current ISFET-based immunosensors, we have enhanced the sensitivity of an immunosensor by precisely tailoring the nanostructure of the transistor. In the pH sensing test, the immuno-DG ISFET showed superior sensitivity (2085.53 mV per pH) to both standard ISFET under single gate operation (58.88 mV per pH) and DG ISFET with a non-tailored transistor (381.14 mV per pH). Moreover, concerning the detection of hepatitis B surface antigens (HBsAg) using the immuno-DG ISFET, we have successfully detected trace amounts of HBsAg (22.5 fg mL-1) in a non-diluted 1× PBS medium with a high sensitivity of 690 mV. Our results demonstrate that the proposed immuno-DG ISFET can be a biosensor platform for practical use in the diagnosis of various diseases.Ion-sensitive field-effect transistors (ISFETs), although they have attracted considerable attention as effective immunosensors, have still not been adopted for practical applications owing to several problems: (1) the poor sensitivity caused by the short Debye screening length in media with high ion concentration, (2) time-consuming preconditioning processes for achieving the highly-diluted media, and (3) the low durability caused by undesirable ions such as sodium chloride in the media. Here, we propose a highly sensitive immunosensor

  8. Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

    International Nuclear Information System (INIS)

    Hanna, A. N.; Ghoneim, M. T.; Bahabry, R. R.; Hussain, A. M.; Hussain, M. M.

    2013-01-01

    We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions

  9. Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

    KAUST Repository

    Hanna, Amir; Ghoneim, Mohamed T.; Bahabry, Rabab R.; Hussain, Aftab M.; Hussain, Muhammad Mustafa

    2013-01-01

    We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

  10. Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

    KAUST Repository

    Hanna, Amir

    2013-11-26

    We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

  11. High-frequency, scaled graphene transistors on diamond-like carbon

    NARCIS (Netherlands)

    Wu, Y.; Lin, Y.M.; Bol, A.A.; Jenkins, K.A.; Xia, F.; Farmer, D.B.; Zu, Y.; Avouris, Ph.

    2011-01-01

    Owing to its high carrier mobility and saturation velocity, graphene has attracted enormous attention in recent years In particular, high-performance graphene transistors for radio-frequency (r.f.) applications are of great interest. Synthesis of large-scale graphene sheets of high quality and at

  12. Sub-50 nm gate length SOI transistor development for high performance microprocessors

    International Nuclear Information System (INIS)

    Horstmann, M.; Greenlaw, D.; Feudel, Th.; Wei, A.; Frohberg, K.; Burbach, G.; Gerhardt, M.; Lenski, M.; Stephan, R.; Wieczorek, K.; Schaller, M.; Hohage, J.; Ruelke, H.; Klais, J.; Huebler, P.; Luning, S.; Bentum, R. van; Grasshoff, G.; Schwan, C.; Cheek, J.; Buller, J.; Krishnan, S.; Raab, M.; Kepler, N.

    2004-01-01

    Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI transistors into volume manufacturing for high-speed microprocessors. The key innovations developed for this transistor in order to overcome classical gate oxide and L GATE scaling is an unique differential triple spacer structure, stressed overlayer films inducing strain in the Silicon channel and optimized junctions. This transistor structure yields an outstanding ring oscillator speed with an unloaded inverter delay of 5.5 ps. The found improvements are highly manufacturable and scaleable for future device technologies like FD SOI

  13. Significant performance enhancement in AlGaN/GaN high electron mobility transistor by high-κ organic dielectric

    International Nuclear Information System (INIS)

    Ze-Gao, Wang; Yuan-Fu, Chen; Cao, Chen; Ben-Lang, Tian; Fu-Tong, Chu; Xing-Zhao, Liu; Yan-Rong, Li

    2010-01-01

    The electrical properties of AlGaN/GaN high electron mobility transistor (HEMT) with and without high-κ organic dielectrics are investigated. The maximum drain current I D max and the maximum transconductance g m max of the organic dielectric/AlGaN/GaN structure can be enhanced by 74.5%, and 73.7% compared with those of the bare AlGaN/GaN HEMT, respectively. Both the threshold voltage V T and g m max of the dielectric/AlGaN/GaN HEMT are strongly dielectric-constant-dependent. Our results suggest that it is promising to significantly improve the performance of the AlGaN/GaN HEMT by introducing the high-κ organic dielectric. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  14. Pentacene based thin film transistors with high-k dielectric Nd2O3 as a gate insulator

    International Nuclear Information System (INIS)

    Sarma, R.; Saikia, D.

    2010-01-01

    We have investigated the pentacene based Organic Thin Film Transistors (OTFTs) with high-k dielectric Nd 2 O 3 . Use of high dielectric constant (high-k) gate insulator Nd 2 O 3 reduces the threshold voltage and sub threshold swing of the OTFTs. The calculated threshold voltage -2.2V and sub-threshold swing 1V/decade, current ON-OFF ratio is 1.7 X 10 4 and mobility is 0.13cm 2 /V.s. Pentacene film is deposited on Nd 2 O 3 surface using two step deposition method. Deposited pentacene film is found poly crystalline in nature. (author)

  15. High performance tunnel field-effect transistor by gate and source engineering

    International Nuclear Information System (INIS)

    Huang, Ru; Huang, Qianqian; Chen, Shaowen; Wu, Chunlei; Wang, Jiaxin; An, Xia; Wang, Yangyuan

    2014-01-01

    As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I ON /I OFF ratio (∼10 7 ) at V DS  = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high I ON /I OFF ratio of ∼10 8 and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec −1 was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching. (paper)

  16. High performance tunnel field-effect transistor by gate and source engineering.

    Science.gov (United States)

    Huang, Ru; Huang, Qianqian; Chen, Shaowen; Wu, Chunlei; Wang, Jiaxin; An, Xia; Wang, Yangyuan

    2014-12-19

    As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I(ON)/I(OFF) ratio (∼ 10(7)) at V(DS) = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high ION/IOFF ratio of ∼ 10(8) and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec(-1) was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching.

  17. High performance dendrimer functionalized single-walled carbon nanotubes field effect transistor biosensor for protein detection

    Science.gov (United States)

    Rajesh, Sharma, Vikash; Puri, Nitin K.; Mulchandani, Ashok; Kotnala, Ravinder K.

    2016-12-01

    We report a single-walled carbon nanotube (SWNT) field-effect transistor (FET) functionalized with Polyamidoamine (PAMAM) dendrimer with 128 carboxyl groups as anchors for site specific biomolecular immobilization of protein antibody for C-reactive protein (CRP) detection. The FET device was characterized by scanning electron microscopy and current-gate voltage (I-Vg) characteristic studies. A concentration-dependent decrease in the source-drain current was observed in the regime of clinical significance, with a detection limit of ˜85 pM and a high sensitivity of 20% change in current (ΔI/I) per decade CRP concentration, showing SWNT being locally gated by the binding of CRP to antibody (anti-CRP) on the FET device. The low value of the dissociation constant (Kd = 0.31 ± 0.13 μg ml-1) indicated a high affinity of the device towards CRP analyte arising due to high anti-CRP loading with a better probe orientation on the 3-dimensional PAMAM structure.

  18. Modeling drain current of indium zinc oxide thin film transistors prepared by solution deposition technique

    Science.gov (United States)

    Qiang, Lei; Liang, Xiaoci; Cai, Guangshuo; Pei, Yanli; Yao, Ruohe; Wang, Gang

    2018-06-01

    Indium zinc oxide (IZO) thin film transistor (TFT) deposited by solution method is of considerable technological interest as it is a key component for the fabrication of flexible and cheap transparent electronic devices. To obtain a principal understanding of physical properties of solution-processed IZO TFT, a new drain current model that account for the charge transport is proposed. The formulation is developed by incorporating the effect of gate voltage on mobility and threshold voltage with the carrier charges. It is demonstrated that in IZO TFTs the below threshold regime should be divided into two sections: EC - EF > 3kT and EC - EF ≤ 3kT, where kT is the thermal energy, EF and EC represent the Fermi level and the conduction band edge, respectively. Additionally, in order to describe conduction mechanisms more accurately, the extended mobility edge model is conjoined, which can also get rid of the complicated and lengthy computations. The good agreement between measured and calculated results confirms the efficiency of this model for the design of integrated large-area thin film circuits.

  19. Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits

    Directory of Open Access Journals (Sweden)

    Tooraj Nikoubin

    2010-01-01

    Full Text Available A new transistor sizing algorithm, SEA (Simple Exact Algorithm, for optimizing low-power and high-speed arithmetic integrated circuits is proposed. In comparison with other transistor sizing algorithms, simplicity, accuracy, independency of order and initial sizing factors of transistors, and flexibility in choosing the optimization parameters such as power consumption, delay, Power-Delay Product (PDP, chip area or the combination of them are considered as the advantages of this new algorithm. More exhaustive rules of grouping transistors are the main trait of our algorithm. Hence, the SEA algorithm dominates some major transistor sizing metrics such as optimization rate, simulation speed, and reliability. According to approximate comparison of the SEA algorithm with MDE and ADC for a number of conventional full adder circuits, delay and PDP have been improved 55.01% and 57.92% on an average, respectively. By comparing the SEA and Chang's algorithm, 25.64% improvement in PDP and 33.16% improvement in delay have been achieved. All the simulations have been performed with 0.13 m technology based on the BSIM3v3 model using HSpice simulator software.

  20. Graphene Field Effect Transistors for Biomedical Applications: Current Status and Future Prospects.

    Science.gov (United States)

    Forsyth, Rhiannan; Devadoss, Anitha; Guy, Owen J

    2017-07-26

    Since the discovery of the two-dimensional (2D) carbon material, graphene, just over a decade ago, the development of graphene-based field effect transistors (G-FETs) has become a widely researched area, particularly for use in point-of-care biomedical applications. G-FETs are particularly attractive as next generation bioelectronics due to their mass-scalability and low cost of the technology's manufacture. Furthermore, G-FETs offer the potential to complete label-free, rapid, and highly sensitive analysis coupled with a high sample throughput. These properties, coupled with the potential for integration into portable instrumentation, contribute to G-FETs' suitability for point-of-care diagnostics. This review focuses on elucidating the recent developments in the field of G-FET sensors that act on a bioaffinity basis, whereby a binding event between a bioreceptor and the target analyte is transduced into an electrical signal at the G-FET surface. Recognizing and quantifying these target analytes accurately and reliably is essential in diagnosing many diseases, therefore it is vital to design the G-FET with care. Taking into account some limitations of the sensor platform, such as Debye-Hükel screening and device surface area, is fundamental in developing improved bioelectronics for applications in the clinical setting. This review highlights some efforts undertaken in facing these limitations in order to bring G-FET development for biomedical applications forward.

  1. Graphene Field Effect Transistors for Biomedical Applications: Current Status and Future Prospects

    Directory of Open Access Journals (Sweden)

    Rhiannan Forsyth

    2017-07-01

    Full Text Available Since the discovery of the two-dimensional (2D carbon material, graphene, just over a decade ago, the development of graphene-based field effect transistors (G-FETs has become a widely researched area, particularly for use in point-of-care biomedical applications. G-FETs are particularly attractive as next generation bioelectronics due to their mass-scalability and low cost of the technology’s manufacture. Furthermore, G-FETs offer the potential to complete label-free, rapid, and highly sensitive analysis coupled with a high sample throughput. These properties, coupled with the potential for integration into portable instrumentation, contribute to G-FETs’ suitability for point-of-care diagnostics. This review focuses on elucidating the recent developments in the field of G-FET sensors that act on a bioaffinity basis, whereby a binding event between a bioreceptor and the target analyte is transduced into an electrical signal at the G-FET surface. Recognizing and quantifying these target analytes accurately and reliably is essential in diagnosing many diseases, therefore it is vital to design the G-FET with care. Taking into account some limitations of the sensor platform, such as Debye–Hükel screening and device surface area, is fundamental in developing improved bioelectronics for applications in the clinical setting. This review highlights some efforts undertaken in facing these limitations in order to bring G-FET development for biomedical applications forward.

  2. Charge injection engineering of ambipolar field-effect transistors for high-performance organic complementary circuits.

    Science.gov (United States)

    Baeg, Kang-Jun; Kim, Juhwan; Khim, Dongyoon; Caironi, Mario; Kim, Dong-Yu; You, In-Kyu; Quinn, Jordan R; Facchetti, Antonio; Noh, Yong-Young

    2011-08-01

    Ambipolar π-conjugated polymers may provide inexpensive large-area manufacturing of complementary integrated circuits (CICs) without requiring micro-patterning of the individual p- and n-channel semiconductors. However, current-generation ambipolar semiconductor-based CICs suffer from higher static power consumption, low operation frequencies, and degraded noise margins compared to complementary logics based on unipolar p- and n-channel organic field-effect transistors (OFETs). Here, we demonstrate a simple methodology to control charge injection and transport in ambipolar OFETs via engineering of the electrical contacts. Solution-processed caesium (Cs) salts, as electron-injection and hole-blocking layers at the interface between semiconductors and charge injection electrodes, significantly decrease the gold (Au) work function (∼4.1 eV) compared to that of a pristine Au electrode (∼4.7 eV). By controlling the electrode surface chemistry, excellent p-channel (hole mobility ∼0.1-0.6 cm(2)/(Vs)) and n-channel (electron mobility ∼0.1-0.3 cm(2)/(Vs)) OFET characteristics with the same semiconductor are demonstrated. Most importantly, in these OFETs the counterpart charge carrier currents are highly suppressed for depletion mode operation (I(off) 0.1-0.2 mA). Thus, high-performance, truly complementary inverters (high gain >50 and high noise margin >75% of ideal value) and ring oscillators (oscillation frequency ∼12 kHz) based on a solution-processed ambipolar polymer are demonstrated.

  3. Analytical drain current formulation for gate dielectric engineered dual material gate-gate all around-tunneling field effect transistor

    Science.gov (United States)

    Madan, Jaya; Gupta, R. S.; Chaujar, Rishu

    2015-09-01

    In this work, an analytical drain current model for gate dielectric engineered (hetero dielectric)-dual material gate-gate all around tunnel field effect transistor (HD-DMG-GAA-TFET) has been developed. Parabolic approximation has been used to solve the two-dimensional (2D) Poisson equation with appropriate boundary conditions and continuity equations to evaluate analytical expressions for surface potential, electric field, tunneling barrier width and drain current. Further, the analog performance of the device is studied for three high-k dielectrics (Si3N4, HfO2, and ZrO2), and it has been investigated that the problem of lower ION, can be overcome by using the hetero-gate architecture. Moreover, the impact of scaling the gate oxide thickness and bias variations has also been studied. The HD-DMG-GAA-TFET shows an enhanced ION of the order of 10-4 A. The effectiveness of the proposed model is validated by comparing it with ATLAS device simulations.

  4. High-k dielectrics as bioelectronic interface for field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Borstlap, D

    2007-03-15

    Ion-sensitive field-effect transistors (ISFETs) are employed as bioelectronic sensors for the cell-transistor coupling and for the detection of DNA sequences. For these applications, thermally grown SiO{sub 2} films are used as standard gate dielectric. In the first part of this dissertation, the suitability of high-k dielectrics was studied to increase the gate capacitance and hence the signal-to-noise ratio of bioelectronic ISFETs: Upon culturing primary rat neurons on the corresponding high-k dielectrics, Al{sub 2}O{sub 3}, yttria stabilised zirkonia (YSZ), DyScO{sub 3}, CeO{sub 2}, LaAlO{sub 3}, GdScO{sub 3} and LaScO{sub 3} proved to be biocompatible substrates. Comprehensive electrical and electrochemical current-voltage measurements and capacitance-voltage measurements were performed for the determination of the dielectric properties of the high-k dielectrics. In the second part of the dissertation, standard SiO{sub 2} ISFETs with lower input capacitance and high-k dielectric Al{sub 2}O{sub 3}, YSZ und DyScO{sub 3} ISFETs were comprehensively characterised and compared with each other regarding their signal-to-noise ratio, their ion sensitivity and their drift behaviour. The ion sensitivity measurements showed that the YSZ ISFETs were considerably more sensitive to K{sup +} and Na{sup +} ions than the SiO{sub 2}, Al{sub 2}O{sub 3} und DyScO{sub 3} ISFETs. In the final third part of the dissertation, bioelectronic experiments were performed with the high-k ISFETs. The shape of the signals, which were measured from HL-1 cells with YSZ ISFETs, differed considerably from the corresponding measurements with SiO{sub 2} and DyScO{sub 3} ISFETs: After the onset of the K{sup +} current, the action potentials measured with YSZ ISFETs showed a strong drift in the direction opposite to the K{sup +} current signal. First coupling experiments between HEK 293 cells, which were transfected with a K{sup +} ion channel, and YSZ ISFETs affirmed the assumption from the HL-1

  5. High Temperature Terahertz Detectors Realized by a GaN High Electron Mobility Transistor

    Science.gov (United States)

    Hou, H. W.; Liu, Z.; Teng, J. H.; Palacios, T.; Chua, S. J.

    2017-04-01

    In this work, a high temperature THz detector based on a GaN high electron mobility transistor (HEMT) with nano antenna structures was fabricated and demonstrated to be able to work up to 200 °C. The THz responsivity and noise equivalent power (NEP) of the device were characterized at 0.14 THz radiation over a wide temperature range from room temperature to 200 °C. A high responsivity Rv of 15.5 and 2.7 kV/W and a low NEP of 0.58 and 10 pW/Hz0.5 were obtained at room temperature and 200 °C, respectively. The advantages of the GaN HEMT over other types of field effect transistors for high temperature terahertz detection are discussed. The physical mechanisms responsible for the temperature dependence of the responsivity and NEP of the GaN HEMT are also analyzed thoroughly.

  6. Patterning solution-processed organic single-crystal transistors with high device performance

    Directory of Open Access Journals (Sweden)

    Yun Li

    2011-06-01

    Full Text Available We report on the patterning of organic single-crystal transistors with high device performance fabricated via a solution process under ambient conditions. The semiconductor was patterned on substrates via surface selective deposition. Subsequently, solvent-vapor annealing was performed to reorganize the semiconductor into single crystals. The transistors exhibited field-effect mobility (μFET of up to 3.5 cm2/V s. Good reliability under bias-stress conditions indicates low density of intrinsic defects in crystals and low density of traps at the active interfaces. Furthermore, the Y function method clearly suggests that the variation of μFET of organic crystal transistors was caused by contact resistance. Further improvement of the device with higher μFET with smaller variation can be expected when lower and more uniform contact resistance is achieved.

  7. Few-layer molybdenum disulfide transistors and circuits for high-speed flexible electronics

    Science.gov (United States)

    Cheng, Rui; Jiang, Shan; Chen, Yu; Liu, Yuan; Weiss, Nathan; Cheng, Hung-Chieh; Wu, Hao; Huang, Yu; Duan, Xiangfeng

    2014-01-01

    Two-dimensional layered materials, such as molybdenum disulfide, are emerging as an exciting material system for future electronics due to their unique electronic properties and atomically thin geometry. Here we report a systematic investigation of MoS2 transistors with optimized contact and device geometry, to achieve self-aligned devices with performance including an intrinsic gain over 30, an intrinsic cut-off frequency fT up to 42 GHz and a maximum oscillation frequency fMAX up to 50 GHz, exceeding the reported values for MoS2 transistors to date (fT ~ 0.9 GHz, fMAX ~ 1 GHz). Our results show that logic inverters or radio frequency amplifiers can be formed by integrating multiple MoS2 transistors on quartz or flexible substrates with voltage gain in the gigahertz regime. This study demonstrates the potential of two-dimensional layered semiconductors for high-speed flexible electronics. PMID:25295573

  8. Tungsten trioxide as high-{kappa} gate dielectric for highly transparent and temperature-stable zinc-oxide-based thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Lorenz, Michael; Wenckstern, Holger von; Grundmann, Marius [Universitaet Leipzig, Fakultaet fuer Physik und Geowissenschaften, Institut fuer Experimentelle Physik II, Linnestr. 5, 04103 Leipzig (Germany)

    2012-07-01

    We demonstrate metal-insulator-semiconductor field-effect transistors with high-{kappa}, room-temperature deposited, highly transparent tungsten trioxide (WO{sub 3}) as gate dielectric. The channel material consists of a zinc oxide (ZnO) thin-film. The transmittance and resistivity of WO{sub 3} films was tuned in order to obtain a highly transparent and insulating WO{sub 3} dielectric. The devices were processed by standard photolithography using lift-off technique. On top of the WO{sub 3} dielectric a highly transparent and conductive oxide consisting of ZnO: Al 3% wt. was deposited. The gate structure of the devices exhibits an average transmittance in the visible spectral range of 86%. The on/off-current ratio is larger than 10{sup 8} with off- and gate leakage-currents below 3 x 10{sup -8} A/cm{sup 2}. Due to the high relative permittivity of {epsilon}{sub r} {approx} 70, a gate voltage sweep of only 2 V is necessary to turn the transistor on and off with a minimum subthreshold swing of 80 mV/decade. The channel mobility of the transistors equals the Hall-effect mobility with a value of 5 cm{sup 2}/Vs. It is furthermore shown, that the devices are stable up to operating temperatures of at least 150 C.

  9. "Liquid-liquid-solid"-type superoleophobic surfaces to pattern polymeric semiconductors towards high-quality organic field-effect transistors.

    Science.gov (United States)

    Wu, Yuchen; Su, Bin; Jiang, Lei; Heeger, Alan J

    2013-12-03

    Precisely aligned organic-liquid-soluble semiconductor microwire arrays have been fabricated by "liquid-liquid-solid" type superoleophobic surfaces directed fluid drying. Aligned organic 1D micro-architectures can be built as high-quality organic field-effect transistors with high mobilities of >10 cm(2) ·V(-1) ·s(-1) and current on/off ratio of more than 10(6) . All these studies will boost the development of 1D microstructures of organic semiconductor materials for potential application in organic electronics. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. High-performance indium gallium phosphide/gallium arsenide heterojunction bipolar transistors

    Science.gov (United States)

    Ahmari, David Abbas

    Heterojunction bipolar transistors (HBTs) have demonstrated the high-frequency characteristics as well as the high linearity, gain, and power efficiency necessary to make them attractive for a variety of applications. Specific applications for which HBTs are well suited include amplifiers, analog-to-digital converters, current sources, and optoelectronic integrated circuits. Currently, most commercially available HBT-based integrated circuits employ the AlGaAs/GaAs material system in applications such as a 4-GHz gain block used in wireless phones. As modern systems require higher-performance and lower-cost devices, HBTs utilizing the newer, InGaP/GaAs and InP/InGaAs material systems will begin to dominate the HBT market. To enable the widespread use of InGaP/GaAs HBTs, much research on the fabrication, performance, and characterization of these devices is required. This dissertation will discuss the design and implementation of high-performance InGaP/GaAs HBTs as well as study HBT device physics and characterization.

  11. Highly Conductive Graphene/Ag Hybrid Fibers for Flexible Fiber-Type Transistors.

    Science.gov (United States)

    Yoon, Sang Su; Lee, Kang Eun; Cha, Hwa-Jin; Seong, Dong Gi; Um, Moon-Kwang; Byun, Joon-Hyung; Oh, Youngseok; Oh, Joon Hak; Lee, Wonoh; Lee, Jea Uk

    2015-11-09

    Mechanically robust, flexible, and electrically conductive textiles are highly suitable for use in wearable electronic applications. In this study, highly conductive and flexible graphene/Ag hybrid fibers were prepared and used as electrodes for planar and fiber-type transistors. The graphene/Ag hybrid fibers were fabricated by the wet-spinning/drawing of giant graphene oxide and subsequent functionalization with Ag nanoparticles. The graphene/Ag hybrid fibers exhibited record-high electrical conductivity of up to 15,800 S cm(-1). As the graphene/Ag hybrid fibers can be easily cut and placed onto flexible substrates by simply gluing or stitching, ion gel-gated planar transistors were fabricated by using the hybrid fibers as source, drain, and gate electrodes. Finally, fiber-type transistors were constructed by embedding the graphene/Ag hybrid fiber electrodes onto conventional polyurethane monofilaments, which exhibited excellent flexibility (highly bendable and rollable properties), high electrical performance (μh = 15.6 cm(2) V(-1) s(-1), Ion/Ioff > 10(4)), and outstanding device performance stability (stable after 1,000 cycles of bending tests and being exposed for 30 days to ambient conditions). We believe that our simple methods for the fabrication of graphene/Ag hybrid fiber electrodes for use in fiber-type transistors can potentially be applied to the development all-organic wearable devices.

  12. High-performance a-IGZO thin-film transistor with conductive indium-tin-oxide buried layer

    Science.gov (United States)

    Ahn, Min-Ju; Cho, Won-Ju

    2017-10-01

    In this study, we fabricated top-contact top-gate (TCTG) structure of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a thin buried conductive indium-tin oxide (ITO) layer. The electrical performance of a-IGZO TFTs was improved by inserting an ITO buried layer under the IGZO channel. Also, the effect of the buried layer's length on the electrical characteristics of a-IGZO TFTs was investigated. The electrical performance of the transistors improved with increasing the buried layer's length: a large on/off current ratio of 1.1×107, a high field-effect mobility of 35.6 cm2/Vs, a small subthreshold slope of 116.1 mV/dec, and a low interface trap density of 4.2×1011 cm-2eV-1 were obtained. The buried layer a-IGZO TFTs exhibited enhanced transistor performance and excellent stability against the gate bias stress.

  13. High performance low voltage organic field effect transistors on plastic substrate for amplifier circuits

    NARCIS (Netherlands)

    Houin, G.J.R.; Duez, F.; Garcia, L.; Cantatore, E.; Torricelli, F.; Hirsch, L.; Belot, D.; Pellet, C.; Abbas, M.

    2016-01-01

    The high performance air stable organic semiconductor small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) was chosen as active layer for field effect transistors built to realize flexible amplifier circuits. Initial device on rigid Si/SiO2 substrate showed appreciable performance

  14. Monolithic junction field-effect transistor charge preamplifier for calorimetry at high luminosity hadron colliders

    International Nuclear Information System (INIS)

    Radeka, V.; Rescia, S.; Rehn, L.A.; Manfredi, P.F.; Speziali, V.

    1991-11-01

    The outstanding noise and radiation hardness characteristics of epitaxial-channel junction field-effect transistors (JFET) suggest that a monolithic preamplifier based upon them may be able to meet the strict specifications for calorimetry at high luminosity colliders. Results obtained so far with a buried layer planar technology, among them an entire monolithic charge-sensitive preamplifier, are described

  15. The Influence of Morphology on High-Performance Polymer Field-Effect Transistors

    DEFF Research Database (Denmark)

    Tsao, Hoi Nok; Cho, Don; Andreasen, Jens Wenzel

    2009-01-01

    The influence of molecular packing on the performance of polymer organic field-effect transistors is illustrated in this work. Both close -stacking distance and long-range order are important for achieving high mobilities. By aligning the polymers from solution, long-range order is induced...

  16. Direct-current substrate bias effects on amorphous silicon sputter-deposited films for thin film transistor fabrication

    International Nuclear Information System (INIS)

    Jun, Seung-Ik; Rack, Philip D.; McKnight, Timothy E.; Melechko, Anatoli V.; Simpson, Michael L.

    2005-01-01

    The effect that direct current (dc) substrate bias has on radio frequency-sputter-deposited amorphous silicon (a-Si) films has been investigated. The substrate bias produces a denser a-Si film with fewer defects compared to unbiased films. The reduced number of defects results in a higher resistivity because defect-mediated conduction paths are reduced. Thin film transistors (TFTs) that were completely sputter deposited were fabricated and characterized. The TFT with the biased a-Si film showed lower leakage (off-state) current, higher on/off current ratio, and higher transconductance (field effect mobility) than the TFT with the unbiased a-Si film

  17. Analysis of the background noise of field effect transistors in MOS complementary technology and application in the construction of a current-sensitive integrated amplifier

    International Nuclear Information System (INIS)

    Beuville, E.

    1989-10-01

    A low noise amplifier for use in high energy physics is developed. The origin and the mechanisms of the noise in MOSFET transistors is carried out with the aim of minimizing such effects in amplifiers. The research is applied in the construction of a current-sensitive integrated amplifier. The time scale continuous filtering principle is used and allows the detection of particles arriving in the counter in a random distribution. The rules which must be taken into account in the construction of an analog integrated circuit are shown [fr

  18. Towards high frequency heterojunction transistors: Electrical characterization of N-doped amorphous silicon-graphene diodes

    Science.gov (United States)

    Strobel, C.; Chavarin, C. A.; Kitzmann, J.; Lupina, G.; Wenger, Ch.; Albert, M.; Bartha, J. W.

    2017-06-01

    N-type doped amorphous hydrogenated silicon (a-Si:H) is deposited on top of graphene (Gr) by means of very high frequency (VHF) and radio frequency plasma-enhanced chemical vapor deposition (PECVD). In order to preserve the structural integrity of the monolayer graphene, a plasma excitation frequency of 140 MHz was successfully applied during the a-Si:H VHF-deposition. Raman spectroscopy results indicate the absence of a defect peak in the graphene spectrum after the VHF-PECVD of (n)-a-Si:H. The diode junction between (n)-a-Si:H and graphene was characterized using temperature dependent current-voltage (IV) and capacitance-voltage measurements, respectively. We demonstrate that the current at the (n)-a-Si:H-graphene interface is dominated by thermionic emission and recombination in the space charge region. The Schottky barrier height (qΦB), derived by temperature dependent IV-characteristics, is about 0.49 eV. The junction properties strongly depend on the applied deposition method of (n)-a-Si:H with a clear advantage of the VHF(140 MHz)-technology. We have demonstrated that (n)-a-Si:H-graphene junctions are a promising technology approach for high frequency heterojunction transistors.

  19. Piezotronic effect tuned AlGaN/GaN high electron mobility transistor

    Science.gov (United States)

    Jiang, Chunyan; Liu, Ting; Du, Chunhua; Huang, Xin; Liu, Mengmeng; Zhao, Zhenfu; Li, Linxuan; Pu, Xiong; Zhai, Junyi; Hu, Weiguo; Wang, Zhong Lin

    2017-11-01

    The piezotronic effect utilizes strain-induced piezoelectric polarization charges to tune the carrier transportation across the interface/junction. We fabricated a high-performance AlGaN/GaN high electron mobility transistor (HEMT), and the transport property was proven to be enhanced by applying an external stress for the first time. The enhanced source-drain current was also observed at any gate voltage and the maximum enhancement of the saturation current was up to 21% with 15 N applied stress (0.18 GPa at center) at -1 V gate voltage. The physical mechanism of HEMT with/without external compressive stress conditions was carefully illustrated and further confirmed by a self-consistent solution of the Schrödinger-Poisson equations. This study proves the cause-and-effect relationship between the piezoelectric polarization effect and 2D electron gas formation, which provides a tunable solution to enhance the device performance. The strain tuned HEMT has potential applications in human-machine interface and the security control of the power system.

  20. High-performance integrated field-effect transistor-based sensors

    Energy Technology Data Exchange (ETDEWEB)

    Adzhri, R., E-mail: adzhri@gmail.com [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Md Arshad, M.K., E-mail: mohd.khairuddin@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); School of Microelectronic Engineering (SoME), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Gopinath, Subash C.B., E-mail: subash@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); School of Bioprocess Engineering (SBE), Universiti Malaysia Perlis (UniMAP), Arau, Perlis (Malaysia); Ruslinda, A.R., E-mail: ruslinda@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Fathil, M.F.M., E-mail: faris.fathil@gmail.com [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Ayub, R.M., E-mail: ramzan@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Nor, M. Nuzaihan Mohd, E-mail: m.nuzaihan@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Voon, C.H., E-mail: chvoon@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia)

    2016-04-21

    Field-effect transistors (FETs) have succeeded in modern electronics in an era of computers and hand-held applications. Currently, considerable attention has been paid to direct electrical measurements, which work by monitoring changes in intrinsic electrical properties. Further, FET-based sensing systems drastically reduce cost, are compatible with CMOS technology, and ease down-stream applications. Current technologies for sensing applications rely on time-consuming strategies and processes and can only be performed under recommended conditions. To overcome these obstacles, an overview is presented here in which we specifically focus on high-performance FET-based sensor integration with nano-sized materials, which requires understanding the interaction of surface materials with the surrounding environment. Therefore, we present strategies, material depositions, device structures and other characteristics involved in FET-based devices. Special attention was given to silicon and polyaniline nanowires and graphene, which have attracted much interest due to their remarkable properties in sensing applications. - Highlights: • Performance of FET-based biosensors for the detection of biomolecules is presented. • Silicon nanowire, polyaniline and graphene are the highlighted nanoscaled materials as sensing transducers. • The importance of surface material interaction with the surrounding environment is discussed. • Different device structure architectures for ease in fabrication and high sensitivity of sensing are presented.

  1. High-performance integrated field-effect transistor-based sensors

    International Nuclear Information System (INIS)

    Adzhri, R.; Md Arshad, M.K.; Gopinath, Subash C.B.; Ruslinda, A.R.; Fathil, M.F.M.; Ayub, R.M.; Nor, M. Nuzaihan Mohd; Voon, C.H.

    2016-01-01

    Field-effect transistors (FETs) have succeeded in modern electronics in an era of computers and hand-held applications. Currently, considerable attention has been paid to direct electrical measurements, which work by monitoring changes in intrinsic electrical properties. Further, FET-based sensing systems drastically reduce cost, are compatible with CMOS technology, and ease down-stream applications. Current technologies for sensing applications rely on time-consuming strategies and processes and can only be performed under recommended conditions. To overcome these obstacles, an overview is presented here in which we specifically focus on high-performance FET-based sensor integration with nano-sized materials, which requires understanding the interaction of surface materials with the surrounding environment. Therefore, we present strategies, material depositions, device structures and other characteristics involved in FET-based devices. Special attention was given to silicon and polyaniline nanowires and graphene, which have attracted much interest due to their remarkable properties in sensing applications. - Highlights: • Performance of FET-based biosensors for the detection of biomolecules is presented. • Silicon nanowire, polyaniline and graphene are the highlighted nanoscaled materials as sensing transducers. • The importance of surface material interaction with the surrounding environment is discussed. • Different device structure architectures for ease in fabrication and high sensitivity of sensing are presented.

  2. High Magnetic Field in THz Plasma Wave Detection by High Electron Mobility Transistors

    Science.gov (United States)

    Sakowicz, M.; Łusakowski, J.; Karpierz, K.; Grynberg, M.; Valusis, G.

    The role of gated and ungated two dimensional (2D) electron plasma in THz detection by high electron mobility transistors (HEMTs) was investigated. THz response of GaAs/AlGaAs and GaN/AlGaN HEMTs was measured at 4.4K in quantizing magnetic fields with a simultaneous modulation of the gate voltage UGS. This allowed us to measure both the detection signal, S, and its derivative dS/dUGS. Shubnikov - de-Haas oscillations (SdHO) of both S and dS/dUGS were observed. A comparison of SdHO observed in detection and magnetoresistance measurements allows us to associate unambiguously SdHO in S and dS/dUGS with the ungated and gated parts of the transistor channel, respectively. This allows us to conclude that the entire channel takes part in the detection process. Additionally, in the case of GaAlAs/GaAs HEMTs, a structure related to the cyclotron resonance transition was observed.

  3. Controllable film densification and interface flatness for high-performance amorphous indium oxide based thin film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Ou-Yang, Wei, E-mail: OUYANG.Wei@nims.go.jp, E-mail: TSUKAGOSHI.Kazuhito@nims.go.jp; Mitoma, Nobuhiko; Kizu, Takio; Gao, Xu; Lin, Meng-Fang; Tsukagoshi, Kazuhito, E-mail: OUYANG.Wei@nims.go.jp, E-mail: TSUKAGOSHI.Kazuhito@nims.go.jp [International Center for Materials Nanoarchitectronics (WPI-MANA), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Nabatame, Toshihide [MANA Foundry and MANA Advanced Device Materials Group, National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan)

    2014-10-20

    To avoid the problem of air sensitive and wet-etched Zn and/or Ga contained amorphous oxide transistors, we propose an alternative amorphous semiconductor of indium silicon tungsten oxide as the channel material for thin film transistors. In this study, we employ the material to reveal the relation between the active thin film and the transistor performance with aid of x-ray reflectivity study. By adjusting the pre-annealing temperature, we find that the film densification and interface flatness between the film and gate insulator are crucial for achieving controllable high-performance transistors. The material and findings in the study are believed helpful for realizing controllable high-performance stable transistors.

  4. AlGaN/GaN High Electron Mobility Transistors with Multi-MgxNy/GaN Buffer

    OpenAIRE

    Chang, P. C.; Lee, K. H.; Wang, Z. H.; Chang, S. J.

    2014-01-01

    We report the fabrication of AlGaN/GaN high electron mobility transistors with multi-MgxNy/GaN buffer. Compared with conventional HEMT devices with a low-temperature GaN buffer, smaller gate and source-drain leakage current could be achieved with this new buffer design. Consequently, the electron mobility was larger for the proposed device due to the reduction of defect density and the corresponding improvement of crystalline quality as result of using the multi-MgxNy/GaN buffer.

  5. AlGaN/GaN High Electron Mobility Transistors with Multi-MgxNy/GaN Buffer

    Directory of Open Access Journals (Sweden)

    P. C. Chang

    2014-01-01

    Full Text Available We report the fabrication of AlGaN/GaN high electron mobility transistors with multi-MgxNy/GaN buffer. Compared with conventional HEMT devices with a low-temperature GaN buffer, smaller gate and source-drain leakage current could be achieved with this new buffer design. Consequently, the electron mobility was larger for the proposed device due to the reduction of defect density and the corresponding improvement of crystalline quality as result of using the multi-MgxNy/GaN buffer.

  6. Controllable electrical properties of metal-doped In2O3 nanowires for high-performance enhancement-mode transistors.

    Science.gov (United States)

    Zou, Xuming; Liu, Xingqiang; Wang, Chunlan; Jiang, Ying; Wang, Yong; Xiao, Xiangheng; Ho, Johnny C; Li, Jinchai; Jiang, Changzhong; Xiong, Qihua; Liao, Lei

    2013-01-22

    In recent years, In(2)O(3) nanowires (NWs) have been widely explored in many technological areas due to their excellent electrical and optical properties; however, most of these devices are based on In(2)O(3) NW field-effect transistors (FETs) operating in the depletion mode, which induces relatively higher power consumption and fancier circuit integration design. Here, n-type enhancement-mode In(2)O(3) NW FETs are successfully fabricated by doping different metal elements (Mg, Al, and Ga) in the NW channels. Importantly, the resulting threshold voltage can be effectively modulated through varying the metal (Mg, Ga, and Al) content in the NWs. A series of scaling effects in the mobility, transconductance, threshold voltage, and source-drain current with respect to the device channel length are also observed. Specifically, a small gate delay time (0.01 ns) and high on-current density (0.9 mA/μm) are obtained at 300 nm channel length. Furthermore, Mg-doped In(2)O(3) NWs are then employed to fabricate NW parallel array FETs with a high saturation current (0.5 mA), on/off ratio (>10(9)), and field-effect mobility (110 cm(2)/V·s), while the subthreshold slope and threshold voltage do not show any significant changes. All of these results indicate the great potency for metal-doped In(2)O(3) NWs used in the low-power, high-performance thin-film transistors.

  7. Isolated photosystem I reaction centers on a functionalized gated high electron mobility transistor.

    Science.gov (United States)

    Eliza, Sazia A; Lee, Ida; Tulip, Fahmida S; Mostafa, Salwa; Greenbaum, Elias; Ericson, M Nance; Islam, Syed K

    2011-09-01

    In oxygenic plants, photons are captured with high quantum efficiency by two specialized reaction centers (RC) called Photosystem I (PS I) and Photosystem II (PS II). The captured photon triggers rapid charge separation and the photon energy is converted into an electrostatic potential across the nanometer-scale (~6 nm) reaction centers. The exogenous photovoltages from a single PS I RC have been previously measured using the technique of Kelvin force probe microscopy (KFM). However, biomolecular photovoltaic applications require two-terminal devices. This paper presents for the first time, a micro-device for detection and characterization of isolated PS I RCs. The device is based on an AlGaN/GaN high electron mobility transistor (HEMT) structure. AlGaN/GaN HEMTs show high current throughputs and greater sensitivity to surface charges compared to other field-effect devices. PS I complexes immobilized on the floating gate of AlGaN/GaN HEMTs resulted in significant changes in the device characteristics under illumination. An analytical model has been developed to estimate the RCs of a major orientation on the functionalized gate surface of the HEMTs. © 2011 IEEE

  8. Isolated Photosystem I Reaction Centers on a Functionalized Gated High Electron Mobility Transistor

    Energy Technology Data Exchange (ETDEWEB)

    Eliza, Sazia A. [University of Tennessee, Knoxville (UTK); Lee, Ida [ORNL; Tulip, Fahmida S [ORNL; Islam, Syed K [University of Tennessee, Knoxville (UTK); Mostafa, Salwa [University of Tennessee, Knoxville (UTK); Greenbaum, Elias [ORNL; Ericson, Milton Nance [ORNL

    2011-01-01

    In oxygenic plants, photons are captured with high quantum efficiency by two specialized reaction centers (RC) called Photosystem I (PS I) and Photosystem II (PS II). The captured photon triggers rapid charge separation and the photon energy is converted into an electrostatic potential across the nanometer-scale nm reaction centers. The exogenous photovoltages from a single PS I RC have been previously measured using the technique of Kelvin force probe microscopy (KFM). However, biomolecular photovoltaic applications require two-terminal devices. This paper presents for the first time, a micro-device for detection and characterization of isolated PS I RCs. The device is based on an AlGaN/GaN high electron mobility transistor (HEMT) structure. AlGaN/GaN HEMTs show high current throughputs and greater sensitivity to surface charges compared to other field-effect devices. PS I complexes immobilized on the floating gate of AlGaN/GaN HEMTs resulted in significant changes in the device characteristics under illumination. An analytical model has been developed to estimate the RCs of a major orientation on the functionalized gate surface of the HEMTs.

  9. Influence of trap-assisted tunneling on trap-assisted tunneling current in double gate tunnel field-effect transistor

    Science.gov (United States)

    Zhi, Jiang; Yi-Qi, Zhuang; Cong, Li; Ping, Wang; Yu-Qi, Liu

    2016-02-01

    Trap-assisted tunneling (TAT) has attracted more and more attention, because it seriously affects the sub-threshold characteristic of tunnel field-effect transistor (TFET). In this paper, we assess subthreshold performance of double gate TFET (DG-TFET) through a band-to-band tunneling (BTBT) model, including phonon-assisted scattering and acoustic surface phonons scattering. Interface state density profile (Dit) and the trap level are included in the simulation to analyze their effects on TAT current and the mechanism of gate leakage current. Project supported by the National Natural Science Foundation of China (Grant Nos. 61574109 and 61204092).

  10. Influence of trap-assisted tunneling on trap-assisted tunneling current in double gate tunnel field-effect transistor

    International Nuclear Information System (INIS)

    Jiang Zhi; Zhuang Yi-Qi; Li Cong; Wang Ping; Liu Yu-Qi

    2016-01-01

    Trap-assisted tunneling (TAT) has attracted more and more attention, because it seriously affects the sub-threshold characteristic of tunnel field-effect transistor (TFET). In this paper, we assess subthreshold performance of double gate TFET (DG-TFET) through a band-to-band tunneling (BTBT) model, including phonon-assisted scattering and acoustic surface phonons scattering. Interface state density profile (D it ) and the trap level are included in the simulation to analyze their effects on TAT current and the mechanism of gate leakage current. (paper)

  11. Vertical organic transistors

    International Nuclear Information System (INIS)

    Lüssem, Björn; Günther, Alrun; Fischer, Axel; Kasemann, Daniel; Leo, Karl

    2015-01-01

    Organic switching devices such as field effect transistors (OFETs) are a key element of future flexible electronic devices. So far, however, a commercial breakthrough has not been achieved because these devices usually lack in switching speed (e.g. for logic applications) and current density (e.g. for display pixel driving). The limited performance is caused by a combination of comparatively low charge carrier mobilities and the large channel length caused by the need for low-cost structuring. Vertical Organic Transistors are a novel technology that has the potential to overcome these limitations of OFETs. Vertical Organic Transistors allow to scale the channel length of organic transistors into the 100 nm regime without cost intensive structuring techniques. Several different approaches have been proposed in literature, which show high output currents, low operation voltages, and comparatively high speed even without sub-μm structuring technologies. In this review, these different approaches are compared and recent progress is highlighted. (topical review)

  12. Protonic transistors from thin reflecting films

    Energy Technology Data Exchange (ETDEWEB)

    Ordinario, David D.; Phan, Long; Jocson, Jonah-Micah [Department of Chemical Engineering and Materials Science, University of California, Irvine, California 92697 (United States); Nguyen, Tam [Department of Chemistry, University of California, Irvine, California 92697 (United States); Gorodetsky, Alon A., E-mail: alon.gorodetsky@uci.edu [Department of Chemical Engineering and Materials Science, University of California, Irvine, California 92697 (United States); Department of Chemistry, University of California, Irvine, California 92697 (United States)

    2015-01-01

    Ionic transistors from organic and biological materials hold great promise for bioelectronics applications. Thus, much research effort has focused on optimizing the performance of these devices. Herein, we experimentally validate a straightforward strategy for enhancing the high to low current ratios of protein-based protonic transistors. Upon reducing the thickness of the transistors’ active layers, we increase their high to low current ratios 2-fold while leaving the other figures of merit unchanged. The measured ratio of 3.3 is comparable to the best values found for analogous devices. These findings underscore the importance of the active layer geometry for optimum protonic transistor functionality.

  13. Multiple-channel detection of cellular activities by ion-sensitive transistors

    Science.gov (United States)

    Machida, Satoru; Shimada, Hideto; Motoyama, Yumi

    2018-04-01

    An ion-sensitive field-effect transistor to record cellular activities was demonstrated. This field-effect transistor (bio transistor) includes cultured cells on the gate insulator instead of gate electrode. The bio transistor converts a change in potential underneath the cells into variation of the drain current when ion channels open. The bio transistor has high detection sensitivity to even minute variations in potential utilizing a subthreshold swing region. To open ion channels, a reagent solution (acetylcholine) was added to a human-originating cell cultured on the bio transistor. The drain current was successfully decreased with the addition of acetylcholine. Moreover, we attempted to detect the opening of ion channels using a multiple-channel measurement circuit containing several bio transistors. As a consequence, the drain current distinctly decreased only after the addition of acetylcholine. We confirmed that this measurement system including bio transistors enables to observation of cellular activities sensitively and simultaneously.

  14. High total dose proton irradiation effects on silicon NPN rf power transistors

    International Nuclear Information System (INIS)

    Bharathi, M. N.; Praveen, K. C.; Prakash, A. P. Gnana; Pushpa, N.

    2014-01-01

    The effects of 3 MeV proton irradiation on the I-V characteristics of NPN rf power transistors were studied in the dose range of 100 Krad to 100 Mrad. The different electrical characteristics like Gummel, current gain and output characteristics were systematically studied before and after irradiation. The recovery in the I-V characteristics of irradiated NPN BJTs were studied by isochronal and isothermal annealing methods

  15. High total dose proton irradiation effects on silicon NPN rf power transistors

    Energy Technology Data Exchange (ETDEWEB)

    Bharathi, M. N.; Praveen, K. C.; Prakash, A. P. Gnana, E-mail: gnanaprakash@physics.uni-mysore.ac.in [Department of Studies in Physics, University of Mysore, Manasagangotri, Mysore-570006, Karnataka (India); Pushpa, N. [Department of PG Studies in Physics, JSS College, Ooty Road, Mysore-570025, Karnataka (India)

    2014-04-24

    The effects of 3 MeV proton irradiation on the I-V characteristics of NPN rf power transistors were studied in the dose range of 100 Krad to 100 Mrad. The different electrical characteristics like Gummel, current gain and output characteristics were systematically studied before and after irradiation. The recovery in the I-V characteristics of irradiated NPN BJTs were studied by isochronal and isothermal annealing methods.

  16. Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

    Energy Technology Data Exchange (ETDEWEB)

    Held, Martin; Schießl, Stefan P.; Gannott, Florentina [Department of Materials Science and Engineering, Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen D-91058 (Germany); Institute for Physical Chemistry, Universität Heidelberg, Heidelberg D-69120 (Germany); Miehler, Dominik [Department of Materials Science and Engineering, Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen D-91058 (Germany); Zaumseil, Jana, E-mail: zaumseil@uni-heidelberg.de [Institute for Physical Chemistry, Universität Heidelberg, Heidelberg D-69120 (Germany)

    2015-08-24

    Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.

  17. High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors

    KAUST Repository

    Huang, Ruo-Gu; Tham, Douglas; Wang, Dunwei; Heath, James R.

    2011-01-01

    We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.

  18. High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors

    KAUST Repository

    Huang, Ruo-Gu

    2011-06-24

    We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.

  19. A Robust Highly Aligned DNA Nanowire Array-Enabled Lithography for Graphene Nanoribbon Transistors.

    Science.gov (United States)

    Kang, Seok Hee; Hwang, Wan Sik; Lin, Zhiqun; Kwon, Se Hun; Hong, Suck Won

    2015-12-09

    Because of its excellent charge carrier mobility at the Dirac point, graphene possesses exceptional properties for high-performance devices. Of particular interest is the potential use of graphene nanoribbons or graphene nanomesh for field-effect transistors. Herein, highly aligned DNA nanowire arrays were crafted by flow-assisted self-assembly of a drop of DNA aqueous solution on a flat polymer substrate. Subsequently, they were exploited as "ink" and transfer-printed on chemical vapor deposited (CVD)-grown graphene substrate. The oriented DNA nanowires served as the lithographic resist for selective removal of graphene, forming highly aligned graphene nanoribbons. Intriguingly, these graphene nanoribbons can be readily produced over a large area (i.e., millimeter scale) with a high degree of feature-size controllability and a low level of defects, rendering the fabrication of flexible two terminal devices and field-effect transistors.

  20. Germanium field-effect transistor made from a high-purity substrate

    International Nuclear Information System (INIS)

    Hansen, W.L.; Goulding, F.S.; Haller, E.E.

    1978-11-01

    Field effect transistors have been fabricated on high-purity germanium substrates using low-temperature technology. The aim of this work is to preserve the low density of trapping centers in high-quality starting material by low-temperature ( 0 C) processing. The use of germanium promises to eliminate some of the traps which cause generation-recombination noise in silicon field-effect transistors (FET's) at low temperatures. Typically, the transconductance (g/sub m/) in the germanium FET's is 10 mA/V and the gate leakage can be less than 10 -12 A. Present devices exhibit a large 1/f noise component and most of this noise must be eliminated if they are to be competitive with silicon FET's commonly used in high-resolution nuclear spectrometers

  1. Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

    KAUST Repository

    Hanna, Amir

    2015-12-04

    High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high performance in material agnostic way. We further demonstrate digital logic NAND circuit using the WC architecture and compare it to the conventional planar architecture. The WC architecture circuits have shown 2× higher peak-to-peak output voltage for the same input voltage. They also have 3× lower high-to-low propagation delay times, respectively, when compared to the planar architecture. The performance enhancement is attributed to both extra device width and enhanced field effect mobility due to higher gate field electrostatics control.

  2. High-performance ambipolar self-assembled Au/Ag nanowire based vertical quantum dot field effect transistor.

    Science.gov (United States)

    Song, Xiaoxian; Zhang, Yating; Zhang, Haiting; Yu, Yu; Cao, Mingxuan; Che, Yongli; Wang, Jianlong; Dai, Haitao; Yang, Junbo; Ding, Xin; Yao, Jianquan

    2016-10-07

    Most lateral PbSe quantum dot field effect transistors (QD FETs) show a low on current/off current (I on/I off) ratio in charge transport measurements. A new strategy to provide generally better performance is to design PbSe QD FETs with vertical architecture, in which the structure parameters can be tuned flexibly. Here, we fabricated a novel room-temperature operated vertical quantum dot field effect transistor with a channel of 580 nm, where self-assembled Au/Ag nanowires served as source transparent electrodes and PbSe quantum dots as active channels. Through investigating the electrical characterization, the ambipolar device exhibited excellent characteristics with a high I on/I off current ratio of about 1 × 10(5) and a low sub-threshold slope (0.26 V/decade) in the p-type regime. The all-solution processing vertical architecture provides a convenient way for low cost, large-area integration of the device.

  3. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    International Nuclear Information System (INIS)

    Lin, Y. H.; Chou, J. C.

    2015-01-01

    We investigated amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT_s) using different high-Κ gate dielectric materials such as silicon nitride (Si_3N_4) and aluminum oxide (Al_2O_3) at low temperature process (<300 degree) and compared them with low temperature silicon dioxide (SiO_2). The IGZO device with high-Κ gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, post annealing treatment is an essential process for completing the process. The chemical reaction of the high-κ/IGZO interface due to heat formation in high-Κ/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-Κ gate dielectric materials and explained the interface effect by charge band diagram.

  4. Sub-bandgap photonic base current method for characterization of interface states at heterointerfaces in heterojunction bipolar transistors

    International Nuclear Information System (INIS)

    Shin, H. T.; Kim, K. H.; Kim, K. S.

    2004-01-01

    In this paper, we propose a novel photonic base current analysis method to characterize the interface states in heterojunction bipolar transistors (HBTs) by using the photonic I-V characteristics under sub-bandgap photonic excitation. For the photonic current-voltage characterization of HBTs, an optical source with a photon energy less than the bandgap energy of Al 0.3 Ga 0.7 As and GaAs (E ph = 0.95 eV g,AlGaAs = 1.79 eV, E g,GaAs = 1.45 eV) is employed for the characterization of the interface states distributed in the photo-responsive energy band (E C - 0.95 ≤ E it ≤ E C ) in emitter-base heterojunction at HBTs. The proposed novel method, which is applied to bipolar junction transistors for the first time, is simple, and an accurate analysis of interface traps in HBTs is possible. By using the photonic base-current and the dark-base-current, we qualitatively analyze the interface trap at the Al 0.3 Ga 0.7 As/GaAs heterojunction interface in HBTs.

  5. Current gain above 10 in sub-10 nm base III-Nitride tunneling hot electron transistors with GaN/AlN emitter

    Energy Technology Data Exchange (ETDEWEB)

    Yang, Zhichao, E-mail: zcyang.phys@gmail.com; Zhang, Yuewei; Krishnamoorthy, Sriram; Nath, Digbijoy N. [Department of Electrical and Computer Engineering, The Ohio State University, Columbus, Ohio 43210 (United States); Khurgin, Jacob B. [Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, Maryland 21218 (United States); Rajan, Siddharth [Department of Electrical and Computer Engineering, The Ohio State University, Columbus, Ohio 43210 (United States); Department of Materials Science and Engineering, The Ohio State University, Columbus, Ohio 43210 (United States)

    2016-05-09

    We report on a tunneling hot electron transistor amplifier with common-emitter current gain greater than 10 at a collector current density in excess of 40 kA/cm{sup 2}. The use of a wide-bandgap GaN/AlN (111 nm/2.5 nm) emitter was found to greatly improve injection efficiency of the emitter and reduce cold electron leakage. With an ultra-thin (8 nm) base, 93% of the injected hot electrons were collected, enabling a common-emitter current gain up to 14.5. This work improves understanding of the quasi-ballistic hot electron transport and may impact the development of high speed devices based on unipolar hot electron transport.

  6. Leakage current suppression with a combination of planarized gate and overlap/off-set structure in metal-induced laterally crystallized polycrystalline-silicon thin-film transistors

    Science.gov (United States)

    Chae, Hee Jae; Seok, Ki Hwan; Lee, Sol Kyu; Joo, Seung Ki

    2018-04-01

    A novel inverted staggered metal-induced laterally crystallized (MILC) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) with a combination of a planarized gate and an overlap/off-set at the source-gate/drain-gate structure were fabricated and characterized. While the MILC process is advantageous for fabricating inverted staggered poly-Si TFTs, MILC TFTs reveal higher leakage current than TFTs crystallized by other processes due to their high trap density of Ni contamination. Due to this drawback, the planarized gate and overlap/off-set structure were applied to inverted staggered MILC TFTs. The proposed device shows drastic suppression of leakage current and pinning phenomenon by reducing the lateral electric field and the space-charge limited current from the gate to the drain.

  7. Materials and devices with applications in high-end organic transistors

    International Nuclear Information System (INIS)

    Takeya, J.; Uemura, T.; Sakai, K.; Okada, Y.

    2014-01-01

    The development of functional materials typically benefits from an understanding of the microscopic mechanisms by which those materials operate. To accelerate the development of organic semiconductor devices with industrial applications in flexible and printed electronics, it is essential to elucidate the mechanisms of charge transport associated with molecular-scale charge transfer. In this study, we employed Hall effect measurements to differentiate coherent band transport from site-to-site hopping. The results of tests using several different molecular systems as the active semiconductor layers demonstrate that high-mobility charge transport in recently-developed solution-crystallized organic transistors is the result of a band-like mechanism. These materials, which have the potential to be organic transistors exhibiting the highest speeds ever obtained, are significantly different from the conventional lower-mobility organic semiconductors with incoherent hopping-like transport mechanisms which were studied in the previous century. They may be categorized as “high-end” organic semiconductors, characterized by their coherent electronic states and high values of mobility which are close to or greater than 10 cm 2 /Vs. - Highlights: • Transport in high-mobility solution-crystallized organic transistors is band-like. • High-end organic semiconductors carry coherent electrons with mobility > 10 cm 2 /Vs. • Hall-effect measurement differentiates coherent band transport from hopping. • We found an anomalous pressure effect in organic semiconductors

  8. Pentacene-Based Thin Film Transistor with Inkjet-Printed Nanocomposite High-K Dielectrics

    Directory of Open Access Journals (Sweden)

    Chao-Te Liu

    2012-01-01

    Full Text Available The nanocomposite gate insulating film of a pentacene-based thin film transistor was deposited by inkjet printing. In this study, utilizing the pearl miller to crumble the agglomerations and the dispersant to well stabilize the dispersion of nano-TiO2 particles in the polymer matrix of the ink increases the dose concentration for pico-jetting, which could be as the gate dielectric film made by inkjet printing without the photography process. Finally, we realized top contact pentacene-TFTs and successfully accomplished the purpose of directly patternability and increase the performance of the device based on the nanocomposite by inkjet printing. These devices exhibited p-channel TFT characteristics with a high field-effect mobility (a saturation mobility of ̃0.58 cm2 V−1 s−1, a large current ratio (>103 and a low operation voltage (<6 V. Furthermore, we accorded the deposited mechanisms which caused the interface difference between of inkjet printing and spin coating. And we used XRD, SEM, Raman spectroscopy to help us analyze the transfer characteristics of pentacene films and the performance of OTFTs.

  9. Suppression of photo-leakage current in amorphous silicon thin-film transistors by n-doped nanocrystalline silicon

    International Nuclear Information System (INIS)

    Lin, Hung-Chien; Ho, King-Yuan; Hsu, Chih-Chieh; Yan, Jing-Yi; Ho, Jia-Chong

    2011-01-01

    The reduction of photo-leakage current of amorphous silicon thin-film transistors (a-Si TFTs) is investigated and is found to be successfully suppressed by the use of an n-doped nanocrystalline silicon layer (n+ nc-Si) as an ohmic contact layer. The shallow-level defects of n+ nc-Si can become trapping centres of photo-induced electrons as the a-Si TFT is operated under light illumination. A lower oxygen concentration during n+ nc-Si deposition can increase the creation of shallow-level defects and improve the contrast ratio of active matrix organic light-emitting diode panels.

  10. Investigation on pseudomorphic InGaAs/InAlAs/InP High Electron Mobility Transistors with regard to cryogenic applications

    International Nuclear Information System (INIS)

    Toennesmann, A.

    2003-03-01

    A wide variety of new data communication applications demand ever-increasing transmission capacities. The InGaAs/InAlAs/InP layer stack based high electron mobility transistor (HEMT) is currently regarded as the most promising active device in communication systems as it has the highest cut-off frequencies of all transistor types. Due to reduced phonon scattering of the charge carriers, the HEMT is expected to exhibit even better noise and high frequency characteristics for operations at cryogenic temperatures, for instance in mixers or oscillators located in satellites or ground based systems with appropriate cooling equipment. This work focuses on the reduction of access resistances and the fabrication of very short gate lengths as the biggest technological challenges realizing highest cut-off frequencies at any temperature. In addition, the reproducibility and robustness of the implemented gate technologies are fundamental criteria for applications. In comparison to other transistor designs, the InAlAs/InGaAs HEMTs are stronger affected by undesirable, partly material dependent, short channel effects like early breakdown, high gate currents, impact ionization, the kink effect, and a shift in the threshold voltage. Measurements at liquid nitrogen temperature on transistors produced in this work provide further insight into the poorly understood interrelationship between these effects. At liquid nitrogen temperature, the cut-off frequency of 180 GHz and the maximum oscillation frequency of 300 GHz of short channel transistors at room temperature increase by 20% and 30%, respectively, while the breakdown voltage remains at high values above 8 V. (orig.)

  11. Solution-processable precursor route for fabricating ultrathin silica film for high performance and low voltage organic transistors

    Institute of Scientific and Technical Information of China (English)

    Shujing Guo; Liqiang Li; Zhongwu Wang; Zeyang Xu; Shuguang Wang; Kunjie Wu; Shufeng Chen; Zongbo Zhang; Caihong Xu; Wenfeng Qiu

    2017-01-01

    Silica is one of the most commonly used materials for dielectric layer in organic thin-film transistors due to its excellent stability,excellent electrical properties,mature preparation process,and good compatibility with organic semiconductors.However,most of conventional preparation methods for silica film are generally performed at high temperature and/or high vacuum.In this paper,we introduce a simple solution spin-coating method to fabricate silica thin film from precursor route,which possesses a low leakage current,high capacitance,and low surface roughness.The silica thin film can be produced in the condition of low temperature and atmospheric environment.To meet various demands,the thickness of film can be adjusted by means of preparation conditions such as the speed of spin-coating and the concentration of solution.The p-type and n-type organic field effect transistors fabricated by using this film as gate electrodes exhibit excellent electrical performance including low voltage and high performance.This method shows great potential for industrialization owing to its characteristic of low consumption and energy saving,time-saving and easy to operate.

  12. Diketopyrrolopyrrole-diketopyrrolopyrrole-based conjugated copolymer for high-mobility organic field-effect transistors

    KAUST Repository

    Kanimozhi, Catherine K.

    2012-10-10

    In this communication, we report the synthesis of a novel diketopyrrolopyrrole-diketopyrrolopyrrole (DPP-DPP)-based conjugated copolymer and its application in high-mobility organic field-effect transistors. Copolymerization of DPP with DPP yields a copolymer with exceptional properties such as extended absorption characteristics (up to ∼1100 nm) and field-effect electron mobility values of >1 cm 2 V -1 s -1. The synthesis of this novel DPP-DPP copolymer in combination with the demonstration of transistors with extremely high electron mobility makes this work an important step toward a new family of DPP-DPP copolymers for application in the general area of organic optoelectronics. © 2012 American Chemical Society.

  13. Characteristics in AlN/AlGaN/GaN Multilayer-Structured High-Electron-Mobility Transistors

    International Nuclear Information System (INIS)

    Gui-Zhou, Hu; Ling, Yang; Li-Yuan, Yang; Si, Quan; Shou-Gao, Jiang; Ji-Gang, Ma; Xiao-Hua, Ma; Yue, Hao

    2010-01-01

    A new multilayer-structured AlN/AlGaN/GaN heterostructure high-electron-mobility transistor (HEMT) is demonstrated. The AlN/AlGaN/GaN HEMT exhibits the maximum drain current density of 800 mA/mm and the maximum extrinsic transconductance of 170 mS/mm. Due to the increase of the distance between the gate and the two-dimensional electron-gas channel, the threshold voltage shifts slightly to the negative. The reduced drain current collapse and higher breakdown voltage are observed on this AlN/AlGaN/GaN HEMT. The current gain cut-off frequency and the maximum frequency of oscillation are 18.5 GHz and 29.0 GHz, respectively. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  14. Ultrasensitive detection of Hg{sup 2+} using oligonucleotide-functionalized AlGaN/GaN high electron mobility transistor

    Energy Technology Data Exchange (ETDEWEB)

    Cheng, Junjie [Key Laboratory of Ion Beam Bioengineering, Hefei Institutes of Physical Science, Chinese Academy of Sciences, Hefei 230031 (China); Division of Nanobiomedicine, Key Laboratory for Nano-Bio Interface Research, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215123 (China); Li, Jiadong; Miao, Bin; Wu, Dongmin, E-mail: dmwu2008@sinano.ac.cn [i-Lab, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215125 (China); Key Laboratory of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215123 (China); Wang, Jine; Pei, Renjun, E-mail: rjpei2011@sinano.ac.cn [Division of Nanobiomedicine, Key Laboratory for Nano-Bio Interface Research, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215123 (China); Wu, Zhengyan, E-mail: zywu@ipp.ac.cn [Key Laboratory of Ion Beam Bioengineering, Hefei Institutes of Physical Science, Chinese Academy of Sciences, Hefei 230031 (China)

    2014-08-25

    An oligonucleotide-functionalized ion sensitive AlGaN/GaN high electron mobility transistor (HEMT) was fabricated to detect trace amounts of Hg{sup 2+}. The advantages of ion sensitive AlGaN/GaN HEMT and highly specific binding interaction between Hg{sup 2+} and thymines were combined. The current response of this Hg{sup 2+} ultrasensitive transistor was characterized. The current increased due to the accumulation of Hg{sup 2+} ions on the surface by the highly specific thymine-Hg{sup 2+}-thymine recognition. The dynamic linear range for Hg{sup 2+} detection has been determined in the concentrations from 10{sup −14} to 10{sup −8} M and a detection limit below 10{sup −14} M level was estimated, which is the best result of AlGaN/GaN HEMT biosensors for Hg{sup 2+} detection till now.

  15. Analysis of Proton Radiation Effects on Gallium Nitride High Electron Mobility Transistors

    Science.gov (United States)

    2017-03-01

    non - ionizing proton radiation damage effects at different energy levels on a GaN-on-silicon high electron mobility transistor...DISTRIBUTION CODE 13. ABSTRACT (maximum 200 words) In this work, a physics-based simulation of non - ionizing proton radiation damage effects at different...Polarization . . . . . . . . . . . . . . 6 2.3 Non - Ionizing Radiation Damage Effects . . . . . . . . . . . . . . . 10 2.4 Non - Ionizing Radiation Damage in

  16. High gain, low noise, fully complementary logic inverter based on bi-layer WSe{sub 2} field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Das, Saptarshi; Roelofs, Andreas [Center for Nanoscale Material, Argonne National Laboratory, Argonne, Illinois 60439 (United States); Dubey, Madan [U.S. Army Research Laboratory, Adelphi, Maryland 20783 (United States)

    2014-08-25

    In this article, first, we show that by contact work function engineering, electrostatic doping and proper scaling of both the oxide thickness and the flake thickness, high performance p- and n-type WSe{sub 2} field effect transistors (FETs) can be realized. We report record high drive current of 98 μA/μm for the electron conduction and 110 μA/μm for the hole conduction in Schottky barrier WSe{sub 2} FETs. Then, we combine high performance WSe{sub 2} PFET with WSe{sub 2} NFET in double gated transistor geometry to demonstrate a fully complementary logic inverter. We also show that by adjusting the threshold voltages for the NFET and the PFET, the gain and the noise margin of the inverter can be significantly enhanced. The maximum gain of our chemical doping free WSe{sub 2} inverter was found to be ∼25 and the noise margin was close to its ideal value of ∼2.5 V for a supply voltage of V{sub DD} = 5.0 V.

  17. Investigation of 6T SRAM memory circuit using high-k dielectrics based nano scale junctionless transistor

    Science.gov (United States)

    Charles Pravin, J.; Nirmal, D.; Prajoon, P.; Mohan Kumar, N.; Ajayan, J.

    2017-04-01

    In this paper the Dual Metal Surround Gate Junctionless Transistor (DMSGJLT) has been implemented with various high-k dielectric. The leakage current in the device is analysed in detail by obtaining the band structure for different high-k dielectric material. It is noticed that with increasing dielectric constant the device provides more resistance for the direct tunnelling of electron in off state. The gate oxide capacitance also shows 0.1 μF improvement with Hafnium Oxide (HfO2) than Silicon Oxide (SiO2). This paved the way for a better memory application when high-k dielectric is used. The Six Transistor (6T) Static Random Access Memory (SRAM) circuit implemented shows 41.4% improvement in read noise margin for HfO2 than SiO2. It also shows 37.49% improvement in write noise margin and 30.16% improvement in hold noise margin for HfO2 than SiO2.

  18. High current density ion source

    International Nuclear Information System (INIS)

    King, H.J.

    1977-01-01

    A high-current-density ion source with high total current is achieved by individually directing the beamlets from an electron bombardment ion source through screen and accelerator electrodes. The openings in these screen and accelerator electrodes are oriented and positioned to direct the individual beamlets substantially toward a focus point. 3 figures, 1 table

  19. Performance improvement for solution-processed high-mobility ZnO thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Li Chensha; Loutfy, Rafik O [Department of Chemical Engineering, McMaster University, 1280 Main Street West, Hamilton, Ontario L8S 4L7 (Canada); Li Yuning; Wu Yiliang; Ong, Beng S [Materials Design and Integration Laboratory, Xerox Research Centre of Canada, 2660 Speakman Drive, Mississauga, Ontario L5K 2L1 (Canada)], E-mail: lichnsa@163.com

    2008-06-21

    The fabrication technology of stable, non-toxic, transparent, high performance zinc oxide (ZnO) thin-film semiconductors via the solution process was investigated. Two methods, which were, respectively, annealing a spin-coated precursor solution and annealing a drop-coated precursor solution, were compared. The prepared ZnO thin-film semiconductor transistors have well-controlled, preferential crystal orientation and exhibit superior field-effect performance characteristics. But the ZnO thin-film transistor (TFT) fabricated by annealing a drop-coated precursor solution has a distinctly elevated linear mobility, which further approaches the saturated mobility, compared with that fabricated by annealing a spin-coated precursor solution. The performance of the solution-processed ZnO TFT was further improved when substituting the spin-coating process by the drop-coating process.

  20. Performance improvement for solution-processed high-mobility ZnO thin-film transistors

    International Nuclear Information System (INIS)

    Li Chensha; Loutfy, Rafik O; Li Yuning; Wu Yiliang; Ong, Beng S

    2008-01-01

    The fabrication technology of stable, non-toxic, transparent, high performance zinc oxide (ZnO) thin-film semiconductors via the solution process was investigated. Two methods, which were, respectively, annealing a spin-coated precursor solution and annealing a drop-coated precursor solution, were compared. The prepared ZnO thin-film semiconductor transistors have well-controlled, preferential crystal orientation and exhibit superior field-effect performance characteristics. But the ZnO thin-film transistor (TFT) fabricated by annealing a drop-coated precursor solution has a distinctly elevated linear mobility, which further approaches the saturated mobility, compared with that fabricated by annealing a spin-coated precursor solution. The performance of the solution-processed ZnO TFT was further improved when substituting the spin-coating process by the drop-coating process

  1. Dithiopheneindenofluorene (TIF) Semiconducting Polymers with Very High Mobility in Field-Effect Transistors

    KAUST Repository

    Chen, Hu

    2017-07-19

    The charge-carrier mobility of organic semiconducting polymers is known to be enhanced when the energetic disorder of the polymer is minimized. Fused, planar aromatic ring structures contribute to reducing the polymer conformational disorder, as demonstrated by polymers containing the indacenodithiophene (IDT) repeat unit, which have both a low Urbach energy and a high mobility in thin-film-transistor (TFT) devices. Expanding on this design motif, copolymers containing the dithiopheneindenofluorene repeat unit are synthesized, which extends the fused aromatic structure with two additional phenyl rings, further rigidifying the polymer backbone. A range of copolymers are prepared and their electrical properties and thin-film morphology evaluated, with the co-benzothiadiazole polymer having a twofold increase in hole mobility when compared to the IDT analog, reaching values of almost 3 cm2 V−1 s−1 in bottom-gate top-contact organic field-effect transistors.

  2. High-Performance Flexible Single-Crystalline Silicon Nanomembrane Thin-Film Transistors with High- k Nb2O5-Bi2O3-MgO Ceramics as Gate Dielectric on a Plastic Substrate.

    Science.gov (United States)

    Qin, Guoxuan; Zhang, Yibo; Lan, Kuibo; Li, Lingxia; Ma, Jianguo; Yu, Shihui

    2018-04-18

    A novel method of fabricating flexible thin-film transistor based on single-crystalline Si nanomembrane (SiNM) with high- k Nb 2 O 5 -Bi 2 O 3 -MgO (BMN) ceramic gate dielectric on a plastic substrate is demonstrated in this paper. SiNMs are successfully transferred to a flexible polyethylene terephthalate substrate, which has been plated with indium-tin-oxide (ITO) conductive layer and high- k BMN ceramic gate dielectric layer by room-temperature magnetron sputtering. The BMN ceramic gate dielectric layer demonstrates as high as ∼109 dielectric constant, with only dozens of pA current leakage. The Si-BMN-ITO heterostructure has only ∼nA leakage current at the applied voltage of 3 V. The transistor is shown to work at a high current on/off ratio of above 10 4 , and the threshold voltage is ∼1.3 V, with over 200 cm 2 /(V s) effective channel electron mobility. Bending tests have been conducted and show that the flexible transistors have good tolerance on mechanical bending strains. These characteristics indicate that the flexible single-crystalline SiNM transistors with BMN ceramics as gate dielectric have great potential for applications in high-performance integrated flexible circuit.

  3. High current plasma electron emitter

    International Nuclear Information System (INIS)

    Fiksel, G.; Almagri, A.F.; Craig, D.

    1995-07-01

    A high current plasma electron emitter based on a miniature plasma source has been developed. The emitting plasma is created by a pulsed high current gas discharge. The electron emission current is 1 kA at 300 V at the pulse duration of 10 ms. The prototype injector described in this paper will be used for a 20 kA electrostatic current injection experiment in the Madison Symmetric Torus (MST) reversed-field pinch. The source will be replicated in order to attain this total current requirement. The source has a simple design and has proven very reliable in operation. A high emission current, small size (3.7 cm in diameter), and low impurity generation make the source suitable for a variety of fusion and technological applications

  4. Precisely Controlled Ultrathin Conjugated Polymer Films for Large Area Transparent Transistors and Highly Sensitive Chemical Sensors.

    Science.gov (United States)

    Khim, Dongyoon; Ryu, Gi-Seong; Park, Won-Tae; Kim, Hyunchul; Lee, Myungwon; Noh, Yong-Young

    2016-04-13

    A uniform ultrathin polymer film is deposited over a large area with molecularlevel precision by the simple wire-wound bar-coating method. The bar-coated ultrathin films not only exhibit high transparency of up to 90% in the visible wavelength range but also high charge carrier mobility with a high degree of percolation through the uniformly covered polymer nanofibrils. They are capable of realizing highly sensitive multigas sensors and represent the first successful report of ethylene detection using a sensor based on organic field-effect transistors. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Few-layer molybdenum disulfide transistors and circuits for high-speed flexible electronics.

    Science.gov (United States)

    Cheng, Rui; Jiang, Shan; Chen, Yu; Liu, Yuan; Weiss, Nathan; Cheng, Hung-Chieh; Wu, Hao; Huang, Yu; Duan, Xiangfeng

    2014-10-08

    Two-dimensional layered materials, such as molybdenum disulfide, are emerging as an exciting material system for future electronics due to their unique electronic properties and atomically thin geometry. Here we report a systematic investigation of MoS2 transistors with optimized contact and device geometry, to achieve self-aligned devices with performance including an intrinsic gain over 30, an intrinsic cut-off frequency fT up to 42 GHz and a maximum oscillation frequency fMAX up to 50 GHz, exceeding the reported values for MoS2 transistors to date (fT~0.9 GHz, fMAX~1 GHz). Our results show that logic inverters or radio frequency amplifiers can be formed by integrating multiple MoS2 transistors on quartz or flexible substrates with voltage gain in the gigahertz regime. This study demonstrates the potential of two-dimensional layered semiconductors for high-speed flexible electronics.

  6. Kink effect and noise performance in isolated-gate InAs/AlSb high electron mobility transistors

    International Nuclear Information System (INIS)

    Vasallo, B G; González, T; Mateos, J; Rodilla, H; Moschetti, G; Grahn, J

    2012-01-01

    The kink effect can spoil the otherwise excellent low noise performance of InAs/AlSb high electron mobility transistors. It has its origin in the pile-up of holes (generated by impact ionization) taking place mainly at the drain side of the buffer, which leads to a reduction of the gate-induced channel depletion and results in a drain current enhancement. Our results indicate that the generation of holes by impact ionization and their further recombination lead to fluctuations in the charge of the hole pile-up, which provoke an important increase in the drain current noise, even when the kink effect is hardly perceptible in the output characteristics. (paper)

  7. Impact of barrier thickness on transistor performance in AlN/GaN high electron mobility transistors grown on free-standing GaN substrates

    International Nuclear Information System (INIS)

    Deen, David A.; Storm, David F.; Meyer, David J.; Bass, Robert; Binari, Steven C.; Gougousi, Theodosia; Evans, Keith R.

    2014-01-01

    A series of six ultrathin AlN/GaN heterostructures with varied AlN thicknesses from 1.5–6 nm have been grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. High electron mobility transistors (HEMTs) were fabricated from the set in order to assess the impact of barrier thickness and homo-epitaxial growth on transistor performance. Room temperature Hall characteristics revealed mobility of 1700 cm 2 /V s and sheet resistance of 130 Ω/□ for a 3 nm thick barrier, ranking amongst the lowest room-temperature sheet resistance values reported for a polarization-doped single heterostructure in the III-Nitride family. DC and small signal HEMT electrical characteristics from submicron gate length HEMTs further elucidated the effect of the AlN barrier thickness on device performance.

  8. Impact of barrier thickness on transistor performance in AlN/GaN high electron mobility transistors grown on free-standing GaN substrates

    Energy Technology Data Exchange (ETDEWEB)

    Deen, David A., E-mail: david.deen@alumni.nd.edu; Storm, David F.; Meyer, David J.; Bass, Robert; Binari, Steven C. [Electronics Science and Technology Division, Naval Research Laboratory, Washington, DC 20375-5347 (United States); Gougousi, Theodosia [Physics Department, University of Maryland Baltimore County, Baltimore, Maryland 21250 (United States); Evans, Keith R. [Kyma Technologies, Raleigh, North Carolina 27617 (United States)

    2014-09-01

    A series of six ultrathin AlN/GaN heterostructures with varied AlN thicknesses from 1.5–6 nm have been grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. High electron mobility transistors (HEMTs) were fabricated from the set in order to assess the impact of barrier thickness and homo-epitaxial growth on transistor performance. Room temperature Hall characteristics revealed mobility of 1700 cm{sup 2}/V s and sheet resistance of 130 Ω/□ for a 3 nm thick barrier, ranking amongst the lowest room-temperature sheet resistance values reported for a polarization-doped single heterostructure in the III-Nitride family. DC and small signal HEMT electrical characteristics from submicron gate length HEMTs further elucidated the effect of the AlN barrier thickness on device performance.

  9. Collector modulation in high-voltage bipolar transistor in the saturation mode: Analytical approach

    Science.gov (United States)

    Dmitriev, A. P.; Gert, A. V.; Levinshtein, M. E.; Yuferev, V. S.

    2018-04-01

    A simple analytical model is developed, capable of replacing the numerical solution of a system of nonlinear partial differential equations by solving a simple algebraic equation when analyzing the collector resistance modulation of a bipolar transistor in the saturation mode. In this approach, the leakage of the base current into the emitter and the recombination of non-equilibrium carriers in the base are taken into account. The data obtained are in good agreement with the results of numerical calculations and make it possible to describe both the motion of the front of the minority carriers and the steady state distribution of minority carriers across the collector in the saturation mode.

  10. Transistors using crystalline silicon devices on glass

    Science.gov (United States)

    McCarthy, Anthony M.

    1995-01-01

    A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

  11. Origin of switching current transients in TIPS-pentacene based organic thin-film transistor with polymer dielectric

    Science.gov (United States)

    Singh, Subhash; Mohapatra, Y. N.

    2017-06-01

    We have investigated switch-on drain-source current transients in fully solution-processed thin film transistors based on 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) using cross-linked poly-4-vinylphenol as a dielectric. We show that the nature of the transient (increasing or decreasing) depends on both the temperature and the amplitude of the switching pulse at the gate. The isothermal transients are analyzed spectroscopically in a time domain to extract the degree of non-exponentiality and its possible origin in trap kinetics. We propose a phenomenological model in which the exchange of electrons between interfacial ions and traps controls the nature of the drain current transients dictated by the Fermi level position. The origin of interfacial ions is attributed to the essential fabrication step of UV-ozone treatment of the dielectric prior to semiconductor deposition.

  12. High current vacuum closing switch

    International Nuclear Information System (INIS)

    Dolgachev, G.I.; Maslennikov, D.D.; Romanov, A.S.; Ushakov, A.G.

    2005-01-01

    The paper proposes a powerful pulsed closing vacuum switch for high current commutation consisting of series of the vacuum diodes with near 1 mm gaps having closing time determined by the gaps shortening with the near-electrode plasmas [ru

  13. Fabrication of detectors and transistors on high-resistivity silicon

    International Nuclear Information System (INIS)

    Holland, S.

    1988-06-01

    A new process for the fabrication of silicon p-i-n diode radiation detectors is described. The utilization of backside gettering in the fabrication process results in the actual physical removal of detrimental impurities from critical device regions. This reduces the sensitivity of detector properties to processing variables while yielding low diode reverse-leakage currents. In addition, gettering permits the use of processing temperatures compatible with integrated-circuit fabrication. P-channel MOSFETs and silicon p-i-n diodes have been fabricated simultaneously on 10 kΩ/centerreverse arrowdot/cm silicon using conventional integrated-circuit processing techniques. 25 refs., 5 figs

  14. The operation cutoff frequency of high electron mobility transistor measured by terahertz method

    International Nuclear Information System (INIS)

    Zhu, Y. M.; Zhuang, S. L.

    2014-01-01

    Commonly, the cutoff frequency of high electron mobility transistor (HEMT) can be measured by vector network analyzer (VNA), which can only measure the sample exactly in low frequency region. In this paper, we propose a method to evaluate the cutoff frequency of HEMT by terahertz (THz) technique. One example shows the cutoff frequency of our HEMT is measured at ∼95.30 GHz, which is reasonable agreement with that estimated by VNA. It is proved THz technology a potential candidate for the substitution of VNA for the measurement of high-speed devices even up to several THz.

  15. Wavy channel Thin Film Transistor for area efficient, high performance and low power applications

    KAUST Repository

    Hanna, Amir; Sevilla, Galo T.; Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2014-01-01

    We report a new Thin Film Transistor (TFT) architecture that allows expansion of the device width using wavy (continuous without separation) fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor

  16. Increase the threshold voltage of high voltage GaN transistors by low temperature atomic hydrogen treatment

    Energy Technology Data Exchange (ETDEWEB)

    Erofeev, E. V., E-mail: erofeev@micran.ru [Tomsk State University of Control Systems and Radioelectronics, Research Institute of Electrical-Communication Systems (Russian Federation); Fedin, I. V.; Kutkov, I. V. [Research and Production Company “Micran” (Russian Federation); Yuryev, Yu. N. [National Research Tomsk Polytechnic University, Institute of Physics and Technology (Russian Federation)

    2017-02-15

    High-electron-mobility transistors (HEMTs) based on AlGaN/GaN epitaxial heterostructures are a promising element base for the fabrication of high voltage electronic devices of the next generation. This is caused by both the high mobility of charge carriers in the transistor channel and the high electric strength of the material, which makes it possible to attain high breakdown voltages. For use in high-power switches, normally off-mode GaN transistors operating under enhancement conditions are required. To fabricate normally off GaN transistors, one most frequently uses a subgate region based on magnesium-doped p-GaN. However, optimization of the p-GaN epitaxial-layer thickness and the doping level makes it possible to attain a threshold voltage of GaN transistors close to V{sub th} = +2 V. In this study, it is shown that the use of low temperature treatment in an atomic hydrogen flow for the p-GaN-based subgate region before the deposition of gate-metallization layers makes it possible to increase the transistor threshold voltage to V{sub th} = +3.5 V. The effects under observation can be caused by the formation of a dipole layer on the p-GaN surface induced by the effect of atomic hydrogen. The heat treatment of hydrogen-treated GaN transistors in a nitrogen environment at a temperature of T = 250°C for 12 h reveals no degradation of the transistor’s electrical parameters, which can be caused by the formation of a thermally stable dipole layer at the metal/p-GaN interface as a result of hydrogenation.

  17. Increase the threshold voltage of high voltage GaN transistors by low temperature atomic hydrogen treatment

    International Nuclear Information System (INIS)

    Erofeev, E. V.; Fedin, I. V.; Kutkov, I. V.; Yuryev, Yu. N.

    2017-01-01

    High-electron-mobility transistors (HEMTs) based on AlGaN/GaN epitaxial heterostructures are a promising element base for the fabrication of high voltage electronic devices of the next generation. This is caused by both the high mobility of charge carriers in the transistor channel and the high electric strength of the material, which makes it possible to attain high breakdown voltages. For use in high-power switches, normally off-mode GaN transistors operating under enhancement conditions are required. To fabricate normally off GaN transistors, one most frequently uses a subgate region based on magnesium-doped p-GaN. However, optimization of the p-GaN epitaxial-layer thickness and the doping level makes it possible to attain a threshold voltage of GaN transistors close to V_t_h = +2 V. In this study, it is shown that the use of low temperature treatment in an atomic hydrogen flow for the p-GaN-based subgate region before the deposition of gate-metallization layers makes it possible to increase the transistor threshold voltage to V_t_h = +3.5 V. The effects under observation can be caused by the formation of a dipole layer on the p-GaN surface induced by the effect of atomic hydrogen. The heat treatment of hydrogen-treated GaN transistors in a nitrogen environment at a temperature of T = 250°C for 12 h reveals no degradation of the transistor’s electrical parameters, which can be caused by the formation of a thermally stable dipole layer at the metal/p-GaN interface as a result of hydrogenation.

  18. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.

    2011-10-12

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  19. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.; Smith, Casey; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2011-01-01

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  20. High performance printed oxide field-effect transistors processed using photonic curing

    Science.gov (United States)

    Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

    2018-06-01

    Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

  1. Study of tunneling transport in Si-based tunnel field-effect transistors with ON current enhancement utilizing isoelectronic trap

    Science.gov (United States)

    Mori, Takahiro; Morita, Yukinori; Miyata, Noriyuki; Migita, Shinji; Fukuda, Koichi; Mizubayashi, Wataru; Masahara, Meishoku; Yasuda, Tetsuji; Ota, Hiroyuki

    2015-02-01

    The temperature dependence of the tunneling transport characteristics of Si diodes with an isoelectronic impurity has been investigated in order to clarify the mechanism of the ON-current enhancement in Si-based tunnel field-effect transistors (TFETs) utilizing an isoelectronic trap (IET). The Al-N complex impurity was utilized for IET formation. We observed three types of tunneling current components in the diodes: indirect band-to-band tunneling (BTBT), trap-assisted tunneling (TAT), and thermally inactive tunneling. The indirect BTBT and TAT current components can be distinguished with the plot described in this paper. The thermally inactive tunneling current probably originated from tunneling consisting of two paths: tunneling between the valence band and the IET trap and tunneling between the IET trap and the conduction band. The probability of thermally inactive tunneling with the Al-N IET state is higher than the others. Utilization of the thermally inactive tunneling current has a significant effect in enhancing the driving current of Si-based TFETs.

  2. Rf Gun with High-Current Density Field Emission Cathode

    International Nuclear Information System (INIS)

    Jay L. Hirshfield

    2005-01-01

    High current-density field emission from an array of carbon nanotubes, with field-emission-transistor control, and with secondary electron channel multiplication in a ceramic facing structure, have been combined in a cold cathode for rf guns and diode guns. Electrodynamic and space-charge flow simulations were conducted to specify the cathode configuration and range of emission current density from the field emission cold cathode. Design of this cathode has been made for installation and testing in an existing S-band 2-1/2 cell rf gun. With emission control and modulation, and with current density in the range of 0.1-1 kA/cm2, this cathode could provide performance and long-life not enjoyed by other currently-available cathodes

  3. A drain current model for amorphous InGaZnO thin film transistors considering temperature effects

    Science.gov (United States)

    Cai, M. X.; Yao, R. H.

    2018-03-01

    Temperature dependent electrical characteristics of amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) are investigated considering the percolation and multiple trapping and release (MTR) conduction mechanisms. Carrier-density and temperature dependent carrier mobility in a-IGZO is derived with the Boltzmann transport equation, which is affected by potential barriers above the conduction band edge with Gaussian-like distributions. The free and trapped charge densities in the channel are calculated with Fermi-Dirac statistics, and the field effective mobility of a-IGZO TFTs is then deduced based on the MTR theory. Temperature dependent drain current model for a-IGZO TFTs is finally derived with the obtained low field mobility and free charge density, which is applicable to both non-degenerate and degenerate conductions. This physical-based model is verified by available experiment results at various temperatures.

  4. Organic electrochemical transistors

    Science.gov (United States)

    Rivnay, Jonathan; Inal, Sahika; Salleo, Alberto; Owens, Róisín M.; Berggren, Magnus; Malliaras, George G.

    2018-02-01

    Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.

  5. Organic electrochemical transistors

    KAUST Repository

    Rivnay, Jonathan

    2018-01-16

    Organic electrochemical transistors (OECTs) make effective use of ion injection from an electrolyte to modulate the bulk conductivity of an organic semiconductor channel. The coupling between ionic and electronic charges within the entire volume of the channel endows OECTs with high transconductance compared with that of field-effect transistors, but also limits their response time. The synthetic tunability, facile deposition and biocompatibility of organic materials make OECTs particularly suitable for applications in biological interfacing, printed logic circuitry and neuromorphic devices. In this Review, we discuss the physics and the mechanism of operation of OECTs, focusing on their identifying characteristics. We highlight organic materials that are currently being used in OECTs and survey the history of OECT technology. In addition, form factors, fabrication technologies and applications such as bioelectronics, circuits and memory devices are examined. Finally, we take a critical look at the future of OECT research and development.

  6. Thermal Cycling and High Temperature Reverse Bias Testing of Control and Irradiated Gallium Nitride Power Transistors

    Science.gov (United States)

    Patterson, Richard L.; Boomer, Kristen T.; Scheick, Leif; Lauenstein, Jean-Marie; Casey, Megan; Hammoud, Ahmad

    2014-01-01

    The power systems for use in NASA space missions must work reliably under harsh conditions including radiation, thermal cycling, and exposure to extreme temperatures. Gallium nitride semiconductors show great promise, but information pertaining to their performance is scarce. Gallium nitride N-channel enhancement-mode field effect transistors made by EPC Corporation in a 2nd generation of manufacturing were exposed to radiation followed by long-term thermal cycling and testing under high temperature reverse bias conditions in order to address their reliability for use in space missions. Result of the experimental work are presented and discussed.

  7. Improved DC performance of AlGaN/GaN high electron mobility transistors using hafnium oxide for surface passivation

    International Nuclear Information System (INIS)

    Liu, Chang; Chor, Eng Fong; Tan, Leng Seow

    2007-01-01

    Improved DC performance of AlGaN/GaN high electron mobility transistors (HEMTs) have been demonstrated using reactive-sputtered hafnium oxide (HfO 2 ) thin film as the surface passivation layer. Hall data indicate a significant increase in the product of sheet carrier concentration (n s ) and electron mobility (μ n ) in the HfO 2 -passivated HEMTs, compared to the unpassivated HEMTs. This improvement in electron carrier characteristics gives rise to a 22% higher I Dmax and an 18% higher g mmax in HEMTs with HfO 2 passivation relative to the unpassivated devices. On the other hand, I gleak of the HEMTs decreases by nearly one order of magnitude when HfO 2 passivation is applied. In addition, drain current is measured in the subthreshold regime. Compared to the unpassivated HEMTs, HfO 2 -passivated HEMTs exhibit a much smaller off-state I D , indicating better turn-off characteristics

  8. Study of the enhancement-mode AlGaN/GaN high electron mobility transistor with split floating gates

    Science.gov (United States)

    Wang, Hui; Wang, Ning; Jiang, Ling-Li; Zhao, Hai-Yue; Lin, Xin-Peng; Yu, Hong-Yu

    2017-11-01

    In this work, the charge storage based split floating gates (FGs) enhancement mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs) are studied. The simulation results reveal that under certain density of two dimensional electron gas, the variation tendency of the threshold voltage (Vth) with the variation of the blocking dielectric thickness depends on the FG charge density. It is found that when the length sum and isolating spacing sum of the FGs both remain unchanged, the Vth shall decrease with the increasing FGs number but maintaining the device as E-mode. It is also reported that for the FGs HEMT, the failure of a FG will lead to the decrease of Vth as well as the increase of drain current, and the failure probability can be improved significantly with the increase of FGs number.

  9. Fabrication and characterization of V-gate AlGaN/GaN high-electron-mobility transistors

    International Nuclear Information System (INIS)

    Zhang Kai; Cao Meng-Yi; Chen Yong-He; Yang Li-Yuan; Wang Chong; Ma Xiao-Hua; Hao Yue

    2013-01-01

    V-gate GaN high-electron-mobility transistors (HEMTs) are fabricated and investigated systematically. A V-shaped recess geometry is obtained using an improved Si 3 N 4 recess etching technology. Compared with standard HEMTs, the fabricated V-gate HEMTs exhibit a 17% higher peak extrinsic transconductance due to a narrowed gate foot. Moreover, both the gate leakage and current dispersion are dramatically suppressed simultaneously, although a slight degradation of frequency response is observed. Based on a two-dimensional electric field simulation using Silvaco “ATLAS” for both standard HEMTs and V-gate HEMTs, the relaxation in peak electric field at the gate edge is identified as the predominant factor leading to the superior performance of V-gate HEMTs. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  10. 3D NANOTUBE FIELD EFFECT TRANSISTORS FOR HYBRID HIGH-PERFORMANCE AND LOW-POWER OPERATION WITH HIGH CHIP-AREA EFFICIENCY

    KAUST Repository

    Fahad, Hossain M.

    2014-03-01

    Information anytime and anywhere has ushered in a new technological age where massive amounts of ‘big data’ combined with self-aware and ubiquitous interactive computing systems is shaping our daily lives. As society gravitates towards a smart living environment and a sustainable future, the demand for faster and more computationally efficient electronics will continue to rise. Keeping up with this demand requires extensive innovation at the transistor level, which is at the core of all electronics. Up until recently, classical silicon transistor technology has traditionally been weary of disruptive innovation. But with the aggressive scaling trend, there has been two dramatic changes to the transistor landscape. The first was the re-introduction of metal/high-K gate stacks with strain engineering in the 45 nm technology node, which enabled further scaling on silicon to smaller nodes by alleviating the problem of gate leakage and improving the channel mobility. The second innovation was the use of non-planar 3D silicon fins as opposed to classical planar architectures for stronger electrostatic control leading to significantly lower off-state leakage and other short-channel effects. Both these innovations have prolonged the life of silicon based electronics by at least another 1-2 decades. The next generation 14 nm technology node will utilize silicon fin channels that have gate lengths of 14 nm and fin thicknesses of 7 nm. These dimensions are almost at the extreme end of current lithographic capabilities. Moreover, as fins become smaller, the parasitic capacitances and resistances increase significantly resulting in degraded performance. It is of popular consensus that the next evolutionary step in transistor technology is in the form of gate-all-around silicon nanowires (GAA NWFETs), which offer the tightest electrostatic configuration leading to the lowest possible leakage and short channel characteristics in over-the-barrier type devices. However, to keep

  11. Transistor challenges - A DRAM perspective

    International Nuclear Information System (INIS)

    Faul, Juergen W.; Henke, Dietmar

    2005-01-01

    Key challenges of the transistor scaling from a DRAM perspective will be reviewed. Both, array transistors as well as DRAM support devices face challenges that differ essentially from high performance logic device scaling. As a major difference, retention time and standby current requirements characterize special boundary conditions in the DRAM device design. Array device scaling is determined by a chip size driven aggressive node scaling. To continue scaling, major innovations need to be introduced into state-of-the-art planar array transistors. Alternatively, non planar device concepts will have to be evaluated. Support device design for DRAMs is driven by today's market demand for increased chip performances at little to no extra cost. Major innovations are required to continue that path. Besides this strive for performance increase, special limitations for 'on pitch' circuits at the array edge will come up due to the aggressive cell size scaling

  12. High temperature superconductor current leads

    International Nuclear Information System (INIS)

    Zeimetz, B.; Liu, H.K.; Dou, S.X.

    1996-01-01

    Full text: The use of superconductors in high electrical current applications (magnets, transformers, generators etc.) usually requires cooling with liquid Helium, which is very expensive. The superconductor itself produces no heat, and the design of Helium dewars is very advanced. Therefore most of the heat loss, i.e. Helium consumption, comes from the current lead which connects the superconductor with its power source at room temperature. The current lead usually consists of a pair of thick copper wires. The discovery of the High Temperature Superconductors makes it possible to replace a part of the copper with superconducting material. This drastically reduces the heat losses because a) the superconductor generates no resistive heat and b) it is a very poor thermal conductor compared with the copper. In this work silver-sheathed superconducting tapes are used as current lead components. The work comprises both the production of the tapes and the overall design of the leads, in order to a) maximize the current capacity ('critical current') of the superconductor, b) minimize the thermal conductivity of the silver clad, and c) optimize the cooling conditions

  13. Analysis on temperature dependent current mechanism of tunnel field-effect transistors

    Science.gov (United States)

    Lee, Junil; Kwon, Dae Woong; Kim, Hyun Woo; Kim, Jang Hyun; Park, Euyhwan; Park, Taehyung; Kim, Sihyun; Lee, Ryoongbin; Lee, Jong-Ho; Park, Byung-Gook

    2016-06-01

    In this paper, the total drain current (I D) of a tunnel FET (TFET) is decomposed into each current component with different origins to analyze the I D formation mechanisms of the TFET as a function of gate voltage (V GS). Transfer characteristics are firstly extracted with fabricated Silicon channel TFETs (Si TFETs) and silicon germanium channel TFETs (SiGe TFETs) at various temperatures. The subthreshold swings (SS) of both Si TFETs and SiGe TFETs get degraded and the SSs of SiGe TFETs get degraded more as temperature becomes higher. Then, all the I Ds measured at various temperatures are decomposed into each current component through technology computer aided design (TCAD) simulations with a good agreement with experimental data. As a result, it is revealed that Shockley-Read-Hall (SRH) recombination mainly contribute to the I D of a TFET before band to band tunneling (BTBT) occurs. Furthermore, the SS degradation by high temperature is explained successfully by the SRH recombination with electric field dependence.

  14. DC modeling and characterization of AlGaAs/GaAs heterojunction bipolar transistors for high-temperature applications

    International Nuclear Information System (INIS)

    Dikmen, C.T.; Dogan, N.S.; Osman, M.A.

    1994-01-01

    There is currently a demand for active electronic devices operating reliably over wide range of temperatures. Potential applications for the high-temperature devices and integrated circuits are in the areas of jet engine and control instrumentation for nuclear power plants. Here, the large signal dc characteristics of AlGaAs/GaAs heterojunction bipolar transistors (HBT) at high temperatures (27--300 C) are reported. A high-temperature SPICE model is developed which includes the recombination-generation current components and avalanche multiplication which become extremely important at high temperatures. The effect of avalanche breakdown is also included to model the current due to thermal generation of electron/hole pairs causing breakdown at high temperatures. A parameter extraction program is developed used to extract the model parameters of HBT's at different temperatures. Fitting functions for the model parameters as a function of temperature are developed. These parameters are then used in the SPICE Ebers-Moll model for the dc characterization of the HBT at any temperature between (27--300 C)

  15. High mobility and low operating voltage ZnGaO and ZnGaLiO transistors with spin-coated Al2O3 as gate dielectric

    International Nuclear Information System (INIS)

    Xia, D X; Xu, J B

    2010-01-01

    Spin-coated alumina serving as a gate dielectric in thin film transistors shows interesting dielectric properties for low-voltage applications, despite a moderate capacitance. With Ga singly doped and Ga, Li co-doped ZnO as the active channel layers, typical mobilities of 4.7 cm 2 V -1 s -1 and 2.1 cm 2 V -1 s -1 are achieved, respectively. At a given gate bias, the operation current is much smaller than the previously reported values in low-voltage thin film transistors, primarily relying on the giant-capacitive dielectric. The reported devices combine advantages of high mobility, low power consumption, low cost and ease of fabrication. In addition to the transparent nature of both the dielectric and semiconducting active channels, the superior electrical properties of the devices may provide a new avenue for future transparent electronics. (fast track communication)

  16. Organic High Electron Mobility Transistors Realized by 2D Electron Gas.

    Science.gov (United States)

    Zhang, Panlong; Wang, Haibo; Yan, Donghang

    2017-09-01

    A key breakthrough in inorganic modern electronics is the energy-band engineering that plays important role to improve device performance or develop novel functional devices. A typical application is high electron mobility transistors (HEMTs), which utilizes 2D electron gas (2DEG) as transport channel and exhibits very high electron mobility over traditional field-effect transistors (FETs). Recently, organic electronics have made very rapid progress and the band transport model is demonstrated to be more suitable for explaining carrier behavior in high-mobility crystalline organic materials. Therefore, there emerges a chance for applying energy-band engineering in organic semiconductors to tailor their optoelectronic properties. Here, the idea of energy-band engineering is introduced and a novel device configuration is constructed, i.e., using quantum well structures as active layers in organic FETs, to realize organic 2DEG. Under the control of gate voltage, electron carriers are accumulated and confined at quantized energy levels, and show efficient 2D transport. The electron mobility is up to 10 cm 2 V -1 s -1 , and the operation mechanisms of organic HEMTs are also argued. Our results demonstrate the validity of tailoring optoelectronic properties of organic semiconductors by energy-band engineering, offering a promising way for the step forward of organic electronics. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. High-mobility solution-processed copper phthalocyanine-based organic field-effect transistors

    Directory of Open Access Journals (Sweden)

    Nandu B Chaure, Andrew N Cammidge, Isabelle Chambrier, Michael J Cook, Markys G Cain, Craig E Murphy, Chandana Pal and Asim K Ray

    2011-01-01

    Full Text Available Solution-processed films of 1,4,8,11,15,18,22,25-octakis(hexyl copper phthalocyanine (CuPc6 were utilized as an active semiconducting layer in the fabrication of organic field-effect transistors (OFETs in the bottom-gate configurations using chemical vapour deposited silicon dioxide (SiO2 as gate dielectrics. The surface treatment of the gate dielectric with a self-assembled monolayer of octadecyltrichlorosilane (OTS resulted in values of 4×10−2 cm2 V−1 s−1 and 106 for saturation mobility and on/off current ratio, respectively. This improvement was accompanied by a shift in the threshold voltage from 3 V for untreated devices to -2 V for OTS treated devices. The trap density at the interface between the gate dielectric and semiconductor decreased by about one order of magnitude after the surface treatment. The transistors with the OTS treated gate dielectrics were more stable over a 30-day period in air than untreated ones.

  18. Highly selective and sensitive phosphate anion sensors based on AlGaN/GaN high electron mobility transistors functionalized by ion imprinted polymer.

    Science.gov (United States)

    Jia, Xiuling; Chen, Dunjun; Bin, Liu; Lu, Hai; Zhang, Rong; Zheng, Youdou

    2016-06-09

    A novel ion-imprinted electrochemical sensor based on AlGaN/GaN high electron mobility transistors (HEMTs) was developed to detect trace amounts of phosphate anion. This sensor combined the advantages of the ion sensitivity of AlGaN/GaN HEMTs and specific recognition of ion imprinted polymers. The current response showed that the fabricated sensor is highly sensitive and selective to phosphate anions. The current change exhibited approximate linear dependence for phosphate concentration from 0.02 mg L(-1) to 2 mg L(-1), the sensitivity and detection limit of the sensor is 3.191 μA/mg L(-1) and 1.97 μg L(-1), respectively. The results indicated that this AlGaN/GaN HEMT-based electrochemical sensor has the potential applications on phosphate anion detection.

  19. Molecular gated-AlGaN/GaN high electron mobility transistor for pH detection.

    Science.gov (United States)

    Ding, Xiangzhen; Yang, Shuai; Miao, Bin; Gu, Le; Gu, Zhiqi; Zhang, Jian; Wu, Baojun; Wang, Hong; Wu, Dongmin; Li, Jiadong

    2018-04-18

    A molecular gated-AlGaN/GaN high electron mobility transistor has been developed for pH detection. The sensing surface of the sensor was modified with 3-aminopropyltriethoxysilane to provide amphoteric amine groups, which would play the role of receptors for pH detection. On modification with 3-aminopropyltriethoxysilane, the transistor exhibits good chemical stability in hydrochloric acid solution and is sensitive for pH detection. Thus, our molecular gated-AlGaN/GaN high electron mobility transistor acheived good electrical performances such as chemical stability (remained stable in hydrochloric acid solution), good sensitivity (37.17 μA/pH) and low hysteresis. The results indicate a promising future for high-quality sensors for pH detection.

  20. On-line monitoring of base current and forward emitter current gain of the voltage regulator's serial pnp transistor in a radiation environment

    Directory of Open Access Journals (Sweden)

    Vukić Vladimir Đ.

    2012-01-01

    Full Text Available A method of on-line monitoring of the low-dropout voltage regulator's operation in a radiation environment is developed in this paper. The method had to enable detection of the circuit's degradation during exploitation, without terminating its operation in an ionizing radiation field. Moreover, it had to enable automatic measurement and data collection, as well as the detection of any considerable degradation, well before the monitored voltage regulator's malfunction. The principal parameters of the voltage regulator's operation that were monitored were the serial pnp transistor's base current and the forward emitter current gain. These parameters were procured indirectly, from the data on the voltage regulator's load and quiescent currents. Since the internal consumption current in moderately and heavily loaded devices was used, the quiescent current of a negligibly loaded voltage regulator of the same type served as a reference. Results acquired by on-line monitoring demonstrated marked agreement with the results acquired from examinations of the voltage regulator's maximum output current and minimum dropout voltage in a radiation environment. The results were particularly consistent in tests with heavily loaded devices. Results obtained for moderately loaded voltage regulators and the risks accompanying the application of the presented method, were also analyzed.

  1. Comprehensive review on the development of high mobility in oxide thin film transistors

    Science.gov (United States)

    Choi, Jun Young; Lee, Sang Yeol

    2017-11-01

    Oxide materials are one of the most advanced key technology in the thin film transistors (TFTs) for the high-end of device applications. Amorphous oxide semiconductors (AOSs) have leading technique for flat panel display (FPD), active matrix organic light emitting display (AMOLED) and active matrix liquid crystal display (AMLCD) due to their excellent electrical characteristics, such as field effect mobility ( μ FE ), subthreshold swing (S.S) and threshold voltage ( V th ). Covalent semiconductor like amorphous silicon (a-Si) is attributed to the anti-bonding and bonding states of Si hybridized orbitals. However, AOSs have not grain boundary and excellent performances originated from the unique characteristics of AOS which is the direct orbital overlap between s orbitals of neighboring metal cations. High mobility oxide TFTs have gained attractive attention during the last few years and today in display industries. It is progressively developed to increase the mobility either by exploring various oxide semiconductors or by adopting new TFT structures. Mobility of oxide thin film transistor has been rapidly increased from single digit to higher than 100 cm2/V·s in a decade. In this review, we discuss on the comprehensive review on the mobility of oxide TFTs in a decade and propose bandgap engineering and novel structure to enhance the electrical characteristics of oxide TFTs.

  2. A highly conducting organic metal derived from an organic-transistor material: benzothienobenzothiophene.

    Science.gov (United States)

    Kadoya, Tomofumi; Ashizawa, Minoru; Higashino, Toshiki; Kawamoto, Tadashi; Kumeta, Shohei; Matsumoto, Hidetoshi; Mori, Takehiko

    2013-11-07

    BTBT ([1]benzothieno[3,2-b][1]benzothiophene) is an organic semiconductor that realizes high mobility in organic transistors. Here we report that the charge-transfer (CT) salt, (BTBT)2PF6, shows a high room-temperature conductivity of 1500 S cm(-1). This compound exhibits a resistivity jump around 150 K, but when it is covered with Apiezon N grease the resistivity jump is suppressed, and the metallic conductivity is maintained down to 60 K. Owing to the very high conductivity, the ESR signal shows a significantly asymmetric Dysonian lineshape (A/B ≅ 3) even at room temperature. Since most organic conductors are based on strong electron donors, it is remarkable that such a weak electron donor as BTBT realizes a stable and highly conducting organic metal.

  3. Azaisoindigo conjugated polymers for high performance n-type and ambipolar thin film transistor applications

    KAUST Repository

    Yue, Wan

    2016-09-28

    Two new alternating copolymers, PAIIDBT and PAIIDSe have been prepared by incorporating a highly electron deficient azaisoindigo core. The molecular structure and packing of the monomer is determined from the single crystal X-ray diffraction. Both polymers exhibit high EAs and highly planar polymer backbones. When polymers are used as the semiconducting channel for solution-processed thin film transistor application, good properties are observed. A–A type PAIIDBT exhibits unipolar electron mobility as high as 1.0 cm2 V−1 s−1, D–A type PAIIDSe exhibits ambipolar charge transport behavior with predominately electron mobility up to 0.5 cm2 V−1 s−1 and hole mobility to 0.2 cm2 V−1 s−1. The robustness of the extracted mobility values are also commented on in detail. Molecular orientation, thin film morphology and energetic disorder of both polymers are systematically investigated.

  4. N-polar GaN epitaxy and high electron mobility transistors

    International Nuclear Information System (INIS)

    Wong, Man Hoi; Keller, Stacia; Dasgupta, Nidhi Sansaptak; Denninghoff, Daniel J; Kolluri, Seshadri; Brown, David F; Lu, Jing; Fichtenbaum, Nicholas A; Ahmadi, Elaheh; DenBaars, Steven P; Speck, James S; Mishra, Umesh K; Singisetti, Uttam; Chini, Alessandro; Rajan, Siddharth

    2013-01-01

    This paper reviews the progress of N-polar (0001-bar) GaN high frequency electronics that aims at addressing the device scaling challenges faced by GaN high electron mobility transistors (HEMTs) for radio-frequency and mixed-signal applications. Device quality (Al, In, Ga)N materials for N-polar heterostructures are developed using molecular beam epitaxy and metalorganic chemical vapor deposition. The principles of polarization engineering for designing N-polar HEMT structures will be outlined. The performance, scaling behavior and challenges of microwave power devices as well as highly-scaled depletion- and enhancement-mode devices employing advanced technologies including self-aligned processes, n+ (In,Ga)N ohmic contact regrowth and high aspect ratio T-gates will be discussed. Recent research results on integrating N-polar GaN with Si for prospective novel applications will also be summarized. (invited review)

  5. Suppression of subthreshold characteristics variation for junctionless multigate transistors using high-k spacers

    International Nuclear Information System (INIS)

    Lou, Haijun; Zhang, Baili; Li, Dan; Lin, Xinnan; He, Jin; Chan, Mansun

    2015-01-01

    In this work, the high-k spacer is proposed to suppress the subthreshold characteristics variation of junctionless multigate transistor (JMT) with non-ideal sidewall angle for the first time. It is demonstrated that the variation of subthreshold characteristics induced by the changing sidewall angle is efficiently suppressed by high-k spacers due to the enhanced corner effect through the fringe capacitance, and the electrostatic integrity of JMTs is also improved at sub-22 nm gate length. Two key parameters of high-k spacer, the thickness and length, have been optimized in terms of the suppression of subthreshold characteristics variation. Then their optimal values are proposed. The benefit of high-k spacer makes JMTs more scalable. (paper)

  6. Reliability of AlGaN/GaN high electron mobility transistors on low dislocation density bulk GaN substrate: Implications of surface step edges

    Energy Technology Data Exchange (ETDEWEB)

    Killat, N., E-mail: Nicole.Killat@bristol.ac.uk, E-mail: Martin.Kuball@bristol.ac.uk; Montes Bajo, M.; Kuball, M., E-mail: Nicole.Killat@bristol.ac.uk, E-mail: Martin.Kuball@bristol.ac.uk [Center for Device Thermography and Reliability (CDTR), H.H. Wills Physics Laboratory, Tyndall Avenue, Bristol BS8 1TL (United Kingdom); Paskova, T. [Kyma Technologies, Inc., Raleigh, North Carolina 27617 (United States); Materials Science and Engineering Department, North Carolina State University, Raleigh, North Carolina 27695 (United States); Evans, K. R. [Kyma Technologies, Inc., Raleigh, North Carolina 27617 (United States); Leach, J. [Kyma Technologies, Inc., Raleigh, North Carolina 27617 (United States); Electrical and Computer Engineering Department, Virginia Commonwealth University, Richmond, Virginia 23284 (United States); Li, X.; Özgür, Ü.; Morkoç, H. [Electrical and Computer Engineering Department, Virginia Commonwealth University, Richmond, Virginia 23284 (United States); Chabak, K. D.; Crespo, A.; Gillespie, J. K.; Fitch, R.; Kossler, M.; Walker, D. E.; Trejo, M.; Via, G. D.; Blevins, J. D. [Air Force Research Laboratory, Wright-Patterson Air Force Base, Dayton, Ohio 45433 (United States)

    2013-11-04

    To enable gaining insight into degradation mechanisms of AlGaN/GaN high electron mobility transistors, devices grown on a low-dislocation-density bulk-GaN substrate were studied. Gate leakage current and electroluminescence (EL) monitoring revealed a progressive appearance of EL spots during off-state stress which signify the generation of gate current leakage paths. Atomic force microscopy evidenced the formation of semiconductor surface pits at the failure location, which corresponds to the interaction region of the gate contact edge and the edges of surface steps.

  7. High current polarized electron source

    Science.gov (United States)

    Suleiman, R.; Adderley, P.; Grames, J.; Hansknecht, J.; Poelker, M.; Stutzman, M.

    2018-05-01

    Jefferson Lab operates two DC high voltage GaAs photoguns with compact inverted insulators. One photogun provides the polarized electron beam at the Continuous Electron Beam Accelerator Facility (CEBAF) up to 200 µA. The other gun is used for high average current photocathode lifetime studies at a dedicated test facility up to 4 mA of polarized beam and 10 mA of un-polarized beam. GaAs-based photoguns used at accelerators with extensive user programs must exhibit long photocathode operating lifetime. Achieving this goal represents a significant challenge for proposed facilities that must operate in excess of tens of mA of polarized average current. This contribution describes techniques to maintain good vacuum while delivering high beam currents, and techniques that minimize damage due to ion bombardment, the dominant mechanism that reduces photocathode yield. Advantages of higher DC voltage include reduced space-charge emittance growth and the potential for better photocathode lifetime. Highlights of R&D to improve the performance of polarized electron sources and prolong the lifetime of strained-superlattice GaAs are presented.

  8. High current and high power superconducting rectifiers

    International Nuclear Information System (INIS)

    Kate, H.H.J. ten; Bunk, P.B.; Klundert, L.J.M. van de; Britton, R.B.

    1981-01-01

    Results on three experimental superconducting rectifiers are reported. Two of them are 1 kA low frequency flux pumps, one thermally and magnetically switched. The third is a low-current high-frequency magnetically switched rectifier which can use the mains directly. (author)

  9. Water-gel for gating graphene transistors.

    Science.gov (United States)

    Kim, Beom Joon; Um, Soong Ho; Song, Woo Chul; Kim, Yong Ho; Kang, Moon Sung; Cho, Jeong Ho

    2014-05-14

    Water, the primary electrolyte in biology, attracts significant interest as an electrolyte-type dielectric material for transistors compatible with biological systems. Unfortunately, the fluidic nature and low ionic conductivity of water prevents its practical usage in such applications. Here, we describe the development of a solid state, megahertz-operating, water-based gate dielectric system for operating graphene transistors. The new electrolyte systems were prepared by dissolving metal-substituted DNA polyelectrolytes into water. The addition of these biocompatible polyelectrolytes induced hydrogelation to provide solid-state integrity to the system. They also enhanced the ionic conductivities of the electrolytes, which in turn led to the quick formation of an electric double layer at the graphene/electrolyte interface that is beneficial for modulating currents in graphene transistors at high frequencies. At the optimized conditions, the Na-DNA water-gel-gated flexible transistors and inverters were operated at frequencies above 1 MHz and 100 kHz, respectively.

  10. Low temperature high-mobility InZnO thin-film transistors fabricated by excimer laser annealing

    NARCIS (Netherlands)

    Fujii, M.; Ishikawa, Y.; Ishihara, R.; Van der Cingel, J.; Mofrad, M.R.T.; Horita, M.; Uraoka, Y.

    2013-01-01

    In this study, we successfully achieved a relatively high field-effect mobility of 37.7?cm2/Vs in an InZnO thin-film transistor (TFT) fabricated by excimer layer annealing (ELA). The ELA process allowed us to fabricate such a high-performance InZnO TFT at the substrate temperature less than 50?°C

  11. High Critical Current Coated Conductors

    Energy Technology Data Exchange (ETDEWEB)

    Paranthaman, M. P.; Selvamanickam, V. (SuperPower, Inc.)

    2011-12-27

    One of the important critical needs that came out of the DOE’s coated conductor workshop was to develop a high throughput and economic deposition process for YBCO. Metal-organic chemical vapor deposition (MOCVD) technique, the most critical steps in high technical micro fabrications, has been widely employed in semiconductor industry for various thin film growth. SuperPower has demonstrated that (Y,Gd)BCO films can be deposited rapid with world record performance. In addition to high critical current density with increased film thickness, flux pinning properties of REBCO films needs to be improved to meet the DOE requirements for various electric-power equipments. We have shown that doping with Zr can result in BZO nanocolumns, but at substantially reduced deposition rate. The primary purpose of this subtask is to develop high current density MOCVD-REBCO coated conductors based on the ion-beam assisted (IBAD)-MgO deposition process. Another purpose of this subtask is to investigate HTS conductor design optimization (maximize Je) with emphasis on stability and protection issues, and ac loss for REBCO coated conductors.

  12. Highly efficient conductance control in a topological insulator based magnetoelectric transistor

    Energy Technology Data Exchange (ETDEWEB)

    Duan, Xiaopeng; Li, Xi-Lai; Li, Xiaodong; Semenov, Yuriy G. [Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States); Kim, Ki Wook, E-mail: kwk@ncsu.edu [Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States); Department of Physics, North Carolina State University, Raleigh, North Carolina 27695 (United States)

    2015-12-14

    The spin-momentum interlocked properties of the topological insulator (TI) surface states are exploited in a transistor-like structure for efficient conductance control in the TI-magnet system. Combined with the electrically induced magnetization rotation as part of the gate function, the proposed structure takes advantage of the magnetically modulated TI electronic band dispersion in addition to the conventional electrostatic barrier. The transport analysis coupled with the magnetic simulation predicts super-steep current-voltage characteristics near the threshold along with the GHz operating frequencies. Potential implementation to a complementary logic is also examined. The predicted characteristics are most suitable for applications requiring low power or those with small signals.

  13. Molecular Design of Semiconducting Polymers for High-Performance Organic Electrochemical Transistors

    KAUST Repository

    Nielsen, Christian B.

    2016-07-22

    The organic electrochemical transistor (OECT), capable of transducing small ionic fluxes into electronic signals in an aqueous envi-ronment, is an ideal device to utilize in bioelectronic applications. Currently, most OECTs are fabricated with commercially availa-ble conducting poly(3,4-ethylenedioxythiophene) (PEDOT)-based suspensions and are therefore operated in depletion mode. Here, we present a series of semiconducting polymers designed to elucidate important structure-property guidelines required for accumulation mode OECT operation. We discuss key aspects relating to OECT performance such as ion and hole transport, elec-trochromic properties, operational voltage and stability. The demonstration of our molecular design strategy is the fabrication of accumulation mode OECTs that clearly outperform state-of-the-art PEDOT based devices, and show stability under aqueous oper-ation without the need for formulation additives and cross-linkers.

  14. High resolution eddy current microscopy

    Science.gov (United States)

    Lantz, M. A.; Jarvis, S. P.; Tokumoto, H.

    2001-01-01

    We describe a sensitive scanning force microscope based technique for measuring local variations in resistivity by monitoring changes in the eddy current induced damping of a cantilever with a magnetic tip oscillating above a conducting sample. To achieve a high sensitivity, we used a cantilever with an FeNdBLa particle mounted on the tip. Resistivity measurements are demonstrated on a silicon test structure with a staircase doping profile. Regions with resistivities of 0.0013, 0.0041, and 0.022 Ω cm are clearly resolved with a lateral resolution of approximately 180 nm. For this range of resistivities, the eddy current induced damping is found to depend linearly on the sample resistivity.

  15. Temperature dependence of ballistic mobility in a metamorphic InGaAs/InAlAs high electron mobility transistor

    International Nuclear Information System (INIS)

    Lee, Jongkyong; Gang, Suhyun; Jo, Yongcheol; Kim, Jongmin; Woo, Hyeonseok; Han, Jaeseok; Kim, Hyungsang; Im, Hyunsik

    2014-01-01

    We have investigated the temperature dependence of ballistic mobility in a 100 nm-long InGaAs/InAlAs metamorphic high-electron-mobility transistor designed for millimeter-wavelength RF applications. To extract the temperature dependence of quasi-ballistic mobility, our experiment involves measurements of the effective mobility in the low-bias linear region of the transistor and of the collision-dominated Hall mobility using a gated Hall bar of the same epitaxial structure. The data measured from the experiment are consistent with that of modeled ballistic mobility based on ballistic transport theory. These results advance the understanding of ballistic transport in various transistors with a nano-scale channel length that is comparable to the carrier's mean free path in the channel.

  16. Characteristics of drain-modulated generation current in n-type metal-oxide-semiconductor field-effect transistor

    International Nuclear Information System (INIS)

    Chen Hai-Feng; Guo Li-Xin; Zheng Pu-Yang; Dong Zhao; Zhang Qian

    2015-01-01

    Drain-modulated generation current I DMG induced by interface traps in an n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) is investigated. The formation of I DMG ascribes to the change of the Si surface potential φ s . This change makes the channel suffer transformation from the inversion state, depletion I state to depletion II state. The simulation result agrees with the experiment in the inversion and depletion I states. In the depletion II state, the theoretical curve goes into saturation, while the experimental curve drops quickly as V D increases. The reason for this unconformity is that the drain-to-gate voltage V DG lessens φ s around the drain corner and controls the falling edge of the I DMG curve. The experiments of gate-modulated generation and recombination currents are also applied to verify the reasonability of the mechanism. Based on this mechanism, a theoretical model of the I DMG falling edge is set up in which I DMG has an exponential attenuation relation with V DG . Finally, the critical fitting coefficient t of the experimental curves is extracted. It is found that t = 80 mV = 3kT/q. This result fully shows the accuracy of the above mechanism. (paper)

  17. Highly selective and sensitive sensor based on an organic electrochemical transistor for the detection of ascorbic acid.

    Science.gov (United States)

    Zhang, Lijun; Wang, Guiheng; Wu, Di; Xiong, Can; Zheng, Lei; Ding, Yunsheng; Lu, Hongbo; Zhang, Guobing; Qiu, Longzhen

    2018-02-15

    In this study, an organic electrochemical transistor sensor (OECT) with a molecularly imprinted polymer (MIP)-modified gate electrode was prepared for the detection of ascorbic acid (AA). The combination of the amplification function of an OECT and the selective specificity of MIPs afforded a highly sensitive, selective OECT sensor. Cyclic voltammetry and electrochemical impedance spectroscopy measurements were carried out to monitor the stepwise fabrication of the modified electrodes and the adsorption capacity of the MIP/Au electrodes. Atomic force microscopy was employed for examining the surface morphology of the electrodes. Important detection parameters, pH and detection temperature were optimized. With the change in the relative concentration of AA from 1μM to 100μM, the MIP-OECT sensor exhibited a low detection limit of 10nM (S/N > 3) and a sensitivity of 75.3μA channel current change per decade under optimal conditions. In addition, the MIP-OECT sensor exhibited excellent specific recognition ability to AA, which prevented the interference from other structurally similar compounds (e.g., aspartic acid, glucose, uric acid, glycine, glutathione, H 2 O 2 ), and common metal ions (K + , Na + , Ca 2+ , Mg 2+ , and Fe 2+ ). In addition, a series of vitamin C beverages were analyzed to demonstrate the feasibility of the MIP-OECT sensor. Using the proposed principle, several other sensors with improved performance can be constructed via the modification of organic electrochemical transistors with appropriate MIP films. Copyright © 2017 Elsevier B.V. All rights reserved.

  18. Vinyl Flanked Difluorobenzothiadiazole-Dithiophene Conjugated Polymer for High Performance Organic Field-Effect Transistors.

    Energy Technology Data Exchange (ETDEWEB)

    Liang, Xianfeng; Sun, Wandong; Chen, Yanlin; Tan, Luxi; Cai, Zheng-Xu; Liu, Zitong; Wang, Lin; Li, Jing; Chen, Wei; Dong, Lichun

    2018-02-21

    Fluorine containing conjugated polymers have been widely applied in high performance organic solar cells, but their use in field-effect transistors is still quite limited. In this work, a conjugated polymer PTFBTV based on difluorobenzothiadiazole (DFBT) and dithiophene was synthesized, utilizing multiple vinylene as linkers. The polymer exhibits a relatively high hole mobility up to 2.0 cm(2) V-1 s(-1) compared with the reported DFBT-oligothiophene based polymers, yet its structural complexity is much simpler. The polymer thin film exhibits a typical 'face on' molecular orientation. A single crystal of its monomer revealed a non-covalent intramolecular contact between fluorine and the neighbouring proton, which strengthens the backbone co-planarity. Meanwhile an intermolecular F...F contact was also observed, which might cause rather scattered lamellar crystallinity for PTFBTV in the solid state.

  19. High-power microwave LDMOS transistors for wireless data transmission technologies (Review)

    International Nuclear Information System (INIS)

    Kuznetsov, E. V.; Shemyakin, A. V.

    2010-01-01

    The fields of the application, structure, fabrication, and packaging technology of high-power microwave LDMOS transistors and the main advantages of these devices were analyzed. Basic physical parameters and some technology factors were matched for optimum device operation. Solid-state microwave electronics has been actively developed for the last 10-15 years. Simultaneously with improvement of old devices, new devices and structures are actively being adopted and developed and new semiconductor materials are being commercialized. Microwave LDMOS technology is in demand in such fields as avionics, civil and military radars, repeaters, base stations of cellular communication systems, television and broadcasting transmitters, and transceivers for high-speed wireless computer networks (promising Wi-Fi and Wi-Max standards).

  20. A New XOR Structure Based on Resonant-Tunneling High Electron Mobility Transistor

    Directory of Open Access Journals (Sweden)

    Mohammad Javad Sharifi

    2009-01-01

    Full Text Available A new structure for an exclusive-OR (XOR gate based on the resonant-tunneling high electron mobility transistor (RTHEMT is introduced which comprises only an RTHEMT and two FETs. Calculations are done by utilizing a new subcircuit model for simulating the RTHEMT in the SPICE simulator. Details of the design, input, and output values and margins, delay of each transition, maximum operating frequency, static and dynamic power dissipations of the new structure are discussed and calculated and the performance is compared with other XOR gates which confirm that the presented structure has a high performance. Furthermore, to the best of authors' knowledge, it has the least component count in comparison to the existing structures.

  1. High yield fabrication of chemically reduced graphene oxide field effect transistors by dielectrophoresis

    International Nuclear Information System (INIS)

    Joung, Daeha; Chunder, A; Zhai, Lei; Khondaker, Saiful I

    2010-01-01

    We demonstrate high yield fabrication of field effect transistors (FET) using chemically reduced graphene oxide (RGO) sheets. The RGO sheets suspended in water were assembled between prefabricated gold source and drain electrodes using ac dielectrophoresis. With the application of a backgate voltage, 60% of the devices showed p-type FET behavior, while the remaining 40% showed ambipolar behavior. After mild thermal annealing at 200 deg. C, all ambipolar RGO FET remained ambipolar with increased hole and electron mobility, while 60% of the p-type RGO devices were transformed to ambipolar. The maximum hole and electron mobilities of the devices were 4.0 and 1.5 cm 2 V -1 s -1 respectively. High yield assembly of chemically derived RGO FET will have significant impact in scaled up fabrication of graphene based nanoelectronic devices.

  2. High performance organic transistor active-matrix driver developed on paper substrate

    Science.gov (United States)

    Peng, Boyu; Ren, Xiaochen; Wang, Zongrong; Wang, Xinyu; Roberts, Robert C.; Chan, Paddy K. L.

    2014-09-01

    The fabrication of electronic circuits on unconventional substrates largely broadens their application areas. For example, green electronics achieved through utilization of biodegradable or recyclable substrates, can mitigate the solid waste problems that arise at the end of their lifespan. Here, we combine screen-printing, high precision laser drilling and thermal evaporation, to fabricate organic field effect transistor (OFET) active-matrix (AM) arrays onto standard printer paper. The devices show a mobility and on/off ratio as high as 0.56 cm2V-1s-1 and 109 respectively. Small electrode overlap gives rise to a cut-off frequency of 39 kHz, which supports that our AM array is suitable for novel practical applications. We demonstrate an 8 × 8 AM light emitting diode (LED) driver with programmable scanning and information display functions. The AM array structure has excellent potential for scaling up.

  3. Instrumentation for Gate Current Noise Measurements on sub-100 nm MOS Transistors

    CERN Document Server

    Gaioni, L; Ratti, L; Re, V; Speziali, V; Traversi, G

    2008-01-01

    This work describes a measuring system that was developed to characterize the gate current noise performances of CMOS devices with minimum feature size in the 100 nm span. These devices play an essential role in the design of present daymixedsignal integrated circuits, because of the advantages associated with the scaling process. The reduction in the gate oxide thickness brought about by CMOS technology downscaling leads to a non-negligible gate current due to direct tunneling phenomena; this current represents a noise source which requires an accurate characterization for optimum analog design. In this paper, two instruments able to perform measurements in two different ranges of gate current values will be discussed. Some of the results of gate current noise characterization will also be presented.

  4. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2015-01-01

    Full Text Available We investigated amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using different high-k gate dielectric materials such as silicon nitride (Si3N4 and aluminum oxide (Al2O3 at low temperature process (<300°C and compared them with low temperature silicon dioxide (SiO2. The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.

  5. Effects of Energy Relaxation via Quantum Coupling Among Three-Dimensional Motion on the Tunneling Current of Graphene Field-Effect Transistors.

    Science.gov (United States)

    Mao, Ling-Feng; Ning, Huansheng; Li, Xijun

    2015-12-01

    We report theoretical study of the effects of energy relaxation on the tunneling current through the oxide layer of a two-dimensional graphene field-effect transistor. In the channel, when three-dimensional electron thermal motion is considered in the Schrödinger equation, the gate leakage current at a given oxide field largely increases with the channel electric field, electron mobility, and energy relaxation time of electrons. Such an increase can be especially significant when the channel electric field is larger than 1 kV/cm. Numerical calculations show that the relative increment of the tunneling current through the gate oxide will decrease with increasing the thickness of oxide layer when the oxide is a few nanometers thick. This highlights that energy relaxation effect needs to be considered in modeling graphene transistors.

  6. Characterising thermal resistances and capacitances of GaN high-electron-mobility transistors through dynamic electrothermal measurements

    DEFF Research Database (Denmark)

    Wei, Wei; Mikkelsen, Jan H.; Jensen, Ole Kiel

    2014-01-01

    This study presents a method to characterise thermal resistances and capacitances of GaN high-electron-mobility transistors (HEMTs) through dynamic electrothermal measurements. A measured relation between RF gain and the channel temperature (Tc) is formed and used for indirect measurements...

  7. High Mobility Thin Film Transistors Based on Amorphous Indium Zinc Tin Oxide

    Directory of Open Access Journals (Sweden)

    Imas Noviyana

    2017-06-01

    Full Text Available Top-contact bottom-gate thin film transistors (TFTs with zinc-rich indium zinc tin oxide (IZTO active layer were prepared at room temperature by radio frequency magnetron sputtering. Sintered ceramic target was prepared and used for deposition from oxide powder mixture having the molar ratio of In2O3:ZnO:SnO2 = 2:5:1. Annealing treatment was carried out for as-deposited films at various temperatures to investigate its effect on TFT performances. It was found that annealing treatment at 350 °C for 30 min in air atmosphere yielded the best result, with the high field effect mobility value of 34 cm2/Vs and the minimum subthreshold swing value of 0.12 V/dec. All IZTO thin films were amorphous, even after annealing treatment of up to 350 °C.

  8. High performance In2O3 thin film transistors using chemically derived aluminum oxide dielectric

    KAUST Repository

    Nayak, Pradipta K.

    2013-07-18

    We report high performance solution-deposited indium oxide thin film transistors with field-effect mobility of 127 cm2/Vs and an Ion/Ioff ratio of 106. This excellent performance is achieved by controlling the hydroxyl group content in chemically derived aluminum oxide (AlOx) thin-film dielectrics. The AlOx films annealed in the temperature range of 250–350 °C showed higher amount of Al-OH groups compared to the films annealed at 500 °C, and correspondingly higher mobility. It is proposed that the presence of Al-OH groups at the AlOx surface facilitates unintentional Al-doping and efficient oxidation of the indium oxide channel layer, leading to improved device performance.

  9. High performance In2O3 thin film transistors using chemically derived aluminum oxide dielectric

    KAUST Repository

    Nayak, Pradipta K.; Hedhili, Mohamed N.; Cha, Dong Kyu; Alshareef, Husam N.

    2013-01-01

    We report high performance solution-deposited indium oxide thin film transistors with field-effect mobility of 127 cm2/Vs and an Ion/Ioff ratio of 106. This excellent performance is achieved by controlling the hydroxyl group content in chemically derived aluminum oxide (AlOx) thin-film dielectrics. The AlOx films annealed in the temperature range of 250–350 °C showed higher amount of Al-OH groups compared to the films annealed at 500 °C, and correspondingly higher mobility. It is proposed that the presence of Al-OH groups at the AlOx surface facilitates unintentional Al-doping and efficient oxidation of the indium oxide channel layer, leading to improved device performance.

  10. Electric field driven plasmon dispersion in AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Tan Ren-Bing; Qin Hua; Zhang Xiao-Yu; Xu Wen

    2013-01-01

    We present a theoretical study on the electric field driven plasmon dispersion of the two-dimensional electron gas (2DEG) in AlGaN/GaN high electron mobility transistors (HEMTs). By introducing a drifted Fermi—Dirac distribution, we calculate the transport properties of the 2DEG in the AlGaN/GaN interface by employing the balance-equation approach based on the Boltzmann equation. Then, the nonequilibrium Fermi—Dirac function is obtained by applying the calculated electron drift velocity and electron temperature. Under random phase approximation (RPA), the electric field driven plasmon dispersion is investigated. The calculated results indicate that the plasmon frequency is dominated by both the electric field E and the angle between wavevector q and electric field E. Importantly, the plasmon frequency could be tuned by the applied source—drain bias voltage besides the gate voltage (change of the electron density)

  11. Three-terminal heterojunction bipolar transistor solar cell for high-efficiency photovoltaic conversion.

    Science.gov (United States)

    Martí, A; Luque, A

    2015-04-22

    Here we propose, for the first time, a solar cell characterized by a semiconductor transistor structure (n/p/n or p/n/p) where the base-emitter junction is made of a high-bandgap semiconductor and the collector is made of a low-bandgap semiconductor. We calculate its detailed-balance efficiency limit and prove that it is the same one than that of a double-junction solar cell. The practical importance of this result relies on the simplicity of the structure that reduces the number of layers that are required to match the limiting efficiency of dual-junction solar cells without using tunnel junctions. The device naturally emerges as a three-terminal solar cell and can also be used as building block of multijunction solar cells with an increased number of junctions.

  12. Damage effect and mechanism of the GaAs pseudomorphic high electron mobility transistor induced by the electromagnetic pulse

    Science.gov (United States)

    Xiao-Wen, Xi; Chang-Chun, Chai; Gang, Zhao; Yin-Tang, Yang; Xin-Hai, Yu; Yang, Liu

    2016-04-01

    The damage effect and mechanism of the electromagnetic pulse (EMP) on the GaAs pseudomorphic high electron mobility transistor (PHEMT) are investigated in this paper. By using the device simulation software, the distributions and variations of the electric field, the current density and the temperature are analyzed. The simulation results show that there are three physical effects, i.e., the forward-biased effect of the gate Schottky junction, the avalanche breakdown, and the thermal breakdown of the barrier layer, which influence the device current in the damage process. It is found that the damage position of the device changes with the amplitude of the step voltage pulse. The damage appears under the gate near the drain when the amplitude of the pulse is low, and it also occurs under the gate near the source when the amplitude is sufficiently high, which is consistent with the experimental results. Project supported by the National Basic Research Program of China (Grant No. 2014CB339900), and the Open Fund of Key Laboratory of Complex Electromagnetic Environment Science and Technology, China Academy of Engineering Physics (CAEP) (Grant No. 2015-0214.XY.K).

  13. Bimodal gate-dielectric deposition for improved performance of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    International Nuclear Information System (INIS)

    Pang Liang; Kim, Kyekyoon

    2012-01-01

    A bimodal deposition scheme combining radiofrequency magnetron sputtering and plasma enhanced chemical vapour deposition (PECVD) is proposed as a means for improving the performance of GaN-based metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs). High-density sputtered-SiO 2 is utilized to reduce the gate leakage current and enhance the breakdown voltage while low-density PECVD-SiO 2 is employed to buffer the sputtering damage and further increase the drain current by engineering the stress-induced-polarization. Thus-fabricated MOSHEMT exhibited a low leakage current of 4.21 × 10 -9 A mm -1 and high breakdown voltage of 634 V for a gate-drain distance of 6 µm, demonstrating the promise of bimodal-SiO 2 deposition scheme for the development of GaN-based MOSHEMTs for high-power application. (paper)

  14. High current capacity electrical connector

    International Nuclear Information System (INIS)

    Bettis, E.S.; Watts, H.L.

    1976-01-01

    An electrical connector is provided for coupling high current capacity electrical conductors such as copper busses or the like. The connector is arranged in a ''sandwiched'' configuration in which a conductor plate contacts the busses along major surfaces clamped between two stainless steel backing plates. The conductor plate is provided with contact buttons in a spaced array such that the caps of the buttons extend above the conductor plate surface to contact the busses. When clamping bolts provided through openings in the sandwiched arrangement are tightened, Belleville springs provided under the rim of each button cap are compressed and resiliently force the caps into contact with the busses' contacting surfaces to maintain a predetermined electrical contact area provided by the button cap tops. The contact area does not change with changing thermal or mechanical stresses applied to the coupled conductors

  15. High current superconductors for DEMO

    Energy Technology Data Exchange (ETDEWEB)

    Bruzzone, Pierluigi, E-mail: pierluigi.bruzzone@psi.ch [Ecole Polytechnique Fédérale de Lausanne (EPFL), Centre de Recherches en Physique des Plasmas (CRPP), Association Euratom – Confédération Suisse, CH-5232 Villigen PSI (Switzerland); Sedlak, Kamil; Stepanov, Boris [Ecole Polytechnique Fédérale de Lausanne (EPFL), Centre de Recherches en Physique des Plasmas (CRPP), Association Euratom – Confédération Suisse, CH-5232 Villigen PSI (Switzerland)

    2013-10-15

    Highlights: ► Definition of requirement for TF coil based on the input of system code. ► A TF coil and conductor design for the European DEMO project. ► Use of React and Wind method opposite to Wind and React with related advantages. ► Hybridization of winding pack, Nb/Nb{sub 3}Sn, by graded layer winding. -- Abstract: In the assumption that DEMO will be an inductively driven tokamak, the number of load cycles will be in the range of several hundred thousands. The requirements for a new generation of Nb{sub 3}Sn based high current conductors for DEMO are drafted starting from the output of system code PROCESS. The key objectives include the stability of the DC performance over the lifetime of the machine and the effective use of the Nb{sub 3}Sn strand properties, for cost and reliability reasons. A preliminary layout of the winding pack and conductors for the toroidal field magnets is presented. To suppress the mechanism of reversible and irreversible degradation, i.e. to preserve in the cabled conductor the high critical current density of the strand, the thermal strain must be insignificant and no space for micro-bending under transverse load must be left in the strand bundle. The “react-and-wind” method is preferred here, with a graded, layer wound magnet, containing both Nb{sub 3}Sn and NbTi layers. The implications of the conductor choice on the coil design and technology are highlighted. A roadmap is sketched for the development of a full size prototype conductor sample and demonstration of the key technologies.

  16. Electrical performance of multilayer MoS2 transistors on high-κ Al2O3 coated Si substrates

    Directory of Open Access Journals (Sweden)

    Tao Li

    2015-05-01

    Full Text Available The electrical performance of MoS2 can be engineered by introducing high-κ dielectrics, while the interactions between high-κ dielectrics and MoS2 need to be studied. In this study, multilayer MoS2 field-effect transistors (FETs with a back-gated configuration were fabricated on high-κ Al2O3 coated Si substrates. Compared with MoS2 FETs on SiO2, the field-effect mobility (μFE and subthreshold swing (SS were remarkably improved in MoS2/Al2O3/Si. The improved μFE was thought to result from the dielectric screening effect from high-κ Al2O3. When a HfO2 passivation layer was introduced on the top of MoS2/Al2O3/Si, the field-effect mobility was further enhanced, which was thought to be concerned with the decreased contact resistance between the metal and MoS2. Meanwhile, the interface trap density increased from 2.4×1012 eV−1cm−2 to 6.3×1012 eV−1cm−2. The increase of the off-state current and the negative shift of the threshold voltage may be related to the increase of interface traps.

  17. A comparison of ionizing radiation and high field stress effects in n-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors

    International Nuclear Information System (INIS)

    Park, Mun-Soo; Na, Inmook; Wie, Chu R.

    2005-01-01

    n-channel power vertical double-diffused metal-oxide-semiconductor field-effect-transistor (VDMOSFET) devices were subjected to a high electric field stress or to a x-ray radiation. The current-voltage and capacitance-voltage measurements show that the channel-side interface and the drain-side interface are affected differently in the case of high electric field stress, whereas the interfaces are nearly uniformly affected in the case of x-ray radiation. This paper also shows that for the gated diode structure of VDMOSFET, the direct-current current-voltage technique measures only the drain-side interface; the subthreshold current-voltage technique measures only the channel-side interface; and the capacitance-voltage technique measures both interfaces simultaneously and clearly distinguishes the two interfaces. The capacitance-voltage technique is suggested to be a good quantitative method to examine both interface regions by a single measurement

  18. Radiation effects on junction field-effect transistors (JFETS), MOSFETs, and bipolar transistors, as related to SSC circuit design

    International Nuclear Information System (INIS)

    Kennedy, E.J.; Alley, G.T.; Britton, C.L. Jr.; Skubic, P.L.; Gray, B.; Wu, A.

    1990-01-01

    Some results of radiation effects on selected junction field-effect transistors, MOS field-effect transistors, and bipolar junction transistors are presented. The evaluations include dc parameters, as well as capacitive variations and noise evaluations. The tests are made at the low current and voltage levels (in particular, at currents ≤1 mA) that are essential for the low-power regimes required by SSC circuitry. Detailed noise data are presented both before and after 5-Mrad (gamma) total-dose exposure. SPICE radiation models for three high-frequency bipolar processes are compared for a typical charge-sensitive preamplifier

  19. Accelerating the life of transistors

    International Nuclear Information System (INIS)

    Qi Haochun; Lü Changzhi; Zhang Xiaoling; Xie Xuesong

    2013-01-01

    Choosing small and medium power switching transistors of the NPN type in a 3DK set as the study object, the test of accelerating life is conducted in constant temperature and humidity, and then the data are statistically analyzed with software developed by ourselves. According to degradations of such sensitive parameters as the reverse leakage current of transistors, the lifetime order of transistors is about more than 10 4 at 100 °C and 100% relative humidity (RH) conditions. By corrosion fracture of transistor outer leads and other failure modes, with the failure truncated testing, the average lifetime rank of transistors in different distributions is extrapolated about 10 3 . Failure mechanism analyses of degradation of electrical parameters, outer lead fracture and other reasons that affect transistor lifetime are conducted. The findings show that the impact of external stress of outer leads on transistor reliability is more serious than that of parameter degradation. (semiconductor devices)

  20. High Electron Mobility Thin-Film Transistors Based on Solution-Processed Semiconducting Metal Oxide Heterojunctions and Quasi-Superlattices

    KAUST Repository

    Lin, Yen-Hung; Faber, Hendrik; Labram, John G.; Stratakis, Emmanuel; Sygellou, Labrini; Kymakis, Emmanuel; Hastas, Nikolaos A.; Li, Ruipeng; Zhao, Kui; Amassian, Aram; Treat, Neil D.; McLachlan, Martyn; Anthopoulos, Thomas D.

    2015-01-01

    High mobility thin-film transistor technologies that can be implemented using simple and inexpensive fabrication methods are in great demand because of their applicability in a wide range of emerging optoelectronics. Here, a novel concept of thin-film transistors is reported that exploits the enhanced electron transport properties of low-dimensional polycrystalline heterojunctions and quasi-superlattices (QSLs) consisting of alternating layers of In2O3, Ga2O3, and ZnO grown by sequential spin casting of different precursors in air at low temperatures (180–200 °C). Optimized prototype QSL transistors exhibit band-like transport with electron mobilities approximately a tenfold greater (25–45 cm2 V−1 s−1) than single oxide devices (typically 2–5 cm2 V−1 s−1). Based on temperature-dependent electron transport and capacitance-voltage measurements, it is argued that the enhanced performance arises from the presence of quasi 2D electron gas-like systems formed at the carefully engineered oxide heterointerfaces. The QSL transistor concept proposed here can in principle extend to a range of other oxide material systems and deposition methods (sputtering, atomic layer deposition, spray pyrolysis, roll-to-roll, etc.) and can be seen as an extremely promising technology for application in next-generation large area optoelectronics such as ultrahigh definition optical displays and large-area microelectronics where high performance is a key requirement.

  1. High Electron Mobility Thin-Film Transistors Based on Solution-Processed Semiconducting Metal Oxide Heterojunctions and Quasi-Superlattices

    KAUST Repository

    Lin, Yen-Hung

    2015-05-26

    High mobility thin-film transistor technologies that can be implemented using simple and inexpensive fabrication methods are in great demand because of their applicability in a wide range of emerging optoelectronics. Here, a novel concept of thin-film transistors is reported that exploits the enhanced electron transport properties of low-dimensional polycrystalline heterojunctions and quasi-superlattices (QSLs) consisting of alternating layers of In2O3, Ga2O3, and ZnO grown by sequential spin casting of different precursors in air at low temperatures (180–200 °C). Optimized prototype QSL transistors exhibit band-like transport with electron mobilities approximately a tenfold greater (25–45 cm2 V−1 s−1) than single oxide devices (typically 2–5 cm2 V−1 s−1). Based on temperature-dependent electron transport and capacitance-voltage measurements, it is argued that the enhanced performance arises from the presence of quasi 2D electron gas-like systems formed at the carefully engineered oxide heterointerfaces. The QSL transistor concept proposed here can in principle extend to a range of other oxide material systems and deposition methods (sputtering, atomic layer deposition, spray pyrolysis, roll-to-roll, etc.) and can be seen as an extremely promising technology for application in next-generation large area optoelectronics such as ultrahigh definition optical displays and large-area microelectronics where high performance is a key requirement.

  2. High Electron Mobility Thin‐Film Transistors Based on Solution‐Processed Semiconducting Metal Oxide Heterojunctions and Quasi‐Superlattices

    Science.gov (United States)

    Lin, Yen‐Hung; Faber, Hendrik; Labram, John G.; Stratakis, Emmanuel; Sygellou, Labrini; Kymakis, Emmanuel; Hastas, Nikolaos A.; Li, Ruipeng; Zhao, Kui; Amassian, Aram; Treat, Neil D.; McLachlan, Martyn

    2015-01-01

    High mobility thin‐film transistor technologies that can be implemented using simple and inexpensive fabrication methods are in great demand because of their applicability in a wide range of emerging optoelectronics. Here, a novel concept of thin‐film transistors is reported that exploits the enhanced electron transport properties of low‐dimensional polycrystalline heterojunctions and quasi‐superlattices (QSLs) consisting of alternating layers of In2O3, Ga2O3, and ZnO grown by sequential spin casting of different precursors in air at low temperatures (180–200 °C). Optimized prototype QSL transistors exhibit band‐like transport with electron mobilities approximately a tenfold greater (25–45 cm2 V−1 s−1) than single oxide devices (typically 2–5 cm2 V−1 s−1). Based on temperature‐dependent electron transport and capacitance‐voltage measurements, it is argued that the enhanced performance arises from the presence of quasi 2D electron gas‐like systems formed at the carefully engineered oxide heterointerfaces. The QSL transistor concept proposed here can in principle extend to a range of other oxide material systems and deposition methods (sputtering, atomic layer deposition, spray pyrolysis, roll‐to‐roll, etc.) and can be seen as an extremely promising technology for application in next‐generation large area optoelectronics such as ultrahigh definition optical displays and large‐area microelectronics where high performance is a key requirement. PMID:27660741

  3. High-Performance Flexible Thin-Film Transistors Based on Single-Crystal-like Silicon Epitaxially Grown on Metal Tape by Roll-to-Roll Continuous Deposition Process.

    Science.gov (United States)

    Gao, Ying; Asadirad, Mojtaba; Yao, Yao; Dutta, Pavel; Galstyan, Eduard; Shervin, Shahab; Lee, Keon-Hwa; Pouladi, Sara; Sun, Sicong; Li, Yongkuan; Rathi, Monika; Ryou, Jae-Hyun; Selvamanickam, Venkat

    2016-11-02

    Single-crystal-like silicon (Si) thin films on bendable and scalable substrates via direct deposition are a promising material platform for high-performance and cost-effective devices of flexible electronics. However, due to the thick and unintentionally highly doped semiconductor layer, the operation of transistors has been hampered. We report the first demonstration of high-performance flexible thin-film transistors (TFTs) using single-crystal-like Si thin films with a field-effect mobility of ∼200 cm 2 /V·s and saturation current, I/l W > 50 μA/μm, which are orders-of-magnitude higher than the device characteristics of conventional flexible TFTs. The Si thin films with a (001) plane grown on a metal tape by a "seed and epitaxy" technique show nearly single-crystalline properties characterized by X-ray diffraction, Raman spectroscopy, reflection high-energy electron diffraction, and transmission electron microscopy. The realization of flexible and high-performance Si TFTs can establish a new pathway for extended applications of flexible electronics such as amplification and digital circuits, more than currently dominant display switches.

  4. EDITORIAL: Reigniting innovation in the transistor Reigniting innovation in the transistor

    Science.gov (United States)

    Demming, Anna

    2012-09-01

    Today the transistor is integral to the electronic circuitry that wires our lives. When Bardeen and Brattain first observed an amplified signal by connecting electrodes to a germanium crystal they saw that their 'semiconductor triode' could prove a useful alternative to the more cumbersome vacuum tubes used at the time [1]. But it was perhaps William Schottky who recognized the extent of the transistor's potential. A basic transistor has three or more terminals and current across one pair of terminals can switch or amplify current through another pair. Bardeen, Brattain and Schottky were jointly awarded a Nobel Prize in 1956 'for their researches on semiconductors and their discovery of the transistor effect' [2]. Since then many new forms of the transistor have been developed and understanding of the underlying properties is constantly advancing. In this issue Chen and Shih and colleagues at Taiwan National University and Drexel University report a pyroelectrics transistor. They show how a novel optothermal gating mechanism can modulate the current, allowing a range of developments in nanoscale optoelectronics and wireless devices [3]. The explosion of interest in nanoscale devices in the 1990s inspired electronics researchers to look for new systems that can act as transistors, such as carbon nanotube [4] and silicon nanowire [5] transistors. Generally these transistors function by raising and lowering an energy barrier of kBT -1, but researchers in the US and Canada have demonstrated that the quantum interference between two electronic pathways through aromatic molecules can also modulate the current flow [6]. The device has advantages for further miniaturization where energy dissipation in conventional systems may eventually cause complications. Interest in transistor technology has also led to advances in fabrication techniques for achieving high production quantities, such as printing [7]. Researchers in Florida in the US demonstrated field effect transistor

  5. Bias-stress characterization of solution-processed organic field-effect transistor based on highly ordered liquid crystals

    Science.gov (United States)

    Kunii, M.; Iino, H.; Hanna, J.

    2017-06-01

    Bias-stress effects in solution-processed, 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-10) field effect transistors (FETs) are studied under negative and positive direct current bias. The bottom gate, bottom contact polycrystalline Ph-BTBT-10 FET with a hybrid gate dielectric of polystyrene and SiO2 shows high field effect mobility as well as a steep subthreshold slope when fabricated with a highly ordered smectic E liquid crystalline (SmE) film as a precursor. Negative gate bias-stress causes negative threshold voltage shift (ΔVth) for Ph-BTBT-10 FET in ambient air, but ΔVth rapidly decreases as the gate bias decreases and approaches to near zero when the gate bias goes down to 9 V in amplitude. In contrast, positive gate bias-stress causes negligible ΔVth even with a relatively high bias voltage. These results conclude that Ph-BTBT-10 FET has excellent bias-stress stability in ambient air in the range of low to moderate operating voltages.

  6. High performance top-gated ferroelectric field effect transistors based on two-dimensional ZnO nanosheets

    Science.gov (United States)

    Tian, Hongzheng; Wang, Xudong; Zhu, Yuankun; Liao, Lei; Wang, Xianying; Wang, Jianlu; Hu, Weida

    2017-01-01

    High quality ultrathin two-dimensional zinc oxide (ZnO) nanosheets (NSs) are synthesized, and the ZnO NS ferroelectric field effect transistors (FeFETs) are demonstrated based on the P(VDF-TrFE) polymer film used as the top gate insulating layer. The ZnO NSs exhibit a maximum field effect mobility of 588.9 cm2/Vs and a large transconductance of 2.5 μS due to their high crystalline quality and ultrathin two-dimensional structure. The polarization property of the P(VDF-TrFE) film is studied, and a remnant polarization of >100 μC/cm2 is achieved with a P(VDF-TrFE) thickness of 300 nm. Because of the ultrahigh remnant polarization field generated in the P(VDF-TrFE) film, the FeFETs show a large memory window of 16.9 V and a high source-drain on/off current ratio of more than 107 at zero gate voltage and a source-drain bias of 0.1 V. Furthermore, a retention time of >3000 s of the polarization state is obtained, inspiring a promising candidate for applications in data storage with non-volatile features.

  7. Demonstration of high-performance p-type tin oxide thin-film transistors using argon-plasma surface treatments

    Science.gov (United States)

    Bae, Sang-Dae; Kwon, Soo-Hun; Jeong, Hwan-Seok; Kwon, Hyuck-In

    2017-07-01

    In this work, we investigated the effects of low-temperature argon (Ar)-plasma surface treatments on the physical and chemical structures of p-type tin oxide thin-films and the electrical performance of p-type tin oxide thin-film transistors (TFTs). From the x-ray photoelectron spectroscopy measurement, we found that SnO was the dominant phase in the deposited tin oxide thin-film, and the Ar-plasma treatment partially transformed the tin oxide phase from SnO to SnO2 by oxidation. The resistivity of the tin oxide thin-film increased with the plasma-treatment time because of the reduced hole concentration. In addition, the root-mean-square roughness of the tin oxide thin-film decreased as the plasma-treatment time increased. The p-type oxide TFT with an Ar-plasma-treated tin oxide thin-film exhibited excellent electrical performance with a high current on-off ratio (5.2 × 106) and a low off-current (1.2 × 10-12 A), which demonstrates that the low-temperature Ar-plasma treatment is a simple and effective method for improving the electrical performance of p-type tin oxide TFTs.

  8. Low-Temperature Solution-Processed Gate Dielectrics for High-Performance Organic Thin Film Transistors

    Directory of Open Access Journals (Sweden)

    Jaekyun Kim

    2015-10-01

    Full Text Available A low-temperature solution-processed high-k gate dielectric layer for use in a high-performance solution-processed semiconducting polymer organic thin-film transistor (OTFT was demonstrated. Photochemical activation of sol-gel-derived AlOx films under 150 °C permitted the formation of a dense film with low leakage and relatively high dielectric-permittivity characteristics, which are almost comparable to the results yielded by the conventionally used vacuum deposition and high temperature annealing method. Octadecylphosphonic acid (ODPA self-assembled monolayer (SAM treatment of the AlOx was employed in order to realize high-performance (>0.4 cm2/Vs saturation mobility and low-operation-voltage (<5 V diketopyrrolopyrrole (DPP-based OTFTs on an ultra-thin polyimide film (3-μm thick. Thus, low-temperature photochemically-annealed solution-processed AlOx film with SAM layer is an attractive candidate as a dielectric-layer for use in high-performance organic TFTs operated at low voltages.

  9. Optimization of Vertical Double-Diffused Metal-Oxide Semiconductor (VDMOS) Power Transistor Structure for Use in High Frequencies and Medical Devices.

    Science.gov (United States)

    Farhadi, Rozita; Farhadi, Bita

    2014-01-01

    Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines.

  10. Driving High-Performance n- and p-type Organic Transistors with Carbon Nanotube/Conjugated Polymer Composite Electrodes Patterned Directly from Solution

    KAUST Repository

    Hellstrom, Sondra L.; Jin, Run Zhi; Stoltenberg, Randall M.; Bao, Zhenan

    2010-01-01

    We report patterned deposition of carbon nanotube/conjugated polymer composites from solution with high nanotube densities and excellent feature resolution. Such composites are suited for use as electrodes in high-performance transistors

  11. T-gate aligned nanotube radio frequency transistors and circuits with superior performance.

    Science.gov (United States)

    Che, Yuchi; Lin, Yung-Chen; Kim, Pyojae; Zhou, Chongwu

    2013-05-28

    In this paper, we applied self-aligned T-gate design to aligned carbon nanotube array transistors and achieved an extrinsic current-gain cutoff frequency (ft) of 25 GHz, which is the best on-chip performance for nanotube radio frequency (RF) transistors reported to date. Meanwhile, an intrinsic current-gain cutoff frequency up to 102 GHz is obtained, comparable to the best value reported for nanotube RF transistors. Armed with the excellent extrinsic RF performance, we performed both single-tone and two-tone measurements for aligned nanotube transistors at a frequency up to 8 GHz. Furthermore, we utilized T-gate aligned nanotube transistors to construct mixing and frequency doubling analog circuits operated in gigahertz frequency regime. Our results confirm the great potential of nanotube-based circuit applications and indicate that nanotube transistors are promising building blocks in high-frequency electronics.

  12. Bipolar-power-transistor-based limiter for high frequency ultrasound imaging systems.

    Science.gov (United States)

    Choi, Hojong; Yang, Hao-Chung; Shung, K Kirk

    2014-03-01

    High performance limiters are described in this paper for applications in high frequency ultrasound imaging systems. Limiters protect the ultrasound receiver from the high voltage (HV) spikes produced by the transmitter. We present a new bipolar power transistor (BPT) configuration and compare its design and performance to a diode limiter used in traditional ultrasound research and one commercially available limiter. Limiter performance depends greatly on the insertion loss (IL), total harmonic distortion (THD) and response time (RT), each of which will be evaluated in all the limiters. The results indicated that, compared with commercial limiter, BPT-based limiter had less IL (-7.7 dB), THD (-74.6 dB) and lower RT (43 ns) at 100 MHz. To evaluate the capability of these limiters, they were connected to a 100 MHz single element transducer and a two-way pulse-echo test was performed. It was found that the -6 dB bandwidth and sensitivity of the transducer using BPT-based limiter were better than those of the commercial limiter by 22% and 140%, respectively. Compared to the commercial limiter, BPT-based limiter is shown to be capable of minimizing signal attenuation, RT and THD at high frequencies and is thus suited for high frequency ultrasound applications. Copyright © 2013 Elsevier B.V. All rights reserved.

  13. Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

    Science.gov (United States)

    Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

    1987-06-08

    A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space. The layer thicknesses of the quantum well layers are selected to provide a superlattice L/sub 2D/-valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley. 2 figs.

  14. Measurement technology of RF interference current in high current system

    Science.gov (United States)

    Zhao, Zhihua; Li, Jianxuan; Zhang, Xiangming; Zhang, Lei

    2018-06-01

    Current probe is a detection method commonly used in electromagnetic compatibility. With the development of power electronics technology, the power level of power conversion devices is constantly increasing, and the power current of the electric energy conversion device in the electromagnetic launch system can reach 10kA. Current probe conventionally used in EMC (electromagnetic compatibility) detection cannot meet the test requirements on high current system due to the magnetic saturation problem. The conventional high current sensor is also not suitable for the RF (Radio Frequency) interference current measurement in high current power device due to the high noise level in the output of active amplifier. In this paper, a passive flexible current probe based on Rogowski coil and matching resistance is proposed that can withstand high current and has low noise level, to solve the measurement problems of interference current in high current power converter. And both differential mode and common mode current detection can be easily carried out with the proposed probe because of the probe's flexible structure.

  15. Low operating voltage InGaZnO thin-film transistors based on Al2O3 high-k dielectrics fabricated using pulsed laser deposition

    International Nuclear Information System (INIS)

    Geng, G. Z.; Liu, G. X.; Zhang, Q.; Shan, F. K.; Lee, W. J.; Shin, B. C.; Cho, C. R.

    2014-01-01

    Low-voltage-driven amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) with an Al 2 O 3 dielectric were fabricated on a Si substrate by using pulsed laser deposition. Both Al 2 O 3 and IGZO thin films are amorphous, and the thin films have very smooth surfaces. The Al 2 O 3 gate dielectric exhibits a very low leakage current density of 1.3 x 10 -8 A/cm 2 at 5 V and a high capacitance density of 60.9 nF/cm 2 . The IGZO TFT with a structure of Ni/IGZO/Al 2 O 3 /Si exhibits high performance with a low threshold voltage of 1.18 V, a high field effect mobility of 20.25 cm 2 V -1 s -1 , an ultra small subthreshold swing of 87 mV/decade, and a high on/off current ratio of 3 x 10 7 .

  16. Capacitance-voltage analysis of electrical properties for WSe2 field effect transistors with high-k encapsulation layer

    Science.gov (United States)

    Ko, Seung-Pil; Shin, Jong Mok; Jang, Ho Kyun; You, Min Youl; Jin, Jun-Eon; Choi, Miri; Cho, Jiung; Kim, Gyu-Tae

    2018-02-01

    Doping effects in devices based on two-dimensional (2D) materials have been widely studied. However, detailed analysis and the mechanism of the doping effect caused by encapsulation layers has not been sufficiently explored. In this work, we present experimental studies on the n-doping effect in WSe2 field effect transistors (FETs) with a high-k encapsulation layer (Al2O3) grown by atomic layer deposition. In addition, we demonstrate the mechanism and origin of the doping effect. After encapsulation of the Al2O3 layer, the threshold voltage of the WSe2 FET negatively shifted with the increase of the on-current. The capacitance-voltage measurements of the metal insulator semiconductor (MIS) structure proved the presence of the positive fixed charges within the Al2O3 layer. The flat-band voltage of the MIS structure of Au/Al2O3/SiO2/Si was shifted toward the negative direction on account of the positive fixed charges in the Al2O3 layer. Our results clearly revealed that the fixed charges in the Al2O3 encapsulation layer modulated the Fermi energy level via the field effect. Moreover, these results possibly provide fundamental ideas and guidelines to design 2D materials FETs with high-performance and reliability.

  17. High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide

    Energy Technology Data Exchange (ETDEWEB)

    Liang, Shibo; Zhang, Zhiyong, E-mail: zyzhang@pku.edu.cn; Si, Jia; Zhong, Donglai; Peng, Lian-Mao, E-mail: lmpeng@pku.edu.cn [Key Laboratory for the Physics and Chemistry of Nanodevices, Department of Electronics, Peking University, Beijing 100871 (China)

    2014-08-11

    High-performance p-type carbon nanotube (CNT) transistors utilizing yttrium oxide as gate dielectric are presented by optimizing oxidization and annealing processes. Complementary metal-oxide-semiconductor (CMOS) field-effect-transistors (FETs) are then fabricated on CNTs, and the p- and n-type devices exhibit symmetrical high performances, especially with low threshold voltage near to zero. The corresponding CMOS CNT inverter is demonstrated to operate at an ultra-low supply voltage down to 0.2 V, while displaying sufficient voltage gain, high noise margin, and low power consumption. Yttrium oxide is proven to be a competitive gate dielectric for constructing high-performance CNT CMOS FETs and integrated circuits.

  18. Carbon doped GaN buffer layer using propane for high electron mobility transistor applications: Growth and device results

    Energy Technology Data Exchange (ETDEWEB)

    Li, X.; Nilsson, D.; Danielsson, Ö.; Pedersen, H.; Janzén, E.; Forsberg, U. [Department of Physics, Chemistry, and Biology (IFM), Linköping University, Linköping 58183 (Sweden); Bergsten, J.; Rorsman, N. [Microwave Electronics Laboratory, Department of Microtechnology and Nanoscience, Chalmers University of Technology, Göteborg 41296 (Sweden)

    2015-12-28

    The creation of a semi insulating (SI) buffer layer in AlGaN/GaN High Electron Mobility Transistor (HEMT) devices is crucial for preventing a current path beneath the two-dimensional electron gas (2DEG). In this investigation, we evaluate the use of a gaseous carbon gas precursor, propane, for creating a SI GaN buffer layer in a HEMT structure. The carbon doped profile, using propane gas, is a two stepped profile with a high carbon doping (1.5 × 10{sup 18 }cm{sup −3}) epitaxial layer closest to the substrate and a lower doped layer (3 × 10{sup 16 }cm{sup −3}) closest to the 2DEG channel. Secondary Ion Mass Spectrometry measurement shows a uniform incorporation versus depth, and no memory effect from carbon doping can be seen. The high carbon doping (1.5 × 10{sup 18 }cm{sup −3}) does not influence the surface morphology, and a roughness root-mean-square value of 0.43 nm is obtained from Atomic Force Microscopy. High resolution X-ray diffraction measurements show very sharp peaks and no structural degradation can be seen related to the heavy carbon doped layer. HEMTs are fabricated and show an extremely low drain induced barrier lowering value of 0.1 mV/V, demonstrating an excellent buffer isolation. The carbon doped GaN buffer layer using propane gas is compared to samples using carbon from the trimethylgallium molecule, showing equally low leakage currents, demonstrating the capability of growing highly resistive buffer layers using a gaseous carbon source.

  19. Non-Planar Nanotube and Wavy Architecture Based Ultra-High Performance Field Effect Transistors

    KAUST Repository

    Hanna, Amir

    2016-01-01

    This dissertation also introduces a novel thin-film-transistors architecture that is named the Wavy Channel (WC) architecture, which allows for extending device width by integrating vertical fin-like substrate corrugations giving

  20. Area and energy efficient high-performance ZnO wavy channel thin-film transistor

    KAUST Repository

    Hanna, Amir; Ghoneim, Mohamed T.; Bahabry, Rabab R.; Hussain, Aftab M.; Fahad, Hossain M.; Hussain, Muhammad Mustafa

    2014-01-01

    of the transistor width in the direction perpendicular to the substrate through integrating continuous fin features on the underlying substrate. This architecture enables expanding the TFT width without consuming any additional chip area, thus enabling increased

  1. Proton Irradiation-Induced Metal Voids in Gallium Nitride High Electron Mobility Transistors

    Science.gov (United States)

    2015-09-01

    ABBREVIATIONS 2DEG two-dimensional electron gas AlGaN aluminum gallium nitride AlOx aluminum oxide CCD charged coupled device CTE coefficient of...frequency of FETs. Such a device may also be known as a heterojunction field-effect transistor (HFET), modulation-doped field-effect transistor (MODFET...electrons. This charge attracts electrons to the interface, forming the 2DEG channel. The HEMT includes a heterojunction of two semiconducting

  2. 3,4-Disubstituted Polyalkylthiophenes for High-Performance Thin-Film Transistors and Photovoltaics

    KAUST Repository

    Ko, Sangwon

    2011-10-26

    We demonstrate that poly(3,4-dialkylterthiophenes) (P34ATs) have comparable transistor mobilities (0.17 cm2 V-1 s-1) and greater environmental stability (less degradation of on/off ratio) than regioregular poly(3-alkylthiophenes) (P3ATs). Unlike poly(3-hexylthiophene) (P3HT), P34ATs do not show a strong and distinct π-π stacking in X-ray diffraction. This suggests that a strong π-π stacking is not always necessary for high charge-carrier mobility and that other potential polymer packing motifs in addition to the edge-on structure (π-π stacking direction parallel to the substrate) can lead to a high carrier mobility. The high charge-carrier mobilities of the hexyl and octyl-substituted P34AT produce power conversion efficiencies of 4.2% in polymer:fullerene bulk heterojunction photovoltaic devices. An enhanced open-circuit voltage (0.716-0.771 eV) in P34AT solar cells relative to P3HT due to increased ionization potentials was observed. © 2011 American Chemical Society.

  3. Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

    Science.gov (United States)

    Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

    2016-08-10

    Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

  4. Development of high-performance printed organic field-effect transistors and integrated circuits.

    Science.gov (United States)

    Xu, Yong; Liu, Chuan; Khim, Dongyoon; Noh, Yong-Young

    2015-10-28

    Organic electronics is regarded as an important branch of future microelectronics especially suited for large-area, flexible, transparent, and green devices, with their low cost being a key benefit. Organic field-effect transistors (OFETs), the primary building blocks of numerous expected applications, have been intensively studied, and considerable progress has recently been made. However, there are still a number of challenges to the realization of high-performance OFETs and integrated circuits (ICs) using printing technologies. Therefore, in this perspective article, we investigate the main issues concerning developing high-performance printed OFETs and ICs and seek strategies for further improvement. Unlike many other studies in the literature that deal with organic semiconductors (OSCs), printing technology, and device physics, our study commences with a detailed examination of OFET performance parameters (e.g., carrier mobility, threshold voltage, and contact resistance) by which the related challenges and potential solutions to performance development are inspected. While keeping this complete understanding of device performance in mind, we check the printed OFETs' components one by one and explore the possibility of performance improvement regarding device physics, material engineering, processing procedure, and printing technology. Finally, we analyze the performance of various organic ICs and discuss ways to optimize OFET characteristics and thus develop high-performance printed ICs for broad practical applications.

  5. Spray-combustion synthesis: efficient solution route to high-performance oxide transistors.

    Science.gov (United States)

    Yu, Xinge; Smith, Jeremy; Zhou, Nanjia; Zeng, Li; Guo, Peijun; Xia, Yu; Alvarez, Ana; Aghion, Stefano; Lin, Hui; Yu, Junsheng; Chang, Robert P H; Bedzyk, Michael J; Ferragut, Rafael; Marks, Tobin J; Facchetti, Antonio

    2015-03-17

    Metal-oxide (MO) semiconductors have emerged as enabling materials for next generation thin-film electronics owing to their high carrier mobilities, even in the amorphous state, large-area uniformity, low cost, and optical transparency, which are applicable to flat-panel displays, flexible circuitry, and photovoltaic cells. Impressive progress in solution-processed MO electronics has been achieved using methodologies such as sol gel, deep-UV irradiation, preformed nanostructures, and combustion synthesis. Nevertheless, because of incomplete lattice condensation and film densification, high-quality solution-processed MO films having technologically relevant thicknesses achievable in a single step have yet to be shown. Here, we report a low-temperature, thickness-controlled coating process to create high-performance, solution-processed MO electronics: spray-combustion synthesis (SCS). We also report for the first time, to our knowledge, indium-gallium-zinc-oxide (IGZO) transistors having densification, nanoporosity, electron mobility, trap densities, bias stability, and film transport approaching those of sputtered films and compatible with conventional fabrication (FAB) operations.

  6. Surface-directed molecular assembly of pentacene on monolayer graphene for high-performance organic transistors.

    Science.gov (United States)

    Lee, Wi Hyoung; Park, Jaesung; Sim, Sung Hyun; Lim, Soojin; Kim, Kwang S; Hong, Byung Hee; Cho, Kilwon

    2011-03-30

    Organic electronic devices that use graphene electrodes have received considerable attention because graphene is regarded as an ideal candidate electrode material. Transfer and lithographic processes during fabrication of patterned graphene electrodes typically leave polymer residues on the graphene surfaces. However, the impact of these residues on the organic semiconductor growth mechanism on graphene surface has not been reported yet. Here, we demonstrate that polymer residues remaining on graphene surfaces induce a stand-up orientation of pentacene, thereby controlling pentacene growth such that the molecular assembly is optimal for charge transport. Thus, pentacene field-effect transistors (FETs) using source/drain monolayer graphene electrodes with polymer residues show a high field-effect mobility of 1.2 cm(2)/V s. In contrast, epitaxial growth of pentacene having molecular assembly of lying-down structure is facilitated by π-π interaction between pentacene and the clean graphene electrode without polymer residues, which adversely affects lateral charge transport at the interface between electrode and channel. Our studies provide that the obtained high field-effect mobility in pentacene FETs using monolayer graphene electrodes arises from the extrinsic effects of polymer residues as well as the intrinsic characteristics of the highly conductive, ultrathin two-dimensional monolayer graphene electrodes.

  7. 3,4-Disubstituted Polyalkylthiophenes for High-Performance Thin-Film Transistors and Photovoltaics

    KAUST Repository

    Ko, Sangwon; Verploegen, Eric; Hong, Sanghyun; Mondal, Rajib; Hoke, Eric T.; Toney, Michael F.; McGehee, Michael D.; Bao, Zhenan

    2011-01-01

    We demonstrate that poly(3,4-dialkylterthiophenes) (P34ATs) have comparable transistor mobilities (0.17 cm2 V-1 s-1) and greater environmental stability (less degradation of on/off ratio) than regioregular poly(3-alkylthiophenes) (P3ATs). Unlike poly(3-hexylthiophene) (P3HT), P34ATs do not show a strong and distinct π-π stacking in X-ray diffraction. This suggests that a strong π-π stacking is not always necessary for high charge-carrier mobility and that other potential polymer packing motifs in addition to the edge-on structure (π-π stacking direction parallel to the substrate) can lead to a high carrier mobility. The high charge-carrier mobilities of the hexyl and octyl-substituted P34AT produce power conversion efficiencies of 4.2% in polymer:fullerene bulk heterojunction photovoltaic devices. An enhanced open-circuit voltage (0.716-0.771 eV) in P34AT solar cells relative to P3HT due to increased ionization potentials was observed. © 2011 American Chemical Society.

  8. AlGaN/GaN high-electron-mobility transistors with transparent gates by Al-doped ZnO

    International Nuclear Information System (INIS)

    Wang Chong; He Yun-Long; Zheng Xue-Feng; Ma Xiao-Hua; Zhang Jin-Cheng; Hao Yue

    2013-01-01

    AlGaN/GaN high-electron-mobility transistors (HEMTs) with Al-doped ZnO (AZO) transparent gate electrodes are fabricated, and Ni/Au/Ni-gated HEMTs are produced in comparison. The AZO-gated HEMTs show good DC characteristics and Schottky rectifying characteristics, and the gate electrodes achieve excellent transparencies. Compared with Ni/Au/Ni-gated HEMTs, AZO-gated HEMTs show a low saturation current, high threshold voltage, high Schottky barrier height, and low gate reverse leakage current. Due to the higher gate resistivity, AZO-gated HEMTs exhibit a current—gain cutoff frequency (f T ) of 10 GHz and a power gain cutoff frequency (f max ) of 5 GHz, and lower maximum oscillation frequency than Ni/Au/Ni-gated HEMTs. Moreover, the C—V characteristics are measured and the gate interface characteristics of the AZO-gated devices are investigated by a C—V dual sweep

  9. High-current railgap studies

    Energy Technology Data Exchange (ETDEWEB)

    Druce, R.; Gordon, L.; Hofer, W.; Wilson, M.

    1983-06-03

    Characteristics of a 40-kV, 750-kA, multichannel rail gap are presented. The gap is a three electrode, field-distortion-triggered design, with a total switch inductance of less than 10 nH. At maximum ratings, the gap typically switches 10 C per shot, at 700 kA, with a jitter of less than 2 ns. Image-converter streak photographs were used to study channel evolution and current division. Transient gas-pressure measurements were made to investigate the arc generated shocks and to detect single channel failure. Channel current sharing and simultaneity are described and their effects on the switch inductance and lifetime are discussed. Lifetime tests of the rail gap were performed. Degradation in the channel current-sharing and erosion measurements are discussed.

  10. High-current railgap studies

    Science.gov (United States)

    Druce, R.; Gordon, L.; Hofer, W.; Wilson, M.

    1983-06-01

    Characteristics of a 40-kV, 750-kA, multichannel rail gap are presented. The gap is a three electrode, field distortion triggered design, with a total switch inductance of less than 10 nH. At maximum ratings, the gap typically switches 10 C per shot, at 700 kA, with a jitter of less than 2 ns. Channel evolution and current division were studied on image converter streak photographs. Transient gas pressure measurements were made to investigate the arc generated shocks and to detect single channel failure. Channel current sharing and simultaneity are described and their effects on the switch inductance in the channel current sharing and erosion measurements are discussed.

  11. Current-Induced Joule Heating and Electrical Field Effects in Low Temperature Measurements on TIPS Pentacene Thin Film Transistors

    NARCIS (Netherlands)

    Nikiforov, G.O.; Venkateshvaran, D.; Mooser, S.; Meneau, A.; Strobel, T.; Kronemeijer, A.; Jiang, L.; Lee, M.J.; Sirringhaus, H.

    2016-01-01

    The channel temperature (Tch) of solution-processed 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS pentacene) thin film transistors (TFTs) is closely monitored in real time during current–voltage (I–V) measurements carried out in a He exchange gas cryostat at various base temperatures (Tb)

  12. Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

    International Nuclear Information System (INIS)

    Deen, David A.; Storm, David F.; Scott Katzer, D.; Bass, R.; Meyer, David J.

    2016-01-01

    A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain current after bias stressed in subthreshold. These structures additionally achieved small signal metrics f_t/f_m_a_x of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with f_t/f_m_a_x of 48/60 GHz.

  13. Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

    Science.gov (United States)

    Deen, David A.; Storm, David F.; Scott Katzer, D.; Bass, R.; Meyer, David J.

    2016-08-01

    A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain current after bias stressed in subthreshold. These structures additionally achieved small signal metrics ft/fmax of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with ft/fmax of 48/60 GHz.

  14. Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

    Energy Technology Data Exchange (ETDEWEB)

    Deen, David A., E-mail: david.deen@alumni.nd.edu; Storm, David F.; Scott Katzer, D.; Bass, R.; Meyer, David J. [Naval Research Laboratory, Electronics Science and Technology Division, Washington, DC 20375 (United States)

    2016-08-08

    A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain current after bias stressed in subthreshold. These structures additionally achieved small signal metrics f{sub t}/f{sub max} of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with f{sub t}/f{sub max} of 48/60 GHz.

  15. Top-gate hybrid complementary inverters using pentacene and amorphous InGaZnO thin-film transistors with high operational stability

    Directory of Open Access Journals (Sweden)

    J. B. Kim

    2012-03-01

    Full Text Available We report on the operational stability of low-voltage hybrid organic-inorganic complementary inverters with a top-gate bottom source-drain geometry. The inverters are comprised of p-channel pentacene and n-channel amorphous InGaZnO thin-film transistors (TFTs with bi-layer gate dielectrics formed from an amorphous layer of a fluoropolymer (CYTOP and a high-k layer of Al2O3. The p- and n- channel TFTs show saturation mobility values of 0.1 ± 0.01 and 5.0 ± 0.5 cm2/Vs, respectively. The individual transistors show high electrical stability with less than 6% drain-to-source current variations after 1 h direct current (DC bias stress. Complementary inverters yield hysteresis-free voltage transfer characteristics for forward and reverse input biases with static DC gain values larger than 45 V/V at 8 V before and after being subjected to different conditions of electrical stress. Small and reversible variations of the switching threshold voltage of the inverters during these stress tests are compatible with the observed stability of the individual TFTs.

  16. Highly Sensitive Flexible Pressure Sensors Based on Printed Organic Transistors with Centro-Apically Self-Organized Organic Semiconductor Microstructures.

    Science.gov (United States)

    Yeo, So Young; Park, Sangsik; Yi, Yeon Jin; Kim, Do Hwan; Lim, Jung Ah

    2017-12-13

    A highly sensitive pressure sensor based on printed organic transistors with three-dimensionally self-organized organic semiconductor microstructures (3D OSCs) was demonstrated. A unique organic transistor with semiconductor channels positioned at the highest summit of printed cylindrical microstructures was achieved simply by printing an organic semiconductor and polymer blend on the plastic substrate without the use of additional etching or replication processes. A combination of the printed organic semiconductor microstructure and an elastomeric top-gate dielectric resulted in a highly sensitive organic field-effect transistor (FET) pressure sensor with a high pressure sensitivity of 1.07 kPa -1 and a rapid response time of <20 ms with a high reliability over 1000 cycles. The flexibility and high performance of the 3D OSC FET pressure sensor were exploited in the successful application of our sensors to real-time monitoring of the radial artery pulse, which is useful for healthcare monitoring, and to touch sensing in the e-skin of a realistic prosthetic hand.

  17. Low thermal budget annealing technique for high performance amorphous In-Ga-ZnO thin film transistors

    Directory of Open Access Journals (Sweden)

    Joong-Won Shin

    2017-07-01

    Full Text Available In this paper, we investigate a low thermal budget post-deposition-annealing (PDA process for amorphous In-Ga-ZnO (a-IGZO oxide semiconductor thin-film-transistors (TFTs. To evaluate the electrical characteristics and reliability of the TFTs after the PDA process, microwave annealing (MWA and rapid thermal annealing (RTA methods were applied, and the results were compared with those of the conventional annealing (CTA method. The a-IGZO TFTs fabricated with as-deposited films exhibited poor electrical characteristics; however, their characteristics were improved by the proposed PDA process. The CTA-treated TFTs had excellent electrical properties and stability, but the CTA method required high temperatures and long processing times. In contrast, the fabricated RTA-treated TFTs benefited from the lower thermal budget due to the short process time; however, they exhibited poor stability. The MWA method uses a low temperature (100 °C and short annealing time (2 min because microwaves transfer energy directly to the substrate, and this method effectively removed the defects in the a-IGZO TFTs. Consequently, they had a higher mobility, higher on-off current ratio, lower hysteresis voltage, lower subthreshold swing, and higher interface trap density than TFTs treated with CTA or RTA, and exhibited excellent stability. Based on these results, low thermal budget MWA is a promising technology for use on various substrates in next generation displays.

  18. Low thermal budget annealing technique for high performance amorphous In-Ga-ZnO thin film transistors

    Science.gov (United States)

    Shin, Joong-Won; Cho, Won-Ju

    2017-07-01

    In this paper, we investigate a low thermal budget post-deposition-annealing (PDA) process for amorphous In-Ga-ZnO (a-IGZO) oxide semiconductor thin-film-transistors (TFTs). To evaluate the electrical characteristics and reliability of the TFTs after the PDA process, microwave annealing (MWA) and rapid thermal annealing (RTA) methods were applied, and the results were compared with those of the conventional annealing (CTA) method. The a-IGZO TFTs fabricated with as-deposited films exhibited poor electrical characteristics; however, their characteristics were improved by the proposed PDA process. The CTA-treated TFTs had excellent electrical properties and stability, but the CTA method required high temperatures and long processing times. In contrast, the fabricated RTA-treated TFTs benefited from the lower thermal budget due to the short process time; however, they exhibited poor stability. The MWA method uses a low temperature (100 °C) and short annealing time (2 min) because microwaves transfer energy directly to the substrate, and this method effectively removed the defects in the a-IGZO TFTs. Consequently, they had a higher mobility, higher on-off current ratio, lower hysteresis voltage, lower subthreshold swing, and higher interface trap density than TFTs treated with CTA or RTA, and exhibited excellent stability. Based on these results, low thermal budget MWA is a promising technology for use on various substrates in next generation displays.

  19. Detection of prostate-specific antigen with biomolecule-gated AlGaN/GaN high electron mobility transistors

    Science.gov (United States)

    Li, Jia-dong; Cheng, Jun-jie; Miao, Bin; Wei, Xiao-wei; Xie, Jie; Zhang, Jin-cheng; Zhang, Zhi-qiang; Wu, Dong-min

    2014-07-01

    In order to improve the sensitivity of AlGaN/GaN high electron mobility transistor (HEMT) biosensors, a simple biomolecule-gated AlGaN/GaN HEMT structure was designed and successfully fabricated for prostate specific antigen (PSA) detection. UV/ozone was used to oxidize the GaN surface and then a 3-aminopropyl trimethoxysilane (APTES) self-assembled monolayer was bound to the sensing region. This monolayer serves as a binding layer for attachment of the prostate specific antibody (anti-PSA). The biomolecule-gated AlGaN/GaN HEMT sensor shows a rapid and sensitive response when the target prostate-specific antigen in buffer solution was added to the antibody-immobilized sensing area. The current change showed a logarithm relationship against the PSA concentration from 0.1 pg/ml to 0.993 ng/ml. The sensitivity of 0.215% is determined for 0.1 pg/ml PSA solution. The above experimental result of the biomolecule-gated AlGaN/GaN HEMT biosensor suggested that this biosensor might be a useful tool for prostate cancer screening.

  20. Detection of prostate-specific antigen with biomolecule-gated AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Li, Jia-dong; Miao, Bin; Wei, Xiao-wei; Xie, Jie; Wu, Dong-min; Cheng, Jun-jie; Zhang, Jin-cheng; Zhang, Zhi-qiang

    2014-01-01

    In order to improve the sensitivity of AlGaN/GaN high electron mobility transistor (HEMT) biosensors, a simple biomolecule-gated AlGaN/GaN HEMT structure was designed and successfully fabricated for prostate specific antigen (PSA) detection. UV/ozone was used to oxidize the GaN surface and then a 3-aminopropyl trimethoxysilane (APTES) self-assembled monolayer was bound to the sensing region. This monolayer serves as a binding layer for attachment of the prostate specific antibody (anti-PSA). The biomolecule-gated AlGaN/GaN HEMT sensor shows a rapid and sensitive response when the target prostate-specific antigen in buffer solution was added to the antibody-immobilized sensing area. The current change showed a logarithm relationship against the PSA concentration from 0.1 pg/ml to 0.993 ng/ml. The sensitivity of 0.215% is determined for 0.1 pg/ml PSA solution. The above experimental result of the biomolecule-gated AlGaN/GaN HEMT biosensor suggested that this biosensor might be a useful tool for prostate cancer screening. (paper)

  1. Interface States in AlGaN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors

    International Nuclear Information System (INIS)

    Feng Qian; Du Kai; Li Yu-Kun; Shi Peng; Feng Qing

    2013-01-01

    Frequency-dependent capacitance and conductance measurements are performed on AlGaN/GaN high electron mobility transistors (HEMTs) and NbAlO/AlGaN/GaN metal-insulator-semiconductor HEMTs (MISHEMTs) to extract density and time constants of the trap states at NbAlO/AlGaN interface and gate/AlGaN interface with the gate-voltage biased into the accumulation region and that at the AlGaN/GaN interface with the gate-voltage biased into the depletion region in different circuit models. The measurement results indicate that the trap density at NbAlO/AlGaN interface is about one order lower than that at gate/AlGaN interface while the trap density at AlGaN/GaN interface is in the same order, so the NbAlO film can passivate the AlGaN surface effectively, which is consistent with the current collapse results

  2. Low power fluorine plasma effects on electrical reliability of AlGaN/GaN high electron mobility transistor

    International Nuclear Information System (INIS)

    Yang Ling; Zhou Xiao-Wei; Ma Xiao-Hua; Lv Ling; Zhang Jin-Cheng; Hao Yue; Cao Yan-Rong

    2017-01-01

    The new electrical degradation phenomenon of the AlGaN/GaN high electron mobility transistor (HEMT) treated by low power fluorine plasma is discovered. The saturated current, on-resistance, threshold voltage, gate leakage and breakdown voltage show that each experiences a significant change in a short time stress, and then keeps unchangeable. The migration phenomenon of fluorine ions is further validated by the electron redistribution and breakdown voltage enhancement after off-state stress. These results suggest that the low power fluorine implant ion stays in an unstable state. It causes the electrical properties of AlGaN/GaN HEMT to present early degradation. A new migration and degradation mechanism of the low power fluorine implant ion under the off-stress electrical stress is proposed. The low power fluorine ions would drift at the beginning of the off-state stress, and then accumulate between gate and drain nearby the gate side. Due to the strong electronegativity of fluorine, the accumulation of the front fluorine ions would prevent the subsequent fluorine ions from drifting, thereby alleviating further the degradation of AlGaN/GaN HEMT electrical properties. (paper)

  3. Resonant tunneling assisted propagation and amplification of plasmons in high electron mobility transistors

    International Nuclear Information System (INIS)

    Bhardwaj, Shubhendu; Sensale-Rodriguez, Berardi; Xing, Huili Grace; Rajan, Siddharth; Volakis, John L.

    2016-01-01

    A rigorous theoretical and computational model is developed for the plasma-wave propagation in high electron mobility transistor structures with electron injection from a resonant tunneling diode at the gate. We discuss the conditions in which low-loss and sustainable plasmon modes can be supported in such structures. The developed analytical model is used to derive the dispersion relation for these plasmon-modes. A non-linear full-wave-hydrodynamic numerical solver is also developed using a finite difference time domain algorithm. The developed analytical solutions are validated via the numerical solution. We also verify previous observations that were based on a simplified transmission line model. It is shown that at high levels of negative differential conductance, plasmon amplification is indeed possible. The proposed rigorous models can enable accurate design and optimization of practical resonant tunnel diode-based plasma-wave devices for terahertz sources, mixers, and detectors, by allowing a precise representation of their coupling when integrated with other electromagnetic structures

  4. Carbohydrate-Assisted Combustion Synthesis To Realize High-Performance Oxide Transistors.

    Science.gov (United States)

    Wang, Binghao; Zeng, Li; Huang, Wei; Melkonyan, Ferdinand S; Sheets, William C; Chi, Lifeng; Bedzyk, Michael J; Marks, Tobin J; Facchetti, Antonio

    2016-06-08

    Owing to high carrier mobilities, good environmental/thermal stability, excellent optical transparency, and compatibility with solution processing, thin-film transistors (TFTs) based on amorphous metal oxide semiconductors (AOSs) are promising alternatives to those based on amorphous silicon (a-Si:H) and low-temperature (IGZO) TFTs suffer from low carrier mobilities and/or inferior bias-stress stability versus their sputtered counterparts. Here we report that three types of environmentally benign carbohydrates (sorbitol, sucrose, and glucose) serve as especially efficient fuels for IGZO film combustion synthesis to yield high-performance TFTs. The results indicate that these carbohydrates assist the combustion process by lowering the ignition threshold temperature and, for optimal stoichiometries, enhancing the reaction enthalpy. IGZO TFT mobilities are increased to >8 cm(2) V(-1) s(-1) on SiO2/Si gate dielectrics with significantly improved bias-stress stability. The first correlations between precursor combustion enthalpy and a-MO densification/charge transport are established.

  5. Basic Equations for the Modeling of Gallium Nitride (gan) High Electron Mobility Transistors (hemts)

    Science.gov (United States)

    Freeman, Jon C.

    2003-01-01

    Gallium nitride (GaN) is a most promising wide band-gap semiconductor for use in high-power microwave devices. It has functioned at 320 C, and higher values are well within theoretical limits. By combining four devices, 20 W has been developed at X-band. GaN High Electron Mobility Transistors (HEMTs) are unique in that the two-dimensional electron gas (2DEG) is supported not by intentional doping, but instead by polarization charge developed at the interface between the bulk GaN region and the AlGaN epitaxial layer. The polarization charge is composed of two parts: spontaneous and piezoelectric. This behavior is unlike other semiconductors, and for that reason, no commercially available modeling software exists. The theme of this document is to develop a self-consistent approach to developing the pertinent equations to be solved. A Space Act Agreement, "Effects in AlGaN/GaN HEMT Semiconductors" with Silvaco Data Systems to implement this approach into their existing software for III-V semiconductors, is in place (summer of 2002).

  6. Thin-film-transistor array: an exploratory attempt for high throughput cell manipulation using electrowetting principle

    Science.gov (United States)

    Shaik, F. Azam; Cathcart, G.; Ihida, S.; Lereau-Bernier, M.; Leclerc, E.; Sakai, Y.; Toshiyoshi, H.; Tixier-Mita, A.

    2017-05-01

    In lab-on-a-chip (LoC) devices, microfluidic displacement of liquids is a key component. electrowetting on dielectric (EWOD) is a technique to move fluids, with the advantage of not requiring channels, pumps or valves. Fluids are discretized into droplets on microelectrodes and moved by applying an electric field via the electrodes to manipulate the contact angle. Micro-objects, such as biological cells, can be transported inside of these droplets. However, the design of conventional microelectrodes, made by standard micro-fabrication techniques, fixes the path of the droplets, and limits the reconfigurability of paths and thus limits the parallel processing of droplets. In that respect, thin film transistor (TFT) technology presents a great opportunity as it allows infinitely reconfigurable paths, with high parallelizability. We propose here to investigate the possibility of using TFT array devices for high throughput cell manipulation using EWOD. A COMSOL based 2D simulation coupled with a MATLAB algorithm was used to simulate the contact angle modulation, displacement and mixing of droplets. These simulations were confirmed by experimental results. The EWOD technique was applied to a droplet of culture medium containing HepG2 carcinoma cells and demonstrated no negative effects on the viability of the cells. This confirms the possibility of applying EWOD techniques to cellular applications, such as parallel cell analysis.

  7. Thin-film-transistor array: an exploratory attempt for high throughput cell manipulation using electrowetting principle

    International Nuclear Information System (INIS)

    Shaik, F Azam; Cathcart, G; Toshiyoshi, H; Tixier-Mita, A; Ihida, S; Sakai, Y; Lereau-Bernier, M; Leclerc, E

    2017-01-01

    In lab-on-a-chip (LoC) devices, microfluidic displacement of liquids is a key component. electrowetting on dielectric (EWOD) is a technique to move fluids, with the advantage of not requiring channels, pumps or valves. Fluids are discretized into droplets on microelectrodes and moved by applying an electric field via the electrodes to manipulate the contact angle. Micro-objects, such as biological cells, can be transported inside of these droplets. However, the design of conventional microelectrodes, made by standard micro-fabrication techniques, fixes the path of the droplets, and limits the reconfigurability of paths and thus limits the parallel processing of droplets. In that respect, thin film transistor (TFT) technology presents a great opportunity as it allows infinitely reconfigurable paths, with high parallelizability. We propose here to investigate the possibility of using TFT array devices for high throughput cell manipulation using EWOD. A COMSOL based 2D simulation coupled with a MATLAB algorithm was used to simulate the contact angle modulation, displacement and mixing of droplets. These simulations were confirmed by experimental results. The EWOD technique was applied to a droplet of culture medium containing HepG2 carcinoma cells and demonstrated no negative effects on the viability of the cells. This confirms the possibility of applying EWOD techniques to cellular applications, such as parallel cell analysis. (paper)

  8. Gate voltage and drain current stress instabilities in amorphous In–Ga–Zn–O thin-film transistors with an asymmetric graphene electrode

    Directory of Open Access Journals (Sweden)

    Joonwoo Kim

    2015-09-01

    Full Text Available The gate voltage and drain current stress instabilities in amorphous In–Ga–Zn–O thin-film transistors (a-IGZO TFTs having an asymmetric graphene electrode structure are studied. A large positive shift in the threshold voltage, which is well fitted to a stretched-exponential equation, and an increase in the subthreshold slope are observed when drain current stress is applied. This is due to an increase in temperature caused by power dissipation in the graphene/a-IGZO contact region, in addition to the channel region, which is different from the behavior in a-IGZO TFTs with a conventional transparent electrode.

  9. Millimeter-wave small-signal modeling with optimizing sensitive-parameters for metamorphic high electron mobility transistors

    International Nuclear Information System (INIS)

    Moon, S-W; Baek, Y-H; Han, M; Rhee, J-K; Kim, S-D; Oh, J-H

    2010-01-01

    In this paper, we present a simple and reliable technique for determining the small-signal equivalent circuit model parameters of the 0.1 µm metamorphic high electron mobility transistors (MHEMTs) in a millimeter-wave frequency range. The initial eight extrinsic parameters of the MHEMT are extracted using two S-parameter (scattering parameter) sets measured under the pinched-off and zero-biased cold field-effect transistor conditions by avoiding the forward gate biasing. Furthermore, highly calibration-sensitive values of the R s , L s and C pd are optimized by using a gradient optimization method to improve the modeling accuracy. The accuracy enhancement of this procedure is successfully verified with an excellent correlation between the measured and calculated S-parameters up to 65 GHz

  10. High mobility n-type organic thin-film transistors deposited at room temperature by supersonic molecular beam deposition

    Energy Technology Data Exchange (ETDEWEB)

    Chiarella, F., E-mail: fabio.chiarella@spin.cnr.it; Barra, M.; Ciccullo, F.; Cassinese, A. [CNR-SPIN and Physics Department, University of Naples, Piazzale Tecchio 80, I-80125 Naples (Italy); Toccoli, T.; Aversa, L.; Tatti, R.; Verucchi, R. [IMEM-CNR-FBK Division of Trento, Via alla Cascata 56/C, I-38123 Povo (Italy); Iannotta, S. [IMEM-CNR, Parco Area delle Scienze 37/A, I-43124 Parma (Italy)

    2014-04-07

    In this paper, we report on the fabrication of N,N′-1H,1H-perfluorobutil dicyanoperylenediimide (PDIF-CN{sub 2}) organic thin-film transistors by Supersonic Molecular Beam Deposition. The devices exhibit mobility up to 0.2 cm{sup 2}/V s even if the substrate is kept at room temperature during the organic film growth, exceeding by three orders of magnitude the electrical performance of those grown at the same temperature by conventional Organic Molecular Beam Deposition. The possibility to get high-mobility n-type transistors avoiding thermal treatments during or after the deposition could significantly extend the number of substrates suitable to the fabrication of flexible high-performance complementary circuits by using this compound.

  11. Recovery in dc and rf performance of off-state step-stressed AlGaN/GaN high electron mobility transistors with thermal annealing

    International Nuclear Information System (INIS)

    Kim, Byung-Jae; Hwang, Ya-Hsi; Ahn, Shihyun; Zhu, Weidi; Dong, Chen; Lu, Liu; Ren, Fan; Holzworth, M. R.; Jones, Kevin S.; Pearton, Stephen J.; Smith, David J.; Kim, Jihyun; Zhang, Ming-Lan

    2015-01-01

    The recovery effects of thermal annealing on dc and rf performance of off-state step-stressed AlGaN/GaN high electron mobility transistors were investigated. After stress, reverse gate leakage current and sub-threshold swing increased and drain current on-off ratio decreased. However, these degradations were completely recovered after thermal annealing at 450 °C for 10 mins for devices stressed either once or twice. The trap densities, which were estimated by temperature-dependent drain-current sub-threshold swing measurements, increased after off-state step-stress and were reduced after subsequent thermal annealing. In addition, the small signal rf characteristics of stressed devices were completely recovered after thermal annealing

  12. GaN-on-silicon high-electron-mobility transistor technology with ultra-low leakage up to 3000 V using local substrate removal and AlN ultra-wide bandgap

    Science.gov (United States)

    Dogmus, Ezgi; Zegaoui, Malek; Medjdoub, Farid

    2018-03-01

    We report on extremely low off-state leakage current in AlGaN/GaN-on-silicon metal–insulator–semiconductor high-electron-mobility transistors (MISHEMTs) up to a high blocking voltage. Remarkably low off-state gate and drain leakage currents below 1 µA/mm up to 3 kV have been achieved owing to the use of a thick in situ SiN gate dielectric under the gate, and a local Si substrate removal technique combined with a cost effective 15-µm-thick AlN dielectric layer followed by a Cu deposition. This result establishes a manufacturable state-of-the-art high-voltage GaN-on-silicon power transistors while maintaining a low specific on-resistance of approximately 10 mΩ·cm2.

  13. High bandwidth beam current monitor

    International Nuclear Information System (INIS)

    Baltrusaitis, R.M.; Ekdahl, C.A.; Cooper, R.G.; Peterson, E.; Warn, C.E.

    1993-01-01

    A stripline directional coupler beam current monitor capable of measuring the time structure of a 30-ps electron beam bunch has been developed. The time response performance of the monitor compares very well with Cherenkov light produced in quartz by the electron beam. The four-pickup monitor is now used on a routine basis for measuring the beam duration, tuning for optimized beam bunching, and centering the bunch in the beam pipe

  14. Silicon nanowire transistors

    CERN Document Server

    Bindal, Ahmet

    2016-01-01

    This book describes the n and p-channel Silicon Nanowire Transistor (SNT) designs with single and dual-work functions, emphasizing low static and dynamic power consumption. The authors describe a process flow for fabrication and generate SPICE models for building various digital and analog circuits. These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology’s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types...

  15. Temporal and voltage stress stability of high performance indium-zinc-oxide thin film transistors

    Science.gov (United States)

    Song, Yang; Katsman, Alexander; Butcher, Amy L.; Paine, David C.; Zaslavsky, Alexander

    2017-10-01

    Thin film transistors (TFTs) based on transparent oxide semiconductors, such as indium zinc oxide (IZO), are of interest due to their improved characteristics compared to traditional a-Si TFTs. Previously, we reported on top-gated IZO TFTs with an in-situ formed HfO2 gate insulator and IZO active channel, showing high performance: on/off ratio of ∼107, threshold voltage VT near zero, extracted low-field mobility μ0 = 95 cm2/V·s, and near-perfect subthreshold slope at 62 mV/decade. Since device stability is essential for technological applications, in this paper we report on the temporal and voltage stress stability of IZO TFTs. Our devices exhibit a small negative VT shift as they age, consistent with an increasing carrier density resulting from an increasing oxygen vacancy concentration in the channel. Under gate bias stress, freshly annealed TFTs show a negative VT shift during negative VG gate bias stress, while aged (>1 week) TFTs show a positive VT shift during negative VG stress. This indicates two competing mechanisms, which we identify as the field-enhanced generation of oxygen vacancies and the field-assisted migration of oxygen vacancies, respectively. A simplified kinetic model of the vacancy concentration evolution in the IZO channel under electrical stress is provided.

  16. Ambipolar SnOx thin-film transistors achieved at high sputtering power

    Science.gov (United States)

    Li, Yunpeng; Yang, Jia; Qu, Yunxiu; Zhang, Jiawei; Zhou, Li; Yang, Zaixing; Lin, Zhaojun; Wang, Qingpu; Song, Aimin; Xin, Qian

    2018-04-01

    SnO is the only oxide semiconductor to date that has exhibited ambipolar behavior in thin-film transistors (TFTs). In this work, ambipolar behavior was observed in SnOx TFTs fabricated at a high sputtering power of 200 W and post-annealed at 150-250 °C in ambient air. X-ray-diffraction patterns showed polycrystallisation of SnO and Sn in the annealed SnOx films. Scanning-electron-microscopy images revealed that microgrooves appeared after the films were annealed. Clusters subsequently segregated along the microgrooves, and our experiments suggest that they were most likely Sn clusters. Atomic force microscopy images indicate an abrupt increase in film roughness due to the cluster segregations. An important implication of this work is that excess Sn in the film, which has generally been thought to be detrimental to the film quality, may promote the ambipolar conduction when it is segregated from the film to enhance the stoichiometric balance.

  17. Fabrication and characterization of high-mobility solution-based chalcogenide thin-film transistors

    KAUST Repository

    Mejia, Israel I.; Salas Villaseñ or, Ana L.; Cha, Dong Kyu; Alshareef, Husam N.; Gnade, Bruce E.; Quevedo-Ló pez, Manuel Angel Quevedo

    2013-01-01

    We report device and material considerations for the fabrication of high-mobility thin-film transistors (TFTs) compatible with large-area and inexpensive processes. In particular, this paper reports photolithographically defined n-type TFTs (n-TFTs) based on cadmium sulfide (CdS) films deposited using solution-based techniques. The integration process consists of four mask levels with a maximum processing temperature of 100 °C. The TFT performance was analyzed in terms of the CdS semiconductor thickness and as a function of postdeposition annealing in a reducing ambient. The IonI off ratios are ∼107 with field-effect mobilities of ∼5.3 and ∼4.7cm2V̇s for Al and Au source-drain contacts, respectively, using 70 nm of CdS. Transmission electron microscopy and electron energy loss spectroscopy were used to analyze the CdS-metal interfaces. © 1963-2012 IEEE.

  18. Density-dependent electron transport and precise modeling of GaN high electron mobility transistors

    Energy Technology Data Exchange (ETDEWEB)

    Bajaj, Sanyam, E-mail: bajaj.10@osu.edu; Shoron, Omor F.; Park, Pil Sung; Krishnamoorthy, Sriram; Akyol, Fatih; Hung, Ting-Hsiang [Department of Electrical and Computer Engineering, The Ohio State University, Columbus, Ohio 43210 (United States); Reza, Shahed; Chumbes, Eduardo M. [Raytheon Integrated Defense Systems, Andover, Massachusetts 01810 (United States); Khurgin, Jacob [Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, Maryland 21218 (United States); Rajan, Siddharth [Department of Electrical and Computer Engineering, The Ohio State University, Columbus, Ohio 43210 (United States); Department of Material Science and Engineering, The Ohio State University, Columbus, Ohio 43210 (United States)

    2015-10-12

    We report on the direct measurement of two-dimensional sheet charge density dependence of electron transport in AlGaN/GaN high electron mobility transistors (HEMTs). Pulsed IV measurements established increasing electron velocities with decreasing sheet charge densities, resulting in saturation velocity of 1.9 × 10{sup 7 }cm/s at a low sheet charge density of 7.8 × 10{sup 11 }cm{sup −2}. An optical phonon emission-based electron velocity model for GaN is also presented. It accommodates stimulated longitudinal optical (LO) phonon emission which clamps the electron velocity with strong electron-phonon interaction and long LO phonon lifetime in GaN. A comparison with the measured density-dependent saturation velocity shows that it captures the dependence rather well. Finally, the experimental result is applied in TCAD-based device simulator to predict DC and small signal characteristics of a reported GaN HEMT. Good agreement between the simulated and reported experimental results validated the measurement presented in this report and established accurate modeling of GaN HEMTs.

  19. Density-dependent electron transport and precise modeling of GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Bajaj, Sanyam; Shoron, Omor F.; Park, Pil Sung; Krishnamoorthy, Sriram; Akyol, Fatih; Hung, Ting-Hsiang; Reza, Shahed; Chumbes, Eduardo M.; Khurgin, Jacob; Rajan, Siddharth

    2015-01-01

    We report on the direct measurement of two-dimensional sheet charge density dependence of electron transport in AlGaN/GaN high electron mobility transistors (HEMTs). Pulsed IV measurements established increasing electron velocities with decreasing sheet charge densities, resulting in saturation velocity of 1.9 × 10 7  cm/s at a low sheet charge density of 7.8 × 10 11  cm −2 . An optical phonon emission-based electron velocity model for GaN is also presented. It accommodates stimulated longitudinal optical (LO) phonon emission which clamps the electron velocity with strong electron-phonon interaction and long LO phonon lifetime in GaN. A comparison with the measured density-dependent saturation velocity shows that it captures the dependence rather well. Finally, the experimental result is applied in TCAD-based device simulator to predict DC and small signal characteristics of a reported GaN HEMT. Good agreement between the simulated and reported experimental results validated the measurement presented in this report and established accurate modeling of GaN HEMTs

  20. High performance non-volatile ferroelectric copolymer memory based on a ZnO nanowire transistor fabricated on a transparent substrate

    International Nuclear Information System (INIS)

    Nedic, Stanko; Welland, Mark; Tea Chun, Young; Chu, Daping; Hong, Woong-Ki

    2014-01-01

    A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ∼16.5 V, a high drain current on/off ratio of ∼10 5 , a gate leakage current below ∼300 pA, and excellent retention characteristics for over 10 4 s

  1. Suppression of self-heating effect in AlGaN/GaN high electron mobility transistors by substrate-transfer technology using h-BN

    International Nuclear Information System (INIS)

    Hiroki, Masanobu; Kumakura, Kazuhide; Kobayashi, Yasuyuki; Akasaka, Tetsuya; Makimoto, Toshiki; Yamamoto, Hideki

    2014-01-01

    We fabricated AlGaN/GaN high electron mobility transistors (HEMTs) on h-BN/sapphire substrates and transferred them from the host substrates to copper plates using h-BN as a release layer. In current–voltage characteristics, the saturation drain current decreased by about 30% under a high-bias condition before release by self-heating effect. In contrast, after transfer, the current decrement was as small as 8% owing to improved heat dissipation: the device temperature increased to 50 °C in the as-prepared HEMT, but only by several degrees in the transferred HEMT. An effective way to improve AlGaN/GaN HEMT performance by a suppression of self-heating effect has been demonstrated

  2. Degradation of AlGaN/GaN High Electron Mobility Transistors with Different AlGaN Layer Thicknesses under Strong Electric Field

    International Nuclear Information System (INIS)

    Ling, Yang; Yue, Hao; Xiao-Hua, Ma; Jing-Jing, Ma; Cheng, Zhu

    2010-01-01

    The degradation of AlGaN/GaN high electron mobility transistors (HEMTs) has a close relationship with a model of traps in AlGaN barriers as a result of high electric field. We mainly discuss the impacts of strong electrical field on the AlGaN barrier thickness of AlGaN/GaN HEMTs. It is found that the device with a thin AlGaN barrier layer is more easily degraded. We study the degradation of four parameters, i.e. the gate series resistance R Gate , channel resistance R channel , gate current I G,off at V GS = −5 and V DS = 0.1 V, and drain current I D,max at V GS = 2 and V DS = 5 V. In addition, the degradation mechanisms of the device electrical parameters are also investigated in detail. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  3. Comparative study of InGaP/GaAs high electron mobility transistors with upper and lower delta-doped supplied layers

    International Nuclear Information System (INIS)

    Tsai, Jung-Hui; Ye, Sheng-Shiun; Guo, Der-Feng; Lour, Wen-Shiung

    2012-01-01

    Influence corresponding to the position of δ-doped supplied layer on InGaP/GaAs high electron mobility transistors is comparatively studied by two-dimensional simulation analysis. The simulated results exhibit that the device with lower δ-doped supplied layer shows a higher gate potential barrier height, a higher saturation output current, a larger magnitude of negative threshold voltage, and broader gate voltage swing, as compared to the device with upper δ-doped supplied layer. Nevertheless, it has smaller transconductance and inferior high-frequency characteristics in the device with lower δ-doped supplied layer. Furthermore, a knee effect in current-voltage curves is observed at low drain-to-source voltage in the two devices, which is investigated in this article.

  4. Suppression of self-heating effect in AlGaN/GaN high electron mobility transistors by substrate-transfer technology using h-BN

    Energy Technology Data Exchange (ETDEWEB)

    Hiroki, Masanobu, E-mail: hiroki.masanobu@lab.ntt.co.jp; Kumakura, Kazuhide; Kobayashi, Yasuyuki; Akasaka, Tetsuya; Makimoto, Toshiki; Yamamoto, Hideki [NTT Basic Research Laboratories, NTT Corporation 3-1 Morinosato Wakamiya, Atsugi-shi 243-0198 (Japan)

    2014-11-10

    We fabricated AlGaN/GaN high electron mobility transistors (HEMTs) on h-BN/sapphire substrates and transferred them from the host substrates to copper plates using h-BN as a release layer. In current–voltage characteristics, the saturation drain current decreased by about 30% under a high-bias condition before release by self-heating effect. In contrast, after transfer, the current decrement was as small as 8% owing to improved heat dissipation: the device temperature increased to 50 °C in the as-prepared HEMT, but only by several degrees in the transferred HEMT. An effective way to improve AlGaN/GaN HEMT performance by a suppression of self-heating effect has been demonstrated.

  5. Black Phosphorus Based Field Effect Transistors with Simultaneously Achieved Near Ideal Subthreshold Swing and High Hole Mobility at Room Temperature.

    Science.gov (United States)

    Liu, Xinke; Ang, Kah-Wee; Yu, Wenjie; He, Jiazhu; Feng, Xuewei; Liu, Qiang; Jiang, He; Dan Tang; Wen, Jiao; Lu, Youming; Liu, Wenjun; Cao, Peijiang; Han, Shun; Wu, Jing; Liu, Wenjun; Wang, Xi; Zhu, Deliang; He, Zhubing

    2016-04-22

    Black phosphorus (BP) has emerged as a promising two-dimensional (2D) material for next generation transistor applications due to its superior carrier transport properties. Among other issues, achieving reduced subthreshold swing and enhanced hole mobility simultaneously remains a challenge which requires careful optimization of the BP/gate oxide interface. Here, we report the realization of high performance BP transistors integrated with HfO2 high-k gate dielectric using a low temperature CMOS process. The fabricated devices were shown to demonstrate a near ideal subthreshold swing (SS) of ~69 mV/dec and a room temperature hole mobility of exceeding >400 cm(2)/Vs. These figure-of-merits are benchmarked to be the best-of-its-kind, which outperform previously reported BP transistors realized on traditional SiO2 gate dielectric. X-ray photoelectron spectroscopy (XPS) analysis further reveals the evidence of a more chemically stable BP when formed on HfO2 high-k as opposed to SiO2, which gives rise to a better interface quality that accounts for the SS and hole mobility improvement. These results unveil the potential of black phosphorus as an emerging channel material for future nanoelectronic device applications.

  6. Achievement of normally-off AlGaN/GaN high-electron mobility transistor with p-NiO{sub x} capping layer by sputtering and post-annealing

    Energy Technology Data Exchange (ETDEWEB)

    Huang, Shyh-Jer [Department of Electrical Engineering, Institute of Microelectronics and Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan, Taiwan (China); Chou, Cheng-Wei, E-mail: j2222222229@gmail.com [Department of Electrical Engineering, Institute of Microelectronics and Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan, Taiwan (China); Su, Yan-Kuin, E-mail: yksu@mail.ncku.edu.tw [Department of Electrical Engineering, Institute of Microelectronics and Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan, Taiwan (China); Lin, Jyun-Hao; Yu, Hsin-Chieh; Chen, De-Long [Department of Electrical Engineering, Institute of Microelectronics and Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan, Taiwan (China); Ruan, Jian-Long [National Chung-Shan Institute of Science and Technology, Taoyuan, Taiwan (China)

    2017-04-15

    Highlights: • A technique to fabricate normally off GaN-based high-electron mobility transistor (HEMT) by sputtering and post-annealing p-NiO{sub x} capping layer. • The V{sub th} shifts from −3 V in the conventional transistor to 0.33 V, and on/off current ratio became 10{sup 7}. • The reverse gate leakage current is 10{sup −9} A/mm, and the off-state drain-leakage current is 10{sup −8} A/mm. • The V{sub th} hysteresis is extremely small at about 33 mV. - Abstract: In this paper, we present a technique to fabricate normally off GaN-based high-electron mobility transistor (HEMT) by sputtering and post-annealing p-NiO{sub x} capping layer. The p-NiO{sub x} layer is produced by sputtering at room temperature and post-annealing at 500 °C for 30 min in pure O{sub 2} environment to achieve high hole concentration. The V{sub th} shifts from −3 V in the conventional transistor to 0.33 V, and on/off current ratio became 10{sup 7}. The forward and reverse gate breakdown increase from 3.5 V and −78 V to 10 V and −198 V, respectively. The reverse gate leakage current is 10{sup −9} A/mm, and the off-state drain-leakage current is 10{sup −8} A/mm. The V{sub th} hysteresis is extremely small at about 33 mV. We also investigate the mechanism that increases hole concentration of p-NiO{sub x} after annealing in oxygen environment resulted from the change of Ni{sup 2+} to Ni{sup 3+} and the surge of (111)-orientation.

  7. Performance Enhancement of Power Transistors and Radiation effect

    International Nuclear Information System (INIS)

    Hassn, Th.A.A.

    2012-01-01

    The main objective of this scientific research is studying the characteristic of bipolar junction transistor device and its performance under radiation fields and temperature effect as a control element in many power circuits. In this work we present the results of experimental measurements and analytical simulation of gamma – radiation effects on the electrical characteristics and operation of power transistor types 2N3773, 2N3055(as complementary silicon power transistor are designed for general-purpose switching and amplifier applications), three samples of each type were irradiated by gamma radiation with doses, 1 K rad, 5 K rad, 10 K rad, 30 K rad, and 10 Mrad, the experimental data are utilized to establish an analytical relation between the total absorbed dose of gamma irradiation and corresponding to effective density of generated charge in the internal structure of transistor, the electrical parameters which can be measured to estimate the generated defects in the power transistor are current gain, collector current and collected emitter leakage current , these changes cause the circuit to case proper functioning. Collector current and transconductance of each device are calibrated as a function of irradiated dose. Also the threshold voltage and transistor gain can be affected and also calibrated as a function of dose. A silicon NPN power transistor type 2N3773 intended for general purpose applications, were used in this work. It was designed for medium current and high power circuits. Performance and characteristic were discusses under temperature and gamma radiation doses. Also the internal junction thermal system of the transistor represented in terms of a junction thermal resistance (Rjth). The thermal resistance changed by ΔRjth, due to the external intended, also due to the gamma doses intended. The final result from the model analysis reveals that the emitter-bias configuration is quite stable by resistance ratio RB/RE. Also the current

  8. Improved linearity in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors with nonlinear polarization dielectric

    International Nuclear Information System (INIS)

    Gao, Tao; Xu, Ruimin; Kong, Yuechan; Zhou, Jianjun; Kong, Cen; Dong, Xun; Chen, Tangsheng

    2015-01-01

    We demonstrate highly improved linearity in a nonlinear ferroelectric of Pb(Zr 0.52 Ti 0.48 )-gated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT). Distinct double-hump feature in the transconductance-gate voltage (g m -V g ) curve is observed, yielding remarkable enhancement in gate voltage swing as compared to MIS-HEMT with conventional linear gate dielectric. By incorporating the ferroelectric polarization into a self-consistent calculation, it is disclosed that in addition to the common hump corresponding to the onset of electron accumulation, the second hump at high current level is originated from the nonlinear polar nature of ferroelectric, which enhances the gate capacitance by increasing equivalent dielectric constant nonlinearly. This work paves a way for design of high linearity GaN MIS-HEMT by exploiting the nonlinear properties of dielectric

  9. Improved linearity in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors with nonlinear polarization dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Gao, Tao [Fundamental Science on EHF Laboratory, University of Electronic Science and Technology of China (UESTC), Chengdu 611731 (China); Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Devices Institute, Nanjing 210016 (China); Xu, Ruimin [Fundamental Science on EHF Laboratory, University of Electronic Science and Technology of China (UESTC), Chengdu 611731 (China); Kong, Yuechan, E-mail: kycfly@163.com; Zhou, Jianjun; Kong, Cen; Dong, Xun; Chen, Tangsheng [Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Devices Institute, Nanjing 210016 (China)

    2015-06-15

    We demonstrate highly improved linearity in a nonlinear ferroelectric of Pb(Zr{sub 0.52}Ti{sub 0.48})-gated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT). Distinct double-hump feature in the transconductance-gate voltage (g{sub m}-V{sub g}) curve is observed, yielding remarkable enhancement in gate voltage swing as compared to MIS-HEMT with conventional linear gate dielectric. By incorporating the ferroelectric polarization into a self-consistent calculation, it is disclosed that in addition to the common hump corresponding to the onset of electron accumulation, the second hump at high current level is originated from the nonlinear polar nature of ferroelectric, which enhances the gate capacitance by increasing equivalent dielectric constant nonlinearly. This work paves a way for design of high linearity GaN MIS-HEMT by exploiting the nonlinear properties of dielectric.

  10. High-Performance All 2D-Layered Tin Disulfide: Graphene Photodetecting Transistors with Thickness-Controlled Interface Dynamics.

    Science.gov (United States)

    Chang, Ren-Jie; Tan, Haijie; Wang, Xiaochen; Porter, Benjamin; Chen, Tongxin; Sheng, Yuewen; Zhou, Yingqiu; Huang, Hefu; Bhaskaran, Harish; Warner, Jamie H

    2018-04-18

    Tin disulfide crystals with layered two-dimensional (2D) sheets are grown by chemical vapor deposition using a novel precursor approach and integrated into all 2D transistors with graphene (Gr) electrodes. The Gr:SnS 2 :Gr transistors exhibit excellent photodetector response with high detectivity and photoresponsivity. We show that the response of the all 2D photodetectors depends upon charge trapping at the interface and the Schottky barrier modulation. The thickness-dependent SnS 2 measurements in devices reveal a transition from the interface-dominated response for thin crystals to bulklike response for the thicker SnS 2 crystals, showing the sensitivity of devices fabricated using layered materials on the number of layers. These results show that SnS 2 has photosensing performance when combined with Gr electrodes that is comparable to other 2D transition metal dichalcogenides of MoS 2 and WS 2 .

  11. High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper

    Science.gov (United States)

    Kim, Minkyu; Jeong, Jong Han; Lee, Hun Jung; Ahn, Tae Kyung; Shin, Hyun Soo; Park, Jin-Seong; Jeong, Jae Kyeong; Mo, Yeon-Gon; Kim, Hye Dong

    2007-05-01

    The authors report on the fabrication of thin film transistors (TFTs), which use an amorphous indium gallium zinc oxide (a-IGZO) channel, by rf sputtering at room temperature and for which the channel length and width are patterned by photolithography and dry etching. To prevent plasma damage to the active channel, a 100-nm-thick SiOx layer deposited by plasma enhanced chemical vapor deposition was adopted as an etch stopper structure. The a-IGZO TFT (W /L=10μm/50μm) fabricated on glass exhibited a high field-effect mobility of 35.8cm2/Vs, a subthreshold gate swing value of 0.59V/decade, a thrseshold voltage of 5.9V, and an Ion/off ratio of 4.9×106, which is acceptable for use as the switching transistor of an active-matrix TFT backplane.

  12. High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper

    International Nuclear Information System (INIS)

    Kim, Minkyu; Jeong, Jong Han; Lee, Hun Jung; Ahn, Tae Kyung; Shin, Hyun Soo; Park, Jin-Seong; Jeong, Jae Kyeong; Mo, Yeon-Gon; Kim, Hye Dong

    2007-01-01

    The authors report on the fabrication of thin film transistors (TFTs), which use an amorphous indium gallium zinc oxide (a-IGZO) channel, by rf sputtering at room temperature and for which the channel length and width are patterned by photolithography and dry etching. To prevent plasma damage to the active channel, a 100-nm-thick SiO x layer deposited by plasma enhanced chemical vapor deposition was adopted as an etch stopper structure. The a-IGZO TFT (W/L=10 μm/50 μm) fabricated on glass exhibited a high field-effect mobility of 35.8 cm 2 /V s, a subthreshold gate swing value of 0.59 V/decade, a thrseshold voltage of 5.9 V, and an I on/off ratio of 4.9x10 6 , which is acceptable for use as the switching transistor of an active-matrix TFT backplane

  13. Improvement of transistor characteristics and stability for solution-processed ultra-thin high-valence niobium doped zinc-tin oxide thin film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Jeng, Jiann-Shing, E-mail: jsjeng@mail.nutn.edu.tw

    2016-08-15

    Nb-doped Zinc tin oxide (NZTO) channel materials have been prepared by solution process in combination with the spin-coating method. All NZTO thin film transistors (TFTs) are n-type enhancement-mode devices, either without or with Nb additives. High-valence niobium ion (ionic charge = +5) has a larger ionic potential and similar ionic radius to Zn{sup 2+} and Sn{sup 4+} ions. As compared with the pure ZTO device, introducing Nb{sup 5+} ions into the ZTO channel layers can improve the electrical properties and bias stability of TFTs because of the reduction of the oxygen vacancies. This study discusses the connection among the material properties of the NZTO films and the electrical performance and bias stability of NZTO TFTs and how they are influenced by the Nb/(Nb + Sn) molar ratios of NZTO films. - Highlights: • Ultra-thin high-valence niobium doped zinc-tin oxide (NZTO) thin films are prepared using a solution process. • Nb dopants in ZTO films reduce the oxygen vacancy and subgap adsorption of the ZTO films. • The Nb-doping concentration of the NZTO channel layer has a strong influence on the TFT performance.

  14. High temperature study of flexible silicon-on-insulator fin field-effect transistors

    KAUST Repository

    Diab, Amer El Hajj; Sevilla, Galo T.; Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2014-01-01

    . Characterization from room to high temperature (150 °C) was completed to determine temperature dependence of drain current (Ids), gate leakage current (Igs), transconductance (gm), and extracted low-field mobility (μ0). Mobility degradation with temperature

  15. High Sensitive pH Sensor Based on AlInN/GaN Heterostructure Transistor.

    Science.gov (United States)

    Dong, Yan; Son, Dong-Hyeok; Dai, Quan; Lee, Jun-Hyeok; Won, Chul-Ho; Kim, Jeong-Gil; Chen, Dunjun; Lee, Jung-Hee; Lu, Hai; Zhang, Rong; Zheng, Youdou

    2018-04-24

    The AlInN/GaN high-electron-mobility-transistor (HEMT) indicates better performances compared with the traditional AlGaN/GaN HEMTs. The present work investigated the pH sensor functionality of an analogous HEMT AlInN/GaN device with an open gate. It was shown that the Al 0.83 In 0.17 N/GaN device demonstrates excellent pH sense functionality in aqueous solutions, exhibiting higher sensitivity (−30.83 μA/pH for AlInN/GaN and −4.6 μA/pH for AlGaN/GaN) and a faster response time, lower degradation and good stability with respect to the AlGaN/GaN device, which is attributed to higher two-dimensional electron gas (2DEG) density and a thinner barrier layer in Al 0.83 In 0.17 N/GaN owning to lattice matching. On the other hand, the open gate geometry was found to affect the pH sensitivity obviously. Properly increasing the width and shortening the length of the open gate area could enhance the sensitivity. However, when the open gate width is too larger or too small, the pH sensitivity would be suppressed conversely. Designing an optimal ratio of the width to the length is important for achieving high sensitivity. This work suggests that the AlInN/GaN-based 2DEG carrier modulated devices would be good candidates for high-performance pH sensors and other related applications.

  16. High Sensitive pH Sensor Based on AlInN/GaN Heterostructure Transistor

    Directory of Open Access Journals (Sweden)

    Yan Dong

    2018-04-01

    Full Text Available The AlInN/GaN high-electron-mobility-transistor (HEMT indicates better performances compared with the traditional AlGaN/GaN HEMTs. The present work investigated the pH sensor functionality of an analogous HEMT AlInN/GaN device with an open gate. It was shown that the Al0.83In0.17N/GaN device demonstrates excellent pH sense functionality in aqueous solutions, exhibiting higher sensitivity (−30.83 μA/pH for AlInN/GaN and −4.6 μA/pH for AlGaN/GaN and a faster response time, lower degradation and good stability with respect to the AlGaN/GaN device, which is attributed to higher two-dimensional electron gas (2DEG density and a thinner barrier layer in Al0.83In0.17N/GaN owning to lattice matching. On the other hand, the open gate geometry was found to affect the pH sensitivity obviously. Properly increasing the width and shortening the length of the open gate area could enhance the sensitivity. However, when the open gate width is too larger or too small, the pH sensitivity would be suppressed conversely. Designing an optimal ratio of the width to the length is important for achieving high sensitivity. This work suggests that the AlInN/GaN-based 2DEG carrier modulated devices would be good candidates for high-performance pH sensors and other related applications.

  17. Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

    Science.gov (United States)

    Wang, Kai; Ou, Hai; Chen, Jun

    2015-06-01

    Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The "smart" pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients.

  18. Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

    International Nuclear Information System (INIS)

    Wang, Kai; Ou, Hai; Chen, Jun

    2015-01-01

    Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The 'smart' pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients. (paper)

  19. Performance of AlGaN/GaN Heterostructure Field-Effect Transistors for High-Frequency and High-Power Electronics

    Directory of Open Access Journals (Sweden)

    Peter Kordos

    2005-01-01

    Full Text Available Preparation and properties of GaN-based heterostructure field-effect transistors (HFETs for high-frequency and high-power applications are studied in this work. Performance of unpassivated and SiO2 passivated AlGaN/GaN HFETs, as well as passivated SiO2/AlGaN/GaN MOSHFETs (metal-oxide-semicondutor HFETs is compared. It is found that MOSHFETs exhibit better DC and RF properties than simple HFET counterparts. Deposited SiO2 yielded an increase of the sheet carrier density from 7.6x10^12 cm^-2 to 9.2x10^12 cm^-2 and subsequent increase of the static drain saturation current from 0.75 A/mm to 1.09 A/mm. Small-signal RF characterisation of MOSHFETs showed an extrinsic current gain cut-off frequency fT of 24 GHz and a maximum frequency of oscillation fmax of 40 GHz. These are fully comparable values with state-of-the-art AlGaN/GaN HFETs. Finnaůůy, microwave power measurements confirmed excellent performance of MOSHFETs:the output power measured at 7 GHz is about two-times larger than that of simple unpassived HFET. Thus, a great potential in application of GaN-based MOSHFETs is documented. 

  20. High Current Density Electrical Breakdown of TiS

    NARCIS (Netherlands)

    Molina-Mendoza, Aday J.; Island, J.O.; Paz, Wendel S.; Clamagirand, Jose Manuel; Ares, Josè Ramon; Flores, Eduardo; Leardini, Fabrice; Sánchez, Carlos; Agraït, Nicolás; Rubio-Bollinger, Gabino; van der Zant, H.S.J.; Ferrer, Isabel J.; Palacios, JJ; Castellanos-Gomez, Andres

    2017-01-01

    The high field transport characteristics of nanostructured transistors based on layered materials are not only important from a device physics perspective but also for possible applications in next generation electronics. With the growing promise of layered materials as replacements to

  1. Methods of high current magnetic field generator for transcranial magnetic stimulation application

    International Nuclear Information System (INIS)

    Bouda, N. R.; Pritchard, J.; Weber, R. J.; Mina, M.

    2015-01-01

    This paper describes the design procedures and underlying concepts of a novel High Current Magnetic Field Generator (HCMFG) with adjustable pulse width for transcranial magnetic stimulation applications. This is achieved by utilizing two different switching devices, the MOSFET and insulated gate bipolar transistor (IGBT). Results indicate that currents as high as ±1200 A can be generated with inputs of +/−20 V. Special attention to tradeoffs between field generators utilizing IGBT circuits (HCMFG 1 ) and MOSFET circuits (HCMFG 2 ) was considered. The theory of operation, design, experimental results, and electronic setup are presented and analyzed

  2. Methods of high current magnetic field generator for transcranial magnetic stimulation application

    Science.gov (United States)

    Bouda, N. R.; Pritchard, J.; Weber, R. J.; Mina, M.

    2015-05-01

    This paper describes the design procedures and underlying concepts of a novel High Current Magnetic Field Generator (HCMFG) with adjustable pulse width for transcranial magnetic stimulation applications. This is achieved by utilizing two different switching devices, the MOSFET and insulated gate bipolar transistor (IGBT). Results indicate that currents as high as ±1200 A can be generated with inputs of +/-20 V. Special attention to tradeoffs between field generators utilizing IGBT circuits (HCMFG1) and MOSFET circuits (HCMFG2) was considered. The theory of operation, design, experimental results, and electronic setup are presented and analyzed.

  3. Methods of high current magnetic field generator for transcranial magnetic stimulation application

    Energy Technology Data Exchange (ETDEWEB)

    Bouda, N. R., E-mail: nybouda@iastate.edu; Pritchard, J.; Weber, R. J.; Mina, M. [Department of Electrical and Computer engineering, Iowa State University, Ames, Iowa 50011 (United States)

    2015-05-07

    This paper describes the design procedures and underlying concepts of a novel High Current Magnetic Field Generator (HCMFG) with adjustable pulse width for transcranial magnetic stimulation applications. This is achieved by utilizing two different switching devices, the MOSFET and insulated gate bipolar transistor (IGBT). Results indicate that currents as high as ±1200 A can be generated with inputs of +/−20 V. Special attention to tradeoffs between field generators utilizing IGBT circuits (HCMFG{sub 1}) and MOSFET circuits (HCMFG{sub 2}) was considered. The theory of operation, design, experimental results, and electronic setup are presented and analyzed.

  4. A CURRENT MIRROR BASED TWO STAGE CMOS CASCODE OP-AMP FOR HIGH FREQUENCY APPLICATION

    Directory of Open Access Journals (Sweden)

    RAMKRISHNA KUNDU

    2017-03-01

    Full Text Available This paper presents a low power, high slew rate, high gain, ultra wide band two stage CMOS cascode operational amplifier for radio frequency application. Current mirror based cascoding technique and pole zero cancelation technique is used to ameliorate the gain and enhance the unity gain bandwidth respectively, which is the novelty of the circuit. In cascading technique a common source transistor drive a common gate transistor. The cascoding is used to enhance the output resistance and hence improve the overall gain of the operational amplifier with less complexity and less power dissipation. To bias the common gate transistor, a current mirror is used in this paper. The proposed circuit is designed and simulated using Cadence analog and digital system design tools of 45 nanometer CMOS technology. The simulated results of the circuit show DC gain of 63.62 dB, unity gain bandwidth of 2.70 GHz, slew rate of 1816 V/µs, phase margin of 59.53º, power supply of the proposed operational amplifier is 1.4 V (rail-to-rail ±700 mV, and power consumption is 0.71 mW. This circuit specification has encountered the requirements of radio frequency application.

  5. Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer

    Science.gov (United States)

    Chavarkar, Prashant; Smorchkova, Ioulia P.; Keller, Stacia; Mishra, Umesh; Walukiewicz, Wladyslaw; Wu, Yifeng

    2005-02-01

    A Group III nitride based high electron mobility transistors (HEMT) is disclosed that provides improved high frequency performance. One embodiment of the HEMT comprises a GaN buffer layer, with an Al.sub.y Ga.sub.1-y N (y=1 or y 1) layer on the GaN buffer layer. An Al.sub.x Ga.sub.1-x N (0.ltoreq.x.ltoreq.0.5) barrier layer on to the Al.sub.y Ga.sub.1-y N layer, opposite the GaN buffer layer, Al.sub.y Ga.sub.1-y N layer having a higher Al concentration than that of the Al.sub.x Ga.sub.1-x N barrier layer. A preferred Al.sub.y Ga.sub.1-y N layer has y=1 or y.about.1 and a preferred Al.sub.x Ga.sub.1-x N barrier layer has 0.ltoreq.x.ltoreq.0.5. A 2DEG forms at the interface between the GaN buffer layer and the Al.sub.y Ga.sub.1-y N layer. Respective source, drain and gate contacts are formed on the Al.sub.x Ga.sub.1-x N barrier layer. The HEMT can also comprising a substrate adjacent to the buffer layer, opposite the Al.sub.y Ga.sub.1-y N layer and a nucleation layer between the Al.sub.x Ga.sub.1-x N buffer layer and the substrate.

  6. Effect of 50 MeV Li3+ ion irradiation on electrical characteristics of high speed NPN power transistor

    International Nuclear Information System (INIS)

    Dinesh, C.M.; Ramani; Radhakrishna, M.C.; Dutt, R.N.; Khan, S.A.; Kanjilal, D.

    2008-01-01

    Silicon NPN overlay RF power high speed commercial bipolar junction transistors (BJTs) find applications in military, space and communication equipments. Here we report the effect of 50 MeV Li 3+ ion irradiation in the fluence range 1 x 10 11 -1.8 x 10 12 ions cm -2 on NPN power transistor. The range (R), electronic energy loss (S e ), nuclear energy loss (S n ), total ionizing dose (TID) and total displacement damage (D d ) in the silicon target are calculated from TRIM Monte Carlo Code. Output resistance is 3.568 x 10 4 Ω for unirradiated device and it increases to 6 x 10 7 Ω as the fluence is increased from 1 x 10 11 to 1.8 x 10 12 ions cm -2 . The capacitance of the emitter-base junction of the transistor decreases and dielectric loss of the emitter-base junction increases with increase in ion fluence. The built in voltage of the unirradiated sample is 0.5 V and it shifts to 0.4 V after irradiation at fluence of 1.8 x 10 12 ions cm -2 and the corresponding doping density reduced to 5.758 x 10 16 cm -3 . The charge carrier removal rate varies linearly with the increase in ion fluence

  7. Distributed amplifier using Josephson vortex flow transistors

    International Nuclear Information System (INIS)

    McGinnis, D.P.; Beyer, J.B.; Nordman, J.E.

    1986-01-01

    A wide-band traveling wave amplifier using vortex flow transistors is proposed. A vortex flow transistor is a long Josephson junction used as a current controlled voltage source. The dual nature of this device to the field effect transistor is exploited. A circuit model of this device is proposed and a distributed amplifier utilizing 50 vortex flow transistors is predicted to have useful gain to 100 GHz

  8. Investigation of enhancement-mode AlGaN/GaN nanowire channel high-electron-mobility transistor with oxygen-containing plasma treatment

    Science.gov (United States)

    He, Yunlong; Wang, Chong; Mi, Minhan; Zhang, Meng; Zhu, Qing; Zhang, Peng; Wu, Ji; Zhang, Hengshuang; Zheng, Xuefeng; Yang, Ling; Duan, Xiaoling; Ma, Xiaohua; Hao, Yue

    2017-05-01

    A novel enhancement-mode (E-mode) AlGaN/GaN high-electron-mobility transistor (HEMT) has been fabricated, by combining nanowire channel (NC) structure fabrication and N2O (or O2) plasma treatment. A comparison of two NC-HEMTs with different plasma treatments has been made. The NC-HEMT with N2O plasma treatment shows an output current of 610 mA/mm and a peak transconductance of 450 mS/mm. The DIBL of the NC-HEMT with N2O plasma treatment is as low as 2 mV/V, and an SS of 70 mV/decade is achieved. The device exhibits an intrinsic current gain cutoff frequency f T of 19 GHz and a maximum oscillation frequency f max of 58 GHz.

  9. Design and characterisation of high electron mobility transistors for use in a monolithic GaAs X-ray imaging sensor

    International Nuclear Information System (INIS)

    Boardman, D.A.; Sellin, P.J.

    2001-01-01

    A new design of monolithic GaAs pixel detector is proposed for medical and synchrotron applications. In this device a semi-insulating GaAs wafer will be used as both the detector element and the substrate for the integrated charge readout matrix. The charge readout matrix consists of High Electron Mobility Transistors (HEMTs), which are grown epitaxially onto the GaAs substrate. Experimental characterisation of HEMTs has been carried out and their suitability for the proposed imaging device is assessed. Temperature measurements on initial devices showed the threshold voltage to be stable from room temperature down to -15 degree sign C. HEMT designs with lower leakage current that operate in enhancement mode have been fabricated and modelled using the Silvaco simulation package. These optimised devices have been fabricated using a gate recess, and exhibit enhancement mode operation and significantly reduced gate leakage currents

  10. An Alternating 5,5-Dimethylcyclopentadiene-based Copolymer prepared at Room Temperature for High Performance Organic Thin Film Transistors

    KAUST Repository

    Fei, Zhuping; Chen, Lei; Han, Yang; Gann, Eliot; Chesman, Anthony; McNeill, Christopher R.; Anthopoulos, Thomas D.; Heeney, Martin; Pietrangelo, Agostino

    2017-01-01

    We report that the inclusion of non-aromatic 5,5-dimethylcyclopentadiene monomer into a conjugated backbone is an attractive strategy to high performance semiconducting polymers. The use of this monomer enables a room temperature Suzuki copolymerization with a diketopyrrolopyrrole comono-mer to afford a highly soluble, high molecular weight material. The resulting low band gap polymer exhibits excellent photo and thermal stability, and despite a large π-π stacking distance of 4.26 Å, it demonstrates excellent performance in thin-film transistor devices.

  11. Double pulse doped InGaAs/AlGaAs/GaAs pseudomorphic high-electron-mobility transistor heterostructures

    International Nuclear Information System (INIS)

    Egorov, A. Yu.; Gladyshev, A. G.; Nikitina, E. V.; Denisov, D. V.; Polyakov, N. K.; Pirogov, E. V.; Gorbazevich, A. A.

    2010-01-01

    Double pulse doped (δ-doped) InGaAs/AlGaAs/GaAs pseudomorphic high-electron-mobility transistor (HEMT) heterostructures were grown by molecular-beam epitaxy using a multiwafer technological system. The room-temperature electron mobility was determined by the Hall method as 6550 and 6000 cm 2 /(V s) at sheet electron densities of 3.00 x 10 12 and 3.36 x 10 12 cm -2 , respectively. HEMT heterostructures fabricated in a single process feature high uniformity of structural and electrical characteristics over the entire area of wafers 76.2 mm in diameter and high reproducibility of characteristics from process to process.

  12. An Alternating 5,5-Dimethylcyclopentadiene-based Copolymer prepared at Room Temperature for High Performance Organic Thin Film Transistors

    KAUST Repository

    Fei, Zhuping

    2017-06-05

    We report that the inclusion of non-aromatic 5,5-dimethylcyclopentadiene monomer into a conjugated backbone is an attractive strategy to high performance semiconducting polymers. The use of this monomer enables a room temperature Suzuki copolymerization with a diketopyrrolopyrrole comono-mer to afford a highly soluble, high molecular weight material. The resulting low band gap polymer exhibits excellent photo and thermal stability, and despite a large π-π stacking distance of 4.26 Å, it demonstrates excellent performance in thin-film transistor devices.

  13. High-performance solution-processed polymer ferroelectric field-effect transistors

    NARCIS (Netherlands)

    Naber, RCG; Tanase, C; Blom, PWM; Gelinck, GH; Marsman, AW; Touwslager, FJ; Setayesh, S; De Leeuw, DM; Naber, Ronald C.G.; Gelinck, Gerwin H.; Marsman, Albert W.; Touwslager, Fred J.

    We demonstrate a rewritable, non-volatile memory device with flexible plastic active layers deposited from solution. The memory device is a ferroelectric field-effect transistor (FeFET) made with a ferroelectric fluoropolymer and a bisalkoxy-substituted poly(p-phenylene vinylene) semiconductor

  14. Monolithic integration of detectors and transistors on high-resistivity silicon

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Batignani, Giovanni; Boscardin, Maurizio; Bosisio, Luciano; Gregori, Paolo; Pancheri, Lucio; Piemonte, Claudio; Ratti, Lodovico; Verzellesi, Giovanni; Zorzi, Nicola

    2007-01-01

    We report on the most recent results from an R and D activity aimed at the development of silicon radiation detectors with embedded front-end electronics. The key features of the fabrication technology and the available active devices are described. Selected results from the characterization of transistors and test structures are presented and discussed, and the considered application fields are addressed

  15. Probing spin-polarized tunneling at high bias and temperature with a magnetic tunnel transistor

    NARCIS (Netherlands)

    Park, B.G.; Banerjee, T.; Min, B.C.; Sanderink, Johannes G.M.; Lodder, J.C.; Jansen, R.

    2005-01-01

    The magnetic tunnel transistor (MTT) is a three terminal hybrid device that consists of a tunnel emitter, a ferromagnetic (FM) base, and a semiconductor collector. In the MTT with a FM emitter and a single FM base, spin-polarized hot electrons are injected into the base by tunneling. After

  16. Demonstration of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with silicon-oxy-nitride as the gate insulator

    International Nuclear Information System (INIS)

    Balachander, K.; Arulkumaran, S.; Egawa, T.; Sano, Y.; Baskar, K.

    2005-01-01

    AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs) were fabricated with plasma enhanced chemical vapor deposited silicon oxy-nitride (SiON) as an insulating layer. The compositions of SiON thin films were confirmed using X-ray photoelectron spectroscopy. The fabricated MOSHEMTs exhibited a very high saturation current density of 1.1 A/mm coupled with high positive operational gate voltage up to +7 V. The MOSHEMTs also exhibited four orders of low gate leakage current and high forward-on voltage when compared with the conventional HEMTs. The drain current collapse using gate pulse measurements showed only a negligible difference in the saturation current density revealing the drastic improvement in passivation of the surface states due to the high quality of dielectric thin films deposited. Thus, based on the improved direct-current operation, SiON can be considered to be a potential gate oxide comparable with other dielectric insulators

  17. InN/InGaN complementary heterojunction-enhanced tunneling field-effect transistor with enhanced subthreshold swing and tunneling current

    Science.gov (United States)

    Peng, Yue; Han, Genquan; Wang, Hongjuan; Zhang, Chunfu; Liu, Yan; Wang, Yibo; Zhao, Shenglei; Zhang, Jincheng; Hao, Yue

    2016-05-01

    InN/In0.75Ga0.25N complementary heterojunction-enhanced tunneling field-effect transistors (HE-TFETs) were characterized using the numerical simulation. InN/In0.75Ga0.25N HE-TFET has an InN/In0.75Ga0.25N heterojunction located in the channel region with a distance of LT-H from the source/channel tunneling junction. We demonstrate that, for both n- and p-channel devices, HE-TFETs have a delay of onset voltage VONSET, a steeper subthreshold swing (SS), and an enhanced on-state current ION in comparison with the homo-TFETs. InN/In0.75Ga0.25N n- and p-channel HE-TFETs with a gate length LG of 25 nm and a LT-H of 5 nm achieve a 7 and 9 times ION improvement in comparison with the homo devices, respectively, at a supply voltage of 0.3 V. The performance enhancement in HE-TFETs is attributed to the modulating effect of heterojunction on band-to-band tunneling (BTBT). Because InN/In0.75Ga0.25N heterointerface shows the similar band offsets at conduction and valence bands, the InN/In0.75Ga0.25N heterojunction exhibits the improved effect on BTBT for both n- and p-channel devices. This makes InN/In0.75Ga0.25N heterojunction a promising structure for high performance complementary TFETs.

  18. Au nanoparticles attached carbon nanotubes as a high performance active element in field effect transistor

    International Nuclear Information System (INIS)

    Lee, Myeongsoon; Kim, Don

    2016-01-01

    The Au nanoparticles attached carbon nanotubes (Au-CNTs), diameter ranged from 40 to 250 nm, were prepared and discussed their chemical and electrical properties. The shape and crystallinity of the carbon nanotubes (CNTs) phase depended main2ly on the diameter of CNTs (r_A_u_-_C_N_T). Highly crystalline, straight CNTs were observed when the r_A_u_-_C_N_T exceeded 80 nm, and less crystalline noodle-shaped CNTs were observed when the r_A_u_-_C_N_T was smaller than 80 nm. The crystallinity of the CNT phase was confirmed by analyzing the G and D bands in their Raman spectra and the electrical conductivities of the Au-CNTs. The electrical conductivity of the highly crystalline carbon phase of Au-CNTs (r_A_u_-_C_N_T = 250 nm) was ∼10"4 S/cm. The back-gated field effect transistors (FETs) based on the Au-CNTs, which were assembled on a SiO_2/Si wafer using the dielectrophoresis technique, showed that the Au-CNTs would be a good functional electronic material for future electronic and sensing applications. The transconductance and hole mobility of the FETs, which were assembled with the highly crystalline Au-CNTs (r_A_u_-_C_N_T = 250 nm), reached to 3.6 × 10"−"4 A/V and 3.1 × 10"4 cm"2/V s, respectively. These values are in the middle of those of reported for single walled carbon nanotubes and graphene. However, we could not find any field effect in a CNTFET, which assembled without Au nanoparticles, through the same process. - Highlights: • The shape and crystallinity of the CNTs depended mainly on the diameter of CNTs. • The electrical conductivity of the highly crystalline Au-CNTs was ∼10"4 S/cm. • The Au-CNT FET shows typical p-channel gate effect with the on/off ratio of ∼10"4. • The Au-CNT FET shows very high transconductance (g_m) and carrier mobility (μ_h).

  19. Au nanoparticles attached carbon nanotubes as a high performance active element in field effect transistor

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Myeongsoon; Kim, Don, E-mail: donkim@pknu.ac.kr

    2016-08-15

    The Au nanoparticles attached carbon nanotubes (Au-CNTs), diameter ranged from 40 to 250 nm, were prepared and discussed their chemical and electrical properties. The shape and crystallinity of the carbon nanotubes (CNTs) phase depended main2ly on the diameter of CNTs (r{sub Au-CNT}). Highly crystalline, straight CNTs were observed when the r{sub Au-CNT} exceeded 80 nm, and less crystalline noodle-shaped CNTs were observed when the r{sub Au-CNT} was smaller than 80 nm. The crystallinity of the CNT phase was confirmed by analyzing the G and D bands in their Raman spectra and the electrical conductivities of the Au-CNTs. The electrical conductivity of the highly crystalline carbon phase of Au-CNTs (r{sub Au-CNT} = 250 nm) was ∼10{sup 4} S/cm. The back-gated field effect transistors (FETs) based on the Au-CNTs, which were assembled on a SiO{sub 2}/Si wafer using the dielectrophoresis technique, showed that the Au-CNTs would be a good functional electronic material for future electronic and sensing applications. The transconductance and hole mobility of the FETs, which were assembled with the highly crystalline Au-CNTs (r{sub Au-CNT} = 250 nm), reached to 3.6 × 10{sup −4} A/V and 3.1 × 10{sup 4} cm{sup 2}/V s, respectively. These values are in the middle of those of reported for single walled carbon nanotubes and graphene. However, we could not find any field effect in a CNTFET, which assembled without Au nanoparticles, through the same process. - Highlights: • The shape and crystallinity of the CNTs depended mainly on the diameter of CNTs. • The electrical conductivity of the highly crystalline Au-CNTs was ∼10{sup 4} S/cm. • The Au-CNT FET shows typical p-channel gate effect with the on/off ratio of ∼10{sup 4}. • The Au-CNT FET shows very high transconductance (g{sub m}) and carrier mobility (μ{sub h}).

  20. Temperature dependent microwave performance of AlGaN/GaN high-electron-mobility transistors on high-resistivity silicon substrate

    International Nuclear Information System (INIS)

    Arulkumaran, S.; Liu, Z.H.; Ng, G.I.; Cheong, W.C.; Zeng, R.; Bu, J.; Wang, H.; Radhakrishnan, K.; Tan, C.L.

    2007-01-01

    The influence of temperature (- 50 deg. C to + 200 deg. C) was studied on the DC and microwave characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) on high resistivity Si substrate for the first time. The AlGaN/GaN HEMTs exhibited a current-gain cut-off frequency (f T ) of 11.8 GHz and maximum frequency of oscillation (f max ) of 27.5 GHz. When compared to room temperature values, about 4% and 10% increase in f T and f max and 23% and 39.5% decrease in f T and f max were observed when measured at - 50 deg. C and 200 deg. C, respectively. The improvement of I D , g m f T , and f max at - 50 deg. C is due to the enhancement of 2DEG mobility and effective electron velocity. The anomalous drain current reduction in the I-V curves were observed at low voltage region at the temperature ≤ 10 deg. C but disappeared when the temperature reached ≥ 25 deg. C. A positive threshold voltage (V th ) shift was observed from - 50 deg. C to 200 deg. C. The positive shift of V th is due to the occurrence of trapping effects in the devices. The drain leakage current decreases with activation energies of 0.028 eV and 0.068 eV. This decrease of leakage current with the increase of temperature is due to the shallow acceptor initiated impact ionization

  1. Design strategy for air-stable organic semiconductors applicable to high-performance field-effect transistors

    OpenAIRE

    Kazuo Takimiya et al

    2007-01-01

    Electronic structure of air-stable, high-performance organic field-effect transistor (OFET) material, 2,7-dipheneyl[1]benzothieno[3,2-b]benzothiophene (DPh-BTBT), was discussed based on the molecular orbital calculations. It was suggested that the stability is originated from relatively low-lying HOMO level, despite the fact that the molecule contains highly π-extended aromatic core ([1]benzothieno[3,2-b]benzothiophene, BTBT) with four fused aromatic rings like naphthacene. This is rationaliz...

  2. High current density ion beam measurement techniques

    International Nuclear Information System (INIS)

    Ko, W.C.; Sawatzky, E.

    1976-01-01

    High ion beam current measurements are difficult due to the presence of the secondary particles and beam neutralization. For long Faraday cages, true current can be obtained only by negative bias on the target and by summing the cage wall and target currents; otherwise, the beam will be greatly distorted. For short Faraday cages, a combination of small magnetic field and the negative target bias results in correct beam current. Either component alone does not give true current

  3. Simulation and experimental study of high power microwave damage effect on AlGaAs/InGaAs pseudomorphic high electron mobility transistor

    International Nuclear Information System (INIS)

    Yu Xin-Hai; Chai Chang-Chun; Liu Yang; Yang Yin-Tang; Xi Xiao-Wen

    2015-01-01

    The high power microwave (HPM) damage effect on the AlGaAs/InGaAs pseudomorphic high electron mobility transistor (pHEMT) is studied by simulation and experiments. Simulated results suggest that the HPM damage to pHEMT is due to device burn-out caused by the emerging current path and strong electric field beneath the gate. Besides, the results demonstrate that the damage power threshold decreases but the energy threshold slightly increases with the increase of pulse-width, indicating that HPM with longer pulse-width requires lower power density but more energy to cause the damage to pHEMT. The empirical formulas are proposed to describe the pulse-width dependence. Then the experimental data validate the pulse-width dependence and verify that the proposed formula P = 55τ −0.06 is capable of quickly and accurately estimating the HPM damage susceptibility of pHEMT. Finally the interior observation of damaged samples by scanning electron microscopy (SEM) illustrates that the failure mechanism of the HPM damage to pHEMT is indeed device burn-out and the location beneath the gate near the source side is most susceptible to burn-out, which is in accordance with the simulated results. (paper)

  4. InAlN high electron mobility transistor Ti/Al/Ni/Au Ohmic contact optimisation assisted by in-situ high temperature transmission electron microscopy

    International Nuclear Information System (INIS)

    Smith, M. D.; Parbrook, P. J.; O'Mahony, D.; Conroy, M.; Schmidt, M.

    2015-01-01

    This paper correlates the micro-structural and electrical characteristics associated with annealing of metallic multi-layers typically used in the formation of Ohmic contacts to InAlN high electron mobility transistors. The multi-layers comprised Ti/Al/Ni/Au and were annealed via rapid thermal processing at temperatures up to 925 °C with electrical current-voltage analysis establishing the onset of Ohmic (linear IV) behaviour at 750–800 °C. In-situ temperature dependent transmission electron microscopy established that metallic diffusion and inter-mixing were initiated near a temperature of 500 °C. Around 800 °C, inter-diffusion of the metal and semiconductor (nitride) was observed, correlating with the onset of Ohmic electrical behaviour. The sheet resistance associated with the InAlN/AlN/GaN interface is highly sensitive to the anneal temperature, with the range depending on the Ti layer thickness. The relationship between contact resistivity and measurement temperature follow that predicted by thermionic field emission for contacts annealed below 850 °C, but deviated above this due to excessive metal-semiconductor inter-diffusion

  5. Properties of high current RFQ injectors

    International Nuclear Information System (INIS)

    Schempp, A.; Goethe, J.W.

    1996-01-01

    RFQ linacs are efficient, compact low energy ion structures, which have found numerous applications. They use electrical rf focusing and can capture, bunch and transmit high current ion beams. Some recent development and new projects like a heavy ion injectors for a cyclotron, and the status of the work on high current high duty factor RFQs will be discussed. (author)

  6. Properties of high current RFQ injectors

    Energy Technology Data Exchange (ETDEWEB)

    Schempp, A.; Goethe, J.W. [Frankfurt Univ. (Germany). Inst. fuer Angewandte Physik

    1996-12-31

    RFQ linacs are efficient, compact low energy ion structures, which have found numerous applications. They use electrical rf focusing and can capture, bunch and transmit high current ion beams. Some recent development and new projects like a heavy ion injectors for a cyclotron, and the status of the work on high current high duty factor RFQs will be discussed. (author) 2 refs.

  7. Low-frequency noise in single electron tunneling transistor

    DEFF Research Database (Denmark)

    Tavkhelidze, A.N.; Mygind, Jesper

    1998-01-01

    The noise in current biased aluminium single electron tunneling (SET) transistors has been investigated in the frequency range of 5 mHz ..., we find the same input charge noise, typically QN = 5 × 10–4 e/Hz1/2 at 10 Hz, with and without the HF shielding. At lower frequencies, the noise is due to charge trapping, and the voltage noise pattern superimposed on the V(Vg) curve (voltage across transistor versus gate voltage) strongly depends...... when ramping the junction voltage. Dynamic trapping may limit the high frequency applications of the SET transistor. Also reported on are the effects of rf irradiation and the dependence of the SET transistor noise on bias voltage. ©1998 American Institute of Physics....

  8. Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

    2018-01-01

    Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

  9. High-electric-field-stress-induced degradation of SiN passivated AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Wen-Ping, Gu; Huan-Tao, Duan; Jin-Yu, Ni; Yue, Hao; Jin-Cheng, Zhang; Qian, Feng; Xiao-Hua, Ma

    2009-01-01

    AlGaN/GaN high electron mobility transistors (HEMTs) are fabricated by employing SiN passivation, this paper investigates the degradation due to the high-electric-field stress. After the stress, a recoverable degradation has been found, consisting of the decrease of saturation drain current I Dsat , maximal transconductance g m , and the positive shift of threshold voltage V TH at high drain-source voltage V DS . The high-electric-field stress degrades the electric characteristics of AlGaN/GaN HEMTs because the high field increases the electron trapping at the surface and in AlGaN barrier layer. The SiN passivation of AlGaN/GaN HEMTs decreases the surface trapping and 2DEG depletion a little during the high-electric-field stress. After the hot carrier stress with V DS = 20 V and V GS = 0 V applied to the device for 10 4 sec, the SiN passivation decreases the stress-induced degradation of I Dsat from 36% to 30%. Both on-state and pulse-state stresses produce comparative decrease of I Dsat , which shows that although the passivation is effective in suppressing electron trapping in surface states, it does not protect the device from high-electric-field degradation in nature. So passivation in conjunction with other technological solutions like cap layer, prepassivation surface treatments, or field-plate gate to weaken high-electric-field degradation should be adopted. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  10. Transistor Effect in Improperly Connected Transistors.

    Science.gov (United States)

    Luzader, Stephen; Sanchez-Velasco, Eduardo

    1996-01-01

    Discusses the differences between the standard representation and a realistic representation of a transistor. Presents an experiment that helps clarify the explanation of the transistor effect and shows why transistors should be connected properly. (JRH)

  11. High Performance Polymer Field-Effect Transistors Based on Thermally Crosslinked Poly(3-hexylthiophene)

    International Nuclear Information System (INIS)

    Jiang Chun-Xia; Yang Xiao-Yan; Zhao Kai; Wu Xiao-Ming; Yang Li-Ying; Cheng Xiao-Man; Yin Shou-Gen; Wei Jun

    2011-01-01

    The performance of polymer field-effect transistors is improved by thermal crosslinking ofpoly(3-hexylthiophene), using ditert butyl peroxide as the crosslinker. The device performance depends on the crosslinker concentration significantly. We obtain an optimal on/off ratio of 10 5 and the saturate field-effect mobility of 0.34cm 2 V −1 s −1 , by using a suitable ratios of ditert butyl peroxide, 0.5 wt% ofpoly(3-hexylthiophene). The microstructure images show that the crosslinked poly(3-hexylthiophene) active layers simultaneously possess appropriate crystallinity and smooth morphology. Moreover, crosslinking of poly(3-hexylthiophene) prevents the transistors from large threshold voltage shifts under ambient bias-stressing, showing an advantage in encouraging device environmental and operating stability. (cross-disciplinary physics and related areas of science and technology)

  12. Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

    Science.gov (United States)

    Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

    2018-05-08

    A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

  13. Organic phthalocyanine films with high mobilities for efficient field-effect transistor switches

    Czech Academy of Sciences Publication Activity Database

    Schauer, F.; Zhivkov, I.; Nešpůrek, Stanislav

    266-269, 1-3 (2000), s. 999-1003 ISSN 0022-3093. [International Conference on Amorphous and Microcrystalline Semiconductors /18./. Snowbird, 23.08.1999-27.08.1999] R&D Projects: GA MŠk OC 518.10; GA AV ČR KSK2050602 Institutional research plan: CEZ:AV0Z4050913 Keywords : phthalocyanine * charge mobility * field-effect transistor Subject RIV: CD - Macromolecular Chemistry Impact factor: 1.269, year: 2000

  14. Barrier reduction via implementation of InGaN interlayer in wafer-bonded current aperture vertical electron transistors consisting of InGaAs channel and N-polar GaN drain

    International Nuclear Information System (INIS)

    Kim, Jeonghee; Laurent, Matthew A.; Li, Haoran; Lal, Shalini; Mishra, Umesh K.

    2015-01-01

    This letter reports the influence of the added InGaN interlayer on reducing the inherent interfacial barrier and hence improving the electrical characteristics of wafer-bonded current aperture vertical electron transistors consisting of an InGaAs channel and N-polar GaN drain. The current-voltage characteristics of the transistors show that the implementation of N-polar InGaN interlayer effectively reduces the barrier to electron transport across the wafer-bonded interface most likely due to its polarization induced downward band bending, which increases the electron tunneling probability. Fully functional wafer-bonded transistors with nearly 600 mA/mm of drain current at V GS  = 0 V and L go  = 2 μm have been achieved, and thus demonstrate the feasibility of using wafer-bonded heterostructures for applications that require active carrier transport through both materials

  15. Thermal instability and the growth of the InGaAs/AlGaAs pseudomorphic high electron mobility transistor system

    International Nuclear Information System (INIS)

    Pellegrino, Joseph G.; Qadri, Syed B.; Mahadik, Nadeemullah A.; Rao, Mulpuri V.; Tseng, Wen F.; Thurber, Robert; Gajewski, Donald; Guyer, Jonathan

    2007-01-01

    The effects of temperature overshoot during molecular beam epitaxy growth on the transport properties of conventionally and delta-doped pseudomorphic high electron mobility transistor (pHEMT) structures have been examined. A diffuse reflectance spectroscopy (DRS)-controlled versus a thermocouple (TC)-controlled, growth scheme is compared. Several advantages of the DRS-grown pHEMTs over the TC-controlled version were observed. Modest improvements in mobility, on the order of 2%-3%, were observed in addition to a 20% reduction in carrier freeze-out for the DRS-grown pHEMTs at 77 K

  16. Physisorption of functionalized gold nanoparticles on AlGaN/GaN high electron mobility transistors for sensing applications.

    Science.gov (United States)

    Makowski, M S; Kim, S; Gaillard, M; Janes, D; Manfra, M J; Bryan, I; Sitar, Z; Arellano, C; Xie, J; Collazo, R; Ivanisevic, A

    2013-02-18

    AlGaN/GaN high electron mobility transistors (HEMTs) were used to measure electrical characteristics of physisorbed gold nanoparticles (Au NPs) functionalized with alkanethiols with a terminal methyl, amine, or carboxyl functional group. Additional alkanethiol was physisorbed onto the NP treated devices to distinguish between the effects of the Au NPs and alkanethiols on HEMT operation. Scanning Kelvin probe microscopy and electrical measurements were used to characterize the treatment effects. The HEMTs were operated near threshold voltage due to the greatest sensitivity in this region. The Au NP/HEMT system electrically detected functional group differences on adsorbed NPs which is pertinent to biosensor applications.

  17. Breakdown mechanisms in AlGaN/GaN high electron mobility transistors with different GaN channel thickness values

    International Nuclear Information System (INIS)

    Ma Xiao-Hua; Zhang Ya-Man; Chen Wei-Wei; Wang Xin-Hua; Yuan Ting-Ting; Pang Lei; Liu Xin-Yu

    2015-01-01

    In this paper, the off-state breakdown characteristics of two different AlGaN/GaN high electron mobility transistors (HEMTs), featuring a 50-nm and a 150-nm GaN thick channel layer, respectively, are compared. The HEMT with a thick channel exhibits a little larger pinch-off drain current but significantly enhanced off-state breakdown voltage (BV off ). Device simulation indicates that thickening the channel increases the drain-induced barrier lowering (DIBL) but reduces the lateral electric field in the channel and buffer underneath the gate. The increase of BV off in the thick channel device is due to the reduction of the electric field. These results demonstrate that it is necessary to select an appropriate channel thickness to balance DIBL and BV off in AlGaN/GaN HEMTs. (paper)

  18. Characteristics of voltage regulators with serial NPN transistor in the fields of medium and high energy photons

    International Nuclear Information System (INIS)

    Vukic, V.; Osmokrovic, P.

    2007-01-01

    Variation of collector - emitter dropout voltage on serial transistors of voltage regulators LM2990T-5 and LT1086CT5 were used as the parameter for detection of examined devices' radiation hardness in X and ? radiation fields. Biased voltage regulators with serial super-β transistor in the medium dose rate X radiation field had significantly different response from devices with conventional serial NPN transistor. Although unbiased components suffered greater damage in most cases, complete device failure happened only among the biased components with serial super-β transistor in Bremsstrahlung field. Mechanisms of transistors degradation in ionizing radiation fields were analysed [sr

  19. A Wide-Range Tunable Level-Keeper Using Vertical Metal-Oxide-Semiconductor Field-Effect Transistors for Current-Reuse Systems

    Science.gov (United States)

    Tanoi, Satoru; Endoh, Tetsuo

    2012-04-01

    A wide-range tunable level-keeper using vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed for current-reuse analog systems. The design keys for widening tunable range of the operation are a two-path feed-back and a vertical MOSFET with back-bias-effect free. The proposed circuit with the vertical MOSFETs shows the 1.23-V tunable-range of the input level with the 2.4-V internal-supply voltage (VDD) in the simulation. This tunable-range of the proposed circuit is 4.7 times wider than that of the conventional. The achieved current efficiency of the proposed level-keeper is 66% at the 1.2-V output with the 2.4-V VDD. This efficiency of the proposed circuit is twice higher than that of the traditional voltage down converter.

  20. Ultrashort Channel Length Black Phosphorus Field-Effect Transistors.

    Science.gov (United States)

    Miao, Jinshui; Zhang, Suoming; Cai, Le; Scherr, Martin; Wang, Chuan

    2015-09-22

    This paper reports high-performance top-gated black phosphorus (BP) field-effect transistors with channel lengths down to 20 nm fabricated using a facile angle evaporation process. By controlling the evaporation angle, the channel length of the transistors can be reproducibly controlled to be anywhere between 20 and 70 nm. The as-fabricated 20 nm top-gated BP transistors exhibit respectable on-state current (174 μA/μm) and transconductance (70 μS/μm) at a VDS of 0.1 V. Due to the use of two-dimensional BP as the channel material, the transistors exhibit relatively small short channel effects, preserving a decent on-off current ratio of 10(2) even at an extremely small channel length of 20 nm. Additionally, unlike the unencapsulated BP devices, which are known to be chemically unstable in ambient conditions, the top-gated BP transistors passivated by the Al2O3 gate dielectric layer remain stable without noticeable degradation in device performance after being stored in ambient conditions for more than 1 week. This work demonstrates the great promise of atomically thin BP for applications in ultimately scaled transistors.

  1. High-density carrier-accumulated and electrically stable oxide thin-film transistors from ion-gel gate dielectric.

    Science.gov (United States)

    Fujii, Mami N; Ishikawa, Yasuaki; Miwa, Kazumoto; Okada, Hiromi; Uraoka, Yukiharu; Ono, Shimpei

    2015-12-18

    The use of indium-gallium-zinc oxide (IGZO) has paved the way for high-resolution uniform displays or integrated circuits with transparent and flexible devices. However, achieving highly reliable devices that use IGZO for low-temperature processes remains a technological challenge. We propose the use of IGZO thin-film transistors (TFTs) with an ionic-liquid gate dielectric in order to achieve high-density carrier-accumulated IGZO TFTs with high reliability, and we discuss a distinctive mechanism for the degradation of this organic-inorganic hybrid device under long-term electrical stress. Our results demonstrated that an ionic liquid or gel gate dielectric provides highly reliable and low-voltage operation with IGZO TFTs. Furthermore, high-density carrier accumulation helps improve the TFT characteristics and reliability, and it is highly relevant to the electronic phase control of oxide materials and the degradation mechanism for organic-inorganic hybrid devices.

  2. Ultra-high mobility transparent organic thin film transistors grown by an off-centre spin-coating method.

    Science.gov (United States)

    Yuan, Yongbo; Giri, Gaurav; Ayzner, Alexander L; Zoombelt, Arjan P; Mannsfeld, Stefan C B; Chen, Jihua; Nordlund, Dennis; Toney, Michael F; Huang, Jinsong; Bao, Zhenan

    2014-01-01

    Organic semiconductors with higher carrier mobility and better transparency have been actively pursued for numerous applications, such as flat-panel display backplane and sensor arrays. The carrier mobility is an important figure of merit and is sensitively influenced by the crystallinity and the molecular arrangement in a crystal lattice. Here we describe the growth of a highly aligned meta-stable structure of 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) from a blended solution of C8-BTBT and polystyrene by using a novel off-centre spin-coating method. Combined with a vertical phase separation of the blend, the highly aligned, meta-stable C8-BTBT films provide a significantly increased thin film transistor hole mobility up to 43 cm(2) Vs(-1) (25 cm(2) Vs(-1) on average), which is the highest value reported to date for all organic molecules. The resulting transistors show high transparency of >90% over the visible spectrum, indicating their potential for transparent, high-performance organic electronics.

  3. Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

    Science.gov (United States)

    Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

    2016-01-01

    Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

  4. High-voltage high-current triggering vacuum switch

    International Nuclear Information System (INIS)

    Alferov, D.F.; Bunin, R.A.; Evsin, D.V.; Sidorov, V.A.

    2012-01-01

    Experimental investigations of switching and breaking capacities of the new high current triggered vacuum switch (TVS) are carried out at various parameters of discharge current. It has been shown that the high current triggered vacuum switch TVS can switch repeatedly a current from units up to ten kiloampers with duration up to ten millisecond [ru

  5. Comparison of recessed gate-head structures on normally-off AlGaN/GaN high-electron-mobility transistor performance.

    Science.gov (United States)

    Khan, Mansoor Ali; Heo, Jun-Woo; Kim, Hyun-Seok; Park, Hyun-Chang

    2014-11-01

    In this work, different gate-head structures have been compared in the context of AlGaN/GaN-based high-electron-mobility transistors (HEMTs). Field-plate (FP) technology self-aligned to the gate electrode leads to various gate-head structures, most likely gamma (γF)-gate, camel (see symbol)-gate, and mushroom-shaped (T)-gate. In-depth comparison of recessed gate-head structures demonstrated that key performance metrics such as transconductance, output current, and breakdown voltage are better with the T-gate head structure. The recessed T-gate with its one arm toward the source side not only reduces the source-access resistance (R(g) +R(gs)), but also minimizes the source-side dispersion and current leakage, resulting in high transconductance (G(m)) and output current (I(DS)). At the same time, the other arm toward the drain-side reduces the drain-side dispersion and tends to distribute electric field peaks uniformly, resulting in high breakdown voltage (V(BR)). DC and RF analysis showed that the recessed T-gate FP-HEMT is a suitable candidate not only for high-frequency operation, but also for high-power applications.

  6. Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process

    Science.gov (United States)

    Song, Ki-Whan; Lee, Yong Kyu; Sim, Jae Sung; Kim, Kyung Rok; Lee, Jong Duk; Park, Byung-Gook; You, Young Sub; Park, Joo-On; Jin, You Seung; Kim, Young-Wug

    2005-04-01

    We propose a complementary self-biasing method which enables the single-electron transistor (SET)/complementary metal-oxide semiconductor (CMOS) hybrid multi-valued logics (MVLs) to operate well at high temperatures, where the peak-to-valley current ratio (PVCR) of the Coulomb oscillation markedly decreases. The new architecture is implemented with a few transistors by utilizing the phase control capability of the sidewall depletion gates in dual-gate single-electron transistors (DGSETs). The suggested scheme is evaluated by a SPICE simulation with an analytical DGSET model. Furthermore, we have developed a new process technology for the SET/CMOS hybrid systems. We have confirmed that both of the fabricated devices, namely, SET and CMOS transistors, exhibit the ideal characteristics for the complementary self-biasing scheme: the SET shows clear Coulomb oscillations with a 100 mV period and the CMOS transistors show a high voltage gain.

  7. High pressure, high current, low inductance, high reliability sealed terminals

    Science.gov (United States)

    Hsu, John S [Oak Ridge, TN; McKeever, John W [Oak Ridge, TN

    2010-03-23

    The invention is a terminal assembly having a casing with at least one delivery tapered-cone conductor and at least one return tapered-cone conductor routed there-through. The delivery and return tapered-cone conductors are electrically isolated from each other and positioned in the annuluses of ordered concentric cones at an off-normal angle. The tapered cone conductor service can be AC phase conductors and DC link conductors. The center core has at least one service conduit of gate signal leads, diagnostic signal wires, and refrigerant tubing routed there-through. A seal material is in direct contact with the casing inner surface, the tapered-cone conductors, and the service conduits thereby hermetically filling the interstitial space in the casing interior core and center core. The assembly provides simultaneous high-current, high-pressure, low-inductance, and high-reliability service.

  8. AlN Surface Passivation of GaN-Based High Electron Mobility Transistors by Plasma-Enhanced Atomic Layer Deposition.

    Science.gov (United States)

    Tzou, An-Jye; Chu, Kuo-Hsiung; Lin, I-Feng; Østreng, Erik; Fang, Yung-Sheng; Wu, Xiao-Peng; Wu, Bo-Wei; Shen, Chang-Hong; Shieh, Jia-Ming; Yeh, Wen-Kuan; Chang, Chun-Yen; Kuo, Hao-Chung

    2017-12-01

    We report a low current collapse GaN-based high electron mobility transistor (HEMT) with an excellent thermal stability at 150 °C. The AlN was grown by N 2 -based plasma enhanced atomic layer deposition (PEALD) and shown a refractive index of 1.94 at 633 nm of wavelength. Prior to deposit AlN on III-nitrides, the H 2 /NH 3 plasma pre-treatment led to remove the native gallium oxide. The X-ray photoelectron spectroscopy (XPS) spectroscopy confirmed that the native oxide can be effectively decomposed by hydrogen plasma. Following the in situ ALD-AlN passivation, the surface traps can be eliminated and corresponding to a 22.1% of current collapse with quiescent drain bias (V DSQ ) at 40 V. Furthermore, the high temperature measurement exhibited a shift-free threshold voltage (V th ), corresponding to a 40.2% of current collapse at 150 °C. The thermal stable HEMT enabled a breakdown voltage (BV) to 687 V at high temperature, promising a good thermal reliability under high power operation.

  9. AlN Surface Passivation of GaN-Based High Electron Mobility Transistors by Plasma-Enhanced Atomic Layer Deposition

    Science.gov (United States)

    Tzou, An-Jye; Chu, Kuo-Hsiung; Lin, I.-Feng; Østreng, Erik; Fang, Yung-Sheng; Wu, Xiao-Peng; Wu, Bo-Wei; Shen, Chang-Hong; Shieh, Jia-Ming; Yeh, Wen-Kuan; Chang, Chun-Yen; Kuo, Hao-Chung

    2017-04-01

    We report a low current collapse GaN-based high electron mobility transistor (HEMT) with an excellent thermal stability at 150 °C. The AlN was grown by N2-based plasma enhanced atomic layer deposition (PEALD) and shown a refractive index of 1.94 at 633 nm of wavelength. Prior to deposit AlN on III-nitrides, the H2/NH3 plasma pre-treatment led to remove the native gallium oxide. The X-ray photoelectron spectroscopy (XPS) spectroscopy confirmed that the native oxide can be effectively decomposed by hydrogen plasma. Following the in situ ALD-AlN passivation, the surface traps can be eliminated and corresponding to a 22.1% of current collapse with quiescent drain bias ( V DSQ) at 40 V. Furthermore, the high temperature measurement exhibited a shift-free threshold voltage ( V th), corresponding to a 40.2% of current collapse at 150 °C. The thermal stable HEMT enabled a breakdown voltage (BV) to 687 V at high temperature, promising a good thermal reliability under high power operation.

  10. O3 Layers via Spray Pyrolysis at Low Temperatures and Their Application in High Electron Mobility Transistors

    KAUST Repository

    Isakov, Ivan

    2017-04-06

    The growth mechanism of indium oxide (InO) layers processed via spray pyrolysis of an aqueous precursor solution in the temperature range of 100-300 °C and the impact on their electron transporting properties are studied. Analysis of the droplet impingement sites on the substrate\\'s surface as a function of its temperature reveals that Leidenfrost effect dominated boiling plays a crucial role in the growth of smooth, continuous, and highly crystalline InO layers via a vapor phase-like process. By careful optimization of the precursor formulation, deposition conditions, and choice of substrate, this effect is exploited and ultrathin and exceptionally smooth layers of InO are grown over large area substrates at temperatures as low as 252 °C. Thin-film transistors (TFTs) fabricated using these optimized InO layers exhibit superior electron transport characteristics with the electron mobility reaching up to 40 cm V s, a value amongst the highest reported to date for solution-processed InO TFTs. The present work contributes enormously to the basic understanding of spray pyrolysis and highlights its tremendous potential for large-volume manufacturing of high-performance metal oxide thin-film transistor electronics.

  11. O3 Layers via Spray Pyrolysis at Low Temperatures and Their Application in High Electron Mobility Transistors

    KAUST Repository

    Isakov, Ivan; Faber, Hendrik; Grell, Max; Wyatt-Moon, Gwenhivir; Pliatsikas, Nikos; Kehagias, Thomas; Dimitrakopulos, George P.; Patsalas, Panos P.; Li, Ruipeng; Anthopoulos, Thomas D.

    2017-01-01

    The growth mechanism of indium oxide (InO) layers processed via spray pyrolysis of an aqueous precursor solution in the temperature range of 100-300 °C and the impact on their electron transporting properties are studied. Analysis of the droplet impingement sites on the substrate's surface as a function of its temperature reveals that Leidenfrost effect dominated boiling plays a crucial role in the growth of smooth, continuous, and highly crystalline InO layers via a vapor phase-like process. By careful optimization of the precursor formulation, deposition conditions, and choice of substrate, this effect is exploited and ultrathin and exceptionally smooth layers of InO are grown over large area substrates at temperatures as low as 252 °C. Thin-film transistors (TFTs) fabricated using these optimized InO layers exhibit superior electron transport characteristics with the electron mobility reaching up to 40 cm V s, a value amongst the highest reported to date for solution-processed InO TFTs. The present work contributes enormously to the basic understanding of spray pyrolysis and highlights its tremendous potential for large-volume manufacturing of high-performance metal oxide thin-film transistor electronics.

  12. High-Performance n-Channel Organic Transistors Using High-Molecular-Weight Electron-Deficient Copolymers and Amine-Tailed Self-Assembled Monolayers.

    Science.gov (United States)

    Wang, Yang; Hasegawa, Tsukasa; Matsumoto, Hidetoshi; Mori, Takehiko; Michinobu, Tsuyoshi

    2018-03-01

    While high-performance p-type semiconducting polymers are widely reported, their n-type counterparts are still rare in terms of quantity and quality. Here, an improved Stille polymerization protocol using chlorobenzene as the solvent and palladium(0)/copper(I) as the catalyst is developed to synthesize high-quality n-type polymers with number-average molecular weight up to 10 5 g mol -1 . Furthermore, by sp 2 -nitrogen atoms (sp 2 -N) substitution, three new n-type polymers, namely, pBTTz, pPPT, and pSNT, are synthesized, and the effect of different sp 2 -N substitution positions on the device performances is studied for the first time. It is found that the incorporation of sp 2 -N into the acceptor units rather than the donor units results in superior crystalline microstructures and higher electron mobilities. Furthermore, an amine-tailed self-assembled monolayer (SAM) is smoothly formed on a Si/SiO 2 substrate by a simple spin-coating technique, which can facilitate the accumulation of electrons and lead to more perfect unipolar n-type transistor performances. Therefore, a remarkably high unipolar electron mobility up to 5.35 cm 2 V -1 s -1 with a low threshold voltage (≈1 V) and high on/off current ratio of ≈10 7 is demonstrated for the pSNT-based devices, which are among the highest values for unipolar n-type semiconducting polymers. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  13. Radiation effects on JFETS, MOSFETS, and bipolar transistors, as related to SSC circuit design

    Energy Technology Data Exchange (ETDEWEB)

    Kennedy, E J; Gray, B; Wu, A [Dept. of Electrical and Computer Engineering, Univ. of Tennessee, Knoxville, TN (United States); Alley, G T; Britton, Jr, C L [Oak Ridge National Lab., TN (United States); Skubic, P L [Univ. of Oklahoma, Dept. of Physics and Astronomy, Norman, OK (United States)

    1991-10-01

    Some results of radiation effects on selected junction field-effect transistors, MOS field-effect transistors, and bipolar junction transistors are presented. The evaluations include dc parameters, as well as capacitive variations and noise evaluations. The tests are made at the low current and voltage levels (in particular at currents {<=} 1 mA) that are essential for the low-power regimes required by SSC circuitry. Detailed noise data are presented both before and after 5-Mrad (gamma) total-dose exposure. SPICE radiation models for three high-frequency bipolar processes are compared for a typical charge-sensitive preamplifier. (orig.).

  14. The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

    Science.gov (United States)

    Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

    2008-11-01

    Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

  15. Flexible polymer transistors with high pressure sensitivity for application in electronic skin and health monitoring.

    Science.gov (United States)

    Schwartz, Gregor; Tee, Benjamin C-K; Mei, Jianguo; Appleton, Anthony L; Kim, Do Hwan; Wang, Huiliang; Bao, Zhenan

    2013-01-01

    Flexible pressure sensors are essential parts of an electronic skin to allow future biomedical prostheses and robots to naturally interact with humans and the environment. Mobile biomonitoring in long-term medical diagnostics is another attractive application for these sensors. Here we report the fabrication of flexible pressure-sensitive organic thin film transistors with a maximum sensitivity of 8.4 kPa(-1), a fast response time of 15,000 cycles and a low power consumption of monitoring, which may lead to the use of flexible pressure sensors in mobile health monitoring and remote diagnostics in cardiovascular medicine.

  16. High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

    2014-05-21

    We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

  17. A new high performance current transducer

    International Nuclear Information System (INIS)

    Tang Lijun; Lu Songlin; Li Deming

    2003-01-01

    A DC-100 kHz current transducer is developed using a new technique on zero-flux detecting principle. It was shown that the new current transducer is of high performance, its magnetic core need not be selected very stringently, and it is easy to manufacture

  18. Metalorganic chemical vapor deposition growth and thermal stability of the AlInN/GaN high electron mobility transistor structure

    International Nuclear Information System (INIS)

    Yu, Hongbo; Ozturk, Mustafa; Demirel, Pakize; Cakmak, Huseyin; Bolukbas, Basar; Caliskan, Deniz; Ozbay, Ekmel

    2011-01-01

    The Al x In 1−x N barrier high electron mobility transistor (HEMT) structure has been optimized with varied barrier composition and thickness grown by metalorganic chemical vapor deposition. After optimization, a transistor structure comprising a 7 nm thick nearly lattice-matched Al 0.83 In 0.17 N barrier exhibits a sheet electron density of 2.0 × 10 13 cm −2 with a high electron mobility of 1540 cm 2 V −1 s −1 . An Al 0.83 In 0.17 N barrier HEMT device with 1 µm gate length provides a current density of 1.0 A mm −1 at V GS = 0 V and an extrinsic transconductance of 242 mS mm −1 , which are remarkably improved compared to that of a conventional Al 0.3 Ga 0.7 N barrier HEMT. To investigate the thermal stability of the HEMT epi-structures, post-growth annealing experiments up to 800 °C have been applied to Al 0.83 In 0.17 N and Al 0.3 Ga 0.7 N barrier heterostructures. As expected, the electrical properties of an Al 0.83 In 0.17 N barrier HEMT structure showed less stability than that of an Al 0.3 Ga 0.7 N barrier HEMT to the thermal annealing. The structural properties of Al 0.83 In 0.17 N/GaN also showed more evidence for decomposition than that of the Al 0.3 Ga 0.7 N/GaN structure after 800 °C post-annealing

  19. High-Precision Displacement Sensing of Monolithic Piezoelectric Disk Resonators Using a Single-Electron Transistor

    Science.gov (United States)

    Li, J.; Santos, J. T.; Sillanpää, M. A.

    2018-02-01

    A single-electron transistor (SET) can be used as an extremely sensitive charge detector. Mechanical displacements can be converted into charge, and hence, SETs can become sensitive detectors of mechanical oscillations. For studying small-energy oscillations, an important approach to realize the mechanical resonators is to use piezoelectric materials. Besides coupling to traditional electric circuitry, the strain-generated piezoelectric charge allows for measuring ultrasmall oscillations via SET detection. Here, we explore the usage of SETs to detect the shear-mode oscillations of a 6-mm-diameter quartz disk resonator with a resonance frequency around 9 MHz. We measure the mechanical oscillations using either a conventional DC SET, or use the SET as a homodyne or heterodyne mixer, or finally, as a radio-frequency single-electron transistor (RF-SET). The RF-SET readout is shown to be the most sensitive method, allowing us to measure mechanical displacement amplitudes below 10^{-13} m. We conclude that a detection based on a SET offers a potential to reach the sensitivity at the quantum limit of the mechanical vibrations.

  20. Poole Frenkel current and Schottky emission in SiN gate dielectric in AlGaN/GaN metal insulator semiconductor heterostructure field effect transistors

    Science.gov (United States)

    Hanna, Mina J.; Zhao, Han; Lee, Jack C.

    2012-10-01

    We analyze the anomalous I-V behavior in SiN prepared by plasma enhanced chemical vapor deposition for use as a gate insulator in AlGaN/GaN metal insulator semiconductor heterostructure filed effect transistors (HFETs). We observe leakage current across the dielectric with opposite polarity with respect to the applied electric field once the voltage sweep reaches a level below a determined threshold. This is observed as the absolute minimum of the leakage current does not occur at minimum voltage level (0 V) but occurs earlier in the sweep interval. Curve-fitting analysis suggests that the charge-transport mechanism in this region is Poole-Frenkel current, followed by Schottky emission due to band bending. Despite the current anomaly, the sample devices have shown a notable reduction of leakage current of over 2 to 6 order of magnitudes compared to the standard Schottky HFET. We show that higher pressures and higher silane concentrations produce better films manifesting less trapping. This conforms to our results that we reported in earlier publications. We found that higher chamber pressure achieves higher sheet carrier concentration that was found to be strongly dependent on the trapped space charge at the SiN/GaN interface. This would suggest that a lower chamber pressure induces more trap states into the SiN/GaN interface.

  1. Performance of organic field effect transistors with high-k gate oxide after application of consecutive bias stress

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Sunwoo; Choi, Changhwan; Lee, Kilbock [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of); Cho, Joong Hwee [Department of Embedded Systems Engineering,University of Incheon, Incheon 406-722 (Korea, Republic of); Ko, Ki-Young [Korea Institute of Patent Information, Seoul, 146-8 (Korea, Republic of); Ahn, Jinho, E-mail: jhahn@hanyang.ac.kr [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of)

    2012-10-30

    We report the effect of consecutive electrical stress on the performance of organic field effect transistors (OFETs). Sputtered aluminum oxide (Al{sub 2}O{sub 3}) and hafnium oxide (HfO{sub 2}) were used as gate oxide layers. After the electrical stress, the threshold voltage, which strongly depends on bulk defects, was remarkably shifted to the negative direction, while the other performance characteristics of OFETs such as on-current, transconductance and mobility, which are sensitive to interface defects, were slightly decreased. This result implies that the defects in the bulk layer are significantly affected compared to the defects in the interface layer. Thus, it is important to control the defects in the pentacene bulk layer in order to maintain the good reliabilities of pentacene devices. Those defects in HfO{sub 2} gate oxide devices were larger compared to those in Al{sub 2}O{sub 3} gate oxide devices.

  2. Modeling of leakage currents in high-k dielectrics

    International Nuclear Information System (INIS)

    Jegert, Gunther Christian

    2012-01-01

    Leakage currents are one of the major bottlenecks impeding the downscaling efforts of the semiconductor industry. Two core devices of integrated circuits, the transistor and, especially, the DRAM storage capacitor, suffer from the increasing loss currents. In this perspective a fundamental understanding of the physical origin of these leakage currents is highly desirable. However, the complexity of the involved transport phenomena so far has prevented the development of microscopic models. Instead, the analysis of transport through the ultra-thin layers of high-permittivity (high-k) dielectrics, which are employed as insulating layers, was carried out at an empirical level using simple compact models. Unfortunately, these offer only limited insight into the physics involved on the microscale. In this context the present work was initialized in order to establish a framework of microscopic physical models that allow a fundamental description of the transport processes relevant in high-k thin films. A simulation tool that makes use of kinetic Monte Carlo techniques was developed for this purpose embedding the above models in an environment that allows qualitative and quantitative analyses of the electronic transport in such films. Existing continuum approaches, which tend to conceal the important physics behind phenomenological fitting parameters, were replaced by three-dimensional transport simulations at the level of single charge carriers. Spatially localized phenomena, such as percolation of charge carriers across pointlike defects, being subject to structural relaxation processes, or electrode roughness effects, could be investigated in this simulation scheme. Stepwise a self-consistent, closed transport model for the TiN/ZrO 2 material system, which is of outmost importance for the semiconductor industry, was developed. Based on this model viable strategies for the optimization of TiN/ZrO 2 /TiN capacitor structures were suggested and problem areas that may

  3. Modeling of leakage currents in high-k dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Jegert, Gunther Christian

    2012-03-15

    Leakage currents are one of the major bottlenecks impeding the downscaling efforts of the semiconductor industry. Two core devices of integrated circuits, the transistor and, especially, the DRAM storage capacitor, suffer from the increasing loss currents. In this perspective a fundamental understanding of the physical origin of these leakage currents is highly desirable. However, the complexity of the involved transport phenomena so far has prevented the development of microscopic models. Instead, the analysis of transport through the ultra-thin layers of high-permittivity (high-k) dielectrics, which are employed as insulating layers, was carried out at an empirical level using simple compact models. Unfortunately, these offer only limited insight into the physics involved on the microscale. In this context the present work was initialized in order to establish a framework of microscopic physical models that allow a fundamental description of the transport processes relevant in high-k thin films. A simulation tool that makes use of kinetic Monte Carlo techniques was developed for this purpose embedding the above models in an environment that allows qualitative and quantitative analyses of the electronic transport in such films. Existing continuum approaches, which tend to conceal the important physics behind phenomenological fitting parameters, were replaced by three-dimensional transport simulations at the level of single charge carriers. Spatially localized phenomena, such as percolation of charge carriers across pointlike defects, being subject to structural relaxation processes, or electrode roughness effects, could be investigated in this simulation scheme. Stepwise a self-consistent, closed transport model for the TiN/ZrO{sub 2} material system, which is of outmost importance for the semiconductor industry, was developed. Based on this model viable strategies for the optimization of TiN/ZrO{sub 2}/TiN capacitor structures were suggested and problem areas

  4. Intermodulation Linearity in High-k/Metal Gate 28 nm RF CMOS Transistors

    Directory of Open Access Journals (Sweden)

    Zhen Li

    2015-09-01

    Full Text Available This paper presents experimental characterization, simulation, and Volterra series based analysis of intermodulation linearity on a high-k/metal gate 28 nm RF CMOS technology. A figure-of-merit is proposed to account for both VGS and VDS nonlinearity, and extracted from frequency dependence of measured IIP3. Implications to biasing current and voltage optimization for linearity are discussed.

  5. Performance improvement and better scalability of wet-recessed and wet-oxidized AlGaN/GaN high electron mobility transistors

    Science.gov (United States)

    Takhar, Kuldeep; Meer, Mudassar; Upadhyay, Bhanu B.; Ganguly, Swaroop; Saha, Dipankar

    2017-05-01

    We have demonstrated that a thin layer of Al2O3 grown by wet-oxidation of wet-recessed AlGaN barrier layer in an AlGaN/GaN heterostructure can significantly improve the performance of GaN based high electron mobility transistors (HEMTs). The wet-etching leads to a damage free recession of the gate region and compensates for the decreased gate capacitance and increased gate leakage. The performance improvement is manifested as an increase in the saturation drain current, transconductance, and unity current gain frequency (fT). This is further augmented with a large decrease in the subthreshold current. The performance improvement is primarily ascribed to an increase in the effective velocity in two-dimensional electron gas without sacrificing gate capacitance, which make the wet-recessed gate oxide-HEMTs much more scalable in comparison to their conventional counterpart. The improved scalability leads to an increase in the product of unity current gain frequency and gate length (fT × Lg).

  6. Transistor design considerations for low-noise preamplifiers

    International Nuclear Information System (INIS)

    Fair, R.B.

    1976-01-01

    A review is presented of design considerations for GaAs Schottky-barrier FETs and other types of transistors in low-noise amplifiers for capacitive sources which are used in nuclear radiation detectors and high speed fiber-optic communication systems. Ultimate limits on performance are evaluated in terms of the g/sub m//C/sub i/ ratio and the gate leakage current to minimize the noise sources. Si bipolar transistors and the future prospects of GaAs, Si and InAs MISFETs are discussed, and performance is compared to FETs currently being used in low-noise preamplifiers

  7. MHz repetition rate solid-state driver for high current induction accelerators

    International Nuclear Information System (INIS)

    Brooksby, C; Caporaso, G; Goerz, D; Hanks, R; Hickman, B; Kirbie, H; Lee, B; Saethre, R.

    1999-01-01

    A research team from the Lawrence Livermore National Laboratory and Bechtel Nevada Corporation is developing an all solid-state power source for high current induction accelerators. The original power system design, developed for heavy-ion fusion accelerators, is based on the simple idea of using an array of field effect transistors to switch energy from a pre-charged capacitor bank to an induction accelerator cell. Recently, that idea has been expanded to accommodate the greater power needs of a new class of high-current electron accelerators for advanced radiography. For this purpose, we developed a 3-stage induction adder that uses over 4,000 field effect transistors to switch peak voltages of 45 kV at currents up to 4.8 kA with pulse repetition rates of up to 2 MHz. This radically advanced power system can generate a burst of five or more pulses that vary from 200 ns to 2 ampersand micro;s at a duty cycle of up to 25%. Our new source is precise, robust, flexible, and exceeds all previous drivers for induction machines by a factor of 400 in repetition rate and a factor of 1000 in duty cycle

  8. Trap Healing for High-Performance Low-Voltage Polymer Transistors and Solution-Based Analog Amplifiers on Foil.

    Science.gov (United States)

    Pecunia, Vincenzo; Nikolka, Mark; Sou, Antony; Nasrallah, Iyad; Amin, Atefeh Y; McCulloch, Iain; Sirringhaus, Henning

    2017-06-01

    Solution-processed semiconductors such as conjugated polymers have great potential in large-area electronics. While extremely appealing due to their low-temperature and high-throughput deposition methods, their integration in high-performance circuits has been difficult. An important remaining challenge is the achievement of low-voltage circuit operation. The present study focuses on state-of-the-art polymer thin-film transistors based on poly(indacenodithiophene-benzothiadiazole) and shows that the general paradigm for low-voltage operation via an enhanced gate-to-channel capacitive coupling is unable to deliver high-performance device behavior. The order-of-magnitude longitudinal-field reduction demanded by low-voltage operation plays a fundamental role, enabling bulk trapping and leading to compromised contact properties. A trap-reduction technique based on small molecule additives, however, is capable of overcoming this effect, allowing low-voltage high-mobility operation. This approach is readily applicable to low-voltage circuit integration, as this work exemplifies by demonstrating high-performance analog differential amplifiers operating at a battery-compatible power supply voltage of 5 V with power dissipation of 11 µW, and attaining a voltage gain above 60 dB at a power supply voltage below 8 V. These findings constitute an important milestone in realizing low-voltage polymer transistors for solution-based analog electronics that meets performance and power-dissipation requirements for a range of battery-powered smart-sensing applications. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  9. High-performance zno transistors processed via an aqueous carbon-free metal oxide precursor route at temperatures between 80-180 °c

    KAUST Repository

    Lin, Yenhung

    2013-06-25

    An aqueous and carbon-free metal-oxide precursor route is used in combination with a UV irradiation-assisted low-temperature conversion method to fabricate low-voltage ZnO transistors with electron mobilities exceeding 10 cm2/Vs at temperatures <180°C. Because of its low temperature requirements the method allows processing of high-performance transistors onto temperature sensitive substrates such as plastic. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Controlling Chain Conformations of High-k Fluoropolymer Dielectrics to Enhance Charge Mobilities in Rubrene Single-Crystal Field-Effect Transistors.

    Science.gov (United States)

    Adhikari, Jwala M; Gadinski, Matthew R; Li, Qi; Sun, Kaige G; Reyes-Martinez, Marcos A; Iagodkine, Elissei; Briseno, Alejandro L; Jackson, Thomas N; Wang, Qing; Gomez, Enrique D

    2016-12-01

    A novel photopatternable high-k fluoropolymer, poly(vinylidene fluoride-bromotrifluoroethylene) P(VDF-BTFE), with a dielectric constant (k) between 8 and 11 is demonstrated in thin-film transistors. Crosslinking P(VDF-BTFE) reduces energetic disorder at the dielectric-semiconductor interface by controlling the chain conformations of P(VDF-BTFE), thereby leading to approximately a threefold enhancement in the charge mobility of rubrene single-crystal field-effect transistors. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Wide-bandgap high-mobility ZnO thin-film transistors produced at room temperature

    International Nuclear Information System (INIS)

    Fortunato, Elvira M.C.; Barquinha, Pedro M.C.; Pimentel, Ana C.M.B.G.; Goncalves, Alexandra M.F.; Marques, Antonio J.S.; Martins, Rodrigo F.P.; Pereira, Luis M.N.

    2004-01-01

    We report high-performance ZnO thin-film transistor (ZnO-TFT) fabricated by rf magnetron sputtering at room temperature with a bottom gate configuration. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 19 V, a saturation mobility of 27 cm 2 /V s, a gate voltage swing of 1.39 V/decade and an on/off ratio of 3x10 5 . The ZnO-TFT presents an average optical transmission (including the glass substrate) of 80% in the visible part of the spectrum. The combination of transparency, high mobility, and room-temperature processing makes the ZnO-TFT a very promising low-cost optoelectronic device for the next generation of invisible and flexible electronics

  12. Alkylated selenophene-based ladder-type monomers via a facile route for high performance thin-film transistor applications

    KAUST Repository

    Fei, Zhuping

    2017-05-26

    We report the synthesis of two new selenophene containing ladder-type monomers, cyclopentadiselenophene (CDS) and indacenodiselenophene (IDSe), via a twofold and fourfold Pd catalyzed coupling with a 1,1-diborylmethane derivative. Co-polymers with benzothiadiazole (BT) were prepared in high yield by Suzuki polymerization to afford co-polymers which exhibited excellent solubility in a range of non-chlorinated solvents. The CDS co-polymer exhibited a band gap of just 1.18 eV, which is amongst the lowest reported for donor-acceptor polymers. Thin-film transistors were fabricated using environmentally benign, non-chlorinated solvents with the CDS and IDSe co-polymers exhibiting hole mobility up to 0.15 and 6.4 cm2 /Vs, respectively. This high performance was achieved without the undesirable peak in mobility often observed at low gate voltages due to parasitic contact resistance.

  13. Alkylated selenophene-based ladder-type monomers via a facile route for high performance thin-film transistor applications

    KAUST Repository

    Fei, Zhuping; Han, Yang; Gann, Eliot; Hodsden, Thomas; Chesman, Anthony; McNeill, Christopher R.; Anthopoulos, Thomas D.; Heeney, Martin

    2017-01-01

    We report the synthesis of two new selenophene containing ladder-type monomers, cyclopentadiselenophene (CDS) and indacenodiselenophene (IDSe), via a twofold and fourfold Pd catalyzed coupling with a 1,1-diborylmethane derivative. Co-polymers with benzothiadiazole (BT) were prepared in high yield by Suzuki polymerization to afford co-polymers which exhibited excellent solubility in a range of non-chlorinated solvents. The CDS co-polymer exhibited a band gap of just 1.18 eV, which is amongst the lowest reported for donor-acceptor polymers. Thin-film transistors were fabricated using environmentally benign, non-chlorinated solvents with the CDS and IDSe co-polymers exhibiting hole mobility up to 0.15 and 6.4 cm2 /Vs, respectively. This high performance was achieved without the undesirable peak in mobility often observed at low gate voltages due to parasitic contact resistance.

  14. All solution-processed high-resolution bottom-contact transparent metal-oxide thin film transistors

    International Nuclear Information System (INIS)

    Park, Sung Kyu; Kim, Yong-Hoon; Han, Jeong-In

    2009-01-01

    We report all solution-processed high-resolution bottom-contact indium-gallium-zinc-oxide (IGZO) thin film transistors (TFTs) using a simple surface patterning and dip-casting process. High-resolution nanoparticulate Ag source/drain electrodes and a sol-gel processed IGZO semiconductor were deposited by a simple dip-casting along with a photoresist-free, non-relief-pattern lithographic process. The deposited Ag and IGZO solution can be steered into the desired hydrophilic areas by a low surface energy self-assembled monolayer, resulting in source/drain electrodes and semiconducting layer, respectively. The all solution-processed bottom-contact IGZO TFTs including a channel length of 10 μm typically showed a mobility range 0.05-0.2 cm 2 V -1 s -1 with an on/off ratio of more than 10 6 .

  15. High performance solution-deposited amorphous indium gallium zinc oxide thin film transistors by oxygen plasma treatment

    KAUST Repository

    Nayak, Pradipta K.

    2012-05-16

    Solution-deposited amorphous indium gallium zinc oxide (a-IGZO) thin film transistors(TFTs) with high performance were fabricated using O2-plasma treatment of the films prior to high temperature annealing. The O2-plasma treatment resulted in a decrease in oxygen vacancy and residual hydrocarbon concentration in the a-IGZO films, as well as an improvement in the dielectric/channel interfacial roughness. As a result, the TFTs with O2-plasma treated a-IGZO channel layers showed three times higher linear field-effect mobility compared to the untreated a-IGZO over a range of processing temperatures. The O2-plasma treatment effectively reduces the required processing temperature of solution-deposited a-IGZO films to achieve the required performance.

  16. High performance unipolar inverters by utilizing organic field-effect transistors with ultraviolet/ozone treated polystyrene dielectric

    International Nuclear Information System (INIS)

    Huang, Wei; Yu, Xinge; Fan, Huidong; Yu, Junsheng

    2014-01-01

    High performance unipolar inverters based on a significant variation of threshold voltage (V th ) of organic field-effect transistors (OFETs), which was realized by introducing UV/ozone (UVO) treatment to polystyrene (PS) dielectric, were fabricated. A controllable V th shift of more than 10 V was obtained in the OFETs by adjusting the UVO treating time, and the unipolar inverters exhibited inverting voltage near 1/2 driving voltage and a noise margin of more than 70% of ideal value. From the analysis of scanning electron microscopy, atom force microscopy, and X-ray photoelectron spectroscopy, the dramatic controllable V th of OFETs, which played a key role in high performance unipolar inverters, was attributed to the newly generated oxygen functional groups in the PS dielectric induced by UVO treatment.

  17. Reduced thermal resistance in AlGaN/GaN multi-mesa-channel high electron mobility transistors

    Energy Technology Data Exchange (ETDEWEB)

    Asubar, Joel T., E-mail: joel@rciqe.hokudai.ac.jp; Yatabe, Zenji; Hashizume, Tamotsu [Research Center for Integrated Quantum Electronics (RCIQE) and Graduate School of Information Science and Technology, Hokkaido University, Sapporo (Japan); Japan Science and Technology Agency (JST), CREST, 102-0075 Tokyo (Japan)

    2014-08-04

    Dramatic reduction of thermal resistance was achieved in AlGaN/GaN Multi-Mesa-Channel (MMC) high electron mobility transistors (HEMTs) on sapphire substrates. Compared with the conventional planar device, the MMC HEMT exhibits much less negative slope of the I{sub D}-V{sub DS} curves at high V{sub DS} regime, indicating less self-heating. Using a method proposed by Menozzi and co-workers, we obtained a thermal resistance of 4.8 K-mm/W at ambient temperature of ∼350 K and power dissipation of ∼9 W/mm. This value compares well to 4.1 K-mm/W, which is the thermal resistance of AlGaN/GaN HEMTs on expensive single crystal diamond substrates and the lowest reported value in literature.

  18. A self-heating study on multi-finger AlGaN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Yang Liyuan; Ai Shan; Chen Yonghe; Cao Mengyi; Zhang Kai; Ma Xiaohua; Hao Yue

    2013-01-01

    Self-heating in multi-finger AlGaN/GaN high-electron-mobility transistors (HEMTs) is investigated by measurements and modeling of device junction temperature under steady-state operation. Measurements are carried out using micro-Raman scattering to obtain the detailed and accurate temperature distribution of the device. The device peak temperature corresponds to the high field region at the drain side of gate edge. The channel temperature of the device is modeled using a combined electro-thermal model considering 2DEG transport characteristics and the Joule heating power distribution. The results reveal excellent correlation to the micro-Raman measurements, validating our model for the design of better cooled structures. Furthermore, the influence of layout design on the channel temperature of multi-finger AlGaN/GaN HEMTs is studied using the proposed electro-thermal model, allowing for device optimization. (semiconductor devices)

  19. Quench properties of high current superconductors

    Energy Technology Data Exchange (ETDEWEB)

    Garber, M; Sampson, W B

    1980-01-01

    A technique has been developed which allows the simultaneous determination of most of the important parameters of a high current superconductor. The critical current, propagation velocity, normal state resistivity, magnetoresistance, and enthalpy are determined as a function of current and applied field. The measurements are made on non-inductive samples which simulate conditions in full scale magnets. For wide, braided conductors the propagation velocity was found to vary approximately quadratically with current in the 2 to 5 kA region. A number of conductors have been tested including some Nb/sub 3/Sn braids which have critical currents in excess of 10 kA at 5 T, 4.2 K.

  20. Photosensitive graphene transistors.

    Science.gov (United States)

    Li, Jinhua; Niu, Liyong; Zheng, Zijian; Yan, Feng

    2014-08-20

    High performance photodetectors play important roles in the development of innovative technologies in many fields, including medicine, display and imaging, military, optical communication, environment monitoring, security check, scientific research and industrial processing control. Graphene, the most fascinating two-dimensional material, has demonstrated promising applications in various types of photodetectors from terahertz to ultraviolet, due to its ultrahigh carrier mobility and light absorption in broad wavelength range. Graphene field effect transistors are recognized as a type of excellent transducers for photodetection thanks to the inherent amplification function of the transistors, the feasibility of miniaturization and the unique properties of graphene. In this review, we will introduce the applications of graphene transistors as photodetectors in different wavelength ranges including terahertz, infrared, visible, and ultraviolet, focusing on the device design, physics and photosensitive performance. Since the device properties are closely related to the quality of graphene, the devices based on graphene prepared with different methods will be addressed separately with a view to demonstrating more clearly their advantages and shortcomings in practical applications. It is expected that highly sensitive photodetectors based on graphene transistors will find important applications in many emerging areas especially flexible, wearable, printable or transparent electronics and high frequency communications. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.