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Sample records for gigabit ethernet ifof

  1. FPGA communications based on Gigabit Ethernet

    International Nuclear Information System (INIS)

    Doolittle, L.R.; Serrano, C.

    2012-01-01

    The use of Field Programmable Gate Arrays (FPGAs) in accelerators is widespread due to their flexibility, performance, and reasonable costs. Whether they are used for fast feedback systems, data acquisition, fast communications using custom protocols, or any other application, there is a need for the end-user and the global control software to access FPGA features using a commodity computer. The choice of communication standards that can be used to interface to a FPGA board is wide, however there is one that stands out for its maturity, basis in standards, performance, and hardware support: Gigabit Ethernet. In the context of accelerators it is desirable to have highly reliable, portable, and flexible solutions. We have therefore developed a chip and board-independent FPGA design which implements the Gigabit Ethernet (GbE) standard. Our design has been configured for use with multiple projects, supports full line-rate traffic, and communicates with any other device implementing the same well-established protocol, easily supported by any modern workstation or controls computer. (authors)

  2. Performance evaluation of 100 Gigabit ethernet switching system

    DEFF Research Database (Denmark)

    Rytlig, Andreas; Ruepp, Sarah Renée; Manolova, Anna Vasileva

    2010-01-01

    100 Gigabit Ethernet is an emerging technology and to support it, existing switch fabrics need to be redesigned. High throughput and QoS are required. A scalable multi-stage fabric based on a Clos architecture is envisaged to meet these demands. Using OPNET modeler, a design based on a variation...

  3. Integrating Gigabit ethernet cameras into EPICS at Diamond light source

    International Nuclear Information System (INIS)

    Cobb, T.

    2012-01-01

    At Diamond Light Source a range of cameras are used to provide images for diagnostic purposes in both the accelerator and photo beamlines. The accelerator and existing beamlines use Point Grey Flea and Flea2 Firewire cameras. We have selected Gigabit Ethernet cameras supporting GigE Vision for our new photon beamlines. GigE Vision is an interface standard for high speed Ethernet cameras which encourages inter-operability between manufacturers. This paper describes the challenges encountered while integrating GigE Vision cameras from a range of vendors into EPICS. GigE Vision cameras appear to be more reliable than the Firewire cameras, and the simple cabling makes much easier to move the cameras to different positions. Upcoming power over Ethernet versions of the cameras will reduce the number of cables still further

  4. Fast BPM data distribution for global orbit feedback using commercial gigabit ethernet technology

    International Nuclear Information System (INIS)

    Hulsart, R.; Cerniglia, P.; Michnoff, R.; Minty, M.

    2011-01-01

    In order to correct beam perturbations in RHIC around 10Hz, a new fast data distribution network was required to deliver BPM position data at rates several orders of magnitude above the capability of the existing system. The urgency of the project limited the amount of custom hardware that could be developed, which dictated the use of as much commercially available equipment as possible. The selected architecture uses a custom hardware interface to the existing RHIC BPM electronics together with commercially available Gigabit Ethernet switches to distribute position data to devices located around the collider ring. Using the minimum Ethernet packet size and a field programmable gate array (FPGA) based state machine logic instead of a software based driver, real-time and deterministic data delivery is possible using Ethernet. The method of adapting this protocol for low latency data delivery, bench testing of Ethernet hardware, and the logic to construct Ethernet packets using FPGA hardware will be discussed. A robust communications system using almost all commercial off-the-shelf equipment was developed in under a year which enabled retrofitting of the existing RHIC BPM system to provide 10 KHz data delivery for a global orbit feedback scheme using 72 BPMs. Total latencies from data acquisition at the BPMs to delivery at the controller modules, including very long transmission distances, were kept under 100 (micro)s, which provide very little phase error in correcting the 10 Hz oscillations. Leveraging off of the speed of Gigabit Ethernet and wide availability of Ethernet products enabled this solution to be fully implemented in a much shorter time and at lower cost than if a similar network was developed using a proprietary method.

  5. Enterasys Networks delivers 10-Gigabit ethernet for the enterprise with new matrix E1 switching family

    CERN Multimedia

    2001-01-01

    Enterasys Networks Inc., today announced its new Matrix E1 family of 10-Gigabit and Gigabit Ethernet switches. The Matrix E1 Optical Access Switch (OAS) enables organizations to deliver applications at 10-Gb speeds across a single fibre optic pair. Jacques Altaber, deputy leader of IT at CERN said "High-bandwith solutions are essential to leveraging more computing power, so 10-Gb Ethernet is the next logical step for us...The Matrix E1 allows us to provide the networking support that our scientists need and gives us a certain future for bandwidth and computing expansion".

  6. Enterasys Networks delivers standards-based 10-Gigabit ethernet modules for its Enterasys X-Pedition Routers and Enterasys Matrix Switches

    CERN Multimedia

    2002-01-01

    Enterasys Networks Inc. has announced new 10-Gigabit Ethernet modules for the Enterasys X-Pedition ER16 routers and Enterasys Matrix E1 OAS (Optical Access Switch). The addition of 10-Gigabit Ethernet technology enables the Enterasys X-Pedition ER16 enables real-time delivery of high-bandwidth, advanced applications across local area network (LAN), wide area network (WAN) and metropolitan area network (MAN) environments (1/2 page).

  7. Upgrade of Spring-8 Beamline Network with Vlan Technology Over Gigabit Ethernet

    OpenAIRE

    Ishii, M.; Fukui, T.; Furukawa, Y.; Nakatani, T.; Ohata, T.; Tanaka, R.

    2001-01-01

    The beamline network system at SPring-8 consists of three LANs; a BL-LAN for beamline component control, a BL-USER-LAN for beamline experimental users and an OA-LAN for the information services. These LANs are interconnected by a firewall system. Since the network traffic and the number of beamlines have increased, we upgraded the backbone of BL-USER-LAN from Fast Ethernet to Gigabit Ethernet. And then, to establish the independency of a beamline and to raise flexibility of every beamline, we...

  8. High Performance Gigabit Ethernet Switches for DAQ Systems

    CERN Document Server

    Barczyk, Artur

    2005-01-01

    Commercially available high performance Gigabit Ethernet (GbE) switches are optimized mostly for Internet and standard LAN application traffic. DAQ systems on the other hand usually make use of very specific traffic patterns, with e.g. deterministic arrival times. Industry's accepted loss-less limit of 99.999% may be still unacceptably high for DAQ purposes, as e.g. in the case of the LHCb readout system. In addition, even switches passing this criteria under random traffic can show significantly higher loss rates if subject to our traffic pattern, mainly due to buffer memory limitations. We have evaluated the performance of several switches, ranging from "pizza-box" devices with 24 or 48 ports up to chassis based core switches in a test-bed capable to emulate realistic traffic patterns as expected in the readout system of our experiment. The results obtained in our tests have been used to refine and parametrize our packet level simulation of the complete LHCb readout network. In this paper we report on the...

  9. CMS DAQ Event Builder Based on Gigabit Ethernet

    CERN Document Server

    Bauer, G; Branson, J; Brett, A; Cano, E; Carboni, A; Ciganek, M; Cittolin, S; Erhan, S; Gigi, D; Glege, F; Gómez-Reino, Robert; Gulmini, M; Gutiérrez-Mlot, E; Gutleber, J; Jacobs, C; Kim, J C; Klute, M; Lipeles, E; Lopez-Perez, Juan Antonio; Maron, G; Meijers, F; Meschi, E; Moser, R; Murray, S; Oh, A; Orsini, L; Paus, C; Petrucci, A; Pieri, M; Pollet, L; Rácz, A; Sakulin, H; Sani, M; Schieferdecker, P; Schwick, C; Sumorok, K; Suzuki, I; Tsirigkas, D; Varela, J

    2007-01-01

    The CMS Data Acquisition System is designed to build and filter events originating from 476 detector data sources at a maximum trigger rate of 100 KHz. Different architectures and switch technologies have been evaluated to accomplish this purpose. Events will be built in two stages: the first stage will be a set of event builders called FED Builders. These will be based on Myrinet technology and will pre-assemble groups of about 8 data sources. The second stage will be a set of event builders called Readout Builders. These will perform the building of full events. A single Readout Builder will build events from 72 sources of 16 KB fragments at a rate of 12.5 KHz. In this paper we present the design of a Readout Builder based on TCP/IP over Gigabit Ethernet and the optimization that was required to achieve the design throughput. This optimization includes architecture of the Readout Builder, the setup of TCP/IP, and hardware selection.

  10. Performance Evaluation of 100 Gigabit Ethernet Switches under Bursty Traffic

    DEFF Research Database (Denmark)

    Ruepp, Sarah Renée; Rytlig, A.; Manolova, Anna Vasileva

    2011-01-01

    Switch fabrics for 100 Gigabit Ethernet systems pose high demands in terms of delay and scalability. In this paper we analyze the performance of a Clos-based switch fabric under uniform and bursty traffic, and compare its performance to a crossbar-based switch design for benchmarking. In particular......, we focus on a Clos-design using a Space-Memory-Memory (SMM) configuration, which has recently gained increased interest due to its reduced hardware complexity. The traffic between the input and the central modules is distributed in either a static, random or Desynchronized Static Round Robin (DSRR...... switch only reveals a minor performance penalty, which can be compensated by the high scalability, robustness and low complexity of the Clos-based design for high speed switching systems....

  11. Gigabit Ethernet signal transmission using asynchronous optical code division multiple access.

    Science.gov (United States)

    Ma, Philip Y; Fok, Mable P; Shastri, Bhavin J; Wu, Ben; Prucnal, Paul R

    2015-12-15

    We propose and experimentally demonstrate a novel architecture for interfacing and transmitting a Gigabit Ethernet (GbE) signal using asynchronous incoherent optical code division multiple access (OCDMA). This is the first such asynchronous incoherent OCDMA system carrying GbE data being demonstrated to be working among multi-users where each user is operating with an independent clock/data rate and is granted random access to the network. Three major components, the GbE interface, the OCDMA transmitter, and the OCDMA receiver are discussed in detail. The performance of the system is studied and characterized through measuring eye diagrams, bit-error rate and packet loss rate in real-time file transfer. Our Letter also addresses the near-far problem and realizes asynchronous transmission and detection of signal.

  12. Evaluation of Giga-bit Ethernet instrumentation for SalSA electronics readout

    International Nuclear Information System (INIS)

    Varner, Gary S.; Murakami, Laine; Ridley, David; Zhu Chaopin; Gorham, Peter

    2005-01-01

    An instrumentation prototype for acquiring high-speed transient data from an array of high bandwidth antennas is presented. Multi-kilometer cable runs complicate acquisition of such large bandwidth radio signals from an extensive antenna array. Solutions using analog fiber optic links are being explored though are very expensive. We propose an inexpensive solution that allows for individual operation of each antenna element, operating at potentially high local self-trigger rates. Digitized data packets are transmitted to the surface via commercially available Giga-bit Ethernet hardware. Events are then reconstructed on a computer farm by sorting the received packets using standard networking gear, eliminating the need for custom, very high speed trigger hardware. Such a system is completely scalable and leverages the enormous capital investment made by the telecommunications industry. Test results from a demonstration prototype are presented

  13. Towards 100 gigabit carrier ethernet transport networks

    DEFF Research Database (Denmark)

    Rasmussen, Anders; Zhang, Jiang; Yu, Hao

    2010-01-01

    technology, making the use of Ethernet as a convergence layer for Next Generation Networks a distinct possibility. Triple Play services, in particular IPTV, are expected to be a main drivers for carrier Ethernet, however, a number of challenges must be addressed including QoS enabled control plane, enhanced......Ethernet as a transport technology has, up to now, lacked the features such as network layer architecture, customer separation and manageability that carriers require for wide-scale deployment. However, with the advent of PBB-TE and TMPLS, it is now possible to use Ethernet as a transport...

  14. Evaluation of the Delivery QoS Characteristics of Gigabit Ethernet Switches

    CERN Document Server

    Beuran, Razvan; Davies, Neil; Dobinson, Robert W

    2004-01-01

    The event selection system for ATLAS is designed to perform real-time image processing on particle collision data equivalent to 2 TB/s. This data is filtered by a multi-level architecture, resulting in 200 GB/s of data analysed by a distributed system consisting of several thousand PCs and switches. As part of our ongoing work on this system, we performed tests on several Gigabit Ethernet switches manufactured by market leaders, using our custom-built test equipment. We analysed the implications of running network devices at, and just beyond, saturation while deploying service differentiation mechanisms. We quantified the quality degradation that traffic flows experienced when passing through switches. We focused on emergent properties in saturation, including fairness and fidelity to expectations. We discuss the ideals for switch behaviour and compare them against the observed behaviour of real implementations of differentiation mechanisms in switches. This creates a generic benchmark, which is independent o...

  15. Extreme Networks' 10-Gigabit Ethernet enables

    CERN Multimedia

    2002-01-01

    " Extreme Networks, Inc.'s 10-Gigabit switching platform enabled researchers to transfer one Terabyte of information from Vancouver to Geneva across a single network hop, the world's first large-scale, end-to-end transfer of its kind" (1/2 page).

  16. 1-Gb/s zero-pole cancellation CMOS transimpedance amplifier for Gigabit Ethernet applications

    International Nuclear Information System (INIS)

    Huang Beiju; Zhang Xu; Chen Hongda

    2009-01-01

    A zero-pole cancellation transimpedance amplifier (TIA) has been realized in 0.35 μm RF CMOS technology for Gigabit Ethernet applications. The TIA exploits a zero-pole cancellation configuration to isolate the input parasitic capacitance including photodiode capacitance from bandwidth deterioration. Simulation results show that the proposed TIA has a bandwidth of 1.9 GHz and a transimpedance gain of 65 dB·Ω for 1.5 pF photodiode capacitance, with a gain-bandwidth product of 3.4 THz·Ω. Even with 2 pF photodiode capacitance, the bandwidth exhibits a decline of only 300 MHz, confirming the mechanism of the zero-pole cancellation configuration. The input resistance is 50 Ω, and the average input noise current spectral density is 9.7 pA/√Hz. Testing results shows that the eye diagram at 1 Gb/s is wide open. The chip dissipates 17 mW under a single 3.3 V supply.

  17. 1-Gb/s zero-pole cancellation CMOS transimpedance amplifier for Gigabit Ethernet applications

    Energy Technology Data Exchange (ETDEWEB)

    Huang Beiju; Zhang Xu; Chen Hongda, E-mail: bjhuang@semi.ac.c [State Key Laboratory of Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China)

    2009-10-15

    A zero-pole cancellation transimpedance amplifier (TIA) has been realized in 0.35 {mu}m RF CMOS technology for Gigabit Ethernet applications. The TIA exploits a zero-pole cancellation configuration to isolate the input parasitic capacitance including photodiode capacitance from bandwidth deterioration. Simulation results show that the proposed TIA has a bandwidth of 1.9 GHz and a transimpedance gain of 65 dB{center_dot}{Omega} for 1.5 pF photodiode capacitance, with a gain-bandwidth product of 3.4 THz{center_dot}{Omega}. Even with 2 pF photodiode capacitance, the bandwidth exhibits a decline of only 300 MHz, confirming the mechanism of the zero-pole cancellation configuration. The input resistance is 50 {Omega}, and the average input noise current spectral density is 9.7 pA/{radical}Hz. Testing results shows that the eye diagram at 1 Gb/s is wide open. The chip dissipates 17 mW under a single 3.3 V supply.

  18. Prototyping a 10Gigabit-Ethernet Event-Builder for a Cherenkov Telescope Array

    CERN Multimedia

    CERN. Geneva

    2012-01-01

    We present the prototyping of a 10Gigabit-Ethernet based UDP data acquisition (DAQ) system that has been conceived in the context of the Array and Control group of CTA (Cherenkov Telescope Array). The CTA consortium plans to build the next generation ground-based gamma-ray instrument, with approximately 100 telescopes of at least three different sizes installed on two sites. The genuine camera dataflow amounts to 1.2 GByte/s per camera. We have conceived and built a prototype of a front-end event builder DAQ able to receive and compute such a data rate, allowing a more sustainable level for the central data logging of the site by data reduction. We took into account characteristics and constraints of several camera electronics projects in CTA, thus keeping a generic approach to all front-end types. The big number of telescopes and the remoteness of the array sites imply that any front-end element must be robust and self-healing to a large extent. The main difficulty is to combine very high performances with a...

  19. Gigabit ATM: another technical mistake?

    Science.gov (United States)

    Christ, Paul

    1998-09-01

    Once upon a time, or more precisely during February 1988 at the CCITT Seoul plenary, and definitely arriving as a revolution, ATM hit the hard-core B-ISDN circuit-switching gang. Initiated by the Telecoms' camp, but, surprisingly, soon to be pushed by computer minded people, ATM's generic technological history is somewhat richer than single-sided stories. Here are two classical elements of that history: Firstly, together with X.25, ATM suffers from the connection versus datagram dichotomy, well known for more than twenty years. Secondly, and lesser known, ATM's use of cells in support of the 'I' of B-ISDN was questioned from the very beginning by the packet switching camp. Furthermore, in this context, there are two other essential elements to be considered: Firstly, the exponential growth of the Internet and later intranets, using Internet technology, sparked by the success of the Web and the WINTEL alliance, resulted in a corresponding demand for both aggregate and end-system network bandwidth. Secondly, servers, historically restricted to the exclusive club of HIPPI-equipped supercomputers, suddenly become ordinary high-end PCs with 64-bit wide PCI busses -- definitely aiming at the Gigabit. Here, if your aim is for Gigabit ATM with 5000-transactions per second classical supercomputers, a 65K ATM MTU -- as implemented by Cray -- might be okay. Following Clark and others, another part of the story is the adoption and redefinition, by the IETF, of the Telecoms' notion of 'Integrated Services' and QoS mechanisms. The quest for low-delay IP packet forwarding, perhaps possible over ATM cut-throughs, has resulted in the switching versus/or integrated-with-routing movement. However, a blow for ATM may be the recent results concerning fast routing table lookup algorithms. This, by making Gigabit routing possible using ordinary Pentium processors may eventually render the much prophesized ATM switching performance unnecessary. Recently, with the rise of Gigabit Ethernet

  20. IEEE 8023 ethernet, current status and future prospects at the LHC

    CERN Document Server

    Dobinson, Robert W; Haas, S; Martin, B; Le Vine, M J; Saka, F

    2000-01-01

    The status of the IEEE 802.3 standard is reviewed and prospects for the future, including the new 10 Gigabit version of Ethernet, are discussed. The relevance of Ethernet for experiments at the CERN Large Hadron Collider is considered, with emphasis on on-line applications and areas which are technically challenging. 8 Refs.

  1. Optimizing 10-Gigabit Ethernet for Networks of Workstations, Clusters, and Grids: A Case Study

    Energy Technology Data Exchange (ETDEWEB)

    Feng, Wu-chun

    2003-10-13

    This paper presents a case study of the 10-Gigabit Ethernet (10GbE) adapter from Intel(reg sign). Specifically, with appropriate optimizations to the configurations of the 10GbE adapter and TCP, we demonstrate that the 10GbE adapter can perform well in local-area, storage-area, system-area, and wide-area networks. For local-area, storage-area, and system-area networks in support of networks of workstations, network-attached storage, and clusters, respectively, we can achieve over 7-Gb/s end-to-end throughput and 12-{micro}s end-to-end latency between applications running on Linux-based PCs. For the wide-area network in support of grids, we broke the recently-set Internet2 Land Speed Record by 2.5 times by sustaining an end-to-end TCP/IP throughput of 2.38 Gb/s between Sunnyvale, California and Geneva, Switzerland (i.e., 10,037 kilometers) to move over a terabyte of data in less than an hour. Thus, the above results indicate that 10GbE may be a cost-effective solution across a multitude of computing environments.

  2. IEEE 802.3 Ethernet, Current Status and Future Prospects at the LHC

    CERN Document Server

    Dobinson, Robert W; Haas, S W; Martin, B; Le Vine, M J; Saka, F

    2000-01-01

    The status of the IEEE 802.3 standard is reviewed and prospects for the future, including the new 10 Gigabit version of Ethernet, are discussed. The relevance of Ethernet for experiments at the CERN Large Hadron Collider is considered, with emphasis on on-line applications and areas which are technically challenging.

  3. Radiation Hardened Ethernet PHY and Switch Fabric, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Innoflight will develop a new family of radiation hardened (up to 3 Mrad(Si)), fault-tolerant, high data-rate (up to 8 Gbps), low power Gigabit Ethernet PHY and...

  4. Framed bit error rate testing for 100G ethernet equipment

    DEFF Research Database (Denmark)

    Rasmussen, Anders; Ruepp, Sarah Renée; Berger, Michael Stübert

    2010-01-01

    rate. As the need for 100 Gigabit Ethernet equipment rises, so does the need for equipment, which can properly test these systems during development, deployment and use. This paper presents early results from a work-in-progress academia-industry collaboration project and elaborates on the challenges...

  5. Ethernet Networks for Real-Time Use in the ATLAS Experiment

    CERN Document Server

    Meirosu, C; Martin, B

    2005-01-01

    Ethernet became today's de-facto standard technology for local area networks. Defined by the IEEE 802.3 and 802.1 working groups, the Ethernet standards cover technologies deployed at the first two layers of the OSI protocol stack. The architecture of modern Ethernet networks is based on switches. The switches are devices usually built using a store-and-forward concept. At the highest level, they can be seen as a collection of queues and mathematically modelled by means of queuing theory. However, the traffic profiles on modern Ethernet networks are rather different from those assumed in classical queuing theory. The standard recommendations for evaluating the performance of network devices define the values that should be measured but do not specify a way of reconciling these values with the internal architecture of the switches. The introduction of the 10 Gigabit Ethernet standard provided a direct gateway from the LAN to the WAN by the means of the WAN PHY. Certain aspects related to the actual use of WAN ...

  6. Test of Gb Ethernet with FPGA for HADES upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Gilardi, C. [II. Physikalisches Inst., Giessen Univ. (Germany)

    2007-07-01

    Within the HADES experiment, we are investigating a trigger upgrade in order to run heavier systems (Au + Au). We investigate Gigabit Ethernet transfers with Xilinx Virtex II FPGA on the commercial board Celoxica RC300E. We implement the transfer protocols (UDP, ICMP, ARP) with Handel-C. First results of bandwidth and latency will be presented. (orig.)

  7. Synchronization, retiming and OTDM of an asynchronous 10 Gigabit Ethernet NRZ packet using a time lens for Terabit Ethernet

    DEFF Research Database (Denmark)

    Hu, Hao; Laguardia Areal, Janaina; Mulvad, Hans Christian Hansen

    2011-01-01

    An asynchronous 10G Ethernet packet is synchronized and retimed to a master clock using a time lens. The NRZ packet is converted into an RZ packet and multiplexed with a serial 1.28 Tb/s signal.......An asynchronous 10G Ethernet packet is synchronized and retimed to a master clock using a time lens. The NRZ packet is converted into an RZ packet and multiplexed with a serial 1.28 Tb/s signal....

  8. Reliance communications' flag telecom to provide ethernet link between CERN and TIFR

    CERN Multimedia

    2007-01-01

    "Flag Telecom Group Limited (Flag), the undersea cable network arm of Anil Ambani-le Reliance Communications, has announced a landmark deal with CERn (Conseil Européen pour la Recheche Nucléaire), the European organisation for nuclear research based in Geneva, Switzerland and the Tata institute of Fundamental Research (TIFR) in Mumbai to provide gigabit Ethernet connectivity between the two." (1 page)

  9. Use of modeling to assess the scalability of Ethernet networks for the ATLAS second level trigger

    CERN Document Server

    Korcyl, K; Dobinson, Robert W; Saka, F

    1999-01-01

    The second level trigger of LHC's ATLAS experiment has to perform real-time analyses on detector data at 10 GBytes/s. A switching network is required to connect more than thousand read-out buffers to about thousand processors that execute the trigger algorithm. We are investigating the use of Ethernet technology to build this large switching network. Ethernet is attractive because of the huge installed base, competitive prices, and recent introduction of the high-performance Gigabit version. Due to the network's size it has to be constructed as a layered structure of smaller units. To assess the scalability of such a structure we evaluated a single switch unit. (0 refs).

  10. Synchronization, retiming and time-division multiplexing of an asynchronous 10 gigabit NRZ Ethernet packet to Terabit Ethernet

    DEFF Research Database (Denmark)

    Hu, Hao; Laguardia Areal, Janaina; Mulvad, Hans Christian Hansen

    2011-01-01

    An asynchronous 10 Gb/s Ethernet packet with maximum packet size of 1518 bytes is synchronized and retimed to a master clock with 200 kHz frequency offset using a time lens. The NRZ packet is simultaneously converted into an RZ packet, then further pulse compressed to a FWHM of 400 fs and finally...... time-division multiplexed with a serial 1.28 Tb/s signal including a vacant time slot, thus forming a 1.29 Tb/s time-division multiplexed serial signal. Error-free performance of synchronizing, retiming, time-division multiplexing to a Terabit data stream and finally demultiplexing back to 10 Gb...

  11. Near Theoretical Gigabit Link Efficiency for Distributed Data Acquisition Systems.

    Science.gov (United States)

    Abu-Nimeh, Faisal T; Choong, Woon-Seng

    2017-03-01

    Link efficiency, data integrity, and continuity for high-throughput and real-time systems is crucial. Most of these applications require specialized hardware and operating systems as well as extensive tuning in order to achieve high efficiency. Here, we present an implementation of gigabit Ethernet data streaming which can achieve 99.26% link efficiency while maintaining no packet losses. The design and implementation are built on OpenPET, an opensource data acquisition platform for nuclear medical imaging, where (a) a crate hosting multiple OpenPET detector boards uses a User Datagram Protocol over Internet Protocol (UDP/IP) Ethernet soft-core, that is capable of understanding PAUSE frames, to stream data out to a computer workstation; (b) the receiving computer uses Netmap to allow the processing software (i.e., user space), which is written in Python, to directly receive and manage the network card's ring buffers, bypassing the operating system kernel's networking stack; and (c) a multi-threaded application using synchronized queues is implemented in the processing software (Python) to free up the ring buffers as quickly as possible while preserving data integrity and flow continuity.

  12. Optical Ethernet

    Science.gov (United States)

    Chan, Calvin C. K.; Lam, Cedric F.; Tsang, Danny H. K.

    2005-09-01

    Call for Papers: Optical Ethernet The Journal of Optical Networking (JON) is soliciting papers for a second feature issue on Optical Ethernet. Ethernet has evolved from a LAN technology connecting desktop computers to a universal broadband network interface. It is not only the vehicle for local data connectivity but also the standard interface for next-generation network equipment such as video servers and IP telephony. High-speed Ethernet has been increasingly assuming the volume of backbone network traffic from SONET/SDH-based circuit applications. It is clear that IP has become the universal network protocol for future converged networks, and Ethernet is becoming the ubiquitous link layer for connectivity. Network operators have been offering Ethernet services for several years. Problems and new requirements in Ethernet service offerings have been captured through previous experience. New study groups and standards bodies have been formed to address these problems. This feature issue aims at reviewing and updating the new developments and R&D efforts of high-speed Ethernet in recent years, especially those related to the field of optical networking. Scope of Submission The scope of the papers includes, but is not limited to, the following: Ethernet PHY development 10-Gbit Ethernet on multimode fiber Native Ethernet transport and Ethernet on legacy networks EPON Ethernet OAM Resilient packet ring (RPR) and Ethernet QoS definition and management on Ethernet Ethernet protection switching Circuit emulation services on Ethernet Transparent LAN service development Carrier VLAN and Ethernet Ethernet MAC frame expansion Ethernet switching High-speed Ethernet applications Economic models of high-speed Ethernet services Ethernet field deployment and standard activities To submit to this special issue, follow the normal procedure for submission to JON, indicating "Optical Ethernet feature" in the "Comments" field of the online submission form. For all other questions

  13. Two analytical models for evaluating performance of Gigabit Ethernet Hosts

    International Nuclear Information System (INIS)

    Salah, K.

    2006-01-01

    Two analytical models are developed to study the impact of interrupt overhead on operating system performance of network hosts when subjected to Gigabit network traffic. Under heavy network traffic, the system performance will be negatively affected due to interrupt overhead caused by incoming traffic. In particular, excessive latency and significant degradation in system throughput can be experienced. Also user application may livelock as the CPU power is mostly consumed by interrupt handling and protocol processing. In this paper we present and compare two analytical models that capture host behavior and evaluate its performance. The first model is based Markov processes and queuing theory, while the second, which is more accurate but more complex is a pure Markov process. For the most part both models give mathematically-equivalent closed-form solutions for a number of important system performance metrics. These metrics include throughput, latency and stability condition, CPU utilization of interrupt handling and protocol processing and CPU availability for user applications. The analysis yields insight into understanding and predicting the impact of system and network choices on the performance of interrupt-driven systems when subjected to light and heavy network loads. More, importantly, our analytical work can also be valuable in improving host performance. The paper gives guidelines and recommendations to address design and implementation issues. Simulation and reported experimental results show that our analytical models are valid and give a good approximation. (author)

  14. NM-Net Gigabit-based Implementation on Core Network Facilities and Network Design Hierarchy

    International Nuclear Information System (INIS)

    Raja Murzaferi Raja Moktar; Mohd Fauzi Haris; Siti Nurbahyah Hamdan

    2011-01-01

    Nuclear Malaysia computing network or NM the main backbone of internet working on operational staffs. Main network operating center or NOC is situated in Block 15 and linkup via fiber cabling to adjacent main network blocks (18, 29, 11 connections. Pre 2009 infrastructure; together to form the core networking switch. of the core network infrastructure were limited by the up link between core switches that is the Pair (UTP) Category 6 Cable. Furthermore, majority of the networking infrastructure throughout the agency were mainly built with Fast Ethernet Based specifications to date. With current research and operational tasks highly dependent on IT infrastructure that is being enabled through NM-Net, the performance NM-Net implementing gigabit-based networking system achieve optimal performance of internet networking services in the agency thus catalyze initiative. (author)

  15. Ethernet redundancy

    Energy Technology Data Exchange (ETDEWEB)

    Burak, K. [Invensys Process Systems, M/S C42-2B, 33 Commercial Street, Foxboro, MA 02035 (United States)

    2006-07-01

    We describe the Ethernet systems and their evolution: LAN Segmentation, DUAL networks, network loops, network redundancy and redundant network access. Ethernet (IEEE 802.3) is an open standard with no licensing fees and its specifications are freely available. As a result, it is the most popular data link protocol in use. It is important that the network be redundant and standard Ethernet protocols like RSTP (IEEE 802.1w) provide the fast network fault detection and recovery times that is required today. As Ethernet does continue to evolve, network redundancy is and will be a mixture of technology standards. So it is very important that both end-stations and networking devices be Ethernet (IEEE 802.3) compliant. Then when new technologies, such as the IEEE 802.1aq Shortest Path Bridging protocol, come to market they can be easily deployed in the network without worry.

  16. Ethernet redundancy

    International Nuclear Information System (INIS)

    Burak, K.

    2006-01-01

    We describe the Ethernet systems and their evolution: LAN Segmentation, DUAL networks, network loops, network redundancy and redundant network access. Ethernet (IEEE 802.3) is an open standard with no licensing fees and its specifications are freely available. As a result, it is the most popular data link protocol in use. It is important that the network be redundant and standard Ethernet protocols like RSTP (IEEE 802.1w) provide the fast network fault detection and recovery times that is required today. As Ethernet does continue to evolve, network redundancy is and will be a mixture of technology standards. So it is very important that both end-stations and networking devices be Ethernet (IEEE 802.3) compliant. Then when new technologies, such as the IEEE 802.1aq Shortest Path Bridging protocol, come to market they can be easily deployed in the network without worry

  17. Communication Software Performance for Linux Clusters with Mesh Connections

    Energy Technology Data Exchange (ETDEWEB)

    Jie Chen; William Watson

    2003-09-01

    Recent progress in copper based commodity Gigabit Ethernet interconnects enables constructing clusters to achieve extremely high I/O bandwidth at low cost with mesh connections. However, the TCP/IP protocol stack cannot match the improved performance of Gigabit Ethernet networks especially in the case of multiple interconnects on a single host. In this paper, we evaluate and compare the performance characteristics of TCP/IP and M-VIA software that is an implementation of VIA.In particular, we focus on the performance of the software systems for a mesh communication architecture and demonstrate the feasibility of using multiple Gigabit Ethernet cards on one host to achieve aggregated bandwidth and latency that are not only better than what TCP provides but also compare favorably to some of the special purpose high-speed networks. In addition, implementation of a new M-VIA driver for one type of Gigabit Ethernet card will be discussed.

  18. A scalable gigabit data acquisition system for calorimeters for linear collider

    CERN Document Server

    Gastaldi, F; Magniette, F; Boudry, V

    2015-01-01

    prototypes of ultra-granular calorimeters for the International Linear Collider (ILC). Our design is generic enough to cope with other applications with some minor adaptations. The DAQ is made up of four different modules, including an optional concentrator. A Detector InterFace (DIF) is placed at one end of the detector elements (SLAB) holding up to 160 ASICs. It is connected by a single HDMI cable which is used to transmit both slow-control and readout data over a serial link 8b/10b encoded characters at 50 Mb/s to the Gigabit Concentrator Card (GDCC). One GDCC controls up to 7 DIFs, distributes the system clock and ASICs configuration, and collects data from them. Each DIFs data packet is encapsulated in Ethernet format and sent out via an optical or copper link. The Data Concentrator Card (DCC) is a multiplexer (1 to 8) that can be optionally inserted between the GDCC and the DIFs, increasing the number of managed ...

  19. Katherine: Ethernet Embedded Readout Interface for Timepix3

    Science.gov (United States)

    Burian, P.; Broulím, P.; Jára, M.; Georgiev, V.; Bergmann, B.

    2017-11-01

    The Timepix3—the latest generation of hybrid particle pixel detectors of Medipix family—yields a lot of new possibilities, i.e. a high hit-rate, a time resolution of 1.56 ns, event data-driven readout mode, and the capability of measuring the Time-over-Threshold (ToT - energy) and the Time-of-Arrival (ToA) simultaneously. This paper introduces a newly developed readout device for the Timepix3, called "Katherine", featuring a Gigabit Ethernet interface. The primary benefit of the Katherine is the operation of Timepix3 at long distance (up to 100 m) from computer or server, which is advantageous for the installation at beam lines, where the access is difficult or where radiation levels are too high for human interventions. The maximal hit-rate is limited by the bandwidth of the Ethernet connection (peer-to-peer connection; up to 16 Mhit/s). Since the Katherine interface is equipped with a processor of high computational power (ARM Cortex-A9 dual-core processor), it permits the use as a stand-alone (autonomous) radiation detector. The key features of the device are described in detail. These are the implemented high voltage power supply offering both polarities of bias voltage (up to ± 300 V), the automatic data sending to a sever via SSH, the automatic compensation of ToA values from columns with shifted matrix clock, etc. A dedicated control software was developed, which can be used for the detector preparation (sensor equalization, the DACs dependency scan, and the THL scan) and measurement control. Measured energy spectra from photon fields are shown.

  20. IPbus A flexible Ethernet-based control system for xTCA hardware

    CERN Document Server

    Williams, Thomas Stephen

    2014-01-01

    The ATCA and uTCA standards include industry-standard data pathway technologies such as Gigabit Ethernet which can be used for control communication, but no specific hardware control protocol is defined. The IPbus suite of software and firmware implements a reliable high-performance control link for particle physics electronics, and has successfully replaced VME control in several large projects. In this paper, we outline the IPbus system architecture, and describe recent developments in the reliability, scalability and performance of IPbus systems, carried out in preparation for deployment of uTCA-based CMS upgrades before the LHC 2015 run. We also discuss plans for future development of the IPbus suite.SUMMARY IPbus will be used for controlling the uTCA electronics in the CMS HCAL, TCDS, Pixel and Level-1 trigger upgrades. IPbus control has already been extensively used in the work of these upgrade projects so far, and final uTCA systems will be deployed in the experiment starting from Autumn 2014. IPbus is...

  1. Cold front-end electronics and Ethernet-based DAQ systems for large LAr TPC readout

    CERN Document Server

    D.Autiero,; B.Carlus,; Y.Declais,; S.Gardien,; C.Girerd,; J.Marteau; H.Mathez

    2010-01-01

    Large LAr TPCs are among the most powerful detectors to address open problems in particle and astro-particle physics, such as CP violation in leptonic sector, neutrino properties and their astrophysical implications, proton decay search etc. The scale of such detectors implies severe constraints on their readout and DAQ system. We are carrying on a R&D in electronics on a complete readout chain including an ASIC located close to the collecting planes in the argon gas phase and a DAQ system based on smart Ethernet sensors implemented in a µTCA standard. The choice of the latter standard is motivated by the similarity in the constraints with those existing in Network Telecommunication Industry. We also developed a synchronization scheme developed from the IEEE1588 standard integrated by the use of the recovered clock from the Gigabit link

  2. Architectural Design Study for a 10Gb/s Ethernet Switch

    CERN Document Server

    Oltean, Alexandra Dana

    2004-01-01

    The demand for 10Gb/s switches at this early stage in the market is primarily for modular solutions that can grow as do the bandwidth requirements. This indicates a requirement for chassis based solutions where individual line cards can be added to a chassis infrastructure and have to communicate across a 10Gb/s switching backplane. The present study is provides an architectural design solution for a passive copper backplane used for moving data between the line cards of a 10Gb/s Ethernet switch system. The ability to pass multi-gigabit data rates through a backplane system requires great attention to details previously thought to be irrelevant at lower frequencies. The trace dimensions, the via holes diameters, the backplane materials and choice of connectors, all play a crucial role in determining the success of the system. At high-speed even a subtle change in any of these elements can drastically affect the end-to-end system performance. In this context, the study presents the modeling and simulation work...

  3. Studies of future readout links for the CMS experiment

    CERN Document Server

    Bukowiec, Sebastian

    2010-01-01

    This paper studies a possible replacement of the existing S-LINK64 implementation by an optical link, based on 10 Gigabit Ethernet. The new link will employ commercial protocols in order to be able to receive the data by standard hardware components like PCs or network switches. Currently prototypes using multiple Gigabit Ethernet links are being developed and tested. The paper summarizes the status of these studies.

  4. NM-Net Gigabit-based Implementation on Core Network Facilities and Performance Design Hierarchy

    International Nuclear Information System (INIS)

    Raja Murzaferi Raja Moktar; Mohd Fauzi Haris; Siti Nurbahyah Hamdan

    2013-01-01

    Nuclear Malaysia computing network or NM-net has been gradually developed since 1990s. Since then it has been the main backbone of inter networking on agency's IT infrastructure, serving users ranging from researchers to operational staffs. Main network operating center or NOC is situated in Block 15 and linkup via fiber or UTP cabling to adjacent main network blocks (18, 29, 11 and 44-Dengkil) and later to other blocks enabling network connections. In 2009 the main core network has been built up form several switches up link to form the main networking switch, while on the adjacent main block networks are mainly based on fast Ethernet technology . With current research and operational tasks highly dependent on IT infrastructure that is being enabled through NM-Net, the performance of the infrastructure are most critical. This paper will discuss NM-Net implementing gigabit-based networking system and performance network design hierarchy in order to achieve highest availability of inter networking services in the agency thus catalyzing Nuclear Malaysia future research initiative. (author)

  5. Testiranje Ethernet mehanizmov OAM

    OpenAIRE

    GERKŠIČ, KATJA

    2015-01-01

    V magistrskem delu preučimo in primerjamo standarde ter priporočila na področju Ethernet OAM (angl. OAM – Operation, administration and maintenance). Tehnologija Ethernet postaja vedno polj prisotna v mestnih in prostranih omrežjih, zato je pomembno, da imamo dobro definirane mehanizme za nadzor delovanja, administracijo in upravljanje Ethernet omrežij. V delu se osredotočimo predvsem na standarda IEEE 802.3ah in IEEE 802.1ag ter priporočilo ITU-T Y.1731. Posebno pozornost namenimo delovanju ...

  6. Data transfer based on intelligent ethernet card

    International Nuclear Information System (INIS)

    Zhu Haitao; Chinese Academy of Sciences, Beijing; Chu Yuanping; Zhao Jingwei

    2007-01-01

    Intelligent Ethernet Cards are widely used in systems where the network throughout is very large, such as the DAQ systems for modern high energy physics experiments, web service. With the example of a commercial intelligent Ethernet card, this paper introduces the architecture, the principle and the process of intelligent Ethernet cards. In addition, the results of several experiments showing the differences between intelligent Ethernet cards and general ones are also presented. (authors)

  7. Communication Network Architectures Based on Ethernet Passive Optical Network for Offshore Wind Power Farms

    Directory of Open Access Journals (Sweden)

    Mohamed A. Ahmed

    2016-03-01

    Full Text Available Nowadays, with large-scale offshore wind power farms (WPFs becoming a reality, more efforts are needed to maintain a reliable communication network for WPF monitoring. Deployment topologies, redundancy, and network availability are the main items to enhance the communication reliability between wind turbines (WTs and control centers. Traditional communication networks for monitoring and control (i.e., supervisory control and data acquisition (SCADA systems using switched gigabit Ethernet will not be sufficient for the huge amount of data passing through the network. In this paper, the optical power budget, optical path loss, reliability, and network cost of the proposed Ethernet Passive Optical Network (EPON-based communication network for small-size offshore WPFs have been evaluated for five different network architectures. The proposed network model consists of an optical network unit device (ONU deployed on the WT side for collecting data from different internal networks. All ONUs from different WTs are connected to a central optical line terminal (OLT, placed in the control center. There are no active electronic elements used between the ONUs and the OLT, which reduces the costs and complexity of maintenance and deployment. As fiber access networks without any protection are characterized by poor reliability, three different protection schemes have been configured, explained, and discussed. Considering the cost of network components, the total implementation expense of different architectures with, or without, protection have been calculated and compared. The proposed network model can significantly contribute to the communication network architecture for next generation WPFs.

  8. Reliability in automotive ethernet networks

    DEFF Research Database (Denmark)

    Soares, Fabio L.; Campelo, Divanilson R.; Yan, Ying

    2015-01-01

    This paper provides an overview of in-vehicle communication networks and addresses the challenges of providing reliability in automotive Ethernet in particular.......This paper provides an overview of in-vehicle communication networks and addresses the challenges of providing reliability in automotive Ethernet in particular....

  9. Active Star Architectures For Fiber Optics Ethernet

    Science.gov (United States)

    Linde, Yoseph L.

    1988-12-01

    Ethernet, and the closely related IEEE 802.3 CSMA/CD standard (Carrier Sense Multiple Access with Collision Detection), is probably the widest used method for high speed Local Area Networks (LANs). The original Ethernet medium was baseband coax but the wide acceptance of the system necessitated the ability to use Ethernet on a variety of media. So far the use of Ethernet on Thin Coax (CheaperNet), Twisted Pair (StarLan) and Broadband Coax has been standardized. Recently, an increased interest in Fiber Optic based LANs resulted in a formation of an IEEE group whose charter is to recommend approaches for Active and Passive Fiber Optic Ethernet systems. The various approaches which are being considered are described in this paper with an emphasis on Active Star based systems.

  10. First experience with the InfiniBand interconnect

    International Nuclear Information System (INIS)

    Schwickerath, Ulrich; Heiss, Andreas

    2004-01-01

    A test cluster of dual Intel-Xeon processor server nodes has been equipped with 10 GBit/s InfiniBand interconnect. Capabilities of this new technique were tested and compared to Gigabit-Ethernet (GE) with respect to both High-Performance Computing (MPI-based parallel computing applications) and High-Throughput Computing (HTC). RFIO, a protocol for fast and efficient file transfers, has been ported to make immediate use of InfiniBand, utilizing the remote direct memory access (RDMA) capabilities of the InfiniBand hardware. The performance is compared to Gigabit-Ethernet

  11. 10BASE5 Ethernet Cable & Vampire Tap

    CERN Document Server

    1983-01-01

    10BASE5 Thick Ethernet Cable, 10Mbit/sec. In the 1980s and early 1990's, Ethernet became more popular and provided a much faster data transmission rate. This cable is one of the first ethernet cables from 1983, a thick, bulky affair. Computers were attached via "Vampire Taps" which were connectors screwed straight through the shielding of the cable.

  12. Experimental comparison of simultaneous transmission of LTE-A multi-band and gigabit/s 4-PAM signals up to 50 m of large-core graded-index POF

    NARCIS (Netherlands)

    Forni, F.; Shi, Y.; Van Den Boom, H.P.A.; Tangdiongga, E.; Koonen, A.M.J.

    2016-01-01

    This paper reports the experimental results of the co-transmission of a multi-band LTE-A and gigabit/s baseband 4-PAM signals over 35 m and over 50 m of 1 mm core diameter PMMA GI-POF, using low-cost components. Both links used a red light 650nm laser diode and p-i-n photodiode with transimpedance

  13. Ethernet over SDH (EoS): Summary

    Indian Academy of Sciences (India)

    Cost effective way to support data customers. Use of integrated Ethernet eliminates the need for costly WAN interfaces (E1/E3/STM-1) on routers connecting to SDH/SONET; WAN bandwidth can be provided directly from customers' Ethernet switches, potentially eliminating routers at customer sites ...

  14. Optical frame synchronizer for 10 G Ethernet packets aiming at 1 Tb/s OTDM Ethernet

    DEFF Research Database (Denmark)

    Hu, Hao; Palushani, Evarist; Laguardia Areal, Janaina

    2010-01-01

    Synchronization of 10 G Ethernet packets to a local clock was demonstrated using a phase modulator and a SMF as retiming elements. Error free performances for the synchronized packets with different lengths were achieved.......Synchronization of 10 G Ethernet packets to a local clock was demonstrated using a phase modulator and a SMF as retiming elements. Error free performances for the synchronized packets with different lengths were achieved....

  15. Data acquisition and control using ETHERNET

    International Nuclear Information System (INIS)

    Elkins, E.P.

    1985-01-01

    We have developed a distributed computer control system to monitor and control a linear accelerator. This system consists of two PDP-11s and eight LSI 11/23s linked together with ETHERNET. The higher level systems (control consoles, etc.) use the RSX11M operating system, whereas the data acquisition and control is performed using the RSX11S operating system downline loaded from a central host computer. Locally written ETHERNET drivers are used to reduce the CPU overhead and therefore improve system response. The ETHERNET system permits remote file access by means of operator or program interaction, as well as supporting downline system loading. Control-system functions supported are supervisory control, closed-loop control, data monitoring, and data recording. 4 refs., 2 figs., 1 tab

  16. Prestigious nuclear research organization orders Silicom's cutting-edge server adapters

    CERN Multimedia

    2003-01-01

    "Silicom Ltd today announced that one of the world's largest and most prestigious nuclear research organization has placed an initial order for its Gigabit Ethernet Server Adapters. Silicom's high-performance adapters will be deployed in the organization's state-of-the-art particle physics laboratory servers to help them attain reliable gigabit transfer rates" (1/2 page).

  17. Providing resilience for carrier ethernet multicast traffic

    DEFF Research Database (Denmark)

    Ruepp, Sarah Renée; Wessing, Henrik; Zhang, Jiang

    2009-01-01

    This paper presents an overview of the Carrier Ethernet technology with specific focus on resilience. In particular, we detail how multicast traffic, which is essential for e.g. IPTV can be protected. We present Carrier Ethernet resilience methods for linear and ring networks and show by simulation...

  18. All-IP-Ethernet architecture for real-time sensor-fusion processing

    Science.gov (United States)

    Hiraki, Kei; Inaba, Mary; Tezuka, Hiroshi; Tomari, Hisanobu; Koizumi, Kenichi; Kondo, Shuya

    2016-03-01

    Serendipter is a device that distinguishes and selects very rare particles and cells from huge amount of population. We are currently designing and constructing information processing system for a Serendipter. The information processing system for Serendipter is a kind of sensor-fusion system but with much more difficulties: To fulfill these requirements, we adopt All IP based architecture: All IP-Ethernet based data processing system consists of (1) sensor/detector directly output data as IP-Ethernet packet stream, (2) single Ethernet/TCP/IP streams by a L2 100Gbps Ethernet switch, (3) An FPGA board with 100Gbps Ethernet I/F connected to the switch and a Xeon based server. Circuits in the FPGA include 100Gbps Ethernet MAC, buffers and preprocessing, and real-time Deep learning circuits using multi-layer neural networks. Proposed All-IP architecture solves existing problem to construct large-scale sensor-fusion systems.

  19. Evaluating multicast resilience in carrier ethernet

    DEFF Research Database (Denmark)

    Ruepp, Sarah Renée; Wessing, Henrik; Zhang, Jiang

    2010-01-01

    This paper gives an overview of the Carrier Ethernet technology with specific focus on resilience. In particular, we show how multicast traffic, which is essential for IPTV can be protected. We detail the ackground for resilience mechanisms and their control and e present Carrier Ethernet...... resilience methods for linear nd ring networks. By simulation we show that the vailability of a multicast connection can be significantly increased by applying protection methods....

  20. Risk Assessment of the Naval Postgraduate School Gigabit Network

    National Research Council Canada - National Science Library

    Rowlands, Dennis

    2004-01-01

    This research thoroughly examines the current Naval Postgraduate School Gigabit Network security posture, identifies any possible threats or vulnerabilities, and recommends any appropriate safeguards...

  1. Proposal for tutorial: Resilience in carrier Ethernet transport

    DEFF Research Database (Denmark)

    Berger, Michael Stübert; Wessing, Henrik; Ruepp, Sarah Renée

    2009-01-01

    This tutorial addresses how Carrier Ethernet technologies can be used in the transport network to provide resilience to the packet layer. Carrier Ethernet networks based on PBB-TE and T-MPLS/MPLS-TP are strong candidates for reliable transport of triple-play services. These technologies offer...... of enhancements are still required to make Carrier Ethernet ready for large scale deployments of reliable point-to-multipoint services. The tutorial highlights the necessary enhancements and shows possible solutions and directions towards reliable multicast. Explicit focus is on OAM for multicast, where...

  2. Possibilities of implementation of synchronous Ethernet in popular Ethernet version using timing and interference constraints

    Directory of Open Access Journals (Sweden)

    Seetaiah KILARU

    2015-12-01

    Full Text Available Popular network architectures are following packet based architectures instead of conventional Time division multiplexing. The existed Ethernet is basically asynchronous in nature and was not designed based on timing transfer constraints. To achieve the challenge of next generation network with respect to efficient bandwidth and faster data rates, we have to deploy the network which has less latency. This can be achieved by Synchronous Ethernet (SyncE. In Sync-E, Phase Locked Loop (PLL was used to recover the incoming jitter from clock recovery circuit. Then feed the PLL block to transmission device. We have to design the network in an unaffected way that the functions of Ethernet should run in normal way even we introduced timing path at physical layer. This paper will give detailed outlook on how Sync-E is achieved from Asynchronous format. Reference model of 100 Base-TX/FX was analyzed with respect to timing and interference constraints. Finally, it was analyzed with the data rate improvement with the proposed method.

  3. Carrier ethernet network control plane based on the Next Generation Network

    DEFF Research Database (Denmark)

    Fu, Rong; Wang, Yanmeng; Berger, Michael Stubert

    2008-01-01

    This paper contributes on presenting a step towards the realization of Carrier Ethernet control plane based on the next generation network (NGN). Specifically, transport MPLS (T-MPLS) is taken as the transport technology in Carrier Ethernet. It begins with providing an overview of the evolving...... architecture of the next generation network (NGN). As an essential candidate among the NGN transport technologies, the definition of Carrier Ethernet (CE) is also introduced here. The second part of this paper depicts the contribution on the T-MPLS based Carrier Ethernet network with control plane based on NGN...... at illustrating the improvement of the Carrier Ethernet network with the NGN control plane....

  4. A simple FASTBUS to ethernet interface

    International Nuclear Information System (INIS)

    Baudendistel, K.; Dobinson, R.W.; Downing, R.W.; Herbert, M.J.

    1985-01-01

    Until comparatively recently the effort and the expense of interfacing to Ethernet has been considerable, both in terms of design time and the number of integrated circuits required. However, the appearance of VLSI chip sets from several manufacturers, which perform large parts of the lower level network protocols, has done much to ease this problem. One of the first chip sets available was that manufactured by the SEEQ company of San Jose, California. We have successfully constructed and operated controller boards for the IBM PC using these chips. We report here on an extension of this work to construct a simple interface between FASTBUS and Ethernet. The motivation for the work is twofold; first to make available Ethernet products and services from a FASTBUS environment, secondly to investigate the interconnection of FASTBUS segments over longer distances than is possible using the present cable segment and segment interconnects. The emphasis of this paper is on how the interface appears to a FASTBUS user

  5. Next generation network based carrier ethernet test bed for IPTV traffic

    DEFF Research Database (Denmark)

    Fu, Rong; Berger, Michael Stübert; Zheng, Yu

    2009-01-01

    This paper presents a Carrier Ethernet (CE) test bed based on the Next Generation Network (NGN) framework. After the concept of CE carried out by Metro Ethernet Forum (MEF), the carrier-grade Ethernet are obtaining more and more interests and being investigated as the low cost and high performanc...... services of transport network to carry the IPTV traffic. This test bed is approaching to support the research on providing a high performance carrier-grade Ethernet transport network for IPTV traffic....

  6. The APS control system network upgrade

    International Nuclear Information System (INIS)

    Sidorowicz, K. v.; Leibfritz, D.; McDowell, W. P.

    1999-01-01

    When it was installed,the Advanced Photon Source (APS) control system network was at the state-of-the-art. Different aspects of the system have been reported at previous meetings [1,2]. As loads on the controls network have increased due to newer and faster workstations and front-end computers, we have found performance of the system declining and have implemented an upgraded network. There have been dramatic advances in networking hardware in the last several years. The upgraded APS controls network replaces the original FDDI backbone and shared Ethernet hubs with redundant gigabit uplinks and fully switched 10/100 Ethernet switches with backplane fabrics in excess of 20 Gbits/s (Gbps). The central collapsed backbone FDDI concentrator has been replaced with a Gigabit Ethernet switch with greater than 30 Gbps backplane fabric. Full redundancy of the system has been maintained. This paper will discuss this upgrade and include performance data and performance comparisons with the original network

  7. Ethernet ring protection with managed FDB using APS payload

    Science.gov (United States)

    Im, Jinsung; Ryoo, Jeong-dong; Joo, Bheom Soon; Rhee, J.-K. Kevin

    2007-11-01

    Ethernet ring protection (ERP) is a new technology based on OAM (operations, administration, and maintenance) being standardized by the ITU-T G.8032 working group. In this paper, we present the recent development of Ethernet ring protection which is called FDB (filtering database) flush scheme and propose a new Ethernet ring protection technique introducing a managed FDB using APS to deliver information how to fix FDB selectively. We discuss the current development of the ERP technology at ITU-T and performance comparisons between different proposals.

  8. Converting serial networks to Ethernet communications

    Energy Technology Data Exchange (ETDEWEB)

    Rosado, Elroy [Freewave Technologies, Inc., Boulder, CO (United States). Latin America

    2008-07-01

    Many oil and gas producers and pipeline companies find themselves in an awkward position. They have invested millions of dollars in legacy serial communications systems and in most cases, millions more in older SCADA remote terminal units and electronic flow meters. There is a desire throughout most of the industry to convert these systems to Ethernet. This presentation will explore how Ethernet protocol offers advantages over the older serial communications in terms of peer to peer communication, faster polling cycles, and the ability to poll multiple devices at the same time. (author)

  9. Radiation Hardened 10BASE-T Ethernet Physical Layer (PHY)

    Science.gov (United States)

    Lin, Michael R. (Inventor); Petrick, David J. (Inventor); Ballou, Kevin M. (Inventor); Espinosa, Daniel C. (Inventor); James, Edward F. (Inventor); Kliesner, Matthew A. (Inventor)

    2017-01-01

    Embodiments may provide a radiation hardened 10BASE-T Ethernet interface circuit suitable for space flight and in compliance with the IEEE 802.3 standard for Ethernet. The various embodiments may provide a 10BASE-T Ethernet interface circuit, comprising a field programmable gate array (FPGA), a transmitter circuit connected to the FPGA, a receiver circuit connected to the FPGA, and a transformer connected to the transmitter circuit and the receiver circuit. In the various embodiments, the FPGA, transmitter circuit, receiver circuit, and transformer may be radiation hardened.

  10. Efficient power supply using Power over Ethernet; Effiziente Stromversorgung mittels Power over Ethernet (PoE)

    Energy Technology Data Exchange (ETDEWEB)

    Huser, A.

    2005-07-01

    This final report for the Swiss Federal Office of Energy (SFOE) takes a look at methods of supplying small equipment such as Internet telephones, web cams, hubs, hard discs, audio equipment, point-of-sale terminals, game consoles etc. with power via their Ethernet connections. A short comparison is presented between Power over Ethernet (PoE) and other methods of supplying power along with data, including Universal Serial Bus (USB), FireWire and Powerline systems. The advantages of PoE over the use of separate power supply units are discussed and recommendations are made to the manufacturers and users of small peripheral equipment regarding the dimensioning and loading of such power supply systems.

  11. A prototype switched Ethernet data acquisition system

    International Nuclear Information System (INIS)

    Ye Gaoying; Deng Huichen; Chen Liaoyuan; Liu Li; Wang Xinhui

    1999-01-01

    A prototype switched Ethernet data acquisition system has been built up and successfully operated in HL-1M tokamak experiments. The system is based on a switched high bandwidth Ethernet network with which the CAMAC crates are directly interfaced. It takes the advanced features of LAN switch and Ethernet CAMAC controller (ECC 1365 MK III, HYTEC product) to avoid the rewriting of CAMAC driver for an individual computer system and to ensure high data transmission rate between CAMAC system and host computers on the network. It is a new approach to DAS system architecture and provides a solution for a well-known bottleneck problem in traditional distributed DAS system for fusion research. An average throughput of the test system reaches over 100 Mbps. The system features also an easy and low cost migration from traditional distributed DAS system. In the paper, the hardware configuration, software structure, performance of the system and the method of migrating from current DAS system are discussed in detail. (orig.)

  12. Hardware Realization of an Ethernet Packet Analyzer Search Engine

    Science.gov (United States)

    2000-06-30

    specific for the home automation industry. This analyzer will be at the gateway of a network and analyze Ethernet packets as they go by. It will keep... home automation and not the computer network. This system is a stand-alone real-time network analyzer capable of decoding Ethernet protocols. The

  13. Ethernet for Space Flight Applications

    Science.gov (United States)

    Webb, Evan; Day, John H. (Technical Monitor)

    2002-01-01

    NASA's Goddard Space Flight Center (GSFC) is adapting current data networking technologies to fly on future spaceflight missions. The benefits of using commercially based networking standards and protocols have been widely discussed and are expected to include reduction in overall mission cost, shortened integration and test (I&T) schedules, increased operations flexibility, and hardware and software upgradeability/scalability with developments ongoing in the commercial world. The networking effort is a comprehensive one encompassing missions ranging from small University Explorer (UNEX) class spacecraft to large observatories such as the Next Generation Space Telescope (NGST). Mission aspects such as flight hardware and software, ground station hardware and software, operations, RF communications, and security (physical and electronic) are all being addressed to ensure a complete end-to-end system solution. One of the current networking development efforts at GSFC is the SpaceLAN (Spacecraft Local Area Network) project, development of a space-qualifiable Ethernet network. To this end we have purchased an IEEE 802.3-compatible 10/100/1000 Media Access Control (MAC) layer Intellectual Property (IP) core and are designing a network node interface (NNI) and associated network components such as a switch. These systems will ultimately allow the replacement of the typical MIL-STD-1553/1773 and custom interfaces that inhabit most spacecraft. In this paper we will describe our current Ethernet NNI development along with a novel new space qualified physical layer that will be used in place of the standard interfaces. We will outline our plans for development of space qualified network components that will allow future spacecraft to operate in significant radiation environments while using a single onboard network for reliable commanding and data transfer. There will be a brief discussion of some issues surrounding system implications of a flight Ethernet. Finally, we will

  14. Simulation and Evaluation of Ethernet Passive Optical Network

    Directory of Open Access Journals (Sweden)

    Salah A. Jaro Alabady

    2013-05-01

    Full Text Available      This paper studies simulation and evaluation of Ethernet Passive Optical Network (EPON system, IEEE802.3ah based OPTISM 3.6 simulation program. The simulation program is used in this paper to build a typical ethernet passive optical network, and to evaluate the network performance when using the (1580, 1625 nm wavelength instead of (1310, 1490 nm that used in Optical Line Terminal (OLT and Optical Network Units (ONU's in system architecture of Ethernet passive optical network at different bit rate and different fiber optic length. The results showed enhancement in network performance by increase the number of nodes (subscribers connected to the network, increase the transmission distance, reduces the received power and reduces the Bit Error Rate (BER.   

  15. The research and application of Ethernet over RPR technology

    Science.gov (United States)

    Feng, Xiancheng; Yun, Xiang

    2008-11-01

    With service competitions of carriers aggravating and client's higher service experience requirement, it urges the MAN technology develops forward. When the Core Layer and Distribution Layer technology are mature, all kinds of reliability technologies of MAN access Layer are proposed. EoRPR is one of reliability technologies for MAN access network service protection. This paper elaborates Ethernet over RPR technology's many advantages through analyzing basic principle, address learning and key technologies of Ethernet over RPR. EpRPR has quicker replacing speed, plug and play, stronger QoS ability, convenient service deployment, band fairly sharing, and so on. At the same time the paper proposed solution of Ethernet over RPR in MAN, NGN network and enterprise Private network. So, among many technologies of MAN access network, EoRPR technology has higher reliability and manageable and highly effectiveness and lower costive of Ethernet. It is not only suitable for enterprise interconnection, BTV and NGN access services and so on, but also can meet the requirement of carriers' reducing CAPEX and OPEX's and increase the rate of investment.

  16. A Reconfigurable Design and Architecture of the Ethernet and HomePNA3.0 MAC

    Science.gov (United States)

    Khalilydermany, M.; Hosseinghadiry, M.

    In this paper a reconfigurable architecture for Ethernet and HomePNA MAC is presented. By using this new architecture, Ethernet and HomePNA reconfigurable network card can be produced. This architecture has been implemented using VHDL language and after that synthesized on a chip. The differences between HomePNA (synchronized and unsynchronized mode) and Ethernet in collision detection mechanism and priority access to media have caused the need to separate architectures for Ethernet and HomePNA, but by using similarities of them, both the Ethernet and the HomePNA can be implemented in a single chip with a little extra hardware. The number of logical elements of the proposed architecture is increased by 19% in compare to when only an Ethernet MAC is implemented

  17. Protection switching for carrier ethernet multicast

    DEFF Research Database (Denmark)

    Ruepp, Sarah Renée; Wessing, Henrik; Berger, Michael Stübert

    2010-01-01

    This paper addresses network survivability for IPTV multicast transport in Carrier Ethernet networks. The impact of link failures is investigated and suggestions for intelligent multicast resilience schemes are proposed. In particular, functions of the multicast tree are integrated with the Carri...... recovery path length, recovery time, number of branch nodes and operational complexity. The integrated approach therefore shows significant potential to increase the QoE for IPTV users in case of network failures and recovery actions.......This paper addresses network survivability for IPTV multicast transport in Carrier Ethernet networks. The impact of link failures is investigated and suggestions for intelligent multicast resilience schemes are proposed. In particular, functions of the multicast tree are integrated with the Carrier...

  18. Spectrally efficient polymer optical fiber transmission

    Science.gov (United States)

    Randel, Sebastian; Bunge, Christian-Alexander

    2011-01-01

    The step-index polymer optical fiber (SI-POF) is an attractive transmission medium for high speed communication links in automotive infotainment networks, in industrial automation, and in home networks. Growing demands for quality of service, e.g., for IPTV distribution in homes and for Ethernet based industrial control networks will necessitate Gigabit speeds in the near future. We present an overview on recent advances in the design of spectrally efficient and robust Gigabit-over-SI-POF transmission systems.

  19. FPGA Implementation of Real-Time Ethernet for Motion Control

    Directory of Open Access Journals (Sweden)

    Chen Youdong

    2013-01-01

    Full Text Available This paper provides an applicable implementation of real-time Ethernet named CASNET, which modifies the Ethernet medium access control (MAC to achieve the real-time requirement for motion control. CASNET is the communication protocol used for motion control system. Verilog hardware description language (VHDL has been used in the MAC logic design. The designed MAC serves as one of the intellectual properties (IPs and is applicable to various industrial controllers. The interface of the physical layer is RJ45. The other layers have been implemented by using C programs. The real-time Ethernet has been implemented by using field programmable gate array (FPGA technology and the proposed solution has been tested through the cycle time, synchronization accuracy, and Wireshark testing.

  20. Towards low-cost gigabit wireless systems at 60 GHz

    NARCIS (Netherlands)

    Yang, Haibing

    2008-01-01

    The world-wide availability of the huge amount of license-free spectral space in the 60 GHz band provides wide room for gigabit-per-second (Gb/s) wireless applications. A commercial (read: low-cost) 60-GHz transceiver will, however, provide limited system performance due to the stringent link budget

  1. Ethernet Operation Administration and Maintenance ; Opportunities for the NREN community

    NARCIS (Netherlands)

    Prins, M.J.; Malhotra, R.

    2011-01-01

    Ethernet started its life as a Local Area Network technology and initially did not have Operations, Administration and Maintenance (OAM) features like IP Ping, IP Traceroute and SDH Loss of Frame. Monitoring and management was mainly done on the IP level. In the case of delivery of Ethernet

  2. An ethernet/IP security review with intrusion detection applications

    International Nuclear Information System (INIS)

    Laughter, S. A.; Williams, R. D.

    2006-01-01

    Supervisory Control and Data Acquisition (SCADA) and automation networks, used throughout utility and manufacturing applications, have their own specific set of operational and security requirements when compared to corporate networks. The modern climate of heightened national security and awareness of terrorist threats has made the security of these systems of prime concern. There is a need to understand the vulnerabilities of these systems and how to monitor and protect them. Ethernet/IP is a member of a family of protocols based on the Control and Information Protocol (CIP). Ethernet/IP allows automation systems to be utilized on and integrated with traditional TCP/IP networks, facilitating integration of these networks with corporate systems and even the Internet. A review of the CIP protocol and the additions Ethernet/IP makes to it has been done to reveal the kind of attacks made possible through the protocol. A set of rules for the SNORT Intrusion Detection software is developed based on the results of the security review. These can be used to monitor, and possibly actively protect, a SCADA or automation network that utilizes Ethernet/IP in its infrastructure. (authors)

  3. Převodník Ethernet na RS-232

    OpenAIRE

    Dreiseitel, Jiří

    2012-01-01

    Práce je věnována problematice konstrukce převodníku Ethernet na RS-232 za pomocí jednočipového mikrokontroléru. Cílem je seznámit čtenáře se síťovou technologií Ethernet a technologií pro sériový přenos založený na protokolu RS-232 a zároveň s technologií vestavěných systémů pro konstrukci zařízení. Součástí práce je kompletní návrh převodníku Ethernet na RS-232 včetně návrhu a implementace firmware v jazyce C za využití LwIP TCP/IP stacku. Převodník je postaven na základě vývojového kitu ST...

  4. The role of Ethernet in providing state-of-the-art and protected industrial networking

    Energy Technology Data Exchange (ETDEWEB)

    Hammond, J. [GarrettCom Inc., Fremont, CA (United States)

    2006-07-01

    Many networks in power substations are now using Ethernet-based solutions that use specialized protocols and customized controls. This paper discussed the advantages of using Ethernet in power utility network systems. Threats to computer networks supporting process control and supervisory control and data acquisition (SCADA) systems in power utilities also were discussed, and systems and components at risk were reviewed. Higher Ethernet bandwidths now permit more data and control information to be processed by networks. Ethernet bandwidths can be used for physical security functions as well as for the control of processes and systems. Components have now been designed to provide end-to-end Ethernet installations in order to save training costs. New security features include anti-hacking protocols, firewalls, and password protection, and card and badge readers for physical intrusion protection. Traffic restrictions have been implemented between designed ports in order to create secure traffic domains. It was concluded that Ethernet can provide the level of security needed to protect important energy infrastructure.

  5. A rapid protection switching method in carrier ethernet ring networks

    Science.gov (United States)

    Yuan, Liang; Ji, Meng

    2008-11-01

    Abstract: Ethernet is the most important Local Area Network (LAN) technology since more than 90% data traffic in access layer is carried on Ethernet. From 10M to 10G, the improving Ethernet technology can be not only used in LAN, but also a good choice for MAN even WAN. MAN are always constructed in ring topology because the ring network could provide resilient path protection by using less resource (fibre or cable) than other network topologies. In layer 2 data networks, spanning tree protocol (STP) is always used to protect transmit link and preventing the formation of logic loop in networks. However, STP cannot guarantee the efficiency of service convergence when link fault happened. In fact, convergent time of networks with STP is about several minutes. Though Rapid Spanning Tree Protocol (RSTP) and Multi-Spanning Tree Protocol (MSTP) improve the STP technology, they still need a couple of seconds to achieve convergence, and can not provide sub-50ms protection switching. This paper presents a novel rapid ring protection method (RRPM) for carrier Ethernet. Unlike other link-fault detection method, it adopts distributed algorithm to detect link fault rapidly (sub-50ms). When networks restore from link fault, it can revert to the original working state. RRPM can provide single ring protection and interconnected ring protection without the formation of super loop. In normal operation, the master node blocks the secondary port for all non-RRPM Ethernet frames belonging to the given RRPM Ring, thereby avoiding a loop in the ring. When link fault happens, the node on which the failure happens moves from the "ring normal" state to the "ring fault" state. It also sends "link down" frame immediately to other nodes and blocks broken port and flushes its forwarding database. Those who receive "link down" frame will flush forwarding database and master node should unblock its secondary port. When the failure restores, the whole ring will revert to the normal state. That is

  6. The design and implementation of the LLNL gigabit testbed

    Energy Technology Data Exchange (ETDEWEB)

    Garcia, D. [Lawrence Livermore National Labs., CA (United States)

    1994-12-01

    This paper will look at the design and implementation of the LLNL Gigabit testbed (LGTB), where various high speed networking products, can be tested in one environment. The paper will discuss the philosophy behind the design of and the need for the testbed, the tests that are performed in the testbed, and the tools used to implement those tests.

  7. Researching, building a soft-processor and Ethernet interface circuit using EDK

    International Nuclear Information System (INIS)

    Tuong Thi Thu Huong; Pham Ngoc Tuan; Truong Van Dat, Dang Lanh; Chau Thi Nhu Quynh

    2014-01-01

    The processor is an indispensable component in the measurement and automatic control systems. This report describes the fabrication of a soft-processor (32-bits, on-chip block RAM 64K, 50M clock, internal and peripheral bus) for receiving, sending and processing of data Ethernet packets. This processor is fabricated using the XPS component from EDK (Xilinx) software toolkit. After that, it is configured on the FPGA named Spartan XC3S500E circuit. A firmware of a processor for controlling the interface between processor and Ethernet port is written in C language and can play a role of a HOST (station) which has its own IP to connect to Ethernet network. Besides, there are some needed parts as follows: an Ethernet interfacing controller chip, a suitable cable providing a speed up to 100 Mbs and an application program running under Window XP environment written in LabView to communicate with soft-processor. (author)

  8. Combined single-mode/multimode fiber link supporting simplified in-building 60-GHz gigabit wireless access

    DEFF Research Database (Denmark)

    Pham, Tien Thang; Lebedev, Alexander; Beltrán, Marta

    2012-01-01

    In this paper, we propose and experimentally demonstrate a simple, cost-effective hybrid gigabit fiber-wireless system for in-building wireless access. Simplicity and cost-effectiveness are achieved in all parts of the system by utilizing direct laser modulation, optical frequency up-conversion, ......In this paper, we propose and experimentally demonstrate a simple, cost-effective hybrid gigabit fiber-wireless system for in-building wireless access. Simplicity and cost-effectiveness are achieved in all parts of the system by utilizing direct laser modulation, optical frequency up...

  9. SPIDR, a general-purpose readout system for pixel ASICs

    International Nuclear Information System (INIS)

    Heijden, B. van der; Visser, J.; Beuzekom, M. van; Boterenbrood, H.; Munneke, B.; Schreuder, F.; Kulis, S.

    2017-01-01

    The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a 'soft core' CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four

  10. Optimal multicasting in a multi-line-rate ethernet-over-WDM network

    Science.gov (United States)

    Harve, Shruthi; Batayneh, Marwan; Mukherjee, Biswanath

    2009-11-01

    Ethernet is the dominant transport technology for Local Area Networks. Efforts are now under way to use carrier-grade Ethernet in backbone networks of different service providers. With the advent of applications such as IPTV and Videoon- Demand, there is need for techniques to route multicast traffic over the Ethernet backbone networks. Here, we address the problem of Routing and Wavelength Assignment (RWA) of a set of multicast requests in a Multi-Line-Rate Ethernet backbone network with the objective of minimizing the cost of setting up the network, in terms of the Service Provider's Capital Expenditure (CAPEX). We present an Auxiliary Graph based heuristic algorithm that routes each multicast request on a light-tree structure, and assigns minimum cost wavelengths along the route. We compare the properties of the algorithm to the optimal solution given by a mathematical model formulated as an Integer Linear Program (ILP), and show that they compare very well. We also find that the algorithm is most cost-effective when the incoming requests are processed in descending order of their bandwidth requirements.

  11. Efficient Data Transfer Rate and Speed of Secured Ethernet Interface System

    Science.gov (United States)

    Ghanti, Shaila

    2016-01-01

    Embedded systems are extensively used in home automation systems, small office systems, vehicle communication systems, and health service systems. The services provided by these systems are available on the Internet and these services need to be protected. Security features like IP filtering, UDP protection, or TCP protection need to be implemented depending on the specific application used by the device. Every device on the Internet must have network interface. This paper proposes the design of the embedded Secured Ethernet Interface System to protect the service available on the Internet against the SYN flood attack. In this experimental study, Secured Ethernet Interface System is customized to protect the web service against the SYN flood attack. Secured Ethernet Interface System is implemented on ALTERA Stratix IV FPGA as a system on chip and uses the modified SYN flood attack protection method. The experimental results using Secured Ethernet Interface System indicate increase in number of genuine clients getting service from the server, considerable improvement in the data transfer rate, and better response time during the SYN flood attack. PMID:28116350

  12. Efficient Data Transfer Rate and Speed of Secured Ethernet Interface System.

    Science.gov (United States)

    Ghanti, Shaila; Naik, G M

    2016-01-01

    Embedded systems are extensively used in home automation systems, small office systems, vehicle communication systems, and health service systems. The services provided by these systems are available on the Internet and these services need to be protected. Security features like IP filtering, UDP protection, or TCP protection need to be implemented depending on the specific application used by the device. Every device on the Internet must have network interface. This paper proposes the design of the embedded Secured Ethernet Interface System to protect the service available on the Internet against the SYN flood attack. In this experimental study, Secured Ethernet Interface System is customized to protect the web service against the SYN flood attack. Secured Ethernet Interface System is implemented on ALTERA Stratix IV FPGA as a system on chip and uses the modified SYN flood attack protection method. The experimental results using Secured Ethernet Interface System indicate increase in number of genuine clients getting service from the server, considerable improvement in the data transfer rate, and better response time during the SYN flood attack.

  13. Ethernet direct display: a new dimension for in-vehicle video connectivity solutions

    Science.gov (United States)

    Rowley, Vincent

    2009-05-01

    To improve the local situational awareness (LSA) of personnel in light or heavily armored vehicles, most military organizations recognize the need to equip their fleets with high-resolution digital video systems. Several related upgrade programs are already in progress and, almost invariably, COTS IP/Ethernet is specified as the underlying transport mechanism. The high bandwidths, long reach, networking flexibility, scalability, and affordability of IP/Ethernet make it an attractive choice. There are significant technical challenges, however, in achieving high-performance, real-time video connectivity over the IP/Ethernet platform. As an early pioneer in performance-oriented video systems based on IP/Ethernet, Pleora Technologies has developed core expertise in meeting these challenges and applied a singular focus to innovating within the required framework. The company's field-proven iPORTTM Video Connectivity Solution is deployed successfully in thousands of real-world applications for medical, military, and manufacturing operations. Pleora's latest innovation is eDisplayTM, a smallfootprint, low-power, highly efficient IP engine that acquires video from an Ethernet connection and sends it directly to a standard HDMI/DVI monitor for real-time viewing. More costly PCs are not required. This paper describes Pleora's eDisplay IP Engine in more detail. It demonstrates how - in concert with other elements of the end-to-end iPORT Video Connectivity Solution - the engine can be used to build standards-based, in-vehicle video systems that increase the safety and effectiveness of military personnel while fully leveraging the advantages of the lowcost COTS IP/Ethernet platform.

  14. Proposal for the award of a contract for the supply of Cabletron gigabit routers

    CERN Document Server

    2000-01-01

    This document concerns the award of a contract for the supply of Cabletron gigabit routers. Following a call for tenders (IT-2870/IT) sent on 14 July 2000 to 13 firms in three Member States, CERN received, by the closing date, tenders from four firms in one Member State. The Finance Committee is invited to agree to the negotiation of a contract with ACN (CH), the lowest bidder, for the supply of Cabletron gigabit routers for a total amount of 1 887 000 Swiss francs, not subject to revision. The firm has indicated the following distribution by country of the contract value covered by this adjudication proposal: IE-100%.

  15. Development of Ethernet emulation driver for reflective memory

    International Nuclear Information System (INIS)

    Seo, Seong-Heon

    2010-01-01

    Reflective memory (RFM) is adopted as a real time network in the KSTAR plasma control system (PCS). Since the data uploaded from any computer are automatically shared among all the computers on the RFM network, the design of a distributed control system based on RFM is easily implemented through the management of memory mapping. The data providers and consumers are logically well seperated so that, if memory mapping information is given, a new control unit can be added without any modification to the existing system except connecting a new RFM module through an optical cable. The KSTAR PCS is also connected with the Ethernet in addition to the RFM because the RFM does not support the Transmission Control Protocol/Internet Protocol (TCP/IP) and many network services of the operating system such as the Network File System (NFS) and the Secure Shell (SSH) are based on the TCP/IP. Therefore we developed an Ethernet emulation driver for the RFM to eliminate the need for a separate Ethernet network. The driver was tested on the Linux kernel 2.6.31. The algorithm of the emulation driver is explained and the experimental setup is presented.

  16. Link layer topology discovery in an uncooperative ethernet environment

    CSIR Research Space (South Africa)

    Delport, JP

    2007-05-01

    Full Text Available single destination is called a unicast address. Ethernet addresses also exist for sending data to multiple stations at once and are called multicast addresses. A special address, with all the bits in the address set to one (FF:FF:FF:FF:FF:FF), is used... P (2007) 2.4. Relevant Ethernet Concepts 14 Destination and source addresses are MAC addresses as defined in Sec- tion 2.4.2. The destination address might contain a unicast, multicast or broadcast address. The length or type field allows two types...

  17. Physical Layer Ethernet Clock Synchronization

    Science.gov (United States)

    2010-11-01

    42 nd Annual Precise Time and Time Interval (PTTI) Meeting 77 PHYSICAL LAYER ETHERNET CLOCK SYNCHRONIZATION Reinhard Exel, Georg...oeaw.ac.at Nikolaus Kerö Oregano Systems, Mohsgasse 1, 1030 Wien, Austria E-mail: nikolaus.keroe@oregano.at Abstract Clock synchronization ...is a service widely used in distributed networks to coordinate data acquisition and actions. As the requirement to achieve tighter synchronization

  18. High capacity carrier ethernet transport networks

    DEFF Research Database (Denmark)

    Rasmussen, Anders; Zhang, Jiang; Yu, Hao

    2009-01-01

    OAM functions, survivability and the increased bandwidth requirements of carrier class systems. This article provides an overview of PBB-TE and T-MPLS and demonstrates how IPTV services can be realized in the framework of Carrier Ethernet. In addition we provide a case study on performing bit error...

  19. PFGA based, full-duplex, multi-channel, optical gigabit, synchronous data transceiver for TESLA technology LLRF control system

    Energy Technology Data Exchange (ETDEWEB)

    Pozniak, K.T.; Romaniuk, R.S.; Jalmuzna, W.; Olowski, K.; Perkuszewski, K.; Zielinski, J. [Warsaw Univ. of Technology (Poland). Inst. of Electronic Systems; Kierzkowski, K. [Warsaw Univ. (Poland). Inst. of Experimental Physics

    2005-07-01

    It may be predicted now, even assuming very conservative approach, that the next generation of the Low Level RF control systems for future accelerators will use extensively such technologies like: very fast programmable circuits equipped with DSP, embedded PC and optical communication I/O functionalities, as well as multi-gigabit optical transmission of measurement data and control signals. The paper presents the idea and realization of a gigabit synchronous data distributor designed to work in the LLRF control system of TESLA technology based X-ray FEL. The design bases on a relatively simple and cheap FPGA chip Cyclone. Commercially available SERDES (serializer/deserializer) and optical transceiver chips were applied. The optoelectronic module is embedded on the main LLRF BMB (backbone mother board). The MB provides communication with the outside computer control system, programmable chip configuration, integration with other functional modules and power supply. The hardware implementation is here described and the used software for BER (bit-error-rate) testing of the multi-gigabit optical link. The measurement results are presented. The appendix contains a comparison between the available protocols of serial data transmission for FPGA technology. This TESLA Technology Report is a partial contribution to the next version of the SIMCON system which is expected to be released this year. The SIMCON, ver 3. will contain 8 channels and multi-gigabit optical transmission capability. (orig.)

  20. Advanced TCA BAckplane Tester

    CERN Document Server

    Oltean, Alexandra Dana; PGNet2005

    2005-01-01

    The “Advanced Telecom Computing Architecture” (AdvancedTCA) is a modular standard chassis based system designed to support the needs of carrier class telecommunication applications. It is defined by a set of industry standards under the direction of the PICMG group. One early deployment of the standard technology has been a 10 Gigabit Ethernet switch developed in the framework of the EU funded ESTA project. In order to study the practical aspects of high speed Ethernet switching at 10 Gigabit and above and to validate the signal integrity of the AdvancedTCA backplane, we developed a Backplane Tester. This system is able to run pseudo-random bit sequence (PRBS) traffic at 3.125 Gbps over every link on the AdvancedTCA backplane simultaneously, and to monitor any possible connectivity failure immediately in terms of the link and slot positions inside the chassis. In this paper, we describe the design and the practical architectural hardware and software aspects of the AdvancedTCA Backplane Tester. We also pr...

  1. A new IPQAM modulator with high integrated degree for digital TV

    Science.gov (United States)

    He, Yejun; Liu, Deming; Zhu, Guangxi; Jiang, Tao; Sun, Gongxian

    2008-12-01

    As video on demand (VOD) services are deployed, cable operators will experience a fundamental shift in their business, moving from broadcast to unicast content delivery. Another significant change is the introduction of Gigabit Ethernet into their network, which is providing an unprecedented opportunity to turn the cable operator's infrastructure into a sustainable competitive advantage. However, Gigabit Ethernet is more than just transport; it's the foundation of the Next-Generation Digital Video Network. IPQAM modulator, which is a main equipment, aren't made in China so far. It is the first time that we did design IPQAM modulator and will apply it to interactive TV based on DWDM (dense wavelength-division multiplexing). This paper introduces the principle of IPQAM modulator and transmission approach. The differences between IPQAM and conventional QAM are analysed. Some key techniques such as scrambling, statistical multiplexing, Data over Cable Service Interface Specification (DOCSIS) 3.0, software defined radio as well as DVB simulcrypt are also studied.

  2. Scalable Networking for Cloud Datacenters

    CERN Multimedia

    CERN. Geneva

    2010-01-01

    Andy will discuss the architectural evolution of Ethernet networks and switch architectures as they are being designed to address much larger cloud networking applications that require predictable throughput and latency.About the speakerAs Chief Development Officer, Andy Bechtolsheim is responsible for the overall product development and technical direction of Arista Networks.Previously Andy was a Founder and Chief System Architect at Sun Microsystems, where most recently he was responsible for industry standard server architecture. Andy was also a Founder and President of Granite Systems, a Gigabit Ethernet startup acquired by Cisco Systems in 1996. From 1996 until 2003 Andy served as VP/GM of the Gigabit Systems Business Unit at Cisco that developed the very successful Catalyst 4500 family of switches. Andy was also a Founder and President of Kealia, a next generation server company acquired by Sun in 2004.Andy received an M.S. in Computer Engineering from Carnegie Mellon University in 1976 and was a Ph.D. ...

  3. Premian record transmision de datos a 5,44 gigabits por segundo

    CERN Multimedia

    2003-01-01

    "El Laboratorio Europeo para la Fisica de Particulas (CERN) y el Instituto de Tecnologia de California (EEUU) seran galardonados con un premio por haber conseguido batir el record de velocidad de transmision por Internet a 5,44 gigabits por segundo, informaron hoy, miercoles, fuentes de ambos organismos" (1/2 page).

  4. Evaluation of restoration mechanisms for future services using Carrier Ethernet

    DEFF Research Database (Denmark)

    Wessing, Henrik; Berger, Michael Stübert; Gestsson, H.M.

    2010-01-01

    In this paper, we evaluate and classify future service according to their requirements for delay, loss and bandwidth. The most demanding services include IPTV in different forms, hence IPTV is used as a representative for future services. Carrier Ethernet technologies are introduced with special...... focus on its OAM functionalities, and it is evaluated how IPTV performs in case of link failures on a Carrier Ethernet implementation. It is concluded that OAM update times of 10 ms is required to provide acceptable restoration performance in case of errors....

  5. Using a Commercial Ethernet PHY Device in a Radiation Environment

    Science.gov (United States)

    Parks, Jeremy; Arani, Michael; Arroyo, Roberto

    2014-01-01

    This work involved placing a commercial Ethernet PHY on its own power boundary, with limited current supply, and providing detection methods to determine when the device is not operating and when it needs either a reset or power-cycle. The device must be radiation-tested and free of destructive latchup errors. The commercial Ethernet PHY's own power boundary must be supplied by a current-limited power regulator that must have an enable (for power cycling), and its maximum power output must not exceed the PHY's input requirements, thus preventing damage to the device. A regulator with configurable output limits and short-circuit protection (such as the RHFL4913, rad hard positive voltage regulator family) is ideal. This will prevent a catastrophic failure due to radiation (such as a short between the commercial device's power and ground) from taking down the board's main power. Logic provided on the board will detect errors in the PHY. An FPGA (field-programmable gate array) with embedded Ethernet MAC (Media Access Control) will work well. The error detection includes monitoring the PHY's interrupt line, and the status of the Ethernet's switched power. When the PHY is determined to be non-functional, the logic device resets the PHY, which will often clear radiation induced errors. If this doesn't work, the logic device power-cycles the FPGA by toggling the regulator's enable input. This should clear almost all radiation induced errors provided the device is not latched up.

  6. Deployment of a Testbed in a Brazilian Research Network using IPv6 and Optical Access Technologies

    Science.gov (United States)

    Martins, Luciano; Ferramola Pozzuto, João; Olimpio Tognolli, João; Chaves, Niudomar Siqueira De A.; Reggiani, Atilio Eduardo; Hortêncio, Claudio Antonio

    2012-04-01

    This article presents the implementation of a testbed and the experimental results obtained with it on the Brazilian Experimental Network of the government-sponsored "GIGA Project." The use of IPv6 integrated to current and emerging optical architectures and technologies, such as dense wavelength division multiplexing and 10-gigabit Ethernet on the core and gigabit capable passive optical network and optical distribution network on access, were tested. These protocols, architectures, and optical technologies are promising and part of a brand new worldwide technological scenario that has being fairly adopted in the networks of enterprises and providers of the world.

  7. Implementation of an Ethernet-Based Communication Channel for the Patmos Processor

    DEFF Research Database (Denmark)

    Pezzarossa, Luca; Kenn Toft, Jakob; Lønbæk, Jesper

    The Patmos processor, which is used as the intellectual property of the T-CREST platform, is only equipped with a RS-232 serial port for communication with the outside world. The serial port is a minimal input/output device with a limited speed and without native networking features. An Ethernet 10....../100BASE-T IEEE 802.3 based communication channel is a reliable and high speed communication interface (10/100 Mbits/s) that also supports networking. This technical report presents an implementation of an Ethernet-based communication channel for the Patmos processor, targeting the Terasic DE2......-115 development board. We have designed the hardware to interface the EthMac Ethernet controller from OpenCores to Patmos and to the physical chip of the development board, and we have implemented a software library to drive the controller and to support some essential protocols. The design was implemented...

  8. Flow Monitoring Experiences at the Ethernet-Layer

    NARCIS (Netherlands)

    Hofstede, Rick; Hofstede, R.J.; Drago, Idilio; Sperotto, Anna; Pras, Aiko; Lehnert, Ralf

    2011-01-01

    Flow monitoring is a scalable technology for providing summaries of network activity. Being deployed at the IP-layer, it uses fixed flow definitions, based on fields of the IP-layer and higher layers. Since several backbone network operators are considering the deployment of (Carrier) Ethernet in

  9. Experience with PACS in an ATM/Ethernet switched network environment.

    Science.gov (United States)

    Pelikan, E; Ganser, A; Kotter, E; Schrader, U; Timmermann, U

    1998-03-01

    Legacy local area network (LAN) technologies based on shared media concepts are not adequate for the growth of a large-scale picture archiving and communication system (PACS) in a client-server architecture. First, an asymmetric network load, due to the requests of a large number of PACS clients for only a few main servers, should be compensated by communication links to the servers with a higher bandwidth compared to the clients. Secondly, as the number of PACS nodes increases, the network throughout should not measurably cut production. These requirements can easily be fulfilled using switching technologies. Here asynchronous transfer mode (ATM) is clearly one of the hottest topics in networking because the ATM architecture provides integrated support for a variety of communication services, and it supports virtual networking. On the other hand, most of the imaging modalities are not yet ready for integration into a native ATM network. For a lot of nodes already joining an Ethernet, a cost-effective and pragmatic way to benefit from the switching concept would be a combined ATM/Ethernet switching environment. This incorporates an incremental migration strategy with the immediate benefits of high-speed, high-capacity ATM (for servers and high-sophisticated display workstations), while preserving elements of the existing network technologies. In addition, Ethernet switching instead of shared media Ethernet improves the performance considerably. The LAN emulation (LANE) specification by the ATM forum defines mechanisms that allow ATM networks to coexist with legacy systems using any data networking protocol. This paper points out the suitability of this network architecture in accordance with an appropriate system design.

  10. Ethernet image communication performance in a multimodal PACS network

    International Nuclear Information System (INIS)

    Lou, S.L.; Valentino, D.J.; Chan, K.K.; Huang, H.K.

    1989-01-01

    The authors have evaluated the performance of an Ethernet network in a multimodal picture archiving and communications system (PACS) environment. The study included measurements between Sun workstations and PC- AT computers running communication software at the TCP level. First they initiated image transfers between two workstations, a server and a client. Next, they successively added clients to transfer images to the server and they measured degradation in network performance. Finally, they initiated image transfers between pairs of workstations and again measured performance degradation. The results of the authors' experiments indicate that Ethernet is suitable for image communication only in limited network situations. They discuss how to maximize network performance given these constraints

  11. A computer tool to support in design of industrial Ethernet.

    Science.gov (United States)

    Lugli, Alexandre Baratella; Santos, Max Mauro Dias; Franco, Lucia Regina Horta Rodrigues

    2009-04-01

    This paper presents a computer tool to support in the project and development of an industrial Ethernet network, verifying the physical layer (cables-resistance and capacitance, scan time, network power supply-POE's concept "Power Over Ethernet" and wireless), and occupation rate (amount of information transmitted to the network versus the controller network scan time). These functions are accomplished without a single physical element installed in the network, using only simulation. The computer tool has a software that presents a detailed vision of the network to the user, besides showing some possible problems in the network, and having an extremely friendly environment.

  12. Sniffer para redes Ethernet de tempo-real baseado em FPGA

    OpenAIRE

    Faria, João Pedro Puga

    2008-01-01

    A crescente utilização de sistemas distribuídos em aplicações de tempo-real tem levado á criação de protocolos de comunicação cada vez mais com- plexos e sofisticados. Apesar da rede Ethernet não apresentar característi- cas de tempo-real, devido ás suas vantagens, têm sido desenvolvidos muitos protocolos de comunicação tempo-real baseados em Ethernet. Nesta disser- tação é analisada a importância das arquitecturas distribuídas em aplicações de tempo-real, sendo apresentados...

  13. Analysis and solutions of security issues in Ethernet PON

    Science.gov (United States)

    Meng, Yu; Jiang, Tao; Xiao, Dingzhong

    2005-02-01

    Ethernet Passive Optical Network (EPON), which combines the low cost Ethernet equipment and economic fiber infrastructure, is being considered as a promising solution for Fiber-To-The-Home (FTTH). However, since EPON is an optical shared medium network, some unique features make it more vulnerable to security attacks. In this paper, the key security threats of EPON are firstly analyzed. And then, considering some specific properties which might be utilized for security, such as the safety of transmissions in upstream direction, some novel methods are presented to solve security problems. Firstly, based on some modification about registration, the mechanism of access control is achieved. Secondly, we implement an AES-128 symmetrical encryption and decryption in the EPON system. The AES-128 algorithm can process data blocks of 128 bits, but the length of Ethernet frame is variable. How to deal with the last block, which is not up to 128 bits, is discussed in detail. Finally, key update is accomplished through a vendor specific OAM frame in order to enhance the level of security. The proposed mechanism will remain in conformance with P2MP specification defined by 802.3ah TF, and can supply a complete security solution for EPON.

  14. 40 Gbps data acquisition system for NectarCAM

    Science.gov (United States)

    Hoffmann, Dirk; Houles, Julien; NectarCAM Team; CTA Consortium, the

    2017-10-01

    The Cherenkov Telescope Array (CTA) will be the next generation ground-based gamma-ray observatory. It will be made up of approximately 100 telescopes of three different sizes, from 4 to 23 meters in diameter. The previously presented prototype of a high speed data acquisition (DAQ) system for CTA (CHEP 2012, [6]) has become concrete within the NectarCAM project, one of the most challenging camera projects with very demanding needs for bandwidth of data handling. We designed a Linux-PC system able to concentrate and process without packet loss the 40 Gb/s average data rate coming from the 265 Front End Boards (FEB) through Gigabit Ethernet links, and to reduce data to fit the two ten-Gigabit Ethernet downstream links by external trigger decisions as well as custom tailored compression algorithms. Within the given constraints, we implemented de-randomisation of the event fragments received as relatively small UDP packets emitted by the FEB, using off-the-shelf equipment as required by the project and for an operation period of at least 30 years. We tested out-of-the-box interfaces and used original techniques to cope with these requirements, and set up a test bench with hundreds of synchronous Gigabit links in order to validate and tune the acquisition chain including downstream data logging based on zeroMQ and Google ProtocolBuffers [8].

  15. Approaching Incast Congestion with Multi-host Ethernet Controllers

    CERN Document Server

    Jereczek, Grzegorz Edmund; The ATLAS collaboration

    2018-01-01

    The bursty many-to-one communication pattern, typical for data acquisition systems, but also present in datacenter networks, is particularly demanding for commodity TCP/IP and Ethernet technologies. We expand our study of building incast-resistant networks based on software switches running on commercial-off-the-shelf servers. In this paper we provide the estimates for costs and physical area required to build such a network. Our estimates indicate that our proposed design offers significant cost advantage over traditional solutions, but higher space utilisation. Next, we show how the latter can be improved with multi-host Ethernet controllers, as an alternative to typical network interface cards. This can also make software switching easier to adapt in datacenter as a solution for incast congestion. We confirm the capabilities for incast-avoidance by evaluating the performance of a reference platform.

  16. Approaching Incast Congestion with Multi-host Ethernet Controllers

    CERN Document Server

    AUTHOR|(SzGeCERN)698154; The ATLAS collaboration; Lehmann Miotto, Giovanna; Malone, David; Walukiewicz, Miroslaw

    2017-01-01

    The bursty many-to-one communication pattern, typical for data acquisition systems, but also present in datacenter networks, is particularly demanding for commodity TCP/IP and Ethernet technologies. We expand our study of building incast-resistant networks based on software switches running on commercial-off-the-shelf servers. In this paper we provide the estimates for costs and physical area required to build such a network. Our estimates indicate that our proposed design offers significant cost advantage over traditional solutions, but higher space utilisation. Next, we show how the latter can be improved with multi-host Ethernet controllers, as an alternative to typical network interface cards. This can also make software switching easier to adapt in datacenter as a solution for incast congestion. We confirm the capabilities for incast-avoidance by evaluating the performance of a reference platform.

  17. Ethernet-based test stand for a CAN network

    Science.gov (United States)

    Ziebinski, Adam; Cupek, Rafal; Drewniak, Marek

    2017-11-01

    This paper presents a test stand for the CAN-based systems that are used in automotive systems. The authors propose applying an Ethernet-based test system that supports the virtualisation of a CAN network. The proposed solution has many advantages compared to classical test beds that are based on dedicated CAN-PC interfaces: it allows the physical constraints associated with the number of interfaces that can be simultaneously connected to a tested system to be avoided, which enables the test time for parallel tests to be shortened; the high speed of Ethernet transmission allows for more frequent sampling of the messages that are transmitted by a CAN network (as the authors show in the experiment results section) and the cost of the proposed solution is much lower than the traditional lab-based dedicated CAN interfaces for PCs.

  18. A test method for analysing disturbed ethernet data streams

    Science.gov (United States)

    Kreitlow, M.; Sabath, F.; Garbe, H.

    2015-11-01

    Ethernet connections, which are widely used in many computer networks, can suffer from electromagnetic interference. Typically, a degradation of the data transmission rate can be perceived as electromagnetic disturbances lead to corruption of data frames on the network media. In this paper a software-based measuring method is presented, which allows a direct assessment of the effects on the link layer. The results can directly be linked to the physical interaction without the influence of software related effects on higher protocol layers. This gives a simple tool for a quantitative analysis of the disturbance of an Ethernet connection based on time domain data. An example is shown, how the data can be used for further investigation of mechanisms and detection of intentional electromagnetic attacks.

  19. Design and FPGA implementation for MAC layer of Ethernet PON

    Science.gov (United States)

    Zhu, Zengxi; Lin, Rujian; Chen, Jian; Ye, Jiajun; Chen, Xinqiao

    2004-04-01

    Ethernet passive optical network (EPON), which represents the convergence of low-cost, high-bandwidth and supporting multiple services, appears to be one of the best candidates for the next-generation access network. The work of standardizing EPON as a solution for access network is still underway in the IEEE802.3ah Ethernet in the first mile (EFM) task force. The final release is expected in 2004. Up to now, there has been no standard application specific integrated circuit (ASIC) chip available which fulfills the functions of media access control (MAC) layer of EPON. The MAC layer in EPON system has many functions, such as point-to-point emulation (P2PE), Ethernet MAC functionality, multi-point control protocol (MPCP), network operation, administration and maintenance (OAM) and link security. To implement those functions mentioned above, an embedded real-time operating system (RTOS) and a flexible programmable logic device (PLD) with an embedded processor are used. The software and hardware functions in MAC layer are realized through programming embedded microprocessor and field programmable gate array(FPGA). Finally, some experimental results are given in this paper. The method stated here can provide a valuable reference for developing EPON MAC layer ASIC.

  20. GigaWaM—Next-Generation WDM-PON Enabling Gigabit Per-User Data Bandwidth

    DEFF Research Database (Denmark)

    Prince, Kamau; Gibbon, Timothy Braidwood; Rodes Lopez, Roberto

    2012-01-01

    The “Gigabit access passive optical network using wavelength division multiplexing” project aims to implement 64-Gb/s data transmission over 20-km single-mode fiber. Per-user symmetric data rates of 1-Gb/s will be achieved using wavelength division multiplexing passive optical network (WDM-PON) a...

  1. Fault Tolerant Ethernet Based Network for Time Sensitive Applications in Electrical Power Distribution Systems

    Directory of Open Access Journals (Sweden)

    Leos Bohac

    2013-01-01

    Full Text Available The paper analyses and experimentally verifies deployment of Ethernet based network technology to enable fault tolerant and timely exchange of data among a number of high voltage protective relays that use proprietary serial communication line to exchange data in real time on a state of its high voltage circuitry facilitating a fast protection switching in case of critical failures. The digital serial signal is first fetched into PCM multiplexer where it is mapped to the corresponding E1 (2 Mbit/s time division multiplexed signal. Subsequently, the resulting E1 frames are then packetized and sent through Ethernet control LAN to the opposite PCM demultiplexer where the same but reverse processing is done finally sending a signal into the opposite protective relay. The challenge of this setup is to assure very timely delivery of the control information between protective relays even in the cases of potential failures of Ethernet network itself. The tolerance of Ethernet network to faults is assured using widespread per VLAN Rapid Spanning Tree Protocol potentially extended by 1+1 PCM protection as a valuable option.

  2. The use of Ethernet in the DataFlow of the ATLAS Trigger & DAQ

    CERN Document Server

    Stancu, Stefan; Dobinson, Bob; Korcyl, Krzysztof; Knezo, Emil; CHEP 2003 Computing in High Energy Physics

    2003-01-01

    The article analyzes a proposed network topology for the ATLAS DAQ DataFlow, and identifies the Ethernet features required for a proper operation of the network: MAC address table size, switch performance in terms of throughput and latency, the use of Flow Control, Virtual LANs and Quality of Service. We investigate these features on some Ethernet switches, and conclude on their usefulness for the ATLAS DataFlow network

  3. IPTV traffic management using topology-based hierarchical scheduling in Carrier Ethernet transport networks

    DEFF Research Database (Denmark)

    Yu, Hao; Yan, Ying; Berger, Michael Stubert

    2009-01-01

    Carrier Ethernet is becoming a favorable access technology for Next Generation Network (NGN). The features of cost-efficiency, operation flexibility and high bandwidth have a great attraction to service providers. However, to achieve these characteristics, Carrier Ethernet needs to have Quality o....... This work has been carried out as a part of the research project HIPT (High quality IP network for IPTV and VoIP) founded by Danish Advanced Technology Foundation....

  4. GPU-Based FFT Computation for Multi-Gigabit WirelessHD Baseband Processing

    Directory of Open Access Journals (Sweden)

    Nicholas Hinitt

    2010-01-01

    Full Text Available The next generation Graphics Processing Units (GPUs are being considered for non-graphics applications. Millimeter wave (60 Ghz wireless networks that are capable of multi-gigabit per second (Gbps transfer rates require a significant baseband throughput. In this work, we consider the baseband of WirelessHD, a 60 GHz communications system, which can provide a data rate of up to 3.8 Gbps over a short range wireless link. Thus, we explore the feasibility of achieving gigabit baseband throughput using the GPUs. One of the most computationally intensive functions commonly used in baseband communications, the Fast Fourier Transform (FFT algorithm, is implemented on an NVIDIA GPU using their general-purpose computing platform called the Compute Unified Device Architecture (CUDA. The paper, first, investigates the implementation of an FFT algorithm using the GPU hardware and exploiting the computational capability available. It then outlines the limitations discovered and the methods used to overcome these challenges. Finally a new algorithm to compute FFT is proposed, which reduces interprocessor communication. It is further optimized by improving memory access, enabling the processing rate to exceed 4 Gbps, achieving a processing time of a 512-point FFT in less than 200 ns using a two-GPU solution.

  5. Gigabit Network Communications Research, Quarterly R and D Report Number 10

    Science.gov (United States)

    1993-03-01

    EDTIC- ELECTE .SSEP01O3IS" EU * Sponsored by Advanced Research Projects Agency (DoD) Computer Systems Technology Office Gigabit Network Communications... Information ", Xylogics Inc., January 1993. RFC 1389: Malkin, G. (Xylogics Inc.), and F. Baker (Advanced Computer Communications), "RIP Version 2 MIB...Reynolds, J.K., "BOOTP Vendor Information Extensions", USC/ISI, January 1993. RFC 1396: Crocker, S., "The Process for Organization of Internet Standards

  6. Design and implementation of digital television over ethernet PON transmission system

    Science.gov (United States)

    Lu, Xi; Liu, Deming; Mao, Minjing; Wang, Jinjuan

    2005-11-01

    There are two primary methods of transmitting signal of digital television to the home in China. The first one is HFC mode, which is widely used. The other is IPTV mode, which is emerging. In this paper, the scheme of digital television over Ethernet PON is proposed. There are several differences from this system to IPTV and Video over LAN: the real-time transmission of equal-bandwidth based on statistical multiplexing, channel switching based on multicast and IP CA system, etc.. And these are also the key techniques used in this system. The architecture of DTV over EPON system, the function of every component, the framing process and the multiplexing of Ethernet frame are described. The implementation procedure of the system is shown. The mechanism of channel switching using multicast technique is designed and realized. We also present the method of using static VLAN and IGMP snooping mechanism to implement statistical multiplexing on Ethernet layer, and put forward the concept of IP Conditional Access System and define it. An experimental system of DTV over EPON is set up and the experimental result is significant.

  7. Synchronous Ethernet- Considerations and Implementation of the Packet Network Management Scheme

    Science.gov (United States)

    Gundale, A. S.; Aradhye, Ashwini

    2010-11-01

    Packet technologies were designed to work in asynchronous mode, where the oscillators in the equipment are free running. Although this allows the underlying infrastructure to operate, many applications exist that require frequency synchronization. Also, the ability to distribute synchronization from center to edge of network declines as infrastructure evolves toward a packet-based architecture. Synchronous Ethernet (SyncE) is a key development of the evolution of Ethernet into a carrier grade technology suitable for the WAN environment where frequency synchronization is required. The time of the day distribution in synchronized network at the physical layer enables many useful propositions in packet handling policies and other network management aspects.

  8. LHCb: Improvements in the LHCb DAQ

    CERN Multimedia

    Campora, D; Schwemmer, R

    2014-01-01

    The LHCb data acquisition system is realized as a Gigabit Ethernet local area network with more than 330 FPGA driven data-sources, two core-routers, 56 fan-out switches and more than 1400 servers (will be upgraded to about 1800 soon). In total there are almost 3000 switch-ports. Data are pushed top-down, quasi-synchronously using n unreliable datagram protocol (like UDP).

  9. Contribución para QoS en Redes Metropolitanas Ethernet

    Directory of Open Access Journals (Sweden)

    Omar Álvarez

    2007-11-01

    Full Text Available Los sistemas de control de acceso (ACS permiten apoyar las soluciones actuales de Calidad de Servicio. Éstos consideran entre sus variables el retardo, variación de retardo, pérdida de paquetes o una combinación para asegurar los requerimientos de calidad de servicio para sesiones de voz y video. Proponemos un ACS basado en la pérdida de paquetes de prueba extremo a extremo para la decisión de aceptar nuevas sesiones. La red de transporte será la familia Ethernet, la cual ha incursionado de manera importante en los ámbitos metropolitanos (802.3ae. El presente trabajo muestra la interoperatividad y ventajas de ME-ACS con MPLS./ The access control systems (ACS are useful to improve the Quality of Service solutions. These systems are generally based on delay, jitter or packet loss, employing more of these criteria to maintain the required quality of service requiring for voice or video sessions. We propose an ACS that employs packet loss between probes that send an end-to-end test stream before accepting additional sessions. We used Ethernet as our transport network because the 803.3ae is widely used in metropolitan area networks. This paper presents how the ACS will interoperate with MPLS and describe the improvements related to its use in a metropolitan Ethernet network.

  10. Fiber optic Ethernet transceiver for Joint STARS block I GSM

    Science.gov (United States)

    Gatens, Dennis R.; Usberghi, Michael J.

    The authors discuss the use of FiberCom's DPT dual redundant counter-rotating ring Ethernet transceiver, and its use as an integral part of the Joint STARS (Surveillance Target Attack Radar System) surface-to-air battlefield information station called the ground station module (GSM). The Ethernet transceiver uses a dual counter-rotating fiber ring architecture. The operation of the unit enables the network to have fault-tolerant capability with no single point of failure. This results from the unit's ability to reconfigure around a network failure, creating a new working segment from the remaining portion. The medium attachment unit interface conforms to ANSI/IEEE Std. 802.3-1985, the IEEE Standard for Local Area Networks-Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications.

  11. 10 Gigabit Ethernet long-haul transmission without in-line EDFAs

    Czech Academy of Sciences Publication Activity Database

    Karásek, Miroslav; Peterka, Pavel; Radil, J.

    2006-01-01

    Roč. 61, 3/4 (2006), s. 478-488 ISSN 0003-4347 R&D Projects: GA ČR(CZ) GA102/04/0773; GA MŠk(CZ) 1P05OC001 Institutional research plan: CEZ:AV0Z20670512 Keywords : optical communication * optical fibre amplifiers * wavelenght division multiplexing Subject RIV: JA - Electronics ; Optoelectronics, Electrical Engineering Impact factor: 0.168, year: 2006

  12. Application of Ethernet Powerlink for communication in a Linux RTAI open CNC control system

    OpenAIRE

    Erwiński, Krystian; Paprocki, Marcin; Grzesiak, Lech; Karwowski, Kazimierz; Wawrzak, Andrzej

    2013-01-01

    In computerized numerical control (CNC) systems, the communication bus between the controller and axis servo drives must offer high bandwidth, noise immunity, and time determinism. More and more CNC systems use real-time Ethernet protocols such as Ethernet Powerlink (EPL). Many modern controllers are closed costly hardware-based solutions. In this paper, the implementation of EPL communication bus in a PC-based CNC system is presented. The CNC system includes a PC, a s...

  13. Safety management of Ethernet broadband access based on VLAN aggregation

    Science.gov (United States)

    Wang, Li

    2004-04-01

    With broadband access network development, the Ethernet technology is more and more applied access network now. It is different from the private network -LAN. The differences lie in four points: customer management, safety management, service management and count-fee management. This paper mainly discusses the safety management related questions. Safety management means that the access network must secure the customer data safety, isolate the broad message which brings the customer private information, such as ARP, DHCP, and protect key equipment from attack. Virtue LAN (VLAN) technology can restrict network broadcast flow. We can config each customer port with a VLAN, so each customer is isolated with others. The IP address bound with VLAN ID can be routed rightly. But this technology brings another question: IP address shortage. VLAN aggregation technology can solve this problem well. Such a mechanism provides several advantages over traditional IPv4 addressing architectures employed in large switched LANs today. With VLAN aggregation technology, we introduce the notion of sub-VLANs and super-VLANs, a much more optimal approach to IP addressing can be realized. This paper will expatiate the VLAN aggregation model and its implementation in Ethernet access network. It is obvious that the customers in different sub-VLANs can not communication to each other because the ARP packet is isolated. Proxy ARP can enable the communication among them. This paper will also expatiate the proxy ARP model and its implementation in Ethernet access network.

  14. Parallel Void Thread in Long-Reach Ethernet Passive Optical Networks

    KAUST Repository

    Elrasad, Amr; Shihada, Basem

    2015-01-01

    This work investigates void filling (idle periods) in long-reach Ethernet passive optical networks. We focus on reducing grant delays and hence reducing the average packet delay. We introduce a novel approach called parallel void thread (PVT), which

  15. Using a Control System Ethernet Network as a Field Bus

    CERN Document Server

    De Van, William R; Lawson, Gregory S; Wagner, William H; Wantland, David M; Williams, Ernest

    2005-01-01

    A major component of a typical accelerator distributed control system (DCS) is a dedicated, large-scale local area communications network (LAN). The SNS EPICS-based control system uses a LAN based on the popular IEEE-802.3 set of standards (Ethernet). Since the control system network infrastructure is available throughout the facility, and since Ethernet-based controllers are readily available, it is tempting to use the control system LAN for "fieldbus" communications to low-level control devices (e.g. vacuum controllers; remote I/O). These devices may or may not be compatible with the high-level DCS protocols. This paper presents some of the benefits and risks of combining high-level DCS communications with low-level "field bus" communications on the same network, and describes measures taken at SNS to promote compatibility between devices connected to the control system network.

  16. Northwestern University trial emerging optical solutions

    CERN Multimedia

    2001-01-01

    Nortel Networks, SBC Ameritech and Northwestern University announced the creation of OMNInet (Optical Metro Network Initiative), a collaborative experimental network. The OMNInet technology trial, a four-site network located in Chicago, will provide a test bed for all-optical switching, advanced high-speed technology such as 10 gigabit Ethernet (10GE) and will test next-generation applications in healthcare, industrial design, finance and commerce.

  17. Regular Topologies for Gigabit Wide-Area Networks. Volume 1

    Science.gov (United States)

    Shacham, Nachum; Denny, Barbara A.; Lee, Diane S.; Khan, Irfan H.; Lee, Danny Y. C.; McKenney, Paul

    1994-01-01

    In general terms, this project aimed at the analysis and design of techniques for very high-speed networking. The formal objectives of the project were to: (1) Identify switch and network technologies for wide-area networks that interconnect a large number of users and can provide individual data paths at gigabit/s rates; (2) Quantitatively evaluate and compare existing and proposed architectures and protocols, identify their strength and growth potentials, and ascertain the compatibility of competing technologies; and (3) Propose new approaches to existing architectures and protocols, and identify opportunities for research to overcome deficiencies and enhance performance. The project was organized into two parts: 1. The design, analysis, and specification of techniques and protocols for very-high-speed network environments. In this part, SRI has focused on several key high-speed networking areas, including Forward Error Control (FEC) for high-speed networks in which data distortion is the result of packet loss, and the distribution of broadband, real-time traffic in multiple user sessions. 2. Congestion Avoidance Testbed Experiment (CATE). This part of the project was done within the framework of the DARTnet experimental T1 national network. The aim of the work was to advance the state of the art in benchmarking DARTnet's performance and traffic control by developing support tools for network experimentation, by designing benchmarks that allow various algorithms to be meaningfully compared, and by investigating new queueing techniques that better satisfy the needs of best-effort and reserved-resource traffic. This document is the final technical report describing the results obtained by SRI under this project. The report consists of three volumes: Volume 1 contains a technical description of the network techniques developed by SRI in the areas of FEC and multicast of real-time traffic. Volume 2 describes the work performed under CATE. Volume 3 contains the source

  18. Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

    Science.gov (United States)

    Savich, Gregory R.

    2004-01-01

    The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the

  19. The difference of delay time in monitoring system of facial acupressure learning media using bluetooth, wireless and ethernet

    Science.gov (United States)

    Agustin, Eny Widhia; Hangga, Arimaz; Fahrian, Muhammad Iqbal; Azhari, Anis Fikri

    2018-03-01

    The implementation of monitoring system in the facial acupressure learning media could increase the students' proficiency. However the common learning media still has not implemented a monitoring system in their learning process. This research was conducted to implement monitoring system in the mannequin head prototype as a learning media of facial acupressure using Bluetooth, wireless and Ethernet. The results of the implementation of monitoring system in the prototype showed that there were differences in the delay time between Bluetooth and wireless or Ethernet. The results data showed no difference in the average delay time between the use of Bluetooth with wireless and the use of Bluetooth with Ethernet in monitoring system of facial acupressure learning media. From all the facial acupressure points, the forehead facial acupressure point has the longest delay time of 11.93 seconds. The average delay time in all 3 class rooms was 1.96 seconds therefore the use of Bluetooth, wireless and Ethernet is highly recommended in the monitoring system of facial acupressure.

  20. FPGA based data-flow injection module at 10 Gbit/s reading data from network exported storage and using standard protocols

    International Nuclear Information System (INIS)

    Lemouzy, B; Garnier, J-C; Neufeld, N

    2011-01-01

    The goal of the LHCb readout upgrade is to accelerate the DAQ to 40 MHz. Such a DAQ system will certainly employ 10 Gigabit or similar technologies and might also need new networking protocols such as a customized, light-weight TCP or more specialized protocols. A test module is being implemented to be integrated in the existing LHCb infrastructure. It is a multiple 10-Gigabit traffic generator, driven by a Stratix IV FPGA, and flexible enough to generate LHCb's raw data packets. Traffic data are either internally generated or read from external storage via the network. We have implemented a light-weight industry standard protocol ATA over Ethernet (AoE) and we present an outlook of using a file-system on these network-exported disk-drivers.

  1. LHCb: FPGA based data-flow injection module at 10 Gbit/s reading data from network exported storage and using standard protocols

    CERN Multimedia

    Lemouzy, B; Garnier, J-C

    2010-01-01

    The goal of the LHCb readout upgrade is to speed up the DAQ to 40 MHz. Such a DAQ system will certainly employ 10 Gigabit or similar technologies and might also need new networking protocols such as a customized, light-weight TCP or more specialised protocols. A test module is being implemented, which integrates in the existing LHCb infrastructure. It is a multiple 10-Gigabit traffic generator, driven by a Stratix IV FPGA, which is flexibile enough to either generate LHCb's raw data packets internally or read them from external storage via the network. For reading the data we have implemented a light-weight industry standard protocol ATA over Ethernet (AoE) and we present an outlook of using a filesystem on these network-exported disk-drivers.

  2. Feasibility Study of 8-Bit Microcontroller Applications for Ethernet

    Directory of Open Access Journals (Sweden)

    Lech Gulbinovič

    2011-08-01

    Full Text Available Feasibility study of 8-bit microcontroller applications for Ethernet is presented. Designed device is based on ATmega32 microcontroller and 10 Mbps Ethernet controller ENC28J60. Device is simulated as mass queuing theoretical model with ticket booking counter. Practical explorations are accomplished and characteristics are determined. Practical results are compared to theoretical ones. Program code and device packet processing speed optimization are discussed. Microcontroller packet processing speed and packet latency depend on packet size. For ICMP protocol packet processing speed varies 1.4–2.1 Mbps, latency – 0.8–8.4 ms. UDP protocol packet processing speed varies 1.3–1.8 Mbps, latency – 1.1–9.6 ms. Packet processing speed depends on compilation settings and program code compression level. Best results are reached on optimization le­vel ‑O3, then speed increased ~3% but program code size increased 68% comparing to –Os optimization level.Article in Lithuanian

  3. Study Application of RADIUS Protocol on Ethernet

    Institute of Scientific and Technical Information of China (English)

    GUO Fang; YANG Huan-yu; LI Hong

    2004-01-01

    This paper presents how to apply the RADIUS (Remote Authentication Dial In User Service)protocol ,which is generally applied to dial-up network, to the authentication & charge of Broad Band accessing control system on Ethernet. It is provided that the Broad Band accessing control system included a self-designed communication protocol is used in communicating between an terminal user and Network Access Server .The interface module on the servers side and the Radius system is also given in this article.

  4. Highly Accurate Timestamping for Ethernet-Based Clock Synchronization

    OpenAIRE

    Loschmidt, Patrick; Exel, Reinhard; Gaderer, Georg

    2012-01-01

    It is not only for test and measurement of great importance to synchronize clocks of networked devices to timely coordinate data acquisition. In this context the seek for high accuracy in Ethernet-based clock synchronization has been significantly supported by enhancements to the Network Time Protocol (NTP) and the introduction of the Precision Time Protocol (PTP). The latter was even applied to instrumentation and measurement applications through the introduction of LXI....

  5. A scalable PC-based parallel computer for lattice QCD

    International Nuclear Information System (INIS)

    Fodor, Z.; Katz, S.D.; Pappa, G.

    2003-01-01

    A PC-based parallel computer for medium/large scale lattice QCD simulations is suggested. The Eoetvoes Univ., Inst. Theor. Phys. cluster consists of 137 Intel P4-1.7GHz nodes. Gigabit Ethernet cards are used for nearest neighbor communication in a two-dimensional mesh. The sustained performance for dynamical staggered (wilson) quarks on large lattices is around 70(110) GFlops. The exceptional price/performance ratio is below $1/Mflop

  6. A scalable PC-based parallel computer for lattice QCD

    International Nuclear Information System (INIS)

    Fodor, Z.; Papp, G.

    2002-09-01

    A PC-based parallel computer for medium/large scale lattice QCD simulations is suggested. The Eoetvoes Univ., Inst. Theor. Phys. cluster consists of 137 Intel P4-1.7 GHz nodes. Gigabit Ethernet cards are used for nearest neighbor communication in a two-dimensional mesh. The sustained performance for dynamical staggered(wilson) quarks on large lattices is around 70(110) GFlops. The exceptional price/performance ratio is below $1/Mflop. (orig.)

  7. Bidirectional and simultaneous FTTX/Ethernet services using RSOA based remodulation and polarization multiplexing technique

    Science.gov (United States)

    Das, Anindya S.; Patra, Ardhendu S.

    2015-08-01

    A bidirectional and simultaneous transmission of Ethernet, FTTX services through single optical carrier wavelength employing polarization multiplexing technique in the transmitter end and the user end. 10 Gbps and 2.5 Gbps datarates are transmitted over 50 km single mode fiber employing POLMUX technique at OLT and ONU to provide Ethernet and FTTX services concurrently to the user. Reflective semiconductor optical amplifier is used to reuse and remodulate the downlink signal to uplink transmission. The upstream and the downstream transmission performances are observed by the bit error rate values and the eye diagrams obtained by the BER analyzer.

  8. Time synchronization for an Ethernet-based real-time token network

    NARCIS (Netherlands)

    Hanssen, F.T.Y.; van den Boom, Joost; Jansen, P.G.; Scholten, Johan

    We present a distributed clock synchronization algorithm. It performs clock synchronization on an Ethernet-based real-time token local area network, without the use of an external clock source. It is used to enable the token schedulers in each node to agree upon a common time. Its intended use is in

  9. Simultaneous transmission of the IEEE 802.11 radio signal and optical Gbit Ethernet over the multimode fiber link

    Science.gov (United States)

    Maksymiuk, L.; Podziewski, A.

    2015-09-01

    In the paper we present a successful joint transmission of the IEEE 802.11 signal and an optical Gbit Ethernet over a multimode fiber based link. Most importantly, the multiplexation of both signals was performed in the optical domain. Due to the utilization of the multimode fiber the OBI noise was avoided and both channels were able to operate at the same wavelength. We prove that potential RoF link for IEEE 802.11 signal distribution may be used to additionally transmit other signals as Gbit Ethernet and therefore utilize the fiber infrastructure installed more effectively. The qualities of both the IEEE 802.11 and Ethernet transmissions fulfilled the requirements imposed by appropriate standards.

  10. Front-end DAQ strategy and implementation for the KLOE-2 experiment

    Science.gov (United States)

    Branchini, P.; Budano, A.; Balla, A.; Beretta, M.; Ciambrone, P.; De Lucia, E.; D'Uffizi, A.; Marciniewski, P.

    2013-04-01

    A new front-end data acquisition (DAQ) system has been conceived for the data collection of the new detectors which will be installed by the KLOE2 collaboration. This system consists of a general purpose FPGA based DAQ module and a VME board hosting up to 16 optical links. The DAQ module has been built around a Virtex-4 FPGA and it is able to acquire up to 1024 different channels distributed over 16 front-end slave cards. Each module is a general interface board (GIB) which performs also first level data concentration tasks. The GIB has an optical interface, a RS-232, an USB and a Gigabit Ethernet Interface. The optical interface will be used for DAQ purposes while the Gigabit Ethernet interface for monitoring tasks and debug. Two new detectors exploit this strategy to collect data. Optical links are used to deliver data to the VME board which performs data concentration tasks. The return optical link from the board to the GIB is used to initialize the front-end cards. The VME interface of the module implements the VME 2eSST protocol in order to sustain a peak data rate of up to 320 MB/s. At the moment the system is working at the Frascati National Laboratory (LNF).

  11. Front-end DAQ strategy and implementation for the KLOE-2 experiment

    International Nuclear Information System (INIS)

    Branchini, P; Budano, A; Balla, A; Beretta, M; Ciambrone, P; Lucia, E De; D'Uffizi, A; Marciniewski, P

    2013-01-01

    A new front-end data acquisition (DAQ) system has been conceived for the data collection of the new detectors which will be installed by the KLOE2 collaboration. This system consists of a general purpose FPGA based DAQ module and a VME board hosting up to 16 optical links. The DAQ module has been built around a Virtex-4 FPGA and it is able to acquire up to 1024 different channels distributed over 16 front-end slave cards. Each module is a general interface board (GIB) which performs also first level data concentration tasks. The GIB has an optical interface, a RS-232, an USB and a Gigabit Ethernet Interface. The optical interface will be used for DAQ purposes while the Gigabit Ethernet interface for monitoring tasks and debug. Two new detectors exploit this strategy to collect data. Optical links are used to deliver data to the VME board which performs data concentration tasks. The return optical link from the board to the GIB is used to initialize the front-end cards. The VME interface of the module implements the VME 2eSST protocol in order to sustain a peak data rate of up to 320 MB/s. At the moment the system is working at the Frascati National Laboratory (LNF).

  12. HIPPI-6400 -- Designing for speed

    Energy Technology Data Exchange (ETDEWEB)

    Tolmie, D.E.

    1998-03-01

    The emerging High Performance Parallel Interface 6400 Mbit/s interface (HIPPI-6400), is targeted as a local area network (LAN), or system area network (SAN), supporting data rates of 6400 Mbit/s (800 Mbyte/s). This is eight times the speed of Gigabit Ethernet. The features used, and the design choices made, for the data link and physical layers of HIPPI-6400, to achieve this unprecedented speed are the subject of this paper. HIPPI-6400 borrowed freely from other successful technologies such as ATM, Ethernet and the original HIPPI -- taking the best features of each and melding them with some new features. HIPPI-6400 is a cost effective reliable interconnect for distances up to 1 km; it intermixes large and small messages efficiently.

  13. LHCb: Hardware Data Injector

    CERN Multimedia

    Delord, V; Neufeld, N

    2009-01-01

    The LHCb High Level Trigger and Data Acquisition system selects about 2 kHz of events out of the 1 MHz of events, which have been selected previously by the first-level hardware trigger. The selected events are consolidated into files and then sent to permanent storage for subsequent analysis on the Grid. The goal of the upgrade of the LHCb readout is to lift the limitation to 1 MHz. This means speeding up the DAQ to 40 MHz. Such a DAQ system will certainly employ 10 Gigabit or technologies and might also need new networking protocols: a customized TCP or proprietary solutions. A test module is being presented, which integrates in the existing LHCb infrastructure. It is a 10-Gigabit traffic generator, flexible enough to generate LHCb's raw data packets using dummy data or simulated data. These data are seen as real data coming from sub-detectors by the DAQ. The implementation is based on an FPGA using 10 Gigabit Ethernet interface. This module is integrated in the experiment control system. The architecture, ...

  14. Predictive Displays for High Latency Teleoperation

    Science.gov (United States)

    2016-08-04

    image is then projected back onto a virtual image plane to account for the forward motion. This gives a reasonable estimate as to what the...Microsoft Windows 7 Professional 64 bit as shown in Figure 15. They were connected via a gigabit Ethernet LAN and passed all relevant information via... LAN . In this case it was configured to run three processes on the same machine as shown in Figure 16. Information is passed between these

  15. Design and Construction of a High-speed Network Connecting All the Protein Crystallography Beamlines at the Photon Factory

    International Nuclear Information System (INIS)

    Matsugaki, Naohiro; Yamada, Yusuke; Igarashi, Noriyuki; Wakatsuki, Soichi

    2007-01-01

    A private network, physically separated from the facility network, was designed and constructed which covered all the four protein crystallography beamlines at the Photon Factory (PF) and Structural Biology Research Center (SBRC). Connecting all the beamlines in the same network allows for simple authentication and a common working environment for a user who uses multiple beamlines. Giga-bit Ethernet wire-speed was achieved for the communication among the beamlines and SBRC buildings

  16. Data transmission optical link for RF-GUN project

    Science.gov (United States)

    Olowski, Krzysztof; Zielinski, Jerzy; Jalmuzna, Wojciech; Pozniak, Krzysztof; Romaniuk, Ryszard

    2005-09-01

    Today, the fast optical data transmission is one of the fundamentals of modern distributed control systems. The fibers are widely use as multi-gigabit data stream medium. For a short range transmission, the multimode fibers are in common use. The data rate for this kind of transmission exceeds 10 Gbps for 10 Gigabit Ethernet and 10G Fibre Channel protocols. The Field Programmable Gate Arrays are one of the opportunities of managing the optical transmission. This article is concerning a synchronous optical transmission system via a multimode fiber. The transmission is controlled by the FPGA of two manufacturers: Xilinx and Altera. This paper contains the newest technology overview and market device parameters. It also describes a board for the optical transmission, technical details of the transmission and optical transmission results.

  17. Overflow control mechanism (OCM) for Ethernet passive optical networks (EPONs)

    Science.gov (United States)

    Hajduczenia, Marek; da Silva, Henrique J. A.; Monteiro, Paulo P.

    2007-05-01

    The nonfragmentable nature of Ethernet data frames, as well as operation of the priority oriented packet schedulers in the optical network units, in conjunction with heavy network load conditions and the lack of detailed knowledge about the queue's composition at the optical line terminal (OLT) level, result in the creation of upstream channel slot remainders. The existing methods, in the form of nonpreemptive packet schedulers and multithreshold reporting process defined vaguely by the IEEE 802.3-2005 standard, result in either increased packet delay or Ethernet passive optical network (EPON) system incompatibility, respectively, since threshold processing was never officially defined in the scope of the respective EPON standard. We propose an alternative approach, based on basic modifications of the standard and extended GATE multipoint control protocol data unit format and meaning, allowing for the OLT packet scheduling agent to grant always exactly the requested slot size, thus preventing creation of any upstream channel slot remainders. It is estimated that, on average, ˜3% of upstream channel bandwidth can be salvaged when slot remainders are absent in the upstream channel transmission.

  18. Including 10-Gigabit-capable Passive Optical Network under End-to-End Generalized Multi-Protocol Label Switching Provisioned Quality of Service

    DEFF Research Database (Denmark)

    Brewka, Lukasz Jerzy; Gavler, Anders; Wessing, Henrik

    2012-01-01

    of the network where quality of service signaling is bridged. This article proposes strategies for generalized multi-protocol label switching control over next emerging passive optical network standard, i.e., the 10-gigabit-capable passive optical network. Node management and resource allocation approaches...... are discussed, and possible issues are raised. The analysis shows that consideration of a 10-gigabit-capable passive optical network as a generalized multi-protocol label switching controlled domain is valid and may advance end-to-end quality of service provisioning for passive optical network based customers.......End-to-end quality of service provisioning is still a challenging task despite many years of research and development in this area. Considering a generalized multi-protocol label switching based core/metro network and resource reservation protocol capable home gateways, it is the access part...

  19. Synchronization and NRZ-to-RZ format conversion of 10 G Ethernet packet based on a time lens

    DEFF Research Database (Denmark)

    Hu, Hao; Laguardia Areal, Janaina; Palushani, Evarist

    2010-01-01

    10 G Ethernet packet with maximum frame size of 1518 bytes is synchronized to a global clock using a time lens. The 10 Gb/s NRZ signal is converted into RZ signal at the same time.......10 G Ethernet packet with maximum frame size of 1518 bytes is synchronized to a global clock using a time lens. The 10 Gb/s NRZ signal is converted into RZ signal at the same time....

  20. "A Fiber Optic Ethernet With Inherent Migration Capability To FDDI"

    Science.gov (United States)

    Ferris, Kenneth D.; Chan, Tammy S.

    1988-12-01

    A Local Area Network (LAN) designed to a standard commercial interface, the Institute of Electrical and Electronics Engineers (IEEE) 802.3 or Ethernet, has been developed using fiber optics as the physical medium. The LAN, WhisperNet, operates in an active ring and thus has an inherent low cost migration path to a Fiber Distributed Data Interface (FDDI) implementation.

  1. Experimental quantum key distribution at 1.3 gigabit-per-second secret-key rate over a 10 dB loss channel

    Science.gov (United States)

    Zhang, Zheshen; Chen, Changchen; Zhuang, Quntao; Wong, Franco N. C.; Shapiro, Jeffrey H.

    2018-04-01

    Quantum key distribution (QKD) enables unconditionally secure communication ensured by the laws of physics, opening a promising route to security infrastructure for the coming age of quantum computers. QKD’s demonstrated secret-key rates (SKRs), however, fall far short of the gigabit-per-second rates of classical communication, hindering QKD’s widespread deployment. QKD’s low SKRs are largely due to existing single-photon-based protocols’ vulnerability to channel loss. Floodlight QKD (FL-QKD) boosts SKR by transmitting many photons per encoding, while offering security against collective attacks. Here, we report an FL-QKD experiment operating at a 1.3 Gbit s‑1 SKR over a 10 dB loss channel. To the best of our knowledge, this is the first QKD demonstration that achieves a gigabit-per-second-class SKR, representing a critical advance toward high-rate QKD at metropolitan-area distances.

  2. Power-over-ethernet for remote measurement and control

    International Nuclear Information System (INIS)

    Behera, Rajendra Prasad; Murali, N.

    2011-01-01

    Power-Over-Ethernet (PoE) technology (IEEE standard 802.3af) allows Remote Measurement and Control in harsh environment where human access is difficult in various nuclear research fields. The terminal measurement and control unit receives power for its operation and communicates data over the same LAN cable, without needing to provide power supplies from different source. Almost all data acquisition systems require both data connectivity and a power supply. In a familiar example, telephones are powered from the telephone exchange through the same twisted pair that carries the voice. Now we can do the same thing with Ethernet devices by combining power and data. Only one set of wires is required to bring to the end measurement and control unit which will simplify installation and save space. Remote unit can be easily moved, to wherever a LAN cable can be laid with minimal disruption to the workplace. It is safer as no mains supply is required. Uninterrupted power supply can be guaranteed to the terminal unit during mains power failure. The terminal unit can be shut down and reset remotely without needing for a reset button and power switch. Simple Network Management Protocol (SNMP) can be used to monitor and control the remote unit. PoE will enable to deploy many more embedded systems in nuclear and other industry like Voice over Internet Protocol (VoIP), Security Camera, Tele-information System, Remote Access Control System, Intruder Detection System, and Tele-Medicine System, etc. (author)

  3. Broadband Packaging of Photodetectors for 100 Gb/s Ethernet Applications

    DEFF Research Database (Denmark)

    Jiang, Chenhui; Krozer, Viktor; Bach, Heinz-Gunter

    2013-01-01

    The packing structure of functional modules is a major limitaion in achieving a desired performance for 100 Gb/s ethernet applications. This paper presents a methodology of developing advanced packaging of photodetectors (PDs) for high-speed data transmission applications by using 3-D electromagn......The packing structure of functional modules is a major limitaion in achieving a desired performance for 100 Gb/s ethernet applications. This paper presents a methodology of developing advanced packaging of photodetectors (PDs) for high-speed data transmission applications by using 3-D...... electromagnetic (EM) simulations. A simplified model of the PD module is first used to analyze and optimize packaging structures and propose an optimal packaging design based on the simplified model. Although a PD module with improved performance proved the success of the optimal packaging design, the simplified...... of limiting the bandwidth of PD modules. After eliminating the mode mismatch effect by improving the chip-conductor-backed coplanar waveguide transition, a final optimal packaging structure is implemented for the PD module with reduced attenuation up to 100 GHz and a broader 3-dB bandwidth of more than 90 GHz...

  4. New Ethernet Based Optically Transparent Network for Fiber-to-the-Desk Application

    NARCIS (Netherlands)

    Radovanovic, Igor; van Etten, Wim

    2003-01-01

    We present a new optical local area network architecture based on multimode optical fibers and components, short wavelength lasers and detectors and the widely used fast Ethernet protocol. The presented optically transparent network represent a novel approach in fiber-to-the-desk applications. It is

  5. ETHERBONE - a network layer for the wishbone SoC bus

    International Nuclear Information System (INIS)

    Kreider, M.; Terpstra, W.; Lewis, J.; Serrano, J.; Wlostowski, T.

    2012-01-01

    Today, there are several System on a Chip (SoC) bus systems. Typically, these buses are confined on-chip and rely on higher level components to communicate with the outside world. Taking these systems a step further, we see the possibility of extending the reach of the SoC bus to remote FPGAs or processors. This leads to the idea of the EtherBone (EB) core, which connects a Wishbone (WB) Ver. 4 Bus via a Gigabit Ethernet based network link to remote peripheral devices. EB acts as a transparent interconnect module towards attached WB Bus devices. Address information and data from one or more WB bus cycles is preceded with a descriptive header and encapsulated in a UDP/IP packet. Because of this standard compliance, EB is able to traverse Wide Area Networks and is therefore not bound to a geographic location. Due to the low level nature of the WB bus, EB provides a sound basis for remote hardware tools like a JTAG debugger, In-System-Programmer (ISP), boundary scan interface or logic analyser module. EB was developed in the scope of the White-Rabbit Timing Project (WR) at CERN and GSI/FAIR, which employs GigaBit Ethernet technology to communicate with memory mapped slave devices. WR will make use of EB as means to issue commands to its timing nodes and control connected accelerator hardware. (authors)

  6. Performance analysis of Ethernet PON system accommodating 64 ONUs

    Science.gov (United States)

    Tanaka, Keiji; Ohara, Kazuho; Miyazaki, Noriyuki; Edagawa, Noboru

    2007-05-01

    We report the performance of an IEEE 802.3 standard compliant Ethernet passive optical network (EPON) system accommodating 64 optical network units (ONUs). After investigating the optical transmission performance, we successfully demonstrate that a high throughput of more than 900Mbits/s can be achieved in a 64-ONU EPON system using multiple logical link identifiers per ONU within a range of 10km. In addition, we confirm the feasibility of IP-based high-quality triple play services in the EPON system.

  7. FPGA based, modular, configurable controller with fast synchronous optical network

    Energy Technology Data Exchange (ETDEWEB)

    Graczyk, R.; Pozniak, K.T.; Romaniuk, R.S. [Warsaw Univ. of Technology (Poland). Inst. of Electronic Systems

    2006-07-01

    The paper describes a configurable controller equipped with programmable VLSI FPGA circuit, universal expansion modules PMC, synchronous, optical, multi-gigabit links, commonly used industrial and computer communication interfaces, Ethernet 100TB, system of automatic initialization ACE etc. There are characterized the basic functional characteristics of the device. The possibilities of its usage in various work modes were presented. Realization of particular blocks of the device were discussed. Resulting, during the realization of this project, new hardware layer solutions were also characterized. (orig.)

  8. FPGA based, modular, configurable controller with fast synchronous optical network

    International Nuclear Information System (INIS)

    Graczyk, R.; Pozniak, K.T.; Romaniuk, R.S.

    2006-01-01

    The paper describes a configurable controller equipped with programmable VLSI FPGA circuit, universal expansion modules PMC, synchronous, optical, multi-gigabit links, commonly used industrial and computer communication interfaces, Ethernet 100TB, system of automatic initialization ACE etc. There are characterized the basic functional characteristics of the device. The possibilities of its usage in various work modes were presented. Realization of particular blocks of the device were discussed. Resulting, during the realization of this project, new hardware layer solutions were also characterized. (orig.)

  9. Conversion of asynchronous 10 Gbit/s Ethernet NRZ frame into a synchronous RZ frame and multiplexing to 170 Gbit/s

    DEFF Research Database (Denmark)

    Laguardia Areal, Janaina; Hu, Hao; Palushani, Evarist

    2010-01-01

    This paper presents an optical circuit for frame synchronization and pulse compression of 10G Ethernet frames with 12000 bits and multiplexing to a 170 Gbit/s optical time division multiplexed data stream.......This paper presents an optical circuit for frame synchronization and pulse compression of 10G Ethernet frames with 12000 bits and multiplexing to a 170 Gbit/s optical time division multiplexed data stream....

  10. The integration of multiple OS-9 stations with a VAX/VMS host via Ethernet

    International Nuclear Information System (INIS)

    Charity, T.

    1989-01-01

    In this paper a method for providing embedded microprocessors with virtual disk storage capacity and remote terminal access from a VAX/VMS host via Ethernet is described. The underlying Ethernet driver permits different network protocols to be co-resident in the microprocessors. The system described is in use in many experiments at CERN and elsewhere, and provides a cheap and effective method for sharing data and programs between microprocessors and VAX/VMS systems. Existing approaches to these problems required sole use of a dedicated intelligent network interface, and were biased towards VMEbus systems. One of the goals of the design was to provide a highly transparent and easy-to-use development environment such that users would appear to be working on dedicated microprocessor workstations, unaware of the underlying network connections

  11. Giga-bit optical data transmission module for Beam Instrumentation

    CERN Document Server

    Roedne, L T; Cenkeramaddi, L R; Jiao, L

    Particle accelerators require electronic instrumentation for diagnostic, assessment and monitoring during operation of the transferring and circulating beams. A sensor located near the beam provides an electrical signal related to the observable quantity of interest. The front-end electronics provides analog-to-digital conversion of the quantity being observed and the generated data are to be transferred to the external digital back-end for data processing, and to display to the operators and logging. This research project investigates the feasibility of radiation-tolerant giga-bit data transmission over optic fibre for beam instrumentation applications, starting from the assessment of the state of the art technology, identification of challenges and proposal of a system level solution, which should be validated with a PCB design in an experimental setup. Radiation tolerance of 10 kGy (Si) Total Ionizing Dose (TID) over 10 years of operation, Bit Error Rate (BER) 10-6 or better. The findings and results of th...

  12. Ka-Band, Multi-Gigabit-Per-Second Transceiver

    Science.gov (United States)

    Simons, Rainee N.; Wintucky, Edwin G.; Smith, Francis J.; Harris, Johnny M.; Landon, David G.; Haddadin, Osama S.; McIntire, William K.; Sun, June Y.

    2011-01-01

    A document discusses a multi-Gigabit-per-second, Ka-band transceiver with a software-defined modem (SDM) capable of digitally encoding/decoding data and compensating for linear and nonlinear distortions in the end-to-end system, including the traveling-wave tube amplifier (TWTA). This innovation can increase data rates of space-to-ground communication links, and has potential application to NASA s future spacebased Earth observation system. The SDM incorporates an extended version of the industry-standard DVB-S2, and LDPC rate 9/10 FEC codec. The SDM supports a suite of waveforms, including QPSK, 8-PSK, 16-APSK, 32- APSK, 64-APSK, and 128-QAM. The Ka-band and TWTA deliver an output power on the order of 200 W with efficiency greater than 60%, and a passband of at least 3 GHz. The modem and the TWTA together enable a data rate of 20 Gbps with a low bit error rate (BER). The payload data rates for spacecraft in NASA s integrated space communications network can be increased by an order of magnitude (>10 ) over current state-of-practice. This innovation enhances the data rate by using bandwidth-efficient modulation techniques, which transmit a higher number of bits per Hertz of bandwidth than the currently used quadrature phase shift keying (QPSK) waveforms.

  13. Fronthaul evolution: From CPRI to Ethernet

    Science.gov (United States)

    Gomes, Nathan J.; Chanclou, Philippe; Turnbull, Peter; Magee, Anthony; Jungnickel, Volker

    2015-12-01

    It is proposed that using Ethernet in the fronthaul, between base station baseband unit (BBU) pools and remote radio heads (RRHs), can bring a number of advantages, from use of lower-cost equipment, shared use of infrastructure with fixed access networks, to obtaining statistical multiplexing and optimised performance through probe-based monitoring and software-defined networking. However, a number of challenges exist: ultra-high-bit-rate requirements from the transport of increased bandwidth radio streams for multiple antennas in future mobile networks, and low latency and jitter to meet delay requirements and the demands of joint processing. A new fronthaul functional division is proposed which can alleviate the most demanding bit-rate requirements by transport of baseband signals instead of sampled radio waveforms, and enable statistical multiplexing gains. Delay and synchronisation issues remain to be solved.

  14. IP, ethernet and MPLS networks resource and fault management

    CERN Document Server

    Perez, André

    2013-01-01

    This book summarizes the key Quality of Service technologies deployed in telecommunications networks: Ethernet, IP, and MPLS. The QoS of the network is made up of two parts: fault and resource management. Network operation quality is among the functions to be fulfilled in order to offer QoS to the end user. It is characterized by four parameters: packet loss, delay, jitter or the variation of delay over time, and availability. Resource management employs mechanisms that enable the first three parameters to be guaranteed or optimized. Fault management aims to ensure continuity of service.

  15. Commercialized VCSEL components fabricated at TrueLight Corporation

    Science.gov (United States)

    Pan, Jin-Shan; Lin, Yung-Sen; Li, Chao-Fang A.; Chang, C. H.; Wu, Jack; Lee, Bor-Lin; Chuang, Y. H.; Tu, S. L.; Wu, Calvin; Huang, Kai-Feng

    2001-05-01

    TrueLight Corporation was found in 1997 and it is the pioneer of VCSEL components supplier in Taiwan. We specialize in the production and distribution of VCSEL (Vertical Cavity Surface Emitting Laser) and other high-speed PIN-detector devices and components. Our core technology is developed to meet blooming demand of fiber optic transmission. Our intention is to diverse the device application into data communication, telecommunication and industrial markets. One mission is to provide the high performance, highly reliable and low-cost VCSEL components for data communication and sensing applications. For the past three years, TrueLight Corporation has entered successfully into the Gigabit Ethernet and the Fiber Channel data communication area. In this paper, we will focus on the fabrication of VCSEL components. We will present you the evolution of implanted and oxide-confined VCSEL process, device characterization, also performance in Gigabit data communication and the most important reliability issue

  16. Ethernet based data logger for gaseous detectors

    Science.gov (United States)

    Swain, S.; Sahu, P. K.; Sahu, S. K.

    2018-05-01

    A data logger is designed to monitor and record ambient parameters such as temperature, pressure and relative humidity along with gas flow rate as a function of time. These parameters are required for understanding the characteristics of gas-filled detectors such as Gas Electron Multiplier (GEM) and Multi-Wire Proportional Counter (MWPC). The data logger has different microcontrollers and has been interfaced to an ethernet port with a local LCD unit for displaying all measured parameters. In this article, the explanation of the data logger design, hardware, and software description of the master microcontroller and the DAQ system along with LabVIEW interface client program have been presented. We have implemented this device with GEM detector and displayed few preliminary results as a function of above parameters.

  17. Replacing the Ethernet access mechanism with the real-time access mechanism of Twentenet

    NARCIS (Netherlands)

    Pras, Aiko

    1989-01-01

    The way in which a Local Area Network access mechanism (Medium Access Control protocol) designed for a specific type of physical service can be used on top of another type of physical service is discussed using a particular example. In the example, an Ethernet physical layer is used to provide

  18. The Design of Passive Optical Networking+Ethernet over Coaxial Cable Access Networking and Video-on-Demand Services Carrying

    Science.gov (United States)

    Ji, Wei

    2013-07-01

    Video on demand is a very attractive service used for entertainment, education, and other purposes. The design of passive optical networking+Ethernet over coaxial cable accessing and a home gateway system is proposed. The network integrates the passive optical networking and Ethernet over coaxial cable to provide high dedicated bandwidth for the metropolitan video-on-demand services. Using digital video broadcasting, IP television protocol, unicasting, and broadcasting mechanisms maximizes the system throughput. The home gateway finishes radio frequency signal receiving and provides three kinds of interfaces for high-definition video, voice, and data, which achieves triple-play and wire/wireless access synchronously.

  19. Performance of the HADES DAQ in Au+Au

    Energy Technology Data Exchange (ETDEWEB)

    Michel, Jan [Goethe Univ. Frankfurt am Main (Germany); Collaboration: HADES-Collaboration

    2013-07-01

    The High Acceptance DiElectron Spectrometer (HADES) is located at the SIS-18 accelerator at the GSI Helmholtz Center for Heavy Ion Research in Darmstadt. In April 2012 a five-week experimental run using a 1.23 AGeV gold beam focused on a 15-fold segmented gold target was conducted. One major reason for this successful data taking was the upgraded data acquisition system. An optical network running a customized network protocol (TrbNet) connects the frontend modules with read-out nodes. Here the data stream is converted to Gigabit Ethernet packets which are subsequently transported to a server farm using commodity hardware. All electronic components are supervised using a new, web-based monitoring system making use of the inherent slow-control features of TrbNet. In total, the system comprises of 550 FPGA-based modules, 30 Gigabit Ethernet links, four multi-core servers and 150 TB of local disk storage. The whole system is able to record event data in heavy-ion collisions at rates of up to 30 kHz and 800 MByte/s. During the experiment, the mean rates were 8 kHz and 150 MByte/s respectively mainly due to detector constraints. As a result, 7.7 . 10{sup 9} events with a total volume of 140 TB were recorded throughout the run. In this contribution the set-up, performance figures and the slow-control concept are shown.

  20. CMOS Receiver Front-ends for Gigabit Short-Range Optical Communications

    CERN Document Server

    Aznar, Francisco; Calvo Lopez, Belén

    2013-01-01

    This book describes optical receiver solutions integrated in standard CMOS technology, attaining high-speed short-range transmission within cost-effective constraints.  These techniques support short reach applications, such as local area networks, fiber-to-the-home and multimedia systems in cars and homes. The authors show how to implement the optical front-end in the same technology as the subsequent digital circuitry, leading to integration of the entire receiver system in the same chip.  The presentation focuses on CMOS receiver design targeting gigabit transmission along a low-cost, standardized plastic optical fiber up to 50m in length.  This book includes a detailed study of CMOS optical receiver design – from building blocks to the system level. Reviews optical communications, including long-haul transmission systems and emerging applications focused on short-range; Explains necessary fundamentals, such as characteristics of a data signal, system requirements affecting receiver design and key par...

  1. A Systematic Scheme for Multiple Access in Ethernet Passive Optical Access Networks

    Science.gov (United States)

    Ma, Maode; Zhu, Yongqing; Hiang Cheng, Tee

    2005-11-01

    While backbone networks have experienced substantial changes in the last decade, access networks have not changed much. Recently, passive optical networks (PONs) seem to be ready for commercial deployment as access networks, due to the maturity of a number of enabling technologies. Among the PON technologies, Ethernet PON (EPON) standardized by the IEEE 802.3ah Ethernet in the First Mile (EFM) Task Force is the most attractive one because of its high speed, low cost, familiarity, interoperability, and low overhead. In this paper, we consider the issue of upstream channel sharing in the EPONs. We propose a novel multiple-access control scheme to provide bandwidth-guaranteed service for high-demand customers, while providing best effort service to low-demand customers according to the service level agreement (SLA). The analytical and simulation results prove that the proposed scheme performs best in what it is designed to do compared to another well-known scheme that has not considered providing differentiated services. With business customers preferring premium services with guaranteed bandwidth and residential users preferring low-cost best effort services, our scheme could benefit both groups of subscribers, as well as the operators.

  2. On the upgrade of an optical code division PON with a code-sense ethernet MAC protocol

    NARCIS (Netherlands)

    Huiszoon, B.; Waardt, de H.; Khoe, G.D.; Koonen, A.M.J.

    2007-01-01

    We propose, for the first time, optical code-sense multiple access / collision detection to upgrade an optical code division passive optical network with minor modifications to transparently deploy Ethernet (or packet) based services.

  3. Parallel Processing Performance Evaluation of Mixed T10/T100 Ethernet Topologies on Linux Pentium Systems

    National Research Council Canada - National Science Library

    Decato, Steven

    1997-01-01

    ... performed on relatively inexpensive off the shelf components. Alternative network topologies were implemented using 10 and 100 megabit-per-second Ethernet cards under the Linux operating system on Pentium based personal computer platforms...

  4. Effects of lens distortion calibration patterns on the accuracy of monocular 3D measurements

    CSIR Research Space (South Africa)

    De Villiers, J

    2011-11-01

    Full Text Available choice (e.g. the open computer vision (OpenCV) library [4], Caltech Camera Calibration Toolbox [5]) as the intersections can be found extremely accurately by finding the saddle point of the intensity profile about the intersection as described... to capture and process data in order to calibrate it. A. Equipment specification A 1600-by-1200 Prosilica GE1660 Gigabit Ethernet ma- chine vision camera was mated with a Schneider Cinegon 4.8mm/f1.4 lens for use in this work. This lens has an 82...

  5. Broadband Optical Access Technologies to Converge towards a Broadband Society in Europe

    Science.gov (United States)

    Coudreuse, Jean-Pierre; Pautonnier, Sophie; Lavillonnière, Eric; Didierjean, Sylvain; Hilt, Benoît; Kida, Toshimichi; Oshima, Kazuyoshi

    This paper provides insights on the status of broadband optical access market and technologies in Europe and on the expected trends for the next generation optical access networks. The final target for most operators, cities or any other player is of course FTTH (Fibre To The Home) deployment although we can expect intermediate steps with copper or wireless technologies. Among the two candidate architectures for FTTH, PON (Passive Optical Network) is by far the most attractive and cost effective solution. We also demonstrate that Ethernet based optical access network is very adequate to all-IP networks without any incidence on the level of quality of service. Finally, we provide feedback from a FTTH pilot network in Colmar (France) based on Gigabit Ethernet PON technology. The interest of this pilot lies on the level of functionality required for broadband optical access networks but also on the development of new home network configurations.

  6. Implementation of MP_Lite for the VI Architecture

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Weiyi [Iowa State Univ., Ames, IA (United States)

    2001-01-01

    MP_Lite is a light weight message-passing library designed to deliver the maximum performance to applications in a portable and user friendly manner. The Virtual Interface (VI) architecture is a user-level communication protocol that bypasses the operating system to provide much better performance than traditional network architectures. By combining the high efficiency of MP_Lite and high performance of the VI architecture, they are able to implement a high performance message-passing library that has much lower latency and better throughput. The design and implementation of MP_Lite for M-VIA, which is a modular implementation of the VI architecture on Linux, is discussed in this thesis. By using the eager protocol for sending short messages, MP_Lite M-VIA has much lower latency on both Fast Ethernet and Gigabit Ethernet. The handshake protocol and RDMA mechanism provides double the throughput that MPICH can deliver for long messages. MP_Lite M-VIA also has the ability to channel-bonding multiple network interface cards to increase the potential bandwidth between nodes. Using multiple Fast Ethernet cards can double or even triple the maximum throughput without increasing the cost of a PC cluster greatly.

  7. Ethernet access network based on free-space optic deployment technology

    Science.gov (United States)

    Gebhart, Michael; Leitgeb, Erich; Birnbacher, Ulla; Schrotter, Peter

    2004-06-01

    The satisfaction of all communication needs from single households and business companies over a single access infrastructure is probably the most challenging topic in communications technology today. But even though the so-called "Last Mile Access Bottleneck" is well known since more than ten years and many distribution technologies have been tried out, the optimal solution has not yet been found and paying commercial access networks offering all service classes are still rare today. Conventional services like telephone, radio and TV, as well as new and emerging services like email, web browsing, online-gaming, video conferences, business data transfer or external data storage can all be transmitted over the well known and cost effective Ethernet networking protocol standard. Key requirements for the deployment technology driven by the different services are high data rates to the single customer, security, moderate deployment costs and good scalability to number and density of users, quick and flexible deployment without legal impediments and high availability, referring to the properties of optical and wireless communication. We demonstrate all elements of an Ethernet Access Network based on Free Space Optic distribution technology. Main physical parts are Central Office, Distribution Network and Customer Equipment. Transmission of different services, as well as configuration, service upgrades and remote control of the network are handled by networking features over one FSO connection. All parts of the network are proven, the latest commercially available technology. The set up is flexible and can be adapted to any more specific need if required.

  8. Modeling and characterization of VCSEL-based avionics full-duplex ethernet (AFDX) gigabit links

    Science.gov (United States)

    Ly, Khadijetou S.; Rissons, A.; Gambardella, E.; Bajon, D.; Mollier, J.-C.

    2008-02-01

    Low cost and intrinsic performances of 850 nm Vertical Cavity Surface Emitting Lasers (VCSELs) compared to Light Emitting Diodes make them very attractive for high speed and short distances data communication links through optical fibers. Weight saving and Electromagnetic Interference withstanding requirements have led to the need of a reliable solution to improve existing avionics high speed buses (e.g. AFDX) up to 1Gbps over 100m. To predict and optimize the performance of the link, the physical behavior of the VCSEL must be well understood. First, a theoretical study is performed through the rate equations adapted to VCSEL in large signal modulation. Averaged turn-on delays and oscillation effects are analytically computed and analyzed for different values of the on- and off state currents. This will affect the eye pattern, timing jitter and Bit Error Rate (BER) of the signal that must remain within IEEE 802.3 standard limits. In particular, the off-state current is minimized below the threshold to allow the highest possible Extinction Ratio. At this level, the spontaneous emission is dominating and leads to significant turn-on delay, turn-on jitter and bit pattern effects. Also, the transverse multimode behavior of VCSELs, caused by Spatial Hole Burning leads to some dispersion in the fiber and degradation of BER. VCSEL to Multimode Fiber coupling model is provided for prediction and optimization of modal dispersion. Lastly, turn-on delay measurements are performed on a real mock-up and results are compared with calculations.

  9. Capacity planning for Carrier Ethernet LTE backhaul networks

    DEFF Research Database (Denmark)

    Checko, Aleksandra; Ellegaard, Lars; Berger, Michael Stübert

    2012-01-01

    With the introduction of LTE networks operators need to plan a new, IP-based mobile backhaul. In this paper, we provide recommendation on dimensioning LTE backhaul networks links using three methods: delay-, dimensioning formula- and overbooking factor-based. Results are obtained from OPNET simul...... and verified. Simulation in this work proves that Carrier Ethernet, one of the candidate technologies for mobile backhaul, protects the network from users that want to flood the network with their data and manages to keep the delay experienced by other users low....... simulations with traffic model based on traffic forecast for 2015. A delay-based approach gives recommended bandwidth for expected number of users. A dimensioning formula is proposed to calculate link bandwidth when mean value of aggregated traffic in the network is known. An overbooking factor is calculated...

  10. The CMS Event Builder

    CERN Document Server

    Brigljevic, V; Cano, E; Cittolin, Sergio; Csilling, Akos; Gigi, D; Glege, F; Gómez-Reino, Robert; Gulmini, M; Gutleber, J; Jacobs, C; Kozlovszky, Miklos; Larsen, H; Magrans de Abril, Ildefons; Meijers, F; Meschi, E; Murray, S; Oh, A; Orsini, L; Pollet, L; Rácz, A; Samyn, D; Scharff-Hansen, P; Schwick, C; Sphicas, Paris; ODell, V; Suzuki, I; Berti, L; Maron, G; Toniolo, N; Zangrando, L; Ninane, A; Erhan, S; Bhattacharya, S; Branson, J G

    2003-01-01

    The data acquisition system of the CMS experiment at the Large Hadron Collider will employ an event builder which will combine data from about 500 data sources into full events at an aggregate throughput of 100 GByte/s. Several architectures and switch technologies have been evaluated for the DAQ Technical Design Report by measurements with test benches and by simulation. This paper describes studies of an EVB test-bench based on 64 PCs acting as data sources and data consumers and employing both Gigabit Ethernet and Myrinet technologies as the interconnect. In the case of Ethernet, protocols based on Layer-2 frames and on TCP/IP are evaluated. Results from ongoing studies, including measurements on throughput and scaling are presented. The architecture of the baseline CMS event builder will be outlined. The event builder is organised into two stages with intelligent buffers in between. The first stage contains 64 switches performing a first level of data concentration by building super-fragments from fragmen...

  11. Large Scale Simulations of the Euler Equations on GPU Clusters

    KAUST Repository

    Liebmann, Manfred

    2010-08-01

    The paper investigates the scalability of a parallel Euler solver, using the Vijayasundaram method, on a GPU cluster with 32 Nvidia Geforce GTX 295 boards. The aim of this research is to enable large scale fluid dynamics simulations with up to one billion elements. We investigate communication protocols for the GPU cluster to compensate for the slow Gigabit Ethernet network between the GPU compute nodes and to maintain overall efficiency. A diesel engine intake-port and a nozzle, meshed in different resolutions, give good real world examples for the scalability tests on the GPU cluster. © 2010 IEEE.

  12. FPGA-based multichannel optical concentrator SIMCON 4.0 for TESLA cavities LLRF control system

    Science.gov (United States)

    Perkuszewski, Karol; Pozniak, Krzysztof T.; Jalmuzna, Wojciech; Koprek, Waldemar; Szewinski, Jaroslaw; Romaniuk, Ryszard S.; Simrock, Stefan

    2006-10-01

    The paper presents an idea, design and realization of a gigabit, optoelectronic synchronous massive data concentrator for the LLRF control system for FLASH and XFEL superconducting accelerators and lasers. The design bases on a central, large, programmable FPGA VirtexIIPro circuit by Xilinx and on eight commercial optoelectronic transceivers. There were implemented peripheral devices for embedded PowerPC block like: memory and Ethernet. The SIMCON 4.0 module was realized as a single, standard EURO-6HE board with VXI/VME-bus. Hardware implementation was described for the most important functional blocks. Construction solutions were presented.

  13. Design and implementation of a nanosecond time-stamping readout system-on-chip for photo-detectors

    International Nuclear Information System (INIS)

    Anvar, Shebli; Château, Frédéric; Le Provost, Hervé; Louis, Frédéric; Manolopoulos, Konstantinos; Moudden, Yassir; Vallage, Bertrand; Zonca, Eric

    2014-01-01

    A readout system suitable for a large number of synchronized photo-detection units has been designed. Each unit embeds a specifically designed fully integrated communicating system based on Xilinx FPGA SoC technology. It runs the VxWorks real-time OS and a custom data acquisition software designed within the Ice middleware framework, resulting in a highly flexible, controllable and scalable distributed application. Clock distribution and delay calibration over customized fixed latency gigabit Ethernet links enable synchronous time-stamping of events with nanosecond precision. The implementation of this readout system on several data-collecting units as well as its performances are described

  14. TELL1 data acquisition system for LHCb detectors

    International Nuclear Information System (INIS)

    Gong Guanghua; Xue Tao; Gong Hui; Shao Beibei

    2004-01-01

    A FPGA based data acquisition readout board has been developed for the LHCb detectors. With optical or analogue daughter cards, it can readout data from several different off-detector electronics. The data synchronization, buffering, pre-processing, zero-suppression and many interfaces to memory chips and communication buses are all implemented by the FPGA in VHDL code. The board sends data out via a 4 channel Gigabit Ethernet adapter. The TELL1 can accepts 24 optical links running at 1.6 GHz and provides for the analogue option 64 10-bit ADC channels sampling at 40 MHz. (authors)

  15. ADC interface for data server with data preselection for luminosity detector in AIDA-2020 project

    Science.gov (United States)

    Daniluk, W.; Dziedzic, B.; Korcyl, G.; Wojtoń, T.; Zawiejski, L.

    2017-08-01

    Main aim of the AIDA-2020 project is development of detectors for future accelerators. In FCAL Colaboration we are working on forward subdetectors for ILC and CLIC accelerators. My team is developing prototype module which receives data from ADC, provides the data preselection, and transmits them as packages to the data server for further their analysis. Common prototype is based on AC701 evaluation board which contains Artix-7 FPGA and is equipped with SMA connectors for gigabit transceivers and ethernet connector. In my talk I will describe architecture of the device and current state of module development.

  16. FPGA based multichannel optical concentrator SIMCON 4.0 for TESLA cavities LLRF control system

    International Nuclear Information System (INIS)

    Perkuszewski, K.; Pozniak, K.T.; Jalmuzna, W.; Koprek, W.; Szewinski, J.; Romaniuk, R.S.

    2006-01-01

    The paper presents an idea, design and realization of a gigabit, optoelectronic synchronous massive data concentrator for the LLRF control system for FLASH and XFEL superconducting accelerators and lasers. The design bases on a central, large, programmable FPGA VirtexIIPro circuit by Xilinx and on eight commercial optoelectronic transceivers. There were implemented peripheral devices for embedded PowerPC block like: memory and Ethernet. The SIMCON 4.0 module was realized as a single, standard EURO-6HE board with VXI/VME-bus. Hardware implementation was described for the most important functional blocks. Construction solutions were presented. (orig.)

  17. FPGA based multichannel optical concentrator SIMCON 4.0 for TESLA cavities LLRF control system

    Energy Technology Data Exchange (ETDEWEB)

    Perkuszewski, K.; Pozniak, K.T.; Jalmuzna, W.; Koprek, W.; Szewinski, J.; Romaniuk, R.S. [Warsaw Univ. of Technology (Poland). Inst. of Electronic Systems; Simrock, S. [Deutsches Elektronen-Synchrotron (DESY), Hamburg (Germany)

    2006-07-01

    The paper presents an idea, design and realization of a gigabit, optoelectronic synchronous massive data concentrator for the LLRF control system for FLASH and XFEL superconducting accelerators and lasers. The design bases on a central, large, programmable FPGA VirtexIIPro circuit by Xilinx and on eight commercial optoelectronic transceivers. There were implemented peripheral devices for embedded PowerPC block like: memory and Ethernet. The SIMCON 4.0 module was realized as a single, standard EURO-6HE board with VXI/VME-bus. Hardware implementation was described for the most important functional blocks. Construction solutions were presented. (orig.)

  18. Subcomponents and connectivity of the inferior fronto-occipital fasciculus revealed by diffusion spectrum imaging fiber tracking

    Directory of Open Access Journals (Sweden)

    Yupeng Wu

    2016-09-01

    Full Text Available The definitive structure and functional role of the inferior fronto-occipital fasciculus (IFOF are still controversial. In this study, we aimed to investigate the connectivity, asymmetry and segmentation patterns of this bundle. High angular diffusion spectrum imaging (DSI analysis was performed on ten healthy adults and a 90-subject DSI template (NTU-90 Atlas. In addition, a new tractography approach based on the anatomic subregions and two regions of interest (ROI was evaluated for the fiber reconstructions. More widespread anterior-posterior connections than previous standard definition of the IFOF were found. This distinct pathway demonstrated a greater inter-subjects connective variability with a maximum of 40% overlap in its central part. The statistical results revealed no asymmetry between the left and right hemispheres and no significant differences existed in distributions of the IFOF according to sex. In addition, five subcomponents within the IFOF were identified according to the frontal areas of originations. As the subcomponents passed through the anterior floor of the external capsule, the fibers radiated to the posterior terminations. The most common connection patterns of the subcomponents were as follows: IFOF-I, from frontal polar cortex to occipital pole, inferior occipital lobe, middle occipital lobe, superior occipital lobe and pericalcarine; IFOF-II, from orbito-frontal cortex to occipital pole, inferior occipital lobe, middle occipital lobe, superior occipital lobe and pericalcarine; IFOF-III, from inferior frontal gyrus to inferior occipital lobe, middle occipital lobe, superior occipital lobe, occipital pole and pericalcarine; IFOF-IV, from middle frontal gyrus to occipital pole and inferior occipital lobe; IFOF-V, from superior frontal gyrus to occipital pole, inferior occipital lobe and middle occipital lobe. Our work demonstrates the feasibility of high resolution diffusion tensor tractography with sufficient

  19. Subcomponents and Connectivity of the Inferior Fronto-Occipital Fasciculus Revealed by Diffusion Spectrum Imaging Fiber Tracking

    Science.gov (United States)

    Wu, Yupeng; Sun, Dandan; Wang, Yong; Wang, Yibao

    2016-01-01

    The definitive structure and functional role of the inferior fronto-occipital fasciculus (IFOF) are still controversial. In this study, we aimed to investigate the connectivity, asymmetry, and segmentation patterns of this bundle. High angular diffusion spectrum imaging (DSI) analysis was performed on 10 healthy adults and a 90-subject DSI template (NTU-90 Atlas). In addition, a new tractography approach based on the anatomic subregions and two regions of interest (ROI) was evaluated for the fiber reconstructions. More widespread anterior-posterior connections than previous “standard” definition of the IFOF were found. This distinct pathway demonstrated a greater inter-subjects connective variability with a maximum of 40% overlap in its central part. The statistical results revealed no asymmetry between the left and right hemispheres and no significant differences existed in distributions of the IFOF according to sex. In addition, five subcomponents within the IFOF were identified according to the frontal areas of originations. As the subcomponents passed through the anterior floor of the external capsule, the fibers radiated to the posterior terminations. The most common connection patterns of the subcomponents were as follows: IFOF-I, from frontal polar cortex to occipital pole, inferior occipital lobe, middle occipital lobe, superior occipital lobe, and pericalcarine; IFOF-II, from orbito-frontal cortex to occipital pole, inferior occipital lobe, middle occipital lobe, superior occipital lobe, and pericalcarine; IFOF-III, from inferior frontal gyrus to inferior occipital lobe, middle occipital lobe, superior occipital lobe, occipital pole, and pericalcarine; IFOF-IV, from middle frontal gyrus to occipital pole, and inferior occipital lobe; IFOF-V, from superior frontal gyrus to occipital pole, inferior occipital lobe, and middle occipital lobe. Our work demonstrates the feasibility of high resolution diffusion tensor tractography with sufficient sensitivity

  20. Subcomponents and Connectivity of the Inferior Fronto-Occipital Fasciculus Revealed by Diffusion Spectrum Imaging Fiber Tracking.

    Science.gov (United States)

    Wu, Yupeng; Sun, Dandan; Wang, Yong; Wang, Yibao

    2016-01-01

    The definitive structure and functional role of the inferior fronto-occipital fasciculus (IFOF) are still controversial. In this study, we aimed to investigate the connectivity, asymmetry, and segmentation patterns of this bundle. High angular diffusion spectrum imaging (DSI) analysis was performed on 10 healthy adults and a 90-subject DSI template (NTU-90 Atlas). In addition, a new tractography approach based on the anatomic subregions and two regions of interest (ROI) was evaluated for the fiber reconstructions. More widespread anterior-posterior connections than previous "standard" definition of the IFOF were found. This distinct pathway demonstrated a greater inter-subjects connective variability with a maximum of 40% overlap in its central part. The statistical results revealed no asymmetry between the left and right hemispheres and no significant differences existed in distributions of the IFOF according to sex. In addition, five subcomponents within the IFOF were identified according to the frontal areas of originations. As the subcomponents passed through the anterior floor of the external capsule, the fibers radiated to the posterior terminations. The most common connection patterns of the subcomponents were as follows: IFOF-I, from frontal polar cortex to occipital pole, inferior occipital lobe, middle occipital lobe, superior occipital lobe, and pericalcarine; IFOF-II, from orbito-frontal cortex to occipital pole, inferior occipital lobe, middle occipital lobe, superior occipital lobe, and pericalcarine; IFOF-III, from inferior frontal gyrus to inferior occipital lobe, middle occipital lobe, superior occipital lobe, occipital pole, and pericalcarine; IFOF-IV, from middle frontal gyrus to occipital pole, and inferior occipital lobe; IFOF-V, from superior frontal gyrus to occipital pole, inferior occipital lobe, and middle occipital lobe. Our work demonstrates the feasibility of high resolution diffusion tensor tractography with sufficient sensitivity to

  1. Experimental integration of quantum key distribution and gigabit-capable passive optical network

    Science.gov (United States)

    Sun, Wei; Wang, Liu-Jun; Sun, Xiang-Xiang; Mao, Yingqiu; Yin, Hua-Lei; Wang, Bi-Xiao; Chen, Teng-Yun; Pan, Jian-Wei

    2018-01-01

    Quantum key distribution (QKD) ensures information-theoretic security for the distribution of random bits between two remote parties. To extend QKD applications to fiber-to-the-home optical communications, such as gigabit-capable passive optical networks (GPONs), an effective method is the use of wavelength-division multiplexing. However, the Raman scattering noise from intensive classical traffic and the huge loss introduced by the beam splitter in a GPON severely limits the performance of QKD. Here, we demonstrate the integration of QKD and a commercial GPON system with fiber lengths up to 14 km, in which the maximum splitting ratio of the beam splitter reaches 1:64. By placing the QKD transmitter on the optical line terminal side, we reduce the Raman noise collected at the QKD receiver. Using a bypass structure, the loss of the beam splitter is circumvented effectively. Our results pave the way to extending the applications of QKD to last-mile communications.

  2. High Precision Testbed to Evaluate Ethernet Performance for In-Car Networks

    DEFF Research Database (Denmark)

    Revsbech, Kasper; Madsen, Tatiana Kozlova; Schiøler, Henrik

    2012-01-01

    Validating safety-critical real-time systems such as in-car networks often involves a model-based performance analysis of the network. An important issue performing such analysis is to provide precise model parameters, matching the actual equipment. One way to obtain such parameters is to derive...... them by measurements of the equipment. In this work we describe the design of a testbed enabling active measurements on up to 1 [Gb=Sec] Copper based Ethernet Switches. By use of the testbed it self, we conduct a series of tests where the precision of the testbed is estimated. We find a maximum error...

  3. Bob Dobinson (1943-2004)

    CERN Multimedia

    2004-01-01

    Bob Dobinson died, very unexpectedly, in England on Thursday 19th February. Bob came to CERN as a NATO Fellow in April 1968, directly after gaining his PhD in London. He joined the CERN-Rome Group, carrying out experiments both at the CERN PS and at Serpukhov. He became a CERN fellow before being appointed as a Staff Member in 1971. His professional interests were always in the area of electronics, instrumentation, networking and computing at the "front-end" of experiments. In that context, mention must be made of his outstanding work in driving the CAMAC standard, and his later work on FASTBUS; of his leadership of the European Muon Collaboration's online team and of his support, as a user, for standard PDP-11 data acquisition software; of his interest in Ethernet at all times from its very initial use to inter-connect computers to his latest work with the Gigabit and 10 Gigabit versions as the basis for data transmission within experiments. Bob lived life the way he wanted to, and wit...

  4. Bob Dobinson (1943-2004)

    CERN Document Server

    Bee, C; Mapelli, L; Wickens, F. J

    It was a great shock to the many friends and colleagues of Bob Dobinson to hear of his sudden and unexpected death in England on Thursday 19th February. Bob came to CERN in April 1968 and his professional interests were always in the area of electronics, instrumentation, networking and computing at the "front-end" of experiments. These interests included Ethernet, right from its very initial use to interconnect computers to his latest work with the Gigabit and 10 Gigabit versions as the basis for data transmission for experiments, both in the DAQ and between computing centres. Bob lived life the way he wanted to, and with great energy. He drove himself hard and generated enthusiasm amongst his collaborators to do the same. Always willing to learn from first principles about topics that interested him, he persisted with questions until he had obtained a full understanding. He was a first-class teacher, and he held positions as Visiting Professor at the Universities of Liverpool and London. He was also an exc...

  5. Latency and bit-error-rate evaluation for radio-over-ethernet in optical fiber front-haul networks

    DEFF Research Database (Denmark)

    Sayadi, Mohammadjavad; Rodríguez, Sebastián; Olmos, Juan José Vegas

    2018-01-01

    evaluate this Ethernet packet as a case of study for RoE applications. The packet is transmitted through different fiber spans, measuring the BER and latency on each case. The system achieves BER values below the FEC limit and a manageable latency. These results serve as a guideline and proof of concept...

  6. Analysis of a time-lens based optical frame synchronizer and retimer for 10G Ethernet aiming at a Tb/s optical router/switch design

    DEFF Research Database (Denmark)

    Laguardia Areal, Janaina; Hu, Hao; Peucheret, Christophe

    2010-01-01

    This paper analyzes experimentally and by numerical simulations an optical frame retimer and synchronizer unit for 10 Gbit/s Ethernet input frames. The unit is envisaged to be applied in the design of an optically transparent router for Optical Time Division Multiplexed (OTDM) links, aggregating...... traffic from several 10 Gbit/s Ethernet (10 GE) links. The scheme is based on time-lenses implemented through a combination of a sinusoidally driven optical phase modulation and linear dispersion. Our analysis extracts the operation range of the scheme used for synchronization and retiming in the context...

  7. Multi-gigabit wireless data transfer at 60 GHz

    International Nuclear Information System (INIS)

    Soltveit, H K; Schöning, A; Wiedner, D; Brenner, R

    2012-01-01

    In this paper we describe the status of the first prototype of the 60 GHz wireless Multi-gigabit data transfer topology currently under development at University of Heidelberg using IBM 130 nm SiGe HBT BiCMOS technology. The 60 GHz band is very suitable for high data rate and short distance applications. One application can be a wireless multi Gbps radial data transmission inside the ATLAS silicon strip detector, making a first level track trigger feasible. The wireless transceiver consists of a transmitter and a receiver. The transmitter includes an On-Off Keying (OOK) modulator, a Local Oscillator (LO), a Power Amplifier (PA) and a Band-pass Filter (BPF). The receiver part is composed of a Band-pass Filter (BPF), a Low Noise Amplifier (LNA), a double balanced down-convert Gilbert mixer, a Local Oscillator (LO), then a BPF to remove the mixer introduced noise, an Intermediate Amplifier (IF), an On-Off Keying demodulator and a limiting amplifier. The first prototype would be able to handle a data-rate of about 3.5 Gbps over a link distance of 1 m. The first simulations of the LNA show that a Noise figure (NF) of 5 dB, a power gain of 21 dB at 60 GHz with a 3 dB bandwidth of more than 20 GHz with a power consumption 11 mW are achieved. Simulations of the PA show an output referred compression point P1dB of 19.7 dB at 60 GHz.

  8. Gigabit Satellite Network for NASA's Advanced Communication Technology Satellite (ACTS)

    Science.gov (United States)

    Hoder, Douglas; Bergamo, Marcos

    1996-01-01

    The advanced communication technology satellite (ACTS) gigabit satellite network provides long-haul point-to-point and point-to-multipoint full-duplex SONET services over NASA's ACTS. at rates up to 622 Mbit/s (SONET OC-12), with signal quality comparable to that obtained with terrestrial fiber networks. Data multiplexing over the satellite is accomplished using time-division multiple access (TDMA) techniques coordinated with the switching and beam hopping facilities provided by ACTS. Transmissions through the satellite are protected with Reed-Solomon encoding. providing virtually error-free transmission under most weather conditions. Unique to the system are a TDMA frame structure and satellite synchronization mechanism that allow: (a) very efficient utilization of the satellite capacity: (b) over-the-satellite dosed-loop synchronization of the network in configurations with up to 64 ground stations: and (c) ground station initial acquisition without collisions with existing signalling or data traffic. The user interfaces are compatible with SONET standards, performing the function of conventional SONET multiplexers and. as such. can be: readily integrated with standard SONET fiber-based terrestrial networks. Management of the network is based upon the simple network management protocol (SNMP). and includes an over-the-satellite signalling network and backup terrestrial internet (IP-based) connectivity. A description of the ground stations is also included.

  9. A TDC for the characterization of KM3NeT PMTs

    International Nuclear Information System (INIS)

    Zwart, A.; Heine, E.; Hogenbirk, J.; Jansweijer, P.; Kieft, G.; Mos, S.; Wolf, E. de

    2013-01-01

    The optical modules of the future KM3NeT neutrino telescope will contain many photomultiplier tubes with a diameter of about 3 in. In order to characterize these photomultiplier tubes, a 16 channel Time-Over-Threshold TDC with a GigaBit Ethernet communication channel has been built in an Altera StratixIV evaluation board. The TDC data is packed in UDP packages and sent to the host PC. Control is implemented using I 2 C command packages send to the TDC by the host PC. After execution of I 2 C commands a result package is send back to the host. We will present the TDC setup and first results

  10. Case study of mission-critical smart grid remedial action schemes via Ethernet

    Energy Technology Data Exchange (ETDEWEB)

    Dolezilek, David

    2010-09-15

    At Southern California Edison (SCE), RAS systems are implemented to mitigate thermal overloads and system instability upon the loss of one or more transmission lines. RAS automatic protection eliminates expensive alternative measures, including reconductoring transmission lines, building new lines, and/or adding new transformers. SCE has demonstrated successful use of IEC 61850 GOOSE messages over distances up to 460 miles to collect analysis and arming data and transfer status and control indications. This paper explains methods to perform mission-critical RAS and other smart grid actions via nondeterministic bandwidth sharing Ethernet being promoted to move smart grid information.

  11. Auto correct method of AD converters precision based on ethernet

    Directory of Open Access Journals (Sweden)

    NI Jifeng

    2013-10-01

    Full Text Available Ideal AD conversion should be a straight zero-crossing line in the Cartesian coordinate axis system. While in practical engineering, the signal processing circuit, chip performance and other factors have an impact on the accuracy of conversion. Therefore a linear fitting method is adopted to improve the conversion accuracy. An automatic modification of AD conversion based on Ethernet is presented by using software and hardware. Just by tapping the mouse, all the AD converter channel linearity correction can be automatically completed, and the error, SNR and ENOB (effective number of bits are calculated. Then the coefficients of linear modification are loaded into the onboard AD converter card's EEPROM. Compared with traditional methods, this method is more convenient, accurate and efficient,and has a broad application prospects.

  12. Experimental evaluation of end-to-end delay in switched Ethernet application in the automotive domain

    OpenAIRE

    Beretis , Kostas; Symeonidis , Ieroklis

    2013-01-01

    International audience; This article presents an approach for deriving upper bound for end-to-end delay in a double star switched Ethernet network. Four traffic classes, following a strict priority queuing policy, were considered. The theoretical analysis was based on network calculus. An experimental setup, which accu-rately reflects an automotive communication network, was implemented in or-der to evaluate the theoretical model. The results obtained by the experiments provided valuable feed...

  13. SynUTC - high precision time synchronization over ethernet networks

    CERN Document Server

    Höller, R; Horauer, M; Kerö, N; Schmid, U; Schossmaier, K

    2002-01-01

    This article describes our SynUTC (Synchronized Universal Time Coordinated) technology, which enables high-accuracy distribution of GPS time and time synchronization of network nodes connected via standard Ethernet LANs. By means of exchanging data packets in conjunction with moderate hardware support at nodes and switches, an overall worst-case accuracy in the range of some 100 ns can be achieved, with negligible communication overhead. Our technology thus improves the 1 ms-range accuracy achievable by conventional, software-based approaches like NTP by 4 orders of magnitude. Applications can use the high-accuracy global time provided by SynUTC for event timestamping and event generation both at hardware and software level. SynUTC is based upon inserting highly accurate time information into dedicated data packets at the media-independent interface (MII) between the physical layer transceiver and the network controller upon packet transmission and reception, respectively. As a consequence, every node has acc...

  14. A deterministic, gigabit serial timing, synchronization and data link for the RHIC LLRF

    International Nuclear Information System (INIS)

    Hayes, T.; Smith, K.S.; Severino, F.

    2011-01-01

    A critical capability of the new RHIC low level rf (LLRF) system is the ability to synchronize signals across multiple locations. The 'Update Link' provides this functionality. The 'Update Link' is a deterministic serial data link based on the Xilinx RocketIO protocol that is broadcast over fiber optic cable at 1 gigabit per second (Gbps). The link provides timing events and data packets as well as time stamp information for synchronizing diagnostic data from multiple sources. The new RHIC LLRF was designed to be a flexible, modular system. The system is constructed of numerous independent RF Controller chassis. To provide synchronization among all of these chassis, the Update Link system was designed. The Update Link system provides a low latency, deterministic data path to broadcast information to all receivers in the system. The Update Link system is based on a central hub, the Update Link Master (ULM), which generates the data stream that is distributed via fiber optic links. Downstream chassis have non-deterministic connections back to the ULM that allow any chassis to provide data that is broadcast globally.

  15. The Gigabit Link Interface Board (GLIB), a flexible system for the evaluation and use of GBT-based optical links

    CERN Document Server

    Vichoudis, P; Vasey, F; Joos, M; Hansen, M; Haas, S; Baron, S

    2010-01-01

    The Gigabit Link Interface Board (GLIB) is an evaluation platform and an easy entry point for users of high speed optical links in high energy physics experiments. Its intended use ranges from optical link evaluation in the laboratory to control, triggering and data acquisition from remote modules in beam or irradiation tests. The GLIB is an FPGA-based Advanced Mezzanine Card (AMC) conceived to serve a small and simple system residing either inside a Micro Telecommunications Computing Architecture (mu TCA) crate, or on a bench with a link to a PC. This paper presents the architecture of the GLIB, its features as well as examples of its use in different setups.

  16. Simulations and Prototyping of the LHCb L1 and HLT Triggers

    CERN Document Server

    Shears, T; Kechadi, T; McNulty, R; Smoker, A; Barczyk, A; Dufey, J; Jost, B; Neufeld, N

    2004-01-01

    The Level 1 (L1) and High Level Triggers (HLT) for the LHCb experiment are software triggers which will be implemented on a farm of approximately 1800 computers, connected via a Gigabit LAN with a bandwidth capacity of 7.1 GB/s and containing some 500 Ethernet links. The architecture of the readout network must be optimised to maximise data throughput, control data flow and minimise errors. We report on the development and results of two independent software simulations which allow us to evaluate the performance of various network configurations. We also describe the construction of two hardware testbeds of the LHCb L1 and HLT trigger system, which allow microscopic and macroscopic study of network and switch behaviour.

  17. HyspIRI Intelligent Payload Module(IPM) and Benchmarking Algorithms for Upload

    Science.gov (United States)

    Mandl, Daniel

    2010-01-01

    Features: Hardware: a) Xilinx Virtex-5 (GSFC Space Cube 2); b) 2 x 400MHz PPC; c) 100MHz Bus; d) 2 x 512MB SDRAM; e) Dual Gigabit Ethernet. Support Linux kernel 2.6.31 (gcc version 4.2.2). Support software running in stand alone mode for better performance. Can stream raw data up to 800 Mbps. Ready for operations. Software Application Examples: Band-stripping Algiotrhmsl:cloud, sulfur, flood, thermal, SWIL, NDVI, NDWI, SIWI, oil spills, algae blooms, etc. Corrections: geometric, radiometric, atmospheric. Core Flight System/dynamic software bus. CCSDS File Delivery Protocol. Delay Tolerant Network. CASPER /onboard planning. Fault monitoring/recovery software. S/C command and telemetry software. Data compression. Sensor Web for Autonomous Mission Operations.

  18. Image acquisition and analysis for beam diagnostics, applications of the Taiwan photon source

    International Nuclear Information System (INIS)

    Liao, C.Y.; Chen, J.; Cheng, Y.S.; Hsu, K.T.; Hu, K.H.; Kuo, C.H.; Wu, C.Y.

    2012-01-01

    Design and implementation of image acquisition and analysis is in proceeding for the Taiwan Photon Source (TPS) diagnostic applications. The optical system contains screen, lens, and lighting system. A CCD camera with Gigabit Ethernet interface (GigE Vision) will be a standard image acquisition device. Image acquisition will be done on EPICS IOC via PV channel and analysis the properties by using Matlab tool to evaluate the beam profile (sigma), beam size position and tilt angle et al. The EPICS IOC integrated with Matlab as a data processing system is not only could be used in image analysis but also in many types of equipment data processing applications. Progress of the project will be summarized in this report. (authors)

  19. Event building in an intelligent network interface card for the LHCb readout network

    CERN Document Server

    Dufey, J P; Neufeld, N; Zuin, M

    2001-01-01

    LHCb is an experiment being constructed at CERN's LHC accelerator for the purpose of studying precisely the CP violation parameters in the B-B system. Triggering poses special problems since the interesting events containing B-mesons are immersed in a large background of inelastic p-p reactions. Therefore, a 4 Level Triggering scheme (Level 0 to Level 3) has been implemented. Powerful embedded processors, used in modern intelligent Network Interface Cards (smart NICs), make it attractive to use them to handle the event building protocol in the high-speed data acquisition system of the LHCb experiment. The implementation of an event building algorithm developed for a specific Gigabit Ethernet NIC is presented and performance data are discussed. 5 Refs.

  20. A TDC for the characterization of KM3NeT PMTs

    Energy Technology Data Exchange (ETDEWEB)

    Zwart, A.; Heine, E.; Hogenbirk, J.; Jansweijer, P.; Kieft, G.; Mos, S. [Nikhef, Science Park 105,1098 XG Amsterdam (Netherlands); Wolf, E. de, E-mail: e.dewolf@nikhef.nl [Nikhef, Science Park 105,1098 XG Amsterdam (Netherlands); University of Amsterdam, Science Park 904,1098 XH Amsterdam (Netherlands)

    2013-10-11

    The optical modules of the future KM3NeT neutrino telescope will contain many photomultiplier tubes with a diameter of about 3 in. In order to characterize these photomultiplier tubes, a 16 channel Time-Over-Threshold TDC with a GigaBit Ethernet communication channel has been built in an Altera StratixIV evaluation board. The TDC data is packed in UDP packages and sent to the host PC. Control is implemented using I{sup 2}C command packages send to the TDC by the host PC. After execution of I{sup 2}C commands a result package is send back to the host. We will present the TDC setup and first results.

  1. Use of Ethernet and TCP/IP socket communications library routines for data acquisition and control in the LEP RF system

    International Nuclear Information System (INIS)

    Ciapala, E.; Collier, P.; Lienard, P.

    1991-01-01

    A general move is being made at CERN towards the direct connection of intelligent equipment and device controllers to the control room consoles by the use of local Ethernet segments bridged to the main Token Ring networks. Communications is based on standard TCP/IP protocols which allows immediate use of standard software packages. The Data Managers which control the LEP RF accelerating units and transverse feedback systems have recently been connected. The implementation of Ethernet and TCP/IP socket communications routines for RF data acquisition and control is described. The adaptation of almost all of the existing software for RF system control, data acquisition and diagnostics to make use of this means of communication has proved straightforward. Furthermore the transparent transfer of data in the form of 'C' structures from the Data Managers to the control center workstations and other computers has considerably simplified the software required for remote surveillance and data logging with a corresponding increase in speed and reliability

  2. Force10 networks performance in world's first transcontinental 10 gigabit ethernet network verified by Ixia

    CERN Multimedia

    2003-01-01

    Force10 Networks, Inc., today announced that the performance of the Force10 E-Series switch/routers deployed in a transcontinental network has been verified as line-rate 10 GE throughput by Ixia, a leading provider of high-speed, network performance and conformance analysis systems. The network, the world's first transcontinental 10 GE wide area network, consists of a SURFnet OC-192 lambda between Geneva and the StarLight facility in Chicago via Amsterdam and another OC-192 lambda between this same facility in Chicago and Carleton University in Ottawa, Canada provided by CANARIE and ORANO (1/2 page).

  3. Towards Terabit Carrier Ethernet and Energy Efficient Optical Transport Networks

    DEFF Research Database (Denmark)

    Rasmussen, Anders

    This thesis focuses on the challenges of scaling current network node technology to support connection speeds of 100Gbps and beyond. Out of the many exiting aspects of reaching this goal, the main scope of this thesis is to investigate packet processing (address lookup and scheduling), forward....... The more advanced schemes also require more complex calculations to process each bit. This thesis will investigate how both the standard OTN FEC as well as more advanced FEC schemes can be implemented for 100G and above operation. As the networks are expanded to run at increasingly higher speeds...... error correction and energy efficiency. Scheduling and address lookup are key functions and potential bottle necks in high speed network nodes, as the minimum packet/frame sizes in both the popular Ethernet protocol, as well as the Internet Protocol (IP) still remains constant (84B and 40B, respectively...

  4. Comparison of High Performance Network Options: EDR InfiniBand vs.100Gb RDMA Capable Ethernet

    Energy Technology Data Exchange (ETDEWEB)

    Kachelmeier, Luke Anthony [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Univ. of New Mexico, Albuquerque, NM (United States); Van Wig, Faith Virginia [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Missouri Univ. of Science and Technology, Rolla, MO (United States); Erickson, Kari Natania [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); New Mexico Inst. of Mining and Technology, Socorro, NM (United States)

    2016-08-08

    These are the slides for a presentation at the HPC Mini Showcase. This is a comparison of two different high performance network options: EDR InfiniBand and 100Gb RDMA capable ethernet. The conclusion of this comparison is the following: there is good potential, as shown with the direct results; 100Gb technology is too new and not standardized, thus deployment effort is complex for both options; different companies are not necessarily compatible; if you want 100Gb/s, you must get it all from one place.

  5. WDM-PON-compatible system for simultaneous distribution of gigabit baseband and wireless ultrawideband services with flexible bandwidth allocation

    DEFF Research Database (Denmark)

    Pham, Tien Thang; Yu, Xianbin; Gibbon, Timothy Braidwood

    2011-01-01

    In this paper, a novel and simple scheme to realize flexible access for gigabit wireline and impulse radio ultrawideband (IR-UWB) wireless services is proposed. The UWB signals are generated by multi-carrier upconverting and reshaping the baseband signals.The proposed system was experimentally...... demonstrated with the performances of 2.0-Gbps data in both baseband and UWB formats after 46-km single mode fiber transmission and further 0.5-m wireless for UWB data. The flexibility of the system is confirmed by investigating the system performance at different data rates including 1.0 Gbps and 1.6 Gbps....... Optical wavelength independency and data-rate variability of UWB signal generation makes the system attractive for potential wireline and wireless applications in existing WDM-PON systems....

  6. 3.2 Gigabit-per-second Visible Light Communication Link with InGaN/GaN MQW Micro-photodetector

    KAUST Repository

    Ho, Kang Ting

    2018-01-29

    This paper presents the first demonstration of InGaN multiple quantum well (MQW) based micro-photodetectors (µPD) used as the optical receiver in orthogonal frequency-division multiplexing (OFDM) modulated visible communication system (VLC). The 80-µm diameter µPD exhibits a wavelength-selective responsivity in the near-UV to violet regime (374 nm - 408 nm) under a low reverse bias of −3 V. The modulation scheme of 16-quadrature amplitude modulation (16-QAM) OFDM enables the use of frequency response beyond −3 dB cutoff bandwidth of µPD. A record high data rate of 3.2 Gigabit per second (Gpbs) was achieved as a result, which provides the proof-of-concept verification of a viable high speed VLC link.

  7. ETHERNET BASED EMBEDDED SYSTEM FOR FEL DIAGNOSTICS AND CONTROLS

    International Nuclear Information System (INIS)

    Jianxun Yan; Daniel Sexton; Steven Moore; Albert Grippo; Kevin Jordan

    2006-01-01

    An Ethernet based embedded system has been developed to upgrade the Beam Viewer and Beam Position Monitor (BPM) systems within the free-electron laser (FEL) project at Jefferson Lab. The embedded microcontroller was mounted on the front-end I/O cards with software packages such as Experimental Physics and Industrial Control System (EPICS) and Real Time Executive for Multiprocessor System (RTEMS) running as an Input/Output Controller (IOC). By cross compiling with the EPICS, the RTEMS kernel, IOC device supports, and databases all of these can be downloaded into the microcontroller. The first version of the BPM electronics based on the embedded controller was built and is currently running in our FEL system. The new version of BPM that will use a Single Board IOC (SBIOC), which integrates with an Field Programming Gate Array (FPGA) and a ColdFire embedded microcontroller, is presently under development. The new system has the features of a low cost IOC, an open source real-time operating system, plug and play-like ease of installation and flexibility, and provides a much more localized solution

  8. Analysis of SCTP and TCP based communication in high-speed clusters

    International Nuclear Information System (INIS)

    Kozlovszky, M.; Berceli, T.; Kutor, L.

    2006-01-01

    Performance and financial constraints are pushing modern DAQs (Data Acquisition Systems) to use distributed cluster environments instead of monolith one-box systems. Inside clusters application communication layers should support outstanding high performance requirements. We are currently investigating different network protocols that could meet the requirements of high speed/low latency peer-to-peer communication within DAQ clusters. We have carried out various performance measurements with TCP and SCTP over Fast and Gigabit Ethernet. We are focusing on Ethernet Technologies, because this transport medium is broad deployed, cost efficient and it has much better cost/throughput ratio than other available communication alternatives (e.g.: Myrinet, Infiniband). During this study, a protocol performance measurement application with different peer transport components has been developed. In the first part of the paper, we give a short comparison of the two protocols (SCTP and TCP), and an introduction of the transport layer structure developed. Later on we discuss the performance results of single/multi-stream peer-to-peer communication, give overview about application code transition possibilities from application developer point of view between the two protocols, and draw conclusions about usability

  9. A study on the multiple dynamic wavelength distribution for gigabit capable passive optical networks

    Directory of Open Access Journals (Sweden)

    Gustavo Adolfo Puerto Leguizamón

    2014-04-01

    Full Text Available This paper presents a data traffic based study aiming at evaluating the impact of dynamic wavelength allocation on a Gigabit capable Passive Optical Network (GPON. In Passive Optical Networks (PON, an Optical Line Terminal (OLT feeds different PONs in such a way that a given wavelength channel is evenly distributed between the Optical Network Units (ONU at each PON. However, PONs do not specify any kind of dynamic behavior on the way the wavelengths are allocated in the network, a completely static distribution is implemented instead. In thispaper we evaluate the network performance in terms of packet losses and throughput for a number of ONUs being out-of-profile while featuring a given percentage of traffic in excess for a fixed wavelength distribution and for multiple dynamic wavelength allocation. Results show that for a multichannel operation with four wavelengths, the network throughput increases up to a rough value of 19% while the packet losses drop from 22 % to 1.8 % as compared with a static wavelength distribution.

  10. Synchronous ethernet and IEEE 1588 in telecoms next generation synchronization networks

    CERN Document Server

    2013-01-01

    This book addresses the multiple technical aspects of the distribution of synchronization in new generation telecommunication networks, focusing in particular on synchronous Ethernet and IEEE1588 technologies. Many packet network engineers struggle with understanding the challenges that precise synchronization distribution can impose on networks. The usual “why”, “when” and particularly “how” can cause problems for many engineers. In parallel to this, some other markets have identical synchronization requirements, but with their own design requirements, generating further questions. This book attempts to respond to the different questions by providing background technical information. Invaluable information on state of-the-art packet network synchronization and timing architectures is provided, as well as an unbiased view on the synchronization technologies that have been internationally standardized over recent years, with the aim of providing the average reader (who is not skilled in the art) wi...

  11. Parallelization of MRCI based on hole-particle symmetry.

    Science.gov (United States)

    Suo, Bing; Zhai, Gaohong; Wang, Yubin; Wen, Zhenyi; Hu, Xiangqian; Li, Lemin

    2005-01-15

    The parallel implementation of multireference configuration interaction program based on the hole-particle symmetry is described. The platform to implement the parallelization is an Intel-Architectural cluster consisting of 12 nodes, each of which is equipped with two 2.4-G XEON processors, 3-GB memory, and 36-GB disk, and are connected by a Gigabit Ethernet Switch. The dependence of speedup on molecular symmetries and task granularities is discussed. Test calculations show that the scaling with the number of nodes is about 1.9 (for C1 and Cs), 1.65 (for C2v), and 1.55 (for D2h) when the number of nodes is doubled. The largest calculation performed on this cluster involves 5.6 x 10(8) CSFs.

  12. The new Wide-band Solar Neutrino Trigger for Super-Kamiokande

    Science.gov (United States)

    Carminati, Giada

    Super-Kamiokande observes low energy electrons induced by the elastic scattering of 8B solar neutrinos. The transition region between vacuum and matter oscillations, with neutrino energy near 3 MeV, is still partially unexplored by any detector. Super-Kamiokande can study this intermediate regime adding a new software trigger. The Wide-band Intelligent Trigger (WIT) has been developed to simultaneously trigger and reconstruct very low energy electrons (above 2.49 kinetic MeV) with an e_ciency close to 100%. The WIT system, comprising 256-Hyperthreaded CPU cores and one 10-Gigabit Ethernet network switch, has been recently installed and integrated in the online DAQ system of SK and the complete system is currently in an advanced status of online data testing.

  13. The NA62 Liquid Krypton calorimeter data acquisition upgrade

    CERN Document Server

    Hallgren, Bjorn; Piccini, Mauro; Wendler, Helmut; 10.1109/NSSMIC.2008.4774802

    2009-01-01

    The NA62 experiment at CERN, aiming to start data taking in 2011, intends to measure the branching ratio of extremely rare kaon decays. The existing Liquid Krypton (LKr) calorimeter of the NA48 experiment will play an essential role in the new experiment. For this reason a program for the consolidation of the LKr read-out system was launched in 2006. The first part of the program consists of updating the existing data acquisition system to a modern more reliable technology using Gigabit Ethernet and PC-farm. In the second stage the readout event rate has to be increased from 13 kHz to 1 MHz. Methods to do this, while keeping much of the existing analog system, are discussed.

  14. The LHCb Data Acquisition during LHC Run 1

    International Nuclear Information System (INIS)

    Alessio, F; Brarda, L; Bonaccorsi, E; Perez, D H Campora; Chebbi, M; Frank, M; Gaspar, C; Cardoso, L Granado; Haen, C; Herwijnen, E v; Jacobsson, R; Jost, B; Neufeld, N; Schwemmer, R; Kartik, V; Zvyagin, A

    2014-01-01

    The LHCb Data Acquisition system reads data from over 300 read-out boards and distributes them to more than 1500 event-filter servers. It uses a simple push-protocol over Gigabit Ethernet. After filtering, the data is consolidated into files for permanent storage using a SAN-based storage system. Since the beginning of data-taking many lessons have been learned and the reliability and robustness of the system has been greatly improved. We report on these changes and improvements, their motivation and how we intend to develop the system for Run 2. We also will report on how we try to optimise the usage of CPU resources during the running of the LHC ('deferred triggering') and the implications on the data acquisition.

  15. High bandwidth concurrent processing on commodity platforms

    CERN Document Server

    Boosten, M; Van der Stok, P D V

    1999-01-01

    The I/O bandwidth and real-time processing power required for high- energy physics experiments is increasing rapidly over time. The current requirements can only be met by using large-scale concurrent processing. We are investigating the use of a large PC cluster interconnected by Fast and Gigabit Ethernet to meet the performance requirements of the ATLAS second level trigger. This architecture is attractive because of its performance and competitive pricing. A major problem is obtaining frequent high-bandwidth I/O without sacrificing the CPU's processing power. We present a tight integration of a user-level scheduler and a zero-copy communication layer. This system closely approaches the performance of the underlying hardware in terms of both CPU power and I/O capacity. (0 refs).

  16. Status of JT-60 data processing system

    International Nuclear Information System (INIS)

    Matsuda, T.; Tsugita, T.; Oshima, T.; Sakata, S.; Sato, M.; Koiwa, M.; Aoyagi, T.

    2000-01-01

    The JT-60 data processing system is a large computer complex and gradually modernized by utilizing progressing computer and network technology. There are two major changes in our system. A main computer of FACOM M-780 has been replaced with compatible GS8300 using state-of-art CMOS technology, which results in lower power and space usage with nearly the same performance. Now it can handle ∼500 MB of data per discharge. A gigabit ethernet switch with FDDI ports has been introduced to cope with the increase of handling data. The switch will connect a tera-byte (TB) data server at the bandwidth of a gigabit per second with the main computer and many data acquisition workstations. Other developments in our system are the realization of three workstation-based plans, the TB data server, the VME-based fast data acquisition system and a CICU. The TB data server is basically a UNIX workstation with ∼100 GB RAID disks and ∼900 GB MO auto-exchangers. The VME-based fast data acquisition system has been developed to enlarge the present TMDS. The CICU, which has a function of interfacing the main computer with the CAMAC system, has been replaced with the workstation-based system after the fine tuning

  17. Universal interface on Zynq"® SoC with CAN, RS-232, Ethernet and AXI GPIO for instrumentation & control

    International Nuclear Information System (INIS)

    Kumar, Abhijeet; Rajpal, Rachana; Pujara, Harshad; Mandaliya, Hitesh; Edappala, Praveenalal

    2016-01-01

    Highlights: • We have designed Universal Interface on Zynq"® SoC with CAN, RS-232, Ethernet and AXI GPIO for Instrumentation & Control. This project is based on Zynq"®-7000 family xc7z020clg484-1 chip. • We explored the full design flow starting from the hardware development in Vivado to software development in SDK using APIs in C language and then interfacing the host application developed in LabVIEW. • We also explored how to make custom IP with AXI bus interface in Vivado. • Useful for those who wants to make custom hardware on Zynq"® SoC. - Abstract: This paper describes an application developed on the latest Zynq"®-7000 All Programmable SoC (AP SoC) [1] devices which integrate the software programmability of an ARM"®-based processor with the hardware programmability of an FPGA, on a single device. In this paper we have implemented application which uses various interfaces like CAN, RS-232, Ethernet and AXI GPIO, so that our host application running on PC in LabVIEW can communicates with any hardware which has at least any one of the available interface. Zynq-7000 All Programmable SoCs (System On Chip) infuse customizable intelligence into today’s embedded systems to suit your unique application requirements. This family of FPGA is meant for high end application because it has huge resources on single chip. It offers you to make your own custom hardware IP, in fact we have made our custom IP called myIP in our design. The beauty of this chip is that it can write drivers for your custom IP which has AXI bus layer attached. After exporting the hardware information to the Software Development Kit (SDK), the tool is able to write drivers for your custom IP. This simplifies your development to a great extent. In a way this application provides the universal interfacing option to user. User can also write the digital data on the GPIO (General Purpose Input Output) through LabVIEW Test application GUI. This project can be used for remote control and

  18. Full-asynchronous gigabit-symmetric DPSK downstream and OOK upstream OCDMA-PON with source-free ONUs employing all-optical self-clocked time gate.

    Science.gov (United States)

    Dai, Bo; Shimizu, Satoshi; Wang, Xu; Wada, Naoya

    2012-12-10

    We propose an asynchronous gigabit-symmetric optical code division multiplexing access passive optical network (OCDMA-PON) in which optical network units (ONUs) are source-free. In the experiment, we demonstrate a duplex OCDMA system with a 50 km 10 Gbit/s/user 4-user DPSK-OCDMA downlink and a 50 km 10 Gbit/s/user 4-user OOK-OCDMA uplink and error-free duplex transmissions are achieved. Besides, we investigate an all-optical self-clocked time gate, which is used for the signal regeneration of decoded signals and ensures asynchronization in the up/downstream transmissions. Furthermore, we evaluate the power budget of the proposed duplex transmission.

  19. Analisis Redaman Pada Jaringan FTTH (Fiber To The Home Dengan Teknologi GPON (Gigabit Passive Optical Network Di PT MNC Kabel Mediacom

    Directory of Open Access Journals (Sweden)

    Minal Abral

    2017-06-01

    Full Text Available iber optic merupakan teknologi yang menyediakan kapasitas bandwith besar dengan kecepatan tinggi, tidak dipengaruhi interferensi gelombang elektromagnetik, Sejalan dengan berkembang secara pesatnya penggunaan serat optik sebagai medium penghantar, ada kemungkinan terjadinya hilang informasi akibat kerugian dari pemanjangan kabel fiber optic ataupun penyambungan kabel fiber optic, kerugian tersebut yaitu redaman. Dalam penerapan metode link power budget, perhitungan redaman dilakukan dengan data yang diperoleh berdasarkan standarisasi dan pengukuran menggunakan perangkat optical power meter. Hasil analisa perhitungan, sistem mampu dalam keadaan normal menggunakan layanan gigabit passive optical network dapat diterima oleh perangkat akhir jaringan fiber to the home pada pelanggan perusahaan PT MNC Kabel Mediacom yang berada di Kelurahan Jati RW 02 Pulo Gadung Jakarta Timur.

  20. Implementation of MPICH on Top of MP_Lite

    Energy Technology Data Exchange (ETDEWEB)

    Selvarajan, Shoba [Iowa State Univ., Ames, IA (United States)

    2002-01-01

    The goal of this thesis is to develop a new Channel Interface device for the MPICH Implementation of the MPI (Message Passing Interface) standard using MP_Lite. MP_Lite is a lightweight message-passing library that is not a full MPI implementation, but offers high performance MPICH (Message Passing Interface CHameleon) is a full implementation of the MPI standard that has the p4 library as the underlying communication device for TCP/IP networks. By integrating MP_Lite as a Channel Interface device in MPICH, a parallel programmer can utilize the full MPI implementation of MPICH as well as the high bandwidth offered by MP_Lite. There are several layers in the MPICH library where one can tie a new device. The Channel Interface is the lowest layer that requires very few functions to add a new device. By attaching MP_Lite to MPICH at the lowest level, the Channel Interface, almost all of the performance of the MP_Lite library can be delivered to the applications using MPICH. MP_Lite can be implemented either as a blocking or a non-blocking Channel Interface device. The performance was measured on two separate test clusters, the PC and the Alpha miniclusters, having Gigabit Ethernet connections. The PC cluster has two 1.8 GHz Pentium 4 PCs and the Alpha cluster has two 500 MHz Compaq DS20 workstations. Different network interface cards like Netgear, TrendNet and SysKonnect Gigabit Ethernet cards were used for the measurements. Both the blocking and non-blocking MPICH-MP_Lite Channel Interface devices perform close to raw TCP, whereas a performance loss of 25-30% is seen in the MPICH-p4 Channel Interface device for larger messages. The superior performance offered by the MPICH-MP_Lite device compared to the MPICH-p4 device can be easily seen on the SysKonnect cards using jumbo frames. The throughput curve also improves considerably by increasing the Eager/Rendezvous threshold.

  1. Design and evaluation of FDDI fiber optics networkfor Ethernets, VAX's and Ingraph work stations

    Science.gov (United States)

    Wernicki, M. Chris

    1992-09-01

    The purpose of this project is to design and evaluate the FDDI Fiber Optics Network for Ethernets, VAX's, and Ingraph work stations. From the KSC Headquarters communication requirement, it would be necessary to develop the FDDI network based on IEEE Standards outlined in the ANSI X3T9.5, Standard 802.3 and 802.5 topology - direct link via intermediate concentrator and bridge/router access. This analysis should examine the major factors that influence the operating conditions of the Headquarters Fiber plant. These factors would include, but are not limited to the interconnecting devices such as repeaters, bridges, routers and many other relevant or significant FDDI characteristics. This analysis is needed to gain a better understanding of overall FDDI performance.

  2. Design and evaluation of FDDI fiber optics networkfor Ethernets, VAX's and Ingraph work stations

    Science.gov (United States)

    Wernicki, M. Chris

    1992-01-01

    The purpose of this project is to design and evaluate the FDDI Fiber Optics Network for Ethernets, VAX's, and Ingraph work stations. From the KSC Headquarters communication requirement, it would be necessary to develop the FDDI network based on IEEE Standards outlined in the ANSI X3T9.5, Standard 802.3 and 802.5 topology - direct link via intermediate concentrator and bridge/router access. This analysis should examine the major factors that influence the operating conditions of the Headquarters Fiber plant. These factors would include, but are not limited to the interconnecting devices such as repeaters, bridges, routers and many other relevant or significant FDDI characteristics. This analysis is needed to gain a better understanding of overall FDDI performance.

  3. A multi-ring optical packet and circuit integrated network with optical buffering.

    Science.gov (United States)

    Furukawa, Hideaki; Shinada, Satoshi; Miyazawa, Takaya; Harai, Hiroaki; Kawasaki, Wataru; Saito, Tatsuhiko; Matsunaga, Koji; Toyozumi, Tatuya; Wada, Naoya

    2012-12-17

    We newly developed a 3 × 3 integrated optical packet and circuit switch-node. Optical buffers and burst-mode erbium-doped fiber amplifiers with the gain flatness are installed in the 3 × 3 switch-node. The optical buffer can prevent packet collisions and decrease packet loss. We constructed a multi-ring optical packet and circuit integrated network testbed connecting two single-ring networks and a client network by the 3 × 3 switch-node. For the first time, we demonstrated 244 km fiber transmission and 5-node hopping of multiplexed 14-wavelength 10 Gbps optical paths and 100 Gbps optical packets encapsulating 10 Gigabit Ethernet frames on the testbed. Error-free (frame error rate optical packets of various packet lengths. In addition, successful avoidance of packet collisions by optical buffers was confirmed.

  4. The upgraded LTP-V at SLS

    Energy Technology Data Exchange (ETDEWEB)

    Flechsig, U., E-mail: uwe.flechsig@psi.ch [Paul Scherrer Institut, Swiss Light Source, 5232 Villigen-PSI (Switzerland); Jaggi, A.; Krempaský, J.; Spielmann, S.; Thominet, V. [Paul Scherrer Institut, Swiss Light Source, 5232 Villigen-PSI (Switzerland)

    2013-05-11

    Since 2005 the Swiss Light Source (SLS) has been operating a Long Trace Profiler (LTP)-V from Ocean Optics in its metrology laboratory to measure the synchrotron optics for SLS. In 2012 we finished a significant upgrade to improve the accuracy, reliability and measurement efficiency in particular for the calibration of adaptive optics. Folding mirrors with figure errors <λ/100 and an additional linear encoder have been installed, the 1d CCD detector with 2048 pixels has been replaced by a 16 mega-pixel CCD camera with gigabit ethernet interface GigE, the monolithic software has been replaced by a modular, full- EPICS compatible system based on a new LTP plugin for the areaDetector software for image processing. The plugin allows slope determination in real time i.e. per frame.

  5. The FERMI-Elettra distributed real-time framework

    International Nuclear Information System (INIS)

    Pivetta, L.; Gaio, G.; Passuello, R.; Scalamera, G.

    2012-01-01

    FERMI-Elettra is a Free Electron Laser (FEL) based on a 1.5 GeV linac. The pulsed operation of the accelerator and the necessity to characterize and control each electron bunch requires synchronous acquisition of the beam diagnostics together with the ability to drive actuators in real-time at the linac repetition rate. The Adeos/Xenomai real-time extensions have been adopted in order to add real-time capabilities to the Linux based control system computers running the Tango software. A software communication protocol based on Gigabit Ethernet and known as Network Reflective Memory (NRM) has been developed to implement a shared memory across the whole control system, allowing computers to communicate in real-time. The NRM architecture, the real-time performance and the integration in the control system are described. (authors)

  6. Development of coincidence processing module for PEM

    International Nuclear Information System (INIS)

    Feng Baotong; Shuai Lei; Li Ke

    2011-01-01

    For the breast cancer diagnosis and therapy, a prototype of positron emission mammography (PEM) was developed in Institute of High Energy Physics, Chinese Academy of Sciences. In this paper, the design of coincidence processing module (CPM) for this PEM was presented. Both the hardware architecture and the software logic were introduced. In this design, the CPM used the Rocket IO fast interface in FPGA and fiber technology to acquire the preprocessed data from the continuous sampling module (CSM) and then selected the valid event with the coincidence timing window method, which was performed in the FPGA on the daughter board. The CPM transmits the processed data to host computer via gigabit Ethernet. The whole system was controlled by CAN bus. The primary tests indicate that the performance of this design is good. (authors)

  7. Universal interface on Zynq{sup ®} SoC with CAN, RS-232, Ethernet and AXI GPIO for instrumentation & control

    Energy Technology Data Exchange (ETDEWEB)

    Kumar, Abhijeet, E-mail: akumar@ipr.res.in; Rajpal, Rachana; Pujara, Harshad; Mandaliya, Hitesh; Edappala, Praveenalal

    2016-11-15

    Highlights: • We have designed Universal Interface on Zynq{sup ®} SoC with CAN, RS-232, Ethernet and AXI GPIO for Instrumentation & Control. This project is based on Zynq{sup ®}-7000 family xc7z020clg484-1 chip. • We explored the full design flow starting from the hardware development in Vivado to software development in SDK using APIs in C language and then interfacing the host application developed in LabVIEW. • We also explored how to make custom IP with AXI bus interface in Vivado. • Useful for those who wants to make custom hardware on Zynq{sup ®} SoC. - Abstract: This paper describes an application developed on the latest Zynq{sup ®}-7000 All Programmable SoC (AP SoC) [1] devices which integrate the software programmability of an ARM{sup ®}-based processor with the hardware programmability of an FPGA, on a single device. In this paper we have implemented application which uses various interfaces like CAN, RS-232, Ethernet and AXI GPIO, so that our host application running on PC in LabVIEW can communicates with any hardware which has at least any one of the available interface. Zynq-7000 All Programmable SoCs (System On Chip) infuse customizable intelligence into today’s embedded systems to suit your unique application requirements. This family of FPGA is meant for high end application because it has huge resources on single chip. It offers you to make your own custom hardware IP, in fact we have made our custom IP called myIP in our design. The beauty of this chip is that it can write drivers for your custom IP which has AXI bus layer attached. After exporting the hardware information to the Software Development Kit (SDK), the tool is able to write drivers for your custom IP. This simplifies your development to a great extent. In a way this application provides the universal interfacing option to user. User can also write the digital data on the GPIO (General Purpose Input Output) through LabVIEW Test application GUI. This project can be used

  8. Q-Ball of Inferior Fronto-Occipital Fasciculus and Beyond

    Science.gov (United States)

    Amirbekian, Bagrat; Berger, Mitchel S.; Henry, Roland G.

    2014-01-01

    The inferior fronto-occipital fasciculus (IFOF) is historically described as the longest associative bundle in the human brain and it connects various parts of the occipital cortex, temporo-basal area and the superior parietal lobule to the frontal lobe through the external/extreme capsule complex. The exact functional role and the detailed anatomical definition of the IFOF are still under debate within the scientific community. In this study we present a fiber tracking dissection of the right and left IFOF by using a q-ball residual-bootstrap reconstruction of High-Angular Resolution Diffusion Imaging (HARDI) data sets in 20 healthy subjects. By defining a single seed region of interest on the coronal fractional anisotropy (FA) color map of each subject, we investigated all the pathways connecting the parietal, occipital and posterior temporal cortices to the frontal lobe through the external/extreme capsule. In line with recent post-mortem dissection studies we found more extended anterior-posterior association connections than the “classical” fronto-occipital representation of the IFOF. In particular the pathways we evidenced showed: a) diffuse projections in the frontal lobe, b) fronto-parietal lobes connections trough the external capsule in almost all the subjects and c) widespread connections in the posterior regions. Our study represents the first consistent in vivo demonstration across a large group of individuals of these novel anterior and posterior terminations of the IFOF detailed described only by post-mortem anatomical dissection. Furthermore our work establishes the feasibility of consistent in vivo mapping of this architecture with independent in vivo methodologies. In conclusion q-ball tractography dissection supports a more complex definition of IFOF, which includes several subcomponents likely underlying specific function. PMID:24945305

  9. Q-ball of inferior fronto-occipital fasciculus and beyond.

    Directory of Open Access Journals (Sweden)

    Eduardo Caverzasi

    Full Text Available The inferior fronto-occipital fasciculus (IFOF is historically described as the longest associative bundle in the human brain and it connects various parts of the occipital cortex, temporo-basal area and the superior parietal lobule to the frontal lobe through the external/extreme capsule complex. The exact functional role and the detailed anatomical definition of the IFOF are still under debate within the scientific community. In this study we present a fiber tracking dissection of the right and left IFOF by using a q-ball residual-bootstrap reconstruction of High-Angular Resolution Diffusion Imaging (HARDI data sets in 20 healthy subjects. By defining a single seed region of interest on the coronal fractional anisotropy (FA color map of each subject, we investigated all the pathways connecting the parietal, occipital and posterior temporal cortices to the frontal lobe through the external/extreme capsule. In line with recent post-mortem dissection studies we found more extended anterior-posterior association connections than the "classical" fronto-occipital representation of the IFOF. In particular the pathways we evidenced showed: a diffuse projections in the frontal lobe, b fronto-parietal lobes connections trough the external capsule in almost all the subjects and c widespread connections in the posterior regions. Our study represents the first consistent in vivo demonstration across a large group of individuals of these novel anterior and posterior terminations of the IFOF detailed described only by post-mortem anatomical dissection. Furthermore our work establishes the feasibility of consistent in vivo mapping of this architecture with independent in vivo methodologies. In conclusion q-ball tractography dissection supports a more complex definition of IFOF, which includes several subcomponents likely underlying specific function.

  10. Analysis of 2D Torus and Hub Topologies of 100Mb/s Ethernet for the Whitney Commodity Computing Testbed

    Science.gov (United States)

    Pedretti, Kevin T.; Fineberg, Samuel A.; Kutler, Paul (Technical Monitor)

    1997-01-01

    A variety of different network technologies and topologies are currently being evaluated as part of the Whitney Project. This paper reports on the implementation and performance of a Fast Ethernet network configured in a 4x4 2D torus topology in a testbed cluster of 'commodity' Pentium Pro PCs. Several benchmarks were used for performance evaluation: an MPI point to point message passing benchmark, an MPI collective communication benchmark, and the NAS Parallel Benchmarks version 2.2 (NPB2). Our results show that for point to point communication on an unloaded network, the hub and 1 hop routes on the torus have about the same bandwidth and latency. However, the bandwidth decreases and the latency increases on the torus for each additional route hop. Collective communication benchmarks show that the torus provides roughly four times more aggregate bandwidth and eight times faster MPI barrier synchronizations than a hub based network for 16 processor systems. Finally, the SOAPBOX benchmarks, which simulate real-world CFD applications, generally demonstrated substantially better performance on the torus than on the hub. In the few cases the hub was faster, the difference was negligible. In total, our experimental results lead to the conclusion that for Fast Ethernet networks, the torus topology has better performance and scales better than a hub based network.

  11. Mitigated FPGA design of multi-gigabit transceivers for application in high radiation environments of High Energy Physics experiments

    International Nuclear Information System (INIS)

    Brusati, M.; Camplani, A.; Cannon, M.; Chen, H.; Citterio, M.

    2017-01-01

    SRAM-ba8ed Field Programmable Gate Array (FPGA) logic devices arc very attractive in applications where high data throughput is needed, such as the latest generation of High Energy Physics (HEP) experiments. FPGAs have been rarely used in such experiments because of their sensitivity to radiation. The present paper proposes a mitigation approach applied to commercial FPGA devices to meet the reliability requirements for the front-end electronics of the Liquid Argon (LAr) electromagnetic calorimeter of the ATLAS experiment, located at CERN. Particular attention will be devoted to define a proper mitigation scheme of the multi-gigabit transceivers embedded in the FPGA, which is a critical part of the LAr data acquisition chain. A demonstrator board is being developed to validate the proposed methodology. :!\\litigation techniques such as Triple Modular Redundancy (T:t\\IR) and scrubbing will be used to increase the robustness of the design and to maximize the fault tolerance from Single-Event Upsets (SEUs).

  12. A potent approach for the development of FPGA based DAQ system for HEP experiments

    Science.gov (United States)

    Khan, Shuaib Ahmad; Mitra, Jubin; David, Erno; Kiss, Tivadar; Nayak, Tapan Kumar

    2017-10-01

    With ever increasing particle beam energies and interaction rates in modern High Energy Physics (HEP) experiments in the present and future accelerator facilities, there has always been the demand for robust Data Acquisition (DAQ) schemes which perform in the harsh radiation environment and handle high data volume. The scheme is required to be flexible enough to adapt to the demands of future detector and electronics upgrades, and at the same time keeping the cost factor in mind. To address these challenges, in the present work, we discuss an efficient DAQ scheme for error resilient, high speed data communication on commercially available state-of-the-art FPGA with optical links. The scheme utilises GigaBit Transceiver (GBT) protocol to establish radiation tolerant communication link between on-detector front-end electronics situated in harsh radiation environment to the back-end Data Processing Unit (DPU) placed in a low radiation zone. The acquired data are reconstructed in DPU which reduces the data volume significantly, and then transmitted to the computing farms through high speed optical links using 10 Gigabit Ethernet (10GbE). In this study, we focus on implementation and testing of GBT protocol and 10GbE links on an Intel FPGA. Results of the measurements of resource utilisation, critical path delays, signal integrity, eye diagram and Bit Error Rate (BER) are presented, which are the indicators for efficient system performance.

  13. A potent approach for the development of FPGA based DAQ system for HEP experiments

    International Nuclear Information System (INIS)

    Khan, Shuaib Ahmad; Mitra, Jubin; Nayak, Tapan Kumar; David, Erno; Kiss, Tivadar

    2017-01-01

    With ever increasing particle beam energies and interaction rates in modern High Energy Physics (HEP) experiments in the present and future accelerator facilities, there has always been the demand for robust Data Acquisition (DAQ) schemes which perform in the harsh radiation environment and handle high data volume. The scheme is required to be flexible enough to adapt to the demands of future detector and electronics upgrades, and at the same time keeping the cost factor in mind. To address these challenges, in the present work, we discuss an efficient DAQ scheme for error resilient, high speed data communication on commercially available state-of-the-art FPGA with optical links. The scheme utilises GigaBit Transceiver (GBT) protocol to establish radiation tolerant communication link between on-detector front-end electronics situated in harsh radiation environment to the back-end Data Processing Unit (DPU) placed in a low radiation zone. The acquired data are reconstructed in DPU which reduces the data volume significantly, and then transmitted to the computing farms through high speed optical links using 10 Gigabit Ethernet (10GbE). In this study, we focus on implementation and testing of GBT protocol and 10GbE links on an Intel FPGA. Results of the measurements of resource utilisation, critical path delays, signal integrity, eye diagram and Bit Error Rate (BER) are presented, which are the indicators for efficient system performance.

  14. Coexistence Performance of High-Altitude Platform and Terrestrial Systems Using Gigabit Communication Links to Serve Specialist Users

    Directory of Open Access Journals (Sweden)

    D. Grace

    2008-10-01

    Full Text Available This paper presents three feasible methods to serve specialist users within a service area of up to 150 km diameter by using spot-beam gigabit wireless communication links from high-altitude platforms (HAPs. A single HAP serving multiple spot beams coexists with terrestrial systems, all sharing a common frequency band. The schemes provided in the paper are used to adjust the pointing direction of aperture antennas operating in the mm-wave bands, such that the peak carrier to interference plus noise ratio (CINR is delivered directly toward the location of the specialist users; the schemes include the small step size scheme, half distance scheme, and beam switch scheme. The pointing process is controlled iteratively using the mean distance between the peak CINR locations and user positions. The paper shows that both the small step size and half distance schemes significantly enhance the CINR at the user, but performance is further improved if beams with adverse performance below a specific threshold are switched off, or are assigned another channel.

  15. Coexistence Performance of High-Altitude Platform and Terrestrial Systems Using Gigabit Communication Links to Serve Specialist Users

    Directory of Open Access Journals (Sweden)

    Peng Z

    2008-01-01

    Full Text Available Abstract This paper presents three feasible methods to serve specialist users within a service area of up to 150 km diameter by using spot-beam gigabit wireless communication links from high-altitude platforms (HAPs. A single HAP serving multiple spot beams coexists with terrestrial systems, all sharing a common frequency band. The schemes provided in the paper are used to adjust the pointing direction of aperture antennas operating in the mm-wave bands, such that the peak carrier to interference plus noise ratio (CINR is delivered directly toward the location of the specialist users; the schemes include the small step size scheme, half distance scheme, and beam switch scheme. The pointing process is controlled iteratively using the mean distance between the peak CINR locations and user positions. The paper shows that both the small step size and half distance schemes significantly enhance the CINR at the user, but performance is further improved if beams with adverse performance below a specific threshold are switched off, or are assigned another channel.

  16. VCSEL-based gigabit IR-UWB link for converged communication and sensing applications in optical metro-access networks

    DEFF Research Database (Denmark)

    Pham, Tien Thang; Gibbon, Timothy Braidwood; Tafur Monroy, Idelfonso

    2012-01-01

    We report on experimental demonstration of an impulse radio ultrawideband (IR-UWB) based converged communication and sensing system. A 1550-nm VCSEL-generated IR-UWB signal is used for 2-Gbps wireless data distribution over 800-m and 50-km single mode fiber links which present short-range in-buil...... application, paving the way forward for the development and deployment of converged UWB VCSEL-based technologies in access and in-building networks of the future.......We report on experimental demonstration of an impulse radio ultrawideband (IR-UWB) based converged communication and sensing system. A 1550-nm VCSEL-generated IR-UWB signal is used for 2-Gbps wireless data distribution over 800-m and 50-km single mode fiber links which present short-range in......-building and long-reach access network applications. The IR-UWB signal is also used to simultaneously measure the rotational speed of a blade spinning between 18 and 30 Hz. To the best of our knowledge, this is the very first demonstration of a simultaneous gigabit UWB telecommunication and wireless UWB sensing...

  17. Reverse polarity optical-OFDM (RPO-OFDM): dimming compatible OFDM for gigabit VLC links.

    Science.gov (United States)

    Elgala, Hany; Little, Thomas D C

    2013-10-07

    Visible light communications (VLC) technology permits the exploitation of light-emitting diode (LED) luminaries for simultaneous illumination and broadband wireless communication. Optical orthogonal frequency-division multiplexing (O-OFDM) is a promising modulation technique for VLC systems, in which the real-valued O-OFDM baseband signal is used to modulate the instantaneous power of the optical carrier to achieve gigabit data rates. However, a major design challenge that limits the commercialization of VLC is how to incorporate the industry-preferred pulse-width modulation (PWM) light dimming technique while maintaining a broadband and reliable communication link. In this work, a novel signal format, reverse polarity O-OFDM (RPO-OFDM), is proposed to combine the fast O-OFDM communication signal with the relatively slow PWM dimming signal, where both signals contribute to the effective LED brightness. The advantages of using RPO-OFDM include, (1) the data rate is not limited by the frequency of the PWM signal, (2) the LED dynamic range is fully utilized to minimize the nonlinear distortion of the O-OFDM communication signal, and (3) the bit-error performance is sustained over a large fraction of the luminaire dimming range. In addition, RPO-OFDM offers a practical approach to utilize off-the-shelf LED drivers. We show results of numerical simulations to study the trade-offs between the PWM duty cycle, average electrical O-OFDM signal power, radiated optical flux as well as human perceived light.

  18. 100G Ethernet in the wild - first experiences

    Science.gov (United States)

    Hoeft, Bruno; Stoy, Robert; Schröder, Frank; Reymund, Aurelie; Niederberger, Ralf; Mextorf, Olaf; Werner, Sabine

    2011-12-01

    A 100 Gigabit Testbed was established in a collaboration of 6 partners. Three industry partners have contributed the fiber infrastructure, the DWDM equipment, as well as the required routers. 447 kilometer was the distance of the wide area testbed established in collaboration with the German NREN DFN between Karlsruhe Institute of Technology and Forschungszentrum Jülich Before starting, DFN assured the quality of the fiber infrastructure, the operation of the DWDM systems at both locations, as well as the connection of the routers to this WAN link with a bandwidth of 100GE. 12*10GE interfaces were available at each site for connecting the local testnodes to the routers. A monitoring and measurement framework was installed for recording the most important IP network performance metrics, among them the One Way Delay (OWD) and its Variation, Packet Loss and Packet Reordering. The delay measurements were conducted between the GPS time synchronized Hades[1]measurement nodes at each location. Additionally all relevant counters at the routers have been recorded using a SNMP based Network Manangement Station and supplemented special command line interface output gathering and parsing scripts. The interfaces statistics were stored in 60 second intervals. The aim of the testbed was to demonstrate a failure-free transmission of one or more IP datastreams over 100GE during the whole period of 4 weeks.This included the evaluation of the 100 Gbit/s optical transmission system, the 100GE interfaces between the routers and the optical system, and the evaluation of a sustained 100GE transmission as well as the evaluation of the use of 100GE in a production like environment. The evaluation included a circulated (in a routing loop) tunable load between 1 and 100 Gbit/s, measurement of transmission quality of TCP and UDP datastreams between the endsystems, measurements of one way latency, a ramping up data transmission from approx. 8 Gbit/s up to 96 Gbit/s.

  19. 100G Ethernet in the wild-first experiences

    International Nuclear Information System (INIS)

    Hoeft, Bruno; Reymund, Aurelie; Stoy, Robert; Schröder, Frank; Niederberger, Ralf; Mextorf, Olaf; Werner, Sabine

    2011-01-01

    A 100 Gigabit Testbed was established in a collaboration of 6 partners. Three industry partners have contributed the fiber infrastructure, the DWDM equipment, as well as the required routers. 447 kilometer was the distance of the wide area testbed established in collaboration with the German NREN DFN between Karlsruhe Institute of Technology and Forschungszentrum Julich Before starting, DFN assured the quality of the fiber infrastructure, the operation of the DWDM systems at both locations, as well as the connection of the routers to this WAN link with a bandwidth of 100GE. 12*10GE interfaces were available at each site for connecting the local testnodes to the routers. A monitoring and measurement framework was installed for recording the most important IP network performance metrics, among them the One Way Delay (OWD) and its Variation, Packet Loss and Packet Reordering. The delay measurements were conducted between the GPS time synchronized Hades [1] measurement nodes at each location. Additionally all relevant counters at the routers have been recorded using a SNMP based Network Manangement Station and supplemented special command line interface output gathering and parsing scripts. The interfaces statistics were stored in 60 second intervals. The aim of the testbed was to demonstrate a failure-free transmission of one or more IP datastreams over 100GE during the whole period of 4 weeks.This included the evaluation of the 100 Gbit/s optical transmission system, the 100GE interfaces between the routers and the optical system, and the evaluation of a sustained 100GE transmission as well as the evaluation of the use of 100GE in a production like environment. The evaluation included a circulated (in a routing loop) tunable load between 1 and 100 Gbit/s, measurement of transmission quality of TCP and UDP datastreams between the endsystems, measurements of one way latency, a ramping up data transmission from approx. 8 Gbit/s up to 96 Gbit/s.

  20. Un modelo para el análisis de la confiabilidad de Ethernet Industrial en topología de anillo

    Directory of Open Access Journals (Sweden)

    Guillermo R. Friedrich

    2009-07-01

    Full Text Available Resumen: Ethernet Industrial es cada vez más utilizada para aplicaciones de automatización, tanto en industrias de manufactura como de procesos. Además de los requerimientos de ancho de banda y manejo de tráfico en tiempo real, estos entornos también presentan requerimientos muy fuertes en cuanto a la confiabilidad, debido a los riesgos inherentes a tales actividades. La topología de anillo es de aplicación habitual en este tipo de redes, debido a que, por tener un enlace redundante, provee una cierta capacidad de tolerancia a fallas. En el presente trabajo se analiza la confiabilidad de Ethernet Industrial en topología de anillo, con el objetivo de obtener resultados que favorezcan al diseño y selección de componentes, como así también que permitan estimar los requerimientos de mantenimiento correctivo. El modelo planteado considera en primera instancia solamente a los enlaces, a fin de analizar la confiabilidad de la comunicación entre conmutadores. Posteriormente se incluyen los conmutadores y se analiza la confiabilidad de la comunicación entre dispositivos de campo a través de la red. El tiempo de respuesta para la solución de una falla es uno de los componentes básicos del modelo considerado. Palabras clave: confiabilidad de la red, topologías de red, análisis de confiabilidad, tiempo medio entre fallas (MTBF, tolerancia a fallas

  1. Redes Atm de Alto Desempenho

    Directory of Open Access Journals (Sweden)

    Flávia Oliveira Santos de Sá Lisboa

    2015-12-01

    Full Text Available A tendência atual de integração de serviços de dados, voz e vídeo, estimulada pelo pleno sucesso da Internet, aumentou a demanda por maior banda e melhor desempenho nas redes de comunicação de dados. Neste contexto, a tecnologia ATM (Asynchronous Transfer Mode vem sendo utilizada na implementação de backbone de LANs e WANs, justamente por oferecer a possibilidade de integração de serviços com qualidade, alta escalabilidade e altas taxas de transferência em banda larga. Neste artigo serão abordados os principais conceitos relacionados à tecnologia ATM, suas vantagens e desvantagens em face de outras tecnologias (como Fast e Gigabit Ethernet, além de casos de sua utilização em empresas e instituições de ensino.

  2. A Dynamic Linear Hashing Method for Redundancy Management in Train Ethernet Consist Network

    Directory of Open Access Journals (Sweden)

    Xiaobo Nie

    2016-01-01

    Full Text Available Massive transportation systems like trains are considered critical systems because they use the communication network to control essential subsystems on board. Critical system requires zero recovery time when a failure occurs in a communication network. The newly published IEC62439-3 defines the high-availability seamless redundancy protocol, which fulfills this requirement and ensures no frame loss in the presence of an error. This paper adopts these for train Ethernet consist network. The challenge is management of the circulating frames, capable of dealing with real-time processing requirements, fast switching times, high throughout, and deterministic behavior. The main contribution of this paper is the in-depth analysis it makes of network parameters imposed by the application of the protocols to train control and monitoring system (TCMS and the redundant circulating frames discarding method based on a dynamic linear hashing, using the fastest method in order to resolve all the issues that are dealt with.

  3. Development of an Ethernet enabled microcontroller based module for Superconducting Cyclotron ECR beam line control

    International Nuclear Information System (INIS)

    Chatterjee, M.; Koley, D.; Nabhiraj, P.Y.

    2012-01-01

    An Ethernet enabled control and data acquisition module is developed for remote control and monitoring of the ECR beam line equipment of the Superconducting Cyclotron. The PIC microcontroller based module supports multiple general purpose analog and digital inputs and outputs for interfacing with various equipments and an embedded web server. The remote monitoring and control of the equipment are achieved through the web based user interface. The user authenticated access to control parameters and module configuration parameters ensures the operational safety of the equipment under control. This module is installed in Superconducting Cyclotron ECR beam line for the control and monitoring of vacuum pumping modules, comprising of pumps, gate valves and dual vacuum gauges. The installation of these modules results in a distributed control with localised field cabling and hence better fault diagnosis. (author)

  4. Development of Ethernet Based Remote Monitoring and Controlling of MST Radar Transmitters using ARM Cortex Microcontroller

    Directory of Open Access Journals (Sweden)

    Lakshmi Narayana ROSHANNA

    2013-01-01

    Full Text Available The recently emerging Web Services technology has provided a new and excellent solution to Industrial Automation in online control and remote monitoring. In this paper, a Web Service Based Remote Monitoring & Controlling of Radar Transmitters for safety management (WMCT developed for MST Radar is described. It achieved the MST radar transmitters’ remote supervisory, data logging and controlling activities. The system is developed using an ARM Cortex M3 processor to monitor and control the 32 triode-based transmitters of the 53-MHz Radar. The system controls transmitters via the internet using an Ethernet client server and store health status in the Database for radar performance analysis. The system enables scientists to operate and control the radar transmitters from a remote client machine Webpage.

  5. Testing the connections within face processing circuitry in Capgras delusion with diffusion imaging tractography

    Directory of Open Access Journals (Sweden)

    Maria A. Bobes

    2016-01-01

    Full Text Available Although Capgras delusion (CD patients are capable of recognizing familiar faces, they present a delusional belief that some relatives have been replaced by impostors. CD has been explained as a selective disruption of a pathway processing affective values of familiar faces. To test the integrity of connections within face processing circuitry, diffusion tensor imaging was performed in a CD patient and 10 age-matched controls. Voxel-based morphometry indicated gray matter damage in right frontal areas. Tractography was used to examine two important tracts of the face processing circuitry: the inferior fronto-occipital fasciculus (IFOF and the inferior longitudinal (ILF. The superior longitudinal fasciculus (SLF and commissural tracts were also assessed. CD patient did not differ from controls in the commissural fibers, or the SLF. Right and left ILF, and right IFOF were also equivalent to those of controls. However, the left IFOF was significantly reduced respect to controls, also showing a significant dissociation with the ILF, which represents a selective impairment in the fiber-tract connecting occipital and frontal areas. This suggests a possible involvement of the IFOF in affective processing of faces in typical observers and in covert recognition in some cases with prosopagnosia.

  6. New methods to engineer and seamlessly reconfigure time triggered ethernet based systems during runtime based on the PROFINET IRT example

    CERN Document Server

    Wisniewski, Lukasz

    2017-01-01

    The objective of this dissertation is to design a concept that would allow to increase the flexibility of currently available Time Triggered Ethernet based (TTEB) systems, however, without affecting their performance and robustness. The main challenges are related to scheduling of time triggered communication that may take significant amount of time and has to be performed on a powerful platform. Additionally, the reliability has to be considered and kept on the required high level. Finally, the reconfiguration has to be optimally done without affecting the currently running system.

  7. SURVEY OF COMMUNICATION LINKS FOR ATCA IN PHYSICS

    CERN Document Server

    Makowski, D; Piotrowski, A; Cichalewski, W; Jalmuzna, W; Koprek, W; Simrock, S

    2009-01-01

    Modern machines used in high energy physics require sophisticated and complex control systems. The complex systems are usually built as distributed systems. Therefore, the connectivity and communication links between distributed subsystems play a crucial role in the control system. The Advanced TelecommunicationComputingArchitecture (ATCA) and Advanced Mezzanine Card (AMC) standards have attracted the attention of physics community because they offer various types of data communication channels with high bandwidth, redundancy, high reliability and availability. The standards allow using different types of communication interfaces like PCIe, Gigabit Ethernet, RapidIO. In real-time systems the data transmission latency is also important. The acquisition of real-time data from hundreds of analogue channels is required for the Low Level Radio Frequency (LLRF) controller of XFEL (X-ray Free Electron Laser) accelerator. The paper presents survey of the communication interfaces of the LLRF controller for XFEL. The d...

  8. FPGA-based network data transmission scheme for CSNS

    International Nuclear Information System (INIS)

    Wang Xiuku; Zhang Hongyu; Gu Minhao; Xiao Liang

    2012-01-01

    This paper presents the FPGA-based network data transmission solutions for the Data Acquisition System of China Spallation Neutron Source (CSNS). The board with FPGA as the core is used as the hardware platform to realize the transmission of network data. A SOPC system is built and an embedded Linux is transplanted on PowerPC Core. An application program based on Linux has been finished to realize the data transmission via embedded Gigabit Ethernet. The relationship between network transfer performance and packet size was obtained by a test program. In addition, the paper also tried to realize some other ways to transfer data: transplanting PetaLinux on Microblaze, transplanting Lwip protocol stack on PowerPC Core and Microblaze. Their advantages and disadvantages are analyzed and compared in this paper, so that different options and recommendations can be given to meet the actual needs of different projects in the future. (authors)

  9. Performance comparison between ISCSI and other hardware and software solutions

    CERN Document Server

    Gug, M

    2003-01-01

    We report on our investigations on some technologies that can be used to build disk servers and networks of disk servers using commodity hardware and software solutions. It focuses on the performance that can be achieved by these systems and gives measured figures for different configurations. It is divided into two parts : iSCSI and other technologies and hardware and software RAID solutions. The first part studies different technologies that can be used by clients to access disk servers using a gigabit ethernet network. It covers block access technologies (iSCSI, hyperSCSI, ENBD). Experimental figures are given for different numbers of clients and servers. The second part compares a system based on 3ware hardware RAID controllers, a system using linux software RAID and IDE cards and a system mixing both hardware RAID and software RAID. Performance measurements for reading and writing are given for different RAID levels.

  10. Quality of service on Linux for the Atlas TDAQ event building network

    International Nuclear Information System (INIS)

    Yasu, Y.; Manabe, A.; Fujii, H.; Watase, Y.; Nagasaka, Y.; Hasegawa, Y.; Shimojima, M.; Nomachi, M.

    2001-01-01

    Congestion control for packets sent on a network is important for DAQ systems that contain an event builder using switching network technologies. Quality of Service (QoS) is a technique for congestion control. Recent Linux releases provide QoS in the kernel to manage network traffic. The authors have analyzed the packet-loss and packet distribution for the event builder prototype of the Atlas TDAQ system. The authors used PC/Linux with Gigabit Ethernet network as the testbed. The results showed that QoS using CBQ and TBF eliminated packet loss on UDP/IP transfer while the UDP/IP transfer in best effort made lots of packet loss. The result also showed that the QoS overhead was small. The authors concluded that QoS on Linux performed efficiently in TCP/IP and UDP/IP and will have an important role of the Atlas TDAQ system

  11. SNL evaluation of Gigabit Passive Optical Networks (GPON).

    Energy Technology Data Exchange (ETDEWEB)

    Heckart, David G.; Roybal, Glen B.; Walker, Betty R.; Pratt, Thomas Joseph; Gossage, Steven Allen; Trujillo, Sandra M.; Fischer, Bob; Brenkosh, Joseph Peter; Rudolfo, Gerald F.; Dirks, David H.; Schutt, James Alan

    2009-08-01

    Gigabit Passive Optical Networks (GPON) is a networking technology which offers the potential to provide significant cost savings to Sandia National Laboratories in the area of network operations. However, a large scale GPON deployment requires a significant investment in equipment and infrastructure. Before a large scale GPON system was acquired and built, a small GPON system manufactured by Motorola was acquired and tested. The testing performed was to determine the suitability of GPON for use at SNL. This report documents that testing. This report presents test results of GPON system consisting of Motorola and Juniper equipment. The GPON system was tested in areas of data throughput, video conferencing, VOIP, security, and operations and management. The GPON system performed well in almost all areas. GPON will not meet the needs of the low percentage of users requiring a true 1-10 Gbps network connection. GPON will also most likely not meet the need of some servers requiring dedicated throughput of 1-10 Gbps. Because of that, there will be some legacy network connections that must remain. If these legacy network connections can not be reduced to a bare minimum and possibly consolidated to a few locations, any cost savings gained by switching to GPON will be negated by maintaining two networks. A contract has been recently awarded for new GPON equipment with larger buffers. This equipment should improve performance and further reduce the need for legacy network connections. Because GPON has fewer components than a typical hierarchical network, it should be easier to manage. For the system tested, the management was performed by using the AXSVison client. Access to the client must be tightly controlled, because if client/server communications are compromised, security will be an issue. As with any network, the reliability of individual components will determine overall system reliability. There were no failures with the routers, OLT, or Sun Workstation Management

  12. OFDM and PAM comparison using a high baudrate low resolution IM/DD interface for 400G Ethernet access.

    Science.gov (United States)

    André, Nuno Sequeira; Louchet, Hadrien; Filsinger, Volker; Hansen, Erik; Richter, André

    2016-05-30

    We compare OFDM and PAM for 400G Ethernet based on a 3-bit high baudrate IM/DD interface at 1550nm. We demonstrate 27Gb/s and 32Gb/s transmission over 10km SSMF using OFDM and PAM respectively. We show that capacity can be improved through adaptation/equalization to achieve 42Gb/s and 64Gb/s for OFDM and PAM respectively. Experimental results are used to create realistic simulations to extrapolate the performance of both modulation formats under varied conditions. For the considered interface we found that PAM has the best performance, OFDM is impaired by quantization noise. When the resolution limitation is relaxed, OFDM shows better performance.

  13. Using the ACR/NEMA standard with TCP/IP and Ethernet

    Science.gov (United States)

    Chimiak, William J.; Williams, Rodney C.

    1991-07-01

    There is a need for a consolidated picture archival and communications system (PACS) in hospitals. At the Bowman Gray School of Medicine of Wake Forest University (BGSM), the authors are enhancing the ACR/NEMA Version 2 protocol using UNIX sockets and TCP/IP to greatly improve connectivity. Initially, nuclear medicine studies using gamma cameras are to be sent to PACS. The ACR/NEMA Version 2 protocol provides the functionality of the upper three layers of the open system interconnection (OSI) model in this implementation. The images, imaging equipment information, and patient information are then sent in ACR/NEMA format to a software socket. From there it is handed to the TCP/IP protocol, which provides the transport and network service. TCP/IP, in turn, uses the services of IEEE 802.3 (Ethernet) to complete the connectivity. The advantage of this implementation is threefold: (1) Only one I/O port is consumed by numerous nuclear medicine cameras, instead of a physical port for each camera. (2) Standard protocols are used which maximize interoperability with ACR/NEMA compliant PACSs. (3) The use of sockets allows a migration path to the transport and networking services of OSIs TP4 and connectionless network service as well as the high-performance protocol being considered by the American National Standards Institute (ANSI) and the International Standards Organization (ISO) -- the Xpress Transfer Protocol (XTP). The use of sockets also gives access to ANSI's Fiber Distributed Data Interface (FDDI) as well as other high-speed network standards.

  14. High-speed VCSEL-based optical interconnects

    Science.gov (United States)

    Ishak, Waguih S.

    2001-11-01

    Vertical Cavity Surface Emitting Lasers (VCSEL) have made significant inroads into commercial realization especially in the area of data communications. Single VCSEL devices are key components in Gb Ethernet Transceivers. A multi-element VCSEL array is the key enabling technology for high-speed multi Gb/s parallel optical interconnect modules. In 1996, several companies introduced a new generation of fiber optic products based VCSEL technology such as multimode fiber transceivers for the ANSI Fiber Channel and Gigabit Ethernet IEEE 802.3 standards. VCSELs offer unique advantages over its edge-emitting counterparts in several areas. These include low-cost (LED-like) manufacturability, low current operation and array integrability. As data rates continue to increase, VCSELs offer the advantage of being able to provide the highest modulation bandwidth per milliamp of modulation current. Currently, most of the VCSEL-based products use short (780 - 980 nm) wavelength lasers. However, significant research efforts are taking place at universities and industrial research labs around the world to develop reliable, manufacturable and high-power long (1300 - 1550 nm) wavelength VCSELs. These lasers will allow longer (several km) transmission distances and will help alleviate some of the eye-safety issues. Perhaps, the most important advantage of VCSELs is the ability to form two-dimensional arrays much easier than in the case of edge-emitting lasers. These arrays (single and two-dimensional) will allow a whole new family of applications, specifically in very high-speed computer and switch interconnects.

  15. FELIX: the new detector readout system for the ATLAS experiment

    CERN Document Server

    Zhang, Jinlong; The ATLAS collaboration

    2017-01-01

    After the Phase-I upgrade and onward, the Front-End Link eXchange (FELIX) system will be the interface between the data handling system and the detector front-end electronics and trigger electronics at the ATLAS experiment. FELIX will function as a router between custom serial links and a commodity switch network which will use standard technologies to communicate with data collecting and processing components. The FELIX system is being developed by using commercial-off-the-shelf server PC technology in combination with a FPGA-based PCIe Gen3 I/O card interfacing to GigaBit Transceiver links and with Timing, Trigger and Control connectivity provided by an FMC-based mezzanine card. Dedicated firmware for the Xilinx FPGA (Virtex 7 and Kintex UltraScale) installed on the I/O card alongside an interrupt-driven Linux kernel driver and user-space software will provide the required functionality. On the network side, the FELIX unit connects to both Ethernet-based network and Infiniband. The system architecture of FE...

  16. Development of Digital Signal Processing with FPGAs for the Readout of the ATLAS Liquid Argon Calorimeter at HL-LHC

    CERN Document Server

    Stärz, Steffen; Zuber, K

    2010-01-01

    The Liquid Argon calorimeter of the ATLAS detector at CERN in Geneva is supposed to be equipped with advanced readout electronics for the operation at High Luminosity LHC. In this diploma thesis the aspect of fast serial data transmission and data processing to be used for the communication between different readout modules and data storage buffers of the trigger shall be further developed. Furthermore, the main focus is put on first preparation of the detector raw data with regard to a signal correction using a FIR filter. It is aimed at a most efficient, most resource economising and minimal latency causing solution that allows to process the huge amount of upcoming detector raw data in real time. Therefore a via UDP/IP reconfigurable prototype of a 5-stage FIR filter with Gigabit Ethernet Interface was implemented in a Xilinx Virtex-5 FPGA. The performance reached is fully within the the requirements for the upgraded calorimeter readout of ATLAS.

  17. Development of an ADC Radiation Tolerance Characterization System for the Upgrade of the ATLAS LAr Calorimeter

    CERN Document Server

    INSPIRE-00445642; Chen, Kai; Kierstead, James; Lanni, Francesco; Takai, Helio; Jin, Ge

    2016-01-01

    ATLAS LAr calorimeter will perform its Phase-I upgrade during the long shut down (LS2) in 2018, a new LAr Trigger Digitizer Board (LTDB) will be designed and installed. Several commercial-off-the-shelf (COTS) multichannel high-speed ADCs have been selected as possible backups of the radiation tolerant ADC ASICs for LTDB. In order to evaluate the radiation tolerance of these back up commercial ADCs, we developed an ADC radiation tolerance characterization system, which includes the ADC boards, data acquisition (DAQ) board, signal generator, external power supplies and a host computer. The ADC board is custom designed for different ADCs, which has ADC driver and clock distribution circuits integrated on board. The Xilinx ZC706 FPGA development board is used as DAQ board. The data from ADC are routed to the FPGA through the FMC (FPGA Mezzanine Card) connector, de-serialized and monitored by the FPGA, and then transmitted to the host computer through the Gigabit Ethernet. A software program has been developed wit...

  18. Digital BPM Systems for Hadron Accelerators

    CERN Document Server

    Belleman, J; Kasprowicz, G; Raich, U

    2009-01-01

    The CERN Proton Synchrotron has been fitted with a new trajectory measurement system (TMS). Analogue signals from forty beam position monitors are digitized at 125MS/s, and then further treated entirely in the digital domain to derive the positions of all individual particle bunches on the fly. Large FPGAs handle all digital processing. The system fits in fourteen plug-in modules distributed over three half-width cPCI crates. Data are stored in circular buffers of large enough size to keep a fewseconds-worth of position data. Multiple clients can then request selected portions of the data, possibly representing many thousands of consecutive turns, for display on operator consoles. The system uses digital phase-locked loops to derive its beamlocked timing reference. Programmable state machines, driven by accelerator timing pulses and information from the accelerator control system, direct the order of operations. The cPCI crates are connected to a standard Linux computer by means of a private Gigabit Ethernet ...

  19. Control server for the PS orbit acquisition system Status 2009

    CERN Document Server

    Bart-Pedersen, S; CERN. Geneva. BE Department

    2009-01-01

    CERN’s Proton Synchrotron (CPS) has been fitted with a new Trajectory Measurement System (TMS). Analogue signals from forty Beam Position Monitors (BPM) are digitized at 125 MS/s, and then further treated in the digital domain to derive positions of all individual particle bunches on the fly. Large FPGAs are used to handle the digital processing. The system fits in fourteen plug-in modules distributed over three half-width cPCI crates that store data in circular buffers. They are connected to a Linux computer by means of a private Gigabit Ethernet segment. Dedicated server software, running under Linux, knits the system into a coherent whole [1]. The corresponding low-level software using FESA (BPMOPS class) was implemented while respecting the standard interface for beam position measurements. The BPMOPS server publishes values on request after data extraction and conversion from the TMS server. This software is running on a VME Lynx-OS platform and through dedicated electronics it can therefore control th...

  20. ATLAS DataFlow Infrastructure recent results from ATLAS cosmic and first-beam data-taking

    CERN Document Server

    Vandelli, W

    2010-01-01

    The ATLAS DataFlow infrastructure is responsible for the collection and conveyance of event data from the detector front-end electronics to the mass storage. Several optimized and multi-threaded applications fulfill this purpose operating over a multi-stage Gigabit Ethernet network which is the backbone of the ATLAS Trigger and Data Acquisition System. The system must be able to efficiently transport event-data with high reliability, while providing aggregated bandwidths larger than 5 GByte/s and coping with many thousands network connections. Nevertheless, routing and streaming capabilities and monitoring and data accounting functionalities are also fundamental requirements. During 2008, a few months of ATLAS cosmic data-taking and the first experience with the LHC beams provided an unprecedented testbed for the evaluation of the performance of the ATLAS DataFlow, in terms of functionality, robustness and stability. Besides, operating the system far from its design specifications helped in exercising its fle...

  1. LHCb: Time structure analysis of the LHCb Online network

    CERN Multimedia

    Antichi, G; Campora Perez, D H; Liu, G; Neufeld, N; Giordano, S; Owezarski, P; Moore, A

    2013-01-01

    The LHCb Online Network is a real time high performance network, in which 350 data sources send data over a Gigabit Ethernet LAN to more than 1500 receiving nodes. The aggregated throughput of the application, called Event Building, is more than 60 GB/s. The protocol employed by LHCb makes the sending nodes transmit simultaneously portions of events to one receiving node at a time, which is selected using a credit-token scheme. The resulting traffic is very bursty and sensitive to irregularities in the temporal distribution of packet-bursts to the same destination or region of the network. In order to study the relevant properties of such a dataflow, a non-disruptive monitoring setup based on a networking capable FPGA (NetFPGA) has been deployed. The NetFPGA allows order of hundred nano-second precise time-stamping of packets. We study in detail the timing structure of the Event Building communication, and we identify potential effects of micro-bursts like buffer packet drops or jitter.

  2. The ADAM project: a generic web interface for retrieval and display of ATLAS TDAQ information.

    CERN Document Server

    Harwood, A; The ATLAS collaboration; Magnoni, L; Vandelli, W; Savu, D

    2011-01-01

    This paper describes a new approach to the visualization of stored information about the operation of the ATLAS Trigger and Data Acquisition system. ATLAS is one of the two general purpose detectors positioned along the Large Hadron Collider at CERN. Its data acquisition system consists of several thousand computers interconnected via multiple gigabit Ethernet networks, that are constantly monitored via different tools. Operational parameters ranging from the temperature of the computers to the network utilization are stored in several databases for later analysis. Although the ability to view these data-sets individually is already in place, currently there is no way to view this data together, in a uniform format, from one location. The ADAM project has been launched in order to overcome this limitation. It defines a uniform web interface to collect data from multiple providers that have different structures. It is capable of aggregating and correlating the data according to user defined criteria. Finally, ...

  3. ADAM Project – A generic web interface for retrieval and display of ATLAS TDAQ information.

    CERN Document Server

    Harwood, A; The ATLAS collaboration; Lehmann Miotto, G

    2011-01-01

    This paper describes a new approach to the visualization of stored information about the operation of the ATLAS Trigger and Data Acquisition system. ATLAS is one of the two general purpose detectors positioned along the Large Hadron Collider at CERN. Its data acquisition system consists of several thousand computers interconnected via multiple gigabit Ethernet networks, that are constantly monitored via different tools. Operational parameters ranging from the temperature of the computers, to the network utilization are stored in several databases for a posterior analysis. Although the ability to view these data-sets individually is already in place, there currently is no way to view this data together, in a uniform format, from one location. The ADAM project has been launched in order to overcome this limitation. It defines a uniform web interface to collect data from multiple diversely structured providers. It is capable of aggregating and correlating the data according to user defined criteria. Finally it v...

  4. Conception d'un injecteur de données hardware

    CERN Document Server

    Delord, V; Mesnard, E

    2009-01-01

    L'expérience LHCb, menée dans le cadre du CERN, recueille un nombre extraordinaire de données. Le système d'acquisition de ces données est donc démesuré, entièrement dédié à cette tâche. Pour réaliser des tests sur ce système d'acquisition, hors expérience, il existe un injecteur de données qui permet de simuler le flot habituel. Dans l'optique d'une future optimisation du réseau de ce système en Ethernet 10 gigabit, le LHCb souhaite se doter d'un injecteur hardware permettant de fonctionner sur ce nouveau réseau et d'y tester différents types de protocoles de communication tels qu'IP, MEP et TCP. Cet injecteur est réalisé au moyen d'une carte de développement Altera munie d'un FPGA et de différentes interfaces de communications.

  5. Using turbocodes on optical links

    Directory of Open Access Journals (Sweden)

    Glenn Claes

    2006-04-01

    Full Text Available The fast evolving telecommunication world is permanently in search for faster and better communication links. On one hand, turbo codes are like a dream come true. Due to their amazing performance, they have become the reference in the word of error detecting and correcting codes. On the other hand, broadband transmission channels like optical fibres can meet the need for higher transmission velocity. In this paper therefore we will bring these two elements together and thus the performance of turbocodes on optical links will be studied. First the turbocode will be optimised throughout an individual analysis of each of its design parameters. Moreover it wil be shown that turbocodes have much better performance than the well known Reed-Solomon codes. Finally we will show that the 8Bit/10Bit code, which is required to comply with the Gigabit Ethernet standard, becomes superfluous when working with turbocodes. All tests were carried out on multimode graded-index glass fibres.

  6. Cheetah: A high frame rate, high resolution SWIR image camera

    Science.gov (United States)

    Neys, Joel; Bentell, Jonas; O'Grady, Matt; Vermeiren, Jan; Colin, Thierry; Hooylaerts, Peter; Grietens, Bob

    2008-10-01

    A high resolution, high frame rate InGaAs based image sensor and associated camera has been developed. The sensor and the camera are capable of recording and delivering more than 1700 full 640x512pixel frames per second. The FPA utilizes a low lag CTIA current integrator in each pixel, enabling integration times shorter than one microsecond. On-chip logics allows for four different sub windows to be read out simultaneously at even higher rates. The spectral sensitivity of the FPA is situated in the SWIR range [0.9-1.7 μm] and can be further extended into the Visible and NIR range. The Cheetah camera has max 16 GB of on-board memory to store the acquired images and transfer the data over a Gigabit Ethernet connection to the PC. The camera is also equipped with a full CameralinkTM interface to directly stream the data to a frame grabber or dedicated image processing unit. The Cheetah camera is completely under software control.

  7. Division Multiplexing of 10 Gbit/s Ethernet Signals Synchronized by All-Optical Signal Processing Based on a Time-Lens

    DEFF Research Database (Denmark)

    Areal, Janaina Laguardia

    This Thesis presents 3 years work of an optical circuit that performs both pulse compression and frame synchronization and retiming. Our design aims at directly multiplexing several 10G Ethernet data packets (frames) to a high-speed OTDM link. This scheme is optically trans-parent and does not re...... coupler, completing the OTDM signal generation. We demonstrate the effectiveness of the design by laboratory experi-ments and simulations with VPI and MatLab....... not require clock recovery, resulting in a potentially very efficient solution. The scheme uses a time-lens, implemented through a sinusoidally driven optical phase modulation, combined with a linear dispersion element. As time-lenses are also used for pulse compression, we de-sign the circuit also to perform...

  8. Quality of Service Control Based on Virtual Private Network Services in a Wide Area Gigabit Ethernet Optical Test Bed

    Science.gov (United States)

    Rea, Luca; Pompei, Sergio; Valenti, Alessandro; Matera, Francesco; Zema, Cristiano; Settembre, Marina

    We report an experimental investigation about the Virtual Private LAN Service technique to guarantee the quality of service in the metro/core network and also in the presence of access bandwidth bottleneck. We also show how the virtual private network can be set up for answering to a user request in a very fast way. The tests were performed in a GMPLS test bed with GbE core routers linked with long (tens of kilometers) GbE G.652 fiber links.

  9. Design of dynamic power quality monitoring and fault diagnosis system of ship-power system based on Ethernet

    Directory of Open Access Journals (Sweden)

    HU Hongqian

    2018-02-01

    Full Text Available [Objectives] According to situation that the ship power information exchange system based on the traditional field bus has been unable to meet the needs of modern ship power system for informatization, automation, intelligent and safe operation. [Methods] This paper proposes the use of industrial Ethernet Modbus/TCP to make up for lack of field-bus. Then, the data center is established by collecting the inherent data of the field bus of the combined ship power system and collecting the real-time data from the online measurement device based on the Modbus/TCP. Correlation theory and neural network intelligent algorithm are used to analyze big data to complete the dynamic power quality monitoring and fault diagnosis of ship power system. [Results] Finally, the man-machine interface is designed with LabVIEW. [Conclusions] The feasibility of the software and hardware implementation of the scheme is verified by the laboratory platform.

  10. Study and realisation of a gateway between a MIL1553 network and an Ethernet network. Implementation of the OS9NET homogeneous network and of the TCP/IP heterogeneous network on the OS-9/68000 real time operating system

    International Nuclear Information System (INIS)

    Tricot-Censier, Pascal

    1989-01-01

    This research thesis addresses the design of a homogeneous network for machines acquiring data in real time, and the interconnection by a heterogeneous network of this group with three groups of mini-computers, workstations, and personal computers. Thus, this work involved hardware as well as software designs and developments. After a recall of main notions related to networks, and a presentation of the OS9 real time core, the author reports the design and development of the Ethernet controller card. He reports the design and realisation of a gateway between Ethernet and MIL1553 which is notably based on the previously mentioned controller card. An Ethernet driver is then designed for the OS9 operating system. As the connection with other machines which do not support OS9, requires the development of applications using TCP/IP protocols, the author describes how software designed for PCs have been adapted for a use in real time and for the OS9 operating system. He presents an additional software layer to TCP/IP for an inter-process communication through a heterogeneous network. This layer allows the development of applications distributed among systems which possess different processors and operating systems. Finally, the author presents a test protocol which ensures the fast transfer of memory blocks between OS9 machines [fr

  11. Embedded Linux platform for data acquisition systems

    International Nuclear Information System (INIS)

    Patel, Jigneshkumar J.; Reddy, Nagaraj; Kumari, Praveena; Rajpal, Rachana; Pujara, Harshad; Jha, R.; Kalappurakkal, Praveen

    2014-01-01

    Highlights: • The design and the development of data acquisition system on FPGA based reconfigurable hardware platform. • Embedded Linux configuration and compilation for FPGA based systems. • Hardware logic IP core and its Linux device driver development for the external peripheral to interface it with the FPGA based system. - Abstract: This scalable hardware–software system is designed and developed to explore the emerging open standards for data acquisition requirement of Tokamak experiments. To address the future need for a scalable data acquisition and control system for fusion experiments, we have explored the capability of software platform using Open Source Embedded Linux Operating System on a programmable hardware platform such as FPGA. The idea was to identify the platform which can be customizable, flexible and scalable to support the data acquisition system requirements. To do this, we have selected FPGA based reconfigurable and scalable hardware platform to design the system with Embedded Linux based operating system for flexibility in software development and Gigabit Ethernet interface for high speed data transactions. The proposed hardware–software platform using FPGA and Embedded Linux OS offers a single chip solution with processor, peripherals such ADC interface controller, Gigabit Ethernet controller, memory controller amongst other peripherals. The Embedded Linux platform for data acquisition is implemented and tested on a Virtex-5 FXT FPGA ML507 which has PowerPC 440 (PPC440) [2] hard block on FPGA. For this work, we have used the Linux Kernel version 2.6.34 with BSP support for the ML507 platform. It is downloaded from the Xilinx [1] GIT server. Cross-compiler tool chain is created using the Buildroot scripts. The Linux Kernel and Root File System are configured and compiled using the cross-tools to support the hardware platform. The Analog to Digital Converter (ADC) IO module is designed and interfaced with the ML507 through Xilinx

  12. Embedded Linux platform for data acquisition systems

    Energy Technology Data Exchange (ETDEWEB)

    Patel, Jigneshkumar J., E-mail: jjp@ipr.res.in [Institute for Plasma Research, Gandhinagar, Gujarat (India); Reddy, Nagaraj, E-mail: nagaraj.reddy@coreel.com [Sandeepani School of Embedded System Design, Bangalore, Karnataka (India); Kumari, Praveena, E-mail: praveena@ipr.res.in [Institute for Plasma Research, Gandhinagar, Gujarat (India); Rajpal, Rachana, E-mail: rachana@ipr.res.in [Institute for Plasma Research, Gandhinagar, Gujarat (India); Pujara, Harshad, E-mail: pujara@ipr.res.in [Institute for Plasma Research, Gandhinagar, Gujarat (India); Jha, R., E-mail: rjha@ipr.res.in [Institute for Plasma Research, Gandhinagar, Gujarat (India); Kalappurakkal, Praveen, E-mail: praveen.k@coreel.com [Sandeepani School of Embedded System Design, Bangalore, Karnataka (India)

    2014-05-15

    Highlights: • The design and the development of data acquisition system on FPGA based reconfigurable hardware platform. • Embedded Linux configuration and compilation for FPGA based systems. • Hardware logic IP core and its Linux device driver development for the external peripheral to interface it with the FPGA based system. - Abstract: This scalable hardware–software system is designed and developed to explore the emerging open standards for data acquisition requirement of Tokamak experiments. To address the future need for a scalable data acquisition and control system for fusion experiments, we have explored the capability of software platform using Open Source Embedded Linux Operating System on a programmable hardware platform such as FPGA. The idea was to identify the platform which can be customizable, flexible and scalable to support the data acquisition system requirements. To do this, we have selected FPGA based reconfigurable and scalable hardware platform to design the system with Embedded Linux based operating system for flexibility in software development and Gigabit Ethernet interface for high speed data transactions. The proposed hardware–software platform using FPGA and Embedded Linux OS offers a single chip solution with processor, peripherals such ADC interface controller, Gigabit Ethernet controller, memory controller amongst other peripherals. The Embedded Linux platform for data acquisition is implemented and tested on a Virtex-5 FXT FPGA ML507 which has PowerPC 440 (PPC440) [2] hard block on FPGA. For this work, we have used the Linux Kernel version 2.6.34 with BSP support for the ML507 platform. It is downloaded from the Xilinx [1] GIT server. Cross-compiler tool chain is created using the Buildroot scripts. The Linux Kernel and Root File System are configured and compiled using the cross-tools to support the hardware platform. The Analog to Digital Converter (ADC) IO module is designed and interfaced with the ML507 through Xilinx

  13. A Modification of Gamma Surveymeter Dosemeter 3007A for Monitoring Use Ethernet by PLC T100MD Series

    International Nuclear Information System (INIS)

    Ikhsan Shobari; Subchan, M.; Syahrudin Yusuf; Sutomo Budihardjo

    2010-01-01

    It has been modified a gamma surveymeter Dosemeter 3007A. The Surveymeter represents analogous surveymeter, so that an interface for data acquisition is required. Acquisition system from surveymeter is added to the voltage amplifier module from 0 - 200 mV to 0 - 5 V. This voltage value will represent of doses 0 - 5 mR/hour. Hereinafter the analogous signal 0 - 5 V as signal of input to peripheral of PLC T100MD series. Data in the form of processed analogous signal presented at local display of PLC. For long distance monitoring, data have been sent to a computer from PLC by ethernet. After this modification, the surveymeter can be used to monitor from long distance. By using Internet Service Provider, monitoring can be done at any time and any where as long as network internet is available. (author)

  14. A novel barium strontium titanate/nickel/titanium nitride/silicon structure for gigabit-scale DRAM capacitors

    Science.gov (United States)

    Ritums, Dwight Lenards

    A materials system has been developed for advanced oxide high permittivity capacitors for use in Dynamic Random Access Memory (DRAM) applications. A capacitor test structure has been fabricated, demonstrating the integration of this materials system onto Si. It is a 3-D stacked electrode structure which uses the high-K dielectric material Ba1- xSrxTiO 3 (BST) and a novel Ni/TiN bottom electrode system. The structure was grown using pulsed laser deposition (PLD), photo-assisted metal-organic chemical vapor deposition (PhA-MOCVD), and electron beam deposition, and resulted in thin film capacitors with dielectric constants over 500. Other advanced oxides, principally SrVO3, were also investigated for use as electrode materials. The fabricated test structure is 3 μgm wide and 1 μm thick. RIE was used to generate the 3-D structure, and an etch gas recipe was developed to pattern the 3-D electrode structure onto the TiN. The Ni was deposited by electron beam deposition, and the BST was grown by PLD and PhA-MOCVD. Conformal coating of the electrode by the BST was achieved. The film structure was analyzed with XRD, SEM, EDS, XPS, AES, and AFM, and the electronic properties of the devices were characterized. Permittivites of up to 500 were seen in the PLD-grown films, and values up to 700 were seen in the MOCVD- deposited films. The proof of concept of a high permittivity material directly integrated onto Si has been demonstrated for this capacitor materials system. With further lithographic developments, this system can be applied toward gigabit device fabrication.

  15. Optical Synchronization of a 10-G Ethernet Packet and Time-Division Multiplexing to a 50-Gb/s Signal Using an Optical Time Lens

    DEFF Research Database (Denmark)

    Hu, Hao; Laguardia Areal, Janaina; Palushani, Evarist

    2010-01-01

    A 10-G Ethernet packet with maximum packet size of 1518 bytes is synchronized to a master clock with 200-kHz frequency offset using a time lens. The input 10-Gb/s non-return-to-zero packet is at the same time converted into a return-to-zero (RZ) packet with a pulsewidth of 10 ps and then time......-division multiplexed with four 10-Gb/s optical time-division-multiplexing (OTDM) channels, thus constituting a 50-Gb/s OTDM serial signal. Error-free performances of the synchronized RZ packet and demultiplexed packet from the aggregated 50-Gb/s OTDM signal are achieved....

  16. Optical Time-Division Multiplexing of 10 Gbit/s Ethernet Signals Synchronized by All-Optical Signal Processing Based on a Time-Lens

    DEFF Research Database (Denmark)

    Areal, Janaina Laguardia

    This Thesis presents 3 years work of an optical circuit that performs both pulse compression and frame synchronization and retiming. Our design aims at directly multiplexing several 10G Ethernet data packets (frames) to a high-speed OTDM link. This scheme is optically transparent and does not req...... coupler, completing the OTDM signal generation. We demonstrate the effectiveness of the design by laboratory experiments and simulations with VPI and MatLab....... not require clock recovery, resulting in a potentially very efficient solution. The scheme uses a time-lens, implemented through a sinusoidally driven optical phase modulation, combined with a linear dispersion element. As time-lenses are also used for pulse compression, we design the circuit also to perform...

  17. Penggunaan Power of Ethernet untuk Mengalirkan Arus Listrik ke Hardware yang Terhubung dengan Kabel UTP

    Directory of Open Access Journals (Sweden)

    Muhammad Safri Lubis

    2012-10-01

    Full Text Available Development of a local area network (LAN needs a network cable such as UTP twisted pair especially for connecting hardware like personal computer with CCTV. The connection should be on the basis of IP address which is connected with switch, and then the data eventually is sent to server. Generally, in the field, a hardware network has two main connection; first, connections to electricity for switching on the software by using an electricity cable which is suitable to the need of electrical capacity; second, connection to UTP twisted network for sending the data to the server. This process can be simplified by using network cable both for sending the data to server and for electrical pathway. Some pairs of network cable which are not used for sending data to server can be occupied to convey electrical wave to switch on and to operate the hardware. In order to use network cable for multiple purposes, it needs electrical configuration such as power of ethernet (PoE. The PoE is a system to utilize the UTP twisted pair cable to transmit unoccupied power for electrical pathway so that it can increase the efficiency of system.

  18. Secure network for beamline control

    International Nuclear Information System (INIS)

    Ohata, T.; Fukui, T.; Ishii, M.; Furukawa, Y.; Nakatani, T.; Matsushita, T.; Takeuchi, M.; Tanaka, R.; Ishikawa, T.

    2001-01-01

    In SPring-8, beamline control system is constructed with a highly available distributed network system. The socket based communication protocol is used for the beamline control mainly. Beamline users can control the equipment by sending simple control commands to a server process, which is running on a beamline-managing computer (Ohata et al., SPring-8 beamline control system, ICALEPCS'99, Trieste, Italy, 1999). At the beginning the network was based on the shared topology at all beamlines. Consequently, it has a risk for misapplication of the user's program to access different machines on the network system cross over beamlines. It is serious problem for the SPring-8 beamline control system, because all beamlines controlled with unified software interfaces. We introduced the switching technology and the firewalls to support network access control. Also the virtual networking (VLAN: IEEE 802.1Q) and the gigabit Ethernet technology (IEEE 802.3ab) are introduced. Thus the network security and the reliability are guaranteed at the higher level in SPring-8 beamline

  19. FELIX: the new detector readout system for the ATLAS experiment

    CERN Document Server

    ATLAS TDAQ Collaboration; The ATLAS collaboration

    2017-01-01

    Starting during the upcoming major LHC shutdown from 2019-2021, the ATLAS experiment at CERN will move to the the Front-End Link eXchange (FELIX) system as the interface between the data acquisition system and the trigger and detector front-end electronics. FELIX will function as a router between custom serial links and a commodity switch network, which will use industry standard technologies to communicate with data collection and processing components. The FELIX system is being developed using commercial-off-the-shelf server PC technology in combination with a FPGA-based PCIe Gen3 I/O card hosting GigaBit Transceiver links and with Timing, Trigger and Control connectivity provided by an FMC-based mezzanine card. FELIX functions will be implemented with dedicated firmware for the Xilinx FPGA (Virtex 7 and Kintex UltraScale) installed on the I/O card alongside an interrupt-driven Linux kernel driver and user-space software. On the network side, FELIX is able to connect to both Ethernet or Infiniband network a...

  20. FELIX: the new detector readout system for the ATLAS experiment

    CERN Document Server

    Bauer, Kevin Thomas; The ATLAS collaboration

    2018-01-01

    Starting during the upcoming major LHC shutdown from 2019-2021, the ATLAS experiment at CERN will move to the the Front-End Link eXchange (FELIX) system as the interface between the data acquisition system and the trigger and detector front-end electronics. FELIX will function as a router between custom serial links and a commodity switch network, which will use industry standard technologies to communicate with data collection and processing components. The FELIX system is being developed using commercial-off-the-shelf server PC technology in combination with a FPGA-based PCIe Gen3 I/O card hosting GigaBit Transceiver links and with Timing, Trigger and Control connectivity provided by an FMC-based mezzanine card. FELIX functions will be implemented with dedicated firmware for the Xilinx FPGA (Virtex 7 and Kintex UltraScale) installed on the I/O card alongside an interrupt-driven Linux kernel driver and user-space software. On the network side, FELIX is able to connect to both Ethernet or Infiniband network a...

  1. DAQ Architecture for the LHCb Upgrade

    International Nuclear Information System (INIS)

    Liu, Guoming; Neufeld, Niko

    2014-01-01

    LHCb will have an upgrade of its detector in 2018. After the upgrade, the LHCb experiment will run at a high luminosity of 2 × 10 33 cm −2 s −1 . The upgraded detector will be read out at 40 MHz with a highly flexible software-based triggering strategy. The Data Acquisition (DAQ) system of LHCb reads out the data fragments from the Front-End Electronics and transports them to the High-Lever Trigger farm at an aggregate throughput of ∼ 32 Tbit/s. The DAQ system will be based on high speed network technologies such as InfiniBand and/or 10/40/100 Gigabit Ethernet. Independent of the network technology, there are different possible architectures for the DAQ system. In this paper, we present our studies on the DAQ architecture, where we analyze size, complexity and relative cost. We evaluate and compare several data-flow schemes for a network-based DAQ: push, pull and push with barrel-shifter traffic shaping. We also discuss the requirements and overall implications of the data-flow schemes on the DAQ system.

  2. Status of the KLOE-2 Inner Tracker

    Directory of Open Access Journals (Sweden)

    De Lucia Erika

    2018-01-01

    Full Text Available KLOE-2 at the DAΦNE Φ-factory is the main experiment of the INFN Laboratori Nazionali di Frascati (LNF and is the first high-energy experiment using the GEM technology with a cylindrical geometry, a novel idea developed at LNF. Four concentric cylindrical triple-GEM detectors compose the Inner Tracker, inserted around the interaction region and before the inner wall of the pre-existing KLOE Drift Chamber to improve the resolution on decay vertices close to the interaction point. State-of-the-art solutions have been expressly developed or tuned for this project: single-mask GEM etching, multi-layer XV patterned readout, PEEK spacer grid, GASTONE front-end board, a custom 64-channel ASIC with digital output, and the Global Interface Board for data collection, with a configurable FPGA architecture and Gigabit Ethernet. Alignment and calibration of a cylindrical GEM detector was never done before and represents one of the challenging activities of the experiment. The Inner Tracker detector construction, operation, calibration and performance obtained with cosmic-ray muons and Bhabha scattering events will be reported.

  3. Status of the KLOE-2 Inner Tracker

    Science.gov (United States)

    De Lucia, Erika

    2018-01-01

    KLOE-2 at the DAΦNE Φ-factory is the main experiment of the INFN Laboratori Nazionali di Frascati (LNF) and is the first high-energy experiment using the GEM technology with a cylindrical geometry, a novel idea developed at LNF. Four concentric cylindrical triple-GEM detectors compose the Inner Tracker, inserted around the interaction region and before the inner wall of the pre-existing KLOE Drift Chamber to improve the resolution on decay vertices close to the interaction point. State-of-the-art solutions have been expressly developed or tuned for this project: single-mask GEM etching, multi-layer XV patterned readout, PEEK spacer grid, GASTONE front-end board, a custom 64-channel ASIC with digital output, and the Global Interface Board for data collection, with a configurable FPGA architecture and Gigabit Ethernet. Alignment and calibration of a cylindrical GEM detector was never done before and represents one of the challenging activities of the experiment. The Inner Tracker detector construction, operation, calibration and performance obtained with cosmic-ray muons and Bhabha scattering events will be reported.

  4. Trigger and DAQ in the Combined Test Beam

    CERN Multimedia

    Dobson, M; Padilla, C

    2004-01-01

    Introduction During the Combined Test Beam the latest prototype of the ATLAS Trigger and DAQ system is being used to support the data taking of all the detectors. Further development of the TDAQ subsystems benefits from the direct experience given by the integration in the beam test. Support of detectors for the Combined Test Beam All ATLAS detectors need their own detector-specific DAQ development. The readout electronics is controlled by a Readout Driver (ROD), custom-built for each detector. The ROD receives data for events that are accepted by the first level trigger. The detector-specific part of the DAQ system needs to control the ROD and to respond to commands of the central DAQ (e.g. to "Start" a run). The ROD module then sends event data to a Readout System (ROS), a PC with special receiver modules/buffers. At this point the data enters the realm of the ATLAS DAQ and High Level Trigger system, constructed from Linux PCs connected with gigabit Ethernet networks. Most ATLAS detectors, representing s...

  5. An automatic chip structure optical inspection system for electronic components

    Science.gov (United States)

    Song, Zhichao; Xue, Bindang; Liang, Jiyuan; Wang, Ke; Chen, Junzhang; Liu, Yunhe

    2018-01-01

    An automatic chip structure inspection system based on machine vision is presented to ensure the reliability of electronic components. It consists of four major modules, including a metallographic microscope, a Gigabit Ethernet high-resolution camera, a control system and a high performance computer. An auto-focusing technique is presented to solve the problem that the chip surface is not on the same focusing surface under the high magnification of the microscope. A panoramic high-resolution image stitching algorithm is adopted to deal with the contradiction between resolution and field of view, caused by different sizes of electronic components. In addition, we establish a database to storage and callback appropriate parameters to ensure the consistency of chip images of electronic components with the same model. We use image change detection technology to realize the detection of chip images of electronic components. The system can achieve high-resolution imaging for chips of electronic components with various sizes, and clearly imaging for the surface of chip with different horizontal and standardized imaging for ones with the same model, and can recognize chip defects.

  6. Low latency control board for LLRF system: SIMCON 3.1

    Science.gov (United States)

    Giergusiewicz, Wojciech; Jalmuzna, Wojciech; Pozniak, Krzysztof; Ignashin, Nikolay; Grecki, Mariusz; Makowski, Dariusz; Jezynski, Tomasz; Perkuszewski, Karol; Czuba, Krzysztof; Simrock, Stefan; Romaniuk, Ryszard

    2005-09-01

    A new version of the SIMCON system is presented in this paper. The SIMCON stands for the microwave, resonant, superconductive accelerator cavity simulator and controller (embracing the hardware and software layers). The current version of the SIMCON is 3.1. which is a considerable step forward from the previous 8-channel version 3.0. which was released at the beginning of 2005 and was made operable in April. Many important upgrades were implemented in SIMCON 3.1. It is a stand-alone VME board (whereas SIMCON 3.0 was modular) based on the Virtex II Pro 30 chip with two embedded Power PCs and DSP blocks. It has Ethernet and multiple gigabit optical I/Os. The Simcon 3.1 board provides 10 ADC channels. The architecture idea and block diagrams of the PCB for SIMCON 3.1. are presented. Some of the applied novel technical solutions, Protel"R" views and schemes are shown. A number of initial conclusions were drawn from a few month experience with the development of this new board. The tables of predicted system parameters are quoted.

  7. Robotic 4D ultrasound solution for real-time visualization and teleoperation

    Directory of Open Access Journals (Sweden)

    Al-Badri Mohammed

    2017-09-01

    Full Text Available Automation of the image acquisition process via robotic solutions offer a large leap towards resolving ultrasound’s user-dependency. This paper, as part of a larger project aimed to develop a multipurpose 4d-ultrasonic force-sensitive robot for medical applications, focuses on achieving real-time remote visualisation for 4d ultrasound image transfer. This was possible through implementing our software modification on a GE Vivid 7 Dimension workstation, which operates a matrix array probe controlled by a KUKA LBR iiwa 7 7-DOF robotic arm. With the help of robotic positioning and the matrix array probe, fast volumetric imaging of target regions was feasible. By testing ultrasound volumes, which were roughly 880 kB in size, while using gigabit Ethernet connection, a latency of ∼57 ms was achievable for volume transfer between the ultrasound station and a remote client application, which as a result allows a frame count of 17.4 fps. Our modification thus offers for the first time real-time remote visualization, recording and control of 4d ultrasound data, which can be implemented in teleoperation.

  8. Development of optical packet and circuit integrated ring network testbed.

    Science.gov (United States)

    Furukawa, Hideaki; Harai, Hiroaki; Miyazawa, Takaya; Shinada, Satoshi; Kawasaki, Wataru; Wada, Naoya

    2011-12-12

    We developed novel integrated optical packet and circuit switch-node equipment. Compared with our previous equipment, a polarization-independent 4 × 4 semiconductor optical amplifier switch subsystem, gain-controlled optical amplifiers, and one 100 Gbps optical packet transponder and seven 10 Gbps optical path transponders with 10 Gigabit Ethernet (10GbE) client-interfaces were newly installed in the present system. The switch and amplifiers can provide more stable operation without equipment adjustments for the frequent polarization-rotations and dynamic packet-rate changes of optical packets. We constructed an optical packet and circuit integrated ring network testbed consisting of two switch nodes for accelerating network development, and we demonstrated 66 km fiber transmission and switching operation of multiplexed 14-wavelength 10 Gbps optical paths and 100 Gbps optical packets encapsulating 10GbE frames. Error-free (frame error rate optical packets of various packet lengths and packet rates, and stable operation of the network testbed was confirmed. In addition, 4K uncompressed video streaming over OPS links was successfully demonstrated. © 2011 Optical Society of America

  9. EtherBone - A Network Layer for the Wishbone SoC Bus

    CERN Document Server

    Kreider, M; Lewis, J; Włostowski, T; Serrano, J

    2011-01-01

    Today, there are several System on a Chip (SoC) bus systems. Typically, these buses are confined on-chip and rely on higher level components to communicate with the outside world. Taking these systems a step further, we see the possibility of extending the reach of the SoC bus to remote FPGAs or processors. This leads to the idea of the EtherBone (EB) core, which connects a Wishbone (WB) Ver. 4 Bus via a Gigabit Ethernet based network link to remote peripheral devices. EB acts as a transparent interconnect module towards attached WB Bus devices. Address information and data from one or more WB bus cycles is preceded with a descriptive header and encapsulated in a UDP/IP packet. Because of this standard compliance, EB is able to traverse Wide Area Networks and is therefore not bound to a geographic location. Due to the low level nature of the WB bus, EB provides a sound basis for remote hardware tools like a JTAG debugger, In-System-Programmer (ISP), boundary scan interface or logic analyser module. EB was de...

  10. LHCb Online event processing and filtering

    CERN Document Server

    Alessio, F; Brarda, L; Frank, M; Franek, B; Galli, D; Gaspar, C; Van Herwijnen, E; Jacobsson, R; Jost, B; Köstner, S; Moine, G; Neufeld, N; Somogyi, P; Stoica, R; Suman, S

    2008-01-01

    The first level trigger of LHCb accepts one million events per second. After preprocessing in custom FPGA-based boards these events are distributed to a large farm of PC-servers using a high-speed Gigabit Ethernet network. Synchronisation and event management is achieved by the Timing and Trigger system of LHCb. Due to the complex nature of the selection of B-events, which are the main interest of LHCb, a full event-readout is required. Event processing on the servers is parallelised on an event basis. The reduction factor is typically 1/500. The remaining events are forwarded to a formatting layer, where the raw data files are formed and temporarily stored. A small part of the events is also forwarded to a dedicated farm for calibration and monitoring. The files are subsequently shipped to the CERN Tier0 facility for permanent storage and from there to the various Tier1 sites for reconstruction. In parallel files are used by various monitoring and calibration processes running within the LHCb Online system. ...

  11. Development and test of the readout system for the CBM-MVD prototype

    Energy Technology Data Exchange (ETDEWEB)

    Milanovic, Borislav; Neuman, Bertram; Wiebusch, Michael; Amar-Youcef, Samir; Froehlich, Ingo; Stroth, Joachim [Institut fuer Kernphysik, Goethe-Universitaet Frankfurt, Frankfurt am Main (Germany); Collaboration: CRESST-Collaboration; CBM-MVD Collaboration

    2013-07-01

    The CBM Experiment at FAIR aims towards better understanding of the QCD phase-diagram and in-medium properties of matter under high densities. In order to enhance the detection of rare probes via their secondary decay vertices and to support the primary tracking system, the CBM Micro Vertex Detector (MVD) is foreseen. Recently, the MVD Prototype has been developed at the IKF in Frankfurt. The module contains one quarter of the first MVD station featuring four prototype-sensors MIMOSA-26 AHR thinned down to 50 μ m. The prototype has been tested at the CERN SPS accelerator with high energetic pions in November 2012. This contribution discusses the stability and scalability of the DAQ, slow-control and monitoring routines during the beamtime, as well as sensor behavior under high load of up to 700 000 particles per second. The readout system partially uses hardware from the HADES detector which will also run at FAIR. Readout rates of 98 MB/s at the limit of gigabit ethernet have been achieved showing no sign of data loss or corruption.

  12. LHCb; DAQ Architecture for the LHCb Upgrade

    CERN Multimedia

    Neufeld, N

    2013-01-01

    LHCb will have an upgrade of its detector in 2018. After the upgrade, the LHCb experiment will run at a high luminosity of 2x 10$^{33}$ cm$^{-2}$ . s$^{-1}$. The upgraded detector will be read out at 40 MHz with a highly flexible software-based triggering strategy. The Data Acquisition (DAQ) system of HCb reads out the data fragments from the Front-End Electronics and transports them to the High-Lever Trigger farm at an aggregate throughput of 32 Tbit/s. The DAQ system will be based on high speed network technologies such as InfiniBand and/or 10/40/100 Gigabit Ethernet. Independent of the network technology, there are different possible architectures for the DAQ system. In this paper, we present our studies on the DAQ architecture, where we analyze size, complexity and (relative) cost. We evaluate and compare several data-flow schemes for a network-based DAQ: push, pull and push with barrel-shifter traffic shaping. We also discuss the requirements and overall implications of the data-flow schemes on the DAQ ...

  13. The Belle II PXD data acquisition and reduction system

    Energy Technology Data Exchange (ETDEWEB)

    Lange, Soeren; Gessler, Thomas; Kuehn, Wolfgang; Muenchow, David; Spruck, Bjoern [Giessen Univ. (Germany). 2. Physikalisches Inst.; Lin, Haichuan; Liu, Zhen-An; Xu, Hao; Zhao, Jingzhou [IHEP Beijing (China); Collaboration: Belle II Collaboration

    2013-07-01

    The Belle II DEPFET pixel detector (PXD) will deliver high data rates of up to 21.6 Gbytes/s for 3% detector occupancy. Data of this high rate must be buffered for 5 seconds, corresponding to the HLT (High Level Trigger) latency, and then a region-of-interest (ROI) filter is applied to reduce the data rate by a factor of ≥10 by charged track extrapolation from other detectors (SVD, CDC). The PXD readout system is based upon ATCA (Advanced Telecommunications Architecture). The 3rd PCB iteration uses a concept with a xTCA carrier board (with a Virtex-4 FX60 FPGA for ATCA backplane routing) and 4 AMC modules (each with a Xilinx Virtex-5 FX70T FPGA). The FPGA firmware implementation comprises a receiver core for the high speed optical links (≤6.25 Gbps), a buffer management with lookup of ≤270.000 pointers/s, DDR2 memory write (native port interface, ≥1.5 Gbytes/s), Gigabit ethernet (UDP stack in VHDL) and a parallelized ROI selection algorithm. Test results of all the components are presented.

  14. 以太无源光网络接入控制器的实现%Implementation of access controller for Ethernet passive optical network

    Institute of Scientific and Technical Information of China (English)

    邹君妮; 陈健; 林如俭

    2006-01-01

    This paper presents the design and implementation of access controller used for Ethernet passive optical network (EPON).As a first step to develop an ASIC product, the entire system is designed on a field programmable gate array (FPGA) with an embedded CPU. To reduce working frequency of the FPGA, the byte-to-word conversion is proposed. Propagation delays are equalized by ranging procedure so as to avoid data collision. Implementations of synchronization, classification, as well as Linux porting are illustrated in detail. The interface between the FPGA and CPU are also presented. Experimental results show that the proposed system can properly function in a relatively low cost FPGA.

  15. The anatomy of fronto-occipital connections from early blunt dissections to contemporary tractography.

    Science.gov (United States)

    Forkel, Stephanie J; Thiebaut de Schotten, Michel; Kawadler, Jamie M; Dell'Acqua, Flavio; Danek, Adrian; Catani, Marco

    2014-07-01

    The occipital and frontal lobes are anatomically distant yet functionally highly integrated to generate some of the most complex behaviour. A series of long associative fibres, such as the fronto-occipital networks, mediate this integration via rapid feed-forward propagation of visual input to anterior frontal regions and direct top-down modulation of early visual processing. Despite the vast number of anatomical investigations a general consensus on the anatomy of fronto-occipital connections is not forthcoming. For example, in the monkey the existence of a human equivalent of the 'inferior fronto-occipital fasciculus' (iFOF) has not been demonstrated. Conversely, a 'superior fronto-occipital fasciculus' (sFOF), also referred to as 'subcallosal bundle' by some authors, is reported in monkey axonal tracing studies but not in human dissections. In this study our aim is twofold. First, we use diffusion tractography to delineate the in vivo anatomy of the sFOF and the iFOF in 30 healthy subjects and three acallosal brains. Second, we provide a comprehensive review of the post-mortem and neuroimaging studies of the fronto-occipital connections published over the last two centuries, together with the first integral translation of Onufrowicz's original description of a human fronto-occipital fasciculus (1887) and Muratoff's report of the 'subcallosal bundle' in animals (1893). Our tractography dissections suggest that in the human brain (i) the iFOF is a bilateral association pathway connecting ventro-medial occipital cortex to orbital and polar frontal cortex, (ii) the sFOF overlaps with branches of the superior longitudinal fasciculus (SLF) and probably represents an 'occipital extension' of the SLF, (iii) the subcallosal bundle of Muratoff is probably a complex tract encompassing ascending thalamo-frontal and descending fronto-caudate connections and is therefore a projection rather than an associative tract. In conclusion, our experimental findings and review of the

  16. White-matter development is different in bilingual and monolingual children: a longitudinal DTI study.

    Directory of Open Access Journals (Sweden)

    Seyede Ghazal Mohades

    Full Text Available Although numerous people grow up speaking more than one language, the impact of bilingualism on brain developing neuroanatomy is still poorly understood. This study aimed to determine whether the changes in the mean fractional-anisotropy (MFA of language pathways are different between bilingual and monolingual children. Simultaneous-bilinguals, sequential-bilinguals and monolingual, male and female 10-13 years old children participated in this longitudinal study over a period of two years. We used diffusion tensor tractography to obtain mean fractional-anisotropy values of four language related pathways and one control bundle: 1-left-inferior-occipitofrontal fasciculus/lIFOF, 2-left-arcuate fasciculus/lAF/lSLF, 3-bundle arising from the anterior part of corpus-callosum and projecting to orbital lobe/AC-OL, 4-fibres emerging from anterior-midbody of corpus-callosum (CC to motor cortices/AMB-PMC, 5- right-inferior-occipitofrontal fasciculus rIFOF as the control pathway unrelated to language. These values and their rate of change were compared between 3 groups. FA-values did not change significantly over two years for lAF/lSLF and AC-OL. Sequential-bilinguals had the highest degree of change in the MFA value of lIFOF, and AMB-PMC did not present significant group differences. The comparison of MFA of lIFOF yielded a significantly higher FA-value in simultaneous bilinguals compared to monolinguals. These findings acknowledge the existing difference of the development of the semantic processing specific pathway between children with different semantic processing procedure. These also support the hypothesis that age of second language acquisition affects the maturation and myelination of some language specific white-matter pathways.

  17. Low latency protocol for transmission of measurement data from FPGA to Linux computer via 10 Gbps Ethernet link

    International Nuclear Information System (INIS)

    Zabolotny, W.M.

    2015-01-01

    This paper presents FADE-10G—an integrated solution for modern multichannel measurement systems. Its main aim is a low latency, reliable transmission of measurement data from FPGA-based front-end electronic boards (FEBs) to a computer-based node in the Data Acquisition System (DAQ), using a standard Ethernet 1 Gbps or 10 Gbps link. In addition to transmission of data, the system allows the user to send reliably simple control commands from DAQ to FEB and to receive responses. The aim of the work is to provide a possible simple base solution, which can be adapted by the end user to his or her particular needs. Therefore, the emphasis is put on the minimal consumption of FPGA resources in FEB and the minimal CPU load in the DAQ computer. The open source implementation of the FPGA IP core and the Linux kernel driver published under permissive license facilitates modifications and reuse of the solution. The system has been successfully tested in real hardware, both with 1 Gbps and 10 Gbps links

  18. Bilingualism modulates the white matter structure of language-related pathways.

    Science.gov (United States)

    Hämäläinen, Sini; Sairanen, Viljami; Leminen, Alina; Lehtonen, Minna

    2017-05-15

    Learning and speaking a second language (L2) may result in profound changes in the human brain. Here, we investigated local structural differences along two language-related white matter trajectories, the arcuate fasciculus and the inferior fronto-occipital fasciculus (IFOF), between early simultaneous bilinguals and late sequential bilinguals. We also examined whether early exposure to two languages might lead to a more bilateral structural organization of the arcuate fasciculus. Fractional anisotropy, mean and radial diffusivities (FA, MD, and RD respectively) were extracted to analyse tract-specific changes. Additionally, global voxel-wise effects were investigated with Tract-Based Spatial Statistics (TBSS). We found that relative to late exposure, early exposure to L2 leads to increased FA along a phonology-related segment of the arcuate fasciculus, but induces no modulations along the IFOF, associated to semantic processing. Late sequential bilingualism, however, was associated with decreased MD along the bilateral IFOF. Our results suggest that early vs. late bilingualism may lead to qualitatively different kind of changes in the structural language-related network. Furthermore, we show that early bilingualism contributes to the structural laterality of the arcuate fasciculus, leading to a more bilateral organization of these perisylvian language-related tracts. Copyright © 2017 Elsevier Inc. All rights reserved.

  19. Energy-saving scheme based on downstream packet scheduling in ethernet passive optical networks

    Science.gov (United States)

    Zhang, Lincong; Liu, Yejun; Guo, Lei; Gong, Xiaoxue

    2013-03-01

    With increasing network sizes, the energy consumption of Passive Optical Networks (PONs) has grown significantly. Therefore, it is important to design effective energy-saving schemes in PONs. Generally, energy-saving schemes have focused on sleeping the low-loaded Optical Network Units (ONUs), which tends to bring large packet delays. Further, the traditional ONU sleep modes are not capable of sleeping the transmitter and receiver independently, though they are not required to transmit or receive packets. Clearly, this approach contributes to wasted energy. Thus, in this paper, we propose an Energy-Saving scheme that is based on downstream Packet Scheduling (ESPS) in Ethernet PON (EPON). First, we design both an algorithm and a rule for downstream packet scheduling at the inter- and intra-ONU levels, respectively, to reduce the downstream packet delay. After that, we propose a hybrid sleep mode that contains not only ONU deep sleep mode but also independent sleep modes for the transmitter and the receiver. This ensures that the energy consumed by the ONUs is minimal. To realize the hybrid sleep mode, a modified GATE control message is designed that involves 10 time points for sleep processes. In ESPS, the 10 time points are calculated according to the allocated bandwidths in both the upstream and the downstream. The simulation results show that ESPS outperforms traditional Upstream Centric Scheduling (UCS) scheme in terms of energy consumption and the average delay for both real-time and non-real-time packets downstream. The simulation results also show that the average energy consumption of each ONU in larger-sized networks is less than that in smaller-sized networks; hence, our ESPS is better suited for larger-sized networks.

  20. FPGA-based 10-Gbit Ethernet Data Acquisition Interface for the Upgraded Electronics of the ATLAS Liquid Argon Calorimeters

    CERN Document Server

    Grohs, J P; The ATLAS collaboration

    2013-01-01

    The readout of the trigger signals of the ATLAS Liquid Argon (LAr) calorimeters is foreseen to be upgraded in order to prepare for operation during the first high-luminosity phase of the Large Hadron Collider (LHC). Signals with improved spatial granularity are planned to be received from the detector by a Digitial Processing System (DPS) in ATCA technology and will be sent in real-time to the ATLAS trigger system using custom optical links. These data are also sampled by the DPS for monitoring and will be read out by the regular Data Acquisition (DAQ) system of ATLAS which is a network-based PC-farm. The bandwidth between DPS module and DAQ system is expected to be in the order of 10 Gbit/s per module and a standard Ethernet protocol is foreseen to be used. DSP data will be prepared and sent by a modern FPGA either through a switch or directly to a Read-Out System (ROS) PC serving as buffer interface of the ATLAS DAQ. In a prototype setup, an ATCA blade equipped with a Xilinx Virtex-5 FPGA is used to send da...

  1. Implementing Journaling in a Linux Shared Disk File System

    Science.gov (United States)

    Preslan, Kenneth W.; Barry, Andrew; Brassow, Jonathan; Cattelan, Russell; Manthei, Adam; Nygaard, Erling; VanOort, Seth; Teigland, David; Tilstra, Mike; O'Keefe, Matthew; hide

    2000-01-01

    In computer systems today, speed and responsiveness is often determined by network and storage subsystem performance. Faster, more scalable networking interfaces like Fibre Channel and Gigabit Ethernet provide the scaffolding from which higher performance computer systems implementations may be constructed, but new thinking is required about how machines interact with network-enabled storage devices. In this paper we describe how we implemented journaling in the Global File System (GFS), a shared-disk, cluster file system for Linux. Our previous three papers on GFS at the Mass Storage Symposium discussed our first three GFS implementations, their performance, and the lessons learned. Our fourth paper describes, appropriately enough, the evolution of GFS version 3 to version 4, which supports journaling and recovery from client failures. In addition, GFS scalability tests extending to 8 machines accessing 8 4-disk enclosures were conducted: these tests showed good scaling. We describe the GFS cluster infrastructure, which is necessary for proper recovery from machine and disk failures in a collection of machines sharing disks using GFS. Finally, we discuss the suitability of Linux for handling the big data requirements of supercomputing centers.

  2. Accelerating Climate and Weather Simulations through Hybrid Computing

    Science.gov (United States)

    Zhou, Shujia; Cruz, Carlos; Duffy, Daniel; Tucker, Robert; Purcell, Mark

    2011-01-01

    Unconventional multi- and many-core processors (e.g. IBM (R) Cell B.E.(TM) and NVIDIA (R) GPU) have emerged as effective accelerators in trial climate and weather simulations. Yet these climate and weather models typically run on parallel computers with conventional processors (e.g. Intel, AMD, and IBM) using Message Passing Interface. To address challenges involved in efficiently and easily connecting accelerators to parallel computers, we investigated using IBM's Dynamic Application Virtualization (TM) (IBM DAV) software in a prototype hybrid computing system with representative climate and weather model components. The hybrid system comprises two Intel blades and two IBM QS22 Cell B.E. blades, connected with both InfiniBand(R) (IB) and 1-Gigabit Ethernet. The system significantly accelerates a solar radiation model component by offloading compute-intensive calculations to the Cell blades. Systematic tests show that IBM DAV can seamlessly offload compute-intensive calculations from Intel blades to Cell B.E. blades in a scalable, load-balanced manner. However, noticeable communication overhead was observed, mainly due to IP over the IB protocol. Full utilization of IB Sockets Direct Protocol and the lower latency production version of IBM DAV will reduce this overhead.

  3. arXiv Level Zero Trigger Processor for the NA62 experiment

    CERN Document Server

    INSPIRE-00584493; Chiozzi, Stefano

    2018-05-02

    The NA62 experiment is designed to measure the ultra-rare decay K+ arrow π+ ν  branching ratio with a precision of ~ 10% at the CERN Super Proton Synchrotron (SPS). The trigger system of NA62 consists in three different levels designed to select events of physics interest in a high beam rate environment. The L0 Trigger Processor (L0TP) is the lowest level system of the trigger chain. It is hardware implemented using programmable logic. The architecture of the NA62 L0TP system is a new approach compared to existing systems used in high-energy physics experiments. It is fully digital, based on a standard gigabit Ethernet communication between detectors and the L0TP Board. The L0TP Board is a commercial development board, mounting a programmable logic device (FPGA). The primitives generated by sub-detectors are sent asynchronously using the UDP protocol to the L0TP during the entire beam spill period. The L0TP realigns in time the primitives coming from seven different sources and performs a data selectio...

  4. The status of the QUIJOTE multi-frequency instrument

    Science.gov (United States)

    Hoyland, R. J.; Aguiar-González, M.; Aja, B.; Ariño, J.; Artal, E.; Barreiro, R. B.; Blackhurst, E. J.; Cagigas, J.; Cano de Diego, J. L.; Casas, F. J.; Davis, R. J.; Dickinson, C.; Arriaga, B. E.; Fernandez-Cobos, R.; de la Fuente, L.; Génova-Santos, R.; Gómez, A.; Gomez, C.; Gómez-Reñasco, F.; Grainge, K.; Harper, S.; Herran, D.; Herreros, J. M.; Herrera, G. A.; Hobson, M. P.; Lasenby, A. N.; Lopez-Caniego, M.; López-Caraballo, C.; Maffei, B.; Martinez-Gonzalez, E.; McCulloch, M.; Melhuish, S.; Mediavilla, A.; Murga, G.; Ortiz, D.; Piccirillo, L.; Pisano, G.; Rebolo-López, R.; Rubiño-Martin, J. A.; Ruiz, J. Luis; Sanchez de la Rosa, V.; Sanquirce, R.; Vega-Moreno, A.; Vielva, P.; Viera-Curbelo, T.; Villa, E.; Vizcargüenaga, A.; Watson, R. A.

    2012-09-01

    The QUIJOTE-CMB project has been described in previous publications. Here we present the current status of the QUIJOTE multi-frequency instrument (MFI) with five separate polarimeters (providing 5 independent sky pixels): two which operate at 10-14 GHz, two which operate at 16-20 GHz, and a central polarimeter at 30 GHz. The optical arrangement includes 5 conical corrugated feedhorns staring into a dual reflector crossed-draconian system, which provides optimal cross-polarization properties (designed to be switch out various systematics. The detection system provides optimum sensitivity through 2 correlated and 2 total power channels. The system is calibrated using bright polarized celestial sources and through a secondary calibration source and antenna. The acquisition system, telescope control and housekeeping are all linked through a real-time gigabit Ethernet network. All communication, power and helium gas are passed through a central rotary joint. The time stamp is synchronized to a GPS time signal. The acquisition software is based on PLCs written in Beckhoffs TwinCat and ethercat. The user interface is written in LABVIEW. The status of the QUIJOTE MFI will be presented including pre-commissioning results and laboratory testing.

  5. High resolution distributed time-to-digital converter (TDC) in a White Rabbit network

    International Nuclear Information System (INIS)

    Pan, Weibin; Gong, Guanghua; Du, Qiang; Li, Hongming; Li, Jianmin

    2014-01-01

    The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km 2 areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray are then to be reconstructed from the space-time information of all detector nodes. To guarantee the angular resolution of 0.5°, a time synchronization of 500 ps (RMS) accuracy and 100 ps precision must be achieved among all TDC nodes. A technology enhancing Gigabit Ethernet, called the White Rabbit (WR), has shown the capability of delivering sub-nanosecond accuracy and picoseconds precision of synchronization over the standard data packet transfer. In this paper we demonstrate a distributed TDC prototype system combining the FPGA based TDC and the WR technology. With the time synchronization and data transfer services from a compact WR node, separate FPGA-TDC nodes can be combined to provide uniform time measurement information for correlated events. The design detail and test performance will be described in the paper

  6. High resolution distributed time-to-digital converter (TDC) in a White Rabbit network

    Energy Technology Data Exchange (ETDEWEB)

    Pan, Weibin, E-mail: pwb.thu@gmail.com; Gong, Guanghua; Du, Qiang; Li, Hongming; Li, Jianmin

    2014-02-21

    The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km{sup 2} areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray are then to be reconstructed from the space-time information of all detector nodes. To guarantee the angular resolution of 0.5°, a time synchronization of 500 ps (RMS) accuracy and 100 ps precision must be achieved among all TDC nodes. A technology enhancing Gigabit Ethernet, called the White Rabbit (WR), has shown the capability of delivering sub-nanosecond accuracy and picoseconds precision of synchronization over the standard data packet transfer. In this paper we demonstrate a distributed TDC prototype system combining the FPGA based TDC and the WR technology. With the time synchronization and data transfer services from a compact WR node, separate FPGA-TDC nodes can be combined to provide uniform time measurement information for correlated events. The design detail and test performance will be described in the paper.

  7. Interactive multicentre teleconferences using open source software in a team of thoracic surgeons.

    Science.gov (United States)

    Ito, Kazuhiro; Shimada, Junichi; Katoh, Daishiro; Nishimura, Motohiro; Yanada, Masashi; Okada, Satoru; Ishihara, Shunta; Ichise, Kaori

    2012-12-01

    Real-time consultation between a team of thoracic surgeons is important for the management of difficult cases. We established a system for interactive teleconsultation between multiple sites, based on open-source software. The graphical desktop-sharing system VNC (virtual network computing) was used for remotely controlling another computer. An image-processing package (OsiriX) was installed on the server to share the medical images. We set up a voice communication system using Voice Chatter, a free, cross-platform voice communication application. Four hospitals participated in the trials. One was connected by gigabit ethernet, one by WiMAX and one by ADSL. Surgeons at three of the sites found that it was comfortable to view images and consult with each other using the teleconferencing system. However, it was not comfortable using the client that connected via WiMAX, because of dropped frames. Apart from the WiMAX connection, the VNC-based screen-sharing system transferred the clinical images efficiently and in real time. We found the screen-sharing software VNC to be a good application for medical image interpretation, especially for a team of thoracic surgeons using multislice CT scans.

  8. High-speed readout of high-Z pixel detectors with the LAMBDA detector

    International Nuclear Information System (INIS)

    Pennicard, D.; Smoljanin, S.; Sheviakov, I.; Xia, Q.; Rothkirch, A.; Yu, Y.; Struth, B.; Hirsemann, H.; Graafsma, H.

    2014-01-01

    High-frame-rate X-ray pixel detectors make it possible to perform time-resolved experiments at synchrotron beamlines, and to make better use of these sources by shortening experiment times. LAMBDA is a photon-counting hybrid pixel detector based on the Medipix3 chip, designed to combine a small pixel size of 55 μm, a large tileable module design, high speed, and compatibility with ''high-Z'' sensors for hard X-ray detection. This technical paper focuses on LAMBDA's high-speed-readout functionality, which allows a frame rate of 2000 frames per second with no deadtime between successive images. This takes advantage of the Medipix3 chip's ''continuous read-write'' function and highly parallelised readout. The readout electronics serialise this data and send it back to a server PC over two 10 Gigabit Ethernet links. The server PC controls the detector and receives, processes and stores the data using software designed for the Tango control system. As a demonstration of high-speed readout of a high-Z sensor, a GaAs LAMBDA detector was used to make a high-speed X-ray video of a computer fan

  9. Data Acquisition Backbone Core DABC release v1.0

    International Nuclear Information System (INIS)

    Adamczewski-Musch, J; Kurz, N; Linev, S; Essel, H G

    2010-01-01

    The Data Acquisition Backbone Core (DABC) is a general purpose software framework designed for the implementation of a wide-range of data acquisition systems - from various small detector test beds to high performance systems. DABC consists of a compact data-flow kernel and a number of plug-ins for various functional components like data inputs, device drivers, user functional modules and applications. DABC provides configurable components for implementing event building over fast networks like InfiniBand or Gigabit Ethernet. A generic Java GUI provides the dynamic control and visualization of control parameters and commands, provided by DIM servers. A first set of application plug-ins has been implemented to use DABC as event builder for the front-end components of the GSI standard DAQ system MBS (Multi Branch System). Another application covers the connection to DAQ readout chains from detector front-end boards (N-XYTER) linked to read-out controller boards (ROC) over UDP into DABC for event building, archiving and data serving. This was applied for data taking in the September 2008 test beamtime for the CBM experiment at GSI. DABC version 1.0 is released and available from the website.

  10. A Web 2.0 approach to DAQ monitoring and controlling

    Energy Technology Data Exchange (ETDEWEB)

    Penschuck, Manuel [Goethe-Universitaet, Frankfurt (Germany); Collaboration: TRB3-Collaboration

    2014-07-01

    In the scope of experimental set-ups for the upcoming FAIR experiments, a FPGA-based general purpose trigger and read-out board (TRB3) has been developed which is already in use in several detector set-ups (e.g. HADES, CBM-MVD, PANDA). For on- and off-board communication between the DAQ's subsystems, TrbNet, a specialised high-speed, low-latency network protocol developed for the DAQ system of the HADES detector, is used. Communication with any computer infrastructure is provided by Gigabit Ethernet. Monitoring and configuration of all DAQ systems and front-end electronics is consistently managed by the powerful slow-control features of TrbNet and supported by a flexible and mature software tool-chain, designed to meet the diverse requirements during development, setup phase and experiment. Most building blocks offer a graphical-user-interface (GUI) implemented using omnipresent web 2.0 technologies, which enable rapid prototyping, network transparent access and impose minimal software dependencies on the client's machine. This contribution will present the GUI-related features and infrastructure highlighting the multiple interfaces from the DAQ's slow-control to the client's web-browser.

  11. Optical wireless communications to OC-768 and beyond

    Science.gov (United States)

    Medved, David B.; Davidovich, Leonid

    2001-10-01

    Laser and LED-based wireless communication systems are currently providing license-free interconnection for broadband voice, data and video transport. These systems allow for the immediate, reliable and low-cost extension of copper and fiber-based networks to any end user, providing efficient First Mile bypass access to high data rate backbone networks at speeds ranging from T-1 voice to full throughput ATM at 155 Mbps and up to Gigabit Ethernet. These wireless optical beams constitute a Virtual Fiber in the air, providing the capabilities of fiber in situations where wired connectivity is unavailable, impractical, expensive or slow-to-implement, while achieving a combination of low cost, speed and reliability that cannot be matched by microwave, mm wave, spread spectrum or other competing (actually complementary) wireless technologies. The carrier frequency of the optical beam is about 10,000 times higher than the highest frequencies used by the millimeter wave technology. By means of Wavelength Division Multiplexing more than 1000 independent data channels can be projected into the air on a single beam thus providing a potential bandwidth ten million times that of any RF solution. The twin barriers of physics and regulatory bureaucracy to this essentially infinite wireless bandwidth are thus eliminated by this Virtual Fiber. As user density and individual bandwidth needs escalate, the optical wireless will be the preferred medium of choice in both network and cellular interconnection. A mesh topology which integrates our optical wireless systems with the latest Optical Access switches and routing equipment will be described using case study examples from Japan to South America. As the Bandwidth Blowout continues to push the limits of electronics and especially in the case of DWDM (Dense Wavelength Division Multiples), the conventional optical wireless solutions are no longer feasible. Instead of using f.o. transceivers to convert photons to electrons and thence

  12. Ethernet TCP/IP based building energy management system in a university campus in Saudi Arabia

    Energy Technology Data Exchange (ETDEWEB)

    Jomoah, Ibrahim M. [Department of Industrial Engineering, King Abdulaziz University Jeddah-21589 (Saudi Arabia); Kumar, R. Sreerama; Abdel-Shafi, Nabil Yassien [Saudi Electricity Company Chair for DSM and EE, Vice Presidency for Projects, King Abdulaziz University Jeddah 21589 (Saudi Arabia); Al-Abdulaziz, Abdulaziz Uthman M.; Obaid, Ramzy R. [Department of Electrical and Computer Engineering, King Abdulaziz University Jeddah-21589 (Saudi Arabia)

    2013-07-01

    This paper investigates the effectiveness of the Building Energy Management System (BMS) installed in the typical buildings in the main campus of King Abdulaziz University, Jeddah, in Saudi Arabia. As the domestic electricity and hence the oil consumption in Saudi Arabia is increasing at a very alarming rate compared to the other countries in the world, it is of paramount importance to resort to urgent measures in various industrial, commercial and residential sectors in the country to implement energy conservation measures. The major electrical load in the buildings in the University corresponds to air-handling units and lighting. If the Hajj period, during which millions of pilgrims visit Holy Makah, coincides with the summer, the electricity demand in the country further increases. Considering these issues, the university has taken initiatives to minimize energy consumption in the campuses through the various energy conservation measures. Towards this end, BMS is installed in a few of the typical classrooms and office buildings utilizing the existing campus Ethernet TCP/IP. The data analysis is performed over the period from April to September as it is the peak load period due to summer season. The effectiveness of the BMS in the minimization of the energy consumption in these buildings is established by comparing the results of data analysis with BMS against those before the installation of BMS over the peak period. The investigations reveal that appreciable saving in energy consumption can be achieved with the installation of BMS, the magnitude being dependent upon factors such as building characteristics, type of building, its utilization and period of use.

  13. Efficient Bandwidth Management for Ethernet Passive Optical Networks

    KAUST Repository

    Elrasad, Amr Elsayed M.

    2016-05-15

    The increasing bandwidth demands in access networks motivates network operators, networking devices manufacturers, and standardization institutions to search for new approaches for access networks. These approaches should support higher bandwidth, longer distance between end user and network operator, and less energy consumption. Ethernet Passive Optical Network (EPON) is a favorable choice for broadband access networks. EPONs support transmission rates up to 10 Gbps. EPONs also support distance between end users and central office up to 20 Km. Moreover, optical networks have the least energy consumption among all types of networks. In this dissertation, we focus on reducing delay and saving energy in EPONs. Reducing delay is essential for delay-sensitive traffic, while minimizing energy consumption is an environmental necessity and also reduces the network operating costs. We identify five challenges, namely excess bandwidth allocation, frame delineation, congestion resolution, large round trip time delay in long-reach EPONs (LR-EPONs), and energy saving. We provide a Dynamic Bandwidth Allocation (DBA) approach for each challenge. We also propose a novel scheme that combines the features of the proposed approaches in one highly performing scheme. Our approach is to design novel DBA protocols that can further reduce the delay and be simultaneously simple and fair. We also present a dynamic bandwidth allocation scheme for Green EPONs taking into consideration maximizing energy saving under target delay constraints. Regarding excess bandwidth allocation, we develop an effective DBA scheme called Delayed Excess Scheduling (DES). DES achieves significant delay and jitter reduction and is more suitable for industrial deployment due to its simplicity. Utilizing DES in hybrid TDM/WDM EPONs (TWDM-EPONs) is also investigated. We also study eliminating the wasted bandwidth due to frame delineation. We develop an interactive DBA scheme, Efficient Grant Sizing Interleaved

  14. Structural Alterations of the Language Connectome in Children with Specific Language Impairment

    Czech Academy of Sciences Publication Activity Database

    Vydrová, R.; Komárek, V.; Šanda, J.; Štěrbová, K.; Jahodová, A.; Maulisová, A.; Žáčková, J.; Reissigová, Jindra; Kršek, P.; Kyncl, M.

    2015-01-01

    Roč. 151, December (2015), s. 35-41 ISSN 0093-934X Institutional support: RVO:67985807 Keywords : Specific language disorder * DTI * Arcuate fascicle * IFOF * Ventral stream Subject RIV: BB - Applied Statistics, Operational Research Impact factor: 3.038, year: 2015

  15. Better than $1/Mflops substained: a scalable PC-based parallel computer for lattice QCD

    International Nuclear Information System (INIS)

    Fodor, Z.; Papp, G.

    2002-02-01

    We study the feasibility of a PC-based parallel computer for medium to large scale lattice QCD simulations. Our cluster built at the Eoetvoes Univ., Inst. Theor. Phys. consists of 137 Intel P4-1.7 GHz nodes with 512 MB RDRAM. The 32-bit, single precision sustained performance for dynamical QCD without communication is 1510 Mflops/node with Wilson and 970 Mflops/node with staggered fermions. This gives a total performance of 208 Gflops for Wilson and 133 Gflops for staggered QCD, respectively (for 64-bit applications the performance is approximately halved). The novel feature of our system is its communication architecture. In order to have a scalable, cost-effective machine we use Gigabit Ethernet cards for nearest-neighbor communications in a two-dimensional mesh. This type of communication is cost effective (only 30% of the hardware costs is spent on the communication). According to our benchmark measurements this type of communication results in around 40% communication time fraction for lattices upto 48 3 . 96 in full QCD simulations. The price/sustained-perfomance ratio for full QCD is better than $1/Mflops for Wilson (and around $1.5/Mflops for staggered) quarks for practically any lattice size, which can fit in our parallel computer. (orig.)

  16. An FPGA-based Sampling-ADC readout for the crystal barrel calorimeter

    Energy Technology Data Exchange (ETDEWEB)

    Muellers, Johannes [Helmholtz-Institut fuer Strahlen- und Kernphysik, Bonn (Germany); Marciniewski, Pawel [Angstroemlaboratoriet, Uppsala (Sweden); Collaboration: CBELSA/TAPS-Collaboration

    2016-07-01

    The CBELSA/TAPS experiment at the electron accelerator ELSA (Bonn) investigates the photoproduction of mesons off protons and neutrons. The Crystal Barrel Calorimeter has been upgraded replacing its photodiode readout by APDs, which allows the integration of the calorimeter into the first level trigger. Since the possible DAQ rate is currently limited by the digitization stage (LeCroy QDC1885F) to ∼ 2 kHz, the implementation of a new Sampling-ADC (SADC) readout is the second important step in the upgrade of the detector system. Based on the 64-channel PANDA-SADC, the design was modified, adapting it to the needs of the CBELSA/TAPS experiment. The CB-SADC offers 64 channels in one NIM module with up to 14 bit rate at 125 MHz, accompanied by a modular analog input stage and power supply. Data processing and reduction are realized with Kintex7 FPGAs. Readout is possible via gigabit ethernet links. Using an FPGA provides a multitude of possibilities for online feature extraction, such as the determination of the energy deposited in the crystal, TDC capabilities and pile-up detection and recovery. The SADC development is discussed, and first measurements performed in comparison to the presently used LeCroy QDC are presented.

  17. The TIGER trigger processor for the CAMERA detector at COMPASS-II

    Energy Technology Data Exchange (ETDEWEB)

    Baumann, Tobias; Buechele, Maximilian; Fischer, Horst; Gorzellik, Matthias; Grussenmeyer, Tobias; Herrmann, Florian; Joerg, Philipp; Kremser, Paul; Kunz, Tobias; Michalski, Christoph; Schopferer, Sebastian; Szameitat, Tobias [Physikalisches Institut der Universitaet Freiburg, Freiburg im Breisgau (Germany)

    2013-07-01

    In today's nuclear and high-energy physics experiments the background-induced occupancy of the detector channels can be quite high; therefore it is important to have sophisticated trigger subsystems which process the data in real-time to generate trigger objects for the global trigger decision. In this work we present a FPGA based low-latency trigger processor for the COMPASS-II experiment. TIGER is a high-performance trigger processor that was developed to fit perfectly in the GANDALF framework and extend its versatility. It is designed as a VXS module and is allocated to the central VXS switch slot, which has a direct link from every payload slot. The synchronous transfer protocol was optimized for low latencies and offers a bandwidth of up to 8 Gbit/s per link. The centerpiece of the board is a Xilinx Virtex-6 SX315T FPGA, offering vast programmable logic, embedded memory and DSP resources. It is accompanied by DDR3 memory, a COM Express CPU and a MXM GPU. Besides the VXS backplane ports, the board features two SFP+ transceivers, 32 LVDS inputs and 32 LVDS outputs to interface with the global trigger system and a Gigabit Ethernet port for configuration and monitoring.

  18. 106th meeting of the working group electronic instrumentation in Spring 2015

    International Nuclear Information System (INIS)

    Goettlicher, Peter

    2015-06-01

    The following topics were dealt with: A survey of DESY, actual in DESY, the electronics sevice center of DESY, flip-chip technology at DES, CE certifications for electronic devices centrally performed by DESY ZE, a VHDL-based gigabit ethernet protocol pile for FPGAs, a digital camera trigger for the Cherenkov-telescope array, the trigger system in the Hess1 Upgrade camera, data connection between ships and zeppelin for the ascertainment of flow vortices, IP-based measurement devices on the base of FPGA, MTCA.4 RTM module based on the DRS-4 capacitor array, basic design rules, integrated phase-locked loop design, machine protection system for XFEL and FLASH II, general machine timing of FAIR, MTCA.4-based reference and clock distribution module for the European XFEL, the driving system of the 12-m Cherenkov telescope MST, ventilator driving tor VDC chambers in the CMS experiment, implementation of a TANGO server for the connection of the Mythen detector in the GALAXI experiment, the flexible PiLC controller for driving and measurement purposes with FPGA performance, measurement of important beam parameters of the LHC with diamond sensors, recent developments of the electronics for the ATLAS strip tracker upgrade, a flexible electromagnetic actuator system for the turbulence research, prototype development for the CALICE analogous hadronic calorimeter. (HSI)

  19. The implementation of the Star Data Acquisition System using a Myrinet Network

    International Nuclear Information System (INIS)

    Landgraf, J.M.; Adler, C.; Levine, M.J.; Ljubicic, A. JR.

    2000-01-01

    We will present results from the first year of operation of the STAR DAQ system using a Myrinet Network. STAR is one of four experiments to have been commissioned at the Relativistic Heavy Ion Collider (RHIC) at BNL during 1999 and 2000. The DAQ system is fully integrated with a Level 3 Trigger. The combined system currently consists of 33 Myrinet Nodes which run in a mixed environment of MVME processors running VxWorks, DEC Alpha workstations running Linux, and SUN Solaris machines. The network will eventually contain up to 150 nodes for the expected final size of the L3 processor farm. Myrinet is a switched, high speed, low latency network produced by Myricom and available for PCI and PMC on a wide variety of platforms. The STAR DAQ system uses the Myrinet network for messaging, L3 processing, and event building. After the events are built, they are sent via Gigabit Ethernet to the RHIC computing facility and stored to tape using HPSS. The combined DAQ/L3 system processes 160 MB events at 100 Hz, compresses each event to ∼20 MB, and performs tracking on the events to implement a physics-based filter to reduce the data storage rate to 20 MB/sec

  20. Heavy Traffic Feasible Hybrid Intracycle and Cyclic Sleep for Power Saving in 10G-EPON

    Directory of Open Access Journals (Sweden)

    Xintian Hu

    2014-01-01

    Full Text Available Energy consumption in optical access networks costs carriers substantial operational expense (OPEX every year and is one of contributing factors for the global warming. To reduce energy consumption in the 10-gigabit Ethernet passive optical network (10G-EPON, a hybrid intracycle and cyclic sleep mechanism is proposed in this paper. Under heavy traffic load, optical network units (ONUs can utilize short idle slots within each scheduling cycle to enter intracycle sleep without postponing data transmission. In this way, energy conservation is achieved even under heavy traffic load with quality of service (QoS guarantee. Under light traffic load, ONUs perform long cyclic sleep for several scheduling cycles. The adoption of cyclic sleep instead of intracycle sleep under light traffic load can reduce unnecessary frequent transitions between sleep and full active work caused by using intracycle sleep. Further, the Markov chain of the proposed mechanism is established. The performances of the proposed mechanism and existing approaches are analyzed quantitatively based on the chain. For the proposed mechanism, power saving ability with QoS guarantee even under heavy traffic and better power saving performance than existing approaches are verified by the quantitative analysis. Moreover, simulations validate the above conclusions based on the chain.

  1. Internal monitoring of GBTx emulator using IPbus for CBM experiment

    Science.gov (United States)

    Mandal, Swagata; Zabolotny, Wojciech; Sau, Suman; Chkrabarti, Amlan; Saini, Jogender; Chattopadhyay, Subhasis; Pal, Sushanta Kumar

    2015-09-01

    The Compressed Baryonic Matter (CBM) experiment is a part of the Facility for Antiproton and Ion Research (FAIR) in Darmstadt at GSI. In CBM experiment a precisely time synchronized fault tolerant self-triggered electronics is required for Data Acquisition (DAQ) system in CBM experiments which can support high data rate (up to several TB/s). As a part of the implementation of the DAQ system of Muon Chamber (MUCH) which is one of the important detectors in CBM experiment, a FPGA based Gigabit Transceiver (GBTx) emulator is implemented. Readout chain for MUCH consists of XYTER chips (Front end electronics) which will be directly connected to detector, GBTx emulator, Data Processing Board (DPB) and First level event selector board (FLIB) with backend software interface. GBTx emulator will be connected with the XYTER emulator through LVDS (Low Voltage Differential Signalling) line in the front end and in the back end it is connected with DPB through 4.8 Gbps optical link. IPBus over Ethernet is used for internal monitoring of the registers within the GBTx. In IPbus implementation User Datagram Protocol (UDP) stack is used in transport layer of OSI model so that GBTx can be controlled remotely. A Python script is used at computer side to drive IPbus controller.

  2. 106th meeting of the working group electronic instrumentation in Spring 2015; 106. Tagung der Studiengruppe elektronische Instrumentierung im Fruehjahr 2015

    Energy Technology Data Exchange (ETDEWEB)

    Goettlicher, Peter (ed.)

    2015-06-15

    The following topics were dealt with: A survey of DESY, actual in DESY, the electronics sevice center of DESY, flip-chip technology at DES, CE certifications for electronic devices centrally performed by DESY ZE, a VHDL-based gigabit ethernet protocol pile for FPGAs, a digital camera trigger for the Cherenkov-telescope array, the trigger system in the Hess1 Upgrade camera, data connection between ships and zeppelin for the ascertainment of flow vortices, IP-based measurement devices on the base of FPGA, MTCA.4 RTM module based on the DRS-4 capacitor array, basic design rules, integrated phase-locked loop design, machine protection system for XFEL and FLASH II, general machine timing of FAIR, MTCA.4-based reference and clock distribution module for the European XFEL, the driving system of the 12-m Cherenkov telescope MST, ventilator driving tor VDC chambers in the CMS experiment, implementation of a TANGO server for the connection of the Mythen detector in the GALAXI experiment, the flexible PiLC controller for driving and measurement purposes with FPGA performance, measurement of important beam parameters of the LHC with diamond sensors, recent developments of the electronics for the ATLAS strip tracker upgrade, a flexible electromagnetic actuator system for the turbulence research, prototype development for the CALICE analogous hadronic calorimeter. (HSI)

  3. Data Processing and Analysis Systems for JT-60U

    International Nuclear Information System (INIS)

    Matsuda, T.; Totsuka, T.; Tsugita, T.; Oshima, T.; Sakata, S.; Sato, M.; Iwasaki, K.

    2002-01-01

    The JT-60U data processing system is a large computer complex gradually modernized by utilizing progressive computer and network technology. A main computer using state-of-the-art CMOS technology can handle ∼550 MB of data per discharge. A gigabit ethernet switch with FDDI ports has been introduced to cope with the increase of handling data. Workstation systems with VMEbus serial highway drivers for CAMAC have been developed and used to replace many minicomputer systems. VMEbus-based fast data acquisition systems have also been developed to enlarge and replace a minicomputer system for mass data.The JT-60U data analysis system is composed of a JT-60U database server and a JT-60U analysis server, which are distributed UNIX servers. The experimental database is stored in the 1TB RAID disk of the JT-60U database server and is composed of ZENKEI and diagnostic databases. Various data analysis tools are available on the JT-60U analysis server. For the remote collaboration, technical features of the data analysis system have been applied to the computer system to access JT-60U data via the Internet. Remote participation in JT-60U experiments has been successfully conducted since 1996

  4. Real-time communication for distributed plasma control systems

    Energy Technology Data Exchange (ETDEWEB)

    Luchetta, A. [Consorzio RFX, Associazione Euratom-ENEA sulla Fusione, Corso Stati Uniti 4, Padova 35127 (Italy)], E-mail: adriano.luchetta@igi.cnr.it; Barbalace, A.; Manduchi, G.; Soppelsa, A.; Taliercio, C. [Consorzio RFX, Associazione Euratom-ENEA sulla Fusione, Corso Stati Uniti 4, Padova 35127 (Italy)

    2008-04-15

    Real-time control applications will benefit in the near future from the enhanced performance provided by multi-core processor architectures. Nevertheless real-time communication will continue to be critical in distributed plasma control systems where the plant under control typically is distributed over a wide area. At RFX-mod real-time communication is crucial for hard real-time plasma control, due to the distributed architecture of the system, which consists of several VMEbus stations. The system runs under VxWorks and uses Gigabit Ethernet for sub-millisecond real-time communication. To optimize communication in the system, a set of detailed measurements has been carried out on the target platforms (Motorola MVME5100 and MVME5500) using either the VxWorks User Datagram Protocol (UDP) stack or raw communication based on the data link layer. Measurements have been carried out also under Linux, using its UDP stack or, in alternative, RTnet, an open source hard real-time network protocol stack. RTnet runs under Xenomai or RTAI, two popular real-time extensions based on the Linux kernel. The paper reports on the measurements carried out and compares the results, showing that the performance obtained by using open source code is suitable for sub-millisecond real-time communication in plasma control.

  5. Optical storage networking

    Science.gov (United States)

    Mohr, Ulrich

    2001-11-01

    For efficient business continuance and backup of mission- critical data an inter-site storage network is required. Where traditional telecommunications costs are prohibitive for all but the largest organizations, there is an opportunity for regional carries to deliver an innovative storage service. This session reveals how a combination of optical networking and protocol-aware SAN gateways can provide an extended storage networking platform with the lowest cost of ownership and the highest possible degree of reliability, security and availability. Companies of every size, with mainframe and open-systems environments, can afford to use this integrated service. Three mayor applications are explained; channel extension, Network Attached Storage (NAS), Storage Area Networks (SAN) and how optical networks address the specific requirements. One advantage of DWDM is the ability for protocols such as ESCON, Fibre Channel, ATM and Gigabit Ethernet, to be transported natively and simultaneously across a single fiber pair, and the ability to multiplex many individual fiber pairs over a single pair, thereby reducing fiber cost and recovering fiber pairs already in use. An optical storage network enables a new class of service providers, Storage Service Providers (SSP) aiming to deliver value to the enterprise by managing storage, backup, replication and restoration as an outsourced service.

  6. Geomagnetic and ionospheric data analysis over Antarctica: a contribution to the long term trends investigation

    Directory of Open Access Journals (Sweden)

    L. Alfonsi

    2008-05-01

    Full Text Available The analysis of the <I>foF2 ionosonde data acquired at mid and high latitudes reveals a general decreasing of the F2 plasma frequency over more than two solar cycles, showing steeper trends over the high latitude stations and, in particular, over Antarctica. A careful analysis of the <I>foF2 hourly data, opportunely catalogued in different levels of magneto-ionospheric conditions, highlights the role of the geomagnetic activity in the secular change of the ionosphere and confirms the latitudinal dependence of the trends. These results suggest interesting relations with some recent findings on the rapid decrease of some important physical and statistical quantities related to the geomagnetic field over the whole globe and mainly in Antarctica. In this paper we discuss the possibility of a connection between the ionospheric trends and a possible imminent geomagnetic reversal or excursion.

  7. Structural Variability within Frontoparietal Networks and Individual Differences in Attentional Functions: An Approach Using the Theory of Visual Attention.

    Science.gov (United States)

    Chechlacz, Magdalena; Gillebert, Celine R; Vangkilde, Signe A; Petersen, Anders; Humphreys, Glyn W

    2015-07-29

    Visuospatial attention allows us to select and act upon a subset of behaviorally relevant visual stimuli while ignoring distraction. Bundesen's theory of visual attention (TVA) (Bundesen, 1990) offers a quantitative analysis of the different facets of attention within a unitary model and provides a powerful analytic framework for understanding individual differences in attentional functions. Visuospatial attention is contingent upon large networks, distributed across both hemispheres, consisting of several cortical areas interconnected by long-association frontoparietal pathways, including three branches of the superior longitudinal fasciculus (SLF I-III) and the inferior fronto-occipital fasciculus (IFOF). Here we examine whether structural variability within human frontoparietal networks mediates differences in attention abilities as assessed by the TVA. Structural measures were based on spherical deconvolution and tractography-derived indices of tract volume and hindrance-modulated orientational anisotropy (HMOA). Individual differences in visual short-term memory (VSTM) were linked to variability in the microstructure (HMOA) of SLF II, SLF III, and IFOF within the right hemisphere. Moreover, VSTM and speed of information processing were linked to hemispheric lateralization within the IFOF. Differences in spatial bias were mediated by both variability in microstructure and volume of the right SLF II. Our data indicate that the microstructural and macrostrucutral organization of white matter pathways differentially contributes to both the anatomical lateralization of frontoparietal attentional networks and to individual differences in attentional functions. We conclude that individual differences in VSTM capacity, processing speed, and spatial bias, as assessed by TVA, link to variability in structural organization within frontoparietal pathways. Copyright © 2015 Chechlacz et al.

  8. Enhancing Image Processing Performance for PCID in a Heterogeneous Network of Multi-code Processors

    Science.gov (United States)

    Linderman, R.; Spetka, S.; Fitzgerald, D.; Emeny, S.

    The Physically-Constrained Iterative Deconvolution (PCID) image deblurring code is being ported to heterogeneous networks of multi-core systems, including Intel Xeons and IBM Cell Broadband Engines. This paper reports results from experiments using the JAWS supercomputer at MHPCC (60 TFLOPS of dual-dual Xeon nodes linked with Infiniband) and the Cell Cluster at AFRL in Rome, NY. The Cell Cluster has 52 TFLOPS of Playstation 3 (PS3) nodes with IBM Cell Broadband Engine multi-cores and 15 dual-quad Xeon head nodes. The interconnect fabric includes Infiniband, 10 Gigabit Ethernet and 1 Gigabit Ethernet to each of the 336 PS3s. The results compare approaches to parallelizing FFT executions across the Xeons and the Cell's Synergistic Processing Elements (SPEs) for frame-level image processing. The experiments included Intel's Performance Primitives and Math Kernel Library, FFTW3.2, and Carnegie Mellon's SPIRAL. Optimization of FFTs in the PCID code led to a decrease in relative processing time for FFTs. Profiling PCID version 6.2, about one year ago, showed the 13 functions that accounted for the highest percentage of processing were all FFT processing functions. They accounted for over 88% of processing time in one run on Xeons. FFT optimizations led to improvement in the current PCID version 8.0. A recent profile showed that only two of the 19 functions with the highest processing time were FFT processing functions. Timing measurements showed that FFT processing for PCID version 8.0 has been reduced to less than 19% of overall processing time. We are working toward a goal of scaling to 200-400 cores per job (1-2 imagery frames/core). Running a pair of cores on each set of frames reduces latency by implementing parallel FFT processing. Our current results show scaling well out to 100 pairs of cores. These results support the next higher level of parallelism in PCID, where groups of several hundred frames each producing one resolved image are sent to cliques of several

  9. Characterization of the Nonlinear Viscoelastic and Adhesive Properties of Polyurea and Characterization of Polyurea-Clad Metallic Structures

    Science.gov (United States)

    2009-10-14

    abrasive resistance, insensitivity to solvents, and low or zero volatile organic compounds) ( Takas , 2004). These features are superior to most, if...of a glass/epoxy interface. Journal of Applied Mechanics 65(1), 25-29. Takas . T.P., 2004. 100% solids aliphatic polyurea coatings for direct-metal

  10. Higher integrity of the motor and visual pathways in long-term video game players.

    Science.gov (United States)

    Zhang, Yang; Du, Guijin; Yang, Yongxin; Qin, Wen; Li, Xiaodong; Zhang, Quan

    2015-01-01

    Long term video game players (VGPs) exhibit superior visual and motor skills compared with non-video game control subjects (NVGCs). However, the neural basis underlying the enhanced behavioral performance remains largely unknown. To clarify this issue, the present study compared the whiter matter integrity within the corticospinal tracts (CST), the superior longitudinal fasciculus (SLF), the inferior longitudinal fasciculus (ILF), and the inferior fronto-occipital fasciculus (IFOF) between the VGPs and the NVGCs using diffusion tensor imaging. Compared with the NVGCs, voxel-wise comparisons revealed significantly higher fractional anisotropy (FA) values in some regions within the left CST, left SLF, bilateral ILF, and IFOF in VGPs. Furthermore, higher FA values in the left CST at the level of cerebral peduncle predicted a faster response in visual attention tasks. These results suggest that higher white matter integrity in the motor and higher-tier visual pathways is associated with long-term video game playing, which may contribute to the understanding on how video game play influences motor and visual performance.

  11. Upgrade of the data acquisition system for the A2 experiment at MAMI

    Energy Technology Data Exchange (ETDEWEB)

    Neiser, Andreas; Gradl, Wolfgang [Institut fuer Kernphysik, Johann-Joachim-Becher-Weg 45, Mainz (Germany)

    2015-07-01

    The A2 collaboration at the electron accelerator MAMI in Mainz uses energy-tagged photons to produce light mesons off the nucleon. Its current data acquisition system is the major performance bottleneck under typical trigger conditions. Furthermore, the availability of spare parts is limited, which renders the maintainability for the next decade difficult. Thus, an upgraded system is desirable for A2 to achieve the upcoming experimental goals. For this upgrade, an FPGA-based solution using the TRB3 is being considered. The TRB3 is a multi-purpose 4+1 FPGA board, where four peripheral FPGAs communicate with one add-on board each. The central FPGA provides data readout via standard gigabit Ethernet and interconnection to other TRB3s via optical links. The TRB3 collaboration currently provides flexible TDC-in-FPGA firmwares with various discrimination front-ends as well as a 48 channel ADC add-on board with 60 MHz sampling rate and 10 bit resolution. Additionally, an extensive software framework for slow control and readout is available. We present energy and timing measurements with the ADC add-on board at the Crystal Ball NaI(Tl) calorimeter and compare the performance to the currently used COMPASS data acquisition system. Furthermore, we give an outlook on possible feature extraction firmwares and estimate the costs for a complete upgrade of the system.

  12. 107th meeting of the working group electronic instrumentation in Spring 2016; 107. Tagung der Studiengruppe elektronische Instrumentierung im Fruehjahr 2016

    Energy Technology Data Exchange (ETDEWEB)

    Goettlicher, Peter (ed.)

    2016-06-15

    The following topics were dealt with: Instrumentation and the NUSTAR physics program in FAIR phase-0, actual projects of the group EE-digital electronics, ethernet-based data acquisition beyond 10 GBit/s, the big data problem in DAQ systems, a general front-end readout architecture in scientific detector systems, the KALYPSO detection system for single-shot electro-optical bunch measurements, MicroTCA based RF and laser cavity regulation including piezo controls, FPGA implementation for data acquisition system with gigabit serial link and PCIe interface, next generation MTCA.4 crate, increased PCIexpress band-width up to 128 Gb/s and optical PCIexpress cascading, power supplies for the sensitive measurement techniques and the complex automatization, error-save industry PC, the interfacing of NI products to EPICS, Green Cube, a survey of EPICS rate at GSI and FAIR, CS++ as actor-based successor of the CS framework, synchronized fast shutter control with adaptive phase shift compensation in the EtherCAT motion control system, precise voltage supply for the SiPM of a Cherenkov telescope in the Antarctis, development of a multichannel readout hardware for delay-line neutron detectors, silicon photonic data transmission for detector instrumentation, EMV consideration of the Maria instrument at the FRM2, quench detectors for FAIR, optimized illumination and in-situ calibration of high-gain antennas for the detection of extensive cosmic air showers. (HSI)

  13. 107th meeting of the working group electronic instrumentation in Spring 2016

    International Nuclear Information System (INIS)

    Goettlicher, Peter

    2016-06-01

    The following topics were dealt with: Instrumentation and the NUSTAR physics program in FAIR phase-0, actual projects of the group EE-digital electronics, ethernet-based data acquisition beyond 10 GBit/s, the big data problem in DAQ systems, a general front-end readout architecture in scientific detector systems, the KALYPSO detection system for single-shot electro-optical bunch measurements, MicroTCA based RF and laser cavity regulation including piezo controls, FPGA implementation for data acquisition system with gigabit serial link and PCIe interface, next generation MTCA.4 crate, increased PCIexpress band-width up to 128 Gb/s and optical PCIexpress cascading, power supplies for the sensitive measurement techniques and the complex automatization, error-save industry PC, the interfacing of NI products to EPICS, Green Cube, a survey of EPICS rate at GSI and FAIR, CS++ as actor-based successor of the CS framework, synchronized fast shutter control with adaptive phase shift compensation in the EtherCAT motion control system, precise voltage supply for the SiPM of a Cherenkov telescope in the Antarctis, development of a multichannel readout hardware for delay-line neutron detectors, silicon photonic data transmission for detector instrumentation, EMV consideration of the Maria instrument at the FRM2, quench detectors for FAIR, optimized illumination and in-situ calibration of high-gain antennas for the detection of extensive cosmic air showers. (HSI)

  14. Evaluation of diffusion-tensor imaging-based global search and tractography for tumor surgery close to the language system.

    Directory of Open Access Journals (Sweden)

    Mirco Richter

    Full Text Available Pre-operative planning and intra-operative guidance in neurosurgery require detailed information about the location of functional areas and their anatomo-functional connectivity. In particular, regarding the language system, post-operative deficits such as aphasia can be avoided. By combining functional magnetic resonance imaging and diffusion tensor imaging, the connectivity between functional areas can be reconstructed by tractography techniques that need to cope with limitations such as limited resolution and low anisotropic diffusion close to functional areas. Tumors pose particular challenges because of edema, displacement effects on brain tissue and infiltration of white matter. Under these conditions, standard fiber tracking methods reconstruct pathways of insufficient quality. Therefore, robust global or probabilistic approaches are required. In this study, two commonly used standard fiber tracking algorithms, streamline propagation and tensor deflection, were compared with a previously published global search, Gibbs tracking and a connection-oriented probabilistic tractography approach. All methods were applied to reconstruct neuronal pathways of the language system of patients undergoing brain tumor surgery, and control subjects. Connections between Broca and Wernicke areas via the arcuate fasciculus (AF and the inferior fronto-occipital fasciculus (IFOF were validated by a clinical expert to ensure anatomical feasibility, and compared using distance- and diffusion-based similarity metrics to evaluate their agreement on pathway locations. For both patients and controls, a strong agreement between all methods was observed regarding the location of the AF. In case of the IFOF however, standard fiber tracking and Gibbs tracking predominantly identified the inferior longitudinal fasciculus that plays a secondary role in semantic language processing. In contrast, global search resolved connections in almost every case via the IFOF which

  15. Is Congenital Amusia a Disconnection Syndrome? A Study Combining Tract- and Network-Based Analysis

    Directory of Open Access Journals (Sweden)

    Jieqiong Wang

    2017-09-01

    Full Text Available Previous studies on congenital amusia mainly focused on the impaired fronto-temporal pathway. It is possible that neural pathways of amusia patients on a larger scale are affected. In this study, we investigated changes in structural connections by applying both tract-based and network-based analysis to DTI data of 12 subjects with congenital amusia and 20 demographic-matched normal controls. TBSS (tract-based spatial statistics was used to detect microstructural changes. The results showed that amusics had higher diffusivity indices in the corpus callosum, the right inferior/superior longitudinal fasciculus, and the right inferior frontal-occipital fasciculus (IFOF. The axial diffusivity values of the right IFOF were negatively correlated with musical scores in the amusia group. Network-based analysis showed that the efficiency of the brain network was reduced in amusics. The impairments of WM tracts were also found to be correlated with reduced network efficiency in amusics. This suggests that impaired WM tracts may lead to the reduced network efficiency seen in amusics. Our findings suggest that congenital amusia is a disconnection syndrome.

  16. Is Congenital Amusia a Disconnection Syndrome? A Study Combining Tract- and Network-Based Analysis.

    Science.gov (United States)

    Wang, Jieqiong; Zhang, Caicai; Wan, Shibiao; Peng, Gang

    2017-01-01

    Previous studies on congenital amusia mainly focused on the impaired fronto-temporal pathway. It is possible that neural pathways of amusia patients on a larger scale are affected. In this study, we investigated changes in structural connections by applying both tract-based and network-based analysis to DTI data of 12 subjects with congenital amusia and 20 demographic-matched normal controls. TBSS (tract-based spatial statistics) was used to detect microstructural changes. The results showed that amusics had higher diffusivity indices in the corpus callosum, the right inferior/superior longitudinal fasciculus, and the right inferior frontal-occipital fasciculus (IFOF). The axial diffusivity values of the right IFOF were negatively correlated with musical scores in the amusia group. Network-based analysis showed that the efficiency of the brain network was reduced in amusics. The impairments of WM tracts were also found to be correlated with reduced network efficiency in amusics. This suggests that impaired WM tracts may lead to the reduced network efficiency seen in amusics. Our findings suggest that congenital amusia is a disconnection syndrome.

  17. Developing a Hybrid Virtualization Platform Design for Cyber Warfare Training and Education

    Science.gov (United States)

    2010-06-01

    25  2.7.2.  Virtual Distributed Ethernet ( VDE ) ...................................................... 26  2.7.3...ability to work with the network independent of the actual underlying physical topology. 26 2.7.2. Virtual Distributed Ethernet ( VDE ) 2.7.2.1...Virtual Distributed Ethernet ( VDE ) is an abstraction of the networking components involved in a typical Ethernet network [18]. It allows for virtual

  18. Multiband LTE-A, WiFi ac, and 4-PAM baseband simultaneous transmission over 50 m thick-core POF for in-home network

    NARCIS (Netherlands)

    Forni, F.; Shi, Y.; Van Den Boom, H.P.A.; Tangdiongga, E.; Koonen, A.M.J.

    2017-01-01

    We demonstrated the simultaneous transmission of multiband LTE-A signals, a WiFi IEEE802.11ac and a gigabit/s baseband 4-PAM signal over 1mm core diameter PMMA GI-POF. The optical link used a red light 650 nm laser diode and a p-i-n photodiode with a transimpedance amplifier. The 4-PAM transmission

  19. Method of construction of rational corporate network using the simulation model

    Directory of Open Access Journals (Sweden)

    V.N. Pakhomovа

    2013-06-01

    Full Text Available Purpose. Search for new options of the transition from Ethernet technology. Methodology. Physical structuring of the Fast Ethernet network based on hubs and logical structuring of Fast Ethernet network using commutators. Organization of VLAN based on ports grouping and in accordance with the standard IEEE 802 .1Q. Findings. The options for improving of the Ethernet network are proposed. According to the Fast Ethernet and VLAN technologies on the simulation models in packages NetCraker and Cisco Packet Traker respectively. Origiality. The technique of designing of local area network using the VLAN technology is proposed. Practical value.Each of the options of "Dniprozaliznychproekt" network improving has its advantages. Transition from the Ethernet to Fast Ethernet technology is simple and economical, it requires only one commutator, when the VLAN organization requires at least two. VLAN technology, however, has the following advantages: reducing the load on the network, isolation of the broadcast traffic, change of the logical network structure without changing its physical structure, improving the network security. The transition from Ethernet to the VLAN technology allows you to separate the physical topology from the logical one, and the format of the ÌEEE 802.1Q standard frames allows you to simplify the process of virtual networks implementation to enterprises.

  20. Relevant Standards

    Indian Academy of Sciences (India)

    .86: Ethernet over LAPS. Standard in China and India. G.7041: Generic Framing Procedure (GFP). Supports Ethernet as well as other data formats (e.g., Fibre Channel); Protocol of ... IEEE 802.3x for flow control of incoming Ethernet data ...

  1. Timing Analysis of Rate Constrained Traffic for the TTEthernet Communication Protocol

    DEFF Research Database (Denmark)

    Tamas-Selicean, Domitian; Pop, Paul; Steiner, Wilfried

    2015-01-01

    Ethernet is a low-cost communication solution offering high transmission speeds. Although its applications extend beyond computer networking, Ethernet is not suitable for real-time and safety-critical systems. To alleviate this, several real-time Ethernet-based communication protocols have been...

  2. Level Zero Trigger Processor for the NA62 experiment

    Science.gov (United States)

    Soldi, D.; Chiozzi, S.

    2018-05-01

    The NA62 experiment is designed to measure the ultra-rare decay K+ arrow π+ ν bar nu branching ratio with a precision of ~ 10% at the CERN Super Proton Synchrotron (SPS). The trigger system of NA62 consists in three different levels designed to select events of physics interest in a high beam rate environment. The L0 Trigger Processor (L0TP) is the lowest level system of the trigger chain. It is hardware implemented using programmable logic. The architecture of the NA62 L0TP system is a new approach compared to existing systems used in high-energy physics experiments. It is fully digital, based on a standard gigabit Ethernet communication between detectors and the L0TP Board. The L0TP Board is a commercial development board, mounting a programmable logic device (FPGA). The primitives generated by sub-detectors are sent asynchronously using the UDP protocol to the L0TP during the entire beam spill period. The L0TP realigns in time the primitives coming from seven different sources and performs a data selection based on the characteristics of the event such as energy, multiplicity and topology of hits in the sub-detectors. It guarantees a maximum latency of 1 ms. The maximum input rate is about 10 MHz for each sub-detector, while the design maximum output trigger rate is 1 MHz. A description of the trigger algorithm is presented here.

  3. Data acquisition architecture and online processing system for the HAWC gamma-ray observatory

    Science.gov (United States)

    Abeysekara, A. U.; Alfaro, R.; Alvarez, C.; Álvarez, J. D.; Arceo, R.; Arteaga-Velázquez, J. C.; Ayala Solares, H. A.; Barber, A. S.; Baughman, B. M.; Bautista-Elivar, N.; Becerra Gonzalez, J.; Belmont-Moreno, E.; BenZvi, S. Y.; Berley, D.; Bonilla Rosales, M.; Braun, J.; Caballero-Lopez, R. A.; Caballero-Mora, K. S.; Carramiñana, A.; Castillo, M.; Cotti, U.; Cotzomi, J.; de la Fuente, E.; De León, C.; DeYoung, T.; Diaz-Cruz, J.; Diaz Hernandez, R.; Díaz-Vélez, J. C.; Dingus, B. L.; DuVernois, M. A.; Ellsworth, R. W.; Fiorino, D. W.; Fraija, N.; Galindo, A.; Garfias, F.; González, M. M.; Goodman, J. A.; Grabski, V.; Gussert, M.; Hampel-Arias, Z.; Harding, J. P.; Hui, C. M.; Hüntemeyer, P.; Imran, A.; Iriarte, A.; Karn, P.; Kieda, D.; Kunde, G. J.; Lara, A.; Lauer, R. J.; Lee, W. H.; Lennarz, D.; León Vargas, H.; Linares, E. C.; Linnemann, J. T.; Longo Proper, M.; Luna-García, R.; Malone, K.; Marinelli, A.; Marinelli, S. S.; Martinez, O.; Martínez-Castro, J.; Martínez-Huerta, H.; Matthews, J. A. J.; McEnery, J.; Mendoza Torres, E.; Miranda-Romagnoli, P.; Moreno, E.; Mostafá, M.; Nellen, L.; Newbold, M.; Noriega-Papaqui, R.; Oceguera-Becerra, T.; Patricelli, B.; Pelayo, R.; Pérez-Pérez, E. G.; Pretz, J.; Rivière, C.; Rosa-González, D.; Ruiz-Velasco, E.; Ryan, J.; Salazar, H.; Salesa Greus, F.; Sanchez, F. E.; Sandoval, A.; Schneider, M.; Silich, S.; Sinnis, G.; Smith, A. J.; Sparks Woodle, K.; Springer, R. W.; Taboada, I.; Toale, P. A.; Tollefson, K.; Torres, I.; Ukwatta, T. N.; Villaseñor, L.; Weisgarber, T.; Westerhoff, S.; Wisher, I. G.; Wood, J.; Yapici, T.; Yodh, G. B.; Younk, P. W.; Zaborov, D.; Zepeda, A.; Zhou, H.

    2018-04-01

    The High Altitude Water Cherenkov observatory (HAWC) is an air shower array devised for TeV gamma-ray astronomy. HAWC is located at an altitude of 4100 m a.s.l. in Sierra Negra, Mexico. HAWC consists of 300 Water Cherenkov Detectors, each instrumented with 4 photomultiplier tubes (PMTs). HAWC re-uses the Front-End Boards from the Milagro experiment to receive the PMT signals. These boards are used in combination with Time to Digital Converters (TDCs) to record the time and the amount of light in each PMT hit (light flash). A set of VME TDC modules (128 channels each) is operated in a continuous (dead time free) mode. The TDCs are read out via the VME bus by Single-Board Computers (SBCs), which in turn are connected to a gigabit Ethernet network. The complete system produces ≈500 MB/s of raw data. A high-throughput data processing system has been designed and built to enable real-time data analysis. The system relies on off-the-shelf hardware components, an open-source software technology for data transfers (ZeroMQ) and a custom software framework for data analysis (AERIE). Multiple trigger and reconstruction algorithms can be combined and run on blocks of data in a parallel fashion, producing a set of output data streams which can be analyzed in real time with minimal latency (system and the real-time data processing system. The performance of these systems is also discussed.

  4. A high-speed, reconfigurable, channel- and time-tagged photon arrival recording system for intensity-interferometry and quantum optics experiments

    Science.gov (United States)

    Girish, B. S.; Pandey, Deepak; Ramachandran, Hema

    2017-08-01

    We present a compact, inexpensive multichannel module, APODAS (Avalanche Photodiode Output Data Acquisition System), capable of detecting 0.8 billion photons per second and providing real-time recording on a computer hard-disk, of channel- and time-tagged information of the arrival of upto 0.4 billion photons per second. Built around a Virtex-5 Field Programmable Gate Array (FPGA) unit, APODAS offers a temporal resolution of 5 nanoseconds with zero deadtime in data acquisition, utilising an efficient scheme for time and channel tagging and employing Gigabit ethernet for the transfer of data. Analysis tools have been developed on a Linux platform for multi-fold coincidence studies and time-delayed intensity interferometry. As illustrative examples, the second-order intensity correlation function ( g 2) of light from two commonly used sources in quantum optics —a coherent laser source and a dilute atomic vapour emitting spontaneously, constituting a thermal source— are presented. With easy reconfigurability and with no restriction on the total record length, APODAS can be readily used for studies over various time scales. This is demonstrated by using APODAS to reveal Rabi oscillations on nanosecond time scales in the emission of ultracold atoms, on the one hand, and, on the other hand, to measure the second-order correlation function on the millisecond time scales from tailored light sources. The efficient and versatile performance of APODAS promises its utility in diverse fields, like quantum optics, quantum communication, nuclear physics, astrophysics and biology.

  5. ATLAS DataFlow Infrastructure: Recent results from ATLAS cosmic and first-beam data-taking

    Energy Technology Data Exchange (ETDEWEB)

    Vandelli, Wainer, E-mail: wainer.vandelli@cern.c

    2010-04-01

    The ATLAS DataFlow infrastructure is responsible for the collection and conveyance of event data from the detector front-end electronics to the mass storage. Several optimized and multi-threaded applications fulfill this purpose operating over a multi-stage Gigabit Ethernet network which is the backbone of the ATLAS Trigger and Data Acquisition System. The system must be able to efficiently transport event-data with high reliability, while providing aggregated bandwidths larger than 5 GByte/s and coping with many thousands network connections. Nevertheless, routing and streaming capabilities and monitoring and data accounting functionalities are also fundamental requirements. During 2008, a few months of ATLAS cosmic data-taking and the first experience with the LHC beams provided an unprecedented test-bed for the evaluation of the performance of the ATLAS DataFlow, in terms of functionality, robustness and stability. Besides, operating the system far from its design specifications helped in exercising its flexibility and contributed in understanding its limitations. Moreover, the integration with the detector and the interfacing with the off-line data processing and management have been able to take advantage of this extended data taking-period as well. In this paper we report on the usage of the DataFlow infrastructure during the ATLAS data-taking. These results, backed-up by complementary performance tests, validate the architecture of the ATLAS DataFlow and prove that the system is robust, flexible and scalable enough to cope with the final requirements of the ATLAS experiment.

  6. Frame Decoder for Consultative Committee for Space Data Systems (CCSDS)

    Science.gov (United States)

    Reyes, Miguel A. De Jesus

    2014-01-01

    GNU Radio is a free and open source development toolkit that provides signal processing to implement software radios. It can be used with low-cost external RF hardware to create software defined radios, or without hardware in a simulation-like environment. GNU Radio applications are primarily written in Python and C++. The Universal Software Radio Peripheral (USRP) is a computer-hosted software radio designed by Ettus Research. The USRP connects to a host computer via high-speed Gigabit Ethernet. Using the open source Universal Hardware Driver (UHD), we can run GNU Radio applications using the USRP. An SDR is a "radio in which some or all physical layer functions are software defined"(IEEE Definition). A radio is any kind of device that wirelessly transmits or receives radio frequency (RF) signals in the radio frequency. An SDR is a radio communication system where components that have been typically implemented in hardware are implemented in software. GNU Radio has a generic packet decoder block that is not optimized for CCSDS frames. Using this generic packet decoder will add bytes to the CCSDS frames and will not permit for bit error correction using Reed-Solomon. The CCSDS frames consist of 256 bytes, including a 32-bit sync marker (0x1ACFFC1D). This frames are generated by the Space Data Processor and GNU Radio will perform the modulation and framing operations, including frame synchronization.

  7. LHCb Online event processing and filtering

    Science.gov (United States)

    Alessio, F.; Barandela, C.; Brarda, L.; Frank, M.; Franek, B.; Galli, D.; Gaspar, C.; Herwijnen, E. v.; Jacobsson, R.; Jost, B.; Köstner, S.; Moine, G.; Neufeld, N.; Somogyi, P.; Stoica, R.; Suman, S.

    2008-07-01

    The first level trigger of LHCb accepts one million events per second. After preprocessing in custom FPGA-based boards these events are distributed to a large farm of PC-servers using a high-speed Gigabit Ethernet network. Synchronisation and event management is achieved by the Timing and Trigger system of LHCb. Due to the complex nature of the selection of B-events, which are the main interest of LHCb, a full event-readout is required. Event processing on the servers is parallelised on an event basis. The reduction factor is typically 1/500. The remaining events are forwarded to a formatting layer, where the raw data files are formed and temporarily stored. A small part of the events is also forwarded to a dedicated farm for calibration and monitoring. The files are subsequently shipped to the CERN Tier0 facility for permanent storage and from there to the various Tier1 sites for reconstruction. In parallel files are used by various monitoring and calibration processes running within the LHCb Online system. The entire data-flow is controlled and configured by means of a SCADA system and several databases. After an overview of the LHCb data acquisition and its design principles this paper will emphasize the LHCb event filter system, which is now implemented using the final hardware and will be ready for data-taking for the LHC startup. Control, configuration and security aspects will also be discussed.

  8. LHCb Online event processing and filtering

    International Nuclear Information System (INIS)

    Alessio, F; Barandela, C; Brarda, L; Frank, M; Gaspar, C; Herwijnen, E v; Jacobsson, R; Jost, B; Koestner, S; Moine, G; Neufeld, N; Somogyi, P; Stoica, R; Suman, S; Franek, B; Galli, D

    2008-01-01

    The first level trigger of LHCb accepts one million events per second. After preprocessing in custom FPGA-based boards these events are distributed to a large farm of PC-servers using a high-speed Gigabit Ethernet network. Synchronisation and event management is achieved by the Timing and Trigger system of LHCb. Due to the complex nature of the selection of B-events, which are the main interest of LHCb, a full event-readout is required. Event processing on the servers is parallelised on an event basis. The reduction factor is typically 1/500. The remaining events are forwarded to a formatting layer, where the raw data files are formed and temporarily stored. A small part of the events is also forwarded to a dedicated farm for calibration and monitoring. The files are subsequently shipped to the CERN Tier0 facility for permanent storage and from there to the various Tier1 sites for reconstruction. In parallel files are used by various monitoring and calibration processes running within the LHCb Online system. The entire data-flow is controlled and configured by means of a SCADA system and several databases. After an overview of the LHCb data acquisition and its design principles this paper will emphasize the LHCb event filter system, which is now implemented using the final hardware and will be ready for data-taking for the LHC startup. Control, configuration and security aspects will also be discussed

  9. ATLAS DataFlow Infrastructure: Recent results from ATLAS cosmic and first-beam data-taking

    International Nuclear Information System (INIS)

    Vandelli, Wainer

    2010-01-01

    The ATLAS DataFlow infrastructure is responsible for the collection and conveyance of event data from the detector front-end electronics to the mass storage. Several optimized and multi-threaded applications fulfill this purpose operating over a multi-stage Gigabit Ethernet network which is the backbone of the ATLAS Trigger and Data Acquisition System. The system must be able to efficiently transport event-data with high reliability, while providing aggregated bandwidths larger than 5 GByte/s and coping with many thousands network connections. Nevertheless, routing and streaming capabilities and monitoring and data accounting functionalities are also fundamental requirements. During 2008, a few months of ATLAS cosmic data-taking and the first experience with the LHC beams provided an unprecedented test-bed for the evaluation of the performance of the ATLAS DataFlow, in terms of functionality, robustness and stability. Besides, operating the system far from its design specifications helped in exercising its flexibility and contributed in understanding its limitations. Moreover, the integration with the detector and the interfacing with the off-line data processing and management have been able to take advantage of this extended data taking-period as well. In this paper we report on the usage of the DataFlow infrastructure during the ATLAS data-taking. These results, backed-up by complementary performance tests, validate the architecture of the ATLAS DataFlow and prove that the system is robust, flexible and scalable enough to cope with the final requirements of the ATLAS experiment.

  10. Event detection intelligent camera development

    International Nuclear Information System (INIS)

    Szappanos, A.; Kocsis, G.; Molnar, A.; Sarkozi, J.; Zoletnik, S.

    2008-01-01

    A new camera system 'event detection intelligent camera' (EDICAM) is being developed for the video diagnostics of W-7X stellarator, which consists of 10 distinct and standalone measurement channels each holding a camera. Different operation modes will be implemented for continuous and for triggered readout as well. Hardware level trigger signals will be generated from real time image processing algorithms optimized for digital signal processor (DSP) and field programmable gate array (FPGA) architectures. At full resolution a camera sends 12 bit sampled 1280 x 1024 pixels with 444 fps which means 1.43 Terabyte over half an hour. To analyse such a huge amount of data is time consuming and has a high computational complexity. We plan to overcome this problem by EDICAM's preprocessing concepts. EDICAM camera system integrates all the advantages of CMOS sensor chip technology and fast network connections. EDICAM is built up from three different modules with two interfaces. A sensor module (SM) with reduced hardware and functional elements to reach a small and compact size and robust action in harmful environment as well. An image processing and control unit (IPCU) module handles the entire user predefined events and runs image processing algorithms to generate trigger signals. Finally a 10 Gigabit Ethernet compatible image readout card functions as the network interface for the PC. In this contribution all the concepts of EDICAM and the functions of the distinct modules are described

  11. The KSTAR integrated control system based on EPICS

    International Nuclear Information System (INIS)

    Kim, K.H.; Ju, C.J.; Kim, M.K.; Park, M.K.; Choi, J.W.; Kyum, M.C.; Kwon, M.

    2006-01-01

    The Korea Superconducting Tokamak Advanced Research (KSTAR) control system will be developed with several subsystems, which consist of the central control system (e.g. plasma control, machine control, diagnostic control, time synchronization, and interlock systems) and local control systems for various subsystems. We are planning to connect the entire system with several networks, viz. a reflective-memory-based real-time network, an optical timing network, a gigabit Ethernet network for generic machine control, and a storage network. Then it will evolve into a network-based, distributed real-time control system. Thus, we have to consider the standard communication protocols among the subsystems and how to handle the various kinds of hardware in a homogeneous way. To satisfy these requirements, EPICS has been chosen for the KSTAR control. The EPICS framework provides network-based real-time distributed control, operating system independent programming tools, operator interface tools, archiving tools, and interface tools with other commercial and non-commercial software. The most important advantage of the use of the EPICS framework is in providing homogeneity of the system for the control system developer. The developer does not have to be concerned about the specifics of the local system, but can concentrate on the implementation of the control logic with EPICS tools. We will present the details of the integration issues and also will give a brief summary of the entire KSTAR control system from an integration point of view

  12. Design of a mutual authentication based on NTRUsign with a perturbation and inherent multipoint control protocol frames in an Ethernet-based passive optical network

    Science.gov (United States)

    Yin, Aihan; Ding, Yisheng

    2014-11-01

    Identity-related security issues inherently present in passive optical networks (PON) still exist in the current (1G) and next-generation (10G) Ethernet-based passive optical network (EPON) systems. We propose a mutual authentication scheme that integrates an NTRUsign digital signature algorithm with inherent multipoint control protocol (MPCP) frames over an EPON system between the optical line terminal (OLT) and optical network unit (ONU). Here, a primitive NTRUsign algorithm is significantly modified through the use of a new perturbation so that it can be effectively used for simultaneously completing signature and authentication functions on the OLT and the ONU sides. Also, in order to transmit their individual sensitive messages, which include public key, signature, and random value and so forth, to each other, we redefine three unique frames according to MPCP format frame. These generated messages can be added into the frames and delivered to each other, allowing the OLT and the ONU to go ahead with a mutual identity authentication process to verify their legal identities. Our simulation results show that this proposed scheme performs very well in resisting security attacks and has low influence on the registration efficiency to to-be-registered ONUs. A performance comparison with traditional authentication algorithms is also presented. To the best of our knowledge, no detailed design of mutual authentication in EPON can be found in the literature up to now.

  13. Syrian Refugees: Are They a Non Traditional Threat to Water Supplies in Lebanon and Jordan

    Science.gov (United States)

    2016-09-01

    effects of Syrian refugees on the water supplies of each country as a non-traditional security threat. Political stability is the ultimate goal of each...security.html. 11 against Syrians sets the stage for political instability because the Syrians represent an increasing portion of the population, if...of political instability could send shockwaves through the region and drastically alter U.S. foreign policy in the Middle East. Though the stakes

  14. ATM technology and beyond

    Science.gov (United States)

    Cheung, Nim K.

    1993-01-01

    Networks based on Asynchronous Transfer Mode (ATM) are expected to provide cost-effective and ubiquitous infrastructure to support broadband and multimedia services. In this paper, we give an overview of the ATM standards and its associated physical layer transport technologies. We use the experimental HIPPI-ATM-SONET (HAS) interface in the Nectar Gigabit Testbed to illustrate how one can use the SONET/ATM public network to provide transport for bursty gigabit applications.

  15. Tracting the neural basis of music: Deficient structural connectivity underlying acquired amusia.

    Science.gov (United States)

    Sihvonen, Aleksi J; Ripollés, Pablo; Särkämö, Teppo; Leo, Vera; Rodríguez-Fornells, Antoni; Saunavaara, Jani; Parkkola, Riitta; Soinila, Seppo

    2017-12-01

    Acquired amusia provides a unique opportunity to investigate the fundamental neural architectures of musical processing due to the transition from a functioning to defective music processing system. Yet, the white matter (WM) deficits in amusia remain systematically unexplored. To evaluate which WM structures form the neural basis for acquired amusia and its recovery, we studied 42 stroke patients longitudinally at acute, 3-month, and 6-month post-stroke stages using DTI [tract-based spatial statistics (TBSS) and deterministic tractography (DT)] and the Scale and Rhythm subtests of the Montreal Battery of Evaluation of Amusia (MBEA). Non-recovered amusia was associated with structural damage and subsequent degeneration in multiple WM tracts including the right inferior fronto-occipital fasciculus (IFOF), arcuate fasciculus (AF), inferior longitudinal fasciculus (ILF), uncinate fasciculus (UF), and frontal aslant tract (FAT), as well as in the corpus callosum (CC) and its posterior part (tapetum). In a linear regression analysis, the volume of the right IFOF was the main predictor of MBEA performance across time. Overall, our results provide a comprehensive picture of the large-scale deficits in intra- and interhemispheric structural connectivity underlying amusia, and conversely highlight which pathways are crucial for normal music perception. Copyright © 2017 Elsevier Ltd. All rights reserved.

  16. Converged photonic data storage and switch platform for exascale disaggregated data centers

    Science.gov (United States)

    Pitwon, R.; Wang, K.; Worrall, A.

    2017-02-01

    We report on a converged optically enabled Ethernet storage, switch and compute platform, which could support future disaggregated data center architectures. The platform includes optically enabled Ethernet switch controllers, an advanced electro-optical midplane and optically interchangeable generic end node devices. We demonstrate system level performance using optically enabled Ethernet disk drives and micro-servers across optical links of varied lengths.

  17. CBTs Budget for 1997 og Arbejdsplaner for 1996 - 1999

    DEFF Research Database (Denmark)

    Jeppesen, Palle

    1996-01-01

    For Center for Bredbånds Telekommunikation beskrives budget for 1997 samt forskningsplaner for 1996-1999 for områderne optiske netværk, gigabit elektronik, optiske bølgeledere og bredbåndsswitching samt for højhastighedssystemer.......For Center for Bredbånds Telekommunikation beskrives budget for 1997 samt forskningsplaner for 1996-1999 for områderne optiske netværk, gigabit elektronik, optiske bølgeledere og bredbåndsswitching samt for højhastighedssystemer....

  18. Contamination aspects in integrating high dielectric constant and ferroelectric materials into CMOS processes

    OpenAIRE

    Boubekeur, Hocine

    2004-01-01

    n memory technology, new materials are being intensively investigated to overcome the integration limits of conventional dielectrics for Giga-bit scale integration, or to be able to produce new types of non-volatile low power memories such as FeRAM. Perovskite type high dielectric constant films for use in Giga-bit scale memories or layered perovskite films for use in non-volatile memories involve materials to semiconductor process flows, which entail a high risk of contamination. The introdu...

  19. Convergência em redes de acesso de nova geração

    OpenAIRE

    Dias, Pedro Miguel

    2015-01-01

    Due to the continuous growth of bandwidth need, passive optical networks (PONs) emerged. From the Gigabit-PON (G-PON), 10 Gigabit-PON (XG-PON) and Time Wavelength Division Multiplexing PON (TWDM-PON), they still being made studies on passive optical networks that can meet the bandwidth requirements of the future, such as the Ultra Dense Wavelength Division Multiplexing PON (UDWDM-PON). In this thesis, the mentioned technologies are studied, describing the main features of the existing ones...

  20. Análisis y estudio de las técnicas de compresión de datos para la integración de la tecnología PDH/SDH sobre redes ethernet e implementación de un algoritmo de compresión mediante software de simulación

    OpenAIRE

    Gálvez Castillo, Juan Carlos; Morocho Vallejo, Luis Roberto

    2010-01-01

    El presente Proyecto de Grado, titulado: Análisis y estudio de las técnicas de compresión de datos para la integración de la tecnología PDH/SDH sobre redes Ethernet e implementación de un algoritmo de compresión mediante software de simulación, comprende un estudio investigativo de las características, ventajas y desventajas de las técnicas de compresión de datos, comprende también de la implementación de un algoritmo de compresión que demuestre mediante un software de simulación dichas venta...

  1. Subcomponents and Connectivity of the Inferior Fronto-Occipital Fasciculus Revealed by Diffusion Spectrum Imaging Fiber Tracking

    OpenAIRE

    Wu, Yupeng; Sun, Dandan; Wang, Yong; Wang, Yibao

    2016-01-01

    The definitive structure and functional role of the inferior fronto-occipital fasciculus (IFOF) are still controversial. In this study, we aimed to investigate the connectivity, asymmetry, and segmentation patterns of this bundle. High angular diffusion spectrum imaging (DSI) analysis was performed on 10 healthy adults and a 90-subject DSI template (NTU-90 Atlas). In addition, a new tractography approach based on the anatomic subregions and two regions of interest (ROI) was evaluated for the ...

  2. Data transmission optical link for LLRF TESLA project part I: hardware structure of OPT0 module

    Science.gov (United States)

    Pozniak, Krzysztof T.; Romaniuk, Ryszard S.; Jalmuzna, Wojciech; Olowski, Krzysztof; Perkuszewski, Karol; Zielinski, Jerzy; Kierzkowski, Krzysztof

    2006-03-01

    It may be predicted now, even assuming a very conservative approach, that the next generation of the Low Level RF control systems for future accelerators will use extensively such technologies like: very fast programmable circuits equipped with DSP, embedded PC and optical communication I/O functionalities, as well as multi-gigabit optical transmission of measurement data and control signals. The paper presents the idea and realization of a gigabit synchronous data distributor designed to work in the LLRF control system of TESLA technology based X-ray FEL. The design bases on a relatively simple and cheap FPGA chip Cyclone. Commercially available SERDES (serializer/deserializer) and optical transceiver chips were applied. The optoelectronic module is embedded on the main LLRF BMB (backbone mother board). The MB provides communication with the outside computer control system, programmable chip configuration, integration with other functional modules and power supply. The hardware implementation is here described and the used software for BER (bit-error-rate) testing of the multi-gigabit optical link. The measurement results are presented. The appendix contains a comparison between the available protocols of serial data transmission for FPGA technology. This paper is a partial contribution to the next version of the SIMCON system which is expected to be released this year. The SIMCON, ver 3.0 will contain 8 channels and multi-gigabit optical transmission capability. It will be a fully modular construction.

  3. The ASCI Network for SC 2000: Gigabyte Per Second Networking; TOPICAL

    International Nuclear Information System (INIS)

    PRATT, THOMAS J.; NAEGLE, JOHN H.; MARTINEZ JR., LUIS G.; HU, TAN CHANG; MILLER, MARC M.; BARNABY, MARTY L.; ADAMS, ROGER L.; KLAUS, EDWARD J.

    2001-01-01

    This document highlights the Discom's Distance computing and communication team activities at the 2000 Supercomputing conference in Dallas Texas. This conference is sponsored by the IEEE and ACM. Sandia's participation in the conference has now spanned a decade, for the last five years Sandia National Laboratories, Los Alamos National Lab and Lawrence Livermore National Lab have come together at the conference under the DOE's ASCI, Accelerated Strategic Computing Initiatives, Program rubric to demonstrate ASCI's emerging capabilities in computational science and our combined expertise in high performance computer science and communication networking developments within the program. At SC 2000, DISCOM demonstrated an infrastructure. DISCOM2 uses this forum to demonstrate and focus communication and pre-standard implementation of 10 Gigabit Ethernet, the first gigabyte per second data IP network transfer application, and VPN technology that enabled a remote Distributed Resource Management tools demonstration. Additionally a national OC48 POS network was constructed to support applications running between the show floor and home facilities. This network created the opportunity to test PSE's Parallel File Transfer Protocol (PFTP) across a network that had similar speed and distances as the then proposed DISCOM WAN. The SCINET SC2000 showcased wireless networking and the networking team had the opportunity to explore this emerging technology while on the booth. This paper documents those accomplishments, discusses the details of their convention exhibit floor. We also supported the production networking needs of the implementation, and describes how these demonstrations supports DISCOM overall strategies in high performance computing networking

  4. Impedance Discontinuity Reduction Between High-Speed Differential Connectors and PCB Interfaces

    Science.gov (United States)

    Navidi, Sal; Agdinaoay, Rodell; Walter, Keith

    2013-01-01

    High-speed serial communication (i.e., Gigabit Ethernet) requires differential transmission and controlled impedances. Impedance control is essential throughout cabling, connector, and circuit board construction. An impedance discontinuity arises at the interface of a high-speed quadrax and twinax connectors and the attached printed circuit board (PCB). This discontinuity usually is lower impedance since the relative dielectric constant of the board is higher (i.e., polyimide approx. = 4) than the connector (Teflon approx. = 2.25). The discontinuity can be observed in transmit or receive eye diagrams, and can reduce the effective link margin of serial data networks. High-speed serial data network transmission improvements can be made at the connector-to-board interfaces as well as improving differential via hole impedances. The impedance discontinuity was improved by 10 percent by drilling a 20-mil (approx. = 0.5-mm) hole in between the pin of a differential connector spaced 55 mils (approx. = 1.4 mm) apart as it is attached to the PCB. The effective dielectric constant of the board can be lowered by drilling holes into the board material between the differential lines in a quadrax or twinax connector attachment points. The differential impedance is inversely proportional to the square root of the relative dielectric constant. This increases the differential impedance and thus reduces the above described impedance discontinuity. The differential via hole impedance can also be increased in the same manner. This technique can be extended to multiple smaller drilled holes as well as tapered holes (i.e., big in the middle followed by smaller ones diagonally).

  5. New COMPASS DAQ

    Energy Technology Data Exchange (ETDEWEB)

    Bai, Yunpeng; Konorov, Igor

    2015-07-01

    This contribution focuses on the deployment and first results of the new FPGA-based data acquisition system (DAQ) of the COMPASS experiment. Since 2002, the number of channels increased to approximately 300000, trigger rate increased to 30 kHz; the average event size remained roughly 35 kB. In order to handle the increased data rates, the new DAQ system with custom FPGA based data handling cards (DHC) had been decided to replace the event building network. The DHCs are equipped with 16 high speed serial links, 2GB of DDR3 memory with bandwidth of 6 GB/s, Gigabit Ethernet connection, and COMPASS Trigger Control System. It uses two different firmware versions: multiplexer and switch. The multiplexer DHC can combine 15 incoming links into one outgoing, whereas the switch combines 8 data streams from multiplexers and using information from look-up table sends the full events to the readout engine servers equipped by spillbuffer PCI-Express cards that receive the data. Both types of DHC can buffer data which allows to distribute the load over the cycle of accelerator. For the purposes of configuration, run control, and monitoring, software tools are developed. Communication between processes in the system is implemented using the DIM library. The DAQ is fully configurable from the web interface. New DAQ system has been deployed for the pilot run starting from the September 2014. In the poster, the preliminary performance and stability results of the new DAQ are presented and compared with the original system in more detail.

  6. The 40 MHz trigger-less DAQ for the LHCb Upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Campora Perez, D.H. [INFN CNAF, Bologna (Italy); Falabella, A., E-mail: antonio.falabella@cnaf.infn.it [CERN, Geneva (Switzerland); Galli, D. [INFN Sezione di Bologna, Bologna (Italy); Università Bologna, Bologna (Italy); Giacomini, F. [CERN, Geneva (Switzerland); Gligorov, V. [INFN CNAF, Bologna (Italy); Manzali, M. [Università Bologna, Bologna (Italy); Università Ferrara, Ferrara (Italy); Marconi, U. [INFN Sezione di Bologna, Bologna (Italy); Neufeld, N.; Otto, A. [INFN CNAF, Bologna (Italy); Pisani, F. [INFN CNAF, Bologna (Italy); Università la Sapienza, Roma (Italy); Vagnoni, V.M. [INFN Sezione di Bologna, Bologna (Italy)

    2016-07-11

    The LHCb experiment will undergo a major upgrade during the second long shutdown (2018–2019), aiming to let LHCb collect an order of magnitude more data with respect to Run 1 and Run 2. The maximum readout rate of 1 MHz is the main limitation of the present LHCb trigger. The upgraded detector, apart from major detector upgrades, foresees a full read-out, running at the LHC bunch crossing frequency of 40 MHz, using an entirely software based trigger. A new high-throughput PCIe Generation 3 based read-out board, named PCIe40, has been designed for this purpose. The read-out board will allow an efficient and cost-effective implementation of the DAQ system by means of high-speed PC networks. The network-based DAQ system reads data fragments, performs the event building, and transports events to the High-Level Trigger at an estimated aggregate rate of about 32 Tbit/s. Different architecture for the DAQ can be implemented, such as push, pull and traffic shaping with barrel-shifter. Possible technology candidates for the foreseen event-builder under study are InfiniBand and Gigabit Ethernet. In order to define the best implementation of the event-builder we are performing tests of the event-builder on different platforms with different technologies. For testing we are using an event-builder evaluator, which consists of a flexible software implementation, to be used on small size test beds as well as on HPC scale facilities. The architecture of DAQ system and up to date performance results will be presented.

  7. Adventures in the evolution of a high-bandwidth network for central servers

    International Nuclear Information System (INIS)

    Swartz, K.L.; Cottrell, L.; Dart, M.

    1994-08-01

    In a small network, clients and servers may all be connected to a single Ethernet without significant performance concerns. As the number of clients on a network grows, the necessity of splitting the network into multiple sub-networks, each with a manageable number of clients, becomes clear. Less obvious is what to do with the servers. Group file servers on subnets and multihomed servers offer only partial solutions -- many other types of servers do not lend themselves to a decentralized model, and tend to collect on another, well-connected but overloaded Ethernet. The higher speed of FDDI seems to offer an easy solution, but in practice both expense and interoperability problems render FDDI a poor choice. Ethernet switches appear to permit cheaper and more reliable networking to the servers while providing an aggregate network bandwidth greater than a simple Ethernet. This paper studies the evolution of the server networks at SLAC. Difficulties encountered in the deployment of FDDI are described, as are the tools and techniques used to characterize the traffic patterns on the server network. Performance of Ethernet, FDDI, and switched Ethernet networks is analyzed, as are reliability and maintainability issues for these alternatives. The motivations for re-designing the SLAC general server network to use a switched Ethernet instead of FDDI are described, as are the reasons for choosing FDDI for the farm and firewall networks at SLAC. Guidelines are developed which may help in making this choice for other networks

  8. YottaYotta announces new world record set for TCP disk-to-disk bulk transfer

    CERN Document Server

    2002-01-01

    The Yottabyte NetStorage(TM) Company, today announced a new world record for TCP disk-to-disk data transfer using the company's NetStorager(R) System. The record-breaking demonstration transferred 5 terabytes of data between Chicago, Il. to Vancouver, BC and Ottawa, ON, at a sustained average throughput of 11.1 gigabits per second. Peak throughput exceeded 11.6 gigabits per second, more than 15-times faster than previous records for TCP transfer from disk-to-disk (1 page).

  9. Performance Comparison of 112-Gb/s DMT, Nyquist PAM4, and Partial-Response PAM4 for Future 5G Ethernet-Based Fronthaul Architecture

    Science.gov (United States)

    Eiselt, Nicklas; Muench, Daniel; Dochhan, Annika; Griesser, Helmut; Eiselt, Michael; Olmos, Juan Jose Vegas; Monroy, Idelfonso Tafur; Elbers, Joerg-Peter

    2018-05-01

    For a future 5G Ethernet-based fronthaul architecture, 100G trunk lines of a transmission distance up to 10 km standard single mode fiber (SSMF) in combination with cheap grey optics to daisy chain cell site network interfaces are a promising cost- and power-efficient solution. For such a scenario, different intensity modulation and direct detect (IMDD) Formats at a data rate of 112 Gb/s, namely Nyquist four-level pulse amplitude modulation (PAM4), discrete multi-tone Transmission (DMT) and partial-response (PR) PAM4 are experimentally investigated, using a low-cost electro-absorption modulated laser (EML), a 25G driver and current state-of-the-art high Speed 84 GS/s CMOS digital-to-analog converter (DAC) and analog-to-digital converter (ADC) test chips. Each modulation Format is optimized independently for the desired scenario and their digital signal processing (DSP) requirements are investigated. The performance of Nyquist PAM4 and PR PAM4 depend very much on the efficiency of pre- and post-equalization. We show the necessity for at least 11 FFE-taps for pre-emphasis and up to 41 FFE coefficients at the receiver side. In addition, PR PAM4 requires an MLSE with four states to decode the signal back to a PAM4 signal. On the contrary, bit- and power-loading (BL, PL) is crucial for DMT and an FFT length of at least 512 is necessary. With optimized parameters, all Modulation formats result in a very similar performances, demonstrating a transmission distance of up to 10 km over SSMF with bit error rates (BERs) below a FEC threshold of 4.4E-3, allowing error free transmission.

  10. SAL and PVS Model of TTEthernet Synchronization Protocol

    Data.gov (United States)

    National Aeronautics and Space Administration — Timed-Triggered Ethernet (or TTEthernet)is a communication infrastructure that enables the use of Ethernet in real-time, distributed systems. TTEthernet is...

  11. Wired and wireless convergent extended-reach optical access network using direct-detection of all-optical OFDM super-channel signal.

    Science.gov (United States)

    Chow, C W; Yeh, C H; Sung, J Y; Hsu, C W

    2014-12-15

    We propose and demonstrate the feasibility of using all-optical orthogonal frequency division multiplexing (AO-OFDM) for the convergent optical wired and wireless access networks. AO-OFDM relies on all-optically generated orthogonal subcarriers; hence, high data rate (> 100 Gb/s) can be easily achieved without hitting the speed limit of electronic digital-to-analog and analog-to-digital converters (DAC/ADC). A proof-of-concept convergent access network using AO-OFDM super-channel (SC) is demonstrated supporting 40 - 100 Gb/s wired and gigabit/s 100 GHz millimeter-wave (MMW) ROF transmissions.

  12. Performance in wireless networks and industrial wireless networks on control processes in real time under industrial environments

    Directory of Open Access Journals (Sweden)

    Juan F. Monsalve-Posada

    2015-01-01

    Full Text Available The growing use of Ethernet networks on the industrial automation pyramid has led many companies to develop new devices to operate in requirements of this level, nowadays it is called Industrial Ethernet network, on the market there are various sensors and actuators to industrial scale equipped with this technology, many of these devices are very expensive. In this paper, the performance of two wireless networks is evaluated, the first network has conventional Ethernet devices, and the second network has Industrial Ethernet devices. For the process we vary four parameters such as distance, number of bytes, the signal to noise ratio, and the packet error rate, and then we measure delays and compare with metric statistics results, Box Plot graphs were used for the analysis. Finally, we conclude that under the parameters and conditions tested, wireless networks can serve as a communication system in control applications with allowable delays of up to 50 ms, in addition, the results show a better performance of Industrial Ethernet networks over conventional networks, with differences in the RTT of milliseconds. Therefore, it is recommended to establish what risk is for the process to control these delays to determine if the equipment conventional applies, since under certain features like humidity and temperature can operate properly for a considerable time and at lower cost than devices to Industrial Ethernet.

  13. Photonics applications in high-capacity data link terminals

    Science.gov (United States)

    Shi, Zan; Foshee, James J.

    2001-12-01

    Radio systems and, in particular, RF data link systems are evolving toward progressively more bandwidth and higher data rates. For many military RF data link applications the data transfer requirements exceed one Gigabit per second. Airborne collectors need to transfer sensor information and other large data files to ground locations and other airborne terminals, including the rel time transfer of files. It is a challenge to the system designer to provide a system design, which meets the RF link budget requirements for a one Gigabit per second data link; and there is a corresponding challenge in the development of the terminal architecture and hardware. The utilization of photonic circuitry and devices as a part of the terminal design offers the designer some alternatives to the conventional RF hardware design within the radio. Areas of consideration for the implementation of photonic technology include Gigabit per second baseband data interfaces with fiber along with the associated clocking rates and extending these Gigabit data rates into the radio for optical processing technology; optical interconnections within the individual circuit boards in the radio; and optical backplanes to allow the transfer of not only the Gigabit per second data rates and high speed clocks but other RF signals within the radio. True time delay using photonics in phased array antennas has been demonstrated and is an alternative to the conventional phase shifter designs used in phased array antennas, and remoting of phased array antennas from the terminal electronics in the Ku and Ka frequency bands using fiber optics as the carrier to minimize the RF losses, negate the use of the conventional waveguides, and allow the terminal equipment to be located with other electronic equipment in the aircraft suitable for controlled environment, ready access, and maintenance. The various photonics design alternatives will be discussed including specific photonic design approaches. Packaging

  14. Gigabit Per Second Data Processing

    Data.gov (United States)

    National Aeronautics and Space Administration — Solve the existing problem of handling the on-board, real time, memory intensive processing of the Gb/s data stream of the scientific instrument. Examine and define...

  15. Demonstration of a Robust Sensor System for Remote Condition Monitoring of Heat-Distribution System Manholes

    Science.gov (United States)

    2016-02-01

    The HTP -900RE is capable of transferring Ethernet data over a distance of up to 15 miles with a clear line of sight, and is programmable through a...may be connected to either side of the circuit. The RTU is connected to the FGR- HTP -900-RE radio by a short Ethernet patch cable. The radio is...operations contractor was able to manually query a test pit and read temperatures from through the wireless Ethernet RTU. ERDC/CERL TR-16-2 20 2.3.2

  16. Network protocol 'EPAP'; Network protokoru 'EPAP'

    Energy Technology Data Exchange (ETDEWEB)

    Kobori, T.; Fujita, F.; Iwamoto, S. [Fuji Electric Co. Ltd., Toyo (Japan)

    2000-10-10

    The Ethernet, a standard of information networks, has begun to be applied to the control local area network (LAN). To apply the Ethernet to the field level, Fuji Electric has newly developed the communication protocol 'Ethernet precision access protocol (EPAP)' in which a command/response method is structured on the user datagram protocol (UDP) to realize real time and high reliability. Further, we have implemented the EPAP on the bus interface module of the open PIO. This paper outlines the EPAP and its implementation. (author)

  17. Design and implementation of projects with Xilinx Zynq FPGA: a practical case

    Science.gov (United States)

    Travaglini, R.; D'Antone, I.; Meneghini, S.; Rignanese, L.; Zuffa, M.

    The main advantage when using FPGAs with embedded processors is the availability of additional several high-performance resources in the same physical device. Moreover, the FPGA programmability allows for connect custom peripherals. Xilinx have designed a programmable device named Zynq-7000 (simply called Zynq in the following), which integrates programmable logic (identical to the other Xilinx "serie 7" devices) with a System on Chip (SOC) based on two embedded ARM processors. Since both parts are deeply connected, the designers benefit from performance of hardware SOC and flexibility of programmability as well. In this paper a design developed by the Electronic Design Department at the Bologna Division of INFN will be presented as a practical case of project based on Zynq device. It is developed by using a commercial board called ZedBoard hosting a FMC mezzanine with a 12-bit 500 MS/s ADC. The Zynq FPGA on the ZedBoard receives digital outputs from the ADC and send them to the acquisition PC, after proper formatting, through a Gigabit Ethernet link. The major focus of the paper will be about the methodology to develop a Zynq-based design with the Xilinx Vivado software, enlightening how to configure the SOC and connect it with the programmable logic. Firmware design techniques will be presented: in particular both VHDL and IP core based strategies will be discussed. Further, the procedure to develop software for the embedded processor will be presented. Finally, some debugging tools, like the embedded Logic Analyzer, will be shown. Advantages and disadvantages with respect to adopting FPGA without embedded processors will be discussed.

  18. Long distance fast data transfer experiments for the ITER Remote Experiment

    Energy Technology Data Exchange (ETDEWEB)

    Yamanaka, Kenjiro, E-mail: yamanaka@nii.ac.jp [National Institute of Informatics, 2-1-2 Hitotsubashi, Chiyoda-ku, Tokyo (Japan); The Graduate University for Advanced Studies (SOKENDAI), Shonan Village, Hayama, Kanagawa (Japan); Nakanishi, Hideya [National Institute of Fusion Science, 322-6 Orochi, Toki, Gifu (Japan); The Graduate University for Advanced Studies (SOKENDAI), Shonan Village, Hayama, Kanagawa (Japan); Ozeki, Takahisa [Japan Atomic Energy Agency, Obuchi-Omotedate 2-166, Rokkasho, Kamikita, Aomori (Japan); Abe, Shunji; Urushidani, Shigeo [National Institute of Informatics, 2-1-2 Hitotsubashi, Chiyoda-ku, Tokyo (Japan); The Graduate University for Advanced Studies (SOKENDAI), Shonan Village, Hayama, Kanagawa (Japan); Yamamoto, Takashi [National Institute of Fusion Science, 322-6 Orochi, Toki, Gifu (Japan); Ohtsu, Hideo [Japan Atomic Energy Agency, Obuchi-Omotedate 2-166, Rokkasho, Kamikita, Aomori (Japan); Nakajima, Noriyoshi [National Institute of Fusion Science, 322-6 Orochi, Toki, Gifu (Japan)

    2016-11-15

    Highlights: • This paper presents fast data transfer experiments using packet pacing and mmcftp and results. • An upgrade plan of Japanese Academic Network SINET is also described. • To send the huge amount of data from ITER to the ITER Remote Experiment Center (REC), effective transfer method and super high-speed international network are required. • This paper presents a progress of the investigation for fast transfer method. - Abstract: Developing effective and fast data transfer system for the huge amount data between Europe and Japan is a critical issue for the ITER Remote Experimentation Center (REC). To implement the system, effective data transfer methods and wide bandwidth international network are required. This paper describes results of data transfer experiments. We have evaluated two data transfer methods: Packet Pacing and MMCFTP. By using Packet Pacing and 2.4 Gbps line, we achieved 2.2 Gbps data transfer from NIFS to IFERC. By using MMCFTP and 10 Gbps line, we achieved 2.5 Gbps data transfer from NIFS to Dublin, Ireland. Furthermore, by using MMCFTP and 100Gbps line, we successfully achieved the stable transmission of 1PB of data at approximately 84 Gbps, one of the world’s fastest transmission speeds. This paper also describes the upgrade plan of SINET (a Japanese academic backbone network), which is used for ITER and REC communications. SINET will be upgraded to the network based on 100-Gigabit Ethernet technology in April 2016. Furthermore, direct lines of 20 Gbps (10 Gbps × 2) between Japan and Europe will be introduced. These direct lines will reduce latency between Europe and Japan and will realize higher speed data transfer.

  19. Coexistência de redes de acesso de nova geração

    OpenAIRE

    Viana, Diogo Fernando Rebelo

    2013-01-01

    Nos dias que correm assiste-se a um contínuo crescimento do consumo de conteúdos que exigem uma maior largura banda disponível para cada utilizador o que leva ao investimento, por parte dos operadores de telecomunicações, na procura de novas soluções no domínio ótico. Desta procura surgiram as redes óticas passivas (PON: Passive Optical Network) que se iniciaram com as G-PON (Gigabit PON), que mais tarde evoluíram para as XG-PON (10-Gigabit PON) e que atualmente se encontram em fase de migraç...

  20. Summary of Trends

    Indian Academy of Sciences (India)

    First page Back Continue Last page Overview Graphics. Summary of Trends. Optical Ethernet: Direct Ethernet connectivity to businesses through optical fiber. Automation of network infrastructure: Cross-connects for interconnections; Intelligence through software for OA&M. New “data-centric” protection mechanisms ...

  1. Practical network design techniques a complete guide for WANs and LANs

    CERN Document Server

    Held, Gilbert

    2004-01-01

    This new edition has two parts. The first part focuses on wide area networks; the second, which is entirely new, focuses on local area networks. Because Ethernet emerged victorious in the LAN war, the second section pays particular attention to Ethernet design and performance characteristics.

  2. Switch configuration for migration to optical fiber network

    Science.gov (United States)

    Zobrist, George W.

    1993-01-01

    The purpose is to investigate the migration of an Ethernet LAN segment to fiber optics. At the present time it is proposed to support a Fiber Distributed Data Interface (FDDI) backbone and to upgrade the VAX cluster to fiber optic interface. Possibly some workstations will have an FDDI interface. The remaining stations on the Ethernet LAN will be segmented. The rationale for migrating from the present Ethernet configuration to a fiber optic backbone is due to the increase in the number of workstations and the movement of applications to a windowing environment, extensive document transfers, and compute intensive applications.

  3. High Availability of RAPIENET

    International Nuclear Information System (INIS)

    Yoon, G.; Oh, J. S.; Kwon, D. H.; Kwon, S. C.; Park, Y. O.

    2012-01-01

    Many industrial customers are no longer satisfies with conventional Ethernet-based communications. They require a more accurate, more flexible, and more reliable technology for their control and measurement systems. Hence, Ethernet-based high-availability networks are becoming an important topic in the control and measurement fields. In this paper, we introduce a new redundant programmable logic controller (PLC) concept, based on real-time automation protocols for industrial Ethernet (RAPIEnet). RAPIEnet has intrinsic redundancy built into its network topology, with hardware-based recovery time. We define a redundant PLC system switching model and demonstrate its performance, including RAPIEnet recovery time

  4. Transport Network Technologies – Study and Testing

    DEFF Research Database (Denmark)

    Bozorgebrahimi, K.; Channegowda, M.; Colmenero, A.

    Following on from the theoretical research into Carrier Class Transport Network Technologies (CCTNTs) documented in DJ1.1.1, this report describes the extensive testing performed by JRA1 Task 1. The tests covered EoMPLS, Ethernet OAM, Synchronous Ethernet, PBB-TE, MPLS-TP, OTN and GMPLS...

  5. Development of an EtherCAT enabled digital servo controller for the Green Bank Telescope

    Science.gov (United States)

    Whiteis, Peter G.; Mello, Melinda J.

    2012-09-01

    EtherCAT (Ethernet for Control Automation Technology) is gaining wide spread popularity in the automation industry as a real time field bus based on low cost, Ethernet hardware. EtherCAT maximizes use of 100Mbps Ethernet hardware by using a collision free ring topology, efficient Ethernet frame utilization (> 95%), and data exchange "on the fly". These characteristics enable EtherCAT to achieve Master to Slave node data exchange rates of > 1000 Hz. The Green Bank Telescope, commissioned in 2000, utilizes an analog control system for motion control of 8 elevation and 16 azimuth motors. This architecture, while sufficient for observations at frequencies up to 50GHz, has significant limitations for the current scientific goals of observing at 115GHz. Accordingly, the Green Bank staff has embarked on a servo upgrade project to develop a digital servo system which accommodates development and implementation of advanced control algorithms. This paper describes how the new control system requirements, use of existing infrastructure and budget constraints led us to define a distributed motion control architecture where EtherCAT real-time Ethernet was selected as the communication bus. Finally, design details are provided that describe how NRAO developed a custom EtherCAT-enabled motor controller interface for the GBT's legacy motor drives in order to provide technical benefits and flexibility not available in commercial products.

  6. Developing a New HSR Switching Node (SwitchBox for Improving Traffic Performance in HSR Networks

    Directory of Open Access Journals (Sweden)

    Nguyen Xuan Tien

    2016-01-01

    Full Text Available High availability is crucial for industrial Ethernet networks as well as Ethernet-based control systems such as automation networks and substation automation systems (SAS. Since standard Ethernet does not support fault tolerance capability, the high availability of Ethernet networks can be increased by using redundancy protocols. Various redundancy protocols for Ethernet networks have been developed and standardized, such as rapid spanning tree protocol (RSTP, media redundancy protocol (MRP, parallel redundancy protocol (PRP, high-availability seamless redundancy (HSR and others. RSTP and MRP have switchover delay drawbacks. PRP provides zero recovery time, but requires a duplicate network infrastructure. HSR operation is similar to PRP, but HSR uses a single network. However, the standard HSR protocol is mainly applied to ring-based topologies and generates excessively unnecessary redundant traffic in the network. In this paper, we develop a new switching node for the HSR protocol, called SwitchBox, which is used in HSR networks in order to support any network topology and significantly reduce redundant network traffic, including unicast, multicast and broadcast traffic, compared with standard HSR. By using the SwitchBox, HSR not only provides seamless communications with zero switchover time in case of failure, but it is also easily applied to any network topology and significantly reduces unnecessary redundant traffic in HSR networks.

  7. Gigabit network technology. Final technical report

    Energy Technology Data Exchange (ETDEWEB)

    Davenport, C.M.C. [ed.

    1996-10-01

    Current digital networks are evolving toward distributed multimedia with a wide variety of applications with individual data rates ranging from kb/sec to tens and hundreds of Mb/sec. Link speed requirements are pushing into the Gb/sec range and beyond the envelop of electronic networking capabilities. There is a vast amount of untapped bandwidth available in the low-attenuation communication bands of an optical fiber. The capacity in one fiber thread is enough to carry more than two thousand times as much information as all the current radio and microwave frequencies. And while fiber optics has replaced copper wire as the transmission medium of choice, the communication capacity of conventional fiber optic networks is ultimately limited by electronic processing speeds.

  8. LAMBDA 2M GaAs—A multi-megapixel hard X-ray detector for synchrotrons

    Science.gov (United States)

    Pennicard, D.; Smoljanin, S.; Pithan, F.; Sarajlic, M.; Rothkirch, A.; Yu, Y.; Liermann, H. P.; Morgenroth, W.; Winkler, B.; Jenei, Z.; Stawitz, H.; Becker, J.; Graafsma, H.

    2018-01-01

    Synchrotrons can provide very intense and focused X-ray beams, which can be used to study the structure of matter down to the atomic scale. In many experiments, the quality of the results depends strongly on detector performance; in particular, experiments studying dynamics of samples require fast, sensitive X-ray detectors. "LAMBDA" is a photon-counting hybrid pixel detector system for experiments at synchrotrons, based on the Medipix3 readout chip. Its main features are a combination of comparatively small pixel size (55 μm), high readout speed at up to 2000 frames per second with no time gap between images, a large tileable module design, and compatibility with high-Z sensors for efficient detection of higher X-ray energies. A large LAMBDA system for hard X-ray detection has been built using Cr-compensated GaAs as a sensor material. The system is composed of 6 GaAs tiles, each of 768 by 512 pixels, giving a system with approximately 2 megapixels and an area of 8.5 by 8.5 cm2. While the sensor uniformity of GaAs is not as high as that of silicon, its behaviour is stable over time, and it is possible to correct nonuniformities effectively by postprocessing of images. By using multiple 10 Gigabit Ethernet data links, the system can be read out at the full speed of 2000 frames per second. The system has been used in hard X-ray diffraction experiments studying the structure of samples under extreme pressure in diamond anvil cells. These experiments can provide insight into geological processes. Thanks to the combination of high speed readout, large area and high sensitivity to hard X-rays, it is possible to obtain previously unattainable information in these experiments about atomic-scale structure on a millisecond timescale during rapid changes of pressure or temperature.

  9. A real-time data transmission method based on Linux for physical experimental readout systems

    International Nuclear Information System (INIS)

    Cao Ping; Song Kezhu; Yang Junfeng

    2012-01-01

    In a typical physical experimental instrument, such as a fusion or particle physical application, the readout system generally implements an interface between the data acquisition (DAQ) system and the front-end electronics (FEE). The key task of a readout system is to read, pack, and forward the data from the FEE to the back-end data concentration center in real time. To guarantee real-time performance, the VxWorks operating system (OS) is widely used in readout systems. However, VxWorks is not an open-source OS, which gives it has many disadvantages. With the development of multi-core processor and new scheduling algorithm, Linux OS exhibits performance in real-time applications similar to that of VxWorks. It has been successfully used even for some hard real-time systems. Discussions and evaluations of real-time Linux solutions for a possible replacement of VxWorks arise naturally. In this paper, a real-time transmission method based on Linux is introduced. To reduce the number of transfer cycles for large amounts of data, a large block of contiguous memory buffer for DMA transfer is allocated by modifying the Linux Kernel (version 2.6) source code slightly. To increase the throughput for network transmission, the user software is designed into formation of parallelism. To achieve high performance in real-time data transfer from hardware to software, mapping techniques must be used to avoid unnecessary data copying. A simplified readout system is implemented with 4 readout modules in a PXI crate. This system can support up to 48 MB/s data throughput from the front-end hardware to the back-end concentration center through a Gigabit Ethernet connection. There are no restrictions on the use of this method, hardware or software, which means that it can be easily migrated to other interrupt related applications.

  10. Trends in Optical Networks

    Indian Academy of Sciences (India)

    Integrated TDM/IP Service Network: Built using next-generation SDH · Case 2: ISP Backbone over SONET/SDH · Solution for the PoPs · Solution for the Gateway site · Case 3: Ethernet Leased Line Services over Existing Infrastructure · Transport for Mobile Voice/Data Networks · Functions needed for mapping Ethernet to ...

  11. Comprehensive Investigation of White Matter Tracts in Professional Chess Players and Relation to Expertise: Region of Interest and DMRI Connectometry.

    Science.gov (United States)

    Mayeli, Mahsa; Rahmani, Farzaneh; Aarabi, Mohammad Hadi

    2018-01-01

    Purpose: Expertise is the product of training. Few studies have used functional connectivity or conventional diffusometric methods to identify neural underpinnings of chess expertise. Diffusometric variables of white matter might reflect these adaptive changes, along with changes in structural connectivity, which is a sensitive measure of microstructural changes. Method: Diffusometric variables of 29 professional chess players and 29 age-sex matched controls were extracted for white matter regions based on John Hopkin's Mori white matter atlas and partially correlated against professional training time and level of chess proficiency. Diffusion MRI connectometry was implemented to identify changes in structural connectivity in professional players compared to novices. Result: Compared to novices, higher planar anisotropy (CP) was observed in inferior longitudinal fasciculus (ILF), superior longitudinal fasciculus (SLF) and cingulate gyrus, in professional chess players, which correlated with higher RPM score in this group. Higher fractional anisotropy (FA) was observed in ILF, uncinate fasciculus (UF) and hippocampus and correlated with better scores in Raven's progressive matrices (RPM) score and longer duration of chess training in professional players. Consistently, radial diffusivity in bilateral IFOF, bilateral ILF and bilateral SLF was inversely correlated with level of training in professional players. DMRI connectometry analysis identified increased connectivity in bilateral UF, bilateral IFOF, bilateral cingulum, and corpus callosum in chess player's compared to controls. Conclusion: Structural connectivity of major associational subcortical white matter fibers are increased in professional chess players. FA and CP of ILF, SLF and UF directly correlates with duration of professional training and RPM score, in professional chess players.

  12. White matter connectivity and Internet gaming disorder

    Science.gov (United States)

    Jeong, Bum Seok; Han, Doug Hyun; Kim, Sun Mi; Lee, Sang Won; Renshaw, Perry F.

    2017-01-01

    Internet use and on-line game play stimulate corticostriatal-limbic circuitry in both healthy subjects and subjects with Internet gaming disorder (IGD). We hypothesized that increased fractional anisotropy (FA) with decreased radial diffusivity (RD) would be observed in IGD subjects, compared with healthy control subjects, and that these white matter indices would be associated with clinical variables including duration of illness and executive function. We screened 181 male patients in order to recruit a large number (n = 58) of IGD subjects without psychiatric co-morbidity as well as 26 male healthy comparison subjects. Multiple diffusion-weighted images were acquired using a 3.0 Tesla magnetic resonance imaging scanner. Tract-based spatial statistics was applied to compare group differences in diffusion tensor imaging (DTI) metrics between IGD and healthy comparison subjects. IGD subjects had increased FA values within forceps minor, right anterior thalamic radiation, right corticospinal tract, right inferior longitudinal fasciculus, right cingulum to hippocampus and right inferior fronto-occipital fasciculus (IFOF) as well as parallel decreases in RD value within forceps minor, right anterior thalamic radiation and IFOF relative to healthy control subjects. In addition, the duration of illness in IGD subjects was positively correlated with the FA values (integrity of white matter fibers) and negatively correlated with RD scores (diffusivity of axonal density) of whole brain white matter. In IGD subjects without psychiatric co-morbidity, our DTI results suggest that increased myelination (increased FA and decreased RD values) in right-sided frontal fiber tracts may be the result of extended game play. PMID:25899390

  13. ETHERNET соединение между контролером SIMATIC S7-200 и SCADA системной WinCC с использованием технологии ОРС

    Directory of Open Access Journals (Sweden)

    В. М. Левинский

    2014-12-01

    Full Text Available Показан пример практической реализации взаимосвязи контроллера SIMATIC S7-200 и SCADA системы WinCC по сети ETHERNET с использованием NET OPC.

  14. Tools for building virtual laboratories

    International Nuclear Information System (INIS)

    Agarwal, Debora; Johnston, William E.; Loken, Stewart; Tierney, Brian

    1996-01-01

    There is increasing interest in making unique research facilities facilities accessible on the Internet. Computer systems, scientific databases and experimental apparatus can be used by international collaborations of scientists using high-speed networks and advanced software tools to support collaboration. We are building tools including video conferencing and electronic white boards that are being used to create examples of virtual laboratories. This paper describes two pilot projects which provide testbeds for the tools. The first is a virtual laboratory project providing remote access to LBNL's Advanced Light Source. The second is the Multidimensional Applications and Gigabit internet work Consortium (MAGIC) testbed which has been established to develop a very high-speed, wide-are network to deliver realtime data at gigabit-per-second rates. (author)

  15. Optical Network Virtualisation Using Multitechnology Monitoring and SDN-Enabled Optical Transceiver

    Science.gov (United States)

    Ou, Yanni; Davis, Matthew; Aguado, Alejandro; Meng, Fanchao; Nejabati, Reza; Simeonidou, Dimitra

    2018-05-01

    We introduce the real-time multi-technology transport layer monitoring to facilitate the coordinated virtualisation of optical and Ethernet networks supported by optical virtualise-able transceivers (V-BVT). A monitoring and network resource configuration scheme is proposed to include the hardware monitoring in both Ethernet and Optical layers. The scheme depicts the data and control interactions among multiple network layers under the software defined network (SDN) background, as well as the application that analyses the monitored data obtained from the database. We also present a re-configuration algorithm to adaptively modify the composition of virtual optical networks based on two criteria. The proposed monitoring scheme is experimentally demonstrated with OpenFlow (OF) extensions for a holistic (re-)configuration across both layers in Ethernet switches and V-BVTs.

  16. Co-design for an SoC embedded network controller

    Institute of Scientific and Technical Information of China (English)

    2006-01-01

    With the development of Ethernet systems and the growing capacity of modern silicon technology, embedded communication networks are playing an increasingly important role in embedded and safety critical systems. Hardware/software co-design is a methodology for solving design problems in processor based embedded systems. In this work, we implemented a new 1-cycle pipeline microprocessor and a fast Ethernet transceiver and established a low cost, high performance embedded network controller, and designed a TCP/IP stack to access the Internet. We discussed the hardware/software architecture in the forepart, and then the whole system-on-a-chip on Altera Stratix EP1S25F780C6 device. Using the FPGA environment and SmartBit tester, we tested the system's throughput. Our simulation results showed that the maximum throughput of Ethernet packets is up to 7 Mbps, that of UDP packets is up to 5.8 Mbps, and that of TCP packets is up to 3.4 Mbps, which showed that this embedded system can easily transmit basic voice and video signals through Ethernet, and that using only one chip can realize that many electronic devices access to the Internet directly and get high performance.

  17. ANÁLISE DE DESEMPENHO EM REDES IEEE 802.3 APLICADO PARA SISTEMA DE TEMPO REAL

    Directory of Open Access Journals (Sweden)

    Ricardo Alexsandro de Medeiros Valentim

    2011-06-01

    Full Text Available A tecnologia Ethernet domina o mercado de rede local de computadores. No entanto, não foi estabelecida como uma tecnologia para automação industrial, onde o determinismo procura os requisitos com um desempenho de tempo real. Muitas soluções têm sido propostas para resolver o problema do determinismo não, que se baseiam principalmente no TDMA (acesso múltiplo por divisão de tempo, passagem de token e mestre-escravo. É neste contexto que este trabalho é realizado, através de medidas de desempenho em redes de comunicação que utilizam o padrão IEEE 802.3, observando o comportamento destas redes, quando submetidos a diferentes cenários de sobrecarga. Para isso, as variações foram aprovadas em ambiente de teste, que será baseado em Shared Ethernet (Hub, Ethernet e Ethernet Switch com prioridade (IEEE 802.1Q. Desta forma, é possível indicar quais os dispositivos analisados pelos testes de desempenho demonstrado um comportamento mais adequado para suportar as aplicações com requisitos de tempo real.

  18. Real-time flight test data distribution and display

    Science.gov (United States)

    Nesel, Michael C.; Hammons, Kevin R.

    1988-01-01

    Enhancements to the real-time processing and display systems of the NASA Western Aeronautical Test Range are described. Display processing has been moved out of the telemetry and radar acquisition processing systems super-minicomputers into user/client interactive graphic workstations. Real-time data is provided to the workstations by way of Ethernet. Future enhancement plans include use of fiber optic cable to replace the Ethernet.

  19. A data acquisition and control system for high-speed gamma-ray tomography

    Science.gov (United States)

    Hjertaker, B. T.; Maad, R.; Schuster, E.; Almås, O. A.; Johansen, G. A.

    2008-09-01

    A data acquisition and control system (DACS) for high-speed gamma-ray tomography based on the USB (Universal Serial Bus) and Ethernet communication protocols has been designed and implemented. The high-speed gamma-ray tomograph comprises five 500 mCi 241Am gamma-ray sources, each at a principal energy of 59.5 keV, which corresponds to five detector modules, each consisting of 17 CdZnTe detectors. The DACS design is based on Microchip's PIC18F4550 and PIC18F4620 microcontrollers, which facilitates an USB 2.0 interface protocol and an Ethernet (IEEE 802.3) interface protocol, respectively. By implementing the USB- and Ethernet-based DACS, a sufficiently high data acquisition rate is obtained and no dedicated hardware installation is required for the data acquisition computer, assuming that it is already equipped with a standard USB and/or Ethernet port. The API (Application Programming Interface) for the DACS is founded on the National Instrument's LabVIEW® graphical development tool, which provides a simple and robust foundation for further application software developments for the tomograph. The data acquisition interval, i.e. the integration time, of the high-speed gamma-ray tomograph is user selectable and is a function of the statistical measurement accuracy required for the specific application. The bandwidth of the DACS is 85 kBytes s-1 for the USB communication protocol and 28 kBytes s-1 for the Ethernet protocol. When using the iterative least square technique reconstruction algorithm with a 1 ms integration time, the USB-based DACS provides an online image update rate of 38 Hz, i.e. 38 frames per second, whereas 31 Hz for the Ethernet-based DACS. The off-line image update rate (storage to disk) for the USB-based DACS is 278 Hz using a 1 ms integration time. Initial characterization of the high-speed gamma-ray tomograph using the DACS on polypropylene phantoms is presented in the paper.

  20. A data acquisition and control system for high-speed gamma-ray tomography

    International Nuclear Information System (INIS)

    Hjertaker, B T; Maad, R; Schuster, E; Almås, O A; Johansen, G A

    2008-01-01

    A data acquisition and control system (DACS) for high-speed gamma-ray tomography based on the USB (Universal Serial Bus) and Ethernet communication protocols has been designed and implemented. The high-speed gamma-ray tomograph comprises five 500 mCi 241 Am gamma-ray sources, each at a principal energy of 59.5 keV, which corresponds to five detector modules, each consisting of 17 CdZnTe detectors. The DACS design is based on Microchip's PIC18F4550 and PIC18F4620 microcontrollers, which facilitates an USB 2.0 interface protocol and an Ethernet (IEEE 802.3) interface protocol, respectively. By implementing the USB- and Ethernet-based DACS, a sufficiently high data acquisition rate is obtained and no dedicated hardware installation is required for the data acquisition computer, assuming that it is already equipped with a standard USB and/or Ethernet port. The API (Application Programming Interface) for the DACS is founded on the National Instrument's LabVIEW® graphical development tool, which provides a simple and robust foundation for further application software developments for the tomograph. The data acquisition interval, i.e. the integration time, of the high-speed gamma-ray tomograph is user selectable and is a function of the statistical measurement accuracy required for the specific application. The bandwidth of the DACS is 85 kBytes s −1 for the USB communication protocol and 28 kBytes s −1 for the Ethernet protocol. When using the iterative least square technique reconstruction algorithm with a 1 ms integration time, the USB-based DACS provides an online image update rate of 38 Hz, i.e. 38 frames per second, whereas 31 Hz for the Ethernet-based DACS. The off-line image update rate (storage to disk) for the USB-based DACS is 278 Hz using a 1 ms integration time. Initial characterization of the high-speed gamma-ray tomograph using the DACS on polypropylene phantoms is presented in the paper

  1. Ethernet Flow Monitoring with IPFIX

    NARCIS (Netherlands)

    Hofstede, R.J.; Drago, Idilio; Sperotto, Anna; Pras, Aiko

    The increasing amount of network traffic and the huge bandwidth needed to carry it requires managers to use scalable solutions to monitor their networks. Nowadays, flow-based techniques, such as Cisco’s NetFlow, provide aggregated network data and an overview of network activity at the IP layer.

  2. The value of diffusion tensor imaging in the differential diagnosis of subcortical ischemic vascular dementia and Alzheimer's disease in patients with only mild white matter alterations on T2-weighted images

    International Nuclear Information System (INIS)

    Fu, Jian-Liang; Zhang, Ting; Chang, Cheng; Zhang, Yu-Zhen; Li, Wen-Bin

    2012-01-01

    Background: Diffusion tensor imaging (DTI) is a form of functional magnetic resonance imaging (MRI) that allows examination of the microstructural integrity of white matter in the brain. Dementia is a neurodegenerative disease, and DTI can provide indirect insights of the microstructural characteristics of brains in individuals with different forms of dementia. Purpose: To evaluate the value of DTI in the diagnosis and differential diagnosis of patients with subcortical ischemic vascular dementia (SIVD) and Alzheimer's disease (AD). Material and Methods: The study included 40 patients (20 AD patients and 20 SIVD patients) and 20 normal controls (NC). After routine MRI and DTI, fractional anisotropy (FA) and apparent diffusion coefficient (ADC) values were measured and compared in regions of interest (ROI). Results: Compared to NC and AD patients, SIVD patients had lower FA values and higher ADC values in the inferior-fronto-occipital fascicles (IFOF), genu of the corpus callosum (GCC), splenium of the corpus callosum (SCC), and superior longitudinal fasciculus (SLF). Compared to controls and SIVD patients, AD patients had lower FA values in the anterior frontal lobe, temporal lobe, hippocampus, IFOF, GCC, and CF; and higher ADC values in the temporal lobe and hippocampus. Conclusion: DTI can be used to estimate the white matter impairment in dementia patients. There were significant regional reductions of FA values and heightened ADC values in multiple regions in SIVD patients compared to AD patients. When compared with conventional MRI, DTI may provide a more objective method for the differential diagnosis of SIVD and AD disease patients who have only mild white matter alterations on T2-weighted imaging

  3. The value of diffusion tensor imaging in the differential diagnosis of subcortical ischemic vascular dementia and Alzheimer's disease in patients with only mild white matter alterations on T2-weighted images

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Jian-Liang; Zhang, Ting (Dept. of Neurology, Shanghai Jiaotong Univ. Affiliated Sixth People' s Hospital, Shanghai (China)); Chang, Cheng; Zhang, Yu-Zhen; Li, Wen-Bin (Inst. of Diagnostic and Interventional Radiology, Shanghai Jiaotong Univ. Affiliated Sixth People' s Hospital, Shanghai (China)), Email: liwenbin@sh163.net

    2012-04-15

    Background: Diffusion tensor imaging (DTI) is a form of functional magnetic resonance imaging (MRI) that allows examination of the microstructural integrity of white matter in the brain. Dementia is a neurodegenerative disease, and DTI can provide indirect insights of the microstructural characteristics of brains in individuals with different forms of dementia. Purpose: To evaluate the value of DTI in the diagnosis and differential diagnosis of patients with subcortical ischemic vascular dementia (SIVD) and Alzheimer's disease (AD). Material and Methods: The study included 40 patients (20 AD patients and 20 SIVD patients) and 20 normal controls (NC). After routine MRI and DTI, fractional anisotropy (FA) and apparent diffusion coefficient (ADC) values were measured and compared in regions of interest (ROI). Results: Compared to NC and AD patients, SIVD patients had lower FA values and higher ADC values in the inferior-fronto-occipital fascicles (IFOF), genu of the corpus callosum (GCC), splenium of the corpus callosum (SCC), and superior longitudinal fasciculus (SLF). Compared to controls and SIVD patients, AD patients had lower FA values in the anterior frontal lobe, temporal lobe, hippocampus, IFOF, GCC, and CF; and higher ADC values in the temporal lobe and hippocampus. Conclusion: DTI can be used to estimate the white matter impairment in dementia patients. There were significant regional reductions of FA values and heightened ADC values in multiple regions in SIVD patients compared to AD patients. When compared with conventional MRI, DTI may provide a more objective method for the differential diagnosis of SIVD and AD disease patients who have only mild white matter alterations on T2-weighted imaging

  4. A CMOS 0.13 mu m, 5-Gb/s laser driver for high energy physics applications

    CERN Document Server

    Mazza, G; Moreira, P; Rivetti, A; Soos, C; Troska, J; Wyllie, K

    2012-01-01

    The GigaBit Laser Driver (GBLD) is a radiation tolerant ASIC designed to drive both edge emitting lasers and VCSELs at data rates up to 5 Gb/s. It is part of the GigaBit Transceiver (GBT) and Versatile Link projects, which are designing a bi-directional optical data transmission system capable of operating in the radiation environment of a typical HEP experiment. The GBLD can provide laser diode modulation currents up to 24 mA and laser bias currents up to 43 mA. Pre- and de-emphasis functions are implemented to compensate for high external capacitive loads and asymmetric laser response. The chip, designed in a 0.13 $\\mu$m CMOS technology, is powered by a single 2.5 V power supply and can be programmed via an $I2C$ interface.

  5. ZEUS hardware control system

    Science.gov (United States)

    Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

    1989-12-01

    The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users.

  6. ZEUS hardware control system

    International Nuclear Information System (INIS)

    Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

    1989-01-01

    The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users. (orig.)

  7. Optical networking in CESNET2 gigabit network

    Czech Academy of Sciences Publication Activity Database

    Radil, J.; Boháč, L.; Karásek, Miroslav

    2003-01-01

    Roč. 58, 11/12 (2003), s. 1/20-20/20 ISSN 0003-4347 R&D Projects: GA AV ČR IAA2067202 Institutional research plan: CEZ:AV0Z2067918 Keywords : optical fibre amplifiers * wavelength division multiplexing * optical communication Subject RIV: JA - Electronics ; Optoelectronics, Electrical Engineering Impact factor: 0.239, year: 2003

  8. Near-Infrared Wireless Optical Communication with Particulates In-Suspension over the Underwater Channel

    KAUST Repository

    Lee, It Ee; Guo, Yong; Ng, Tien Khee; Park, Kihong; Alouini, Mohamed-Slim; Ooi, Boon S.

    2017-01-01

    We demonstrate a gigabit near-infrared-based underwater wireless optical communication link using an 808-nm laser diode to mitigate the particle scattering effect in turbid medium. An improvement in the error performance is observed with increasing

  9. Perancangan Jaringan Sensor Terdistribusi untuk Pengaturan Suhu, Kelembaban dan Intensitas Cahaya

    OpenAIRE

    Bimo Ananto Pamungkas; Adian Fatchur Rochim; Eko Didik Widianto

    2013-01-01

    This paper contains distributed sensor system design for temperature, air humidity, and light intensity monitoring in greenhouse based Arduino Uno board. System contains 2 sensor-actuator nodes, and 1 controller node connected to Ethernet network through Ethernet Shield board. Sensor-actuator node with DHT 11 sensor works for taking environment informations such as temperature, air humidity, and light intensity, runs actuation in the form of emulating LED lights; and communicates with control...

  10. Data communication in read-out systems: how fast can we go over copper wires?

    International Nuclear Information System (INIS)

    Schrader, J.H.R.; Klumperink, E.A.M.; Visschers, J.L.; Nauta, B.

    2004-01-01

    In a digital X-ray imaging system, data has to be transmitted from the detector to the storage system. In future digital X-ray imaging systems, higher data rates will be needed. For some applications, e.g. protein crystallography at synchrotron beams, data rates in the order of gigabits per second are expected. Present trend for such systems is to move from a parallel data bus towards a high-speed serial readout. For high speed signaling over short distances (up to 10 m) the attenuation of copper cables is low enough to permit multi-gigabit per second speeds. In this article, an overview will be given of problems encountered in high speed data transmission over copper cable and techniques will be shown to overcome these problems. The bandwidth bottleneck in short distance communication is in the IC-technology and not in the channel. The cable transfer function results in inter-symbol interference (ISI). The skin-effect is the most significant cause of ISI for short length (10 m) coaxial copper cables. Fortunately, equalization can compensate for these effects. An equalizer has a transfer function that is the inverse of the channel transfer function. With the correct equalizer, a very low Bit Error Ratio (BER) can be achieved. The measured RG-58U cable (τ 1 =0.12 ns) could transmit at a bit rate of 8.3 Gbps, with a BER of 10 -12 . Multi-gigabit speeds are possible over short length coaxial copper cables

  11. Data communication in read-out systems: how fast can we go over copper wires?

    Energy Technology Data Exchange (ETDEWEB)

    Schrader, J.H.R. E-mail: j.h.r.schrader@utwente.nl; Klumperink, E.A.M.; Visschers, J.L.; Nauta, B

    2004-09-21

    In a digital X-ray imaging system, data has to be transmitted from the detector to the storage system. In future digital X-ray imaging systems, higher data rates will be needed. For some applications, e.g. protein crystallography at synchrotron beams, data rates in the order of gigabits per second are expected. Present trend for such systems is to move from a parallel data bus towards a high-speed serial readout. For high speed signaling over short distances (up to 10 m) the attenuation of copper cables is low enough to permit multi-gigabit per second speeds. In this article, an overview will be given of problems encountered in high speed data transmission over copper cable and techniques will be shown to overcome these problems. The bandwidth bottleneck in short distance communication is in the IC-technology and not in the channel. The cable transfer function results in inter-symbol interference (ISI). The skin-effect is the most significant cause of ISI for short length (10 m) coaxial copper cables. Fortunately, equalization can compensate for these effects. An equalizer has a transfer function that is the inverse of the channel transfer function. With the correct equalizer, a very low Bit Error Ratio (BER) can be achieved. The measured RG-58U cable ({tau}{sub 1}=0.12 ns) could transmit at a bit rate of 8.3 Gbps, with a BER of 10{sup -12}. Multi-gigabit speeds are possible over short length coaxial copper cables.

  12. Near-Infrared Wireless Optical Communication with Particulates In-Suspension over the Underwater Channel

    KAUST Repository

    Lee, It Ee

    2017-05-08

    We demonstrate a gigabit near-infrared-based underwater wireless optical communication link using an 808-nm laser diode to mitigate the particle scattering effect in turbid medium. An improvement in the error performance is observed with increasing concentrations.

  13. On Bit Error Probability and Power Optimization in Multihop Millimeter Wave Relay Systems

    KAUST Repository

    Chelli, Ali; Kansanen, Kimmo; Alouini, Mohamed-Slim; Balasingham, Ilangko

    2018-01-01

    5G networks are expected to provide gigabit data rate to users via millimeter-wave (mmWave) communication technology. One of the major problem faced by mmWaves is that they cannot penetrate buildings. In this paper, we utilize multihop relaying

  14. Individual structural differences in left inferior parietal area are associated with schoolchildrens’ arithmetic scores

    Directory of Open Access Journals (Sweden)

    Yongxin eLi

    2013-12-01

    Full Text Available Arithmetic skill is of critical importance for academic achievement, professional success and everyday life, and childhood is the key period to acquire this skill. Neuroimaging studies have identified that left parietal regions are a key neural substrate for representing arithmetic skill. Although the relationship between functional brain activity in left parietal regions and arithmetic skill has been studied in detail, it remains unclear about the relationship between arithmetic achievement and structural properties in left inferior parietal area in schoolchildren. The current study employed a combination of voxel-based morphometry (VBM for high-resolution T1-weighted images and fiber tracking on diffusion tensor imaging (DTI to examine the relationship between structural properties in the inferior parietal area and arithmetic achievement in 10-year-old schoolchildren. VBM of the T1-weighted images revealed that individual differences in arithmetic scores were significantly and positively correlated with the grey matter (GM volume in the left intraparietal sulcus (IPS. Fiber tracking analysis revealed that the forceps major, left superior longitudinal fasciculus (SLF, bilateral inferior longitudinal fasciculus (ILF and inferior fronto-occipital fasciculus (IFOF were the primary pathways connecting the left IPS with other brain areas. Furthermore, the regression analysis of the probabilistic pathways revealed a significant and positive correlation between the fractional anisotropy (FA values in the left SLF, ILF and bilateral IFOF and arithmetic scores. The brain structure-behavior correlation analyses indicated that the GM volumes in the left IPS and the FA values in the tract pathways connecting left IPS were both related to children’s arithmetic achievement. The present findings provide evidence that individual structural differences in the left IPS are associated with arithmetic scores in schoolchildren.

  15. Combined DTI Tractography and Functional MRI Study of the Language Connectome in Healthy Volunteers: Extensive Mapping of White Matter Fascicles and Cortical Activations.

    Directory of Open Access Journals (Sweden)

    François Vassal

    Full Text Available Despite a better understanding of brain language organization into large-scale cortical networks, the underlying white matter (WM connectivity is still not mastered. Here we combined diffusion tensor imaging (DTI fiber tracking (FT and language functional magnetic resonance imaging (fMRI in twenty healthy subjects to gain new insights into the macroscopic structural connectivity of language. Eight putative WM fascicles for language were probed using a deterministic DTI-FT technique: the arcuate fascicle (AF, superior longitudinal fascicle (SLF, uncinate fascicle (UF, temporo-occipital fascicle, inferior fronto-occipital fascicle (IFOF, middle longitudinal fascicle (MdLF, frontal aslant fascicle and operculopremotor fascicle. Specific measurements (i.e. volume, length, fractional anisotropy and precise cortical terminations were derived for each WM fascicle within both hemispheres. Connections between these WM fascicles and fMRI activations were studied to determine which WM fascicles are related to language. WM fascicle volumes showed asymmetries: leftward for the AF, temporoparietal segment of SLF and UF, and rightward for the frontoparietal segment of the SLF. The lateralization of the AF, IFOF and MdLF extended to differences in patterns of anatomical connections, which may relate to specific hemispheric abilities. The leftward asymmetry of the AF was correlated to the leftward asymmetry of fMRI activations, suggesting that the lateralization of the AF is a structural substrate of hemispheric language dominance. We found consistent connections between fMRI activations and terminations of the eight WM fascicles, providing a detailed description of the language connectome. WM fascicle terminations were also observed beyond fMRI-confirmed language areas and reached numerous cortical areas involved in different functional brain networks. These findings suggest that the reported WM fascicles are not exclusively involved in language and might be

  16. White matter microstructural abnormalities in the frontal lobe of adults with antisocial personality disorder.

    Science.gov (United States)

    Sundram, Frederick; Deeley, Quinton; Sarkar, Sagari; Daly, Eileen; Latham, Richard; Craig, Michael; Raczek, Malgorzata; Fahy, Tom; Picchioni, Marco; Barker, Gareth J; Murphy, Declan G M

    2012-02-01

    Antisocial personality disorder (ASPD) and psychopathy involve significant interpersonal and behavioural impairments. However, little is known about their underlying neurobiology and in particular, abnormalities in white matter (WM) microstructure. A preliminary diffusion tensor magnetic resonance imaging (DT-MRI) study of adult psychopaths employing tractography revealed abnormalities in the right uncinate fasciculus (UF) (Craig et al., 2009), indicating fronto-limbic disconnectivity. However, it is not clear whether WM abnormalities are restricted to this tract or are or more widespread, including other tracts which are involved in connectivity with the frontal lobe. We performed whole brain voxel-based analyses on WM fractional anisotropy (FA) and mean diffusivity (MD) maps acquired with DT-MRI to compare 15 adults with ASPD and healthy age, handedness and IQ-matched controls. Also, within ASPD subjects we related differences in FA and MD to measures of psychopathy. Significant WM FA reduction and MD increases were found respectively in ASPD subjects relative to controls. FA was bilaterally reduced in the genu of corpus callosum while in the right frontal lobe FA reduction was found in the UF, inferior fronto-occipital fasciculus (IFOF), anterior corona radiata and anterior limb and genu of the internal capsule. These differences negatively correlated with measures of psychopathy. Also in the right frontal lobe, increased MD was found in the IFOF and UF, and the corpus callosum and anterior corona radiata. There was a significant positive correlation between MD and psychopathy scores. The present study confirms a previous report of reduced FA in the UF. Additionally, we report for the first time, FA deficits in tracts involved in interhemispheric as well as frontal lobe connectivity in conjunction with MD increases in the frontal lobe. Hence, we provide evidence of significant WM microstructural abnormalities in frontal brain regions in ASPD and psychopathy

  17. Long-term trends in the ionospheric E and F1 regions

    Directory of Open Access Journals (Sweden)

    J. Bremer

    2008-05-01

    Full Text Available Ground based ionosonde measurements are the most essential source of information about long-term variations in the ionospheric E and F1 regions. Data of such observations have been derived at many different ionospheric stations all over the world some for more than 50 years. The standard parameters foE, h'E, and <I>foF1 are used for trend analyses in this paper. Two main problems have to be considered in these analyses. Firstly, the data series have to be homogeneous, i.e. the observations should not be disturbed by artificial steps due to technical reasons or changes in the evaluation algorithm. Secondly, the strong solar and geomagnetic influences upon the ionospheric data have carefully to be removed by an appropriate regression analysis. Otherwise the small trends in the different ionospheric parameters cannot be detected.

    The trends derived at individual stations differ markedly, however their dependence on geographic or geomagnetic latitude is only small. Nevertheless, the mean global trends estimated from the trends at the different stations show some general behaviour (positive trends in foE and <I>foF1, negative trend in h'E which can at least qualitatively be explained by an increasing atmospheric greenhouse effect (increase of CO2 content and other greenhouse gases and decreasing ozone values. The positive foE trend is also in qualitative agreement with rocket mass spectrometer observations of ion densities in the E region. First indications could be found that the changing ozone trend at mid-latitudes (before about 1979, between 1979 until 1995, and after about 1995 modifies the estimated mean foE trend.

  18. Combined DTI Tractography and Functional MRI Study of the Language Connectome in Healthy Volunteers: Extensive Mapping of White Matter Fascicles and Cortical Activations.

    Science.gov (United States)

    Vassal, François; Schneider, Fabien; Boutet, Claire; Jean, Betty; Sontheimer, Anna; Lemaire, Jean-Jacques

    2016-01-01

    Despite a better understanding of brain language organization into large-scale cortical networks, the underlying white matter (WM) connectivity is still not mastered. Here we combined diffusion tensor imaging (DTI) fiber tracking (FT) and language functional magnetic resonance imaging (fMRI) in twenty healthy subjects to gain new insights into the macroscopic structural connectivity of language. Eight putative WM fascicles for language were probed using a deterministic DTI-FT technique: the arcuate fascicle (AF), superior longitudinal fascicle (SLF), uncinate fascicle (UF), temporo-occipital fascicle, inferior fronto-occipital fascicle (IFOF), middle longitudinal fascicle (MdLF), frontal aslant fascicle and operculopremotor fascicle. Specific measurements (i.e. volume, length, fractional anisotropy) and precise cortical terminations were derived for each WM fascicle within both hemispheres. Connections between these WM fascicles and fMRI activations were studied to determine which WM fascicles are related to language. WM fascicle volumes showed asymmetries: leftward for the AF, temporoparietal segment of SLF and UF, and rightward for the frontoparietal segment of the SLF. The lateralization of the AF, IFOF and MdLF extended to differences in patterns of anatomical connections, which may relate to specific hemispheric abilities. The leftward asymmetry of the AF was correlated to the leftward asymmetry of fMRI activations, suggesting that the lateralization of the AF is a structural substrate of hemispheric language dominance. We found consistent connections between fMRI activations and terminations of the eight WM fascicles, providing a detailed description of the language connectome. WM fascicle terminations were also observed beyond fMRI-confirmed language areas and reached numerous cortical areas involved in different functional brain networks. These findings suggest that the reported WM fascicles are not exclusively involved in language and might be related to

  19. CODA: A scalable, distributed data acquisition system

    International Nuclear Information System (INIS)

    Watson, W.A. III; Chen, J.; Heyes, G.; Jastrzembski, E.; Quarrie, D.

    1994-01-01

    A new data acquisition system has been designed for physics experiments scheduled to run at CEBAF starting in the summer of 1994. This system runs on Unix workstations connected via ethernet, FDDI, or other network hardware to multiple intelligent front end crates -- VME, CAMAC or FASTBUS. CAMAC crates may either contain intelligent processors, or may be interfaced to VME. The system is modular and scalable, from a single front end crate and one workstation linked by ethernet, to as may as 32 clusters of front end crates ultimately connected via a high speed network to a set of analysis workstations. The system includes an extensible, device independent slow controls package with drivers for CAMAC, VME, and high voltage crates, as well as a link to CEBAF accelerator controls. All distributed processes are managed by standard remote procedure calls propagating change-of-state requests, or reading and writing program variables. Custom components may be easily integrated. The system is portable to any front end processor running the VxWorks real-time kernel, and to most workstations supplying a few standard facilities such as rsh and X-windows, and Motif and socket libraries. Sample implementations exist for 2 Unix workstation families connected via ethernet or FDDI to VME (with interfaces to FASTBUS or CAMAC), and via ethernet to FASTBUS or CAMAC

  20. CHEETAH: circuit-switched high-speed end-to-end transport architecture

    Science.gov (United States)

    Veeraraghavan, Malathi; Zheng, Xuan; Lee, Hyuk; Gardner, M.; Feng, Wuchun

    2003-10-01

    Leveraging the dominance of Ethernet in LANs and SONET/SDH in MANs and WANs, we propose a service called CHEETAH (Circuit-switched High-speed End-to-End Transport ArcHitecture). The service concept is to provide end hosts with high-speed, end-to-end circuit connectivity on a call-by-call shared basis, where a "circuit" consists of Ethernet segments at the ends that are mapped into Ethernet-over-SONET long-distance circuits. This paper focuses on the file-transfer application for such circuits. For this application, the CHEETAH service is proposed as an add-on to the primary Internet access service already in place for enterprise hosts. This allows an end host that is sending a file to first attempt setting up an end-to-end Ethernet/EoS circuit, and if rejected, fall back to the TCP/IP path. If the circuit setup is successful, the end host will enjoy a much shorter file-transfer delay than on the TCP/IP path. To determine the conditions under which an end host with access to the CHEETAH service should attempt circuit setup, we analyze mean file-transfer delays as a function of call blocking probability in the circuit-switched network, probability of packet loss in the IP network, round-trip times, link rates, and so on.

  1. Redes neuronales y predicción de tráfico

    Directory of Open Access Journals (Sweden)

    Nelson Stivet Torres Álvarez

    2011-12-01

    Full Text Available This paper shows the development of a traffic model based on neural networks. Traf c data used in training of the neural network were extracted from a data network through the Ethernet LAN Ethereal Sniffer; also MATLAB software was used to modeling the three-layer neural network. The results show the exibility and accuracy of neural networks in modeling of Ethernet network traf c, if you have a suf cient number of samples of traffic to train it.

  2. Flexible phase-locked loops and millimeter wave PLL components for 60-GHz wireless networks in CMOS

    NARCIS (Netherlands)

    Cheema, H.M.

    2010-01-01

    The 60 GHz license-free frequency band offers the possibility of multi-gigabit per second wireless transmission satisfying the increasing demand of data intensive applications over short distances. Over the last decade, aggressive down-scaling of CMOS technologies coupled with an intensive research

  3. CERN Computing Colloquia Spring Series: IT Security - A High-Performance Pattern Matching Engine for Intrusion Detection

    CERN Multimedia

    CERN. Geneva

    2006-01-01

    The flexible and modular design of the engine allows a broad spectrum of applications, ranging from high-end enterprise level network devices that need to match hundreds of thousands of patterns at speeds of tens of gigabits per second, to low-end dev...

  4. mm-Wave Hybrid Photonic Wireless Links for Ultra-High Speed Wireless Transmissions

    DEFF Research Database (Denmark)

    Rommel, Simon; Vegas Olmos, Juan José; Tafur Monroy, Idelfonso

    Hybrid photonic-wireless transmission schemes in the mm-wave frequency range are promising candidates to enable the multi-gigabit per second data communications required from wireless and mobile networks of the 5th and future generations. Large FCC spectrum allocations for wireless transmission...

  5. Centralized optical-frequency-comb-based RF carrier generator for DWDM fiber-wireless access systems

    DEFF Research Database (Denmark)

    Pang, Xiaodan; Beltran, Marta; Sanchez, Jose

    2014-01-01

    In this paper, we report on a gigabit capacity fiber-wireless system that enables smooth integration between high-speed wireless networks and dense wavelength-division-multiplexing (DWDM) access networks. By employing a centralized optical frequency comb, both the wireline and the wireless services...

  6. LHCb: F.E.C. for DAQ networks

    CERN Multimedia

    Floros, G; Neufeld, N

    2014-01-01

    The demand for faster and more reliable networks is growing day by day both in commercial and scientific applications, driving many innovations in network protocols, fiber optics and network-controllers. Operating fast links on relatively inexpensive hardware is a very important challenging aspect of this. One important way to enable this is to provide the network with an existing mechanism of error correction, called Forward Error Correction (F.E.C.). Although error-correcting codes exist for over six decades and F.E.C. is applied in various projects, it is still not widespread in Ethernet networks. F.E.C. introduces a very cost effective way to expand the limits of any network based on micro-controllers synthesized on FPGAs, but it is provided only for specific applications, such as backplane systems. Most of the FPGA and/or IP core vendors either do not provide this feature on their Ethernet implementations or their F.E.C. implementations are based on Ethernet micro-controllers that have a different struct...

  7. On TTEthernet for Integrated Fault-Tolerant Spacecraft Networks

    Science.gov (United States)

    Loveless, Andrew

    2015-01-01

    There has recently been a push for adopting integrated modular avionics (IMA) principles in designing spacecraft architectures. This consolidation of multiple vehicle functions to shared computing platforms can significantly reduce spacecraft cost, weight, and de- sign complexity. Ethernet technology is attractive for inclusion in more integrated avionic systems due to its high speed, flexibility, and the availability of inexpensive commercial off-the-shelf (COTS) components. Furthermore, Ethernet can be augmented with a variety of quality of service (QoS) enhancements that enable its use for transmitting critical data. TTEthernet introduces a decentralized clock synchronization paradigm enabling the use of time-triggered Ethernet messaging appropriate for hard real-time applications. TTEthernet can also provide two forms of event-driven communication, therefore accommodating the full spectrum of traffic criticality levels required in IMA architectures. This paper explores the application of TTEthernet technology to future IMA spacecraft architectures as part of the Avionics and Software (A&S) project chartered by NASA's Advanced Exploration Systems (AES) program.

  8. Control system for ATLAS TileCal HVRemote boards

    CERN Document Server

    AUTHOR|(SzGeCERN)739751; The ATLAS collaboration; Gurriana, Luis; Oleiro Seabra, Luis Filipe; Evans, Guiomar; Gomes, Agostinho; Maio, Amelia; Pinto Silva Rato, Catia Sofia; Almendra Sabino, Joao Maria; Soares Augusto, Jose

    2018-01-01

    One of the proposed solutions for upgrading the high voltage (HV) system of Tilecal, the ATLAS hadron calorimeter, consists in removing the HV regulation boards from the detector and deploying them in a low-radiation room where there is permanent access for maintenance. This option requires many ~100 m long HV cables but removes the requirement of radiation hard boards. That solution simplifies the control system of the HV regulation cards (called HVRemote). It consists of a Detector Control System (DCS) node linked to 256 HVRemote boards through a tree of Ethernet connections. Each HVRemote includes a smart Ethernet transceiver for converting data and commands from the DCS into serial peripheral interface (SPI) signals routed to SPI-capable devices in the HVRemote. The DCS connection to the transceiver and the control of some SPI-capable devices via Ethernet has been tested successfully. A test board (HVRemote-ctrl) with the interfacing sub-system of the HVRemote was fabricated. It is being tested through SP...

  9. Control System for ATLAS TileCal HVRemote boards

    CERN Document Server

    AUTHOR|(SzGeCERN)739751; The ATLAS collaboration; Gurriana, Luis; Oleiro Seabra, Luis Filipe; Evans, Guiomar; Gomes, Agostinho; Maio, Amelia; Pinto Silva Rato, Catia Sofia; Almendra Sabino, Joao Maria; Augusto, Jose

    2017-01-01

    One of the proposed solutions for upgrading the high voltage (HV) system of TileCal, the ATLAS central hadron calorimeter, consists in removing the HV regulation boards from the detector and deploying them in a low-radiation room where there is permanent access for maintenance. This option requires many ∼100 m long HV cables but removes the requirement of radiation hard boards. This solution simplifies the control system of the HV regulation cards (called HVRemote). It consists of a Detector Control System (DCS) node linked to 256 HVRemote boards through a tree of Ethernet connections. Each HVRemote includes a smart Ethernet transceiver for converting data and commands from the DCS into serial peripheral interface (SPI) signals routed to SPI-capable devices in the HVRemote. The DCS connection to the transceiver and the control of some SPI-capable devices via Ethernet has been tested successfully. A test board (HVRemote-Ctrl) with the interfacing sub-system of the HVRemote was fabricated. It is being tested ...

  10. Production, measurement and simulation of a low mass flex cable for multi gigabit/s readout for the LHCb VELO upgrade

    CERN Document Server

    Lemos Cid, E; Gallas Torreira, A A; Esperante Pereira, D; Ronning, P Arne; Visniakov, J; Sanchez, M G; Vazquez Regueiro, P

    2013-01-01

    The goal of this project is to examine the feasibility of data transmission up to ~ 5 Gbit/s on a short ( ~ 60 cm) low mass flex cable, for the readout of the upgraded vertex detector (VELO) of the LHCb experiment. They will be in a vacuum and very high radiation environment and also partly in the particle acceptance. For the full system 1600 readout links will be required. A set of single-ended and differential (edge-coupled) striplines, with a variety of line parameters have been prototyped using a material specifically tailored for this type of application (Dupont Pyralux AP-plus polyimide). To reduce mass, the total thickness of the cable is kept to 0.7 mm. We will present measurements of the characteristic impedance, insertion and return loss, obtained both from time and frequency domain, as well as a comparison with simulations and expectations. Also the effectiveness of grounded guard traces and the use of ground via holes to reduce crosstalk will be reported. From the measurements we were also able to...

  11. Central FPGA-based destination and load control in the LHCb MHz event readout

    International Nuclear Information System (INIS)

    Jacobsson, R.

    2012-01-01

    The readout strategy of the LHCb experiment is based on complete event readout at 1 MHz. A set of 320 sub-detector readout boards transmit event fragments at total rate of 24.6 MHz at a bandwidth usage of up to 70 GB/s over a commercial switching network based on Gigabit Ethernet to a distributed event building and high-level trigger processing farm with 1470 individual multi-core computer nodes. In the original specifications, the readout was based on a pure push protocol. This paper describes the proposal, implementation, and experience of a non-conventional mixture of a push and a pull protocol, akin to credit-based flow control. An FPGA-based central master module, partly operating at the LHC bunch clock frequency of 40.08 MHz and partly at a double clock speed, is in charge of the entire trigger and readout control from the front-end electronics up to the high-level trigger farm. One FPGA is dedicated to controlling the event fragment packing in the readout boards, the assignment of the farm node destination for each event, and controls the farm load based on an asynchronous pull mechanism from each farm node. This dynamic readout scheme relies on generic event requests and the concept of node credit allowing load control and trigger rate regulation as a function of the global farm load. It also allows the vital task of fast central monitoring and automatic recovery in-flight of failing nodes while maintaining dead-time and event loss at a minimum. This paper demonstrates the strength and suitability of implementing this real-time task for a very large distributed system in an FPGA where no random delays are introduced, and where extreme reliability and accurate event accounting are fundamental requirements. It was in use during the entire commissioning phase of LHCb and has been in faultless operation during the first two years of physics luminosity data taking.

  12. Central FPGA-based destination and load control in the LHCb MHz event readout

    Science.gov (United States)

    Jacobsson, R.

    2012-10-01

    The readout strategy of the LHCb experiment is based on complete event readout at 1 MHz. A set of 320 sub-detector readout boards transmit event fragments at total rate of 24.6 MHz at a bandwidth usage of up to 70 GB/s over a commercial switching network based on Gigabit Ethernet to a distributed event building and high-level trigger processing farm with 1470 individual multi-core computer nodes. In the original specifications, the readout was based on a pure push protocol. This paper describes the proposal, implementation, and experience of a non-conventional mixture of a push and a pull protocol, akin to credit-based flow control. An FPGA-based central master module, partly operating at the LHC bunch clock frequency of 40.08 MHz and partly at a double clock speed, is in charge of the entire trigger and readout control from the front-end electronics up to the high-level trigger farm. One FPGA is dedicated to controlling the event fragment packing in the readout boards, the assignment of the farm node destination for each event, and controls the farm load based on an asynchronous pull mechanism from each farm node. This dynamic readout scheme relies on generic event requests and the concept of node credit allowing load control and trigger rate regulation as a function of the global farm load. It also allows the vital task of fast central monitoring and automatic recovery in-flight of failing nodes while maintaining dead-time and event loss at a minimum. This paper demonstrates the strength and suitability of implementing this real-time task for a very large distributed system in an FPGA where no random delays are introduced, and where extreme reliability and accurate event accounting are fundamental requirements. It was in use during the entire commissioning phase of LHCb and has been in faultless operation during the first two years of physics luminosity data taking.

  13. Implementing 802.11 with microcontrollers wireless networking for embedded systems designers

    CERN Document Server

    Eady, Fred

    2005-01-01

    Wireless networking is poised to have a massive impact on communications, and the 802.11 standard is to wireless networking what Ethernet is to wired networking. There are already over 50 million devices using the dominant IEEE 802.11 (essentially wireless Ethernet) standard, with astronomical growth predicted over the next 10 years. New applications are emerging every day, with wireless capability being embedded in everything from electric meters to hospital patient tracking systems to security devices. This practical reference guides readers through the wireless technology forest, gi

  14. Global Crossing optical infrastructure is critical part of next-generation Internet

    CERN Multimedia

    2002-01-01

    "Global Crossing announced today that it has signed a contract with the Netherlands National Research Network, SURFnet, to provide multi-Gigabit wavelength connectivity between Amsterdam's NetherLight and Switzerland's CERN in Geneva for use in tests that optimise how research networks are used" (1 page).

  15. mm-Wave Wireless Communications based on Silicon Photonics Integrated Circuits

    DEFF Research Database (Denmark)

    Rommel, Simon; Heck, Martijn; Vegas Olmos, Juan José

    Hybrid photonic-wireless transmission schemes in the mm-wave frequency range are promising candidates to enable the multi-gigabit per second data communications required from wireless and mobile networks of the 5th and future generations. Photonic integration may pave the way to practical applica...

  16. Silicon Photonics Integrated Circuits for 5th Generation mm-Wave Wireless Communications

    DEFF Research Database (Denmark)

    Rommel, Simon; Vegas Olmos, Juan José; Tafur Monroy, Idelfonso

    Hybrid photonic-wireless transmission schemes in the mm-wave frequency are promising candidates to enable the multi-gigabit per second data communications required from wireless and mobile networks of the 5th and future generations. Photonic integration may pave the way to practical applicability...

  17. Evolution and prospects cable networks for broadband services : A technical perspective of the European and specifically the Dutch cable networks

    NARCIS (Netherlands)

    Anonymous

    2012-01-01

    European cable networks have played an important role in the development of broadcast television and broadband services. The delivery of Gigabit broadband services is considered to be the next access network challenge in the development of broadband services. In this whitepaper we have studied and

  18. Cluster computing for lattice QCD simulations

    International Nuclear Information System (INIS)

    Coddington, P.D.; Williams, A.G.

    2000-01-01

    main application is lattice QCD calculations. We have a number of programs for generating and analysing lattice QCD configurations. These programs are written in a data parallel style using Fortran 90 array syntax. Initially they were run on the CM-5 by using CM Fortran compiler directives for specifying data distribution among the processors of the parallel machine. It was a simple task to convert these codes to use the equivalent directives for High Performance Fortran (HPF), which is a standard, portable data parallel language that can be used on clusters. We have used the Portland Group HPF compiler (PGHPF), which offers good support for cluster computing. We benchmarked our codes on a number of different types of machine, before eventually deciding to purchase a large cluster from Sun Microsystems, which was installed at Adelaide University in June 2000. With a peak performance of 144 GFlops, it is currently the fastest computer in Australia. The machine is a new product from Sun, known as a Sun Technical Compute Farm (TCF). It consists of a cluster of Sun E420R workstations, each of which has four 450MHz UltraSPARC II processors, with a peak speed of 3.6 GFlops per workstation. The NCFLGT cluster consists of 40 E420R workstations, giving a total of 160 processors, 160 GBytes of memory, 640 MBytes of cache memory, and 720 GBytes of disk. The standard Sun TCF product comes with either Fast or Gigabit Ethernet, with an option for using a very high-bandwidth, low-latency SCI network targeted at parallel computing applications. For most parallel lattice QCD codes, Ethernet does not offer a low enough communications latency, while SCI is very expensive and is overkill for our applications. We therefore decided upon a third-party solution for the network, and will soon be installing a high-speed Myrinet 2000 network. Currently we only have very preliminary performance results for our lattice QCD codes, which look quite promising. We will present detailed performance

  19. Image Transmission Studies

    Science.gov (United States)

    Blaine, G. James; Hill, Rexford L.; Rueter, Allen P.; Senol, Evren; Studt, James W.

    1988-06-01

    Radiological PACS image sizes and desired retrieval response times demand high-bandwidth communication networks. Local area network technology at speeds higher that 10 Megabits/second (IEEE 802.3) have not achieved standardization nor production volume. Our current PACS experiments are based on a three-level subnet approach using 10 Mb/s Ethernet channels. An Ethernet channel is shown to support image transfers at an average throughput of 3 Mb/s. Preliminary measurements and simulation results suggest that traffic from as many as two-to-three archives can be supported on the same channel.

  20. Optimization of TTEthernet Networks to Support Best-Effort Traffic

    DEFF Research Database (Denmark)

    Tamas-Selicean, Domitian; Pop, Paul

    2014-01-01

    This paper focuses on the optimization of the TTEthernet communication protocol, which offers three traffic classes: time-triggered (TT), sent according to static schedules, rate-constrained (RC) that has bounded end-to-end latency, and best-effort (BE), the classic Ethernet traffic, with no timing...... guarantees. In our earlier work we have proposed an optimization approach named DOTTS that performs the routing, scheduling and packing / fragmenting of TT and RC messages, such that the TT and RC traffic is schedulable. Although backwards compatibility with classic Ethernet networks is one of TTEthernet...

  1. Planar beam-forming antenna array for 60-GHz broadband communication

    NARCIS (Netherlands)

    Akkermans, J.A.G.

    2009-01-01

    The 60-GHz frequency band can be employed to realise the next-generation wireless high-speed communication that is capable of handling data rates of multiple gigabits per second. Advances in silicon technology allow the realisation of low-cost radio frequency (RF) front-end solutions. Still, to

  2. Medium access control and network layer design for 60 GHz wireless personal area networks

    NARCIS (Netherlands)

    An, X.

    2010-01-01

    The unlicensed frequency band around 60 GHz is a very promising spectrum due to its potential to provide multiple gigabits per second based data rates for short range wireless communication. Hence, 60 GHz radio is an attractive candidate to enable ultra high rate Wireless Personal Area Networks

  3. Data goes faster than ever

    CERN Multimedia

    Katarina Anthony

    2012-01-01

    Using store-bought computers and commercially available optical fibre lines, researchers from the California Institute of Technology (Caltech), the University of Victoria, the University of Michigan, CERN and Florida International University broke the world speed record for LHC data transfer. They caught the attention of HEP experiments worldwide – including the LHC – which rely on ever-improving technology to share their results.   The equipment used by the Caltech team to break the data transfer record. Photo credit: D. Foster. At November’s SuperComputing 2011 (SC11) convention in Seattle, the Caltech team sent LHC data between the University of Victoria and the Seattle exhibition floor at a full duplex speed of 186 gigabits per second on a 100 Gbps circuit provided by CANARIE and BCnet. This is a 10-fold increase compared with the current 10 gigabits per second circuits between CERN and each of the 11 major GRID Tier 1 centres that receive LHC data, and you ...

  4. Implementation of High Speed Distributed Data Acquisition System

    Science.gov (United States)

    Raju, Anju P.; Sekhar, Ambika

    2012-09-01

    This paper introduces a high speed distributed data acquisition system based on a field programmable gate array (FPGA). The aim is to develop a "distributed" data acquisition interface. The development of instruments such as personal computers and engineering workstations based on "standard" platforms is the motivation behind this effort. Using standard platforms as the controlling unit allows independence in hardware from a particular vendor and hardware platform. The distributed approach also has advantages from a functional point of view: acquisition resources become available to multiple instruments; the acquisition front-end can be physically remote from the rest of the instrument. High speed data acquisition system transmits data faster to a remote computer system through Ethernet interface. The data is acquired through 16 analog input channels. The input data commands are multiplexed and digitized and then the data is stored in 1K buffer for each input channel. The main control unit in this design is the 16 bit processor implemented in the FPGA. This 16 bit processor is used to set up and initialize the data source and the Ethernet controller, as well as control the flow of data from the memory element to the NIC. Using this processor we can initialize and control the different configuration registers in the Ethernet controller in a easy manner. Then these data packets are sending to the remote PC through the Ethernet interface. The main advantages of the using FPGA as standard platform are its flexibility, low power consumption, short design duration, fast time to market, programmability and high density. The main advantages of using Ethernet controller AX88796 over others are its non PCI interface, the presence of embedded SRAM where transmit and reception buffers are located and high-performance SRAM-like interface. The paper introduces the implementation of the distributed data acquisition using FPGA by VHDL. The main advantages of this system are high

  5. TTEthernet for Integrated Spacecraft Networks

    Science.gov (United States)

    Loveless, Andrew

    2015-01-01

    Aerospace projects have traditionally employed federated avionics architectures, in which each computer system is designed to perform one specific function (e.g. navigation). There are obvious downsides to this approach, including excessive weight (from so much computing hardware), and inefficient processor utilization (since modern processors are capable of performing multiple tasks). There has therefore been a push for integrated modular avionics (IMA), in which common computing platforms can be leveraged for different purposes. This consolidation of multiple vehicle functions to shared computing platforms can significantly reduce spacecraft cost, weight, and design complexity. However, the application of IMA principles introduces significant challenges, as the data network must accommodate traffic of mixed criticality and performance levels - potentially all related to the same shared computer hardware. Because individual network technologies are rarely so competent, the development of truly integrated network architectures often proves unreasonable. Several different types of networks are utilized - each suited to support a specific vehicle function. Critical functions are typically driven by precise timing loops, requiring networks with strict guarantees regarding message latency (i.e. determinism) and fault-tolerance. Alternatively, non-critical systems generally employ data networks prioritizing flexibility and high performance over reliable operation. Switched Ethernet has seen widespread success filling this role in terrestrial applications. Its high speed, flexibility, and the availability of inexpensive commercial off-the-shelf (COTS) components make it desirable for inclusion in spacecraft platforms. Basic Ethernet configurations have been incorporated into several preexisting aerospace projects, including both the Space Shuttle and International Space Station (ISS). However, classical switched Ethernet cannot provide the high level of network

  6. The Gigabit Optical Transmitters for the LHCb Calorimeters

    CERN Document Server

    Lax, Ignazio; D’Antone, I; Marconi, U

    2007-01-01

    This report presents the boards developed for the optical data transmission of the calorimeter system of the LHCb experiment and test results. We developed two types of transmission boards: the single-channel and the multi-channel ones. Multi-channel boards can be equipped with a variable number of transmitters, depending on the need, with a maximum allowed of 12 channels. Each optical channel allows transmitting 32 bit data at 40.08 MHz. The boards have been designed and built using radiation hard devices produced at CERN. The optical links have been qualified using the eye diagram and the BERT at 1.6Gbps.

  7. Handoff Management in Radio over Fiber 60 GHz Indoor Networks

    NARCIS (Netherlands)

    Bien, V.Q.

    2014-01-01

    Because of high data rate multimedia applications such as HD and UHDTV, online games, etc., the future home networks are expected to support short-range gigabit transmission. With the worldwide availability of 5 GHz spectrum at the 60 GHz band, it creates the opportunity for a promising air

  8. The 10 Hottest Technologies in Telecom.

    Science.gov (United States)

    Flanagan, Patrick

    1996-01-01

    Synthesizes opinions of experts regarding technologies deemed most likely to enter the telecommunications mainstream by 1998, including: (1) the Java programming language; (2) voice- over frame relay; (3) virtual local area networks (LANs); (4) cable modems; (5) gigabit LANs; (6) Internet appliances; (7) personal satellite phones; (8) intranets;…

  9. Systems and technologies for high-speed inter-office/datacenter interface

    Science.gov (United States)

    Sone, Y.; Nishizawa, H.; Yamamoto, S.; Fukutoku, M.; Yoshimatsu, T.

    2017-01-01

    Emerging requirements for inter-office/inter-datacenter short reach links for data center interconnects (DCI) and metro transport networks have led to various inter-office and inter-datacenter optical interface technologies. These technologies are bringing significant changes to systems and network architectures. In this paper, we present a system and ZR optical interface technologies for DCI and metro transport networks, then introduce the latest challenges facing the system framework. There are two trends in reach extension; one is to use Ethernet and the other is to use digital coherent technologies. The first approach achieves reach extension while using as many existing Ethernet components as possible. It offers low costs as reuses the cost-effective components created for the large Ethernet market. The second approach adopts low-cost and low power coherent DSPs that implement the minimal set long haul transmission functions. This paper introduces an architecture that integrates both trends. The architecture satisfies both datacom and telecom needs with a common control and management interface and automated configuration.

  10. A Framework for Smart Home Services with Secure and QoS-aware Communications

    Directory of Open Access Journals (Sweden)

    Markus Hager

    2013-01-01

    Full Text Available The scenario of smart home services will be discussed with regard to two important aspects: the quality of service problem for the in-house communication and the need for a security scheme for the whole system. We focus on an installation with smart computers in each flat interconnected using a switched Ethernet network. These smart devices are responsible for performing local services, user control and operate as a gateway for the different types of sensor and actor networks installed at each flat. We propose a QoS scheme to prevent congestion situation for the Ethernet network which is applicable to currently available cost-sensitive hardware. Furthermore, the whole system, all communication channels, user data and the access to the framework are secured by our proposed security architecture. Finally, we will present the latest improvements on Ethernet network standards, the ongoing work on this topics and our next steps for future work.

  11. Satellite communication on pipeline supervision using TCP-IP Protocol; Comunicacao via satelite na supervisao de dutos usando o protocolo TCP-IP

    Energy Technology Data Exchange (ETDEWEB)

    Silva, Agliberto Pessoa da [PETROBRAS S.A., Rio de Janeiro, RJ (Brazil); Brunette, Sergio Henrique de Moraes

    2003-07-01

    Bit transparent type or X-25 protocols have been used in VSAT satellite communication by PETROBRAS pipeline Supervisory Control and Data Acquisition System (SCADA) as access protocol. Both solutions have inconveniences. By the first one, difficulties exist for analysis and diagnosis of connection flaws, and therefore, for a ready identification by the system management stations of abnormality location. On the other hand, the usage of the X-25 brings an additional over-head in the communication since this is not an available option in most of the equipment that compose the SCADA. The access to VSAT through Ethernet, in the opposite, makes available all networks management tools of the TCP/IP platform and it allows a direct connection to the field devices, since the main models of the several makers of Programmable Controllers and Remote Terminal Units have Ethernet port. An additional earnings is the possibility of standardization that this solution allows. This paper describes a series of communication tests between two Programmable Controllers communicating through the satellite, using a protocol over Ethernet/TCP/IP. (author)

  12. LHCb: Production, measurement and simulation of a low mass flex cable for multi gigabit/s readout for the LHCb VELO upgrade

    CERN Multimedia

    Lemos Cid, E; Buytaert, J; Esperante Pereira, D; Ronning, P A; Visniakov, J; G Sanchez, M; Vazquez Regueiro, P

    2012-01-01

    The goal of this project is to examine the feasibility of data transmission up to ~5Gbit/s on a short (~60cm) low mass flex cable. These cables will be used for the readout of the upgraded vertex detector (VELO) of the LHCb experiment in high radiation and vacuum environment. We present a study of different transmission line geometries, the effect of using fine pitch (400μm) connectors, the use of grounded guard traces and via holes to suppress crosstalk and the effect of the line parameters in the data transmission. Time and frequency domain measurements and simulation will be presented.

  13. FELIX: a high-throughput network approach for interfacing to front end electronics for ATLAS upgrades

    NARCIS (Netherlands)

    Anderson, J.; Borga, A.; Boterenbrood, H.; Chen, H.; Chen, K.; Drake, G.; Francis, D.; Gorini, B.; Lanni, F.; Lehmann Miotto, G.; Levinson, L.; Narevicius, J.; Plessl, C.; Roich, A.; Ryu, S.; Schreuder, F.; Schumacher, J.; Vandelli, W.; Vermeulen, J.; Zhang, J.

    2015-01-01

    The ATLAS experiment at CERN is planning full deployment of a new unified optical link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates up to 10.24 Gbps, will

  14. Pramana – Journal of Physics | Indian Academy of Sciences

    Indian Academy of Sciences (India)

    This paper investigates the direct gigabit modulation characteristics of semiconductor lasers using the return to zero (RZ) and non-return to zero (NRZ) formats. The modulation characteristics include the frequency chirp, eye diagram, and turn-on jitter (TOJ). The differences in the relative contributions of the intrinsic noise of ...

  15. Data Communication in Read-Out Systems: How Fast Can We Go Over Copper Wires?

    NARCIS (Netherlands)

    Schrader, J.H.R.; Klumperink, Eric A.M.; Visschers, J.L.; Nauta, Bram

    In a digital X-ray imaging system, data has to be transmitted from the detector to the storage system. In future digital X-ray imaging systems, higher data rates will be needed. For some applications, e.g. protein crystallography at synchrotron beams, data rates in the order of gigabits per second

  16. Image transmission studies

    International Nuclear Information System (INIS)

    Blaine, G.J.; Hill, R.L.; Rueter, A.P.; Senol, E.; Studt, J.W.

    1988-01-01

    This paper discusses radiological PACS image sizes and desired retrieval response time that demand high-bandwidth communication networks. Local area network technology at speeds higher that 10 Megabits/second (IEEE 802.3) have not achieved standardization nor production volume. The authors describe current PACS experiments based on a three-level subnet approach using 10 Mb/s Ethernet channels. An Ethernet channel is shown to support image transfers at an average throughput of 3 Mb/s. Preliminary measurements and simulation results suggest that traffic from as many as two-to-three archives can be supported on the same channel

  17. An IEEE 802.3 Compatible Real Time Medium Access Control with Length-based Priority

    Institute of Scientific and Technical Information of China (English)

    2006-01-01

    A new medium access control method is proposed over the predominant Ethernet broadcast channel. Taking advantages of intrinsic variable length characteristic of standard Ethernet frame, message-oriented dynamic priority mechanism is established. Prioritized medium access control operates under a so-called block mode in event of collisions.High priority messages have a chance to preempt block status incurred by low priority ones. By this means, the new MAC provides a conditional deterministic real time performance beyond a statistical one. Experiments demonstrate effectiveness and attractiveness of the proposed scheme. Moreover, this new MAC is completely compatible with IEEE802.3.

  18. Development of the electron gun control system of SSRF

    International Nuclear Information System (INIS)

    Zhou Dayong; Lin Guoqiang; Liu Dekang; Shen Liren

    2010-01-01

    An electron gun is the key part of a linac, the beam quality of which depends on beam quality of the electron gun, hence the need of a stable control system of the electron gun to ensure its safe operation.In this paper, we report our progresses in developing the linac's electron gun control system of Shanghai Synchrotron Radiation Facility (SSRF). It uses PLC as the device controllers, with the monitoring software developed on EPICS. The whole system is connected by Ethernet. The PLC and Ethernet technology ensures good reliability and easy maintenance of the electron gun control system. (authors)

  19. 78 FR 50471 - Self-Regulatory Organizations; NYSE MKT LLC; Notice of Filing and Immediate Effectiveness of...

    Science.gov (United States)

    2013-08-19

    ...-Regulatory Organizations; NYSE MKT LLC; Notice of Filing and Immediate Effectiveness of Proposed Rule Change... for a 40 Gigabit Liquidity Center Network Connection August 13, 2013. Pursuant to Section 19(b)(1) \\1\\ of the Securities Exchange Act of 1934 (the ``Act'') \\2\\ and Rule 19b-4 thereunder,\\3\\ notice is...

  20. 78 FR 50459 - Self-Regulatory Organizations; NYSE Arca, Inc.; Notice of Filing and Immediate Effectiveness of...

    Science.gov (United States)

    2013-08-19

    ...-Regulatory Organizations; NYSE Arca, Inc.; Notice of Filing and Immediate Effectiveness of Proposed Rule... Provide for a 40 Gigabit Liquidity Center Network Connection August 13, 2013. Pursuant to Section 19(b)(1) \\1\\ of the Securities Exchange Act of 1934 (the ``Act'') \\2\\ and Rule 19b-4 thereunder,\\3\\ notice is...

  1. Using high performance interconnects in a distributed computing and mass storage environment

    International Nuclear Information System (INIS)

    Ernst, M.

    1994-01-01

    Detector Collaborations of the HERA Experiments typically involve more than 500 physicists from a few dozen institutes. These physicists require access to large amounts of data in a fully transparent manner. Important issues include Distributed Mass Storage Management Systems in a Distributed and Heterogeneous Computing Environment. At the very center of a distributed system, including tens of CPUs and network attached mass storage peripherals are the communication links. Today scientists are witnessing an integration of computing and communication technology with the open-quote network close-quote becoming the computer. This contribution reports on a centrally operated computing facility for the HERA Experiments at DESY, including Symmetric Multiprocessor Machines (84 Processors), presently more than 400 GByte of magnetic disk and 40 TB of automoted tape storage, tied together by a HIPPI open-quote network close-quote. Focussing on the High Performance Interconnect technology, details will be provided about the HIPPI based open-quote Backplane close-quote configured around a 20 Gigabit/s Multi Media Router and the performance and efficiency of the related computer interfaces

  2. High-Speed, Radiation-Tolerant Laser Drivers in 0.13 $\\mu$m CMOS Technology for HEP Applications

    CERN Document Server

    AUTHOR|(CDS)2073369; Moreira, Paulo; Calvo, Daniela; De Remigis, Paolo; Olantera, Lauri; Soos, Csaba; Troska, Jan; Wyllie, Ken

    2014-01-01

    The gigabit laser driver (GBLD) and low-power GBLD (LpGBLD) are two radiation-tolerant laser drivers designed to drive laser diodes at data rates up to 4.8 Gb/s. They have been designed in the framework of the gigabit-transceiver (GBT) and versatile-link projects to provide fast optical links capable of operation in the radiation environment of future high-luminosity high-energy physics experiments. The GBLD provides laser bias and modulation currents up to 43 mA and 24 mA, respectively. It can thus be used to drive vertical cavity surface emitting laser (VCSEL) and edge-emitting laser diodes. A pre-emphasis circuit, which can provide up to 12 mA in 70 ps pulses, has also been implemented to compensate for high external capacitive loads. The current driving capabilities of the LpGBLD are 2 times smaller that those of the GBLD as it has been optimized to drive VCSELs in order to minimize the power consumption. Both application-specific integrated circuits are designed in 0.13 m commercial complementary metal-o...

  3. Economie d'énergie en réseau filaire : ingénierie de trafic et mise en veille

    OpenAIRE

    Thaenchaikun, Chakadkit

    2016-01-01

    Les travaux portent sur l’économie d’énergie dans le secteur des technologies de la communication et plus particulièrement dans les réseaux filaires. La technologie support de nos travaux est Ethernet qui historiquement utilisée dans les entreprises est actuellement déployée dans les réseaux d’accès et de coeur des opérateurs. Notre objectif est d’économiser de l’énergie par une mise en sommeil des liens Ethernet en s’appuyant sur des mécanismes standards aisément déployables. Pour ce faire n...

  4. Vehicle fault diagnostics and management system

    Science.gov (United States)

    Gopal, Jagadeesh; Gowthamsachin

    2017-11-01

    This project is a kind of advanced automatic identification technology, and is more and more widely used in the fields of transportation and logistics. It looks over the main functions with like Vehicle management, Vehicle Speed limit and Control. This system starts with authentication process to keep itself secure. Here we connect sensors to the STM32 board which in turn is connected to the car through Ethernet cable, as Ethernet in capable of sending large amounts of data at high speeds. This technology involved clearly shows how a careful combination of software and hardware can produce an extremely cost-effective solution to a problem.

  5. The Measurement of Spectral Characteristics and Composition of Radiation in Atlas with MEDIPIX2-USB Devices

    Science.gov (United States)

    Campbell, M.; Doležal, Z.; Greiffenberg, D.; Heijne, E.; Holy, T.; Idárraga, J.; Jakůbek, J.; Král, V.; Králík, M.; Lebel, C.; Leroy, C.; Llopart, X.; Lord, G.; Maneuski, D.; Ouellette, O.; Sochor, V.; Pospíšil, S.; Suk, M.; Tlustos, L.; Vykydal, Z.; Wilhelm, I.

    2008-06-01

    A network of devices to perform real-time measurements of the spectral characteristics and composition of radiation in the ATLAS detector and cavern during its operation is being built. This system of detectors will be a stand alone system fully capable of delivering real-time images of fluxes and spectral composition of different particle species including slow and fast neutrons. The devices are based on MEDIPIX2 pixel silicon detectors that will be operated via active USB cables and USB-Ethernet extenders through an Ethernet network by a PC located in the USA15 ATLAS control room. The installation of 14 devices inside ATLAS (detector and cavern) is in progress.

  6. The Measurement of Spectral Characteristics and Composition of Radiation in ATLAS with MEDIPIX2-USB Devices

    CERN Document Server

    Campbell, M.; Greiffenberg, D.; Heijne, E.; Holy, T.; Idárraga, J.; Jakubek, J.; Král, V.; Králík, M.; Lebel, C.; Leroy, C.; Llopart, X.; Lord, G.; Maneuski, D.; Ouellette, O.; Sochor, V.; Prospísil, S.; Suk, M; Tlustos, L.; Vykydal, Z.; Wilhelm, I.

    2008-01-01

    A network of devices to perform real-time measurements of the spectral characteristics and composition of radiation in the ATLAS detector and cavern during its operation is being built. This system of detectors will be a stand alone system fully capable of delivering real-time images of fluxes and spectral composition of different particle species including slow and fast neutrons. The devices are based on MEDIPIX2 pixel silicon detectors that will be operated via active USB cables and USB-Ethernet extenders through an Ethernet network by a PC located in the USA15 ATLAS control room. The installation of 14 devices inside ATLAS (detector and cavern) is in progress.

  7. Arduino Tricorder : Aplicació Android per a la supervisió, control i adquisició de dades d'una placa Arduino

    OpenAIRE

    Sánchez Morato, Sergi

    2015-01-01

    Aplicació Android per a la supervisió, control i adquisició de dades d'una placa Arduino que disposi de comuninació Ethernet i/o Wi-Fi. Creació d'interfícies dinàmiques amb diferents modalitats d'interacció: tàctil, reconeixement de veu i síntesi de veu. Aplicación Android para la supervisión, control y adquisición de datos de una placa Arduino que disponga de comuninació Ethernet y/o Wi-Fi. Creación de interfaces dinámicas con diferentes modalidades de interacción: táctil, reconocimiento ...

  8. Ethernet-based mobility architecture for 5G

    DEFF Research Database (Denmark)

    Cattoni, Andrea Fabio; Mogensen, Preben; Vesterinen, Seppo

    2014-01-01

    of mobile devices and sensors. In this paper we propose a paradigm shift for the evolved Packet Core for the future 5G system. By leveraging on the economy of scale of software–based ICT technologies, namely Software Defined Networking and cloud computing, we propose a hierarchically cloudified mobile...... network. In particular, in this paper we focus on the mobility aspects within such new architecture, proposing low latency Layer 2 solutions for the Access Network, while exploiting aggregating Layer 3 mobility functionalities in the regional and national clouds....

  9. Data transmission optical link for LLRF TESLA project part II: application for BER measurements

    Science.gov (United States)

    Pozniak, Krzysztof T.; Romaniuk, Ryszard S.; Jalmuzna, Wojciech; Olowski, Krzysztof; Perkuszewski, Karol; Zielinski, Jerzy; Kierzkowski, Krzysztof

    2006-02-01

    It may be predicted now, even assuming a very conservative approach, that the next generation of the Low Level RF control systems for future accelerators will use extensively such technologies like: very fast programmable circuits equipped with DSP, embedded PC and optical communication I/O functionalities, as well as multi-gigabit optical transmission of measurement data and control signals.

  10. Real-time gigabit DMT transmission over plastic optical fibre

    NARCIS (Netherlands)

    Lee, S.C.J.; Breyer, F.; Cárdenas, D.; Randel, S.; Koonen, A.M.J.

    2009-01-01

    For the first time, a real-time 1.25 Gbit/s discrete multitone (DMT) transmitter implemented in a field-programmable gate array is demonstrated for use in low-cost, standard 1 mm step-index plastic optical fibre applications based on a commercial resonant-cavity LED and a large-diameter

  11. Design and implementation of data acquisition, communication and monitoring system for photovoltaic power station in microgrid

    Energy Technology Data Exchange (ETDEWEB)

    Deng, Wei; Pei, Wei; Qi, Zhiping; Kong, Li [Institute of Electrical Engineering, CAS, Beijing (China)

    2008-07-01

    This paper presents the design and realization of data acquisition, communication and monitoring system for photovoltaic power station. The data acquisition module including filter algorithm and signal modulation circuit uses the digital signal processor (DSP) as the main processor, it can realize accurate real-time data acquisition; The data communication module uses Ethernet as communication network between PV system and MicroGrid. The gateway using ARM microprocessor can realize protocol conversion and bidirectional communication between CAN Bus and Ethernet; The monitoring unit with friendly human-machine interface keeps real-time performance monitoring of PV system to realize automation control. The results of experiment show that the system is practicable and effective. (orig.)

  12. (No) Security in Automation!?

    CERN Document Server

    Lüders, S

    2008-01-01

    Modern Information Technologies like Ethernet, TCP/IP, web server or FTP are nowadays increas-ingly used in distributed control and automation systems. Thus, information from the factory floor is now directly available at the management level (From Shop-Floor to Top-Floor) and can be ma-nipulated from there. Despite the benefits coming with this (r)evolution, new vulnerabilities are in-herited, too: worms and viruses spread within seconds via Ethernet and attackers are becoming interested in control systems. Unfortunately, control systems lack the standard security features that usual office PCs have. This contribution will elaborate on these problems, discuss the vulnerabilities of modern control systems and present international initiatives for mitigation.

  13. Record transfer of data between CERN and California

    CERN Document Server

    2003-01-01

    A data transfer record has been broken by transmitting at a rate of 2.38 gigabits per second for more than one hour between CERN and Sunnyvale in California, a distance of more than 10,000 km. This record-breaking performance was achieved in the framework of tests to develop a high-speed global network for the future computing grid.

  14. Development of Protection and Control Unit for Distribution Substation

    Science.gov (United States)

    Iguchi, Fumiaki; Hayashi, Hideyuki; Takeuchi, Motohiro; Kido, Mitsuyasu; Kobayashi, Takashi; Yanaoka, Atsushi

    The Recently, electronics and IT technologies have been rapidly innovated and have been introduced to power system protection & control system to achieve high reliability, maintainability and more functionality. Concerning the distribution substation application, digital relays have been applied for more than 10 years. Because of a number of electronic devices used for it, product cost becomes higher. Also, products installed during the past high-growth period will be at the end of lifetime and will be replaced. Therefore, replacing market is expected to grow and the reduction of cost is demanded. Considering above mentioned background, second generation digital protection and control unit as a successor is designed to have following concepts. Functional integration based on advanced digital technologies, Ethernet LAN based indoor communication network, cost reduction and downsizing. Pondering above concepts, integration of protection and control function is adopted in contrary to the functional segregation applied to the previous system in order to achieve one-unit concept. Also the adoption of Ethernet LAN for inter-unit communication is objective. This report shows the development of second-generation digital relay for distribution substation, which is equipped with control function and Ethernet LAN by reducing the size of auxiliary transformer unit and the same size as previous product is realized.

  15. A new towed platform for the unobtrusive surveying of benthic habitats and organisms

    Science.gov (United States)

    Zawada, David G.; Thompson, P.R.; Butcher, J.

    2008-01-01

    Maps of coral ecosystems are needed to support many conservation and management objectives, as well as research activities. Examples include ground-truthing aerial and satellite imagery, characterizing essential habitat, assessing changes, and monitoring the progress of restoration efforts. To address some of these needs, the U.S. Geological Survey developed the Along-Track Reef-Imaging System (ATRIS), a boat-based sensor package for mapping shallow-water benthic environments. ATRIS consists of a digital still camera, a video camera, and an acoustic depth sounder affixed to a moveable pole. This design, however, restricts its deployment to clear waters less than 10 m deep. To overcome this limitation, a towed version has been developed, referred to as Deep ATRIS. The system is based on a light-weight, computer-controlled, towed vehicle that is capable of following a programmed diving profile. The vehicle is 1.3 m long with a 63-cm wing span and can carry a wide variety of research instruments, including CTDs, fluorometers, transmissometers, and cameras. Deep ATRIS is currently equipped with a high-speed (20 frames · s-1) digital camera, custom-built light-emitting-diode lights, a compass, a 3-axis orientation sensor, and a nadir-looking altimeter. The vehicle dynamically adjusts its altitude to maintain a fixed height above the seafloor. The camera has a 29° x 22° field-of-view and captures color images that are 1360 x 1024 pixels in size. GPS coordinates are recorded for each image. A gigabit ethernet connection enables the images to be displayed and archived in real time on the surface computer. Deep ATRIS has a maximum tow speed of 2.6 m · s-1and a theoretical operating tow-depth limit of 27 m. With an improved tow cable, the operating depth can be extended to 90 m. Here, we present results from the initial sea trials in the Gulf of Mexico and Biscayne National Park, Florida, USA, and discuss the utility of Deep ATRIS for map-ping coral reef habitats

  16. Development of intelligent instruments with embedded HTTP servers for control and data acquisition in a cryogenic setup—The hardware, firmware, and software implementation

    Science.gov (United States)

    Antony, Joby; Mathuria, D. S.; Datta, T. S.; Maity, Tanmoy

    2015-12-01

    The power of Ethernet for control and automation technology is being largely understood by the automation industry in recent times. Ethernet with HTTP (Hypertext Transfer Protocol) is one of the most widely accepted communication standards today. Ethernet is best known for being able to control through internet from anywhere in the globe. The Ethernet interface with built-in on-chip embedded servers ensures global connections for crate-less model of control and data acquisition systems which have several advantages over traditional crate-based control architectures for slow applications. This architecture will completely eliminate the use of any extra PLC (Programmable Logic Controller) or similar control hardware in any automation network as the control functions are firmware coded inside intelligent meters itself. Here, we describe the indigenously built project of a cryogenic control system built for linear accelerator at Inter University Accelerator Centre, known as "CADS," which stands for "Complete Automation of Distribution System." CADS deals with complete hardware, firmware, and software implementation of the automated linac cryogenic distribution system using many Ethernet based embedded cryogenic instruments developed in-house. Each instrument works as an intelligent meter called device-server which has the control functions and control loops built inside the firmware itself. Dedicated meters with built-in servers were designed out of ARM (Acorn RISC (Reduced Instruction Set Computer) Machine) and ATMEL processors and COTS (Commercially Off-the-Shelf) SMD (Surface Mount Devices) components, with analog sensor front-end and a digital back-end web server implementing remote procedure call over HTTP for digital control and readout functions. At present, 24 instruments which run 58 embedded servers inside, each specific to a particular type of sensor-actuator combination for closed loop operations, are now deployed and distributed across control LAN (Local

  17. Development of intelligent instruments with embedded HTTP servers for control and data acquisition in a cryogenic setup--The hardware, firmware, and software implementation.

    Science.gov (United States)

    Antony, Joby; Mathuria, D S; Datta, T S; Maity, Tanmoy

    2015-12-01

    The power of Ethernet for control and automation technology is being largely understood by the automation industry in recent times. Ethernet with HTTP (Hypertext Transfer Protocol) is one of the most widely accepted communication standards today. Ethernet is best known for being able to control through internet from anywhere in the globe. The Ethernet interface with built-in on-chip embedded servers ensures global connections for crate-less model of control and data acquisition systems which have several advantages over traditional crate-based control architectures for slow applications. This architecture will completely eliminate the use of any extra PLC (Programmable Logic Controller) or similar control hardware in any automation network as the control functions are firmware coded inside intelligent meters itself. Here, we describe the indigenously built project of a cryogenic control system built for linear accelerator at Inter University Accelerator Centre, known as "CADS," which stands for "Complete Automation of Distribution System." CADS deals with complete hardware, firmware, and software implementation of the automated linac cryogenic distribution system using many Ethernet based embedded cryogenic instruments developed in-house. Each instrument works as an intelligent meter called device-server which has the control functions and control loops built inside the firmware itself. Dedicated meters with built-in servers were designed out of ARM (Acorn RISC (Reduced Instruction Set Computer) Machine) and ATMEL processors and COTS (Commercially Off-the-Shelf) SMD (Surface Mount Devices) components, with analog sensor front-end and a digital back-end web server implementing remote procedure call over HTTP for digital control and readout functions. At present, 24 instruments which run 58 embedded servers inside, each specific to a particular type of sensor-actuator combination for closed loop operations, are now deployed and distributed across control LAN (Local

  18. Playback system designed for X-Band SAR

    International Nuclear Information System (INIS)

    Yuquan, Liu; Changyong, Dou

    2014-01-01

    SAR(Synthetic Aperture Radar) has extensive application because it is daylight and weather independent. In particular, X-Band SAR strip map, designed by Institute of Remote Sensing and Digital Earth, Chinese Academy of Sciences, provides high ground resolution images, at the same time it has a large spatial coverage and a short acquisition time, so it is promising in multi-applications. When sudden disaster comes, the emergency situation acquires radar signal data and image as soon as possible, in order to take action to reduce loss and save lives in the first time. This paper summarizes a type of X-Band SAR playback processing system designed for disaster response and scientific needs. It describes SAR data workflow includes the payload data transmission and reception process. Playback processing system completes signal analysis on the original data, providing SAR level 0 products and quick image. Gigabit network promises radar signal transmission efficiency from recorder to calculation unit. Multi-thread parallel computing and ping pong operation can ensure computation speed. Through gigabit network, multi-thread parallel computing and ping pong operation, high speed data transmission and processing meet the SAR radar data playback real time requirement

  19. Playback system designed for X-Band SAR

    Science.gov (United States)

    Yuquan, Liu; Changyong, Dou

    2014-03-01

    SAR(Synthetic Aperture Radar) has extensive application because it is daylight and weather independent. In particular, X-Band SAR strip map, designed by Institute of Remote Sensing and Digital Earth, Chinese Academy of Sciences, provides high ground resolution images, at the same time it has a large spatial coverage and a short acquisition time, so it is promising in multi-applications. When sudden disaster comes, the emergency situation acquires radar signal data and image as soon as possible, in order to take action to reduce loss and save lives in the first time. This paper summarizes a type of X-Band SAR playback processing system designed for disaster response and scientific needs. It describes SAR data workflow includes the payload data transmission and reception process. Playback processing system completes signal analysis on the original data, providing SAR level 0 products and quick image. Gigabit network promises radar signal transmission efficiency from recorder to calculation unit. Multi-thread parallel computing and ping pong operation can ensure computation speed. Through gigabit network, multi-thread parallel computing and ping pong operation, high speed data transmission and processing meet the SAR radar data playback real time requirement.

  20. The GBTIA, a 5 Gbit/s Radiation-Hard Optical Receiver for the SLHC Upgrades

    CERN Document Server

    Menouni, M; Moreira, P

    2009-01-01

    The GigaBit Transceiver (GBT) is a high-speed optical transmission system currently under development for HEP applications. This system will implement bi-directional optical links to be used in the radiation environment of the Super LHC. The GigaBit Transimpedance Amplifier (GBTIA) is the front-end optical receiver of the GBT chip set. This paper presents the GBTIA, a 5 Gbit/s, fully differential, and highly sensitive optical receiver designed and implemented in a commercial 0.13 μm CMOS process. When connected to a PIN-diode, the GBTIA displays a sensitivity better than −19 dBm for a BER of 10−12. The differential output across an external 50 Ω load remains constant at 400 mVpp even for signals near the sensitivity limit. The chip achieves an overall transimpedance gain of 20 kΩ with a measured bandwidth of 4 GHz. The total power consumption of the chip is less than 120 mW and the chip die size is 0.75 mm x 1.25 mm. Irradiation testing of the chip shows no performance degradation after a dose rate of ...