WorldWideScience

Sample records for gate oxide integrity

  1. The gate oxide integrity of CVD tungsten polycide

    International Nuclear Information System (INIS)

    Wu, N.W.; Su, W.D.; Chang, S.W.; Tseng, M.F.

    1988-01-01

    CVD tungsten polycide has been demonstrated as a good gate material in recent very large scale integration (VLSI) technology. CVD tungsten silicide offers advantages of low resistivity, high temperature stability and good step coverage. On the other hand, the polysilicon underlayer preserves most characteristics of the polysilicon gate and acts as a stress buffer layer to absorb part of the thermal stress origin from the large thermal expansion coefficient of tungsten silicide. Nevertheless, the gate oxide of CVD tungsten polycide is less stable or reliable than that of polysilicon gate. In this paper, the gate oxide integrity of CVD tungsten polycide with various thickness combinations and different thermal processes have been analyzed by several electrical measurements including breakdown yield, breakdown fluence, room temperature TDDB, I-V characteristics, electron traps and interface state density

  2. Impact of metal-ion contaminated silica particles on gate oxide integrity

    NARCIS (Netherlands)

    Rink, Ingrid; Wali, F.; Knotter, D.M.

    2009-01-01

    The impact of metal-ion contamination (present on wafer surface before oxidation) on gate oxide integrity (GOI) is well known in literature, which is not the case for clean silica particles [1, 2]. However, it is known that particles present in ultra-pure water (UPW) decrease the random yield in

  3. Flexible Proton-Gated Oxide Synaptic Transistors on Si Membrane.

    Science.gov (United States)

    Zhu, Li Qiang; Wan, Chang Jin; Gao, Ping Qi; Liu, Yang Hui; Xiao, Hui; Ye, Ji Chun; Wan, Qing

    2016-08-24

    Ion-conducting materials have received considerable attention for their applications in fuel cells, electrochemical devices, and sensors. Here, flexible indium zinc oxide (InZnO) synaptic transistors with multiple presynaptic inputs gated by proton-conducting phosphorosilicate glass-based electrolyte films are fabricated on ultrathin Si membranes. Transient characteristics of the proton gated InZnO synaptic transistors are investigated, indicating stable proton-gating behaviors. Short-term synaptic plasticities are mimicked on the proposed proton-gated synaptic transistors. Furthermore, synaptic integration regulations are mimicked on the proposed synaptic transistor networks. Spiking logic modulations are realized based on the transition between superlinear and sublinear synaptic integration. The multigates coupled flexible proton-gated oxide synaptic transistors may be interesting for neuroinspired platforms with sophisticated spatiotemporal information processing.

  4. Three-channel gated nanosecond integrator

    International Nuclear Information System (INIS)

    Tsirkel', B.I.; Martsinovskij, A.M.

    1981-01-01

    Structure and principle of operation of three-channel gated integrator for investigating the shape of periodical electric and optical signals at high background noise level are described. The integrator consists of an integrating circuit itself for each channel and a circuit of gating pulse formation. If the noise level doesn't exceed the signal, the value of storage capacity can be equal to 22 nF. The value of storage capacity must be increased in the case of a worse signal-to-noise ratio. The gating pulse formation circuit includes a comparator, a sawtooth voltage generator and a reference voltage generator. An integrator flowsheet is given. The time resolution of the system is about 50 ns, time sweep amounts to 5-2000 μs, electric signal sensitivity is about 70 μV. The pulse signal shape recording is performed with manual or automated time sweep at two-coordinate potentiometer. The light signal detection is made on the base of photomultiplier pulse counting rate record by the dynamic capacitor method, sensitivity limit amounts to about 1 pulse/s

  5. Gated integrator with signal baseline subtraction

    Energy Technology Data Exchange (ETDEWEB)

    Wang, X.

    1996-12-17

    An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window. 5 figs.

  6. Gated integrator with signal baseline subtraction

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Xucheng (Lisle, IL)

    1996-01-01

    An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window.

  7. Engineering integrated photonics for heralded quantum gates.

    Science.gov (United States)

    Meany, Thomas; Biggerstaff, Devon N; Broome, Matthew A; Fedrizzi, Alessandro; Delanty, Michael; Steel, M J; Gilchrist, Alexei; Marshall, Graham D; White, Andrew G; Withford, Michael J

    2016-06-10

    Scaling up linear-optics quantum computing will require multi-photon gates which are compact, phase-stable, exhibit excellent quantum interference, and have success heralded by the detection of ancillary photons. We investigate the design, fabrication and characterisation of the optimal known gate scheme which meets these requirements: the Knill controlled-Z gate, implemented in integrated laser-written waveguide arrays. We show device performance to be less sensitive to phase variations in the circuit than to small deviations in the coupler reflectivity, which are expected given the tolerance values of the fabrication method. The mode fidelity is also shown to be less sensitive to reflectivity and phase errors than the process fidelity. Our best device achieves a fidelity of 0.931 ± 0.001 with the ideal 4 × 4 unitary circuit and a process fidelity of 0.680 ± 0.005 with the ideal computational-basis process.

  8. Engineering integrated photonics for heralded quantum gates

    Science.gov (United States)

    Meany, Thomas; Biggerstaff, Devon N.; Broome, Matthew A.; Fedrizzi, Alessandro; Delanty, Michael; Steel, M. J.; Gilchrist, Alexei; Marshall, Graham D.; White, Andrew G.; Withford, Michael J.

    2016-06-01

    Scaling up linear-optics quantum computing will require multi-photon gates which are compact, phase-stable, exhibit excellent quantum interference, and have success heralded by the detection of ancillary photons. We investigate the design, fabrication and characterisation of the optimal known gate scheme which meets these requirements: the Knill controlled-Z gate, implemented in integrated laser-written waveguide arrays. We show device performance to be less sensitive to phase variations in the circuit than to small deviations in the coupler reflectivity, which are expected given the tolerance values of the fabrication method. The mode fidelity is also shown to be less sensitive to reflectivity and phase errors than the process fidelity. Our best device achieves a fidelity of 0.931 ± 0.001 with the ideal 4 × 4 unitary circuit and a process fidelity of 0.680 ± 0.005 with the ideal computational-basis process.

  9. Double gated-integrator for shaping nuclear radiation detector signals

    International Nuclear Information System (INIS)

    Gal, J.

    2001-01-01

    A new shaper, the double gated-integrator, for shaping nuclear radiation detector signals is investigated both theoretically and experimentally. The double gated-integrator consists of a pre-filter and two cascaded gated integrators. Two kinds of pre-filters were considered: a rectangular one and an exponential one. The results of the theoretical calculation show that the best figure of demerit for the double gated-integrator with exponential pre-filter is 1.016. This means that its noise to signal ratio is only 1.6% worse than that it is for infinite cusp shaping. The practical realization of the exponential pre-filter and that of the double gated integrator, both in analogue and in digital way, is very simple. Therefore, the double gated-integrator with exponential pre-filter could be a promising solution for shaping nuclear radiation detector signals

  10. Impact of oxide thickness on gate capacitance – Modelling and ...

    Indian Academy of Sciences (India)

    Department of Electronics and Communication Engineering, National ... conventional HEMT, Schottky barrier diode is formed at the gate electrode. .... term corresponds to the energy required for the electric field in the oxide layer and the.

  11. Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

    Science.gov (United States)

    An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

    2016-11-01

    Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

  12. Precise linear gating circuit on integrated microcircuits

    Energy Technology Data Exchange (ETDEWEB)

    Butskii, V.V.; Vetokhin, S.S.; Reznikov, I.V.

    Precise linear gating circuit on four microcircuits is described. A basic flowsheet of the gating circuit is given. The gating circuit consists of two input differential cascades total load of which is two current followers possessing low input and high output resistances. Follower outlets are connected to high ohmic dynamic load formed with a current source which permits to get high amplification (>1000) at one cascade. Nonlinearity amounts to <0.1% in the range of input signal amplitudes of -10-+10 V. Front duration for an output signal with 10 V amplitude amounts to 100 ns. Attenuation of input signal with a closed gating circuit is 60 db. The gating circuits described is used in the device intended for processing of scintillation sensor signals.

  13. A gate enhanced power U-shaped MOSFET integrated with a Schottky rectifier

    International Nuclear Information System (INIS)

    Wang Ying; Jiao Wen-Li; Hu Hai-Fan; Liu Yun-Tao; Cao Fei

    2012-01-01

    An accumulation gate enhanced power U-shaped metal-oxide-semiconductor field-effect-transistor (UMOSFET) integrated with a Schottky rectifier is proposed. In this device, a Schottky rectifier is integrated into each cell of the accumulation gate enhanced power UMOSFET. Specific on-resistances of 7.7 mΩ·mm 2 and 6.5 mΩ·mm 2 for the gate bias voltages of 5 V and 10 V are achieved, respectively, and the breakdown voltage is 61 V. The numerical simulation shows a 25% reduction in the reverse recovery time and about three orders of magnitude reduction in the leakage current as compared with the accumulation gate enhanced power UMOSFET. (condensed matter: structural, mechanical, and thermal properties)

  14. Integration of biomolecular logic gates with field-effect transducers

    Energy Technology Data Exchange (ETDEWEB)

    Poghossian, A., E-mail: a.poghossian@fz-juelich.de [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Malzahn, K. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Abouzar, M.H. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Mehndiratta, P. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Katz, E. [Department of Chemistry and Biomolecular Science, NanoBio Laboratory (NABLAB), Clarkson University, Potsdam, NY 13699-5810 (United States); Schoening, M.J. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany)

    2011-11-01

    Highlights: > Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. > The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. > Logic gates were activated by different combinations of chemical inputs (analytes). > The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO{sub 2}-Ta{sub 2}O{sub 5} structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta{sub 2}O{sub 5}) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  15. Integration of biomolecular logic gates with field-effect transducers

    International Nuclear Information System (INIS)

    Poghossian, A.; Malzahn, K.; Abouzar, M.H.; Mehndiratta, P.; Katz, E.; Schoening, M.J.

    2011-01-01

    Highlights: → Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. → The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. → Logic gates were activated by different combinations of chemical inputs (analytes). → The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO 2 -Ta 2 O 5 structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta 2 O 5 ) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  16. CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

    Science.gov (United States)

    Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O’Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto

    2018-04-01

    Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM) technology. In this paper, the CMOS integration of diffusion and gate replacement (D&GR) high-k/metal gate stacks is investigated, evaluating four different approaches for the critical patterning step of removing the N-type field effect transistor (NFET) effective work function (eWF) shifter stack from the P-type field effect transistor (PFET) area. The effect of plasma exposure during the patterning step is investigated in detail and found to have a strong impact on threshold voltage tunability. A CMOS integration scheme based on an experimental wet-compatible photoresist is developed and the fulfillment of the main device metrics [equivalent oxide thickness (EOT), eWF, gate leakage current density, on/off currents, short channel control] is demonstrated.

  17. An oxide filled extended trench gate super junction MOSFET structure

    International Nuclear Information System (INIS)

    Cai-Lin, Wang; Jun, Sun

    2009-01-01

    This paper proposes an oxide filled extended trench gate super junction (SJ) MOSFET structure to meet the need of higher frequency power switches application. Compared with the conventional trench gate SJ MOSFET, new structure has the smaller input and output capacitances, and the remarkable improvements in the breakdown voltage, on-resistance and switching speed. Furthermore, the SJ in the new structure can be realized by the existing trench etching and shallow angle implantation, which offers more freedom to SJ MOSFET device design and fabrication. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  18. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    International Nuclear Information System (INIS)

    Lin, Y. H.; Chou, J. C.

    2015-01-01

    We investigated amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT_s) using different high-Κ gate dielectric materials such as silicon nitride (Si_3N_4) and aluminum oxide (Al_2O_3) at low temperature process (<300 degree) and compared them with low temperature silicon dioxide (SiO_2). The IGZO device with high-Κ gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, post annealing treatment is an essential process for completing the process. The chemical reaction of the high-κ/IGZO interface due to heat formation in high-Κ/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-Κ gate dielectric materials and explained the interface effect by charge band diagram.

  19. Phosphorus oxide gate dielectric for black phosphorus field effect transistors

    Science.gov (United States)

    Dickerson, W.; Tayari, V.; Fakih, I.; Korinek, A.; Caporali, M.; Serrano-Ruiz, M.; Peruzzini, M.; Heun, S.; Botton, G. A.; Szkopek, T.

    2018-04-01

    The environmental stability of the layered semiconductor black phosphorus (bP) remains a challenge. Passivation of the bP surface with phosphorus oxide, POx, grown by a reactive ion etch with oxygen plasma is known to improve photoluminescence efficiency of exfoliated bP flakes. We apply phosphorus oxide passivation in the fabrication of bP field effect transistors using a gate stack consisting of a POx layer grown by reactive ion etching followed by atomic layer deposition of Al2O3. We observe room temperature top-gate mobilities of 115 cm2 V-1 s-1 in ambient conditions, which we attribute to the low defect density of the bP/POx interface.

  20. Carbon nanotube transistors with graphene oxide films as gate dielectrics

    Institute of Scientific and Technical Information of China (English)

    2010-01-01

    Carbon nanomaterials,including the one-dimensional(1-D) carbon nanotube(CNT) and two-dimensional(2-D) graphene,are heralded as ideal candidates for next generation nanoelectronics.An essential component for the development of advanced nanoelectronics devices is processing-compatible oxide.Here,in analogy to the widespread use of silicon dioxide(SiO2) in silicon microelectronic industry,we report the proof-of-principle use of graphite oxide(GO) as a gate dielectrics for CNT field-effect transistor(FET) via a fast and simple solution-based processing in the ambient condition.The exceptional transistor characteristics,including low operation voltage(2 V),high carrier mobility(950 cm2/V-1 s-1),and the negligible gate hysteresis,suggest a potential route to the future all-carbon nanoelectronics.

  1. Chemical gating of epitaxial graphene through ultrathin oxide layers.

    Science.gov (United States)

    Larciprete, Rosanna; Lacovig, Paolo; Orlando, Fabrizio; Dalmiglio, Matteo; Omiciuolo, Luca; Baraldi, Alessandro; Lizzit, Silvano

    2015-08-07

    We achieved a controllable chemical gating of epitaxial graphene grown on metal substrates by exploiting the electrostatic polarization of ultrathin SiO2 layers synthesized below it. Intercalated oxygen diffusing through the SiO2 layer modifies the metal-oxide work function and hole dopes graphene. The graphene/oxide/metal heterostructure behaves as a gated plane capacitor with the in situ grown SiO2 layer acting as a homogeneous dielectric spacer, whose high capacity allows the Fermi level of graphene to be shifted by a few hundreds of meV when the oxygen coverage at the metal substrate is of the order of 0.5 monolayers. The hole doping can be finely tuned by controlling the amount of interfacial oxygen, as well as by adjusting the thickness of the oxide layer. After complete thermal desorption of oxygen the intrinsic doping of SiO2 supported graphene is evaluated in the absence of contaminants and adventitious adsorbates. The demonstration that the charge state of graphene can be changed by chemically modifying the buried oxide/metal interface hints at the possibility of tuning the level and sign of doping by the use of other intercalants capable of diffusing through the ultrathin porous dielectric and reach the interface with the metal.

  2. Nanoscale gadolinium oxide capping layers on compositionally variant gate dielectrics

    KAUST Repository

    Alshareef, Husam N.

    2010-11-19

    Metal gate work function enhancement using nanoscale (1.0 nm) Gd2O3 interfacial layers has been evaluated as a function of silicon oxide content in the HfxSiyOz gate dielectric and process thermal budget. It is found that the effective work function tuning by the Gd2O3 capping layer varied by nearly 400 mV as the composition of the underlying dielectric changed from 0% to 100% SiO2, and by nearly 300 mV as the maximum process temperature increased from ambient to 1000 °C. A qualitative model is proposed to explain these results, expanding the existing models for the lanthanide capping layer effect.

  3. Nanoscale gadolinium oxide capping layers on compositionally variant gate dielectrics

    KAUST Repository

    Alshareef, Husam N.; Caraveo-Frescas, J. A.; Cha, D. K.

    2010-01-01

    Metal gate work function enhancement using nanoscale (1.0 nm) Gd2O3 interfacial layers has been evaluated as a function of silicon oxide content in the HfxSiyOz gate dielectric and process thermal budget. It is found that the effective work function tuning by the Gd2O3 capping layer varied by nearly 400 mV as the composition of the underlying dielectric changed from 0% to 100% SiO2, and by nearly 300 mV as the maximum process temperature increased from ambient to 1000 °C. A qualitative model is proposed to explain these results, expanding the existing models for the lanthanide capping layer effect.

  4. Ultra-low power thin film transistors with gate oxide formed by nitric acid oxidation method

    International Nuclear Information System (INIS)

    Kobayashi, H.; Kim, W. B.; Matsumoto, T.

    2011-01-01

    We have developed a low temperature fabrication method of SiO 2 /Si structure by use of nitric acid, i.e., nitric acid oxidation of Si (NAOS) method, and applied it to thin film transistors (TFT). A silicon dioxide (SiO 2 ) layer formed by the NAOS method at room temperature possesses 1.8 nm thickness, and its leakage current density is as low as that of thermally grown SiO 2 layer with the same thickness formed at ∼900 deg C. The fabricated TFTs possess an ultra-thin NAOS SiO 2 /CVD SiO 2 stack gate dielectric structure. The ultrathin NAOS SiO 2 layer effectively blocks a gate leakage current, and thus, the thickness of the gate oxide layer can be decreased from 80 to 20 nm. The thin gate oxide layer enables to decrease the operation voltage to 2 V (cf. the conventional operation voltage of TFTs with 80 nm gate oxide: 12 V) because of the low threshold voltages, i.e., -0.5 V for P-ch TFTs and 0.5 V for N-ch TFTs, and thus the consumed power decreases to 1/36 of that of the conventional TFTs. The drain current increases rapidly with the gate voltage, and the sub-threshold voltage is ∼80 mV/dec. The low sub-threshold swing is attributable to the thin gate oxide thickness and low interface state density of the NAOS SiO 2 layer. (authors)

  5. High permittivity materials for oxide gate stack in Ge-based metal oxide semiconductor capacitors

    Energy Technology Data Exchange (ETDEWEB)

    Molle, Alessandro, E-mail: alessandro.molle@mdm.infm.i [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Baldovino, Silvia [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Dipartimento di Scienza dei Materiali, Universita degli Studi di Milano Bicocca, Milano (Italy); Spiga, Sabina [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Fanciulli, Marco [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Dipartimento di Scienza dei Materiali, Universita degli Studi di Milano Bicocca, Milano (Italy)

    2010-01-01

    In the effort to ultimately shrink the size of logic devices towards a post-Si era, the integration of Ge as alternative channel material for high-speed p-MOSFET devices and the concomitant coupling with high permittivity dielectrics (high-k) as gate oxides is currently a key-challenge in microelectronics. However, the Ge option still suffers from a number of unresolved drawbacks and open issues mainly related to the thermodynamic and electrical compatibility of Ge substrates with high-k gate stack. Strictly speaking, two main concerns can be emphasized. On one side is the dilemma on which chemical/physical passivation is more suitable to minimize the unavoidable presence of electrically active defects at the oxide/semiconductor interface. On the other side, overcoming the SiO{sub 2} gate stack opens the route to a number of potentially outperforming high-k oxides. Two deposition approaches were here separately adopted to investigate the high-k oxide growth on Ge substrates, the molecular beam deposition (MBD) of Gd{sub 2}O{sub 3} and the atomic layer deposition (ALD) of HfO{sub 2}. In the MBD framework epitaxial and amorphous Gd{sub 2}O{sub 3} films were grown onto GeO{sub 2}-passivated Ge substrates. In this case, Ge passivation was achieved by exploiting the Ge{sup 4+} bonding state in GeO{sub 2} ultra-thin interface layers intentionally deposited in between Ge and the high-k oxide by means of atomic oxygen exposure to Ge. The composition of the interface layer has been characterized as a function of the oxidation temperature and evidence of Ge dangling bonds at the GeO{sub 2}/Ge interface has been reported. Finally, the electrical response of MOS capacitors incorporating Gd{sub 2}O{sub 3} and GeO{sub 2}-passivated Ge substrates has been checked by capacitance-voltage measurements. On the other hand, the structural and electrical properties of HfO{sub 2} films grown by ALD on Ge by using different oxygen precursors, i.e. H{sub 2}O, Hf(O{sup t}Bu){sub 2}(mmp

  6. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

    International Nuclear Information System (INIS)

    Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

    2008-01-01

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter

  7. Multi-channel normal speed gated integrator in the measurement of the laser scattering light energy

    International Nuclear Information System (INIS)

    Yang Dong; Yu Xiaoqi; Hu Yuanfeng

    2005-01-01

    With the method of integration in a limited time, a Multi-channel normal speed gated integrator based on VXI system has been developed for measuring the signals with changeable pulse width in laser scattering light experiment. It has been tested with signal sources in ICF experiment. In tests, the integral nonlinearity between the integral results of the gated integrator and that of an oscilloscope is less than 1%. In the ICF experiments the maximum error between the integral results of the gated integrator and that of oscilloscope is less than 3% of the full scale range of the gated integrator. (authors)

  8. Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-03-01

    Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

  9. Gate-first integration of tunable work function metal gates of different thicknesses into high-k metal gates CMOS FinFETs for multi- VTh engineering

    KAUST Repository

    Hussain, Muhammad Mustafa; Smith, Casey Eben; Harris, Harlan Rusty; Young, Chadwin; Tseng, Hsinghuang; Jammy, Rajarao

    2010-01-01

    Gate-first integration of tunable work function metal gates of different thicknesses (320 nm) into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (VTh) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ∼ 40 mV/V), nearly symmetric VTh, low T inv(∼ 1.4 nm), and high Ion(∼780μAμm) for N/PMOS without any intentional strain enhancement. © 2006 IEEE.

  10. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

    Directory of Open Access Journals (Sweden)

    Paul C. McIntyre

    2012-07-01

    Full Text Available The literature on polar Gallium Nitride (GaN surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

  11. Analyzing nitrogen concentration using carrier illumination (CI) technology for DPN ultra-thin gate oxide

    International Nuclear Information System (INIS)

    Li, W.S.; Wu, Bill; Fan, Aki; Kuo, C.W.; Segovia, M.; Kek, H.A.

    2005-01-01

    Nitrogen concentration in the gate oxide plays a key role for 90 nm and below ULSI technology. Techniques like secondary ionization mass spectroscopy (SIMS) and X-ray photoelectron spectroscopy (XPS) are commonly used for understanding N concentration. This paper describes the application of the carrier illuminationTM (CI) technique to measure the nitrogen concentration in ultra-thin gate oxides. A set of ultra-thin gate oxide wafers with different DPN (decoupled plasma nitridation) treatment conditions were measured using the CI technique. The CI signal has excellent correlation with the N concentration as measured by XPS

  12. Modelling ionising radiation induced defect generation in bipolar oxides with gated diodes

    International Nuclear Information System (INIS)

    Barnaby, H.J.; Cirba, C.; Schrimpf, R.D.; Kosier, St.; Fouillat, P.; Montagner, X.

    1999-01-01

    Radiation-induced oxide defects that degrade electrical characteristics of bipolar junction transistor (BJTs) can be measured with the use of gated diodes. The buildup of defects and their effect on device radiation response are modeled with computer simulation. (authors)

  13. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2015-01-01

    Full Text Available We investigated amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using different high-k gate dielectric materials such as silicon nitride (Si3N4 and aluminum oxide (Al2O3 at low temperature process (<300°C and compared them with low temperature silicon dioxide (SiO2. The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.

  14. Gated integrator PXI-DAQ system for Thomson scattering diagnostics

    Energy Technology Data Exchange (ETDEWEB)

    Patel, Kiran, E-mail: kkpatel@ipr.res.in; Pillai, Vishal; Singh, Neha; Thomas, Jinto; Kumar, Ajai

    2017-06-15

    Gated Integrator (GI) PXI based data acquisition (DAQ) system has been designed and developed for the ease of acquiring fast Thomson Scattered signals (∼50 ns pulse width). The DAQ system consists of in-house designed and developed GI modules and PXI-1405 chassis with several PXI-DAQ modules. The performance of the developed system has been validated during the SST-1 campaigns. The dynamic range of the GI module depends on the integrating capacitor (C{sub i}) and the modules have been calibrated using 12 pF and 27 pF integrating capacitors. The developed GI module based data acquisition system consists of sixty four channels for simultaneous sampling using eight PXI based digitization modules having eight channels per module. The error estimation and functional tests of this unit are carried out using standard source and also with the fast detectors used for Thomson scattering diagnostics. User friendly Graphical User Interface (GUI) has been developed using LabVIEW on Windows platform to control and acquire the Thomson scattering signal. A robust, easy to operate and maintain with low power consumption, having higher dynamic range with very good sensitivity and cost effective DAQ system is developed and tested for the SST-1 Thomson scattering diagnostics.

  15. High-density carrier-accumulated and electrically stable oxide thin-film transistors from ion-gel gate dielectric.

    Science.gov (United States)

    Fujii, Mami N; Ishikawa, Yasuaki; Miwa, Kazumoto; Okada, Hiromi; Uraoka, Yukiharu; Ono, Shimpei

    2015-12-18

    The use of indium-gallium-zinc oxide (IGZO) has paved the way for high-resolution uniform displays or integrated circuits with transparent and flexible devices. However, achieving highly reliable devices that use IGZO for low-temperature processes remains a technological challenge. We propose the use of IGZO thin-film transistors (TFTs) with an ionic-liquid gate dielectric in order to achieve high-density carrier-accumulated IGZO TFTs with high reliability, and we discuss a distinctive mechanism for the degradation of this organic-inorganic hybrid device under long-term electrical stress. Our results demonstrated that an ionic liquid or gel gate dielectric provides highly reliable and low-voltage operation with IGZO TFTs. Furthermore, high-density carrier accumulation helps improve the TFT characteristics and reliability, and it is highly relevant to the electronic phase control of oxide materials and the degradation mechanism for organic-inorganic hybrid devices.

  16. A Review of Nanoscale Channel and Gate Engineered FINFETs for VLSI Mixed Signal Applications Using Zirconium-di-Oxide Dielectrics

    Directory of Open Access Journals (Sweden)

    D.Nirmal

    2014-07-01

    Full Text Available In the past, most of the research and development efforts in the area of CMOS and IC’s are oriented towards reducing the power and increasing the gain of the circuits. While focusing the attention on low power and high gain in the device, the materials of the device also been taken into consideration. In the present technology, Computationally intensive devices with low power dissipation and high gain are becoming a critical application domain. Several factors have contributed to this paradigm shift. The primary driving factor being the increase in scale of integration, the chip has to accommodate smaller and faster transistors than their predecessors. During the last decade semiconductor technology has been led by conventional scaling. Scaling, has been aimed towards higher speed, lower power and higher density of the semiconductor devices. However, as scaling approached its physical limits, it has become more difficult and challenging for fabrication industry. Therefore, tremendous research has been carried out to investigate the alternatives, and this led to the introduction of new Nano materials and concepts to overcome the difficulties in the device fabrications. In order to reduce the leakage current and parasitic capacitance in devices, gate oxide high-k dielectric materials are explored. Among the different high-k materials available the nano size Zirconium dioxide material is suggested as an alternate gate oxide material for devices due to its thermal stability and small grain size of material. To meet the requirements of ITRS roadmap 2012, the Multi gate devices are considered to be one of the most promising technologies for the future microelectronics industry due to its excellent immunity to short channel effects and high value of On current. The double gate or multi gate devices provide a better scalability option due to its excellent immunity to short-channel effects. Here the different high-k materials are replaced in different

  17. Analysis of chemical bond states and electrical properties of stacked AlON/HfO{sub 2} gate oxides formed by using a layer-by-layer technique

    Energy Technology Data Exchange (ETDEWEB)

    Choi, Wonjoon; Lee, Jonghyun; Yang, Jungyup; Kim, Chaeok; Hong, Jinpyo; Nahm, Tschanguh; Byun, Byungsub; Kim, Moseok [Hanyang University, Seoul (Korea, Republic of)

    2006-06-15

    Stacked AlON/HfO{sub 2} thin films for gate oxides in metal-oxide-semiconductor devices are successfully prepared on Si substrates by utilizing a layer-by-layer technique integrated with an off-axis RF remote plasma sputtering process at room temperature. This off-axis structure is designed to improve the uniformity and the quality of gate oxide films. Also, a layer-by-layer technique is used to control the interface layer between the gate oxide and the Si substrate. The electrical properties of our stacked films are characterized by using capacitance versus voltage and leakage current versus voltage measurements. The stacked AlON/HfO{sub 2} gate oxide exhibits a low leakage current of about 10{sup -6} A/cm{sup 2} and a high dielectric constant value of 14.26 by effectively suppressing the interface layer between gate oxide and Si substrate. In addition, the chemical bond states and the optimum thickness of each AlON and HfO{sub 2} thin film are analyzed using X-ray photoemission spectroscopy and transmission electron microscopy measurement.

  18. Direct deposition of aluminum oxide gate dielectric on graphene channel using nitrogen plasma treatment

    International Nuclear Information System (INIS)

    Lim, Taekyung; Kim, Dongchool; Ju, Sanghyun

    2013-01-01

    Deposition of high-quality dielectric on a graphene channel is an essential technology to overcome structural constraints for the development of nano-electronic devices. In this study, we investigated a method for directly depositing aluminum oxide (Al 2 O 3 ) on a graphene channel through nitrogen plasma treatment. The deposited Al 2 O 3 thin film on graphene demonstrated excellent dielectric properties with negligible charge trapping and de-trapping in the gate insulator. A top-gate-structural graphene transistor was fabricated using Al 2 O 3 as the gate dielectric with nitrogen plasma treatment on graphene channel region, and exhibited p-type transistor characteristics

  19. An Integrated Gate Turnaround Management Concept Leveraging Big Data/Analytics for NAS Performance Improvements

    Science.gov (United States)

    Chung, William; Chachad, Girish; Hochstetler, Ronald

    2016-01-01

    The Integrated Gate Turnaround Management (IGTM) concept was developed to improve the gate turnaround performance at the airport by leveraging relevant historical data to support optimization of airport gate operations, which include: taxi to the gate, gate services, push back, taxi to the runway, and takeoff, based on available resources, constraints, and uncertainties. By analyzing events of gate operations, primary performance dependent attributes of these events were identified for the historical data analysis such that performance models can be developed based on uncertainties to support descriptive, predictive, and prescriptive functions. A system architecture was developed to examine system requirements in support of such a concept. An IGTM prototype was developed to demonstrate the concept using a distributed network and collaborative decision tools for stakeholders to meet on time pushback performance under uncertainties.

  20. Bias-induced migration of ionized donors in amorphous oxide semiconductor thin-film transistors with full bottom-gate and partial top-gate structures

    Directory of Open Access Journals (Sweden)

    Mallory Mativenga

    2012-09-01

    Full Text Available Bias-induced charge migration in amorphous oxide semiconductor thin-film transistors (TFTs confirmed by overshoots of mobility after bias stressing dual gated TFTs is presented. The overshoots in mobility are reversible and only occur in TFTs with a full bottom-gate (covers the whole channel and partial top-gate (covers only a portion of the channel, indicating a bias-induced uneven distribution of ionized donors: Ionized donors migrate towards the region of the channel that is located underneath the partial top-gate and the decrease in the density of ionized donors in the uncovered portion results in the reversible increase in mobility.

  1. Effect of top gate potential on bias-stress for dual gate amorphous indium-gallium-zinc-oxide thin film transistor

    Energy Technology Data Exchange (ETDEWEB)

    Chun, Minkyu; Um, Jae Gwang; Park, Min Sang; Chowdhury, Md Delwar Hossain; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 02447 (Korea, Republic of)

    2016-07-15

    We report the abnormal behavior of the threshold voltage (V{sub TH}) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). It is found that the PBTS at top gate shows negative transfer shift and NBTS shows positive transfer shift for both top and bottom gate sweep. The shift of bottom/top gate sweep is dominated by top gate bias (V{sub TG}), while bottom gate bias (V{sub BG}) is less effect than V{sub TG}. The X-ray photoelectron spectroscopy (XPS) depth profile provides the evidence of In metal diffusion to the top SiO{sub 2}/a-IGZO and also the existence of large amount of In{sup +} under positive top gate bias around top interfaces, thus negative transfer shift is observed. On the other hand, the formation of OH{sup −} at top interfaces under the stress of negative top gate bias shows negative transfer shift. The domination of V{sub TG} both on bottom/top gate sweep after PBTS/NBTS is obviously occurred due to thin active layer.

  2. Integrated-optics heralded controlled-NOT gate for polarization-encoded qubits

    Science.gov (United States)

    Zeuner, Jonas; Sharma, Aditya N.; Tillmann, Max; Heilmann, René; Gräfe, Markus; Moqanaki, Amir; Szameit, Alexander; Walther, Philip

    2018-03-01

    Recent progress in integrated-optics technology has made photonics a promising platform for quantum networks and quantum computation protocols. Integrated optical circuits are characterized by small device footprints and unrivalled intrinsic interferometric stability. Here, we take advantage of femtosecond-laser-written waveguides' ability to process polarization-encoded qubits and present an implementation of a heralded controlled-NOT gate on chip. We evaluate the gate performance in the computational basis and a superposition basis, showing that the gate can create polarization entanglement between two photons. Transmission through the integrated device is optimized using thermally expanded core fibers and adiabatically reduced mode-field diameters at the waveguide facets. This demonstration underlines the feasibility of integrated quantum gates for all-optical quantum networks and quantum repeaters.

  3. Reliability study of ultra-thin gate oxides on strained-Si/SiGe MOS structures

    International Nuclear Information System (INIS)

    Varzgar, John B.; Kanoun, Mehdi; Uppal, Suresh; Chattopadhyay, Sanatan; Tsang, Yuk Lun; Escobedo-Cousins, Enrique; Olsen, Sarah H.; O'Neill, Anthony; Hellstroem, Per-Erik; Edholm, Jonas; Ostling, Mikael; Lyutovich, Klara; Oehme, Michael; Kasper, Erich

    2006-01-01

    The reliability of gate oxides on bulk Si and strained Si (s-Si) has been evaluated using constant voltage stressing (CVS) to investigate their breakdown characteristics. The s-Si architectures exhibit a shorter life time compared to that of bulk Si, which is attributed to higher bulk oxide charges (Q ox ) and increased surface roughness in the s-Si structures. The gate oxide in the s-Si structure exhibits a hard breakdown (HBD) at 1.9 x 10 4 s, whereas HBD is not observed in bulk Si up to a measurement period of 1.44 x 10 5 s. The shorter lifetime of the s-Si gate oxide is attributed to a larger injected charge (Q inj ) compared to Q inj in bulk Si. Current-voltage (I-V) measurements for bulk Si samples at different stress intervals show an increase in stress induced leakage current (SILC) of two orders in the low voltage regime from zero stress time to up to 5 x 10 4 s. In contrast, superior performance enhancements in terms of drain current, maximum transconductance and effective channel mobility are observed in s-Si MOSFET devices compared to bulk Si. The results from this study indicate that further improvement in gate oxide reliability is needed to exploit the sustained performance enhancement of s-Si devices over bulk Si

  4. Degradation of ultra-thin gate oxide LDD NMOSFET under GIDL stress

    International Nuclear Information System (INIS)

    Hu Shigang; Hao Yue; Cao Yanrong; Ma Xiaohua; Wu Xiaofeng; Chen Chi; Zhou Qingjun

    2009-01-01

    The degradation of device under GIDL (gate-induced drain leakage current) stress has been studied using LDD NMOSFETs with 1.4 nm gate oxides. Experimental result shows that the degradation of device parameters depends more strongly on V d than on V g . The characteristics of the GIDL current are used to analyze the damage generated during the stress. It is clearly found that the change of GIDL current before and after stress can be divided into two stages. The trapping of holes in the oxide is dominant in the first stage, but that of electrons in the oxide is dominant in the second stage. It is due to the common effects of edge direct tunneling and band-to-band tunneling. SILC (stress induced leakage current) in the NMOSFET decreases with increasing stress time under GIDL stress. The degradation characteristic of SILC also shows saturating time dependence. SILC is strongly dependent on the measured gate voltage. The higher the measured gate voltage, the less serious the degradation of the gate current. A likely mechanism is presented to explain the origin of SILC during GIDL stress.

  5. Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator

    Science.gov (United States)

    Kornijcuk, Vladimir; Lim, Hyungkwang; Seok, Jun Yeong; Kim, Guhyun; Kim, Seong Keun; Kim, Inho; Choi, Byung Joon; Jeong, Doo Seok

    2016-01-01

    The artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex. PMID:27242416

  6. Single-electron-occupation metal-oxide-semiconductor quantum dots formed from efficient poly-silicon gate layout

    Energy Technology Data Exchange (ETDEWEB)

    Carroll, Malcolm S.; rochette, sophie; Rudolph, Martin; Roy, A. -M.; Curry, Matthew Jon; Ten Eyck, Gregory A.; Manginell, Ronald P.; Wendt, Joel R.; Pluym, Tammy; Carr, Stephen M; Ward, Daniel Robert; Lilly, Michael; pioro-ladriere, michel

    2017-07-01

    We introduce a silicon metal-oxide-semiconductor quantum dot structure that achieves dot-reservoir tunnel coupling control without a dedicated barrier gate. The elementary structure consists of two accumulation gates separated spatially by a gap, one gate accumulating a reservoir and the other a quantum dot. Control of the tunnel rate between the dot and the reservoir across the gap is demonstrated in the single electron regime by varying the reservoir accumulation gate voltage while compensating with the dot accumulation gate voltage. The method is then applied to a quantum dot connected in series to source and drain reservoirs, enabling transport down to the single electron regime. Finally, tuning of the valley splitting with the dot accumulation gate voltage is observed. This split accumulation gate structure creates silicon quantum dots of similar characteristics to other realizations but with less electrodes, in a single gate stack subtractive fabrication process that is fully compatible with silicon foundry manufacturing.

  7. Long-Term Synaptic Plasticity Emulated in Modified Graphene Oxide Electrolyte Gated IZO-Based Thin-Film Transistors.

    Science.gov (United States)

    Yang, Yi; Wen, Juan; Guo, Liqiang; Wan, Xiang; Du, Peifu; Feng, Ping; Shi, Yi; Wan, Qing

    2016-11-09

    Emulating neural behaviors at the synaptic level is of great significance for building neuromorphic computational systems and realizing artificial intelligence. Here, oxide-based electric double-layer (EDL) thin-film transistors were fabricated using 3-triethoxysilylpropylamine modified graphene oxide (KH550-GO) electrolyte as the gate dielectrics. Resulting from the EDL effect and electrochemical doping between mobile protons and the indium-zinc-oxide channel layer, long-term synaptic plasticity was emulated in our devices. Synaptic functions including long-term memory, synaptic temporal integration, and dynamic filters were successfully reproduced. In particular, spike rate-dependent plasticity (SRDP), one of the basic learning rules of long-term plasticity in the neural network where the synaptic weight changes according to the rate of presynaptic spikes, was emulated in our devices. Our results may facilitate the development of neuromorphic computational systems.

  8. Electrostatically Gated Graphene-Zinc Oxide Nanowire Heterojunction.

    Science.gov (United States)

    You, Xueqiu; Pak, James Jungho

    2015-03-01

    This paper presents an electrostatically gated graphene-ZnO nanowire (NW) heterojunction for the purpose of device applications for the first time. A sub-nanometer-thick energy barrier width was formed between a monatomic graphene layer and electrochemically grown ZnO NWs. Because of the narrow energy barrier, electrons can tunnel through the barrier when a voltage is applied across the junction. A near-ohmic current-voltage (I-V) curve was obtained from the graphene-electrochemically grown ZnO NW heterojunction. This near-ohmic contact changed to asymmetric I-V Schottky contact when the samples were exposed to an oxygen environment. It is believed that the adsorbed oxygen atoms or molecules on the ZnO NW surface capture free electrons of the ZnO NWs, thereby creating a depletion region in the ZnO NWs. Consequentially, the electron concentration in the ZnO NWs is dramatically reduced, and the energy barrier width of the graphene-ZnO NW heterojunction increases greatly. This increased energy barrier width reduces the electron tunneling probability, resulting in a typical Schottky contact. By adjusting the back-gate voltage to control the graphene-ZnO NW Schottky energy barrier height, a large modulation on the junction current (on/off ratio of 10(3)) was achieved.

  9. Field-Programmable Gate Array-based fluxgate magnetometer with digital integration

    Science.gov (United States)

    Butta, Mattia; Janosek, Michal; Ripka, Pavel

    2010-05-01

    In this paper, a digital magnetometer based on printed circuit board fluxgate is presented. The fluxgate is pulse excited and the signal is extracted by gate integration. We investigate the possibility to perform integration on very narrow gates (typically 500 ns) by using digital techniques. The magnetometer is based on field-programmable gate array (FPGA) card: we will show all the advantages and disadvantages, given by digitalization of fluxgate output voltage by means of analog-to-digital converter on FPGA card, as well as digitalization performed by external digitizer. Due to very narrow gate, it is shown that a magnetometer entirely based on a FPGA card is preferable, because it avoids noise due to trigger instability. Both open loop and feedback operative mode are described and achieved results are presented.

  10. Solvothermal synthesis of gallium-indium-zinc-oxide nanoparticles for electrolyte-gated transistors.

    Science.gov (United States)

    Santos, Lídia; Nunes, Daniela; Calmeiro, Tomás; Branquinho, Rita; Salgueiro, Daniela; Barquinha, Pedro; Pereira, Luís; Martins, Rodrigo; Fortunato, Elvira

    2015-01-14

    Solution-processed field-effect transistors are strategic building blocks when considering low-cost sustainable flexible electronics. Nevertheless, some challenges (e.g., processing temperature, reliability, reproducibility in large areas, and cost effectiveness) are requirements that must be surpassed in order to achieve high-performance transistors. The present work reports electrolyte-gated transistors using as channel layer gallium-indium-zinc-oxide nanoparticles produced by solvothermal synthesis combined with a solid-state electrolyte based on aqueous dispersions of vinyl acetate stabilized with cellulose derivatives, acrylic acid ester in styrene and lithium perchlorate. The devices fabricated using this approach display a ION/IOFF up to 1 × 10(6), threshold voltage (VTh) of 0.3-1.9 V, and mobility up to 1 cm(2)/(V s), as a function of gallium-indium-zinc-oxide ink formulation and two different annealing temperatures. These results validates the usage of electrolyte-gated transistors as a viable and promising alternative for nanoparticle based semiconductor devices as the electrolyte improves the interface and promotes a more efficient step coverage of the channel layer, reducing the operating voltage when compared with conventional dielectrics gating. Moreover, it is shown that by controlling the applied gate potential, the operation mechanism of the electrolyte-gated transistors can be modified from electric double layer to electrochemical doping.

  11. Design of Higher-k and More Stable Rare Earth Oxides as Gate Dielectrics for Advanced CMOS Devices

    Directory of Open Access Journals (Sweden)

    Yi Zhao

    2012-08-01

    Full Text Available High permittivity (k gate dielectric films are widely studied to substitute SiO2 as gate oxides to suppress the unacceptable gate leakage current when the traditional SiO2 gate oxide becomes ultrathin. For high-k gate oxides, several material properties are dominantly important. The first one, undoubtedly, is permittivity. It has been well studied by many groups in terms of how to obtain a higher permittivity for popular high-k oxides, like HfO2 and La2O3. The second one is crystallization behavior. Although it’s still under the debate whether an amorphous film is definitely better than ploy-crystallized oxide film as a gate oxide upon considering the crystal boundaries induced leakage current, the crystallization behavior should be well understood for a high-k gate oxide because it could also, to some degree, determine the permittivity of the high-k oxide. Finally, some high-k gate oxides, especially rare earth oxides (like La2O3, are not stable in air and very hygroscopic, forming hydroxide. This topic has been well investigated in over the years and significant progresses have been achieved. In this paper, I will intensively review the most recent progresses of the experimental and theoretical studies for preparing higher-k and more stable, in terms of hygroscopic tolerance and crystallization behavior, Hf- and La-based ternary high-k gate oxides.

  12. Ternary rare-earth based alternative gate-dielectrics for future integration in MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Schubert, Juergen; Lopes, Joao Marcelo; Durgun Oezben, Eylem; Luptak, Roman; Lenk, Steffi; Zander, Willi; Roeckerath, Martin [IBN 1-IT, Forschungszentrum Juelich, 52425 Juelich (Germany)

    2009-07-01

    The dielectric SiO{sub 2} has been the key to the tremendous improvements in Si-based metal-oxide-semiconductor (MOS) device performance over the past four decades. It has, however, reached its limit in terms of scaling since it exhibits a leakage current density higher than 1 A/cm{sup 2} and does not retain its intrinsic physical properties at thicknesses below 1.5 nm. In order to overcome these problems and keep Moore's law ongoing, the use of higher dielectric constant (k) gate oxides has been suggested. These high-k materials must satisfy numerous requirements such as the high k, low leakage currents, suitable band gap und offsets to silicon. Rare-earth based dielectrics are promising materials which fulfill these needs. We will review the properties of REScO{sub 3} (RE = La, Dy, Gd, Sm, Tb) and LaLuO{sub 3} thin films, grown with pulsed laser deposition, e-gun evaporation or molecular beam deposition, integrated in capacitors and transistors. A k > 20 for the REScO{sub 3} (RE = Dy, Gd) and around 30 for (RE = La, Sm, Tb) and LaLuO{sub 3} are obtained. Transistors prepared on SOI and sSOI show mobility values up to 380 cm{sup 2}/Vs on sSOI, which are comparable to such prepared with HfO{sub 2}.

  13. Characterization, integration and reliability of HfO2 and LaLuO3 high-κ/metal gate stacks for CMOS applications

    International Nuclear Information System (INIS)

    Nichau, Alexander

    2013-01-01

    The continued downscaling of MOSFET dimensions requires an equivalent oxide thickness (EOT) of the gate stack below 1 nm. An EOT below 1.4 nm is hereby enabled by the use of high-κ/metal gate stacks. LaLuO 3 and HfO 2 are investigated as two different high-κ oxides on silicon in conjunction with TiN as the metal electrode. LaLuO 3 and its temperature-dependent silicate formation are characterized by hard X-ray photoemission spectroscopy (HAXPES). The effective attenuation length of LaLuO 3 is determined between 7 and 13 keV to enable future interface and diffusion studies. In a first investigation of LaLuO 3 on germanium, germanate formation is shown. LaLuO 3 is further integrated in a high-temperature MOSFET process flow with varying thermal treatment. The devices feature drive currents up to 70μA/μm at 1μm gate length. Several optimization steps are presented. The effective device mobility is related to silicate formation and thermal budget. At high temperature the silicate formation leads to mobility degradation due to La-rich silicate formation. The integration of LaLuO 3 in high-T processes delicately connects with the optimization of the TiN metal electrode. Hereby, stoichiometric TiN yields the best results in terms of thermal stability with respect to Si-capping and high-κ oxide. Different approaches are presented for a further EOT reduction with LaLuO 3 and HfO 2 . Thereby the thermodynamic and kinetic predictions are employed to estimate the behavior on the nanoscale. Based on thermodynamics, excess oxygen in the gate stack, especially in oxidized metal electrodes, is identified to prevent EOT scaling below 1.2 nm. The equivalent oxide thickness of HfO 2 gate stacks is scalable below 1 nm by the use of thinned interfacial SiO 2 . The prevention of oxygen incorporation into the metal electrode by Si-capping maintains the EOT after high temperature annealing. Redox systems are employed within the gate electrode to decrease the EOT of HfO 2 gate stacks

  14. Characterization, integration and reliability of HfO{sub 2} and LaLuO{sub 3} high-κ/metal gate stacks for CMOS applications

    Energy Technology Data Exchange (ETDEWEB)

    Nichau, Alexander

    2013-07-15

    The continued downscaling of MOSFET dimensions requires an equivalent oxide thickness (EOT) of the gate stack below 1 nm. An EOT below 1.4 nm is hereby enabled by the use of high-κ/metal gate stacks. LaLuO{sub 3} and HfO{sub 2} are investigated as two different high-κ oxides on silicon in conjunction with TiN as the metal electrode. LaLuO{sub 3} and its temperature-dependent silicate formation are characterized by hard X-ray photoemission spectroscopy (HAXPES). The effective attenuation length of LaLuO{sub 3} is determined between 7 and 13 keV to enable future interface and diffusion studies. In a first investigation of LaLuO{sub 3} on germanium, germanate formation is shown. LaLuO{sub 3} is further integrated in a high-temperature MOSFET process flow with varying thermal treatment. The devices feature drive currents up to 70μA/μm at 1μm gate length. Several optimization steps are presented. The effective device mobility is related to silicate formation and thermal budget. At high temperature the silicate formation leads to mobility degradation due to La-rich silicate formation. The integration of LaLuO{sub 3} in high-T processes delicately connects with the optimization of the TiN metal electrode. Hereby, stoichiometric TiN yields the best results in terms of thermal stability with respect to Si-capping and high-κ oxide. Different approaches are presented for a further EOT reduction with LaLuO{sub 3} and HfO{sub 2}. Thereby the thermodynamic and kinetic predictions are employed to estimate the behavior on the nanoscale. Based on thermodynamics, excess oxygen in the gate stack, especially in oxidized metal electrodes, is identified to prevent EOT scaling below 1.2 nm. The equivalent oxide thickness of HfO{sub 2} gate stacks is scalable below 1 nm by the use of thinned interfacial SiO{sub 2}. The prevention of oxygen incorporation into the metal electrode by Si-capping maintains the EOT after high temperature annealing. Redox systems are employed within the

  15. Scrum integration in stage-gate models for collaborative product development

    DEFF Research Database (Denmark)

    Sommer, Anita Friis; Slavensky, Andreas; Nguyen, Vivi Thuy

    2013-01-01

    to differentiate from low-cost competitors and increase PD performance, some industrial manufacturers now seek competitive advantage by experimenting with new ways for collaborative PD. This includes integrating customer-focused agile process models, like Scrum, from the software industry into their existing PD...... models. Thus, instead of replacing traditional stage-gate models agile methods are currently integrated in existing PD models generating hybrid solution for collaborative PD. This paper includes a study of three industrial cases that have successfully integrated Scrum into a stage-gate process model...

  16. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  17. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

    2016-01-01

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  18. Degradation of Ultra-Thin Gate Oxide NMOSFETs under CVDT and SHE Stresses

    International Nuclear Information System (INIS)

    Shi-Gang, Hu; Yan-Rong, Cao; Yue, Hao; Xiao-Hua, Ma; Chi, Chen; Xiao-Feng, Wu; Qing-Jun, Zhou

    2008-01-01

    Degradation of device under substrate hot-electron (SHE) and constant voltage direct-tunnelling (CVDT) stresses are studied using NMOSFET with 1.4-nm gate oxides. The degradation of device parameters and the degradation of the stress induced leakage current (SILC) under these two stresses are reported. The emphasis of this paper is on SILC and breakdown of ultra-thin-gate-oxide under these two stresses. SILC increases with stress time and several soft breakdown events occur during direct-tunnelling (DT) stress. During SHE stress, SILC firstly decreases with stress time and suddenly jumps to a high level, and no soft breakdown event is observed. For DT injection, the positive hole trapped in the oxide and hole direct-tunnelling play important roles in the breakdown. For SHE injection, it is because injected hot electrons accelerate the formation of defects and these defects formed by hot electrons induce breakdown. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  19. High performance solution processed zirconium oxide gate dielectric appropriate for low temperature device application

    Energy Technology Data Exchange (ETDEWEB)

    Hasan, Musarrat; Nguyen, Manh-Cuong; Kim, Hyojin; You, Seung-Won; Jeon, Yoon-Seok; Tong, Duc-Tai; Lee, Dong-Hwi; Jeong, Jae Kyeong; Choi, Rino, E-mail: rino.choi@inha.ac.kr

    2015-08-31

    This paper reports a solution processed electrical device with zirconium oxide gate dielectric that was fabricated at a low enough temperature appropriate for flexible electronics. Both inorganic dielectric and channel materials were synthesized in the same organic solvent. The dielectric constant achieved was 13 at 250 °C with a reasonably low leakage current. The bottom gate transistor devices showed the highest mobility of 75 cm{sup 2}/V s. The device is operated at low voltage with high-k dielectric with excellent transconductance and low threshold voltage. Overall, the results highlight the potential of low temperature solution based deposition in fabricating more complicated circuits for a range of applications. - Highlights: • We develop a low temperature inorganic dielectric deposition process. • We fabricate oxide semiconductor channel devices using all-solution processes. • Same solvent is used for dielectric and oxide semiconductor deposition.

  20. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-02-29

    Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

  1. The effects of gate oxide thickness on radiation damage in MOS system

    International Nuclear Information System (INIS)

    Zhu Hui; Yan Rongliang; Wang Yu; He Jinming

    1988-01-01

    The dependences of the flatband voltage shift (ΔV FB ) and the threshold voltage shift (ΔV TH ) in MOS system on the oxide thickness (T ox ) and on total irradiated dose (D) of electron-beam and 60 Co γ-ray have been studied. It has been found that ΔV FB ∝ T ox 3 , with +10V of gate bias during irradiation for n-Si substrate MOS capacitors; ΔV TH ∝ T ox 3 D 2/3 , with 'on' gate bias during irradiation for n- and P-channel MOS transistors; ΔV TP ∝ T ox 2 D 2/3 , with 'off' gate bias during irradiation for P-channel MOS transistors. These results are explained by Viswanathan model. According to ∼T ox 3 dependence, the optimization of radiation hardening process for MOS system is also simply discussed

  2. Development of multi-channel gated integrator and PXI-DAQ system for nuclear detector arrays

    International Nuclear Information System (INIS)

    Kong Jie; Su Hong; Chen Zhiqiang; Dong Chengfu; Qian Yi; Gao Shanshan; Zhou Chaoyang; Lu Wan; Ye Ruiping; Ma Junbing

    2010-01-01

    A multi-channel gated integrator and PXI based data acquisition system have been developed for nuclear detector arrays with hundreds of detector units. The multi-channel gated integrator can be controlled by a programmable GI controller. The PXI-DAQ system consists of NI PXI-1033 chassis with several PXI-DAQ cards. The system software has a user-friendly GUI which is written in C language using LabWindows/CVI under Windows XP operating system. The performance of the PXI-DAQ system is very reliable and capable of handling event rate up to 40 kHz.

  3. ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al{sub 2}O{sub 3} gate oxides

    Energy Technology Data Exchange (ETDEWEB)

    Yeom, Donghyuk; Kang, Jeongmin; Lee, Myoungwon; Jang, Jaewon; Yun, Junggwon; Jeong, Dong-Young; Yoon, Changjoon; Koo, Jamin; Kim, Sangsig [Department of Electrical Engineering and Institute for Nano Science, Korea University, Seoul 136-701 (Korea, Republic of)], E-mail: sangsig@korea.ac.kr

    2008-10-01

    The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al{sub 2}O{sub 3} tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8 V was observed in its drain current versus gate voltage (I{sub DS}-V{sub GS}) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper.

  4. ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al2O3 gate oxides

    International Nuclear Information System (INIS)

    Yeom, Donghyuk; Kang, Jeongmin; Lee, Myoungwon; Jang, Jaewon; Yun, Junggwon; Jeong, Dong-Young; Yoon, Changjoon; Koo, Jamin; Kim, Sangsig

    2008-01-01

    The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al 2 O 3 tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8 V was observed in its drain current versus gate voltage (I DS -V GS ) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper

  5. High performance top-gated indium–zinc–oxide thin film transistors with in-situ formed HfO{sub 2} gate insulator

    Energy Technology Data Exchange (ETDEWEB)

    Song, Yang, E-mail: yang_song@brown.edu [Department of Physics, Brown University, 182 Hope Street, Providence, RI 02912 (United States); Zaslavsky, A. [Department of Physics, Brown University, 182 Hope Street, Providence, RI 02912 (United States); School of Engineering, Brown University, 184 Hope Street, Providence, RI 02912 (United States); Paine, D.C. [School of Engineering, Brown University, 184 Hope Street, Providence, RI 02912 (United States)

    2016-09-01

    We report on top-gated indium–zinc–oxide (IZO) thin film transistors (TFTs) with an in-situ formed HfO{sub 2} gate dielectric insulator. Building on our previous demonstration of high-performance IZO TFTs with Al{sub 2}O{sub 3}/HfO{sub 2} gate dielectric, we now report on a one-step process, in which Hf is evaporated onto the 20 nm thick IZO channel, forming a partially oxidized HfO{sub x} layer, without any additional insulator in-between. After annealing in air at 300 °C, the in-situ reaction between partially oxidized Hf and IZO forms a high quality HfO{sub 2} gate insulator with a low interface trapped charge density N{sub TC} ~ 2.3 × 10{sup 11} cm{sup −2} and acceptably low gate leakage < 3 × 10{sup −7} A/cm{sup 2} at gate voltage V{sub G} = 1 V. The annealed TFTs with gate length L{sub G} = 50 μm have high mobility ~ 95 cm{sup 2}/V ∙ s (determined via the Y-function technique), high on/off ratio ~ 10{sup 7}, near-zero threshold voltage V{sub T} = − 0.02 V, and a subthreshold swing of 0.062 V/decade, near the theoretical limit. The on-current of our proof-of-concept TFTs is relatively low, but can be improved by reducing L{sub G}, indicating that high-performance top-gated HfO{sub 2}-isolated IZO TFTs can be fabricated using a single-step in-situ dielectric formation approach. - Highlights: • High-performance indium–zinc–oxide (IZO) thin film transistors (TFTs). • Single-step in-situ dielectric formation approach simplifies fabrication process. • During anneal, reaction between HfO{sub x} and IZO channel forms a high quality HfO{sub 2} layer. • Gate insulator HfO{sub 2} shows low interface trapped charge and small gate leakage. • TFTs have high mobility, near-zero threshold voltage, and a low subthreshold swing.

  6. Comprehensive Study of Lanthanum Aluminate High-Dielectric-Constant Gate Oxides for Advanced CMOS Devices

    Directory of Open Access Journals (Sweden)

    Masamichi Suzuki

    2012-03-01

    Full Text Available A comprehensive study of the electrical and physical characteristics of Lanthanum Aluminate (LaAlO3 high-dielectric-constant gate oxides for advanced CMOS devices was performed. The most distinctive feature of LaAlO3 as compared with Hf-based high-k materials is the thermal stability at the interface with Si, which suppresses the formation of a low-permittivity Si oxide interfacial layer. Careful selection of the film deposition conditions has enabled successful deposition of an LaAlO3 gate dielectric film with an equivalent oxide thickness (EOT of 0.31 nm. Direct contact with Si has been revealed to cause significant tensile strain to the Si in the interface region. The high stability of the effective work function with respect to the annealing conditions has been demonstrated through comparison with Hf-based dielectrics. It has also been shown that the effective work function can be tuned over a wide range by controlling the La/(La + Al atomic ratio. In addition, gate-first n-MOSFETs with ultrathin EOT that use sulfur-implanted Schottky source/drain technology have been fabricated using a low-temperature process.

  7. Comparative studies of MOS-gate/oxide-passivated AlGaAs/InGaAs pHEMTs by using ozone water oxidation technique

    International Nuclear Information System (INIS)

    Lee, Ching-Sung; Hung, Chun-Tse; Chou, Bo-Yi; Hsu, Wei-Chou; Liu, Han-Yin; Ho, Chiu-Sheng; Lai, Ying-Nan

    2012-01-01

    Al 0.22 Ga 0.78 As/In 0.24 Ga 0.76 As pseudomorphic high-electron-mobility transistors (pHEMTs) with metal-oxide-semiconductor (MOS)-gate structure or oxide passivation by using ozone water oxidation treatment have been comprehensively investigated. Annihilated surface states, enhanced gate insulating property and improved device gain have been achieved by the devised MOS-gate structure and oxide passivation. The present MOS-gated or oxide-passivated pHEMTs have demonstrated superior device performances, including superior breakdown, device gain, noise figure, high-frequency characteristics and power performance. Temperature-dependent device characteristics of the present designs at 300–450 K are also studied. (paper)

  8. An Integrated Gate Turnaround Management Concept Leveraging Big Data Analytics for NAS Performance Improvements

    Science.gov (United States)

    Chung, William W.; Ingram, Carla D.; Ahlquist, Douglas Kurt; Chachad, Girish H.

    2016-01-01

    "Gate Turnaround" plays a key role in the National Air Space (NAS) gate-to-gate performance by receiving aircraft when they reach their destination airport, and delivering aircraft into the NAS upon departing from the gate and subsequent takeoff. The time spent at the gate in meeting the planned departure time is influenced by many factors and often with considerable uncertainties. Uncertainties such as weather, early or late arrivals, disembarking and boarding passengers, unloading/reloading cargo, aircraft logistics/maintenance services and ground handling, traffic in ramp and movement areas for taxi-in and taxi-out, and departure queue management for takeoff are likely encountered on the daily basis. The Integrated Gate Turnaround Management (IGTM) concept is leveraging relevant historical data to support optimization of the gate operations, which include arrival, at the gate, departure based on constraints (e.g., available gates at the arrival, ground crew and equipment for the gate turnaround, and over capacity demand upon departure), and collaborative decision-making. The IGTM concept provides effective information services and decision tools to the stakeholders, such as airline dispatchers, gate agents, airport operators, ramp controllers, and air traffic control (ATC) traffic managers and ground controllers to mitigate uncertainties arising from both nominal and off-nominal airport gate operations. IGTM will provide NAS stakeholders customized decision making tools through a User Interface (UI) by leveraging historical data (Big Data), net-enabled Air Traffic Management (ATM) live data, and analytics according to dependencies among NAS parameters for the stakeholders to manage and optimize the NAS performance in the gate turnaround domain. The application will give stakeholders predictable results based on the past and current NAS performance according to selected decision trees through the UI. The predictable results are generated based on analysis of the

  9. SEMICONDUCTOR TECHNOLOGY: TaN wet etch for application in dual-metal-gate integration technology

    Science.gov (United States)

    Yongliang, Li; Qiuxia, Xu

    2009-12-01

    Wet-etch etchants and the TaN film method for dual-metal-gate integration are investigated. Both HF/HN O3/H2O and NH4OH/H2O2 solutions can etch TaN effectively, but poor selectivity to the gate dielectric for the HF/HNO3/H2O solution due to HF being included in HF/HNO3/H2O, and the fact that TaN is difficult to etch in the NH4OH/H2O2 solution at the first stage due to the thin TaOxNy layer on the TaN surface, mean that they are difficult to individually apply to dual-metal-gate integration. A two-step wet etching strategy using the HF/HNO3/H2O solution first and the NH4OH/H2O2 solution later can fully remove thin TaN film with a photo-resist mask and has high selectivity to the HfSiON dielectric film underneath. High-k dielectric film surfaces are smooth after wet etching of the TaN metal gate and MOSCAPs show well-behaved C-V and Jg-Vg characteristics, which all prove that the wet etching of TaN has little impact on electrical performance and can be applied to dual-metal-gate integration technology for removing the first TaN metal gate in the PMOS region.

  10. Gated current integrator for the beam in the RR barrier buckets

    Energy Technology Data Exchange (ETDEWEB)

    A. Cadorn; C. Bhat; J. Crisp

    2003-06-10

    At the Fermilab Recycler Ring (RR), the antiproton (pbar) beam will be stored azimuthally in different segments created by barrier buckets. The beam in each segment may have widely varying intensities. They have developed a gated integrator system to measure the beam intensity in each of the barrier bucket. Here they discuss the design of the system and the results of beam measurements using the integrator.

  11. Electronic States of High-k Oxides in Gate Stack Structures

    Science.gov (United States)

    Zhu, Chiyu

    In this dissertation, in-situ X-ray and ultraviolet photoemission spectroscopy have been employed to study the interface chemistry and electronic structure of potential high-k gate stack materials. In these gate stack materials, HfO2 and La2O3 are selected as high-k dielectrics, VO2 and ZnO serve as potential channel layer materials. The gate stack structures have been prepared using a reactive electron beam system and a plasma enhanced atomic layer deposition system. Three interrelated issues represent the central themes of the research: 1) the interface band alignment, 2) candidate high-k materials, and 3) band bending, internal electric fields, and charge transfer. 1) The most highlighted issue is the band alignment of specific high-k structures. Band alignment relationships were deduced by analysis of XPS and UPS spectra for three different structures: a) HfO2/VO2/SiO2/Si, b) HfO 2-La2O3/ZnO/SiO2/Si, and c) HfO 2/VO2/ HfO2/SiO2/Si. The valence band offset of HfO2/VO2, ZnO/SiO2 and HfO 2/SiO2 are determined to be 3.4 +/- 0.1, 1.5 +/- 0.1, and 0.7 +/- 0.1 eV. The valence band offset between HfO2-La2O3 and ZnO was almost negligible. Two band alignment models, the electron affinity model and the charge neutrality level model, are discussed. The results show the charge neutrality model is preferred to describe these structures. 2) High-k candidate materials were studied through comparison of pure Hf oxide, pure La oxide, and alloyed Hf-La oxide films. An issue with the application of pure HfO2 is crystallization which may increase the leakage current in gate stack structures. An issue with the application of pure La2O3 is the presence of carbon contamination in the film. Our study shows that the alloyed Hf-La oxide films exhibit an amorphous structure along with reduced carbon contamination. 3) Band bending and internal electric fields in the gate stack structure were observed by XPS and UPS and indicate the charge transfer during the growth and process. The oxygen

  12. Influence of implantation energy on the electrical properties of ultrathin gate oxides grown on nitrogen implanted Si substrates

    International Nuclear Information System (INIS)

    Kapetanakis, E.; Skarlatos, D.; Tsamis, C.; Normand, P.; Tsoukalas, D.

    2003-01-01

    Metal-oxide-semiconductor tunnel diodes with gate oxides, in the range of 2.5-3.5 nm, grown either on 25 or 3 keV nitrogen-implanted Si substrates at (0.3 or 1) x10 15 cm -2 dose, respectively, are investigated. The dependence of N 2 + ion implant energy on the electrical quality of the growing oxide layers is studied through capacitance, equivalent parallel conductance, and gate current measurements. Superior electrical characteristics in terms of interface state trap density, leakage current, and breakdown fields are found for oxides obtained through 3 keV nitrogen implants. These findings together with the full absence of any extended defect in the silicon substrate make the low-energy nitrogen implantation technique an attractive option for reproducible low-cost growth of nanometer-thick gate oxides

  13. Performance of organic field effect transistors with high-k gate oxide after application of consecutive bias stress

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Sunwoo; Choi, Changhwan; Lee, Kilbock [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of); Cho, Joong Hwee [Department of Embedded Systems Engineering,University of Incheon, Incheon 406-722 (Korea, Republic of); Ko, Ki-Young [Korea Institute of Patent Information, Seoul, 146-8 (Korea, Republic of); Ahn, Jinho, E-mail: jhahn@hanyang.ac.kr [Department of Materials Science and Engineering, Hanyang University, Seoul, 133-791 (Korea, Republic of)

    2012-10-30

    We report the effect of consecutive electrical stress on the performance of organic field effect transistors (OFETs). Sputtered aluminum oxide (Al{sub 2}O{sub 3}) and hafnium oxide (HfO{sub 2}) were used as gate oxide layers. After the electrical stress, the threshold voltage, which strongly depends on bulk defects, was remarkably shifted to the negative direction, while the other performance characteristics of OFETs such as on-current, transconductance and mobility, which are sensitive to interface defects, were slightly decreased. This result implies that the defects in the bulk layer are significantly affected compared to the defects in the interface layer. Thus, it is important to control the defects in the pentacene bulk layer in order to maintain the good reliabilities of pentacene devices. Those defects in HfO{sub 2} gate oxide devices were larger compared to those in Al{sub 2}O{sub 3} gate oxide devices.

  14. Nonassociative learning as gated neural integrator and differentiator in stimulus-response pathways

    Directory of Open Access Journals (Sweden)

    Young Daniel L

    2006-08-01

    Full Text Available Abstract Nonassociative learning is a basic neuroadaptive behavior exhibited across animal phyla and sensory modalities but its role in brain intelligence is unclear. Current literature on habituation and sensitization, the classic "dual process" of nonassociative learning, gives highly incongruous accounts between varying experimental paradigms. Here we propose a general theory of nonassociative learning featuring four base modes: habituation/primary sensitization in primary stimulus-response pathways, and desensitization/secondary sensitization in secondary stimulus-response pathways. Primary and secondary modes of nonassociative learning are distinguished by corresponding activity-dependent recall, or nonassociative gating, of neurotransmission memory. From the perspective of brain computation, nonassociative learning is a form of integral-differential calculus whereas nonassociative gating is a form of Boolean logic operator – both dynamically transforming the stimulus-response relationship. From the perspective of sensory integration, nonassociative gating provides temporal filtering whereas nonassociative learning affords low-pass, high-pass or band-pass/band-stop frequency filtering – effectively creating an intelligent sensory firewall that screens all stimuli for attention and resultant internal model adaptation and reaction. This unified framework ties together many salient characteristics of nonassociative learning and nonassociative gating and suggests a common kernel that correlates with a wide variety of sensorimotor integration behaviors such as central resetting and self-organization of sensory inputs, fail-safe sensorimotor compensation, integral-differential and gated modulation of sensorimotor feedbacks, alarm reaction, novelty detection and selective attention, as well as a variety of mental and neurological disorders such as sensorimotor instability, attention deficit hyperactivity, sensory defensiveness, autism

  15. Proton Conducting Graphene Oxide/Chitosan Composite Electrolytes as Gate Dielectrics for New-Concept Devices.

    Science.gov (United States)

    Feng, Ping; Du, Peifu; Wan, Changjin; Shi, Yi; Wan, Qing

    2016-09-30

    New-concept devices featuring the characteristics of ultralow operation voltages and low fabrication cost have received increasing attention recently because they can supplement traditional Si-based electronics. Also, organic/inorganic composite systems can offer an attractive strategy to combine the merits of organic and inorganic materials into promising electronic devices. In this report, solution-processed graphene oxide/chitosan composite film was found to be an excellent proton conducting electrolyte with a high specific capacitance of ~3.2 μF/cm 2 at 1.0 Hz, and it was used to fabricate multi-gate electric double layer transistors. Dual-gate AND logic operation and two-terminal diode operation were realized in a single device. A two-terminal synaptic device was proposed, and some important synaptic behaviors were emulated, which is interesting for neuromorphic systems.

  16. Anomalous positive flatband voltage shifts in metal gate stacks containing rare-earth oxide capping layers

    KAUST Repository

    Caraveo-Frescas, J. A.

    2012-03-09

    It is shown that the well-known negative flatband voltage (VFB) shift, induced by rare-earth oxide capping in metal gate stacks, can be completely reversed in the absence of the silicon overlayer. Using TaN metal gates and Gd2O3-doped dielectric, we measure a ∼350 mV negative shift with the Si overlayer present and a ∼110 mV positive shift with the Si overlayer removed. This effect is correlated to a positive change in the average electrostatic potential at the TaN/dielectric interface which originates from an interfacial dipole. The dipole is created by the replacement of interfacial oxygen atoms in the HfO2 lattice with nitrogen atoms from TaN.

  17. Synchronous OEIC Integrating Receiver for Optically Reconfigurable Gate Arrays

    Directory of Open Access Journals (Sweden)

    Carlos Sánchez-Azqueta

    2016-05-01

    Full Text Available A monolithically integrated optoelectronic receiver with a low-capacitance on-chip pin photodiode is presented. The receiver is fabricated in a 0.35 μm opto-CMOS process fed at 3.3 V and due to the highly effective integrated pin photodiode it operates at μW. A regenerative latch acting as a sense amplifier leads in addition to a low electrical power consumption. At 400 Mbit/s, sensitivities of −26.0 dBm and −25.5 dBm are achieved, respectively, for λ = 635 nm and λ = 675 nm (BER = 10−9 with an energy efficiency of 2 pJ/bit.

  18. TiN/Al2O3/ZnO gate stack engineering for top-gate thin film transistors by combination of post oxidation and annealing

    Science.gov (United States)

    Kato, Kimihiko; Matsui, Hiroaki; Tabata, Hitoshi; Takenaka, Mitsuru; Takagi, Shinichi

    2018-04-01

    Control of fabrication processes for a gate stack structure with a ZnO thin channel layer and an Al2O3 gate insulator has been examined for enhancing the performance of a top-gate ZnO thin film transistor (TFT). The Al2O3/ZnO interface and the ZnO layer are defective just after the Al2O3 layer formation by atomic layer deposition. Post treatments such as plasma oxidation, annealing after the Al2O3 deposition, and gate metal formation (PMA) are promising to improve the interfacial and channel layer qualities drastically. Post-plasma oxidation effectively reduces the interfacial defect density and eliminates Fermi level pinning at the Al2O3/ZnO interface, which is essential for improving the cut-off of the drain current of TFTs. A thermal effect of post-Al2O3 deposition annealing at 350 °C can improve the crystalline quality of the ZnO layer, enhancing the mobility. On the other hand, impacts of post-Al2O3 deposition annealing and PMA need to be optimized because the annealing can also accompany the increase in the shallow-level defect density and the resulting electron concentration, in addition to the reduction in the deep-level defect density. The development of the interfacial control technique has realized the excellent TFT performance with a large ON/OFF ratio, steep subthreshold characteristics, and high field-effect mobility.

  19. Pulsed laser deposition of oxide gate dielectrics for pentacene organic field-effect transistors

    International Nuclear Information System (INIS)

    Yaginuma, S.; Yamaguchi, J.; Itaka, K.; Koinuma, H.

    2005-01-01

    We have fabricated Al 2 O 3 , LaAlO 3 (LAO), CaHfO 3 (CHO) and CaZrO 3 (CZO) thin films for the dielectric layers of field-effect transistors (FETs) by pulsed laser deposition (PLD). The films exhibited very smooth surfaces with root-mean-squares (rms) roughnesses of ∼1.3 A as evaluated by using atomic force microscopy (AFM). The breakdown electric fields of Al 2 O 3 , LAO, CHO and CZO films were 7, 6, 10 and 2 MV/cm, respectively. The magnitude of the leak current in each film was low enough to operate FET. We performed a comparative study of pentacene FET fabricated using these oxide dielectrics as gate insulators. High field-effect mobility of 1.4 cm 2 /V s and on/off current ratio of 10 7 were obtained in the pentacene FET using LAO gate insulating film. Use of the LAO films as gate dielectrics has been found to suppress the hysteresis of pentacene FET operations. The LAO films are relevant to the dielectric layer of organic FETs

  20. SEMICONDUCTOR DEVICES: Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology

    Science.gov (United States)

    Chia-Song, Wu; Hsing-Chung, Liu

    2009-11-01

    This paper investigates the feasibility of using a lanthanum oxide thin film (La2O3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La2O3 thickness. The thin La2O3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively. La2O3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 °C because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La2O3 thin film was thermally stable. The DC and RF characteristics of Pt/La2O3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined. The measurements indicated that the transistor with the Pt/La2O3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La2O3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.

  1. Selected area growth integrated wavelength converter based on PD-EAM optical logic gate

    International Nuclear Information System (INIS)

    Niu Bin; Zhou Daibing; Zhang Can; Liang Song; Lu Dan; Zhao Lingjuan; Wang Wei; Qiu Jifang; Wu Jian

    2014-01-01

    A selected area growth wavelength converter based on a PD-EAM optical logic gate for WDM application is presented, integrating an EML transmitter and a SOA-PD receiver. The design, fabrication, and DC characters were analyzed. A 2 Gb/s NRZ signal based on the C-band wavelength converted to 1555 nm with the highest extinction ratio of 7 dB was achieved and wavelength converted eye diagrams with eyes opened were presented. (semiconductor devices)

  2. Integration issues of high-k and metal gate into conventional CMOS technology

    International Nuclear Information System (INIS)

    Song, S.C.; Zhang, Z.; Huffman, C.; Bae, S.H.; Sim, J.H.; Kirsch, P.; Majhi, P.; Moumen, N.; Lee, B.H.

    2006-01-01

    Issues surrounding the integration of Hf-based high-k dielectrics with metal gates in a conventional CMOS flow are discussed. The careful choice of a gate stack process as well as optimization of other CMOS process steps enables robust CMOSFETs with a wide process latitude. HfO 2 of a 2 nm physical thickness shows complete suppression of transient charge trapping resulting from a significant reduction in film volume as well as kinetically suppressed crystallization. Metal thickness is also critical when optimizing physical stress effects and minimizing dopant diffusion. A high temperature anneal after source and drain implantation in a conventional CMOSFET process reduces the interface state density and improves electron mobility

  3. Hydrogen-terminated diamond vertical-type metal oxide semiconductor field-effect transistors with a trench gate

    Energy Technology Data Exchange (ETDEWEB)

    Inaba, Masafumi, E-mail: inaba-ma@ruri.waseda.jp; Muta, Tsubasa; Kobayashi, Mikinori; Saito, Toshiki; Shibata, Masanobu; Matsumura, Daisuke; Kudo, Takuya; Hiraiwa, Atsushi [Graduate School of Science and Engineering, Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 (Japan); Kawarada, Hiroshi [Graduate School of Science and Engineering, Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 (Japan); Kagami Memorial Laboratory for Materials Science and Technology, Waseda University, 2-8-26 Nishiwaseda, Shinjuku, Tokyo 169-0051 (Japan)

    2016-07-18

    The hydrogen-terminated diamond surface (C-H diamond) has a two-dimensional hole gas (2DHG) layer independent of the crystal orientation. A 2DHG layer is ubiquitously formed on the C-H diamond surface covered by atomic-layer-deposited-Al{sub 2}O{sub 3}. Using Al{sub 2}O{sub 3} as a gate oxide, C-H diamond metal oxide semiconductor field-effect transistors (MOSFETs) operate in a trench gate structure where the diamond side-wall acts as a channel. MOSFETs with a side-wall channel exhibit equivalent performance to the lateral C-H diamond MOSFET without a side-wall channel. Here, a vertical-type MOSFET with a drain on the bottom is demonstrated in diamond with channel current modulation by the gate and pinch off.

  4. Negative charge induced degradation of PMOSFETs with BF2-implanted p+-poly gate

    International Nuclear Information System (INIS)

    Lu, C.Y.; Sung, J.M.

    1989-01-01

    A new degradation phenomenon on thin gate oxide PMOS-FETs with BF 2 implanted p + -poly gate has been demonstrated and investigated. The cause of this type of degradation is a combination of the boron penetration through the gate oxide and charge trap generation due to the presence of fluorine in the gate oxide and some other processing-induced effects. The negative charge-induced degradation other than enhanced boron diffusion has been studied in detail here. The impact of this process-sensitive p + -poly gate structure on deep submicron CMOS process integration has been discussed. (author)

  5. Plasma-Induced Damage on the Reliability of Hf-Based High-k/Dual Metal-Gates Complementary Metal Oxide Semiconductor Technology

    International Nuclear Information System (INIS)

    Weng, W.T.; Lin, H.C.; Huang, T.Y.; Lee, Y.J.; Lin, H.C.

    2009-01-01

    This study examines the effects of plasma-induced damage (PID) on Hf-based high-k/dual metal-gates transistors processed with advanced complementary metal-oxide-semiconductor (CMOS) technology. In addition to the gate dielectric degradations, this study demonstrates that thinning the gate dielectric reduces the impact of damage on transistor reliability including the positive bias temperature instability (PBTI) of n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs) and the negative bias temperature instability (NBTI) of p-channel MOSFETs. This study shows that high-k/metal-gate transistors are more robust against PID than conventional SiO 2 /poly-gate transistors with similar physical thickness. Finally this study proposes a model that successfully explains the observed experimental trends in the presence of PID for high-k/metal-gate CMOS technology.

  6. Indium-gallium-zinc-oxide thin-film transistor with a planar split dual-gate structure

    Science.gov (United States)

    Liu, Yu-Rong; Liu, Jie; Song, Jia-Qi; Lai, Pui-To; Yao, Ruo-He

    2017-12-01

    An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) with a planar split dual gate (PSDG) structure has been proposed, fabricated and characterized. Experimental results indicate that the two independent gates can provide dynamical control of device characteristics such as threshold voltage, sub-threshold swing, off-state current and saturation current. The transconductance extracted from the output characteristics of the device increases from 4.0 × 10-6S to 1.6 × 10-5S for a change of control gate voltage from -2 V to 2 V, and thus the device could be used in a variable-gain amplifier. A significant advantage of the PSDG structure is its flexibility in controlling the device performance according to the need of practical applications.

  7. Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

    Directory of Open Access Journals (Sweden)

    Minkyu Chun

    2015-05-01

    Full Text Available We investigated the effects of top gate voltage (VTG and temperature (in the range of 25 to 70 oC on dual-gate (DG back-channel-etched (BCE amorphous-indium-gallium-zinc-oxide (a-IGZO thin film transistors (TFTs characteristics. The increment of VTG from -20V to +20V, decreases the threshold voltage (VTH from 19.6V to 3.8V and increases the electron density to 8.8 x 1018cm−3. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on VTG. At VTG of 20V, the mobility decreases from 19.1 to 15.4 cm2/V ⋅ s with increasing temperature, showing a metallic conduction. On the other hand, at VTG of - 20V, the mobility increases from 6.4 to 7.5cm2/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.

  8. Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

    Energy Technology Data Exchange (ETDEWEB)

    Chun, Minkyu; Chowdhury, Md Delwar Hossain; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 130-701 (Korea, Republic of)

    2015-05-15

    We investigated the effects of top gate voltage (V{sub TG}) and temperature (in the range of 25 to 70 {sup o}C) on dual-gate (DG) back-channel-etched (BCE) amorphous-indium-gallium-zinc-oxide (a-IGZO) thin film transistors (TFTs) characteristics. The increment of V{sub TG} from -20V to +20V, decreases the threshold voltage (V{sub TH}) from 19.6V to 3.8V and increases the electron density to 8.8 x 10{sup 18}cm{sup −3}. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on V{sub TG}. At V{sub TG} of 20V, the mobility decreases from 19.1 to 15.4 cm{sup 2}/V ⋅ s with increasing temperature, showing a metallic conduction. On the other hand, at V{sub TG} of - 20V, the mobility increases from 6.4 to 7.5cm{sup 2}/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.

  9. Role of Oxygen in Ionic Liquid Gating on Two-Dimensional Cr2Ge2Te6: A Non-oxide Material.

    Science.gov (United States)

    Chen, Yangyang; Xing, Wenyu; Wang, Xirui; Shen, Bowen; Yuan, Wei; Su, Tang; Ma, Yang; Yao, Yunyan; Zhong, Jiangnan; Yun, Yu; Xie, X C; Jia, Shuang; Han, Wei

    2018-01-10

    Ionic liquid gating can markedly modulate a material's carrier density so as to induce metallization, superconductivity, and quantum phase transitions. One of the main issues is whether the mechanism of ionic liquid gating is an electrostatic field effect or an electrochemical effect, especially for oxide materials. Recent observation of the suppression of the ionic liquid gate-induced metallization in the presence of oxygen for oxide materials suggests the electrochemical effect. However, in more general scenarios, the role of oxygen in the ionic liquid gating effect is still unclear. Here, we perform ionic liquid gating experiments on a non-oxide material: two-dimensional ferromagnetic Cr 2 Ge 2 Te 6 . Our results demonstrate that despite the large increase of the gate leakage current in the presence of oxygen, the oxygen does not affect the ionic liquid gating effect on  the channel resistance of Cr 2 Ge 2 Te 6 devices (ionic liquid gating is more effective on the modulation of the channel resistances compared to the back gating across the 300 nm thick SiO 2 .

  10. Interface Trap Profiles in 4H- and 6H-SiC MOS Capacitors with Nitrogen- and Phosphorus-Doped Gate Oxides

    Science.gov (United States)

    Jiao, C.; Ahyi, A. C.; Dhar, S.; Morisette, D.; Myers-Ward, R.

    2017-04-01

    We report results on the interface trap density ( D it) of 4H- and 6H-SiC metal-oxide-semiconductor (MOS) capacitors with different interface chemistries. In addition to pure dry oxidation, we studied interfaces formed by annealing thermal oxides in NO or POCl3. The D it profiles, determined by the C- ψ s method, show that, although the as-oxidized 4H-SiC/SiO2 interface has a much higher D it profile than 6H-SiC/SiO2, after postoxidation annealing (POA), both polytypes maintain comparable D it near the conduction band edge for the gate oxides incorporated with nitrogen or phosphorus. Unlike most conventional C- V- or G- ω-based methods, the C- ψ s method is not limited by the maximum probe frequency, therefore taking into account the "fast traps" detected in previous work on 4H-SiC. The results indicate that such fast traps exist near the band edge of 6H-SiC also. For both polytypes, we show that the total interface trap density ( N it) integrated from the C- ψ s method is several times that obtained from the high-low method. The results suggest that the detected fast traps have a detrimental effect on electron transport in metal-oxide-semiconductor field-effect transistor (MOSFET) channels.

  11. Carbon Nanotube Self-Gating Diode and Application in Integrated Circuits.

    Science.gov (United States)

    Si, Jia; Liu, Lijun; Wang, Fanglin; Zhang, Zhiyong; Peng, Lian-Mao

    2016-07-26

    A nano self-gating diode (SGD) based on nanoscale semiconducting material is proposed, simulated, and realized on semiconducting carbon nanotubes (CNTs) through a doping-free fabrication process. The relationships between the performance and material/structural parameters of the SGD are explored through numerical simulation and verified by experiment results. Based on these results, performance optimization strategy is outlined, and high performance CNT SGDs are fabricated and demonstrated to surpass other published CNT diodes. In particular the CNT SGD exhibits high rectifier factor of up to 1.4 × 10(6) while retains large on-state current. Benefiting from high yield and stability, CNT SGDs are used for constructing logic and analog integrated circuits. Two kinds of basic digital gates (AND and OR) have been realized on chip through using CNT SGDs and on-chip Ti wire resistances, and a full wave rectifier circuit has been demonstrated through using two CNT SGDs. Although demonstrated here using CNT SGDs, this device structure may in principle be implemented using other semiconducting nanomaterials, to provide ideas and building blocks for electronic applications based on nanoscale materials.

  12. Effect of top gate bias on photocurrent and negative bias illumination stress instability in dual gate amorphous indium-gallium-zinc oxide thin-film transistor

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Eunji; Chowdhury, Md Delwar Hossain; Park, Min Sang; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 130-701 (Korea, Republic of)

    2015-12-07

    We have studied the effect of top gate bias (V{sub TG}) on the generation of photocurrent and the decay of photocurrent for back channel etched inverted staggered dual gate structure amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film-transistors. Upon 5 min of exposure of 365 nm wavelength and 0.7 mW/cm{sup 2} intensity light with negative bottom gate bias, the maximum photocurrent increases from 3.29 to 322 pA with increasing the V{sub TG} from −15 to +15 V. By changing V{sub TG} from negative to positive, the Fermi level (E{sub F}) shifts toward conduction band edge (E{sub C}), which substantially controls the conversion of neutral vacancy to charged one (V{sub O} → V{sub O}{sup +}/V{sub O}{sup 2+} + e{sup −}/2e{sup −}), peroxide (O{sub 2}{sup 2−}) formation or conversion of ionized interstitial (O{sub i}{sup 2−}) to neutral interstitial (O{sub i}), thus electron concentration at conduction band. With increasing the exposure time, more carriers are generated, and thus, maximum photocurrent increases until being saturated. After negative bias illumination stress, the transfer curve shows −2.7 V shift at V{sub TG} = −15 V, which gradually decreases to −0.42 V shift at V{sub TG} = +15 V. It clearly reveals that the position of electron quasi-Fermi level controls the formation of donor defects (V{sub O}{sup +}/V{sub O}{sup 2+}/O{sub 2}{sup 2−}/O{sub i}) and/or hole trapping in the a-IGZO /interfaces.

  13. Short-Term Synaptic Plasticity Regulation in Solution-Gated Indium-Gallium-Zinc-Oxide Electric-Double-Layer Transistors.

    Science.gov (United States)

    Wan, Chang Jin; Liu, Yang Hui; Zhu, Li Qiang; Feng, Ping; Shi, Yi; Wan, Qing

    2016-04-20

    In the biological nervous system, synaptic plasticity regulation is based on the modulation of ionic fluxes, and such regulation was regarded as the fundamental mechanism underlying memory and learning. Inspired by such biological strategies, indium-gallium-zinc-oxide (IGZO) electric-double-layer (EDL) transistors gated by aqueous solutions were proposed for synaptic behavior emulations. Short-term synaptic plasticity, such as paired-pulse facilitation, high-pass filtering, and orientation tuning, was experimentally emulated in these EDL transistors. Most importantly, we found that such short-term synaptic plasticity can be effectively regulated by alcohol (ethyl alcohol) and salt (potassium chloride) additives. Our results suggest that solution gated oxide-based EDL transistors could act as the platforms for short-term synaptic plasticity emulation.

  14. The influence of fibril composition and dimension on the performance of paper gated oxide transistors

    International Nuclear Information System (INIS)

    Pereira, L; Gaspar, D; Fortunato, E; Martins, R; Guerin, D; Delattre, A

    2014-01-01

    Paper electronics is a topic of great interest due the possibility of having low-cost, disposable and recyclable electronic devices. The final goal is to make paper itself an active part of such devices. In this work we present new approaches in the selection of tailored paper, aiming to use it simultaneously as substrate and dielectric in oxide based paper field effect transistors (FETs). From the work performed, it was observed that the gate leakage current in paper FETs can be reduced using a dense microfiber/nanofiber cellulose paper as the dielectric. Also, the stability of these devices against changes in relative humidity is improved. On other hand, if the pH of the microfiber/nanofiber cellulose pulp is modified by the addition of HCl, the saturation mobility of the devices increases up to 16 cm 2  V −1  s −1 , with an I ON /I OFF ratio close to 10 5 . (paper)

  15. Research on total-dose hardening for H-gate PD NMOSFET/SIMOX by ion implanting into buried oxide

    International Nuclear Information System (INIS)

    Qian Cong; Zhang Zhengxuan; Zhang Feng; Lin Chenglu

    2008-01-01

    In this work, we investigate the back-gate I-V characteristics for two kinds of NMOSFET/SIMOX transistors with H gate structure fabricated on two different SOI wafers. A transistors are made on the wafer implanted with Si + and then annealed in N 2 , and B transistors are made on the wafer without implantation and annealing. It is demonstrated experimentally that A transistors have much less back-gate threshold voltage shift ΔV th than B transistors under X-ray total close irradiation. Subthreshold charge separation technique is employed to estimate the build-up of oxide charge and interface traps during irradiation, showing that the reduced ΔV th for A transistors is mainly due to its less build-up of oxide charge than B transistors. Photo-luminescence (PL) research indicates that Si implantation results in the formation of silicon nanocrystalline (nanocluster) whose size increases with the implant dose. This structure can trap electrons to compensate the positive charge build-up in the buried oxide during irradiation, and thus reduce the threshold voltage negative shift. (authors)

  16. High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide

    Energy Technology Data Exchange (ETDEWEB)

    Liang, Shibo; Zhang, Zhiyong, E-mail: zyzhang@pku.edu.cn; Si, Jia; Zhong, Donglai; Peng, Lian-Mao, E-mail: lmpeng@pku.edu.cn [Key Laboratory for the Physics and Chemistry of Nanodevices, Department of Electronics, Peking University, Beijing 100871 (China)

    2014-08-11

    High-performance p-type carbon nanotube (CNT) transistors utilizing yttrium oxide as gate dielectric are presented by optimizing oxidization and annealing processes. Complementary metal-oxide-semiconductor (CMOS) field-effect-transistors (FETs) are then fabricated on CNTs, and the p- and n-type devices exhibit symmetrical high performances, especially with low threshold voltage near to zero. The corresponding CMOS CNT inverter is demonstrated to operate at an ultra-low supply voltage down to 0.2 V, while displaying sufficient voltage gain, high noise margin, and low power consumption. Yttrium oxide is proven to be a competitive gate dielectric for constructing high-performance CNT CMOS FETs and integrated circuits.

  17. Low-temperature formation of high-quality gate oxide by ultraviolet irradiation on spin-on-glass

    International Nuclear Information System (INIS)

    Usuda, R.; Uchida, K.; Nozaki, S.

    2015-01-01

    Although a UV cure was found to effectively convert a perhydropolysilazane (PHPS) spin-on-glass film into a dense SiO x film at low temperature, the electrical characteristics were never reported in order to recommend the use of PHPS as a gate-oxide material that can be formed at low temperature. We have formed a high-quality gate oxide by UV irradiation on the PHPS film, and obtained an interface midgap trap density of 3.4 × 10 11  cm −2 eV −1 by the UV wet oxidation and UV post-metallization annealing (PMA), at a temperature as low as 160 °C. In contrast to the UV irradiation using short-wavelength UV light, which is well known to enhance oxidation by the production of the excited states of oxygen, the UV irradiation was carried out using longer-wavelength UV light from a metal halide lamp. The UV irradiation during the wet oxidation of the PHPS film generates electron-hole pairs. The electrons ionize the H 2 O molecules and facilitate dissociation of the molecules into H and OH − . The OH − ions are highly reactive with Si and improve the stoichiometry of the oxide. The UV irradiation during the PMA excites the electrons from the accumulation layer, and the built-in electric field makes the electron injection into the oxide much easier. The electrons injected into the oxide recombine with the trapped holes, which have caused a large negative flat band voltage shift after the UV wet oxidation, and also ionize the H 2 O molecules. The ionization results in the electron stimulated dissociation of H 2 O molecules and the decreased interface trap density

  18. Low-temperature formation of high-quality gate oxide by ultraviolet irradiation on spin-on-glass

    Energy Technology Data Exchange (ETDEWEB)

    Usuda, R.; Uchida, K.; Nozaki, S., E-mail: nozaki@ee.uec.ac.jp [Graduate School of Informatics and Engineering, The University of Electro-Communications, 1-5-1 Chofugaoka, Chofu-shi, Tokyo 182-1515 (Japan)

    2015-11-02

    Although a UV cure was found to effectively convert a perhydropolysilazane (PHPS) spin-on-glass film into a dense SiO{sub x} film at low temperature, the electrical characteristics were never reported in order to recommend the use of PHPS as a gate-oxide material that can be formed at low temperature. We have formed a high-quality gate oxide by UV irradiation on the PHPS film, and obtained an interface midgap trap density of 3.4 × 10{sup 11 }cm{sup −2} eV{sup −1} by the UV wet oxidation and UV post-metallization annealing (PMA), at a temperature as low as 160 °C. In contrast to the UV irradiation using short-wavelength UV light, which is well known to enhance oxidation by the production of the excited states of oxygen, the UV irradiation was carried out using longer-wavelength UV light from a metal halide lamp. The UV irradiation during the wet oxidation of the PHPS film generates electron-hole pairs. The electrons ionize the H{sub 2}O molecules and facilitate dissociation of the molecules into H and OH{sup −}. The OH{sup −} ions are highly reactive with Si and improve the stoichiometry of the oxide. The UV irradiation during the PMA excites the electrons from the accumulation layer, and the built-in electric field makes the electron injection into the oxide much easier. The electrons injected into the oxide recombine with the trapped holes, which have caused a large negative flat band voltage shift after the UV wet oxidation, and also ionize the H{sub 2}O molecules. The ionization results in the electron stimulated dissociation of H{sub 2}O molecules and the decreased interface trap density.

  19. Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal - oxide - semiconductor field-effect transistors: Effective electron mobility

    International Nuclear Information System (INIS)

    Ragnarsson, L.-A degree.; Guha, S.; Copel, M.; Cartier, E.; Bojarczuk, N. A.; Karasinski, J.

    2001-01-01

    We report on high effective mobilities in yttrium-oxide-based n-channel metal - oxide - semiconductor field-effect transistors (MOSFETs) with aluminum gates. The yttrium oxide was grown in ultrahigh vacuum using a reactive atomic-beam-deposition system. Medium-energy ion-scattering studies indicate an oxide with an approximate composition of Y 2 O 3 on top of a thin layer of interfacial SiO 2 . The thickness of this interfacial oxide as well as the effective mobility are found to be dependent on the postgrowth anneal conditions. Optimum conditions result in mobilities approaching that of SiO 2 -based MOSFETs at higher fields with peak mobilities at approximately 210 cm 2 /Vs. [copyright] 2001 American Institute of Physics

  20. An integrated bioimpedance—ECG gating technique for respiratory and cardiac motion compensation in cardiac PET

    International Nuclear Information System (INIS)

    Koivumäki, Tuomas; Nekolla, Stephan G; Fürst, Sebastian; Loher, Simone; Schwaiger, Markus; Vauhkonen, Marko; Hakulinen, Mikko A

    2014-01-01

    Respiratory motion may degrade image quality in cardiac PET imaging. Since cardiac PET studies often involve cardiac gating by ECG, a separate respiratory monitoring system is required increasing the logistic complexity of the examination, in case respiratory gating is also needed. Thus, we investigated the simultaneous acquisition of both respiratory and cardiac gating signals using II limb lead mimicking electrode configuration during cardiac PET scans of 11 patients. In addition to conventional static and ECG-gated images, bioimpedance technique was utilized to generate respiratory- and dual-gated images. The ability of the bioimpedance technique to monitor intrathoracic respiratory motion was assessed estimating cardiac displacement between end-inspiration and -expiration. The relevance of dual gating was evaluated in left ventricular volume and myocardial wall thickness measurements. An average 7.6  ±  3.3 mm respiratory motion was observed in the study population. Dual gating showed a small but significant increase (4 ml, p = 0.042) in left ventricular myocardial volume compared to plain cardiac gating. In addition, a thinner myocardial wall was observed in dual-gated images (9.3  ±  1.3 mm) compared to cardiac-gated images (11.3  ±  1.3 mm, p = 0.003). This study shows the feasibility of bioimpedance measurements for dual gating in a clinical setting. The method enables simultaneous acquisition of respiratory and cardiac gating signals using a single device with standard ECG electrodes. (paper)

  1. The TDDB Characteristics of Ultra-Thin Gate Oxide MOS Capacitors under Constant Voltage Stress and Substrate Hot-Carrier Injection

    Directory of Open Access Journals (Sweden)

    Jingyu Shen

    2018-01-01

    Full Text Available The breakdown characteristics of ultra-thin gate oxide MOS capacitors fabricated in 65 nm CMOS technology under constant voltage stress and substrate hot-carrier injection are investigated. Compared to normal thick gate oxide, the degradation mechanism of time-dependent dielectric breakdown (TDDB of ultra-thin gate oxide is found to be different. It is found that the gate current (Ig of ultra-thin gate oxide MOS capacitor is more likely to be induced not only by Fowler-Nordheim (F-N tunneling electrons, but also by electrons surmounting barrier and penetrating electrons in the condition of constant voltage stress. Moreover it is shown that the time to breakdown (tbd under substrate hot-carrier injection is far less than that under constant voltage stress when the failure criterion is defined as a hard breakdown according to the experimental results. The TDDB mechanism of ultra-thin gate oxide will be detailed. The differences in TDDB characteristics of MOS capacitors induced by constant voltage stress and substrate hot-carrier injection will be also discussed.

  2. Off-line wafer level reliability control: unique measurement method to monitor the lifetime indicator of gate oxide validated within bipolar/CMOS/DMOS technology

    Science.gov (United States)

    Gagnard, Xavier; Bonnaud, Olivier

    2000-08-01

    We have recently published a paper on a new rapid method for the determination of the lifetime of the gate oxide involved in a Bipolar/CMOS/DMOS technology (BCD). Because this previous method was based on a current measurement with gate voltage as a parameter needing several stress voltages, it was applied only by lot sampling. Thus, we tried to find an indicator in order to monitor the gate oxide lifetime during the wafer level parametric test and involving only one measurement of the device on each wafer test cell. Using the Weibull law and Crook model, combined with our recent model, we have developed a new test method needing only one electrical measurement of MOS capacitor to monitor the quality of the gate oxide. Based also on a current measurement, the parameter is the lifetime indicator of the gate oxide. From the analysis of several wafers, we gave evidence of the possibility to detect a low performance wafer, which corresponds to the infantile failure on the Weibull plot. In order to insert this new method in the BCD parametric program, a parametric flowchart was established. This type of measurement is an important challenges, because the actual measurements, breakdown charge, Qbd, and breakdown electric field, Ebd, at parametric level and Ebd and interface states density, Dit during the process cannot guarantee the gate oxide lifetime all along fabrication process. This indicator measurement is the only one, which predicts the lifetime decrease.

  3. First-principles simulations of the leakage current in metal-oxide-semiconductor structures caused by oxygen vacancies in HfO2 high-K gate dielectric

    International Nuclear Information System (INIS)

    Mao, L.F.; Wang, Z.O.

    2008-01-01

    HfO 2 high-K gate dielectric has been used as a new gate dielectric in metal-oxide-semiconductor structures. First-principles simulations are used to study the effects of oxygen vacancies on the tunneling current through the oxide. A level which is nearly 1.25 eV from the bottom of the conduction band is introduced into the bandgap due to the oxygen vacancies. The tunneling current calculations show that the tunneling currents through the gate oxide with different defect density possess the typical characteristic of stress-induced leakage current. Further analysis shows that the location of oxygen vacancies will have a marked effect on the tunneling current. The largest increase in the tunneling current caused by oxygen vacancies comes about at the middle oxide field when defects are located at the middle of the oxide. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  4. Understanding the Structure of High-K Gate Oxides - Oral Presentation

    Energy Technology Data Exchange (ETDEWEB)

    Miranda, Andre [SLAC National Accelerator Lab., Menlo Park, CA (United States)

    2015-08-25

    Hafnium Oxide (HfO2) amorphous thin films are being used as gate oxides in transistors because of their high dielectric constant (κ) over Silicon Dioxide. The present study looks to find the atomic structure of HfO2 thin films which hasn’t been done with the technique of this study. In this study, two HfO2 samples were studied. One sample was made with thermal atomic layer deposition (ALD) on top of a Chromium and Gold layer on a silicon wafer. The second sample was made with plasma ALD on top of a Chromium and Gold layer on a Silicon wafer. Both films were deposited at a thickness of 50nm. To obtain atomic structure information, Grazing Incidence X-ray diffraction (GIXRD) was carried out on the HfO2 samples. Because of this, absorption, footprint, polarization, and dead time corrections were applied to the scattering intensity data collected. The scattering curves displayed a difference in structure between the ALD processes. The plasma ALD sample showed the broad peak characteristic of an amorphous structure whereas the thermal ALD sample showed an amorphous structure with characteristics of crystalline materials. This appears to suggest that the thermal process results in a mostly amorphous material with crystallites within. Further, the scattering intensity data was used to calculate a pair distribution function (PDF) to show more atomic structure. The PDF showed atom distances in the plasma ALD sample had structure up to 10 Å, while the thermal ALD sample showed the same structure below 10 Å. This structure that shows up below 10 Å matches the bond distances of HfO2 published in literature. The PDF for the thermal ALD sample also showed peaks up to 20 Å, suggesting repeating atomic spacing outside the HfO2 molecule in the sample. This appears to suggest that there is some crystalline structure within the thermal ALD sample.

  5. Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

    2018-01-01

    Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

  6. Memory and learning behaviors mimicked in nanogranular SiO2-based proton conductor gated oxide-based synaptic transistors.

    Science.gov (United States)

    Wan, Chang Jin; Zhu, Li Qiang; Zhou, Ju Mei; Shi, Yi; Wan, Qing

    2013-11-07

    In neuroscience, signal processing, memory and learning function are established in the brain by modifying ionic fluxes in neurons and synapses. Emulation of memory and learning behaviors of biological systems by nanoscale ionic/electronic devices is highly desirable for building neuromorphic systems or even artificial neural networks. Here, novel artificial synapses based on junctionless oxide-based protonic/electronic hybrid transistors gated by nanogranular phosphorus-doped SiO2-based proton-conducting films are fabricated on glass substrates by a room-temperature process. Short-term memory (STM) and long-term memory (LTM) are mimicked by tuning the pulse gate voltage amplitude. The LTM process in such an artificial synapse is due to the proton-related interfacial electrochemical reaction. Our results are highly desirable for building future neuromorphic systems or even artificial networks via electronic elements.

  7. Improvement in gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors using microwave irradiation

    International Nuclear Information System (INIS)

    Jo, Kwang-Won; Cho, Won-Ju

    2014-01-01

    In this study, we evaluated the effects of microwave irradiation (MWI) post-deposition-annealing (PDA) treatment on the gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) and compared the results with a conventional thermal annealing PDA treatment. The MWI-PDA-treated a-IGZO TFTs exhibited enhanced electrical performance as well as improved long-term stability with increasing microwave power. The positive turn-on voltage shift (ΔV ON ) as a function of stress time with positive bias and varying temperature was precisely modeled on a stretched-exponential equation, suggesting that charge trapping is a dominant mechanism in the instability of MWI-PDA-treated a-IGZO TFTs. The characteristic trapping time and average effective barrier height for electron transport indicate that the MWI-PDA treatment effectively reduces the defects in a-IGZO TFTs, resulting in a superior resistance against gate bias stress

  8. Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

    International Nuclear Information System (INIS)

    Hanna, A. N.; Ghoneim, M. T.; Bahabry, R. R.; Hussain, A. M.; Hussain, M. M.

    2013-01-01

    We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions

  9. Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

    KAUST Repository

    Hanna, Amir; Ghoneim, Mohamed T.; Bahabry, Rabab R.; Hussain, Aftab M.; Hussain, Muhammad Mustafa

    2013-01-01

    We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

  10. Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

    KAUST Repository

    Hanna, Amir

    2013-11-26

    We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

  11. Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

    KAUST Repository

    Hanna, Amir

    2015-12-04

    High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high performance in material agnostic way. We further demonstrate digital logic NAND circuit using the WC architecture and compare it to the conventional planar architecture. The WC architecture circuits have shown 2× higher peak-to-peak output voltage for the same input voltage. They also have 3× lower high-to-low propagation delay times, respectively, when compared to the planar architecture. The performance enhancement is attributed to both extra device width and enhanced field effect mobility due to higher gate field electrostatics control.

  12. Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.

    Science.gov (United States)

    Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

    2016-12-01

    In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade(-1) and 3.62 × 10(11) eV(-1) cm(-2), respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

  13. Rat Aquaporin-5 Is pH-Gated Induced by Phosphorylation and Is Implicated in Oxidative Stress

    Directory of Open Access Journals (Sweden)

    Claudia Rodrigues

    2016-12-01

    Full Text Available Aquaporin-5 (AQP5 is a membrane water channel widely distributed in human tissues that was found up-regulated in different tumors and considered implicated in carcinogenesis in different organs and systems. Despite its wide distribution pattern and physiological importance, AQP5 short-term regulation was not reported and mechanisms underlying its involvement in cancer are not well defined. In this work, we expressed rat AQP5 in yeast and investigated mechanisms of gating, as well as AQP5’s ability to facilitate H2O2 plasma membrane diffusion. We found that AQP5 can be gated by extracellular pH in a phosphorylation-dependent manner, with higher activity at physiological pH 7.4. Moreover, similar to other mammalian AQPs, AQP5 is able to increase extracellular H2O2 influx and to affect oxidative cell response with dual effects: whereas in acute oxidative stress conditions AQP5 induces an initial higher sensitivity, in chronic stress AQP5 expressing cells show improved cell survival and resistance. Our findings support the involvement of AQP5 in oxidative stress and suggest AQP5 modulation by phosphorylation as a novel tool for therapeutics.

  14. Radiation-hardened gate-around n-MOSFET structure for radiation-tolerant application-specific integrated circuits

    International Nuclear Information System (INIS)

    Lee, Min Su; Lee, Hee Chul

    2012-01-01

    To overcome the total ionizing dose effect on an n-type metal-oxide-semiconductor field-effect transistor (n-MOSFET), we designed a radiation-hardened gate-around n-MOSFET structure and evaluated it through a radiation-exposure experiment. Each test device was fabricated in a commercial 0.35-micron complementary metal-oxide-semiconductor (CMOS) process. The fabricated devices were evaluated under a total dose of 1 Mrad (Si) at a dose rate of 250 krad/h to obtain very high reliability for space electronics. The experimental results showed that the gate-around n-MOSFET structure had very good performance against 1 Mrad (Si) of gamma radiation, while the conventional n-MOSFET experienced a considerable amount of radiation-induced leakage current. Furthermore, a source follower designed with the gate-around transistor worked properly at 1 Mrad (Si) of gamma radiation while a source follower designed with the conventional n-MOSFET lost its functionality.

  15. Protonic/electronic hybrid oxide transistor gated by chitosan and its full-swing low voltage inverter applications

    Energy Technology Data Exchange (ETDEWEB)

    Chao, Jin Yu [Shanxi Province Key Laboratory High Gravity Chemical Engineering, North University of China, Taiyuan 030051 (China); Ningbo Institute of Material Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201 (China); Zhu, Li Qiang, E-mail: lqzhu@nimte.ac.cn; Xiao, Hui [Ningbo Institute of Material Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201 (China); Yuan, Zhi Guo, E-mail: ncityzg@163.com [Shanxi Province Key Laboratory High Gravity Chemical Engineering, North University of China, Taiyuan 030051 (China)

    2015-12-21

    Modulation of charge carrier density in condensed materials based on ionic/electronic interaction has attracted much attention. Here, protonic/electronic hybrid indium-zinc-oxide (IZO) transistors gated by chitosan based electrolyte were obtained. The chitosan-based electrolyte illustrates a high proton conductivity and an extremely strong proton gating behavior. The transistor illustrates good electrical performances at a low operating voltage of ∼1.0 V such as on/off ratio of ∼3 × 10{sup 7}, subthreshold swing of ∼65 mV/dec, threshold voltage of ∼0.3 V, and mobility of ∼7 cm{sup 2}/V s. Good positive gate bias stress stabilities are obtained. Furthermore, a low voltage driven resistor-loaded inverter was built by using an IZO transistor in series with a load resistor, exhibiting a linear relationship between the voltage gain and the supplied voltage. The inverter is also used for decreasing noises of input signals. The protonic/electronic hybrid IZO transistors have potential applications in biochemical sensors and portable electronics.

  16. Metal-oxide assisted surface treatment of polyimide gate insulators for high-performance organic thin-film transistors.

    Science.gov (United States)

    Kim, Sohee; Ha, Taewook; Yoo, Sungmi; Ka, Jae-Won; Kim, Jinsoo; Won, Jong Chan; Choi, Dong Hoon; Jang, Kwang-Suk; Kim, Yun Ho

    2017-06-14

    We developed a facile method for treating polyimide-based organic gate insulator (OGI) surfaces with self-assembled monolayers (SAMs) by introducing metal-oxide interlayers, called the metal-oxide assisted SAM treatment (MAST). To create sites for surface modification with SAM materials on polyimide-based OGI (KPI) surfaces, the metal-oxide interlayer, here amorphous alumina (α-Al 2 O 3 ), was deposited on the KPI gate insulator using spin-coating via a rapid sol-gel reaction, providing an excellent template for the formation of a high-quality SAM with phosphonic acid anchor groups. The SAM of octadecylphosphonic acid (ODPA) was successfully treated by spin-coating onto the α-Al 2 O 3 -deposited KPI film. After the surface treatment by ODPA/α-Al 2 O 3 , the surface energy of the KPI thin film was remarkably decreased and the molecular compatibility of the film with an organic semiconductor (OSC), 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-C 10 ), was increased. Ph-BTBT-C 10 molecules were uniformly deposited on the treated gate insulator surface and grown with high crystallinity, as confirmed by atomic force microscopy (AFM) and X-ray diffraction (XRD) analysis. The mobility of Ph-BTBT-C 10 thin-film transistors (TFTs) was approximately doubled, from 0.56 ± 0.05 cm 2 V -1 s -1 to 1.26 ± 0.06 cm 2 V -1 s -1 , after the surface treatment. The surface treatment of α-Al 2 O 3 and ODPA significantly decreased the threshold voltage from -21.2 V to -8.3 V by reducing the trap sites in the OGI and improving the interfacial properties with the OSC. We suggest that the MAST method for OGIs can be applied to various OGI materials lacking reactive sites using SAMs. It may provide a new platform for the surface treatment of OGIs, similar to that of conventional SiO 2 gate insulators.

  17. The S4-S5 linker acts as a signal integrator for HERG K+ channel activation and deactivation gating.

    Directory of Open Access Journals (Sweden)

    Chai Ann Ng

    Full Text Available Human ether-à-go-go-related gene (hERG K(+ channels have unusual gating kinetics. Characterised by slow activation/deactivation but rapid inactivation/recovery from inactivation, the unique gating kinetics underlie the central role hERG channels play in cardiac repolarisation. The slow activation and deactivation kinetics are regulated in part by the S4-S5 linker, which couples movement of the voltage sensor domain to opening of the activation gate at the distal end of the inner helix of the pore domain. It has also been suggested that cytosolic domains may interact with the S4-S5 linker to regulate activation and deactivation kinetics. Here, we show that the solution structure of a peptide corresponding to the S4-S5 linker of hERG contains an amphipathic helix. The effects of mutations at the majority of residues in the S4-S5 linker of hERG were consistent with the previously identified role in coupling voltage sensor movement to the activation gate. However, mutations to Ser543, Tyr545, Gly546 and Ala548 had more complex phenotypes indicating that these residues are involved in additional interactions. We propose a model in which the S4-S5 linker, in addition to coupling VSD movement to the activation gate, also contributes to interactions that stabilise the closed state and a separate set of interactions that stabilise the open state. The S4-S5 linker therefore acts as a signal integrator and plays a crucial role in the slow deactivation kinetics of the channel.

  18. Integrating respiratory-gated PET-based target volume delineation in liver SBRT planning, a pilot study

    International Nuclear Information System (INIS)

    Riou, Olivier; Thariat, Juliette; Serrano, Benjamin; Azria, David; Paulmier, Benoit; Villeneuve, Remy; Fenoglietto, Pascal; Artenie, Antonella; Ortholan, Cécile; Faraggi, Marc

    2014-01-01

    To assess the feasibility and benefit of integrating four-dimensional (4D) Positron Emission Tomography (PET) – computed tomography (CT) for liver stereotactic body radiation therapy (SBRT) planning. 8 patients with 14 metastases were accrued in the study. They all underwent a non-gated PET and a 4D PET centered on the liver. The same CT scan was used for attenuation correction, registration, and considered the planning CT for SBRT planning. Six PET phases were reconstructed for each 4D PET. By applying an individualized threshold to the 4D PET, a Biological Internal Target Volume (BITV) was generated for each lesion. A gated Planning Target Volume (PTVg) was created by adding 3 mm to account for set-up margins. This volume was compared to a manual Planning Target Volume (PTV) delineated with the help of a semi-automatic Biological Target Volume (BTV) obtained from the non-gated exam. A 5 mm radial and a 10 mm craniocaudal margins were applied to account for tumor motion and set-up margins to create the PTV. One undiagnosed liver metastasis was discovered thanks to the 4D PET. The semi-automatic BTV were significantly smaller than the BITV (p = 0.0031). However, after applying adapted margins, 4D PET allowed a statistically significant decrease in the PTVg as compared to the PTV (p = 0.0052). In comparison to non-gated PET, 4D PET may better define the respiratory movements of liver targets and improve SBRT planning for liver metastases. Furthermore, non respiratory-gated PET exams can both misdiagnose liver metastases and underestimate the real internal target volumes

  19. Comprehensive study and design of scaled metal/high-k/Ge gate stacks with ultrathin aluminum oxide interlayers

    Energy Technology Data Exchange (ETDEWEB)

    Asahara, Ryohei; Hideshima, Iori; Oka, Hiroshi; Minoura, Yuya; Hosoi, Takuji, E-mail: hosoi@mls.eng.osaka-u.ac.jp; Shimura, Takayoshi; Watanabe, Heiji [Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871 (Japan); Ogawa, Shingo [Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871 (Japan); Toray Research Center Inc., 3-3-7 Sonoyama, Otsu, Shiga 520-8567 (Japan); Yoshigoe, Akitaka; Teraoka, Yuden [Japan Atomic Energy Agency, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan)

    2015-06-08

    Advanced metal/high-k/Ge gate stacks with a sub-nm equivalent oxide thickness (EOT) and improved interface properties were demonstrated by controlling interface reactions using ultrathin aluminum oxide (AlO{sub x}) interlayers. A step-by-step in situ procedure by deposition of AlO{sub x} and hafnium oxide (HfO{sub x}) layers on Ge and subsequent plasma oxidation was conducted to fabricate Pt/HfO{sub 2}/AlO{sub x}/GeO{sub x}/Ge stacked structures. Comprehensive study by means of physical and electrical characterizations revealed distinct impacts of AlO{sub x} interlayers, plasma oxidation, and metal electrodes serving as capping layers on EOT scaling, improved interface quality, and thermal stability of the stacks. Aggressive EOT scaling down to 0.56 nm and very low interface state density of 2.4 × 10{sup 11 }cm{sup −2}eV{sup −1} with a sub-nm EOT and sufficient thermal stability were achieved by systematic process optimization.

  20. Integrated funnel-and-gate/GZB product recovery technologies for in situ management of creosote NAPL-impacted aquifers

    International Nuclear Information System (INIS)

    Mueller, J.G.; Borchert, S.M.; Klingel, E.J.

    1997-01-01

    An in situ source management system was modeled and designed for the containment and recovery of creosote non-aqueous phase liquid (NAPL) at a former wood treating facility in Nashua, New Hampshire. The conceptual system was based on the integration of patented technologies for physical source containment and management (ie., funnel-and-gate technology) with patented in situ product recovery (i.e, GZB technology - described below). A funnel-and-gate physical barrier was proposed to mitigate the continued flow of NAPL into the Merrimack River. The purpose of the funnel was to divert groundwater (and potential NAPL) flow through two gate areas. Where required, an in situ system for product recovery was integrated. Mathematical modeling of the combined technologies led to the selection of a metal sheet pile barrier wall along 650 feet of the river's shoreline with the wall anchored into an underlying zone of lesser permeability. Multiple GZB wells were placed strategically within the system. This combination of technologies promised to offer a more effective, cost-efficient approach for long-term management of environmental concerns at Nashua, and related sites

  1. Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium–gallium–zinc oxide gate stack

    Science.gov (United States)

    Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

    2018-07-01

    We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium–gallium–zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>104). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

  2. Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium-gallium-zinc oxide gate stack.

    Science.gov (United States)

    Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

    2018-07-20

    We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium-gallium-zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>10 4 ). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

  3. CMOS Active-Pixel Image Sensor With Simple Floating Gates

    Science.gov (United States)

    Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

    1996-01-01

    Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

  4. The diagnostic relevance of an integrated approach to gated cardiac studies

    International Nuclear Information System (INIS)

    Pavel, D.G.

    1982-01-01

    Evolution of Nuclear Medicine hardware and software has opened the way towards maximizing the amount of information of gated cardiac studies. The clinical use of cardiac functional images started with stroke volume image, paradoxis images and regional ejection fraction images, followed later by slope images, variation images and others. Especially the introduction of phase analysis has opened a variety of new perspectives. (WU)

  5. All-Optical Network Subsystems Using Integrated SOA-Based Optical Gates and Flip-Flops for Label-Swapped Netorks

    DEFF Research Database (Denmark)

    Seoane, Jorge; Holm-Nielsen, Pablo Villanueva; Kehayas, E.

    2006-01-01

    In this letter, we demonstrate that all-optical network subsystems, offering intelligence in the optical layer, can be constructed by functional integration of integrated all-optical logic gates and flip-flops. In this context, we show 10-Gb/s all-optical 2-bit label address recognition......-level advantages of these all-optical subsystems combined with their realization with compact integrated devices, suggest that they are strong candidates for future packet/label switched optical networks....... by interconnecting two optical gates that perform xor operation on incoming optical labels. We also demonstrate 40-Gb/s all-optical wavelength-switching through an optically controlled wavelength converter, consisting of an integrated flip-flop prototype device driven by an integrated optical gate. The system...

  6. Integration of functional complex oxide nanomaterials on silicon

    Directory of Open Access Journals (Sweden)

    Jose Manuel eVila-Fungueiriño

    2015-06-01

    Full Text Available The combination of standard wafer-scale semiconductor processing with the properties of functional oxides opens up to innovative and more efficient devices with high value applications that can be produced at large scale. This review uncovers the main strategies that are successfully used to monolithically integrate functional complex oxide thin films and nanostructures on silicon: the chemical solution deposition approach (CSD and the advanced physical vapor deposition techniques such as oxide molecular beam epitaxy (MBE. Special emphasis will be placed on complex oxide nanostructures epitaxially grown on silicon using the combination of CSD and MBE. Several examples will be exposed, with a particular stress on the control of interfaces and crystallization mechanisms on epitaxial perovskite oxide thin films, nanostructured quartz thin films, and octahedral molecular sieve nanowires. This review enlightens on the potential of complex oxide nanostructures and the combination of both chemical and physical elaboration techniques for novel oxide-based integrated devices.

  7. Improvement in gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors using microwave irradiation

    Energy Technology Data Exchange (ETDEWEB)

    Jo, Kwang-Won; Cho, Won-Ju, E-mail: chowj@kw.ac.kr [Department of Electronic Materials Engineering, Kwangwoon University, 447-1, Wolgye-dong, Nowon-gu, Seoul 139-701 (Korea, Republic of)

    2014-11-24

    In this study, we evaluated the effects of microwave irradiation (MWI) post-deposition-annealing (PDA) treatment on the gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) and compared the results with a conventional thermal annealing PDA treatment. The MWI-PDA-treated a-IGZO TFTs exhibited enhanced electrical performance as well as improved long-term stability with increasing microwave power. The positive turn-on voltage shift (ΔV{sub ON}) as a function of stress time with positive bias and varying temperature was precisely modeled on a stretched-exponential equation, suggesting that charge trapping is a dominant mechanism in the instability of MWI-PDA-treated a-IGZO TFTs. The characteristic trapping time and average effective barrier height for electron transport indicate that the MWI-PDA treatment effectively reduces the defects in a-IGZO TFTs, resulting in a superior resistance against gate bias stress.

  8. pH sensing characteristics and biosensing application of solution-gated reduced graphene oxide field-effect transistors.

    Science.gov (United States)

    Sohn, Il-Yung; Kim, Duck-Jin; Jung, Jin-Heak; Yoon, Ok Ja; Thanh, Tien Nguyen; Quang, Trung Tran; Lee, Nae-Eung

    2013-07-15

    Solution-gated reduced graphene oxide field-effect transistors (R-GO FETs) were investigated for pH sensing and biochemical sensing applications. A channel of a networked R-GO film formed by self-assembly was incorporated as a sensing layer into a solution-gated FET structure for pH sensing and the detection of acetylcholine (Ach), which is a neurotransmitter in the nerve system, through enzymatic reactions. The fabricated R-GO FET was sensitive to protons (H(+)) with a pH sensitivity of 29 mV/pH in terms of the shift of the charge neutrality point (CNP), which is attributed to changes in the surface potential caused by the interaction of protons with OH surface functional groups present on the R-GO surface. The R-GO FET immobilized with acetylcholinesterase (AchE) was used to detect Ach in the concentration range of 0.1-10mM by sensing protons generated during the enzymatic reactions. The results indicate that R-GO FETs provide the capability to detect protons, demonstrating their applicability as a biosensing device for enzymatic reactions. Copyright © 2013 Elsevier B.V. All rights reserved.

  9. Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

    Science.gov (United States)

    Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

    2008-11-01

    In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

  10. Lateral protonic/electronic hybrid oxide thin-film transistor gated by SiO2 nanogranular films

    International Nuclear Information System (INIS)

    Zhu, Li Qiang; Chao, Jin Yu; Xiao, Hui

    2014-01-01

    Ionic/electronic interaction offers an additional dimension in the recent advancements of condensed materials. Here, lateral gate control of conductivities of indium-zinc-oxide (IZO) films is reported. An electric-double-layer (EDL) transistor configuration was utilized with a phosphorous-doped SiO 2 nanogranular film to provide a strong lateral electric field. Due to the strong lateral protonic/electronic interfacial coupling effect, the IZO EDL transistor could operate at a low-voltage of 1 V. A resistor-loaded inverter is built, showing a high voltage gain of ∼8 at a low supply voltage of 1 V. The lateral ionic/electronic coupling effects are interesting for bioelectronics and portable electronics

  11. Lateral protonic/electronic hybrid oxide thin-film transistor gated by SiO{sub 2} nanogranular films

    Energy Technology Data Exchange (ETDEWEB)

    Zhu, Li Qiang, E-mail: lqzhu@nimte.ac.cn; Chao, Jin Yu; Xiao, Hui [Ningbo Institute of Material Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201 (China)

    2014-12-15

    Ionic/electronic interaction offers an additional dimension in the recent advancements of condensed materials. Here, lateral gate control of conductivities of indium-zinc-oxide (IZO) films is reported. An electric-double-layer (EDL) transistor configuration was utilized with a phosphorous-doped SiO{sub 2} nanogranular film to provide a strong lateral electric field. Due to the strong lateral protonic/electronic interfacial coupling effect, the IZO EDL transistor could operate at a low-voltage of 1 V. A resistor-loaded inverter is built, showing a high voltage gain of ∼8 at a low supply voltage of 1 V. The lateral ionic/electronic coupling effects are interesting for bioelectronics and portable electronics.

  12. Wafer-scale laser pantography: Fabrication of n-metal-oxide-semiconductor transistors and small-scale integrated circuits by direct-write laser-induced pyrolytic reactions

    International Nuclear Information System (INIS)

    McWilliams, B.M.; Herman, I.P.; Mitlitsky, F.; Hyde, R.A.; Wood, L.L.

    1983-01-01

    A complete set of processes sufficient for manufacture of n-metal-oxide-semiconductor (n-MOS) transistors by a laser-induced direct-write process has been demonstrated separately, and integrated to yield functional transistors. Gates and interconnects were fabricated of various combinations of n-doped and intrinsic polysilicon, tungsten, and tungsten silicide compounds. Both 0.1-μm and 1-μm-thick gate oxides were micromachined with and without etchant gas, and the exposed p-Si [100] substrate was cleaned and, at times, etched. Diffusion regions were doped by laser-induced pyrolytic decomposition of phosphine followed by laser annealing. Along with the successful manufacture of working n-MOS transistors and a set of elementary digital logic gates, this letter reports the successful use of several laser-induced surface reactions that have not been reported previously

  13. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Young, Chadwin D.; Bersuker, Gennadi; Hussain, Muhammad Mustafa

    2015-01-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard

  14. Low-power DRAM-compatible Replacement Gate High-k/Metal Gate Stacks

    Science.gov (United States)

    Ritzenthaler, R.; Schram, T.; Bury, E.; Spessot, A.; Caillat, C.; Srividya, V.; Sebaai, F.; Mitard, J.; Ragnarsson, L.-Å.; Groeseneken, G.; Horiguchi, N.; Fazan, P.; Thean, A.

    2013-06-01

    In this work, the possibility of integration of High-k/Metal Gate (HKMG), Replacement Metal Gate (RMG) gate stacks for low power DRAM compatible transistors is studied. First, it is shown that RMG gate stacks used for Logic applications need to be seriously reconsidered, because of the additional anneal(s) needed in a DRAM process. New solutions are therefore developed. A PMOS stack HfO2/TiN with TiN deposited in three times combined with Work Function metal oxidations is demonstrated, featuring a very good Work Function of 4.95 eV. On the other hand, the NMOS side is shown to be a thornier problem to solve: a new solution based on the use of oxidized Ta as a diffusion barrier is proposed, and a HfO2/TiN/TaOX/TiAl/TiN/TiN gate stack featuring an aggressive Work Function of 4.35 eV (allowing a Work Function separation of 600 mV between NMOS and PMOS) is demonstrated. This work paves the way toward the integration of gate-last options for DRAM periphery transistors.

  15. Radiation induced leakage current and stress induced leakage current in ultra-thin gate oxides

    International Nuclear Information System (INIS)

    Ceschia, M.; Paccagnella, A.; Cester, A.; Scarpa, A.

    1998-01-01

    Low-field leakage current has been measured in thin oxides after exposure to ionizing radiation. This Radiation Induced Leakage Current (RILC) can be described as an inelastic tunneling process mediated by neutral traps in the oxide, with an energy loss of about 1 eV. The neutral trap distribution is influenced by the oxide field applied during irradiation, thus indicating that the precursors of the neutral defects are charged, likely being defects associated to trapped holes. The maximum leakage current is found under zero-field condition during irradiation, and it rapidly decreases as the field is enhanced, due to a displacement of the defect distribution across the oxide towards the cathodic interface. The RILC kinetics are linear with the cumulative dose, in contrast with the power law found on electrically stressed devices

  16. Digital power and performance analysis of inkjet printed ring oscillators based on electrolyte-gated oxide electronics

    Science.gov (United States)

    Cadilha Marques, Gabriel; Garlapati, Suresh Kumar; Dehm, Simone; Dasgupta, Subho; Hahn, Horst; Tahoori, Mehdi; Aghassi-Hagmann, Jasmin

    2017-09-01

    Printed electronic components offer certain technological advantages over their silicon based counterparts, like mechanical flexibility, low process temperatures, maskless and additive manufacturing possibilities. However, to be compatible to the fields of smart sensors, Internet of Things, and wearables, it is essential that devices operate at small supply voltages. In printed electronics, mostly silicon dioxide or organic dielectrics with low dielectric constants have been used as gate isolators, which in turn have resulted in high power transistors operable only at tens of volts. Here, we present inkjet printed circuits which are able to operate at supply voltages as low as ≤2 V. Our transistor technology is based on lithographically patterned drive electrodes, the dimensions of which are carefully kept well within the printing resolutions; the oxide semiconductor, the electrolytic insulator and the top-gate electrodes have been inkjet printed. Our inverters show a gain of ˜4 and 2.3 ms propagation delay time at 1 V supply voltage. Subsequently built 3-stage ring oscillators start to oscillate at a supply voltage of only 0.6 V with a frequency of ˜255 Hz and can reach frequencies up to ˜350 Hz at 2 V supply voltage. Furthermore, we have introduced a systematic methodology for characterizing ring oscillators in the printed electronics domain, which has been largely missing. Benefiting from this procedure, we are now able to predict the switching capacitance and driver capability at each stage, as well as the power consumption of our inkjet printed ring oscillators. These achievements will be essential for analyzing the performance and power characteristics of future inkjet printed digital circuits.

  17. Modelling of Leakage Current Through Double Dielectric Gate Stack in Metal Oxide Semiconductor Capacitor

    International Nuclear Information System (INIS)

    Fatimah A Noor; Mikrajuddin Abdullah; Sukirno; Khairurrijal

    2008-01-01

    In this paper, we have derived analytical expression of leakage current through double barriers in Metal Oxide Semiconductor (MOS) capacitor. Initially, electron transmittance through the MOS capacitor was derived by including the coupling between the transverse and longitudinal energies. The transmittance was then employed to obtain leakage current through the double barrier. In this model, we observed the effect of electron velocity due to the coupling effect and the oxide thickness to the leakage current. The calculated results showed that the leakage current decreases as the electron velocity increases. (author)

  18. Oxidation of Phe454 in the Gating Segment Inactivates Trametes multicolor Pyranose Oxidase during Substrate Turnover

    Czech Academy of Sciences Publication Activity Database

    Halada, Petr; Brugger, D.; Volc, Jindřich; Peterbauer, C.K.; Leitner, C.; Haltrich, D.

    2016-01-01

    Roč. 11, č. 2 (2016), e0148108 E-ISSN 1932-6203 R&D Projects: GA MŠk(CZ) LO1509; GA MŠk MEB060910 Institutional support: RVO:61388971 Keywords : AMINO -ACID-RESIDUES * PROTEIN PHARMACEUTICALS * ENZYMATIC OXIDATION Subject RIV: EE - Microbiology, Virology Impact factor: 2.806, year: 2016

  19. Investigation of interface property in Al/SiO2/ n-SiC structure with thin gate oxide by illumination

    Science.gov (United States)

    Chang, P. K.; Hwu, J. G.

    2017-04-01

    The reverse tunneling current of Al/SiO2/ n-SiC structure employing thin gate oxide is introduced to examine the interface property by illumination. The gate current at negative bias decreases under blue LED illumination, yet increases under UV lamp illumination. Light-induced electrons captured by interface states may be emitted after the light sources are off, leading to the recovery of gate currents. Based on transient characteristics of gate current, the extracted trap level is close to the light energy for blue LED, indicating that electron capture induced by lighting may result in the reduction of gate current. Furthermore, bidirectional C- V measurements exhibit a positive voltage shift caused by electron trapping under blue LED illumination, while a negative voltage shift is observed under UV lamp illumination. Distinct trapping and detrapping behaviors can be observed from variations in I- V and C- V curves utilizing different light sources for 4H-SiC MOS capacitors with thin insulators.

  20. Cleaning Challenges of High-κ/Metal Gate Structures

    KAUST Repository

    Hussain, Muhammad Mustafa; Shamiryan, Denis G.; Paraschiv, Vasile; Sano, Kenichi; Reinhardt, Karen A.

    2010-01-01

    High-κ/metal gates are used as transistors for advanced logic applications to improve speed and eliminate electrical issues associated with polySi and SiO2 gates. Various integration schemes are possible and will be discussed, such as dual gate, gate-first, and gate-last, both of which require specialized cleaning and etching steps. Specific areas of discussion will include cleaning and conditioning of the silicon surface, forming a high-quality chemical oxide, removal of the high-κ dielectric with selectivity to the SiO2 layer, cleaning and residue removal after etching, and prevention of galvanic corrosion during cleaning. © 2011 Scrivener Publishing LLC. All rights reserved.

  1. Cleaning Challenges of High-κ/Metal Gate Structures

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-12-20

    High-κ/metal gates are used as transistors for advanced logic applications to improve speed and eliminate electrical issues associated with polySi and SiO2 gates. Various integration schemes are possible and will be discussed, such as dual gate, gate-first, and gate-last, both of which require specialized cleaning and etching steps. Specific areas of discussion will include cleaning and conditioning of the silicon surface, forming a high-quality chemical oxide, removal of the high-κ dielectric with selectivity to the SiO2 layer, cleaning and residue removal after etching, and prevention of galvanic corrosion during cleaning. © 2011 Scrivener Publishing LLC. All rights reserved.

  2. Integrated Science Assessment (ISA) for Sulfur Oxides ...

    Science.gov (United States)

    This draft document provides EPA’s evaluation and synthesis of the most policy-relevant science related to the health effects of sulfur oxides. When final, it will provide a critical part of the scientific foundation for EPA’s decision regarding the adequacy of the current primary (health-based) National Ambient Air Quality Standard (NAAQS) for sulfur dioxide. The references considered for inclusion in or cited in the external review draft ISA are available at https://hero.epa.gov/hero/sulfur-oxides. The intent of the ISA, according to the CAA, is to “accurately reflect the latest scientific knowledge expected from the presence of [a] pollutant in ambient air” (U.S. Code, 1970a, 1970b). It includes an assessment of scientific research from atmospheric sciences, exposure sciences, dosimetry, mode of action, animal and human toxicology, and epidemiology. Key information and judgments formerly found in the Air Quality Criteria Documents (AQCDs) for sulfur oxides (SOx) are included; Annexes provide additional details supporting the ISA. Together, the ISA and Annexes serve to update and revise the last SOx ISA which was published in 2008.

  3. Synchrotron X-ray irradiation effects on the device characteristics and the resistance to hot-carrier damage of MOSFETs with 4 nm thick gate oxides

    International Nuclear Information System (INIS)

    Tanaka, Yuusuke; Tanabe, Akira; Suzuki, Katsumi

    1998-01-01

    The effects of synchrotron x-ray irradiation on the device characteristics and hot-carrier resistance of n- and p-channel metal oxide semiconductor field effect transistors (MOSFETs) with 4 nm thick gate oxides are investigated. In p-channel MOSFETs, device characteristics were significantly affected by the x-ray irradiation but completely recovered after annealing, while the device characteristics in n-channel MOSFETs were not noticeably affected by the irradiation. This difference appears to be due to a difference in interface-state generation. In p-channel MOSFETs, defects caused by boron-ion penetration through the gate oxides may be sensitive to x-ray irradiation, causing the generation of many interface states. These interface states are completely eliminated after annealing in hydrogen gas. The effects of irradiation on the resistance to hot-carrier degradation in annealed 4 nm thick gate-oxide MOSFETs were negligible even at an x-ray dose of 6,000 mJ/cm 2

  4. Demonstration of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with silicon-oxy-nitride as the gate insulator

    International Nuclear Information System (INIS)

    Balachander, K.; Arulkumaran, S.; Egawa, T.; Sano, Y.; Baskar, K.

    2005-01-01

    AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs) were fabricated with plasma enhanced chemical vapor deposited silicon oxy-nitride (SiON) as an insulating layer. The compositions of SiON thin films were confirmed using X-ray photoelectron spectroscopy. The fabricated MOSHEMTs exhibited a very high saturation current density of 1.1 A/mm coupled with high positive operational gate voltage up to +7 V. The MOSHEMTs also exhibited four orders of low gate leakage current and high forward-on voltage when compared with the conventional HEMTs. The drain current collapse using gate pulse measurements showed only a negligible difference in the saturation current density revealing the drastic improvement in passivation of the surface states due to the high quality of dielectric thin films deposited. Thus, based on the improved direct-current operation, SiON can be considered to be a potential gate oxide comparable with other dielectric insulators

  5. Tungsten trioxide as high-{kappa} gate dielectric for highly transparent and temperature-stable zinc-oxide-based thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Lorenz, Michael; Wenckstern, Holger von; Grundmann, Marius [Universitaet Leipzig, Fakultaet fuer Physik und Geowissenschaften, Institut fuer Experimentelle Physik II, Linnestr. 5, 04103 Leipzig (Germany)

    2012-07-01

    We demonstrate metal-insulator-semiconductor field-effect transistors with high-{kappa}, room-temperature deposited, highly transparent tungsten trioxide (WO{sub 3}) as gate dielectric. The channel material consists of a zinc oxide (ZnO) thin-film. The transmittance and resistivity of WO{sub 3} films was tuned in order to obtain a highly transparent and insulating WO{sub 3} dielectric. The devices were processed by standard photolithography using lift-off technique. On top of the WO{sub 3} dielectric a highly transparent and conductive oxide consisting of ZnO: Al 3% wt. was deposited. The gate structure of the devices exhibits an average transmittance in the visible spectral range of 86%. The on/off-current ratio is larger than 10{sup 8} with off- and gate leakage-currents below 3 x 10{sup -8} A/cm{sup 2}. Due to the high relative permittivity of {epsilon}{sub r} {approx} 70, a gate voltage sweep of only 2 V is necessary to turn the transistor on and off with a minimum subthreshold swing of 80 mV/decade. The channel mobility of the transistors equals the Hall-effect mobility with a value of 5 cm{sup 2}/Vs. It is furthermore shown, that the devices are stable up to operating temperatures of at least 150 C.

  6. Wide operating window spin-torque majority gate towards large-scale integration of logic circuits

    Science.gov (United States)

    Vaysset, Adrien; Zografos, Odysseas; Manfrini, Mauricio; Mocuta, Dan; Radu, Iuliana P.

    2018-05-01

    Spin Torque Majority Gate (STMG) is a logic concept that inherits the non-volatility and the compact size of MRAM devices. In the original STMG design, the operating range was restricted to very small size and anisotropy, due to the exchange-driven character of domain expansion. Here, we propose an improved STMG concept where the domain wall is driven with current. Thus, input switching and domain wall propagation are decoupled, leading to higher energy efficiency and allowing greater technological optimization. To ensure majority operation, pinning sites are introduced. We observe through micromagnetic simulations that the new structure works for all input combinations, regardless of the initial state. Contrary to the original concept, the working condition is only given by threshold and depinning currents. Moreover, cascading is now possible over long distances and fan-out is demonstrated. Therefore, this improved STMG concept is ready to build complete Boolean circuits in absence of external magnetic fields.

  7. Fully integrated InGaAs/InP single-photon detector module with gigahertz sine wave gating

    Energy Technology Data Exchange (ETDEWEB)

    Liang Xiaolei; Ma Jian; Jin Ge; Chen Zengbing; Zhang Jun; Pan Jianwei [Hefei National Laboratory for Physical Sciences at Microscale and Department of Modern Physics, University of Science and Technology of China, Hefei, Anhui 230026 (China); Liu Jianhong; Wang Quan; Du Debing [Anhui Quantum Communication Technology Co., Ltd., Hefei, Anhui 230088 (China)

    2012-08-15

    InGaAs/InP single-photon avalanche diodes (SPADs) working in the regime of GHz clock rates are crucial components for the high-speed quantum key distribution (QKD). We have developed for the first time a compact, stable, and user-friendly tabletop InGaAs/InP single-photon detector system operating at a 1.25 GHz gate rate that fully integrates functions for controlling and optimizing SPAD performance. We characterize the key parameters of the detector system and test the long-term stability of the system for continuous operation of 75 h. The detector system can substantially enhance QKD performance and our present work paves the way for practical high-speed QKD applications.

  8. In-Ga-Zn-oxide thin-film transistors with Sb2TeOx gate insulators fabricated by reactive sputtering using a metallic Sb2Te target

    International Nuclear Information System (INIS)

    Cheong, Woo-Seok

    2011-01-01

    Using reactive sputtering, we made transparent amorphous Sb 2 TeO x thin films from a metallic Sb 2 Te target in an oxidizing atmosphere. In-Ga-Zn-oxide thin-film transistors (IGZO TFTs) with Sb 2 TeO x gate insulators deposited at room temperature showed a large hysteresis with a counter clockwise direction, which was caused by mobile charges in the gate insulators. The problems of the mobile charges was solved by using Sb 2 TeO x films formed at 250 .deg. C. After the IGZO TFT had been annealed at 200 .deg. C for 1 hour in an O 2 ambient, the mobility of the IGZO TFT was 22.41 cm 2 /Vs, and the drain current on-off ratio was ∼10 8 .

  9. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    KAUST Repository

    Sevilla, Galo T.; Almuslem, A. S.; Gumus, Abdurrahman; Hussain, Aftab M.; Hussain, Aftab M.; Cruz, Melvin; Hussain, Muhammad Mustafa

    2016-01-01

    shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using

  10. Integrated analysis of oxide nuclear fuel sintering

    International Nuclear Information System (INIS)

    Baranov, V.; Kuzmin, R.; Tenishev, A.; Timoshin, I.; Khlunov, A.; Ivanov, A.; Petrov, I.

    2011-01-01

    Dilatometric and thermal-gravimetric investigations have been carried out for the sintering process of oxide nuclear fuel in gaseous Ar - 8% H 2 atmosphere at temperatures up to 1600 0 C. The pressed compacts were fabricated under real production conditions of the OAO MSZ with application of two different technologies, so called 'dry' and 'wet' technologies. Effects of the grain size growth after the heating to different temperatures were observed. In order to investigate the effects produced by rate of heating on properties of sintered fuel pellets, the heating rates were varied from 1 to 8 0 C per minute. Time of isothermal overexposure at maximal temperature (1600 0 C) was about 8 hours. Real production conditions were imitated. The results showed that the sintering process of the fuel pellets produced by two technologies differs. The samples sintered under different heating rates were studied with application of scanning electronic microscopy analysis for determination of mean grain size. A simulation of heating profile for industrial furnaces was performed to reduce the beam cycles and estimate the effects of variation of the isothermal overexposure temperatures. Based on this data, an optimization of the sintering conditions was performed in operations terms of OAO MSZ. (authors)

  11. Physical and electrical characterizations of AlGaN/GaN MOS gate stacks with AlGaN surface oxidation treatment

    Science.gov (United States)

    Yamada, Takahiro; Watanabe, Kenta; Nozaki, Mikito; Shih, Hong-An; Nakazawa, Satoshi; Anda, Yoshiharu; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2018-06-01

    The impacts of inserting ultrathin oxides into insulator/AlGaN interfaces on their electrical properties were investigated to develop advanced AlGaN/GaN metal–oxide–semiconductor (MOS) gate stacks. For this purpose, the initial thermal oxidation of AlGaN surfaces in oxygen ambient was systematically studied by synchrotron radiation X-ray photoelectron spectroscopy (SR-XPS) and atomic force microscopy (AFM). Our physical characterizations revealed that, when compared with GaN surfaces, aluminum addition promotes the initial oxidation of AlGaN surfaces at temperatures of around 400 °C, followed by smaller grain growth above 850 °C. Electrical measurements of AlGaN/GaN MOS capacitors also showed that, although excessive oxidation treatment of AlGaN surfaces over around 700 °C has an adverse effect, interface passivation with the initial oxidation of the AlGaN surfaces at temperatures ranging from 400 to 500 °C was proven to be beneficial for fabricating high-quality AlGaN/GaN MOS gate stacks.

  12. Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO2 Gate Dielectrics by CF4 Plasma Treatment

    Science.gov (United States)

    Fan, Ching-Lin; Tseng, Fan-Ping; Tseng, Chiao-Yuan

    2018-01-01

    In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) with a HfO2 gate insulator and CF4 plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO2 gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm2/V∙s (without treatment) to 54.6 cm2/V∙s (with CF4 plasma treatment), which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO2 gate dielectric has also been improved by the CF4 plasma treatment. By applying the CF4 plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device’s immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF4 plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO2 gate dielectric, but also enhances the device’s reliability. PMID:29772767

  13. Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO2 Gate Dielectrics by CF4 Plasma Treatment

    Directory of Open Access Journals (Sweden)

    Ching-Lin Fan

    2018-05-01

    Full Text Available In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs with a HfO2 gate insulator and CF4 plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO2 gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm2/V∙s (without treatment to 54.6 cm2/V∙s (with CF4 plasma treatment, which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO2 gate dielectric has also been improved by the CF4 plasma treatment. By applying the CF4 plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device’s immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF4 plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO2 gate dielectric, but also enhances the device’s reliability.

  14. Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO₂ Gate Dielectrics by CF₄ Plasma Treatment.

    Science.gov (United States)

    Fan, Ching-Lin; Tseng, Fan-Ping; Tseng, Chiao-Yuan

    2018-05-17

    In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) with a HfO₂ gate insulator and CF₄ plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO₂ gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm²/V∙s (without treatment) to 54.6 cm²/V∙s (with CF₄ plasma treatment), which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO₂ gate dielectric has also been improved by the CF₄ plasma treatment. By applying the CF₄ plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device's immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF₄ plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO₂ gate dielectric, but also enhances the device's reliability.

  15. A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array-Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique.

    Science.gov (United States)

    Yang, Chen; Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

    2017-06-24

    With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array-application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

  16. A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array−Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique

    Directory of Open Access Journals (Sweden)

    Chen Yang

    2017-06-01

    Full Text Available With the development of satellite load technology and very large scale integrated (VLSI circuit technology, onboard real-time synthetic aperture radar (SAR imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT, which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array−application-specific integrated circuit (FPGA-ASIC hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

  17. Temperature Effects on a-IGZO Thin Film Transistors Using HfO2 Gate Dielectric Material

    OpenAIRE

    Lin, Yu-Hsien; Chou, Jay-Chi

    2014-01-01

    This study investigated the temperature effect on amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) using hafnium oxide (HfO2) gate dielectric material. HfO2 is an attractive candidate as a high-κ dielectric material for gate oxide because it has great potential to exhibit superior electrical properties with a high drive current. In the process of integrating the gate dielectric and IGZO thin film, postannealing treatment is an essential process for completing the chem...

  18. Non-volatile nano-floating gate memory with Pt-Fe{sub 2}O{sub 3} composite nanoparticles and indium gallium zinc oxide channel

    Energy Technology Data Exchange (ETDEWEB)

    Hu, Quanli [Myongji University, Department of Nano Science and Engineering (Korea, Republic of); Lee, Seung Chang; Baek, Yoon-Jae [Myongji University, Department of Materials Science and Engineering (Korea, Republic of); Lee, Hyun Ho [Myongji University, Department of Chemical Engineering (Korea, Republic of); Kang, Chi Jung [Myongji University, Department of Nano Science and Engineering (Korea, Republic of); Kim, Hyun-Mi; Kim, Ki-Bum [Seoul National University, Department of Materials Science and Engineering (Korea, Republic of); Yoon, Tae-Sik, E-mail: tsyoon@mju.ac.kr [Myongji University, Department of Nano Science and Engineering (Korea, Republic of)

    2013-02-15

    Non-volatile nano-floating gate memory characteristics with colloidal Pt-Fe{sub 2}O{sub 3} composite nanoparticles with a mostly core-shell structure and indium gallium zinc oxide channel layer were investigated. The Pt-Fe{sub 2}O{sub 3} nanoparticles were chemically synthesized through the preferential oxidation of Fe and subsequent pileup of Pt into the core in the colloidal solution. The uniformly assembled nanoparticles' layer could be formed with a density of {approx}3 Multiplication-Sign 10{sup 11} cm{sup -2} by a solution-based dip-coating process. The Pt core ({approx}3 nm in diameter) and Fe{sub 2}O{sub 3}-shell ({approx}6 nm in thickness) played the roles of the charge storage node and tunneling barrier, respectively. The device exhibited the hysteresis in current-voltage measurement with a threshold voltage shift of {approx}4.76 V by gate voltage sweeping to +30 V. It also showed the threshold shift of {approx}0.66 V after pulse programming at +20 V for 1 s with retention > {approx}65 % after 10{sup 4} s. These results demonstrate the feasibility of using colloidal nanoparticles with core-shell structure as gate stacks of the charge storage node and tunneling dielectric for low-temperature and solution-based processed non-volatile memory devices.

  19. Effects of Y incorporation in TaON gate dielectric on electrical performance of GaAs metal-oxide-semiconductor capacitor

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Li Ning; Choi, Hoi Wai; Lai, Pui To [Department of Electrical and Electronic Engineering, The University of Hong Kong (China); Xu, Jing Ping [School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan (China)

    2016-09-15

    In this study, GaAs metal-oxide-semiconductor (MOS) capacitors using Y-incorporated TaON as gate dielectric have been investigated. Experimental results show that the sample with a Y/(Y + Ta) atomic ratio of 27.6% exhibits the best device characteristics: high k value (22.9), low interfacestate density (9.0 x 10{sup 11} cm{sup -2} eV{sup -1}), small flatband voltage (1.05 V), small frequency dispersion and low gate leakage current (1.3 x 10{sup -5}A/cm{sup 2} at V{sub fb} + 1 V). These merits should be attributed to the complementary properties of Y{sub 2}O{sub 3} and Ta{sub 2}O{sub 5}:Y can effectively passivate the large amount of oxygen vacancies in Ta{sub 2}O{sub 5}, while the positively-charged oxygen vacancies in Ta{sub 2}O{sub 5} are capable of neutralizing the effects of the negative oxide charges in Y{sub 2}O{sub 3}. This work demonstrates that an appropriate doping of Y content in TaON gate dielectric can effectively improve the electrical performance for GaAs MOS devices. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  20. Signatures of Mechanosensitive Gating.

    Science.gov (United States)

    Morris, Richard G

    2017-01-10

    The question of how mechanically gated membrane channels open and close is notoriously difficult to address, especially if the protein structure is not available. This perspective highlights the relevance of micropipette-aspirated single-particle tracking-used to obtain a channel's diffusion coefficient, D, as a function of applied membrane tension, σ-as an indirect assay for determining functional behavior in mechanosensitive channels. While ensuring that the protein remains integral to the membrane, such methods can be used to identify not only the gating mechanism of a protein, but also associated physical moduli, such as torsional and dilational rigidity, which correspond to the protein's effective shape change. As an example, three distinct D-versus-σ "signatures" are calculated, corresponding to gating by dilation, gating by tilt, and gating by a combination of both dilation and tilt. Both advantages and disadvantages of the approach are discussed. Copyright © 2017 Biophysical Society. Published by Elsevier Inc. All rights reserved.

  1. Comparative study on nitridation and oxidation plasma interface treatment for AlGaN/GaN MIS-HEMTs with AlN gate dielectric

    Science.gov (United States)

    Zhu, Jie-Jie; Ma, Xiao-Hua; Hou, Bin; Chen, Li-Xiang; Zhu, Qing; Hao, Yue

    2017-02-01

    This paper demonstrated the comparative study on interface engineering of AlN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) by using plasma interface pre-treatment in various ambient gases. The 15 nm AlN gate dielectric grown by plasma-enhanced atomic layer deposition significantly suppressed the gate leakage current by about two orders of magnitude and increased the peak field-effect mobility by more than 50%. NH3/N2 nitridation plasma treatment (NPT) was used to remove the 3 nm poor-quality interfacial oxide layer and N2O/N2 oxidation plasma treatment (OPT) to improve the quality of interfacial layer, both resulting in improved dielectric/barrier interface quality, positive threshold voltage (V th) shift larger than 0.9 V, and negligible dispersion. In comparison, however, NPT led to further decrease in interface charges by 3.38 × 1012 cm-2 and an extra positive V th shift of 1.3 V. Analysis with fat field-effect transistors showed that NPT resulted in better sub-threshold characteristics and transconductance linearity for MIS-HEMTs compared with OPT. The comparative study suggested that direct removing the poor interfacial oxide layer by nitridation plasma was superior to improving the quality of interfacial layer by oxidation plasma for the interface engineering of GaN-based MIS-HEMTs.

  2. Vacancy-fluorine complexes and their impact on the properties of metal-oxide transistors with high-k gate dielectrics studied using monoenergetic positron beams

    Science.gov (United States)

    Uedono, A.; Inumiya, S.; Matsuki, T.; Aoyama, T.; Nara, Y.; Ishibashi, S.; Ohdaira, T.; Suzuki, R.; Miyazaki, S.; Yamada, K.

    2007-09-01

    Vacancy-fluorine complexes in metal-oxide semiconductors (MOS) with high-k gate dielectrics were studied using a positron annihilation technique. F+ ions were implanted into Si substrates before the deposition of gate dielectrics (HfSiON). The shift of threshold voltage (Vth) in MOS capacitors and an increase in Fermi level position below the HfSiON/Si interface were observed after F+ implantation. Doppler broadening spectra of the annihilation radiation and positron lifetimes were measured before and after HfSiON fabrication processes. From a comparison between Doppler broadening spectra and those obtained by first-principles calculation, the major defect species in Si substrates after annealing treatment (1050 °C, 5 s) was identified as vacancy-fluorine complexes (V3F2). The origin of the Vth shift in the MOS capacitors was attributed to V3F2 located in channel regions.

  3. Paraffin wax passivation layer improvements in electrical characteristics of bottom gate amorphous indium–gallium–zinc oxide thin-film transistors

    International Nuclear Information System (INIS)

    Chang, Geng-Wei; Chang, Ting-Chang; Syu, Yong-En; Tsai, Tsung-Ming; Chang, Kuan-Chang; Tu, Chun-Hao; Jian, Fu-Yen; Hung, Ya-Chi; Tai, Ya-Hsiang

    2011-01-01

    In this research, paraffin wax is employed as the passivation layer of the bottom gate amorphous indium–gallium–zinc oxide thin-film transistors (a-IGZO TFTs), and it is formed by sol–gel process in the atmosphere. The high yield and low cost passivation layer of sol–gel process technology has attracted much attention for current flat-panel-display manufacturing. Comparing with passivation-free a-IGZO TFTs, passivated devices exhibit a superior stability against positive gate bias stress in different ambient gas, demonstrating that paraffin wax shows gas-resisting characteristics for a-IGZO TFTs application. Furthermore, light-induced stretch-out phenomenon for paraffin wax passivated device is suppressed. This superior stability of the passivated device was attributed to the reduced total density of states (DOS) including the interfacial and semiconductor bulk trap densities.

  4. A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under positive gate bias stress

    Energy Technology Data Exchange (ETDEWEB)

    Niang, K. M.; Flewitt, A. J., E-mail: ajf@eng.cam.ac.uk [Electrical Engineering Division, Cambridge University, J J Thomson Avenue, Cambridge CB3 0FA (United Kingdom); Barquinha, P. M. C.; Martins, R. F. P. [i3N/CENIMAT, Department of Materials Science, Faculty of Science and Technology, Universidade NOVA de Lisboa and CEMOP/UNINOVA, Campus de Caparica, 2829-516 Caparica (Portugal); Cobb, B. [Holst Centre/TNO, High Tech Campus 31, 5656AE Eindhoven (Netherlands); Powell, M. J. [252, Valley Drive, Kendal LA9 7SL (United Kingdom)

    2016-02-29

    Thin film transistors (TFTs) employing an amorphous indium gallium zinc oxide (a-IGZO) channel layer exhibit a positive shift in the threshold voltage under the application of positive gate bias stress (PBS). The time and temperature dependence of the threshold voltage shift was measured and analysed using the thermalization energy concept. The peak energy barrier to defect conversion is extracted to be 0.75 eV and the attempt-to-escape frequency is extracted to be 10{sup 7} s{sup −1}. These values are in remarkable agreement with measurements in a-IGZO TFTs under negative gate bias illumination stress (NBIS) reported recently (Flewitt and Powell, J. Appl. Phys. 115, 134501 (2014)). This suggests that the same physical process is responsible for both PBS and NBIS, and supports the oxygen vacancy defect migration model that the authors have previously proposed.

  5. Bimodal gate-dielectric deposition for improved performance of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    International Nuclear Information System (INIS)

    Pang Liang; Kim, Kyekyoon

    2012-01-01

    A bimodal deposition scheme combining radiofrequency magnetron sputtering and plasma enhanced chemical vapour deposition (PECVD) is proposed as a means for improving the performance of GaN-based metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs). High-density sputtered-SiO 2 is utilized to reduce the gate leakage current and enhance the breakdown voltage while low-density PECVD-SiO 2 is employed to buffer the sputtering damage and further increase the drain current by engineering the stress-induced-polarization. Thus-fabricated MOSHEMT exhibited a low leakage current of 4.21 × 10 -9 A mm -1 and high breakdown voltage of 634 V for a gate-drain distance of 6 µm, demonstrating the promise of bimodal-SiO 2 deposition scheme for the development of GaN-based MOSHEMTs for high-power application. (paper)

  6. Enhancement mode GaN-based multiple-submicron channel array gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors

    Science.gov (United States)

    Lee, Ching-Ting; Wang, Chun-Chi

    2018-04-01

    To study the function of channel width in multiple-submicron channel array, we fabricated the enhancement mode GaN-based gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) with a channel width of 450 nm and 195 nm, respectively. In view of the enhanced gate controllability in a narrower fin-channel structure, the transconductance was improved from 115 mS/mm to 151 mS/mm, the unit gain cutoff frequency was improved from 6.2 GHz to 6.8 GHz, and the maximum oscillation frequency was improved from 12.1 GHz to 13.1 GHz of the devices with a channel width of 195 nm, compared with the devices with a channel width of 450 nm.

  7. 125 GHz sine wave gating InGaAs/InP single-photon detector with a monolithically integrated readout circuit

    Science.gov (United States)

    Jiang, Wen-Hao; Liu, Jian-Hong; Liu, Yin; Jin, Ge; Zhang, Jun; Pan, Jian-Wei

    2017-12-01

    InGaAs/InP single-photon detectors (SPDs) are the key devices for applications requiring near-infrared single-photon detection. Gating mode is an effective approach to synchronous single-photon detection. Increasing gating frequency and reducing module size are important challenges for the design of such detector system. Here we present for the first time an InGaAs/InP SPD with 1.25 GHz sine wave gating using a monolithically integrated readout circuit (MIRC). The MIRC has a size of 15 mm * 15 mm and implements the miniaturization of avalanche extraction for high-frequency sine wave gating. In the MIRC, low-pass filters and a low-noise radio frequency amplifier are integrated based on the technique of low temperature co-fired ceramic, which can effectively reduce the parasitic capacitance and extract weak avalanche signals. We then characterize the InGaAs/InP SPD to verify the functionality and reliability of MIRC, and the SPD exhibits excellent performance with 27.5 % photon detection efficiency, 1.2 kcps dark count rate, and 9.1 % afterpulse probability at 223 K and 100 ns hold-off time. With this MIRC, one can further design miniaturized high-frequency SPD modules that are highly required for practical applications.

  8. Gamma-ray irradiation and post-irradiation at room and elevated temperature response of pMOS dosimeters with thick gate oxides

    Directory of Open Access Journals (Sweden)

    Pejović Momčilo M.

    2011-01-01

    Full Text Available Gamma-ray irradiation and post-irradiation response at room and elevated temperature have been studied for radiation sensitive pMOS transistors with gate oxide thickness of 100 and 400 nm, respectively. Their response was followed based on the changes in the threshold voltage shift which was estimated on the basis of transfer characteristics in saturation. The presence of radiation-induced fixed oxide traps and switching traps - which lead to a change in the threshold voltage - was estimated from the sub-threshold I-V curves, using the midgap technique. It was shown that fixed oxide traps have a dominant influence on the change in the threshold voltage shift during gamma-ray irradiation and annealing.

  9. Trap state passivation improved hot-carrier instability by zirconium-doping in hafnium oxide in a nanoscale n-metal-oxide semiconductor-field effect transistors with high-k/metal gate

    International Nuclear Information System (INIS)

    Liu, Hsi-Wen; Tsai, Jyun-Yu; Liu, Kuan-Ju; Lu, Ying-Hsin; Chang, Ting-Chang; Chen, Ching-En; Tseng, Tseung-Yuen; Lin, Chien-Yu; Cheng, Osbert; Huang, Cheng-Tung; Ye, Yi-Han

    2016-01-01

    This work investigates the effect on hot carrier degradation (HCD) of doping zirconium into the hafnium oxide high-k layer in the nanoscale high-k/metal gate n-channel metal-oxide-semiconductor field-effect-transistors. Previous n-metal-oxide semiconductor-field effect transistor studies demonstrated that zirconium-doped hafnium oxide reduces charge trapping and improves positive bias temperature instability. In this work, a clear reduction in HCD is observed with zirconium-doped hafnium oxide because channel hot electron (CHE) trapping in pre-existing high-k bulk defects is the main degradation mechanism. However, this reduced HCD became ineffective at ultra-low temperature, since CHE traps in the deeper bulk defects at ultra-low temperature, while zirconium-doping only passivates shallow bulk defects.

  10. Optical XOR gate

    Science.gov (United States)

    Vawter, G. Allen

    2013-11-12

    An optical XOR gate is formed as a photonic integrated circuit (PIC) from two sets of optical waveguide devices on a substrate, with each set of the optical waveguide devices including an electroabsorption modulator electrically connected in series with a waveguide photodetector. The optical XOR gate utilizes two digital optical inputs to generate an XOR function digital optical output. The optical XOR gate can be formed from III-V compound semiconductor layers which are epitaxially deposited on a III-V compound semiconductor substrate, and operates at a wavelength in the range of 0.8-2.0 .mu.m.

  11. Physical and electrical properties of thermal oxidized Sm{sub 2}O{sub 3} gate oxide thin film on Si substrate: Influence of oxidation durations

    Energy Technology Data Exchange (ETDEWEB)

    Goh, Kian Heng; Haseeb, A.S.M.A.; Wong, Yew Hoong, E-mail: yhwong@um.edu.my

    2016-05-01

    Growth of 150 nm Sm{sub 2}O{sub 3} films by sputtered pure samarium metal film on silicon substrates and followed by thermal oxidation process in oxygen ambient at 700 °C through various oxidation durations (5 min, 10 min, 15 min and 20 min) has been carried out. The crystallinity of Sm{sub 2}O{sub 3} film and existence of interfacial layer have been evaluated by X-ray diffraction, Fourier transform infrared and Raman analysis. Crystallite size and microstrain of Sm{sub 2}O{sub 3} were estimated by Williamson–Hall plot analysis. Calculated crystallite size of Sm{sub 2}O{sub 3} from Scherrer equation has similar trend with the value from Williamson–Hall plot. The presence of interfacial layer is supported by composition line scan by energy dispersive X-ray spectroscopy analysis. The surface roughness and surface topography of Sm{sub 2}O{sub 3} film were examined by atomic force microscopy analysis. The electrical characterization revealed that 15 min of oxidation durations with smoothest surface has highest breakdown voltage, lowest leakage current density and highest barrier height value. - Highlights: • Thermal oxidation of sputtered pure metallic Sm in oxygen ambient • Formation of polycrystalline Sm{sub 2}O{sub 3} and semi-polycrystalline interfacial layers • Optimization of oxidation duration of pure metallic Sm in oxygen ambient • Enhanced electrical performance with smooth surface and increased barrier height.

  12. Materials Fundamentals of Gate Dielectrics

    CERN Document Server

    Demkov, Alexander A

    2006-01-01

    This book presents materials fundamentals of novel gate dielectrics that are being introduced into semiconductor manufacturing to ensure the continuous scalling of the CMOS devices. This is a very fast evolving field of research so we choose to focus on the basic understanding of the structure, thermodunamics, and electronic properties of these materials that determine their performance in device applications. Most of these materials are transition metal oxides. Ironically, the d-orbitals responsible for the high dielectric constant cause sever integration difficulties thus intrinsically limiting high-k dielectrics. Though new in the electronics industry many of these materials are wel known in the field of ceramics, and we describe this unique connection. The complexity of the structure-property relations in TM oxides makes the use of the state of the art first-principles calculations necessary. Several chapters give a detailed description of the modern theory of polarization, and heterojunction band discont...

  13. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-06-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

  14. Femtosecond all-optical parallel logic gates based on tunable saturable to reverse saturable absorption in graphene-oxide thin films

    International Nuclear Information System (INIS)

    Roy, Sukhdev; Yadav, Chandresh

    2013-01-01

    A detailed theoretical analysis of ultrafast transition from saturable absorption (SA) to reverse saturable absorption (RSA) has been presented in graphene-oxide thin films with femtosecond laser pulses at 800 nm. Increase in pulse intensity leads to switching from SA to RSA with increased contrast due to two-photon absorption induced excited-state absorption. Theoretical results are in good agreement with reported experimental results. Interestingly, it is also shown that increase in concentration results in RSA to SA transition. The switching has been optimized to design parallel all-optical femtosecond NOT, AND, OR, XOR, and the universal NAND and NOR logic gates

  15. Real-time QRS detection using integrated variance for ECG gated cardiac MRI

    Directory of Open Access Journals (Sweden)

    Schmidt Marcus

    2016-09-01

    Full Text Available During magnetic resonance imaging (MRI, a patient’s vital signs are required for different purposes. In cardiac MRI (CMR, an electrocardiogram (ECG of the patient is required for triggering the image acquisition process. However, a reliable QRS detection of an ECG signal acquired inside an MRI scanner is a challenging task due to the magnetohydrodynamic (MHD effect which interferes with the ECG. The aim of this work was to develop a reliable QRS detector usable inside the MRI which also fulfills the standards for medical devices (IEC 60601-2-27. Therefore, a novel real-time QRS detector based on integrated variance measurements is presented. The algorithm was trained on ANSI/AAMI EC13 test waveforms and was then applied to two databases with 12-lead ECG signals recorded inside and outside an MRI scanner. Reliable results for both databases were achieved for the ECG signals recorded inside (DBMRI: sensitivity Se = 99.94%, positive predictive value +P = 99.84% and outside (DBInCarT: Se = 99.29%, +P = 99.72% the MRI. Due to the accurate R-peak detection in real-time this can be used for monitoring and triggering in MRI exams.

  16. Decrease in effective electron mobility in the channel of a metal-oxide-semiconductor transistor as the gate length is decreased

    International Nuclear Information System (INIS)

    Frantsuzov, A. A.; Boyarkina, N. I.; Popov, V. P.

    2008-01-01

    Effective electron mobility μ eff in channels of metal-oxide-semiconductor transistors with a gate length L in the range of 3.8 to 0.34 μm was measured; the transistors were formed on wafers of the silicon-oninsulator type. It was found that μ eff decreases as L is decreased. It is shown that this decrease can be accounted for by the effect of series resistances of the source and drain only if it is assumed that there is a rapid increase in these resistances as the gate voltage is decreased. This assumption is difficult to substantiate. A more realistic model is suggested; this model accounts for the observed decrease in μ eff as L is decreased. The model implies that zones with a mobility lower than that in the middle part of the channel originate at the edges of the gate. An analysis shows that, in this case, the plot of the dependence of 1/μ eff on 1/L should be linear, which is exactly what is observed experimentally. The use of this plot makes it possible to determine both the electron mobility μ 0 in the middle part of the channel and the quantity A that characterizes the zones with lowered mobility at the gate’s edges.

  17. Comparison of gated and non-gated detectors for double-pulse laser induced plasma analysis of trace elements in iron oxide

    International Nuclear Information System (INIS)

    Heilbrunner, H.; Huber, N.; Wolfmeir, H.; Arenholz, E.; Pedarnig, J.D.; Heitz, J.

    2012-01-01

    Double-pulse laser-induced breakdown spectroscopy (LIBS) is an emerging technique for accurate compositional analysis of many different materials. We present results of collinear double-pulse LIBS for analysis of the trace elements aluminum, phosphorus and boron in sintered iron oxide targets. The samples were ablated in air by double-pulse Nd:YAG laser radiation (6 ns pulse duration, laser wavelength of 532 nm) and spectra were recorded with an Echelle spectrometer equipped either with a CCD (charge coupled device) or an ICCD (intensified charge coupled device) camera. For the trace elements aluminum and phosphorus, the use of the CCD detector system resulted in considerable higher signal-to-noise ratios and/or better limits of detection compared to the results achieved with the ICCD detector. The use of CCD double-pulse LIBS enables to detect low concentrations of phosphorus with a limit of detection of 10 ppm by evaluating the UV line at 214.91 nm, which overlaps with a Fe I line. Compared to the ICCD system, the CCD system requires the accumulation of a higher number of laser double-pulses to achieve acceptable signal quality. This can be disadvantageous for elements showing pronounced depletion effects as for the trace element boron in sintered iron oxide targets. - Highlights: ► Direct comparison of double-pulse LIBS analysis using CCD and ICCD detectors ► Double-pulse LIBS technique for monitoring of trace elements in iron oxide ► CCD detector can result in better signal-to-noise ratios and limits of detection. ► Low P concentrations detectable by CCD double-pulse LIBS of the line at 214.91 nm ► CCD system disadvantageous for elements showing pronounced depletion effects

  18. Linear gate

    International Nuclear Information System (INIS)

    Suwono.

    1978-01-01

    A linear gate providing a variable gate duration from 0,40μsec to 4μsec was developed. The electronic circuity consists of a linear circuit and an enable circuit. The input signal can be either unipolar or bipolar. If the input signal is bipolar, the negative portion will be filtered. The operation of the linear gate is controlled by the application of a positive enable pulse. (author)

  19. Process development of ITO source/drain electrode for the top-gate indium-gallium-zinc oxide transparent thin-film transistor

    International Nuclear Information System (INIS)

    Cheong, Woo-Seok; Yoon, Young-sun; Shin, Jae-Heon; Hwang, Chi-Sun; Chu, Hye Yong

    2009-01-01

    Indium-tin oxide (ITO) has been widely used as electrodes for LCDs and OLEDs. The applications are expanding to the transparent thin-film transistors (TTFT S ) for the versatile circuits or transparent displays. This paper is related with optimization of ITO source and drain electrode for TTFTs on glass substrates. For example, un-etched ITO remnants, which frequently found in the wet etching process, often originate from unsuitable ITO formation processes. In order to improve them, an ion beam deposition method is introduced, which uses for forming a seed layer before the main ITO deposition. We confirm that ITO films with seed layers are effective to obtain clean and smooth glass surfaces without un-etched ITO remnants, resulting in a good long-run electrical stability of the top-gate indium-gallium-zinc oxide-TTFT.

  20. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-02-12

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  1. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa; Sevilla, Galo T.

    2013-01-01

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry's most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  2. 1.25  GHz sine wave gating InGaAs/InP single-photon detector with a monolithically integrated readout circuit.

    Science.gov (United States)

    Jiang, Wen-Hao; Liu, Jian-Hong; Liu, Yin; Jin, Ge; Zhang, Jun; Pan, Jian-Wei

    2017-12-15

    InGaAs/InP single-photon detectors (SPDs) are the key devices for applications requiring near-infrared single-photon detection. The gating mode is an effective approach to synchronous single-photon detection. Increasing gating frequency and reducing the module size are important challenges for the design of such a detector system. Here we present for the first time, to the best of our knowledge, an InGaAs/InP SPD with 1.25 GHz sine wave gating (SWG) using a monolithically integrated readout circuit (MIRC). The MIRC has a size of 15  mm×15  mm and implements the miniaturization of avalanche extraction for high-frequency SWG. In the MIRC, low-pass filters and a low-noise radio frequency amplifier are integrated based on the technique of low temperature co-fired ceramic, which can effectively reduce the parasitic capacitance and extract weak avalanche signals. We then characterize the InGaAs/InP SPD to verify the functionality and reliability of the MIRC, and the SPD exhibits excellent performance with 27.5% photon detection efficiency, a 1.2 kcps dark count rate, and 9.1% afterpulse probability at 223 K and 100 ns hold-off time. With this MIRC, one can further design miniaturized high-frequency SPD modules that are highly required for practical applications.

  3. Verifying 4D gated radiotherapy using time-integrated electronic portal imaging: a phantom and clinical study

    Directory of Open Access Journals (Sweden)

    Slotman Ben J

    2007-08-01

    Full Text Available Abstract Background Respiration-gated radiotherapy (RGRT can decrease treatment toxicity by allowing for smaller treatment volumes for mobile tumors. RGRT is commonly performed using external surrogates of tumor motion. We describe the use of time-integrated electronic portal imaging (TI-EPI to verify the position of internal structures during RGRT delivery Methods TI-EPI portals were generated by continuously collecting exit dose data (aSi500 EPID, Portal vision, Varian Medical Systems when a respiratory motion phantom was irradiated during expiration, inspiration and free breathing phases. RGRT was delivered using the Varian RPM system, and grey value profile plots over a fixed trajectory were used to study object positions. Time-related positional information was derived by subtracting grey values from TI-EPI portals sharing the pixel matrix. TI-EPI portals were also collected in 2 patients undergoing RPM-triggered RGRT for a lung and hepatic tumor (with fiducial markers, and corresponding planning 4-dimensional CT (4DCT scans were analyzed for motion amplitude. Results Integral grey values of phantom TI-EPI portals correlated well with mean object position in all respiratory phases. Cranio-caudal motion of internal structures ranged from 17.5–20.0 mm on planning 4DCT scans. TI-EPI of bronchial images reproduced with a mean value of 5.3 mm (1 SD 3.0 mm located cranial to planned position. Mean hepatic fiducial markers reproduced with 3.2 mm (SD 2.2 mm caudal to planned position. After bony alignment to exclude set-up errors, mean displacement in the two structures was 2.8 mm and 1.4 mm, respectively, and corresponding reproducibility in anatomy improved to 1.6 mm (1 SD. Conclusion TI-EPI appears to be a promising method for verifying delivery of RGRT. The RPM system was a good indirect surrogate of internal anatomy, but use of TI-EPI allowed for a direct link between anatomy and breathing patterns.

  4. Atomic layer deposited oxide films as protective interface layers for integrated graphene transfer

    Science.gov (United States)

    Cabrero-Vilatela, A.; Alexander-Webber, J. A.; Sagade, A. A.; Aria, A. I.; Braeuninger-Weimer, P.; Martin, M.-B.; Weatherup, R. S.; Hofmann, S.

    2017-12-01

    The transfer of chemical vapour deposited graphene from its parent growth catalyst has become a bottleneck for many of its emerging applications. The sacrificial polymer layers that are typically deposited onto graphene for mechanical support during transfer are challenging to remove completely and hence leave graphene and subsequent device interfaces contaminated. Here, we report on the use of atomic layer deposited (ALD) oxide films as protective interface and support layers during graphene transfer. The method avoids any direct contact of the graphene with polymers and through the use of thicker ALD layers (≥100 nm), polymers can be eliminated from the transfer-process altogether. The ALD film can be kept as a functional device layer, facilitating integrated device manufacturing. We demonstrate back-gated field effect devices based on single-layer graphene transferred with a protective Al2O3 film onto SiO2 that show significantly reduced charge trap and residual carrier densities. We critically discuss the advantages and challenges of processing graphene/ALD bilayer structures.

  5. A low specific on-resistance SOI MOSFET with dual gates and a recessed drain

    International Nuclear Information System (INIS)

    Luo Xiao-Rong; Hu Gang-Yi; Zhang Zheng-Yuan; Luo Yin-Chun; Fan Ye; Wang Xiao-Wei; Fan Yuan-Hang; Cai Jin-Yong; Wang Pei; Zhou Kun

    2013-01-01

    A low specific on-resistance (R on,sp ) integrable silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is proposed and investigated by simulation. The MOSFET features a recessed drain as well as dual gates, which consist of a planar gate and a trench gate extended to the buried oxide layer (BOX) (DGRD MOSFET). First, the dual gates form dual conduction channels, and the extended trench gate also acts as a field plate to improve the electric field distribution. Second, the combination of the trench gate and the recessed drain widens the vertical conduction area and shortens the current path. Third, the P-type top layer not only enhances the drift doping concentration but also modulates the surface electric field distributions. All of these sharply reduce R on,sp and maintain a high breakdown voltage (BV). The BV of 233 V and R on,sp of 4.151 mΩ·cm 2 (V GS = 15 V) are obtained for the DGRD MOSFET with 15-μm half-cell pitch. Compared with the trench gate SOI MOSFET and the conventional MOSFET, R on,sp of the DGRD MOSFET decreases by 36% and 33% with the same BV, respectively. The trench gate extended to the BOX synchronously acts as a dielectric isolation trench, simplifying the fabrication processes. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  6. Interface passivation and trap reduction via hydrogen fluoride for molybdenum disulfide on silicon oxide back-gate transistors

    Science.gov (United States)

    Hu, Yaoqiao; San Yip, Pak; Tang, Chak Wah; Lau, Kei May; Li, Qiang

    2018-04-01

    Layered semiconductor molybdenum disulfide (MoS2) has recently emerged as a promising material for flexible electronic and optoelectronic devices because of its finite bandgap and high degree of gate control. Here, we report a hydrogen fluoride (HF) passivation technique for improving the carrier mobility and interface quality of chemical vapor deposited monolayer MoS2 on a SiO2/Si substrate. After passivation, the fabricated MoS2 back-gate transistors demonstrate a more than double improvement in average electron mobility, a reduced gate hysteresis gap of 3 V, and a low interface trapped charge density of ˜5.8 × 1011 cm-2. The improvements are attributed to the satisfied interface dangling bonds, thus a reduction of interface trap states and trapped charges. Surface x-ray photoelectron spectroscopy analysis and first-principles simulation were performed to verify the HF passivation effect. The results here highlight the necessity of a MoS2/dielectric passivation strategy and provides a viable route for enhancing the performance of MoS2 nano-electronic devices.

  7. Instrumentation for Gate Current Noise Measurements on sub-100 nm MOS Transistors

    CERN Document Server

    Gaioni, L; Ratti, L; Re, V; Speziali, V; Traversi, G

    2008-01-01

    This work describes a measuring system that was developed to characterize the gate current noise performances of CMOS devices with minimum feature size in the 100 nm span. These devices play an essential role in the design of present daymixedsignal integrated circuits, because of the advantages associated with the scaling process. The reduction in the gate oxide thickness brought about by CMOS technology downscaling leads to a non-negligible gate current due to direct tunneling phenomena; this current represents a noise source which requires an accurate characterization for optimum analog design. In this paper, two instruments able to perform measurements in two different ranges of gate current values will be discussed. Some of the results of gate current noise characterization will also be presented.

  8. Ratiometric Time-Gated Luminescence Probe for Nitric Oxide Based on an Apoferritin-Assembled Lanthanide Complex-Rhodamine Luminescence Resonance Energy Transfer System.

    Science.gov (United States)

    Tian, Lu; Dai, Zhichao; Liu, Xiangli; Song, Bo; Ye, Zhiqiang; Yuan, Jingli

    2015-11-03

    Using apoferritin (AFt) as a carrier, a novel ratiometric luminescence probe based on luminescence resonance energy transfer (LRET) between a Tb(3+) complex (PTTA-Tb(3+)) and a rhodamine derivative (Rh-NO), PTTA-Tb(3+)@AFt-Rh-NO, has been designed and prepared for the specific recognition and time-gated luminescence detection of nitric oxide (NO) in living samples. In this LRET probe, PTTA-Tb(3+) encapsulated in the core of AFt is the energy donor, and Rh-NO, a NO-responsive rhodamine derivative, bound on the surface of AFt is the energy acceptor. The probe only emits strong Tb(3+) luminescence because the emission of rhodamine is switched off in the absence of NO. Upon reaction with NO, accompanied by the turn-on of rhodamine emission, the LRET from Tb(3+) complex to rhodamine occurs, which results in the remarkable increase and decrease of the long-lived emissions of rhodamine and PTTA-Tb(3+), respectively. After the reaction, the intensity ratio of rhodamine emission to Tb(3+) emission, I565/I539, is ∼24.5-fold increased, and the dose-dependent enhancement of I565/I539 shows a good linearity in a wide concentration range of NO. This unique luminescence response allowed PTTA-Tb(3+)@AFt-Rh-NO to be conveniently used as a ratiometric probe for the time-gated luminescence detection of NO with I565/I539 as a signal. Taking advantages of high specificity and sensitivity of the probe as well as its good water-solubility, biocompatibility, and cell membrane permeability, PTTA-Tb(3+)@AFt-Rh-NO was successfully used for the luminescent imaging of NO in living cells and Daphnia magna. The results demonstrated the efficacy of the probe and highlighted it's advantages for the ratiometric time-gated luminescence bioimaging application.

  9. A SiC MOSFET Power Module With Integrated Gate Drive for 2.5 MHz Class E Resonant Converters

    DEFF Research Database (Denmark)

    Jørgensen, Asger Bjørn; Nair, Unnikrishnan Raveendran; Munk-Nielsen, Stig

    2018-01-01

    Industrial processes are still relying on high frequency converters based on vacuum tubes. Emerging silicon carbide semiconductor devices have potential to replace vacuum tubes and bring benefits for converters in the high frequency range. At high switching frequencies hard-switched gate drivers...

  10. 100-nm gate lithography for double-gate transistors

    Science.gov (United States)

    Krasnoperova, Azalia A.; Zhang, Ying; Babich, Inna V.; Treichler, John; Yoon, Jung H.; Guarini, Kathryn; Solomon, Paul M.

    2001-09-01

    The double gate field effect transistor (FET) is an exploratory device that promises certain performance advantages compared to traditional CMOS FETs. It can be scaled down further than the traditional devices because of the greater electrostatic control by the gates on the channel (about twice as short a channel length for the same gate oxide thickness), has steeper sub-threshold slope and about double the current for the same width. This paper presents lithographic results for double gate FET's developed at IBM's T. J. Watson Research Center. The device is built on bonded wafers with top and bottom gates self-aligned to each other. The channel is sandwiched between the top and bottom polysilicon gates and the gate length is defined using DUV lithography. An alternating phase shift mask was used to pattern gates with critical dimensions of 75 nm, 100 nm and 125 nm in photoresist. 50 nm gates in photoresist have also been patterned by 20% over-exposure of nominal 100 nm lines. No trim mask was needed because of a specific way the device was laid out. UV110 photoresist from Shipley on AR-3 antireflective layer were used. Process windows, developed and etched patterns are presented.

  11. Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

    KAUST Repository

    Hanna, Amir; Hussain, Aftab M.; Omran, Hesham; Alshareef, Sarah; Salama, Khaled N.; Hussain, Muhammad Mustafa

    2015-01-01

    High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (Zn

  12. AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor with Polarized P(VDF-TrFE) Ferroelectric Polymer Gating

    Science.gov (United States)

    Liu, Xinke; Lu, Youming; Yu, Wenjie; Wu, Jing; He, Jiazhu; Tang, Dan; Liu, Zhihong; Somasuntharam, Pannirselvam; Zhu, Deliang; Liu, Wenjun; Cao, Peijiang; Han, Sun; Chen, Shaojun; Seow Tan, Leng

    2015-01-01

    Effect of a polarized P(VDF-TrFE) ferroelectric polymer gating on AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) was investigated. The P(VDF-TrFE) gating in the source/drain access regions of AlGaN/GaN MOS-HEMTs was positively polarized (i.e., partially positively charged hydrogen were aligned to the AlGaN surface) by an applied electric field, resulting in a shift-down of the conduction band at the AlGaN/GaN interface. This increases the 2-dimensional electron gas (2-DEG) density in the source/drain access region of the AlGaN/GaN heterostructure, and thereby reduces the source/drain series resistance. Detailed material characterization of the P(VDF-TrFE) ferroelectric film was also carried out using the atomic force microscopy (AFM), X-ray Diffraction (XRD), and ferroelectric hysteresis loop measurement. PMID:26364872

  13. GaN-Based High-k Praseodymium Oxide Gate MISFETs with P2S5/(NH42SX + UV Interface Treatment Technology

    Directory of Open Access Journals (Sweden)

    Chao-Wei Lin

    2012-01-01

    Full Text Available This study examines the praseodymium-oxide- (Pr2O3- passivated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs with high dielectric constant in which the AlGaN Schottky layers are treated with P2S5/(NH42SX + ultraviolet (UV illumination. An electron-beam evaporated Pr2O3 insulator is used instead of traditional plasma-assisted chemical vapor deposition (PECVD, in order to prevent plasma-induced damage to the AlGaN. In this work, the HEMTs are pretreated with P2S5/(NH42SX solution and UV illumination before the gate insulator (Pr2O3 is deposited. Since stable sulfur that is bound to the Ga species can be obtained easily and surface oxygen atoms are reduced by the P2S5/(NH42SX pretreatment, the lowest leakage current is observed in MIS-HEMT. Additionally, a low flicker noise and a low surface roughness (0.38 nm are also obtained using this novel process, which demonstrates its ability to reduce the surface states. Low gate leakage current Pr2O3 and high-k AlGaN/GaN MIS-HEMTs, with P2S5/(NH42SX + UV illumination treatment, are suited to low-noise applications, because of the electron-beam-evaporated insulator and the new chemical pretreatment.

  14. A split accumulation gate architecture for silicon MOS quantum dots

    Science.gov (United States)

    Rochette, Sophie; Rudolph, Martin; Roy, Anne-Marie; Curry, Matthew; Ten Eyck, Gregory; Dominguez, Jason; Manginell, Ronald; Pluym, Tammy; King Gamble, John; Lilly, Michael; Bureau-Oxton, Chloé; Carroll, Malcolm S.; Pioro-Ladrière, Michel

    We investigate tunnel barrier modulation without barrier electrodes in a split accumulation gate architecture for silicon metal-oxide-semiconductor quantum dots (QD). The layout consists of two independent accumulation gates, one gate forming a reservoir and the other the QD. The devices are fabricated with a foundry-compatible, etched, poly-silicon gate stack. We demonstrate 4 orders of magnitude of tunnel-rate control between the QD and the reservoir by modulating the reservoir gate voltage. Last electron charging energies of app. 10 meV and tuning of the ST splitting in the range 100-200 ueV are observed in two different split gate layouts and labs. This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

  15. Determining oxide trapped charges in Al2O3 insulating films on recessed AlGaN/GaN heterostructures by gate capacitance transients measurements

    Science.gov (United States)

    Fiorenza, Patrick; Greco, Giuseppe; Schilirò, Emanuela; Iucolano, Ferdinando; Lo Nigro, Raffaella; Roccaforte, Fabrizio

    2018-05-01

    This letter presents time-dependent gate-capacitance transient measurements (C–t) to determine the oxide trapped charges (N ot) in Al2O3 films deposited on recessed AlGaN/GaN heterostructures. The C–t transients acquired at different temperatures under strong accumulation allowed to accurately monitor the gradual electron trapping, while hindering the re-emission by fast traps that may affect conventional C–V hysteresis measurements. Using this method, an increase of N ot from 2 to 6 × 1012 cm‑2 was estimated between 25 and 150 °C. The electron trapping is ruled by an Arrhenius dependence with an activation energy of 0.12 eV which was associated to points defects present in the Al2O3 films.

  16. Dual-Material Gate Approach to Suppression of Random-Dopant-Induced Characteristic Fluctuation in 16 nm Metal-Oxide-Semiconductor Field-Effect-Transistor Devices

    Science.gov (United States)

    Li, Yiming; Lee, Kuo-Fu; Yiu, Chun-Yen; Chiu, Yung-Yueh; Chang, Ru-Wei

    2011-04-01

    In this work, we explore for the first time dual-material gate (DMG) and inverse DMG devices for suppressing the random-dopant (RD)-induced characteristic fluctuation in 16 nm metal-oxide-semiconductor field-effect-transistor (MOSFET) devices. The physical mechanism of suppressing the characteristic fluctuation of DMG devices is observed and discussed. The achieved improvement in suppressing the RD-induced threshold voltage, on-state current, and off-state current fluctuations are 28, 12.3, and 59%, respectively. To further suppress the fluctuations, an approach that combines the DMG method and channel-doping-profile engineering is also advanced and explored. The results of our study show that among the suppression techniques, the use of the DMG device with an inverse lateral asymmetric channel-doping-profile has good immunity to fluctuation.

  17. Electrical dependence on the chemical composition of the gate dielectric in indium gallium zinc oxide thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Tari, Alireza, E-mail: atari@uwaterloo.ca; Lee, Czang-Ho; Wong, William S. [Department of Electrical and Computer Engineering, University of Waterloo, 200 University Avenue West, Waterloo, Ontario N2L 3G1 (Canada)

    2015-07-13

    Bottom-gate thin-film transistors were fabricated by depositing a 50 nm InGaZnO (IGZO) channel layer at 150 °C on three separate gate dielectric films: (1) thermal SiO{sub 2}, (2) plasma-enhanced chemical-vapor deposition (PECVD) SiN{sub x}, and (3) a PECVD SiO{sub x}/SiN{sub x} dual-dielectric. X-ray photoelectron and photoluminescence spectroscopy showed the V{sub o} concentration was dependent on the hydrogen concentration of the underlying dielectric film. IGZO films on SiN{sub x} (high V{sub o}) and SiO{sub 2} (low V{sub o}) had the highest and lowest conductivity, respectively. A PECVD SiO{sub x}/SiN{sub x} dual-dielectric layer was effective in suppressing hydrogen diffusion from the nitride layer into the IGZO and resulted in higher resistivity films.

  18. Nano-CMOS gate dielectric engineering

    CERN Document Server

    Wong, Hei

    2011-01-01

    According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the gate dielectric thickness will be shrunk to less than half-nanometer oxide equivalent thickness (EOT) to maintain proper operation of the transistors, leaving high-k materials as the only viable solution for such small-scale EOT. This comprehensive, up-to-date text covering the physics, materials, devic

  19. The integrated nitrous oxide and methane grassland project

    Energy Technology Data Exchange (ETDEWEB)

    Leffelaar, P.A.; Langeveld, C.A.; Hofman, J.E.; Segers, R.; Van den Pol-van Dasselaar, A.; Goudriaan, J.; Rabbinge, R.; Oenema, O. [Department of Theoretical Production Ecology, Wageningen Agricultural University, Wageningen (Netherlands)

    2000-07-01

    The integrated nitrous oxide (N{sub 2}O) and methane (CH{sub 4}) grassland project aims to estimate and explain emissions of these greenhouse gases from two ecosystems, namely drained agricultural peat soil under grass at the experimental farm Zegveld and undrained peat in the nature preserve Nieuwkoopse Plassen, both Netherlands. Peat soils were chosen because of their expected considerable contribution to the greenhouse gas budget considering the prevailing wet and partial anaerobic conditions. The emission dynamics of these ecosystems are considered representatives of large peat areas because the underlying processes are rather general and driven by variables like organic matter characteristics, water and nutrient conditions and type of vegetation. The research approach comprises measurements and modelling at different integration levels relating to the microbiology of the production and consumption of N{sub 2}O and CH{sub 4} (laboratory studies), their movement through peat soil (rhizolab and field studies), and the resulting fluxes (field studies). Typical emissions from drained soil were 15-40 kg ha{sup -1} y{sup -1} N{sub 2}O and virtually zero for CH{sub 4}. The undrained soil in the nature preserve emitted 100-280 kg ha{sup -1} y{sup -1} CH{sub 4}, and probably little N{sub 2}O. The process knowledge, collected and partly integrated in the models, helps to explain these data. For example, the low methane emission from drained peat can more coherently be understood and extrapolated because: (1) upper soil layers are aerobic, thus limiting methane production and stimulating methane oxidation, (2) absence of aerenchymatous roots of wetland plants that connect deeper anaerobic soil layers where methane is produced to the atmosphere and supply labile carbon, (3) a low methane production potential in deep layers due to the low decomposability of organic matter, and (4) long anaerobic periods needed in the topsoil to develop a methane production potential. This

  20. The Effective Resonance Integral of Thorium Oxide Rods

    Energy Technology Data Exchange (ETDEWEB)

    Weitman, J

    1962-12-15

    The effective resonance integral of thorium oxide rods has been determined as a function of their surface to mass ratio. The range of S/M values covered is 0.15 - 0.65 cm/g. An experimental technique based on the comparison of activities obtained in thermal and slowing-down neutron fluxes was employed. The shape of the resonance neutron spectrum was determined from measurements with a fast chopper and from calculations, permitting deduction of a correction factor which relates the experimental values to the ideal 1/E case. The results are summarized by the following expression: RI{sub ThO{sub 2}} (5.0 + 15.6{radical}(S/M{sub ThO{sub 2}})) {+-} 5% The main contribution to the margin of error arises from the uncertainties in the 1.5 % spectral correction applied in the 1.5 b '1/v' part deducted and in the 1520 b infinite dilution integral of gold, used as a standard. In order to compare the consistency of Dresner's first equivalence theorem and Nordheim's numerical calculations relative to our results, the resonance integral values for thorium metal rods obtained previously by Hellstrand and Weitman have been recalculated, using recent cross section and spectrum data. The new formula is Rl{sub Th} = (3.3 + 16.1{radical}(S/M{sub Th})) {+-} 5%. It differs from the old one mainly because of the proved non-1/v behaviour of the thorium cross section below the first resonance.

  1. Growth Related Carrier Mobility Enhancement of Pentacene Thin-Film Transistors with High-k Oxide Gate Dielectric

    International Nuclear Information System (INIS)

    Ai-Fang, Yu; Qiong, Qi; Peng, Jiang; Chao, Jiang

    2009-01-01

    Carrier mobility enhancement from 0.09 to 0.59 cm 2 /Vs is achieved for pentacene-based thin-film transistors (TFTs) by modifying the HfO 2 gate dielectric with a polystyrene (PS) thin film. The improvement of the transistor's performance is found to be strongly related to the initial film morphologies of pentacene on the dielectrics. In contrast to the three-dimensional island-like growth mode on the HfO 2 surface, the Stranski-Krastanov growth mode on the smooth and nonpolar PS/HfO 2 surface is believed to be the origin of the excellent carrier mobility of the TFTs. A large well-connected first monolayer with fewer boundaries is formed via the Stranski–Krastanov growth mode, which facilitates a charge transport parallel to the substrate and promotes higher carrier mobility. (cross-disciplinary physics and related areas of science and technology)

  2. Near interface traps in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors monitored by temperature dependent gate current transient measurements

    Energy Technology Data Exchange (ETDEWEB)

    Fiorenza, Patrick; La Magna, Antonino; Vivona, Marilena; Roccaforte, Fabrizio [Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII 5, Zona Industriale 95121 Catania (Italy)

    2016-07-04

    This letter reports on the impact of gate oxide trapping states on the conduction mechanisms in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors (MOSFETs). The phenomena were studied by gate current transient measurements, performed on n-channel MOSFETs operated in “gate-controlled-diode” configuration. The measurements revealed an anomalous non-steady conduction under negative bias (V{sub G} > |20 V|) through the SiO{sub 2}/4H-SiC interface. The phenomenon was explained by the coexistence of a electron variable range hopping and a hole Fowler-Nordheim (FN) tunnelling. A semi-empirical modified FN model with a time-depended electric field is used to estimate the near interface traps in the gate oxide (N{sub trap} ∼ 2 × 10{sup 11} cm{sup −2}).

  3. A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under simultaneous negative gate bias and illumination

    Energy Technology Data Exchange (ETDEWEB)

    Flewitt, A. J., E-mail: ajf@eng.cam.ac.uk [Electrical Engineering Division, Cambridge University, J J Thomson Avenue, Cambridge CB3 0FA (United Kingdom); Powell, M. J. [252, Valley Drive, Kendal LA9 7SL (United Kingdom)

    2014-04-07

    It has been previously observed that thin film transistors (TFTs) utilizing an amorphous indium gallium zinc oxide (a-IGZO) semiconducting channel suffer from a threshold voltage shift when subjected to a negative gate bias and light illumination simultaneously. In this work, a thermalization energy analysis has been applied to previously published data on negative bias under illumination stress (NBIS) in a-IGZO TFTs. A barrier to defect conversion of 0.65–0.75 eV is extracted, which is consistent with reported energies of oxygen vacancy migration. The attempt-to-escape frequency is extracted to be 10{sup 6}−10{sup 7} s{sup −1}, which suggests a weak localization of carriers in band tail states over a 20–40 nm distance. Models for the NBIS mechanism based on charge trapping are reviewed and a defect pool model is proposed in which two distinct distributions of defect states exist in the a-IGZO band gap: these are associated with states that are formed as neutrally charged and 2+ charged oxygen vacancies at the time of film formation. In this model, threshold voltage shift is not due to a defect creation process, but to a change in the energy distribution of states in the band gap upon defect migration as this allows a state formed as a neutrally charged vacancy to be converted into one formed as a 2+ charged vacancy and vice versa. Carrier localization close to the defect migration site is necessary for the conversion process to take place, and such defect migration sites are associated with conduction and valence band tail states. Under negative gate bias stressing, the conduction band tail is depleted of carriers, but the bias is insufficient to accumulate holes in the valence band tail states, and so no threshold voltage shift results. It is only under illumination that the quasi Fermi level for holes is sufficiently lowered to allow occupation of valence band tail states. The resulting charge localization then allows a negative threshold voltage

  4. Fabrication and evaluation of series-triple quantum dots by thermal oxidation of silicon nanowire

    International Nuclear Information System (INIS)

    Uchida, Takafumi; Jo, Mingyu; Tsurumaki-Fukuchi, Atsushi; Arita, Masashi; Takahashi, Yasuo; Fujiwara, Akira

    2015-01-01

    Series-connected triple quantum dots were fabricated by a simple two-step oxidation technique using the pattern-dependent oxidation of a silicon nanowire and an additional oxidation of the nanowire through the gap of the fine gates attached to the nanowire. The characteristics of multi-dot single-electron devices are obtained. The formation of each quantum dot beneath an attached gate is confirmed by analyzing the electrical characteristics and by evaluating the gate capacitances between all pairings of gates and quantum dots. Because the gate electrode is automatically attached to each dot, the device structure benefits from scalability. This technique promises integrability of multiple quantum dots with individual control gates

  5. On photonic controlled phase gates

    International Nuclear Information System (INIS)

    Kieling, K; Eisert, J; O'Brien, J L

    2010-01-01

    As primitives for entanglement generation, controlled phase gates have a central role in quantum computing. Especially in ideas realizing instances of quantum computation in linear optical gate arrays, a closer look can be rewarding. In such architectures, all effective nonlinearities are induced by measurements. Hence the probability of success is a crucial parameter of such quantum gates. In this paper, we discuss this question for controlled phase gates that implement an arbitrary phase with one and two control qubits. Within the class of post-selected gates in dual-rail encoding with vacuum ancillas, we identify the optimal success probabilities. We construct networks that allow for implementation using current experimental capabilities in detail. The methods employed here appear specifically useful with the advent of integrated linear optical circuits, providing stable interferometers on monolithic structures.

  6. Field-programmable gate array based controller for multi spot light-addressable potentiometric sensors with integrated signal correction mode

    Energy Technology Data Exchange (ETDEWEB)

    Werner, Carl Frederik; Schusser, Sebastian; Spelthahn, Heiko [Aachen University of Applied Sciences, Juelich Campus, Institute of Nano- and Biotechnologies, Heinrich-Mussmann-Strasse 1, 52428 Juelich (Germany); Institute of Bio- and Nanosystems (IBN-2), Research Centre Juelich GmbH, 52425 Juelich (Germany); Wagner, Torsten; Yoshinobu, Tatsuo [Tohoku University, Department of Electronic Engineering, 6-6-05 Aramaki Aza Aoba, Aoba-ku, Sendai, Miyagi 980-8579 (Japan); Schoening, Michael J., E-mail: schoening@fh-aachen.de [Aachen University of Applied Sciences, Juelich Campus, Institute of Nano- and Biotechnologies, Heinrich-Mussmann-Strasse 1, 52428 Juelich (Germany); Institute of Bio- and Nanosystems (IBN-2), Research Centre Juelich GmbH, 52425 Juelich (Germany)

    2011-11-01

    Highlights: > Flexible up-scalable design of a light-addressable potentiometric sensor set-up. > Utilisation of a field-programmable gate array to address LAPS measurement spots. > Measurements in amplitude-mode and phase-mode for different pH solutions. > Amplitude, phase and frequency behaviour of LAPS for single and multiple light stimulus. > Signal calibration method by brightness control to compensated systematic errors. - Abstract: A light-addressable potentiometric sensor (LAPS) can measure the concentration of one or several analytes at the sensor surface simultaneously in a spatially resolved manner. A modulated light pointer stimulates the semiconductor structure at the area of interest and a responding photocurrent can be read out. By simultaneous stimulation of several areas with light pointers of different modulation frequencies, the read out can be performed at the same time. With the new proposed controller electronic based on a field-programmable gate array (FPGA), it is possible to control the modulation frequencies, phase shifts, and light brightness of multiple light pointers independently and simultaneously. Thus, it is possible to investigate the frequency response of the sensor, and to examine the analyte concentration by the determination of the surface potential with the help of current/voltage curves and phase/voltage curves. Additionally, the ability to individually change the light intensities of each light pointer is used to perform signal correction.

  7. Gallium nitride on gallium oxide substrate for integrated nonlinear optics

    KAUST Repository

    Awan, Kashif M.; Dolgaleva, Ksenia; Mumthaz Muhammed, Mufasila; Roqan, Iman S.

    2017-01-01

    Gallium Nitride (GaN), being a direct bandgap semiconductor with a wide bandgap and high thermal stability, is attractive for optoelectronic and electronic applications. Furthermore, due to its high optical nonlinearity — the characteristic of all 111-V semiconductors — GaN is also expected to be a suitable candidate for integrated nonlinear photonic circuits for a plethora of apphcations, ranging from on-chip wavelength conversion to quantum computing. Although GaN devices are in commercial production, it still suffers from lack of a suitable substrate material to reduce structural defects like high densities of threading dislocations (TDs), stacking faults, and grain boundaries. These defects significandy deteriorate the optical quality of the epi-grown GaN layer, since they act as non-radiative recombination centers. Recent studies have shown that GaN grown on (−201) β-Gallium Oxide (Ga2O3) has superior optical quality due to a better lattice matching as compared to GaN grown on Sapphire (Al2O3) [1-3]. In this work, we report on the fabrication of GaN waveguides on GaiOj substrate and their optical characterization to assess their feasibihty for efficient four-wave mixing (FWM).

  8. Gallium nitride on gallium oxide substrate for integrated nonlinear optics

    KAUST Repository

    Awan, Kashif M.

    2017-11-22

    Gallium Nitride (GaN), being a direct bandgap semiconductor with a wide bandgap and high thermal stability, is attractive for optoelectronic and electronic applications. Furthermore, due to its high optical nonlinearity — the characteristic of all 111-V semiconductors — GaN is also expected to be a suitable candidate for integrated nonlinear photonic circuits for a plethora of apphcations, ranging from on-chip wavelength conversion to quantum computing. Although GaN devices are in commercial production, it still suffers from lack of a suitable substrate material to reduce structural defects like high densities of threading dislocations (TDs), stacking faults, and grain boundaries. These defects significandy deteriorate the optical quality of the epi-grown GaN layer, since they act as non-radiative recombination centers. Recent studies have shown that GaN grown on (−201) β-Gallium Oxide (Ga2O3) has superior optical quality due to a better lattice matching as compared to GaN grown on Sapphire (Al2O3) [1-3]. In this work, we report on the fabrication of GaN waveguides on GaiOj substrate and their optical characterization to assess their feasibihty for efficient four-wave mixing (FWM).

  9. Flexible Metal Oxide/Graphene Oxide Hybrid Neuromorphic Devices on Flexible Conducting Graphene Substrates

    OpenAIRE

    Wan, Chang Jin; Wang, Wei; Zhu, Li Qiang; Liu, Yang Hui; Feng, Ping; Liu, Zhao Ping; Shi, Yi; Wan, Qing

    2016-01-01

    Flexible metal oxide/graphene oxide hybrid multi-gate neuron transistors were fabricated on flexible graphene substrates. Dendritic integrations in both spatial and temporal modes were successfully emulated, and spatiotemporal correlated logics were obtained. A proof-of-principle visual system model for emulating lobula giant motion detector neuron was investigated. Our results are of great interest for flexible neuromorphic cognitive systems.

  10. Integrated cardio-thoracic imaging with ECG-Gated 64-slice multidetector-row CT: initial findings in 133 patients

    International Nuclear Information System (INIS)

    Salem, Randa; Remy-Jardin, Martine; Delhaye, Damien; Khalil, Chadi; Teisseire, Antoine; Remy, Jacques; Delannoy-Deken, Valerie; Duhamel, Alain

    2006-01-01

    The purpose of this study was to investigate the possibility of assessing the underlying respiratory disease as well as cardiac function during ECG-gated CT angiography of the chest with 64-slice multidetector-row CT (MDCT). One hundred thirty-three consecutive patients in sinus rhythm with known or suspected ventricular dysfunction underwent an ECG-gated CT angiographic examination of the chest without β-blockers using the following parameters: (1) collimation: 32 x 0.6 mm with z-flying focal spot for the acquisition of 64 overlapping 0.6-mm slices (Sensation 64; Siemens); rotation time: 0.33 s; pitch: 0.3; 120 kV; 200 mAs; ECG-controlled dose modulation (ECG-pulsing) and (2) 120 ml of a 35% contrast agent. Data were reconstructed: (1) to evaluate the underlying respiratory disease (1-mm thick lung and mediastinal scans reconstructed at 55% of the R-R interval; i.e., ''morphologic scans'') and (2) to determine right (RVEF) and left (LVEF) ventricular ejection fractions (short-axis systolic and diastolic images; Argus software; i.e., ''functional scans''). The mean heart rate was 73 bpm (range: 42-120) and the mean scan time was 18.11±2.67 s (range: 10-27). A total of 123 examinations (92%) had both lung and mediastinal images rated as diagnostic scans, whereas 10 examinations (8%) had non-diagnostic images altered by the presence of respiratory-motion artifacts (n=4) or cyclic artifacts related to the use of a pitch value of 0.3 in patients with a very low heart rate during data acquisition (n=6). Assessment of right and left ventricular function was achievable in 124 patients (93%, 95% CI: 88-97%). For these 124 examinations, the mean RVEF was 46.10% (±9.5; range: 20-72) and the mean LVEF was 58.23% (±10.88; range: 20-83). In the remaining nine patients, an imprecise segmentation of the right and left ventricular cavities was considered as a limiting factor for precise calculation of end-systolic and end-diastolic ventricular volumes. The mean (±SD) DLP

  11. A Grand Challenge for CMOS Scaling: Alternate Gate Dielectrics

    Science.gov (United States)

    Wallace, Robert M.

    2001-03-01

    Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.13 um complementary metal oxide semiconductor (CMOS) technology. The prospect of replacing SiO2 is a formidable task because the alternate gate dielectric must provide many properties that are, at a minimum, comparable to those of SiO2 yet with a much higher permittivity. A systematic examination of the required performance of gate dielectrics suggests that the key properties to consider in the selection an alternative gate dielectric candidate are (a) permittivity, band gap and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. We will review the performance requirements for materials associated with CMOS scaling, the challenges associated with these requirements, and the state-of-the-art in current research for alternate gate dielectrics. The requirements for process integration compatibility are remarkably demanding, and any serious candidates will emerge only through continued, intensive investigation.

  12. Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

    Science.gov (United States)

    Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

    2015-10-01

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

  13. Enhanced performance of solid oxide electrolysis cells by integration with a partial oxidation reactor: Energy and exergy analyses

    International Nuclear Information System (INIS)

    Visitdumrongkul, Nuttawut; Tippawan, Phanicha; Authayanun, Suthida; Assabumrungrat, Suttichai; Arpornwichanop, Amornchai

    2016-01-01

    Highlights: • Process design of solid oxide electrolyzer integrated with a partial oxidation reactor is studied. • Effect of key operating parameters of partial oxidation reactor on the electrolyzer performance is presented. • Exergy analysis of the electrolyzer process is performed. • Partial oxidation reactor can enhance the solid oxide electrolyzer performance. • Partial oxidation reactor in the process is the highest exergy destruction unit. - Abstract: Hydrogen production without carbon dioxide emission has received a large amount of attention recently. A solid oxide electrolysis cell (SOEC) can produce pure hydrogen and oxygen via a steam electrolysis reaction that does not emit greenhouse gases. Due to the high operating temperature of SOEC, an external heat source is required for operation, which also helps to improve SOEC performance and reduce operating electricity. The non-catalytic partial oxidation reaction (POX), which is a highly exothermic reaction, can be used as an external heat source and can be integrated with SOEC. Therefore, the aim of this work is to study the effect of operating parameters of non-catalytic POX (i.e., the oxygen to carbon ratio, operating temperature and pressure) on SOEC performance, including exergy analysis of the process. The study indicates that non-catalytic partial oxidation can enhance the hydrogen production rate and efficiency of the system. In terms of exergy analysis, the non-catalytic partial oxidation reactor is demonstrated to be the highest exergy destruction unit due to irreversible chemical reactions taking place, whereas SOEC is a low exergy destruction unit. This result indicates that the partial oxidation reactor should be improved and optimally designed to obtain a high energy and exergy system efficiency.

  14. A high performance gate drive for large gate turn off thyristors

    Energy Technology Data Exchange (ETDEWEB)

    Szilagyi, C.P.

    1993-01-01

    Past approaches to gate turn-off (GTO) gating are application oriented, inefficient and dissipate power even when inactive. They allow the gate to avalanch, and do not reduce GTO turn-on and turn-off losses. A new approach is proposed which will allow modular construction and adaptability to large GTOs in the 50 amp to 2000 amp range. The proposed gate driver can be used in large voltage source and current source inverters and other power converters. The approach consists of a power metal-oxide-silicon field effect transistor (MOSFET) technology gating unit, with associated logic and supervisory circuits and an isolated flyback converter as the dc power source for the gating unit. The gate driver formed by the gating unit and the flyback converter is designed for 4000 V isolation. Control and supervisory signals are exchanged between the gate driver and the remote control system via fiber optics. The gating unit has programmable front-porch current amplitude and pulse-width, programmable closed-loop controlled back-porch current, and a turn-off switch capable of supplying negative gate current at demand as a function of peak controllable forward anode current. The GTO turn-on, turn-off and gate avalanch losses are reduced to a minimum. The gate driver itself has minimum operating losses. Analysis, design and practical realization are reported. 19 refs., 54 figs., 1 tab.

  15. Transparently wrap-gated semiconductor nanowire arrays for studies of gate-controlled photoluminescence

    Energy Technology Data Exchange (ETDEWEB)

    Nylund, Gustav; Storm, Kristian; Torstensson, Henrik; Wallentin, Jesper; Borgström, Magnus T.; Hessman, Dan; Samuelson, Lars [Solid State Physics, Nanometer Structure Consortium, Lund University, Box 118, S-221 00 Lund (Sweden)

    2013-12-04

    We present a technique to measure gate-controlled photoluminescence (PL) on arrays of semiconductor nanowire (NW) capacitors using a transparent film of Indium-Tin-Oxide (ITO) wrapping around the nanowires as the gate electrode. By tuning the wrap-gate voltage, it is possible to increase the PL peak intensity of an array of undoped InP NWs by more than an order of magnitude. The fine structure of the PL spectrum reveals three subpeaks whose relative peak intensities change with gate voltage. We interpret this as gate-controlled state-filling of luminescing quantum dot segments formed by zincblende stacking faults in the mainly wurtzite NW crystal structure.

  16. Multiple-stimuli responsive bioelectrocatalysis based on reduced graphene oxide/poly(N-isopropylacrylamide) composite films and its application in the fabrication of logic gates.

    Science.gov (United States)

    Wang, Lei; Lian, Wenjing; Yao, Huiqin; Liu, Hongyun

    2015-03-11

    In the present work, reduced graphene oxide (rGO)/poly(N-isopropylacrylamide) (PNIPAA) composite films were electrodeposited onto the surface of Au electrodes in a fast and one-step manner from an aqueous mixture of a graphene oxide (GO) dispersion and N-isopropylacrylamide (NIPAA) monomer solutions. Reflection-absorption infrared (IR) and Raman spectroscopies were employed to characterize the successful construction of the rGO/PNIPAA composite films. The rGO/PNIPAA composite films exhibited reversible potential-, pH-, temperature-, and sulfate-sensitive cyclic voltammetric (CV) on-off behavior to the electroactive probe ferrocenedicarboxylic acid (Fc(COOH)2). For instance, after the composite films were treated at -0.7 V for 7 min, the CV responses of Fc(COOH)2 at the rGO/PNIPAA electrodes were quite large at pH 8.0, exhibiting the on state. However, after the films were treated at 0 V for 30 min, the CV peak currents became much smaller, demonstrating the off state. The mechanism of the multiple-stimuli switchable behaviors for the system was investigated not only by electrochemical methods but also by scanning electron microscopy and X-ray photoelectron spectroscopy. The potential-responsive behavior for this system was mainly attributed to the transformation between rGO and GO in the films at different potentials. The film system was further used to realize multiple-stimuli responsive bioelectrocatalysis of glucose catalyzed by the enzyme of glucose oxidase and mediated by the electroactive probe of Fc(COOH)2 in solution. On the basis of this, a four-input enabled OR (EnOR) logic gate network was established.

  17. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er2O3 as a gate dielectric

    International Nuclear Information System (INIS)

    Lin, Ray-Ming; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-01-01

    In this study, the rare earth erbium oxide (Er 2 O 3 ) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N t ) of the MOS–HEMT were 125 mV/decade and 4.3 × 10 12 cm −2 , respectively. The dielectric constant of the Er 2 O 3 layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er 2 O 3 MOS–HEMT. - Highlights: ► GaN/AlGaN/Er 2 O 3 metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er 2 O 3 with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I ON /I OFF ratio

  18. Integrated Science Assessment (ISA) of Ozone and Related Photochemical Oxidants (Second External Review Draft, Sep 2011)

    Science.gov (United States)

    EPA has released the Integrated Science Assessment of Ozone and Related Photochemical Oxidants (Second External Review Draft) for independent peer review and public review. This draft document represents a concise synthesis and evaluation of the most policy-relevant scienc...

  19. Models for the Configuration and Integrity of Partially Oxidized Fuel Rod Cladding at High Temperatures

    International Nuclear Information System (INIS)

    Siefken, L.J.

    1999-01-01

    Models were designed to resolve deficiencies in the SCDAP/RELAP5/MOD3.2 calculations of the configuration and integrity of hot, partially oxidized cladding. These models are expected to improve the calculations of several important aspects of fuel rod behavior. First, an improved mapping was established from a compilation of PIE results from severe fuel damage tests of the configuration of melted metallic cladding that is retained by an oxide layer. The improved mapping accounts for the relocation of melted cladding in the circumferential direction. Then, rules based on PIE results were established for calculating the effect of cladding that has relocated from above on the oxidation and integrity of the lower intact cladding upon which it solidifies. Next, three different methods were identified for calculating the extent of dissolution of the oxidic part of the cladding due to its contact with the metallic part. The extent of dissolution effects the stress and thus the integrity of the oxidic part of the cladding. Then, an empirical equation was presented for calculating the stress in the oxidic part of the cladding and evaluating its integrity based on this calculated stress. This empirical equation replaces the current criterion for loss of integrity which is based on temperature and extent of oxidation. Finally, a new rule based on theoretical and experimental results was established for identifying the regions of a fuel rod with oxidation of both the inside and outside surfaces of the cladding. The implementation of these models is expected to eliminate the tendency of the SCDAP/RELAP5 code to overpredict the extent of oxidation of the upper part of fuel rods and to underpredict the extent of oxidation of the lower part of fuel rods and the part with a high concentration of relocated material. This report is a revision and reissue of the report entitled, Improvements in Modeling of Cladding Oxidation and Meltdown

  20. Semiconductor growth on an oxide using a metallic surfactant and interface studies for potential gate stacks from first principles

    Energy Technology Data Exchange (ETDEWEB)

    Reyes Huamantinco, Andrei

    2008-05-09

    In this work the epitaxial growth of germanium on SrHfO{sub 3}(001), and the La{sub 2}Hf{sub 2}O{sub 7}/Si(001) and SrTiO{sub 3}/GaAs(001) interfaces were studied theoretically using the Projector-Augmented Wave (PAW) method. The PAW method is based on Density Functional Theory and it is implemented in the Car-Parrinello Ab-Initio Molecular Dynamics. The goal of the germanium growth on SrHfO{sub 3}(001) is to form a germanium film with low density of defects and smooth morphology, to be used as channel in a transistor. The feasibility of using a third material to achieve germanium layer-by-layer growth was investigated. The formation of an ordered strontium film on a SrO-terminated oxide substrate, to be used as template for germanium overgrowth, was studied. Deposition of germanium on the strontium 1ML template results in wetting and thus a change of the growth mode to layer-by-layer. The germanium surface is then passivated and a germanium compound is initially formed with strontium at the surface and interface. The interfacial structure and valence band offsets of the La{sub 2}Hf{sub 2}O{sub 7}/Si(001) crystalline system were studied. The SrTiO{sub 3}/GaAs(001) crystalline interfaces with unpinned Fermi level were investigated. (orig.)

  1. Top-gate pentacene-based organic field-effect transistor with amorphous rubrene gate insulator

    Science.gov (United States)

    Hiroki, Mizuha; Maeda, Yasutaka; Ohmi, Shun-ichiro

    2018-02-01

    The scaling of organic field-effect transistors (OFETs) is necessary for high-density integration and for this, OFETs with a top-gate configuration are required. There have been several reports of damageless lithography processes for organic semiconductor or insulator layers. However, it is still difficult to fabricate scaled OFETs with a top-gate configuration. In this study, the lift-off process and the device characteristics of the OFETs with a top-gate configuration utilizing an amorphous (α) rubrene gate insulator were investigated. We have confirmed that α-rubrene shows an insulating property, and its extracted linear mobility was 2.5 × 10-2 cm2/(V·s). The gate length and width were 10 and 60 µm, respectively. From these results, the OFET with a top-gate configuration utilizing an α-rubrene gate insulator is promising for the high-density integration of scaled OFETs.

  2. Use of water vapor for suppressing the growth of unstable low-{kappa} interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    Energy Technology Data Exchange (ETDEWEB)

    Xu, J.P. [Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan, 430074 (China); Zou, X. [School of Electromachine and Architecture Engineering, Jianghan University, Wuhan, 430056 (China); Lai, P.T. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)], E-mail: laip@eee.hku.hk; Li, C.X.; Chan, C.L. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)

    2009-03-02

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N{sub 2}, NH{sub 3}, NO and N{sub 2}O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO{sub x} interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N{sub 2} anneal, the wet NH{sub 3}, NO and N{sub 2}O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO{sub x}N{sub y} interlayer. Among the eight anneals, the wet N{sub 2} anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10{sup 11} eV{sup -1} cm{sup -2} and gate leakage current of 2.7 x 10{sup -4} A/cm{sup 2} at V{sub g} = 1 V.

  3. Use of water vapor for suppressing the growth of unstable low-κ interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    International Nuclear Information System (INIS)

    Xu, J.P.; Zou, X.; Lai, P.T.; Li, C.X.; Chan, C.L.

    2009-01-01

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N 2 , NH 3 , NO and N 2 O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO x interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N 2 anneal, the wet NH 3 , NO and N 2 O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO x N y interlayer. Among the eight anneals, the wet N 2 anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10 11 eV -1 cm -2 and gate leakage current of 2.7 x 10 -4 A/cm 2 at V g = 1 V

  4. Guiding gate-etch process development using 3D surface reaction modeling for 7nm and beyond

    Science.gov (United States)

    Dunn, Derren; Sporre, John R.; Deshpande, Vaibhav; Oulmane, Mohamed; Gull, Ronald; Ventzek, Peter; Ranjan, Alok

    2017-03-01

    Increasingly, advanced process nodes such as 7nm (N7) are fundamentally 3D and require stringent control of critical dimensions over high aspect ratio features. Process integration in these nodes requires a deep understanding of complex physical mechanisms to control critical dimensions from lithography through final etch. Polysilicon gate etch processes are critical steps in several device architectures for advanced nodes that rely on self-aligned patterning approaches to gate definition. These processes are required to meet several key metrics: (a) vertical etch profiles over high aspect ratios; (b) clean gate sidewalls free of etch process residue; (c) minimal erosion of liner oxide films protecting key architectural elements such as fins; and (e) residue free corners at gate interfaces with critical device elements. In this study, we explore how hybrid modeling approaches can be used to model a multi-step finFET polysilicon gate etch process. Initial parts of the patterning process through hardmask assembly are modeled using process emulation. Important aspects of gate definition are then modeled using a particle Monte Carlo (PMC) feature scale model that incorporates surface chemical reactions.1 When necessary, species and energy flux inputs to the PMC model are derived from simulations of the etch chamber. The modeled polysilicon gate etch process consists of several steps including a hard mask breakthrough step (BT), main feature etch steps (ME), and over-etch steps (OE) that control gate profiles at the gate fin interface. An additional constraint on this etch flow is that fin spacer oxides are left intact after final profile tuning steps. A natural optimization required from these processes is to maximize vertical gate profiles while minimizing erosion of fin spacer films.2

  5. Novel WSi/Au T-shaped gate GaAs metal-semiconductor field-effect-transistor fabrication process for super low-noise microwave monolithic integrated circuit amplifiers

    International Nuclear Information System (INIS)

    Takano, H.; Hosogi, K.; Kato, T.

    1995-01-01

    A fully ion-implanted self-aligned T-shaped gate Ga As metal-semiconductor field-effect transistor (MESFET) with high frequency and extremely low-noise performance has been successfully fabricated for super low-noise microwave monolithic integrated circuit (MMIC) amplifiers. A subhalf-micrometer gate structure composed of WSi/Ti/Mo/Au is employed to reduce gate resistance effectively. This multilayer gate structure is formed by newly developed dummy SiON self-alignment technology and a photoresist planarization process. At an operating frequency of 12 GHz, a minimum noise figure of 0.87 dB with an associated gain of 10.62 dB has been obtained. Based on the novel FET process, a low-noise single-stage MMIC amplifier with an excellent low-noise figure of 1.2 dB with an associated gain of 8 dB in the 14 GHz band has been realized. This is the lowest noise figure ever reported at this frequency for low-noise MMICs based on ion-implanted self-aligned gate MESFET technology. 14 refs., 9 figs

  6. Seven channel gated charge to time converter

    Energy Technology Data Exchange (ETDEWEB)

    Stubbs, R J; Waddoup, W D [Durham Univ. (UK)

    1977-11-01

    By using a hybrid integrated circuit seven independent gated charge to time converters have been constructed in a single width NIM module. Gate widths from < approximately 10 ns to approximately 300 ns are possible with a resolution of 0.25 pC, linearity is better than +-1 pC over 2.5 decades of input signal height. Together with a multichannel scaling system described in the following paper one has a very powerful multichannel gated ADC system.

  7. Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit.

    Science.gov (United States)

    Brink, S; Nease, S; Hasler, P

    2013-09-01

    Results are presented from several spiking network experiments performed on a novel neuromorphic integrated circuit. The networks are discussed in terms of their computational significance, which includes applications such as arbitrary spatiotemporal pattern generation and recognition, winner-take-all competition, stable generation of rhythmic outputs, and volatile memory. Analogies to the behavior of real biological neural systems are also noted. The alternatives for implementing the same computations are discussed and compared from a computational efficiency standpoint, with the conclusion that implementing neural networks on neuromorphic hardware is significantly more power efficient than numerical integration of model equations on traditional digital hardware. Copyright © 2013 Elsevier Ltd. All rights reserved.

  8. Nanofabrication Technology for Production of Quantum Nano-Electronic Devices Integrating Niobium Electrodes and Optically Transparent Gates

    Science.gov (United States)

    2018-01-01

    TECHNICAL REPORT 3086 January 2018 Nanofabrication Technology for Production of Quantum Nano-electronic Devices Integrating Niobium Electrodes...work described in this report was performed for the by the Advanced Concepts and Applied Research Branch (Code 71730) and the Science and Technology ...Applied Sciences Division iii EXECUTIVE SUMMARY This technical report demonstrates nanofabrication technology for Niobium heterostructures and

  9. Stability Study of Flexible 6,13-Bis(triisopropylsilylethynylpentacene Thin-Film Transistors with a Cross-Linked Poly(4-vinylphenol/Yttrium Oxide Nanocomposite Gate Insulator

    Directory of Open Access Journals (Sweden)

    Jin-Hyuk Kwon

    2016-03-01

    Full Text Available We investigated the electrical and mechanical stability of flexible 6,13-bis(triisopropylsilylehtynylpentacene (TIPS-pentacene thin-film transistors (TFTs that were fabricated on polyimide (PI substrates using cross-linked poly(4-vinylphenol (c-PVP and c-PVP/yttrium oxide (Y2O3 nanocomposite films as gate insulators. Compared with the electrical characteristics of TIPS-pentacene TFTs with c-PVP insulators, the TFTs with c-PVP/Y2O3 nanocomposite insulators exhibited enhancements in the drain current and the threshold voltage due to an increase in the dielectric capacitance. In electrical stability experiments, a gradual decrease in the drain current and a negative shift in the threshold voltage occurred during prolonged bias stress tests, but these characteristic variations were comparable for both types of TFT. On the other hand, the results of mechanical bending tests showed that the characteristic degradation of the TIPS-pentacene TFTs with c-PVP/Y2O3 nanocomposite insulators was more critical than that of the TFTs with c-PVP insulators. In this study, the detrimental effect of the nanocomposite insulator on the mechanical stability of flexible TIPS-pentacene TFTs was found to be caused by physical adhesion of TIPS-pentacene molecules onto the rough surfaces of the c-PVP/Y2O3 nanocomposite insulator. These results indicate that the dielectric and morphological properties of polymeric nanocomposite insulators are significant when considering practical applications of flexible electronics operated at low voltages.

  10. Integrated Science Assessment (ISA) for Oxides of Nitrogen ...

    Science.gov (United States)

    This draft ISA document represents a concise synthesis and evaluation of the most policy-relevant science and will ultimately provide the scientific bases for EPA’s decision on retaining or revising the current secondary standards for NO2, SO2, PM 2.5 and PM 10 since the prior release of the assessment. The intent of the ISA, according to the CAA, is to “accurately reflect the latest scientific knowledge expected from the presence of [a] pollutant in ambient air” (U.S. Code, 1970a, 1970b). It includes scientific research from atmospheric sciences, exposure and deposition, biogeochemistry, hydrology, soil science, marine science, plant physiology, animal physiology, and ecology conducted at multiple scales (e.g., population, community, ecosystem, landscape levels). Key information and judgments formerly found in the Air Quality Criteria Documents (AQCDs) for oxides of nitrogen, oxides of nitrogen and particulate matter for ecological effects are included; Appendixes provide additional details supporting the ISA. Together, the ISA and Appendixes serve to update and revise the last oxides of nitrogen and oxides of sulfur ISA which was published in 2008 and the ecological portion of the last particulate matter ISA, which was published in 2009.

  11. Electron-electron scattering-induced channel hot electron injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors with high-k/metal gate stacks

    International Nuclear Information System (INIS)

    Tsai, Jyun-Yu; Liu, Kuan-Ju; Lu, Ying-Hsin; Liu, Xi-Wen; Chang, Ting-Chang; Chen, Ching-En; Ho, Szu-Han; Tseng, Tseung-Yuen; Cheng, Osbert; Huang, Cheng-Tung; Lu, Ching-Sen

    2014-01-01

    This work investigates electron-electron scattering (EES)-induced channel hot electron (CHE) injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors (n-MOSFETs) with high-k/metal gate stacks. Many groups have proposed new models (i.e., single-particle and multiple-particle process) to well explain the hot carrier degradation in nanoscale devices and all mechanisms focused on Si-H bond dissociation at the Si/SiO 2 interface. However, for high-k dielectric devices, experiment results show that the channel hot carrier trapping in the pre-existing high-k bulk defects is the main degradation mechanism. Therefore, we propose a model of EES-induced CHE injection to illustrate the trapping-dominant mechanism in nanoscale n-MOSFETs with high-k/metal gate stacks.

  12. Atomic layer deposition of perovskite oxides and their epitaxial integration with Si, Ge, and other semiconductors

    Energy Technology Data Exchange (ETDEWEB)

    McDaniel, Martin D.; Ngo, Thong Q.; Hu, Shen; Ekerdt, John G., E-mail: ekerdt@utexas.edu [Department of Chemical Engineering, The University of Texas at Austin, Austin, Texas 78712 (United States); Posadas, Agham; Demkov, Alexander A. [Department of Physics, The University of Texas at Austin, Austin, Texas 78712 (United States)

    2015-12-15

    Atomic layer deposition (ALD) is a proven technique for the conformal deposition of oxide thin films with nanoscale thickness control. Most successful industrial applications have been with binary oxides, such as Al{sub 2}O{sub 3} and HfO{sub 2}. However, there has been much effort to deposit ternary oxides, such as perovskites (ABO{sub 3}), with desirable properties for advanced thin film applications. Distinct challenges are presented by the deposition of multi-component oxides using ALD. This review is intended to highlight the research of the many groups that have deposited perovskite oxides by ALD methods. Several commonalities between the studies are discussed. Special emphasis is put on precursor selection, deposition temperatures, and specific property performance (high-k, ferroelectric, ferromagnetic, etc.). Finally, the monolithic integration of perovskite oxides with semiconductors by ALD is reviewed. High-quality epitaxial growth of oxide thin films has traditionally been limited to physical vapor deposition techniques (e.g., molecular beam epitaxy). However, recent studies have demonstrated that epitaxial oxide thin films may be deposited on semiconductor substrates using ALD. This presents an exciting opportunity to integrate functional perovskite oxides for advanced semiconductor applications in a process that is economical and scalable.

  13. Atomic layer deposition of perovskite oxides and their epitaxial integration with Si, Ge, and other semiconductors

    International Nuclear Information System (INIS)

    McDaniel, Martin D.; Ngo, Thong Q.; Hu, Shen; Ekerdt, John G.; Posadas, Agham; Demkov, Alexander A.

    2015-01-01

    Atomic layer deposition (ALD) is a proven technique for the conformal deposition of oxide thin films with nanoscale thickness control. Most successful industrial applications have been with binary oxides, such as Al 2 O 3 and HfO 2 . However, there has been much effort to deposit ternary oxides, such as perovskites (ABO 3 ), with desirable properties for advanced thin film applications. Distinct challenges are presented by the deposition of multi-component oxides using ALD. This review is intended to highlight the research of the many groups that have deposited perovskite oxides by ALD methods. Several commonalities between the studies are discussed. Special emphasis is put on precursor selection, deposition temperatures, and specific property performance (high-k, ferroelectric, ferromagnetic, etc.). Finally, the monolithic integration of perovskite oxides with semiconductors by ALD is reviewed. High-quality epitaxial growth of oxide thin films has traditionally been limited to physical vapor deposition techniques (e.g., molecular beam epitaxy). However, recent studies have demonstrated that epitaxial oxide thin films may be deposited on semiconductor substrates using ALD. This presents an exciting opportunity to integrate functional perovskite oxides for advanced semiconductor applications in a process that is economical and scalable

  14. Latest design of gate valves

    Energy Technology Data Exchange (ETDEWEB)

    Kurzhofer, U.; Stolte, J.; Weyand, M.

    1996-12-01

    Babcock Sempell, one of the most important valve manufacturers in Europe, has delivered valves for the nuclear power industry since the beginning of the peaceful application of nuclear power in the 1960s. The latest innovation by Babcock Sempell is a gate valve that meets all recent technical requirements of the nuclear power technology. At the moment in the United States, Germany, Sweden, and many other countries, motor-operated gate and globe valves are judged very critically. Besides the absolute control of the so-called {open_quotes}trip failure,{close_quotes} the integrity of all valve parts submitted to operational forces must be maintained. In case of failure of the limit and torque switches, all valve designs have been tested with respect to the quality of guidance of the gate. The guidances (i.e., guides) shall avoid a tilting of the gate during the closing procedure. The gate valve newly designed by Babcock Sempell fulfills all these characteristic criteria. In addition, the valve has cobalt-free seat hardfacing, the suitability of which has been proven by friction tests as well as full-scale blowdown tests at the GAP of Siemens in Karlstein, West Germany. Babcock Sempell was to deliver more than 30 gate valves of this type for 5 Swedish nuclear power stations by autumn 1995. In the presentation, the author will report on the testing performed, qualifications, and sizing criteria which led to the new technical design.

  15. Temperature Effects on a-IGZO Thin Film Transistors Using HfO2 Gate Dielectric Material

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2014-01-01

    Full Text Available This study investigated the temperature effect on amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using hafnium oxide (HfO2 gate dielectric material. HfO2 is an attractive candidate as a high-κ dielectric material for gate oxide because it has great potential to exhibit superior electrical properties with a high drive current. In the process of integrating the gate dielectric and IGZO thin film, postannealing treatment is an essential process for completing the chemical reaction of the IGZO thin film and enhancing the gate oxide quality to adjust the electrical characteristics of the TFTs. However, the hafnium atom diffused the IGZO thin film, causing interface roughness because of the stability of the HfO2 dielectric thin film during high-temperature annealing. In this study, the annealing temperature was optimized at 200°C for a HfO2 gate dielectric TFT exhibiting high mobility, a high ION/IOFF ratio, low IOFF current, and excellent subthreshold swing (SS.

  16. Ferroelectric polymer gates for non-volatile field effect control of ferromagnetism in (Ga, Mn)As layers

    International Nuclear Information System (INIS)

    Stolichnov, I; Riester, S W E; Mikheev, E; Setter, N; Rushforth, A W; Edmonds, K W; Campion, R P; Foxon, C T; Gallagher, B L; Jungwirth, T; Trodahl, H J

    2011-01-01

    (Ga, Mn)As and other diluted magnetic semiconductors (DMS) attract a great deal of attention for potential spintronic applications because of the possibility of controlling the magnetic properties via electrical gating. Integration of a ferroelectric gate on the DMS channel adds to the system a non-volatile memory functionality and permits nanopatterning via the polarization domain engineering. This topical review is focused on the multiferroic system, where the ferromagnetism in the (Ga, Mn)As DMS channel is controlled by the non-volatile field effect of the spontaneous polarization. Use of ferroelectric polymer gates in such heterostructures offers a viable alternative to the traditional oxide ferroelectrics generally incompatible with DMS. Here we review the proof-of-concept experiments demonstrating the ferroelectric control of ferromagnetism, analyze the performance issues of the ferroelectric gates and discuss prospects for further development of the ferroelectric/DMS heterostructures toward the multiferroic field effect transistor. (topical review)

  17. Electrical characteristics of AlO{sub x}N{sub y} prepared by oxidation of sub-10-nm-thick AlN films for MOS gate dielectric applications

    Energy Technology Data Exchange (ETDEWEB)

    Jeon, Sang Hun; Jang, Hyeon Woo; Kim, Hyun Soo; Noh, Do Young; Hwang, Hyun Sang [Kwangju Institute of Science and Technology, Kwangju (Korea, Republic of)

    2000-12-01

    In this research, the feasibility of ultrathin AlO{sub x}N{sub y} prepared by oxidation of sub 100-A-thick AlN thin films for metal-oxide-semiconductor (MOS) gate dielectric applications was investigated. Oxidation of 51-A-and 98-A-thick as-deposited AlN at 800 .deg. C was used to form 72-A-and 130-A-thick AlO{sub x}N{sub y}, respectively. Based on the capacitance-voltage (C-V) measurements of the MOS capacitor, the dielectric constants of 72 A-thick and 130 A-thick Al-oxynitride were 5.15 and 7, respectively. The leakage current of Al-oxynitride at low field was almost the same as that of thermal SiO{sub 2}. based on the CV data, the interface state density of Al-oxynitride was relatively higher than that of SiO{sub 2}. Although process optimization is still necessary, the Al-oxynitride exhibits some possibility for future MOS gate dielectric applications.

  18. Electrical characteristics of AlO sub x N sub y prepared by oxidation of sub-10-nm-thick AlN films for MOS gate dielectric applications

    CERN Document Server

    Jeon, S H; Kim, H S; Noh, D Y; Hwang, H S

    2000-01-01

    In this research, the feasibility of ultrathin AlO sub x N sub y prepared by oxidation of sub 100-A-thick AlN thin films for metal-oxide-semiconductor (MOS) gate dielectric applications was investigated. Oxidation of 51-A-and 98-A-thick as-deposited AlN at 800 .deg. C was used to form 72-A-and 130-A-thick AlO sub x N sub y , respectively. Based on the capacitance-voltage (C-V) measurements of the MOS capacitor, the dielectric constants of 72 A-thick and 130 A-thick Al-oxynitride were 5.15 and 7, respectively. The leakage current of Al-oxynitride at low field was almost the same as that of thermal SiO sub 2. based on the CV data, the interface state density of Al-oxynitride was relatively higher than that of SiO sub 2. Although process optimization is still necessary, the Al-oxynitride exhibits some possibility for future MOS gate dielectric applications.

  19. Fabrication and electrical properties of metal-oxide semiconductor capacitors based on polycrystalline p-Cu{sub x}O and HfO{sub 2}/SiO{sub 2} high-{kappa} stack gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Zou Xiao [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Department of Electromachine Engineering, Jianghan University, Wuhan, 430056 (China); Fang Guojia, E-mail: gjfang@whu.edu.c [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Yuan Longyan; Liu Nishuang; Long Hao; Zhao Xingzhong [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China)

    2010-05-31

    Polycrystalline p-type Cu{sub x}O films were deposited after the growth of HfO{sub 2} dielectric on Si substrate by pulsed laser deposition, and Cu{sub x}O metal-oxide-semiconductor (MOS) capacitors with HfO{sub 2}/SiO{sub 2} stack gate dielectric were primarily fabricated and investigated. X-ray diffraction and X-ray photoelectron spectroscopy were applied to analyze crystalline structure and Cu{sup +}/Cu{sup 2+} ratios of Cu{sub x}O films respectively. SiO{sub 2} interlayer formed between the high-{kappa} dielectric and substrate was estimated by the transmission electron microscope. Results of electrical characteristic measurement indicate that the permittivity of HfO{sub 2} is about 22, and the gate leakage current density of MOS capacitor with 11.3 nm HfO{sub 2}/SiO{sub 2} stack dielectrics is {approx} 10{sup -4} A/cm{sup 2}. Results also show that the annealing in N{sub 2} can improve the quality of Cu{sub x}O/HfO{sub 2} interface and thus reduce the gate leakage density.

  20. FAD oxidizes the ERO1-PDI electron transfer chain: The role of membrane integrity

    International Nuclear Information System (INIS)

    Papp, Eszter; Nardai, Gabor; Mandl, Jozsef; Banhegyi, Gabor; Csermely, Peter

    2005-01-01

    The molecular steps of the electron transfer in the endoplasmic reticulum from the secreted proteins during their oxidation are relatively unknown. We present here that flavine adenine dinucleotide (FAD) is a powerful oxidizer of the oxidoreductase system, Ero1 and PDI, besides the proteins of rat liver microsomes and HepG2 hepatoma cells. Inhibition of FAD transport hindered the action of FAD. Microsomal membrane integrity was mandatory for all FAD-related oxidation steps downstream of Ero1. The PDI inhibitor bacitracin could inhibit FAD-mediated oxidation of microsomal proteins and PDI, but did not hinder the FAD-driven oxidation of Ero1. Our data demonstrated that Ero1 can utilize FAD as an electron acceptor and that FAD-driven protein oxidation goes through the Ero1-PDI pathway and requires the integrity of the endoplasmic reticulum membrane. Our findings prompt further studies to elucidate the membrane-dependent steps of PDI oxidation and the role of FAD in redox folding

  1. Gate Engineering in SOI LDMOS for Device Reliability

    Directory of Open Access Journals (Sweden)

    Aanand

    2016-01-01

    Full Text Available A linearly graded doping drift region with step gate structure, used for improvement of reduced surface field (RESURF SOI LDMOS transistor performance has been simulated with 0.35µm technology in this paper. The proposed device has one poly gate and double metal gate arranged in a stepped manner, from channel to drift region. The first gate uses n+ poly (near source where as other two gates of aluminium. The first gate with thin gate oxide has good control over the channel charge. The third gate with thick gate oxide at drift region reduce gate to drain capacitance. The arrangement of second and third gates in a stepped manner in drift region spreads the electric field uniformly. Using two dimensional device simulations, the proposed SOI LDMOS is compared with conventional structure and the extended metal structure. We demonstrate that the proposed device exhibits significant enhancement in linearity, breakdown voltage, on-resistance and HCI. Double metal gate reduces the impact ionization area which helps to improve the Hot Carrier Injection effect..

  2. Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

    International Nuclear Information System (INIS)

    Besleaga, C.; Stan, G.E.; Pintilie, I.; Barquinha, P.; Fortunato, E.; Martins, R.

    2016-01-01

    Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

  3. Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

    Energy Technology Data Exchange (ETDEWEB)

    Besleaga, C.; Stan, G.E.; Pintilie, I. [National Institute of Materials Physics, 405A Atomistilor, 077125 Magurele-Ilfov (Romania); Barquinha, P.; Fortunato, E. [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal); Martins, R., E-mail: rm@uninova.pt [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal)

    2016-08-30

    Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

  4. High-κ gate dielectrics: Current status and materials properties considerations

    Science.gov (United States)

    Wilk, G. D.; Wallace, R. M.; Anthony, J. M.

    2001-05-01

    Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal-oxide-semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward successful integration into the expected processing conditions for future CMOS technologies, especially due to their tendency to form at interfaces with Si (e.g. silicates). These pseudobinary systems also thereby enable the use of other high-κ materials by serving as an interfacial high-κ layer. While work is ongoing, much research is still required, as it is clear that any material which is to replace SiO2 as the gate dielectric faces a formidable challenge. The requirements for process integration compatibility are remarkably demanding, and any serious candidates will emerge only through continued, intensive investigation.

  5. Monitoring of Postoperative Bone Healing Using Smart Trauma-Fixation Device With Integrated Self-Powered Piezo-Floating-Gate Sensors.

    Science.gov (United States)

    Borchani, Wassim; Aono, Kenji; Lajnef, Nizar; Chakrabartty, Shantanu

    2016-07-01

    Achieving better surgical outcomes in cases of traumatic bone fractures requires postoperative monitoring of changes in the growth and mechanical properties of the tissue and bones during the healing process. While current in-vivo imaging techniques can provide a snapshot of the extent of bone growth, it is unable to provide a history of the healing process, which is important if any corrective surgery is required. Monitoring the time evolution of in-vivo mechanical loads using existing technology is a challenge due to the need for continuous power while maintaining patient mobility and comfort. This paper investigates the feasibility of self-powered monitoring of the bone-healing process using our previously reported piezo-floating-gate (PFG) sensors. The sensors are directly integrated with a fixation device and operate by harvesting energy from microscale strain variations in the fixation structure. We show that the sensors can record and store the statistics of the strain evolution during the healing process for offline retrieval and analysis. Additionally, we present measurement results using a biomechanical phantom comprising of a femur fracture fixation plate; bone healing is emulated by inserting different materials, with gradually increasing elastic moduli, inside a fracture gap. The PFG sensor can effectively sense, compute, and record continuously evolving statistics of mechanical loading over a typical healing period of a bone, and the statistics could be used to differentiate between different bone-healing conditions. The proposed sensor presents a reliable objective technique to assess bone-healing progress and help decide on the removal time of the fixation device.

  6. Distinct white matter integrity in glutamic acid decarboxylase and voltage-gated potassium channel-complex antibody-associated limbic encephalitis.

    Science.gov (United States)

    Wagner, Jan; Schoene-Bake, Jan-Christoph; Witt, Juri-Alexander; Helmstaedter, Christoph; Malter, Michael P; Stoecker, Winfried; Probst, Christian; Weber, Bernd; Elger, Christian E

    2016-03-01

    Autoantibodies against glutamic acid decarboxylase (GAD) and the voltage-gated potassium channel (VGKC) complex are associated with distinct subtypes of limbic encephalitis regarding clinical presentation, response to therapy, and outcome. The aim of this study was to investigate white matter changes in these two limbic encephalitis subtypes by means of diffusion tensor imaging (DTI). Diffusion data were obtained in 14 patients with GAD antibodies and 16 patients with VGKC-complex antibodies and compared with age- and gender-matched control groups. Voxelwise statistical analysis was carried out using tract-based spatial statistics. The results were furthermore compared with those of 15 patients with unilateral histologically confirmed hippocampal sclerosis and correlated with verbal and figural memory performance. We found widespread changes of fractional anisotropy and all diffusivity parameters in GAD-associated limbic encephalitis, whereas no changes were found in VGKC-complex-associated limbic encephalitis. The changes observed in the GAD group were even more extensive when compared against those of the hippocampal sclerosis group, although the disease duration was markedly shorter in patients with GAD antibodies. Correlation analysis revealed areas with a trend toward a negative correlation of diffusivity parameters with figural memory performance located mainly in the right temporal lobe in the GAD group as well. The present study provides further evidence that, depending on the associated antibody, limbic encephalitis features clearly distinct imaging characteristics by showing widespread white matter changes in GAD-associated limbic encephalitis and preserved white matter integrity in VGKC-complex-associated limbic encephalitis. Furthermore, our results contribute to a better understanding of the specific pathophysiologic properties in these two subforms of limbic encephalitis by revealing that patients with GAD antibodies show widespread affections of

  7. Integrated Solid Oxide Fuel Cell Power System Characteristics Prediction

    Directory of Open Access Journals (Sweden)

    Marian GAICEANU

    2009-07-01

    Full Text Available The main objective of this paper is to deduce the specific characteristics of the CHP 100kWe Solid Oxide Fuel Cell (SOFC Power System from the steady state experimental data. From the experimental data, the authors have been developed and validated the steady state mathematical model. From the control room the steady state experimental data of the SOFC power conditioning are available and using the developed steady state mathematical model, the authors have been obtained the characteristic curves of the system performed by Siemens-Westinghouse Power Corporation. As a methodology the backward and forward power flow analysis has been employed. The backward power flow makes possible to obtain the SOFC power system operating point at different load levels, resulting as the load characteristic. By knowing the fuel cell output characteristic, the forward power flow analysis is used to predict the power system efficiency in different operating points, to choose the adequate control decision in order to obtain the high efficiency operation of the SOFC power system at different load levels. The CHP 100kWe power system is located at Gas Turbine Technologies Company (a Siemens Subsidiary, TurboCare brand in Turin, Italy. The work was carried out through the Energia da Ossidi Solidi (EOS Project. The SOFC stack delivers constant power permanently in order to supply the electric and thermal power both to the TurboCare Company and to the national grid.

  8. Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

    Science.gov (United States)

    McConkey, M. L.

    1984-12-01

    A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

  9. Integrated Science Assessment (ISA) for Sulfur Oxides – Health Criteria (Final Report, Sep 2008)

    Science.gov (United States)

    EPA announced the availability of the final report, Integrated Science Assessment (ISA) for Sulfur Oxides – Health Criteria final assessment. This report represents a concise synthesis and evaluation of the most policy-relevant science and will ultimately provide the scien...

  10. Integrated Science Assessment (ISA) for Sulfur Oxides – Health Criteria (First External Review Draft, Sep 2007)

    Science.gov (United States)

    EPA has announced that the First External Review Draft of the Integrated Science Assessment (ISA) for Sulfur Oxides – Health Criteria has been made available for independent peer review and public review. This draft ISA document represents a concise synthesis and evaluatio...

  11. New gate opening hours

    CERN Multimedia

    GS Department

    2009-01-01

    Please note the new opening hours of the gates as well as the intersites tunnel from the 19 May 2009: GATE A 7h - 19h GATE B 24h/24 GATE C 7h - 9h\t17h - 19h GATE D 8h - 12h\t13h - 16h GATE E 7h - 9h\t17h - 19h Prévessin 24h/24 The intersites tunnel will be opened from 7h30 to 18h non stop. GS-SEM Group Infrastructure and General Services Department

  12. Ex situ integration of iron oxide nanoparticles onto the exfoliated expanded graphite flakes in water suspension

    Directory of Open Access Journals (Sweden)

    Jović Nataša

    2014-01-01

    Full Text Available Hybrid structures composed of exfoliated expanded graphite (EG and iron oxide nanocrystals have been produced by an ex situ process. The iron oxide nanoparticles coated with meso-2,3-dimercaptosuccinic acid (DMSA, or poly(acrylic acid (PAA were integrated onto the exfoliated EG flakes by mixing their aqueous suspensions at room temperature under support of 1-ethyl-3-(3-dimethylaminopropylcarbodiimide (EDC and N-hydroxysuccin-nimide (NHS. EG flakes have been used both, naked and functionalized with branched polyethylenimine (PEI. Complete integration of two constituents has been achieved and mainteined stable for more than 12 months. No preferential spatial distribution of anchoring sites for attachement of iron oxide nanoparticles has been observed, regardless EG flakes have been used naked or functionalized with PEI molecules. The structural and physico-chemical characteristics of the exfoliated expanded graphite and its hybrids nanostructures has been investigated by SEM, TEM, FTIR and Raman techniques. [Projekat Ministarstva nauke Republike Srbije, br. 45015

  13. Heavy-ion-induced, gate-rupture in power MOSFETs

    International Nuclear Information System (INIS)

    Fischer, T.A.

    1987-01-01

    A new, heavy-ion-induced, burnout mechanism has been experimentally observed in power metal-oxide-semiconductor field-effect transistors (MOSFETs). This mechanism occurs when a heavy, charged particle passes through the gate oxide region of n- or p-channel devices having sufficient gate-to-source or gate-to-drain bias. The gate-rupture leads to significant permanent degradation of the device. A proposed failure mechanism is discussed and experimentally verified. In addition, the absolute immunity of p-channel devices to heavy-ion-induced, semiconductor burnout is demonstrated and discussed along with new, non-destructive, burnout testing methods

  14. Demonstration of an N7 integrated fab process for metal oxide EUV photoresist

    Science.gov (United States)

    De Simone, Danilo; Mao, Ming; Kocsis, Michael; De Schepper, Peter; Lazzarino, Frederic; Vandenberghe, Geert; Stowers, Jason; Meyers, Stephen; Clark, Benjamin L.; Grenville, Andrew; Luong, Vinh; Yamashita, Fumiko; Parnell, Doni

    2016-03-01

    Inpria has developed a directly patternable metal oxide hard-mask as a robust, high-resolution photoresist for EUV lithography. In this paper we demonstrate the full integration of a baseline Inpria resist into an imec N7 BEOL block mask process module. We examine in detail both the lithography and etch patterning results. By leveraging the high differential etch resistance of metal oxide photoresists, we explore opportunities for process simplification and cost reduction. We review the imaging results from the imec N7 block mask patterns and its process windows as well as routes to maximize the process latitude, underlayer integration, etch transfer, cross sections, etch equipment integration from cross metal contamination standpoint and selective resist strip process. Finally, initial results from a higher sensitivity Inpria resist are also reported. A dose to size of 19 mJ/cm2 was achieved to print pillars as small as 21nm.

  15. Bias stress instability of double-gate a-IGZO TFTs on polyimide substrate

    Science.gov (United States)

    Cho, Won-Ju; Ahn, Min-Ju

    2017-09-01

    In this study, flexible double-gate thin-film transistor (TFT)-based amorphous indium-galliumzinc- oxide (a-IGZO) was fabricated on a polyimide substrate. Double-gate operation with connected front and back gates was compared with a single-gate operation. As a result, the double-gate a- IGZO TFT exhibited enhanced electrical characteristics as well as improved long-term reliability. Under positive- and negative-bias temperature stress, the threshold voltage shift of the double-gate operation was much smaller than that of the single-gate operation.

  16. Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

    Science.gov (United States)

    Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

    2015-03-04

    Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

  17. The temperature coefficient of the resonance integral for uranium metal and oxide

    Energy Technology Data Exchange (ETDEWEB)

    Blomberg, P; Hellstrand, E; Homer, S

    1960-06-15

    The temperature coefficient of the resonance integral in uranium metal and oxide has been measured over a wide temperature range for rods with three different diameters. The results for metal agree with most earlier results from activation measurements but differ as much as a factor of two from results obtained with reactivity methods. For oxide only one measurement has been reported recently. Our value is considerably lower than the result of that measurement. The experiments will continue in order to find the reason for the large discrepancy mentioned above.

  18. The temperature coefficient of the resonance integral for uranium metal and oxide

    International Nuclear Information System (INIS)

    Blomberg, P.; Hellstrand, E.; Homer, S.

    1960-06-01

    The temperature coefficient of the resonance integral in uranium metal and oxide has been measured over a wide temperature range for rods with three different diameters. The results for metal agree with most earlier results from activation measurements but differ as much as a factor of two from results obtained with reactivity methods. For oxide only one measurement has been reported recently. Our value is considerably lower than the result of that measurement. The experiments will continue in order to find the reason for the large discrepancy mentioned above

  19. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit.

    Science.gov (United States)

    Nakazato, Kazuo

    2014-03-28

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor.

  20. Ballistic transport of graphene pnp junctions with embedded local gates

    International Nuclear Information System (INIS)

    Nam, Seung-Geol; Ki, Dong-Keun; Kim, Youngwook; Kim, Jun Sung; Lee, Hu-Jong; Park, Jong Wan

    2011-01-01

    We fabricated graphene pnp devices, by embedding pre-defined local gates in an oxidized surface layer of a silicon substrate. With neither deposition of dielectric material on the graphene nor electron-beam irradiation, we obtained high-quality graphene pnp devices without degradation of the carrier mobility even in the local-gate region. The corresponding increased mean free path leads to the observation of ballistic and phase-coherent transport across a local gate 130 nm wide, which is about an order of magnitude wider than reported previously. Furthermore, in our scheme, we demonstrated independent control of the carrier density in the local-gate region, with a conductance map very much distinct from those of top-gated devices. This was caused by the electric field arising from the global back gate being strongly screened by the embedded local gate. Our scheme allows the realization of ideal multipolar graphene junctions with ballistic carrier transport.

  1. Press-pack components electro-thermo-fluidic modeling: application to the Integrated Gate Commutated Thyristor 4,5 kV-4 kA; Modelisation des couplages electro-thermo-fluidiques des composants en boitier press-pack: application a l'integrated gate commutated thyristor 4,5kV-4kA

    Energy Technology Data Exchange (ETDEWEB)

    Feral, H.

    2005-09-15

    Temperature is an important parameter when you use semi-conductors. In the multi MW power converters the semiconductor losses are upper than kW. The thermal analyzes of the semiconductor package and cooling system must be performed to understand the thermal limitations. The maximal temperature can not be upper than 150 deg. C for silicon components. The temperature variations have an impact on the component life time. The thermal phenomena in the power electronic component can not be dissociated with the electric phenomena (losses) and fluidic phenomena (cooling). An electro-thermo-fluidic modelling method has been elaborated. The method is used to study an IGCT (Integrated Gate commutated Thyristor) 4.5 kV 4 kA in the switching cell with his water cooling system. The IGCT use a press-pack floating mount package technology. The thermal contact resistances have an important impact on the heat transfer in the package. The thermal contact resistances have been estimated with a profile-metric measure and a direct measure. To validate the method and tune the model, thermal, electric and fluidic measurements are performed in an IGCT in MW switching operation. The last chapter introduces the model applications. The model is used to study the water flow direction in the IGCT cooling system. Transient simulations are used to study the temperature fluctuation on an arc furnace melting cycle. (author)

  2. A low on-resistance SOI LDMOS using a trench gate and a recessed drain

    International Nuclear Information System (INIS)

    Ge Rui; Luo Xiaorong; Jiang Yongheng; Zhou Kun; Wang Pei; Wang Qi; Wang Yuangang; Zhang Bo; Li Zhaoji

    2012-01-01

    An integrable silicon-on-insulator (SOI) power lateral MOSFET with a trench gate and a recessed drain (TGRD MOSFET) is proposed to reduce the on-resistance. Both of the trench gate extended to the buried oxide (BOX) and the recessed drain reduce the specific on-resistance (R on,sp ) by widening the vertical conduction area and shortening the extra current path. The trench gate is extended as a field plate improves the electric field distribution. Breakdown voltage (BV) of 97 V and R on,sp of 0.985 mΩ·cm 2 (V GS = 5 V) are obtained for a TGRD MOSFET with 6.5 μm half-cell pitch. Compared with the trench gate SOI MOSFET (TG MOSFET) and the conventional MOSFET, R on,sp of the TGRD MOSFET decreases by 46% and 83% at the same BV, respectively. Compared with the SOI MOSFET with a trench gate and a trench drain (TGTD MOSFET), BV of the TGRD MOSFET increases by 37% at the same R on,sp . (semiconductor devices)

  3. A Zinc Oxide Nanorod Ammonia Microsensor Integrated with a Readout Circuit on-a-Chip

    Directory of Open Access Journals (Sweden)

    Chyan-Chyi Wu

    2011-11-01

    Full Text Available A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 mm complementary metal oxide semiconductor (CMOS process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature.

  4. Effect of hydrogen on the integrity of aluminium–oxide interface at elevated temperatures

    KAUST Repository

    Li, Meng; Xie, De-Gang; Ma, Evan; Li, Ju; Zhang, Xixiang; Shan, Zhi-Wei

    2017-01-01

    Hydrogen can facilitate the detachment of protective oxide layer off metals and alloys. The degradation is usually exacerbated at elevated temperatures in many industrial applications; however, its origin remains poorly understood. Here by heating hydrogenated aluminium inside an environmental transmission electron microscope, we show that hydrogen exposure of just a few minutes can greatly degrade the high temperature integrity of metal–oxide interface. Moreover, there exists a critical temperature of ∼150 °C, above which the growth of cavities at the metal–oxide interface reverses to shrinkage, followed by the formation of a few giant cavities. Vacancy supersaturation, activation of a long-range diffusion pathway along the detached interface and the dissociation of hydrogen-vacancy complexes are critical factors affecting this behaviour. These results enrich the understanding of hydrogen-induced interfacial failure at elevated temperatures.

  5. Integrated structural biology and molecular ecology of N-cycling enzymes from ammonia-oxidizing archaea.

    Science.gov (United States)

    Tolar, Bradley B; Herrmann, Jonathan; Bargar, John R; van den Bedem, Henry; Wakatsuki, Soichi; Francis, Christopher A

    2017-10-01

    Knowledge of the molecular ecology and environmental determinants of ammonia-oxidizing organisms is critical to understanding and predicting the global nitrogen (N) and carbon cycles, but an incomplete biochemical picture hinders in vitro studies of N-cycling enzymes. Although an integrative structural and dynamic characterization at the atomic scale would advance our understanding of function tremendously, structural knowledge of key N-cycling enzymes from ecologically relevant ammonia oxidizers is unfortunately extremely limited. Here, we discuss the challenges and opportunities for examining the ecology of ammonia-oxidizing organisms, particularly uncultivated Thaumarchaeota, through (meta)genome-driven structural biology of the enzymes ammonia monooxygenase (AMO) and nitrite reductase (NirK). © 2017 Society for Applied Microbiology and John Wiley & Sons Ltd.

  6. Integrative device and process of oxidization, degassing, acidity adjustment of 1BP from APOR process

    Energy Technology Data Exchange (ETDEWEB)

    Zuo, Chen; Zheng, Weifang, E-mail: wfazh@ciae.ac.cn; Yan, Taihong; He, Hui; Li, Gaoliang; Chang, Shangwen; Li, Chuanbo; Yuan, Zhongwei

    2016-02-15

    Graphical abstract: Previous (left) and present (right) device of oxidation, degassing, acidity adjustment of 1BP. - Highlights: • We designed an integrative device and process. • The utilization efficiency of N{sub 2}O{sub 4} is increased significantly. • Our work results in considerable simplification of the device. • Process parameters are determined by experiments. - Abstract: Device and process of oxidization, degassing, acidity adjustment of 1BP (The Pu production feed from U/Pu separation section) from APOR process (Advanced Purex Process based on Organic Reductants) were improved through rational design and experiments. The device was simplified and the process parameters, such as feed position and flow ratio, were determined by experiments. Based on this new device and process, the reductants N,N-dimethylhydroxylamine (DMHAN) and methylhydrazine (MMH) in 1BP solution could be oxidized with much less N{sub 2}O{sub 4} consumption.

  7. Effect of hydrogen on the integrity of aluminium–oxide interface at elevated temperatures

    KAUST Repository

    Li, Meng

    2017-02-20

    Hydrogen can facilitate the detachment of protective oxide layer off metals and alloys. The degradation is usually exacerbated at elevated temperatures in many industrial applications; however, its origin remains poorly understood. Here by heating hydrogenated aluminium inside an environmental transmission electron microscope, we show that hydrogen exposure of just a few minutes can greatly degrade the high temperature integrity of metal–oxide interface. Moreover, there exists a critical temperature of ∼150 °C, above which the growth of cavities at the metal–oxide interface reverses to shrinkage, followed by the formation of a few giant cavities. Vacancy supersaturation, activation of a long-range diffusion pathway along the detached interface and the dissociation of hydrogen-vacancy complexes are critical factors affecting this behaviour. These results enrich the understanding of hydrogen-induced interfacial failure at elevated temperatures.

  8. Integration of a municipal solid waste gasification plant with solid oxide fuel cell and gas turbine

    DEFF Research Database (Denmark)

    Bellomare, Filippo; Rokni, Masoud

    2013-01-01

    An interesting source of producing energy with low pollutants emission and reduced environmental impact are the biomasses; particularly using Municipal Solid Waste (MSW) as fuel, can be a competitive solution not only to produce energy with negligible costs but also to decrease the storage...... in landfills. A Municipal Solid Waste Gasification Plant Integrated with Solid Oxide Fuel Cell (SOFC) and Gas Turbine (GT) has been studied and the plant is called IGSG (Integrated Gasification SOFC and GT). Gasification plant is fed by MSW to produce syngas by which the anode side of an SOFC is fed wherein...

  9. Ultrasensitive mass sensor fully integrated with complementary metal-oxide-semiconductor circuitry

    DEFF Research Database (Denmark)

    Forsén, Esko Sebastian; Abadal, G.; Ghatnekar-Nilsson, S.

    2005-01-01

    Nanomechanical resonators have been monolithically integrated on preprocessed complementary metal-oxide-semiconductor (CMOS) chips. Fabricated resonator systems have been designed to have resonance frequencies up to 1.5 MHz. The systems have been characterized in ambient air and vacuum conditions...... and display ultrasensitive mass detection in air. A mass sensitivity of 4 ag/Hz has been determined in air by placing a single glycerine drop, having a measured weight of 57 fg, at the apex of a cantilever and subsequently measuring a frequency shift of 14.8 kHz. CMOS integration enables electrostatic...

  10. Using a Floating-Gate MOS Transistor as a Transducer in a MEMS Gas Sensing System

    Directory of Open Access Journals (Sweden)

    Gaspar Casados-Cruz

    2010-11-01

    Full Text Available Floating-gate MOS transistors have been widely used in diverse analog and digital applications. One of these is as a charge sensitive device in sensors for pH measurement in solutions or using gates with metals like Pd or Pt for hydrogen sensing. Efforts are being made to monolithically integrate sensors together with controlling and signal processing electronics using standard technologies. This can be achieved with the demonstrated compatibility between available CMOS technology and MEMS technology. In this paper an in-depth analysis is done regarding the reliability of floating-gate MOS transistors when charge produced by a chemical reaction between metallic oxide thin films with either reducing or oxidizing gases is present. These chemical reactions need temperatures around 200 °C or higher to take place, so thermal insulation of the sensing area must be assured for appropriate operation of the electronics at room temperature. The operation principle of the proposal here presented is confirmed by connecting the gate of a conventional MOS transistor in series with a Fe2O3 layer. It is shown that an electrochemical potential is present on the ferrite layer when reacting with propane.

  11. Dry dock gate stability modelling

    Science.gov (United States)

    Oktoberty; Widiyanto; Sasono, E. J.; Pramono, S.; Wandono, A. T.

    2018-03-01

    The development of marine transportation needs in Indonesia increasingly opens national shipyard business opportunities to provide shipbuilding services to the shipbuilding vessels. That emphasizes the stability of prime. The ship's decking door becomes an integral part of the efficient place and the specification of the use of the asset of its operational ease. This study aims to test the stability of Dry Dock gate with the length of 35.4 meters using Maxsurf and Hydromax in analyzing the calculation were in its assessment using interval per 500 mm length so that it can get detail data toward longitudinal and transverse such as studying Ship planning in general. The test result shows dry dock gate meets IMO standard with ballast construction containing 54% and 68% and using fix ballast can produce GMt 1,924 m, tide height 11,357m. The GMt value indicates dry dick gate can be stable and firmly erect at the base of the mouth dry dock. When empty ballast produces GMt 0.996 which means dry dock date is stable, but can easily be torn down. The condition can be used during dry dock gate treatment.

  12. Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

    Science.gov (United States)

    Hsu, Ching-Hsiang; Shih, Wang-Cheng; Lin, Yueh-Chin; Hsu, Heng-Tung; Hsu, Hisang-Hua; Huang, Yu-Xiang; Lin, Tai-Wei; Wu, Chia-Hsun; Wu, Wen-Hao; Maa, Jer-Shen; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

    2016-04-01

    Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

  13. Integrating electrochemical oxidation into forward osmosis process for removal of trace antibiotics in wastewater.

    Science.gov (United States)

    Liu, Pengxiao; Zhang, Hanmin; Feng, Yujie; Shen, Chao; Yang, Fenglin

    2015-10-15

    During the rejection of trace pharmaceutical contaminants from wastewater by forward osmosis (FO), disposal of the FO concentrate was still an unsolved issue. In this study, by integrating the advantages of forward osmosis and electrochemical oxidation, a forward osmosis process with the function of electrochemical oxidation (FOwEO) was established for the first time to achieve the aim of rejection of trace antibiotics from wastewater and treatment of the concentrate at the same time. Results demonstrated that FOwEO (current density J=1 mA cm(-2)) exhibited excellent rejections of antibiotics (>98%) regardless of different operation conditions, and above all, antibiotics in the concentrate were well degraded (>99%) at the end of experiment (after 3h). A synergetic effect between forward osmosis and electrochemical oxidation was observed in FOwEO, which lies in that antibiotic rejections by FO were enhanced due to the degradation of antibiotics in the concentrate, while the electrochemical oxidation capacity was improved in the FOwEO channel, of which good mass transfer and the assist of indirect oxidation owing to the reverse NaCl from draw solution were supposed to be the mechanism. This study demonstrated that the FOwEO has the capability to thoroughly remove trace antibiotics from wastewater. Copyright © 2015 Elsevier B.V. All rights reserved.

  14. Analyzing Single-Event Gate Ruptures In Power MOSFET's

    Science.gov (United States)

    Zoutendyk, John A.

    1993-01-01

    Susceptibilities of power metal-oxide/semiconductor field-effect transistors (MOSFET's) to single-event gate ruptures analyzed by exposing devices to beams of energetic bromine ions while applying appropriate bias voltages to source, gate, and drain terminals and measuring current flowing into or out of each terminal.

  15. Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Eungtaek; Kim, Choong-Ki; Lee, Myung Keun; Bang, Tewook; Choi, Yang-Kyu; Choi, Kyung Cheol, E-mail: shkp@kaist.ac.kr, E-mail: kyungcc@kaist.ac.kr [School of Electrical Engineering, KAIST, Daejeon 34141 (Korea, Republic of); Park, Sang-Hee Ko, E-mail: shkp@kaist.ac.kr, E-mail: kyungcc@kaist.ac.kr [Department of Material Science and Engineering, KAIST, Daejeon 34141 (Korea, Republic of)

    2016-05-02

    We investigated the positive-bias stress (PBS) instability of thin film transistors (TFTs) composed of different types of first-gate insulators, which serve as a protection layer of the active surface. Two different deposition methods, i.e., the thermal atomic layer deposition (THALD) and plasma-enhanced ALD (PEALD) of Al{sub 2}O{sub 3}, were applied for the deposition of the first GI. When THALD was used to deposit the GI, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs showed superior stability characteristics under PBS. For example, the threshold voltage shift (ΔV{sub th}) was 0 V even after a PBS time (t{sub stress}) of 3000 s under a gate voltage (V{sub G}) condition of 5 V (with an electrical field of 1.25 MV/cm). On the other hand, when the first GI was deposited by PEALD, the ΔV{sub th} value of a-IGZO TFTs was 0.82 V after undergoing an identical amount of PBS. In order to interpret the disparate ΔV{sub th} values resulting from PBS quantitatively, the average oxide charge trap density (N{sub T}) in the GI and its spatial distribution were investigated through low-frequency noise characterizations. A higher N{sub T} resulted during in the PEALD type GI than in the THALD case. Specifically, the PEALD process on a-IGZO layer surface led to an increasing trend of N{sub T} near the GI/a-IGZO interface compared to bulk GI owing to oxygen plasma damage on the a-IGZO surface.

  16. Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors

    International Nuclear Information System (INIS)

    Kim, Eungtaek; Kim, Choong-Ki; Lee, Myung Keun; Bang, Tewook; Choi, Yang-Kyu; Choi, Kyung Cheol; Park, Sang-Hee Ko

    2016-01-01

    We investigated the positive-bias stress (PBS) instability of thin film transistors (TFTs) composed of different types of first-gate insulators, which serve as a protection layer of the active surface. Two different deposition methods, i.e., the thermal atomic layer deposition (THALD) and plasma-enhanced ALD (PEALD) of Al_2O_3, were applied for the deposition of the first GI. When THALD was used to deposit the GI, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs showed superior stability characteristics under PBS. For example, the threshold voltage shift (ΔV_t_h) was 0 V even after a PBS time (t_s_t_r_e_s_s) of 3000 s under a gate voltage (V_G) condition of 5 V (with an electrical field of 1.25 MV/cm). On the other hand, when the first GI was deposited by PEALD, the ΔV_t_h value of a-IGZO TFTs was 0.82 V after undergoing an identical amount of PBS. In order to interpret the disparate ΔV_t_h values resulting from PBS quantitatively, the average oxide charge trap density (N_T) in the GI and its spatial distribution were investigated through low-frequency noise characterizations. A higher N_T resulted during in the PEALD type GI than in the THALD case. Specifically, the PEALD process on a-IGZO layer surface led to an increasing trend of N_T near the GI/a-IGZO interface compared to bulk GI owing to oxygen plasma damage on the a-IGZO surface.

  17. Repair of oxidative DNA base damage in the host genome influences the HIV integration site sequence preference.

    Directory of Open Access Journals (Sweden)

    Geoffrey R Bennett

    Full Text Available Host base excision repair (BER proteins that repair oxidative damage enhance HIV infection. These proteins include the oxidative DNA damage glycosylases 8-oxo-guanine DNA glycosylase (OGG1 and mutY homolog (MYH as well as DNA polymerase beta (Polβ. While deletion of oxidative BER genes leads to decreased HIV infection and integration efficiency, the mechanism remains unknown. One hypothesis is that BER proteins repair the DNA gapped integration intermediate. An alternative hypothesis considers that the most common oxidative DNA base damages occur on guanines. The subtle consensus sequence preference at HIV integration sites includes multiple G:C base pairs surrounding the points of joining. These observations suggest a role for oxidative BER during integration targeting at the nucleotide level. We examined the hypothesis that BER repairs a gapped integration intermediate by measuring HIV infection efficiency in Polβ null cell lines complemented with active site point mutants of Polβ. A DNA synthesis defective mutant, but not a 5'dRP lyase mutant, rescued HIV infection efficiency to wild type levels; this suggested Polβ DNA synthesis activity is not necessary while 5'dRP lyase activity is required for efficient HIV infection. An alternate hypothesis that BER events in the host genome influence HIV integration site selection was examined by sequencing integration sites in OGG1 and MYH null cells. In the absence of these 8-oxo-guanine specific glycosylases the chromatin elements of HIV integration site selection remain the same as in wild type cells. However, the HIV integration site sequence preference at G:C base pairs is altered at several positions in OGG1 and MYH null cells. Inefficient HIV infection in the absence of oxidative BER proteins does not appear related to repair of the gapped integration intermediate; instead oxidative damage repair may participate in HIV integration site preference at the sequence level.

  18. A manufacturable process integration approach for graphene devices

    Science.gov (United States)

    Vaziri, Sam; Lupina, Grzegorz; Paussa, Alan; Smith, Anderson D.; Henkel, Christoph; Lippert, Gunther; Dabrowski, Jarek; Mehr, Wolfgang; Östling, Mikael; Lemme, Max C.

    2013-06-01

    In this work, we propose an integration approach for double gate graphene field effect transistors. The approach includes a number of process steps that are key for future integration of graphene in microelectronics: bottom gates with ultra-thin (2 nm) high-quality thermally grown SiO2 dielectrics, shallow trench isolation between devices and atomic layer deposited Al2O3 top gate dielectrics. The complete process flow is demonstrated with fully functional GFET transistors and can be extended to wafer scale processing. We assess, through simulation, the effects of the quantum capacitance and band bending in the silicon substrate on the effective electric fields in the top and bottom gate oxide. The proposed process technology is suitable for other graphene-based devices such as graphene-based hot electron transistors and photodetectors.

  19. Potentials and challenges of integration for complex metal oxides in CMOS devices and beyond

    International Nuclear Information System (INIS)

    Kim, Y; Pham, C; Chang, J P

    2015-01-01

    This review focuses on recent accomplishments on complex metal oxide based multifunctional materials and the potential they hold in advancing integrated circuits. It begins with metal oxide based high-κ materials to highlight the success of their integration since 45 nm complementary metal–oxide–semiconductor (CMOS) devices. By simultaneously offering a higher dielectric constant for improved capacitance as well as providing a thicker physical layer to prevent the quantum mechanical tunnelling of electrons, high-κ materials have enabled the continued down-scaling of CMOS based devices. The most recent technology driver has been the demand to lower device power consumption, which requires the design and synthesis of novel materials, such as complex metal oxides that exhibit remarkable tunability in their ferromagnetic, ferroelectric and multiferroic properties. These properties make them suitable for a wide variety of applications such as magnetoelectric random access memory, radio frequency band pass filters, antennae and magnetic sensors. Single-phase multiferroics, while rare, offer unique functionalities which have motivated much scientific and technological research to ascertain the origins of their multiferroicity and their applicability to potential devices. However, due to the weak magnetoelectric coupling for single-phase multiferroics, engineered multiferroic composites based on magnetostrictive ferromagnets interfacing piezoelectrics or ferroelectrics have shown enhanced multiferroic behaviour from effective strain coupling at the interface. In addition, nanostructuring of the ferroic phases has demonstrated further improvement in the coupling effect. Therefore, single-phase and engineered composite multiferroics consisting of complex metal oxides are reviewed in terms of magnetoelectric coupling effects and voltage controlled ferromagnetic properties, followed by a review on the integration challenges that need to be overcome to realize the

  20. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.

    2011-10-12

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  1. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.; Smith, Casey; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2011-01-01

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  2. Quantum gate decomposition algorithms.

    Energy Technology Data Exchange (ETDEWEB)

    Slepoy, Alexander

    2006-07-01

    Quantum computing algorithms can be conveniently expressed in a format of a quantum logical circuits. Such circuits consist of sequential coupled operations, termed ''quantum gates'', or quantum analogs of bits called qubits. We review a recently proposed method [1] for constructing general ''quantum gates'' operating on an qubits, as composed of a sequence of generic elementary ''gates''.

  3. Training and operation of an integrated neuromorphic network based on metal-oxide memristors

    Science.gov (United States)

    Prezioso, M.; Merrikh-Bayat, F.; Hoskins, B. D.; Adam, G. C.; Likharev, K. K.; Strukov, D. B.

    2015-05-01

    Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 1014 synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

  4. CANDU fuel sheath integrity and oxide layer thickness determination by Eddy current technique

    International Nuclear Information System (INIS)

    Gheorghe, Gabriela; Man, Ion; Parvan, Marcel; Valeca, Serban

    2010-01-01

    This paper presents results concerning the integrity assessment of the fuel elements cladding and measurements of the oxide layer on sheaths, using the eddy current technique. Flaw detection using eddy current provides information about the integrity of fuel element sheath or presence of defects in the sheath produced by irradiation. The control equipment consists of a flaw detector with eddy currents, operable in the frequency range 10 Hz to 10 MHz, and a differential probe. The calibration of the flaw detector is done using artificial defects (longitudinal, transversal, external and internal notches, bored and unbored holes) obtained on Zircaloy-4 tubes identical to those out of which the sheath of the CANDU fuel element is manufactured (having a diameter of 13.08 mm and a wall thickness of 0.4 mm). When analyzing the behavior of the fuel elements' cladding facing the corrosion is important to know the thickness of the zirconium oxide layer. The calibration of the device measuring the thickness of the oxide layer is done using a Zircaloy-4 tube identical to that which the cladding of the CANDU fuel element is manufactured of, and calibration foils, as well. (authors)

  5. Gate protective device for SOS array

    Science.gov (United States)

    Meyer, J. E., Jr.; Scott, J. H.

    1972-01-01

    Protective gate device consisting of alternating heavily doped n(+) and p(+) diffusions eliminates breakdown voltages in silicon oxide on sapphire arrays caused by electrostatic discharge from person or equipment. Diffusions are easily produced during normal double epitaxial processing. Devices with nine layers had 27-volt breakdown.

  6. The effect of gate length on SOI-MOSFETS operation | Baedi ...

    African Journals Online (AJOL)

    The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm were simulated. Simulations showed that with a fixed channel length, when the gate ...

  7. Inorganic proton conducting electrolyte coupled oxide-based dendritic transistors for synaptic electronics.

    Science.gov (United States)

    Wan, Chang Jin; Zhu, Li Qiang; Zhou, Ju Mei; Shi, Yi; Wan, Qing

    2014-05-07

    Ionic/electronic hybrid devices with synaptic functions are considered to be the essential building blocks for neuromorphic systems and brain-inspired computing. Here, artificial synapses based on indium-zinc-oxide (IZO) transistors gated by nanogranular SiO2 proton-conducting electrolyte films are fabricated on glass substrates. Spike-timing dependent plasticity and paired-pulse facilitation are successfully mimicked in an individual bottom-gate transistor. Most importantly, dynamic logic and dendritic integration established by spatiotemporally correlated spikes are also mimicked in dendritic transistors with two in-plane gates as the presynaptic input terminals.

  8. Thermodynamic Analysis of an Integrated Gasification Solid Oxide Fuel Cell Plant with a Kalina Cycle

    DEFF Research Database (Denmark)

    Pierobon, Leonardo; Rokni, Masoud

    2015-01-01

    % is achieved; plant size and nominal power are selected based on the required cultivation area. SOFC heat recovery with SKC is compared to a Steam Cycle (SC). Although ammonia-water more accurately fits the temperature profile of the off-gases, the presence of a Hybrid Recuperator enhances the available work......-treated fuel then enters the anode side of the SOFC. Complete fuel oxidation is ensured in a burner by off-gases exiting the SOFC stacks. Off-gases are utilized as heat source for a SKC where a mixture of ammonia and water is expanded in a turbine to produce additional electric power. Thus, a triple novel......A hybrid plant that consists of a gasification system, Solid Oxide Fuel Cells (SOFC) and a Simple Kalina Cycle (SKC) is investigated. Woodchips are introduced into a fixed bed gasification plant to produce syngas, which is then fed into an integrated SOFC-SKC plant to produce electricity. The pre...

  9. Integrating Metal-Oxide-Decorated CNT Networks with a CMOS Readout in a Gas Sensor

    Directory of Open Access Journals (Sweden)

    Suhwan Kim

    2012-02-01

    Full Text Available We have implemented a tin-oxide-decorated carbon nanotube (CNT network gas sensor system on a single die. We have also demonstrated the deposition of metallic tin on the CNT network, its subsequent oxidation in air, and the improvement of the lifetime of the sensors. The fabricated array of CNT sensors contains 128 sensor cells for added redundancy and increased accuracy. The read-out integrated circuit (ROIC was combined with coarse and fine time-to-digital converters to extend its resolution in a power-efficient way. The ROIC is fabricated using a 0.35 µm CMOS process, and the whole sensor system consumes 30 mA at 5 V. The sensor system was successfully tested in the detection of ammonia gas at elevated temperatures.

  10. Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

    Science.gov (United States)

    Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

    2009-12-15

    Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

  11. Biomass gasification integrated with a solid oxide fuel cell and Stirling engine

    DEFF Research Database (Denmark)

    Rokni, Masoud

    2014-01-01

    An integrated gasification solid oxide fuel cell (SOFC) and Stirling engine for combined heat and power application is analyzed. The target for electricity production is 120 kW. Woodchips are used as gasification feedstock to produce syngas, which is then used to feed the SOFC stacks...... for electricity production. Unreacted hydrocarbons remaining after the SOFC are burned in a catalytic burner, and the hot off-gases from the burner are recovered in a Stirling engine for electricity and heat production. Domestic hot water is used as a heat sink for the Stirling engine. A complete balance...

  12. Thermodynamic Analysis of a Woodchips Gasification Integrated with Solid Oxide Fuel Cell and Stirling Engine

    DEFF Research Database (Denmark)

    Rokni, Masoud

    2013-01-01

    Integrated gasification Solid Oxide Fuel Cell (SOFC) and Stirling engine for combined heat and power application is analysed. The target for electricity production is 120 kW. Woodchips are used as gasification feedstock to produce syngas which is utilized for feeding the SOFC stacks for electricity...... and suggested. Thermodynamic analysis shows that a thermal efficiency of 42.4% based on LHV (lower heating value) can be achieved. Different parameter studies are performed to analysis system behaviour under different conditions. The analysis show that increasing fuel mass flow from the design point results...

  13. Integrating nitric oxide into salicylic acid and jasmonic acid/ethylene plant defense pathways

    DEFF Research Database (Denmark)

    Mur, Luis A J; Prats, Elena; Pierre, Sandra

    2013-01-01

    to be tailored to particular biotic stresses. Nitric oxide (NO) has emerged as a major signal influencing resistance mediated by both signalling pathways but no attempt has been made to integrate NO into established SA/JA/ET interactions. NO has been shown to act as an inducer or suppressor of signalling along......Plant defence against pests and pathogens is known to be conferred by either salicylic acid (SA) or jasmonic acid (JA)/ethylene (ET) pathways, depending on infection or herbivore-grazing strategy. It is well attested that SA and JA/ET pathways are mutually antagonistic allowing defence responses...

  14. Thermodynamic Investigation of an Integrated Gasification Plant with Solid Oxide Fuel Cell and Steam Cycles

    DEFF Research Database (Denmark)

    Rokni, Masoud

    2012-01-01

    A gasification plant is integrated on the top of a solid oxide fuel cell (SOFC) cycle, while a steam turbine (ST) cycle is used as a bottoming cycle for the SOFC plant. The gasification plant was fueled by woodchips to produce biogas and the SOFC stacks were fired with biogas. The produced gas...... generator (HRSG). The steam cycle was modeled with a simple single pressure level. In addition, a hybrid recuperator was used to recover more energy from the HRSG and send it back to the SOFC cycle. Thus two different configurations were investigated to study the plants characteristic. Such system...

  15. Integration of A Solid Oxide Fuel Cell into A 10 MW Gas Turbine Power Plant

    Directory of Open Access Journals (Sweden)

    Denver F. Cheddie

    2010-04-01

    Full Text Available Power generation using gas turbine power plants operating on the Brayton cycle suffers from low efficiencies. In this work, a solid oxide fuel cell (SOFC is proposed for integration into a 10 MW gas turbine power plant, operating at 30% efficiency. The SOFC system utilizes four heat exchangers for heat recovery from both the turbine outlet and the fuel cell outlet to ensure a sufficiently high SOFC temperature. The power output of the hybrid plant is 37 MW at 66.2% efficiency. A thermo-economic model predicts a payback period of less than four years, based on future projected SOFC cost estimates.

  16. Characteristics of dual-gate thin-film transistors for applications in digital radiology

    International Nuclear Information System (INIS)

    Waechter, D.; Huang, Z.; Zhao, W.; Blevis, I.; Rowlands, J.A.

    1996-01-01

    A large-area flat-panel detector for digital radiology is being developed. The detector uses an array of dual-gate thin-film transistors (TFTs) to read out X-ray-generated charge produced in an amorphous selenium (a-Se) layer. The TFTs use CdSe as the semiconductor and use the bottom gate for row selection. The top gate can be divided into a 'deliberate' gate, covering most of the channel length, and small 'parasitic' gates that consist of: overlap of source or drain metal over the top-gate oxide; and gap regions in the metal that are covered only by the a-Se. In this paper we present the properties of dual-gate TFTs and examine the effect of both the deliberate and parasitic gates on the detector operation. Various options for controlling the top-gate potential are analyzed and discussed. (author)

  17. Heavy-ion induced current through an oxide layer

    International Nuclear Information System (INIS)

    Takahashi, Yoshihiro; Ohki, Takahiro; Nagasawa, Takaharu; Nakajima, Yasuhito; Kawanabe, Ryu; Ohnishi, Kazunori; Hirao, Toshio; Onoda, Shinobu; Mishima, Kenta; Kawano, Katsuyasu; Itoh, Hisayoshi

    2007-01-01

    In this paper, the heavy-ion induced current in MOS structure is investigated. We have measured the transient gate current in a MOS capacitor and a MOSFET induced by single heavy-ions, and found that a transient current can be observed when the semiconductor surface is under depletion condition. In the case of MOSFET, a transient gate current with both positive and negative peaks is observed if the ion hits the gate area, and that the total integrated charge is almost zero within 100-200 ns after irradiation. From these results, we conclude that the radiation-induced gate current is dominated by a displacement current. We also discuss the generation mechanism of the radiation-induced current through the oxide layer by device simulation

  18. Soil nitrous oxide and methane fluxes in integrated crop-livestock systems in subtropics

    International Nuclear Information System (INIS)

    Dieckow, Jeferson; Pergher, Maico; Moraes, Anibal de; Piva, Jonatas Thiago; Bayer, Cimélio; Sakadevan, Karuppan

    2015-01-01

    Integrated crop-livestock (ICL) system is an agricultural practice in which crop-pasture rotation is carried out in the same field over time. In Brasil, ICL associated with no-tillage farming is increasingly gaining importance as a soil use strategy that improves food production (grain, milk and beef) and economic returns to farmers. Integrated crop-livestock-forestry (ICLF) is a recent modification of ICL in Brazil, with the inclusion of trees cultivation aiming at additional wood production and offering thermal comfort to livestock (Porfírio-da-Silva & Moraes, 2010). However, despite the increasing importance of ICL, little information is available on how this system may affect soil-atmosphere exchange of nitrous oxide (N 2 O) and methane (CH 4 )

  19. Low-voltage organic thin film transistors (OTFTs) using crosslinked polyvinyl alcohol (PVA)/neodymium oxide (Nd2O3) bilayer gate dielectrics

    Science.gov (United States)

    Khound, Sagarika; Sarma, Ranjit

    2018-01-01

    We have reported here on the design, processing and dielectric properties of pentacene-based organic thin film transitors (OTFTs) with a bilayer gate dilectrics of crosslinked PVA/Nd2O3 which enables low-voltage organic thin film operations. The dielectric characteristics of PVA/Nd2O3 bilayer films are studied by capacitance-voltage ( C- V) and current-voltage ( I- V) curves in the metal-insulator-metal (MIM) structure. We have analysed the output electrical responses and transfer characteristics of the OTFT devices to determine their performance of OTFT parameters. The mobility of 0.94 cm2/Vs, the threshold voltage of - 2.8 V, the current on-off ratio of 6.2 × 105, the subthreshold slope of 0.61 V/decade are evaluated. Low leakage current of the device is observed from current density-electric field ( J- E) curve. The structure and the morphology of the device are studied using X-ray diffraction (XRD) and atomic force microscope (AFM), respectively. The study demonstrates an effective way to realize low-voltage, high-performance OTFTs at low cost.

  20. Thermodynamic investigation of an integrated gasification plant with solid oxide fuel cell and steam cycles

    Energy Technology Data Exchange (ETDEWEB)

    Rokni, Masoud [Technical Univ. of Denmark, Lyngby (Denmark). Dept. of Mechanical Engineering, Thermal Energy System

    2012-07-01

    A gasification plant is integrated on the top of a solid oxide fuel cell (SOFC) cycle, while a steam turbine (ST) cycle is used as a bottoming cycle for the SOFC plant. The gasification plant was fueled by woodchips to produce biogas and the SOFC stacks were fired with biogas. The produced gas was rather clean for feeding to the SOFC stacks after a simple cleaning step. Because all the fuel cannot be burned in the SOFC stacks, a burner was used to combust the remaining fuel. The off-gases from the burner were then used to produce steam for the bottoming steam cycle in a heat recovery steam generator (HRSG). The steam cycle was modeled with a simple single pressure level. In addition, a hybrid recuperator was used to recover more energy from the HRSG and send it back to the SOFC cycle. Thus two different configurations were investigated to study the plants characteristic. Such system integration configurations are completely novel and have not been studied elsewhere. Plant efficiencies of 56% were achieved under normal operation which was considerably higher than the IGCC (Integrated Gasification Combined Cycle) in which a gasification plant is integrated with a gas turbine and a steam turbine. Furthermore, it is shown that under certain operating conditions, plant efficiency of about 62 is also possible to achieve. (orig.)

  1. Engine-integrated solid oxide fuel cells for efficient electrical power generation on aircraft

    Science.gov (United States)

    Waters, Daniel F.; Cadou, Christopher P.

    2015-06-01

    This work investigates the use of engine-integrated catalytic partial oxidation (CPOx) reactors and solid oxide fuel cells (SOFCs) to reduce fuel burn in vehicles with large electrical loads like sensor-laden unmanned air vehicles. Thermodynamic models of SOFCs, CPOx reactors, and three gas turbine (GT) engine types (turbojet, combined exhaust turbofan, separate exhaust turbofan) are developed and checked against relevant data and source material. Fuel efficiency is increased by 4% and 8% in the 50 kW and 90 kW separate exhaust turbofan systems respectively at only modest cost in specific power (8% and 13% reductions respectively). Similar results are achieved in other engine types. An additional benefit of hybridization is the ability to provide more electric power (factors of 3 or more in some cases) than generator-based systems before encountering turbine inlet temperature limits. A sensitivity analysis shows that the most important parameters affecting the system's performance are operating voltage, percent fuel oxidation, and SOFC assembly air flows. Taken together, this study shows that it is possible to create a GT-SOFC hybrid where the GT mitigates balance of plant losses and the SOFC raises overall system efficiency. The result is a synergistic system with better overall performance than stand-alone components.

  2. Integrative medical therapy: examination of meditation's therapeutic and global medicinal outcomes via nitric oxide (review).

    Science.gov (United States)

    Stefano, George B; Esch, Tobias

    2005-10-01

    Relaxation techniques are part of the integrative medicine movement that is of growing importance for mainstream medicine. Complementary medical therapies have the potential to affect many physiological systems. Repeatedly studies show the benefits of the placebo response and relaxation techniques in the treatment of hypertension, cardiac arrhythmias, chronic pain, insomnia, anxiety and mild and moderate depression, premenstrual syndrome, and infertility. In itself, relaxation is characterized by a decreased metabolism, heart rate, blood pressure, and rate of breathing as well as an increase in skin temperature. Relaxation approaches, such as progressive muscle relaxation, autogenic training, meditation and biofeedback, are effective in lowering systolic and diastolic blood pressure in hypertensive patients by a significant margin. Given this association with changes in vascular tone, we have hypothesized that nitric oxide, a demonstrated vasodilator substance, contribute to physiological activity of relaxation approaches. We examined the scientific literature concerning the disorders noted earlier for their nitric oxide involvement in an attempt to provide a molecular rationale for the positive effects of relaxation approaches, which are physiological and cognitive process. We conclude that constitutive nitric oxide may crucially contribute to potentially beneficial outcomes and effects in diverse pathologies, exerting a global healing effect.

  3. Cobalt Oxide Nanosheet and CNT Micro Carbon Monoxide Sensor Integrated with Readout Circuit on Chip

    Directory of Open Access Journals (Sweden)

    Ching-Liang Dai

    2010-03-01

    Full Text Available The study presents a micro carbon monoxide (CO sensor integrated with a readout circuit-on-a-chip manufactured by the commercial 0.35 μm complementary metal oxide semiconductor (CMOS process and a post-process. The sensing film of the sensor is a composite cobalt oxide nanosheet and carbon nanotube (CoOOH/CNT film that is prepared by a precipitation-oxidation method. The structure of the CO sensor is composed of a polysilicon resistor and a sensing film. The sensor, which is of a resistive type, changes its resistance when the sensing film adsorbs or desorbs CO gas. The readout circuit is used to convert the sensor resistance into the voltage output. The post-processing of the sensor includes etching the sacrificial layers and coating the sensing film. The advantages of the sensor include room temperature operation, short response/recovery times and easy post-processing. Experimental results show that the sensitivity of the CO sensor is about 0.19 mV/ppm, and the response and recovery times are 23 s and 34 s for 200 ppm CO, respectively.

  4. Catalyst development and systems analysis of methanol partial oxidation for the fuel processor - fuel cell integration

    Energy Technology Data Exchange (ETDEWEB)

    Newson, E; Mizsey, P; Hottinger, P; Truong, T B; Roth, F von; Schucan, Th H [Paul Scherrer Inst. (PSI), Villigen (Switzerland)

    1999-08-01

    Methanol partial oxidation (pox) to produce hydrogen for mobile fuel cell applications has proved initially more successful than hydrocarbon pox. Recent results of catalyst screening and kinetic studies with methanol show that hydrogen production rates have reached 7000 litres/hour/(litre reactor volume) for the dry pox route and 12,000 litres/hour/(litre reactor volume) for wet pox. These rates are equivalent to 21 and 35 kW{sub th}/(litre reactor volume) respectively. The reaction engineering problems remain to be solved for dry pox due to the significant exotherm of the reaction (hot spots of 100-200{sup o}C), but wet pox is essentially isothermal in operation. Analyses of the integrated fuel processor - fuel cell systems show that two routes are available to satisfy the sensitivity of the fuel cell catalysts to carbon monoxide, i.e. a preferential oxidation reactor or a membrane separator. Targets for individual system components are evaluated for the base and best case systems for both routes to reach the combined 40% efficiency required for the integrated fuel processor - fuel cell system. (author) 2 figs., 1 tab., 3 refs.

  5. VKCDB: Voltage-gated potassium channel database

    Directory of Open Access Journals (Sweden)

    Gallin Warren J

    2004-01-01

    Full Text Available Abstract Background The family of voltage-gated potassium channels comprises a functionally diverse group of membrane proteins. They help maintain and regulate the potassium ion-based component of the membrane potential and are thus central to many critical physiological processes. VKCDB (Voltage-gated potassium [K] Channel DataBase is a database of structural and functional data on these channels. It is designed as a resource for research on the molecular basis of voltage-gated potassium channel function. Description Voltage-gated potassium channel sequences were identified by using BLASTP to search GENBANK and SWISSPROT. Annotations for all voltage-gated potassium channels were selectively parsed and integrated into VKCDB. Electrophysiological and pharmacological data for the channels were collected from published journal articles. Transmembrane domain predictions by TMHMM and PHD are included for each VKCDB entry. Multiple sequence alignments of conserved domains of channels of the four Kv families and the KCNQ family are also included. Currently VKCDB contains 346 channel entries. It can be browsed and searched using a set of functionally relevant categories. Protein sequences can also be searched using a local BLAST engine. Conclusions VKCDB is a resource for comparative studies of voltage-gated potassium channels. The methods used to construct VKCDB are general; they can be used to create specialized databases for other protein families. VKCDB is accessible at http://vkcdb.biology.ualberta.ca.

  6. Physical Modeling of Gate-Controlled Schottky Barrier Lowering of Metal-Graphene Contacts in Top-Gated Graphene Field-Effect Transistors

    Science.gov (United States)

    Mao, Ling-Feng; Ning, Huansheng; Huo, Zong-Liang; Wang, Jin-Yan

    2015-12-01

    A new physical model of the gate controlled Schottky barrier height (SBH) lowering in top-gated graphene field-effect transistors (GFETs) under saturation bias condition is proposed based on the energy conservation equation with the balance assumption. The theoretical prediction of the SBH lowering agrees well with the experimental data reported in literatures. The reduction of the SBH increases with the increasing of gate voltage and relative dielectric constant of the gate oxide, while it decreases with the increasing of oxide thickness, channel length and acceptor density. The magnitude of the reduction is slightly enhanced under high drain voltage. Moreover, it is found that the gate oxide materials with large relative dielectric constant (>20) have a significant effect on the gate controlled SBH lowering, implying that the energy relaxation of channel electrons should be taken into account for modeling SBH in GFETs.

  7. Physical Modeling of Gate-Controlled Schottky Barrier Lowering of Metal-Graphene Contacts in Top-Gated Graphene Field-Effect Transistors.

    Science.gov (United States)

    Mao, Ling-Feng; Ning, Huansheng; Huo, Zong-Liang; Wang, Jin-Yan

    2015-12-17

    A new physical model of the gate controlled Schottky barrier height (SBH) lowering in top-gated graphene field-effect transistors (GFETs) under saturation bias condition is proposed based on the energy conservation equation with the balance assumption. The theoretical prediction of the SBH lowering agrees well with the experimental data reported in literatures. The reduction of the SBH increases with the increasing of gate voltage and relative dielectric constant of the gate oxide, while it decreases with the increasing of oxide thickness, channel length and acceptor density. The magnitude of the reduction is slightly enhanced under high drain voltage. Moreover, it is found that the gate oxide materials with large relative dielectric constant (>20) have a significant effect on the gate controlled SBH lowering, implying that the energy relaxation of channel electrons should be taken into account for modeling SBH in GFETs.

  8. Application of the integral method to modelling the oxidation of defected fuel elements

    International Nuclear Information System (INIS)

    Kolar, M.

    1995-06-01

    The starting point for this report is the discrepancy reported in previous work between the reaction-diffusion calculations and the CEX-1 experiment, which involves storage of defected fuel elements in air at 150 deg C. This discrepancy is considerably diminished here by a more critical choice of theoretical parameters, and by taking into account the fact that different CEX-1 fuel elements were oxidized at very different rates and that the fuel element used previously for comparison with theoretical calculations actually underwent two limited-oxygen-supply cycles. Much better agreement is obtained here between the theory and the third, unlimited-air, storage period of the CEX-1 experiment. The approximate integral method is used extensively for the solution of the one-dimensional diffusion moving-boundary problems that may describe various storage periods of the CEX-1 experiment. In some cases it is easy to extend this method to arbitrary precision by using higher moments of the diffusion equation. Using this method, the validity of quasi-steady-state approximation is verified. Diffusion-controlled oxidation is also studied. In this case, for the unlimited oxygen supply, the integral method leads to an exact analytical solution for linear geometry, and to a good analytical approximation of the solution for the spherically symmetric geometry. These solutions may have some application in the analysis of experiments on the oxidation of small UO 2 fragments or powders when the individual UO 2 grains may be considered to be approximately spherical. (author). 23 refs., 5 tabs., 11 figs

  9. Notes on the design of experiments and beam diagnostics with synchrotron light detected by a gated photomultiplier for the Fermilab superconducting electron linac and for the Integrable Optics Test Accelerator (IOTA)

    Energy Technology Data Exchange (ETDEWEB)

    Stancari, Giulio [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Romanov, Aleksandr [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Ruan, Jinhao [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Santucci, James [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Thurman-Keup, Randy [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Valishev, Alexander [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)

    2017-11-08

    We outline the design of beam experiments for the electron linac at the Fermilab Accelerator Science and Technology (FAST) facility and for the Integrable Optics Test Accelerator (IOTA), based on synchrotron light emitted by the electrons in bend dipoles, detected with gated microchannel-plate photomultipliers (MCP-PMTs). The system can be used both for beam diagnostics (e.g., beam intensity with full dynamic range, turn-by-turn beam vibrations, etc.) and for scientific experiments, such as the direct observation of the time structure of the radiation emitted by single electrons in a storage ring. The similarity between photon pulses and spectrum at the downstream end of the electron linac and in the IOTA ring allows one to test the apparatus during commissioning of the linac.

  10. Gate replacement at the Upper Lake Falls development

    International Nuclear Information System (INIS)

    Chen, C.T.; Locke, A.E.; Brown, E.R.

    1998-01-01

    Nova Scotia Power's integrated approach to dam safety was discussed. One of the two intake gates at Unit 1 of the Upper Falls Power Plant on the Mersey River was replaced in 1997 as part of the Utility's upgrading program. In the event of governor failure or turbine runaway, the new roller gate will allow operators to close the original sliding gate first under a more-or-less balanced head condition, and then to close the new roller gate under a full-flow condition. The planning, design and construction of the new roller gate is described. One of the two head gates of Unit 2 at the same station will be replaced in a similar fashion in the fall of 1998. 4 refs., 7 figs

  11. Biomass gasification integrated with a solid oxide fuel cell and Stirling engine

    International Nuclear Information System (INIS)

    Rokni, Masoud

    2014-01-01

    An integrated gasification solid oxide fuel cell (SOFC) and Stirling engine for combined heat and power application is analyzed. The target for electricity production is 120 kW. Woodchips are used as gasification feedstock to produce syngas, which is then used to feed the SOFC stacks for electricity production. Unreacted hydrocarbons remaining after the SOFC are burned in a catalytic burner, and the hot off-gases from the burner are recovered in a Stirling engine for electricity and heat production. Domestic hot water is used as a heat sink for the Stirling engine. A complete balance-of-plant is designed and suggested. Thermodynamic analysis shows that a thermal efficiency of 42.4% based on the lower heating value (LHV) can be achieved if all input parameters are selected conservatively. Different parameter studies are performed to analyze the system behavior under different conditions. The analysis shows that the decreasing number of stacks from a design viewpoint, indicating that plant efficiency decreases but power production remains nearly unchanged. Furthermore, the analysis shows that there is an optimum value for the utilization factor of the SOFC for the suggested plant design with the suggested input parameters. This optimum value is approximately 65%, which is a rather modest value for SOFC. In addition, introducing a methanator increases plant efficiency slightly. If SOFC operating temperature decreases due to new technology then plant efficiency will slightly be increased. Decreasing gasifier temperature, which cannot be controlled, causes the plant efficiency to increase also. - Highlights: • Design of integrated gasification with solid oxide fuel and Stirling engine. • Important plant parameters study. • Plant running on biomass with and without methanator. • Thermodynamics of integrated gasification SOFC-Stirling engine plants

  12. Analytical drain current formulation for gate dielectric engineered dual material gate-gate all around-tunneling field effect transistor

    Science.gov (United States)

    Madan, Jaya; Gupta, R. S.; Chaujar, Rishu

    2015-09-01

    In this work, an analytical drain current model for gate dielectric engineered (hetero dielectric)-dual material gate-gate all around tunnel field effect transistor (HD-DMG-GAA-TFET) has been developed. Parabolic approximation has been used to solve the two-dimensional (2D) Poisson equation with appropriate boundary conditions and continuity equations to evaluate analytical expressions for surface potential, electric field, tunneling barrier width and drain current. Further, the analog performance of the device is studied for three high-k dielectrics (Si3N4, HfO2, and ZrO2), and it has been investigated that the problem of lower ION, can be overcome by using the hetero-gate architecture. Moreover, the impact of scaling the gate oxide thickness and bias variations has also been studied. The HD-DMG-GAA-TFET shows an enhanced ION of the order of 10-4 A. The effectiveness of the proposed model is validated by comparing it with ATLAS device simulations.

  13. Introduction of audio gating to further reduce organ motion in breathing synchronized radiotherapy

    International Nuclear Information System (INIS)

    Kubo, H. Dale; Wang Lili

    2002-01-01

    With breathing synchronized radiotherapy (BSRT), a voltage signal derived from an organ displacement detector is usually displayed on the vertical axis whereas the elapsed time is shown on the horizontal axis. The voltage gate window is set on the breathing voltage signal. Whenever the breathing signal falls between the two gate levels, a gate pulse is produced to enable the treatment machine. In this paper a new gating mechanism, audio (or time-sequence) gating, is introduced and is integrated into the existing voltage gating system. The audio gating takes advantage of the repetitive nature of the breathing signal when repetitive audio instruction is given to the patient. The audio gating is aimed at removing the regions of sharp rises and falls in the breathing signal that cannot be removed by the voltage gating. When the breathing signal falls between voltage gate levels as well as between audio-gate levels, the voltage- and audio-gated radiotherapy (ART) system will generate an AND gate pulse. When this gate pulse is received by a linear accelerator, the linear accelerator becomes 'enabled' for beam delivery and will deliver the beam when all other interlocks are removed. This paper describes a new gating mechanism and a method of recording beam-on signal, both of which are, configured into a laptop computer. The paper also presents evidence of some clinical advantages achieved with the ART system

  14. Sol-gel zinc oxide humidity sensors integrated with a ring oscillator circuit on-a-chip.

    Science.gov (United States)

    Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

    2014-10-28

    The study develops an integrated humidity microsensor fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated humidity sensor consists of a humidity sensor and a ring oscillator circuit on-a-chip. The humidity sensor is composed of a sensitive film and branch interdigitated electrodes. The sensitive film is zinc oxide prepared by sol-gel method. After completion of the CMOS process, the sensor requires a post-process to remove the sacrificial oxide layer and to coat the zinc oxide film on the interdigitated electrodes. The capacitance of the sensor changes when the sensitive film adsorbs water vapor. The circuit is used to convert the capacitance of the humidity sensor into the oscillation frequency output. Experimental results show that the output frequency of the sensor changes from 84.3 to 73.4 MHz at 30 °C as the humidity increases 40 to 90%RH.

  15. Sol-Gel Zinc Oxide Humidity Sensors Integrated with a Ring Oscillator Circuit On-a-Chip

    Directory of Open Access Journals (Sweden)

    Ming-Zhi Yang

    2014-10-01

    Full Text Available The study develops an integrated humidity microsensor fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS process. The integrated humidity sensor consists of a humidity sensor and a ring oscillator circuit on-a-chip. The humidity sensor is composed of a sensitive film and branch interdigitated electrodes. The sensitive film is zinc oxide prepared by sol-gel method. After completion of the CMOS process, the sensor requires a post-process to remove the sacrificial oxide layer and to coat the zinc oxide film on the interdigitated electrodes. The capacitance of the sensor changes when the sensitive film adsorbs water vapor. The circuit is used to convert the capacitance of the humidity sensor into the oscillation frequency output. Experimental results show that the output frequency of the sensor changes from 84.3 to 73.4 MHz at 30 °C as the humidity increases 40 to 90%RH.

  16. Gated-controlled electron pumping in connected quantum rings

    International Nuclear Information System (INIS)

    Lima, R.P.A.; Domínguez-Adame, F.

    2014-01-01

    We study the electronic transport across connected quantum rings attached to leads and subjected to time-harmonic side-gate voltages. Using the Floquet formalism, we calculate the net pumped current generated and controlled by the side-gate voltage. The control of the current is achieved by varying the phase shift between the two side-gate voltages as well as the Fermi energy. In particular, the maximum current is reached when the side-gate voltages are in quadrature. This new design based on connected quantum rings controlled without magnetic fields can be easily integrated in standard electronic devices. - Highlights: • We introduce and study a minimal setup to pump electrons through connected quantum rings. • Quantum pumping is achieved by time-harmonic side-gate voltages instead of the more conventional time-dependent magnetic fluxes. • Our new design could be easily integrated in standard electronic devices

  17. Direct protein detection with a nano-interdigitated array gate MOSFET.

    Science.gov (United States)

    Tang, Xiaohui; Jonas, Alain M; Nysten, Bernard; Demoustier-Champagne, Sophie; Blondeau, Franoise; Prévot, Pierre-Paul; Pampin, Rémi; Godfroid, Edmond; Iñiguez, Benjamin; Colinge, Jean-Pierre; Raskin, Jean-Pierre; Flandre, Denis; Bayot, Vincent

    2009-08-15

    A new protein sensor is demonstrated by replacing the gate of a metal oxide semiconductor field effect transistor (MOSFET) with a nano-interdigitated array (nIDA). The sensor is able to detect the binding reaction of a typical antibody Ixodes ricinus immunosuppressor (anti-Iris) protein at a concentration lower than 1 ng/ml. The sensor exhibits a high selectivity and reproducible specific detection. We provide a simple model that describes the behavior of the sensor and explains the origin of its high sensitivity. The simulated and experimental results indicate that the drain current of nIDA-gate MOSFET sensor is significantly increased with the successive binding of the thiol layer, Iris and anti-Iris protein layers. It is found that the sensor detection limit can be improved by well optimizing the geometrical parameters of nIDA-gate MOSFET. This nanobiosensor, with real-time and label-free capabilities, can easily be used for the detection of other proteins, DNA, virus and cancer markers. Moreover, an on-chip associated electronics nearby the sensor can be integrated since its fabrication is compatible with complementary metal oxide semiconductor (CMOS) technology.

  18. Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

    Science.gov (United States)

    Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

    2018-05-08

    A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

  19. High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

    Science.gov (United States)

    Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

    2015-08-12

    Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

  20. Dual Pressure versus Hybrid Recuperation in an Integrated Solid Oxide Fuel Cell Cycle – Steam Cycle

    DEFF Research Database (Denmark)

    Rokni, Masoud

    2014-01-01

    A SOFC (solid oxide fuel cell) cycle running on natural gas was integrated with a ST (steam turbine) cycle. The fuel is desulfurized and pre-reformed before entering the SOFC. A burner was used to combust the remaining fuel after the SOFC stacks. The off-gases from the burner were used to produce...... pressure configuration steam cycle combined with SOFC cycle (SOFC-ST) was new and has not been studied previously. In each of the configuration, a hybrid recuperator was used to recovery the remaining energy of the off-gases after the HRSG. Thus, four different plants system setups were compared to each...... other to reveal the most superior concept with respect to plant efficiency and power. It was found that in order to increase the plant efficiency considerably, it was enough to use a single pressure with a hybrid recuperator instead of a dual pressure Rankine cycle....

  1. Semiconductor optical amplifier-based all-optical gates for high-speed optical processing

    DEFF Research Database (Denmark)

    Stubkjær, Kristian

    2000-01-01

    Semiconductor optical amplifiers are useful building blocks for all-optical gates as wavelength converters and OTDM demultiplexers. The paper reviews the progress from simple gates using cross-gain modulation and four-wave mixing to the integrated interferometric gates using cross-phase modulation....... These gates are very efficient for high-speed signal processing and open up interesting new areas, such as all-optical regeneration and high-speed all-optical logic functions...

  2. High-performance hybrid complementary logic inverter through monolithic integration of a MEMS switch and an oxide TFT.

    Science.gov (United States)

    Song, Yong-Ha; Ahn, Sang-Joon Kenny; Kim, Min-Wu; Lee, Jeong-Oen; Hwang, Chi-Sun; Pi, Jae-Eun; Ko, Seung-Deok; Choi, Kwang-Wook; Park, Sang-Hee Ko; Yoon, Jun-Bo

    2015-03-25

    A hybrid complementary logic inverter consisting of a microelectromechanical system switch as a promising alternative for the p-type oxide thin film transistor (TFT) and an n-type oxide TFT is presented for ultralow power integrated circuits. These heterogeneous microdevices are monolithically integrated. The resulting logic device shows a distinctive voltage transfer characteristic curve, very low static leakage, zero-short circuit current, and exceedingly high voltage gain. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. Treatment of high strength distillery wastewater (cherry stillage) by integrated aerobic biological oxidation and ozonation.

    Science.gov (United States)

    Beltrán, F J; Alvarez, P M; Rodríguez, E M; García-Araya, J F; Rivas, J

    2001-01-01

    The performance of integrated aerobic digestion and ozonation for the treatment of high strength distillery wastewater (i.e., cherry stillage) is reported. Experiments were conducted in laboratory batch systems operating in draw and fill mode. For the biological step, activated sludge from a municipal wastewater treatment facility was used as inoculum, showing a high degree of activity to distillery wastewater. Thus, BOD and COD overall conversions of 95% and 82% were achieved, respectively. However, polyphenol content and absorbance at 254 nm (A(254)) could not be reduced more than 35% and 15%, respectively, by means of single biological oxidation. By considering COD as substrate, the aerobic digestion process followed a Contois' model kinetics, from which the maximum specific growth rate of microorganisms (mu(max)) and the inhibition factor, beta, were then evaluated at different conditions of temperature and pH. In the combined process, the effect of a post-ozonation stage was studied. The main goals achieved by the ozonation step were the removal of polyphenols and A(254). Therefore, ozonation was shown to be an appropriate technology to aid aerobic biological oxidation in the treatment of cherry stillage.

  4. Plasmonic engineering of metal-oxide nanowire heterojunctions in integrated nanowire rectification units

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Luchan; Zhou, Y. Norman, E-mail: liulei@tsinghua.edu.cn, E-mail: nzhou@uwaterloo.ca [Department of Mechanical Engineering, State Key Laboratory of Tribology, Tsinghua University, Beijing 100084 (China); Centre for Advanced Materials Joining, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada); Zou, Guisheng; Liu, Lei, E-mail: liulei@tsinghua.edu.cn, E-mail: nzhou@uwaterloo.ca [Department of Mechanical Engineering, State Key Laboratory of Tribology, Tsinghua University, Beijing 100084 (China); Duley, Walt W. [Centre for Advanced Materials Joining, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada); Department of Physics and Astronomy, University of Waterloo, Waterloo, Ontario N2L 3G1 (Canada)

    2016-05-16

    We show that irradiation with femtosecond laser pulses can produce robust nanowire heterojunctions in coupled non-wetting metal-oxide Ag-TiO{sub 2} structures. Simulations indicate that joining arises from the effect of strong plasmonic localization in the region of the junction. Strong electric field effects occur in both Ag and TiO{sub 2} resulting in the modification of both surfaces and an increase in wettability of TiO{sub 2}, facilitating the interconnection of Ag and TiO{sub 2} nanowires. Irradiation leads to the creation of a thin layer of highly defected TiO{sub 2} in the contact region between the Ag and TiO{sub 2} nanowires. The presence of this layer allows the formation of a heterojunction and offers the possibility of engineering the electronic characteristics of interfacial structures. Rectifying junctions with single and bipolar properties have been generated in Ag-TiO{sub 2} nanowire circuits incorporating asymmetrical and symmetrical interfacial structures, respectively. This fabrication technique should be applicable for the interconnection of other heterogeneous metal-oxide nanowire components and demonstrates that femtosecond laser irradiation enables interfacial engineering for electronic applications of integrated nanowire structures.

  5. Plasmonic engineering of metal-oxide nanowire heterojunctions in integrated nanowire rectification units

    Science.gov (United States)

    Lin, Luchan; Zou, Guisheng; Liu, Lei; Duley, Walt W.; Zhou, Y. Norman

    2016-05-01

    We show that irradiation with femtosecond laser pulses can produce robust nanowire heterojunctions in coupled non-wetting metal-oxide Ag-TiO2 structures. Simulations indicate that joining arises from the effect of strong plasmonic localization in the region of the junction. Strong electric field effects occur in both Ag and TiO2 resulting in the modification of both surfaces and an increase in wettability of TiO2, facilitating the interconnection of Ag and TiO2 nanowires. Irradiation leads to the creation of a thin layer of highly defected TiO2 in the contact region between the Ag and TiO2 nanowires. The presence of this layer allows the formation of a heterojunction and offers the possibility of engineering the electronic characteristics of interfacial structures. Rectifying junctions with single and bipolar properties have been generated in Ag-TiO2 nanowire circuits incorporating asymmetrical and symmetrical interfacial structures, respectively. This fabrication technique should be applicable for the interconnection of other heterogeneous metal-oxide nanowire components and demonstrates that femtosecond laser irradiation enables interfacial engineering for electronic applications of integrated nanowire structures.

  6. Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

    2005-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

  7. Electrical characterization of Ω-gated uniaxial tensile strained Si nanowire-array metal-oxide-semiconductor field effect transistors with - and channel orientations

    International Nuclear Information System (INIS)

    Habicht, Stefan; Feste, Sebastian; Zhao, Qing-Tai; Buca, Dan; Mantl, Siegfried

    2012-01-01

    Nanowire-array metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated along and crystal directions on (001) un-/strained silicon-on-insulator substrates. Lateral strain relaxation through patterning was employed to transform biaxial tensile strain into uniaxial tensile strain along the nanowire. Devices feature ideal subthreshold swings and maximum on-current/off-current ratios of 10 11 for n and p-type transistors on both substrates. Electron and hole mobilities were extracted by split C–V method. For p-MOSFETs an increased mobility is observed for channel direction devices compared to devices. The n-MOSFETs showed a 45% increased electron mobility compared to devices. The comparison of strained and unstrained n-MOSFETs along and clearly demonstrates improved electron mobilities for strained channels of both channel orientations.

  8. Integrated demonstration of molten salt oxidation with salt recycle for mixed waste treatment

    International Nuclear Information System (INIS)

    Hsu, P.C.

    1997-01-01

    Molten Salt Oxidation (MSO) is a thermal, nonflame process that has the inherent capability of completely destroying organic constituents of mixed wastes, hazardous wastes, and energetic materials while retaining inorganic and radioactive constituents in the salt. For this reason, MSO is considered a promising alternative to incineration for the treatment of a variety of organic wastes. Lawrence Livermore National Laboratory (LLNL) has prepared a facility and constructed an integrated pilot-scale MSO treatment system in which tests and demonstrations are performed under carefully controlled (experimental) conditions. The system consists of a MSO processor with dedicated off-gas treatment, a salt recycle system, feed preparation equipment, and equipment for preparing ceramic final waste forms. This integrated system was designed and engineered based on laboratory experience with a smaller engineering-scale reactor unit and extensive laboratory development on salt recycle and final forms preparation. In this paper we present design and engineering details of the system and discuss its capabilities as well as preliminary process demonstration data. A primary purpose of these demonstrations is identification of the most suitable waste streams and waste types for MSO treatment

  9. An analytical gate tunneling current model for MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Kazerouni, Iman Abaspur, E-mail: imanabaspur@gmail.com; Hosseini, Seyed Ebrahim [Sabzevar Tarbiat Moallem University, Electrical and Computer Department (Iran, Islamic Republic of)

    2012-03-15

    Gate tunneling current of MOSFETs is an important factor in modeling ultra small devices. In this paper, gate tunneling in present-generation MOSFETs is studied. In the proposed model, we calculate the electron wave function at the semiconductor-oxide interface and inversion charge by treating the inversion layer as a potential well, including some simplifying assumptions. Then we compute the gate tunneling current using the calculated wave function. The proposed model results have an excellent agreement with experimental results in the literature.

  10. 78 FR 27387 - Notice of Workshop and Call for Information on Integrated Science Assessment for Oxides of Sulfur

    Science.gov (United States)

    2013-05-10

    ... periodically, and, if appropriate, to revise existing air quality criteria to reflect advances in scientific... such as chemistry and physics, sources and emissions, analytical methodology, transport and... will update the scientific assessment presented in the Integrated Science Assessment for Sulfur Oxides...

  11. Large-area processing of solution type metal-oxide in TFT backplanes and integration in highly stable OLED displays

    NARCIS (Netherlands)

    Marinkovic, Marko; Takata, Ryo; Neumann, Anita; Pham, Duy Vu; Anselmann, Ralf; Maas, Joris; Van Der Steen, Jan Laurens; Gelinck, Gerwin; Katsouras, Ilias

    2017-01-01

    Solution type metal-oxide semiconductor was processed on mass-production ready equipment and integrated in a backplane with ESL architecture TFTs. Excellent thickness uniformity of the semiconductor layer was obtained over the complete Gen I glass substrate (320 mm ×00D7; 352 mm), resulting in

  12. Amplifying genetic logic gates.

    Science.gov (United States)

    Bonnet, Jerome; Yin, Peter; Ortiz, Monica E; Subsoontorn, Pakpoom; Endy, Drew

    2013-05-03

    Organisms must process information encoded via developmental and environmental signals to survive and reproduce. Researchers have also engineered synthetic genetic logic to realize simpler, independent control of biological processes. We developed a three-terminal device architecture, termed the transcriptor, that uses bacteriophage serine integrases to control the flow of RNA polymerase along DNA. Integrase-mediated inversion or deletion of DNA encoding transcription terminators or a promoter modulates transcription rates. We realized permanent amplifying AND, NAND, OR, XOR, NOR, and XNOR gates actuated across common control signal ranges and sequential logic supporting autonomous cell-cell communication of DNA encoding distinct logic-gate states. The single-layer digital logic architecture developed here enables engineering of amplifying logic gates to control transcription rates within and across diverse organisms.

  13. Cardiac gated ventilation

    International Nuclear Information System (INIS)

    Hanson, C.W. III; Hoffman, E.A.

    1995-01-01

    There are several theoretic advantages to synchronizing positive pressure breaths with the cardiac cycle, including the potential for improving distribution of pulmonary and myocardial blood flow and enhancing cardiac output. The authors evaluated the effects of synchronizing respiration to the cardiac cycle using a programmable ventilator and electron beam CT (EBCT) scanning. The hearts of anesthetized dogs were imaged during cardiac gated respiration with a 50 msec scan aperture. Multi slice, short axis, dynamic image data sets spanning the apex to base of the left ventricle were evaluated to determine the volume of the left ventricular chamber at end-diastole and end-systole during apnea, systolic and diastolic cardiac gating. The authors observed an increase in cardiac output of up to 30% with inspiration gated to the systolic phase of the cardiac cycle in a non-failing model of the heart

  14. Effects of thickness and geometric variations in the oxide gate stack on the nonvolatile memory behaviors of charge-trap memory thin-film transistors

    Science.gov (United States)

    Bak, Jun Yong; Kim, So-Jung; Byun, Chun-Won; Pi, Jae-Eun; Ryu, Min-Ki; Hwang, Chi Sun; Yoon, Sung-Min

    2015-09-01

    Device designs of charge-trap oxide memory thin-film transistors (CTM-TFTs) were investigated to enhance their nonvolatile memory performances. The first strategy was to optimize the film thicknesses of the tunneling and charge-trap (CT) layers in order to meet requirements of both higher operation speed and longer retention time. While the program speed and memory window were improved for the device with a thinner tunneling layer, a long retention time was obtained only for the device with a tunneling layer thicker than 5 nm. The carrier concentration and charge-trap densities were optimized in the 30-nm-thick CT layer. It was observed that 10-nm-thick tunneling, 30-nm-thick CT, and 50-nm-thick blocking layers were the best configuration for our proposed CTM-TFTs, where a memory on/off margin higher than 107 was obtained, and a memory margin of 6.6 × 103 was retained even after the lapse of 105 s. The second strategy was to examine the effects of the geometrical relations between the CT and active layers for the applications of memory elements embedded in circuitries. The CTM-TFTs fabricated without an overlap between the CT layer and the drain electrode showed an enhanced program speed by the reduced parasitic capacitance. The drain-bias disturbance for the memory off-state was effectively suppressed even when a higher read-out drain voltage was applied. Appropriate device design parameters, such as the film thicknesses of each component layer and the geometrical relations between them, can improve the memory performances and expand the application fields of the proposed CTM-TFTs.

  15. Design of a thermally integrated bioethanol-fueled solid oxide fuel cell system integrated with a distillation column

    Science.gov (United States)

    Jamsak, W.; Douglas, P. L.; Croiset, E.; Suwanwarangkul, R.; Laosiripojana, N.; Charojrochkul, S.; Assabumrungrat, S.

    Solid oxide fuel cell systems integrated with a distillation column (SOFC-DIS) have been investigated in this study. The MER (maximum energy recovery) network for SOFC-DIS system under the base conditions (C EtOH = 25%, EtOH recovery = 80%, V = 0.7 V, fuel utilization = 80%, T SOFC = 1200 K) yields Q Cmin = 73.4 and Q Hmin = 0 kW. To enhance the performance of SOFC-DIS, utilization of internal useful heat sources from within the system (e.g. condenser duty and hot water from the bottom of the distillation column) and a cathode recirculation have been considered in this study. The utilization of condenser duty for preheating the incoming bioethanol and cathode recirculation for SOFC-DIS system were chosen and implemented to the SOFC-DIS (CondBio-CathRec). Different MER designs were investigated. The obtained MER network of CondBio-CathRec configuration shows the lower minimum cold utility (Q Cmin) of 55.9 kW and total cost index than that of the base case. A heat exchanger loop and utility path were also investigated. It was found that eliminate the high temperature distillate heat exchanger can lower the total cost index. The recommended network is that the hot effluent gas is heat exchanged with the anode heat exchanger, the external reformer, the air heat exchanger, the distillate heat exchanger and the reboiler, respectively. The corresponding performances of this design are 40.8%, 54.3%, 0.221 W cm -2 for overall electrical efficiency, Combine Heat and Power (CHP) efficiency and power density, respectively. The effect of operating conditions on composite curves on the design of heat exchanger network was investigated. The obtained composite curves can be divided into two groups: the threshold case and the pinch case. It was found that the pinch case which T SOFC = 1173 K yields higher total cost index than the CondBio-CathRec at the base conditions. It was also found that the pinch case can become a threshold case by adjusting split fraction or operating at

  16. Modeling and simulation of floating gate nanocrystal FET devices and circuits

    Science.gov (United States)

    Hasaneen, El-Sayed A. M.

    The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to

  17. Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

    International Nuclear Information System (INIS)

    Liao, Po-Yung; Chang, Ting-Chang; Hsieh, Tien-Yu; Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo; Chou, Cheng-Hsu; Chang, Jung-Fang

    2016-01-01

    The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V T ) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V T shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V T shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V T shift increases with decreasing frequency of the top gate pulses.

  18. Optimum source/drain overlap design for 16 nm high-k/metal gate MOSFETs

    International Nuclear Information System (INIS)

    Jang, Junyong; Lim, Towoo; Kim, Youngmin

    2009-01-01

    We explore a source/drain (S/D) design for a 16 nm MOSFET utilizing a replacement process for a high-k gate dielectric and metal gate electrode integration. Using TCAD simulation, a trade-off study between series resistance and overlap capacitance is carried out for a high-k dielectric surrounding gate structure, which results from the replacement process. An optimum S/D overlap to gate for the high-k surrounding gate structure is found to be different from the conventional gate structure, i.e. 0∼1 nm underlap is preferred for the surround high-k gate structure while 1∼2 nm overlap for the conventional gate one

  19. Analysis of gate underlap channel double gate MOS transistor for electrical detection of bio-molecules

    Science.gov (United States)

    Ajay; Narang, Rakhi; Saxena, Manoj; Gupta, Mridula

    2015-12-01

    In this paper, an analytical model for gate drain underlap channel Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG-MOSFET) for label free electrical detection of biomolecules has been proposed. The conformal mapping technique has been used to derive the expressions for surface potential, lateral electric field, energy bands (i.e. conduction and valence band) and threshold voltage (Vth). Subsequently a full drain current model to analyze the sensitivity of the biosensor has been developed. The shift in the threshold voltage and drain current (after the biomolecules interaction with the gate underlap channel region of the MOS transistor) has been used as a sensing metric. All the characteristic trends have been verified through ATLAS (SILVACO) device simulation results.

  20. Possibilities Of Opening Up the Stage-Gate Model

    Directory of Open Access Journals (Sweden)

    Biljana Stošić

    2014-12-01

    Full Text Available The paper presents basic elements of the Stage-Gate and Open innovation models, and possible connection of these two, resulting in what is frequently called an “Open Stage-Gate” model. This connection is based on opening up the new product development process and integration of the open innovation principles with the Stage-Gate concept, facilitating the import and export of information and technologies. Having in mind that the Stage Gate has originally been classified as the third generation model of innovation, the paper is dealing with the capabilities for applying the sixth generation Open innovation principles in today’s improved and much more flexible phases and gates of the Stage Gate. Lots of innovative companies are actually using both models in their NPD practice, looking for the most appropriate means of opening up the well-known closed innovation, especially in the domain of ideation through co-creation.

  1. Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

    Directory of Open Access Journals (Sweden)

    Takeshi Aoki

    2015-08-01

    Full Text Available This paper presents a compressive study on the fabrication and optimization of GaAs metal–oxide–semiconductor (MOS structures comprising a Al2O3 gate oxide, deposited via atomic layer deposition (ALD, with an AlN interfacial passivation layer prepared in situ via metal–organic chemical vapor deposition (MOCVD. The established protocol afforded self-limiting growth of Al2O3 in the atmospheric MOCVD reactor. Consequently, this enabled successive growth of MOCVD-formed AlN and ALD-formed Al2O3 layers on the GaAs substrate. The effects of AlN thickness, post-deposition anneal (PDA conditions, and crystal orientation of the GaAs substrate on the electrical properties of the resulting MOS capacitors were investigated. Thin AlN passivation layers afforded incorporation of optimum amounts of nitrogen, leading to good capacitance–voltage (C–V characteristics with reduced frequency dispersion. In contrast, excessively thick AlN passivation layers degraded the interface, thereby increasing the interfacial density of states (Dit near the midgap and reducing the conduction band offset. To further improve the interface with the thin AlN passivation layers, the PDA conditions were optimized. Using wet nitrogen at 600 °C was effective to reduce Dit to below 2 × 1012 cm−2 eV−1. Using a (111A substrate was also effective in reducing the frequency dispersion of accumulation capacitance, thus suggesting the suppression of traps in GaAs located near the dielectric/GaAs interface. The current findings suggest that using an atmosphere ALD process with in situ AlN passivation using the current MOCVD system could be an efficient solution to improving GaAs MOS interfaces.

  2. Integration of solid oxide fuel cell (SOFC) and chemical looping combustion (CLC) for ultra-high efficiency power generation and CO2 production

    NARCIS (Netherlands)

    Spallina, Vincenzo; Nocerino, Pasquale; Romano, Matteo C.; van Sint Annaland, Martin; Campanari, Stefano; Gallucci, Fausto

    2018-01-01

    This work presents a thermodynamic analysis of the integration of solid oxide fuel cells (SOFCs) with chemical looping combustion (CLC) in natural gas power plants. The fundamental idea of the proposed process integration is to use a dual fluidized-bed CLC process to complete the oxidation of the

  3. Gate valve performance prediction

    International Nuclear Information System (INIS)

    Harrison, D.H.; Damerell, P.S.; Wang, J.K.; Kalsi, M.S.; Wolfe, K.J.

    1994-01-01

    The Electric Power Research Institute is carrying out a program to improve the performance prediction methods for motor-operated valves. As part of this program, an analytical method to predict the stem thrust required to stroke a gate valve has been developed and has been assessed against data from gate valve tests. The method accounts for the loads applied to the disc by fluid flow and for the detailed mechanical interaction of the stem, disc, guides, and seats. To support development of the method, two separate-effects test programs were carried out. One test program determined friction coefficients for contacts between gate valve parts by using material specimens in controlled environments. The other test program investigated the interaction of the stem, disc, guides, and seat using a special fixture with full-sized gate valve parts. The method has been assessed against flow-loop and in-plant test data. These tests include valve sizes from 3 to 18 in. and cover a considerable range of flow, temperature, and differential pressure. Stem thrust predictions for the method bound measured results. In some cases, the bounding predictions are substantially higher than the stem loads required for valve operation, as a result of the bounding nature of the friction coefficients in the method

  4. Low field leakage current on ultra-thin gate oxides after ion or electron beam irradiations; Courant de fuite aux champs faibles d'oxydes ultra-minces apres irradiations avec des faisceaux d'ions et d'electrons

    Energy Technology Data Exchange (ETDEWEB)

    Ceschia, M.; Paccagnella, A.; Sandrin, S. [Universita di Padova, Dipt. di Elettronica e Informatica, Padova (Italy); Paccagnella, A. [Istituto Nazionale per la Fisica della Materia, INFM, Unita di Padova (Italy); Ghidini, G. [ST-Microelectronics, Agrate Brianza (Italy); Wyss, J. [Universita di Padova, Dipt. di Fisica, Padova (Italy)

    1999-07-01

    In contemporary CMOS 0.25-{mu}m technologies, the MOS gate oxide (thickness {approx_equal} 5 nm) shows a low-field leakage current after radiation stresses, i.e. the radiation induced leakage current (RILC). RILC is generally attributed to a trap assisted tunneling (TAT) of electrons through neutral oxide traps generated by radiation stress. RILC has been investigated on ultra-thin oxides irradiated with 158 MeV {sup 28}Si ions or 8 MeV electrons. 3 main results are worth being quoted: 1) ion or electron beam irradiation can produce RILC with similar characteristics. Even the dose dependence of RILC is similar in the 2 cases, despite the large LET difference (about a factor of 10{sup +4}), 2) RILC is not a constant as a function of time, it tends to decrease when an oxide field (few MV/cm) is applied for (tens of) thousands seconds. On the other hand, RILC stays constant in devices kept at low bias, and 3) if a pulsed gate voltage is applied during irradiation, RILC is reduced with respect to the zero-field case. (A.C.)

  5. Stanford, Duke, Rice,... and Gates?

    Science.gov (United States)

    Carey, Kevin

    2009-01-01

    This article presents an open letter to Bill Gates. In his letter, the author suggests that Bill Gates should build a brand-new university, a great 21st-century institution of higher learning. This university will be unlike anything the world has ever seen. He asks Bill Gates not to stop helping existing colleges create the higher-education system…

  6. Integrating nitric oxide into salicylic acid and jasmonic acid/ ethylene plant defense pathways.

    Science.gov (United States)

    Mur, Luis A J; Prats, Elena; Pierre, Sandra; Hall, Michael A; Hebelstrup, Kim H

    2013-01-01

    Plant defense against pests and pathogens is known to be conferred by either salicylic acid (SA) or jasmonic acid (JA)/ethylene (ET) pathways, depending on infection or herbivore-grazing strategy. It is well attested that SA and JA/ET pathways are mutually antagonistic allowing defense responses to be tailored to particular biotic stresses. Nitric oxide (NO) has emerged as a major signal influencing resistance mediated by both signaling pathways but no attempt has been made to integrate NO into established SA/JA/ET interactions. NO has been shown to act as an inducer or suppressor of signaling along each pathway. NO will initiate SA biosynthesis and nitrosylate key cysteines on TGA-class transcription factors to aid in the initiation of SA-dependent gene expression. Against this, S-nitrosylation of NONEXPRESSOR OF PATHOGENESIS-RELATED PROTEINS1 (NPR1) will promote the NPR1 oligomerization within the cytoplasm to reduce TGA activation. In JA biosynthesis, NO will initiate the expression of JA biosynthetic enzymes, presumably to over-come any antagonistic effects of SA on JA-mediated transcription. NO will also initiate the expression of ET biosynthetic genes but a suppressive role is also observed in the S-nitrosylation and inhibition of S-adenosylmethionine transferases which provides methyl groups for ET production. Based on these data a model for NO action is proposed but we have also highlighted the need to understand when and how inductive and suppressive steps are used.

  7. Analysis and optimization of acoustic wave micro-resonators integrating piezoelectric zinc oxide layers

    Science.gov (United States)

    Mortada, O.; Zahr, A. H.; Orlianges, J.-C.; Crunteanu, A.; Chatras, M.; Blondy, P.

    2017-02-01

    This paper reports on the design, simulation, fabrication, and test results of ZnO-based contour-mode micro-resonators integrating piezoelectric zinc oxide (ZnO) layers. The inter-digitated (IDT) type micro-resonators are fabricated on ZnO films and suspended top of 2 μm thick silicon membranes using silicon-on insulator technology. We analyze several possibilities of increasing the quality factor (Q) and the electromechanical coupling coefficient (kt2) of the devices by varying the numbers and lengths of the IDT electrodes and using different thicknesses of the ZnO layer. We designed and fabricated IDTs of different finger numbers (n = 25, 40, 50, and 80) and lengths (L = 100/130/170/200 μm) for three different thicknesses of ZnO films (200, 600, and 800 nm). The measured Q factor confirms that reducing the length and the number of IDT fingers enables us to reach better electrical performances at resonant frequencies around 700 MHz. The extracted results for an optimized micro-resonator device having an IDT length of 100 μm and 40 finger electrodes show a Q of 1180 and a kt2 of 7.4%. We demonstrate also that the reduction of the ZnO thickness from 800 nm to 200 nm increases the quality factor from 430 to 1600, respectively, around 700 MHz. Experimental data are in very good agreement with theoretical simulations of the fabricated devices

  8. Double optical gating

    Science.gov (United States)

    Gilbertson, Steve

    The observation and control of dynamics in atomic and molecular targets requires the use of laser pulses with duration less than the characteristic timescale of the process which is to be manipulated. For electron dynamics, this time scale is on the order of attoseconds where 1 attosecond = 10 -18 seconds. In order to generate pulses on this time scale, different gating methods have been proposed. The idea is to extract or "gate" a single pulse from an attosecond pulse train and switch off all the other pulses. While previous methods have had some success, they are very difficult to implement and so far very few labs have access to these unique light sources. The purpose of this work is to introduce a new method, called double optical gating (DOG), and to demonstrate its effectiveness at generating high contrast single isolated attosecond pulses from multi-cycle lasers. First, the method is described in detail and is investigated in the spectral domain. The resulting attosecond pulses produced are then temporally characterized through attosecond streaking. A second method of gating, called generalized double optical gating (GDOG), is also introduced. This method allows attosecond pulse generation directly from a carrier-envelope phase un-stabilized laser system for the first time. Next the methods of DOG and GDOG are implemented in attosecond applications like high flux pulses and extreme broadband spectrum generation. Finally, the attosecond pulses themselves are used in experiments. First, an attosecond/femtosecond cross correlation is used for characterization of spatial and temporal properties of femtosecond pulses. Then, an attosecond pump, femtosecond probe experiment is conducted to observe and control electron dynamics in helium for the first time.

  9. Development of III-V p-MOSFETs with high-kappa gate stack for future CMOS applications

    Science.gov (United States)

    Nagaiah, Padmaja

    As the semiconductor industry approaches the limits of traditional silicon CMOS scaling, non-silicon materials and new device architectures are gradually being introduced to improve Si integrated circuit performance and continue transistor scaling. Recently, the replacement of SiO2 with a high-k material (HfO2) as gate dielectric has essentially removed one of the biggest advantages of Si as channel material. As a result, alternate high mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. III-V materials in particular have become of great interest as channel materials, owing to their superior electron transport properties. However, there are several critical challenges that need to be addressed before III-V based CMOS can replace Si CMOS technology. Some of these challenges include development of a high quality, thermally stable gate dielectric/III-V interface, and improvement in III-V p-channel hole mobility to complement the n-channel mobility, low source/drain resistance and integration onto Si substrate. In this thesis, we would be addressing the first two issues i.e. the development high performance III-V p-channels and obtaining high quality III-V/high-k interface. We start with using the device architecture of the already established InGaAs n-channels as a baseline to understand the effect of remote scattering from the high-k oxide and oxide/semiconductor interface on channel transport properties such as electron mobility and channel electron concentration. Temperature dependent Hall electron mobility measurements were performed to separate various scattering induced mobility limiting factors. Dependence of channel mobility on proximity of the channel to the oxide interface, oxide thickness, annealing conditions are discussed. The results from this work will be used in the design of the p-channel MOSFETs. Following this, InxGa1-xAs (x>0.53) is chosen as channel material for developing p

  10. Effect of Thermal Budget on the Electrical Characterization of Atomic Layer Deposited HfSiO/TiN Gate Stack MOSCAP Structure.

    Directory of Open Access Journals (Sweden)

    Z N Khan

    Full Text Available Metal Oxide Semiconductor (MOS capacitors (MOSCAP have been instrumental in making CMOS nano-electronics realized for back-to-back technology nodes. High-k gate stacks including the desirable metal gate processing and its integration into CMOS technology remain an active research area projecting the solution to address the requirements of technology roadmaps. Screening, selection and deposition of high-k gate dielectrics, post-deposition thermal processing, choice of metal gate structure and its post-metal deposition annealing are important parameters to optimize the process and possibly address the energy efficiency of CMOS electronics at nano scales. Atomic layer deposition technique is used throughout this work because of its known deposition kinetics resulting in excellent electrical properties and conformal structure of the device. The dynamics of annealing greatly influence the electrical properties of the gate stack and consequently the reliability of the process as well as manufacturable device. Again, the choice of the annealing technique (migration of thermal flux into the layer, time-temperature cycle and sequence are key parameters influencing the device's output characteristics. This work presents a careful selection of annealing process parameters to provide sufficient thermal budget to Si MOSCAP with atomic layer deposited HfSiO high-k gate dielectric and TiN gate metal. The post-process annealing temperatures in the range of 600°C -1000°C with rapid dwell time provide a better trade-off between the desirable performance of Capacitance-Voltage hysteresis and the leakage current. The defect dynamics is thought to be responsible for the evolution of electrical characteristics in this Si MOSCAP structure specifically designed to tune the trade-off at low frequency for device application.

  11. Flexible Sensory Platform Based on Oxide-based Neuromorphic Transistors.

    Science.gov (United States)

    Liu, Ning; Zhu, Li Qiang; Feng, Ping; Wan, Chang Jin; Liu, Yang Hui; Shi, Yi; Wan, Qing

    2015-12-11

    Inspired by the dendritic integration and spiking operation of a biological neuron, flexible oxide-based neuromorphic transistors with multiple input gates are fabricated on flexible plastic substrates for pH sensor applications. When such device is operated in a quasi-static dual-gate synergic sensing mode, it shows a high pH sensitivity of ~105 mV/pH. Our results also demonstrate that single-spike dynamic mode can remarkably improve pH sensitivity and reduce response/recover time and power consumption. Moreover, we find that an appropriate negative bias applied on the sensing gate electrode can further enhance the pH sensitivity and reduce the power consumption. Our flexible neuromorphic transistors provide a new-concept sensory platform for biochemical detection with high sensitivity, rapid response and ultralow power consumption.

  12. Flexible Sensory Platform Based on Oxide-based Neuromorphic Transistors

    Science.gov (United States)

    Liu, Ning; Zhu, Li Qiang; Feng, Ping; Wan, Chang Jin; Liu, Yang Hui; Shi, Yi; Wan, Qing

    2015-01-01

    Inspired by the dendritic integration and spiking operation of a biological neuron, flexible oxide-based neuromorphic transistors with multiple input gates are fabricated on flexible plastic substrates for pH sensor applications. When such device is operated in a quasi-static dual-gate synergic sensing mode, it shows a high pH sensitivity of ~105 mV/pH. Our results also demonstrate that single-spike dynamic mode can remarkably improve pH sensitivity and reduce response/recover time and power consumption. Moreover, we find that an appropriate negative bias applied on the sensing gate electrode can further enhance the pH sensitivity and reduce the power consumption. Our flexible neuromorphic transistors provide a new-concept sensory platform for biochemical detection with high sensitivity, rapid response and ultralow power consumption. PMID:26656113

  13. Free energy dissipation of the spontaneous gating of a single voltage-gated potassium channel.

    Science.gov (United States)

    Wang, Jia-Zeng; Wang, Rui-Zhen

    2018-02-01

    Potassium channels mainly contribute to the resting potential and re-polarizations, with the potassium electrochemical gradient being maintained by the pump Na + /K + -ATPase. In this paper, we construct a stochastic model mimicking the kinetics of a potassium channel, which integrates temporal evolving of the membrane voltage and the spontaneous gating of the channel. Its stationary probability density functions (PDFs) are found to be singular at the boundaries, which result from the fact that the evolving rates of voltage are greater than the gating rates of the channel. We apply PDFs to calculate the power dissipations of the potassium current, the leakage, and the gating currents. On a physical perspective, the essential role of the system is the K + -battery charging the leakage (L-)battery. A part of power will inevitably be dissipated among the process. So, the efficiency of energy transference is calculated.

  14. Free energy dissipation of the spontaneous gating of a single voltage-gated potassium channel

    Science.gov (United States)

    Wang, Jia-Zeng; Wang, Rui-Zhen

    2018-02-01

    Potassium channels mainly contribute to the resting potential and re-polarizations, with the potassium electrochemical gradient being maintained by the pump Na+/K+-ATPase. In this paper, we construct a stochastic model mimicking the kinetics of a potassium channel, which integrates temporal evolving of the membrane voltage and the spontaneous gating of the channel. Its stationary probability density functions (PDFs) are found to be singular at the boundaries, which result from the fact that the evolving rates of voltage are greater than the gating rates of the channel. We apply PDFs to calculate the power dissipations of the potassium current, the leakage, and the gating currents. On a physical perspective, the essential role of the system is the K+-battery charging the leakage (L-)battery. A part of power will inevitably be dissipated among the process. So, the efficiency of energy transference is calculated.

  15. Volatile and Nonvolatile Characteristics of Asymmetric Dual-Gate Thyristor RAM with Vertical Structure.

    Science.gov (United States)

    Kim, Hyun-Min; Kwon, Dae Woong; Kim, Sihyun; Lee, Kitae; Lee, Junil; Park, Euyhwan; Lee, Ryoongbin; Kim, Hyungjin; Kim, Sangwan; Park, Byung-Gook

    2018-09-01

    In this paper, the volatile and nonvolatile characteristics of asymmetric dual-gate thyristor random access memory (TRAM) are investigated using the technology of a computer-aided design (TCAD) simulation. Owing to the use of two independent gates having different gate dielectric layers, volatile and nonvolatile memory functions can be realized in a single device. The first gate with a silicon oxide layer controls the one-transistor dynamic random access memory (1T-DRAM) characteristics of the device. From the simulation results, a rapid write speed (107) can be achieved. The second gate, whose dielectric material is composed of oxide/nitride/oxide (O/N/O) layers, is used to implement the nonvolatile property by trapping charges in the nitride layer. In addition, this offers an advantage when processing the 3D-stack memory application, as the device has a vertical channel structure with polycrystalline silicon.

  16. A rugged 650 V SOI-based high-voltage half-bridge IGBT gate driver IC for motor drive applications

    Science.gov (United States)

    Hua, Qing; Li, Zehong; Zhang, Bo; Chen, Weizhong; Huang, Xiangjun; Feng, Yuxiang

    2015-05-01

    This paper proposes a rugged high-voltage N-channel insulated gate bipolar transistor (IGBT) gate driver integrated circuit. The device integrates a high-side and a low-side output stages on a single chip, which is designed specifically for motor drive applications. High-voltage level shift technology enables the high-side stage of this device to operate up to 650 V. The logic inputs are complementary metal oxide semiconductor (CMOS)/transistor transistor logic compatible down to 3.3 V. Undervoltage protection functionality with hysteresis characteristic has also been integrated to enhance the device reliability. The device is fabricated in a 1.0 μm, 650 V high-voltage bipolar CMOS double-diffused metal oxide semiconductor (BCD) on silicon-on-insulator (SOI) process. Deep trench dielectric isolation technology is employed to provide complete electrical isolation with advantages such as reduced parasitic effects, excellent noise immunity and low leakage current. Experimental results show that the isolation voltage of this device can be up to approximately 779 V at 25°C, and the leakage current is only 5 nA at 650 V, which is 15% higher and 67% lower than the conventional ones. In addition, it delivers an excellent thermal stability and needs very low quiescent current and offers a high gate driver capability which is needed to adequately drive IGBTs that have large input capacitances.

  17. Study on effective MOSFET channel length extracted from gate capacitance

    Science.gov (United States)

    Tsuji, Katsuhiro; Terada, Kazuo; Fujisaka, Hisato

    2018-01-01

    The effective channel length (L GCM) of metal-oxide-semiconductor field-effect transistors (MOSFETs) is extracted from the gate capacitances of actual-size MOSFETs, which are measured by charge-injection-induced-error-free charge-based capacitance measurement (CIEF CBCM). To accurately evaluate the capacitances between the gate and the channel of test MOSFETs, the parasitic capacitances are removed by using test MOSFETs having various channel sizes and a source/drain reference device. A strong linear relationship between the gate-channel capacitance and the design channel length is obtained, from which L GCM is extracted. It is found that L GCM is slightly less than the effective channel length (L CRM) extracted from the measured MOSFET drain current. The reason for this is discussed, and it is found that the capacitance between the gate electrode and the source and drain regions affects this extraction.

  18. An electronically controlled automatic security access gate

    Directory of Open Access Journals (Sweden)

    Jonathan A. ENOKELA

    2014-11-01

    Full Text Available The security challenges being encountered in many places require electronic means of controlling access to communities, recreational centres, offices, and homes. The electronically controlled automated security access gate being proposed in this work helps to prevent an unwanted access to controlled environments. This is achieved mainly through the use of a Radio Frequency (RF transmitter-receiver pair. In the design a microcontroller is programmed to decode a given sequence of keys that is entered on a keypad and commands a transmitter module to send out this code as signal at a given radio frequency. Upon reception of this RF signal by the receiver module, another microcontroller activates a driver circuitry to operate the gate automatically. The codes for the microcontrollers were written in C language and were debugged and compiled using the KEIL Micro vision 4 integrated development environment. The resultant Hex files were programmed into the memories of the microcontrollers with the aid of a universal programmer. Software simulation was carried out using the Proteus Virtual System Modeling (VSM version 7.7. A scaled-down prototype of the system was built and tested. The electronically controlled automated security access gate can be useful in providing security for homes, organizations, and automobile terminals. The four-character password required to operate the gate gives the system an increased level of security. Due to its standalone nature of operation the system is cheaper to maintain in comparison with a manually operated type.

  19. Ultra-low specific on-resistance SOI double-gate trench-type MOSFET

    International Nuclear Information System (INIS)

    Lei Tianfei; Luo Xiaorong; Ge Rui; Chen Xi; Wang Yuangang; Yao Guoliang; Jiang Yongheng; Zhang Bo; Li Zhaoji

    2011-01-01

    An ultra-low specific on-resistance (R on,sp ) silicon-on-insulator (SOI) double-gate trench-type MOSFET (DG trench MOSFET) is proposed. The MOSFET features double gates and an oxide trench: the oxide trench is in the drift region, one trench gate is inset in the oxide trench and one trench gate is extended into the buried oxide. Firstly, the double gates reduce R on,sp by forming dual conduction channels. Secondly, the oxide trench not only folds the drift region, but also modulates the electric field, thereby reducing device pitch and increasing the breakdown voltage (BV). ABV of 93 V and a R on,sp of 51.8 mΩ·mm 2 is obtained for a DG trench MOSFET with a 3 μm half-cell pitch. Compared with a single-gate SOI MOSFET (SG MOSFET) and a single-gate SOI MOSFET with an oxide trench (SG trench MOSFET), the R on,sp of the DG trench MOSFET decreases by 63.3% and 33.8% at the same BV, respectively. (semiconductor devices)

  20. Efficient colorimetric pH sensor based on responsive polymer-quantum dot integrated graphene oxide.

    Science.gov (United States)

    Paek, Kwanyeol; Yang, Hyunseung; Lee, Junhyuk; Park, Junwoo; Kim, Bumjoon J

    2014-03-25

    In this paper, we report the development of a versatile platform for a highly efficient and stable graphene oxide (GO)-based optical sensor that exhibits distinctive ratiometric color responses. To demonstrate the applicability of the platform, we fabricated a colorimetric, GO-based pH sensor that responds to a wide range of pH changes. Our sensing system is based on responsive polymer and quantum dot (QD) hybrids integrated on a single GO sheet (MQD-GO), with the GO providing an excellent signal-to-noise ratio and high dispersion stability in water. The photoluminescence emissions of the blue and orange color-emitting QDs (BQDs and OQDs) in MQD-GO can be controlled independently by different pH-responsive linkers of poly(acrylic acid) (PAA) (pKa=4.5) and poly(2-vinylpyridine) (P2VP) (pKa=3.0) that can tune the efficiencies of Förster resonance energy transfer from the BQDs to the GO and from the OQDs to the GO, respectively. As a result, the color of MQD-GO changes from orange to near-white to blue over a wide range of pH values. The detailed mechanism of the pH-dependent response of the MQD-GO sensor was elucidated by measurements of time-resolved fluorescence and dynamic light scattering. Furthermore, the MQD-GO sensor showed excellent reversibility and high dispersion stability in pure water, indicating that our system is an ideal platform for biological and environmental applications. Our colorimetric GO-based optical sensor can be expanded easily to various other multifunctional, GO-based sensors by using alternate stimuli-responsive polymers.

  1. Noise Gating Solar Images

    Science.gov (United States)

    DeForest, Craig; Seaton, Daniel B.; Darnell, John A.

    2017-08-01

    I present and demonstrate a new, general purpose post-processing technique, "3D noise gating", that can reduce image noise by an order of magnitude or more without effective loss of spatial or temporal resolution in typical solar applications.Nearly all scientific images are, ultimately, limited by noise. Noise can be direct Poisson "shot noise" from photon counting effects, or introduced by other means such as detector read noise. Noise is typically represented as a random variable (perhaps with location- or image-dependent characteristics) that is sampled once per pixel or once per resolution element of an image sequence. Noise limits many aspects of image analysis, including photometry, spatiotemporal resolution, feature identification, morphology extraction, and background modeling and separation.Identifying and separating noise from image signal is difficult. The common practice of blurring in space and/or time works because most image "signal" is concentrated in the low Fourier components of an image, while noise is evenly distributed. Blurring in space and/or time attenuates the high spatial and temporal frequencies, reducing noise at the expense of also attenuating image detail. Noise-gating exploits the same property -- "coherence" -- that we use to identify features in images, to separate image features from noise.Processing image sequences through 3-D noise gating results in spectacular (more than 10x) improvements in signal-to-noise ratio, while not blurring bright, resolved features in either space or time. This improves most types of image analysis, including feature identification, time sequence extraction, absolute and relative photometry (including differential emission measure analysis), feature tracking, computer vision, correlation tracking, background modeling, cross-scale analysis, visual display/presentation, and image compression.I will introduce noise gating, describe the method, and show examples from several instruments (including SDO

  2. A quantum Fredkin gate

    Science.gov (United States)

    Patel, Raj B.; Ho, Joseph; Ferreyrol, Franck; Ralph, Timothy C.; Pryde, Geoff J.

    2016-01-01

    Minimizing the resources required to build logic gates into useful processing circuits is key to realizing quantum computers. Although the salient features of a quantum computer have been shown in proof-of-principle experiments, difficulties in scaling quantum systems have made more complex operations intractable. This is exemplified in the classical Fredkin (controlled-SWAP) gate for which, despite theoretical proposals, no quantum analog has been realized. By adding control to the SWAP unitary, we use photonic qubit logic to demonstrate the first quantum Fredkin gate, which promises many applications in quantum information and measurement. We implement example algorithms and generate the highest-fidelity three-photon Greenberger-Horne-Zeilinger states to date. The technique we use allows one to add a control operation to a black-box unitary, something that is impossible in the standard circuit model. Our experiment represents the first use of this technique to control a two-qubit operation and paves the way for larger controlled circuits to be realized efficiently. PMID:27051868

  3. A quantum Fredkin gate.

    Science.gov (United States)

    Patel, Raj B; Ho, Joseph; Ferreyrol, Franck; Ralph, Timothy C; Pryde, Geoff J

    2016-03-01

    Minimizing the resources required to build logic gates into useful processing circuits is key to realizing quantum computers. Although the salient features of a quantum computer have been shown in proof-of-principle experiments, difficulties in scaling quantum systems have made more complex operations intractable. This is exemplified in the classical Fredkin (controlled-SWAP) gate for which, despite theoretical proposals, no quantum analog has been realized. By adding control to the SWAP unitary, we use photonic qubit logic to demonstrate the first quantum Fredkin gate, which promises many applications in quantum information and measurement. We implement example algorithms and generate the highest-fidelity three-photon Greenberger-Horne-Zeilinger states to date. The technique we use allows one to add a control operation to a black-box unitary, something that is impossible in the standard circuit model. Our experiment represents the first use of this technique to control a two-qubit operation and paves the way for larger controlled circuits to be realized efficiently.

  4. Manufacture and evaluation of integrated metal-oxide electrode prototype for corrosion monitoring in high temperature water

    International Nuclear Information System (INIS)

    Hashimoto, Yoshinori; Tani, Jun-ichi

    2014-01-01

    We have developed an integrated metal-oxide (M/O) electrode based on an yttria-stabilized-zirconia-(YSZ)-membrane M/O electrode, which was used as a reference electrode for corrosion monitoring in high temperature water. The YSZ-membrane M/O electrode can operate at high temperatures because of the conductivity of YSZ membrane tube. We cannot utilize it for long term monitoring at a wide range of temperatures. It also has a braze juncture between the YSZ membrane and metal tubes, which may corrode in high-temperature water. This corrosion should be prevented to improve the performance of the M/O electrode. An integrated M/O electrode was developed (i.e., integrated metal-oxide electrode, IMOE) to eliminate the braze juncture and increase the conductivity of YSZ. These issues should be overcome to improve the performance of M/O electrode. So we have developed two type of IMOE prototype with sputter - deposition or thermal oxidation. In this paper we will present and discuss the performance of our IMOEs in buffer solution at room temperature. (author)

  5. Comparison of gate dielectric plasma damage from plasma-enhanced atomic layer deposited and magnetron sputtered TiN metal gates

    Energy Technology Data Exchange (ETDEWEB)

    Brennan, Christopher J.; Neumann, Christopher M.; Vitale, Steven A., E-mail: steven.vitale@ll.mit.edu [Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02420 (United States)

    2015-07-28

    Fully depleted silicon-on-insulator transistors were fabricated using two different metal gate deposition mechanisms to compare plasma damage effects on gate oxide quality. Devices fabricated with both plasma-enhanced atomic-layer-deposited (PE-ALD) TiN gates and magnetron plasma sputtered TiN gates showed very good electrostatics and short-channel characteristics. However, the gate oxide quality was markedly better for PE-ALD TiN. A significant reduction in interface state density was inferred from capacitance-voltage measurements as well as a 1200× reduction in gate leakage current. A high-power magnetron plasma source produces a much higher energetic ion and vacuum ultra-violet (VUV) photon flux to the wafer compared to a low-power inductively coupled PE-ALD source. The ion and VUV photons produce defect states in the bulk of the gate oxide as well as at the oxide-silicon interface, causing higher leakage and potential reliability degradation.

  6. Online junction temperature measurement via internal gate resistance during turn-on

    DEFF Research Database (Denmark)

    Baker, Nick; Munk-Nielsen, Stig; Liserre, Marco

    2014-01-01

    A new method for junction temperature measurement of power semiconductor switches is presented. The measurement exploits the temperature dependent resistance of the temperature sensitive electrical parameter (TSEP): the internal gate resistance. This dependence can be observed during the normal...... switching transitions of an IGBT or MOSFET, and as a result the presented method uses the integral of the gate voltage during the turn-on delay. A measurement circuit can be integrated into a gate driver with no modification to converter or gate driver operation and holds significant advantages over other...

  7. Multiple Independent Gate FETs: How Many Gates Do We Need?

    OpenAIRE

    Amarù, Luca; Hills, Gage; Gaillardon, Pierre-Emmanuel; Mitra, Subhasish; De Micheli, Giovanni

    2015-01-01

    Multiple Independent Gate Field Effect Transistors (MIGFETs) are expected to push FET technology further into the semiconductor roadmap. In a MIGFET, supplementary gates either provide (i) enhanced conduction properties or (ii) more intelligent switching functions. In general, each additional gate also introduces a side implementation cost. To enable more efficient digital systems, MIGFETs must leverage their expressive power to realize complex logic circuits with few physical resources. Rese...

  8. Characteristics of an integrated cathode assembly for the electrolytic reduction of uranium oxide in a LiCl-Li2O molten salt

    International Nuclear Information System (INIS)

    Sung Bin Park; Byung Heung Park; Sang Mun Jeong; Jin Mok Hur; Chung Seok Seo; Seong Won Park; Seung-Hoon Choi

    2006-01-01

    Electrochemical behavior of the reduction of uranium oxide was studied in a LiCl-Li 2 O molten salt system with an integrated cathode assembly. The mechanism for the electrolytic reduction of uranium oxide was studied through cyclic voltammetry. By means of a chronopotentiometry, the effects of the thickness of the uranium oxide, the thickness of the MgO membrane and the material of the conductor of an integrated cathode assembly on the overpotential of the cathode were investigated. From the voltamograms, the reduction potential of the uranium oxide and Li 2 O was obtained and the two mechanisms of the electrolytic reduction were considered with regard to the applied cathode potential. From the chronopotentiograms, the exchange current, the transfer coefficient and the maximum allowable current based on the Tafel behavior were obtained with regard to the thickness of the uranium oxide, and of the MgO membrane and the material of the conductor of an integrated cathode assembly. (author)

  9. Creativity and sensory gating indexed by the P50: selective versus leaky sensory gating in divergent thinkers and creative achievers.

    Science.gov (United States)

    Zabelina, Darya L; O'Leary, Daniel; Pornpattananangkul, Narun; Nusslock, Robin; Beeman, Mark

    2015-03-01

    Creativity has previously been linked with atypical attention, but it is not clear what aspects of attention, or what types of creativity are associated. Here we investigated specific neural markers of a very early form of attention, namely sensory gating, indexed by the P50 ERP, and how it relates to two measures of creativity: divergent thinking and real-world creative achievement. Data from 84 participants revealed that divergent thinking (assessed with the Torrance Test of Creative Thinking) was associated with selective sensory gating, whereas real-world creative achievement was associated with "leaky" sensory gating, both in zero-order correlations and when controlling for academic test scores in a regression. Thus both creativity measures related to sensory gating, but in opposite directions. Additionally, divergent thinking and real-world creative achievement did not interact in predicting P50 sensory gating, suggesting that these two creativity measures orthogonally relate to P50 sensory gating. Finally, the ERP effect was specific to the P50 - neither divergent thinking nor creative achievement were related to later components, such as the N100 and P200. Overall results suggest that leaky sensory gating may help people integrate ideas that are outside of focus of attention, leading to creativity in the real world; whereas divergent thinking, measured by divergent thinking tests which emphasize numerous responses within a limited time, may require selective sensory processing more than previously thought. Copyright © 2015 Elsevier Ltd. All rights reserved.

  10. Rapid Thermal Chemical Vapor Deposition for Dual-Gated Sub-100 nm MOSFET's

    National Research Council Canada - National Science Library

    Sturm, James

    2001-01-01

    .... The scaling of vertical p-channel MOSFET's with the source and drain doped with boron during low temperature epitaxy is limited by the diffusion of boron during subsequent side wall gate oxidation...

  11. Expert Oracle GoldenGate

    CERN Document Server

    Prusinski, Ben; Chung, Richard

    2011-01-01

    Expert Oracle GoldenGate is a hands-on guide to creating and managing complex data replication environments using the latest in database replication technology from Oracle. GoldenGate is the future in replication technology from Oracle, and aims to be best-of-breed. GoldenGate supports homogeneous replication between Oracle databases. It supports heterogeneous replication involving other brands such as Microsoft SQL Server and IBM DB2 Universal Server. GoldenGate is high-speed, bidirectional, highly-parallelized, and makes only a light impact on the performance of databases involved in replica

  12. Analyzing the effect of gate dielectric on the leakage currents

    Directory of Open Access Journals (Sweden)

    Sakshi

    2016-01-01

    Full Text Available An analytical threshold voltage model for MOSFETs has been developed using different gate dielectric oxides by using MATLAB software. This paper explains the dependency of threshold voltage on the dielectric material. The variation in the subthreshold currents with the change in the threshold voltage sue to the change of dielectric material has also been studied.

  13. Dynamic load effects on gate valve operability

    International Nuclear Information System (INIS)

    Steele, R. Jr.; MacDonald, P.E.; Arendts, J.G.

    1986-01-01

    The Idaho National Engineering Laboratory (INEL) participated in an internationally sponsored seismic research program conducted at the decommissioned Heissdampfreaktor (HDR) located in the Federal Republic of Germany. An existing piping system was modified by installation of an 8-in., naturally aged, motor-operated gate valve from a US nuclear power plant and a piping support system of US design. Six other piping support systems of varying flexibility from stiff to flexible were also installed at various times during the tests. Additional valve loadings included internal hydraulic loads and, during one block of tests, elevated temperature. The operability and integrity of the aged gate valve and the dynamic response of the various piping support system were measured during 25 representative seismic events

  14. Water-gel for gating graphene transistors.

    Science.gov (United States)

    Kim, Beom Joon; Um, Soong Ho; Song, Woo Chul; Kim, Yong Ho; Kang, Moon Sung; Cho, Jeong Ho

    2014-05-14

    Water, the primary electrolyte in biology, attracts significant interest as an electrolyte-type dielectric material for transistors compatible with biological systems. Unfortunately, the fluidic nature and low ionic conductivity of water prevents its practical usage in such applications. Here, we describe the development of a solid state, megahertz-operating, water-based gate dielectric system for operating graphene transistors. The new electrolyte systems were prepared by dissolving metal-substituted DNA polyelectrolytes into water. The addition of these biocompatible polyelectrolytes induced hydrogelation to provide solid-state integrity to the system. They also enhanced the ionic conductivities of the electrolytes, which in turn led to the quick formation of an electric double layer at the graphene/electrolyte interface that is beneficial for modulating currents in graphene transistors at high frequencies. At the optimized conditions, the Na-DNA water-gel-gated flexible transistors and inverters were operated at frequencies above 1 MHz and 100 kHz, respectively.

  15. SWNT array resonant gate MOS transistor

    Energy Technology Data Exchange (ETDEWEB)

    Arun, A; Salet, P; Ionescu, A M [NanoLab, Ecole Polytechnique Federale de Lausanne, CH-1015, Lausanne (Switzerland); Campidelli, S; Filoramo, A; Derycke, V; Goffman, M F, E-mail: marcelo.goffman@cea.fr [Laboratoire d' Electronique Moleculaire, SPEC (CNRS URA 2454), IRAMIS, CEA, Gif-sur-Yvette (France)

    2011-02-04

    We show that thin horizontal arrays of single wall carbon nanotubes (SWNTs) suspended above the channel of silicon MOSFETs can be used as vibrating gate electrodes. This new class of nano-electromechanical system (NEMS) combines the unique mechanical and electronic properties of SWNTs with an integrated silicon-based motion detection. Its electrical response exhibits a clear signature of the mechanical resonance of SWNT arrays (120-150 MHz) showing that these thin horizontal arrays behave as a cohesive, rigid and elastic body membrane with a Young's modulus in the order of 1-10 GPa and ultra-low mass. The resonant frequency can be tuned by the gate voltage and its dependence is well understood within the continuum mechanics framework.

  16. SWNT array resonant gate MOS transistor.

    Science.gov (United States)

    Arun, A; Campidelli, S; Filoramo, A; Derycke, V; Salet, P; Ionescu, A M; Goffman, M F

    2011-02-04

    We show that thin horizontal arrays of single wall carbon nanotubes (SWNTs) suspended above the channel of silicon MOSFETs can be used as vibrating gate electrodes. This new class of nano-electromechanical system (NEMS) combines the unique mechanical and electronic properties of SWNTs with an integrated silicon-based motion detection. Its electrical response exhibits a clear signature of the mechanical resonance of SWNT arrays (120-150 MHz) showing that these thin horizontal arrays behave as a cohesive, rigid and elastic body membrane with a Young's modulus in the order of 1-10 GPa and ultra-low mass. The resonant frequency can be tuned by the gate voltage and its dependence is well understood within the continuum mechanics framework.

  17. SWNT array resonant gate MOS transistor

    International Nuclear Information System (INIS)

    Arun, A; Salet, P; Ionescu, A M; Campidelli, S; Filoramo, A; Derycke, V; Goffman, M F

    2011-01-01

    We show that thin horizontal arrays of single wall carbon nanotubes (SWNTs) suspended above the channel of silicon MOSFETs can be used as vibrating gate electrodes. This new class of nano-electromechanical system (NEMS) combines the unique mechanical and electronic properties of SWNTs with an integrated silicon-based motion detection. Its electrical response exhibits a clear signature of the mechanical resonance of SWNT arrays (120-150 MHz) showing that these thin horizontal arrays behave as a cohesive, rigid and elastic body membrane with a Young's modulus in the order of 1-10 GPa and ultra-low mass. The resonant frequency can be tuned by the gate voltage and its dependence is well understood within the continuum mechanics framework.

  18. Silicon photonic crystal all-optical logic gates

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Yulan [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China); Hu, Xiaoyong, E-mail: xiaoyonghu@pku.edu.cn [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China); Gong, Qihuang, E-mail: qhgong@pku.edu.cn [State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871 (China)

    2013-01-03

    All-optical logic gates, including OR, XOR, NOT, XNOR, and NAND gates, are realized theoretically in a two-dimensional silicon photonic crystal using the light beam interference effect. The ingenious photonic crystal waveguide component design, the precisely controlled optical path difference, and the elaborate device configuration ensure the simultaneous realization of five types of logic gate with low-power and a contrast ratio between the logic states of “1” and “0” as high as 20 dB. High power is not necessary for operation of these logic gate devices. This offers a simple and effective approach for the realization of integrated all-optical logic devices.

  19. Integrated Ternary Bioinspired Nanocomposites via Synergistic Toughening of Reduced Graphene Oxide and Double-Walled Carbon Nanotubes.

    Science.gov (United States)

    Gong, Shanshan; Cui, Wei; Zhang, Qi; Cao, Anyuan; Jiang, Lei; Cheng, Qunfeng

    2015-12-22

    With its synergistic toughening effect and hierarchical micro/nanoscale structure, natural nacre sets a "gold standard" for nacre-inspired materials with integrated high strength and toughness. We demonstrated strong and tough ternary bioinspired nanocomposites through synergistic toughening of reduced graphene oxide and double-walled carbon nanotube (DWNT) and covalent bonding. The tensile strength and toughness of this kind of ternary bioinspired nanocomposites reaches 374.1 ± 22.8 MPa and 9.2 ± 0.8 MJ/m(3), which is 2.6 and 3.3 times that of pure reduced graphene oxide film, respectively. Furthermore, this ternary bioinspired nanocomposite has a high conductivity of 394.0 ± 6.8 S/cm and also shows excellent fatigue-resistant properties, which may enable this material to be used in aerospace, flexible energy devices, and artificial muscle. The synergistic building blocks with covalent bonding for constructing ternary bioinspired nanocomposites can serve as the basis of a strategy for the construction of integrated, high-performance, reduced graphene oxide (rGO)-based nanocomposites in the future.

  20. Low-voltage back-gated atmospheric pressure chemical vapor deposition based graphene-striped channel transistor with high-κ dielectric showing room-temperature mobility > 11 000 cm2/V·s

    KAUST Repository

    Smith, Casey

    2013-07-23

    Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (gm) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-κ gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 μm stripes to repeatedly realize room-temperature mobility of 11 000 cm 2/V·s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low t ox/Wgraphene ratio, and scaled high-κ dielectric gate modulation of carrier density allowing full actuation of the device with only ±1 V applied bias. The superior drive current and conductance at Vdd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance. © 2013 American Chemical Society.

  1. Low-voltage back-gated atmospheric pressure chemical vapor deposition based graphene-striped channel transistor with high-κ dielectric showing room-temperature mobility > 11 000 cm2/V·s

    KAUST Repository

    Smith, Casey; Qaisi, Ramy M.; Liu, Zhihong; Yu, Qingkai; Hussain, Muhammad Mustafa

    2013-01-01

    Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (gm) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-κ gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 μm stripes to repeatedly realize room-temperature mobility of 11 000 cm 2/V·s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low t ox/Wgraphene ratio, and scaled high-κ dielectric gate modulation of carrier density allowing full actuation of the device with only ±1 V applied bias. The superior drive current and conductance at Vdd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance. © 2013 American Chemical Society.

  2. Mechanisms for plasma etching of HfO{sub 2} gate stacks with Si selectivity and photoresist trimming

    Energy Technology Data Exchange (ETDEWEB)

    Shoeb, Juline; Kushner, Mark J. [Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa 50011 (United States); Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109-2122 (United States)

    2009-11-15

    To minimize leakage currents resulting from the thinning of the insulator in the gate stack of field effect transistors, high-dielectric constant (high-k) metal oxides, and HfO{sub 2} in particular, are being implemented as a replacement for SiO{sub 2}. To speed the rate of processing, it is desirable to etch the gate stack (e.g., metal gate, antireflection layers, and dielectric) in a single process while having selectivity to the underlying Si. Plasma etching using Ar/BCl{sub 3}/Cl{sub 2} mixtures effectively etches HfO{sub 2} while having good selectivity to Si. In this article, results from integrated reactor and feature scale modeling of gate-stack etching in Ar/BCl{sub 3}/Cl{sub 2} plasmas, preceded by photoresist trimming in Ar/O{sub 2} plasmas, are discussed. It was found that BCl{sub n} species react with HfO{sub 2}, which under ion impact, form volatile etch products such as B{sub m}OCl{sub n} and HfCl{sub n}. Selectivity to Si is achieved by creating Si-B bonding as a precursor to the deposition of a BCl{sub n} polymer which slows the etch rate relative to HfO{sub 2}. The low ion energies required to achieve this selectivity then challenge one to obtain highly anisotropic profiles in the metal gate portion of the stack. Validation was performed with data from literature. The effect of bias voltage and key reactant probabilities on etch rate, selectivity, and profile are discussed.

  3. Protective role of integrin-linked kinase against oxidative stress and in maintenance of genomic integrity.

    Science.gov (United States)

    Im, Michelle; Dagnino, Lina

    2018-03-02

    The balance between the production of reactive oxygen species and activation of antioxidant pathways is essential to maintain a normal redox state in all tissues. Oxidative stress caused by excessive oxidant species generation can cause damage to DNA and other macromolecules, affecting cell function and viability. Here we show that integrin-linked kinase (ILK) plays a key role in eliciting a protective response to oxidative damage in epidermal cells. Inactivation of the Ilk gene causes elevated levels of intracellular oxidant species (IOS) and DNA damage in the absence of exogenous oxidative insults. In ILK-deficient cells, excessive IOS production can be prevented through inhibition of NADPH oxidase activity, with a concomitant reduction in DNA damage. Additionally, ILK is necessary for DNA repair processes following UVB-induced damage, as ILK-deficient cells show a significantly impaired ability to remove cyclobutane pyrimidine dimers following irradiation. Thus, ILK is essential to maintain cellular redox balance and, in its absence, epidermal cells become more susceptible to oxidative damage through mechanisms that involve IOS production by NADPH oxidase activity.

  4. A novel optical gating method for laser gated imaging

    Science.gov (United States)

    Ginat, Ran; Schneider, Ron; Zohar, Eyal; Nesher, Ofer

    2013-06-01

    For the past 15 years, Elbit Systems is developing time-resolved active laser-gated imaging (LGI) systems for various applications. Traditional LGI systems are based on high sensitive gated sensors, synchronized to pulsed laser sources. Elbit propriety multi-pulse per frame method, which is being implemented in LGI systems, improves significantly the imaging quality. A significant characteristic of the LGI is its ability to penetrate a disturbing media, such as rain, haze and some fog types. Current LGI systems are based on image intensifier (II) sensors, limiting the system in spectral response, image quality, reliability and cost. A novel propriety optical gating module was developed in Elbit, untying the dependency of LGI system on II. The optical gating module is not bounded to the radiance wavelength and positioned between the system optics and the sensor. This optical gating method supports the use of conventional solid state sensors. By selecting the appropriate solid state sensor, the new LGI systems can operate at any desired wavelength. In this paper we present the new gating method characteristics, performance and its advantages over the II gating method. The use of the gated imaging systems is described in a variety of applications, including results from latest field experiments.

  5. Experimental analysis of flow of ductile cast iron in stream lined gating systems

    DEFF Research Database (Denmark)

    Skov-Hansen, Søren Peter; Tiedje, Niels Skat

    2008-01-01

    Streamlined gating systems have been developed for production of high integrity ductile cast iron parts. Flow of ductile cast iron in streamlined gating systems was studied in glass fronted sand moulds where flow in the gating system and casting was recorded by a digital video camera. These results...... show how the quality of pouring, design of ingates, design of bends and flow over cores influence melt flow and act to determine the quality of the castings....

  6. Nanogranular SiO{sub 2} proton gated silicon layer transistor mimicking biological synapses

    Energy Technology Data Exchange (ETDEWEB)

    Liu, M. J.; Huang, G. S., E-mail: gshuang@fudan.edu.cn, E-mail: pfeng@nju.edu.cn; Guo, Q. L.; Tian, Z. A.; Li, G. J.; Mei, Y. F. [Department of Materials Science, Fudan University, Shanghai 200433 (China); Feng, P., E-mail: gshuang@fudan.edu.cn, E-mail: pfeng@nju.edu.cn; Shao, F.; Wan, Q. [School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China)

    2016-06-20

    Silicon on insulator (SOI)-based transistors gated by nanogranular SiO{sub 2} proton conducting electrolytes were fabricated to mimic synapse behaviors. This SOI-based device has both top proton gate and bottom buried oxide gate. Electrical transfer properties of top proton gate show hysteresis curves different from those of bottom gate, and therefore, excitatory post-synaptic current and paired pulse facilitation (PPF) behavior of biological synapses are mimicked. Moreover, we noticed that PPF index can be effectively tuned by the spike interval applied on the top proton gate. Synaptic behaviors and functions, like short-term memory, and its properties are also experimentally demonstrated in our device. Such SOI-based electronic synapses are promising for building neuromorphic systems.

  7. A newly identified essential complex, Dre2-Tah18, controls mitochondria integrity and cell death after oxidative stress in yeast.

    Directory of Open Access Journals (Sweden)

    Laurence Vernis

    Full Text Available A mutated allele of the essential gene TAH18 was previously identified in our laboratory in a genetic screen for new proteins interacting with the DNA polymerase delta in yeast [1]. The present work shows that Tah18 plays a role in response to oxidative stress. After exposure to lethal doses of H(2O(2, GFP-Tah18 relocalizes to the mitochondria and controls mitochondria integrity and cell death. Dre2, an essential Fe/S cluster protein and homologue of human anti-apoptotic Ciapin1, was identified as a molecular partner of Tah18 in the absence of stress. Moreover, Ciapin1 is able to replace yeast Dre2 in vivo and physically interacts with Tah18. Our results are in favour of an oxidative stress-induced cell death in yeast that involves mitochondria and is controlled by the newly identified Dre2-Tah18 complex.

  8. Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing in Aerospace Applications

    Science.gov (United States)

    VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.; Hunter, Gary W.; Xu, Jennifer C.; Evans, Laura J.

    2009-01-01

    A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H2, are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine an activation energy for the catalyst-assisted systems.

  9. Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

    Science.gov (United States)

    Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

    2011-02-22

    Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

  10. Dynamic model of a micro-tubular solid oxide fuel cell stack including an integrated cooling system

    Science.gov (United States)

    Hering, Martin; Brouwer, Jacob; Winkler, Wolfgang

    2017-02-01

    A novel dynamic micro-tubular solid oxide fuel cell (MT-SOFC) and stack model including an integrated cooling system is developed using a quasi three-dimensional, spatially resolved, transient thermodynamic, physical and electrochemical model that accounts for the complex geometrical relations between the cells and cooling-tubes. The modeling approach includes a simplified tubular geometry and stack design including an integrated cooling structure, detailed pressure drop and gas property calculations, the electrical and physical constraints of the stack design that determine the current, as well as control strategies for the temperature. Moreover, an advanced heat transfer balance with detailed radiative heat transfer between the cells and the integrated cooling-tubes, convective heat transfer between the gas flows and the surrounding structures and conductive heat transfer between the solid structures inside of the stack, is included. The detailed model can be used as a design basis for the novel MT-SOFC stack assembly including an integrated cooling system, as well as for the development of a dynamic system control strategy. The evaluated best-case design achieves very high electrical efficiency between around 75 and 55% in the entire power density range between 50 and 550 mW /cm2 due to the novel stack design comprising an integrated cooling structure.

  11. Simulation of dual-gate SOI MOSFET with different dielectric layers

    Science.gov (United States)

    Yadav, Jyoti; Chaudhary, R.; Mukhiya, R.; Sharma, R.; Khanna, V. K.

    2016-04-01

    The paper presents the process design and simulation of silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG-MOSFET) stacked with different dielectric layers on the top of gate oxide. A detailed 2D process simulation of SOI-MOSFETs and its electrical characterization has been done using SILVACO® TCAD tool. A variation in transconductance was observed with different dielectric layers, AlN-gate MOSFET having the highest tranconductance value as compared to other three dielectric layers (SiO2, Si3N4 and Al2O3).

  12. Penn State DOE GATE Program

    Energy Technology Data Exchange (ETDEWEB)

    Anstrom, Joel

    2012-08-31

    The Graduate Automotive Technology Education (GATE) Program at The Pennsylvania State University (Penn State) was established in October 1998 pursuant to an award from the U.S. Department of Energy (U.S. DOE). The focus area of the Penn State GATE Program is advanced energy storage systems for electric and hybrid vehicles.

  13. Piezoconductivity of gated suspended graphene

    NARCIS (Netherlands)

    Medvedyeva, M.V.; Blanter, Y.M.

    2011-01-01

    We investigate the conductivity of graphene sheet deformed over a gate. The effect of the deformation on the conductivity is twofold: The lattice distortion can be represented as pseudovector potential in the Dirac equation formalism, whereas the gate causes inhomogeneous density redistribution. We

  14. GATE: Improving the computational efficiency

    International Nuclear Information System (INIS)

    Staelens, S.; De Beenhouwer, J.; Kruecker, D.; Maigne, L.; Rannou, F.; Ferrer, L.; D'Asseler, Y.; Buvat, I.; Lemahieu, I.

    2006-01-01

    GATE is a software dedicated to Monte Carlo simulations in Single Photon Emission Computed Tomography (SPECT) and Positron Emission Tomography (PET). An important disadvantage of those simulations is the fundamental burden of computation time. This manuscript describes three different techniques in order to improve the efficiency of those simulations. Firstly, the implementation of variance reduction techniques (VRTs), more specifically the incorporation of geometrical importance sampling, is discussed. After this, the newly designed cluster version of the GATE software is described. The experiments have shown that GATE simulations scale very well on a cluster of homogeneous computers. Finally, an elaboration on the deployment of GATE on the Enabling Grids for E-Science in Europe (EGEE) grid will conclude the description of efficiency enhancement efforts. The three aforementioned methods improve the efficiency of GATE to a large extent and make realistic patient-specific overnight Monte Carlo simulations achievable

  15. Thermodynamic Analysis of an Integrated Solid Oxide Fuel Cell Cycle with a Rankine Cycle

    DEFF Research Database (Denmark)

    Rokni, Masoud

    2010-01-01

    Hybrid systems consisting of Solid Oxide Fuel Cells (SOFC) on the top of a Steam Turbine (ST) are investigated. The plants are fired by natural gas (NG). A desulfurization reactor removes the sulfur content in the fuel while a pre-reformer breaks down the heavier hydrocarbons. The pre-treated fuel......% are achieved which is considerably higher than the conventional Combined Cycles (CC). Both ASR (Adiabatic Steam Reformer) and CPO (Catalytic Partial Oxidation) fuel pre-reformer reactors are considered in this investigation....

  16. Gated equilibrium bloodpool scintigraphy

    International Nuclear Information System (INIS)

    Reinders Folmer, S.C.C.

    1981-01-01

    This thesis deals with the clinical applications of gated equilibrium bloodpool scintigraphy, performed with either a gamma camera or a portable detector system, the nuclear stethoscope. The main goal has been to define the value and limitations of noninvasive measurements of left ventricular ejection fraction as a parameter of cardiac performance in various disease states, both for diagnostic purposes as well as during follow-up after medical or surgical intervention. Secondly, it was attempted to extend the use of the equilibrium bloodpool techniques beyond the calculation of ejection fraction alone by considering the feasibility to determine ventricular volumes and by including the possibility of quantifying valvular regurgitation. In both cases, it has been tried to broaden the perspective of the observations by comparing them with results of other, invasive and non-invasive, procedures, in particular cardiac catheterization, M-mode echocardiography and myocardial perfusion scintigraphy. (Auth.)

  17. Integrated iron(II) oxidation and limestone neutralisation of acid mine water

    CSIR Research Space (South Africa)

    Maree, JP

    1999-01-01

    Full Text Available dependent on the surface area exposed to the liquid (RSA) and the OH-, oxygen, CaCO3, suspended solids and iron (II) concentrations, and less dependent on specific surface area (SSA) and pressure in the pH range 5 to 6, The chemical oxidation rate (p...

  18. Biomass-powered Solid Oxide Fuel Cells : Experimental and Modeling Studies for System Integrations

    NARCIS (Netherlands)

    Liu, M.

    2013-01-01

    Biomass is a sustainable energy source which, through thermo-chemical processes of biomass gasification, is able to be converted from a solid biomass fuel into a gas mixture, known as syngas or biosyngas. A solid oxide fuel cell (SOFC) is a power generation device that directly converts the chemical

  19. Integrity of 111In-radiolabeled superparamagnetic iron oxide nanoparticles in the mouse

    International Nuclear Information System (INIS)

    Wang, Haotian; Kumar, Rajiv; Nagesha, Dattatri; Duclos, Richard I.; Sridhar, Srinivas; Gatley, Samuel J.

    2015-01-01

    Introduction: Iron-oxide nanoparticles can act as contrast agents in magnetic resonance imaging (MRI), while radiolabeling the same platform with nuclear medicine isotopes allows imaging with positron emission tomography (PET) or single-photon emission computed tomography (SPECT), modalities that offer better quantification. For successful translation of these multifunctional imaging platforms to clinical use, it is imperative to evaluate the degree to which the association between radioactive label and iron oxide core remains intact in vivo. Methods: We prepared iron oxide nanoparticles stabilized by oleic acid and phospholipids which were further radiolabeled with 59 Fe, 14 C-oleic acid, and 111 In. Results: Mouse biodistributions showed 111 In preferentially localized in reticuloendothelial organs, liver, spleen and bone. However, there were greater levels of 59 Fe than 111 In in liver and spleen, but lower levels of 14 C. Conclusions: While there is some degree of dissociation between the 111 In labeled component of the nanoparticle and the iron oxide core, there is extensive dissociation of the oleic acid component

  20. Efficient controlled-phase gate for single-spin qubits in quantum dots

    NARCIS (Netherlands)

    Meunier, T.; Calado, V.E.; Vandersypen, L.M.K.

    2011-01-01

    Two-qubit interactions are at the heart of quantum information processing. For single-spin qubits in semiconductor quantum dots, the exchange gate has always been considered the natural two-qubit gate. The recent integration of a magnetic field or g-factor gradients in coupled quantum dot systems

  1. Local gate control in carbon nanotube quantum devices

    Science.gov (United States)

    Biercuk, Michael Jordan

    This thesis presents transport measurements of carbon nanotube electronic devices operated in the quantum regime. Nanotubes are contacted by source and drain electrodes, and multiple lithographically-patterned electrostatic gates are aligned to each device. Transport measurements of device conductance or current as a function of local gate voltages reveal that local gates couple primarily to the proximal section of the nanotube, hence providing spatially localized control over carrier density along the nanotube length. Further, using several different techniques we are able to produce local depletion regions along the length of a tube. This phenomenon is explored in detail for different contact metals to the nanotube. We utilize local gating techniques to study multiple quantum dots in carbon nanotubes produced both by naturally occurring defects, and by the controlled application of voltages to depletion gates. We study double quantum dots in detail, where transport measurements reveal honeycomb charge stability diagrams. We extract values of energy-level spacings, capacitances, and interaction energies for this system, and demonstrate independent control over all relevant tunneling rates. We report rf-reflectometry measurements of gate-defined carbon nanotube quantum dots with integrated charge sensors. Aluminum rf-SETs are electrostatically coupled to carbon nanotube devices and detect single electron charging phenomena in the Coulomb blockade regime. Simultaneous correlated measurements of single electron charging are made using reflected rf power from the nanotube itself and from the rf-SET on microsecond time scales. We map charge stability diagrams for the nanotube quantum dot via charge sensing, observing Coulomb charging diamonds beyond the first order. Conductance measurements of carbon nanotubes containing gated local depletion regions exhibit plateaus as a function of gate voltage, spaced by approximately 1e2/h, the quantum of conductance for a single

  2. Integration of atomic layer deposition CeO2 thin films with functional complex oxides and 3D patterns

    International Nuclear Information System (INIS)

    Coll, M.; Palau, A.; Gonzalez-Rosillo, J.C.; Gazquez, J.; Obradors, X.; Puig, T.

    2014-01-01

    We present a low-temperature, < 300 °C, ex-situ integration of atomic layer deposition (ALD) ultrathin CeO 2 layers (3 to 5 unit cells) with chemical solution deposited La 0.7 Sr 0.3 MnO 3 (LSMO) functional complex oxides for multilayer growth without jeopardizing the morphology, microstructure and physical properties of the functional oxide layer. We have also extended this procedure to pulsed laser deposited YBa 2 Cu 3 O 7 (YBCO) thin films. Scanning force microscopy, X-ray diffraction, aberration corrected scanning transmission electron microscopy and macroscopic magnetic measurements were used to evaluate the quality of the perovskite films before and after the ALD process. By means of microcontact printing and ALD we have prepared CeO 2 patterns using an ozone-robust photoresist that will avoid the use of hazardous lithography processes directly on the device components. These bilayers, CeO 2 /LSMO and CeO 2 /YBCO, are foreseen to have special interest for resistive switching phenomena in resistive random-access memory. - Highlights: • Integration of atomic layer deposition (ALD) CeO 2 layers on functional complex oxides • Resistive switching is identified in CeO 2 /La 0.7 Sr 0.3 MnO 3 and CeO 2 /YBa 2 Cu 3 O 7 bilayers. • Study of the robustness of organic polymers for area-selective ALD • Combination of ALD and micro-contact printing to obtain 3D patterns of CeO 2

  3. Integration

    DEFF Research Database (Denmark)

    Emerek, Ruth

    2004-01-01

    Bidraget diskuterer de forskellige intergrationsopfattelse i Danmark - og hvad der kan forstås ved vellykket integration......Bidraget diskuterer de forskellige intergrationsopfattelse i Danmark - og hvad der kan forstås ved vellykket integration...

  4. Thermodynamic analysis of an integrated solid oxide fuel cell cycle with a rankine cycle

    International Nuclear Information System (INIS)

    Rokni, Masoud

    2010-01-01

    Hybrid systems consisting of solid oxide fuel cells (SOFC) on the top of a steam turbine (ST) are investigated. The plants are fired by natural gas (NG). A desulfurization reactor removes the sulfur content in the fuel while a pre-reformer breaks down the heavier hydro-carbons. The pre-treated fuel enters then into the anode side of the SOFC. The remaining fuels after the SOFC stacks enter a burner for further burning. The off-gases are then used to produce steam for a Rankine cycle in a heat recovery steam generator (HRSG). Different system setups are suggested. Cyclic efficiencies up to 67% are achieved which is considerably higher than the conventional combined cycles (CC). Both adiabatic steam reformer (ASR) and catalytic partial oxidation (CPO) fuel pre-reformer reactors are considered in this investigation.

  5. Bio Organic-Semiconductor Field-Effect Transistor (BioFET) Based on Deoxyribonucleic Acid (DNA) Gate Dielectric

    Science.gov (United States)

    2010-03-31

    floating gate devices and metal-insulator-oxide-semiconductor (MIOS) devices. First attempts to use polarizable gate insulators in combination with...bulk of the semiconductor (ii) Due to the polarizable gate dielectric (iii) dipole polarization and (iv)electret effect due to mobile ions in the...characterization was carried out under an argon environment inside the glove box. An Agilent model E5273A with a two source-measurement unit instrument was

  6. Photon-gated spin transistor

    OpenAIRE

    Li, Fan; Song, Cheng; Cui, Bin; Peng, Jingjing; Gu, Youdi; Wang, Guangyue; Pan, Feng

    2017-01-01

    Spin-polarized field-effect transistor (spin-FET), where a dielectric layer is generally employed for the electrical gating as the traditional FET, stands out as a seminal spintronic device under the miniaturization trend of electronics. It would be fundamentally transformative if optical gating was used for spin-FET. We report a new type of spin-polarized field-effect transistor (spin-FET) with optical gating, which is fabricated by partial exposure of the (La,Sr)MnO3 channel to light-emitti...

  7. Interfacial microstructure of NiSi x/HfO2/SiO x/Si gate stacks

    International Nuclear Information System (INIS)

    Gribelyuk, M.A.; Cabral, C.; Gusev, E.P.; Narayanan, V.

    2007-01-01

    Integration of NiSi x based fully silicided metal gates with HfO 2 high-k gate dielectrics offers promise for further scaling of complementary metal-oxide- semiconductor devices. A combination of high resolution transmission electron microscopy and small probe electron energy loss spectroscopy (EELS) and energy dispersive X-ray analysis has been applied to study interfacial reactions in the undoped gate stack. NiSi was found to be polycrystalline with the grain size decreasing from top to bottom of NiSi x film. Ni content varies near the NiSi/HfO x interface whereby both Ni-rich and monosilicide phases were observed. Spatially non-uniform distribution of oxygen along NiSi x /HfO 2 interface was observed by dark field Scanning Transmission Electron Microscopy and EELS. Interfacial roughness of NiSi x /HfO x was found higher than that of poly-Si/HfO 2 , likely due to compositional non-uniformity of NiSi x . No intermixing between Hf, Ni and Si beyond interfacial roughness was observed

  8. Integrated bio-oxidation and adsorptive filtration reactor for removal of arsenic from wastewater.

    Science.gov (United States)

    Kamde, Kalyani; Dahake, Rashmi; Pandey, R A; Bansiwal, Amit

    2018-01-08

    Recently, removal of arsenic from different industrial effluent discharged using simple, efficient and low-cost technique has been widely considered. In this study, removal of arsenic (As) from real wastewater has been studied employing modified bio-oxidation followed by adsorptive filtration method in a novel continuous flow through the reactor. This method includes biological oxidation of ferrous to ferric ions by immobilized Acidothiobacillus ferrooxidans bacteria on granulated activated carbon (GAC) in fixed bed bio-column reactor with the adsorptive filtration unit. Removal efficiency was optimized regarding the initial flow rate of media and ferrous ions concentration. Synthetic wastewater sample having different heavy metal ions such as Arsenic (As), Cobalt (Co), Chromium (Cr), Copper (Cu), Iron (Fe), Lead (Pb) and Manganese (Mn) were also used in the study. The structural and surface changes occurring after the treatment process were scrutinized using FT-IR and Scanning Electron Microscopy (SEM) analysis. The finding showed that not only arsenic can be removed considerably in the bioreactor system, but also removing efficiency was much more (oxidation with adsorptive filtration method improves the removal efficiency of arsenic and other heavy metal ions in wastewater sample.

  9. The PEMFC-integrated CO oxidation — a novel method of simplifying the fuel cell plant

    Science.gov (United States)

    Rohland, Bernd; Plzak, Vojtech

    Natural gas and methanol are the most economical fuels for residential fuel cell power generators as well as for mobile PEM-fuel cells. However, they have to be reformed with steam into hydrogen, which is to be cleaned from CO by shift-reaction and by partial oxidation to a level of no more than 30 ppm CO. This level is set by the Pt/Ru-C-anode of the PEMFC. A higher partial oxidation reaction rate for CO than those of Pt/Ru-C can be achieved in an oxidic Au-catalyst system. In the Fe 2O 3-Au system, a reaction rate of 2·10 -3 mol CO/s g Au at 1000 ppm CO and 5% "air bleed" at 80°C is achieved. This high rate allows to construct a catalyst-sheet for each cell within a PEMFC-stack. Practical and theoretical current/voltage characteristics of PEMFCs with catalyst-sheet are presented at 1000 ppm CO in hydrogen with 5% "air bleed". This gives the possibility of simplifying the gas processor of the plant.

  10. Gas-phase advanced oxidation as an integrated air pollution control technique

    Directory of Open Access Journals (Sweden)

    Getachew A. Adnew

    2016-03-01

    Full Text Available Gas-phase advanced oxidation (GPAO is an emerging air cleaning technology based on the natural self-cleaning processes that occur in the Earth’s atmosphere. The technology uses ozone, UV-C lamps and water vapor to generate gas-phase hydroxyl radicals that initiate oxidation of a wide range of pollutants. In this study four types of GPAO systems are presented: a laboratory scale prototype, a shipping container prototype, a modular prototype, and commercial scale GPAO installations. The GPAO systems treat volatile organic compounds, reduced sulfur compounds, amines, ozone, nitrogen oxides, particles and odor. While the method covers a wide range of pollutants, effective treatment becomes difficult when temperature is outside the range of 0 to 80 °C, for anoxic gas streams and for pollution loads exceeding ca. 1000 ppm. Air residence time in the system and the rate of reaction of a given pollutant with hydroxyl radicals determine the removal efficiency of GPAO. For gas phase compounds and odors including VOCs (e.g. C6H6 and C3H8 and reduced sulfur compounds (e.g. H2S and CH3SH, removal efficiencies exceed 80%. The method is energy efficient relative to many established technologies and is applicable to pollutants emitted from diverse sources including food processing, foundries, water treatment, biofuel generation, and petrochemical industries.

  11. A novel sensing platform based on ionic liquid integrated carboxylic-functionalized graphene oxide nanosheets for honokiol determination

    International Nuclear Information System (INIS)

    Zhang, Shenghui; Chen, Xuemin; Liu, Guishen; Hou, Xiaodong; Huang, Yina; Chen, Jianpeng; Zhan, Guoqing; Li, Chunya

    2015-01-01

    Highlights: • Piperidinium based ionic liquid bearing pyrrole was synthesized. • Ionic liquid integrated graphene oxide nanocompisite was fabricated. • Polymerized ionic liquid-graphene oxide film electrode was prepared. • The film electrode exhibits high sensitivity towards honokiol and magnolol. • Stimulate determination of honokiol and magnolol was fulfilled. - Abstract: A novel ionic liquid, 4-hydroxy-1-methyl-[1-(3-pyrrolyl-propyl)]-piperidinium bromide, was synthesized and characterized. Carboxylic-functionalized graphene oxide nanosheets were modified with this ionic liquid to fabricate a nanocomposite which was denoted as GrO-COO-IL. Characterizations of FTIR, X-ray photoelectron spectroscopy, Raman spectroscopy and transmission electron microscopy confirmed the successful conjunction of these two components. GrO-COO-IL nanocomposites were homogeneously dispersed with utralpure water, and were then coated onto glassy carbon electrode surface. Followed by cyclic voltammetric scanning, a graphene oxide-polymerized ionic liquid film modified electrode (GrO-COO-Poly-IL/GCE) was prepared, and was studied with electrochemical impedance spectroscopy and scanning electron microscope. It was found that both honokiol and magnolol exhibit sensitive voltammetric response at the GrO-COO-Poly-IL/GCE. Simultaneous assay of honokiol and magnolol was realized with differential pulse voltametry. In the presence of magnolol, the oxidation peak current was linearly related to honokiol concentration in the range of 1.0 × 10 −8 ∼ 1.0 × 10 −5 mol L −1 with a detection limit of 1.53 × 10 −9 mol L −1 (S/N = 3). Meanwhile, in the presence of honokiol, a linear relationship between the oxidation peak current and magnolol concentration was found from 7.0 × 10 −8 to 1.0 × 10 −5 mol L −1 . The detection limit is calculated to be 8.27 × 10 −9 mol L −1 (S/N = 3). In addition, GrO-COO-Poly-IL/GCE was successfully used for determination of honokiol in

  12. Gate length variation effect on performance of gate-first self-aligned In₀.₅₃Ga₀.₄₇As MOSFET.

    Science.gov (United States)

    Mohd Razip Wee, Mohd F; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y

    2013-01-01

    A multi-gate n-type In₀.₅₃Ga₀.₄₇As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm(2)/Vs are achieved for the gate length and width of 0.2 µm and 30 µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10(-8) A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared.

  13. Gate Length Variation Effect on Performance of Gate-First Self-Aligned In0.53Ga0.47As MOSFET

    Science.gov (United States)

    Mohd Razip Wee, Mohd F.; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y.

    2013-01-01

    A multi-gate n-type In0.53Ga0.47As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm2/Vs are achieved for the gate length and width of 0.2 µm and 30µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10−8 A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared. PMID:24367548

  14. Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

    Science.gov (United States)

    Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

    2018-04-01

    We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

  15. Reversible logic gates on Physarum Polycephalum

    International Nuclear Information System (INIS)

    Schumann, Andrew

    2015-01-01

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum

  16. Demonstration of a Quantum Nondemolition Sum Gate

    DEFF Research Database (Denmark)

    Yoshikawa, J.; Miwa, Y.; Huck, Alexander

    2008-01-01

    The sum gate is the canonical two-mode gate for universal quantum computation based on continuous quantum variables. It represents the natural analogue to a qubit C-NOT gate. In addition, the continuous-variable gate describes a quantum nondemolition (QND) interaction between the quadrature...

  17. Aspect Ratio Model for Radiation-Tolerant Dummy Gate-Assisted n-MOSFET Layout.

    Science.gov (United States)

    Lee, Min Su; Lee, Hee Chul

    2014-01-01

    In order to acquire radiation-tolerant characteristics in integrated circuits, a dummy gate-assisted n-type metal oxide semiconductor field effect transistor (DGA n-MOSFET) layout was adopted. The DGA n-MOSFET has a different channel shape compared with the standard n-MOSFET. The standard n-MOSFET has a rectangular channel shape, whereas the DGA n-MOSFET has an extended rectangular shape at the edge of the source and drain, which affects its aspect ratio. In order to increase its practical use, a new aspect ratio model is proposed for the DGA n-MOSFET and this model is evaluated through three-dimensional simulations and measurements of the fabricated devices. The proposed aspect ratio model for the DGA n-MOSFET exhibits good agreement with the simulation and measurement results.

  18. Gated communities in South Africa: Tensions between the planning ...

    African Journals Online (AJOL)

    Gated communities are considered by many South Africans as a necessity – a place to stay in a safer environment in the context of high crime rates. At the same time, these developments can also challenge planning and development goals towards greater integration and accessibility. This article considers the views of ...

  19. Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

    Energy Technology Data Exchange (ETDEWEB)

    Liao, Po-Yung [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Taiwan (China); Hsieh, Tien-Yu [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo [Department of Photonics, National Sun Yat-Sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chou, Cheng-Hsu; Chang, Jung-Fang [Product Technology Center, Chimei Innolux Corp., Tainan 741, Taiwan (China)

    2016-03-31

    The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V{sub T}) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V{sub T} shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V{sub T} shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V{sub T} shift increases with decreasing frequency of the top gate pulses.

  20. Light-effect transistor (LET with multiple independent gating controls for optical logic gates and optical amplification

    Directory of Open Access Journals (Sweden)

    Jason eMarmon

    2016-03-01

    Full Text Available Modern electronics are developing electronic-optical integrated circuits, while their electronic backbone, e.g. field-effect transistors (FETs, remains the same. However, further FET down scaling is facing physical and technical challenges. A light-effect transistor (LET offers electronic-optical hybridization at the component level, which can continue Moore’s law to quantum region without requiring a FET’s fabrication complexity, e.g. physical gate and doping, by employing optical gating and photoconductivity. Multiple independent gates are therefore readily realized to achieve unique functionalities without increasing chip space. Here we report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs show output and transfer characteristics resembling advanced FETs, e.g. on/off ratios up to ~1.0x106 with a source-drain voltage of ~1.43 V, gate-power of ~260 nW, and subthreshold swing of ~0.3 nW/decade (excluding losses. Our work offers new electronic-optical integration strategies and electronic and optical computing approaches.

  1. Minority Carrier Tunneling and Stress-Induced Leakage Current for p+ gate MOS Capacitors with Poly-Si and PolySi0.7Ge0.3 Gate Material

    NARCIS (Netherlands)

    Houtsma, V.E.; Holleman, J.; Salm, Cora; de Haan, I.R.; Schmitz, Jurriaan; Widdershoven, F.P.; Widdershoven, F.P.; Woerlee, P.H.

    1999-01-01

    In this paper the I-V conduction mechanism for gate injection (-V g), Stress-Induced Leakage Current (SILC) characteristics and time-to-breakdown (tbd) of PMOS capacitors with p+-poly-Si and poly-SiGe gate material on 5.6, 4.8 and 3.1 nm oxide thickness are studied. A model based on Minority Carrier

  2. Resonance integral calculations for isolated rods containing oxides of 238U and 232Th

    International Nuclear Information System (INIS)

    Baker, V.C.; Marable, J.H.

    1980-02-01

    Results of resonance integral calculations for UO 2 and ThO 2 isolated rods are discussed. The calculations were performed with ENDF/B-IV cross-section data and the multigroup transport code ANISN. The findings reported demonstrate by comparison with semiempirical relationships (based on experimentally derived results) the suitability of the method used for determining resonance integrals. The calculations were based on a cylindrical rod in an H 2 O moderator of large radius. Multigroup cross sections were obtained by a MINX-SPHINX-AMMPX sequence, and ANISN was used to account for the neutron flux and capture rates. A special approach was used to determine a neutron source distribution such that the flux in the moderator region was forced to behave in an asymptotic way; thus, the ideal resonance integral experiment could be calculated. The UO 2 resonance integrals calculated were in exceptionally good agreement with experimental values based on isolated rods. The ThO 2 results were approximately 6% lower than experimental values, and efforts to understand the discrepancy are discussed. 8 figures, 7 tables

  3. [Integrity].

    Science.gov (United States)

    Gómez Rodríguez, Rafael Ángel

    2014-01-01

    To say that someone possesses integrity is to claim that that person is almost predictable about responses to specific situations, that he or she can prudentially judge and to act correctly. There is a closed interrelationship between integrity and autonomy, and the autonomy rests on the deeper moral claim of all humans to integrity of the person. Integrity has two senses of significance for medical ethic: one sense refers to the integrity of the person in the bodily, psychosocial and intellectual elements; and in the second sense, the integrity is the virtue. Another facet of integrity of the person is la integrity of values we cherish and espouse. The physician must be a person of integrity if the integrity of the patient is to be safeguarded. The autonomy has reduced the violations in the past, but the character and virtues of the physician are the ultimate safeguard of autonomy of patient. A field very important in medicine is the scientific research. It is the character of the investigator that determines the moral quality of research. The problem arises when legitimate self-interests are replaced by selfish, particularly when human subjects are involved. The final safeguard of moral quality of research is the character and conscience of the investigator. Teaching must be relevant in the scientific field, but the most effective way to teach virtue ethics is through the example of the a respected scientist.

  4. AMPK controls exercise endurance, mitochondrial oxidative capacity, and skeletal muscle integrity

    DEFF Research Database (Denmark)

    Lantier, Louise; Fentz, Joachim; Mounier, Rémi

    2014-01-01

    AMP-activated protein kinase (AMPK) is a sensor of cellular energy status that plays a central role in skeletal muscle metabolism. We used skeletal muscle-specific AMPKα1α2 double-knockout (mdKO) mice to provide direct genetic evidence of the physiological importance of AMPK in regulating muscle...... diminished maximal ADP-stimulated mitochondrial respiration, showing an impairment at complex I. This effect was not accompanied by changes in mitochondrial number, indicating that AMPK regulates muscle metabolic adaptation through the regulation of muscle mitochondrial oxidative capacity and mitochondrial...

  5. Plant Characteristics of an Integrated Solid Oxide Fuel Cell Cycle and a Steam Cycle

    DEFF Research Database (Denmark)

    Rokni, Masoud

    2010-01-01

    Plant characteristics of a system containing a solid oxide fuel cell (SOFC) cycle on the top of a Rankine cycle were investigated. Natural gas (NG) was used as the fuel for the plant. A desulfurization reactor removes the sulfur content in the fuel, while a pre-reformer broke down the heavier...... recovery steam generator (HRSG). The remaining energy of the off-gases was recycled back to the topping cycle for further utilization. Several parameter studies were carried out to investigate the sensitivity of the suggested plant. It was shown that the operation temperature of the desulfurization unit...

  6. Deep Gate Recurrent Neural Network

    Science.gov (United States)

    2016-11-22

    and Fred Cummins. Learning to forget: Continual prediction with lstm . Neural computation, 12(10):2451–2471, 2000. Alex Graves. Generating sequences...DSGU) and Simple Gated Unit (SGU), which are structures for learning long-term dependencies. Compared to traditional Long Short-Term Memory ( LSTM ) and...Gated Recurrent Unit (GRU), both structures require fewer parameters and less computation time in sequence classification tasks. Unlike GRU and LSTM

  7. Bill Gates vil redde Folkeskolen

    DEFF Research Database (Denmark)

    Fejerskov, Adam Moe

    2014-01-01

    Det amerikanske uddannelsessystem bliver for tiden udsat for hård kritik, ledt an af Microsoft stifteren Bill Gates. Gates har indtil videre brugt 3 mia. kroner på at skabe opbakning til tiltag som præstationslønning af lærere og strømlining af pensum på tværs af alle skoler i landet...

  8. CMOS gate array characterization procedures

    Science.gov (United States)

    Spratt, James P.

    1993-09-01

    Present procedures are inadequate for characterizing the radiation hardness of gate array product lines prior to personalization because the selection of circuits to be used, from among all those available in the manufacturer's circuit library, is usually uncontrolled. (Some circuits are fundamentally more radiation resistant than others.) In such cases, differences in hardness can result between different designs of the same logic function. Hardness also varies because many gate arrays feature large custom-designed megacells (e.g., microprocessors and random access memories-MicroP's and RAM's). As a result, different product lines cannot be compared equally. A characterization strategy is needed, along with standardized test vehicle(s), methodology, and conditions, so that users can make informed judgments on which gate arrays are best suited for their needs. The program described developed preferred procedures for the radiation characterization of gate arrays, including a gate array evaluation test vehicle, featuring a canary circuit, designed to define the speed versus hardness envelope of the gate array. A multiplier was chosen for this role, and a baseline multiplier architecture is suggested that could be incorporated into an existing standard evaluation circuit chip.

  9. Signal-to-noise characterization of time-gated intensifiers used for wide-field time-domain FLIM

    Energy Technology Data Exchange (ETDEWEB)

    McGinty, J; Requejo-Isidro, J; Munro, I; Talbot, C B; Dunsby, C; Neil, M A A; French, P M W [Photonics Group, Blackett Laboratory, Imperial College London, Prince Consort Road, London, SW7 2BW (United Kingdom); Kellett, P A; Hares, J D, E-mail: james.mcginty@imperial.ac.u [Kentech Instruments Ltd, Isis Building, Howbery Park, Wallingford, OX10 8BA (United Kingdom)

    2009-07-07

    Time-gated imaging using gated optical intensifiers provides a means to realize high speed fluorescence lifetime imaging (FLIM) for the study of fast events and for high throughput imaging. We present a signal-to-noise characterization of CCD-coupled micro-channel plate gated intensifiers used with this technique and determine the optimal acquisition parameters (intensifier gain voltage, CCD integration time and frame averaging) for measuring mono-exponential fluorescence lifetimes in the shortest image acquisition time for a given signal flux. We explore the use of unequal CCD integration times for different gate delays and show that this can improve the lifetime accuracy for a given total acquisition time.

  10. Study of the Electrolytic Reduction of Uranium Oxide in LiCl-Li2O Molten Salts with an Integrated Cathode Assembly

    International Nuclear Information System (INIS)

    Park, Sung Bin; Seo, Chung Seok; Kang, Dae Seung; Kwon, Seon Gil; Park, Seong Won

    2005-01-01

    The electrolytic reduction of uranium oxide in a LiCl-Li 2 O molten salt system has been studied in a 10 g U 3 O 3 /batch-scale experimental apparatus with an integrated cathode assembly at 650 .deg. C. The integrated cathode assembly consists of an electric conductor, the uranium oxide to be reduced and the membrane for loading the uranium oxide. From the cyclic voltammograms for the LiCl-3 wt% Li 3 O system and the U 3 O 3 -LiCl-3 wt% Li 2 O system according to the materials of the membrane in the cathode assembly, the mechanisms of the predominant reduction reactions in the electrolytic reactor cell were to be understood; direct and indirect electrolytic reduction of uranium oxide. Direct and indirect electrolytic reductions have been performed with the integrated cathode assembly. Using the 325-mesh stainless steel screen the uranium oxide failed to be reduced to uranium metal by a direct and indirect electrolytic reduction because of a low current efficiency and with the porous magnesia membrane the uranium oxide was reduced successfully to uranium metal by an indirect electrolytic reduction because of a high current efficiency.

  11. Volumetric measurement of human red blood cells by MOSFET-based microfluidic gate.

    Science.gov (United States)

    Guo, Jinhong; Ai, Ye; Cheng, Yuanbing; Li, Chang Ming; Kang, Yuejun; Wang, Zhiming

    2015-08-01

    In this paper, we present a MOSFET-based (metal oxide semiconductor field-effect transistor) microfluidic gate to characterize the translocation of red blood cells (RBCs) through a gate. In the microfluidic system, the bias voltage modulated by the particles or biological cells is connected to the gate of MOSFET. The particles or cells can be detected by monitoring the MOSFET drain current instead of DC/AC-gating method across the electronic gate. Polystyrene particles with various standard sizes are utilized to calibrate the proposed device. Furthermore, RBCs from both adults and newborn blood sample are used to characterize the performance of the device in distinguishing the two types of RBCs. As compared to conventional DC/AC current modulation method, the proposed device demonstrates a higher sensitivity and is capable of being a promising platform for bioassay analysis. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. Effect of reverse Boudouard reaction catalyst on the performance of solid oxide carbon fuel cells integrated with a dry gasifier

    International Nuclear Information System (INIS)

    Kim, Sun-Kyung; Mehran, Muhammad Taqi; Mushtaq, Usman; Lim, Tak-Hyoung; Lee, Jong-Won; Lee, Seung-Bok; Park, Seok-Joo; Song, Rak-Hyun

    2016-01-01

    Highlights: • The addition of K_2CO_3 catalyst in carbon fuel improves the performance of SO-CFC. • Thermal and electrochemical analyses done to elucidate the catalytic enhancement. • Material characterization of SO-CFC performed after long-term degradation test. - Abstract: A solid oxide carbon fuel cell (SO-CFC) integrated with a dry gasifier was operated on activated carbon fuel and the effect of adding a reverse Boudouard gasification catalyst on the performance and long-term operation characteristics of the SO-CFC was investigated. The reactivity of the carbon fuels for the Boudouard gasification reaction was analyzed by a thermal analysis at various operating conditions. The SO-CFC was then operated on gasified fuel gas consisting of CO_2 and CO obtained from the integrated dry gasifier. The SO-CFC operated on activated carbon fuel with 5 wt.% K_2CO_3 achieved a maximum power density of 202, 262, and 271 mW/cm"2 at 750, 800, and 850 °C, respectively; the SO-CFC fueled with activated carbon fuel without a catalyst meanwhile yielded maximum power density of 168 mW/cm"2 at 850 °C. By using electrochemical impedance spectroscopy, the effect of adding the catalyst on the gasification products and subsequently on the performance of the SO-CFC was studied. A long-term degradation test was conducted by continuously operating the SO-CFC at 50 mA/cm"2 for 518 h at 750 °C. During the long-term degradation test, the average degradation rate of the SO-CFC was found to be 183 mV/kh. The post-mortem SEM and XRD analyses of the SO-CFC after the long-term test revealed the presence of carbon deposits and oxidation of Ni at the anode, causing a relatively higher degree of degradation in the SO-CFC integrated with the dry gasifier during the long-term operation. The addition of the K_2CO_3 based dry gasification catalyst significantly enhances the performance of the SO-CFC integrated with dry gasification, but during long-term operation, the degradation rate is found

  13. Integrated process using non-stoichiometric sulfides or oxides of potassium for making less active metals and hydrocarbons

    International Nuclear Information System (INIS)

    Swanson, R.

    1984-01-01

    Disclosed is a combinative integrated chemical process using inorganic reactants and yielding, if desired, organic products. The process involves first the production of elemental potassium by the thermal or thermal-reduced pressure decomposition of potassium oxide or potassium sulfide and distillation of the potassium. This elemental potassium is then used to reduce ores or ore concentrates of copper, zinc, lead, magnesium, cadmium, iron, arsenic, antimony or silver to yield one or more of these less active metals in elemental form. Process potassium can also be used to produce hydrogen by reaction with water or potassium hydroxide. This hydrogen is reacted with potassium to produce potassium hydride. Heating the latter with carbon produces potassium acetylide which forms acetylene when treated with water. Acetylene is hydrogenated to ethene or ethane with process hydrogen. Using Wurtz-Fittig reaction conditions, the ethane can be upgraded to a mixture of hydrocarbons boiling in the fuel range

  14. Effects of X irradiation and high field electron injection of the electrical properties of rapid thermal oxides

    International Nuclear Information System (INIS)

    Schubert, W.K.; Seager, C.H.

    1988-01-01

    Rapid thermal oxidation (RTO) is a promising tool for fabricating the thin gate oxides (5 to 15 nm) that will be needed in future submicron integrated circuits, because of its inherently superior time-temperature control when compared to conventional oxidation methods. It is important to demonstrate that RTO can be used without adversely affecting the radiation hardness or high field properties of the oxide. Beyond this demonstration, rapid thermal processing makes it possible to determine more precisely how the kinetics of oxidation and post oxidation annealing affect the device properties. Information of this type should prove useful in modeling relevant defect formation mechanisms. The present paper is part of a systematic study of the effect of rapid thermal processing on the radiation and high field response of thin oxides

  15. Colour and toxic characteristics of metakaolinite-hematite pigment for integrally coloured concrete, prepared from iron oxide recovered from a water treatment plant of an abandoned coal mine

    Science.gov (United States)

    Sadasivam, Sivachidambaram; Thomas, Hywel Rhys

    2016-07-01

    A metakaolinite-hematite (KH) red pigment was prepared using an ocherous iron oxide sludge recovered from a water treatment plant of an abandoned coal mine. The KH pigment was prepared by heating the kaolinite and the iron oxide sludge at kaolinite's dehydroxylation temperature. Both the raw sludge and the KH specimen were characterised for their colour properties and toxic characteristics. The KH specimen could serve as a pigment for integrally coloured concrete and offers a potential use for the large volumes of the iron oxide sludge collected from mine water treatment plants.

  16. On the application of acoustic emission analysis to evaluate the integrity of protective oxide coatings

    International Nuclear Information System (INIS)

    Jonas, H.; Stover, D.; Hecker, R.

    1985-01-01

    Protective coatings extend the range of applications for materials. Surface properties can be selectively adapted for each problem. Thus bare high-temperature alloys for heat exchanging units e.g. in high-temperature systems for producing substitute natural gas do not have sufficient protection against undesirable tritium permeation from the helium primary gas into the substitute natural gas generated. A chromium oxid coating, on the other hand, of only a few μm in thickness ensures a barrier effect combines with an inhibitive factor H = 1000. Good adhesion is required for a successful application, in the same way as good temperature cycling resistance under start-up and shut-down conditions is of decisive significance for every type of coating

  17. Design and Optimization of an Integrated Biomass Gasification and Solid Oxide Fuel Cell System

    DEFF Research Database (Denmark)

    Bang-Møller, Christian

    of the different operating conditions reveals an optimum for the chosen pressure ratio with respect to the resulting electrical efficiency. Furthermore, the SOFC operating temperature and fuel utilization should be maintained at a high level and the cathode temperature gradient maximized. Based on 1st and 2nd law...... based on biomass will improve the competitiveness of decentralized CHP production from biomass as well as move the development towards a more sustainable CHP production. The aim of this research is to contribute to enhanced electrical efficiencies and sustainability in future decentralized CHP plants....... The work deals with the coupling of thermal biomass gasification and solid oxide fuel cells (SOFCs), and specific focus is kept on exploring the potential performance of hybrid CHP systems based on the novel two-stage gasification concept and SOFCs. The two-stage gasification concept is developed...

  18. Threshold voltage control in TmSiO/HfO2 high-k/metal gate MOSFETs

    Science.gov (United States)

    Dentoni Litta, E.; Hellström, P.-E.; Östling, M.

    2015-06-01

    High-k interfacial layers have been proposed as a way to extend the scalability of Hf-based high-k/metal gate CMOS technology, which is currently limited by strong degradations in threshold voltage control, channel mobility and device reliability when the chemical oxide (SiOx) interfacial layer is scaled below 0.4 nm. We have previously demonstrated that thulium silicate (TmSiO) is a promising candidate as a high-k interfacial layer, providing competitive advantages in terms of EOT scalability and channel mobility. In this work, the effect of the TmSiO interfacial layer on threshold voltage control is evaluated, showing that the TmSiO/HfO2 dielectric stack is compatible with threshold voltage control techniques commonly used with SiOx/HfO2 stacks. Specifically, we show that the flatband voltage can be set in the range -1 V to +0.5 V by the choice of gate metal and that the effective workfunction of the stack is properly controlled by the metal workfunction in a gate-last process flow. Compatibility with a gate-first approach is also demonstrated, showing that integration of La2O3 and Al2O3 capping layers can induce a flatband voltage shift of at least 150 mV. Finally, the effect of the annealing conditions on flatband voltage is investigated, finding that the duration of the final forming gas anneal can be used as a further process knob to tune the threshold voltage. The evaluation performed on MOS capacitors is confirmed by the fabrication of TmSiO/HfO2/TiN MOSFETs achieving near-symmetric threshold voltages at sub-nm EOT.

  19. Role of Electrical Double Layer Structure in Ionic Liquid Gated Devices.

    Science.gov (United States)

    Black, Jennifer M; Come, Jeremy; Bi, Sheng; Zhu, Mengyang; Zhao, Wei; Wong, Anthony T; Noh, Joo Hyon; Pudasaini, Pushpa R; Zhang, Pengfei; Okatan, Mahmut Baris; Dai, Sheng; Kalinin, Sergei V; Rack, Philip D; Ward, Thomas Zac; Feng, Guang; Balke, Nina

    2017-11-22

    Ionic liquid gating of transition metal oxides has enabled new states (magnetic, electronic, metal-insulator), providing fundamental insights into the physics of strongly correlated oxides. However, despite much research activity, little is known about the correlation of the structure of the liquids in contact with the transition metal oxide surface, its evolution with the applied electric potential, and its correlation with the measured electronic properties of the oxide. Here, we investigate the structure of an ionic liquid at a semiconducting oxide interface during the operation of a thin film transistor where the electrical double layer gates the device using experiment and theory. We show that the transition between the ON and OFF states of the amorphous indium gallium zinc oxide transistor is accompanied by a densification and preferential spatial orientation of counterions at the oxide channel surface. This process occurs in three distinct steps, corresponding to ion orientations, and consequently, regimes of different electrical conductivity. The reason for this can be found in the surface charge densities on the oxide surface when different ion arrangements are present. Overall, the field-effect gating process is elucidated in terms of the interfacial ionic liquid structure, and this provides unprecedented insight into the working of a liquid gated transistor linking the nanoscopic structure to the functional properties. This knowledge will enable both new ionic liquid design as well as advanced device concepts.

  20. Block QCA Fault-Tolerant Logic Gates

    Science.gov (United States)

    Firjany, Amir; Toomarian, Nikzad; Modarres, Katayoon

    2003-01-01

    Suitably patterned arrays (blocks) of quantum-dot cellular automata (QCA) have been proposed as fault-tolerant universal logic gates. These block QCA gates could be used to realize the potential of QCA for further miniaturization, reduction of power consumption, increase in switching speed, and increased degree of integration of very-large-scale integrated (VLSI) electronic circuits. The limitations of conventional VLSI circuitry, the basic principle of operation of QCA, and the potential advantages of QCA-based VLSI circuitry were described in several NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35; and Hybrid VLSI/QCA Architecture for Computing FFTs (NPO-20923), which follows this article. To recapitulate the principle of operation (greatly oversimplified because of the limitation on space available for this article): A quantum-dot cellular automata contains four quantum dots positioned at or between the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantummechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Heretofore, researchers have recognized two major obstacles to realization of QCA

  1. Molecular logic gates: the past, present and future.

    Science.gov (United States)

    Erbas-Cakmak, Sundus; Kolemen, Safacan; Sedgwick, Adam C; Gunnlaugsson, Thorfinnur; James, Tony D; Yoon, Juyoung; Akkaya, Engin U

    2018-04-03

    The field of molecular logic gates originated 25 years ago, when A. P. de Silva published a seminal article in Nature. Stimulated by this ground breaking research, scientists were inspired to join the race to simulate the workings of the fundamental components of integrated circuits using molecules. The rules of this game of mimicry were flexible, and have evolved and morphed over the years. This tutorial review takes a look back on and provides an overview of the birth and growth of the field of molecular logics. Spinning-off from chemosensor research, molecular logic gates quickly proved themselves to be more than intellectual exercises and are now poised for many potential practical applications. The ultimate goal of this vein of research became clearer only recently - to "boldly go where no silicon-based logic gate has gone before" and seek out a new deeper understanding of life inside tissues and cells.

  2. Monte Carlo simulation of tomography techniques using the platform Gate

    International Nuclear Information System (INIS)

    Barbouchi, Asma

    2007-01-01

    Simulations play a key role in functional imaging, with applications ranging from scanner design, scatter correction, protocol optimisation. GATE (Geant4 for Application Tomography Emission) is a platform for Monte Carlo Simulation. It is based on Geant4 to generate and track particles, to model geometry and physics process. Explicit modelling of time includes detector motion, time of flight, tracer kinetics. Interfaces to voxellised models and image reconstruction packages improve the integration of GATE in the global modelling cycle. In this work Monte Carlo simulations are used to understand and optimise the gamma camera's performances. We study the effect of the distance between source and collimator, the diameter of the holes and the thick of the collimator on the spatial resolution, energy resolution and efficiency of the gamma camera. We also study the reduction of simulation's time and implement a model of left ventricle in GATE. (Author). 7 refs

  3. Near-thermal limit gating in heavily doped III-V semiconductor nanowires using polymer electrolytes

    Science.gov (United States)

    Ullah, A. R.; Carrad, D. J.; Krogstrup, P.; Nygârd, J.; Micolich, A. P.

    2018-02-01

    Doping is a common route to reducing nanowire transistor on-resistance but it has limits. A high doping level gives significant loss in gate performance and ultimately complete gate failure. We show that electrolyte gating remains effective even when the Be doping in our GaAs nanowires is so high that traditional metal-oxide gates fail. In this regime we obtain a combination of subthreshold swing and contact resistance that surpasses the best existing p -type nanowire metal-oxide semiconductor field-effect transistors (MOSFETs). Our subthreshold swing of 75 mV/dec is within 25 % of the room-temperature thermal limit and comparable with n -InP and n -GaAs nanowire MOSFETs. Our results open a new path to extending the performance and application of nanowire transistors, and motivate further work on improved solid electrolytes for nanoscale device applications.

  4. Dynamic Monte Carlo study of isolated-gate InAs/AlSb HEMTs

    International Nuclear Information System (INIS)

    Rodilla, H; González, T; Mateos, J; Moschetti, G; Grahn, J

    2011-01-01

    In this work, by means of Monte Carlo simulations, the static and dynamic behavior of isolated-gate InAs/AlSb high electron mobility transistors (Sb-HEMTs) has been studied and compared with experimental results. The influence of the existence of a native oxide under the gate, the value of the surface charges in the gate recess and the possible variation of electron sheet carrier density, n s , have been studied. A decrease in the gate-source capacitance, transconductance and intrinsic cutoff frequency is observed because of the presence of the native oxide, while changes in the value of the surface charges in the recess only introduce a threshold voltage shift. The increase of n s shifts the maximum of the transconductance and intrinsic cutoff frequency to higher values of drain current and improves the agreement with the experimental results

  5. Technical and dosimetric aspects of respiratory gating using a pressure-sensor motion monitoring system

    International Nuclear Information System (INIS)

    Li, X. Allen; Stepaniak, Christopher; Gore, Elizabeth

    2006-01-01

    This work introduces a gating technique that uses 4DCT to determine gating parameters and to plan gated treatment, and employs a Siemens linear accelerator to deliver the gated treatment. Because of technology incompatibility, the 4DCT scanner (LightSpeed, GE) and the Siemens accelerator require two different motion-monitoring systems. The motion monitoring system (AZ-773V, Anzai Med.) used for the gated delivery utilizes a pressure sensor to detect the external respiratory motion (pressure change) in real time. Another system (RPM, Varian) used for the 4DCT scanner (LightSpeed, GE) is based on an infrared camera to detect motion of external markers. These two motion monitoring systems (RPM and Anzai systems) were found to correlate well with each other. The depth doses and profile measured for gated delivery (with a duty cycle of 25% or 50%) were found to agree within 1.0% with those measured for ungated delivery, indicating that gating did not significantly alter beam characteristics. The measurement verified also that the MU linearity and beam output remained unchanged (within 0.3%). A practical method of using 4DCT to plan a gated treatment was developed. The duty cycle for either phase or amplitude gating can be determined based on 4DCT with consideration of set-up error and delivery efficiency. The close-loop measurement involving the entire gating process (imaging, planning, and delivery) showed that the measured isodose distributions agreed with those intended, validating the accuracy and reliability of the gating technique. Based these observations, we conclude that the gating technique introduced in this work, integrating Siemens linear accelerator and Anzai pressure sensor device with GE/Varian RPM 4DCT, is reliable and effective, and it can be used clinically to account for respiratory motion during radiation therapy

  6. Protecting cells by protecting their vulnerable lysosomes: Identification of a new mechanism for preserving lysosomal functional integrity upon oxidative stress.

    Science.gov (United States)

    Pascua-Maestro, Raquel; Diez-Hermano, Sergio; Lillo, Concepción; Ganfornina, Maria D; Sanchez, Diego

    2017-02-01

    Environmental insults such as oxidative stress can damage cell membranes. Lysosomes are particularly sensitive to membrane permeabilization since their function depends on intraluminal acidic pH and requires stable membrane-dependent proton gradients. Among the catalog of oxidative stress-responsive genes is the Lipocalin Apolipoprotein D (ApoD), an extracellular lipid binding protein endowed with antioxidant capacity. Within the nervous system, cell types in the defense frontline, such as astrocytes, secrete ApoD to help neurons cope with the challenge. The protecting role of ApoD is known from cellular to organism level, and many of its downstream effects, including optimization of autophagy upon neurodegeneration, have been described. However, we still cannot assign a cellular mechanism to ApoD gene that explains how this protection is accomplished. Here we perform a comprehensive analysis of ApoD intracellular traffic and demonstrate its role in lysosomal pH homeostasis upon paraquat-induced oxidative stress. By combining single-lysosome in vivo pH measurements with immunodetection, we demonstrate that ApoD is endocytosed and targeted to a subset of vulnerable lysosomes in a stress-dependent manner. ApoD is functionally stable in this acidic environment, and its presence is sufficient and necessary for lysosomes to recover from oxidation-induced alkalinization, both in astrocytes and neurons. This function is accomplished by preventing lysosomal membrane permeabilization. Two lysosomal-dependent biological processes, myelin phagocytosis by astrocytes and optimization of neurodegeneration-triggered autophagy in a Drosophila in vivo model, require ApoD-related Lipocalins. Our results uncover a previously unknown biological function of ApoD, member of the finely regulated and evolutionary conserved gene family of extracellular Lipocalins. They set a lipoprotein-mediated regulation of lysosomal membrane integrity as a new mechanism at the hub of many cellular

  7. Ionizing radiation effects on floating gates

    International Nuclear Information System (INIS)

    Cellere, G.; Paccagnella, A.; Visconti, A.; Bonanomi, M.

    2004-01-01

    Floating gate (FG) memories, and in particular Flash, are the dominant among modern nonvolatile memory technologies. Their performance under ionizing radiation was traditionally studied for the use in space, but has become of general interest in recent years. We are showing results on the charge loss from programmed FG arrays after 10 keV x-rays exposure. Exposure to ionizing radiation results in progressive discharge of the FG. More advanced devices, featuring smaller FG, are less sensitive to ionizing radiation that older ones. The reason is identified in the photoemission of electrons from FG, since at high doses it dominates over charge loss deriving from electron/hole pairs generation in the oxides

  8. Integrated oxide graphene based device for laser inactivation of pathogenic microorganisms

    Science.gov (United States)

    Grishkanich, Alexsandr; Ruzankina, Julia; Afanasyev, Mikhail; Paklinov, Nikita; Hafizov, Nail

    2018-02-01

    We develop device for virus disinfection of pathogenic microorganisms. Viral decontamination can be carried out due to hard ultraviolet irradiation and singlet oxygen destroying the genetic material of a virus capsid. UV rays can destroy DNA, leading to the formation of dimers of nucleic acids. This practically does not occur in tissues, tk. UV rays penetrate badly through them, however, the viral particles are small and UV can destroy their genetic material, RNA / DNA and the virus can not replicate. It is with the construction of the ultraviolet laser water disinfection system (UFLOV) based on the continuous and periodic pulsed ultraviolet laser sources (pump) binds to solve sterility and depyrogenation of water. It has been established that small doses of UV irradiation stimulate reproduction, and large doses cause the death of pathogenic microorganisms. The effect of a dose of ultraviolet is the result of photochemical action on the substance of a living bacterial cell or virion. Also complex photodynamic laser inactivation on graphene oxide is realized.

  9. Plant characteristics of an integrated solid oxide fuel cell cycle and a steam cycle

    International Nuclear Information System (INIS)

    Rokni, Masoud

    2010-01-01

    Plant characteristics of a system containing a solid oxide fuel cell (SOFC) cycle on the top of a Rankine cycle were investigated. A desulfurization reactor removes the sulfur content in the fuel, while a pre-reformer broke down the heavier hydrocarbons in an adiabatic steam reformer (ASR). The pre-treated fuel then entered to the anode side of the SOFC. The remaining fuels after the SOFC stacks entered a catalytic burner for further combusting. The burned gases from the burner were then used to produce steam for the Rankine cycle in a heat recovery steam generator (HRSG). The remaining energy of the off-gases was recycled back to the topping cycle for further utilization. Several parameter studies were carried out to investigate the sensitivity of the suggested plant. It was shown that the operation temperature of the desulfurization and the pre-reformer had no effect on the plant efficiency, which was also true when decreasing the anode temperature. However, increasing the cathode temperature had a significant effect on the plant efficiency. In addition, decreasing the SOFC utilization factor from 0.8 to 0.7, increases the plant efficiency by about 6%. An optimal plant efficiency of about 71% was achieved by optimizing the plant.

  10. Plant characteristics of an integrated solid oxide fuel cell cycle and a steam cycle

    Energy Technology Data Exchange (ETDEWEB)

    Rokni, Masoud [Technical University of Denmark, Dept. of Mechanical Engineering, Thermal Energy System, Building 402, 2800 Kgs, Lyngby (Denmark)

    2010-12-15

    Plant characteristics of a system containing a solid oxide fuel cell (SOFC) cycle on the top of a Rankine cycle were investigated. A desulfurization reactor removes the sulfur content in the fuel, while a pre-reformer broke down the heavier hydrocarbons in an adiabatic steam reformer (ASR). The pre-treated fuel then entered to the anode side of the SOFC. The remaining fuels after the SOFC stacks entered a catalytic burner for further combusting. The burned gases from the burner were then used to produce steam for the Rankine cycle in a heat recovery steam generator (HRSG). The remaining energy of the off-gases was recycled back to the topping cycle for further utilization. Several parameter studies were carried out to investigate the sensitivity of the suggested plant. It was shown that the operation temperature of the desulfurization and the pre-reformer had no effect on the plant efficiency, which was also true when decreasing the anode temperature. However, increasing the cathode temperature had a significant effect on the plant efficiency. In addition, decreasing the SOFC utilization factor from 0.8 to 0.7, increases the plant efficiency by about 6%. An optimal plant efficiency of about 71% was achieved by optimizing the plant. (author)

  11. Integral approaches to wastewater treatment plant upgrading for odor prevention: Activated Sludge and Oxidized Ammonium Recycling.

    Science.gov (United States)

    Estrada, José M; Kraakman, N J R; Lebrero, R; Muñoz, R

    2015-11-01

    Traditional physical/chemical end-of-the-pipe technologies for odor abatement are relatively expensive and present high environmental impacts. On the other hand, biotechnologies have recently emerged as cost-effective and environmentally friendly alternatives but are still limited by their investment costs and land requirements. A more desirable approach to odor control is the prevention of odorant formation before being released to the atmosphere, but limited information is available beyond good design and operational practices of the wastewater treatment process. The present paper reviews two widely applicable and economic alternatives for odor control, Activated Sludge Recycling (ASR) and Oxidized Ammonium Recycling (OAR), by discussing their fundamentals, key operating parameters and experience from the available pilot and field studies. Both technologies present high application potential using readily available plant by-products with a minimum plant upgrading, and low investment and operating costs, contributing to the sustainability and economic efficiency of odor control at wastewater treatment facilities. Copyright © 2015 Elsevier Ltd. All rights reserved.

  12. Scaling the Serialization of MOSFETs by Magnetically Coupling Their Gate Electrodes

    DEFF Research Database (Denmark)

    Dimopoulos, Emmanouil; Munk-Nielsen, Stig

    2013-01-01

    More than twenty years of thorough research on the serialization of power semiconductor switches, like the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) or the Insulated Gate Bipolar Transistor (IGBT), have resulted into several different stacking concepts; all aiming towards...... the establishment of a high-efficient, high-voltage, fast-switching device. Among the prevailing stacking approaches lies the gate balancing core technique, which, in its initial form, demonstrated very good performance in strings of high-power IGBT modules, by magnetically coupling their gate electrodes. Recently...

  13. Dataset demonstrating the temperature effect on average output polarization for QCA based reversible logic gates

    Directory of Open Access Journals (Sweden)

    Md. Kamrul Hassan

    2017-08-01

    Full Text Available Quantum-dot cellular automata (QCA is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS technology. In this article, we present the dataset of average output polarization (AOP for basic reversible logic gates presented in Ali Newaz et al. (2016 [1]. QCADesigner 2.0.3 has been employed to analysis the AOP of reversible gates at different temperature levels in Kelvin (K unit.

  14. A complementary metal oxide semiconductor—integrable conditioning circuit for resistive chemical sensor management

    International Nuclear Information System (INIS)

    Depari, Alessandro; Flammini, Alessandra; De Marcellis, Andrea; Ferri, Giuseppe

    2011-01-01

    This paper presents a new interface circuit (for MOX-based resistive chemical sensors) capable of overcoming the main limit of the circuits based on the resistance-to-time approach, i.e. the long measuring time with high-value resistances. The system is designed to operate with a single supply of 3.3 V, thus facilitating an ASIC implementation together with digital electronics for a first data analysis and transmission. This is particularly advantageous when the elaboration process requires a large computational load and a data pre-elaboration is advisable. Simulations of the integrable solution of the system have shown the feasibility of the proposed approach. A prototype with discrete components has been furthermore fabricated and experimentally tested, showing good performance in the range 0.5 MΩ to 10 GΩ with a maximum measuring time of 60 ms

  15. New opening hours of the gates

    CERN Multimedia

    GS Department

    2009-01-01

    Please note the new opening hours of the gates as well as the intersites tunnel from the 19 May 2009: GATE A 7h - 19h GATE B 24h/24 GATE C 7h - 9h\t17h - 19h GATE D 8h - 12h\t13h - 16h GATE E 7h - 9h\t17h - 19h Prévessin 24h/24 The intersites tunnel will be opened from 7h30 to 18h non stop. GS-SEM Group Infrastructure and General Services Department

  16. Light-effect transistor (LET) with multiple independent gating controls for optical logic gates and optical amplification

    Science.gov (United States)

    Marmon, Jason; Rai, Satish; Wang, Kai; Zhou, Weilie; Zhang, Yong

    The pathway for CMOS technology beyond the 5-nm technology node remains unclear for both physical and technological reasons. A new transistor paradigm is required. A LET (Marmon et. al., Front. Phys. 2016, 4, No. 8) offers electronic-optical hybridization at the component level, and is capable of continuing Moore's law to the quantum scale. A LET overcomes a FET's fabrication complexity, e.g., physical gate and doping, by employing optical gating and photoconductivity, while multiple independent, optical gates readily realize unique functionalities. We report LET device characteristics and novel digital and analog applications, such as optical logic gates and optical amplification. Prototype CdSe-nanowire-based LETs, incorporating an M-S-M structure, show output and transfer characteristics resembling advanced FETs, e.g., on/off ratios up to 106 with a source-drain voltage of 1.43V, gate-power of 260nW, and a subthreshold swing of 0.3nW/decade (excluding losses). A LET has potential for high-switching (THz) speeds and extremely low-switching energies (aJ) in the ballistic transport region. Our work offers new electronic-optical integration strategies for high speed and low energy computing approaches, which could potentially be extended to other materials and devices.

  17. Range-Gated Laser Stroboscopic Imaging for Night Remote Surveillance

    International Nuclear Information System (INIS)

    Xin-Wei, Wang; Yan, Zhou; Song-Tao, Fan; Jun, He; Yu-Liang, Liu

    2010-01-01

    For night remote surveillance, we present a method, the range-gated laser stroboscopic imaging(RGLSI), which uses a new kind of time delay integration mode to integrate target signals so that night remote surveillance can be realized by a low-energy illuminated laser. The time delay integration in this method has no influence on the video frame rate. Compared with the traditional range-gated laser imaging, RGLSI can reduce scintillation and target speckle effects and significantly improve the image signal-to-noise ratio analyzed. Even under low light level and low visibility conditions, the RGLSI system can effectively work. In a preliminary experiment, we have detected and recognized a railway bridge one kilometer away under a visibility of six kilometers, when the effective illuminated energy is 29.5 μJ

  18. Respiratory gating in cardiac PET

    DEFF Research Database (Denmark)

    Lassen, Martin Lyngby; Rasmussen, Thomas; Christensen, Thomas E

    2017-01-01

    BACKGROUND: Respiratory motion due to breathing during cardiac positron emission tomography (PET) results in spatial blurring and erroneous tracer quantification. Respiratory gating might represent a solution by dividing the PET coincidence dataset into smaller respiratory phase subsets. The aim...... of our study was to compare the resulting imaging quality by the use of a time-based respiratory gating system in two groups administered either adenosine or dipyridamole as the pharmacological stress agent. METHODS AND RESULTS: Forty-eight patients were randomized to adenosine or dipyridamole cardiac...... stress (82)RB-PET. Respiratory rates and depths were measured by a respiratory gating system in addition to registering actual respiratory rates. Patients undergoing adenosine stress showed a decrease in measured respiratory rate from initial to later scan phase measurements [12.4 (±5.7) vs 5.6 (±4...

  19. Robustness of holonomic quantum gates

    International Nuclear Information System (INIS)

    Solinas, P.; Zanardi, P.; Zanghi, N.

    2005-01-01

    Full text: If the driving field fluctuates during the quantum evolution this produces errors in the applied operator. The holonomic (and geometrical) quantum gates are believed to be robust against some kind of noise. Because of the geometrical dependence of the holonomic operators can be robust against this kind of noise; in fact if the fluctuations are fast enough they cancel out leaving the final operator unchanged. I present the numerical studies of holonomic quantum gates subject to this parametric noise, the fidelity of the noise and ideal evolution is calculated for different noise correlation times. The holonomic quantum gates seem robust not only for fast fluctuating fields but also for slow fluctuating fields. These results can be explained as due to the geometrical feature of the holonomic operator: for fast fluctuating fields the fluctuations are canceled out, for slow fluctuating fields the fluctuations do not perturb the loop in the parameter space. (author)

  20. Photolithographically Patterned TiO2 Films for Electrolyte-Gated Transistors.

    Science.gov (United States)

    Valitova, Irina; Kumar, Prajwal; Meng, Xiang; Soavi, Francesca; Santato, Clara; Cicoira, Fabio

    2016-06-15

    Metal oxides constitute a class of materials whose properties cover the entire range from insulators to semiconductors to metals. Most metal oxides are abundant and accessible at moderate cost. Metal oxides are widely investigated as channel materials in transistors, including electrolyte-gated transistors, where the charge carrier density can be modulated by orders of magnitude upon application of relatively low electrical bias (2 V). Electrolyte gating offers the opportunity to envisage new applications in flexible and printed electronics as well as to improve our current understanding of fundamental processes in electronic materials, e.g. insulator/metal transitions. In this work, we employ photolithographically patterned TiO2 films as channels for electrolyte-gated transistors. TiO2 stands out for its biocompatibility and wide use in sensing, electrochromics, photovoltaics and photocatalysis. We fabricated TiO2 electrolyte-gated transistors using an original unconventional parylene-based patterning technique. By using a combination of electrochemical and charge carrier transport measurements we demonstrated that patterning improves the performance of electrolyte-gated TiO2 transistors with respect to their unpatterned counterparts. Patterned electrolyte-gated (EG) TiO2 transistors show threshold voltages of about 0.9 V, ON/OFF ratios as high as 1 × 10(5), and electron mobility above 1 cm(2)/(V s).

  1. Colour and toxic characteristics of metakaolinite–hematite pigment for integrally coloured concrete, prepared from iron oxide recovered from a water treatment plant of an abandoned coal mine

    International Nuclear Information System (INIS)

    Sadasivam, Sivachidambaram; Thomas, Hywel Rhys

    2016-01-01

    A metakaolinite-hematite (KH) red pigment was prepared using an ocherous iron oxide sludge recovered from a water treatment plant of an abandoned coal mine. The KH pigment was prepared by heating the kaolinite and the iron oxide sludge at kaolinite's dehydroxylation temperature. Both the raw sludge and the KH specimen were characterised for their colour properties and toxic characteristics. The KH specimen could serve as a pigment for integrally coloured concrete and offers a potential use for the large volumes of the iron oxide sludge collected from mine water treatment plants. - Graphical abstract: A kaolinite based red pigment was prepared using an ocherous iron oxide sludge recovered from an abandoned coal mine water treatment plant. Display Omitted - Highlights: • A red pigment was prepared by heating a kaolinite and an iron oxide sludge. • The iron oxide and the pigment were characterised for their colour properties. • The red pigment can be a potential element for integrally coloured concrete.

  2. Device performance of in situ steam generated gate dielectric nitrided by remote plasma nitridation

    International Nuclear Information System (INIS)

    Al-Shareef, H. N.; Karamcheti, A.; Luo, T. Y.; Bersuker, G.; Brown, G. A.; Murto, R. W.; Jackson, M. D.; Huff, H. R.; Kraus, P.; Lopes, D.

    2001-01-01

    In situ steam generated (ISSG) oxides have recently attracted interest for use as gate dielectrics because of their demonstrated reliability improvement over oxides formed by dry oxidation. [G. Minor, G. Xing, H. S. Joo, E. Sanchez, Y. Yokota, C. Chen, D. Lopes, and A. Balakrishna, Electrochem. Soc. Symp. Proc. 99-10, 3 (1999); T. Y. Luo, H. N. Al-Shareef, G. A. Brown, M. Laughery, V. Watt, A. Karamcheti, M. D. Jackson, and H. R. Huff, Proc. SPIE 4181, 220 (2000).] We show in this letter that nitridation of ISSG oxide using a remote plasma decreases the gate leakage current of ISSG oxide by an order of magnitude without significantly degrading transistor performance. In particular, it is shown that the peak normalized transconductance of n-channel devices with an ISSG oxide gate dielectric decreases by only 4% and the normalized drive current by only 3% after remote plasma nitridation (RPN). In addition, it is shown that the reliability of the ISSG oxide exhibits only a small degradation after RPN. These observations suggest that the ISSG/RPN process holds promise for gate dielectric applications. [copyright] 2001 American Institute of Physics

  3. SiC Power MOSFET with Improved Gate Dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Sbrockey, Nick M. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Tompa, Gary S. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Spencer, Michael G. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Chandrashekhar, Chandra M.V. S. [Structured Materials Industries, Inc., Piscataway, NJ (United States)

    2010-08-23

    In this STTR program, Structured Materials Industries (SMI), and Cornell University are developing novel gate oxide technology, as a critical enabler for silicon carbide (SiC) devices. SiC is a wide bandgap semiconductor material, with many unique properties. SiC devices are ideally suited for high-power, highvoltage, high-frequency, high-temperature and radiation resistant applications. The DOE has expressed interest in developing SiC devices for use in extreme environments, in high energy physics applications and in power generation. The development of transistors based on the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) structure will be critical to these applications.

  4. Continuous adjustment of threshold voltage in carbon nanotube field-effect transistors through gate engineering

    Science.gov (United States)

    Zhong, Donglai; Zhao, Chenyi; Liu, Lijun; Zhang, Zhiyong; Peng, Lian-Mao

    2018-04-01

    In this letter, we report a gate engineering method to adjust threshold voltage of carbon nanotube (CNT) based field-effect transistors (FETs) continuously in a wide range, which makes the application of CNT FETs especially in digital integrated circuits (ICs) easier. Top-gated FETs are fabricated using solution-processed CNT network films with stacking Pd and Sc films as gate electrodes. By decreasing the thickness of the lower layer metal (Pd) from 20 nm to zero, the effective work function of the gate decreases, thus tuning the threshold voltage (Vt) of CNT FETs from -1.0 V to 0.2 V. The continuous adjustment of threshold voltage through gate engineering lays a solid foundation for multi-threshold technology in CNT based ICs, which then can simultaneously provide high performance and low power circuit modules on one chip.

  5. Dynamic modelling and characterisation of a solid oxide fuel cell integrated in a gas turbine cycle

    Energy Technology Data Exchange (ETDEWEB)

    Thorud, Bjoern

    2005-07-01

    This thesis focuses on three main areas within the field of SOFC/GT-technology: 1) Development of a dynamic SOFC/GT model. 2) Model calibration and sensitivity study. 3) Assessment of the dynamic properties of a SOFC/GT power plant. The SOFC/GT model developed in this thesis describes a pressurised tubular Siemens Westinghouse-type SOFC, which is integrated in a gas turbine cycle. The process further includes a plate-fin recuperator for stack air preheating, a prereformer, an anode exhaust gas recycling loop for steam/carbon-ratio control, an afterburner and a shell-tube heat exchanger for air preheating. The fuel cell tube, the recuperator and the shell-tube heat exchanger are spatially distributed models. The SOFC model is further thermally integrated with the prereformer. The compressor and turbine models are based on performance maps as a general representation of the characteristics. In addition, a shaft model which incorporates moment of inertia is included to account for gas turbine transients. The SOFC model is calibrated against experimentally obtained data from a single-cell experiment performed on a Siemens Westinghouse tubular SOFC. The agreement between the model and the experimental results is good. The sensitivity study revealed that the degree of prereforming is of great importance with respect to the axial temperature distribution of the fuel cell. Types of malfunctions are discussed prior to the dynamic behaviour study. The dynamic study of the SOFC/GT process is performed by simulating small and large load changes according to three different strategies; 1) Load change at constant mean fuel cell temperature. 2) Load change at constant turbine inlet temperature. 3) Load change at constant shaft speed. Of these three strategies, the constant mean fuel cell temperature strategy appears to be the most rapid load change method. Furthermore, this strategy implies the lowest degree of thermal cycling, the smoothest fuel cell temperature distribution and

  6. Work Function Tuning in Sub-20nm Titanium Nitride (TiN) Metal Gate: Mechanism and Engineering

    KAUST Repository

    Hasan, Mehdi

    2011-07-01

    Scaling of transistors (the building blocks of modern information age) provides faster computation at the expense of excessive power dissipation. Thus to address these challenges, high-k/metal gate stack has been introduced in commercially available microprocessors from 2007. Since then titanium nitride (TiN) metal gate’s work function (Wf) tunability with its thickness (thickness increases, work function increases) is a well known phenomenon. Many hypotheses have been made over the years which include but not limited to: trap charge and metal gate nucleation, nitrogen concentration, microstructure agglomeration and global stress, metal oxide formation, and interfacial oxide thickness. However, clear contradictions exist in these assumptions. Also, nearly all these reports skipped a comprehensive approach to explain this complex paradigm. Therefore, in this work we first show a comprehensive physical investigation using transmission electron microcopy/electron energy loss spectroscopy (TEM/EELS), x-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS) to show replacement of oxygen by nitrogen in the metal/dielectric interface, formation of TiONx, reduction of Ti/N concentration and grain size increment happen with TiN thickness increment and thus may increase the work function. Then, using these finding, we experimentally show 100meV of work function modulation in 10nm TiN Metal-oxide-semiconductor capacitor by using low temperature oxygen annealing. A low thermal budget flow (replicating gate-last) shows similar work function boost up. Also, a work function modulation of 250meV has been possible using oxygen annealing and applying no thermal budget. On the other hand, etch-back of TiN layer can decrease the work function. Thus this study quantifies role of various factors in TiN work function tuning; it also reproduces the thickness varied TiN work function modulation in single thickness TiN thus reducing the

  7. Geothermal Thermoelectric Generation (G-TEG) with Integrated Temperature Driven Membrane Distillation and Novel Manganese Oxide for Lithium Extraction

    Energy Technology Data Exchange (ETDEWEB)

    Renew, Jay [Southern Research Inst., Birmingham, AL (United States); Hansen, Tim [Southern Research Inst., Birmingham, AL (United States)

    2017-06-01

    Southern Research Institute (Southern) teamed with partners Novus Energy Technologies (Novus), Carus Corporation (Carus), and Applied Membrane Technology, Inc. (AMT) to develop an innovative Geothermal ThermoElectric Generation (G-TEG) system specially designed to both generate electricity and extract high-value lithium (Li) from low-temperature geothermal brines. The process combined five modular technologies including – silica removal, nanofiltration (NF), membrane distillation (MD), Mn-oxide sorbent for Li recovery, and TEG. This project provides a proof of concept for each of these technologies. The first step in the process is silica precipitation through metal addition and pH adjustment to prevent downstream scaling in membrane processes. Next, the geothermal brine is concentrated with the first of a two stage MD system. The first stage MD system is made of a high-temperature material to withstand geothermal brine temperatures up to 150C.° The first stage MD is integrated with a G-TEG module for simultaneous energy generation. The release of energy from the MD permeate drives heat transfer across the TE module, producing electricity. The first stage MD concentrate is then treated utilizing an NF system to remove Ca2+ and Mg2+. The NF concentrate will be disposed in the well by reinjection. The NF permeate undergoes concentration in a second stage of MD (polymeric material) to further concentrate Li in the NF permeate and enhance the efficiency of the downstream Li recovery process utilizing a Mn-oxide sorbent. Permeate from both the stages of the MD can be beneficially utilized as the permeates will contain less contaminants than the feed water. The concentrated geothermal brines are then contacted with the Mn-oxide sorbent. After Li from the geothermal brine is adsorbed on the sorbent, HCl is then utilized to regenerate the sorbent and recover the Li. The research and development project showed that the Si removal goal (>80%) could

  8. Dynamic gating window for compensation of baseline shift in respiratory-gated radiation therapy

    International Nuclear Information System (INIS)

    Pepin, Eric W.; Wu Huanmei; Shirato, Hiroki

    2011-01-01

    Purpose: To analyze and evaluate the necessity and use of dynamic gating techniques for compensation of baseline shift during respiratory-gated radiation therapy of lung tumors. Methods: Motion tracking data from 30 lung tumors over 592 treatment fractions were analyzed for baseline shift. The finite state model (FSM) was used to identify the end-of-exhale (EOE) breathing phase throughout each treatment fraction. Using duty cycle as an evaluation metric, several methods of end-of-exhale dynamic gating were compared: An a posteriori ideal gating window, a predictive trend-line-based gating window, and a predictive weighted point-based gating window. These methods were evaluated for each of several gating window types: Superior/inferior (SI) gating, anterior/posterior beam, lateral beam, and 3D gating. Results: In the absence of dynamic gating techniques, SI gating gave a 39.6% duty cycle. The ideal SI gating window yielded a 41.5% duty cycle. The weight-based method of dynamic SI gating yielded a duty cycle of 36.2%. The trend-line-based method yielded a duty cycle of 34.0%. Conclusions: Dynamic gating was not broadly beneficial due to a breakdown of the FSM's ability to identify the EOE phase. When the EOE phase was well defined, dynamic gating showed an improvement over static-window gating.

  9. Travels with Gates - July 2010

    Science.gov (United States)

    New Sanctions SEOUL, South Korea, July 21, 2010 - Secretary of State Hillary Rodham Clinton, in Seoul - Secretary of State Hillary Rodham Clinton and Defense Secretary Robert M. Gates reaffirmed the U.S zone along with Secretary of State Hillary Rodham Clinton and their South Korean counterparts to

  10. Double-disc gate valve

    International Nuclear Information System (INIS)

    Wheatley, S.J.

    1979-01-01

    The invention relates to an improvement in a conventional double-disc gate valve having a vertically movable gate assembly including a wedge, spreaders slidably engaged therewith, a valve disc carried by the spreaders. When the gate assembly is lowered to a selected point in the valve casing, the valve discs are moved transversely outward to close inlet and outlet ports in the casing. The valve includes hold-down means for guiding the disc-and-spreader assemblies as they are moved transversely outward and inward. If such valves are operated at relatively high differential pressures, they sometimes jam during opening. Such jamming has been a problem for many years in gate valves used in gaseous diffusion plants for the separation of uranium isotopes. The invention is based on the finding that the above-mentioned jamming results when the outlet disc tilts about its horizontal axis in a certain way during opening of the valve. In accordance with the invention, tilting of the outlet disc is maintained at a tolerable value by providing the disc with a rigid downwardly extending member and by providing the casing with a stop for limiting inward arcuate movement of the member to a preselected value during opening of the valve

  11. Bill Gates eyes healthcare market.

    Science.gov (United States)

    Dunbar, C

    1995-02-01

    The entrepreneurial spirit is still top in Bill Gates' mind as he look toward healthcare and other growth industries. Microsoft's CEO has not intention of going the way of other large technology companies that became obsolete before they could compete today.

  12. 18O isotopic tracer studies of silicon oxidation in dry oxygen

    International Nuclear Information System (INIS)

    Han, C.J.

    1986-01-01

    Oxidation of silicon in dry oxygen has been an important process in the integrated circuit industry for making gate insulators on metal-oxide-semiconductory (MOS) devices. This work examines this process using isotopic tracers of oxygen to determine the transport mechanisms of oxygen through silicon dioxide. Oxides were grown sequentially using mass-16 and mass-18 oxygen gas sources to label the oxygen molecules from each step. The resulting oxides are analyzed using secondary ion mass spectrometry (SIMS). The results of these analyses suggest two oxidant species are present during the oxidation, each diffuses and oxidizes separately during the process. A model from this finding using a sum of two linear-parabolic growth rates, each representing the growth rate from one of the oxidants, describes the reported oxidation kinetics in the literature closely. A fit of this relationship reveals excellent fits to the data for oxide thicknesses ranging from 30 A to 1 μm and for temperatures ranging from 800 to 1200 0 C. The mass-18 oxygen tracers also enable a direct observation of the oxygen solubility in the silicon dioxide during a dry oxidation process. The SIMS profiles establish a maximum solubility for interstitial oxygen at 1000 0 C at 2 x 10 20 cm -3 . Furthermore, the mass-18 oxygen profiles show negligible network diffusion during an 1000 0 C oxidation

  13. Tertiary treatment of landfill leachate by an integrated Electro-Oxidation/Electro-Coagulation/Electro-Reduction process: Performance and mechanism.

    Science.gov (United States)

    Ding, Jing; Wei, Liangliang; Huang, Huibin; Zhao, Qingliang; Hou, Weizhu; Kabutey, Felix Tetteh; Yuan, Yixing; Dionysiou, Dionysios D

    2018-06-05

    This study presents an integrated Electro-Oxidation/Electro-Coagulation/Electro-Reduction (EO/EC/ER) process for tertiary landfill leachate treatment. The influence of variables including leachate characteristics and operation conditions on the performance of EO/EC/ER process was evaluated. The removal mechanisms were explored by comparing results of anode, cathode, and bipolar electrode substitution experiments. The performance of the process in a scaled-up reactor was investigated to assure the feasibility of the process. Results showed that simultaneous removal of carbonaceous and nitrogenous pollutants was achieved under optimal conditions. Ammonia removal was due to the free chlorine generation of EO while organic matter degradation was achieved by both EO and EC processes. Nitrate removal was attributed to both ER and EC processes, with the higher removal achieved by ER process. In a scaled-up reactor, the EO/EC/ER process was able to remove 50-60% organic matter and 100% ammonia at charge of 1.5 Ah/L with energy consumption of 15 kW h/m 3 . Considering energy cost, the process is more efficient to meet the requirement of organic removal efficiency less than 70%. These results show the feasibility and potential of the EO/EC/ER process as an alternative tertiary treatment to achieve the simultaneous removal of organic matter, ammonia, nitrate, and color of leachate. Copyright © 2018 Elsevier B.V. All rights reserved.

  14. Gaseous Mediators Nitric Oxide and Hydrogen Sulfide in the Mechanism of Gastrointestinal Integrity, Protection and Ulcer Healing

    Directory of Open Access Journals (Sweden)

    Marcin Magierowski

    2015-05-01

    Full Text Available Nitric oxide (NO and hydrogen sulfide (H2S are known as biological messengers; they play an important role in human organism and contribute to many physiological and pathophysiological processes. NO is produced from l-arginine by constitutive NO synthase (NOS and inducible NOS enzymatic pathways. This gaseous mediator inhibits platelet aggregation, leukocyte adhesion and contributes to the vessel homeostasis. NO is known as a vasodilatory molecule involved in control of the gastric blood flow (GBF and the maintenance of gastric mucosal barrier integrity in either healthy gastric mucosa or that damaged by strong irritants. Biosynthesis of H2S in mammals depends upon two enzymes cystathionine-β-synthase and cystathionine γ-lyase. This gaseous mediator, similarly to NO and carbon monoxide, is involved in neuromodulation, vascular contractility and anti-inflammatory activities. For decades, H2S has been known to inhibit cytochrome c oxidase and reduce cell energy production. Nowadays it is generally considered to act through vascular smooth muscle ATP-dependent K+ channels, interacting with intracellular transcription factors and promote sulfhydration of protein cysteine moieties within the cell, but the mechanism of potential gastroprotective and ulcer healing properties of H2S has not been fully explained. The aim of this review is to compare current results of the studies concerning the role of H2S and NO in gastric mucosa protection and outline areas that may pose new opportunities for further development of novel therapeutic targets.

  15. Adaptive control paradigm for photovoltaic and solid oxide fuel cell in a grid-integrated hybrid renewable energy system

    Science.gov (United States)

    Khan, Laiq

    2017-01-01

    The hybrid power system (HPS) is an emerging power generation scheme due to the plentiful availability of renewable energy sources. Renewable energy sources are characterized as highly intermittent in nature due to meteorological conditions, while the domestic load also behaves in a quite uncertain manner. In this scenario, to maintain the balance between generation and load, the development of an intelligent and adaptive control algorithm has preoccupied power engineers and researchers. This paper proposes a Hermite wavelet embedded NeuroFuzzy indirect adaptive MPPT (maximum power point tracking) control of photovoltaic (PV) systems to extract maximum power and a Hermite wavelet incorporated NeuroFuzzy indirect adaptive control of Solid Oxide Fuel Cells (SOFC) to obtain a swift response in a grid-connected hybrid power system. A comprehensive simulation testbed for a grid-connected hybrid power system (wind turbine, PV cells, SOFC, electrolyzer, battery storage system, supercapacitor (SC), micro-turbine (MT) and domestic load) is developed in Matlab/Simulink. The robustness and superiority of the proposed indirect adaptive control paradigm are evaluated through simulation results in a grid-connected hybrid power system testbed by comparison with a conventional PI (proportional and integral) control system. The simulation results verify the effectiveness of the proposed control paradigm. PMID:28329015

  16. Adaptive control paradigm for photovoltaic and solid oxide fuel cell in a grid-integrated hybrid renewable energy system.

    Science.gov (United States)

    Mumtaz, Sidra; Khan, Laiq

    2017-01-01

    The hybrid power system (HPS) is an emerging power generation scheme due to the plentiful availability of renewable energy sources. Renewable energy sources are characterized as highly intermittent in nature due to meteorological conditions, while the domestic load also behaves in a quite uncertain manner. In this scenario, to maintain the balance between generation and load, the development of an intelligent and adaptive control algorithm has preoccupied power engineers and researchers. This paper proposes a Hermite wavelet embedded NeuroFuzzy indirect adaptive MPPT (maximum power point tracking) control of photovoltaic (PV) systems to extract maximum power and a Hermite wavelet incorporated NeuroFuzzy indirect adaptive control of Solid Oxide Fuel Cells (SOFC) to obtain a swift response in a grid-connected hybrid power system. A comprehensive simulation testbed for a grid-connected hybrid power system (wind turbine, PV cells, SOFC, electrolyzer, battery storage system, supercapacitor (SC), micro-turbine (MT) and domestic load) is developed in Matlab/Simulink. The robustness and superiority of the proposed indirect adaptive control paradigm are evaluated through simulation results in a grid-connected hybrid power system testbed by comparison with a conventional PI (proportional and integral) control system. The simulation results verify the effectiveness of the proposed control paradigm.

  17. Facile fabrication of Ag dendrite-integrated anodic aluminum oxide membrane as effective three-dimensional SERS substrate

    Science.gov (United States)

    Zhang, Cong-yun; Lu, Ya; Zhao, Bin; Hao, Yao-wu; Liu, Ya-qing

    2016-07-01

    A novel surface enhanced Raman scattering (SERS)-active substrate has been successfully developed, where Ag-dendrites are assembled on the surface and embedded in the channels of anodic aluminum oxide (AAO) membrane, via electrodeposition in AgNO3/PVP aqueous system. Reaction conditions were systematically investigated to attain the best Raman enhancement. The growth mechanism of Ag dendritic nanostructures has been proposed. The Ag dendrite-integrated AAO membrane with unique hierarchical structures exhibits high SERS activity for detecting rhodamine 6G with a detection limit as low as 1 × 10-11 M. Furthermore, the three-dimensional (3D) substrates display a good reproducibility with the average intensity variations at the major Raman peak less than 12%. Most importantly, the 3D SERS substrates without any surface modification show an outstanding SERS response for the molecules with weak affinity for noble metal surfaces. The potential application for the detection of polycyclic aromatic hydrocarbons (PAHs) was evaluated with fluoranthene as Raman target molecule and a sensitive SERS detection with a limit down to 10-8 M was reached. The 3D SERS-active substrate shows promising potential for rapid detection of trace organic pollutants even weak affinity molecules in the environment.

  18. Life cycle assessment integrated with thermodynamic analysis of bio-fuel options for solid oxide fuel cells.

    Science.gov (United States)

    Lin, Jiefeng; Babbitt, Callie W; Trabold, Thomas A

    2013-01-01

    A methodology that integrates life cycle assessment (LCA) with thermodynamic analysis is developed and applied to evaluate the environmental impacts of producing biofuels from waste biomass, including biodiesel from waste cooking oil, ethanol from corn stover, and compressed natural gas from municipal solid wastes. Solid oxide fuel cell-based auxiliary power units using bio-fuel as the hydrogen precursor enable generation of auxiliary electricity for idling heavy-duty trucks. Thermodynamic analysis is applied to evaluate the fuel conversion efficiency and determine the amount of fuel feedstock needed to generate a unit of electrical power. These inputs feed into an LCA that compares energy consumption and greenhouse gas emissions of different fuel pathways. Results show that compressed natural gas from municipal solid wastes is an optimal bio-fuel option for SOFC-APU applications in New York State. However, this methodology can be regionalized within the U.S. or internationally to account for different fuel feedstock options. Copyright © 2012 Elsevier Ltd. All rights reserved.

  19. Integrating nanohybrid membranes of reduced graphene oxide: chitosan: silica sol gel with fiber optic SPR for caffeine detection

    Science.gov (United States)

    Kant, Ravi; Tabassum, Rana; Gupta, Banshi D.

    2017-05-01

    Caffeine is the most popular psychoactive drug consumed in the world for improving alertness and enhancing wakefulness. However, caffeine consumption beyond limits can result in lot of physiological complications in human beings. In this work, we report a novel detection scheme for caffeine integrating nanohybrid membranes of reduced graphene oxide (rGO) in chitosan modified silica sol gel (rGO: chitosan: silica sol gel) with fiber optic surface plasmon resonance. The chemically synthesized nanohybrid membrane forming the sensing route has been dip coated over silver coated unclad central portion of an optical fiber. The sensor works on the mechanism of modification of dielectric function of sensing layer on exposure to analyte solution which is manifested in terms of red shift in resonance wavelength. The concentration of rGO in polymer network of chitosan and silica sol gel and dipping time of the silver coated probe in the solution of nanohybrid membrane have been optimized to extricate the supreme performance of the sensor. The optimized sensing probe possesses a reasonably good sensitivity and follows an exponentially declining trend within the entire investigating range of caffeine concentration. The sensor boasts of an unparalleled limit of detection value of 1.994 nM and works well in concentration range of 0-500 nM with a response time of 16 s. The impeccable sensor methodology adopted in this work combining fiber optic SPR with nanotechnology furnishes a novel perspective for caffeine determination in commercial foodstuffs and biological fluids.

  20. Ultrasonic fingerprint sensor using a piezoelectric micromachined ultrasonic transducer array integrated with complementary metal oxide semiconductor electronics

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Y.; Fung, S.; Wang, Q.; Horsley, D. A. [Berkeley Sensor and Actuator Center, University of California, Davis, 1 Shields Avenue, Davis, California 95616 (United States); Tang, H.; Boser, B. E. [Berkeley Sensor and Actuator Center, University of California, Berkeley, California 94720 (United States); Tsai, J. M.; Daneman, M. [InvenSense, Inc., 1745 Technology Drive, San Jose, California 95110 (United States)

    2015-06-29

    This paper presents an ultrasonic fingerprint sensor based on a 24 × 8 array of 22 MHz piezoelectric micromachined ultrasonic transducers (PMUTs) with 100 μm pitch, fully integrated with 180 nm complementary metal oxide semiconductor (CMOS) circuitry through eutectic wafer bonding. Each PMUT is directly bonded to a dedicated CMOS receive amplifier, minimizing electrical parasitics and eliminating the need for through-silicon vias. The array frequency response and vibration mode-shape were characterized using laser Doppler vibrometry and verified via finite element method simulation. The array's acoustic output was measured using a hydrophone to be ∼14 kPa with a 28 V input, in reasonable agreement with predication from analytical calculation. Pulse-echo imaging of a 1D steel grating is demonstrated using electronic scanning of a 20 × 8 sub-array, resulting in 300 mV maximum received amplitude and 5:1 contrast ratio. Because the small size of this array limits the maximum image size, mechanical scanning was used to image a 2D polydimethylsiloxane fingerprint phantom (10 mm × 8 mm) at a 1.2 mm distance from the array.

  1. Indirect Nitrous Oxide Emissions from Major Rivers in the World: Integration of a Process-based Model with Observational Data

    Science.gov (United States)

    Zhang, B.; Yao, Y.; Xu, R.; Yang, J.; WANG, Z.; Pan, S.; Tian, H.

    2016-12-01

    The atmospheric concentration of nitrous oxide (N2O), one of major greenhouse gases, has increased over 121% compared with the preindustrial level, and most of the increase arises from anthropogenic activities. Previous studies suggested that indirect emissions from global rivers remains a large source of uncertainty among all the N2O sources and restricted the assessment of N2O budget at both regional and global scales. Here, we have integrated a coupled biogeochemical model (DLEM) with observational data to quantify the magnitude and spatio-temporal variation of riverine N2O emission and attribute the environmental controls of indirect N2O emission from major rivers in the world. Our preliminary results indicate that the magnitude of indirect N2O emission from rivers is closely associated with the stream orders. To include N2O emissions from headwater streams is essential for reducing uncertainty in the estimation of indirect N2O emission. By implementing a set of factorial simulations, we have further quantified the relative contributions of climate, nitrogen deposition, nitrogen fertilizer use, and manure application to riverine N2O emission. Finally, this study has identified major knowledge gaps and uncertainties associated with model structure, parameters and input data that need to be improved in future research.

  2. Exergy assessment and optimization of a cogeneration system based on a solid oxide fuel cell integrated with a Stirling engine

    International Nuclear Information System (INIS)

    Hosseinpour, Javad; Sadeghi, Mohsen; Chitsaz, Ata; Ranjbar, Faramarz; Rosen, Marc A.

    2017-01-01

    Highlights: • A novel cogeneration system driven by a SOFC and Stirling engine is proposed. • Energy and exergy assessments are reported of a novel cogeneration system. • The energy efficiency of the combined system can be achieved 75.88%. • The highest exergy destruction occurs in the air heat exchanger. - Abstract: A cogeneration system based on a methane-fed solid oxide fuel cell (SOFC) integrated with a Stirling engine is analyzed from the viewpoints of energy and exergy. The effects on the system performance are investigated of varying four key system parameters: current density, SOFC inlet temperature, compression ratio and regenerator effectiveness. The energy efficiency of the combined system is found to be 76.32% which is about 24.61% more than that of a stand-alone SOFC plant under the same conditions. Considering exergy efficiency as the only objective function, it is found that, as the SOFC inlet temperature increases, the exergy efficiency of the cogeneration system rises to an optimal value of 56.44% and then decreases. The second law analysis also shows that the air heat exchanger has the greatest exergy destruction rate of all system components. The cooling water of the engine also can supply the heating needs for a small home.

  3. Clock Gating Based Energy Efficient and Thermal Aware Design for Vedic Equation Solver on 28nm and 40nm FPGA

    DEFF Research Database (Denmark)

    Pandey, Bishwajeet; Pandey, Sujeet; Sharma, Shivani

    2016-01-01

    In this paper, we are integrating clock gating in design of energy efficient equation solver circuits based on Vedic mathematics. Clock gating is one of the best energy efficient techniques. The Sutra 'SunyamSamyasamuccaye' says thatif sum of numerator and sum of denominator is same then we can e......, 94.54% for 1800MHz, and 94.02% for 2.2GHz, when we use gated clock instead of un gated one on 40nm FPGA and temperature is 329.85K. Power consumption in 28nm FPGA is less than 40nm FPGA....

  4. High-Performance Flexible Single-Crystalline Silicon Nanomembrane Thin-Film Transistors with High- k Nb2O5-Bi2O3-MgO Ceramics as Gate Dielectric on a Plastic Substrate.

    Science.gov (United States)

    Qin, Guoxuan; Zhang, Yibo; Lan, Kuibo; Li, Lingxia; Ma, Jianguo; Yu, Shihui

    2018-04-18

    A novel method of fabricating flexible thin-film transistor based on single-crystalline Si nanomembrane (SiNM) with high- k Nb 2 O 5 -Bi 2 O 3 -MgO (BMN) ceramic gate dielectric on a plastic substrate is demonstrated in this paper. SiNMs are successfully transferred to a flexible polyethylene terephthalate substrate, which has been plated with indium-tin-oxide (ITO) conductive layer and high- k BMN ceramic gate dielectric layer by room-temperature magnetron sputtering. The BMN ceramic gate dielectric layer demonstrates as high as ∼109 dielectric constant, with only dozens of pA current leakage. The Si-BMN-ITO heterostructure has only ∼nA leakage current at the applied voltage of 3 V. The transistor is shown to work at a high current on/off ratio of above 10 4 , and the threshold voltage is ∼1.3 V, with over 200 cm 2 /(V s) effective channel electron mobility. Bending tests have been conducted and show that the flexible transistors have good tolerance on mechanical bending strains. These characteristics indicate that the flexible single-crystalline SiNM transistors with BMN ceramics as gate dielectric have great potential for applications in high-performance integrated flexible circuit.

  5. Large-scale complementary macroelectronics using hybrid integration of carbon nanotubes and IGZO thin-film transistors.

    Science.gov (United States)

    Chen, Haitian; Cao, Yu; Zhang, Jialu; Zhou, Chongwu

    2014-06-13

    Carbon nanotubes and metal oxide semiconductors have emerged as important materials for p-type and n-type thin-film transistors, respectively; however, realizing sophisticated macroelectronics operating in complementary mode has been challenging due to the difficulty in making n-type carbon nanotube transistors and p-type metal oxide transistors. Here we report a hybrid integration of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors to achieve large-scale (>1,000 transistors for 501-stage ring oscillators) complementary macroelectronic circuits on both rigid and flexible substrates. This approach of hybrid integration allows us to combine the strength of p-type carbon nanotube and n-type indium-gallium-zinc-oxide thin-film transistors, and offers high device yield and low device variation. Based on this approach, we report the successful demonstration of various logic gates (inverter, NAND and NOR gates), ring oscillators (from 51 stages to 501 stages) and dynamic logic circuits (dynamic inverter, NAND and NOR gates).

  6. Construction of a fuzzy and all Boolean logic gates based on DNA

    DEFF Research Database (Denmark)

    M. Zadegan, Reza; Jepsen, Mette D E; Hildebrandt, Lasse

    2015-01-01

    to the operation of the six Boolean logic gates AND, NAND, OR, NOR, XOR, and XNOR. The logic gate complex is shown to work also when implemented in a three-dimensional DNA origami box structure, where it controlled the position of the lid in a closed or open position. Implementation of multiple microRNA sensitive...... DNA locks on one DNA origami box structure enabled fuzzy logical operation that allows biosensing of complex molecular signals. Integrating logic gates with DNA origami systems opens a vast avenue to applications in the fields of nanomedicine for diagnostics and therapeutics....

  7. GaN MOSHEMT employing HfO2 as a gate dielectric with partially etched barrier

    Science.gov (United States)

    Han, Kefeng; Zhu, Lin

    2017-09-01

    In order to suppress the gate leakage current of a GaN high electron mobility transistor (GaN HEMT), a GaN metal-oxide-semiconductor high electron mobility transistor (MOSHEMT) is proposed, in which a metal-oxide-semiconductor gate with high-dielectric-constant HfO2 as an insulating dielectric is employed to replace the traditional GaN HEMT Schottky gate. A 0.5 μm gate length GaN MOSHEMT was fabricated based on the proposed structure, the {{{Al}}}0.28{{{Ga}}}0.72{{N}} barrier layer is partially etched to produce a higher transconductance without deteriorating the transport characteristics of the two-dimensional electron gas in the channel, the gate dielectric is HfO2 deposited by atomic layer deposition. Current-voltage characteristics and radio frequency characteristics are obtained after device preparation, the maximum current density of the device is 900 mA mm-1, the source-drain breakdown voltage is 75 V, gate current is significantly suppressed and the forward gate voltage swing range is about ten times higher than traditional GaN HEMTs, the GaN MOSHEMT also demonstrates radio frequency characteristics comparable to traditional GaN HEMTs with the same gate length.

  8. 'Integration'

    DEFF Research Database (Denmark)

    Olwig, Karen Fog

    2011-01-01

    , while the countries have adopted disparate policies and ideologies, differences in the actual treatment and attitudes towards immigrants and refugees in everyday life are less clear, due to parallel integration programmes based on strong similarities in the welfare systems and in cultural notions...... of equality in the three societies. Finally, it shows that family relations play a central role in immigrants’ and refugees’ establishment of a new life in the receiving societies, even though the welfare society takes on many of the social and economic functions of the family....

  9. Influence of gate recess on the electronic characteristics of β-Ga2O3 MOSFETs

    Science.gov (United States)

    Lv, Yuanjie; Mo, Jianghui; Song, Xubo; He, Zezhao; Wang, Yuangang; Tan, Xin; Zhou, Xingye; Gu, Guodong; Guo, Hongyu; Feng, Zhihong

    2018-05-01

    Gallium oxide (Ga2O3) metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated with gate recess depths of 110 nm and 220 nm, respectively. The gate recess was formed by dry plasma etching with Cr metal as the mask. The fabricated devices with a 25-nm HfO2 gate dielectric both showed a low off-state drain current of about 1.8 × 10-10 A/mm. The effects of recess depth on the electronic characteristics of Ga2O3 MOSFETs were investigated. Upon increasing the recess depth from 110 nm to 220 nm, the saturated drain current decreased from 20.7 mA/mm to 2.6 mA/mm, while the threshold voltage moved increased to +3 V. Moreover, the breakdown voltage increased from 122 V to 190 V. This is mainly because the inverted-trapezoidal gate played the role of a gate-field plate, which suppressed the peak electric field close to the gate.

  10. Liquid–Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing

    KAUST Repository

    Zhang, Yu

    2017-10-17

    Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid–liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the “sensing channel” can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.

  11. Liquid-Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing.

    Science.gov (United States)

    Zhang, Yu; Li, Jun; Li, Rui; Sbircea, Dan-Tiberiu; Giovannitti, Alexander; Xu, Junling; Xu, Huihua; Zhou, Guodong; Bian, Liming; McCulloch, Iain; Zhao, Ni

    2017-11-08

    Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid-liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the "sensing channel" can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.

  12. Insight into DEG/ENaC channel gating from genetics and structure.

    Science.gov (United States)

    Eastwood, Amy L; Goodman, Miriam B

    2012-10-01

    The founding members of the superfamily of DEG/ENaC ion channel proteins are C. elegans proteins that form mechanosensitive channels in touch and pain receptors. For more than a decade, the research community has used mutagenesis to identify motifs that regulate gating. This review integrates insight derived from unbiased in vivo mutagenesis screens with recent crystal structures to develop new models for activation of mechanically gated DEGs.

  13. Simulation of 50-nm Gate Graphene Nanoribbon Transistors

    Directory of Open Access Journals (Sweden)

    Cedric Nanmeni Bondja

    2016-01-01

    Full Text Available An approach to simulate the steady-state and small-signal behavior of GNR MOSFETs (graphene nanoribbon metal-semiconductor-oxide field-effect transistor is presented. GNR material parameters and a method to account for the density of states of one-dimensional systems like GNRs are implemented in a commercial device simulator. This modified tool is used to calculate the current-voltage characteristics as well the cutoff frequency fT and the maximum frequency of oscillation fmax of GNR MOSFETs. Exemplarily, we consider 50-nm gate GNR MOSFETs with N = 7 armchair GNR channels and examine two transistor configurations. The first configuration is a simplified MOSFET structure with a single GNR channel as usually studied by other groups. Furthermore, and for the first time in the literature, we study in detail a transistor structure with multiple parallel GNR channels and interribbon gates. It is shown that the calculated fT of GNR MOSFETs is significantly lower than that of GFETs (FET with gapless large-area graphene channel with comparable gate length due to the mobility degradation in GNRs. On the other hand, GNR MOSFETs show much higher fmax compared to experimental GFETs due the semiconducting nature of the GNR channels and the resulting better saturation of the drain current. Finally, it is shown that the gate control in FETs with multiple parallel GNR channels is improved while the cutoff frequency is degraded compared to single-channel GNR MOSFETs due to parasitic capacitances of the interribbon gates.

  14. Effect of gate voltage polarity on the ionic liquid gating behavior of NdNiO3/NdGaO3 heterostructures

    Directory of Open Access Journals (Sweden)

    Yongqi Dong

    2017-05-01

    Full Text Available The effect of gate voltage polarity on the behavior of NdNiO3 epitaxial thin films during ionic liquid gating is studied using in situ synchrotron X-ray techniques. We show that while negative biases have no discernible effect on the structure or composition of the films, large positive gate voltages result in the injection of a large concentration of oxygen vacancies (∼3% and pronounced lattice expansion (0.17% in addition to a 1000-fold increase in sheet resistance at room temperature. Despite the creation of large defect densities, the heterostructures exhibit a largely reversible switching behavior when sufficient time is provided for the vacancies to migrate in and out of the thin film surface. The results confirm that electrostatic gating takes place at negative gate voltages for p-type complex oxides while positive voltages favor the electrochemical reduction of Ni3+. Switching between positive and negative gate voltages therefore involves a combination of electronic and ionic doping processes that may be utilized in future electrochemical transistors.

  15. A refractory metal gate approach for micronic CMOS technology

    International Nuclear Information System (INIS)

    Lubowiecki, V.; Ledys, J.L.; Plossu, C.; Balland, B.

    1987-01-01

    In the future, devices scaling down, integration density and performance improvements are going to bring a number of conventional circuit design and process techniques to their fundamental limits. To avoid any severe limitations in MOS ULSI (Ultra Large Scale Integration) technologies, interconnection materials and schemes are required to emerge, in order to face the Megabits memory field. Among those, the gate approach will obviously take a keyrole, when the operating speed of ULSI chips will reach the practical upper limits imposed by parasitic resistances and capacitances which stem from the circuit interconnect wiring. Even if fairly suitable for MOS process, doped polycrystalline silicon is being gradually replaced by refractory metal silicide or polycide structures, which match better with low resistivity requirements. However, as we approach the submicronic IC's, higher conductivity materials will be paid more and more attention. Recently, works have been devoted and published on refractory metal gate technologies. Molybdenum or tungsten, deposited either by CVD or PVD methods, are currently reported even if some drawbacks in their process integration still remain. This paper is willing to present such an approach based on tungsten (more reliable than Molybdenum deposited by LPCVD (giving more conductive and more stable films than PVD). Deposition process will be first described. Then CMOS process flow will allow us to focus on specific refractory metal gate issues. Finally, electrical and physical properties will be assessed, which will demonstrate the feasibility of such a technology as well as the compatibility of the tungsten with most of the usual techniques

  16. Polycrystalline diamond RF MOSFET with MoO3 gate dielectric

    Directory of Open Access Journals (Sweden)

    Zeyang Ren

    2017-12-01

    Full Text Available We report the radio frequency characteristics of the diamond metal-oxide-semiconductor field effect transistor with MoO3 gate dielectric for the first time. The device with 2-μm gate length was fabricated on high quality polycrystalline diamond. The maximum drain current of 150 mA/mm at VGS = -5 V and the maximum transconductance of 27 mS/mm were achieved. The extrinsic cutoff frequency of 1.2 GHz and the maximum oscillation frequency of 1.9 GHz have been measured. The moderate frequency characteristics are attributed to the moderate transconductance limited by the series resistance along the channel. We expect that the frequency characteristics of the device can be improved by increasing the magnitude of gm, or fundamentally decreasing the gate-controlled channel resistance and series resistance along the channel, and down-scaling the gate length.

  17. Sub-50 nm gate length SOI transistor development for high performance microprocessors

    International Nuclear Information System (INIS)

    Horstmann, M.; Greenlaw, D.; Feudel, Th.; Wei, A.; Frohberg, K.; Burbach, G.; Gerhardt, M.; Lenski, M.; Stephan, R.; Wieczorek, K.; Schaller, M.; Hohage, J.; Ruelke, H.; Klais, J.; Huebler, P.; Luning, S.; Bentum, R. van; Grasshoff, G.; Schwan, C.; Cheek, J.; Buller, J.; Krishnan, S.; Raab, M.; Kepler, N.

    2004-01-01

    Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI transistors into volume manufacturing for high-speed microprocessors. The key innovations developed for this transistor in order to overcome classical gate oxide and L GATE scaling is an unique differential triple spacer structure, stressed overlayer films inducing strain in the Silicon channel and optimized junctions. This transistor structure yields an outstanding ring oscillator speed with an unloaded inverter delay of 5.5 ps. The found improvements are highly manufacturable and scaleable for future device technologies like FD SOI

  18. Designing 4H-SiC P-shielding trench gate MOSFET to optimize on-off electrical characteristics

    Science.gov (United States)

    Kyoung, Sinsu; Hong, Young-sung; Lee, Myung-hwan; Nam, Tae-jin

    2018-02-01

    In order to enhance specific on-resistance (Ron,sp), the trench gate structure was also introduced into 4H-SiC MOSFET as Si MOSFET. But the 4H-SiC trench gate has worse off-state characteristics than the Si trench gate due to the incomplete gate oxidation process (Šimonka et al., 2017). In order to overcome this problem, P-shielding trench gate MOSFET (TMOS) was proposed and researched in previous studies. But P-shielding has to be designed with minimum design rule in order to protect gate oxide effectively. P-shielding TMOS also has the drawback of on-state characteristics degradation corresponding to off state improvement for minimum design rule. Therefore optimized design is needed to satisfy both on and off characteristics. In this paper, the design parameters were analyzed and optimized so that the 4H-SiC P-shielding TMOS satisfies both on and off characteristics. Design limitations were proposed such that P-shielding is able to defend the gate oxide. The P-shielding layer should have the proper junction depth and concentration to defend the electric field to gate oxide during the off-state. However, overmuch P-shielding junction depth disturbs the on-state current flow, a problem which can be solved by increasing the trench depth. As trench depth increases, however, the breakdown voltage decreases. Therefore, trench depth should be designed with due consideration for on-off characteristics. For this, design conditions and modeling were proposed which allow P-shielding to operate without degradation of on-state characteristics. Based on this proposed model, the 1200 V 4H-SiC P-shielding trench gate MOSFET was designed and optimized.

  19. Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

    Science.gov (United States)

    Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

    2012-07-01

    In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

  20. Integrated use of antioxidant enzymes and oxidative damage in two fish species to assess pollution in man-made hydroelectric reservoirs.

    Science.gov (United States)

    Sakuragui, M M; Paulino, M G; Pereira, C D S; Carvalho, C S; Sadauskas-Henrique, H; Fernandes, M N

    2013-07-01

    This study investigated the relationship between contaminant body burden and the oxidative stress status of the gills and livers of two wild fish species in the Furnas Hydroelectric Power Station (HPS) reservoir (Minas Gerais, Brazil). Gills and livers presented similar pathways of metals and organochlorine bioaccumulation. During June, organochlorines were associated with lipid peroxidation (LPO), indicating oxidative stress due to the inhibition of the antioxidant enzymes superoxide dismutase and glutathione peroxidase. In the most polluted areas, metal concentrations in the liver were associated with metallothionein. During December, contaminants in the gills and liver were associated with catalase activity and LPO. Aldrin/dieldrin was the contaminant most associated with oxidative damage in the livers of both species. This integrated approach shed light on the relationship between adverse biological effects and bioaccumulation of contaminants inputted by intensive agricultural practices and proved to be a suitable tool for assessing the environmental quality of man-made reservoirs. Copyright © 2013 Elsevier Ltd. All rights reserved.