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Sample records for gate dielectric thin

  1. Sol–gel deposited ceria thin films as gate dielectric for CMOS ...

    Indian Academy of Sciences (India)

    Sol–gel deposited ceria thin films as gate dielectric for CMOS technology. ANIL G KHAIRNAR ... The semiconductor roadmap following Moore's law is responsible for ..... The financial support from University Grants Commi- ssion (UGC), New ...

  2. Temperature Effects on a-IGZO Thin Film Transistors Using HfO2 Gate Dielectric Material

    OpenAIRE

    Lin, Yu-Hsien; Chou, Jay-Chi

    2014-01-01

    This study investigated the temperature effect on amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) using hafnium oxide (HfO2) gate dielectric material. HfO2 is an attractive candidate as a high-κ dielectric material for gate oxide because it has great potential to exhibit superior electrical properties with a high drive current. In the process of integrating the gate dielectric and IGZO thin film, postannealing treatment is an essential process for completing the chem...

  3. Yttrium scandate thin film as alternative high-permittivity dielectric for germanium gate stack formation

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Cimang, E-mail: cimang@adam.t.u-tokyo.ac.jp; Lee, Choong Hyun; Nishimura, Tomonori; Toriumi, Akira [Department of Materials Engineering, The University of Tokyo, 7-3-1 Hongo, Tokyo 113-8656 (Japan); JST, CREST, 7-3-1 Hongo, Tokyo 113-8656 (Japan)

    2015-08-17

    We investigated yttrium scandate (YScO{sub 3}) as an alternative high-permittivity (k) dielectric thin film for Ge gate stack formation. Significant enhancement of k-value is reported in YScO{sub 3} comparing to both of its binary compounds, Y{sub 2}O{sub 3} and Sc{sub 2}O{sub 3}, without any cost of interface properties. It suggests a feasible approach to a design of promising high-k dielectrics for Ge gate stack, namely, the formation of high-k ternary oxide out of two medium-k binary oxides. Aggressive scaling of equivalent oxide thickness (EOT) with promising interface properties is presented by using YScO{sub 3} as high-k dielectric and yttrium-doped GeO{sub 2} (Y-GeO{sub 2}) as interfacial layer, for a demonstration of high-k gate stack on Ge. In addition, we demonstrate Ge n-MOSFET performance showing the peak electron mobility over 1000 cm{sup 2}/V s in sub-nm EOT region by YScO{sub 3}/Y-GeO{sub 2}/Ge gate stack.

  4. Investigation of high- k yttrium copper titanate thin films as alternative gate dielectrics

    International Nuclear Information System (INIS)

    Monteduro, Anna Grazia; Ameer, Zoobia; Rizzato, Silvia; Martino, Maurizio; Caricato, Anna Paola; Maruccio, Giuseppe; Tasco, Vittorianna; Lekshmi, Indira Chaitanya; Hazarika, Abhijit; Choudhury, Debraj; Sarma, D D

    2016-01-01

    Nearly amorphous high- k yttrium copper titanate thin films deposited by laser ablation were investigated in both metal–oxide–semiconductor (MOS) and metal–insulator–metal (MIM) junctions in order to assess the potentialities of this material as a gate oxide. The trend of dielectric parameters with film deposition shows a wide tunability for the dielectric constant and AC conductivity, with a remarkably high dielectric constant value of up to 95 for the thick films and conductivity as low as 6  ×  10 −10 S cm −1 for the thin films deposited at high oxygen pressure. The AC conductivity analysis points out a decrease in the conductivity, indicating the formation of a blocking interface layer, probably due to partial oxidation of the thin films during cool-down in an oxygen atmosphere. Topography and surface potential characterizations highlight differences in the thin film microstructure as a function of the deposition conditions; these differences seem to affect their electrical properties. (paper)

  5. Temperature Effects on a-IGZO Thin Film Transistors Using HfO2 Gate Dielectric Material

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2014-01-01

    Full Text Available This study investigated the temperature effect on amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using hafnium oxide (HfO2 gate dielectric material. HfO2 is an attractive candidate as a high-κ dielectric material for gate oxide because it has great potential to exhibit superior electrical properties with a high drive current. In the process of integrating the gate dielectric and IGZO thin film, postannealing treatment is an essential process for completing the chemical reaction of the IGZO thin film and enhancing the gate oxide quality to adjust the electrical characteristics of the TFTs. However, the hafnium atom diffused the IGZO thin film, causing interface roughness because of the stability of the HfO2 dielectric thin film during high-temperature annealing. In this study, the annealing temperature was optimized at 200°C for a HfO2 gate dielectric TFT exhibiting high mobility, a high ION/IOFF ratio, low IOFF current, and excellent subthreshold swing (SS.

  6. Semi-transparent a-IGZO thin-film transistors with polymeric gate dielectric.

    Science.gov (United States)

    Hyung, Gun Woo; Wang, Jian-Xun; Li, Zhao-Hui; Koo, Ja-Ryong; Kwon, Sang Jik; Cho, Eou-Sik; Kim, Young Kwan

    2013-06-01

    We report the fabrication of semi-transparent a-IGZO-based thin-film transistors (TFTs) with crosslinked poly-4-vinylphenol (PVP) gate dielectric layers on PET substrate and thermally-evaporated Al/Ag/Al source and drain (S&D) electrodes, which showed a transmittance of 64% at a 500-nm wavelength and sheet resistance of 16.8 omega/square. The semi-transparent a-IGZO TFTs with a PVP layer exhibited decent saturation mobilities (maximum approximately 5.8 cm2Ns) and on/off current ratios of approximately 10(6).

  7. Low-Temperature Solution-Processed Gate Dielectrics for High-Performance Organic Thin Film Transistors

    Directory of Open Access Journals (Sweden)

    Jaekyun Kim

    2015-10-01

    Full Text Available A low-temperature solution-processed high-k gate dielectric layer for use in a high-performance solution-processed semiconducting polymer organic thin-film transistor (OTFT was demonstrated. Photochemical activation of sol-gel-derived AlOx films under 150 °C permitted the formation of a dense film with low leakage and relatively high dielectric-permittivity characteristics, which are almost comparable to the results yielded by the conventionally used vacuum deposition and high temperature annealing method. Octadecylphosphonic acid (ODPA self-assembled monolayer (SAM treatment of the AlOx was employed in order to realize high-performance (>0.4 cm2/Vs saturation mobility and low-operation-voltage (<5 V diketopyrrolopyrrole (DPP-based OTFTs on an ultra-thin polyimide film (3-μm thick. Thus, low-temperature photochemically-annealed solution-processed AlOx film with SAM layer is an attractive candidate as a dielectric-layer for use in high-performance organic TFTs operated at low voltages.

  8. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    International Nuclear Information System (INIS)

    Lin, Y. H.; Chou, J. C.

    2015-01-01

    We investigated amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT_s) using different high-Κ gate dielectric materials such as silicon nitride (Si_3N_4) and aluminum oxide (Al_2O_3) at low temperature process (<300 degree) and compared them with low temperature silicon dioxide (SiO_2). The IGZO device with high-Κ gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, post annealing treatment is an essential process for completing the process. The chemical reaction of the high-κ/IGZO interface due to heat formation in high-Κ/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-Κ gate dielectric materials and explained the interface effect by charge band diagram.

  9. Investigation of Ultraviolet Light Curable Polysilsesquioxane Gate Dielectric Layers for Pentacene Thin Film Transistors.

    Science.gov (United States)

    Shibao, Hideto; Nakahara, Yoshio; Uno, Kazuyuki; Tanaka, Ichiro

    2016-04-01

    Polysilsesquioxane (PSQ) comprising 3-methacryloxypropyl groups was investigated as an ultraviolet (UV)-light curable gate dielectric-material for pentacene thin film transistors (TFTs). The surface of UV-light cured PSQ films was smoother than that of thermally cured ones, and the pentacene layers deposited on the UV-Iight cured PSQ films consisted of larger grains. However, carrier mobility of the TFTs using the UV-light cured PSQ films was lower than that of the TFTs using the thermally cured ones. It was shown that the cross-linker molecules, which were only added to the UV-light cured PSQ films, worked as a major mobility-limiting factor for the TFTs.

  10. Enhanced ZnO Thin-Film Transistor Performance Using Bilayer Gate Dielectrics

    KAUST Repository

    Alshammari, Fwzah Hamud; Nayak, Pradipta K.; Wang, Zhenwei; Alshareef, Husam N.

    2016-01-01

    We report ZnO TFTs using Al2O3/Ta2O5 bilayer gate dielectrics grown by atomic layer deposition. The saturation mobility of single layer Ta2O5 dielectric TFT was 0.1 cm2 V-1 s-1, but increased to 13.3 cm2 V-1 s-1 using Al2O3/Ta2O5 bilayer dielectric with significantly lower leakage current and hysteresis. We show that point defects present in ZnO film, particularly VZn, are the main reason for the poor TFT performance with single layer dielectric, although interfacial roughness scattering effects cannot be ruled out. Our approach combines the high dielectric constant of Ta2O5 and the excellent Al2O3/ZnO interface quality, resulting in improved device performance. © 2016 American Chemical Society.

  11. Enhanced ZnO Thin-Film Transistor Performance Using Bilayer Gate Dielectrics

    KAUST Repository

    Alshammari, Fwzah Hamud

    2016-08-24

    We report ZnO TFTs using Al2O3/Ta2O5 bilayer gate dielectrics grown by atomic layer deposition. The saturation mobility of single layer Ta2O5 dielectric TFT was 0.1 cm2 V-1 s-1, but increased to 13.3 cm2 V-1 s-1 using Al2O3/Ta2O5 bilayer dielectric with significantly lower leakage current and hysteresis. We show that point defects present in ZnO film, particularly VZn, are the main reason for the poor TFT performance with single layer dielectric, although interfacial roughness scattering effects cannot be ruled out. Our approach combines the high dielectric constant of Ta2O5 and the excellent Al2O3/ZnO interface quality, resulting in improved device performance. © 2016 American Chemical Society.

  12. Pentacene based thin film transistors with high-k dielectric Nd2O3 as a gate insulator

    International Nuclear Information System (INIS)

    Sarma, R.; Saikia, D.

    2010-01-01

    We have investigated the pentacene based Organic Thin Film Transistors (OTFTs) with high-k dielectric Nd 2 O 3 . Use of high dielectric constant (high-k) gate insulator Nd 2 O 3 reduces the threshold voltage and sub threshold swing of the OTFTs. The calculated threshold voltage -2.2V and sub-threshold swing 1V/decade, current ON-OFF ratio is 1.7 X 10 4 and mobility is 0.13cm 2 /V.s. Pentacene film is deposited on Nd 2 O 3 surface using two step deposition method. Deposited pentacene film is found poly crystalline in nature. (author)

  13. Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics

    KAUST Repository

    Salas-Villasenor, A. L.; Mejia, I.; Hovarth, J.; Alshareef, Husam N.; Cha, D. K.; Ramirez-Bon, R.; Gnade, B. E.; Quevedo-Lopez, M. A.

    2010-01-01

    Cadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society.

  14. Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics

    KAUST Repository

    Salas-Villasenor, A. L.

    2010-06-29

    Cadmium sulfide thin film transistors were demonstrated as the n-type device for use in flexible electronics. CdS thin films were deposited by chemical bath deposition (70° C) on either 100 nm HfO2 or SiO2 as the gate dielectrics. Common gate transistors with channel lengths of 40-100 μm were fabricated with source and drain aluminum top contacts defined using a shadow mask process. No thermal annealing was performed throughout the device process. X-ray diffraction results clearly show the hexagonal crystalline phase of CdS. The electrical performance of HfO 2 /CdS -based thin film transistors shows a field effect mobility and threshold voltage of 25 cm2 V-1 s-1 and 2 V, respectively. Improvement in carrier mobility is associated with better nucleation and growth of CdS films deposited on HfO2. © 2010 The Electrochemical Society.

  15. Interface Study on Amorphous Indium Gallium Zinc Oxide Thin Film Transistors Using High-k Gate Dielectric Materials

    Directory of Open Access Journals (Sweden)

    Yu-Hsien Lin

    2015-01-01

    Full Text Available We investigated amorphous indium gallium zinc oxide (a-IGZO thin film transistors (TFTs using different high-k gate dielectric materials such as silicon nitride (Si3N4 and aluminum oxide (Al2O3 at low temperature process (<300°C and compared them with low temperature silicon dioxide (SiO2. The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.

  16. High-density carrier-accumulated and electrically stable oxide thin-film transistors from ion-gel gate dielectric.

    Science.gov (United States)

    Fujii, Mami N; Ishikawa, Yasuaki; Miwa, Kazumoto; Okada, Hiromi; Uraoka, Yukiharu; Ono, Shimpei

    2015-12-18

    The use of indium-gallium-zinc oxide (IGZO) has paved the way for high-resolution uniform displays or integrated circuits with transparent and flexible devices. However, achieving highly reliable devices that use IGZO for low-temperature processes remains a technological challenge. We propose the use of IGZO thin-film transistors (TFTs) with an ionic-liquid gate dielectric in order to achieve high-density carrier-accumulated IGZO TFTs with high reliability, and we discuss a distinctive mechanism for the degradation of this organic-inorganic hybrid device under long-term electrical stress. Our results demonstrated that an ionic liquid or gel gate dielectric provides highly reliable and low-voltage operation with IGZO TFTs. Furthermore, high-density carrier accumulation helps improve the TFT characteristics and reliability, and it is highly relevant to the electronic phase control of oxide materials and the degradation mechanism for organic-inorganic hybrid devices.

  17. Growth Related Carrier Mobility Enhancement of Pentacene Thin-Film Transistors with High-k Oxide Gate Dielectric

    International Nuclear Information System (INIS)

    Ai-Fang, Yu; Qiong, Qi; Peng, Jiang; Chao, Jiang

    2009-01-01

    Carrier mobility enhancement from 0.09 to 0.59 cm 2 /Vs is achieved for pentacene-based thin-film transistors (TFTs) by modifying the HfO 2 gate dielectric with a polystyrene (PS) thin film. The improvement of the transistor's performance is found to be strongly related to the initial film morphologies of pentacene on the dielectrics. In contrast to the three-dimensional island-like growth mode on the HfO 2 surface, the Stranski-Krastanov growth mode on the smooth and nonpolar PS/HfO 2 surface is believed to be the origin of the excellent carrier mobility of the TFTs. A large well-connected first monolayer with fewer boundaries is formed via the Stranski–Krastanov growth mode, which facilitates a charge transport parallel to the substrate and promotes higher carrier mobility. (cross-disciplinary physics and related areas of science and technology)

  18. Electrical dependence on the chemical composition of the gate dielectric in indium gallium zinc oxide thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Tari, Alireza, E-mail: atari@uwaterloo.ca; Lee, Czang-Ho; Wong, William S. [Department of Electrical and Computer Engineering, University of Waterloo, 200 University Avenue West, Waterloo, Ontario N2L 3G1 (Canada)

    2015-07-13

    Bottom-gate thin-film transistors were fabricated by depositing a 50 nm InGaZnO (IGZO) channel layer at 150 °C on three separate gate dielectric films: (1) thermal SiO{sub 2}, (2) plasma-enhanced chemical-vapor deposition (PECVD) SiN{sub x}, and (3) a PECVD SiO{sub x}/SiN{sub x} dual-dielectric. X-ray photoelectron and photoluminescence spectroscopy showed the V{sub o} concentration was dependent on the hydrogen concentration of the underlying dielectric film. IGZO films on SiN{sub x} (high V{sub o}) and SiO{sub 2} (low V{sub o}) had the highest and lowest conductivity, respectively. A PECVD SiO{sub x}/SiN{sub x} dual-dielectric layer was effective in suppressing hydrogen diffusion from the nitride layer into the IGZO and resulted in higher resistivity films.

  19. Electrical characteristics of GdTiO{sub 3} gate dielectric for amorphous InGaZnO thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Her, Jim-Long [Division of Natural Science, Center for General Education, Chang Gung University, Taoyuan 333, Taiwan (China); Pan, Tung-Ming, E-mail: tmpan@mail.cgu.edu.tw [Department of Electronics Engineering, Chang Gung University, Taoyuan 333, Taiwan (China); Liu, Jiang-Hung; Wang, Hong-Jun; Chen, Ching-Hung [Department of Electronics Engineering, Chang Gung University, Taoyuan 333, Taiwan (China); Koyama, Keiichi [Graduate School of Science and Engineering, Kagoshima University, Kagoshima 890-0065 (Japan)

    2014-10-31

    In this article, we studied the structural properties and electrical characteristics of GdTiO{sub 3} gate dielectric for amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistor (TFT) applications. The a-IGZO TFT device featuring the GdTiO{sub 3} gate dielectric exhibited better electrical characteristics, including a small threshold voltage of 0.14 V, a large field-effect mobility of 32.3 cm{sup 2}/V-s, a high I{sub on}/I{sub off} current ratio of 4.2 × 10{sup 8}, and a low subthreshold swing of 213 mV/decade. Furthermore, the electrical instability of GdTiO{sub 3} a-IGZO TFTs was investigated under both positive gate-bias stress (PGBS) and negative gate-bias stress (NGBS) conditions. The electron charge trapping in the gate dielectric dominates the PGBS degradation, while the oxygen vacancies control the NGBS degradation. - Highlights: • Indium–gallium–zinc oxide (a-IGZO) thin-film transistor (TFT) • Structural and electrical properties of the GdTiO{sub 3} film were studied. • a-IGZO TFT featuring GdTi{sub x}O{sub y} dielectric exhibited better electrical characteristics. • TFT instability investigated under positive and negative gate-bias stress conditions.

  20. Study of surface-modified PVP gate dielectric in organic thin film transistors with the nano-particle silver ink source/drain electrode.

    Science.gov (United States)

    Yun, Ho-Jin; Ham, Yong-Hyun; Shin, Hong-Sik; Jeong, Kwang-Seok; Park, Jeong-Gyu; Choi, Deuk-Sung; Lee, Ga-Won

    2011-07-01

    We have fabricated the flexible pentacene based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics treated by CF4/O2 plasma on poly[ethersulfones] (PES) substrate. The solution of gate dielectrics is made by adding methylated poly[melamine-co-formaldehyde] (MMF) to PVP. The PVP gate dielectric layer was cross linked at 90 degrees under UV ozone exposure. Source/drain electrodes are formed by micro contact printing (MCP) method using nano particle silver ink for the purposes of low cost and high throughput. The optimized OTFT shows the device performance with field effect mobility of the 0.88 cm2/V s, subthreshold slope of 2.2 V/decade, and on/off current ratios of 1.8 x 10(-6) at -40 V gate bias. We found that hydrophobic PVP gate dielectric surface can influence on the initial film morphologies of pentacene making dense, which is more important for high performance OTFTs than large grain size. Moreover, hydrophobic gate dielelctric surface reduces voids and -OH groups that interrupt the carrier transport in OTFTs.

  1. Low voltage operation of IGZO thin film transistors enabled by ultrathin Al2O3 gate dielectric

    Science.gov (United States)

    Ma, Pengfei; Du, Lulu; Wang, Yiming; Jiang, Ran; Xin, Qian; Li, Yuxiang; Song, Aimin

    2018-01-01

    An ultrathin, 5 nm, Al2O3 film grown by atomic-layer deposition was used as a gate dielectric for amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). The Al2O3 layer showed a low surface roughness of 0.15 nm, a low leakage current, and a high breakdown voltage of 6 V. In particular, a very high gate capacitance of 720 nF/cm2 was achieved, making it possible for the a-IGZO TFTs to not only operate at a low voltage of 1 V but also exhibit desirable properties including a low threshold voltage of 0.3 V, a small subthreshold swing of 100 mV/decade, and a high on/off current ratio of 1.2 × 107. Furthermore, even under an ultralow operation voltage of 0.6 V, well-behaved transistor characteristics were still observed with an on/off ratio as high as 3 × 106. The electron transport through the Al2O3 layer has also been analyzed, indicating the Fowler-Nordheim tunneling mechanism.

  2. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric

    Science.gov (United States)

    Lee, Dongil; Yoon, Jinsu; Lee, Juhee; Lee, Byung-Hyun; Seol, Myeong-Lok; Bae, Hagyoul; Jeon, Seung-Bae; Seong, Hyejeong; Im, Sung Gap; Choi, Sung-Jin; Choi, Yang-Kyu

    2016-05-01

    Printing electronics has become increasingly prominent in the field of electronic engineering because this method is highly efficient at producing flexible, low-cost and large-scale thin-film transistors. However, TFTs are typically constructed with rigid insulating layers consisting of oxides and nitrides that are brittle and require high processing temperatures, which can cause a number of problems when used in printed flexible TFTs. In this study, we address these issues and demonstrate a method of producing inkjet-printed TFTs that include an ultra-thin polymeric dielectric layer produced by initiated chemical vapor deposition (iCVD) at room temperature and highly purified 99.9% semiconducting carbon nanotubes. Our integrated approach enables the production of flexible logic circuits consisting of CNT-TFTs on a polyethersulfone (PES) substrate that have a high mobility (up to 9.76 cm2 V-1 sec-1), a low operating voltage (less than 4 V), a high current on/off ratio (3 × 104), and a total device yield of 90%. Thus, it should be emphasized that this study delineates a guideline for the feasibility of producing flexible CNT-TFT logic circuits with high performance based on a low-cost and simple fabrication process.

  3. Pentacene thin-film transistors and inverters with plasma-enhanced atomic-layer-deposited Al2O3 gate dielectric

    International Nuclear Information System (INIS)

    Koo, Jae Bon; Lim, Jung Wook; Kim, Seong Hyun; Yun, Sun Jin; Ku, Chan Hoe; Lim, Sang Chul; Lee, Jung Hun

    2007-01-01

    The performances of pentacene thin-film transistor with plasma-enhanced atomic-layer-deposited (PEALD) 150 nm thick Al 2 O 3 dielectric are reported. Saturation mobility of 0.38 cm 2 /V s, threshold voltage of 1 V, subthreshold swing of 0.6 V/decade, and on/off current ratio of about 10 8 have been obtained. Both depletion and enhancement mode inverter have been realized with the change of treatment method of hexamethyldisilazane on PEALD Al 2 O 3 gate dielectric. Full swing depletion mode inverter has been demonstrated at input voltages ranging from 5 V to - 5 V at supply voltage of - 5 V

  4. Self-aligned top-gate InGaZnO thin film transistors using SiO{sub 2}/Al{sub 2}O{sub 3} stack gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Rongsheng; Zhou, Wei; Zhang, Meng; Wong, Man; Kwok, Hoi Sing

    2013-12-02

    Self-aligned top-gate amorphous indium–gallium–zinc oxide (a-IGZO) thin film transistors (TFTs) utilizing SiO{sub 2}/Al{sub 2}O{sub 3} stack thin films as gate dielectric are developed in this paper. Due to high quality of the high-k Al{sub 2}O{sub 3} and good interface between active layer and gate dielectric, the resulting a-IGZO TFT exhibits good electrical performance including field-effect mobility of 9 cm{sup 2}/Vs, threshold voltage of 2.2 V, subthreshold swing of 0.2 V/decade, and on/off current ratio of 1 × 10{sup 7}. With scaling down of the channel length, good characteristics are also obtained with a small shift of the threshold voltage and no degradation of subthreshold swing. - Highlights: • Self-aligned top-gate indium–gallium–zinc oxide thin-film transistor is proposed. • SiO{sub 2}/Al{sub 2}O{sub 3} stack gate dielectric is proposed. • The source/drain areas are hydrogen-doped by CHF{sub 3} plasma. • The devices show good electrical performance and scaling down behavior.

  5. Organic thin film transistors with polymer brush gate dielectrics synthesized by atom transfer radical polymerization

    DEFF Research Database (Denmark)

    Pinto, J.C.; Whiting, G.L.; Khodabakhsh, S.

    2008-01-01

    , synthesized by atom transfer radical polymerization (ATRP), were used to fabricate low voltage OFETs with both evaporated pentacene and solution deposited poly(3-hexylthiophene). The semiconductor-dielectric interfaces in these systems were studied with a variety of methods including scanning force microscopy...

  6. Effect of annealing temperature on structural and electrical properties of high-κ YbTixOy gate dielectrics for InGaZnO thin film transistors

    International Nuclear Information System (INIS)

    Pan, Tung-Ming; Chen, Fa-Hsyang; Hung, Meng-Ning

    2015-01-01

    This paper describes the effect of annealing temperature on the structural properties and electrical characteristics of high–κ YbTi x O y gate dielectrics for indium–gallium–zinc–oxide (IGZO) thin-film transistors (TFTs). X-ray diffraction, x-ray photoelectron spectroscopy and atomic force microscopy were used to study the structural, chemical and morphological features, respectively, of these dielectric films annealed at 200, 300 and 400 °C. The YbTi x O y IGZO TFT that had been annealed at 400 °C exhibited better electrical characteristics, such as a small threshold voltage of 0.53 V, a large field-effect mobility of 19.1 cm 2 V −1 s −1 , a high I on /I off ratio of 2.8 × 10 7 , and a low subthreshold swing of 176 mV dec. −1 , relative to those of the systems that had been subjected to other annealing conditions. This result suggests that YbTi x O y dielectric possesses a higher dielectric constant as well as lower oxygen vacancies (or defects) in the film. In addition, the instability of YbTi x O y IGZO TFT was studied under positive gate-bias stress and negative gate-bias stress conditions. (paper)

  7. Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO2 Gate Dielectrics by CF4 Plasma Treatment

    Science.gov (United States)

    Fan, Ching-Lin; Tseng, Fan-Ping; Tseng, Chiao-Yuan

    2018-01-01

    In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) with a HfO2 gate insulator and CF4 plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO2 gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm2/V∙s (without treatment) to 54.6 cm2/V∙s (with CF4 plasma treatment), which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO2 gate dielectric has also been improved by the CF4 plasma treatment. By applying the CF4 plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device’s immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF4 plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO2 gate dielectric, but also enhances the device’s reliability. PMID:29772767

  8. Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO2 Gate Dielectrics by CF4 Plasma Treatment

    Directory of Open Access Journals (Sweden)

    Ching-Lin Fan

    2018-05-01

    Full Text Available In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs with a HfO2 gate insulator and CF4 plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO2 gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm2/V∙s (without treatment to 54.6 cm2/V∙s (with CF4 plasma treatment, which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO2 gate dielectric has also been improved by the CF4 plasma treatment. By applying the CF4 plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device’s immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF4 plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO2 gate dielectric, but also enhances the device’s reliability.

  9. Electrical Performance and Reliability Improvement of Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors with HfO₂ Gate Dielectrics by CF₄ Plasma Treatment.

    Science.gov (United States)

    Fan, Ching-Lin; Tseng, Fan-Ping; Tseng, Chiao-Yuan

    2018-05-17

    In this work, amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) with a HfO₂ gate insulator and CF₄ plasma treatment was demonstrated for the first time. Through the plasma treatment, both the electrical performance and reliability of the a-IGZO TFT with HfO₂ gate dielectric were improved. The carrier mobility significantly increased by 80.8%, from 30.2 cm²/V∙s (without treatment) to 54.6 cm²/V∙s (with CF₄ plasma treatment), which is due to the incorporated fluorine not only providing an extra electron to the IGZO, but also passivating the interface trap density. In addition, the reliability of the a-IGZO TFT with HfO₂ gate dielectric has also been improved by the CF₄ plasma treatment. By applying the CF₄ plasma treatment to the a-IGZO TFT, the hysteresis effect of the device has been improved and the device's immunity against moisture from the ambient atmosphere has been enhanced. It is believed that the CF₄ plasma treatment not only significantly improves the electrical performance of a-IGZO TFT with HfO₂ gate dielectric, but also enhances the device's reliability.

  10. Tungsten trioxide as high-{kappa} gate dielectric for highly transparent and temperature-stable zinc-oxide-based thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Lorenz, Michael; Wenckstern, Holger von; Grundmann, Marius [Universitaet Leipzig, Fakultaet fuer Physik und Geowissenschaften, Institut fuer Experimentelle Physik II, Linnestr. 5, 04103 Leipzig (Germany)

    2012-07-01

    We demonstrate metal-insulator-semiconductor field-effect transistors with high-{kappa}, room-temperature deposited, highly transparent tungsten trioxide (WO{sub 3}) as gate dielectric. The channel material consists of a zinc oxide (ZnO) thin-film. The transmittance and resistivity of WO{sub 3} films was tuned in order to obtain a highly transparent and insulating WO{sub 3} dielectric. The devices were processed by standard photolithography using lift-off technique. On top of the WO{sub 3} dielectric a highly transparent and conductive oxide consisting of ZnO: Al 3% wt. was deposited. The gate structure of the devices exhibits an average transmittance in the visible spectral range of 86%. The on/off-current ratio is larger than 10{sup 8} with off- and gate leakage-currents below 3 x 10{sup -8} A/cm{sup 2}. Due to the high relative permittivity of {epsilon}{sub r} {approx} 70, a gate voltage sweep of only 2 V is necessary to turn the transistor on and off with a minimum subthreshold swing of 80 mV/decade. The channel mobility of the transistors equals the Hall-effect mobility with a value of 5 cm{sup 2}/Vs. It is furthermore shown, that the devices are stable up to operating temperatures of at least 150 C.

  11. The electrical performance and gate bias stability of an amorphous InGaZnO thin-film transistor with HfO2 high-k dielectrics

    Science.gov (United States)

    Wang, Ruo Zheng; Wu, Sheng Li; Li, Xin Yu; Zhang, Jin Tao

    2017-07-01

    In this study, we set out to fabricate an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) with SiNx/HfO2/SiNx (SHS) sandwiched dielectrics. The J-V and C-V of this SHS film were extracted by the Au/p-Si/SHS/Ti structure. At room temperature the a-IGZO with SHS dielectrics showed the following electrical properties: a threshold voltage of 2.9 V, a subthreshold slope of 0.35 V/decade, an on/off current ratio of 3.5 × 107, and a mobility of 12.8 cm2 V-1 s-1. Finally, we tested the influence of gate bias stress on the TFT, and the result showed that the threshold voltage shifted to a positive voltage when applying a positive gate voltage to the TFT.

  12. Materials Fundamentals of Gate Dielectrics

    CERN Document Server

    Demkov, Alexander A

    2006-01-01

    This book presents materials fundamentals of novel gate dielectrics that are being introduced into semiconductor manufacturing to ensure the continuous scalling of the CMOS devices. This is a very fast evolving field of research so we choose to focus on the basic understanding of the structure, thermodunamics, and electronic properties of these materials that determine their performance in device applications. Most of these materials are transition metal oxides. Ironically, the d-orbitals responsible for the high dielectric constant cause sever integration difficulties thus intrinsically limiting high-k dielectrics. Though new in the electronics industry many of these materials are wel known in the field of ceramics, and we describe this unique connection. The complexity of the structure-property relations in TM oxides makes the use of the state of the art first-principles calculations necessary. Several chapters give a detailed description of the modern theory of polarization, and heterojunction band discont...

  13. A complementary organic inverter of porphyrazine thin films: low-voltage operation using ionic liquid gate dielectrics.

    Science.gov (United States)

    Fujimoto, Takuya; Miyoshi, Yasuhito; Matsushita, Michio M; Awaga, Kunio

    2011-05-28

    We studied a complementary organic inverter consisting of a p-type semiconductor, metal-free phthalocyanine (H(2)Pc), and an n-type semiconductor, tetrakis(thiadiazole)porphyrazine (H(2)TTDPz), operated through the ionic-liquid gate dielectrics of N,N-diethyl-N-methyl(2-methoxyethyl)ammonium bis(trifluoromethylsulfonyl)imide (DEME-TFSI). This organic inverter exhibits high performance with a very low operation voltage below 1.0 V and a dynamic response up to 20 Hz. © The Royal Society of Chemistry 2011

  14. Low-temperature fabrication of sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors

    Science.gov (United States)

    Yao, Rihui; Zheng, Zeke; Xiong, Mei; Zhang, Xiaochen; Li, Xiaoqing; Ning, Honglong; Fang, Zhiqiang; Xie, Weiguang; Lu, Xubing; Peng, Junbiao

    2018-03-01

    In this work, low temperature fabrication of a sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors (TFTs) on polyimide substrates was investigated. The effects of Ar-pressure during the sputtering process and then especially the post-annealing treatments at low temperature (≤200 °C) for HfO2 on reducing the density of defects in the bulk and on the surface were systematically studied. X-ray reflectivity, UV-vis and X-ray photoelectron spectroscopy, and micro-wave photoconductivity decay measurements were carried out and indicated that the high quality of optimized HfO2 film and its high dielectric properties contributed to the low concentration of structural defects and shallow localized defects such as oxygen vacancies. As a result, the well-structured HfO2 gate dielectric exhibited a high density of 9.7 g/cm3, a high dielectric constant of 28.5, a wide optical bandgap of 4.75 eV, and relatively low leakage current. The corresponding flexible a-IGZO TFT on polyimide exhibited an optimal device performance with a saturation mobility of 10.3 cm2 V-1 s-1, an Ion/Ioff ratio of 4.3 × 107, a SS value of 0.28 V dec-1, and a threshold voltage (Vth) of 1.1 V, as well as favorable stability under NBS/PBS gate bias and bending stress.

  15. Sodium beta-alumina thin films as gate dielectrics for AlGaN/GaN metal—insulator—semiconductor high-electron-mobility transistors

    International Nuclear Information System (INIS)

    Tian Ben-Lang; Chen Chao; Li Yan-Rong; Zhang Wan-Li; Liu Xing-Zhao

    2012-01-01

    Sodium beta-alumina (SBA) is deposited on AlGaN/GaN by using a co-deposition process with sodium and Al 2 O 3 as the precursors. The X-ray diffraction (XRD) spectrum reveals that the deposited thin film is amorphous. The binding energy and composition of the deposited thin film, obtained from the X-ray photoelectron spectroscopy (XPS) measurement, are consistent with those of SBA. The dielectric constant of the SBA thin film is about 50. Each of the capacitance—voltage characteristics obtained at five different frequencies shows a high-quality interface between SBA and AlGaN. The interface trap density of metal—insulator—semiconductor high-electron-mobility transistor (MISHEMT) is measured to be (3.5∼9.5)×10 10 cm −2 ·eV −1 by the conductance method. The fixed charge density of SBA dielectric is on the order of 2.7×10 12 cm −2 . Compared with the AlGaN/GaN metal—semiconductor heterostructure high-electron-mobility transistor (MESHEMT), the AlGaN/GaN MISHEMT usually has a threshold voltage that shifts negatively. However, the threshold voltage of the AlGaN/GaN MISHEMT using SBA as the gate dielectric shifts positively from −5.5 V to −3.5 V. From XPS results, the surface valence-band maximum (VBM-EF) of AlGaN is found to decrease from 2.56 eV to 2.25 eV after the SBA thin film deposition. The possible reasons why the threshold voltage of AlGaN/GaN MISHEMT with the SBA gate dielectric shifts positively are the influence of SBA on surface valence-band maximum (VBM-EF), the reduction of interface traps and the effects of sodium ions, and/or the fixed charges in SBA on the two-dimensional electron gas (2DEG). (condensed matter: structural, mechanical, and thermal properties)

  16. Blending effect of 6,13-bis(triisopropylsilylethynyl) pentacene–graphene composite layers for flexible thin film transistors with a polymer gate dielectric

    International Nuclear Information System (INIS)

    Basu, Sarbani; Adriyanto, Feri; Wang, Yeong-Her

    2014-01-01

    Solution processible poly(4-vinylphenol) is employed as a transistor dielectric material for low cost processing on flexible substrates at low temperatures. A 6,13-bis (triisopropylsilylethynyl) (TIPS) pentacene–graphene hybrid semiconductor is drop cast to fabricate bottom-gate and bottom-contact field-effect transistor devices on flexible and glass substrates under an ambient air environment. A few layers of graphene flakes increase the area in the conduction channel, and form bridge connections between the crystalline regions of the semiconductor layer which can change the surface morphology of TIPS pentacene films. The TIPS pentacene–graphene hybrid semiconductor-based organic thin film transistors (OTFTs) cross-linked with a poly(4-vinylphenol) gate dielectric exhibit an effective field-effect mobility of 0.076 cm 2  V −1  s −1 and a threshold voltage of −0.7 V at V gs = −40 V. By contrast, typical TIPS pentacene shows four times lower mobility of 0.019 cm 2  V −1  s −1 and a threshold voltage of 5 V. The graphene/TIPS pentacene hybrids presented in this paper can enhance the electrical characteristics of OTFTs due to their high crystallinity, uniform large-grain distribution, and effective reduction of crystal misorientation of the organic semiconductor layer, as confirmed by x-ray diffraction spectroscopy, atomic force microscopy, and optical microscopy studies. (paper)

  17. Blending effect of 6,13-bis(triisopropylsilylethynyl) pentacene-graphene composite layers for flexible thin film transistors with a polymer gate dielectric.

    Science.gov (United States)

    Basu, Sarbani; Adriyanto, Feri; Wang, Yeong-Her

    2014-02-28

    Solution processible poly(4-vinylphenol) is employed as a transistor dielectric material for low cost processing on flexible substrates at low temperatures. A 6,13-bis (triisopropylsilylethynyl) (TIPS) pentacene-graphene hybrid semiconductor is drop cast to fabricate bottom-gate and bottom-contact field-effect transistor devices on flexible and glass substrates under an ambient air environment. A few layers of graphene flakes increase the area in the conduction channel, and form bridge connections between the crystalline regions of the semiconductor layer which can change the surface morphology of TIPS pentacene films. The TIPS pentacene-graphene hybrid semiconductor-based organic thin film transistors (OTFTs) cross-linked with a poly(4-vinylphenol) gate dielectric exhibit an effective field-effect mobility of 0.076 cm(2) V(-1) s(-1) and a threshold voltage of -0.7 V at V(gs) = -40 V. By contrast, typical TIPS pentacene shows four times lower mobility of 0.019 cm(2) V(-1) s(-1) and a threshold voltage of 5 V. The graphene/TIPS pentacene hybrids presented in this paper can enhance the electrical characteristics of OTFTs due to their high crystallinity, uniform large-grain distribution, and effective reduction of crystal misorientation of the organic semiconductor layer, as confirmed by x-ray diffraction spectroscopy, atomic force microscopy, and optical microscopy studies.

  18. Structural and electrical characteristics of high-κ ErTixOy gate dielectrics on InGaZnO thin-film transistors

    International Nuclear Information System (INIS)

    Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Li, Wei-Chen; Matsuda, Yasuhiro H.; Pan, Tung-Ming

    2013-01-01

    In this paper, we investigated the structural properties and electrical characteristics of high-κ ErTi x O y gate dielectrics on indium-gallium-zinc oxide thin-film transistors (IGZO TFTs). We used X-ray diffraction, X-ray photoelectron spectroscopy, and atomic force microscopy to investigate the structural and morphological features of these dielectric films after they had been subjected to annealing at various temperatures. The high-κ ErTi x O y IGZO TFT device annealed at 400 °C exhibited better electrical characteristics in terms of a large field-effect mobility (8.24 cm 2 /V-s), low threshold voltage (0.36 V), small subthreshold swing (130 mV/dec), and high I on/off ratio(3.73 × 10 6 ). These results are attributed to the reduction of the trap states and oxygen vacancies between the ErTi x O y film and IGZO active layer interface during high-temperature annealing in oxygen ambient. The reliability of voltage stress also can be improved by the oxygen annealing at 400 °C. - Highlights: • ErTi x O y InGaZnO thin-film transistors (TFT). • Structural and electrical properties of the TFT were investigated. • TFT device annealed at 400 °C exhibited better electrical characteristics. • Reliability of TFT device can be improved by annealing at 400 °C

  19. Low-voltage organic thin film transistors (OTFTs) using crosslinked polyvinyl alcohol (PVA)/neodymium oxide (Nd2O3) bilayer gate dielectrics

    Science.gov (United States)

    Khound, Sagarika; Sarma, Ranjit

    2018-01-01

    We have reported here on the design, processing and dielectric properties of pentacene-based organic thin film transitors (OTFTs) with a bilayer gate dilectrics of crosslinked PVA/Nd2O3 which enables low-voltage organic thin film operations. The dielectric characteristics of PVA/Nd2O3 bilayer films are studied by capacitance-voltage ( C- V) and current-voltage ( I- V) curves in the metal-insulator-metal (MIM) structure. We have analysed the output electrical responses and transfer characteristics of the OTFT devices to determine their performance of OTFT parameters. The mobility of 0.94 cm2/Vs, the threshold voltage of - 2.8 V, the current on-off ratio of 6.2 × 105, the subthreshold slope of 0.61 V/decade are evaluated. Low leakage current of the device is observed from current density-electric field ( J- E) curve. The structure and the morphology of the device are studied using X-ray diffraction (XRD) and atomic force microscope (AFM), respectively. The study demonstrates an effective way to realize low-voltage, high-performance OTFTs at low cost.

  20. Plasma nitridation optimization for sub-15 A gate dielectrics

    NARCIS (Netherlands)

    Cubaynes, F.N; Schmitz, Jurriaan; van der Marel, C.; Snijders, J.H.M.; Veloso, A.; Rothschild, A.; Olsen, C.; Date, L.

    The work investigates the impact of plasma nitridation process parameters upon the physical properties and upon the electrical performance of sub-15 A plasma nitrided gate dielectrics. The nitrogen distribution and chemical bonding of ultra-thin plasma nitrided films have been investigated using

  1. Comparative studies of AlGaN/GaN MOS-HEMTs with stacked gate dielectrics by the mixed thin film growth method

    International Nuclear Information System (INIS)

    Chou, Bo-Yi; Hsu, Wei-Chou; Liu, Han-Yin; Ho, Chiu-Sheng; Lee, Ching-Sung

    2013-01-01

    This paper reports Al 0.27 Ga 0.73 N/GaN metal–oxide–semiconductor high electron mobility transistors (MOS-HEMTs) with stacked Al 2 O 3 /HfO 2 gate dielectrics by using hydrogen peroxideoxidation/sputtering techniques. The Al 2 O 3 employed as a gate dielectric and surface passivation layer effectively suppresses the gate leakage current, improves RF drain current collapse and exhibits good thermal stability. Moreover, by stacking the good insulating high-k HfO 2 dielectric further suppresses the gate leakage, enhances the dielectric breakdown field and power-added efficiency, and decreases the equivalent oxide thickness. The present MOS-HEMT design has demonstrated superior improvements of 10.1% (16.4%) in the maximum drain–source current (I DS,max ), 11.4% (22.5%) in the gate voltage swing and 12.5%/14.4% (21.9%/22.3%) in the two-terminal gate–drain breakdown/turn-on voltages (BV GD /V ON ), and the present design also demonstrates the lowest gate leakage current and best thermal stability characteristics as compared to two reference MOS-HEMTs with a single Al 2 O 3 /(HfO 2 ) dielectric layer of the same physical thickness. (invited paper)

  2. A comparative study of amorphous InGaZnO thin-film transistors with HfOxNy and HfO2 gate dielectrics

    International Nuclear Information System (INIS)

    Zou, Xiao; Tong, Xingsheng; Fang, Guojia; Yuan, Longyan; Zhao, Xingzhong

    2010-01-01

    High-κ HfO x N y and HfO 2 films are applied to amorphous InGaZnO (a-IGZO) devices as gate dielectric using radio-frequency reactive sputtering. The electrical characteristics and reliability of a-IGZO metal–insulator–semiconductor (MIS) capacitors and thin-film transistors (TFTs) are then investigated. Experimental results indicate that the nitrogen incorporation into HfO 2 can effectively improve the interface quality and enhance the reliability of the devices. Electrical properties with an interface-state density of 5.2 × 10 11 eV −1 cm −2 , capacitance equivalent thickness of 1.65 nm, gate leakage current density of 3.4 × 10 −5 A cm −2 at V fb +1 V, equivalent permittivity of 23.6 and hysteresis voltage of 110 mV are obtained for an Al/HfO x N y /a-IGZO MIS capacitor. Superior performance of HfO x N y /a-IGZO TFTs has also been achieved with a low threshold voltage of 0.33 V, a high saturation mobility of 12.1 cm 2 V −1 s −1 and a large on–off current ratio up to 7 × 10 7 (W/L = 500/20 µm) at 3 V

  3. High-Performance Flexible Single-Crystalline Silicon Nanomembrane Thin-Film Transistors with High- k Nb2O5-Bi2O3-MgO Ceramics as Gate Dielectric on a Plastic Substrate.

    Science.gov (United States)

    Qin, Guoxuan; Zhang, Yibo; Lan, Kuibo; Li, Lingxia; Ma, Jianguo; Yu, Shihui

    2018-04-18

    A novel method of fabricating flexible thin-film transistor based on single-crystalline Si nanomembrane (SiNM) with high- k Nb 2 O 5 -Bi 2 O 3 -MgO (BMN) ceramic gate dielectric on a plastic substrate is demonstrated in this paper. SiNMs are successfully transferred to a flexible polyethylene terephthalate substrate, which has been plated with indium-tin-oxide (ITO) conductive layer and high- k BMN ceramic gate dielectric layer by room-temperature magnetron sputtering. The BMN ceramic gate dielectric layer demonstrates as high as ∼109 dielectric constant, with only dozens of pA current leakage. The Si-BMN-ITO heterostructure has only ∼nA leakage current at the applied voltage of 3 V. The transistor is shown to work at a high current on/off ratio of above 10 4 , and the threshold voltage is ∼1.3 V, with over 200 cm 2 /(V s) effective channel electron mobility. Bending tests have been conducted and show that the flexible transistors have good tolerance on mechanical bending strains. These characteristics indicate that the flexible single-crystalline SiNM transistors with BMN ceramics as gate dielectric have great potential for applications in high-performance integrated flexible circuit.

  4. Synthesis and electrical characterization of low-temperature thermal-cured epoxy resin/functionalized silica hybrid-thin films for application as gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Na, Moonkyong, E-mail: nmk@keri.re.kr [HVDC Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of); System on Chip Chemical Process Research Center, Department of Chemical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, 790-784 (Korea, Republic of); Kang, Young Taec [Creative and Fundamental Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of); Department of Polymer Science and Engineering, Pusan National University, Busan, 609-735 (Korea, Republic of); Kim, Sang Cheol [HVDC Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of); Kim, Eun Dong [Creative and Fundamental Research Division, Korea Electrotechnology Research Institute, Changwon, 642-120 (Korea, Republic of)

    2013-07-31

    Thermal-cured hybrid materials were synthesized from homogenous hybrid sols of epoxy resins and organoalkoxysilane-functionalized silica. The chemical structures of raw materials and obtained hybrid materials were characterized using Fourier transform infrared spectroscopy. The thermal resistance of the hybrids was enhanced by hybridization. The interaction between epoxy matrix and the silica particles, which caused hydrogen bonding and van der Waals force was strengthened by organoalkoxysilane. The degradation temperature of the hybrids was improved by approximately 30 °C over that of the parent epoxy material. The hybrid materials were formed into uniformly coated thin films of about 50 nm-thick using a spin coater. An optimum mixing ratio was used to form smooth-surfaced hybrid films. The electrical property of the hybrid film was characterized, and the leakage current was found to be well below 10{sup −6} A cm{sup −2}. - Highlights: • Preparation of thermal-curable hybrid materials using epoxy resin and silica. • The thermal stability was enhanced through hybridization. • The insulation property of hybrid film was investigated as gate dielectrics.

  5. Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors.

    Science.gov (United States)

    Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Matsuda, Yasuhiro H; Pan, Tung-Ming

    2013-01-08

    In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric.

  6. Band Alignment and Optical Properties of (ZrO20.66(HfO20.34 Gate Dielectrics Thin Films on p-Si (100

    Directory of Open Access Journals (Sweden)

    Dahlang Tahir

    2011-11-01

    Full Text Available (ZrO20.66(HfO20.34 dielectric films on p-Si (100 were grown by atomic layer deposition method, for which the conduction band offsets, valence band offsets and band gaps were obtained by using X-ray photoelectron spectroscopy and reflection electron energy loss spectroscopy. The band gap, valence and conduction band offset values for (ZrO20.66(HfO20.34 dielectric thin film, grown on Si substrate were about 5.34, 2.35 and 1.87 eV respectively. This band alignment was similar to that of ZrO2. In addition, The dielectric function ε (k, ω, index of refraction n and the extinction coefficient k for the (ZrO20.66(HfO20.34 thin films were obtained from a quantitative analysis of REELS data by comparison to detailed dielectric response model calculations using the QUEELS-ε (k,ω-REELS software package. These optical properties are similar with ZrO2 dielectric thin films.

  7. Direct deposition of aluminum oxide gate dielectric on graphene channel using nitrogen plasma treatment

    International Nuclear Information System (INIS)

    Lim, Taekyung; Kim, Dongchool; Ju, Sanghyun

    2013-01-01

    Deposition of high-quality dielectric on a graphene channel is an essential technology to overcome structural constraints for the development of nano-electronic devices. In this study, we investigated a method for directly depositing aluminum oxide (Al 2 O 3 ) on a graphene channel through nitrogen plasma treatment. The deposited Al 2 O 3 thin film on graphene demonstrated excellent dielectric properties with negligible charge trapping and de-trapping in the gate insulator. A top-gate-structural graphene transistor was fabricated using Al 2 O 3 as the gate dielectric with nitrogen plasma treatment on graphene channel region, and exhibited p-type transistor characteristics

  8. Temperature-dependent field-effect carrier mobility in organic thin-film transistors with a gate SiO2 dielectric modified by H2O2 treatment

    Science.gov (United States)

    Lin, Yow-Jon; Hung, Cheng-Chun

    2018-02-01

    The effect of the modification of a gate SiO2 dielectric using an H2O2 solution on the temperature-dependent behavior of carrier transport for pentacene-based organic thin-film transistors (OTFTs) is studied. H2O2 treatment leads to the formation of Si(-OH) x (i.e., the formation of a hydroxylated layer) on the SiO2 surface that serves to reduce the SiO2 capacitance and weaken the pentacene-SiO2 interaction, thus increasing the field-effect carrier mobility ( µ) in OTFTs. The temperature-dependent behavior of carrier transport is dominated by the multiple trapping model. Note that H2O2 treatment leads to a reduction in the activation energy. The increased value of µ is also attributed to the weakening of the interactions of the charge carriers with the SiO2 dielectric that serves to reduce the activation energy.

  9. The Performance Improvement of N2 Plasma Treatment on ZrO2 Gate Dielectric Thin-Film Transistors with Atmospheric Pressure Plasma-Enhanced Chemical Vapor Deposition IGZO Channel.

    Science.gov (United States)

    Wu, Chien-Hung; Huang, Bo-Wen; Chang, Kow-Ming; Wang, Shui-Jinn; Lin, Jian-Hong; Hsu, Jui-Mei

    2016-06-01

    The aim of this paper is to illustrate the N2 plasma treatment for high-κ ZrO2 gate dielectric stack (30 nm) with indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs). Experimental results reveal that a suitable incorporation of nitrogen atoms could enhance the device performance by eliminating the oxygen vacancies and provide an amorphous surface with better surface roughness. With N2 plasma treated ZrO2 gate, IGZO channel is fabricated by atmospheric pressure plasma-enhanced chemical vapor deposition (AP-PECVD) technique. The best performance of the AP-PECVD IGZO TFTs are obtained with 20 W-90 sec N2 plasma treatment with field-effect mobility (μ(FET)) of 22.5 cm2/V-s, subthreshold swing (SS) of 155 mV/dec, and on/off current ratio (I(on)/I(off)) of 1.49 x 10(7).

  10. Investigation of terbium scandate as an alternative gate dielectric in fully depleted transistors

    OpenAIRE

    Roeckerath, M.; Lopes, J. M. J.; Durgun Özben, E.; Urban, C.; Schubert, J.; Mantl, S.; Jia, Y.; Schlom, D.G.

    2010-01-01

    Terbium scandate thin films were deposited by e-gun evaporation on (100) silicon substrates. Rutherford backscattering spectrometry and x-ray diffraction studies revealed homogeneous chemical compositions of the films. A dielectric constant of 26 and CV-curves with small hystereses were measured as well as low leakage current densities of < 1 nA/cm(2). Fully depleted n-type field-effect transistors on thin silicon-on-insulator substrates with terbium scandate gate dielectrics were fabricated ...

  11. Nano-CMOS gate dielectric engineering

    CERN Document Server

    Wong, Hei

    2011-01-01

    According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the gate dielectric thickness will be shrunk to less than half-nanometer oxide equivalent thickness (EOT) to maintain proper operation of the transistors, leaving high-k materials as the only viable solution for such small-scale EOT. This comprehensive, up-to-date text covering the physics, materials, devic

  12. Analyzing the effect of gate dielectric on the leakage currents

    Directory of Open Access Journals (Sweden)

    Sakshi

    2016-01-01

    Full Text Available An analytical threshold voltage model for MOSFETs has been developed using different gate dielectric oxides by using MATLAB software. This paper explains the dependency of threshold voltage on the dielectric material. The variation in the subthreshold currents with the change in the threshold voltage sue to the change of dielectric material has also been studied.

  13. Bias Stability Enhancement in Thin-Film Transistor with a Solution-Processed ZrO2 Dielectric as Gate Insulator

    Directory of Open Access Journals (Sweden)

    Shangxiong Zhou

    2018-05-01

    Full Text Available In this paper, a high-k metal-oxide film (ZrO2 was successfully prepared by a solution-phase method, and whose physical properties were measured by X-ray diffraction (XRD, X-ray reflectivity (XRR and atomic force microscopy (AFM. Furthermore, indium–gallium–zinc oxide thin-film transistors (IGZO-TFTs with high-k ZrO2 dielectric layers were demonstrated, and the electrical performance and bias stability were investigated in detail. By spin-coating 0.3 M precursor six times, a dense ZrO2 film, with smoother surface and fewer defects, was fabricated. The TFT devices with optimal ZrO2 dielectric exhibit a saturation mobility up to 12.7 cm2 V−1 s−1, and an on/off ratio as high as 7.6 × 105. The offset of the threshold voltage was less than 0.6 V under positive and negative bias stress for 3600 s.

  14. Study on influences of TiN capping layer on time-dependent dielectric breakdown characteristic of ultra-thin EOT high- k metal gate NMOSFET with kMC TDDB simulations

    International Nuclear Information System (INIS)

    Xu Hao; Yang Hong; Luo Wei-Chun; Xu Ye-Feng; Wang Yan-Rong; Tang Bo; Wang Wen-Wu; Qi Lu-Wei; Li Jun-Feng; Yan Jiang; Zhu Hui-Long; Zhao Chao; Chen Da-Peng; Ye Tian-Chun

    2016-01-01

    The thickness effect of the TiN capping layer on the time dependent dielectric breakdown (TDDB) characteristic of ultra-thin EOT high- k metal gate NMOSFET is investigated in this paper. Based on experimental results, it is found that the device with a thicker TiN layer has a more promising reliability characteristic than that with a thinner TiN layer. From the charge pumping measurement and secondary ion mass spectroscopy (SIMS) analysis, it is indicated that the sample with the thicker TiN layer introduces more Cl passivation at the IL/Si interface and exhibits a lower interface trap density. In addition, the influences of interface and bulk trap density ratio N it / N ot are studied by TDDB simulations through combining percolation theory and the kinetic Monte Carlo (kMC) method. The lifetime reduction and Weibull slope lowering are explained by interface trap effects for TiN capping layers with different thicknesses. (paper)

  15. Poly(methyl methacrylate) as a self-assembled gate dielectric for graphene field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Sanne, A.; Movva, H. C. P.; Kang, S.; McClellan, C.; Corbet, C. M.; Banerjee, S. K. [Microelectronics Research Center, University of Texas, Austin, Texas 78758 (United States)

    2014-02-24

    We investigate poly(methyl methacrylate) (PMMA) as a low thermal budget organic gate dielectric for graphene field effect-transistors (GFETs) based on a simple process flow. We show that high temperature baking steps above the glass transition temperature (∼130 °C) can leave a self-assembled, thin PMMA film on graphene, where we get a gate dielectric almost for “free” without additional atomic layer deposition type steps. Electrical characterization of GFETs with PMMA as a gate dielectric yields a dielectric constant of k = 3.0. GFETs with thinner PMMA dielectrics have a lower dielectric constant due to decreased polarization arising from neutralization of dipoles and charged carriers as baking temperatures increase. The leakage through PMMA gate dielectric increases with decreasing dielectric thickness and increasing electric field. Unlike conventional high-k gate dielectrics, such low-k organic gate dielectrics are potentially attractive for devices such as the proposed Bilayer pseudoSpin Field-Effect Transistor or flexible high speed graphene electronics.

  16. Thin film transistors for flexible electronics: Contacts, dielectrics and semiconductors

    KAUST Repository

    Quevedo-López, Manuel Angel Quevedo

    2011-06-01

    The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed. Copyright © 2011 American Scientific Publishers.

  17. Thin film transistors for flexible electronics: Contacts, dielectrics and semiconductors

    KAUST Repository

    Quevedo-Ló pez, Manuel Angel Quevedo; Wondmagegn, Wudyalew T.; Alshareef, Husam N.; Ramí rez-Bon, Rafael; Gnade, Bruce E.

    2011-01-01

    The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed. Copyright © 2011 American Scientific Publishers.

  18. Effects of thermal annealing on the electrical characteristics of In-Ga-Zn-O thin-film transistors with Al2O3 gate dielectric

    International Nuclear Information System (INIS)

    Zhang, Wen-Peng; Chen, Sun; Qian, Shi-Bing; Ding, Shi-Jin

    2015-01-01

    We studied how the performance of In–Ga–Zn–O (IGZO) thin film transistors (TFTs) with Al 2 O 3 gate insulator was affected by post-fabrication annealing temperature and annealing time. At a fixed annealing time of 2 min, the IGZO TFT exhibited the best transfer and output characteristics in the case of 300 °C in N 2 atmosphere, which is attributed to the achievement of appropriate carrier concentration and Hall mobility in the IGZO film. Further, it was found that both of the carrier concentration and Hall mobility in the IGZO film increased with the increment of annealing temperature. For the annealing temperature of 300 °C, the performance of the IGZO TFT was further improved by extending annealing time to 5 min, i.e., the field effect mobility, sub-threshold swing and on/off current ratio were 11.6 cm 2 /(V · s), 0.42 V dec −1 and 10 6 , respectively. The underlying mechanism was discussed. (paper)

  19. Surface properties of SiO2 with and without H2O2 treatment as gate dielectrics for pentacene thin-film transistor applications

    Science.gov (United States)

    Hung, Cheng-Chun; Lin, Yow-Jon

    2018-01-01

    The effect of H2O2 treatment on the surface properties of SiO2 is studied. H2O2 treatment leads to the formation of Si(sbnd OH)x at the SiO2 surface that serves to reduce the number of trap states, inducing the shift of the Fermi level toward the conduction band minimum. H2O2 treatment also leads to a noticeable reduction in the value of the SiO2 capacitance per unit area. The effect of SiO2 layers with H2O2 treatment on the behavior of carrier transports for the pentacene/SiO2-based organic thin-film transistor (OTFT) is also studied. Experimental identification confirms that the shift of the threshold voltage towards negative gate-source voltages is due to the reduced number of trap states in SiO2 near the pentacene/SiO2 interface. The existence of a hydrogenated layer between pentacene and SiO2 leads to a change in the pentacene-SiO2 interaction, increasing the value of the carrier mobility.

  20. Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

    International Nuclear Information System (INIS)

    Besleaga, C.; Stan, G.E.; Pintilie, I.; Barquinha, P.; Fortunato, E.; Martins, R.

    2016-01-01

    Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

  1. Transparent field-effect transistors based on AlN-gate dielectric and IGZO-channel semiconductor

    Energy Technology Data Exchange (ETDEWEB)

    Besleaga, C.; Stan, G.E.; Pintilie, I. [National Institute of Materials Physics, 405A Atomistilor, 077125 Magurele-Ilfov (Romania); Barquinha, P.; Fortunato, E. [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal); Martins, R., E-mail: rm@uninova.pt [CENIMAT/I3N, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, FCT, Universidade Nova de Lisboa, and CEMOP-UNINOVA, 2829-516 Caparica (Portugal)

    2016-08-30

    Highlights: • TFTs based on IGZO channel semiconductor and AlN gate dielectric were fabricated. • AlN films – a viable and cheap gate dielectric alternative for transparent TFTs. • Influence of gate dielectric layer thickness on TFTs electrical characteristics. • No degradation of AlN gate dielectric was observed during devices stress testing. - Abstract: The degradation of thin-film transistors (TFTs) caused by the self-heating effect constitutes a problem to be solved for the next generation of displays. Aluminum nitride (AlN) is a viable alternative for gate dielectric of TFTs due to its good thermal conductivity, matching coefficient of thermal expansion to indium–gallium–zinc-oxide, and excellent stability at high temperatures. Here, AlN thin films of different thicknesses were fabricated by a low temperature reactive radio-frequency magnetron sputtering process, using a low cost, metallic Al target. Their electrical properties have been thoroughly assessed. Furthermore, the 200 nm and 500 nm thick AlN layers have been integrated as gate-dielectric in transparent TFTs with indium–gallium–zinc-oxide as channel semiconductor. Our study emphasizes the potential of AlN thin films for transparent electronics, whilst the functionality of the fabricated field-effect transistors is explored and discussed.

  2. A Grand Challenge for CMOS Scaling: Alternate Gate Dielectrics

    Science.gov (United States)

    Wallace, Robert M.

    2001-03-01

    Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.13 um complementary metal oxide semiconductor (CMOS) technology. The prospect of replacing SiO2 is a formidable task because the alternate gate dielectric must provide many properties that are, at a minimum, comparable to those of SiO2 yet with a much higher permittivity. A systematic examination of the required performance of gate dielectrics suggests that the key properties to consider in the selection an alternative gate dielectric candidate are (a) permittivity, band gap and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. We will review the performance requirements for materials associated with CMOS scaling, the challenges associated with these requirements, and the state-of-the-art in current research for alternate gate dielectrics. The requirements for process integration compatibility are remarkably demanding, and any serious candidates will emerge only through continued, intensive investigation.

  3. SEMICONDUCTOR DEVICES: Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology

    Science.gov (United States)

    Chia-Song, Wu; Hsing-Chung, Liu

    2009-11-01

    This paper investigates the feasibility of using a lanthanum oxide thin film (La2O3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La2O3 thickness. The thin La2O3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively. La2O3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 °C because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La2O3 thin film was thermally stable. The DC and RF characteristics of Pt/La2O3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined. The measurements indicated that the transistor with the Pt/La2O3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La2O3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.

  4. Energy-loss return gate via liquid dielectric polarization.

    Science.gov (United States)

    Kim, Taehun; Yong, Hyungseok; Kim, Banseok; Kim, Dongseob; Choi, Dukhyun; Park, Yong Tae; Lee, Sangmin

    2018-04-12

    There has been much research on renewable energy-harvesting techniques. However, owing to increasing energy demands, significant energy-related issues remain to be solved. Efforts aimed at reducing the amount of energy loss in electric/electronic systems are essential for reducing energy consumption and protecting the environment. Here, we design an energy-loss return gate system that reduces energy loss from electric/electronic systems by utilizing the polarization of liquid dielectrics. The use of a liquid dielectric material in the energy-loss return gate generates electrostatic potential energy while reducing the dielectric loss of the electric/electronic system. Hence, an energy-loss return gate can make breakthrough impacts possible by amplifying energy-harvesting efficiency, lowering the power consumption of electronics, and storing the returned energy. Our study indicates the potential for enhancing energy-harvesting technologies for electric/electronics systems, while increasing the widespread development of these systems.

  5. Investigation of terbium scandate as an alternative gate dielectric in fully depleted transistors

    Science.gov (United States)

    Roeckerath, M.; Lopes, J. M. J.; Özben, E. Durǧun; Urban, C.; Schubert, J.; Mantl, S.; Jia, Y.; Schlom, D. G.

    2010-01-01

    Terbium scandate thin films were deposited by e-gun evaporation on (100) silicon substrates. Rutherford backscattering spectrometry and x-ray diffraction studies revealed homogeneous chemical compositions of the films. A dielectric constant of 26 and CV-curves with small hystereses were measured as well as low leakage current densities of <1 nA/cm2. Fully depleted n-type field-effect transistors on thin silicon-on-insulator substrates with terbium scandate gate dielectrics were fabricated with a gate-last process. The devices show inverse subthreshold slopes of 80 mV/dec and a carrier mobility for electrons of 225 cm2/V•s was extracted.

  6. The Electrical Breakdown of Thin Dielectric Elastomers

    DEFF Research Database (Denmark)

    Zakaria, Shamsul Bin; Morshuis, Peter H. F.; Yahia, Benslimane Mohamed

    2014-01-01

    Dielectric elastomers are being developed for use in actuators, sensors and generators to be used in various applications, such as artificial eye lids, pressure sensors and human motion energy generators. In order to obtain maximum efficiency, the devices are operated at high electrical fields....... This increases the likelihood for electrical breakdown significantly. Hence, for many applications the performance of the dielectric elastomers is limited by this risk of failure, which is triggered by several factors. Amongst others thermal effects may strongly influence the electrical breakdown strength....... In this study, we model the electrothermal breakdown in thin PDMS based dielectric elastomers in order to evaluate the thermal mechanisms behind the electrical failures. The objective is to predict the operation range of PDMS based dielectric elastomers with respect to the temperature at given electric field...

  7. On the Evaluation of Gate Dielectrics for 4H-SiC Based Power MOSFETs

    Directory of Open Access Journals (Sweden)

    Muhammad Nawaz

    2015-01-01

    Full Text Available This work deals with the assessment of gate dielectric for 4H-SiC MOSFETs using technology based two-dimensional numerical computer simulations. Results are studied for variety of gate dielectric candidates with varying thicknesses using well-known Fowler-Nordheim tunneling model. Compared to conventional SiO2 as a gate dielectric for 4H-SiC MOSFETs, high-k gate dielectric such as HfO2 reduces significantly the amount of electric field in the gate dielectric with equal gate dielectric thickness and hence the overall gate current density. High-k gate dielectric further reduces the shift in the threshold voltage with varying dielectric thicknesses, thus leading to better process margin and stable device operating behavior. For fixed dielectric thickness, a total shift in the threshold voltage of about 2.5 V has been observed with increasing dielectric constant from SiO2 (k=3.9 to HfO2 (k=25. This further results in higher transconductance of the device with the increase of the dielectric constant from SiO2 to HfO2. Furthermore, 4H-SiC MOSFETs are found to be more sensitive to the shift in the threshold voltage with conventional SiO2 as gate dielectric than high-k dielectric with the presence of interface state charge density that is typically observed at the interface of dielectric and 4H-SiC MOS surface.

  8. Pulsed laser deposition of oxide gate dielectrics for pentacene organic field-effect transistors

    International Nuclear Information System (INIS)

    Yaginuma, S.; Yamaguchi, J.; Itaka, K.; Koinuma, H.

    2005-01-01

    We have fabricated Al 2 O 3 , LaAlO 3 (LAO), CaHfO 3 (CHO) and CaZrO 3 (CZO) thin films for the dielectric layers of field-effect transistors (FETs) by pulsed laser deposition (PLD). The films exhibited very smooth surfaces with root-mean-squares (rms) roughnesses of ∼1.3 A as evaluated by using atomic force microscopy (AFM). The breakdown electric fields of Al 2 O 3 , LAO, CHO and CZO films were 7, 6, 10 and 2 MV/cm, respectively. The magnitude of the leak current in each film was low enough to operate FET. We performed a comparative study of pentacene FET fabricated using these oxide dielectrics as gate insulators. High field-effect mobility of 1.4 cm 2 /V s and on/off current ratio of 10 7 were obtained in the pentacene FET using LAO gate insulating film. Use of the LAO films as gate dielectrics has been found to suppress the hysteresis of pentacene FET operations. The LAO films are relevant to the dielectric layer of organic FETs

  9. Nanoscale gadolinium oxide capping layers on compositionally variant gate dielectrics

    KAUST Repository

    Alshareef, Husam N.

    2010-11-19

    Metal gate work function enhancement using nanoscale (1.0 nm) Gd2O3 interfacial layers has been evaluated as a function of silicon oxide content in the HfxSiyOz gate dielectric and process thermal budget. It is found that the effective work function tuning by the Gd2O3 capping layer varied by nearly 400 mV as the composition of the underlying dielectric changed from 0% to 100% SiO2, and by nearly 300 mV as the maximum process temperature increased from ambient to 1000 °C. A qualitative model is proposed to explain these results, expanding the existing models for the lanthanide capping layer effect.

  10. Nanoscale gadolinium oxide capping layers on compositionally variant gate dielectrics

    KAUST Repository

    Alshareef, Husam N.; Caraveo-Frescas, J. A.; Cha, D. K.

    2010-01-01

    Metal gate work function enhancement using nanoscale (1.0 nm) Gd2O3 interfacial layers has been evaluated as a function of silicon oxide content in the HfxSiyOz gate dielectric and process thermal budget. It is found that the effective work function tuning by the Gd2O3 capping layer varied by nearly 400 mV as the composition of the underlying dielectric changed from 0% to 100% SiO2, and by nearly 300 mV as the maximum process temperature increased from ambient to 1000 °C. A qualitative model is proposed to explain these results, expanding the existing models for the lanthanide capping layer effect.

  11. Cellulose triacetate, thin film dielectric capacitor

    Science.gov (United States)

    Yen, Shiao-Ping S. (Inventor); Jow, T. Richard (Inventor)

    1995-01-01

    Very thin films of cellulose triacetate are cast from a solution containing a small amount of high boiling temperature, non-solvent which evaporates last and lifts the film from the casting surface. Stretched, oriented, crystallized films have high electrical breakdown properties. Metallized films less than about 2 microns in thickness form self-healing electrodes for high energy density, pulsed power capacitors. Thicker films can be utilized as a dielectric for a capacitor.

  12. High-Mobility 6,13-Bis(triisopropylsilylethynyl) Pentacene Transistors Using Solution-Processed Polysilsesquioxane Gate Dielectric Layers.

    Science.gov (United States)

    Matsuda, Yu; Nakahara, Yoshio; Michiura, Daisuke; Uno, Kazuyuki; Tanaka, Ichiro

    2016-04-01

    Polysilsesquioxane (PSQ) is a low-temperature curable polymer that is compatible with low-cost plastic substrates. We cured PSQ gate dielectric layers by irradiation with ultraviolet light at ~60 °C, and used them for 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) thin film transistors (TFTs). The fabricated TFTs have shown the maximum and average hole mobility of 1.3 and 0.78 ± 0.3 cm2V-1s-1, which are comparable to those of the previously reported transistors using single-crystalline TIPS-pentacene micro-ribbons for their active layers and thermally oxidized SiO2 for their gate dielectric layers. Itis therefore demonstrated that PSQ is a promising polymer gate dielectric material for low-cost organic TFTs.

  13. Dielectric loss of strontium titanate thin films

    Science.gov (United States)

    Dalberth, Mark Joseph

    1999-12-01

    Interest in strontium titanate (STO) thin films for microwave device applications continues to grow, fueled by the telecommunications industry's interest in phase shifters and tunable filters. The optimization of these devices depends upon increasing the phase or frequency tuning and decreasing the losses in the films. Currently, the dielectric response of thin film STO is poorly understood through lack of data and a theory to describe it. We have studied the growth of STO using pulsed laser deposition and single crystal substrates like lanthanum aluminate and neodymium gallate. We have researched ways to use ring resonators to accurately measure the dielectric response as a function of temperature, electric field, and frequency from low radio frequencies to a few gigahertz. Our films grown on lanthanum aluminate show marked frequency dispersion in the real part of the dielectric constant and hints of thermally activated loss behavior. We also found that films grown with conditions that optimized the dielectric constant showed increased losses. In an attempt to simplify the system, we developed a technique called epitaxial lift off, which has allowed us to study films removed from their growth substrates. These free standing films have low losses and show obvious thermally activated behavior. The "amount of tuning," as measured by a figure of merit, KE, is greater in these films than in the films still attached to their growth substrates. We have developed a theory that describes the real and imaginary parts of the dielectric constant. The theory models the real part using a mean field description of the ionic motion in the crystal and includes the loss by incorporating the motion of charged defects in the films.

  14. Analytical drain current formulation for gate dielectric engineered dual material gate-gate all around-tunneling field effect transistor

    Science.gov (United States)

    Madan, Jaya; Gupta, R. S.; Chaujar, Rishu

    2015-09-01

    In this work, an analytical drain current model for gate dielectric engineered (hetero dielectric)-dual material gate-gate all around tunnel field effect transistor (HD-DMG-GAA-TFET) has been developed. Parabolic approximation has been used to solve the two-dimensional (2D) Poisson equation with appropriate boundary conditions and continuity equations to evaluate analytical expressions for surface potential, electric field, tunneling barrier width and drain current. Further, the analog performance of the device is studied for three high-k dielectrics (Si3N4, HfO2, and ZrO2), and it has been investigated that the problem of lower ION, can be overcome by using the hetero-gate architecture. Moreover, the impact of scaling the gate oxide thickness and bias variations has also been studied. The HD-DMG-GAA-TFET shows an enhanced ION of the order of 10-4 A. The effectiveness of the proposed model is validated by comparing it with ATLAS device simulations.

  15. Hetero-gate-dielectric double gate junctionless transistor (HGJLT) with reduced band-to-band tunnelling effects in subthreshold regime

    International Nuclear Information System (INIS)

    Ghosh, Bahniman; Mondal, Partha; Akram, M. W.; Bal, Punyasloka; Salimath, Akshay Kumar

    2014-01-01

    We propose a hetero-gate-dielectric double gate junctionless transistor (HGJLT), taking high-k gate insulator at source side and low-k gate insulator at drain side, which reduces the effects of band-to-band tunnelling (BTBT) in the sub-threshold region. A junctionless transistor (JLT) is turned off by the depletion of carriers in the highly doped thin channel (device layer) which results in a significant band overlap between the valence band of the channel region and the conduction band of the drain region, due to off-state drain bias, that triggers electrons to tunnel from the valence band of the channel region to the conduction band of the drain region leaving behind holes in the channel. These effects of band-to-band tunnelling increase the sub-threshold leakage current, and the accumulation of holes in the channel forms a parasitic bipolar junction transistor (n–p–n BJT for channel JLT) in the lateral direction by the source (emitter), channel (base) and drain (collector) regions in JLT structure in off-state. The proposed HGJLT reduces the subthreshold leakage current and suppresses the parasitic BJT action in off-state by reducing the band-to-band tunnelling probability. (semiconductor devices)

  16. Electrical Properties of Ultrathin Hf-Ti-O Higher k Gate Dielectric Films and Their Application in ETSOI MOSFET.

    Science.gov (United States)

    Xiong, Yuhua; Chen, Xiaoqiang; Wei, Feng; Du, Jun; Zhao, Hongbin; Tang, Zhaoyun; Tang, Bo; Wang, Wenwu; Yan, Jiang

    2016-12-01

    Ultrathin Hf-Ti-O higher k gate dielectric films (~2.55 nm) have been prepared by atomic layer deposition. Their electrical properties and application in ETSOI (fully depleted extremely thin SOI) PMOSFETs were studied. It is found that at the Ti concentration of Ti/(Ti + Hf) ~9.4%, low equivalent gate oxide thickness (EOT) of ~0.69 nm and acceptable gate leakage current density of 0.61 A/cm 2 @ (V fb  - 1)V could be obtained. The conduction mechanism through the gate dielectric is dominated by the F-N tunneling in the gate voltage range of -0.5 to -2 V. Under the same physical thickness and process flow, lower EOT and higher I on /I off ratio could be obtained while using Hf-Ti-O as gate dielectric compared with HfO 2 . With Hf-Ti-O as gate dielectric, two ETSOI PMOSFETs with gate width/gate length (W/L) of 0.5 μm/25 nm and 3 μm/40 nm show good performances such as high I on , I on /I off ratio in the magnitude of 10 5 , and peak transconductance, as well as suitable threshold voltage (-0.3~-0.2 V). Particularly, ETSOI PMOSFETs show superior short-channel control capacity with DIBL <82 mV/V and subthreshold swing <70 mV/decade.

  17. Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications

    Science.gov (United States)

    Jayanti, Srikant

    Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Integration of thin metal FGs and high-k dielectrics into a dual floating gate memory structure to result in both volatile and non-volatile modes of operation has been demonstrated, for plausible application in future unified memory architectures. The electrical characterization was performed on simple MIS/MIM and memory capacitors, fabricated through CMOS compatible processes. Various analytical characterization techniques were done to gain more insight into the material behavior of the layers in the device structure. In the first part of this study, interfacial engineering was investigated by exploring La2O3 as SiO2 scavenging layer. Through the silicate formation, the consumption of low-k SiO2 was controlled and resulted in a significant improvement in dielectric leakage. The performance improvement was also gauged through memory capacitors. In the second part of the study, a novel memory structure consisting of continuous metal FG

  18. Carbon nanotube transistors with graphene oxide films as gate dielectrics

    Institute of Scientific and Technical Information of China (English)

    2010-01-01

    Carbon nanomaterials,including the one-dimensional(1-D) carbon nanotube(CNT) and two-dimensional(2-D) graphene,are heralded as ideal candidates for next generation nanoelectronics.An essential component for the development of advanced nanoelectronics devices is processing-compatible oxide.Here,in analogy to the widespread use of silicon dioxide(SiO2) in silicon microelectronic industry,we report the proof-of-principle use of graphite oxide(GO) as a gate dielectrics for CNT field-effect transistor(FET) via a fast and simple solution-based processing in the ambient condition.The exceptional transistor characteristics,including low operation voltage(2 V),high carrier mobility(950 cm2/V-1 s-1),and the negligible gate hysteresis,suggest a potential route to the future all-carbon nanoelectronics.

  19. High-performance pentacene OTFT by incorporating Ti in LaON gate dielectric

    Science.gov (United States)

    Ma, Y. X.; Han, C. Y.; Tang, W. M.; Lai, P. T.

    2017-07-01

    Pentacene organic thin-film transistors (OTFT) using high-k LaTiON gate dielectric with different Ti contents are investigated. The LaxTi(1-x)ON films (with x = 1, 0.87, 0.76, and 0.67) are deposited by reactive sputtering followed by an annealing in N2 at 200 °C. The OTFT with La0.87Ti0.13ON can achieve a high carrier mobility of 2.6 cm2/V.s, a small threshold voltage of -1.5 V, a small sub-threshold swing of 0.07 V/dec, and a small hysteresis of 0.17 V. AFM and X-ray photoelectron spectroscopy reveal that Ti can suppress the hygroscopicity of La oxide to achieve a smoother dielectric surface, which can result in larger pentacene grains and thus higher carrier mobility. All the devices show a clockwise hysteresis because both the LaOH formation and Ti incorporation can generate acceptor-like traps in the gate dielectric.

  20. Fabrication of Nonvolatile Memory Effects in High-k Dielectric Thin Films Using Electron Irradiation

    International Nuclear Information System (INIS)

    Park, Chanrock; Cho, Daehee; Kim, Jeongeun; Hwang, Jinha

    2010-01-01

    Electron Irradiation can be applied towards nano-floating gate memories which are recognized as one of the next-generation nonvolatile memory semiconductors. NFGMs can overcome the preexisting limitations encountered in Dynamic Random Access Memories and Flash memories with the excellent advantages, i. e. high-density information storage, high response speed, high compactness, etc. The traditional nano-floating gate memories are fabricated through multi-layered nano structures of the dissimilar materials where the charge-trapping portions are sandwiched into the high-k dielectrics. However, this work reports the unique nonvolatile responses in single-layered high-k dielectric thin films if irradiated with highly accelerated electron beams. The implications of the electron irradiation will be discussed towards high-performance nano-floating gate memories

  1. Anomalous degradation behaviors under illuminated gate bias stress in a-Si:H thin film transistor

    International Nuclear Information System (INIS)

    Tsai, Ming-Yen; Chang, Ting-Chang; Chu, Ann-Kuo; Hsieh, Tien-Yu; Lin, Kun-Yao; Wu, Yi-Chun; Huang, Shih-Feng; Chiang, Cheng-Lung; Chen, Po-Lin; Lai, Tzu-Chieh; Lo, Chang-Cheng; Lien, Alan

    2014-01-01

    This study investigates the impact of gate bias stress with and without light illumination in a-Si:H thin film transistors. It has been observed that the I–V curve shifts toward the positive direction after negative and positive gate bias stress due to interface state creation at the gate dielectric. However, this study found that threshold voltages shift negatively and that the transconductance curve maxima are anomalously degraded under illuminated positive gate bias stress. In addition, threshold voltages shift positively under illuminated negative gate bias stress. These degradation behaviors can be ascribed to charge trapping in the passivation layer dominating degradation instability and are verified by a double gate a-Si:H device. - Highlights: • There is abnormal V T shift induced by illuminated gate bias stress in a-Si:H thin film transistors. • Electron–hole pair is generated via trap-assisted photoexcitation. • Abnormal transconductance hump is induced by the leakage current from back channel. • Charge trapping in the passivation layer is likely due to the fact that a constant voltage has been applied to the top gate

  2. High mobility and low operating voltage ZnGaO and ZnGaLiO transistors with spin-coated Al2O3 as gate dielectric

    International Nuclear Information System (INIS)

    Xia, D X; Xu, J B

    2010-01-01

    Spin-coated alumina serving as a gate dielectric in thin film transistors shows interesting dielectric properties for low-voltage applications, despite a moderate capacitance. With Ga singly doped and Ga, Li co-doped ZnO as the active channel layers, typical mobilities of 4.7 cm 2 V -1 s -1 and 2.1 cm 2 V -1 s -1 are achieved, respectively. At a given gate bias, the operation current is much smaller than the previously reported values in low-voltage thin film transistors, primarily relying on the giant-capacitive dielectric. The reported devices combine advantages of high mobility, low power consumption, low cost and ease of fabrication. In addition to the transparent nature of both the dielectric and semiconducting active channels, the superior electrical properties of the devices may provide a new avenue for future transparent electronics. (fast track communication)

  3. Accurate characterization of organic thin film transistors in the presence of gate leakage current

    Directory of Open Access Journals (Sweden)

    Vinay K. Singh

    2011-12-01

    Full Text Available The presence of gate leakage through polymer dielectric in organic thin film transistors (OTFT prevents accurate estimation of transistor characteristics especially in subthreshold regime. To mitigate the impact of gate leakage on transfer characteristics and allow accurate estimation of mobility, subthreshold slope and on/off current ratio, a measurement technique involving simultaneous sweep of both gate and drain voltages is proposed. Two dimensional numerical device simulation is used to illustrate the validity of the proposed technique. Experimental results obtained with Pentacene/PMMA OTFT with significant gate leakage show a low on/off current ratio of ∼ 102 and subthreshold is 10 V/decade obtained using conventional measurement technique. The proposed technique reveals that channel on/off current ratio is more than two orders of magnitude higher at ∼104 and subthreshold slope is 4.5 V/decade.

  4. Simulation of dual-gate SOI MOSFET with different dielectric layers

    Science.gov (United States)

    Yadav, Jyoti; Chaudhary, R.; Mukhiya, R.; Sharma, R.; Khanna, V. K.

    2016-04-01

    The paper presents the process design and simulation of silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG-MOSFET) stacked with different dielectric layers on the top of gate oxide. A detailed 2D process simulation of SOI-MOSFETs and its electrical characterization has been done using SILVACO® TCAD tool. A variation in transconductance was observed with different dielectric layers, AlN-gate MOSFET having the highest tranconductance value as compared to other three dielectric layers (SiO2, Si3N4 and Al2O3).

  5. Medium band gap polymer based solution-processed high-κ composite gate dielectrics for ambipolar OFET

    Science.gov (United States)

    Canımkurbey, Betül; Unay, Hande; Çakırlar, Çiğdem; Büyükköse, Serkan; Çırpan, Ali; Berber, Savas; Altürk Parlak, Elif

    2018-03-01

    The authors present a novel ambipolar organic filed-effect transistors (OFETs) composed of a hybrid dielectric thin film of Ta2O5:PMMA nanocomposite material, and solution processed poly(selenophene, benzotriazole and dialkoxy substituted [1,2-b:4, 5-b‧] dithiophene (P-SBTBDT)-based organic semiconducting material as the active layer of the device. We find that the Ta2O5:PMMA insulator shows n-type conduction character, and its combination with the p-type P-SBTBDT organic semiconductor leads to an ambipolar OFET device. Top-gated OFETs were fabricated on glass substrate consisting of interdigitated ITO electrodes. P-SBTBDT-based material was spin coated on the interdigitated ITO electrodes. Subsequently, a solution processed Ta2O5:PMMA nanocomposite material was spin coated, thereby creating the gate dielectric layer. Finally, as a gate metal, an aluminum layer was deposited by thermal evaporation. The fabricated OFETs exhibited an ambipolar performance with good air-stability, high field-induced current and relatively high electron and hole mobilities although Ta2O5:PMMA nanocomposite films have slightly higher leakage current compared to the pure Ta2O5 films. Dielectric properties of the devices with different ratios of Ta2O5:PMMA were also investigated. The dielectric constant varied between 3.6 and 5.3 at 100 Hz, depending on the Ta2O5:PMMA ratio.

  6. Nonlinear dielectric response in ferroelectric thin films

    Directory of Open Access Journals (Sweden)

    Lente, M. H.

    2004-08-01

    Full Text Available Electrical permittivity dependence on electric external bias field was investigated in PZT thin films. The results revealed the existence of two mechanisms contributing to the electrical permittivity. The first one was related to the domain reorientation, which was responsible for a strong no linear dielectric behavior, acting only during the poling process. The second mechanism was associated with the domain wall vibrations, which presented a reasonable linear electrical behavior with the applied bias field, contributing always to the permittivity independently of the poling state of the sample. The results also indicated that the gradual reduction of the permittivity with the increase of the bias field strength may be related to the gradual bending of the domain walls. It is believed that the domain wall bending induces a hardening and/or a thinning of the walls, thus reducing the electrical permittivity. A reinterpretation of the model proposed in the literature to explain the dielectric characteristics of ferroelectric materials at high electric field regime is proposed.

    Se ha estudiado la dependencia de la permitividad eléctrica con un campo bias externo en láminas delgadas de PZT. Los resultados revelaron la existencia de dos mecanismos que contribuyen a la permitividad eléctrica. El primero está relacionado con la reorientación de dominios, actúa sólo durante el proceso de polarización y es responsable de un comportamiento dieléctrico fuertemente no lineal. El segundo mecanismo se asocia a las vibraciones de las paredes de dominio, presentando un comportamiento eléctrico razonablemente lineal con el campo bias aplicado, contribuyendo siempre a la permitividad independientemente del estado de polarización de la muestra. Los resultados indicaron también que la reducción gradual de la permitividad con el aumento de la fuerza del campo bias podría estar relacionada con el “bending” gradual de las paredes de dominio

  7. Effect of gate dielectrics on the performance of p-type Cu2O TFTs processed at room temperature

    KAUST Repository

    Al-Jawhari, Hala A.

    2013-12-01

    Single-phase Cu2O films with p-type semiconducting properties were successfully deposited by reactive DC magnetron sputtering at room temperature followed by post annealing process at 200°C. Subsequently, such films were used to fabricate bottom gate p-channel Cu2O thin film transistors (TFTs). The effect of using high-κ SrTiO3 (STO) as a gate dielectric on the Cu2O TFT performance was investigated. The results were then compared to our baseline process which uses a 220 nm aluminum titanium oxide (ATO) dielectric deposited on a glass substrate coated with a 200 nm indium tin oxide (ITO) gate electrode. We found that with a 150 nm thick STO, the Cu2O TFTs exhibited a p-type behavior with a field-effect mobility of 0.54 cm2.V-1.s-1, an on/off ratio of around 44, threshold voltage equaling -0.62 V and a sub threshold swing of 1.64 V/dec. These values were obtained at a low operating voltage of -2V. The advantages of using STO as a gate dielectric relative to ATO are discussed. © (2014) Trans Tech Publications, Switzerland.

  8. Constant-current corona triode adapted and optimized for the characterization of thin dielectric films

    Science.gov (United States)

    Giacometti, José A.

    2018-05-01

    This work describes an enhanced corona triode with constant current adapted to characterize the electrical properties of thin dielectric films used in organic electronic devices. A metallic grid with a high ionic transparency is employed to charge thin films (100 s of nm thick) with a large enough charging current. The determination of the surface potential is based on the grid voltage measurement, but using a more sophisticated procedure than the previous corona triode. Controlling the charging current to zero, which is the open-circuit condition, the potential decay can be measured without using a vibrating grid. In addition, the electric capacitance and the characteristic curves of current versus the stationary surface potential can also be determined. To demonstrate the use of the constant current corona triode, we have characterized poly(methyl methacrylate) thin films with films with thicknesses in the range from 300 to 500 nm, frequently used as gate dielectric in organic field-effect transistors.

  9. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Young, Chadwin D.; Bersuker, Gennadi; Hussain, Muhammad Mustafa

    2015-01-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard

  10. Ternary rare-earth based alternative gate-dielectrics for future integration in MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Schubert, Juergen; Lopes, Joao Marcelo; Durgun Oezben, Eylem; Luptak, Roman; Lenk, Steffi; Zander, Willi; Roeckerath, Martin [IBN 1-IT, Forschungszentrum Juelich, 52425 Juelich (Germany)

    2009-07-01

    The dielectric SiO{sub 2} has been the key to the tremendous improvements in Si-based metal-oxide-semiconductor (MOS) device performance over the past four decades. It has, however, reached its limit in terms of scaling since it exhibits a leakage current density higher than 1 A/cm{sup 2} and does not retain its intrinsic physical properties at thicknesses below 1.5 nm. In order to overcome these problems and keep Moore's law ongoing, the use of higher dielectric constant (k) gate oxides has been suggested. These high-k materials must satisfy numerous requirements such as the high k, low leakage currents, suitable band gap und offsets to silicon. Rare-earth based dielectrics are promising materials which fulfill these needs. We will review the properties of REScO{sub 3} (RE = La, Dy, Gd, Sm, Tb) and LaLuO{sub 3} thin films, grown with pulsed laser deposition, e-gun evaporation or molecular beam deposition, integrated in capacitors and transistors. A k > 20 for the REScO{sub 3} (RE = Dy, Gd) and around 30 for (RE = La, Sm, Tb) and LaLuO{sub 3} are obtained. Transistors prepared on SOI and sSOI show mobility values up to 380 cm{sup 2}/Vs on sSOI, which are comparable to such prepared with HfO{sub 2}.

  11. Chemical vapour deposition of thin-film dielectrics

    International Nuclear Information System (INIS)

    Vasilev, Vladislav Yu; Repinsky, Sergei M

    2005-01-01

    Data on the chemical vapour deposition of thin-film dielectrics based on silicon nitride, silicon oxynitride and silicon dioxide and on phosphorus- and boron-containing silicate glasses are generalised. The equipment and layer deposition procedures are described. Attention is focussed on the analysis and discussion of the deposition kinetics and on the kinetic models for film growth. The film growth processes are characterised and data on the key physicochemical properties of thin-film covalent dielectric materials are given.

  12. AlGaN/GaN MISHEMTs with AlN gate dielectric grown by thermal ALD technique.

    Science.gov (United States)

    Liu, Xiao-Yong; Zhao, Sheng-Xun; Zhang, Lin-Qing; Huang, Hong-Fan; Shi, Jin-Shan; Zhang, Chun-Min; Lu, Hong-Liang; Wang, Peng-Fei; Zhang, David Wei

    2015-01-01

    Recently, AlN plasma-enhanced atomic layer deposition (ALD) passivation technique had been proposed and investigated for suppressing the dynamic on-resistance degradation behavior of high-electron-mobility transistors (HEMTs). In this paper, a novel gate dielectric and passivation technique for GaN-on-Si AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMTs) is presented. This technique features the AlN thin film grown by thermal ALD at 400°C without plasma enhancement. A 10.6-nm AlN thin film was grown upon the surface of the HEMT serving as the gate dielectric under the gate electrode and as the passivation layer in the access region at the same time. The MISHEMTs with thermal ALD AlN exhibit enhanced on/off ratio, reduced channel sheet resistance, reduction of gate leakage by three orders of magnitude at a bias of 4 V, reduced threshold voltage hysteresis of 60 mV, and suppressed current collapse degradation.

  13. Junctionless Thin-Film Transistors Gated by an H₃PO₄-Incorporated Chitosan Proton Conductor.

    Science.gov (United States)

    Liu, Huixuan; Xun, Damao

    2018-04-01

    We fabricated an H3PO4-incorporated chitosan proton conductor film that exhibited the electric double layer effect and showed a high specific capacitance of 4.42 μF/cm2. Transparent indium tin oxide thin-film transistors gated by H3PO4-incorporated chitosan films were fabricated by sputtering through a shadow mask. The operating voltage was as low as 1.2 V because of the high specific capacitance of the H3PO4-incorporated chitosan dielectrics. The junctionless transparent indium tin oxide thin film transistors exhibited good performance, including an estimated current on/off ratio and field-effect mobility of 1.2 × 106 and 6.63 cm2V-1s-1, respectively. These low-voltage thin-film electric-double-layer transistors gated by H3PO4-incorporated chitosan are promising for next generation battery-powered "see-through" portable sensors.

  14. A novel approach for the improvement of electrostatic behaviour of physically doped TFET using plasma formation and shortening of gate electrode with hetero-gate dielectric

    Science.gov (United States)

    Soni, Deepak; Sharma, Dheeraj; Aslam, Mohd.; Yadav, Shivendra

    2018-04-01

    This article presents a new device configuration to enhance current drivability and suppress negative conduction (ambipolar conduction) with improved RF characteristics of physically doped TFET. Here, we used a new approach to get excellent electrical characteristics of hetero-dielectric short gate source electrode TFET (HD-SG SE-TFET) by depositing a metal electrode of 5.93 eV work function over the heavily doped source (P+) region. Deposition of metal electrode induces the plasma (thin layer) of holes under the Si/HfO2 interface due to work function difference of metal and semiconductor. Plasma layer of holes is advantageous to increase abruptness as well as decrease the tunneling barrier at source/channel junction for attaining higher tunneling rate of charge carriers (i.e., electrons), which turns into 86.66 times higher ON-state current compared with the conventional physically doped TFET (C-TFET). Along with metal electrode deposition, gate electrode is under-lapped for inducing asymmetrical concentration of charge carriers in the channel region, which is helpful for widening the tunneling barrier width at the drain/channel interface. Consequently, HD-SG SE-TFET shows suppression of ambipolar behavior with reduction in gate-to-drain capacitance which is beneficial for improvement in RF performance. Furthermore, the effectiveness of hetero-gate dielectric concept has been used for improving the RF performance. Furthermore, reliability of C-TFET and proposed structures has been confirmed in term of linearity.

  15. SiO2/AlON stacked gate dielectrics for AlGaN/GaN MOS heterojunction field-effect transistors

    Science.gov (United States)

    Watanabe, Kenta; Terashima, Daiki; Nozaki, Mikito; Yamada, Takahiro; Nakazawa, Satoshi; Ishida, Masahiro; Anda, Yoshiharu; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2018-06-01

    Stacked gate dielectrics consisting of wide bandgap SiO2 insulators and thin aluminum oxynitride (AlON) interlayers were systematically investigated in order to improve the performance and reliability of AlGaN/GaN metal–oxide–semiconductor (MOS) devices. A significantly reduced gate leakage current compared with that in a single AlON layer was achieved with these structures, while maintaining the superior thermal stability and electrical properties of the oxynitride/AlGaN interface. Consequently, distinct advantages in terms of the reliability of the gate dielectrics, such as an improved immunity against electron injection and an increased dielectric breakdown field, were demonstrated for AlGaN/GaN MOS capacitors with optimized stacked structures having a 3.3-nm-thick AlON interlayer.

  16. High performance solution processed zirconium oxide gate dielectric appropriate for low temperature device application

    Energy Technology Data Exchange (ETDEWEB)

    Hasan, Musarrat; Nguyen, Manh-Cuong; Kim, Hyojin; You, Seung-Won; Jeon, Yoon-Seok; Tong, Duc-Tai; Lee, Dong-Hwi; Jeong, Jae Kyeong; Choi, Rino, E-mail: rino.choi@inha.ac.kr

    2015-08-31

    This paper reports a solution processed electrical device with zirconium oxide gate dielectric that was fabricated at a low enough temperature appropriate for flexible electronics. Both inorganic dielectric and channel materials were synthesized in the same organic solvent. The dielectric constant achieved was 13 at 250 °C with a reasonably low leakage current. The bottom gate transistor devices showed the highest mobility of 75 cm{sup 2}/V s. The device is operated at low voltage with high-k dielectric with excellent transconductance and low threshold voltage. Overall, the results highlight the potential of low temperature solution based deposition in fabricating more complicated circuits for a range of applications. - Highlights: • We develop a low temperature inorganic dielectric deposition process. • We fabricate oxide semiconductor channel devices using all-solution processes. • Same solvent is used for dielectric and oxide semiconductor deposition.

  17. Ultra-low power thin film transistors with gate oxide formed by nitric acid oxidation method

    International Nuclear Information System (INIS)

    Kobayashi, H.; Kim, W. B.; Matsumoto, T.

    2011-01-01

    We have developed a low temperature fabrication method of SiO 2 /Si structure by use of nitric acid, i.e., nitric acid oxidation of Si (NAOS) method, and applied it to thin film transistors (TFT). A silicon dioxide (SiO 2 ) layer formed by the NAOS method at room temperature possesses 1.8 nm thickness, and its leakage current density is as low as that of thermally grown SiO 2 layer with the same thickness formed at ∼900 deg C. The fabricated TFTs possess an ultra-thin NAOS SiO 2 /CVD SiO 2 stack gate dielectric structure. The ultrathin NAOS SiO 2 layer effectively blocks a gate leakage current, and thus, the thickness of the gate oxide layer can be decreased from 80 to 20 nm. The thin gate oxide layer enables to decrease the operation voltage to 2 V (cf. the conventional operation voltage of TFTs with 80 nm gate oxide: 12 V) because of the low threshold voltages, i.e., -0.5 V for P-ch TFTs and 0.5 V for N-ch TFTs, and thus the consumed power decreases to 1/36 of that of the conventional TFTs. The drain current increases rapidly with the gate voltage, and the sub-threshold voltage is ∼80 mV/dec. The low sub-threshold swing is attributable to the thin gate oxide thickness and low interface state density of the NAOS SiO 2 layer. (authors)

  18. Effects of Annealing Time on the Performance of OTFT on Glass with ZrO2 as Gate Dielectric

    Directory of Open Access Journals (Sweden)

    W. M. Tang

    2012-01-01

    Full Text Available Copper phthalocyanine-based organic thin-film transistors (OTFTs with zirconium oxide (ZrO2 as gate dielectric have been fabricated on glass substrates. The gate dielectric is annealed in N2 at different durations (5, 15, 40, and 60 min to investigate the effects of annealing time on the electrical properties of the OTFTs. Experimental results show that the longer the annealing time for the OTFT, the better the performance. Among the devices studied, OTFTs with gate dielectric annealed at 350°C in N2 for 60 min exhibit the best device performance. They have a small threshold voltage of −0.58 V, a low subthreshold slope of 0.8 V/decade, and a low off-state current of 0.73 nA. These characteristics demonstrate that the fabricated device is suitable for low-voltage and low-power operations. When compared with the TFT samples annealed for 5 min, the ones annealed for 60 min have 20% higher mobility and nearly two times smaller the subthreshold slope and off-state current. The extended annealing can effectively reduce the defects in the high-k film and produces a better insulator/organic interface. This results in lower amount of carrier scattering and larger CuPc grains for carrier transport.

  19. Ambipolar transport in CVD grown MoSe2 monolayer using an ionic liquid gel gate dielectric

    Directory of Open Access Journals (Sweden)

    Deliris N. Ortiz

    2018-03-01

    Full Text Available CVD grown MoSe2 monolayers were electrically characterized at room temperature in a field effect transistor (FET configuration using an ionic liquid (IL as the gate dielectric. During the growth, instead of using MoO3 powder, ammonium heptamolybdate was used for better Mo control of the source and sodium cholate added for lager MoSe2 growth areas. In addition, a high specific capacitance (∼7 μF/cm2 IL was used as the gate dielectric to significantly reduce the operating voltage. The device exhibited ambipolar charge transport at low voltages with enhanced parameters during n- and p-FET operation. IL gating thins the Schottky barrier at the metal/semiconductor interface permitting efficient charge injection into the channel and reduces the effects of contact resistance on device performance. The large specific capacitance of the IL was also responsible for a much higher induced charge density compared to the standard SiO2 dielectric. The device was successfully tested as an inverter with a gain of ∼2. Using a common metal for contacts simplifies fabrication of this ambipolar device, and the possibility of radiative recombination of holes and electrons could further extend its use in low power optoelectronic applications.

  20. High-κ gate dielectrics: Current status and materials properties considerations

    Science.gov (United States)

    Wilk, G. D.; Wallace, R. M.; Anthony, J. M.

    2001-05-01

    Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal-oxide-semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward successful integration into the expected processing conditions for future CMOS technologies, especially due to their tendency to form at interfaces with Si (e.g. silicates). These pseudobinary systems also thereby enable the use of other high-κ materials by serving as an interfacial high-κ layer. While work is ongoing, much research is still required, as it is clear that any material which is to replace SiO2 as the gate dielectric faces a formidable challenge. The requirements for process integration compatibility are remarkably demanding, and any serious candidates will emerge only through continued, intensive investigation.

  1. Hysteresis behaviour of low-voltage organic field-effect transistors employing high dielectric constant polymer gate dielectrics

    International Nuclear Information System (INIS)

    Kim, Se Hyun; Yun, Won Min; Kwon, Oh-Kwan; Hong, Kipyo; Yang, Chanwoo; Park, Chan Eon; Choi, Woon-Seop

    2010-01-01

    Here, we report on the fabrication of low-voltage-operating pentacene-based organic field-effect transistors (OFETs) that utilize crosslinked cyanoethylated poly(vinyl alcohol) (CR-V) gate dielectrics. The crosslinked CR-V-based OFET could be operated successfully at low voltages (below 4 V), but abnormal behaviour during device operation, such as uncertainty in the field-effect mobility (μ) and hysteresis, was induced by the slow polarization of moieties embedded in the gate dielectric (e.g. polar functionalities, ionic impurities, water and solvent molecules). In an effort to improve the stability of OFET operation, we measured the dependence of μ and hysteresis on dielectric thickness, CR-V crosslinking conditions and sweep rate of the gate bias. The influence of the CR-V surface properties on μ, hysteresis, and the structural and morphological features of the pentacene layer grown on the gate dielectric was characterized and compared with the properties of pentacene grown on a polystyrene surface.

  2. Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging?

    Directory of Open Access Journals (Sweden)

    Takashi Ando

    2012-03-01

    Full Text Available Current status and challenges of aggressive equivalent-oxide-thickness (EOT scaling of high-κ gate dielectrics via higher-κ ( > 20 materials and interfacial layer (IL scavenging techniques are reviewed. La-based higher-κ materials show aggressive EOT scaling (0.5–0.8 nm, but with effective workfunction (EWF values suitable only for n-type field-effect-transistor (FET. Further exploration for p-type FET-compatible higher-κ materials is needed. Meanwhile, IL scavenging is a promising approach to extend Hf-based high-κ dielectrics to future nodes. Remote IL scavenging techniques enable EOT scaling below 0.5 nm. Mobility-EOT trends in the literature suggest that short-channel performance improvement is attainable with aggressive EOT scaling via IL scavenging or La-silicate formation. However, extreme IL scaling (e.g., zero-IL is accompanied by loss of EWF control and with severe penalty in reliability. Therefore, highly precise IL thickness control in an ultra-thin IL regime ( < 0.5 nm will be the key technology to satisfy both performance and reliability requirements for future CMOS devices.

  3. Dielectric and acoustical high frequency characterisation of PZT thin films

    International Nuclear Information System (INIS)

    Conde, Janine; Muralt, Paul

    2010-01-01

    Pb(Zr, Ti)O 3 (PZT) is an interesting material for bulk acoustic wave resonator applications due to its high electromechanical coupling constant, which would enable fabrication of large bandwidth frequency filters. The major challenge of the PZT solid solution system is to overcome mechanical losses generally observed in PZT ceramics. To increase the understanding of these losses in textured thin films, thin film bulk acoustic resonators (TFBAR's) based on PZT thin films with compositions either in the tetragonal region or at the morphotropic phase boundary and (111) or {100} textures were fabricated and studied up to 2 GHz. The dielectric and elastic materials coefficients were extracted from impedance measurements at the resonance frequency. The dispersion of the dielectric constant was obtained from impedance measurements up to 2 GHz. The films with varying compositions, textures and deposition methods (sol-gel or sputtering) were compared in terms of dielectric and acoustical properties.

  4. Dielectric and acoustical high frequency characterisation of PZT thin films

    Science.gov (United States)

    Conde, Janine; Muralt, Paul

    2010-02-01

    Pb(Zr, Ti)O3 (PZT) is an interesting material for bulk acoustic wave resonator applications due to its high electromechanical coupling constant, which would enable fabrication of large bandwidth frequency filters. The major challenge of the PZT solid solution system is to overcome mechanical losses generally observed in PZT ceramics. To increase the understanding of these losses in textured thin films, thin film bulk acoustic resonators (TFBAR's) based on PZT thin films with compositions either in the tetragonal region or at the morphotropic phase boundary and (111) or {100} textures were fabricated and studied up to 2 GHz. The dielectric and elastic materials coefficients were extracted from impedance measurements at the resonance frequency. The dispersion of the dielectric constant was obtained from impedance measurements up to 2 GHz. The films with varying compositions, textures and deposition methods (sol-gel or sputtering) were compared in terms of dielectric and acoustical properties.

  5. High performance top-gated indium–zinc–oxide thin film transistors with in-situ formed HfO{sub 2} gate insulator

    Energy Technology Data Exchange (ETDEWEB)

    Song, Yang, E-mail: yang_song@brown.edu [Department of Physics, Brown University, 182 Hope Street, Providence, RI 02912 (United States); Zaslavsky, A. [Department of Physics, Brown University, 182 Hope Street, Providence, RI 02912 (United States); School of Engineering, Brown University, 184 Hope Street, Providence, RI 02912 (United States); Paine, D.C. [School of Engineering, Brown University, 184 Hope Street, Providence, RI 02912 (United States)

    2016-09-01

    We report on top-gated indium–zinc–oxide (IZO) thin film transistors (TFTs) with an in-situ formed HfO{sub 2} gate dielectric insulator. Building on our previous demonstration of high-performance IZO TFTs with Al{sub 2}O{sub 3}/HfO{sub 2} gate dielectric, we now report on a one-step process, in which Hf is evaporated onto the 20 nm thick IZO channel, forming a partially oxidized HfO{sub x} layer, without any additional insulator in-between. After annealing in air at 300 °C, the in-situ reaction between partially oxidized Hf and IZO forms a high quality HfO{sub 2} gate insulator with a low interface trapped charge density N{sub TC} ~ 2.3 × 10{sup 11} cm{sup −2} and acceptably low gate leakage < 3 × 10{sup −7} A/cm{sup 2} at gate voltage V{sub G} = 1 V. The annealed TFTs with gate length L{sub G} = 50 μm have high mobility ~ 95 cm{sup 2}/V ∙ s (determined via the Y-function technique), high on/off ratio ~ 10{sup 7}, near-zero threshold voltage V{sub T} = − 0.02 V, and a subthreshold swing of 0.062 V/decade, near the theoretical limit. The on-current of our proof-of-concept TFTs is relatively low, but can be improved by reducing L{sub G}, indicating that high-performance top-gated HfO{sub 2}-isolated IZO TFTs can be fabricated using a single-step in-situ dielectric formation approach. - Highlights: • High-performance indium–zinc–oxide (IZO) thin film transistors (TFTs). • Single-step in-situ dielectric formation approach simplifies fabrication process. • During anneal, reaction between HfO{sub x} and IZO channel forms a high quality HfO{sub 2} layer. • Gate insulator HfO{sub 2} shows low interface trapped charge and small gate leakage. • TFTs have high mobility, near-zero threshold voltage, and a low subthreshold swing.

  6. High performance organic field-effect transistors with ultra-thin HfO2 gate insulator deposited directly onto the organic semiconductor

    International Nuclear Information System (INIS)

    Ono, S.; Häusermann, R.; Chiba, D.; Shimamura, K.; Ono, T.; Batlogg, B.

    2014-01-01

    We have produced stable organic field-effect transistors (OFETs) with an ultra-thin HfO 2 gate insulator deposited directly on top of rubrene single crystals by atomic layer deposition (ALD). We find that ALD is a gentle deposition process to grow thin films without damaging rubrene single crystals, as results these devices have a negligibly small threshold voltage and are very stable against gate-bias-stress, and the mobility exceeds 1 cm 2 /V s. Moreover, the devices show very little degradation even when kept in air for more than 2 months. These results demonstrate thin HfO 2 layers deposited by ALD to be well suited as high capacitance gate dielectrics in OFETs operating at small gate voltage. In addition, the dielectric layer acts as an effective passivation layer to protect the organic semiconductor

  7. Plasmonic versus dielectric enhancement in thin-film solar cells

    DEFF Research Database (Denmark)

    Dühring, Maria Bayard; Mortensen, N. Asger; Sigmund, Ole

    2012-01-01

    to its metallic counterpart. We show that the enhanced normalized short-circuit current for a cell with silicon strips can be increased 4 times compared to the best performance for strips of silver, gold, or aluminium. For this particular case, the simple dielectric grating may outperform its plasmonic......Several studies have indicated that broadband absorption of thin-film solar cells can be enhanced by use of surface-plasmon induced resonances of metallic parts like strips or particles. The metallic parts may create localized modes or scatter incoming light to increase absorption in thin......-film semiconducting material. For a particular case, we show that coupling to the same type of localized slab-waveguide modes can be obtained by a surface modulation consisting of purely dielectric strips. The purely dielectric device turns out to have a significantly higher broadband enhancement factor compared...

  8. Influence of gate dielectric on the ambipolar characteristics of solution-processed organic field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Ribierre, J C; Ghosh, S; Takaishi, K; Muto, T; Aoyama, T, E-mail: jcribierre@ewha.ac.kr, E-mail: taoyama@riken.jp [Advanced Science Institute, RIKEN, 2-1 Hirosawa, Wako, Saitama 351-0198 (Japan)

    2011-05-25

    Solution-processed ambipolar organic field-effect transistors based on dicyanomethylene-substituted quinoidal quaterthiophene derivative [QQT(CN)4] are fabricated using various gate dielectric materials including cross-linked polyimide and poly-4-vinylphenol. Devices with spin-coated polymeric gate dielectric layers show a reduced hysteresis in their transfer characteristics. Among the insulating polymers examined in this study, a new fluorinated polymer with a low dielectric constant of 2.8 significantly improves both hole and electron field-effect mobilities of QQT(CN)4 thin films to values as high as 0.04 and 0.002 cm{sup 2} V{sup -1} s{sup -1}. These values are close to the best mobilities obtained in QQT(CN)4 devices fabricated on SiO{sub 2} treated with octadecyltrichlorosilane. The influence of the metal used for source/drain metal electrodes on the device performance is also investigated. Whereas best device performances are achieved with gold electrodes, more balanced electron and hole field-effect mobilities could be obtained using chromium.

  9. Enhanced dielectric and electrical properties of annealed PVDF thin film

    Science.gov (United States)

    Arshad, A. N.; Rozana, M. D.; Wahid, M. H. M.; Mahmood, M. K. A.; Sarip, M. N.; Habibah, Z.; Rusop, M.

    2018-05-01

    Poly (vinylideneflouride) (PVDF) thin films were annealed at various annealing temperatures ranging from 70°C to 170°C. This study demonstrates that PVDF thin films annealed at temperature of 70°C (AN70) showed significant enhancement in their dielectric constant (14) at frequency of 1 kHz in comparison to un-annealed PVDF (UN-PVDF), dielectric constant (10) at the same measured frequency. As the annealing temperature was increased from 90°C (AN90) to 150°C (AN150), the dielectric constant value of PVDF thin films was observed to decrease gradually to 11. AN70 also revealed low tangent loss (tan δ) value at similar frequency. With respect to its resistivity properties, the values were found to increase from 1.98×104 Ω.cm to 3.24×104 Ω.cm for AN70 and UN-PVDF films respectively. The improved in dielectric constant, with low tangent loss and high resistivity value suggests that 70°C is the favorable annealing temperature for PVDF thin films. Hence, AN70 is a promising film to be utilized for application in electronic devices such as low frequency capacitor.

  10. Stimulated Raman gain scattering in thin planar dielectric waveguides

    NARCIS (Netherlands)

    Kanger, Johannes S.; Otto, Cornelis; Greve, Jan

    1995-01-01

    The stimulated Raman gain effect in planar dielectric waveguides is analyzed for the study of thin layers. Calculations show high gain factors and predict the possibility of detecting monolayers. Compared with those for methods based on ref lection, the gain can be 4 orders of magnitude higher for a

  11. Dual material gate doping-less tunnel FET with hetero gate dielectric for enhancement of analog/RF performance

    Science.gov (United States)

    Anand, Sunny; Sarin, R. K.

    2017-02-01

    In this paper, charge-plasma-based tunnel FET is proposed by employing dual material gate with hetero gate dielectric technique and it is named hetero-dielectric dual material gate doping-less TFET (HD_DMG_DLTFET). It is compared with conventional doping-less TFET (DLTFET) and dual material gate doping-less TFET (DMG_DLTFET) on the basis of analog and RF performance. The HD_DMG_DLTFET provides better ON state current ({I}\\text{ON}=94 μ \\text{A}/μ \\text{m}), {I}\\text{ON}/{I}\\text{OFF}(≈ 1.36× {10}13), \\text{point} (≈ 3\\text{mV}/\\text{dec}) and average subthreshold slope (\\text{AV}-\\text{SS}=40.40 \\text{mV}/\\text{dec}). The proposed device offers low total gate capacitance (C gg) along with higher drive current. However, with a better transconductance (g m) and cut-off frequency (f T), the HD_DMG_DLTFET can be a good candidate for RF circuitry. The early voltage (V EA) and output conductance (g d) are also moderate for the proposed device with comparison to other devices and therefore can be a candidate for analog devices. From all these simulation results and their study, it is observed that HD_DMG_DLTFET has improved analog/RF performance compared to DLTFET and DMG_DLTFET.

  12. Top-gate dielectric induced doping and scattering of charge carriers in epitaxial graphene

    Science.gov (United States)

    Puls, Conor P.; Staley, Neal E.; Moon, Jeong-Sun; Robinson, Joshua A.; Campbell, Paul M.; Tedesco, Joseph L.; Myers-Ward, Rachael L.; Eddy, Charles R.; Gaskill, D. Kurt; Liu, Ying

    2011-07-01

    We show that an e-gun deposited dielectric impose severe limits on epitaxial graphene-based device performance based on Raman spectroscopy and low-temperature transport measurements. Specifically, we show from studies of epitaxial graphene Hall bars covered by SiO2 that the measured carrier density is strongly inhomogenous and predominantly induced by charged impurities at the grapheme/dielectric interface that limit mobility via Coulomb interactions. Our work emphasizes that material integration of epitaxial graphene and a gate dielectric is the next major road block towards the realization of graphene-based electronics.

  13. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-06-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

  14. Effect of nanocomposite gate-dielectric properties on pentacene microstructure and field-effect transistor characteristics.

    Science.gov (United States)

    Lee, Wen-Hsi; Wang, Chun-Chieh

    2010-02-01

    In this study, the effect of surface energy and roughness of the nanocomposite gate dielectric on pentacene morphology and electrical properties of pentacene OTFT are reported. Nanoparticles TiO2 were added in the polyimide matrix to form a nanocomposite which has a significantly different surface characteristic from polyimide, leading to a discrepancy in the structural properties of pentacene growth. A growth mode of pentacene deposited on the nanocomposite is proposed to explain successfully the effect of surface properties of nanocomposite gate dielectric such as surface energy and roughness on the pentacene morphology and electrical properties of OTFT. To obtain the lower surface energy and smoother surface of nanocomposite gate dielectric that is responsible for the desired crystalline, microstructure of pentacene and electrical properties of device, a bottom contact OTFT-pentacene deposited on the double-layer nanocomposite gate dielectric consisting of top smoothing layer of the neat polyimide and bottom layer of (PI+ nano-TiO2 particles) nanocomposite has been successfully demonstrated to exhibit very promising performance including high current on to off ratio of about 6 x 10(5), threshold voltage of -10 V and moderately high filed mobility of 0.15 cm2V(-1)s(-1).

  15. Dry etching of MgCaO gate dielectric and passivation layers on GaN

    International Nuclear Information System (INIS)

    Hlad, M.; Voss, L.; Gila, B.P.; Abernathy, C.R.; Pearton, S.J.; Ren, F.

    2006-01-01

    MgCaO films grown by rf plasma-assisted molecular beam epitaxy and capped with Sc 2 O 3 are promising candidates as surface passivation layers and gate dielectrics on GaN-based high electron mobility transistors (HEMTs) and metal-oxide semiconductor HEMTs (MOS-HEMTs), respectively. Two different plasma chemistries were examined for etching these thin films on GaN. Inductively coupled plasmas of CH 4 /H 2 /Ar produced etch rates only in the range 20-70 A/min, comparable to the Ar sputter rates under the same conditions. Similarly slow MgCaO etch rates (∼100 A/min) were obtained with Cl 2 /Ar discharges under the same conditions, but GaN showed rates almost an order of magnitude higher. The MgCaO removal rates are limited by the low volatilities of the respective etch products. The CH 4 /H 2 /Ar plasma chemistry produced a selectivity of around 2 for etching the MgCaO with respect to GaN

  16. Feasibility study of using thin aluminum nitride film as a buffer layer for dual metal gate process

    International Nuclear Information System (INIS)

    Park, Chang Seo; Cho, Byung Jin; Balasubramanian, N.; Kwong, Dim-Lee

    2004-01-01

    We evaluated the feasibility of using an ultra thin aluminum nitride (AlN) buffer layer for dual metal gates CMOS process. Since the buffer layer should not affect the thickness of gate dielectric, it should be removed or consumed during subsequent process. In this work, it was shown that a thin AlN dielectric layer would be reacted with initial gate metals and would be consumed during subsequent annealing, resulting in no increase of equivalent oxide thickness (EOT). The reaction of AlN layer with tantalum (Ta) and hafnium (Hf) during subsequent annealing, which was confirmed with X-ray photoelectron spectroscopy (XPS) analysis, shifted the flat-band voltage of AlN buffered MOS capacitors. No contribution to equivalent oxide thickness (EOT) was also an indication showing the full consumption of AIN, which was confirmed with TEM analysis. The work functions of gate metals were modulated through the reaction, suggesting that the consumption of AlN resulted in new thin metal alloys. Finally, it was found that the barrier heights of the new alloys were consistent with their work functions

  17. Study of strained-Si p-channel MOSFETs with HfO2 gate dielectric

    Science.gov (United States)

    Pradhan, Diana; Das, Sanghamitra; Dash, Tara Prasanna

    2016-10-01

    In this work, the transconductance of strained-Si p-MOSFETs with high-K dielectric (HfO2) as gate oxide, has been presented through simulation using the TCAD tool Silvaco-ATLAS. The results have been compared with a SiO2/strained-Si p-MOSFET device. Peak transconductance enhancement factors of 2.97 and 2.73 has been obtained for strained-Si p-MOSFETs in comparison to bulk Si channel p-MOSFETs with SiO2 and high-K dielectric respectively. This behavior is in good agreement with the reported experimental results. The transconductance of the strained-Si device at low temperatures has also been simulated. As expected, the mobility and hence the transconductance increases at lower temperatures due to reduced phonon scattering. However, the enhancements with high-K gate dielectric is less as compared to that with SiO2.

  18. Gate dielectric strength dependent performance of CNT MOSFET and CNT TFET: A tight binding study

    Directory of Open Access Journals (Sweden)

    Md. Shamim Sarker

    Full Text Available This paper presents a comparative study between CNT MOSFET and CNT TFET taking into account of different dielectric strength of gate oxide materials. Here we have studied the transfer characteristics, on/off current (ION/IOFF ratio and subthreshold slope of the device using Non Equilibrium Greens Function (NEGF formalism in tight binding frameworks. The results are obtained by solving the NEGF and Poisson’s equation self-consistently in NanoTCADViDES environment and found that the ON state performance of CNT MOSFET and CNT TFET have significant dependency on the dielectric strength of the gate oxide materials. The figure of merits of the devices also demonstrates that the CNT TFET is promising for high-speed and low-power logic applications. Keywords: CNT TFET, Subthreshold slop, Barrier width, Conduction band (C.B and Valance band (V.B, Oxide dielectric strength, Tight binding approach

  19. Improved Gate Dielectric Deposition and Enhanced Electrical Stability for Single-Layer MoS2 MOSFET with an AlN Interfacial Layer.

    Science.gov (United States)

    Qian, Qingkai; Li, Baikui; Hua, Mengyuan; Zhang, Zhaofu; Lan, Feifei; Xu, Yongkuan; Yan, Ruyue; Chen, Kevin J

    2016-06-09

    Transistors based on MoS2 and other TMDs have been widely studied. The dangling-bond free surface of MoS2 has made the deposition of high-quality high-k dielectrics on MoS2 a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS2/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS2 metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS2 transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al2O3 on the dangling-bond free MoS2, but also greatly enhances the electrical stability of the MoS2 transistors. Very small hysteresis (ΔVth) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS2 transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al2O3 dielectric stack.

  20. Ultra-thin Metal and Dielectric Layers for Nanophotonic Applications

    DEFF Research Database (Denmark)

    Shkondin, Evgeniy; Leandro, Lorenzo; Malureanu, Radu

    2015-01-01

    In our talk we first give an overview of the various thin films used in the field of nanophotonics. Then we describe our own activity in fabrication and characterization of ultra-thin films of high quality. We particularly focus on uniform gold layers having thicknesses down to 6 nm fabricated by......-beam deposition on dielectric substrates and Al-oxides/Ti-oxides multilayers prepared by atomic layer deposition in high aspect ratio trenches. In the latter case we show more than 1:20 aspect ratio structures can be achieved....

  1. Enhanced dielectric properties of ZrO2 thin films prepared in nitrogen ambient by pulsed laser deposition

    International Nuclear Information System (INIS)

    Zhu, J; Li, T L; Pan, B; Zhou, L; Liu, Z G

    2003-01-01

    ZrO 2 thin films were fabricated in O 2 ambient and in N 2 ambient by pulsed laser deposition (PLD), respectively. X-ray diffraction revealed that films prepared at 400 deg. C remained amorphous. The dielectric properties of amorphous ZrO 2 films were investigated by measuring the capacitance-frequency characteristics of Pt/ZrO 2 /Pt capacitor structures. The dielectric constant of the films deposited in N 2 ambient was larger than that of the films deposited in O 2 ambient. The dielectric loss was lower for films prepared in N 2 ambient. Atom force microscopy investigation indicated that films deposited in N 2 ambient had smoother surface than films deposited in O 2 ambient. Capacitance-voltage and current-voltage characteristics were studied. The equivalent oxide thickness (EOT) of films with 6.6 nm physical thickness deposited in N 2 ambient is lower than that of films deposited in O 2 ambient. An EOT of 1.38 nm for the film deposited in N 2 ambient was obtained, while the leakage current density was 94.6 mA cm -2 . Therefore, ZrO 2 thins deposited in N 2 ambient have enhanced dielectric properties due to the incorporation of nitrogen which leads to the formation of Zr-doped nitride interfacial layer, and is suggested to be a potential material for alternative high-k (high dielectric constant) gate dielectric applications

  2. Dielectric and acoustical high frequency characterisation of PZT thin films

    Energy Technology Data Exchange (ETDEWEB)

    Conde, Janine; Muralt, Paul, E-mail: janine.conde@epfl.ch [Department of Materials Science, EPFL (Switzerland)

    2010-02-15

    Pb(Zr, Ti)O{sub 3} (PZT) is an interesting material for bulk acoustic wave resonator applications due to its high electromechanical coupling constant, which would enable fabrication of large bandwidth frequency filters. The major challenge of the PZT solid solution system is to overcome mechanical losses generally observed in PZT ceramics. To increase the understanding of these losses in textured thin films, thin film bulk acoustic resonators (TFBAR's) based on PZT thin films with compositions either in the tetragonal region or at the morphotropic phase boundary and (111) or {l_brace}100{r_brace} textures were fabricated and studied up to 2 GHz. The dielectric and elastic materials coefficients were extracted from impedance measurements at the resonance frequency. The dispersion of the dielectric constant was obtained from impedance measurements up to 2 GHz. The films with varying compositions, textures and deposition methods (sol-gel or sputtering) were compared in terms of dielectric and acoustical properties.

  3. Nanosecond Time-Resolved Microscopic Gate-Modulation Imaging of Polycrystalline Organic Thin-Film Transistors

    Science.gov (United States)

    Matsuoka, Satoshi; Tsutsumi, Jun'ya; Matsui, Hiroyuki; Kamata, Toshihide; Hasegawa, Tatsuo

    2018-02-01

    We develop a time-resolved microscopic gate-modulation (μ GM ) imaging technique to investigate the temporal evolution of the channel current and accumulated charges in polycrystalline pentacene thin-film transistors (TFTs). A time resolution of as high as 50 ns is achieved by using a fast image-intensifier system that could amplify a series of instantaneous optical microscopic images acquired at various time intervals after the stepped gate bias is switched on. The differential images obtained by subtracting the gate-off image allows us to acquire a series of temporal μ GM images that clearly show the gradual propagation of both channel charges and leaked gate fields within the polycrystalline channel layers. The frontal positions for the propagations of both channel charges and leaked gate fields coincide at all the time intervals, demonstrating that the layered gate dielectric capacitors are successively transversely charged up along the direction of current propagation. The initial μ GM images also indicate that the electric field effect is originally concentrated around a limited area with a width of a few micrometers bordering the channel-electrode interface, and that the field intensity reaches a maximum after 200 ns and then decays. The time required for charge propagation over the whole channel region with a length of 100 μ m is estimated at about 900 ns, which is consistent with the measured field-effect mobility and the temporal-response model for organic TFTs. The effect of grain boundaries can be also visualized by comparison of the μ GM images for the transient and the steady states, which confirms that the potential barriers at the grain boundaries cause the transient shift in the accumulated charges or the transient accumulation of additional charges around the grain boundaries.

  4. Effect of dual-dielectric hydrogen-diffusion barrier layers on the performance of low-temperature processed transparent InGaZnO thin-film transistors

    Science.gov (United States)

    Tari, Alireza; Wong, William S.

    2018-02-01

    Dual-dielectric SiOx/SiNx thin-film layers were used as back-channel and gate-dielectric barrier layers for bottom-gate InGaZnO (IGZO) thin-film transistors (TFTs). The concentration profiles of hydrogen, indium, gallium, and zinc oxide were analyzed using secondary-ion mass spectroscopy characterization. By implementing an effective H-diffusion barrier, the hydrogen concentration and the creation of H-induced oxygen deficiency (H-Vo complex) defects during the processing of passivated flexible IGZO TFTs were minimized. A bilayer back-channel passivation layer, consisting of electron-beam deposited SiOx on plasma-enhanced chemical vapor-deposition (PECVD) SiNx films, effectively protected the TFT active region from plasma damage and minimized changes in the chemical composition of the semiconductor layer. A dual-dielectric PECVD SiOx/PECVD SiNx gate-dielectric, using SiOx as a barrier layer, also effectively prevented out-diffusion of hydrogen atoms from the PECVD SiNx-gate dielectric to the IGZO channel layer during the device fabrication.

  5. Device performance of in situ steam generated gate dielectric nitrided by remote plasma nitridation

    International Nuclear Information System (INIS)

    Al-Shareef, H. N.; Karamcheti, A.; Luo, T. Y.; Bersuker, G.; Brown, G. A.; Murto, R. W.; Jackson, M. D.; Huff, H. R.; Kraus, P.; Lopes, D.

    2001-01-01

    In situ steam generated (ISSG) oxides have recently attracted interest for use as gate dielectrics because of their demonstrated reliability improvement over oxides formed by dry oxidation. [G. Minor, G. Xing, H. S. Joo, E. Sanchez, Y. Yokota, C. Chen, D. Lopes, and A. Balakrishna, Electrochem. Soc. Symp. Proc. 99-10, 3 (1999); T. Y. Luo, H. N. Al-Shareef, G. A. Brown, M. Laughery, V. Watt, A. Karamcheti, M. D. Jackson, and H. R. Huff, Proc. SPIE 4181, 220 (2000).] We show in this letter that nitridation of ISSG oxide using a remote plasma decreases the gate leakage current of ISSG oxide by an order of magnitude without significantly degrading transistor performance. In particular, it is shown that the peak normalized transconductance of n-channel devices with an ISSG oxide gate dielectric decreases by only 4% and the normalized drive current by only 3% after remote plasma nitridation (RPN). In addition, it is shown that the reliability of the ISSG oxide exhibits only a small degradation after RPN. These observations suggest that the ISSG/RPN process holds promise for gate dielectric applications. [copyright] 2001 American Institute of Physics

  6. Phosphorus oxide gate dielectric for black phosphorus field effect transistors

    Science.gov (United States)

    Dickerson, W.; Tayari, V.; Fakih, I.; Korinek, A.; Caporali, M.; Serrano-Ruiz, M.; Peruzzini, M.; Heun, S.; Botton, G. A.; Szkopek, T.

    2018-04-01

    The environmental stability of the layered semiconductor black phosphorus (bP) remains a challenge. Passivation of the bP surface with phosphorus oxide, POx, grown by a reactive ion etch with oxygen plasma is known to improve photoluminescence efficiency of exfoliated bP flakes. We apply phosphorus oxide passivation in the fabrication of bP field effect transistors using a gate stack consisting of a POx layer grown by reactive ion etching followed by atomic layer deposition of Al2O3. We observe room temperature top-gate mobilities of 115 cm2 V-1 s-1 in ambient conditions, which we attribute to the low defect density of the bP/POx interface.

  7. Polycrystalline diamond RF MOSFET with MoO3 gate dielectric

    Directory of Open Access Journals (Sweden)

    Zeyang Ren

    2017-12-01

    Full Text Available We report the radio frequency characteristics of the diamond metal-oxide-semiconductor field effect transistor with MoO3 gate dielectric for the first time. The device with 2-μm gate length was fabricated on high quality polycrystalline diamond. The maximum drain current of 150 mA/mm at VGS = -5 V and the maximum transconductance of 27 mS/mm were achieved. The extrinsic cutoff frequency of 1.2 GHz and the maximum oscillation frequency of 1.9 GHz have been measured. The moderate frequency characteristics are attributed to the moderate transconductance limited by the series resistance along the channel. We expect that the frequency characteristics of the device can be improved by increasing the magnitude of gm, or fundamentally decreasing the gate-controlled channel resistance and series resistance along the channel, and down-scaling the gate length.

  8. Application of Dielectric, Ferroelectric and Piezoelectric Thin Film Devices in Mobile Communication and Medical Systems

    NARCIS (Netherlands)

    Klee, M.; Beelen, D.; Keurl, W.; Kiewitt, R.; Kumar, B.; Mauczok, R.; Reimann, K.; Renders, Ch.; Roest, A.; Roozeboom, F.; Steeneken, P.G.; Tiggelman, M.P.J.; Vanhelmont, F.; Wunnicke, O.; Lok, P.; Neumann, K.; Fraser, J.; Schmitz, G.

    2007-01-01

    Dielectric, ferroelectric and piezoelectric thin films are getting more and more attention for next generation mobile communication and medical systems. Thin film technologies based on dielectric, ferroelectric and piezoelectric thin films enable System-in-Package (SiP) devices, resulting in optimal

  9. SiC Power MOSFET with Improved Gate Dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Sbrockey, Nick M. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Tompa, Gary S. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Spencer, Michael G. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Chandrashekhar, Chandra M.V. S. [Structured Materials Industries, Inc., Piscataway, NJ (United States)

    2010-08-23

    In this STTR program, Structured Materials Industries (SMI), and Cornell University are developing novel gate oxide technology, as a critical enabler for silicon carbide (SiC) devices. SiC is a wide bandgap semiconductor material, with many unique properties. SiC devices are ideally suited for high-power, highvoltage, high-frequency, high-temperature and radiation resistant applications. The DOE has expressed interest in developing SiC devices for use in extreme environments, in high energy physics applications and in power generation. The development of transistors based on the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) structure will be critical to these applications.

  10. Study of high-k gate dielectrics by means of positron annihilation

    International Nuclear Information System (INIS)

    Uedono, A.; Naito, T.; Otsuka, T.; Ito, K.; Shiraishi, K.; Yamabe, K.; Miyazaki, S.; Watanabe, H.; Umezawa, N.; Hamid, A.; Chikyow, T.; Ohdaira, T.; Suzuki, R.; Ishibashi, S.; Inumiya, S.; Kamiyama, S.; Akasaka, Y.; Nara, Y.; Yamada, K.

    2007-01-01

    High-dielectric constant (high-k) gate materials, such as HfSiO x and HfAlO x , fabricated by atomic-layer-deposition techniques were characterized using monoenergetic positron beams. Measurements of the Doppler broadening spectra of annihilation radiation and the lifetime spectra of positrons indicated that positrons annihilated from the trapped state by open volumes that exist intrinsically in amorphous structures of the films. The size distributions of the open volumes and the local atomic configurations around such volumes can be discussed using positron annihilation parameters, and they were found to correlate with the electrical properties of the films. We confirmed that the positron annihilation is useful technique to characterize the matrix structure of amorphous high-k materials, and can be used to determine process parameters for the fabrication of high-k gate dielectrics. (copyright 2007 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  11. Interface Engineering and Gate Dielectric Engineering for High Performance Ge MOSFETs

    Directory of Open Access Journals (Sweden)

    Jiabao Sun

    2015-01-01

    Full Text Available In recent years, germanium has attracted intensive interests for its promising applications in the microelectronics industry. However, to achieve high performance Ge channel devices, several critical issues still have to be addressed. Amongst them, a high quality gate stack, that is, a low defect interface layer and a dielectric layer, is of crucial importance. In this work, we first review the existing methods of interface engineering and gate dielectric engineering and then in more detail we discuss and compare three promising approaches (i.e., plasma postoxidation, high pressure oxidation, and ozone postoxidation. It has been confirmed that these approaches all can significantly improve the overall performance of the metal-oxide-semiconductor field effect transistor (MOSFET device.

  12. Influence of Gate Dielectrics, Electrodes and Channel Width on OFET Characteristics

    International Nuclear Information System (INIS)

    Liyana, V P; Stephania, A M; Shiju, K; Predeep, P

    2015-01-01

    Organic Field Effect Transistors (OFET) possess wide applications in large area electronics owing to their attractive features like easy fabrication process, light weight, flexibility, cost effectiveness etc. But instability, high operational voltages and low carrier mobility act as inhibitors to commercialization of OFETs and various approaches were tried on a regular basis so as to make it viable. In this work, Poly 3-hexylthiophene-2,5diyl (P3HT) based OFETs with bottom-contact top-gate configuration using Poly vinyl alcohol (PVA) and Poly (methyl methacrylate) (PMMA) as gate dielectrics, aluminium and copper as source-drain electrodes are investigated. An effort is made to compare the effect of these dielectric materials and electrodes on the performance of OFET. Also, an attempt has been made to optimize the channel width of the device. These devices are characterised with mobility (μ), threshold voltage (V T ), on-off ratio (I on /I off ) and their comparative analysis is reported. (paper)

  13. Influence of Gate Dielectrics, Electrodes and Channel Width on OFET Characteristics

    Science.gov (United States)

    Liyana, V. P.; Stephania, A. M.; Shiju, K.; Predeep, P.

    2015-06-01

    Organic Field Effect Transistors (OFET) possess wide applications in large area electronics owing to their attractive features like easy fabrication process, light weight, flexibility, cost effectiveness etc. But instability, high operational voltages and low carrier mobility act as inhibitors to commercialization of OFETs and various approaches were tried on a regular basis so as to make it viable. In this work, Poly 3-hexylthiophene-2,5diyl (P3HT) based OFETs with bottom-contact top-gate configuration using Poly vinyl alcohol (PVA) and Poly (methyl methacrylate) (PMMA) as gate dielectrics, aluminium and copper as source-drain electrodes are investigated. An effort is made to compare the effect of these dielectric materials and electrodes on the performance of OFET. Also, an attempt has been made to optimize the channel width of the device. These devices are characterised with mobility (μ), threshold voltage (VT), on-off ratio (Ion/Ioff) and their comparative analysis is reported.

  14. Effects of (NH4)2S x treatment on the surface properties of SiO2 as a gate dielectric for pentacene thin-film transistor applications

    Science.gov (United States)

    Hung, Cheng-Chun; Lin, Yow-Jon

    2018-01-01

    The effect of (NH4)2S x treatment on the surface properties of SiO2 is studied. (NH4)2S x treatment leads to the formation of S-Si bonds on the SiO2 surface that serves to reduce the number of donor-like trap states, inducing the shift of the Fermi level toward the conduction band minimum. A finding in this case is the noticeably reduced value of the SiO2 capacitance as the sulfurated layer is formed at the SiO2 surface. The effect of SiO2 layers with (NH4)2S x treatment on the carrier transport behaviors for the pentacene/SiO2-based organic thin-film transistor (OTFT) is also studied. The pentacene/as-cleaned SiO2-based OTFT shows depletion-mode behavior, whereas the pentacene/(NH4)2S x -treated SiO2-based OTFT exhibits enhancement-mode behavior. Experimental identification confirms that the depletion-/enhancement-mode conversion is due to the dominance competition between donor-like trap states in SiO2 near the pentacene/SiO2 interface and acceptor-like trap states in the pentacene channel. A sulfurated layer between pentacene and SiO2 is expected to give significant contributions to carrier transport for pentacene/SiO2-based OTFTs.

  15. Comprehensive Study of Lanthanum Aluminate High-Dielectric-Constant Gate Oxides for Advanced CMOS Devices

    Directory of Open Access Journals (Sweden)

    Masamichi Suzuki

    2012-03-01

    Full Text Available A comprehensive study of the electrical and physical characteristics of Lanthanum Aluminate (LaAlO3 high-dielectric-constant gate oxides for advanced CMOS devices was performed. The most distinctive feature of LaAlO3 as compared with Hf-based high-k materials is the thermal stability at the interface with Si, which suppresses the formation of a low-permittivity Si oxide interfacial layer. Careful selection of the film deposition conditions has enabled successful deposition of an LaAlO3 gate dielectric film with an equivalent oxide thickness (EOT of 0.31 nm. Direct contact with Si has been revealed to cause significant tensile strain to the Si in the interface region. The high stability of the effective work function with respect to the annealing conditions has been demonstrated through comparison with Hf-based dielectrics. It has also been shown that the effective work function can be tuned over a wide range by controlling the La/(La + Al atomic ratio. In addition, gate-first n-MOSFETs with ultrathin EOT that use sulfur-implanted Schottky source/drain technology have been fabricated using a low-temperature process.

  16. Structural, dielectric and ferroelectric characterization of PZT thin films

    Directory of Open Access Journals (Sweden)

    Araújo E.B.

    1999-01-01

    Full Text Available In this work ferroelectric thin films of PZT were prepared by the oxide precursor method, deposited on Pt/Si substrate. Films of 0.5 mm average thickness were obtained. Electrical and ferroelectric characterization were carried out in these films. The measured value of the dielectric constant for films was 455. Ferroelectricity was confirmed by Capacitance-Voltage (C-V characteristics and P-E hysteresis loops. Remanent polarization for films presented value around 5.0 µC/cm2 and a coercive field of 88.8 kV/cm.

  17. The memory effect of a pentacene field-effect transistor with a polarizable gate dielectric

    Science.gov (United States)

    Unni, K. N. N.; de Bettignies, Remi; Dabos-Seignon, Sylvie; Nunzi, Jean-Michel

    2004-06-01

    The nonvolatile transistor memory element is an interesting topic in organic electronics. In this case a memory cell consists of only one device where the stored information is written as a gate insulator polarization by a gate voltage pulse and read by the channel conductance control with channel voltage pulse without destruction of the stored information. Therefore such transistor could be the base of non-volatile non-destructively readable computer memory of extremely high density. Also devices with polarizable gate dielectrics can function more effectively in certain circuits. The effective threshold voltage Vt can be brought very close to zero, for applications where the available gate voltage is limited. Resonant and adaptive circuits can be tuned insitu by polarizing the gates. Poly(vinylidene fluoride), PVDF and its copolymer with trifluoroethylene P(VDF-TrFE) are among the best known and most widely used ferroelectric polymers. In this manuscript, we report new results of an organic FET, fabricated with pentacene as the active material and P(VDF-TrFE) as the gate insulator. Application of a writing voltage of -50 V for short duration results in significant change in the threshold voltage and remarkable increase in the drain current. The memory effect is retained over a period of 20 hours.

  18. MIS field effect transistor with barium titanate thin film as a gate insulator

    Energy Technology Data Exchange (ETDEWEB)

    Firek, P., E-mail: pfirek@elka.pw.edu.p [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland); Werbowy, A.; Szmidt, J. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland)

    2009-11-25

    The properties of barium titanate (BaTiO{sub 3}, BT) like, e.g. high dielectric constant and resistivity, allow it to find numerous applications in field of microelectronics. In this work silicon metal insulator semiconductor field effect transistor (MISFET) structures with BaTiO{sub 3} (containing La{sub 2}O{sub 3} admixture) thin films in a role of gate insulator were investigated. The films were produced by means of radio frequency plasma sputtering (RF PS) of sintered BaTiO{sub 3} + La{sub 2}O{sub 3} (2 wt.%) target. In the paper transfer and output current-voltage (I-V), transconductance and output conductance characteristics of obtained transistors are presented and discussed. Basic parameters of these devices like, e.g. threshold voltage (V{sub TH}), are determined and discussed.

  19. Label Free Detection of Biomolecules Using Charge-Plasma-Based Gate Underlap Dielectric Modulated Junctionless TFET

    Science.gov (United States)

    Wadhwa, Girish; Raj, Balwinder

    2018-05-01

    Nanoscale devices are emerging as a platform for detecting biomolecules. Various issues were observed during the fabrication process such as random dopant fluctuation and thermal budget. To reduce these issues charge-plasma-based concept is introduced. This paper proposes the implementation of charge-plasma-based gate underlap dielectric modulated junctionless tunnel field effect transistor (DM-JLTFET) for the revelation of biomolecule immobilized in the open cavity gate channel region. In this p+ source and n+ drain regions are introduced by employing different work function over the intrinsic silicon. Also dual material gate architecture is implemented to reduce short channel effect without abandoning any other device characteristic. The sensitivity of biosensor is studied for both the neutral and charge-neutral biomolecules. The effect of device parameters such as channel thickness, cavity length and cavity thickness on drain current have been analyzed through simulations. This paper investigates the performance of charge-plasma-based gate underlap DM-JLTFET for biomolecule sensing applications while varying dielectric constant, charge density at different biasing conditions.

  20. Bio Organic-Semiconductor Field-Effect Transistor (BioFET) Based on Deoxyribonucleic Acid (DNA) Gate Dielectric

    Science.gov (United States)

    2010-03-31

    floating gate devices and metal-insulator-oxide-semiconductor (MIOS) devices. First attempts to use polarizable gate insulators in combination with...bulk of the semiconductor (ii) Due to the polarizable gate dielectric (iii) dipole polarization and (iv)electret effect due to mobile ions in the...characterization was carried out under an argon environment inside the glove box. An Agilent model E5273A with a two source-measurement unit instrument was

  1. Laser-induced damage to thin film dielectric coatings

    International Nuclear Information System (INIS)

    Walker, T.W.

    1980-01-01

    The laser-induced damage thresholds of dielectric thin film coatings have been found to be more than an order of magnitude lower than the bulk material damage thresholds. Prior damage studies have been inconclusive in determining the damage mechanism which is operative in thin films. A program was conducted in which thin film damage thresholds were measured as a function of laser wavelength (1.06 μm, 0.53 μm, 0.35 μm and 0.26 μm), laser pulse length (5 and 15 nanoseconds), film materials and film thickness. The large matrix of data was compared to predictions given by avalanche ionization, multiphoton ionization and impurity theories of laser damage. When Mie absorption cross-sections and the exact thermal equations were included into the impurity theory excellent agreement with the data was found. The avalanche and multiphoton damage theories could not account for most parametric variations in the data. For example, the damage thresholds for most films increased as the film thickness decreased and only the impurity theory could account for this behavior. Other observed changes in damage threshold with changes in laser wavelength, pulse length and film material could only be adequately explained by the impurity theory. The conclusion which results from this study is that laser damage in thin film coatings results from absorbing impurities included during the deposition process

  2. Novel organic semiconductors and dielectric materials for high performance and low-voltage organic thin-film transistors

    Science.gov (United States)

    Yoon, Myung-Han

    Two novel classes of organic semiconductors based on perfluoroarene/arene-modified oligothiophenes and perfluoroacyl/acyl-derivatized quaterthiophens are developed. The frontier molecular orbital energies of these compounds are studied by optical spectroscopy and electrochemistry while solid-state/film properties are investigated by thermal analysis, x-ray diffraction, and scanning electron microscopy. Organic thin film transistors (OTFTs) performance parameters are discussed in terms of the interplay between semiconductor molecular energetics and film morphologies/microstructures. For perfluoroarene-thiophene oligomer systems, majority charge carrier type and mobility exhibit a strong correlation with the regiochemistry of perfluoroarene incorporation. In quaterthiophene-based semiconductors, carbonyl-functionalization allows tuning of the majority carrier type from p-type to ambipolar and to n-type. In situ conversion of a p-type semiconducting film to n-type film is also demonstrated. Very thin self-assembled or spin-on organic dielectric films have been integrated into OTFTs to achieve 1 - 2 V operating voltages. These new dielectrics are deposited either by layer-by-layer solution phase deposition of molecular precursors or by spin-coating a mixture of polymer and crosslinker, resulting in smooth and virtually pinhole-free thin films having exceptionally large capacitances (300--700 nF/cm2) and low leakage currents (10 -9 - 10-7 A/cm2). These organic dielectrics are compatible with various vapor- or solution-deposited p- and n-channel organic semiconductors. Furthermore, it is demonstrated that spin-on crosslinked-polymer-blend dielectrics can be employed for large-area/patterned electronics, and complementary inverters. A general approach for probing semiconductor-dielectric interface effects on OTFT performance parameters using bilayer gate dielectrics is presented. Organic semiconductors having p-, n-type, or ambipolar majority charge carriers are grown on

  3. GaN MOSHEMT employing HfO2 as a gate dielectric with partially etched barrier

    Science.gov (United States)

    Han, Kefeng; Zhu, Lin

    2017-09-01

    In order to suppress the gate leakage current of a GaN high electron mobility transistor (GaN HEMT), a GaN metal-oxide-semiconductor high electron mobility transistor (MOSHEMT) is proposed, in which a metal-oxide-semiconductor gate with high-dielectric-constant HfO2 as an insulating dielectric is employed to replace the traditional GaN HEMT Schottky gate. A 0.5 μm gate length GaN MOSHEMT was fabricated based on the proposed structure, the {{{Al}}}0.28{{{Ga}}}0.72{{N}} barrier layer is partially etched to produce a higher transconductance without deteriorating the transport characteristics of the two-dimensional electron gas in the channel, the gate dielectric is HfO2 deposited by atomic layer deposition. Current-voltage characteristics and radio frequency characteristics are obtained after device preparation, the maximum current density of the device is 900 mA mm-1, the source-drain breakdown voltage is 75 V, gate current is significantly suppressed and the forward gate voltage swing range is about ten times higher than traditional GaN HEMTs, the GaN MOSHEMT also demonstrates radio frequency characteristics comparable to traditional GaN HEMTs with the same gate length.

  4. The TDDB Characteristics of Ultra-Thin Gate Oxide MOS Capacitors under Constant Voltage Stress and Substrate Hot-Carrier Injection

    Directory of Open Access Journals (Sweden)

    Jingyu Shen

    2018-01-01

    Full Text Available The breakdown characteristics of ultra-thin gate oxide MOS capacitors fabricated in 65 nm CMOS technology under constant voltage stress and substrate hot-carrier injection are investigated. Compared to normal thick gate oxide, the degradation mechanism of time-dependent dielectric breakdown (TDDB of ultra-thin gate oxide is found to be different. It is found that the gate current (Ig of ultra-thin gate oxide MOS capacitor is more likely to be induced not only by Fowler-Nordheim (F-N tunneling electrons, but also by electrons surmounting barrier and penetrating electrons in the condition of constant voltage stress. Moreover it is shown that the time to breakdown (tbd under substrate hot-carrier injection is far less than that under constant voltage stress when the failure criterion is defined as a hard breakdown according to the experimental results. The TDDB mechanism of ultra-thin gate oxide will be detailed. The differences in TDDB characteristics of MOS capacitors induced by constant voltage stress and substrate hot-carrier injection will be also discussed.

  5. Pentacene-Based Thin Film Transistor with Inkjet-Printed Nanocomposite High-K Dielectrics

    Directory of Open Access Journals (Sweden)

    Chao-Te Liu

    2012-01-01

    Full Text Available The nanocomposite gate insulating film of a pentacene-based thin film transistor was deposited by inkjet printing. In this study, utilizing the pearl miller to crumble the agglomerations and the dispersant to well stabilize the dispersion of nano-TiO2 particles in the polymer matrix of the ink increases the dose concentration for pico-jetting, which could be as the gate dielectric film made by inkjet printing without the photography process. Finally, we realized top contact pentacene-TFTs and successfully accomplished the purpose of directly patternability and increase the performance of the device based on the nanocomposite by inkjet printing. These devices exhibited p-channel TFT characteristics with a high field-effect mobility (a saturation mobility of ̃0.58 cm2 V−1 s−1, a large current ratio (>103 and a low operation voltage (<6 V. Furthermore, we accorded the deposited mechanisms which caused the interface difference between of inkjet printing and spin coating. And we used XRD, SEM, Raman spectroscopy to help us analyze the transfer characteristics of pentacene films and the performance of OTFTs.

  6. Origin of switching current transients in TIPS-pentacene based organic thin-film transistor with polymer dielectric

    Science.gov (United States)

    Singh, Subhash; Mohapatra, Y. N.

    2017-06-01

    We have investigated switch-on drain-source current transients in fully solution-processed thin film transistors based on 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) using cross-linked poly-4-vinylphenol as a dielectric. We show that the nature of the transient (increasing or decreasing) depends on both the temperature and the amplitude of the switching pulse at the gate. The isothermal transients are analyzed spectroscopically in a time domain to extract the degree of non-exponentiality and its possible origin in trap kinetics. We propose a phenomenological model in which the exchange of electrons between interfacial ions and traps controls the nature of the drain current transients dictated by the Fermi level position. The origin of interfacial ions is attributed to the essential fabrication step of UV-ozone treatment of the dielectric prior to semiconductor deposition.

  7. Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs).

    Science.gov (United States)

    Choi, Woo Young; Lee, Hyun Kook

    2016-01-01

    The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

  8. Characteristics of dual-gate thin-film transistors for applications in digital radiology

    International Nuclear Information System (INIS)

    Waechter, D.; Huang, Z.; Zhao, W.; Blevis, I.; Rowlands, J.A.

    1996-01-01

    A large-area flat-panel detector for digital radiology is being developed. The detector uses an array of dual-gate thin-film transistors (TFTs) to read out X-ray-generated charge produced in an amorphous selenium (a-Se) layer. The TFTs use CdSe as the semiconductor and use the bottom gate for row selection. The top gate can be divided into a 'deliberate' gate, covering most of the channel length, and small 'parasitic' gates that consist of: overlap of source or drain metal over the top-gate oxide; and gap regions in the metal that are covered only by the a-Se. In this paper we present the properties of dual-gate TFTs and examine the effect of both the deliberate and parasitic gates on the detector operation. Various options for controlling the top-gate potential are analyzed and discussed. (author)

  9. Materials science, integration, and performance characterization of high-dielectric constant thin film based devices

    Science.gov (United States)

    Fan, Wei

    To overcome the oxidation and diffusion problems encountered during Copper integration with oxide thin film-based devices, TiAl/Cu/Ta heterostructure has been first developed in this study. Investigation on the oxidation and diffusion resistance of the laminate structure showed high electrical conductance and excellent thermal stability in oxygen environment. Two amorphous oxide layers that were formed on both sides of the TiAl barrier after heating in oxygen have been revealed as the structure that effectively prevents oxygen penetration and protects the integrity of underlying Cu layer. Polycrystalline (BaxSr1-x)TiO3 (BST) thin films were subsequently deposited on the Cu-based bottom electrode by RF magnetron sputtering to investigate the interaction between the oxide and Cu layers. The thickness of the interfacial layer and interface roughness play critical roles in the optimization of the electrical performance of the BST capacitors using Cu-based electrode. It was determined that BST deposition at moderate temperature followed by rapid thermal annealing in pure oxygen yields BST/Cu capacitors with good electrical properties for application to high frequency devices. The knowledge obtained on the study of barrier properties of TiAl inspired a continuous research on the materials science issues related to the application of the hybrid TiAlOx, as high-k gate dielectric in MOSFET devices. Novel fabrication process such as deposition of ultra-thin TiAl alloy layer followed by oxidation with atomic oxygen has been established in this study. Stoichiometric amorphous TiAlOx layers, exhibiting only Ti4+ and Al3+ states, were produced with a large variation of oxidation temperature (700°C to room temperature). The interfacial SiOx formation between TiAlOx and Si was substantially inhibited by the use of the low temperature oxidation process. Electrical characterization revealed a large permittivity of 30 and an improved band structure for the produced TiAlOx layers

  10. Structural, dielectric and AC conductivity study of Sb2O3 thin film ...

    Indian Academy of Sciences (India)

    52

    However, to date, no reports have appeared on impedance spectroscopy, modulus behavior, electrical conductivity, dielectric relaxation and dielectric properties of crystalline Sb2O3 thin films. This paper deals for the first time with the frequency and temperature dependence of AC conductivity and complex electric modulus ...

  11. Low operating voltage InGaZnO thin-film transistors based on Al2O3 high-k dielectrics fabricated using pulsed laser deposition

    International Nuclear Information System (INIS)

    Geng, G. Z.; Liu, G. X.; Zhang, Q.; Shan, F. K.; Lee, W. J.; Shin, B. C.; Cho, C. R.

    2014-01-01

    Low-voltage-driven amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) with an Al 2 O 3 dielectric were fabricated on a Si substrate by using pulsed laser deposition. Both Al 2 O 3 and IGZO thin films are amorphous, and the thin films have very smooth surfaces. The Al 2 O 3 gate dielectric exhibits a very low leakage current density of 1.3 x 10 -8 A/cm 2 at 5 V and a high capacitance density of 60.9 nF/cm 2 . The IGZO TFT with a structure of Ni/IGZO/Al 2 O 3 /Si exhibits high performance with a low threshold voltage of 1.18 V, a high field effect mobility of 20.25 cm 2 V -1 s -1 , an ultra small subthreshold swing of 87 mV/decade, and a high on/off current ratio of 3 x 10 7 .

  12. Effect of titanium oxide-polystyrene nanocomposite dielectrics on morphology and thin film transistor performance for organic and polymeric semiconductors

    Energy Technology Data Exchange (ETDEWEB)

    Della Pelle, Andrea M. [LGS Innovations, 15 Vreeland Rd., Florham Park, NJ 07932 (United States); Department of Chemistry, University of Massachusetts Amherst, 710 N. Pleasant St. Amherst, MA 01003 (United States); Maliakal, Ashok, E-mail: maliakal@lgsinnovations.com [LGS Innovations, 15 Vreeland Rd., Florham Park, NJ 07932 (United States); Sidorenko, Alexander [Department of Chemistry and Biochemistry, University of the Sciences, 600 South 43rd St., Philadelphia, PA 191034 (United States); Thayumanavan, S. [Department of Chemistry, University of Massachusetts Amherst, 710 N. Pleasant St. Amherst, MA 01003 (United States)

    2012-07-31

    Previous studies have shown that organic thin film transistors with pentacene deposited on gate dielectrics composed of a blend of high K titanium oxide-polystyrene core-shell nanocomposite (TiO{sub 2}-PS) with polystyrene (PS) perform with an order of magnitude increase in saturation mobility for TiO{sub 2}-PS (K = 8) as compared to PS devices (K = 2.5). The current study finds that this performance enhancement can be translated to alternative small single crystal organics such as {alpha}-sexithiophene ({alpha}-6T) (enhancement factor for field effect mobility ranging from 30-100 Multiplication-Sign higher on TiO{sub 2}-PS/PS blended dielectrics as compared to homogenous PS dielectrics). Interestingly however, in the case of semicrystalline polymers such as (poly-3-hexylthiophene) P3HT, this dramatic enhancement is not observed, possibly due to the difference in processing conditions used to fabricate these devices (film transfer as opposed to thermal evaporation). The morphology for {alpha}-sexithiophene ({alpha}-6T) grown by thermal evaporation on TiO{sub 2}-PS/PS blended dielectrics parallels that observed in pentacene devices. Smaller grain size is observed for films grown on dielectrics with higher TiO{sub 2}-PS content. In the case of poly(3-hexylthiophene) (P3HT) devices, constructed via film transfer, morphological differences exist for the P3HT on different substrates, as discerned by atomic force microscopy studies. However, these devices only exhibit a modest (2 Multiplication-Sign ) increase in mobility with increasing TiO{sub 2}-PS content in the films. After annealing of the transferred P3HT thin film transistor (TFT) devices, no appreciable enhancement in mobility is observed across the different blended dielectrics. Overall the results support the hypothesis that nucleation rate is responsible for changes in film morphology and device performance in thermally evaporated small molecule crystalline organic semiconductor TFTs. The increased nucleation

  13. Effect of titanium oxide–polystyrene nanocomposite dielectrics on morphology and thin film transistor performance for organic and polymeric semiconductors

    International Nuclear Information System (INIS)

    Della Pelle, Andrea M.; Maliakal, Ashok; Sidorenko, Alexander; Thayumanavan, S.

    2012-01-01

    Previous studies have shown that organic thin film transistors with pentacene deposited on gate dielectrics composed of a blend of high K titanium oxide–polystyrene core–shell nanocomposite (TiO 2 –PS) with polystyrene (PS) perform with an order of magnitude increase in saturation mobility for TiO 2 –PS (K = 8) as compared to PS devices (K = 2.5). The current study finds that this performance enhancement can be translated to alternative small single crystal organics such as α-sexithiophene (α-6T) (enhancement factor for field effect mobility ranging from 30-100× higher on TiO 2 –PS/PS blended dielectrics as compared to homogenous PS dielectrics). Interestingly however, in the case of semicrystalline polymers such as (poly-3-hexylthiophene) P3HT, this dramatic enhancement is not observed, possibly due to the difference in processing conditions used to fabricate these devices (film transfer as opposed to thermal evaporation). The morphology for α-sexithiophene (α-6T) grown by thermal evaporation on TiO 2 –PS/PS blended dielectrics parallels that observed in pentacene devices. Smaller grain size is observed for films grown on dielectrics with higher TiO 2 –PS content. In the case of poly(3-hexylthiophene) (P3HT) devices, constructed via film transfer, morphological differences exist for the P3HT on different substrates, as discerned by atomic force microscopy studies. However, these devices only exhibit a modest (2×) increase in mobility with increasing TiO 2 –PS content in the films. After annealing of the transferred P3HT thin film transistor (TFT) devices, no appreciable enhancement in mobility is observed across the different blended dielectrics. Overall the results support the hypothesis that nucleation rate is responsible for changes in film morphology and device performance in thermally evaporated small molecule crystalline organic semiconductor TFTs. The increased nucleation rate produces organic polycrystalline films with small grain

  14. Effect of incorporation of nitrogen atoms in Al2O3 gate dielectric of wide-bandgap-semiconductor MOSFET on gate leakage current and negative fixed charge

    Science.gov (United States)

    Kojima, Eiji; Chokawa, Kenta; Shirakawa, Hiroki; Araidai, Masaaki; Hosoi, Takuji; Watanabe, Heiji; Shiraishi, Kenji

    2018-06-01

    We performed first-principle calculations to investigate the effect of incorporation of N atoms into Al2O3 gate dielectrics. Our calculations show that the defect levels generated by VO in Al2O3 are the origin of the stress-induced gate leakage current and that VOVAl complexes in Al2O3 cause negative fixed charge. We revealed that the incorporation of N atoms into Al2O3 eliminates the VO defect levels, reducing the stress-induced gate leakage current. Moreover, this suppresses the formation of negatively charged VOVAl complexes. Therefore, AlON can reduce both stress-induced gate leakage current and negative fixed charge in wide-bandgap-semiconductor MOSFETs.

  15. Effect of gate dielectrics on the performance of p-type Cu2O TFTs processed at room temperature

    KAUST Repository

    Al-Jawhari, Hala A.; Caraveo-Frescas, Jesus Alfonso

    2013-01-01

    /off ratio of around 44, threshold voltage equaling -0.62 V and a sub threshold swing of 1.64 V/dec. These values were obtained at a low operating voltage of -2V. The advantages of using STO as a gate dielectric relative to ATO are discussed. © (2014) Trans

  16. Improved integration of ultra-thin high-k dielectrics in few-layer MoS2 FET by remote forming gas plasma pretreatment

    Science.gov (United States)

    Wang, Xiao; Zhang, Tian-Bao; Yang, Wen; Zhu, Hao; Chen, Lin; Sun, Qing-Qing; Zhang, David Wei

    2017-01-01

    The effective and high-quality integration of high-k dielectrics on two-dimensional (2D) crystals is essential to the device structure engineering and performance improvement of field-effect transistor (FET) based on the 2D semiconductors. We report a 2D MoS2 transistor with ultra-thin Al2O3 top-gate dielectric (6.1 nm) and extremely low leakage current. Remote forming gas plasma pretreatment was carried out prior to the atomic layer deposition, providing nucleation sites with the physically adsorbed ions on the MoS2 surface. The top gate MoS2 FET exhibited excellent electrical performance, including high on/off current ratio over 109, subthreshold swing of 85 mV/decade and field-effect mobility of 45.03 cm2/V s. Top gate leakage current less than 0.08 pA/μm2 at 4 MV/cm has been obtained, which is the smallest compared with the reported top-gated MoS2 transistors. Such an optimized integration of high-k dielectric in 2D semiconductor FET with enhanced performance is very attractive, and it paves the way towards the realization of more advanced 2D nanoelectronic devices and integrated circuits.

  17. Chemical vapor deposited monolayer MoS2 top-gate MOSFET with atomic-layer-deposited ZrO2 as gate dielectric

    Science.gov (United States)

    Hu, Yaoqiao; Jiang, Huaxing; Lau, Kei May; Li, Qiang

    2018-04-01

    For the first time, ZrO2 dielectric deposition on pristine monolayer MoS2 by atomic layer deposition (ALD) is demonstrated and ZrO2/MoS2 top-gate MOSFETs have been fabricated. ALD ZrO2 overcoat, like other high-k oxides such as HfO2 and Al2O3, was shown to enhance the MoS2 channel mobility. As a result, an on/off current ratio of over 107, a subthreshold slope of 276 mV dec-1, and a field-effect electron mobility of 12.1 cm2 V-1 s-1 have been achieved. The maximum drain current of the MOSFET with a top-gate length of 4 μm and a source/drain spacing of 9 μm is measured to be 1.4 μA μm-1 at V DS = 5 V. The gate leakage current is below 10-2 A cm-2 under a gate bias of 10 V. A high dielectric breakdown field of 4.9 MV cm-1 is obtained. Gate hysteresis and frequency-dependent capacitance-voltage measurements were also performed to characterize the ZrO2/MoS2 interface quality, which yielded an interface state density of ˜3 × 1012 cm-2 eV-1.

  18. Fabrication of amorphous InGaZnO thin-film transistor with solution processed SrZrO3 gate insulator

    Science.gov (United States)

    Takahashi, Takanori; Oikawa, Kento; Hoga, Takeshi; Uraoka, Yukiharu; Uchiyama, Kiyoshi

    2017-10-01

    In this paper, we describe a method of fabrication of thin film transistors (TFTs) with high dielectric constant (high-k) gate insulator by a solution deposition. We chose a solution processed SrZrO3 as a gate insulator material, which possesses a high dielectric constant of 21 with smooth surface. The IGZO-TFT with solution processed SrZrO3 showed good switching property and enough saturation features, i.e. field effect mobility of 1.7cm2/Vs, threshold voltage of 4.8V, sub-threshold swing of 147mV/decade, and on/off ratio of 2.3×107. Comparing to the TFTs with conventional SiO2 gate insulator, the sub-threshold swing was improved by smooth surface and high field effect due to the high dielectric constant of SrZrO3. These results clearly showed that use of solution processed high-k SrZrO3 gate insulator could improve sub-threshold swing. In addition, the residual carbon originated from organic precursors makes TFT performances degraded.

  19. Dielectric property study of poly(4-vinylphenol)-graphene oxide nanocomposite thin film

    Science.gov (United States)

    Roy, Dhrubojyoti

    2018-05-01

    Thin film capacitor device having a sandwich structure of indium tin oxide (ITO)-coated glass/polymer or polymer nanocomposite /silver has been fabricated and their dielectric and leakage current properties has been studied. The dielectric properties of the capacitors were characterized for frequencies ranging from 1 KHz to 1 MHz. 5 wt% Poly(4-vinylphenol)(PVPh)-Graphene (GO) nanocomposite exhibited an increase in dielectric constant to 5.6 and small rise in dielectric loss to around˜0.05 at 10 KHz w.r.t polymer. The DC conductivity measurements reveal rise of leakage current in nanocomposite.

  20. Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance

    Science.gov (United States)

    Yadav, Dharmendra Singh; Verma, Abhishek; Sharma, Dheeraj; Tirkey, Sukeshni; Raad, Bhagwan Ram

    2017-11-01

    Tunnel-field-effect-transistor (TFET) has emerged as one of the most prominent devices to replace conventional MOSFET due to its ability to provide sub-threshold slope below 60 mV/decade (SS ≤ 60 mV/decade) and low leakage current. Despite this, TFETs suffer from ambipolar behavior, lower ON-state current, and poor RF performance. To address these issues, we have introduced drain and gate work function engineering with hetero gate dielectric for the first time in charge plasma based doping-less TFET (DL TFET). In this, the usage of dual work functionality over the drain region significantly reduces the ambipolar behavior of the device by varying the energy barrier at drain/channel interface. Whereas, the presence of dual work function at the gate terminal increases the ON-state current (ION). The combined effect of dual work function at the gate and drain electrode results in the increment of ON-state current (ION) and decrement of ambipolar conduction (Iambi) respectively. Furthermore, the incorporation of hetero gate dielectric along with dual work functionality at the drain and gate electrode provides an overall improvement in the performance of the device in terms of reduction in ambipolarity, threshold voltage and sub-threshold slope along with improved ON-state current and high frequency figures of merit.

  1. Al2O3 nanocrystals embedded in amorphous Lu2O3 high-k gate dielectric for floating gate memory application

    International Nuclear Information System (INIS)

    Yuan, C L; Chan, M Y; Lee, P S; Darmawan, P; Setiawan, Y

    2007-01-01

    The integration of nanoparticles has high potential in technological applications and opens up possibilities of the development of new devices. Compared to the conventional floating gate memory, a structure containing nanocrystals embedded in dielectrics shows high potential to produce a memory with high endurance, low operating voltage, fast write-erase speeds and better immunity to soft errors [S. Tiwari, F. Rana, H. Hanafi et al. 1996 Appl.Phys. Lett. 68, 1377]. A significant improvement on data retention [J. J. Lee, X. Wang et al. 2003 Proceedings of the VLSI Technol. Symposium, p33] can be observed when discrete nanodots are used instead of continuous floating gate as charge storage nodes because local defect related leakage can be reduced efficiently. Furthermore, using a high-k dielectric in place of the conventional SiO2 based dielectric, nanodots flash memory is able to achieve significantly improved programming efficiency and data retention [A. Thean and J. -P. Leburton, 2002 IEEE Potentials 21, 35; D. W. Kim, T. Kim and S. K. Banerjee, 2003 IEEE Trans. Electron Devices 50, 1823]. We have recently successfully developed a method to produce nanodots embedded in high-k gate dielectrics [C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Electrochemical and Solid-State Letters 9, F53; C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Europhys. Lett. 74, 177]. In this paper, we fabricated the memory structure of Al 2 O 3 nanocrystals embedded in amorphous Lu 2 O 3 high k dielectric using pulsed laser ablation. The mean size and density of the Al 2 O 3 nanocrystals are estimated to be about 5 nm and 7x1011 cm -2 , respectively. Good electrical performances in terms of large memory window and good data retention were observed. Our preparation method is simple, fast and economical

  2. Electroresistance effect in gold thin film induced by ionic-liquid-gated electric double layer

    International Nuclear Information System (INIS)

    Nakayama, Hiroyasu; Ohtani, Takashi; Fujikawa, Yasunori; Ando, Kazuya; Saitoh, Eiji; Ye, Jianting; Iwasa, Yoshihiro

    2012-01-01

    Electroresistance effect was detected in a metallic thin film using ionic-liquid-gated electric-double-layer transistors (EDLTs). We observed reversible modulation of the electric resistance of a Au thin film. In this system, we found that an electric double layer works as a nanogap capacitor with 27 (-25) MV cm -1 of electric field by applying only 1.7 V of positive (negative) gate voltage. The experimental results indicate that the ionic-liquid-gated EDLT technique can be used for controlling the surface electronic states on metallic systems. (author)

  3. Analyzing nitrogen concentration using carrier illumination (CI) technology for DPN ultra-thin gate oxide

    International Nuclear Information System (INIS)

    Li, W.S.; Wu, Bill; Fan, Aki; Kuo, C.W.; Segovia, M.; Kek, H.A.

    2005-01-01

    Nitrogen concentration in the gate oxide plays a key role for 90 nm and below ULSI technology. Techniques like secondary ionization mass spectroscopy (SIMS) and X-ray photoelectron spectroscopy (XPS) are commonly used for understanding N concentration. This paper describes the application of the carrier illuminationTM (CI) technique to measure the nitrogen concentration in ultra-thin gate oxides. A set of ultra-thin gate oxide wafers with different DPN (decoupled plasma nitridation) treatment conditions were measured using the CI technique. The CI signal has excellent correlation with the N concentration as measured by XPS

  4. Investigation of SiO2 thin films dielectric constant using ellipsometry technique

    Directory of Open Access Journals (Sweden)

    P Sangpour

    2014-11-01

    Full Text Available In this paper, we studied the optical behavior of SiO2 thin films prepared via sol-gel route using spin coating deposition from tetraethylorthosilicate (TEOS as precursor. Thin films were annealed at different temperatures (400-600oC. Absorption edge and band gap of thin layers were measured using UV-Vis spectrophotometery. Optical refractive index and dielectric constant were measured by ellipsometry technique. Based on our atomic force microscopic (AFM and ellipsometry results, thin layers prepared through this method showed high surface area, and high porosity ranging between 4.9 and 16.9, low density 2 g/cm, and low dielectric constant. The dielectric constant and porosity of layers increased by increasing the temperature due to the changes in surface roughness and particle size.

  5. Low operating voltage n-channel organic field effect transistors using lithium fluoride/PMMA bilayer gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

    2015-10-15

    Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device and thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.

  6. Dielectric response of fully and partially depleted ferroelectric thin films and inversion of the thickness effect

    International Nuclear Information System (INIS)

    Misirlioglu, I B; Yildiz, M

    2013-01-01

    We study the effect of full and partial depletion on the dielectric response characteristics of ferroelectric thin films with impurities via a computational approach. Using a thermodynamic approach along with the fundamental equations for semiconductors, we show that films with partial depletion display unique features and an enhanced dielectric response compared with those fully depleted. We find that the capacitance peak at switching can be significantly suppressed in the case of high impurity densities (>10 25 m −3 ) with relatively low ionization energy, of the order of 0.5 eV. For conserved number of species in films, electromigration of ionized impurities at room temperature is negligible and has nearly no effect on the dielectric response. In films with high impurity density, the dielectric response at zero bias is enhanced with respect to charge-free films or those with relatively low impurity density ( 24 m −3 ). We demonstrate that partially depleted films should be expected to exhibit peculiar capacitance–voltage characteristics at low and high bias and that the thickness effect probed in experiments in ferroelectric thin films could be entirely inverted in thin films with depletion charges where a higher dielectric response can be measured in thicker films. Therefore, depletion charge densities in ferroelectric thin films should be estimated before size-effect-related studies. Finally, we noted that these findings are in good qualitative agreement with dielectric measurements carried out on PbZr x Ti 1−x O 3 . (paper)

  7. Thin film silicon on silicon nitride for radiation hardened dielectrically isolated MISFET's

    International Nuclear Information System (INIS)

    Neamen, D.; Shedd, W.; Buchanan, B.

    1975-01-01

    The permanent ionizing radiation effects resulting from charge trapping in a silicon nitride isolation dielectric have been determined for a total ionizing dose up to 10 7 rads (Si). Junction FET's, whose active channel region is directly adjacent to the silicon-silicon nitride interface, were used to measure the effects of the radiation induced charge trapping in the Si 3 N 4 isolation dielectric. The JFET saturation current and channel conductance versus junction gate voltage and substrate voltage were characterized as a function of the total ionizing radiation dose. The experimental results on the Si 3 N 4 are compared to results on similar devices with SiO 2 dielectric isolation. The ramifications of using the silicon nitride for fabricating radiation hardened dielectrically isolated MIS devices are discussed

  8. Electroresistance Effect in Gold Thin Film Induced by Ionic-Liquid-Gated Electric Double Layer

    NARCIS (Netherlands)

    Nakayama, Hiroyasu; Ye, Jianting; Ohtani, Takashi; Fujikawa, Yasunori; Ando, Kazuya; Iwasa, Yoshihiro; Saitoh, Eiji

    Electroresistance effect was detected in a metallic thin film using ionic-liquid-gated electric-double-layer transistors (EDLTs). We observed reversible modulation of the electric resistance of a Au thin film. In this system, we found that an electric double layer works as a nanogap capacitor with

  9. Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.

    Science.gov (United States)

    Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

    2016-12-01

    In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade(-1) and 3.62 × 10(11) eV(-1) cm(-2), respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

  10. Dielectric materials for use in thin-film capacitors

    Science.gov (United States)

    Carr, H. E.; Foster, W. D.; Fromhold, A. T., Jr.; Harbuck, T. A.

    1969-01-01

    Investigation report presents details of dielectric properties of various metals measured at 300 degrees K for thermally evaporated oxides from 300 to 6000 A in thickness. It is relevant to the medium of integrated circuitry.

  11. Long-Term Synaptic Plasticity Emulated in Modified Graphene Oxide Electrolyte Gated IZO-Based Thin-Film Transistors.

    Science.gov (United States)

    Yang, Yi; Wen, Juan; Guo, Liqiang; Wan, Xiang; Du, Peifu; Feng, Ping; Shi, Yi; Wan, Qing

    2016-11-09

    Emulating neural behaviors at the synaptic level is of great significance for building neuromorphic computational systems and realizing artificial intelligence. Here, oxide-based electric double-layer (EDL) thin-film transistors were fabricated using 3-triethoxysilylpropylamine modified graphene oxide (KH550-GO) electrolyte as the gate dielectrics. Resulting from the EDL effect and electrochemical doping between mobile protons and the indium-zinc-oxide channel layer, long-term synaptic plasticity was emulated in our devices. Synaptic functions including long-term memory, synaptic temporal integration, and dynamic filters were successfully reproduced. In particular, spike rate-dependent plasticity (SRDP), one of the basic learning rules of long-term plasticity in the neural network where the synaptic weight changes according to the rate of presynaptic spikes, was emulated in our devices. Our results may facilitate the development of neuromorphic computational systems.

  12. Multi-material gate poly-crystalline thin film transistors: Modeling and simulation for an improved gate transport efficiency

    International Nuclear Information System (INIS)

    Sehgal, Amit; Mangla, Tina; Gupta, Mridula; Gupta, R.S.

    2008-01-01

    In this work, a two-dimensional potential distribution formulation is presented for multi-material gate poly-crystalline silicon thin film transistors. The developed formulation incorporates the effects due to traps and grain-boundaries. In short-channel devices, short-channel effects and drain-induced barrier lowering (DIBL) effect exists, and are accounted for in the analysis. The work aims at the reduction of DIBL effect and grain-boundary effects i.e. to reduce the potential barriers generated in the channel by employing gate-engineered structures. A study of work-functions and electrode lengths of multi-material gate electrode is done to suppress the potential barriers, hot electron effect and to improve the carrier transport efficiency. Green's function approach is adopted for the two-dimensional potential solution. The results obtained show a good agreement with simulated results, thus, demonstrating the validity of our model

  13. Highly stretchable carbon nanotube transistors enabled by buckled ion gel gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Wu, Meng-Yin; Chang, Tzu-Hsuan; Ma, Zhenqiang [Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, Wisconsin 53706 (United States); Zhao, Juan [School of Optoelectronic Information, University of Electronic Science and Technology of China, Chengdu 610054 (China); Department of Materials Science and Engineering, University of Wisconsin-Madison, Madison, Wisconsin 53706 (United States); Xu, Feng; Jacobberger, Robert M.; Arnold, Michael S., E-mail: michael.arnold@wisc.edu [Department of Materials Science and Engineering, University of Wisconsin-Madison, Madison, Wisconsin 53706 (United States)

    2015-08-03

    Deformable field-effect transistors (FETs) are expected to facilitate new technologies like stretchable displays, conformal devices, and electronic skins. We previously demonstrated stretchable FETs based on buckled thin films of polyfluorene-wrapped semiconducting single-walled carbon nanotubes as the channel, buckled metal films as electrodes, and unbuckled flexible ion gel films as the dielectric. The FETs were stretchable up to 50% without appreciable degradation in performance before failure of the ion gel film. Here, we show that by buckling the ion gel, the integrity and performance of the nanotube FETs are extended to nearly 90% elongation, limited by the stretchability of the elastomer substrate. The FETs maintain an on/off ratio of >10{sup 4} and a field-effect mobility of 5 cm{sup 2} V{sup −1} s{sup −1} under elongation and demonstrate invariant performance over 1000 stretching cycles.

  14. Highly stretchable carbon nanotube transistors enabled by buckled ion gel gate dielectrics

    International Nuclear Information System (INIS)

    Wu, Meng-Yin; Chang, Tzu-Hsuan; Ma, Zhenqiang; Zhao, Juan; Xu, Feng; Jacobberger, Robert M.; Arnold, Michael S.

    2015-01-01

    Deformable field-effect transistors (FETs) are expected to facilitate new technologies like stretchable displays, conformal devices, and electronic skins. We previously demonstrated stretchable FETs based on buckled thin films of polyfluorene-wrapped semiconducting single-walled carbon nanotubes as the channel, buckled metal films as electrodes, and unbuckled flexible ion gel films as the dielectric. The FETs were stretchable up to 50% without appreciable degradation in performance before failure of the ion gel film. Here, we show that by buckling the ion gel, the integrity and performance of the nanotube FETs are extended to nearly 90% elongation, limited by the stretchability of the elastomer substrate. The FETs maintain an on/off ratio of >10 4 and a field-effect mobility of 5 cm 2 V −1 s −1 under elongation and demonstrate invariant performance over 1000 stretching cycles

  15. High carrier mobility of CoPc wires based field-effect transistors using bi-layer gate dielectric

    Directory of Open Access Journals (Sweden)

    Murali Gedda

    2013-11-01

    Full Text Available Polyvinyl alcohol (PVA and anodized Al2O3 layers were used as bi-layer gate for the fabrication of cobalt phthalocyanine (CoPc wire base field-effect transistors (OFETs. CoPc wires were grown on SiO2 surfaces by organic vapor phase deposition method. These devices exhibit a field-effect carrier mobility (μEF value of 1.11 cm2/Vs. The high carrier mobility for CoPc molecules is attributed to the better capacitive coupling between the channel of CoPc wires and the gate through organic-inorganic dielectric layer. Our measurements also demonstrated the way to determine the thicknesses of the dielectric layers for a better process condition of OFETs.

  16. Mechanical characterization of zeolite low dielectric constant thin films by nanoindentation

    International Nuclear Information System (INIS)

    Johnson, Mark; Li Zijian; Wang Junlan; Ya, Yushan

    2007-01-01

    With semiconductor technologies continuously pushing the miniaturization limits, there is a growing interest in developing novel low dielectric constant materials to replace the traditional dense SiO 2 insulators. In order to survive the multi-level integration process and provide reliable material and structure for the desired integrated circuits (IC) functions, the new low-k materials have to be mechanically strong and stable. Therefore the material selection and mechanical characterization are vital for the successful development of next generation low-k dielectrics. A new class of low-k materials, nanoporous pure-silica zeolite, is prepared in thin films using IC compatible spin coating process and characterized using depth sensing nanoindentation technique. The elastic modulus of the zeolite thin films is found to be significantly higher than that of other low-k materials with similar porosity and dielectric constants. Correlations between the mechanical, microstructural and electrical properties of the thin films are discussed in detail

  17. HfO2 as gate dielectric on Ge: Interfaces and deposition techniques

    International Nuclear Information System (INIS)

    Caymax, M.; Van Elshocht, S.; Houssa, M.; Delabie, A.; Conard, T.; Meuris, M.; Heyns, M.M.; Dimoulas, A.; Spiga, S.; Fanciulli, M.; Seo, J.W.; Goncharova, L.V.

    2006-01-01

    To fabricate MOS gate stacks on Ge, one can choose from a multitude of metal oxides as dielectric material which can be deposited by many chemical or physical vapor deposition techniques. As a few typical examples, we will discuss here the results from atomic layer deposition (ALD), metal organic CVD (MOCVD) and molecular beam deposition (MBD) using HfO 2 /Ge as materials model system. It appears that a completely interface layer free HfO 2 /Ge combination can be made in MBD, but this results in very bad capacitors. The same bad result we find if HfGe y (Hf germanides) are formed like in the case of MOCVD on HF-dipped Ge. A GeO x interfacial layer appears to be indispensable (if no other passivating materials are applied), but the composition of this interfacial layer (as determined by XPS, TOFSIMS and MEIS) is determining for the C/V quality. On the other hand, the presence of Ge in the HfO 2 layer is not the most important factor that can be responsible for poor C/V, although it can still induce bumps in C/V curves, especially in the form of germanates (Hf-O-Ge). We find that most of these interfacial GeO x layers are in fact sub-oxides, and that this could be (part of) the explanation for the high interfacial state densities. In conclusion, we find that the Ge surface preparation is determining for the gate stack quality, but it needs to be adapted to the specific deposition technique

  18. Functional Design of Dielectric-Metal-Dielectric-Based Thin-Film Encapsulation with Heat Transfer and Flexibility for Flexible Displays.

    Science.gov (United States)

    Kwon, Jeong Hyun; Choi, Seungyeop; Jeon, Yongmin; Kim, Hyuncheol; Chang, Ki Soo; Choi, Kyung Cheol

    2017-08-16

    In this study, a new and efficient dielectric-metal-dielectric-based thin-film encapsulation (DMD-TFE) with an inserted Ag thin film is proposed to guarantee the reliability of flexible displays by improving the barrier properties, mechanical flexibility, and heat dissipation, which are considered to be essential requirements for organic light-emitting diode (OLED) encapsulation. The DMD-TFE, which is composed of Al 2 O 3 , Ag, and a silica nanoparticle-embedded sol-gel hybrid nanocomposite, shows a water vapor transmission rate of 8.70 × 10 -6 g/m 2 /day and good mechanical reliability at a bending radius of 30 mm, corresponding to 0.41% strain for 1000 bending cycles. The electrical performance of a thin-film encapsulated phosphorescent organic light-emitting diode (PHOLED) was identical to that of a glass-lid encapsulated PHOLED. The operational lifetimes of the thin-film encapsulated and glass-lid encapsulated PHOLEDs are 832 and 754 h, respectively. After 80 days, the thin-film encapsulated PHOLED did not show performance degradation or dark spots on the cell image in a shelf-lifetime test. Finally, the difference in lifetime of the OLED devices in relation to the presence and thickness of a Ag film was analyzed by applying various TFE structures to fluorescent organic light-emitting diodes (FOLEDs) that could generate high amounts of heat. To demonstrate the difference in heat dissipation effect among the TFE structures, the saturated temperatures of the encapsulated FOLEDs were measured from the back side surface of the glass substrate, and were found to be 67.78, 65.12, 60.44, and 39.67 °C after all encapsulated FOLEDs were operated at an initial luminance of 10 000 cd/m 2 for sufficient heat generation. Furthermore, the operational lifetime tests of the encapsulated FOLED devices showed results that were consistent with the measurements of real-time temperature profiles taken with an infrared camera. A multifunctional hybrid thin-film encapsulation

  19. Electrical and materials properties of ZrO2 gate dielectrics grown by atomic layer chemical vapor deposition

    Science.gov (United States)

    Perkins, Charles M.; Triplett, Baylor B.; McIntyre, Paul C.; Saraswat, Krishna C.; Haukka, Suvi; Tuominen, Marko

    2001-04-01

    Structural and electrical properties of gate stack structures containing ZrO2 dielectrics were investigated. The ZrO2 films were deposited by atomic layer chemical vapor deposition (ALCVD) after different substrate preparations. The structure, composition, and interfacial characteristics of these gate stacks were examined using cross-sectional transmission electron microscopy and x-ray photoelectron spectroscopy. The ZrO2 films were polycrystalline with either a cubic or tetragonal crystal structure. An amorphous interfacial layer with a moderate dielectric constant formed between the ZrO2 layer and the substrate during ALCVD growth on chemical oxide-terminated silicon. Gate stacks with a measured equivalent oxide thickness (EOT) of 1.3 nm showed leakage values of 10-5 A/cm2 at a bias of -1 V from flatband, which is significantly less than that seen with SiO2 dielectrics of similar EOT. A hysteresis of 8-10 mV was seen for ±2 V sweeps while a midgap interface state density (Dit) of ˜3×1011 states/cm eV was determined from comparisons of measured and ideal capacitance curves.

  20. Application of calendering for improving the electrical characteristics of a printed top-gate, bottom-contact organic thin film transistors

    Science.gov (United States)

    Lee, Sang Hoon; Lee, Dong Geun; Jung, Hoeryong; Lee, Sangyoon

    2018-05-01

    Interface between the channel and the gate dielectric of organic thin film transistors (OTFTs) needs to be smoothed in order to improve the electrical characteristics. In this study, an optimized calendering process was proposed to improve the surface roughness of the channel. Top-gate, bottom-contact structural p-type OTFT samples were fabricated using roll-to-roll gravure printing (source/drain, channel), spin coating (gate dielectric), and inkjet printing (gate electrode). The calendering process was optimized using the grey-based Taguchi method. The channel surface roughness and electrical characteristics of calendered and non-calendered samples were measured and compared. As a result, the average improvement in the surface roughness of the calendered samples was 26.61%. The average on–off ratio and field-effect mobility of the calendered samples were 3.574 × 104 and 0.1113 cm2 V‑1 s‑1, respectively, which correspond to the improvements of 16.72 and 10.20%, respectively.

  1. Design of Higher-k and More Stable Rare Earth Oxides as Gate Dielectrics for Advanced CMOS Devices

    Directory of Open Access Journals (Sweden)

    Yi Zhao

    2012-08-01

    Full Text Available High permittivity (k gate dielectric films are widely studied to substitute SiO2 as gate oxides to suppress the unacceptable gate leakage current when the traditional SiO2 gate oxide becomes ultrathin. For high-k gate oxides, several material properties are dominantly important. The first one, undoubtedly, is permittivity. It has been well studied by many groups in terms of how to obtain a higher permittivity for popular high-k oxides, like HfO2 and La2O3. The second one is crystallization behavior. Although it’s still under the debate whether an amorphous film is definitely better than ploy-crystallized oxide film as a gate oxide upon considering the crystal boundaries induced leakage current, the crystallization behavior should be well understood for a high-k gate oxide because it could also, to some degree, determine the permittivity of the high-k oxide. Finally, some high-k gate oxides, especially rare earth oxides (like La2O3, are not stable in air and very hygroscopic, forming hydroxide. This topic has been well investigated in over the years and significant progresses have been achieved. In this paper, I will intensively review the most recent progresses of the experimental and theoretical studies for preparing higher-k and more stable, in terms of hygroscopic tolerance and crystallization behavior, Hf- and La-based ternary high-k gate oxides.

  2. Palladium Gate All Around - Hetero Dielectric -Tunnel FET based highly sensitive Hydrogen Gas Sensor

    Science.gov (United States)

    Madan, Jaya; Chaujar, Rishu

    2016-12-01

    The paper presents a novel highly sensitive Hetero-Dielectric-Gate All Around Tunneling FET (HD-GAA-TFET) based Hydrogen Gas Sensor, incorporating the advantages of band to band tunneling (BTBT) mechanism. Here, the Palladium supported silicon dioxide is used as a sensing media and sensing relies on the interaction of hydrogen with Palladium-SiO2-Si. The high surface to volume ratio in the case of cylindrical GAA structure enhances the fortuities for surface reactions between H2 gas and Pd, and thus improves the sensitivity and stability of the sensor. Behaviour of the sensor in presence of hydrogen and at elevated temperatures is discussed. The conduction path of the sensor which is dependent on sensors radius has also been varied for the optimized sensitivity and static performance analysis of the sensor where the proposed design exhibits a superior performance in terms of threshold voltage, subthreshold swing, and band to band tunneling rate. Stability of the sensor with respect to temperature affectability has also been studied, and it is found that the device is reasonably stable and highly sensitive over the bearable temperature range. The successful utilization of HD-GAA-TFET in gas sensors may open a new door for the development of novel nanostructure gas sensing devices.

  3. Modeling of Dual Gate Material Hetero-dielectric Strained PNPN TFET for Improved ON Current

    Science.gov (United States)

    Kumari, Tripty; Saha, Priyanka; Dash, Dinesh Kumar; Sarkar, Subir Kumar

    2018-01-01

    The tunnel field effect transistor (TFET) is considered to be a promising alternative device for future low-power VLSI circuits due to its steep subthreshold slope, low leakage current and its efficient performance at low supply voltage. However, the main challenging issue associated with realizing TFET for wide scale applications is its low ON current. To overcome this, a dual gate material with the concept of dielectric engineering has been incorporated into conventional TFET structure to tune the tunneling width at source-channel interface allowing significant flow of carriers. In addition to this, N+ pocket is implanted at source-channel junction of the proposed structure and the effect of strain is added for exploring the performance of the model in nanoscale regime. All these added features upgrade the device characteristics leading to higher ON current, low leakage and low threshold voltage. The present work derives the surface potential, electric field expression and drain current by solving 2D Poisson's equation at different boundary conditions. A comparative analysis of proposed model with conventional TFET has been done to establish the superiority of the proposed structure. All analytical results have been compared with the results obtained in SILVACO ATLAS device simulator to establish the accuracy of the derived analytical model.

  4. Effect of crystal structure on strontium titanate thin films and their dielectric properties

    Science.gov (United States)

    Kampangkeaw, Satreerat

    Strontium titanate (SrTiO3 or STO) has application in radio and microwave-frequency tunable capacitor devices particularly at low temperatures due to its high dielectric constant, low loss and the electric field tunability of its dielectric constant. The main goal of improving the performance in these devices is to increase the tunability and decrease the dielectric loss at the same time, especially at microwave frequencies. Thin films of STO however, show dramatic differences compared to the bulk. The dielectric constant of bulk STO increases nonlinearly from 300 at room temperature to 30000 at 4 K and the loss range is 10-3--10 -4. On the other hand. STO thin films, while showing a dielectric constant close to 300 at room temperature, typically reach a maximum between 1000 and 10000 in the 30 K to 100 K range before decreasing, and the high-loss range is 10-2--10-3. We have grown strontium titanate thin films using a pulsed laser deposition technique on substrates selected to have a small lattice mismatch between the film and substrate. Neodymium gallate (NdGaO3 or NGO) and lanthanum aluminate (LaAlO3 or LAO) substrates were good candidates due to only 1--2% mismatching. Film capacitor devices were fabricated with 25 micron gap separation. 1.5 mm total gap length and an overall 1 x 2 mm dimension using standard lithography and gold metal evaporative techniques. Their nonlinear dielectric constant and loss tangent were measured at low frequencies and also at 2 GHz, and from room temperature down to 4 K. The resulting films show significant variations of dielectric properties with position on the substrates with respect to the deposition plume axis. In the presence of DC electric fields up to +/-4 V/mum, STO films show improved dielectric tunability and low loss in regions far from the plume axis. We found that the films grown on NCO have lower dielectric loss than those on LAO due to a closer match of the NCO lattice to that of STO. We investigated the possible

  5. Bi-axially crumpled silver thin-film electrodes for dielectric elastomer actuators

    International Nuclear Information System (INIS)

    Low, Sze-Hsien; Lau, Gih-Keong

    2014-01-01

    Metal thin films, which have high conductivity, are much stiffer and may fracture at a much lower strain than dielectric elastomers. In order to fabricate compliant electrodes for use in dielectric elastomer actuators (DEAs), metal thin films have been formed into either zigzag patterns or corrugations, which favour bending and only allow uniaxial DEA deformations. However, biaxially compliant electrodes are desired in order to maximize generated forces of DEA. In this paper, we present crumpled metal thin-film electrodes that are biaxially compliant and have full area coverage over the dielectric elastomer. These crumpled metal thin-film electrodes are more stretchable than flat metal thin films; they remain conductive beyond 110% radial strain. Also, crumpling reduced the stiffening effect of metal thin films on the soft elastomer. As such, DEAs using crumpled metal thin-film electrodes managed to attain relatively high actuated area strains of up to 128% at 1.8 kV (102 Vμm −1 ). (paper)

  6. AlN and Al oxy-nitride gate dielectrics for reliable gate stacks on Ge and InGaAs channels

    Energy Technology Data Exchange (ETDEWEB)

    Guo, Y.; Li, H.; Robertson, J. [Engineering Department, Cambridge University, Cambridge CB2 1PZ (United Kingdom)

    2016-05-28

    AlN and Al oxy-nitride dielectric layers are proposed instead of Al{sub 2}O{sub 3} as a component of the gate dielectric stacks on higher mobility channels in metal oxide field effect transistors to improve their positive bias stress instability reliability. It is calculated that the gap states of nitrogen vacancies in AlN lie further away in energy from the semiconductor band gap than those of oxygen vacancies in Al{sub 2}O{sub 3}, and thus AlN might be less susceptible to charge trapping and have a better reliability performance. The unfavourable defect energy level distribution in amorphous Al{sub 2}O{sub 3} is attributed to its larger coordination disorder compared to the more symmetrically bonded AlN. Al oxy-nitride is also predicted to have less tendency for charge trapping.

  7. Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

    International Nuclear Information System (INIS)

    Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa

    2014-01-01

    An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized

  8. Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

    Energy Technology Data Exchange (ETDEWEB)

    Han, Jinhua; Wang, Wei, E-mail: wwei99@jlu.edu.cn; Ying, Jun; Xie, Wenfa [State Key Laboratory on Integrated Optoelectronics, College of Electronic Science and Engineering, Jilin University, 2699 Qianjin Street, Changchun 130012 (China)

    2014-01-06

    An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

  9. Influence of Doping Concentration on Dielectric, Optical, and Morphological Properties of PMMA Thin Films

    Directory of Open Access Journals (Sweden)

    Lyly Nyl Ismail

    2012-01-01

    Full Text Available PMMA thin films were deposited by sol gel spin coating method on ITO substrates. Toluene was used as the solvent to dissolve the PMMA powder. The PMMA concentration was varied from 30 ~ 120 mg. The dielectric properties were measured at frequency of 0 ~ 100 kHz. The dielectric permittivity was in the range of 7.3 to 7.5 which decreased as the PMMA concentration increased. The dielectric loss is in the range of 0.01 ~ –0.01. All samples show dielectric characteristics which have dielectric loss is less than 0.05. The optical properties for thin films were measured at room temperature across 200 ~ 1000 nm wavelength region. All samples are highly transparent. The energy band gaps are in the range of 3.6 eV to 3.9 eV when the PMMA concentration increased. The morphologies of the samples show that all samples are uniform and the surface roughness increased as the concentration increased. From this study, it is known that, the dielectric, optical, and morphology properties were influenced by the amount of PMMA concentration in the solution.

  10. Dielectric relaxation of barium strontium titanate and application to thin films for DRAM capacitors

    Science.gov (United States)

    Baniecki, John David

    This thesis examines the issues associated with incorporating the high dielectric constant material Barium Strontium Titanate (BSTO) in to the storage capacitor of a dynamic random access memory (DRAM). The research is focused on two areas: characterizing and understanding the factors that control charge retention in BSTO thin films and modifying the electrical properties using ion implantation. The dielectric relaxation of BSTO thin films deposited by metal-organic chemical vapor deposition (MOCVD) is investigated in the time and frequency domains. It is shown that the frequency dispersion of the complex capacitance of BSTO thin films can be understood in terms of a power-law frequency dependence from 1mHz to 20GHz. From the correspondence between the time and frequency domain measurements, it is concluded that the power-law relaxation currents extend back to the nano second regime of DRAM operation. The temperature, field, and annealing dependence of the dielectric relaxation currents are also investigated and mechanisms for the observed power law relaxation are explored. An equivalent circuit model of a high dielectric constant thin film capacitor is developed based on the electrical measurements and implemented in PSPICE. Excellent agreement is found between the experimental and simulated electrical characteristics showing the utility of the equivalent circuit model in simulating the electrical properties of high dielectric constant thin films. Using the equivalent circuit model, it is shown that the greatest charge loss due to dielectric relaxation occurs during the first read after a refresh time following a write to the opposite logic state for a capacitor that has been written to the same logic state for a long time (opposite state write charge loss). A theoretical closed form expression that is a function of three material parameters is developed which estimates the opposite state write charge loss due to dielectric relaxation. Using the closed form

  11. Towards low-voltage organic thin film transistors (OTFTs with solution-processed high-k dielectric and interface engineering

    Directory of Open Access Journals (Sweden)

    Yaorong Su

    2015-11-01

    Full Text Available Although impressive progress has been made in improving the performance of organic thin film transistors (OTFTs, the high operation voltage resulting from the low gate capacitance density of traditional SiO2 remains a severe limitation that hinders OTFTs'development in practical applications. In this regard, developing new materials with high-k characteristics at low cost is of great scientific and technological importance in the area of both academia and industry. Here, we introduce a simple solution-based technique to fabricate high-k metal oxide dielectric system (ATO at low-temperature, which can be used effectively to realize low-voltage operation of OTFTs. On the other hand, it is well known that the properties of the dielectric/semiconductor and electrode/semiconductor interfaces are crucial in controlling the electrical properties of OTFTs. By optimizing the above two interfaces with octadecylphosphonic acid (ODPA self-assembled monolayer (SAM and properly modified low-cost Cu, obviously improved device performance is attained in our low-voltage OTFTs. Further more, organic electronic devices on flexible substrates have attracted much attention due to their low-cost, rollability, large-area processability, and so on. Basing on the above results, outstanding electrical performance is achieved in flexible devices. Our studies demonstrate an effective way to realize low-voltage, high-performance OTFTs at low-cost.

  12. Dielectrophoretic deformation of thin liquid films induced by surface charge patterns on dielectric substrates

    NARCIS (Netherlands)

    Berendsen, C.W.J.; Kuijpers, C.J.; Zeegers, J.C.H.; Darhuber, A.A.

    2013-01-01

    We studied the deformation of thin liquid films induced by surface charge patterns at the solid–liquid interface quantitatively by experiments and numerical simulations. We deposited a surface charge distribution on dielectric substrates by applying potential differences between a conductive liquid

  13. Charge carrier mobility in thin films of organic semiconductors by the gated van der Pauw method

    Science.gov (United States)

    Rolin, Cedric; Kang, Enpu; Lee, Jeong-Hwan; Borghs, Gustaaf; Heremans, Paul; Genoe, Jan

    2017-01-01

    Thin film transistors based on high-mobility organic semiconductors are prone to contact problems that complicate the interpretation of their electrical characteristics and the extraction of important material parameters such as the charge carrier mobility. Here we report on the gated van der Pauw method for the simple and accurate determination of the electrical characteristics of thin semiconducting films, independently from contact effects. We test our method on thin films of seven high-mobility organic semiconductors of both polarities: device fabrication is fully compatible with common transistor process flows and device measurements deliver consistent and precise values for the charge carrier mobility and threshold voltage in the high-charge carrier density regime that is representative of transistor operation. The gated van der Pauw method is broadly applicable to thin films of semiconductors and enables a simple and clean parameter extraction independent from contact effects. PMID:28397852

  14. Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

    Science.gov (United States)

    Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

    2015-03-04

    Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

  15. Interfacial Cation-Defect Charge Dipoles in Stacked TiO2/Al2O3 Gate Dielectrics.

    Science.gov (United States)

    Zhang, Liangliang; Janotti, Anderson; Meng, Andrew C; Tang, Kechao; Van de Walle, Chris G; McIntyre, Paul C

    2018-02-14

    Layered atomic-layer-deposited and forming-gas-annealed TiO 2 /Al 2 O 3 dielectric stacks, with the Al 2 O 3 layer interposed between the TiO 2 and a p-type germanium substrate, are found to exhibit a significant interface charge dipole that causes a ∼-0.2 V shift of the flat-band voltage and suppresses the leakage current density for gate injection of electrons. These effects can be eliminated by the formation of a trilayer dielectric stack, consistent with the cancellation of one TiO 2 /Al 2 O 3 interface dipole by the addition of another dipole of opposite sign. Density functional theory calculations indicate that the observed interface-dependent properties of TiO 2 /Al 2 O 3 dielectric stacks are consistent in sign and magnitude with the predicted behavior of Al Ti and Ti Al point-defect dipoles produced by local intermixing of the Al 2 O 3 /TiO 2 layers across the interface. Evidence for such intermixing is found in both electrical and physical characterization of the gate stacks.

  16. Effect of top gate potential on bias-stress for dual gate amorphous indium-gallium-zinc-oxide thin film transistor

    Energy Technology Data Exchange (ETDEWEB)

    Chun, Minkyu; Um, Jae Gwang; Park, Min Sang; Chowdhury, Md Delwar Hossain; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 02447 (Korea, Republic of)

    2016-07-15

    We report the abnormal behavior of the threshold voltage (V{sub TH}) shift under positive bias Temperature stress (PBTS) and negative bias temperature stress (NBTS) at top/bottom gate in dual gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). It is found that the PBTS at top gate shows negative transfer shift and NBTS shows positive transfer shift for both top and bottom gate sweep. The shift of bottom/top gate sweep is dominated by top gate bias (V{sub TG}), while bottom gate bias (V{sub BG}) is less effect than V{sub TG}. The X-ray photoelectron spectroscopy (XPS) depth profile provides the evidence of In metal diffusion to the top SiO{sub 2}/a-IGZO and also the existence of large amount of In{sup +} under positive top gate bias around top interfaces, thus negative transfer shift is observed. On the other hand, the formation of OH{sup −} at top interfaces under the stress of negative top gate bias shows negative transfer shift. The domination of V{sub TG} both on bottom/top gate sweep after PBTS/NBTS is obviously occurred due to thin active layer.

  17. Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

    2018-01-01

    Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

  18. Perovskite oxynitride LaTiOxNy thin films: Dielectric characterization in low and high frequencies

    International Nuclear Information System (INIS)

    Lu, Y.; Ziani, A.; Le Paven-Thivet, C.; Benzerga, R.; Le Gendre, L.; Fasquelle, D.; Kassem, H.

    2011-01-01

    Lanthanum titanium oxynitride (LaTiO x N y ) thin films are studied with respect to their dielectric properties in low and high frequencies. Thin films are deposited by radio frequency magnetron sputtering on different substrates. Effects of nitrogen content and crystalline quality on dielectric properties are investigated. In low-frequency range, textured LaTiO x N y thin films deposited on conductive single crystal Nb–STO show a dielectric constant ε′ ≈ 140 with low losses tanδ = 0.012 at 100 kHz. For the LaTiO x N y polycrystalline films deposited on conductive silicon substrates with platinum (Pt/Ti/SiO 2 /Si), the tunability reached up to 57% for a weak electric field of 50 kV/cm. In high-frequency range, epitaxial LaTiO x N y films deposited on MgO substrate present a high dielectric constant with low losses (ε′ ≈ 170, tanδ = 0.011, 12 GHz).

  19. FDTD simulations and analysis of thin sample dielectric properties measurements using coaxial probes

    Energy Technology Data Exchange (ETDEWEB)

    Bringhurst, S.; Iskander, M.F.; White, M.J. [Univ. of Utah, Salt Lake City, UT (United States). Electrical Engineering Dept.

    1996-12-31

    A metallized ceramic probe has been designed for high temperature broadband dielectric properties measurements. The probe was fabricated out of an alumina tube and rod as the outer and inner conductors respectively. The alumina was metallized with a 3 mil layer of moly-manganese and then covered with a 0.5 mil protective layer of nickel plating. The probe has been used to make complex dielectric properties measurements over the complete frequency band from 500 MHz to 3 GHz, and for temperatures as high as 1,000 C. A 3D Finite-Difference Time-Domain (FDTD) code was used to help investigate the feasibility of this probe to measure the complex permittivity of thin samples. It is shown that by backing the material under test with a standard material of known dielectric constant, the complex permittivity of thin samples can be measured accurately using the developed FDTD algorithm. This FDTD procedure for making thin sample dielectric properties measurements will be described.

  20. Amorphous Dielectric Thin Films with Extremely Low Mechanical Loss

    Directory of Open Access Journals (Sweden)

    Liu X.

    2015-04-01

    Full Text Available The ubiquitous low-energy excitations are one of the universal phenomena of amorphous solids. These excitations dominate the acoustic, dielectric, and thermal properties of structurally disordered solids. One exception has been a type of hydrogenated amorphous silicon (a-Si:H with 1 at.% H. Using low temperature elastic and thermal measurements of electron-beam evap-orated amorphous silicon (a-Si, we show that TLS can be eliminated in this system as the films become denser and more structurally ordered under certain deposition conditions. Our results demonstrate that TLS are not intrinsic to the glassy state but instead reside in low density regions of the amorphous network. This work obviates the role hydrogen was previously thought to play in removing TLS in a-Si:H and favors an ideal four-fold covalently bonded amorphous structure as the cause for the disappearance of TLS. Our result supports the notion that a-Si can be made a “perfect glass” with “crystal-like” properties, thus offering an encouraging opportunity to use it as a simple crystal dielectric alternative in applications, such as in modern quantum devices where TLS are the source of dissipation, decoherence and 1/f noise.

  1. Dielectric properties investigation of Cu2O/ZnO heterojunction thin films by electrodeposition

    International Nuclear Information System (INIS)

    Li, Qiang; Xu, Mengmeng; Fan, Huiqing; Wang, Hairong; Peng, Biaolin; Long, Changbai; Zhai, Yuchun

    2013-01-01

    Highlights: ► Bottom-up self-assembly Cu 2 O/ZnO heterojunction was fabricated by electrochemical deposition on indium tin oxide (ITO) flexible substrate (polyethylene terephthalate-PET). ► The dielectric response of Cu 2 O/ZnO heterojunction thin films had been investigated. ► The universal dielectric response was used to investigate the hopping behavior in Cu 2 O/ZnO heterojunction. -- Abstract: Structures and morphologies of the Cu 2 O/ZnO heterojunction electrodeposited on indium tin oxide (ITO) flexible substrate (polyethylene terephthalate-PET) were investigated by X-ray diffraction (XRD), scanning electronic microscopy (SEM), high resolution transmission electron microscopy (HRTEM), respectively. The dielectric response of bottom-up self-assembly Cu 2 O/ZnO heterojunction was investigated. The low frequency dielectric dispersion (LFDD) was observed. The universal dielectric response (UDR) was used to investigate the frequency dependence of dielectric response for Cu 2 O/ZnO heterojunction, which was attributed to the long range and the short range hopping charge carriers at the low frequency and the high frequency region, respectively

  2. Self-standing chitosan films as dielectrics in organic thin-film transistors

    Directory of Open Access Journals (Sweden)

    J. Morgado

    2013-12-01

    Full Text Available Organic thin film transistors, using self-standing 50 µm thick chitosan films as dielectric, are fabricated using sublimed pentacene or two conjugated polymers deposited by spin coating as semiconductors. Field-effect mobilities are found to be similar to values obtained with other dielectrics and, in the case of pentacene, a value (0.13 cm2/(V•s comparable to high performing transistors was determined. In spite of the low On/Off ratios (a maximum value of 600 was obtained for the pentacene-based transistors, these are promising results for the area of sustainable organic electronics in general and for biocompatible electronics in particular.

  3. Bias-induced migration of ionized donors in amorphous oxide semiconductor thin-film transistors with full bottom-gate and partial top-gate structures

    Directory of Open Access Journals (Sweden)

    Mallory Mativenga

    2012-09-01

    Full Text Available Bias-induced charge migration in amorphous oxide semiconductor thin-film transistors (TFTs confirmed by overshoots of mobility after bias stressing dual gated TFTs is presented. The overshoots in mobility are reversible and only occur in TFTs with a full bottom-gate (covers the whole channel and partial top-gate (covers only a portion of the channel, indicating a bias-induced uneven distribution of ionized donors: Ionized donors migrate towards the region of the channel that is located underneath the partial top-gate and the decrease in the density of ionized donors in the uncovered portion results in the reversible increase in mobility.

  4. Physical and electrical properties of bilayer CeO{sub 2}/TiO{sub 2} gate dielectric stack

    Energy Technology Data Exchange (ETDEWEB)

    Chong, M.M.V. [School of Materials Science and Engineering, Nanyang Technological University of Singapore, Block N 4.1Nanyang Avenue, Singapore 639798 (Singapore); GlobalFoundries Singapore Private Limited, 60 Woodlands Industrial Park D Street 2, Singapore 738406 (Singapore); Lee, P.S. [School of Materials Science and Engineering, Nanyang Technological University of Singapore, Block N 4.1Nanyang Avenue, Singapore 639798 (Singapore); Tok, A.I.Y., E-mail: MIYTOK@ntu.edu.sg [School of Materials Science and Engineering, Nanyang Technological University of Singapore, Block N 4.1Nanyang Avenue, Singapore 639798 (Singapore)

    2016-08-15

    Highlights: • A bilayer gate dielectric stack of CeO{sub 2}/TiO{sub 2} to study the dependency of film growth with varying annealing temperatures is proposed. • The study demonstrates CeO{sub 2}/TiO{sub 2} bilayer stack with comparable κ-value as that of HfO{sub 2} but with reduced leakage current density of 4 orders of magnitude. • Schottky emission is the dominant leakage conduction mechanism of annealed CeO{sub 2}/TiO{sub 2} stack due to thermionic effect of interface properties. - Abstract: This study demonstrates a bilayer gate oxide structure of cerium oxide deposited via pulsed laser deposition and titanium oxide using conventional atomic layer deposition. Samples were deposited on p-type Si (100) substrate and exhibit interesting physical and electrical properties such that 600 °C annealed CeO{sub 2}/TiO{sub 2} samples having κ-value of 18 whereas pure CeO{sub 2} deposited samples have dielectric constant of 17.1 with leakage current density of 8.94 × 10{sup −6} A/cm{sup 2} at 1 V applied voltage. The result shows promising usage of the synthesized rare earth oxides as gate dielectric where ideal κ-value and significant reduction of the leakage current by 5 orders of magnitude is achieved. Leakage current conduction mechanism for as-deposited sample is found to be dominated by Poole–Frenkel (PF) emission; the trap level is found to be at 1.29 eV whereas annealed samples (600 °C and 800 °C) exhibited Schottky emission with trap levels at 1.45 eV and 0.81 eV, respectively.

  5. A Review of Nanoscale Channel and Gate Engineered FINFETs for VLSI Mixed Signal Applications Using Zirconium-di-Oxide Dielectrics

    Directory of Open Access Journals (Sweden)

    D.Nirmal

    2014-07-01

    Full Text Available In the past, most of the research and development efforts in the area of CMOS and IC’s are oriented towards reducing the power and increasing the gain of the circuits. While focusing the attention on low power and high gain in the device, the materials of the device also been taken into consideration. In the present technology, Computationally intensive devices with low power dissipation and high gain are becoming a critical application domain. Several factors have contributed to this paradigm shift. The primary driving factor being the increase in scale of integration, the chip has to accommodate smaller and faster transistors than their predecessors. During the last decade semiconductor technology has been led by conventional scaling. Scaling, has been aimed towards higher speed, lower power and higher density of the semiconductor devices. However, as scaling approached its physical limits, it has become more difficult and challenging for fabrication industry. Therefore, tremendous research has been carried out to investigate the alternatives, and this led to the introduction of new Nano materials and concepts to overcome the difficulties in the device fabrications. In order to reduce the leakage current and parasitic capacitance in devices, gate oxide high-k dielectric materials are explored. Among the different high-k materials available the nano size Zirconium dioxide material is suggested as an alternate gate oxide material for devices due to its thermal stability and small grain size of material. To meet the requirements of ITRS roadmap 2012, the Multi gate devices are considered to be one of the most promising technologies for the future microelectronics industry due to its excellent immunity to short channel effects and high value of On current. The double gate or multi gate devices provide a better scalability option due to its excellent immunity to short-channel effects. Here the different high-k materials are replaced in different

  6. Dielectric Scattering Patterns for Efficient Light Trapping in Thin-Film Solar Cells.

    Science.gov (United States)

    van Lare, Claire; Lenzmann, Frank; Verschuuren, Marc A; Polman, Albert

    2015-08-12

    We demonstrate an effective light trapping geometry for thin-film solar cells that is composed of dielectric light scattering nanocavities at the interface between the metal back contact and the semiconductor absorber layer. The geometry is based on resonant Mie scattering. It avoids the Ohmic losses found in metallic (plasmonic) nanopatterns, and the dielectric scatterers are well compatible with nearly all types of thin-film solar cells, including cells produced using high temperature processes. The external quantum efficiency of thin-film a-Si:H solar cells grown on top of a nanopatterned Al-doped ZnO, made using soft imprint lithography, is strongly enhanced in the 550-800 nm spectral band by the dielectric nanoscatterers. Numerical simulations are in good agreement with experimental data and show that resonant light scattering from both the AZO nanostructures and the embedded Si nanostructures are important. The results are generic and can be applied on nearly all thin-film solar cells.

  7. Nanomechanical probing of thin-film dielectric elastomer transducers

    Science.gov (United States)

    Osmani, Bekim; Seifi, Saman; Park, Harold S.; Leung, Vanessa; Töpper, Tino; Müller, Bert

    2017-08-01

    Dielectric elastomer transducers (DETs) have attracted interest as generators, actuators, sensors, and even as self-sensing actuators for applications in medicine, soft robotics, and microfluidics. Their performance crucially depends on the elastic properties of the electrode-elastomer sandwich structure. The compressive displacement of a single-layer DET can be easily measured using atomic force microscopy (AFM) in the contact mode. While polymers used as dielectric elastomers are known to exhibit significant mechanical stiffening for large strains, their mechanical properties when subjected to voltages are not well understood. To examine this effect, we measured the depths of 400 nanoindentations as a function of the applied electric field using a spherical AFM probe with a radius of (522 ± 4) nm. Employing a field as low as 20 V/μm, the indentation depths increased by 42% at a load of 100 nN with respect to the field-free condition, implying an electromechanically driven elastic softening of the DET. This at-a-glance surprising experimental result agrees with related nonlinear, dynamic finite element model simulations. Furthermore, the pull-off forces rose from (23.0 ± 0.4) to (49.0 ± 0.7) nN implying a nanoindentation imprint after unloading. This embossing effect is explained by the remaining charges at the indentation site. The root-mean-square roughness of the Au electrode raised by 11% upon increasing the field from zero to 12 V/μm, demonstrating that the electrode's morphology change is an undervalued factor in the fabrication of DET structures.

  8. Thin film plasma coatings from dielectric free-flowing materials

    International Nuclear Information System (INIS)

    Timofeeva, L.A.; Katrich, S.A.; Solntsev, L.A.

    1994-01-01

    Fabrication of thin film plasma coatings from insulating free-flowing materials is considered. Molybdenum-tart ammonium coating of 3...5 μ thickness deposited on glassy carbon, aluminium, silicon, nickel, cast iron and steel substrates in 'Bulat-ZT' machine using insulating free-flowing materials cathod was found to form due to adsorption, absorption and dissuasion processes. The use of insulating free-flowing materials coatings allow to exclude pure metals cathods in plasma-plating process

  9. A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric

    Science.gov (United States)

    Chaowen, Liu; Jingping, Xu; Lu, Liu; Hanhan, Lu; Yuan, Huang

    2016-02-01

    A threshold-voltage model for a stacked high-k gate dielectric GaAs MOSFET is established by solving a two-dimensional Poisson's equation in channel and considering the short-channel, DIBL and quantum effects. The simulated results are in good agreement with the Silvaco TCAD data, confirming the correctness and validity of the model. Using the model, impacts of structural and physical parameters of the stack high-k gate dielectric on the threshold-voltage shift and the temperature characteristics of the threshold voltage are investigated. The results show that the stacked gate dielectric structure can effectively suppress the fringing-field and DIBL effects and improve the threshold and temperature characteristics, and on the other hand, the influence of temperature on the threshold voltage is overestimated if the quantum effect is ignored. Project supported by the National Natural Science Foundation of China (No. 61176100).

  10. A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric

    International Nuclear Information System (INIS)

    Liu Chaowen; Xu Jingping; Liu Lu; Lu Hanhan; Huang Yuan

    2016-01-01

    A threshold-voltage model for a stacked high-k gate dielectric GaAs MOSFET is established by solving a two-dimensional Poisson's equation in channel and considering the short-channel, DIBL and quantum effects. The simulated results are in good agreement with the Silvaco TCAD data, confirming the correctness and validity of the model. Using the model, impacts of structural and physical parameters of the stack high-k gate dielectric on the threshold-voltage shift and the temperature characteristics of the threshold voltage are investigated. The results show that the stacked gate dielectric structure can effectively suppress the fringing-field and DIBL effects and improve the threshold and temperature characteristics, and on the other hand, the influence of temperature on the threshold voltage is overestimated if the quantum effect is ignored. (paper)

  11. Total Ionizing Dose Effects of Si Vertical Diffused MOSFET with SiO2 and Si3N4/SiO2 Gate Dielectrics

    Directory of Open Access Journals (Sweden)

    Jiongjiong Mo

    2017-01-01

    Full Text Available The total ionizing dose irradiation effects are investigated in Si vertical diffused MOSFETs (VDMOSs with different gate dielectrics including single SiO2 layer and double Si3N4/SiO2 layer. Radiation-induced holes trapping is greater for single SiO2 layer than for double Si3N4/SiO2 layer. Dielectric oxidation temperature dependent TID effects are also studied. Holes trapping induced negative threshold voltage shift is smaller for SiO2 at lower oxidation temperature. Gate bias during irradiation leads to different VTH shift for different gate dielectrics. Single SiO2 layer shows the worst negative VTH at VG=0 V, while double Si3N4/SiO2 shows negative VTH shift at VG=-5 V, positive VTH shift at VG=10 V, and negligible VTH shift at VG=0 V.

  12. Electrical characteristics of AlO{sub x}N{sub y} prepared by oxidation of sub-10-nm-thick AlN films for MOS gate dielectric applications

    Energy Technology Data Exchange (ETDEWEB)

    Jeon, Sang Hun; Jang, Hyeon Woo; Kim, Hyun Soo; Noh, Do Young; Hwang, Hyun Sang [Kwangju Institute of Science and Technology, Kwangju (Korea, Republic of)

    2000-12-01

    In this research, the feasibility of ultrathin AlO{sub x}N{sub y} prepared by oxidation of sub 100-A-thick AlN thin films for metal-oxide-semiconductor (MOS) gate dielectric applications was investigated. Oxidation of 51-A-and 98-A-thick as-deposited AlN at 800 .deg. C was used to form 72-A-and 130-A-thick AlO{sub x}N{sub y}, respectively. Based on the capacitance-voltage (C-V) measurements of the MOS capacitor, the dielectric constants of 72 A-thick and 130 A-thick Al-oxynitride were 5.15 and 7, respectively. The leakage current of Al-oxynitride at low field was almost the same as that of thermal SiO{sub 2}. based on the CV data, the interface state density of Al-oxynitride was relatively higher than that of SiO{sub 2}. Although process optimization is still necessary, the Al-oxynitride exhibits some possibility for future MOS gate dielectric applications.

  13. Electrical characteristics of AlO sub x N sub y prepared by oxidation of sub-10-nm-thick AlN films for MOS gate dielectric applications

    CERN Document Server

    Jeon, S H; Kim, H S; Noh, D Y; Hwang, H S

    2000-01-01

    In this research, the feasibility of ultrathin AlO sub x N sub y prepared by oxidation of sub 100-A-thick AlN thin films for metal-oxide-semiconductor (MOS) gate dielectric applications was investigated. Oxidation of 51-A-and 98-A-thick as-deposited AlN at 800 .deg. C was used to form 72-A-and 130-A-thick AlO sub x N sub y , respectively. Based on the capacitance-voltage (C-V) measurements of the MOS capacitor, the dielectric constants of 72 A-thick and 130 A-thick Al-oxynitride were 5.15 and 7, respectively. The leakage current of Al-oxynitride at low field was almost the same as that of thermal SiO sub 2. based on the CV data, the interface state density of Al-oxynitride was relatively higher than that of SiO sub 2. Although process optimization is still necessary, the Al-oxynitride exhibits some possibility for future MOS gate dielectric applications.

  14. Pulsed EM Field Response of a Thin, High-Contrast, Finely Layered Structure With Dielectric and Conductive Properties

    NARCIS (Netherlands)

    De Hoop, A.T.; Jiang, L.

    2009-01-01

    The response of a thin, high-contrast, finely layered structure with dielectric and conductive properties to an incident, pulsed, electromagnetic field is investigated theoretically. The fine layering causes the standard spatial discretization techniques to solve Maxwell's equations numerically to

  15. Thin-film composite materials as a dielectric layer for flexible metal-insulator-metal capacitors.

    Science.gov (United States)

    Tiwari, Jitendra N; Meena, Jagan Singh; Wu, Chung-Shu; Tiwari, Rajanish N; Chu, Min-Ching; Chang, Feng-Chih; Ko, Fu-Hsiang

    2010-09-24

    A new organic-organic nanoscale composite thin-film (NCTF) dielectric has been synthesized by solution deposition of 1-bromoadamantane and triblock copolymer (Pluronic P123, BASF, EO20-PO70-EO20), in which the precursor solution has been achieved with organic additives. We have used a sol-gel process to make a metal-insulator-metal capacitor (MIM) comprising a nanoscale (10 nm-thick) thin-film on a flexible polyimide (PI) substrate at room temperature. Scanning electron microscope and atomic force microscope revealed that the deposited NCTFs were crack-free, uniform, highly resistant to moisture absorption, and well adhered on the Au-Cr/PI. The electrical properties of 1-bromoadamantane-P123 NCTF were characterized by dielectric constant, capacitance, and leakage current measurements. The 1-bromoadamantane-P123 NCTF on the PI substrate showed a low leakage current density of 5.5 x 10(-11) A cm(-2) and good capacitance of 2.4 fF at 1 MHz. In addition, the calculated dielectric constant of 1-bromoadamantane-P123 NCTF was 1.9, making them suitable candidates for use in future flexible electronic devices as a stable intermetal dielectric. The electrical insulating properties of 1-bromoadamantane-P123 NCTF have been improved due to the optimized dipole moments of the van der Waals interactions.

  16. Layered Cu-based electrode for high-dielectric constant oxide thin film-based devices

    International Nuclear Information System (INIS)

    Fan, W.; Saha, S.; Carlisle, J.A.; Auciello, O.; Chang, R.P.H.; Ramesh, R.

    2003-01-01

    Ti-Al/Cu/Ta multilayered electrodes were fabricated on SiO 2 /Si substrates by ion beam sputtering deposition, to overcome the problems of Cu diffusion and oxidation encountered during the high dielectric constant (κ) materials integration. The Cu and Ta layers remained intact through the annealing in oxygen environment up to 600 deg. C. The thin oxide layer, formed on the Ti-Al surface, effectively prevented the oxygen penetration toward underneath layers. Complex oxide (Ba x Sr 1-x )TiO 3 (BST) thin films were grown on the layered Ti-Al/Cu/Ta electrodes using rf magnetron sputtering. The deposited BST films exhibited relatively high permittivity (150), low dielectric loss (0.007) at zero bias, and low leakage current -8 A/cm 2 at 100 kV/cm

  17. Investigation of optical pump on dielectric tunability in PZT/PT thin film by THz spectroscopy.

    Science.gov (United States)

    Ji, Jie; Luo, Chunya; Rao, Yunkun; Ling, Furi; Yao, Jianquan

    2016-07-11

    The dielectric spectra of single-layer PbTiO3 (PT), single-layer PbZrxTi1-xO3 (PZT) and multilayer PZT/PT thin films under an external optical field were investigated at room temperature by time-domain terahertz (THz) spectroscopy. Results showed that the real part of permittivity increased upon application of an external optical field, which could be interpreted as hardening of the soft mode and increasing of the damping coefficient and oscillator strength. Furthermore, the central mode was observed in the three films. Among the dielectric property of the three thin films studied, the tunability of the PZT/PT superlattice was the largest.

  18. Mechanistic interaction study of thin oxide dielectric with conducting organic electrode

    International Nuclear Information System (INIS)

    Sharma, Himani; Sethi, Kanika; Raj, P. Markondeya; Gerhardt, R.A.; Tummala, Rao

    2012-01-01

    Highlights: ► Thin film-oxide dielectric-organic electrode interface studies for investigating the leakage mechanism. ► XPS to elucidate chemical-structural changes on dielectric oxide surface. ► Correlates structural characterization data with capacitor leakage current and impedance spectroscopy characteristics. - Abstract: This paper aims at understanding the interaction of intrinsic conducting polymer, PEDT, with ALD-deposited Al 2 O 3 and thermally oxidized Ta 2 O 5 dielectrics, and the underlying mechanisms for increase in leakage currents in PEDT-based capacitors. Conducting polymers offer several advantages as electrodes for high surface area capacitors because of their lower resistance, self-healing and enhanced conformality. However, capacitors with in situ polymerized PEDT show poor electrical properties that are attributed to the interfacial interaction between the organic electrode and the oxide dielectric. This study focuses on characterizing these interactions. A combination of compositional, structural and electrical characterization techniques was applied to polymer-solid-state-capacitor to understand the interfacial chemical behavior and dielectric property deterioration of alumina and tantalum-oxide films. XPS and impedance studies were employed to understand the stiochiometric and compositional changes that occur in the dielectric film on interaction with in situ deposited PEDT. Based on the observations from several complimentary techniques, it is concluded that tantalum-pentoxide has more resistance towards chemical interaction with in situ polymerized PEDT. The thermally oxidized Ta 2 O 5 -PEDT system showed leakage current of 280 nA μF −1 at 3 V with a breakdown voltage of 30 V. On the other hand, Al 2 O 3 -PEDT capacitor showed leakage current of 50 μA μF −1 and a breakdown voltage of 40 V. The study reports direct evidence for the mechanism of resistivity drop in alumina dielectric with in situ polymerized PEDT electrode.

  19. Dielectric properties of electron irradiated PbZrO 3 thin films

    Indian Academy of Sciences (India)

    The present paper deals with the study of the effects of electron (8 MeV) irradiation on the dielectric and ferroelectric properties of PbZrO3 thin films grown by sol–gel technique. The films were (0.62 m thick) subjected to electron irradiation using Microtron accelerator (delivered dose 80, 100, 120 kGy). The films were well ...

  20. Statistical analysis of absorptive laser damage in dielectric thin films

    International Nuclear Information System (INIS)

    Budgor, A.B.; Luria-Budgor, K.F.

    1978-01-01

    The Weibull distribution arises as an example of the theory of extreme events. It is commonly used to fit statistical data arising in the failure analysis of electrical components and in DC breakdown of materials. This distribution is employed to analyze time-to-damage and intensity-to-damage statistics obtained when irradiating thin film coated samples of SiO 2 , ZrO 2 , and Al 2 O 3 with tightly focused laser beams. The data used is furnished by Milam. The fit to the data is excellent; and least squared correlation coefficients greater than 0.9 are often obtained

  1. Experimental and theoretical investigation of the effect of SiO2 content in gate dielectrics on work function shift induced by nanoscale capping layers

    KAUST Repository

    Caraveo-Frescas, J. A.; Wang, H.; Schwingenschlö gl, Udo; Alshareef, Husam N.

    2012-01-01

    The impact of SiO2 content in ultrathin gate dielectrics on the magnitude of the effective work function (EWF) shift induced by nanoscale capping layers has been investigated experimentally and theoretically. The magnitude of the effective work function shift for four different capping layers (AlN, Al2O3, La2O3, and Gd2O3) is measured as a function of SiO2 content in the gate dielectric. A nearly linear increase of this shift with SiO2 content is observed for all capping layers. The origin of this dependence is explained using density functional theory simulations.

  2. Experimental and theoretical investigation of the effect of SiO2 content in gate dielectrics on work function shift induced by nanoscale capping layers

    KAUST Repository

    Caraveo-Frescas, J. A.

    2012-09-10

    The impact of SiO2 content in ultrathin gate dielectrics on the magnitude of the effective work function (EWF) shift induced by nanoscale capping layers has been investigated experimentally and theoretically. The magnitude of the effective work function shift for four different capping layers (AlN, Al2O3, La2O3, and Gd2O3) is measured as a function of SiO2 content in the gate dielectric. A nearly linear increase of this shift with SiO2 content is observed for all capping layers. The origin of this dependence is explained using density functional theory simulations.

  3. Evaluation of the effects of thermal annealing temperature and high-k dielectrics on amorphous InGaZnO thin films by using pseudo-MOS transistors

    International Nuclear Information System (INIS)

    Lee, Se-Won; Cho, Won-Ju

    2012-01-01

    The effects of annealing temperatures and high-k gate dielectric materials on the amorphous In-Ga-Zn-O thin-film transistors (a-IGZO TFTs) were investigated using pseudo-metal-oxide semiconductor transistors (Ψ-MOSFETs), a method without conventional source/drain (S/D) layer deposition. Annealing of the a-IGZO film was carried out at 150 - 900 .deg. C in a N 2 ambient for 30 min. As the annealing temperature was increased, the electrical characteristics of Ψ-MOSFETs on a-IGZO were drastically improved. However, when the annealing temperature exceeded 700 .deg. C, a deterioration of the MOS parameters was observed, including a shift of the threshold voltage (V th ) in a negative direction, an increase in the subthreshold slope (SS) and hysteresis, a decrease in the field effect mobility (μ FE ), an increase in the trap density (N t ), and a decrease in the on/off ratio. Meanwhile, the high-k gate dielectrics enhanced the performance of a-IGZO Ψ-MOSFETs. The ZrO 2 gate dielectrics particularly exhibited excellent characteristics in terms of SS (128 mV/dec), μ FE (10.2 cm -2 /V·s), N t (1.1 x 10 12 cm -2 ), and on/off ratio (5.3 x 10 6 ). Accordingly, the Ψ-MOSFET structure is a useful method for rapid evaluation of the effects of the process and the material on a-IGZO TFTs without a conventional S/D layer deposition.

  4. A comparative study on top-gated and bottom-gated multilayer MoS2 transistors with gate stacked dielectric of Al2O3/HfO2.

    Science.gov (United States)

    Zou, Xiao; Xu, Jingping; Huang, Hao; Zhu, Ziqang; Wang, Hongjiu; Li, Borui; Liao, Lei; Fang, Guojia

    2018-06-15

    Top-gated and bottom-gated transistors with multilayer MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 (9 nm/6 nm) were fabricated and comparatively studied. Excellent electrical properties are demonstrated for the TG transistors with high on-off current ratio of 10 8 , high field-effect mobility of 10 2 cm 2 V -1 s -1 , and low subthreshold swing of 93 mV dec -1 . Also, enhanced reliability has been achieved for the TG transistors with threshold voltage shift of 10 -3 -10 -2 V MV -1 cm -1 after 6 MV cm -1 gate-biased stressing. All improvement for the TG device can be ascribed to the formed device structure and dielectric environment. Degradation of the performance for the BG transistors should be attributed to reduced gate capacitance density and deteriorated interface properties related to vdW gap with a thickness about 0.4 nm. So, the TG transistor with MoS 2 channel fully encapsulated by stacked Al 2 O 3 /HfO 2 is a promising way to fabricate high-performance ML MoS 2 field-effect transistors for practical electron device applications.

  5. Structure dependent resistivity and dielectric characteristics of tantalum oxynitride thin films produced by magnetron sputtering

    Energy Technology Data Exchange (ETDEWEB)

    Cristea, D., E-mail: daniel.cristea@unitbv.ro [Department of Materials Science, Transilvania University, 500036 Brasov (Romania); Crisan, A. [Department of Materials Science, Transilvania University, 500036 Brasov (Romania); Cretu, N. [Electrical Engineering and Applied Physics Department, Transilvania University, 500036 Brasov (Romania); Borges, J. [Centro de Física, Universidade do Minho, Campus de Gualtar, 4710 - 057 Braga (Portugal); Instituto Pedro Nunes, Laboratório de Ensaios, Desgaste e Materiais, Rua Pedro Nunes, 3030-199 Coimbra (Portugal); SEG-CEMUC, Mechanical Engineering Department, University of Coimbra, 3030-788 Coimbra (Portugal); Lopes, C.; Cunha, L. [Centro de Física, Universidade do Minho, Campus de Gualtar, 4710 - 057 Braga (Portugal); Ion, V.; Dinescu, M. [National Institute for Lasers, Plasma and Radiation Physics, Lasers Department, “Photonic Processing of Advanced Materials” Group, PO Box MG-16, RO 77125 Magurele-Bucharest (Romania); Barradas, N.P. [Centro de Ciências e Tecnologias Nucleares, Instituto Superior Técnico, Universidade de Lisboa, E.N. 10 ao km 139,7, 2695-066 Bobadela LRS (Portugal); Alves, E. [Instituto de Plasmas e Fusão Nuclear, Instituto Superior Técnico, Universidade de Lisboa, E.N. 10 ao km 139,7, 2695-066 Bobadela LRS (Portugal); Apreutesei, M. [MATEIS Laboratory-INSA de Lyon, 21 Avenue Jean Capelle, 69621 Villeurbanne cedex (France); Université de Lyon, Institut des Nanotechnologies de Lyon INL-UMR5270, CNRS, Ecole Centrale de Lyon, Ecully F-69134 (France); Munteanu, D. [Department of Materials Science, Transilvania University, 500036 Brasov (Romania)

    2015-11-01

    Highlights: • Tantalum oxynitride thin films have been deposited by magnetron sputtering, in various configurations. • The rising of the reactive gases mixture flow has the consequence of a gradual increase in the non-metallic content in the films, which results in a 10 orders of magnitude resistivity domain. • The higher resistivity films exhibit dielectric constants up to 41 and quality factors up to 70. - Abstract: The main purpose of this work is to present and to interpret the change of electrical properties of Ta{sub x}N{sub y}O{sub z} thin films, produced by DC reactive magnetron sputtering. Some parameters were varied during deposition: the flow of the reactive gases mixture (N{sub 2} and O{sub 2}, with a constant concentration ratio of 17:3); the substrate voltage bias (grounded, −50 V or −100 V) and the substrate (glass, (1 0 0) Si or high speed steel). The obtained films exhibit significant differences. The variation of the deposition parameters induces variations of the composition, microstructure and morphology. These differences cause variation of the electrical resistivity essentially correlated with the composition and structural changes. The gradual decrease of the Ta concentration in the films induces amorphization and causes a raise of the resistivity. The dielectric characteristics of some of the high resistance Ta{sub x}N{sub y}O{sub z} films were obtained in the samples with a capacitor-like design (deposited onto high speed steel, with gold pads deposited on the dielectric Ta{sub x}N{sub y}O{sub z} films). Some of these films exhibited dielectric constant values higher than those reported for other tantalum based dielectric films.

  6. Thin dielectric film thickness determination by advanced transmission electron microscopy

    Energy Technology Data Exchange (ETDEWEB)

    Diebold, A.C.; Foran, B.; Kisielowski, C.; Muller, D.; Pennycook, S.; Principe, E.; Stemmer, S.

    2003-09-01

    High Resolution Transmission Electron Microscopy (HR-TEM) has been used as the ultimate method of thickness measurement for thin films. The appearance of phase contrast interference patterns in HR-TEM images has long been confused as the appearance of a crystal lattice by non-specialists. Relatively easy to interpret crystal lattice images are now directly observed with the introduction of annular dark field detectors for scanning TEM (STEM). With the recent development of reliable lattice image processing software that creates crystal structure images from phase contrast data, HR-TEM can also provide crystal lattice images. The resolution of both methods was steadily improved reaching now into the sub Angstrom region. Improvements in electron lens and image analysis software are increasing the spatial resolution of both methods. Optimum resolution for STEM requires that the probe beam be highly localized. In STEM, beam localization is enhanced by selection of the correct aperture. When STEM measurement is done using a highly localized probe beam, HR-TEM and STEM measurement of the thickness of silicon oxynitride films agree within experimental error. In this paper, the optimum conditions for HR-TEM and STEM measurement are discussed along with a method for repeatable film thickness determination. The impact of sample thickness is also discussed. The key result in this paper is the proposal of a reproducible method for film thickness determination.

  7. Effects of Interfacial Charge Depletion in Organic Thin-Film Transistors with Polymeric Dielectrics on Electrical Stability

    Directory of Open Access Journals (Sweden)

    Jaehoon Park

    2010-06-01

    Full Text Available We investigated the electrical stabilities of two types of pentacene-based organic thin-film transistors (OTFTs with two different polymeric dielectrics: polystyrene (PS and poly(4-vinyl phenol (PVP, in terms of the interfacial charge depletion. Under a short-term bias stress condition, the OTFT with the PVP layer showed a substantial increase in the drain current and a positive shift of the threshold voltage, while the PS layer case exhibited no change. Furthermore, a significant increase in the off-state current was observed in the OTFT with the PVP layer which has a hydroxyl group. In the presence of the interfacial hydroxyl group in PVP, the holes are not fully depleted during repetitive operation of the OTFT with the PVP layer and a large positive gate voltage in the off-state regime is needed to effectively refresh the electrical characteristics. It is suggested that the depletion-limited holes at the interface, i.e., interfacial charge depletion, between the PVP layer and the pentacene layer play a critical role on the electrical stability during operation of the OTFT.

  8. Visualization of dielectric constant-electric field-temperature phase maps for imprinted relaxor ferroelectric thin films

    International Nuclear Information System (INIS)

    Frederick, J. C.; Kim, T. H.; Maeng, W.; Brewer, A. A.; Podkaminer, J. P.; Saenrang, W.; Vaithyanathan, V.; Schlom, D. G.; Li, F.; Chen, L.-Q.; Trolier-McKinstry, S.; Rzchowski, M. S.; Eom, C. B.

    2016-01-01

    The dielectric phase transition behavior of imprinted lead magnesium niobate–lead titanate relaxor ferroelectric thin films was mapped as a function of temperature and dc bias. To compensate for the presence of internal fields, an external electric bias was applied while measuring dielectric responses. The constructed three-dimensional dielectric maps provide insight into the dielectric behaviors of relaxor ferroelectric films as well as the temperature stability of the imprint. The transition temperature and diffuseness of the dielectric response correlate with crystallographic disorder resulting from strain and defects in the films grown on strontium titanate and silicon substrates; the latter was shown to induce a greater degree of disorder in the film as well as a dielectric response lower in magnitude and more diffuse in nature over the same temperature region. Strong and stable imprint was exhibited in both films and can be utilized to enhance the operational stability of piezoelectric devices through domain self-poling.

  9. All-optically tunable EIT-like dielectric metasurfaces hybridized with thin phase change material layers

    Science.gov (United States)

    Petronijevic, Emilija; Sibilia, Concita

    2017-05-01

    Electromagnetically induced transparency (EIT), a pump-induced narrow transparency window within the absorption region of a probe, had offered new perspectives in slow-light control in atomic physics. For applications in nanophotonics, the implementation on chip-scaled devices has later been obtained by mimicking this effect by metallic metamaterials. High losses in visible and near infrared range of metal-based metamaterialls have recently opened a new field of all-dielectric metamaterials; a proper configuration of high refractive index dielectric nanoresonators can mimick this effect without losses to get high Q, slow-light response. The next step would be the ability to tune their optical response, and in this work we investigate thin layers of phase change materials (PCM) for all-optical control of EIT-like all-dielectric metamaterials. PCM can be nonvolatively and reversibly switched between two stable phases that differ in optical properties by applying a visible laser pulse. The device is based on Si nanoresonators covered by a thin layer of PCM GeTe; optical and transient thermal simulations have been done to find and optimize the fabrication parameters and switching parameters such as the intensity and duration of the pulse. We have found that the EIT-like response can be switched on and off by applying the 532nm laser pulse to change the phase of the upper GeTe layer. We strongly believe that such approach could open new perspectives in all-optically controlled slow-light metamaterials.

  10. Dielectric Properties of Cd1-xZnxSe Thin Film Semiconductors

    International Nuclear Information System (INIS)

    Wahab, L.A.; Farrag, A.A.; Zayed, H.A.

    2012-01-01

    Cd 1-x Zn x Se (x=0, 0.5 and 1) thin films of thickness 300 nm have been deposited on highly cleaned glass substrates (Soda-lime glass) by thermal evaporation technique under pressure 10-5 Torr. The crystal structure, lattice parameters and grain size were determined from X-ray diffraction patterns of these films. The dielectric response and ac conductivity of the films are investigated in the frequency range from 80 Hz to 5 MHz and temperature range from 300 K to 420 K. AC conductivity increases linearly with the frequency according to the power relation σ a c (ψ)=A (ψ) s . The dielectric constant and loss show low values at high frequencies. The relaxation time t, resistance R and capacitance C were calculated from Nyquist diagram. The behavior can be modeled by an equivalent parallel RC circuit.

  11. Coupled Optical Tamm States in a Planar Dielectric Mirror Structure Containing a Thin Metal Film

    International Nuclear Information System (INIS)

    Zhou Hai-Chun; Yang Guang; Lu Pei-Xiang; Wang Kai; Long Hua

    2012-01-01

    The coupling between two optical Tamm states (OTSs) with the same eigenenergy is numerically investigated in a planar dielectric mirror structure containing a thin metal film. The reflectivity map in this structure at normal incidence is obtained by applying the transfer matrix method. Two splitting branches appear in the photonic bandgap region when both adjacent dielectric layers of metal film are properly set. The splitting energy of two branches strongly depends on the thickness of the metal film. According to the electric field distribution in this structure, it is found that the high-energy branch corresponds to the antisymmetric coupling between two OTSs, while the low-energy branch is associated with the symmetric coupling between two OTSs. Moreover, the optical difference frequency of two branches is located in a broad terahertz region. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  12. Black metal thin films by deposition on dielectric antireflective moth-eye nanostructures

    DEFF Research Database (Denmark)

    Christiansen, Alexander Bruun; Caringal, Gideon Peter; Clausen, Jeppe Sandvik

    2015-01-01

    Although metals are commonly shiny and highly reflective, we here show that thin metal films appear black when deposited on a dielectric with antireflective moth-eye nanostructures. The nanostructures were tapered and close-packed, with heights in the range 300-600 nm, and a lateral, spatial...... frequency in the range 5-7 mu m(-1). A reflectance in the visible spectrum as low as 6%, and an absorbance of 90% was observed for an Al film of 100 nm thickness. Corresponding experiments on a planar film yielded 80% reflectance and 20% absorbance. The observed absorbance enhancement is attributed...... to a gradient effect causing the metal film to be antireflective, analogous to the mechanism in dielectrics and semiconductors. We find that the investigated nanostructures have too large spatial frequency to facilitate efficient coupling to the otherwise non-radiating surface plasmons. Applications...

  13. Low temperature dielectric relaxation and charged defects in ferroelectric thin films

    Directory of Open Access Journals (Sweden)

    A. Artemenko

    2013-04-01

    Full Text Available We report a dielectric relaxation in BaTiO3-based ferroelectric thin films of different composition and with several growth modes: sputtering (with and without magnetron and sol-gel. The relaxation was observed at cryogenic temperatures (T < 100 K for frequencies from 100 Hz up to 10 MHz. This relaxation activation energy is always lower than 200 meV and is very similar to the relaxation that we reported in the parent bulk perovskites. Based on our Electron Paramagnetic Resonance (EPR investigation, we ascribe this dielectric relaxation to the hopping of electrons among Ti3+-V(O charged defects. Being dependent on the growth process and on the amount of oxygen vacancies, this relaxation can be a useful probe of defects in actual integrated capacitors with no need for specific shaping.

  14. First-principles simulations of the leakage current in metal-oxide-semiconductor structures caused by oxygen vacancies in HfO2 high-K gate dielectric

    International Nuclear Information System (INIS)

    Mao, L.F.; Wang, Z.O.

    2008-01-01

    HfO 2 high-K gate dielectric has been used as a new gate dielectric in metal-oxide-semiconductor structures. First-principles simulations are used to study the effects of oxygen vacancies on the tunneling current through the oxide. A level which is nearly 1.25 eV from the bottom of the conduction band is introduced into the bandgap due to the oxygen vacancies. The tunneling current calculations show that the tunneling currents through the gate oxide with different defect density possess the typical characteristic of stress-induced leakage current. Further analysis shows that the location of oxygen vacancies will have a marked effect on the tunneling current. The largest increase in the tunneling current caused by oxygen vacancies comes about at the middle oxide field when defects are located at the middle of the oxide. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  15. Adjustable threshold-voltage in all-inkjet-printed organic thin film transistor using double-layer dielectric structures

    International Nuclear Information System (INIS)

    Wu, Wen-Jong; Lee, Chang-Hung; Hsu, Chun-Hao; Yang, Shih-Hsien; Lin, Chih-Ting

    2013-01-01

    An all-inkjet-printed organic thin film transistor (OTFT) with a double-layer dielectric structure is proposed and implemented in this study. By using the double-layer structure with different dielectric materials (i.e., polyvinylphenol with poly(vinylidene fluoride-co-hexafluoropropylene)), the threshold-voltage of OTFT can be adjusted. The threshold-voltage shift can be controlled by changing the composition of dielectric layers. That is, an enhancement-mode OTFT can be converted to a depletion-mode OTFT by selectively printing additional dielectric layers to form a high-k/low-k double-layer structure. The printed OTFT has a carrier mobility of 5.0 × 10 −3 cm 2 /V-s. The threshold-voltages of the OTFTs ranged between − 13 V and 10 V. This study demonstrates an additional design parameter for organic electronics manufactured using inkjet printing technology. - Highlights: • A double-layer dielectric organic thin film transistor, OTFT, is implemented. • The threshold voltage of OTFT can be configured by the double dielectric structure. • The composition of the dielectric determines the threshold voltage shift. • The characteristics of OTFTs can be adjusted by double dielectric structures

  16. A hydrogel capsule as gate dielectric in flexible organic field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Dumitru, L. M.; Manoli, K.; Magliulo, M.; Torsi, L., E-mail: luisa.torsi@uniba.it [Department of Chemistry, University of Bari “Aldo Moro”, Via Orabona 4, Bari I-70126 (Italy); Ligonzo, T. [Department of Physics, University of Bari “Aldo Moro”, Via Orabona 4, Bari I-70126 (Italy); Palazzo, G. [Department of Chemistry, University of Bari “Aldo Moro”, Via Orabona 4, Bari I-70126 (Italy); Center of Colloid and Surface Science—CSGI—Bari Unit, Via Orabona 4, Bari I-70126 (Italy)

    2015-01-01

    A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.

  17. Effect of La doping on crystalline orientation, microstructure and dielectric properties of PZT thin films

    Energy Technology Data Exchange (ETDEWEB)

    Xu, Wencai; Li, Qi; Wang, Xing [Dalian Univ. of Technology, Dalian (China). School of Mechanical Engineering; Yin, Zhifu [Jilin Univ., Changchun (China). Faculty of the School of Mechanical Science and Engineering; Zou, Helin [Dalian Univ. of Technology, Dalian (China). Key Lab. for Micro/Nano Systems and Technology

    2017-11-01

    Lanthanum (La)-modified lead zirconate titanate (PLZT) thin films with doping concentration from 0 to 5 at.-% have been fabricated by sol-gel methods to investigate the effects of La doping on crystalline orientation, microstructure and dielectric properties of the modified films. The characterization of PLZT thin films were performed by X-ray diffractometry (XRD), scanning electron microscopy (SEM) and precision impedance analysis. XRD analysis showed that PLZT films with La doping concentration below 4 at.-% exhibited (100) preferred orientation. SEM results indicated that PLZT films presented dense and columnar microstructures when La doping concentration was less than 3 at.-%, while the others showed columnar microstructures only at the bottom of the cross section. The maximum dielectric constant (1502.59 at 100 Hz) was obtained in a 2 at.-% La-doped film, which increased by 53.9 % compared with undoped film. Without introducing a seed layer, (100) oriented PLZT thin films were prepared by using conventional heat treatment process and adjusting La doping concentration.

  18. Structural and dielectric characterization of sputtered Tantalum Titanium Oxide thin films for high temperature capacitor applications

    Energy Technology Data Exchange (ETDEWEB)

    Rouahi, A., E-mail: rouahi_ahlem@yahoo.fr [Univ. Grenoble Alpes, G2Elab, F-38000 (France); Laboratoire Matériaux Organisation et Propriétés (LMOP), Université de Tunis El Manar, 2092 Tunis (Tunisia); Challali, F. [Laboratoire des Sciences des Procédés et des Matériaux (LSPM)-CNRS-UPR3407, Université Paris13, 99 Avenue Jean-Baptiste Clément, 93430, Villetaneuse (France); Dakhlaoui, I. [Laboratoire Matériaux Organisation et Propriétés (LMOP), Université de Tunis El Manar, 2092 Tunis (Tunisia); Vallée, C. [CNRS, LTM, CEA-LETI, F-38000 Grenoble (France); Salimy, S. [Institut des Matériaux Jean Rouxel (IMN) UMR CNRS 6502, Université de Nantes, 2, rue de la Houssinière, B.P. 32229, 44322, Nantes, Cedex 3 (France); Jomni, F.; Yangui, B. [Laboratoire Matériaux Organisation et Propriétés (LMOP), Université de Tunis El Manar, 2092 Tunis (Tunisia); Besland, M.P.; Goullet, A. [Institut des Matériaux Jean Rouxel (IMN) UMR CNRS 6502, Université de Nantes, 2, rue de la Houssinière, B.P. 32229, 44322, Nantes, Cedex 3 (France); Sylvestre, A. [Univ. Grenoble Alpes, G2Elab, F-38000 (France)

    2016-05-01

    In this study, the dielectric properties of metal-oxide-metal capacitors based on Tantalum Titanium Oxide (TiTaO) thin films deposited by reactive magnetron sputtering on aluminum bottom electrode are investigated. The structure of the films was characterized by Atomic Force Microscopy, X-ray diffraction and X-ray photoelectron spectroscopy. The dielectric properties of TiTaO thin films were studied by complex impedance spectroscopy over a wide frequency range (10{sup -2} - to 10{sup 5} Hz) and temperatures in -50 °C to 325 °C range. The contributions of different phases, phases’ boundaries and conductivity effect were highlighted by Cole – Cole diagram (ε” versus ε’). Two relaxation processes have been identified in the electric modulus plot. A first relaxation process appears at low temperature with activation energy of 0.37 eV and it is related to the motion of Ti{sup 4+} (Skanavi’s model). A second relaxation process at high temperature is related to Maxwell-Wagner-Sillars relaxation with activation energy of 0.41 eV. - Highlights: • Titanium Tantalum Oxide thin films are grown on Aluminum substrate. • The existence of phases was confirmed by X-ray photoelectron spectroscopy. • Conductivity effect appears in Cole-Cole plot. • At low temperatures, a relaxation phenomenon obeys to Skanavi’s model. • Maxwell-Wagner-Sillars polarization is processed at high temperatures.

  19. Preparation and dielectric properties of compositionally graded lead barium zirconate thin films

    Energy Technology Data Exchange (ETDEWEB)

    Hao, Xihong, E-mail: xhhao@imust.edu.c [Functional Materials Research Laboratory, Tongji University, Shanghai 200092 (China); School of Materials and Metallurgy, Inner Mongolia University of Science and Technology, Baotou 014010 (China); Zhang, Zhiqing [School of Materials and Metallurgy, Inner Mongolia University of Science and Technology, Baotou 014010 (China); Zhou, Jing [State Key Laboratory of Advanced Technology for Materials Synthesis and Processing, Wuhan University of Technology, Wuhan 430070 (China); An, Shengli [School of Materials and Metallurgy, Inner Mongolia University of Science and Technology, Baotou 014010 (China); Zhai, Jiwei [Functional Materials Research Laboratory, Tongji University, Shanghai 200092 (China)

    2010-07-09

    Both up and down compositionally graded (Pb{sub 1-x}Ba{sub x})ZrO{sub 3} (PBZ) thin films with increasing x from 0.4 to 0.6 were deposited on Pt(1 1 1)-buffer layered silicon substrates through a sol-gel method. The microstructure and dielectric properties of graded PBZ thin films were investigated systemically. X-ray diffraction patterns confirmed that both PBZ films had crystallized into a pure perovskite phase after annealed 700 {sup o}C. Electrical measurement results showed that although up graded films had a slightly larger tunability, dielectric loss of down graded films was much lower than that of up graded films. Therefore, the figure of merit of down graded PBZ films was greatly enhanced, as compared with up graded films. Moreover, down graded PBZ thin films also displayed excellent temperature stability with a smaller temperature coefficient of capacitance (TCC) of -0.59 x 10{sup -3} {sup o}C{sup -1} from 20 {sup o}C to 80 {sup o}C.

  20. Oligo- and polymeric FET devices: Thiophene-based active materials and their interaction with different gate dielectrics

    International Nuclear Information System (INIS)

    Porzio, W.; Destri, S.; Pasini, M.; Bolognesi, A.; Angiulli, A.; Di Gianvincenzo, P.; Natali, D.; Sampietro, M.; Caironi, M.; Fumagalli, L.; Ferrari, S.; Peron, E.; Perissinotti, F.

    2006-01-01

    Derivatives of both oligo- and polythiophene-based FET were recently considered for low cost electronic applications. In the device optimization, factors like redox reversibility of the molecule/polymer, electronic level compatibility with source/drain electrodes, packing closeness, and orientation versus the electrodes, can determine the overall performance. In addition, a gate insulator with a high dielectric constant, a low leakage current, and capability to promote ordering in the semiconductor is required to increase device performances and to lower the FET operating voltage. In this view, Al 2 O 3 appears a good candidate, although its widespread adoption is limited by the disorder that such oxide induces on the semiconductor with detrimental consequences on semiconductor electrical properties. In this contribution, an overview of recent results obtained on thiophene-derivative-based FET devices, fabricated by different growth techniques, and using both thermally grown SiO 2 and Al 2 O 3 from atomic layer deposition gate insulators will be reported and discussed with particular reference to organic solid state aggregation, morphology, and organic-inorganic interface

  1. Alumina nanoparticle/polymer nanocomposite dielectric for flexible amorphous indium-gallium-zinc oxide thin film transistors on plastic substrate with superior stability

    Energy Technology Data Exchange (ETDEWEB)

    Lai, Hsin-Cheng [Department of Electrical Engineering, National Chung Hsing University, Taichung 40227, Taiwan (China); Pei, Zingway, E-mail: zingway@dragon.nchu.edu.tw [Department of Electrical Engineering, National Chung Hsing University, Taichung 40227, Taiwan (China); Graduate Institute of Optoelectronic Engineering, National Chung Hsing University, Taichung 40227, Taiwan (China); Center of Nanoscience and Nanotechnology, National Chung Hsing University, Taichung 40227, Taiwan (China); Jian, Jyun-Ruri; Tzeng, Bo-Jie [Graduate Institute of Optoelectronic Engineering, National Chung Hsing University, Taichung 40227, Taiwan (China)

    2014-07-21

    In this study, the Al{sub 2}O{sub 3} nanoparticles were incorporated into polymer as a nono-composite dielectric for used in a flexible amorphous Indium-Gallium-Zinc Oxide (a-IGZO) thin-film transistor (TFT) on a polyethylene naphthalate substrate by solution process. The process temperature was well below 100 °C. The a-IGZO TFT exhibit a mobility of 5.13 cm{sup 2}/V s on the flexible substrate. After bending at a radius of 4 mm (strain = 1.56%) for more than 100 times, the performance of this a-IGZO TFT was nearly unchanged. In addition, the electrical characteristics are less altered after positive gate bias stress at 10 V for 1500 s. Thus, this technology is suitable for use in flexible displays.

  2. Photo-galvanic effect in Bi2Se3 thin films with ionic liquid gating

    Science.gov (United States)

    Pan, Yu; Richardella, Anthony; Lee, Joon Sue; Flanagan, Thomas; Samarth, Nitin

    2013-03-01

    A key challenge in three dimensional (3D) topological insulators (TIs) is to reveal the helical spin-polarized surface states via electrical transport measurements. A recent study [Nature Nanotech. 7, 96 (2012)] showed that circularly polarized light can be used to generate and control photocurrents in the 3D TI Bi2Se3, even at photon energies that are well above the bulk band gap. Symmetry considerations suggest that this ``photo-galvanic effect'' arises purely from photo-currents induced in the surface Dirac states. To gain insights into this phenomenon, we have carried out systematic measurements of the photo-galvanic effect in electrically gated MBE-grown Bi2Se3 thin films of varying thickness. By using an ionic liquid as an optically transparent gate, we map out the behavior of the photo-galvanic effect as a function of Fermi energy over a temperature range 5 K <= T <= 300 K. Supported by ONR and NSF.

  3. Degradation of Ultra-Thin Gate Oxide NMOSFETs under CVDT and SHE Stresses

    International Nuclear Information System (INIS)

    Shi-Gang, Hu; Yan-Rong, Cao; Yue, Hao; Xiao-Hua, Ma; Chi, Chen; Xiao-Feng, Wu; Qing-Jun, Zhou

    2008-01-01

    Degradation of device under substrate hot-electron (SHE) and constant voltage direct-tunnelling (CVDT) stresses are studied using NMOSFET with 1.4-nm gate oxides. The degradation of device parameters and the degradation of the stress induced leakage current (SILC) under these two stresses are reported. The emphasis of this paper is on SILC and breakdown of ultra-thin-gate-oxide under these two stresses. SILC increases with stress time and several soft breakdown events occur during direct-tunnelling (DT) stress. During SHE stress, SILC firstly decreases with stress time and suddenly jumps to a high level, and no soft breakdown event is observed. For DT injection, the positive hole trapped in the oxide and hole direct-tunnelling play important roles in the breakdown. For SHE injection, it is because injected hot electrons accelerate the formation of defects and these defects formed by hot electrons induce breakdown. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  4. Influence of O2 flow rate on HfO2 gate dielectrics for back-gated graphene transistors

    International Nuclear Information System (INIS)

    Ganapathi, Kolla Lakshmi; Bhat, Navakanta; Mohan, Sangeneni

    2014-01-01

    HfO 2  thin films deposited on Si substrate using electron beam evaporation, are evaluated for back-gated graphene transistors. The amount of O 2  flow rate, during evaporation is optimized for 35 nm thick HfO 2  films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O 2  flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post-deposition annealing and post-metallization annealing in forming gas ambience (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O 2  flow rate shows the best properties as measured on MOS capacitors. To evaluate the performance of device properties, back-gated bilayer graphene transistors on HfO 2  films deposited at two O 2  flow rates of 3 and 20 SCCM have been fabricated and characterized. The transistor with HfO 2  film deposited at 3 SCCM O 2  flow rate shows better electrical properties consistent with the observations on MOS capacitor structures. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices. (paper)

  5. All-solution-processed bottom-gate organic thin-film transistor with improved subthreshold behaviour using functionalized pentacene active layer

    International Nuclear Information System (INIS)

    Kim, Jinwoo; Jeong, Jaewook; Cho, Hyun Duk; Lee, Changhee; Hong, Yongtaek; Kim, Seul Ong; Kwon, Soon-Ki

    2009-01-01

    We report organic thin-film transistors (OTFTs) made by simple solution processes in an ambient air environment. Inkjet-printed silver electrodes were used for bottom-gate and bottom-contacted source/drain electrodes. A spin-coated cross-linked poly(4-vinylphenol) (PVP) and a spin-coated 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) were used as a gate dielectric layer and an active layer, respectively. A high-boiling-point solvent was used for TIPS-pentacene and the resulting film showed stem-like morphology. X-ray diffraction (XRD) measurement showed the spin-coated active layer was well crystallized, showing the (0 0 1) plane. The reasonable mobility, on/off ratio and threshold voltage of the fabricated device, which are comparable to those of the previously reported TIPS-pentacene OTFT with gold electrodes, show that the printed silver electrodes worked successfully as gate and source/drain electrodes. Furthermore, the device showed a subthreshold slope of 0.61 V/dec in the linear region (V DS = -5 V), which is the lowest value for spin-coated TIPS-pentacene TFT ever reported, and much lower than that of the thermally evaporated pentacene OTFTs. It is thought that the surface energy of the PVP dielectric layer is well matched with that of a well-ordered TIPS-pentacene (0 0 1) surface when a high-boiling-point solvent and a low-temperature drying process are used, thereby making good interface properties, and showing higher performances than those for pentacene TFT with the same structure.

  6. High performance In2O3 thin film transistors using chemically derived aluminum oxide dielectric

    KAUST Repository

    Nayak, Pradipta K.

    2013-07-18

    We report high performance solution-deposited indium oxide thin film transistors with field-effect mobility of 127 cm2/Vs and an Ion/Ioff ratio of 106. This excellent performance is achieved by controlling the hydroxyl group content in chemically derived aluminum oxide (AlOx) thin-film dielectrics. The AlOx films annealed in the temperature range of 250–350 °C showed higher amount of Al-OH groups compared to the films annealed at 500 °C, and correspondingly higher mobility. It is proposed that the presence of Al-OH groups at the AlOx surface facilitates unintentional Al-doping and efficient oxidation of the indium oxide channel layer, leading to improved device performance.

  7. High performance In2O3 thin film transistors using chemically derived aluminum oxide dielectric

    KAUST Repository

    Nayak, Pradipta K.; Hedhili, Mohamed N.; Cha, Dong Kyu; Alshareef, Husam N.

    2013-01-01

    We report high performance solution-deposited indium oxide thin film transistors with field-effect mobility of 127 cm2/Vs and an Ion/Ioff ratio of 106. This excellent performance is achieved by controlling the hydroxyl group content in chemically derived aluminum oxide (AlOx) thin-film dielectrics. The AlOx films annealed in the temperature range of 250–350 °C showed higher amount of Al-OH groups compared to the films annealed at 500 °C, and correspondingly higher mobility. It is proposed that the presence of Al-OH groups at the AlOx surface facilitates unintentional Al-doping and efficient oxidation of the indium oxide channel layer, leading to improved device performance.

  8. UV protection filters by dielectric multilayer thin films on Glass BK-7 and Infrasil 301

    International Nuclear Information System (INIS)

    Abdel-Aziz, M.M.; Azim, Osama A.; Abdel-Wahab, L.A.; Seddik, Mohamed M.

    2006-01-01

    The increasing use of Ultraviolet (UV) light in medicine, industrial environments, for cosmetic use, and even in consumer products necessitates that greater attention be paid to the potential hazards of this type of electromagnetic radiation. To avoid any adverse effects of exposure to this type of radiation, four suitable protection filters were produced to block three UV bands (UVA, UVB, and UVC). The design structure of the required dielectric multilayer filters was done by optical thin film technology using the absorbing property of UV radiation for the substrates and dielectric materials. The computer analyses of the multilayer filter formulas were prepared using Macleod Software for the production processes. The deposition technique was achieved on optical substrates (Glass BK-7 and Infrasil 301) by dielectric material combinations including Titanium dioxide (Ti 2 O 3 ), Hafnium dioxide (HfO 2 ), and Lima (mixture of oxides SiO 2 /Al 2 O 3 ); deposition being achieved using an electron beam gun. The output results of the theoretical and experimental transmittance values for spectral band from 200 nm to 800 nm were discussed in four processes. To analyze the suitability for use in 'real world' applications, the test pieces were subjected to the durability tests (adhesion, abrasion resistance, and humidity) according to Military Standard MIL-C-675C and MIL-C-48497A

  9. UV protection filters by dielectric multilayer thin films on Glass BK-7 and Infrasil 301

    Science.gov (United States)

    Abdel-Aziz, M. M.; Azim, Osama A.; Abdel-Wahab, L. A.; Seddik, Mohamed M.

    2006-10-01

    The increasing use of Ultraviolet (UV) light in medicine, industrial environments, for cosmetic use, and even in consumer products necessitates that greater attention be paid to the potential hazards of this type of electromagnetic radiation. To avoid any adverse effects of exposure to this type of radiation, four suitable protection filters were produced to block three UV bands (UVA, UVB, and UVC). The design structure of the required dielectric multilayer filters was done by optical thin film technology using the absorbing property of UV radiation for the substrates and dielectric materials. The computer analyses of the multilayer filter formulas were prepared using Macleod Software for the production processes. The deposition technique was achieved on optical substrates (Glass BK-7 and Infrasil 301) by dielectric material combinations including Titanium dioxide (Ti 2O 3), Hafnium dioxide (HfO 2), and Lima (mixture of oxides SiO 2/Al 2O 3); deposition being achieved using an electron beam gun. The output results of the theoretical and experimental transmittance values for spectral band from 200 nm to 800 nm were discussed in four processes. To analyze the suitability for use in 'real world' applications, the test pieces were subjected to the durability tests (adhesion, abrasion resistance, and humidity) according to Military Standard MIL-C-675C and MIL-C-48497A.

  10. Redefinition of the self-bias voltage in a dielectrically shielded thin sheath RF discharge

    Science.gov (United States)

    Ho, Teck Seng; Charles, Christine; Boswell, Rod

    2018-05-01

    In a geometrically asymmetric capacitively coupled discharge where the powered electrode is shielded from the plasma by a layer of dielectric material, the self-bias manifests as a nonuniform negative charging in the dielectric rather than on the blocking capacitor. In the thin sheath regime where the ion transit time across the powered sheath is on the order of or less than the Radiofrequency (RF) period, the plasma potential is observed to respond asymmetrically to extraneous impedances in the RF circuit. Consequently, the RF waveform on the plasma-facing surface of the dielectric is unknown, and the behaviour of the powered sheath is not easily predictable. Sheath circuit models become inadequate for describing this class of discharges, and a comprehensive fluid, electrical, and plasma numerical model is employed to accurately quantify this behaviour. The traditional definition of the self-bias voltage as the mean of the RF waveform is shown to be erroneous in this regime. Instead, using the maxima of the RF waveform provides a more rigorous definition given its correlation with the ion dynamics in the powered sheath. This is supported by a RF circuit model derived from the computational fluid dynamics and plasma simulations.

  11. Structural characterization and dielectric properties of BaTiO3 thin films obtained by spin coating

    Directory of Open Access Journals (Sweden)

    Branimir Bajac

    2014-12-01

    Full Text Available Barium titanate thin films were prepared by spin coating deposition technique of an acetic precursor sol and sintered at 750, 900 and 1050 °C. Phase composition of the obtained thin films was characterized by X-ray diffraction and Raman spectroscopy. Their morphology was analysed by scanning electron microscopy and atomic force microscopy. Dielectric properties of thin films sintered at 750 and 900 °C were characterized by LCD device, where the influence of sintering temperature on dielectric permittivity and loss tangent was inspected. It was concluded that higher sintering temperature increases grain size and amount of tetragonal phase, hence higher relative permittivity was recorded. The almost constant relative permittivity in the measured frequency (800 Hz–0.5 MHz and temperature (25–200 °C ranges as well as low dielectric loss are very important for the application of BaTiO3 films in microelectronic devices.

  12. Dielectric properties of DC reactive magnetron sputtered Al2O3 thin films

    International Nuclear Information System (INIS)

    Prasanna, S.; Mohan Rao, G.; Jayakumar, S.; Kannan, M.D.; Ganesan, V.

    2012-01-01

    Alumina (Al 2 O 3 ) thin films were sputter deposited over well-cleaned glass and Si substrates by DC reactive magnetron sputtering under various oxygen gas pressures and sputtering powers. The composition of the films was analyzed by X-ray photoelectron spectroscopy and an optimal O/Al atomic ratio of 1.59 was obtained at a reactive gas pressure of 0.03 Pa and sputtering power of 70 W. X-ray diffraction results revealed that the films were amorphous until 550 °C. The surface morphology of the films was studied using scanning electron microscopy and the as-deposited films were found to be smooth. The topography of the as-deposited and annealed films was analyzed by atomic force microscopy and a progressive increase in the rms roughness of the films from 3.2 nm to 4.53 nm was also observed with increase in the annealing temperature. Al-Al 2 O 3 -Al thin film capacitors were then fabricated on glass substrates to study the effect of temperature and frequency on the dielectric property of the films. Temperature coefficient of capacitance, AC conductivity and activation energy were determined and the results are discussed. - Highlights: ► Al 2 O 3 thin films were deposited by DC reactive magnetron sputtering. ► The films were found to be amorphous up to annealing temperature of 550 C. ► An increase in rms roughness of the films was observed with annealing. ► Al-Al 2 O 3 -Al thin film capacitors were fabricated and dielectric constant was 7.5. ► The activation energy decreased with increase in frequency.

  13. Proton Conducting Graphene Oxide/Chitosan Composite Electrolytes as Gate Dielectrics for New-Concept Devices.

    Science.gov (United States)

    Feng, Ping; Du, Peifu; Wan, Changjin; Shi, Yi; Wan, Qing

    2016-09-30

    New-concept devices featuring the characteristics of ultralow operation voltages and low fabrication cost have received increasing attention recently because they can supplement traditional Si-based electronics. Also, organic/inorganic composite systems can offer an attractive strategy to combine the merits of organic and inorganic materials into promising electronic devices. In this report, solution-processed graphene oxide/chitosan composite film was found to be an excellent proton conducting electrolyte with a high specific capacitance of ~3.2 μF/cm 2 at 1.0 Hz, and it was used to fabricate multi-gate electric double layer transistors. Dual-gate AND logic operation and two-terminal diode operation were realized in a single device. A two-terminal synaptic device was proposed, and some important synaptic behaviors were emulated, which is interesting for neuromorphic systems.

  14. OTFT with pentacene-gate dielectric interface modified by silicon nanoparticles

    International Nuclear Information System (INIS)

    Jakabovic, J.; Kovac, J.; Srnanek, R.; Guldan, S.; Donoval, D.; Weis, M.; Sokolsky, M.; Cirak, J.; Broch, K.; Schreiber, F.

    2011-01-01

    We have for the first time investigated the structural and electrical properties of pentacene OTFT deposited on the semiconductor-gate insulator interface covered with SiNPs monolayer prepared by the LB method and compared these to a reference sample (without SiNPs). The micro-Raman, AFM and XRD measurements confirmed that the pentacene layer deposited on the semiconductor-gate insulator interface covered with a SiNPs monolayer on both hydrophobic and hydrophilic surfaces changes the structure. The Raman measurements show that the average value of α is between 0.8 and 1.0. The different structural quality of pentacene leads to better OTFTs electrical characteristics mainly saturation current of OTFTs with SiNPs increasing (∼ 2.5 x) with storing time (85 days) in comparison to OTFTs without SiNPs, which decrease similarly after 85 days.

  15. Note: The design of thin gap chamber simulation signal source based on field programmable gate array

    International Nuclear Information System (INIS)

    Hu, Kun; Wang, Xu; Li, Feng; Jin, Ge; Lu, Houbing; Liang, Futian

    2015-01-01

    The Thin Gap Chamber (TGC) is an important part of ATLAS detector and LHC accelerator. Targeting the feature of the output signal of TGC detector, we have designed a simulation signal source. The core of the design is based on field programmable gate array, randomly outputting 256-channel simulation signals. The signal is generated by true random number generator. The source of randomness originates from the timing jitter in ring oscillators. The experimental results show that the random number is uniform in histogram, and the whole system has high reliability

  16. Temperature-dependent gate-swing hysteresis of pentacene thin film transistors

    Directory of Open Access Journals (Sweden)

    Yow-Jon Lin

    2014-10-01

    Full Text Available The temperature-dependent hysteresis-type transfer characteristics of pentacene-based organic thin film transistors (OTFTs were researched. The temperature-dependent transfer characteristics exhibit hopping conduction behavior. The fitting data for the temperature-dependent off-to-on and on-to-off transfer characteristics of OTFTs demonstrate that the hopping distance (ah and the barrier height for hopping (qϕt control the carrier flow, resulting in the hysteresis-type transfer characteristics of OTFTs. The hopping model gives an explanation of the gate-swing hysteresis and the roles played by qϕt and ah.

  17. Optical and microwave dielectric properties of pulsed laser deposited Na{sub 0.5}Bi{sub 0.5}TiO{sub 3} thin film

    Energy Technology Data Exchange (ETDEWEB)

    Joseph, Andrews; Goud, J. Pundareekam; Raju, K. C. James [School of Physics, University of Hyderabad, Hyderabad, Telangana 500046 (India); Emani, Sivanagi Reddy [Advanced Center of Research in High Energy Materials (ACRHEM), School of Physics, University of Hyderabad, Telangana 500046 (India)

    2016-05-23

    Optical properties of pulsed laser deposited (PLD) sodium bismuth titanate thin films (NBT), are investigated at wavelengths of 190-2500 nm. Microwave dielectric properties were investigated using the Split Post Dielectric Resonator (SPDR) technique. At 10 GHz, the NBT films have a dielectric constant of 205 and loss tangent of 0.0373 at room temperature. The optical spectra analysis reveals that NBT thin films have an optical band gap E{sub g}=3.55 eV and it has a dielectric constant of 3.37 at 1000 nm with dielectric loss of 0.299. Hence, NBT is a promising candidate for photonic device applications.

  18. Lanthanum titanium perovskite compound: Thin film deposition and high frequency dielectric characterization

    Energy Technology Data Exchange (ETDEWEB)

    Le Paven, C., E-mail: claire.lepaven@univ-rennes1.fr [Institut d' Electronique et de Télécommunications de Rennes (IETR, UMR-CNRS 6164), Equipe Matériaux Fonctionnels, IUT Saint Brieuc, Université de Rennes 1, 22000 Saint Brieuc (France); Lu, Y. [Institut d' Electronique et de Télécommunications de Rennes (IETR, UMR-CNRS 6164), Equipe Matériaux Fonctionnels, IUT Saint Brieuc, Université de Rennes 1, 22000 Saint Brieuc (France); Nguyen, H.V. [Institut d' Electronique et de Télécommunications de Rennes (IETR, UMR-CNRS 6164), Equipe Matériaux Fonctionnels, IUT Saint Brieuc, Université de Rennes 1, 22000 Saint Brieuc (France); CEA LETI, Minatec Campus, 38054 Grenoble (France); Benzerga, R.; Le Gendre, L. [Institut d' Electronique et de Télécommunications de Rennes (IETR, UMR-CNRS 6164), Equipe Matériaux Fonctionnels, IUT Saint Brieuc, Université de Rennes 1, 22000 Saint Brieuc (France); Rioual, S. [Laboratoire de Magnétisme de Brest (EA CNRS 4522), Université de Bretagne Occidentale, 29000 Brest (France); Benzegoutta, D. [Institut des Nanosciences de Paris (INSP, UMR CNRS 7588), Université Pierre et Marie Curie, 75005 Paris (France); Tessier, F.; Cheviré, F. [Institut des Sciences Chimiques de Rennes (ISCR, UMR-CNRS 6226), Equipe Verres et Céramiques, Université de Rennes 1, 35000 Rennes (France); and others

    2014-02-28

    Perovskite lanthanum titanium oxide thin films were deposited on (001) MgO, (001) LaAlO{sub 3} and Pt(111)/TiO{sub 2}/SiO{sub 2}/(001)Si substrates by RF magnetron sputtering, using a La{sub 2}Ti{sub 2}O{sub 7} homemade target sputtered under oxygen reactive plasma. The films deposited at 800 °C display a crystalline growth different than those reported on monoclinic ferroelectric La{sub 2}Ti{sub 2}O{sub 7} films. X-ray photoelectron spectroscopy analysis shows the presence of titanium as Ti{sup 4+} ions, with no trace of Ti{sup 3+}, and provides a La/Ti ratio of 1.02. The depositions being performed from a La{sub 2}Ti{sub 2}O{sub 7} target under oxygen rich plasma, the same composition (La{sub 2}Ti{sub 2}O{sub 7}) is proposed for the deposited films, with an unusual orthorhombic cell and Cmc2{sub 1} space group. The films have a textured growth on MgO and Pt/Si substrates, and are epitaxially grown on LaAlO{sub 3} substrate. The dielectric characterization displays stable values of the dielectric constant and of the losses in the frequency range [0.1–20] GHz. No variation of the dielectric constant has been observed when a DC electric field up to 250 kV/cm was applied, which does not match a classical ferroelectric behavior at high frequencies and room temperature for the proposed La{sub 2}Ti{sub 2}O{sub 7} orthorhombic phase. At 10 GHz and room temperature, the dielectric constant of the obtained La{sub 2}Ti{sub 2}O{sub 7} films is ε ∼ 60 and the losses are low (tanδ < 0.02). - Highlights: • Lanthanum titanium oxide films were deposited by reactive magnetron sputtering. • A La{sub 2}Ti{sub 2}O{sub 7} chemical composition is proposed, with an unusual orthorhombic cell. • At 10 GHz, the dielectric losses are lower than 0.02. • No variation of the dielectric constant is observed under DC electric biasing.

  19. Lanthanum titanium perovskite compound: Thin film deposition and high frequency dielectric characterization

    International Nuclear Information System (INIS)

    Le Paven, C.; Lu, Y.; Nguyen, H.V.; Benzerga, R.; Le Gendre, L.; Rioual, S.; Benzegoutta, D.; Tessier, F.; Cheviré, F.

    2014-01-01

    Perovskite lanthanum titanium oxide thin films were deposited on (001) MgO, (001) LaAlO 3 and Pt(111)/TiO 2 /SiO 2 /(001)Si substrates by RF magnetron sputtering, using a La 2 Ti 2 O 7 homemade target sputtered under oxygen reactive plasma. The films deposited at 800 °C display a crystalline growth different than those reported on monoclinic ferroelectric La 2 Ti 2 O 7 films. X-ray photoelectron spectroscopy analysis shows the presence of titanium as Ti 4+ ions, with no trace of Ti 3+ , and provides a La/Ti ratio of 1.02. The depositions being performed from a La 2 Ti 2 O 7 target under oxygen rich plasma, the same composition (La 2 Ti 2 O 7 ) is proposed for the deposited films, with an unusual orthorhombic cell and Cmc2 1 space group. The films have a textured growth on MgO and Pt/Si substrates, and are epitaxially grown on LaAlO 3 substrate. The dielectric characterization displays stable values of the dielectric constant and of the losses in the frequency range [0.1–20] GHz. No variation of the dielectric constant has been observed when a DC electric field up to 250 kV/cm was applied, which does not match a classical ferroelectric behavior at high frequencies and room temperature for the proposed La 2 Ti 2 O 7 orthorhombic phase. At 10 GHz and room temperature, the dielectric constant of the obtained La 2 Ti 2 O 7 films is ε ∼ 60 and the losses are low (tanδ < 0.02). - Highlights: • Lanthanum titanium oxide films were deposited by reactive magnetron sputtering. • A La 2 Ti 2 O 7 chemical composition is proposed, with an unusual orthorhombic cell. • At 10 GHz, the dielectric losses are lower than 0.02. • No variation of the dielectric constant is observed under DC electric biasing

  20. Phase sensitive molecular dynamics of self-assembly glycolipid thin films: A dielectric spectroscopy investigation

    Science.gov (United States)

    Velayutham, T. S.; Ng, B. K.; Gan, W. C.; Majid, W. H. Abd.; Hashim, R.; Zahid, N. I.; Chaiprapa, Jitrin

    2014-08-01

    Glycolipid, found commonly in membranes, is also a liquid crystal material which can self-assemble without the presence of a solvent. Here, the dielectric and conductivity properties of three synthetic glycolipid thin films in different thermotropic liquid crystal phases were investigated over a frequency and temperature range of (10-2-106 Hz) and (303-463 K), respectively. The observed relaxation processes distinguish between the different phases (smectic A, columnar/hexagonal, and bicontinuous cubic Q) and the glycolipid molecular structures. Large dielectric responses were observed in the columnar and bicontinuous cubic phases of the longer branched alkyl chain glycolipids. Glycolipids with the shortest branched alkyl chain experience the most restricted self-assembly dynamic process over the broad temperature range studied compared to the longer ones. A high frequency dielectric absorption (Process I) was observed in all samples. This is related to the dynamics of the hydrogen bond network from the sugar group. An additional low-frequency mechanism (Process II) with a large dielectric strength was observed due to the internal dynamics of the self-assembly organization. Phase sensitive domain heterogeneity in the bicontinuous cubic phase was related to the diffusion of charge carriers. The microscopic features of charge hopping were modelled using the random walk scheme, and two charge carrier hopping lengths were estimated for two glycolipid systems. For Process I, the hopping length is comparable to the hydrogen bond and is related to the dynamics of the hydrogen bond network. Additionally, that for Process II is comparable to the bilayer spacing, hence confirming that this low-frequency mechanism is associated with the internal dynamics within the phase.

  1. Quantum-dot size and thin-film dielectric constant: precision measurement and disparity with simple models.

    Science.gov (United States)

    Grinolds, Darcy D W; Brown, Patrick R; Harris, Daniel K; Bulovic, Vladimir; Bawendi, Moungi G

    2015-01-14

    We study the dielectric constant of lead sulfide quantum dot (QD) films as a function of the volume fraction of QDs by varying the QD size and keeping the ligand constant. We create a reliable QD sizing curve using small-angle X-ray scattering (SAXS), thin-film SAXS to extract a pair-distribution function for QD spacing, and a stacked-capacitor geometry to measure the capacitance of the thin film. Our data support a reduced dielectric constant in nanoparticles.

  2. Structural and magneto-dielectric property of (1-x)SBT-xLSMO nanocomposite thin films

    International Nuclear Information System (INIS)

    Maity, Sarmistha; Bhattacharya, D.; Dhar, A.; Ray, S.K.

    2009-01-01

    Full text: In recent years, interest in multiferroic materials has been increasing due to their potential applications. As single-phase multiferroic materials have very low room temperature magnetoelectric coefficient, recent studies have been concentrated on the possibility of attaining a coupling between the two order parameters by designing composites with magnetostrictive and piezoelectric phases via stress mediation. Composite thin films with homogenous matrix, composition spread with terminal layers being ferromagnetic and ferroelectric, layer-by-layer growth, superlattices, as well as epitaxial growth of ferromagnetic and ferroelectric layers on suitable substrates are been currently considered. In the present work, a nanostructured composite thin film of strontium bismuth tantalate (SBT) (ferroelectric layer) and lanthanum strontium manganese oxide (LSMO) (ferromagnetic layer) were fabricated using pulsed laser deposition. Phase separated multiferroic thin films with thickness varying from 50nm to 150nm were deposited from composite target (1-x)SBT-xLSMO with x=0.2, 0.5, 0.8. Grazing angle X-ray diffraction study combined with photo electron spectroscopy with depth profiling was carried out to study the phase separation. Interface quality of the thin film on silicon substrate was studied by Rutherford backscattering spectroscopy. Influence of film thickness and composition (x) on the electrical property of film was examined using impedance spectroscopy. The composite films exhibited ferroelectric as well as ferromagnetic characteristics at room temperature. A small kink in the dielectric spectra near the Neel temperature of LSMO confirmed the magneto-electric effect in the nanocomposite films

  3. Dual-Input AND Gate From Single-Channel Thin-Film FET

    Science.gov (United States)

    Miranda, F. A.; Pinto, N. J.; Perez, R.; Mueller, C. H.

    2008-01-01

    A regio-regular poly(3-hexylthiophene) (RRP3HT) thin-film transistor having a split-gate architecture has been fabricated on a doped silicon/silicon nitride substrate and characterized. RRP3HT is a semiconducting polymer that has a carrier mobility and on/off ratio when used in a field effect transistor (FET) configuration. This commercially available polymer is very soluble in common organic solvents and is easily processed to form uniform thin films. The most important polymer-based device fabricated and studied is the FET, since it forms the building block in logic circuits and switches for active matrix (light-emitting-diode) (LED) displays, smart cards, and radio frequency identification (RFID) cards.

  4. Interface Engineering for Atomic Layer Deposited Alumina Gate Dielectric on SiGe Substrates.

    OpenAIRE

    Zhang, L; Guo, Y; Hassan, VV; Tang, K; Foad, MA; Woicik, JC; Pianetta, P; Robertson, John; McIntyre, PC

    2016-01-01

    Optimization of the interface between high-k dielectrics and SiGe substrates is a challenging topic due to the complexity arising from the coexistence of Si and Ge interfacial oxides. Defective high-k/SiGe interfaces limit future applications of SiGe as a channel material for electronic devices. In this paper, we identify the surface layer structure of as-received SiGe and Al2O3/SiGe structures based on soft and hard X-ray photoelectron spectroscopy. As-received SiGe substrates have native Si...

  5. Nonlinear dielectric thin films for high-power electric storage with energy density comparable with electrochemical supercapacitors.

    Science.gov (United States)

    Yao, Kui; Chen, Shuting; Rahimabady, Mojtaba; Mirshekarloo, Meysam Sharifzadeh; Yu, Shuhui; Tay, Francis Eng Hock; Sritharan, Thirumany; Lu, Li

    2011-09-01

    Although batteries possess high energy storage density, their output power is limited by the slow movement of charge carriers, and thus capacitors are often required to deliver high power output. Dielectric capacitors have high power density with fast discharge rate, but their energy density is typically much lower than electrochemical supercapacitors. Increasing the energy density of dielectric materials is highly desired to extend their applications in many emerging power system applications. In this paper, we review the mechanisms and major characteristics of electric energy storage with electrochemical supercapacitors and dielectric capacitors. Three types of in-house-produced ferroic nonlinear dielectric thin film materials with high energy density are described, including (Pb(0.97)La(0.02))(Zr(0.90)Sn(0.05)Ti(0.05))O(3) (PLZST) antiferroelectric ceramic thin films, Pb(Zn(1/3)Nb(2/3))O(3-)Pb(Mg(1/3)Nb(2/3))O(3-)PbTiO(3) (PZN-PMN-PT) relaxor ferroelectric ceramic thin films, and poly(vinylidene fluoride) (PVDF)-based polymer blend thin films. The results showed that these thin film materials are promising for electric storage with outstandingly high power density and fairly high energy density, comparable with electrochemical supercapacitors.

  6. Laser printed organic semiconductor PQT-12 for bottom-gate organic thin-film transistors: Fabrication and characterization

    Energy Technology Data Exchange (ETDEWEB)

    Makrygianni, M. [National Technical University of Athens, Physics Department, Iroon Polytehneiou 9, 15780 Zografou (Greece); National Technical University of Athens, Electrical and Computer Engineering Department, Iroon Polytehneiou 9, 15780 Zografou (Greece); Ainsebaa, A. [Ecole Nationale Supérieure des Mines de Saint-Etienne, Department of Flexible Electronics, CMP-EMSE, MOC, 13541 Gardanne (France); Nagel, M. [EMPA Swiss Federal Lab. for Materials Science and Technology, Laboratory for Functional Polymers, Überlandstrasse 129, 8600 Dubendorf (Switzerland); Sanaur, S. [Ecole Nationale Supérieure des Mines de Saint-Etienne, Department of Flexible Electronics, CMP-EMSE, MOC, 13541 Gardanne (France); Raptis, Y.S. [National Technical University of Athens, Physics Department, Iroon Polytehneiou 9, 15780 Zografou (Greece); Zergioti, I., E-mail: zergioti@central.ntua.gr [National Technical University of Athens, Physics Department, Iroon Polytehneiou 9, 15780 Zografou (Greece); Tsamakis, D. [National Technical University of Athens, Electrical and Computer Engineering Department, Iroon Polytehneiou 9, 15780 Zografou (Greece)

    2016-12-30

    Highlights: • Smooth printing of semiconducting π-conjugated polymer patterns for BG-BC OTFTs. • Well-ordering of PQT-12 when diluted in a high-boiling-point solvent yielding good interface properties. • No significant change in polymer chain orientation observed between LIFT printed patterns. • Reliable solid phase printing technique for thin, organic large area electronics applications, in a well-defined manner. - Abstract: In this work, we report on the effect of laser printed Poly (3,3‴-didodecyl quarter thiophene) on its optical, structural and electrical properties for bottom-gate/bottom-contact organic thin-film transistors applications. This semiconducting π-conjugated polymer was solution-deposited (spin-coated) on a donor substrate and transferred by means of solid phase laser-induced forward transfer (LIFT) technique on SiO{sub 2}/Si receiver substrates to form the active material. This article presents a detailed study of the electrical properties of the fabricated transistors by measuring the parasitic resistances for gold (Au) and platinum (Pt) as source-drain electrodes, for optimizing OTFTs in terms of contacts. In addition, X-ray diffraction patterns revealed that it is possible to control the polymer microstructure through the choice of solvent. Also, no significant change in polymer chain orientation was observed between two printed patterns at 90 and 130 mJ/cm{sup 2} as confirmed by Raman spectra. The results demonstrate hole mobility values of (2.6 ± 1.3) × 10{sup −2} cm{sup 2}/Vs, and lower parasitic resistance for dielectric surface roughness around 1.2 nm and Pt electrodes. Higher performances are correlated to i) the well-ordering of PQT-12 surface when a high-boiling-point solvent is used and ii) the less limitating Pt source/drain electrodes. This analytical study proves that solid phase LIFT printing is a reliable technology for the fabrication of thin, organic large area electronics in a well-defined manner.

  7. Laser printed organic semiconductor PQT-12 for bottom-gate organic thin-film transistors: Fabrication and characterization

    International Nuclear Information System (INIS)

    Makrygianni, M.; Ainsebaa, A.; Nagel, M.; Sanaur, S.; Raptis, Y.S.; Zergioti, I.; Tsamakis, D.

    2016-01-01

    Highlights: • Smooth printing of semiconducting π-conjugated polymer patterns for BG-BC OTFTs. • Well-ordering of PQT-12 when diluted in a high-boiling-point solvent yielding good interface properties. • No significant change in polymer chain orientation observed between LIFT printed patterns. • Reliable solid phase printing technique for thin, organic large area electronics applications, in a well-defined manner. - Abstract: In this work, we report on the effect of laser printed Poly (3,3‴-didodecyl quarter thiophene) on its optical, structural and electrical properties for bottom-gate/bottom-contact organic thin-film transistors applications. This semiconducting π-conjugated polymer was solution-deposited (spin-coated) on a donor substrate and transferred by means of solid phase laser-induced forward transfer (LIFT) technique on SiO_2/Si receiver substrates to form the active material. This article presents a detailed study of the electrical properties of the fabricated transistors by measuring the parasitic resistances for gold (Au) and platinum (Pt) as source-drain electrodes, for optimizing OTFTs in terms of contacts. In addition, X-ray diffraction patterns revealed that it is possible to control the polymer microstructure through the choice of solvent. Also, no significant change in polymer chain orientation was observed between two printed patterns at 90 and 130 mJ/cm"2 as confirmed by Raman spectra. The results demonstrate hole mobility values of (2.6 ± 1.3) × 10"−"2 cm"2/Vs, and lower parasitic resistance for dielectric surface roughness around 1.2 nm and Pt electrodes. Higher performances are correlated to i) the well-ordering of PQT-12 surface when a high-boiling-point solvent is used and ii) the less limitating Pt source/drain electrodes. This analytical study proves that solid phase LIFT printing is a reliable technology for the fabrication of thin, organic large area electronics in a well-defined manner.

  8. High-Performance Ink-Synthesized Cu-Gate Thin-Film Transistor with Diffusion Barrier Formation

    Science.gov (United States)

    Woo, Whang Je; Nam, Taewook; Oh, Il-Kwon; Maeng, Wanjoo; Kim, Hyungjun

    2018-05-01

    The improved electrical properties of Cu-gate thin-film transistors (TFTs) using an ink-synthesizing process were studied; this technology enables a low-cost and large area process for the display industry. We investigated the film properties and the effects of the ink-synthesized Cu layer in detail with respect to device characteristics. The mobility and reliability of the devices were significantly improved by applying a diffusion barrier at the interface between the Cu gate and the gate insulator. By using a TaN diffusion barrier layer, considerably improved and stabilized ink-Cu gated TFTs could be realized, comparable to sputtered-Cu gated TFTs under positive bias temperature stress measurements.

  9. High-Performance Ink-Synthesized Cu-Gate Thin-Film Transistor with Diffusion Barrier Formation

    Science.gov (United States)

    Woo, Whang Je; Nam, Taewook; Oh, Il-Kwon; Maeng, Wanjoo; Kim, Hyungjun

    2018-02-01

    The improved electrical properties of Cu-gate thin-film transistors (TFTs) using an ink-synthesizing process were studied; this technology enables a low-cost and large area process for the display industry. We investigated the film properties and the effects of the ink-synthesized Cu layer in detail with respect to device characteristics. The mobility and reliability of the devices were significantly improved by applying a diffusion barrier at the interface between the Cu gate and the gate insulator. By using a TaN diffusion barrier layer, considerably improved and stabilized ink-Cu gated TFTs could be realized, comparable to sputtered-Cu gated TFTs under positive bias temperature stress measurements.

  10. Dielectric and piezoelectric properties of lead-free (Bi,Na)TiO3-based thin films

    Science.gov (United States)

    Abazari, M.; Safari, A.; Bharadwaja, S. S. N.; Trolier-McKinstry, S.

    2010-02-01

    Dielectric and piezoelectric properties of morphotropic phase boundary (Bi,Na)TiO3-(Bi,K)TiO3-BaTiO3 epitaxial thin films deposited on SrRuO3 coated SrTiO3 substrates were reported. Thin films of 350 nm thickness exhibited small signal dielectric permittivity and loss tangent values of 750 and 0.15, respectively, at 1 kHz. Ferroelectric hysteresis measurements indicated a remanent polarization value of 30 μC/cm2 with a coercive field of 85-100 kV/cm. The thin film transverse piezoelectric coefficient (e31,f) of these films after poling at 600 kV/cm was found to be -2.2 C/m2. The results indicate that these BNT-based thin films are a potential candidate for lead-free piezoelectric devices.

  11. Vacancy-fluorine complexes and their impact on the properties of metal-oxide transistors with high-k gate dielectrics studied using monoenergetic positron beams

    Science.gov (United States)

    Uedono, A.; Inumiya, S.; Matsuki, T.; Aoyama, T.; Nara, Y.; Ishibashi, S.; Ohdaira, T.; Suzuki, R.; Miyazaki, S.; Yamada, K.

    2007-09-01

    Vacancy-fluorine complexes in metal-oxide semiconductors (MOS) with high-k gate dielectrics were studied using a positron annihilation technique. F+ ions were implanted into Si substrates before the deposition of gate dielectrics (HfSiON). The shift of threshold voltage (Vth) in MOS capacitors and an increase in Fermi level position below the HfSiON/Si interface were observed after F+ implantation. Doppler broadening spectra of the annihilation radiation and positron lifetimes were measured before and after HfSiON fabrication processes. From a comparison between Doppler broadening spectra and those obtained by first-principles calculation, the major defect species in Si substrates after annealing treatment (1050 °C, 5 s) was identified as vacancy-fluorine complexes (V3F2). The origin of the Vth shift in the MOS capacitors was attributed to V3F2 located in channel regions.

  12. Graphene/Pentacene Barristor with Ion-Gel Gate Dielectric: Flexible Ambipolar Transistor with High Mobility and On/Off Ratio.

    Science.gov (United States)

    Oh, Gwangtaek; Kim, Jin-Soo; Jeon, Ji Hoon; Won, EunA; Son, Jong Wan; Lee, Duk Hyun; Kim, Cheol Kyeom; Jang, Jingon; Lee, Takhee; Park, Bae Ho

    2015-07-28

    High-quality channel layer is required for next-generation flexible electronic devices. Graphene is a good candidate due to its high carrier mobility and unique ambipolar transport characteristics but typically shows a low on/off ratio caused by gapless band structure. Popularly investigated organic semiconductors, such as pentacene, suffer from poor carrier mobility. Here, we propose a graphene/pentacene channel layer with high-k ion-gel gate dielectric. The graphene/pentacene device shows both high on/off ratio and carrier mobility as well as excellent mechanical flexibility. Most importantly, it reveals ambipolar behaviors and related negative differential resistance, which are controlled by external bias. Therefore, our graphene/pentacene barristor with ion-gel gate dielectric can offer various flexible device applications with high performances.

  13. Lithium ion intercalation in thin crystals of hexagonal TaSe2 gated by a polymer electrolyte

    Science.gov (United States)

    Wu, Yueshen; Lian, Hailong; He, Jiaming; Liu, Jinyu; Wang, Shun; Xing, Hui; Mao, Zhiqiang; Liu, Ying

    2018-01-01

    Ionic liquid gating has been used to modify the properties of layered transition metal dichalcogenides (TMDCs), including two-dimensional (2D) crystals of TMDCs used extensively recently in the device work, which has led to observations of properties not seen in the bulk. The main effect comes from the electrostatic gating due to the strong electric field at the interface. In addition, ionic liquid gating also leads to ion intercalation when the ion size of the gate electrolyte is small compared to the interlayer spacing of TMDCs. However, the microscopic processes of ion intercalation have rarely been explored in layered TMDCs. Here, we employed a technique combining photolithography device fabrication and electrical transport measurements on the thin crystals of hexagonal TaSe2 using multiple channel devices gated by a polymer electrolyte LiClO4/Polyethylene oxide (PEO). The gate voltage and time dependent source-drain resistances of these thin crystals were used to obtain information on the intercalation process, the effect of ion intercalation, and the correlation between the ion occupation of allowed interstitial sites and the device characteristics. We found a gate voltage controlled modulation of the charge density waves and a scattering rate of charge carriers. Our work suggests that ion intercalation can be a useful tool for layered materials engineering and 2D crystal device design.

  14. Nature of Dielectric Properties, Electric Modulus and AC Electrical Conductivity of Nanocrystalline ZnIn2Se4 Thin Films

    Science.gov (United States)

    El-Nahass, M. M.; Attia, A. A.; Ali, H. A. M.; Salem, G. F.; Ismail, M. I.

    2018-02-01

    The structural characteristics of thermally deposited ZnIn2Se4 thin films were indexed utilizing x-ray diffraction as well as scanning electron microscopy techniques. Dielectric properties, electric modulus and AC electrical conductivity of ZnIn2Se4 thin films were examined in the frequency range from 42 Hz to 106 Hz. The capacitance, conductance and impedance were measured at different temperatures. The dielectric constant and dielectric loss decrease with an increase in frequency. The maximum barrier height was determined from the analysis of the dielectric loss depending on the Giuntini model. The real part of the electric modulus revealed a constant maximum value at higher frequencies and the imaginary part of the electric modulus was characterized by the appearance of dielectric relaxation peaks. The AC electrical conductivity obeyed the Jonscher universal power law. Correlated barrier hopping model was the appropriate mechanism for AC conduction in ZnIn2Se4 thin films. Estimation of the density of states at the Fermi level and activation energy, for AC conduction, was carried out based on the temperature dependence of AC electrical conductivity.

  15. ALD TiO x as a top-gate dielectric and passivation layer for InGaZnO115 ISFETs

    Science.gov (United States)

    Pavlidis, S.; Bayraktaroglu, B.; Leedy, K.; Henderson, W.; Vogel, E.; Brand, O.

    2017-11-01

    The suitability of atomic layer deposited (ALD) titanium oxide (TiO x ) as a top gate dielectric and passivation layer for indium gallium zinc oxide (InGaZnO115) ion sensitive field effect transistors (ISFETs) is investigated. TiO x is an attractive barrier material, but reports of its use for InGaZnO thin film transistor (TFT) passivation have been conflicting thus far. In this work, it is found that the passivated TFT’s behavior depends on the TiO x deposition temperature, affecting critical device characteristics such as threshold voltage, field-effect mobility and sub-threshold swing. An O2 annealing step is required to recover TFT performance post passivation. It is also observed that the positive bias stress response of the passivated TFTs improves compared the original bare device. Secondary ion mass spectroscopy excludes the effects of hydrogen doping and inter-diffusion as sources of the temperature-dependent performance change, therefore indicating that oxygen gettering induced by TiO x passivation is the likely source of oxygen vacancies and, consequently, carriers in the InGaZnO film. It is also shown that potentiometric sensing using ALD TiO x exhibits a near Nernstian response to pH change, as well as minimizes V TH drift in TiO x passivated InGaZnO TFTs immersed in an acidic liquid. These results add to the understanding of InGaZnO passivation effects and underscore the potential for low-temperature fabricated InGaZnO ISFETs to be used as high-performance mobile chemical sensors.

  16. Radiation and Internal Charging Environments for Thin Dielectrics in Interplanetary Space

    Science.gov (United States)

    Minow, Joseph I.; Parker, Linda Neergaard; Altstatt, Richard L.

    2004-01-01

    Spacecraft designs using solar sails for propulsion or thin membranes to shade instruments from the sun to achieve cryogenic operating temperatures are being considered for a number of missions in the next decades. A common feature of these designs are thin dielectric materials that will be exposed to the solar wind, solar energetic particle events, and the distant magnetotail plasma environments encountered by spacecraft in orbit about the Earth-Sun L2 point. This paper will discuss the relevant radiation and internal charging environments developed to support spacecraft design for both total dose radiation effects as well as dose rate dependent phenomenon, such as internal charging in the solar wind and distant magnetotail environments. We will describe the development of radiation and internal charging environment models based on nearly a complete solar cycle of Ulysses solar wind plasma measurements over a complete range of heliocentric latitudes and the early years of the Geotail mission where distant magnetotail plasma environments were sampled beyond X(sub GSE) = -100 Re to nearly L2 (X(sub GSE) -236 Re). Example applications of the environment models are shown to demonstrate the radiation and internal charging environments of thin materials exposed to the interplanetary space plasma environments.

  17. Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

    International Nuclear Information System (INIS)

    Liao, Po-Yung; Chang, Ting-Chang; Hsieh, Tien-Yu; Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo; Chou, Cheng-Hsu; Chang, Jung-Fang

    2016-01-01

    The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V T ) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V T shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V T shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V T shift increases with decreasing frequency of the top gate pulses.

  18. Low-voltage bendable pentacene thin-film transistor with stainless steel substrate and polystyrene-coated hafnium silicate dielectric.

    Science.gov (United States)

    Yun, Dong-Jin; Lee, Seunghyup; Yong, Kijung; Rhee, Shi-Woo

    2012-04-01

    The hafnium silicate and aluminum oxide high-k dielectrics were deposited on stainless steel substrate using atomic layer deposition process and octadecyltrichlorosilane (OTS) and polystyrene (PS) were treated improve crystallinity of pentacene grown on them. Besides, the effects of the pentacene deposition condition on the morphologies, crystallinities and electrical properties of pentacene were characterized. Therefore, the surface treatment condition on dielectric and pentacene deposition conditions were optimized. The pentacene grown on polystyrene coated high-k dielectric at low deposition rate and temperature (0.2-0.3 Å/s and R.T.) showed the largest grain size (0.8-1.0 μm) and highest crystallinity among pentacenes deposited various deposition conditions, and the pentacene TFT with polystyrene coated high-k dielectric showed excellent device-performance. To decrease threshold voltage of pentacene TFT, the polystyrene-thickness on high-k dielectric was controlled using different concentration of polystyrene solution. As the polystyrene-thickness on hafnium silicate decreases, the dielectric constant of polystyrene/hafnium silicate increases, while the crystallinity of pentacene grown on polystyrene/hafnium silicate did not change. Using low-thickness polystyrene coated hafnium silicate dielectric, the high-performance and low voltage operating (pentacene thin film transistor (μ: ~2 cm(2)/(V s), on/off ratio, >1 × 10(4)) and complementary inverter (DC gains, ~20) could be fabricated.

  19. TiN/Al2O3/ZnO gate stack engineering for top-gate thin film transistors by combination of post oxidation and annealing

    Science.gov (United States)

    Kato, Kimihiko; Matsui, Hiroaki; Tabata, Hitoshi; Takenaka, Mitsuru; Takagi, Shinichi

    2018-04-01

    Control of fabrication processes for a gate stack structure with a ZnO thin channel layer and an Al2O3 gate insulator has been examined for enhancing the performance of a top-gate ZnO thin film transistor (TFT). The Al2O3/ZnO interface and the ZnO layer are defective just after the Al2O3 layer formation by atomic layer deposition. Post treatments such as plasma oxidation, annealing after the Al2O3 deposition, and gate metal formation (PMA) are promising to improve the interfacial and channel layer qualities drastically. Post-plasma oxidation effectively reduces the interfacial defect density and eliminates Fermi level pinning at the Al2O3/ZnO interface, which is essential for improving the cut-off of the drain current of TFTs. A thermal effect of post-Al2O3 deposition annealing at 350 °C can improve the crystalline quality of the ZnO layer, enhancing the mobility. On the other hand, impacts of post-Al2O3 deposition annealing and PMA need to be optimized because the annealing can also accompany the increase in the shallow-level defect density and the resulting electron concentration, in addition to the reduction in the deep-level defect density. The development of the interfacial control technique has realized the excellent TFT performance with a large ON/OFF ratio, steep subthreshold characteristics, and high field-effect mobility.

  20. Band Offsets and Interfacial Properties of HfAlO Gate Dielectric Grown on InP by Atomic Layer Deposition.

    Science.gov (United States)

    Yang, Lifeng; Wang, Tao; Zou, Ying; Lu, Hong-Liang

    2017-12-01

    X-ray photoelectron spectroscopy and high-resolution transmission electron microscopy have been used to determine interfacial properties of HfO 2 and HfAlO gate dielectrics grown on InP by atomic layer deposition. An undesirable interfacial InP x O y layer is easily formed at the HfO 2 /InP interface, which can severely degrade the electrical performance. However, an abrupt interface can be achieved when the growth of the HfAlO dielectric on InP starts with an ultrathin Al 2 O 3 layer. The valence and conduction band offsets for HfAlO/InP heterojunctions have been determined to be 1.87 ± 0.1 and 2.83 ± 0.1 eV, respectively. These advantages make HfAlO a potential dielectric for InP MOSFETs.

  1. Poly(4-vinylphenol-co-methyl methacrylate) / titanium dioxide nanocomposite gate insulators for 6,13-bis(triisopropylsilylethynyl)-pentacene thin-film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Xue; Park, Jiho; Baang, Sungkeun; Park, Jaehoon [Hallym University, Chuncheon (Korea, Republic of); Piao, Shanghao; Kim, Sohee; Choi, Hyoungjin [Inha University, Incheon (Korea, Republic of)

    2014-12-15

    Poly(4-vinylphenol-co-methyl methacrylate) / titanium dioxide (TiO{sub 2}) nanocomposite insulators were fabricated for application in 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-Pn) thin-film transistors (TFTs). The capacitance of the fabricated capacitors with this nanocomposite insulator increased with increasing content of the high-dielectric-constant TiO{sub 2} nanoparticles. Nonetheless, particle aggregates, which were invariably produced in the insulator at higher TiO{sub 2} contents, augmented gate-leakage currents during device operation while the rough surface of the insulator obstructed charge transport in the conducting channel of the TIPS-Pn TFTs. These results suggest a significant effect of the morphological characteristics of nanocomposite insulators on TFT performance, as well as on their dielectric properties. Herein, the optimal particle composition was determined to be approximately 1.5 wt%, which contributed to characteristic improvements in the drain current, field-effect mobility, and threshold voltage of TIPS-Pn TFTs.

  2. Kinetically controlled glass transition measurement of organic aerosol thin films using broadband dielectric spectroscopy

    Directory of Open Access Journals (Sweden)

    Y. Zhang

    2018-06-01

    Full Text Available Glass transitions from liquid to semi-solid and solid phase states have important implications for reactivity, growth, and cloud-forming (cloud condensation nuclei and ice nucleation capabilities of secondary organic aerosols (SOAs. The small size and relatively low mass concentration of SOAs in the atmosphere make it difficult to measure atmospheric SOA glass transitions using conventional methods. To circumvent these difficulties, we have adapted a new technique for measuring glass-forming properties of atmospherically relevant organic aerosols. Aerosol particles to be studied are deposited in the form of a thin film onto an interdigitated electrode (IDE using electrostatic precipitation. Dielectric spectroscopy provides dipole relaxation rates for organic aerosols as a function of temperature (373 to 233 K that are used to calculate the glass transition temperatures for several cooling or heating rates. IDE-enabled broadband dielectric spectroscopy (BDS was successfully used to measure the kinetically controlled glass transition temperatures of aerosols consisting of glycerol and four other compounds with selected cooling and heating rates. The glass transition results agree well with available literature data for these five compounds. The results indicate that the IDE-BDS method can provide accurate glass transition data for organic aerosols under atmospheric conditions. The BDS data obtained with the IDE-BDS technique can be used to characterize glass transitions for both simulated and ambient organic aerosols and to model their climate effects.

  3. In-plane microwave dielectric properties of paraelectric barium strontium titanate thin films with anisotropic epitaxy

    Science.gov (United States)

    Simon, W. K.; Akdogan, E. K.; Safari, A.; Bellotti, J. A.

    2005-08-01

    In-plane dielectric properties of ⟨110⟩ oriented epitaxial (Ba0.60Sr0.40)TiO3 thin films in the thickness range from 25-1200nm have been investigated under the influence of anisotropic epitaxial strains from ⟨100⟩ NdGaO3 substrates. The measured dielectric properties show strong residual strain and in-plane directional dependence. Below 150nm film thickness, there appears to be a phase transition due to the anisotropic nature of the misfit strain relaxation. In-plane relative permittivity is found to vary from as much as 500-150 along [11¯0] and [001] respectively, in 600nm thick films, and from 75 to 500 overall. Tunability was found to vary from as much as 54% to 20% in all films and directions, and in a given film the best tunability is observed along the compressed axis in a mixed strain state, 54% along [11¯0] in the 600nm film for example.

  4. Thin-dielectric-layer engineering for 3D nanostructure integration using an innovative planarization approach

    International Nuclear Information System (INIS)

    Guerfi, Y; Doucet, J B; Larrieu, G

    2015-01-01

    Three-dimensional (3D) nanostructures are emerging as promising building blocks for a large spectrum of applications. One critical issue in integration regards mastering the thin, flat, and chemically stable insulating layer that must be implemented on the nanostructure network in order to build striking nano-architectures. In this letter, we report an innovative method for nanoscale planarization on 3D nanostructures by using hydrogen silesquioxane as a spin-on-glass (SOG) dielectric material. To decouple the thickness of the final layer from the height of the nanostructure, we propose to embed the nanowire network in the insulator layer by exploiting the planarizing properties of the SOG approach. To achieve the desired dielectric thickness, the structure is chemically etched back with a highly diluted solution to control the etch rate precisely. The roughness of the top surface was less than 2 nm. There were no surface defects and the planarity was excellent, even in the vicinity of the nanowires. This newly developed process was used to realize a multilevel stack architecture with sub-deca-nanometer-range layer thickness. (paper)

  5. Top-gate hybrid complementary inverters using pentacene and amorphous InGaZnO thin-film transistors with high operational stability

    Directory of Open Access Journals (Sweden)

    J. B. Kim

    2012-03-01

    Full Text Available We report on the operational stability of low-voltage hybrid organic-inorganic complementary inverters with a top-gate bottom source-drain geometry. The inverters are comprised of p-channel pentacene and n-channel amorphous InGaZnO thin-film transistors (TFTs with bi-layer gate dielectrics formed from an amorphous layer of a fluoropolymer (CYTOP and a high-k layer of Al2O3. The p- and n- channel TFTs show saturation mobility values of 0.1 ± 0.01 and 5.0 ± 0.5 cm2/Vs, respectively. The individual transistors show high electrical stability with less than 6% drain-to-source current variations after 1 h direct current (DC bias stress. Complementary inverters yield hysteresis-free voltage transfer characteristics for forward and reverse input biases with static DC gain values larger than 45 V/V at 8 V before and after being subjected to different conditions of electrical stress. Small and reversible variations of the switching threshold voltage of the inverters during these stress tests are compatible with the observed stability of the individual TFTs.

  6. Molecular doping for control of gate bias stress in organic thin film transistors

    Energy Technology Data Exchange (ETDEWEB)

    Hein, Moritz P., E-mail: hein@iapp.de; Lüssem, Björn; Jankowski, Jens; Tietze, Max L.; Riede, Moritz K. [Institut für Angewandte Photophysik, Technische Universität Dresden, George-Bähr-Straße 1, 01069 Dresden (Germany); Zakhidov, Alexander A. [Fraunhofer COMEDD, Maria-Reiche-Str. 2, 01109 Dresden (Germany); Leo, Karl [Institut für Angewandte Photophysik, Technische Universität Dresden, George-Bähr-Straße 1, 01069 Dresden (Germany); Fraunhofer COMEDD, Maria-Reiche-Str. 2, 01109 Dresden (Germany)

    2014-01-06

    The key active devices of future organic electronic circuits are organic thin film transistors (OTFTs). Reliability of OTFTs remains one of the most challenging obstacles to be overcome for broad commercial applications. In particular, bias stress was identified as the key instability under operation for numerous OTFT devices and interfaces. Despite a multitude of experimental observations, a comprehensive mechanism describing this behavior is still missing. Furthermore, controlled methods to overcome these instabilities are so far lacking. Here, we present the approach to control and significantly alleviate the bias stress effect by using molecular doping at low concentrations. For pentacene and silicon oxide as gate oxide, we are able to reduce the time constant of degradation by three orders of magnitude. The effect of molecular doping on the bias stress behavior is explained in terms of the shift of Fermi Level and, thus, exponentially reduced proton generation at the pentacene/oxide interface.

  7. Molecular doping for control of gate bias stress in organic thin film transistors

    International Nuclear Information System (INIS)

    Hein, Moritz P.; Lüssem, Björn; Jankowski, Jens; Tietze, Max L.; Riede, Moritz K.; Zakhidov, Alexander A.; Leo, Karl

    2014-01-01

    The key active devices of future organic electronic circuits are organic thin film transistors (OTFTs). Reliability of OTFTs remains one of the most challenging obstacles to be overcome for broad commercial applications. In particular, bias stress was identified as the key instability under operation for numerous OTFT devices and interfaces. Despite a multitude of experimental observations, a comprehensive mechanism describing this behavior is still missing. Furthermore, controlled methods to overcome these instabilities are so far lacking. Here, we present the approach to control and significantly alleviate the bias stress effect by using molecular doping at low concentrations. For pentacene and silicon oxide as gate oxide, we are able to reduce the time constant of degradation by three orders of magnitude. The effect of molecular doping on the bias stress behavior is explained in terms of the shift of Fermi Level and, thus, exponentially reduced proton generation at the pentacene/oxide interface

  8. Flexible suspended gate organic thin-film transistors for ultra-sensitive pressure detection

    Science.gov (United States)

    Zang, Yaping; Zhang, Fengjiao; Huang, Dazhen; Gao, Xike; di, Chong-An; Zhu, Daoben

    2015-03-01

    The utilization of organic devices as pressure-sensing elements in artificial intelligence and healthcare applications represents a fascinating opportunity for the next-generation electronic products. To satisfy the critical requirements of these promising applications, the low-cost construction of large-area ultra-sensitive organic pressure devices with outstanding flexibility is highly desired. Here we present flexible suspended gate organic thin-film transistors (SGOTFTs) as a model platform that enables ultra-sensitive pressure detection. More importantly, the unique device geometry of SGOTFTs allows the fine-tuning of their sensitivity by the suspended gate. An unprecedented sensitivity of 192 kPa-1, a low limit-of-detection pressure of <0.5 Pa and a short response time of 10 ms were successfully realized, allowing the real-time detection of acoustic waves. These excellent sensing properties of SGOTFTs, together with their advantages of facile large-area fabrication and versatility in detecting various pressure signals, make SGOTFTs a powerful strategy for spatial pressure mapping in practical applications.

  9. Electrical characteristics of top contact pentacene organic thin film

    Indian Academy of Sciences (India)

    Organic thin film transistors (OTFTs) were fabricated using pentacene as the active layer with two different gate dielectrics, namely SiO2 and poly(methyl methacrylate) (PMMA), in top contact geometry for comparative studies. OTFTs with SiO2 as dielectric and gold deposited on the rough side of highly doped silicon (n+ -Si) ...

  10. Periodicity effects on compound waves guided by a thin metal slab sandwiched between two periodically nonhomogeneous dielectric materials

    Science.gov (United States)

    Chiadini, Francesco; Fiumara, Vincenzo; Scaglione, Antonio; Lakhtakia, Akhlesh

    2017-10-01

    Surface-plasmon-polariton waves can be compounded when a sufficiently thin metal layer is sandwiched between two half spaces filled with dissimilar periodically nonhomogeneous dielectric materials. We solved the boundary-value problem for compound waves guided by a layer of a homogeneous and isotropic metal sandwiched between a structurally chiral material (SCM) and a periodically multilayered isotropic dielectric (PMLID) material. We found that the periodicities of the PMLID material and the SCM are crucial to excite a multiplicity of compound guided waves arising from strong coupling between the two interfaces.

  11. The relationship between chemical structure and dielectric properties of plasma-enhanced chemical vapor deposited polymer thin films

    Energy Technology Data Exchange (ETDEWEB)

    Jiang Hao [Materials Sci and Tech Applications, LLC, 409 Maple Springs Drive, Dayton OH 45458 (United States)]. E-mail: hao.jiang@wpafb.af.mil; Hong Lianggou [Materials Sci and Tech Applications, LLC, 409 Maple Springs Drive, Dayton OH 45458 (United States); Venkatasubramanian, N. [Research Institute, University of Dayton, 300 College Park, Dayton, OH 45469-0168 (United States); Grant, John T. [Research Institute, University of Dayton, 300 College Park, Dayton, OH 45469-0168 (United States); Eyink, Kurt [Air Force Research Laboratory, Materials Directorate, 3005 Hobson Way, Wright-Patterson Air Force Base, OH 45433-7707 (United States); Wiacek, Kevin [Air Force Research Laboratory, Propulsion Directorate, 1950 Fifth Street, Wright-Patterson Air Force Base, OH 45433-7251 (United States); Fries-Carr, Sandra [Air Force Research Laboratory, Propulsion Directorate, 1950 Fifth Street, Wright-Patterson Air Force Base, OH 45433-7251 (United States); Enlow, Jesse [Air Force Research Laboratory, Materials Directorate, 3005 Hobson Way, Wright-Patterson Air Force Base, OH 45433-7707 (United States); Bunning, Timothy J. [Air Force Research Laboratory, Materials Directorate, 3005 Hobson Way, Wright-Patterson Air Force Base, OH 45433-7707 (United States)

    2007-02-26

    Polymer dielectric films fabricated by plasma enhanced chemical vapor deposition (PECVD) have unique properties due to their dense crosslinked bulk structure. These spatially uniform films exhibit good adhesion to a variety of substrates, excellent chemical inertness, high thermal resistance, and are formed from an inexpensive, solvent-free, room temperature process. In this work, we studied the dielectric properties of plasma polymerized (PP) carbon-based polymer thin films prepared from two precursors, benzene and octafluorocyclobutane. Two different monomer feed locations, directly in the plasma zone or in the downstream region (DS) and two different pressures, 80 Pa (high pressure) or 6.7 Pa (low pressure), were used. The chemical structure of the PECVD films was examined by X-ray photoelectron spectroscopy and Fourier-transform infrared spectroscopy. The dielectric constant ({epsilon} {sub r}) and dielectric loss (tan {delta}) of the films were investigated over a range of frequencies up to 1 MHz and the dielectric strength (breakdown voltage) (F {sub b}) was characterized by the current-voltage method. Spectroscopic ellipsometry was performed to determine the film thickness and refractive index. Good dielectric properties were exhibited, as PP-benzene films formed in the high pressure, DS region showed a F{sub b} of 610 V/{mu}m, an {epsilon} {sub r} of 3.07, and a tan {delta} of 7.0 x 10{sup -3} at 1 kHz. The PECVD processing pressure has a significant effect on final film structure and the film's physical density has a strong impact on dielectric breakdown strength. Also noted was that the residual oxygen content in the PP-benzene films significantly affected the frequency dependences of the dielectric constant and loss.

  12. The relationship between chemical structure and dielectric properties of plasma-enhanced chemical vapor deposited polymer thin films

    International Nuclear Information System (INIS)

    Jiang Hao; Hong Lianggou; Venkatasubramanian, N.; Grant, John T.; Eyink, Kurt; Wiacek, Kevin; Fries-Carr, Sandra; Enlow, Jesse; Bunning, Timothy J.

    2007-01-01

    Polymer dielectric films fabricated by plasma enhanced chemical vapor deposition (PECVD) have unique properties due to their dense crosslinked bulk structure. These spatially uniform films exhibit good adhesion to a variety of substrates, excellent chemical inertness, high thermal resistance, and are formed from an inexpensive, solvent-free, room temperature process. In this work, we studied the dielectric properties of plasma polymerized (PP) carbon-based polymer thin films prepared from two precursors, benzene and octafluorocyclobutane. Two different monomer feed locations, directly in the plasma zone or in the downstream region (DS) and two different pressures, 80 Pa (high pressure) or 6.7 Pa (low pressure), were used. The chemical structure of the PECVD films was examined by X-ray photoelectron spectroscopy and Fourier-transform infrared spectroscopy. The dielectric constant (ε r ) and dielectric loss (tan δ) of the films were investigated over a range of frequencies up to 1 MHz and the dielectric strength (breakdown voltage) (F b ) was characterized by the current-voltage method. Spectroscopic ellipsometry was performed to determine the film thickness and refractive index. Good dielectric properties were exhibited, as PP-benzene films formed in the high pressure, DS region showed a F b of 610 V/μm, an ε r of 3.07, and a tan δ of 7.0 x 10 -3 at 1 kHz. The PECVD processing pressure has a significant effect on final film structure and the film's physical density has a strong impact on dielectric breakdown strength. Also noted was that the residual oxygen content in the PP-benzene films significantly affected the frequency dependences of the dielectric constant and loss

  13. All-metallic electrically gated 2H-TaSe2 thin-film switches and logic circuits

    International Nuclear Information System (INIS)

    Renteria, J.; Jiang, C.; Yan, Z.; Samnakay, R.; Goli, P.; Pope, T. R.; Salguero, T. T.; Wickramaratne, D.; Lake, R. K.; Khitun, A. G.; Balandin, A. A.

    2014-01-01

    We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe 2 were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe 2 –Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials

  14. All-metallic electrically gated 2H-TaSe2 thin-film switches and logic circuits

    Science.gov (United States)

    Renteria, J.; Samnakay, R.; Jiang, C.; Pope, T. R.; Goli, P.; Yan, Z.; Wickramaratne, D.; Salguero, T. T.; Khitun, A. G.; Lake, R. K.; Balandin, A. A.

    2014-01-01

    We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe2 were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe2-Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials.

  15. All-metallic electrically gated 2H-TaSe{sub 2} thin-film switches and logic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Renteria, J.; Jiang, C.; Yan, Z. [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Samnakay, R.; Goli, P. [Materials Science and Engineering Program, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Pope, T. R.; Salguero, T. T. [Department of Chemistry, University of Georgia, Athens, Georgia 30602 (United States); Wickramaratne, D.; Lake, R. K. [Laboratory for Terascale and Terahertz Electronics, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Khitun, A. G. [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Materials Science and Engineering Program, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Balandin, A. A., E-mail: balandin@ee.ucr.edu [Nano-Device Laboratory, Department of Electrical Engineering, Bourns College of Engineering, University of California–Riverside, Riverside, California 92521 (United States); Department of Chemistry, University of Georgia, Athens, Georgia 30602 (United States)

    2014-01-21

    We report the fabrication and performance of all-metallic three-terminal devices with tantalum diselenide thin-film conducting channels. For this proof-of-concept demonstration, the layers of 2H-TaSe{sub 2} were exfoliated mechanically from single crystals grown by the chemical vapor transport method. Devices with nanometer-scale thicknesses exhibit strongly non-linear current-voltage characteristics, unusual optical response, and electrical gating at room temperature. We have found that the drain-source current in thin-film 2H-TaSe{sub 2}–Ti/Au devices reproducibly shows an abrupt transition from a highly resistive to a conductive state, with the threshold tunable via the gate voltage. Such current-voltage characteristics can be used, in principle, for implementing radiation-hard all-metallic logic circuits. These results may open new application space for thin films of van der Waals materials.

  16. Balancing Hole and Electron Conduction in Ambipolar Split-Gate Thin-Film Transistors.

    Science.gov (United States)

    Yoo, Hocheon; Ghittorelli, Matteo; Lee, Dong-Kyu; Smits, Edsger C P; Gelinck, Gerwin H; Ahn, Hyungju; Lee, Han-Koo; Torricelli, Fabrizio; Kim, Jae-Joon

    2017-07-10

    Complementary organic electronics is a key enabling technology for the development of new applications including smart ubiquitous sensors, wearable electronics, and healthcare devices. High-performance, high-functionality and reliable complementary circuits require n- and p-type thin-film transistors with balanced characteristics. Recent advancements in ambipolar organic transistors in terms of semiconductor and device engineering demonstrate the great potential of this route but, unfortunately, the actual development of ambipolar organic complementary electronics is currently hampered by the uneven electron (n-type) and hole (p-type) conduction in ambipolar organic transistors. Here we show ambipolar organic thin-film transistors with balanced n-type and p-type operation. By manipulating air exposure and vacuum annealing conditions, we show that well-balanced electron and hole transport properties can be easily obtained. The method is used to control hole and electron conductions in split-gate transistors based on a solution-processed donor-acceptor semiconducting polymer. Complementary logic inverters with balanced charging and discharging characteristics are demonstrated. These findings may open up new opportunities for the rational design of complementary electronics based on ambipolar organic transistors.

  17. Effects of Y incorporation in TaON gate dielectric on electrical performance of GaAs metal-oxide-semiconductor capacitor

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Li Ning; Choi, Hoi Wai; Lai, Pui To [Department of Electrical and Electronic Engineering, The University of Hong Kong (China); Xu, Jing Ping [School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan (China)

    2016-09-15

    In this study, GaAs metal-oxide-semiconductor (MOS) capacitors using Y-incorporated TaON as gate dielectric have been investigated. Experimental results show that the sample with a Y/(Y + Ta) atomic ratio of 27.6% exhibits the best device characteristics: high k value (22.9), low interfacestate density (9.0 x 10{sup 11} cm{sup -2} eV{sup -1}), small flatband voltage (1.05 V), small frequency dispersion and low gate leakage current (1.3 x 10{sup -5}A/cm{sup 2} at V{sub fb} + 1 V). These merits should be attributed to the complementary properties of Y{sub 2}O{sub 3} and Ta{sub 2}O{sub 5}:Y can effectively passivate the large amount of oxygen vacancies in Ta{sub 2}O{sub 5}, while the positively-charged oxygen vacancies in Ta{sub 2}O{sub 5} are capable of neutralizing the effects of the negative oxide charges in Y{sub 2}O{sub 3}. This work demonstrates that an appropriate doping of Y content in TaON gate dielectric can effectively improve the electrical performance for GaAs MOS devices. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  18. Relaxorlike dielectric behavior in Ba0.7Sr0.3TiO3 thin films

    Science.gov (United States)

    Zednik, Ricardo J.; McIntyre, Paul C.; Baniecki, John D.; Ishii, Masatoshi; Shioga, Takeshi; Kurihara, Kazuaki

    2007-03-01

    We present the results of a systematic dielectric study for sputter deposited barium strontium titanate thin film planar capacitors measured over a wide temperature range of 20-575K for frequencies between 1kHz and 1MHz. Our observations of dielectric loss peaks in the temperature and frequency domains cannot be understood in the typical framework of intrinsic phonon losses. We find that the accepted phenomenological Curie-von Schweidler dielectric behavior (universal relaxation law) in our barium strontium titanate films is only applicable over a narrow temperature range. An excellent fit to the Vogel-Fulcher expression suggests relaxorlike behavior in these films. The activation energy of the observed phenomenon suggests that oxygen ion motion play a role in the apparent relaxor behavior, although further experimental work is required to test this hypothesis.

  19. Stable dielectric response of low-loss aromatic polythiourea thin films on Pt/SiO2 substrate

    Directory of Open Access Journals (Sweden)

    A. Eršte

    2016-03-01

    Full Text Available We have investigated dielectric properties of aromatic polythiourea (ArPTU, a polar polymer containing high dipolar moments with very low defect levels thin films that were developed on Pt/SiO2 substrate. The detected response is compared to the response of commercially available polymers, such as high density polyethylene (HDPE and polypropylene (PP, which are at present used in foil capacitors. Stable values of the dielectric constant ε′≈5 (being twice higher than in HDPE and PP over broad temperature and frequency ranges and dielectric losses as low as in commercial systems suggest ArPTU as a promising candidate for future use in a variety of applications.

  20. Solid-State Densification of Spun-Cast Self-Assembled Monolayers for Use in Ultra-Thin Hybrid Dielectrics.

    Science.gov (United States)

    Hutchins, Daniel O; Acton, Orb; Weidner, Tobias; Cernetic, Nathan; Baio, Joe E; Castner, David G; Ma, Hong; Jen, Alex K-Y

    2012-11-15

    Ultra-thin self-assembled monolayer (SAM)-oxide hybrid dielectrics have gained significant interest for their application in low-voltage organic thin film transistors (OTFTs). A [8-(11-phenoxy-undecyloxy)-octyl]phosphonic acid (PhO-19-PA) SAM on ultrathin AlO x (2.5 nm) has been developed to significantly enhance the dielectric performance of inorganic oxides through reduction of leakage current while maintaining similar capacitance to the underlying oxide structure. Rapid processing of this SAM in ambient conditions is achieved by spin coating, however, as-cast monolayer density is not sufficient for dielectric applications. Thermal annealing of a bulk spun-cast PhO-19-PA molecular film is explored as a mechanism for SAM densification. SAM density, or surface coverage, and order are examined as a function of annealing temperature. These SAM characteristics are probed through atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), and near edge X-ray absorption fine structure spectroscopy (NEXAFS). It is found that at temperatures sufficient to melt the as-cast bulk molecular film, SAM densification is achieved; leading to a rapid processing technique for high performance SAM-oxide hybrid dielectric systems utilizing a single wet processing step. To demonstrate low-voltage devices based on this hybrid dielectric (with leakage current density of 7.7×10 -8 A cm -2 and capacitance density of 0.62 µF cm -2 at 3 V), pentacene thin-film transistors (OTFTs) are fabricated and yield sub 2 V operation and charge carrier mobilites of up to 1.1 cm 2 V -1 s -1 .

  1. Thermal strain-induced dielectric anisotropy in Ba0.7Sr0.3TiO3 thin films grown on silicon-based substrates

    International Nuclear Information System (INIS)

    Zhu, X. H.; Defaye, E.; Aied, M.; Guigues, B.; Dubarry, C.

    2009-01-01

    Dielectric properties of Ba 0.7 Sr 0.3 TiO 3 (BST) thin films, which were prepared on silicon-based substrates by ion beam sputtering and postdeposition annealing method, were systematically investigated in different electrode configurations of metal-insulator-metal and coplanar interdigital capacitors. It was found that a large dielectric anisotropy exists in the films with better in-plane dielectric properties (higher dielectric permittivity and tunability) than those along the out-of-plane direction. The observed anisotropic dielectric responses are explained qualitatively in terms of a thermal strain effect that is related to dissimilar film strains along the in-plane and out-of-plane directions. Another reason for the dielectric anisotropy is due to different influences of the interfacial low-dielectric layer between the BST film and the substrate (metal electrode).

  2. Thermal strain-induced dielectric anisotropy in Ba0.7Sr0.3TiO3 thin films grown on silicon-based substrates

    Science.gov (United States)

    Zhu, X. H.; Guigues, B.; Defaÿ, E.; Dubarry, C.; Aïd, M.

    2009-07-01

    Dielectric properties of Ba0.7Sr0.3TiO3 (BST) thin films, which were prepared on silicon-based substrates by ion beam sputtering and postdeposition annealing method, were systematically investigated in different electrode configurations of metal-insulator-metal and coplanar interdigital capacitors. It was found that a large dielectric anisotropy exists in the films with better in-plane dielectric properties (higher dielectric permittivity and tunability) than those along the out-of-plane direction. The observed anisotropic dielectric responses are explained qualitatively in terms of a thermal strain effect that is related to dissimilar film strains along the in-plane and out-of-plane directions. Another reason for the dielectric anisotropy is due to different influences of the interfacial low-dielectric layer between the BST film and the substrate (metal electrode).

  3. Comparison of gate dielectric plasma damage from plasma-enhanced atomic layer deposited and magnetron sputtered TiN metal gates

    Energy Technology Data Exchange (ETDEWEB)

    Brennan, Christopher J.; Neumann, Christopher M.; Vitale, Steven A., E-mail: steven.vitale@ll.mit.edu [Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, Massachusetts 02420 (United States)

    2015-07-28

    Fully depleted silicon-on-insulator transistors were fabricated using two different metal gate deposition mechanisms to compare plasma damage effects on gate oxide quality. Devices fabricated with both plasma-enhanced atomic-layer-deposited (PE-ALD) TiN gates and magnetron plasma sputtered TiN gates showed very good electrostatics and short-channel characteristics. However, the gate oxide quality was markedly better for PE-ALD TiN. A significant reduction in interface state density was inferred from capacitance-voltage measurements as well as a 1200× reduction in gate leakage current. A high-power magnetron plasma source produces a much higher energetic ion and vacuum ultra-violet (VUV) photon flux to the wafer compared to a low-power inductively coupled PE-ALD source. The ion and VUV photons produce defect states in the bulk of the gate oxide as well as at the oxide-silicon interface, causing higher leakage and potential reliability degradation.

  4. Effects of the gate dielectric on the subthreshold transport of carbon nanotube network transistors grown by using plasma-enhanced chemical vapor deposition

    International Nuclear Information System (INIS)

    Jeong, Seung Geun; Park, Wan Jun

    2010-01-01

    In this study, we investigated the subthreshold slope of random network carbon nanotube transistors with different geometries and passivations. Single-wall carbon nanotubes with lengths of 1-2 m were grown by using plasma-enhanced chemical vapor deposition to form the transistor channels. A critical channel length, where the subthreshold slope was saturated, of 7 μm was obtained. This was due to the percolational behavior of the nanotube random networks. With the dielectric passivation, the subthreshold slope was dramatically reduced from 9 V/decade to 0.9 V/decade by reducing interfacial trap sites, which then reduced the interface capacitance between the nanotube network and the gate dielectric.

  5. Comparison of neat and photo-crosslinked polyvinylidene fluoride-co-hexafluoropropylene thin film dielectrics formed by spin-coating

    International Nuclear Information System (INIS)

    Iyore, O.D.; Roodenko, K.; Winkler, P.S.; Noriega, J.R.; Vasselli, J.J.; Chabal, Y.J.; Gnade, B.E.

    2013-01-01

    We report the characterization of photo-crosslinked polyvinylidene fluoride-co-hexafluoropropylene (PVDF-HFP) thin film, metal–insulator–metal capacitors fabricated using standard semiconductor processing techniques. We characterize the capacitors using in-situ vibrational spectroscopy during thermally-assisted poling and correlate the Fourier transform infrared spectroscopy (FTIR) results with X-ray diffraction (XRD) results. FTIR analysis of the neat PVDF-HFP showed α → β transformations during poling at room temperature and at 55 °C. α → β transformations were observed for the crosslinked polymer only during poling at 55 °C. XRD data revealed that photo-crosslinking caused the polymer to partially crystallize into the β-phase. The similar behavior of the neat and crosslinked samples at 55 °C suggests that a higher activation energy was needed for α → β transformations in crosslinked PVDF-HFP during poling. Electrical measurements showed that photo-crosslinking had no significant effect on the dielectric constant and dielectric loss of PVDF-HFP. However, the dielectric strength and maximum energy density of the crosslinked polymer were severely reduced. - Highlights: • Polyvinylidene fluoride-hexafluoropropylene (PVDF-HFP) dielectrics were studied. • Phase transformations were observed only at 55 °C for the crosslinked PVDF-HFP. • Crosslinking had no strong effect on the dielectric constant of PVDF-HFP. • Breakdown strengths were 620 MVm −1 and 362 MVm −1 for neat and crosslinked films

  6. Comparison of neat and photo-crosslinked polyvinylidene fluoride-co-hexafluoropropylene thin film dielectrics formed by spin-coating

    Energy Technology Data Exchange (ETDEWEB)

    Iyore, O.D.; Roodenko, K.; Winkler, P.S. [Materials Science and Engineering Department, The University of Texas at Dallas, Richardson, TX 75080 (United States); Noriega, J.R.; Vasselli, J.J. [Electrical Engineering Department, The University of Texas at Tyler, Tyler, TX 75799 (United States); Chabal, Y.J. [Materials Science and Engineering Department, The University of Texas at Dallas, Richardson, TX 75080 (United States); Gnade, B.E., E-mail: gnade@utdallas.edu [Materials Science and Engineering Department, The University of Texas at Dallas, Richardson, TX 75080 (United States)

    2013-12-02

    We report the characterization of photo-crosslinked polyvinylidene fluoride-co-hexafluoropropylene (PVDF-HFP) thin film, metal–insulator–metal capacitors fabricated using standard semiconductor processing techniques. We characterize the capacitors using in-situ vibrational spectroscopy during thermally-assisted poling and correlate the Fourier transform infrared spectroscopy (FTIR) results with X-ray diffraction (XRD) results. FTIR analysis of the neat PVDF-HFP showed α → β transformations during poling at room temperature and at 55 °C. α → β transformations were observed for the crosslinked polymer only during poling at 55 °C. XRD data revealed that photo-crosslinking caused the polymer to partially crystallize into the β-phase. The similar behavior of the neat and crosslinked samples at 55 °C suggests that a higher activation energy was needed for α → β transformations in crosslinked PVDF-HFP during poling. Electrical measurements showed that photo-crosslinking had no significant effect on the dielectric constant and dielectric loss of PVDF-HFP. However, the dielectric strength and maximum energy density of the crosslinked polymer were severely reduced. - Highlights: • Polyvinylidene fluoride-hexafluoropropylene (PVDF-HFP) dielectrics were studied. • Phase transformations were observed only at 55 °C for the crosslinked PVDF-HFP. • Crosslinking had no strong effect on the dielectric constant of PVDF-HFP. • Breakdown strengths were 620 MVm{sup −1} and 362 MVm{sup −1} for neat and crosslinked films.

  7. Adsorption and electronic properties of pentacene on thin dielectric decoupling layers

    Directory of Open Access Journals (Sweden)

    Sebastian Koslowski

    2017-07-01

    Full Text Available With the increasing use of thin dielectric decoupling layers to study the electronic properties of organic molecules on metal surfaces, comparative studies are needed in order to generalize findings and formulate practical rules. In this paper we study the adsorption and electronic properties of pentacene deposited onto h-BN/Rh(111 and compare them with those of pentacene deposited onto KCl on various metal surfaces. When deposited onto KCl, the HOMO and LUMO energies of the pentacene molecules scale with the work functions of the combined KCl/metal surface. The magnitude of the variation between the respective KCl/metal systems indicates the degree of interaction of the frontier orbitals with the underlying metal. The results confirm that the so-called IDIS model developed by Willenbockel et al. applies not only to molecular layers on bare metal surfaces, but also to individual molecules on thin electronically decoupling layers. Depositing pentacene onto h-BN/Rh(111 results in significantly different adsorption characteristics, due to the topographic corrugation of the surface as well as the lateral electric fields it presents. These properties are reflected in the divergence from the aforementioned trend for the orbital energies of pentacene deposited onto h-BN/Rh(111, as well as in the different adsorption geometry. Thus, the highly desirable capacity of h-BN to trap molecules comes at the price of enhanced metal–molecule interaction, which decreases the HOMO–LUMO gap of the molecules. In spite of the enhanced interaction, the molecular orbitals are evident in scanning tunnelling spectroscopy (STS and their shapes can be resolved by spectroscopic mapping.

  8. Adsorption and electronic properties of pentacene on thin dielectric decoupling layers.

    Science.gov (United States)

    Koslowski, Sebastian; Rosenblatt, Daniel; Kabakchiev, Alexander; Kuhnke, Klaus; Kern, Klaus; Schlickum, Uta

    2017-01-01

    With the increasing use of thin dielectric decoupling layers to study the electronic properties of organic molecules on metal surfaces, comparative studies are needed in order to generalize findings and formulate practical rules. In this paper we study the adsorption and electronic properties of pentacene deposited onto h-BN/Rh(111) and compare them with those of pentacene deposited onto KCl on various metal surfaces. When deposited onto KCl, the HOMO and LUMO energies of the pentacene molecules scale with the work functions of the combined KCl/metal surface. The magnitude of the variation between the respective KCl/metal systems indicates the degree of interaction of the frontier orbitals with the underlying metal. The results confirm that the so-called IDIS model developed by Willenbockel et al. applies not only to molecular layers on bare metal surfaces, but also to individual molecules on thin electronically decoupling layers. Depositing pentacene onto h-BN/Rh(111) results in significantly different adsorption characteristics, due to the topographic corrugation of the surface as well as the lateral electric fields it presents. These properties are reflected in the divergence from the aforementioned trend for the orbital energies of pentacene deposited onto h-BN/Rh(111), as well as in the different adsorption geometry. Thus, the highly desirable capacity of h-BN to trap molecules comes at the price of enhanced metal-molecule interaction, which decreases the HOMO-LUMO gap of the molecules. In spite of the enhanced interaction, the molecular orbitals are evident in scanning tunnelling spectroscopy (STS) and their shapes can be resolved by spectroscopic mapping.

  9. An EELS sub-nanometer investigation of the dielectric gate stack for the realization of InGaAs based MOSFET devices

    International Nuclear Information System (INIS)

    Longo, P; Paterson, G W; Craven, A J; Holland, M C; Thayne, I G

    2010-01-01

    In this paper, a subnanometer investigation of the Ga 2 O 3 /GdGaO dielectric gate stack deposited onto InGaAs is presented. Results regarding the influence of the growth conditions on the interface region from a chemical and morphological point of view are presented. The chemical information reported in this paper has been obtained using electron energy loss spectroscopy (EELS) that was carried out in a scanning transmission electron microscope ((S)TEM) showing both spatial and depth resolution.

  10. Atomic Layer Deposited Thin Films for Dielectrics, Semiconductor Passivation, and Solid Oxide Fuel Cells

    Science.gov (United States)

    Xu, Runshen

    Atomic layer deposition (ALD) utilizes sequential precursor gas pulses to deposit one monolayer or sub-monolayer of material per cycle based on its self-limiting surface reaction, which offers advantages, such as precise thickness control, thickness uniformity, and conformality. ALD is a powerful means of fabricating nanoscale features in future nanoelectronics, such as contemporary sub-45 nm metal-oxide-semiconductor field effect transistors, photovoltaic cells, near- and far-infrared detectors, and intermediate temperature solid oxide fuel cells. High dielectric constant, kappa, materials have been recognized to be promising candidates to replace traditional SiO2 and SiON, because they enable good scalability of sub-45 nm MOSFET (metal-oxide-semiconductor field-effect transistor) without inducing additional power consumption and heat dissipation. In addition to high dielectric constant, high-kappa materials must meet a number of other requirements, such as low leakage current, high mobility, good thermal and structure stability with Si to withstand high-temperature source-drain activation annealing. In this thesis, atomic layer deposited Er2O3 doped TiO2 is studied and proposed as a thermally stable amorphous high-kappa dielectric on Si substrate. The stabilization of TiO2 in its amorphous state is found to achieve a high permittivity of 36, a hysteresis voltage of less than 10 mV, and a low leakage current density of 10-8 A/cm-2 at -1 MV/cm. In III-V semiconductors, issues including unsatisfied dangling bonds and native oxides often result in inferior surface quality that yields non-negligible leakage currents and degrades the long-term performance of devices. The traditional means for passivating the surface of III-V semiconductors are based on the use of sulfide solutions; however, that only offers good protection against oxidation for a short-term (i.e., one day). In this work, in order to improve the chemical passivation efficacy of III-V semiconductors

  11. Dielectric properties of Li doped Li-Nb-O thin films

    Energy Technology Data Exchange (ETDEWEB)

    Perentzis, G.; Horopanitis, E.E.; Papadimitriou, L. [Aristotle University of Thessaloniki, Department of Physics, 54124 Thessaloniki (Greece); Durman, V.; Saly, V.; Packa, J. [Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Ilkovicova 3, 81219 Bratislava (Slovakia)

    2007-03-15

    Lithium niobate LiNbO{sub 3} was prepared as a thin film layered structure deposited on stainless steel substrate using e-gun evaporation. The Li doping was provided for by the formation of Li-Nb-O/Li/LiNb-O sandwich structure and annealing at about 250 C. AC impedance spectroscopy measurements were performed on the samples at temperatures from the interval between 28 and 165 C and in a frequency range of 10{sup -3} to 10{sup 6} Hz. Using the values Z' and Z'' at different frequencies, the dielectric parameters - parts of the complex permittivity {epsilon}' and {epsilon}'' and loss tangent tan {delta} were calculated. The results prove validity of the proposed equivalent circuit containing parallel RC elements connected in series where the first RC element represents the bulk of material and the second RC element belongs to the double layer at the metal interface. (copyright 2007 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  12. Improvement of dielectric properties of BLT thin films deposited by magnetron sputtering

    Energy Technology Data Exchange (ETDEWEB)

    Besland, M P; Barroy, P R J; Richard-Plouet, M; Tessier, P Y; Brohan, L; Djouadi, M A [Universite de Nantes - Institut des Materiaux Jean Rouxel, UMR CNRS 6502, 2, rue de la Houssiniere BP32229, 44322 Nantes Cedex (France); Borderon, C; Tacon, S Le; Averty, D; Gundel, H W [Institut de Recherche en Electrotechnique et Electronique de Nantes Atlantique, UPRES-EA 1770, IREENA, Universite de Nantes, 2, rue de la Houssiniere, BP 92208, 44322 Nantes Cedex (France)], E-mail: Marie-Paule.Besland@cnrs-imn.fr

    2008-01-15

    Well crystallized BLT thin films were deposited by RF magnetron sputtering using a target of Aurivillius phase Bi{sub 3.25}La{sub 0.75}Ti{sub 3}O{sub 12}(BLT{sub 0,75}), elaborated in our institute. RF sputtering experiments were performed at room temperature with an argon/oxygen mixture, in a pressure range of 20-50 mTorr. Optimisation of the plasma parameters, namely deposition pressure, RF power and oxygen content in the gas phase, allows obtaining BLT films with a chemical composition close to Bi{sub 3.25}La{sub 0.75}Ti{sub 3}O{sub 12}. After ex-situ annealing under oxygen atmosphere at 650 deg. C, BLT films deposited on Pt/TiO{sub 2}/SiO{sub 2}/Si (multilayer) substrates exhibit well defined rod-like grains morphology. A two step deposition process appeared to be necessary in order to reach satisfying dielectric properties. The effect of the plasma parameters on the chemical composition and electrical properties are presented and discussed.

  13. Improvement of dielectric properties of BLT thin films deposited by magnetron sputtering

    International Nuclear Information System (INIS)

    Besland, M P; Barroy, P R J; Richard-Plouet, M; Tessier, P Y; Brohan, L; Djouadi, M A; Borderon, C; Tacon, S Le; Averty, D; Gundel, H W

    2008-01-01

    Well crystallized BLT thin films were deposited by RF magnetron sputtering using a target of Aurivillius phase Bi 3.25 La 0.75 Ti 3 O 12 (BLT 0,75 ), elaborated in our institute. RF sputtering experiments were performed at room temperature with an argon/oxygen mixture, in a pressure range of 20-50 mTorr. Optimisation of the plasma parameters, namely deposition pressure, RF power and oxygen content in the gas phase, allows obtaining BLT films with a chemical composition close to Bi 3.25 La 0.75 Ti 3 O 12 . After ex-situ annealing under oxygen atmosphere at 650 deg. C, BLT films deposited on Pt/TiO 2 /SiO 2 /Si (multilayer) substrates exhibit well defined rod-like grains morphology. A two step deposition process appeared to be necessary in order to reach satisfying dielectric properties. The effect of the plasma parameters on the chemical composition and electrical properties are presented and discussed

  14. Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process

    International Nuclear Information System (INIS)

    Wang Yan-Rong; Yang Hong; Xu Hao; Wang Xiao-Lei; Luo Wei-Chun; Qi Lu-Wei; Zhang Shu-Xiang; Wang Wen-Wu; Yan Jiang; Zhu Hui-Long; Zhao Chao; Chen Da-Peng; Ye Tian-Chun

    2015-01-01

    A multi-deposition multi-annealing technique (MDMA) is introduced into the process of high-k/metal gate MOSFET for the gate last process to effectively reduce the gate leakage and improve the device’s performance. In this paper, we systematically investigate the electrical parameters and the time-dependent dielectric breakdown (TDDB) characteristics of positive channel metal oxide semiconductor (PMOS) under different MDMA process conditions, including the deposition/annealing (D and A) cycles, the D and A time, and the total annealing time. The results show that the increases of the number of D and A cycles (from 1 to 2) and D and A time (from 15 s to 30 s) can contribute to the results that the gate leakage current decreases by about one order of magnitude and that the time to fail (TTF) at 63.2% increases by about several times. However, too many D and A cycles (such as 4 cycles) make the equivalent oxide thickness (EOT) increase by about 1 Å and the TTF of PMOS worsen. Moreover, different D and A times and numbers of D and A cycles induce different breakdown mechanisms. (paper)

  15. High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

    Science.gov (United States)

    Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

    2012-08-01

    A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

  16. Indium-gallium-zinc-oxide thin-film transistor with a planar split dual-gate structure

    Science.gov (United States)

    Liu, Yu-Rong; Liu, Jie; Song, Jia-Qi; Lai, Pui-To; Yao, Ruo-He

    2017-12-01

    An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) with a planar split dual gate (PSDG) structure has been proposed, fabricated and characterized. Experimental results indicate that the two independent gates can provide dynamical control of device characteristics such as threshold voltage, sub-threshold swing, off-state current and saturation current. The transconductance extracted from the output characteristics of the device increases from 4.0 × 10-6S to 1.6 × 10-5S for a change of control gate voltage from -2 V to 2 V, and thus the device could be used in a variable-gain amplifier. A significant advantage of the PSDG structure is its flexibility in controlling the device performance according to the need of practical applications.

  17. Low operating voltage InGaZnO thin-film transistors based on Al{sub 2}O{sub 3} high-k dielectrics fabricated using pulsed laser deposition

    Energy Technology Data Exchange (ETDEWEB)

    Geng, G. Z.; Liu, G. X.; Zhang, Q.; Shan, F. K. [Qingdao University, Qingdao (China); DongEui University, Busan (Korea, Republic of); Lee, W. J.; Shin, B. C. [DongEui University, Busan (Korea, Republic of); Cho, C. R. [Pusan National University, Busan (Korea, Republic of)

    2014-05-15

    Low-voltage-driven amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) with an Al{sub 2}O{sub 3} dielectric were fabricated on a Si substrate by using pulsed laser deposition. Both Al{sub 2}O{sub 3} and IGZO thin films are amorphous, and the thin films have very smooth surfaces. The Al{sub 2}O{sub 3} gate dielectric exhibits a very low leakage current density of 1.3 x 10{sup -8} A/cm{sup 2} at 5 V and a high capacitance density of 60.9 nF/cm{sup 2}. The IGZO TFT with a structure of Ni/IGZO/Al{sub 2}O{sub 3}/Si exhibits high performance with a low threshold voltage of 1.18 V, a high field effect mobility of 20.25 cm{sup 2}V{sup -1}s{sup -1}, an ultra small subthreshold swing of 87 mV/decade, and a high on/off current ratio of 3 x 10{sup 7}.

  18. Investigating degradation behavior of hole-trapping effect under static and dynamic gate-bias stress in a dual gate a-InGaZnO thin film transistor with etch stop layer

    Energy Technology Data Exchange (ETDEWEB)

    Liao, Po-Yung [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Taiwan (China); Hsieh, Tien-Yu [Department of Physics, National Sun Yat-sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Tsai, Ming-Yen; Chen, Bo-Wei; Chu, Ann-Kuo [Department of Photonics, National Sun Yat-Sen University, 70 Lien-hai Road, Kaohsiung 80424, Taiwan (China); Chou, Cheng-Hsu; Chang, Jung-Fang [Product Technology Center, Chimei Innolux Corp., Tainan 741, Taiwan (China)

    2016-03-31

    The degree of degradation between the amorphous-indium–gallium–zinc oxide (a-IGZO) thin film transistor (TFT) using the top-gate only or bottom-gate only is compared. Under negative gate bias illumination stress (NBIS), the threshold voltage (V{sub T}) after bottom-gate NBIS monotonically shifts in the negative direction, whereas top-gate NBIS operation exhibits on-state current increases without V{sub T} shift. Such anomalous degradation behavior of NBIS under top-gate operation is due to hole-trapping in the etch stop layer above the central portion of the channel. These phenomena can be ascribed to the screening of the electric field by redundant source/drain electrodes. In addition, the device degradation of dual gate a-IGZO TFT stressed with different top gate pulse waveforms is investigated. It is observed that the degradation is dependent on the frequency of the top gate pulses. The V{sub T} shift increases with decreasing frequency, indicating the hole mobility of IGZO is low. - Highlights: • Static and dynamic gate bias stresses are imposed on dual gate InGaZnO TFTs. • Top-gate NBIS operation exhibits on-state current increases without VT shift. • The degradation behavior of top-gate NBIS is due to hole-trapping in the ESL. • The degradation is dependent on the frequency of the top gate pulses. • The V{sub T} shift increases with decreasing frequency of the top gate pulses.

  19. Impedance spectroscopic and dielectric analysis of Ba0.7Sr0.3TiO3 thin films

    International Nuclear Information System (INIS)

    Rouahi, A.; Kahouli, A.; Sylvestre, A.; Defaÿ, E.; Yangui, B.

    2012-01-01

    Highlights: ► The material exhibits the contribution of both grain and grain boundaries in the electric response of Ba 0.7 Sr 0.3 TiO 3 . ► The plot of normalized complex dielectric modulus and impedance as a function of frequency exhibits both short and long-range conduction in the film. ► The frequency dependence of ac conductivity exhibits a polaron hopping mechanism with activation energy of 0.38 eV. ► The complex dielectric modulus analysis confirmed the presence of a non-Debye type of conductivity relaxation deduced from the KWW function. - Abstract: Polycrystalline Ba 0.7 Sr 0.3 TiO 3 thin film with Pt/BST/Pt/TiO 2 /SiO 2 structure was prepared by ion beam sputtering. The film was post annealed at 700 °C. The dielectric and electric modulus properties were studied by impedance spectroscopy over a wide frequency range [0.1–10 5 Hz] at different temperatures [175–350 °C]. The Nyquist plots (Z″ vs . Z′) show the contribution of both grain and grain boundaries at higher temperature on the electric response of BST thin films. Moreover, the resistance of grains decreases with the rise in temperature and the material exhibits a negative temperature coefficient of resistance. The electric modulus plot indicates the non-Debye type of dielectric relaxation. The values of the activation energy computed from both plots of Z″ and M″ are 0.86 eV and 0.81 eV respectively, which reveals that the species responsible for conduction are the same. The scaling behavior of M ″ /M ″ max shows the temperature independent nature of relaxation time. The plot of normalized complex dielectric modulus and impedance as a function of frequency exhibits both short and long-range conduction in the film.

  20. Mechanical property changes in porous low-k dielectric thin films during processing

    Energy Technology Data Exchange (ETDEWEB)

    Stan, G., E-mail: gheorghe.stan@nist.gov; Gates, R. S. [Material Measurement Laboratory, National Institute of Standards and Technology, Gaithersburg, Maryland 20899 (United States); Kavuri, P. [Physical Measurement Laboratory, National Institute of Standards and Technology, Gaithersburg, Maryland 20899 (United States); Torres, J.; Michalak, D.; Ege, C.; Bielefeld, J.; King, S. W. [Logic Technology Development, Intel Corporation, Hillsboro, Oregon 97124 (United States)

    2014-10-13

    The design of future generations of Cu-low-k dielectric interconnects with reduced electronic crosstalk often requires engineering materials with an optimal trade off between their dielectric constant and elastic modulus. This is because the benefits associated with the reduction of the dielectric constant by increasing the porosity of materials, for example, can adversely affect their mechanical integrity during processing. By using load-dependent contact-resonance atomic force microscopy, the changes in the elastic modulus of low-k dielectric materials due to processing were accurately measured. These changes were linked to alterations sustained by the structure of low-k dielectric films during processing. A two-phase model was used for quantitative assessments of the elastic modulus changes undergone by the organosilicate skeleton of the structure of porous and pore-filled dielectrics.

  1. Stability Study of Flexible 6,13-Bis(triisopropylsilylethynylpentacene Thin-Film Transistors with a Cross-Linked Poly(4-vinylphenol/Yttrium Oxide Nanocomposite Gate Insulator

    Directory of Open Access Journals (Sweden)

    Jin-Hyuk Kwon

    2016-03-01

    Full Text Available We investigated the electrical and mechanical stability of flexible 6,13-bis(triisopropylsilylehtynylpentacene (TIPS-pentacene thin-film transistors (TFTs that were fabricated on polyimide (PI substrates using cross-linked poly(4-vinylphenol (c-PVP and c-PVP/yttrium oxide (Y2O3 nanocomposite films as gate insulators. Compared with the electrical characteristics of TIPS-pentacene TFTs with c-PVP insulators, the TFTs with c-PVP/Y2O3 nanocomposite insulators exhibited enhancements in the drain current and the threshold voltage due to an increase in the dielectric capacitance. In electrical stability experiments, a gradual decrease in the drain current and a negative shift in the threshold voltage occurred during prolonged bias stress tests, but these characteristic variations were comparable for both types of TFT. On the other hand, the results of mechanical bending tests showed that the characteristic degradation of the TIPS-pentacene TFTs with c-PVP/Y2O3 nanocomposite insulators was more critical than that of the TFTs with c-PVP insulators. In this study, the detrimental effect of the nanocomposite insulator on the mechanical stability of flexible TIPS-pentacene TFTs was found to be caused by physical adhesion of TIPS-pentacene molecules onto the rough surfaces of the c-PVP/Y2O3 nanocomposite insulator. These results indicate that the dielectric and morphological properties of polymeric nanocomposite insulators are significant when considering practical applications of flexible electronics operated at low voltages.

  2. Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

    Directory of Open Access Journals (Sweden)

    Minkyu Chun

    2015-05-01

    Full Text Available We investigated the effects of top gate voltage (VTG and temperature (in the range of 25 to 70 oC on dual-gate (DG back-channel-etched (BCE amorphous-indium-gallium-zinc-oxide (a-IGZO thin film transistors (TFTs characteristics. The increment of VTG from -20V to +20V, decreases the threshold voltage (VTH from 19.6V to 3.8V and increases the electron density to 8.8 x 1018cm−3. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on VTG. At VTG of 20V, the mobility decreases from 19.1 to 15.4 cm2/V ⋅ s with increasing temperature, showing a metallic conduction. On the other hand, at VTG of - 20V, the mobility increases from 6.4 to 7.5cm2/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.

  3. Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

    Energy Technology Data Exchange (ETDEWEB)

    Chun, Minkyu; Chowdhury, Md Delwar Hossain; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 130-701 (Korea, Republic of)

    2015-05-15

    We investigated the effects of top gate voltage (V{sub TG}) and temperature (in the range of 25 to 70 {sup o}C) on dual-gate (DG) back-channel-etched (BCE) amorphous-indium-gallium-zinc-oxide (a-IGZO) thin film transistors (TFTs) characteristics. The increment of V{sub TG} from -20V to +20V, decreases the threshold voltage (V{sub TH}) from 19.6V to 3.8V and increases the electron density to 8.8 x 10{sup 18}cm{sup −3}. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on V{sub TG}. At V{sub TG} of 20V, the mobility decreases from 19.1 to 15.4 cm{sup 2}/V ⋅ s with increasing temperature, showing a metallic conduction. On the other hand, at V{sub TG} of - 20V, the mobility increases from 6.4 to 7.5cm{sup 2}/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.

  4. Influence of stress on the structural and dielectric properties of rf magnetron sputtered zinc oxide thin film

    Science.gov (United States)

    Menon, Rashmi; Sreenivas, K.; Gupta, Vinay

    2008-05-01

    Highly c axis oriented zinc oxide (ZnO) thin films have been prepared on 1737 Corning glass substrate by planar rf magnetron sputtering under varying pressure (10-50mTorr) and different oxygen percentage (40%-100%) in reactive gas mixtures. The as-grown ZnO thin films were found to have stress over a wide range from -6×1010to-9×107dynes/cm2. The presence of stress depends strongly on processing conditions, and films become almost stress free under a unique combination of sputtering pressure and reactive gas composition. The studies show a correlation of stress with structural and electrical properties of the ZnO thin film. The stressed films possess high electrical conductivity and exhibits strong dielectric dispersion over a wide frequency (1kHz-1MHz). The dielectric constant ɛ'(ω) of stress free ZnO film was almost frequency independent and was close to the bulk value. The measured value of dc conductivity, σdc(ω) and ac conductivity σac(ω) of stress free ZnO film was 1.3×10-9 and 6.8×10-5Ω-1cm-1, respectively. The observed variation in the structural and electrical properties of ZnO thin film with stress has been analyzed in the light of growth kinetics.

  5. Low-voltage back-gated atmospheric pressure chemical vapor deposition based graphene-striped channel transistor with high-κ dielectric showing room-temperature mobility > 11 000 cm2/V·s

    KAUST Repository

    Smith, Casey

    2013-07-23

    Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (gm) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-κ gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 μm stripes to repeatedly realize room-temperature mobility of 11 000 cm 2/V·s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low t ox/Wgraphene ratio, and scaled high-κ dielectric gate modulation of carrier density allowing full actuation of the device with only ±1 V applied bias. The superior drive current and conductance at Vdd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance. © 2013 American Chemical Society.

  6. Low-voltage back-gated atmospheric pressure chemical vapor deposition based graphene-striped channel transistor with high-κ dielectric showing room-temperature mobility > 11 000 cm2/V·s

    KAUST Repository

    Smith, Casey; Qaisi, Ramy M.; Liu, Zhihong; Yu, Qingkai; Hussain, Muhammad Mustafa

    2013-01-01

    Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (gm) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-κ gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 μm stripes to repeatedly realize room-temperature mobility of 11 000 cm 2/V·s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low t ox/Wgraphene ratio, and scaled high-κ dielectric gate modulation of carrier density allowing full actuation of the device with only ±1 V applied bias. The superior drive current and conductance at Vdd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance. © 2013 American Chemical Society.

  7. Comparative study on nitridation and oxidation plasma interface treatment for AlGaN/GaN MIS-HEMTs with AlN gate dielectric

    Science.gov (United States)

    Zhu, Jie-Jie; Ma, Xiao-Hua; Hou, Bin; Chen, Li-Xiang; Zhu, Qing; Hao, Yue

    2017-02-01

    This paper demonstrated the comparative study on interface engineering of AlN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) by using plasma interface pre-treatment in various ambient gases. The 15 nm AlN gate dielectric grown by plasma-enhanced atomic layer deposition significantly suppressed the gate leakage current by about two orders of magnitude and increased the peak field-effect mobility by more than 50%. NH3/N2 nitridation plasma treatment (NPT) was used to remove the 3 nm poor-quality interfacial oxide layer and N2O/N2 oxidation plasma treatment (OPT) to improve the quality of interfacial layer, both resulting in improved dielectric/barrier interface quality, positive threshold voltage (V th) shift larger than 0.9 V, and negligible dispersion. In comparison, however, NPT led to further decrease in interface charges by 3.38 × 1012 cm-2 and an extra positive V th shift of 1.3 V. Analysis with fat field-effect transistors showed that NPT resulted in better sub-threshold characteristics and transconductance linearity for MIS-HEMTs compared with OPT. The comparative study suggested that direct removing the poor interfacial oxide layer by nitridation plasma was superior to improving the quality of interfacial layer by oxidation plasma for the interface engineering of GaN-based MIS-HEMTs.

  8. Solid-state densification of spun-cast self-assembled monolayers for use in ultra-thin hybrid dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Hutchins, Daniel O.; Acton, Orb [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Weidner, Tobias [Department of Bioengineering, University of Washington, Seattle, WA 98195 (United States); Cernetic, Nathan [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Baio, Joe E. [Department of Chemical Engineering, University of Washington, Seattle, WA 98195 (United States); Castner, David G. [Department of Bioengineering, University of Washington, Seattle, WA 98195 (United States); Department of Chemical Engineering, University of Washington, Seattle, WA 98195 (United States); Ma, Hong, E-mail: hma@uw.edu [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Jen, Alex K.-Y., E-mail: ajen@uw.edu [Department of Materials Science and Engineering, University of Washington, Seattle, WA 98195 (United States); Department of Chemistry, University of Washington, Seattle, WA 98195 (United States)

    2012-11-15

    Highlights: Black-Right-Pointing-Pointer Rapid processing of SAM in ambient conditions is achieved by spin coating. Black-Right-Pointing-Pointer Thermal annealing of a bulk spun-cast molecular film is explored as a mechanism for SAM densification. Black-Right-Pointing-Pointer High-performance SAM-oxide hybrid dielectric is obtained utilizing a single wet processing step. - Abstract: Ultra-thin self-assembled monolayer (SAM)-oxide hybrid dielectrics have gained significant interest for their application in low-voltage organic thin film transistors (OTFTs). A [8-(11-phenoxy-undecyloxy)-octyl]phosphonic acid (PhO-19-PA) SAM on ultrathin AlO{sub x} (2.5 nm) has been developed to significantly enhance the dielectric performance of inorganic oxides through reduction of leakage current while maintaining similar capacitance to the underlying oxide structure. Rapid processing of this SAM in ambient conditions is achieved by spin coating, however, as-cast monolayer density is not sufficient for dielectric applications. Thermal annealing of a bulk spun-cast PhO-19-PA molecular film is explored as a mechanism for SAM densification. SAM density, or surface coverage, and order are examined as a function of annealing temperature. These SAM characteristics are probed through atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), and near edge X-ray absorption fine structure spectroscopy (NEXAFS). It is found that at temperatures sufficient to melt the as-cast bulk molecular film, SAM densification is achieved; leading to a rapid processing technique for high performance SAM-oxide hybrid dielectric systems utilizing a single wet processing step. To demonstrate low-voltage devices based on this hybrid dielectric (with leakage current density of 7.7 Multiplication-Sign 10{sup -8} A cm{sup -2} and capacitance density of 0.62 {mu}F cm{sup -2} at 3 V), pentacene thin-film transistors (OTFTs) are fabricated and yield sub 2 V operation and charge carrier mobilites of up to

  9. Dielectric Modulated FET (DMFET)

    Indian Academy of Sciences (India)

    First page Back Continue Last page Graphics. Working Principle: Change in Dielectric constant due to immobilization of biomolecules in the nanogap cavity leads to change in effective gate capacitance and thus gate bias for FET. Working Principle: Change in Dielectric constant due to immobilization of biomolecules in the ...

  10. Growth and characteristics of PbS/polyvinyl alcohol nanocomposites for flexible high dielectric thin film applications

    International Nuclear Information System (INIS)

    Hmar, J.J.L.; Majumder, T.; Mondal, S.P.

    2016-01-01

    PbS/polyvinyl alcohol (PbS/PVA) nanocomposites have been grown by a chemical bath deposition process at various growth temperatures (60–100 °C). Transmission electron microscopy (TEM) study revealed the formation of PbS nanoparticles of diameter 6–20 nm encapsulated in PVA matrix. Optical band gap of the nanocomposite films have been found to decrease (1.45 eV–0.67 eV) with increase in growth temperature from 60 °C to 100 °C. The impedance measurements have been carried out by depositing the PbS/PVA films on indium tin oxide (ITO) coated flexible polyethylene terephthalate (PET) substrates. The room temperature dielectric permittivity and ac conductivity measurements have been carried out for ITO/PbS/PVA/Al devices deposited at various growth temperatures. The nanocomposite films demonstrate superior dielectric permittivity compare to pure PVA polymer. The flexibility studies of ITO/PbS/PVA/Al devices have been performed at different bending angles. - Highlights: • PbS nanoparticles of diameter 6–20 nm were grown in polyvinyl (PVA) matrix. • Optical band gap of nanocomposite films was varied from 1.45–0.67 eV. • The nanocomposite thin films demonstrated superior dielectric permittivity. • Flexibility study of thin film devices was performed at various bending angles.

  11. Cyanoresin, cyanoresin/cellulose triacetate blends for thin film, dielectric capacitors

    Science.gov (United States)

    Yen, Shiao-Ping S. (Inventor); Lewis, Carol R. (Inventor); Cygan, Peter J. (Inventor); Jow, T. Richard (Inventor)

    1996-01-01

    Non brittle dielectric films are formed by blending a cyanoresin such as cyanoethyl, hydroxyethyl cellulose (CRE) with a compatible, more crystalline resin such as cellulose triacetate. The electrical breakdown strength of the blend is increased by orienting the films by uniaxial or biaxial stretching. Blends of high molecular weight CRE with high molecular weight cyanoethyl cellulose (CRC) provide films with high dielectric constants.

  12. Effect of interfacial layers on dielectric properties in very thin SrBi2Ta2O9 capacitors

    International Nuclear Information System (INIS)

    Moon, Bum-Ki; Isobe, Chiharu; Hironaka, Katsuyuki; Hishikawa, Shinichi

    2001-01-01

    The effect of interfacial layers on the dielectric properties in very thin SrBi 2 Ta 2 O 9 (SBT) capacitors has been investigated using static measurements. Total permittivity (ε t ) decreased as the film thickness was reduced in both Pt/SBT/Pt and Ir/SBT/Pt capacitors. The contribution of the interfacial capacitance (C int ) and bulk capacitance to the total capacitance indicates that C int of the Ir/SBT/Pt structure was lower than that of the Pt/SBT/Pt structure, while the bulk permittivity (ε b ) was essentially the same. The dispersion of all capacitors followed the power law, while the Ir/SBT/Pt capacitor showed a larger dispersion of C int . These results suggest that the Pt/SBT/Pt capacitor is preferred for obtaining the high performance with less effect of the interfacial layers on the dielectric properties. [copyright] 2001 American Institute of Physics

  13. Analysis of mobile ionic impurities in polyvinylalcohol thin films by thermal discharge current and dielectric impedance spectroscopy

    Directory of Open Access Journals (Sweden)

    M. Egginger

    2012-12-01

    Full Text Available Polyvinylalcohol (PVA is a water soluble polymer frequently applied in the field of organic electronics for insulating thin film layers. By-products of PVA synthesis are sodium acetate ions which contaminate the polymer material and can impinge on the electronic performance when applied as interlayer dielectrics in thin film transistors. Uncontrollable voltage instabilities and unwanted hysteresis effects are regularly reported with PVA devices. An understanding of these effects require knowledge about the electronic dynamics of the ionic impurities and their influence on the dielectric properties of PVA. Respective data, which are largely unknown, are being presented in this work. Experimental investigations were performed from room temperature to 125°C on drop-cast PVA films of three different quality grades. Data from thermal discharge current (TDC measurements, polarization experiments, and dielectric impedance spectroscopy concurrently show evidence of mobile ionic carriers. Results from TDC measurements indicate the existence of an intrinsic, build-in electric field of pristine PVA films. The field is caused by asymmetric ionic double layer formation at the two different film-interfaces (substrate/PVA and PVA/air. The mobile ions cause strong electrode polarization effects which dominate dielectric impedance spectra. From a quantitative electrode polarization analysis of isothermal impedance spectra temperature dependent values for the concentration, the mobility and conductivity together with characteristic relaxation times of the mobile carriers are given. Also shown are temperature dependent results for the dc-permittivity and the electronic resistivity. The obtained results demonstrate the feasibility to partly remove contaminants from a PVA solution by dialysis cleaning. Such a cleaning procedure reduces the values of ion concentration, conductivity and relaxation frequency.

  14. Carbon nanotube network thin-film transistors on flexible/stretchable substrates

    Science.gov (United States)

    Takei, Kuniharu; Takahashi, Toshitake; Javey, Ali

    2016-03-29

    This disclosure provides systems, methods, and apparatus for flexible thin-film transistors. In one aspect, a device includes a polymer substrate, a gate electrode disposed on the polymer substrate, a dielectric layer disposed on the gate electrode and on exposed portions of the polymer substrate, a carbon nanotube network disposed on the dielectric layer, and a source electrode and a drain electrode disposed on the carbon nanotube network.

  15. Structural, electrical, and dielectric properties of Cr doped ZnO thin films: Role of Cr concentration

    Energy Technology Data Exchange (ETDEWEB)

    Gürbüz, Osman, E-mail: osgurbuz@yildiz.edu.tr; Okutan, Mustafa

    2016-11-30

    Highlights: • Magnetic material of Cr and semiconductor material of ZnO were grown by the magnetron sputtering co-sputter technique. • Perfect single crystalline structures were grown. • DC and AC conductivity with dielectric properties as a function of frequency (f = 5Hz–13 MHz) at room temperature were measured and compared. • Cr doped ZnO can be used in microwave, sensor and optoelectronic devices as the electrical conductivity increases while dielectric constant decreases with the Cr content. - Abstract: An undoped zinc oxide (ZnO) and different concentrations of chromium (Cr) doped ZnO Cr{sub x}ZnO{sub 1−x} (x = 3.74, 5.67, 8.10, 11.88, and 15.96) thin films were prepared using a magnetron sputtering technique at room temperature. These films were characterized by X-ray diffraction (XRD), High resolution scanning electron microscope (HR-SEM), and Energy dispersive X-ray spectrometry (EDS). XRD patterns of all the films showed that the films possess crystalline structure with preferred orientation along the (100) crystal plane. The average crystallite size obtained was found to be between 95 and 83 nm which was beneficial in high intensity recording peak. Both crystal quality and crystallite sizes decrease with increasing Cr concentration. The crystal and grain sizes of the all film were investigated using SEM analysis. The surface morphology that is grain size changes with increase Cr concentration and small grains coalesce together to form larger grains for the Cr{sub 11.88}ZnO and Cr{sub 15.96}ZnO samples. Impedance spectroscopy studies were carried out in the frequencies ranging from 5 Hz to 13 MHz at room temperature. The undoped ZnO film had the highest dielectric value, while dielectric values of other films decreased as doping concentrations increased. Besides, the dielectric constants decreased whereas the loss tangents increased with increasing Cr content. This was considered to be related to the reduction of grain size as Cr content in Zn

  16. Frequency and Temperature Dependent Dielectric Properties of Free-standing Strontium Titanate Thin Films.

    Science.gov (United States)

    Dalberth, Mark J.; Stauber, Renaud E.; Anderson, Britt; Price, John C.; Rogers, Charles T.

    1998-03-01

    We will report on the frequency and temperature dependence of the complex dielectric function of free-standing strontium titanate (STO) films. STO is an incipient ferroelectric with electric-field tunable dielectric properties of utility in microwave electronics. The films are grown epitaxially via pulsed laser deposition on a variety of substrates, including lanthanum aluminate (LAO), neodymium gallate (NGO), and STO. An initial film of yttrium barium cuprate (YBCO) is grown on the substrate, followed by deposition of the STO layer. Following deposition, the sacrificial YBCO layer is chemically etched away in dilute nitric acid, leaving the substrate and a released, free-standing STO film. Coplanar capacitor structures fabricated on the released films allow us to measure the dielectric response. We observe a peak dielectric function in excess of 5000 at 35K, change in dielectric constant of over a factor of 8 for 10Volt/micron electric fields, and temperature dependence above 50K that is very similar to bulk material. The dielectric loss shows two peaks, each with a thermally activated behavior, apparently arising from two types of polar defects. We will discuss the correlation between dielectric properties, growth conditions, and strain in the free-standing STO films.

  17. Surface modification of polyimide gate insulators for solution-processed 2,7-didecyl[1]benzothieno[3,2-b][1]benzothiophene (C10-BTBT) thin-film transistors.

    Science.gov (United States)

    Jang, Kwang-Suk; Kim, Won Soo; Won, Jong-Myung; Kim, Yun-Ho; Myung, Sung; Ka, Jae-Won; Kim, Jinsoo; Ahn, Taek; Yi, Mi Hye

    2013-01-21

    The surface property of a polyimide gate insulator was successfully modified with an n-octadecyl side-chain. Alkyl chain-grafted poly(amic acid), the polyimide precursor, was synthesized using the diamine comonomer with an alkyl side-chain. By adding a base catalyst to the poly(amic acid) coating solution, the imidization temperature of the spin-coated film could be reduced to 200 °C. The 350 nm-thick polyimide film had a dielectric constant of 3.3 at 10 kHz and a leakage current density of less than 8.7 × 10(-10) A cm(-2), while biased from 0 to 100 V. To investigate the potential of the alkyl chain-grafted polyimide film as a gate insulator for solution-processed organic thin-film transistors (TFTs), we fabricated C(10)-BTBT TFTs. C(10)-BTBT was deposited on the alkyl chain-grafted polyimide gate insulator by spin-coating, forming a well-ordered crystal structure. The field-effect mobility and the on/off current ratio of the TFT device were measured to be 0.20-0.56 cm(2) V(-1) s(-1) and >10(5), respectively.

  18. Structural and dielectric studies of Co doped MgTiO3 thin films fabricated by RF magnetron sputtering

    Directory of Open Access Journals (Sweden)

    T. Santhosh Kumar

    2014-06-01

    Full Text Available We report the structural, dielectric and leakage current properties of Co doped MgTiO3 thin films deposited on platinized silicon (Pt/TiO2/SiO2/Si substrates by RF magnetron sputtering. The role of oxygen mixing percentage (OMP on the growth, morphology, electrical and dielectric properties of the thin films has been investigated. A preferred orientation of grains along (110 direction has been observed with increasing the OMP. Such evolution of the textured growth is explained on the basis of the orientation factor analysis followed the Lotgering model. (Mg1-xCoxTiO3 (x = 0.05 thin films exhibits a maximum relative dielectric permittivity of ɛr = 12.20 and low loss (tan δ ∼ 1.2 × 10−3 over a wide range of frequencies for 75% OMP. The role of electric field frequency (f and OMP on the ac-conductivity of (Mg0.95Co0.05TiO3 have been studied. A progressive increase in the activation energy (Ea and relative permittivity ɛr values have been noticed up to 75% of OMP, beyond which the properties starts deteriorate. The I-V characteristics reveals that the leakage current density decreases from 9.93 × 10−9 to 1.14 × 10−9 A/cm2 for OMP 0% to 75%, respectively for an electric field strength of 250 kV/cm. Our experimental results reveal up to that OMP ≥ 50% the leakage current mechanism is driven by the ohmic conduction, below which it is dominated by the schottky emission.

  19. Effect of top gate bias on photocurrent and negative bias illumination stress instability in dual gate amorphous indium-gallium-zinc oxide thin-film transistor

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Eunji; Chowdhury, Md Delwar Hossain; Park, Min Sang; Jang, Jin, E-mail: jjang@khu.ac.kr [Advanced Display Research Center and Department of Information Display, Kyung Hee University, Seoul 130-701 (Korea, Republic of)

    2015-12-07

    We have studied the effect of top gate bias (V{sub TG}) on the generation of photocurrent and the decay of photocurrent for back channel etched inverted staggered dual gate structure amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film-transistors. Upon 5 min of exposure of 365 nm wavelength and 0.7 mW/cm{sup 2} intensity light with negative bottom gate bias, the maximum photocurrent increases from 3.29 to 322 pA with increasing the V{sub TG} from −15 to +15 V. By changing V{sub TG} from negative to positive, the Fermi level (E{sub F}) shifts toward conduction band edge (E{sub C}), which substantially controls the conversion of neutral vacancy to charged one (V{sub O} → V{sub O}{sup +}/V{sub O}{sup 2+} + e{sup −}/2e{sup −}), peroxide (O{sub 2}{sup 2−}) formation or conversion of ionized interstitial (O{sub i}{sup 2−}) to neutral interstitial (O{sub i}), thus electron concentration at conduction band. With increasing the exposure time, more carriers are generated, and thus, maximum photocurrent increases until being saturated. After negative bias illumination stress, the transfer curve shows −2.7 V shift at V{sub TG} = −15 V, which gradually decreases to −0.42 V shift at V{sub TG} = +15 V. It clearly reveals that the position of electron quasi-Fermi level controls the formation of donor defects (V{sub O}{sup +}/V{sub O}{sup 2+}/O{sub 2}{sup 2−}/O{sub i}) and/or hole trapping in the a-IGZO /interfaces.

  20. Nanostructured pyronin Y thin films as a new organic semiconductor: Linear/nonlinear optics, band gap and dielectric properties

    Energy Technology Data Exchange (ETDEWEB)

    Zahran, H.Y. [Metallurgical Lab.1, Nanoscience Laboratory for Environmental and Bio-medical Applications (NLEBA), Semiconductor Lab., Department of Physics, Faculty of Education, Ain Shams University, Roxy, 11757 Cairo (Egypt); Advanced Functional Materials & Optoelectronic Laboratory (AFMOL), Department of Physics, Faculty of Science, King Khalid University, P.O. Box 9004, Abha (Saudi Arabia); Yahia, I.S., E-mail: dr_isyahia@yahoo.com [Metallurgical Lab.1, Nanoscience Laboratory for Environmental and Bio-medical Applications (NLEBA), Semiconductor Lab., Department of Physics, Faculty of Education, Ain Shams University, Roxy, 11757 Cairo (Egypt); Advanced Functional Materials & Optoelectronic Laboratory (AFMOL), Department of Physics, Faculty of Science, King Khalid University, P.O. Box 9004, Abha (Saudi Arabia); Alamri, F.H. [Advanced Functional Materials & Optoelectronic Laboratory (AFMOL), Department of Physics, Faculty of Science, King Khalid University, P.O. Box 9004, Abha (Saudi Arabia)

    2017-05-15

    Pyronin Y dye (PY) is a kind of xanthene derivatives. Thin films of pyronin Y were deposited onto highly cleaned glass substrates using low-cost/spin coating technique. The structure properties of pyronin Y thin films with different thicknesses were investigated by using X-ray diffraction (XRD) and atomic force microscope (AFM). PY thin films for all the studied thicknesses have an amorphous structure supporting the short range order of the grain size. AFM supports the nanostructure with spherical/clusters morphologies of the investigated thin films. The optical constants of pyronin Y thin films for various thicknesses were studied by using UV–vis–NIR spectrophotometer in the wavelength range 350–2500 nm. The transmittance T(λ), reflectance R(λ) spectral and absorbance (abs(λ)) were obtained for all film thicknesses at room temperature and the normal light incident. These films showed a high transmittance in the wide scale wavelengths. For different thicknesses of the studied thin films, the optical band gaps were determined and their values around 2 eV. Real and imaginary dielectric constants, dissipation factor and the nonlinear optical parameters were calculated in the wavelengths to the range 300–2500 nm. The pyronin Y is a new organic semiconductor with a good optical absorption in UV–vis regions and it is suitable for nonlinear optical applications. - Highlights: • Pyronin Y (PY) nanostructured thin films were deposited by using spin coating technique. • XRD/AFM were used to study the structure of PY films. • The optical band gap was calculated on the basis of Tauc's model. • Linear/nonlinear optical parameters are calculated and interpreted via the applied optical theories. • PY thin films is a new organic semiconductor for its application in optoelectronic devices.

  1. Size effects on structural and dielectric properties of PZT thin films at compositions around the morpho tropic phase boundary

    International Nuclear Information System (INIS)

    Lima, Elton Carvalho; Araujo, Eudes Borges; Souza Filho, Antonio Gomes de; Bdikin, Igor

    2011-01-01

    Full text: The demand for portability in consumer electronics has motivated the understanding of size effects on ferroelectric thin films. The actual comprehension of these effects in ferroelectrics is unsatisfactory, since the polarization interacts more strongly than other order parameters such as strain and charge. As a result, extrinsic effects are produced if these variables are uncontrolled and problems such as ferroelectric paraelectric phase transition at nanometers scale remains an unsolved issue. In the present work, the effects of thickness and compositional fractions on the structural and dielectric properties of PbZr 1-x Ti x O 3 (PZT) thin films were studied at a composition around the morphotropic phase boundary (x = 0.50). For this purpose, thin films with different thicknesses and different PbO excess were deposited on Si(100) and Pt=T iO 2 =SiO 2 =Si substrates by a chemical method and crystallized in electric furnace at 700 deg C for 1 hour. The effects of substrate, pyrolysis temperature and excess lead addition in the films are reported. For films with 10 mol% PbO in excess, the pyrolysis in the regime of 300 deg C for 30 minutes was observed to yield PZT pyrochlore free thin films deposited on Pt=T iO 2 =SiO 2 =Si substrate. Out this condition, the transformation from amorphous to the pyrochlore metastable phase is kinetically more favorable that a transformation to the perovskite phase, which is thermodynamically stable. Rietveld refinements based on X-ray diffraction results showed that films present a purely tetragonal phase and that this phase does not change when the film thickness decreases. The dielectric permittivity measurements showed a monoclinic → tetragonal phase transition at 198K. Results showed that the dielectric permittivity (ε) increases continuously from 257 to 463, while the thickness of the PZT films increases from 200 to 710 nm. These results suggests that interface pinning centers can be the responsible mechanism by

  2. Improvement in negative bias illumination stress stability of In-Ga-Zn-O thin film transistors using HfO2 gate insulators by controlling atomic-layer-deposition conditions

    Science.gov (United States)

    Na, So-Yeong; Kim, Yeo-Myeong; Yoon, Da-Jeong; Yoon, Sung-Min

    2017-12-01

    The effects of atomic layer deposition (ALD) conditions for the HfO2 gate insulators (GI) on the device characteristics of the InGaZnO (IGZO) thin film transistors (TFTs) were investigated when the ALD temperature and Hf precursor purge time were varied to 200, 225, and 250 °C, and 15 and 30 s, respectively. The HfO2 thin films showed low leakage current density of 10-8 A cm-2, high dielectric constant of over 20, and smooth surface roughness at all ALD conditions. The IGZO TFTs using the HfO2 GIs showed good device characteristics such as a saturation mobility as high as 11 cm2 V-1 s-1, a subthreshold swing as low as 0.10 V/dec, and all the devices could be operated at a gate voltage as low as  ±3 V. While there were no marked differences in transfer characteristics and PBS stabilities among the fabricated devices, the NBIS instabilities could be improved by increasing the ALD temperature for the formation of HfO2 GIs by reducing the oxygen vacancies within the IGZO channel.

  3. Structural, dielectric and a.c. conductivity study of Sb2O3 thin film ...

    Indian Academy of Sciences (India)

    X-ray diffraction; a.c. conductivity; dielectric properties; complex electric modulus. ... the study disordered systems because of the unusual temper- ..... energy. tunnelling model suggested by Wang et al [31], (s) should decrease with increase in ...

  4. In situ atomic layer nitridation on the top and down regions of the amorphous and crystalline high-K gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Tsai, Meng-Chen [Department of Materials Science and Engineering, National Taiwan University, Taipei 10617, Taiwan (China); Lee, Min-Hung [Institute of Electro-Optical Science and Technology, National Taiwan Normal University, Taipei 11677, Taiwan (China); Kuo, Chin-Lung; Lin, Hsin-Chih [Department of Materials Science and Engineering, National Taiwan University, Taipei 10617, Taiwan (China); Chen, Miin-Jang, E-mail: mjchen@ntu.edu.tw [Department of Materials Science and Engineering, National Taiwan University, Taipei 10617, Taiwan (China)

    2016-11-30

    Highlights: • The structural and electrical characteristics of the ZrO{sub 2} high-K dielectrics, treated with the in situ atomic layer doping of nitrogen into the top and down regions (top and down nitridation, TN and DN, respectively), were investigated. • The amorphous DN sample has a lower leakage current density (J{sub g}) than the amorphous TN sample, attributed to the formation of SiO{sub x}N{sub y} in the interfacial layer (IL). • The crystalline TN sample exhibited a lower CET and a similar J{sub g} as compared with the crystalline DN sample, which can be ascribed to the suppression of IL regrowth. • The crystalline ZrO{sub 2} with in situ atomic layer doping of nitrogen into the top region exhibited superior scaling limit, electrical characteristics, and reliability. - Abstract: Amorphous and crystalline ZrO{sub 2} gate dielectrics treated with in situ atomic layer nitridation on the top and down regions (top and down nitridation, abbreviated as TN and DN) were investigated. In a comparison between the as-deposited amorphous DN and TN samples, the DN sample has a lower leakage current density (J{sub g}) of ∼7 × 10{sup −4} A/cm{sup 2} with a similar capacitance equivalent thickness (CET) of ∼1.53 nm, attributed to the formation of SiO{sub x}N{sub y} in the interfacial layer (IL). The post-metallization annealing (PMA) leads to the transformation of ZrO{sub 2} from the amorphous to the crystalline tetragonal/cubic phase, resulting in an increment of the dielectric constant. The PMA-treated TN sample exhibits a lower CET of 1.22 nm along with a similar J{sub g} of ∼1.4 × 10{sup −5} A/cm{sup 2} as compared with the PMA-treated DN sample, which can be ascribed to the suppression of IL regrowth. The result reveals that the nitrogen engineering in the top and down regions has a significant impact on the electrical characteristics of amorphous and crystalline ZrO{sub 2} gate dielectrics, and the nitrogen incorporation at the top of crystalline

  5. Improvement in gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors using microwave irradiation

    International Nuclear Information System (INIS)

    Jo, Kwang-Won; Cho, Won-Ju

    2014-01-01

    In this study, we evaluated the effects of microwave irradiation (MWI) post-deposition-annealing (PDA) treatment on the gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) and compared the results with a conventional thermal annealing PDA treatment. The MWI-PDA-treated a-IGZO TFTs exhibited enhanced electrical performance as well as improved long-term stability with increasing microwave power. The positive turn-on voltage shift (ΔV ON ) as a function of stress time with positive bias and varying temperature was precisely modeled on a stretched-exponential equation, suggesting that charge trapping is a dominant mechanism in the instability of MWI-PDA-treated a-IGZO TFTs. The characteristic trapping time and average effective barrier height for electron transport indicate that the MWI-PDA treatment effectively reduces the defects in a-IGZO TFTs, resulting in a superior resistance against gate bias stress

  6. Electrical properties of ZnO-based bottom-gate thin film transistors fabricated by using radio frequency magnetron sputtering

    Energy Technology Data Exchange (ETDEWEB)

    Navamathavan, R. [Nano Thin Film Materials Laboratory, Department of Physics, Cheju National University, Jeju 690-756 (Korea, Republic of)], E-mail: n_mathavan@yahoo.com; Choi, Chi Kyu [Nano Thin Film Materials Laboratory, Department of Physics, Cheju National University, Jeju 690-756 (Korea, Republic of); Park, Seong-Ju [Nanophotonic Semiconductors Laboratory, Department of Materials Science and Engineering, Gwangju Institute of Science and Technology, Gwangju 500-712 (Korea, Republic of)

    2009-05-05

    We report on enhancement-mode thin film transistors (TFTs) using ZnO as an active channel layer deposited by radio frequency (rf) magnetron sputtering at 300 deg. C. The TFT structure consisted of ZnO as a channel, SiN{sub x} as a gate insulator and indium tin oxide (ITO) as a gate which were deposited onto a Corning glass substrate. X-ray diffraction pattern revealed that dense columnar structure of closely packed ZnO nano grains along the c-axis. The transfer characteristics of a typical ZnO TFT exhibited a field effect mobility of 31 cm{sup 2}/V s, a drain current on/off ratio of 10{sup 4}, the low off-current value in the order of 10{sup -10} A, and a threshold voltage of 1.7 V. The transparent ZnO TFT exhibited n-channel enhancement mode behavior.

  7. Use of water vapor for suppressing the growth of unstable low-{kappa} interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    Energy Technology Data Exchange (ETDEWEB)

    Xu, J.P. [Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan, 430074 (China); Zou, X. [School of Electromachine and Architecture Engineering, Jianghan University, Wuhan, 430056 (China); Lai, P.T. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)], E-mail: laip@eee.hku.hk; Li, C.X.; Chan, C.L. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)

    2009-03-02

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N{sub 2}, NH{sub 3}, NO and N{sub 2}O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO{sub x} interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N{sub 2} anneal, the wet NH{sub 3}, NO and N{sub 2}O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO{sub x}N{sub y} interlayer. Among the eight anneals, the wet N{sub 2} anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10{sup 11} eV{sup -1} cm{sup -2} and gate leakage current of 2.7 x 10{sup -4} A/cm{sup 2} at V{sub g} = 1 V.

  8. Use of water vapor for suppressing the growth of unstable low-κ interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    International Nuclear Information System (INIS)

    Xu, J.P.; Zou, X.; Lai, P.T.; Li, C.X.; Chan, C.L.

    2009-01-01

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N 2 , NH 3 , NO and N 2 O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO x interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N 2 anneal, the wet NH 3 , NO and N 2 O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO x N y interlayer. Among the eight anneals, the wet N 2 anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10 11 eV -1 cm -2 and gate leakage current of 2.7 x 10 -4 A/cm 2 at V g = 1 V

  9. Structural Evaluation of 5,5′-Bis(naphth-2-yl)-2,2′-bithiophene in Organic Field-Effect Transistors with n-Octadecyltrichlorosilane Coated SiO2 Gate Dielectric

    DEFF Research Database (Denmark)

    Lauritzen, Andreas E.; Torkkeli, Mika; Bikondoa, Oier

    2018-01-01

    We report on the structure and morphology of 5,5′-bis(naphth-2-yl)-2,2′-bithiophene (NaT2) films in bottom-contact organic field-effect transistors (OFETs) with octadecyltrichlorosilane (OTS) coated SiO2 gate dielectric, characterized by atomic force microscopy (AFM), grazing-incidence X......-ray diffraction (GIXRD), and electrical transport measurements. Three types of devices were investigated with the NaT2 thin-film deposited either on (1) pristine SiO2 (corresponding to higher surface energy, 47 mJ/m2) or on OTS deposited on SiO2 under (2) anhydrous or (3) humid conditions (corresponding to lower...... surface energies, 20–25 mJ/m2). NaT2 films grown on pristine SiO2 form nearly featureless three-dimensional islands. NaT2 films grown on OTS/SiO2 deposited under anhydrous conditions form staggered pyramid islands where the interlayer spacing corresponds to the size of the NaT2 unit cell. At the same time...

  10. The influence of carbon doping on the performance of Gd2O3 as high-k gate dielectric

    International Nuclear Information System (INIS)

    Shekhter, P.; Yehezkel, S.; Shriki, A.; Eizenberg, M.; Chaudhuri, A. R.; Osten, H. J.; Laha, A.

    2014-01-01

    One of the approaches for overcoming the issue of leakage current in modern metal-oxide-semiconductor devices is utilizing the high dielectric constants of lanthanide based oxides. We investigated the effect of carbon doping directly into Gd 2 O 3 layers on the performance of such devices. It was found that the amount of carbon introduced into the dielectric is above the solubility limit; carbon atoms enrich the oxide-semiconductor interface and cause a significant shift in the flat band voltage of the stack. Although the carbon atoms slightly degrade this interface, this method has a potential for tuning the flat band voltage of such structures

  11. Thickness-dependent piezoelectric behaviour and dielectric properties of lanthanum modified BiFeO3 thin films

    Directory of Open Access Journals (Sweden)

    Glenda Biasotto

    2011-03-01

    Full Text Available Bi0.85La0.15FeO3 (BLFO thin films were deposited on Pt(111/Ti/SiO2 /Si substrates by the soft chemical method. Films with thicknesses ranging from 140 to 280 nm were grown on platinum coated silicon substrates at 500°C for 2 hours. The X-ray diffraction analysis of BLFO films evidenced a hexagonal structure over the entire thickness range investigated. The grain size of the film changes as the number of the layers increases, indicating thickness dependence. It is found that the piezoelectric response is strongly influenced by the film thickness. It is shown that the properties of BiFeO3 thin films, such as lattice parameter, dielectric permittivity, piezoeletric coefficient etc., are functions of misfit strains.

  12. Inkjet-printed thin film radio-frequency capacitors based on sol-gel derived alumina dielectric ink

    KAUST Repository

    McKerricher, Garret

    2017-05-03

    There has been significant interest in printing radio frequency passives, however the dissipation factor of printed dielectric materials has limited the quality factor achievable. Al2O3 is one of the best and widely implemented dielectrics for RF passive electronics. The ability to spatially pattern high quality Al2O3 thin films using, for example, inkjet printing would tremendously simplify the incumbent fabrication processes – significantly reducing cost and allowing for the development of large area electronics. To-date, particle based Al2O3 inks have been explored as dielectrics, although several drawbacks including nozzle clogging and grain boundary formation in the films hinder progress. In this work, a particle free Al2O3 ink is developed and demonstrated in RF capacitors. Fluid and jetting properties are explored, along with control of ink spreading and coffee ring suppression. The liquid ink is heated to 400 °C decomposing to smooth Al2O3 films ~120 nm thick, with roughness of <2 nm. Metal-insulator-metal capacitors, show high capacitance density >450 pF/mm2, and quality factors of ~200. The devices have high break down voltages, >25 V, with extremely low leakage currents, <2×10−9 A/cm2 at 1 MV/cm. The capacitors compare well with similar Al2O3 devices fabricated by atomic layer deposition.

  13. Tunable dielectric properties of Barium Magnesium Niobate (BMN) doped Barium Strontium Titanate (BST) thin films by magnetron sputtering

    Science.gov (United States)

    Alema, Fikadu; Reinholz, Aaron; Pokhodnya, Konstantin

    2013-03-01

    We report on the tunable dielectric properties of Mg and Nb co-doped Ba0.45Sr0.55TiO3 (BST) thin film prepared by the magnetron sputtering using BST target (pure and doped with BaMg0.33Nb0.67O3 (BMN)) on Pt/TiO2/SiO2/Al2O3 4'' wafers at 700 °C under oxygen atmosphere. The electrical measurements are conducted on 2432 metal-ferroelectric-metal capacitors using Pt as the top and bottom electrode. The crystalline structure, microstructure, and surface morphology of the films are analyzed and correlated to the films dielectric properties. The BMN doped and undoped BST films have shown tunabilities of 48% and 52%; and leakage current densities of 2.2x10-6 A/cm2 and 3.7x10-5 A/cm2, respectively at 0.5 MV/cm bias field. The results indicate that the BMN doped film exhibits a lower leakage current with no significant decrease in tunability. Due to similar electronegativity and ionic radii, it was suggested that both Mg2+ (accepter-type) and Nb5+ (donor-type) dopants substitutTi4+ ion in BST. The improvement in the film dielectric losses and leakage current with insignificant loss of tunability is attributed to the adversary effects of Mg2+ and Nb5+ in BST.

  14. Effect of tunneling layers on the performances of floating-gate based organic thin-film transistor nonvolatile memories

    International Nuclear Information System (INIS)

    Wang, Wei; Han, Jinhua; Ying, Jun; Xiang, Lanyi; Xie, Wenfa

    2014-01-01

    Two types of floating-gate based organic thin-film transistor nonvolatile memories (FG-OTFT-NVMs) were demonstrated, with poly(methyl methacrylate co glycidyl methacrylate) (P(MMA-GMA)) and tetratetracontane (TTC) as the tunneling layer, respectively. Their device performances were measured and compared. In the memory with a P(MMA-GMA) tunneling layer, typical unipolar hole transport was obtained with a relatively small mobility of 0.16 cm 2 /V s. The unidirectional shift of turn-on voltage (V on ) due to only holes trapped/detrapped in/from the floating gate resulted in a small memory window of 12.5 V at programming/erasing voltages (V P /V E ) of ±100 V and a nonzero reading voltage. Benefited from the well-ordered molecule orientation and the trap-free surface of TTC layer, a considerably high hole mobility of 1.7 cm 2 /V s and a visible feature of electrons accumulated in channel and trapped in floating-gate were achieved in the memory with a TTC tunneling layer. High hole mobility resulted in a high on current and a large memory on/off ratio of 600 at the V P /V E of ±100 V. Both holes and electrons were injected into floating-gate and overwritten each other, which resulted in a bidirectional V on shift. As a result, an enlarged memory window of 28.6 V at the V P /V E of ±100 V and a zero reading voltage were achieved. Based on our results, a strategy is proposed to optimize FG-OTFT-NVMs by choosing a right tunneling layer to improve the majority carrier mobility and realize ambipolar carriers injecting and trapping in the floating-gate.

  15. Effect of tunneling layers on the performances of floating-gate based organic thin-film transistor nonvolatile memories

    Science.gov (United States)

    Wang, Wei; Han, Jinhua; Ying, Jun; Xiang, Lanyi; Xie, Wenfa

    2014-09-01

    Two types of floating-gate based organic thin-film transistor nonvolatile memories (FG-OTFT-NVMs) were demonstrated, with poly(methyl methacrylate co glycidyl methacrylate) (P(MMA-GMA)) and tetratetracontane (TTC) as the tunneling layer, respectively. Their device performances were measured and compared. In the memory with a P(MMA-GMA) tunneling layer, typical unipolar hole transport was obtained with a relatively small mobility of 0.16 cm2/V s. The unidirectional shift of turn-on voltage (Von) due to only holes trapped/detrapped in/from the floating gate resulted in a small memory window of 12.5 V at programming/erasing voltages (VP/VE) of ±100 V and a nonzero reading voltage. Benefited from the well-ordered molecule orientation and the trap-free surface of TTC layer, a considerably high hole mobility of 1.7 cm2/V s and a visible feature of electrons accumulated in channel and trapped in floating-gate were achieved in the memory with a TTC tunneling layer. High hole mobility resulted in a high on current and a large memory on/off ratio of 600 at the VP/VE of ±100 V. Both holes and electrons were injected into floating-gate and overwritten each other, which resulted in a bidirectional Von shift. As a result, an enlarged memory window of 28.6 V at the VP/VE of ±100 V and a zero reading voltage were achieved. Based on our results, a strategy is proposed to optimize FG-OTFT-NVMs by choosing a right tunneling layer to improve the majority carrier mobility and realize ambipolar carriers injecting and trapping in the floating-gate.

  16. Effect of the post-deposition annealing on electrical characteristics of MIS structures with HfO{sub 2}/SiO{sub 2} gate dielectric stacks

    Energy Technology Data Exchange (ETDEWEB)

    Taube, Andrzej [Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw (Poland); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland); Mroczynski, Robert, E-mail: rmroczyn@elka.pw.edu.pl [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland); Korwin-Mikke, Katarzyna [Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw (Poland); Gieraltowska, Sylwia [Institute of Physics, Polish Academy of Sciences, Al. Lotnikow 32/46, 02-668 Warsaw (Poland); Szmidt, Jan [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw (Poland); Piotrowska, Anna [Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw (Poland)

    2012-09-01

    In this work, we report on effects of post-deposition annealing on electrical characteristics of metal-insulator-semiconductor (MIS) structures with HfO{sub 2}/SiO{sub 2} double gate dielectric stacks. Obtained results have shown the deterioration of electro-physical properties of MIS structures, e.g. higher interface traps density in the middle of silicon forbidden band (D{sub itmb}), as well as non-uniform distribution and decrease of breakdown voltage (U{sub br}) values, after annealing above 400 Degree-Sign C. Two potential hypothesis of such behavior were proposed: the formation of interfacial layer between hafnia and silicon dioxide and the increase of crystallinity of HfO{sub 2} due to the high temperature treatment. Furthermore, the analysis of conduction mechanisms in investigated stacks revealed Poole-Frenkel (P-F) tunneling at broad range of electric field intensity.

  17. Dielectric properties of DC reactive magnetron sputtered Al{sub 2}O{sub 3} thin films

    Energy Technology Data Exchange (ETDEWEB)

    Prasanna, S. [Thin Film Center, Department of Physics, PSG College of Technology, Coimbatore, 641 004 (India); Mohan Rao, G. [Department of Instrumentation, Indian Institute of Science (IISc), Bangalore, 560 012 (India); Jayakumar, S., E-mail: s_jayakumar_99@yahoo.com [Thin Film Center, Department of Physics, PSG College of Technology, Coimbatore, 641 004 (India); Kannan, M.D. [Thin Film Center, Department of Physics, PSG College of Technology, Coimbatore, 641 004 (India); Ganesan, V. [Low Temperature Lab, UGC-DAE Consortium for Scientific Research (CSR), Indore, 452 017 (India)

    2012-01-31

    Alumina (Al{sub 2}O{sub 3}) thin films were sputter deposited over well-cleaned glass and Si < 100 > substrates by DC reactive magnetron sputtering under various oxygen gas pressures and sputtering powers. The composition of the films was analyzed by X-ray photoelectron spectroscopy and an optimal O/Al atomic ratio of 1.59 was obtained at a reactive gas pressure of 0.03 Pa and sputtering power of 70 W. X-ray diffraction results revealed that the films were amorphous until 550 Degree-Sign C. The surface morphology of the films was studied using scanning electron microscopy and the as-deposited films were found to be smooth. The topography of the as-deposited and annealed films was analyzed by atomic force microscopy and a progressive increase in the rms roughness of the films from 3.2 nm to 4.53 nm was also observed with increase in the annealing temperature. Al-Al{sub 2}O{sub 3}-Al thin film capacitors were then fabricated on glass substrates to study the effect of temperature and frequency on the dielectric property of the films. Temperature coefficient of capacitance, AC conductivity and activation energy were determined and the results are discussed. - Highlights: Black-Right-Pointing-Pointer Al{sub 2}O{sub 3} thin films were deposited by DC reactive magnetron sputtering. Black-Right-Pointing-Pointer The films were found to be amorphous up to annealing temperature of 550 C. Black-Right-Pointing-Pointer An increase in rms roughness of the films was observed with annealing. Black-Right-Pointing-Pointer Al-Al{sub 2}O{sub 3}-Al thin film capacitors were fabricated and dielectric constant was 7.5. Black-Right-Pointing-Pointer The activation energy decreased with increase in frequency.

  18. Experimental investigation of localized stress-induced leakage current distribution in gate dielectrics using array test circuit

    Science.gov (United States)

    Park, Hyeonwoo; Teramoto, Akinobu; Kuroda, Rihito; Suwa, Tomoyuki; Sugawa, Shigetoshi

    2018-04-01

    Localized stress-induced leakage current (SILC) has become a major problem in the reliability of flash memories. To reduce it, clarifying the SILC mechanism is important, and statistical measurement and analysis have to be carried out. In this study, we applied an array test circuit that can measure the SILC distribution of more than 80,000 nMOSFETs with various gate areas at a high speed (within 80 s) and a high accuracy (on the 10-17 A current order). The results clarified that the distributions of localized SILC in different gate areas follow a universal distribution assuming the same SILC defect density distribution per unit area, and the current of localized SILC defects does not scale down with the gate area. Moreover, the distribution of SILC defect density and its dependence on the oxide field for measurement (E OX-Measure) were experimentally determined for fabricated devices.

  19. Thermal response of Ru electrodes in contact with SiO2 and Hf-based high-k gate dielectrics

    International Nuclear Information System (INIS)

    Wen, H.-C.; Lysaght, P.; Alshareef, H.N.; Huffman, C.; Harris, H.R.; Choi, K.; Senzaki, Y.; Luan, H.; Majhi, P.; Lee, B.H.; Campin, M. J.; Foran, B.; Lian, G.D.; Kwong, D.-L.

    2005-01-01

    A systematic experimental evaluation of the thermal stability of Ru metal gate electrodes in direct contact with SiO 2 and Hf-based dielectric layers was performed and correlated with electrical device measurements. The distinctly different interfacial reactions in the Ru/SiO 2 , Ru/HfO 2 , and Ru/HfSiO x film systems were observed through cross-sectional high-resolution transmission electron microscopy, high angle annular dark field scanning transmission electron microscopy with electron-energy-loss spectra, and energy dispersive x-ray spectra analysis. Ru interacted with SiO 2 , but remained stable on HfO 2 at 1000 deg. C. The onset of Ru/SiO 2 interfacial interactions is identified via silicon substrate pitting possibly from Ru diffusion into the dielectric in samples exposed to a 900 deg. C/10-s anneal. The dependence of capacitor device degradation with decreasing SiO 2 thickness suggests Ru diffuses through SiO 2 , followed by an abrupt, rapid, nonuniform interaction of ruthenium silicide as Ru contacts the Si substrate. Local interdiffusion detected on Ru/HfSiO x samples may be due to phase separation of HfSiO x into HfO 2 grains within a SiO 2 matrix, suggesting that SiO 2 provides a diffusion pathway for Ru. Detailed evidence consistent with a dual reaction mechanism for the Ru/SiO 2 system at 1000 deg. C is presented

  20. Study of the circular photo-galvanic effect in electrically gated (Bi,Sb)2Te3 thin films

    Science.gov (United States)

    Pan, Yu; Pillsbury, Timothy; Richardella, Anthony; Flanagan, Thomas; Samarth, Nitin

    Illumination with circularly polarized light is known to produce a helicity dependent photocurrent in topological insulators such as Bi2Se3 [Nature Nanotech. 7, 96 (2012)]. Symmetry considerations suggest that this ``circular photo-galvanic effect'' (CPGE) arises purely from the surface. However, whether or not the CPGE is directly related to optical excitations from the helical surface states is still under debate. To clarify the origin of the CPGE, we first compare the helicity dependent photocurrent in intrinsic (Bi,Sb)2Te3 to Cr doped (Bi,Sb)2Te3 thin films in which the Dirac surface states are perturbed by magnetic coupling. Secondly, we discuss the tunable CPGE in electrically gated (Bi,Sb)2Te3 thin films excited by optical excitations at different wavelengths. The dependence on the chemical potential and the photon energy of the excitation unveils the origin of the CPGE. Funded by ONR.

  1. Optical spectroscopy, optical conductivity, dielectric properties and new methods for determining the gap states of CuSe thin films

    International Nuclear Information System (INIS)

    Sakr, G.B.; Yahia, I.S.; Fadel, M.; Fouad, S.S.; Romcevic, N.

    2010-01-01

    Research highlights: → The structural, optical dispersion parameters and the Raman spectroscopy have been studied for CuSe thin films. → X-ray diffraction results indicate the amorphous nature of the thermally evaporated CuSe thin films. → The refractive index shows an anomalous dispersion at the lower wavelength (absorption region) and a normal dispersion at the higher wavelengths (transparent region). → The refractive index dispersion obeys the single oscillator model proposed by Wemple and DiDomenico WDD model and the single oscillator parameters were determined. → The band gap of CuSe thin films was determined by three novel methods i.e. (relaxation time, real and imaginary dielectric constant and real and imaginary optical conductivity) which in a good agreement with the Tauc band gap value. - Abstract: The paper describes the structural and optical properties of CuSe thin films. X-ray diffraction pattern indicates that CuSe thin film has an amorphous structure. Transmittance T(λ) and reflectance R(λ) measurements in the wavelength range (300-1700 nm) were used to calculate the refractive index n(λ), the absorption index and the optical dispersion parameters according to Wemple and Didomenico WDD model. The dispersion curve of the refractive index shows an anomalous dispersion in the absorption region and a normal dispersion in the transparent region. The optical bandgap has been estimated and confirmed by four different methods. The value for the direct bandgap for the as-deposited CuSe thin film approximately equals 2.7 eV. The Raman spectroscopy was used to identify and quantify the individual phases presented in the CuSe films.

  2. Improvements in the reliability of a-InGaZnO thin-film transistors with triple stacked gate insulator in flexible electronics applications

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Hua-Mao [Department of Photonics & Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang3708@gmail.com [Department of Physics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Taiwan (China); Tai, Ya-Hsiang [Department of Photonics & Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu, Taiwan (China); Chen, Kuan-Fu [Department of Physics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Chiang, Hsiao-Cheng [Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Liu, Kuan-Hsien [Department of Electrophysics, National Chiao Tung University, Hsinchu, Taiwan (China); Lee, Chao-Kuei [Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan (China); Lin, Wei-Ting; Cheng, Chun-Cheng; Tu, Chun-Hao; Liu, Chu-Yu [Advanced Technology Research Center, AU Optronics Corp, Hsinchu, Taiwan (China)

    2015-11-30

    This study examined the impact of the low-temperature stacking gate insulator on the gate bias instability of a-InGaZnO thin film transistors in flexible electronics applications. Although the quality of SiN{sub x} at low process/deposition temperature is better than that of SiO{sub x} at similarly low process/deposition temperature, there is still a very large positive threshold voltage (V{sub th}) shift of 9.4 V for devices with a single low-temperature SiN{sub x} gate insulator under positive gate bias stress. However, a suitable oxide–nitride–oxide-stacked gate insulator exhibits a V{sub th} shift of only 0.23 V. This improvement results from the larger band offset and suitable gate insulator thickness that can effectively suppress carrier trapping behavior. - Highlights: • The cause of the bias instability for a low-temperature gate insulator is verified. • A triple-stacked gate insulator was fabricated. • A suitable triple stacked gate insulator shows only 0.23 V threshold voltage shift.

  3. Degradation of ultra-thin gate oxide LDD NMOSFET under GIDL stress

    International Nuclear Information System (INIS)

    Hu Shigang; Hao Yue; Cao Yanrong; Ma Xiaohua; Wu Xiaofeng; Chen Chi; Zhou Qingjun

    2009-01-01

    The degradation of device under GIDL (gate-induced drain leakage current) stress has been studied using LDD NMOSFETs with 1.4 nm gate oxides. Experimental result shows that the degradation of device parameters depends more strongly on V d than on V g . The characteristics of the GIDL current are used to analyze the damage generated during the stress. It is clearly found that the change of GIDL current before and after stress can be divided into two stages. The trapping of holes in the oxide is dominant in the first stage, but that of electrons in the oxide is dominant in the second stage. It is due to the common effects of edge direct tunneling and band-to-band tunneling. SILC (stress induced leakage current) in the NMOSFET decreases with increasing stress time under GIDL stress. The degradation characteristic of SILC also shows saturating time dependence. SILC is strongly dependent on the measured gate voltage. The higher the measured gate voltage, the less serious the degradation of the gate current. A likely mechanism is presented to explain the origin of SILC during GIDL stress.

  4. Leakage current suppression with a combination of planarized gate and overlap/off-set structure in metal-induced laterally crystallized polycrystalline-silicon thin-film transistors

    Science.gov (United States)

    Chae, Hee Jae; Seok, Ki Hwan; Lee, Sol Kyu; Joo, Seung Ki

    2018-04-01

    A novel inverted staggered metal-induced laterally crystallized (MILC) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) with a combination of a planarized gate and an overlap/off-set at the source-gate/drain-gate structure were fabricated and characterized. While the MILC process is advantageous for fabricating inverted staggered poly-Si TFTs, MILC TFTs reveal higher leakage current than TFTs crystallized by other processes due to their high trap density of Ni contamination. Due to this drawback, the planarized gate and overlap/off-set structure were applied to inverted staggered MILC TFTs. The proposed device shows drastic suppression of leakage current and pinning phenomenon by reducing the lateral electric field and the space-charge limited current from the gate to the drain.

  5. The Bipolar Field-Effect Transistor: XIII. Physical Realizations of the Transistor and Circuits (One-Two-MOS-Gates on Thin-Thick Pure-Impure Base)

    International Nuclear Information System (INIS)

    Sah, C.-T.; Jie Binbin

    2009-01-01

    This paper reports the physical realization of the Bipolar Field-Effect Transistor (BiFET) and its one-transistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pure and impure base, with electron and hole contacts, and the corresponding theoretical current-voltage characteristics previously computed by us, without generation-recombination-trapping-tunneling of electrons and holes. These examples include the one-MOS-gate on semi-infinite thick impure base transistor (the bulk transistor) and the impurethin-base Silicon-on-Insulator (SOI) transistor and the two-MOS-gates on thin base transistors (the FinFET and the Thin Film Transistor TFT). Figures are given with the cross-section views containing the electron and hole concentration and current density distributions and trajectories and the corresponding DC current-voltage characteristics.

  6. Effects of DC gate and drain bias stresses on the degradation of excimer laser crystallized polysilicon thin film transistors

    International Nuclear Information System (INIS)

    Kouvatsos, D N; Michalas, L; Voutsas, A T; Papaioannou, G J

    2005-01-01

    The effects of gate and drain bias stresses on thin film transistors fabricated in polysilicon films crystallized using the advanced sequential lateral solidification excimer laser annealing (SLS ELA) process, which yields very elongated polysilicon grains and allows the fabrication of TFTs without grain boundary barriers to current flow, are investigated as a function of the active layer thickness and of the TFT orientation relative to the grains. The application of hot carrier stress, with a condition of V GS = V DS /2, was determined to induce threshold voltage, subthreshold swing and transconductance degradation for TFTs in thicker polysilicon films and the associated stress-induced increase in the active layer trap density was evaluated. However, this device degradation was drastically reduced for TFTs fabricated in ultra-thin films. Furthermore, the application of the same stress condition to TFTs oriented vertically to the elongated grains resulted in similar threshold voltage shift but in substantially decreased subthreshold swing and transconductance degradation. The immunity of ultra-thin active layer devices to degradation under hot carrier stress clearly suggests the implementation of ultra thin SLS ELA polysilicon films for the fabrication of TFTs exhibiting not only high performance but, especially, the high reliability needed for integrated systems on panel

  7. Analysis of transmittance properties in 1D hybrid dielectric photonic crystal containing superconducting thin films

    Science.gov (United States)

    Soltani, Osswa; Zaghdoudi, Jihene; Kanzari, Mounir

    2018-06-01

    By means of two fluid model and transfer matrix method (TMM), we investigate theoretically the transmittance properties of a defective hybrid dielectric-dielectric photonic crystal that contains a superconducting material as a defect layer. The considered hybrid photonic structure is: H(LH) 7(HLSLH) P H(LH) 7 , where H is the high refractive index dielectric, L is the low refractive index dielectric, S is the superconducting material and P is the repetitive number. The results show that the variation of the number and the positions of the transmissions modes depend strongly on the repetitive number P, the temperature T and the thickness of the layer S. An improvement of the spectral response is obtained with the exponential gradation of layer thicknesses dj =d0 + βejα , where d0 is the initial thickness of the layer j, α and β are two particular constants for each material. In addition, the effect of the incident angle for both transverse electric (TE) and transverse magnetic (TM) polarizations on the transmittance spectrum is discussed. As a result, we propose a tunable narrow stop-band polychromatic filter that covers the visible wavelength.

  8. Fabrication and electrical properties of metal-oxide semiconductor capacitors based on polycrystalline p-Cu{sub x}O and HfO{sub 2}/SiO{sub 2} high-{kappa} stack gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Zou Xiao [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Department of Electromachine Engineering, Jianghan University, Wuhan, 430056 (China); Fang Guojia, E-mail: gjfang@whu.edu.c [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Yuan Longyan; Liu Nishuang; Long Hao; Zhao Xingzhong [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China)

    2010-05-31

    Polycrystalline p-type Cu{sub x}O films were deposited after the growth of HfO{sub 2} dielectric on Si substrate by pulsed laser deposition, and Cu{sub x}O metal-oxide-semiconductor (MOS) capacitors with HfO{sub 2}/SiO{sub 2} stack gate dielectric were primarily fabricated and investigated. X-ray diffraction and X-ray photoelectron spectroscopy were applied to analyze crystalline structure and Cu{sup +}/Cu{sup 2+} ratios of Cu{sub x}O films respectively. SiO{sub 2} interlayer formed between the high-{kappa} dielectric and substrate was estimated by the transmission electron microscope. Results of electrical characteristic measurement indicate that the permittivity of HfO{sub 2} is about 22, and the gate leakage current density of MOS capacitor with 11.3 nm HfO{sub 2}/SiO{sub 2} stack dielectrics is {approx} 10{sup -4} A/cm{sup 2}. Results also show that the annealing in N{sub 2} can improve the quality of Cu{sub x}O/HfO{sub 2} interface and thus reduce the gate leakage density.

  9. Correlation between the dielectric constant and X-ray diffraction pattern of Si-O-C thin films with hydrogen bonds

    International Nuclear Information System (INIS)

    Oh, Teresa; Oh, Kyoung Suk; Lee, Kwang-Man; Choi, Chi Kyu

    2004-01-01

    The amorphous structure of organic-inorganic hybrid type Si-O-C thin films was studied using the first principles molecular-dynamics method with density functional techniques. The correlation between the dielectric constant and the degree of amorphous structure in organic-inorganic hybrid type Si-O-C thin films was studied. Si-O-C thin films were deposited by high-density plasma chemical vapor deposition using bis-trimethylsilylmethane and oxygen precursors. As-deposited films and films annealed at 500 deg. C were analyzed by X-ray diffraction (XRD). For quantitative analysis, the X-ray diffraction patterns of the samples were transformed to the radial distribution function (RDF) using Fourier analysis. Hybrid type Si-O-C thin films can be divided into three types using their amorphous structure and the dielectric constant: those with organic, hybrid, and inorganic properties

  10. Changes of optical, dielectric, and structural properties of Si15Sb85 phase change memory thin films under different initializing laser power

    International Nuclear Information System (INIS)

    Huang Huan; Zhang Lei; Wang Yang; Han Xiaodong; Wu Yiqun; Zhang Ze; Gan Fuxi

    2011-01-01

    Research highlights: → We study the optical, dielectric, and structural characteristics of Si 15 Sb 85 phase change memory thin films under a moving continuous-wave laser initialization. → The optical and dielectric constants, absorption coefficient of Si 15 Sb 85 change regularly with the increasing laser power. → The optical band gaps of Si 15 Sb 85 irradiated upon different power lasers were calculated. → HRTEM images of the samples were observed and the changes of optical and dielectric constants are determined by crystalline structures changes of the films. - Abstract: The optical, dielectric, and structural characteristics of Si 15 Sb 85 phase change memory thin films under a moving continuous-wave laser initialization are studied by using spectroscopic ellipsometry and high-resolution transmission electron microscopy. The dependence of complex refractive index, dielectric functions, absorption coefficient, and optical band gap of the films on its crystallization extents formed by the different initialization laser power are analyzed in detail. The structural change from as-deposited amorphous phase to distorted rhombohedra-Sb-like crystalline structure with the increase of initialization laser power is clearly observed with sub-nanometer resolution. The optical and dielectric constants, the relationship between them, and the local atomic arrangements of this new phase change material can help explain the phase change mechanism and design the practical phase change memory devices.

  11. Processing and performance of organic insulators as a gate layer in ...

    Indian Academy of Sciences (India)

    Fabrication of organic thin film transistor (OTFT) on flexible substrates is a challenge, because of its low softening temperature, high roughness and flexible nature. Although several organic dielectrics have been used as gate insulator, it is difficult to choose one in absence of a comparative study covering processing of ...

  12. Processing and performance of organic insulators as a gate layer in ...

    Indian Academy of Sciences (India)

    Abstract. Fabrication of organic thin film transistor (OTFT) on flexible substrates is a challenge, because of its low softening temperature, high roughness and flexible nature. Although several organic dielectrics have been used as gate insulator, it is difficult to choose one in absence of a comparative study covering ...

  13. Reliability study of ultra-thin gate oxides on strained-Si/SiGe MOS structures

    International Nuclear Information System (INIS)

    Varzgar, John B.; Kanoun, Mehdi; Uppal, Suresh; Chattopadhyay, Sanatan; Tsang, Yuk Lun; Escobedo-Cousins, Enrique; Olsen, Sarah H.; O'Neill, Anthony; Hellstroem, Per-Erik; Edholm, Jonas; Ostling, Mikael; Lyutovich, Klara; Oehme, Michael; Kasper, Erich

    2006-01-01

    The reliability of gate oxides on bulk Si and strained Si (s-Si) has been evaluated using constant voltage stressing (CVS) to investigate their breakdown characteristics. The s-Si architectures exhibit a shorter life time compared to that of bulk Si, which is attributed to higher bulk oxide charges (Q ox ) and increased surface roughness in the s-Si structures. The gate oxide in the s-Si structure exhibits a hard breakdown (HBD) at 1.9 x 10 4 s, whereas HBD is not observed in bulk Si up to a measurement period of 1.44 x 10 5 s. The shorter lifetime of the s-Si gate oxide is attributed to a larger injected charge (Q inj ) compared to Q inj in bulk Si. Current-voltage (I-V) measurements for bulk Si samples at different stress intervals show an increase in stress induced leakage current (SILC) of two orders in the low voltage regime from zero stress time to up to 5 x 10 4 s. In contrast, superior performance enhancements in terms of drain current, maximum transconductance and effective channel mobility are observed in s-Si MOSFET devices compared to bulk Si. The results from this study indicate that further improvement in gate oxide reliability is needed to exploit the sustained performance enhancement of s-Si devices over bulk Si

  14. Direct Effect of Dielectric Surface Energy on Carrier Transport in Organic Field-Effect Transistors.

    Science.gov (United States)

    Zhou, Shujun; Tang, Qingxin; Tian, Hongkun; Zhao, Xiaoli; Tong, Yanhong; Barlow, Stephen; Marder, Seth R; Liu, Yichun

    2018-05-09

    The understanding of the characteristics of gate dielectric that leads to optimized carrier transport remains controversial, and the conventional studies applied organic semiconductor thin films, which introduces the effect of dielectric on the growth of the deposited semiconductor thin films and hence only can explore the indirect effects. Here, we introduce pregrown organic single crystals to eliminate the indirect effect (semiconductor growth) in the conventional studies and to undertake an investigation of the direct effect of dielectric on carrier transport. It is shown that the matching of the polar and dispersive components of surface energy between semiconductor and dielectric is favorable for higher mobility. This new empirical finding may show the direct relationship between dielectric and carrier transport for the optimized mobility of organic field-effect transistors and hence show a promising potential for the development of next-generation high-performance organic electronic devices.

  15. Metal-oxide assisted surface treatment of polyimide gate insulators for high-performance organic thin-film transistors.

    Science.gov (United States)

    Kim, Sohee; Ha, Taewook; Yoo, Sungmi; Ka, Jae-Won; Kim, Jinsoo; Won, Jong Chan; Choi, Dong Hoon; Jang, Kwang-Suk; Kim, Yun Ho

    2017-06-14

    We developed a facile method for treating polyimide-based organic gate insulator (OGI) surfaces with self-assembled monolayers (SAMs) by introducing metal-oxide interlayers, called the metal-oxide assisted SAM treatment (MAST). To create sites for surface modification with SAM materials on polyimide-based OGI (KPI) surfaces, the metal-oxide interlayer, here amorphous alumina (α-Al 2 O 3 ), was deposited on the KPI gate insulator using spin-coating via a rapid sol-gel reaction, providing an excellent template for the formation of a high-quality SAM with phosphonic acid anchor groups. The SAM of octadecylphosphonic acid (ODPA) was successfully treated by spin-coating onto the α-Al 2 O 3 -deposited KPI film. After the surface treatment by ODPA/α-Al 2 O 3 , the surface energy of the KPI thin film was remarkably decreased and the molecular compatibility of the film with an organic semiconductor (OSC), 2-decyl-7-phenyl-[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-C 10 ), was increased. Ph-BTBT-C 10 molecules were uniformly deposited on the treated gate insulator surface and grown with high crystallinity, as confirmed by atomic force microscopy (AFM) and X-ray diffraction (XRD) analysis. The mobility of Ph-BTBT-C 10 thin-film transistors (TFTs) was approximately doubled, from 0.56 ± 0.05 cm 2 V -1 s -1 to 1.26 ± 0.06 cm 2 V -1 s -1 , after the surface treatment. The surface treatment of α-Al 2 O 3 and ODPA significantly decreased the threshold voltage from -21.2 V to -8.3 V by reducing the trap sites in the OGI and improving the interfacial properties with the OSC. We suggest that the MAST method for OGIs can be applied to various OGI materials lacking reactive sites using SAMs. It may provide a new platform for the surface treatment of OGIs, similar to that of conventional SiO 2 gate insulators.

  16. Drift mobility of thermalized and highly energetic holes in thin layers of amorphous dielectric SiC

    International Nuclear Information System (INIS)

    Sielski, Jan; Jeszka, Jeremiasz K.

    2012-01-01

    The development of new technology in the electronics industry requires new dielectric materials. It is also important to understand the charge-carrier transport mechanism in these materials. We examined the hole drift mobility in amorphous SiC dielectric thin films using the time-of-flight (TOF) method. Charge carriers were generated using an electron gun. The generated holes gave a dispersive TOF signal and the mobility was low. For electric field strengths above 4 x 10 5 V cm -1 the drift mobility shows a very strong dependence on the electric field and a weak temperature dependence (transport of ''high-energy'' charge carriers). At lower electric fields and for thermalized charge carriers the mobility is practically field independent and thermally activated. The observed phenomenon was attributed to the changes in the effective energy of the generated carriers moving in the high electric fields and consequently in the density of localized states taking part in the transport. (Copyright copyright 2012 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  17. Mechanical and dielectric characterization of lead zirconate titanate(PZT)/polyurethane(PU) thin film composite for energy harvesting

    Science.gov (United States)

    Aboubakr, S.; Rguiti, M.; Hajjaji, A.; Eddiai, A.; Courtois, C.; d'Astorg, S.

    2014-04-01

    The Lead Zirconate titanate (PZT) ceramic is known by its piezoelectric feature, but also by its stiffness, the use of a composite based on a polyurethane (PU) matrix charged by a piezoelectric material, enable to generate a large deformation of the material, therefore harvesting more energy. This new material will provide a competitive alternative and low cost manufacturing technology of autonomous systems (smart clothes, car seat, boat sail, flag ...). A thin film of the PZT/PU composite was prepared using up to 80 vol. % of ceramic. Due to the dielectric nature of the PZT, inclusions of this one in a PU matrix raises the permittivity of the composite, on other hand this latter seems to decline at high frequencies.

  18. Radiation-induced interface state generation in MOS devices with reoxidised nitrided SiO2 gate dielectrics

    International Nuclear Information System (INIS)

    Lo, G.Q.; Shih, D.K.; Ting, W.; Kwong, D.L.

    1989-01-01

    In this letter, the radiation-induced interface state generation ΔD it in MOS devices with reoxidised nitrided gate oxides has been studied. The reoxidised nitrided oxides were fabricated by rapid thermal reoxidation (RTO) of rapidly thermal nitrided (RTN) SiO 2 . The devices were irradiated by exposure to X-rays at doses of 0.5-5.0 Mrad (Si). It is found that the RTO process improves the radiation hardness of RTN oxides in terms of interface state generation. The enhanced interface ''hardness'' of reoxidised nitrided oxides is attributed to the strainless interfacial oxide regrowth or reduction of hydrogen concentration during RTO of RTN oxides. (author)

  19. Comparative analysis of the effects of tantalum doping and annealing on atomic layer deposited (Ta2O5)x(Al2O3)1−x as potential gate dielectrics for GaN/AlxGa1−xN/GaN high electron mobility transistors

    International Nuclear Information System (INIS)

    Partida-Manzanera, T.; Roberts, J. W.; Sedghi, N.; Potter, R. J.; Bhat, T. N.; Zhang, Z.; Tan, H. R.; Dolmanan, S. B.; Tripathy, S.

    2016-01-01

    This paper describes a method to optimally combine wide band gap Al 2 O 3 with high dielectric constant (high-κ) Ta 2 O 5 for gate dielectric applications. (Ta 2 O 5 ) x (Al 2 O 3 ) 1−x thin films deposited by thermal atomic layer deposition (ALD) on GaN-capped Al x Ga 1−x N/GaN high electron mobility transistor (HEMT) structures have been studied as a function of the Ta 2 O 5 molar fraction. X-ray photoelectron spectroscopy shows that the bandgap of the oxide films linearly decreases from 6.5 eV for pure Al 2 O 3 to 4.6 eV for pure Ta 2 O 5 . The dielectric constant calculated from capacitance-voltage measurements also increases linearly from 7.8 for Al 2 O 3 up to 25.6 for Ta 2 O 5 . The effect of post-deposition annealing in N 2 at 600 °C on the interfacial properties of undoped Al 2 O 3 and Ta-doped (Ta 2 O 5 ) 0.12 (Al 2 O 3 ) 0.88 films grown on GaN-HEMTs has been investigated. These conditions are analogous to the conditions used for source/drain contact formation in gate-first HEMT technology. A reduction of the Ga-O to Ga-N bond ratios at the oxide/HEMT interfaces is observed after annealing, which is attributed to a reduction of interstitial oxygen-related defects. As a result, the conduction band offsets (CBOs) of the Al 2 O 3 /GaN-HEMT and (Ta 2 O 5 ) 0.16 (Al 2 O 3 ) 0.84 /GaN-HEMT samples increased by ∼1.1 eV to 2.8 eV and 2.6 eV, respectively, which is advantageous for n-type HEMTs. The results demonstrate that ALD of Ta-doped Al 2 O 3 can be used to control the properties of the gate dielectric, allowing the κ-value to be increased, while still maintaining a sufficient CBO to the GaN-HEMT structure for low leakage currents

  20. Effect of La and W dopants on dielectric and ferroelectric properties of PZT thin films prepared by sol-gel process

    International Nuclear Information System (INIS)

    Xiao, Mi; Zhang, Zebin; Zhang, Weikang; Zhang, Ping

    2018-01-01

    La or W-doped lead zirconate titanate thin films (PLZT or PZTW) were prepared on platinized silicon substrates by sol-gel process. The effects of La or W dopant on the phase development, microstructure, dielectric and ferroelectric characteristics of films were studied. For PLZT films, the optimum doping concentration was found to be 2 mol%. While for PZTW films, the dielectric and ferroelectric properties were found to be improved as the doping concentration increased. The fatigue properties of PLZT and PZTW thin films were also investigated, the results showed that A- or B-site donor doping could improve the fatigue properties of PZT thin films. The theory of oxygen vacancy was used to explain the performance improvement caused by donor doping. (orig.)

  1. Effect of La and W dopants on dielectric and ferroelectric properties of PZT thin films prepared by sol-gel process

    Science.gov (United States)

    Xiao, Mi; Zhang, Zebin; Zhang, Weikang; Zhang, Ping

    2018-01-01

    La or W-doped lead zirconate titanate thin films (PLZT or PZTW) were prepared on platinized silicon substrates by sol-gel process. The effects of La or W dopant on the phase development, microstructure, dielectric and ferroelectric characteristics of films were studied. For PLZT films, the optimum doping concentration was found to be 2 mol%. While for PZTW films, the dielectric and ferroelectric properties were found to be improved as the doping concentration increased. The fatigue properties of PLZT and PZTW thin films were also investigated, the results showed that A- or B-site donor doping could improve the fatigue properties of PZT thin films. The theory of oxygen vacancy was used to explain the performance improvement caused by donor doping.

  2. High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper

    Science.gov (United States)

    Kim, Minkyu; Jeong, Jong Han; Lee, Hun Jung; Ahn, Tae Kyung; Shin, Hyun Soo; Park, Jin-Seong; Jeong, Jae Kyeong; Mo, Yeon-Gon; Kim, Hye Dong

    2007-05-01

    The authors report on the fabrication of thin film transistors (TFTs), which use an amorphous indium gallium zinc oxide (a-IGZO) channel, by rf sputtering at room temperature and for which the channel length and width are patterned by photolithography and dry etching. To prevent plasma damage to the active channel, a 100-nm-thick SiOx layer deposited by plasma enhanced chemical vapor deposition was adopted as an etch stopper structure. The a-IGZO TFT (W /L=10μm/50μm) fabricated on glass exhibited a high field-effect mobility of 35.8cm2/Vs, a subthreshold gate swing value of 0.59V/decade, a thrseshold voltage of 5.9V, and an Ion/off ratio of 4.9×106, which is acceptable for use as the switching transistor of an active-matrix TFT backplane.

  3. High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper

    International Nuclear Information System (INIS)

    Kim, Minkyu; Jeong, Jong Han; Lee, Hun Jung; Ahn, Tae Kyung; Shin, Hyun Soo; Park, Jin-Seong; Jeong, Jae Kyeong; Mo, Yeon-Gon; Kim, Hye Dong

    2007-01-01

    The authors report on the fabrication of thin film transistors (TFTs), which use an amorphous indium gallium zinc oxide (a-IGZO) channel, by rf sputtering at room temperature and for which the channel length and width are patterned by photolithography and dry etching. To prevent plasma damage to the active channel, a 100-nm-thick SiO x layer deposited by plasma enhanced chemical vapor deposition was adopted as an etch stopper structure. The a-IGZO TFT (W/L=10 μm/50 μm) fabricated on glass exhibited a high field-effect mobility of 35.8 cm 2 /V s, a subthreshold gate swing value of 0.59 V/decade, a thrseshold voltage of 5.9 V, and an I on/off ratio of 4.9x10 6 , which is acceptable for use as the switching transistor of an active-matrix TFT backplane

  4. Improvement in gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors using microwave irradiation

    Energy Technology Data Exchange (ETDEWEB)

    Jo, Kwang-Won; Cho, Won-Ju, E-mail: chowj@kw.ac.kr [Department of Electronic Materials Engineering, Kwangwoon University, 447-1, Wolgye-dong, Nowon-gu, Seoul 139-701 (Korea, Republic of)

    2014-11-24

    In this study, we evaluated the effects of microwave irradiation (MWI) post-deposition-annealing (PDA) treatment on the gate bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors (a-IGZO TFTs) and compared the results with a conventional thermal annealing PDA treatment. The MWI-PDA-treated a-IGZO TFTs exhibited enhanced electrical performance as well as improved long-term stability with increasing microwave power. The positive turn-on voltage shift (ΔV{sub ON}) as a function of stress time with positive bias and varying temperature was precisely modeled on a stretched-exponential equation, suggesting that charge trapping is a dominant mechanism in the instability of MWI-PDA-treated a-IGZO TFTs. The characteristic trapping time and average effective barrier height for electron transport indicate that the MWI-PDA treatment effectively reduces the defects in a-IGZO TFTs, resulting in a superior resistance against gate bias stress.

  5. Effect of Coercive Voltage and Charge Injection on Performance of a Ferroelectric-Gate Thin-Film Transistor

    Directory of Open Access Journals (Sweden)

    P. T. Tue

    2013-01-01

    Full Text Available We adopted a lanthanum oxide capping layer between semiconducting channel and insulator layers for fabrication of a ferroelectric-gate thin-film transistor memory (FGT which uses solution-processed indium-tin-oxide (ITO and lead-zirconium-titanate (PZT film as a channel layer and a gate insulator, respectively. Good transistor characteristics such as a high “on/off” current ratio, high channel mobility, and a large memory window of 108, 15.0 cm2 V−1 s−1, and 3.5 V were obtained, respectively. Further, a correlation between effective coercive voltage, charge injection effect, and FGT’s memory window was investigated. It is found that the charge injection from the channel to the insulator layer, which occurs at a high electric field, dramatically influences the memory window. The memory window’s enhancement can be explained by a dual effect of the capping layer: (1 a reduction of the charge injection and (2 an increase of effective coercive voltage dropped on the insulator.

  6. Frequency dispersion analysis of thin dielectric MOS capacitor in a five-element model

    Science.gov (United States)

    Zhang, Xizhen; Zhang, Sujuan; Zhu, Huichao; Pan, Xiuyu; Cheng, Chuanhui; Yu, Tao; Li, Xiangping; Cheng, Yi; Xing, Guichao; Zhang, Daming; Luo, Xixian; Chen, Baojiu

    2018-02-01

    An Al/ZrO2/IL/n-Si (IL: interface layer) MOS capacitor has been fabricated by metal organic decomposition of ZrO2 and thermal deposition Al. We have measured parallel capacitance (C m) and parallel resistance (R m) versus bias voltage curves (C m, R m-V) at different AC signal frequency (f), and C m, R m-f curves at different bias voltage. The curves of C m, R m-f measurements show obvious frequency dispersion in the range of 100 kHz-2 MHz. The energy band profile shows that a large voltage is applied on the ZrO2 layer and IL at accumulation, which suggests possible dielectric polarization processes by some traps in ZrO2 and IL. C m, R m-f data are used for frequency dispersion analysis. To exclude external frequency dispersion, we have extracted the parameters of C (real MOS capacitance), R p (parallel resistance), C IL (IL capacitance), R IL (IL resistance) and R s (Si resistance) in a five-element model by using a three-frequency method. We have analyzed intrinsic frequency dispersion of C, R p, C IL, R IL and R s by studying the dielectric characteristics and Si surface layer characteristics. At accumulation, the dispersion of C and R p is attributed to dielectric polarization such as dipolar orientation and oxide traps. The serious dispersion of C IL and R IL are relative to other dielectric polarization, such as border traps and fixed oxide traps. The dispersion of R s is mainly attributed to contact capacitance (C c) and contact resistance (R c). At depletion and inversion, the frequency dispersion of C, R p, C IL, R IL, and R s are mainly attributed to the depletion layer capacitance (C D). The interface trap capacitance (C it) and interface trap resistance (R it) are not dominant for the dispersion of C, R p, C IL, R IL, and R s.

  7. Optical constants, dispersion energy parameters and dielectric properties of ultra-smooth nanocrystalline BiVO4 thin films prepared by rf-magnetron sputtering

    Science.gov (United States)

    Sarkar, S.; Das, N. S.; Chattopadhyay, K. K.

    2014-07-01

    BiVO4 thin films have been prepared through radio frequency (rf) magnetron sputtering of a pre-fabricated BiVO4 target on ITO coated glass (ITO-glass) substrate and bare glass substrates. BiVO4 target material was prepared through solid-state reaction method by heating Bi2O3 and V2O5 mixture at 800 °C for 8 h. The films were characterized by X-ray diffraction, UV-Vis spectroscopy, LCR meter, field emission scanning electron microscopy, transmission electron microscopy and atomic force microscopy. BiVO4 thin films deposited on the ITO-glass substrate are much smoother compared to the thin films prepared on bare glass substrate. The rms surface roughness calculated from the AFM images comes out to be 0.74 nm and 4.2 nm for the films deposited on the ITO-glass substrate and bare glass substrate for the deposition time 150 min respectively. Optical constants and energy dispersion parameters of these extra-smooth BiVO4 thin films have been investigated in detail. Dielectric properties of the BiVO4 thin films on ITO-glass substrate were also investigated. The frequency dependence of dielectric constant of the BiVO4 thin films has been measured in the frequency range from 20 Hz to 2 MHz. It was found that the dielectric constant increased from 145 to 343 at 20 Hz as the film thickness increased from 90 nm to 145 nm (deposition time increased from 60 min to 150 min). It shows higher dielectric constant compared to the literature value of BiVO4.

  8. Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal - oxide - semiconductor field-effect transistors: Effective electron mobility

    International Nuclear Information System (INIS)

    Ragnarsson, L.-A degree.; Guha, S.; Copel, M.; Cartier, E.; Bojarczuk, N. A.; Karasinski, J.

    2001-01-01

    We report on high effective mobilities in yttrium-oxide-based n-channel metal - oxide - semiconductor field-effect transistors (MOSFETs) with aluminum gates. The yttrium oxide was grown in ultrahigh vacuum using a reactive atomic-beam-deposition system. Medium-energy ion-scattering studies indicate an oxide with an approximate composition of Y 2 O 3 on top of a thin layer of interfacial SiO 2 . The thickness of this interfacial oxide as well as the effective mobility are found to be dependent on the postgrowth anneal conditions. Optimum conditions result in mobilities approaching that of SiO 2 -based MOSFETs at higher fields with peak mobilities at approximately 210 cm 2 /Vs. [copyright] 2001 American Institute of Physics

  9. Perovskite oxynitride LaTiO{sub x}N{sub y} thin films: Dielectric characterization in low and high frequencies

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Y.; Ziani, A. [Institut d' Electronique et de Telecommunications de Rennes (IETR) UMR-CNRS 6164, groupe ' Antennes et Hyperfrequences' , University of Rennes 1, UEB, IUT Saint Brieuc, 18 rue Henri Wallon, 22004 Saint Brieuc cedex (France); Le Paven-Thivet, C., E-mail: claire.lepaven@univ-rennes1.fr [Institut d' Electronique et de Telecommunications de Rennes (IETR) UMR-CNRS 6164, groupe ' Antennes et Hyperfrequences' , University of Rennes 1, UEB, IUT Saint Brieuc, 18 rue Henri Wallon, 22004 Saint Brieuc cedex (France); Benzerga, R.; Le Gendre, L. [Institut d' Electronique et de Telecommunications de Rennes (IETR) UMR-CNRS 6164, groupe ' Antennes et Hyperfrequences' , University of Rennes 1, UEB, IUT Saint Brieuc, 18 rue Henri Wallon, 22004 Saint Brieuc cedex (France); Fasquelle, D. [Laboratoire d' Etude des Materiaux et des Composants pour l' Electronique (LEMCEL) UPRES-EA 2601, University of Littoral-Cote d' Opale, 50 rue Ferdinand Buisson, F-62228 Calais cedex (France); Kassem, H. [Laboratoire de l' Integration du Materiau au Systeme(IMS) UMR-CNRS 5218, groupe Materiaux, University of Bordeaux 1, 16 avenue Pey-Berland, 33607 Pessac (France); and others

    2011-11-01

    Lanthanum titanium oxynitride (LaTiO{sub x}N{sub y}) thin films are studied with respect to their dielectric properties in low and high frequencies. Thin films are deposited by radio frequency magnetron sputtering on different substrates. Effects of nitrogen content and crystalline quality on dielectric properties are investigated. In low-frequency range, textured LaTiO{sub x}N{sub y} thin films deposited on conductive single crystal Nb-STO show a dielectric constant {epsilon} Prime Almost-Equal-To 140 with low losses tan{delta} = 0.012 at 100 kHz. For the LaTiO{sub x}N{sub y} polycrystalline films deposited on conductive silicon substrates with platinum (Pt/Ti/SiO{sub 2}/Si), the tunability reached up to 57% for a weak electric field of 50 kV/cm. In high-frequency range, epitaxial LaTiO{sub x}N{sub y} films deposited on MgO substrate present a high dielectric constant with low losses ({epsilon} Prime Almost-Equal-To 170, tan{delta} = 0.011, 12 GHz).

  10. Enhanced polarization and dielectric properties of Pb(Zr1-xTix)O3 thin films

    Science.gov (United States)

    Ortega, N.; Kumar, Ashok; Katiyar, R. S.

    2008-10-01

    We report the fabrication of PbZr0.57Ti0.43O3 (PZT) thin films with preferential growth along (111) and random crystalline orientation on the platinized silicon substrates using pulsed laser deposition technique. X-ray diffraction patterns and surface morphology indicate increase in grain size and nucleation, which support better perovskite matrix with increase in annealing temperature. We observed large dielectric constant (˜4000) and enhanced remanent polarization 70 μC/cm2 at room temperature attributed to grain growth and intermetallic Pt-Pb transient phase. Frequency dependent polarization showed minor reduction in polarization above 10 kHz frequencies. Normalized fatigue characteristic of PZT thin films showed minimal 25% degradation in remanent polarization after 109 cycles, which may be useful for memory devices. ac conductivity spectra illustrated that anomaly near the phase transition temperature with activation energy (Ea˜0.60-0.75 eV) supports the intrinsic nature of ferroelectric phase transition.

  11. Capacitor Property and Leakage Current Mechanism of ZrO2 Thin Dielectric Films Prepared by Anodic Oxidation

    Science.gov (United States)

    Kamijyo, Masahiro; Onozuka, Tomotake; Shinkai, Satoko; Sasaki, Katsutaka; Yamane, Misao; Abe, Yoshio

    2003-07-01

    Polycrystalline ZrO2 thin film capacitors were prepared by anodizing sputter-deposited Zr films. Electrical measurements are performed for the parallel-plate anodized capacitors with an Al-ZrO2-Zr (metal-insulator-metal) structure, and a high capacitance density (0.6 μF/cm2) and a low dielectric loss of nearly 1% are obtained for a very thin-oxide capacitor anodized at 10 V. In addition, the leakage current density of this capacitor is about 1.8 × 10-8 A/cm2 at an applied voltage of 5 V. However, the leakage current is somewhat larger than that of a low-loss HfO2 capacitor. The leakage current density (J) of ZrO2 capacitors as a function of applied electric field (E) was investigated for several capacitors with different oxide thicknesses, by plotting \\ln(J) vs E1/2 curves. As a result, it is revealed that the conduction mechanism is due to the Poole-Frenkel effect, irrespective of the oxide thickness.

  12. Investigation of the correlation between dielectric function, thickness and morphology of nano-granular ZnO very thin films

    Energy Technology Data Exchange (ETDEWEB)

    Gilliot, Mickaël, E-mail: mickael.gilliot@univ-reims.fr [Laboratoire d' Ingénierie et Sciences des Matériaux, Université de Reims Champagne-Ardenne (France); Hadjadj, Aomar [Laboratoire d' Ingénierie et Sciences des Matériaux, Université de Reims Champagne-Ardenne (France); Martin, Jérôme [Laboratoire de Nanotechnologie et d' Instrumentation Optique, Université de Technologie de Troyes (France)

    2015-12-31

    Thin nano-granular ZnO layers were prepared using a sol–gel synthesis and spin-coating deposition process with a thickness ranging between 20 and 120 nm. The complex dielectric function (ϵ) of the ZnO film was determined from spectroscopic ellipsometry measurements. Up to a critical thickness close to 60 nm, the magnitude of both the real and the imaginary parts of ϵ rapidly increases and then slowly tends to values closer to the bulk ZnO material. This trend suggests a drastic change in the film porosity at both sides of this critical thickness, due to the pre-heating and post-crystallization processes, as confirmed by additional characterization of the structure and the morphology of the ZnO films. - Highlights: • c-Axis oriented ZnO thin films were grown with different morphological states. • The morphology and structures are controlled by controlling the thickness. • The optical properties are correlated to morphological evolution. • Two growth behaviors and property evolutions are identified around a critical thickness.

  13. Fabrication of air-stable n-type carbon nanotube thin-film transistors on flexible substrates using bilayer dielectrics.

    Science.gov (United States)

    Li, Guanhong; Li, Qunqing; Jin, Yuanhao; Zhao, Yudan; Xiao, Xiaoyang; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

    2015-11-14

    Single-walled carbon nanotube (SWNT) thin-film transistors hold great potential for flexible electronics. However, fabrication of air-stable n-type devices by methods compatible with standard photolithography on flexible substrates is challenging. Here, we demonstrated that by using a bilayer dielectric structure of MgO and atomic layer deposited (ALD) Al2O3 or HfO2, air-stable n-type devices can be obtained. The mechanism for conduction type conversion was elucidated and attributed to the hole depletion in SWNT, the decrease of the trap state density by MgO assimilating adsorbed water molecules in the vicinity of SWNT, and the energy band bending because of the positive fixed charges in the ALD layer. The key advantage of the method is the relatively low temperature (120 or 90 °C) required here for the ALD process because we need not employ this step to totally remove the absorbates on the SWNTs. This advantage facilitates the integration of both p-type and n-type transistors through a simple lift off process and compact CMOS inverters were demonstrated. We also demonstrated that the doping of SWNTs in the channel plays a more important role than the Schottky barriers at the metal contacts in carbon nanotube thin-film transistors, unlike the situation in individual SWNT-based transistors.

  14. Poole Frenkel current and Schottky emission in SiN gate dielectric in AlGaN/GaN metal insulator semiconductor heterostructure field effect transistors

    Science.gov (United States)

    Hanna, Mina J.; Zhao, Han; Lee, Jack C.

    2012-10-01

    We analyze the anomalous I-V behavior in SiN prepared by plasma enhanced chemical vapor deposition for use as a gate insulator in AlGaN/GaN metal insulator semiconductor heterostructure filed effect transistors (HFETs). We observe leakage current across the dielectric with opposite polarity with respect to the applied electric field once the voltage sweep reaches a level below a determined threshold. This is observed as the absolute minimum of the leakage current does not occur at minimum voltage level (0 V) but occurs earlier in the sweep interval. Curve-fitting analysis suggests that the charge-transport mechanism in this region is Poole-Frenkel current, followed by Schottky emission due to band bending. Despite the current anomaly, the sample devices have shown a notable reduction of leakage current of over 2 to 6 order of magnitudes compared to the standard Schottky HFET. We show that higher pressures and higher silane concentrations produce better films manifesting less trapping. This conforms to our results that we reported in earlier publications. We found that higher chamber pressure achieves higher sheet carrier concentration that was found to be strongly dependent on the trapped space charge at the SiN/GaN interface. This would suggest that a lower chamber pressure induces more trap states into the SiN/GaN interface.

  15. Dielectric aluminium phosphate thin films. Couches minces dielectriques de phosphate d'aluminium

    Energy Technology Data Exchange (ETDEWEB)

    Daviero, S. (Lab. Physicochimie des Materiaux Solides, 34 - Montpellier (France)); Avinens, C. (Lab. Physicochimie des Materiaux Solides, 34 - Montpellier (France)); Ibanez, A. (Lab. Physicochimie des Materiaux Solides, 34 - Montpellier (France)); Giuntini, J.C. (Lab. Physicochimie des Materiaux Solides, 34 -Montpellier (France)); Philippot, E. (Lab. Physicochimie des Materiaux Solides, 34 - Montpellier (France))

    1993-04-01

    Aluminium phosphate thin films on silicium substrate have been carried out from tributylphosphate and aluminium acetylacetonate precursors in solution through the ''pyrosol'' process. It can be observed a large range of chemical analysis in terms of experimental conditions. These thin films have been characterized by X-ray diffraction and infrared spectrometry. Their electrical characteristics, defined from direct current and alternative current measurements, are quite different to those of the crystallized phosphate and can be explained by P-O and Al-O ''dangling bond'' existence. (orig.).

  16. Plasma-Induced Damage on the Reliability of Hf-Based High-k/Dual Metal-Gates Complementary Metal Oxide Semiconductor Technology

    International Nuclear Information System (INIS)

    Weng, W.T.; Lin, H.C.; Huang, T.Y.; Lee, Y.J.; Lin, H.C.

    2009-01-01

    This study examines the effects of plasma-induced damage (PID) on Hf-based high-k/dual metal-gates transistors processed with advanced complementary metal-oxide-semiconductor (CMOS) technology. In addition to the gate dielectric degradations, this study demonstrates that thinning the gate dielectric reduces the impact of damage on transistor reliability including the positive bias temperature instability (PBTI) of n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs) and the negative bias temperature instability (NBTI) of p-channel MOSFETs. This study shows that high-k/metal-gate transistors are more robust against PID than conventional SiO 2 /poly-gate transistors with similar physical thickness. Finally this study proposes a model that successfully explains the observed experimental trends in the presence of PID for high-k/metal-gate CMOS technology.

  17. ALD TiO2 thin film as dielectric for Al/p-Si Schottky diode

    Indian Academy of Sciences (India)

    Abstract. Electrical analysis of Al/p-Si Schottky diode with titanium dioxide (TiO2) thin film was performed at ..... This work was partially supported by The Management Unit of Scientific Research Project of Bozok University and Hitit. University.

  18. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

    International Nuclear Information System (INIS)

    Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

    2008-01-01

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter

  19. Stability and band offsets between c-plane ZnO semiconductor and LaAlO3 gate dielectric

    Science.gov (United States)

    Wang, Jianli; Chen, Xinfeng; Wu, Shuyin; Tang, Gang; Zhang, Junting; Stampfl, C.

    2018-03-01

    Wurtzite-perovskite heterostructures composed of a high dielectric constant oxide and a wide bandgap semiconductor envision promising applications in field-effect transistors. In the present paper, the structural and electronic properties of LaAlO3/ZnO heterojunctions are investigated by first-principles calculations. We study the initial adsorption of La, Al, and oxygen atoms on ZnO (0001) and (000 1 ¯ ) surfaces and find that La atoms may occupy interstitial sites during the growth of stoichiometric ZnO (0001). The band gap of the stoichiometric ZnO (0001) surface is smaller than that of the stoichiometric ZnO (000 1 ¯ ) surface. The surface formation energy indicates that La or Al atoms may substitute Zn atoms at the nonstoichiometric ZnO (0001) surface. The atomic charges, electronic density of states, and band offsets are analyzed for the optimized LaAlO3/ZnO heterojunctions. There is a band gap for the LaAlO3/ZnO (000 1 ¯ ) heterostructures, and the largest variation in charge occurs at the surface or interface. Our results suggest that the Al-terminated LaAlO3/ZnO (000 1 ¯ ) interfaces are suitable for the design of metal oxide semiconductor devices because the valence and conduction band offsets are both larger than 1 eV and the interface does not produce any in-gap states.

  20. Current Enhancement with Contact-Area-Limited Doping for Bottom-Gate, Bottom-Contact Organic Thin-Film Transistors

    Science.gov (United States)

    Noda, Kei; Wakatsuki, Yusuke; Yamagishi, Yuji; Wada, Yasuo; Toyabe, Toru; Matsushige, Kazumi

    2013-02-01

    The current enhancement mechanism in contact-area-limited doping for bottom-gate, bottom-contact (BGBC) p-channel organic thin-film transistors (OTFTs) was investigated both by simulation and experiment. Simulation results suggest that carrier shortage and large potential drop occur in the source-electrode/channel interface region in a conventional BGBC OTFT during operation, which results in a decrease in the effective field-effect mobility. These phenomena are attributed to the low carrier concentration of active semiconductor layers in OTFTs and can be alleviated by contact-area-limited doping, where highly doped layers are prepared over source-drain electrodes. According to two-dimensional current distribution obtained from the device simulation, a current flow from the source electrode to the channel region via highly doped layers is generated in addition to the direct carrier injection from the source electrode to the channel, leading to the enhancement of the drain current and effective field-effect mobility. The expected current enhancement mechanism in contact-area-limited doping was experimentally confirmed in typical α-sexithiophene (α-6T) BGBC thin-film transistors.

  1. Dependent lung opacity at thin-section CT: evaluation by spirometrically-gated CT of the influence of lung volume

    International Nuclear Information System (INIS)

    Lee, Ki Nam; Yoon, Seong Kuk; Sohn, Choon Hee; Choi, Pil Jo; Webb, W. Richard

    2002-01-01

    To evaluate the influence of lung volume on dependent lung opacity seen at thin-section CT. In thirteen healthy volunteers, thin-section CT scans were performed at three levels (upper, mid, and lower portion of the lung) and at different lung volumes (10, 30, 50, and 100% vital capacity), using spirometric gated CT. Using a three-point scale, two radiologists determined whether dependent opacity was present, and estimated its degree. Regional lung attenuation at a level 2 cm above the diaphragm was determined using semiautomatic segmentation, and the diameter of a branch of the right lower posterior basal segmental artery was measured at each different vital capacity. At all three anatomic levels, dependent opacity occurred significantly more often at lower vital capacities (10, 30%) than at 100% vital capacity (p = 0.001). Visually estimated dependent opacity was significantly related to regional lung attenuation (p < 0.0001), which in dependent areas progressively increased as vital capacity decreased (p < 0.0001). The presence of dependent opacity and regional lung attenuation of a dependent area correlated significantly with increased diameter of a segmental arterial branch (r = 0.493 and p = 0.0002; r = 0.486 and p 0.0003, respectively). Visual estimation and CT measurements of dependent opacity obtained by semiautomatic segmentation are significantly influenced by lung volume and are related to vascular diameter

  2. Sensitivity enhancement of metal oxide thin film transistor with back gate biasing

    NARCIS (Netherlands)

    Dam, V.A.T.; Blauw, M.A.; Brongersma, S.H.; Crego-Calama, M.

    2011-01-01

    In this work, a room-temperature sensing device for detecting carbon monoxide using a ZnO thin film is presented. The ZnO layer (thickness close to the Debye length), which has a polycrystalline structure, is deposited with atomic-layer deposition (ALD) on an Al2O3/Si substrate. The operating

  3. Balancing hole and electron conduction in ambipolar split-gate thin-film Transistors

    NARCIS (Netherlands)

    Yoo, H.; Ghittorelli, M.; Lee, D.-K.; Smits, E.C.P.; Gelinck, G.H.; Ahn, H.; Lee, H.-K.; Torricelli, F.; Kim, J.-J.

    2017-01-01

    Complementary organic electronics is a key enabling technology for the development of new applications including smart ubiquitous sensors, wearable electronics, and healthcare devices. High-performance, high-functionality and reliable complementary circuits require n- and p-type thin-film

  4. Investigation of interface property in Al/SiO2/ n-SiC structure with thin gate oxide by illumination

    Science.gov (United States)

    Chang, P. K.; Hwu, J. G.

    2017-04-01

    The reverse tunneling current of Al/SiO2/ n-SiC structure employing thin gate oxide is introduced to examine the interface property by illumination. The gate current at negative bias decreases under blue LED illumination, yet increases under UV lamp illumination. Light-induced electrons captured by interface states may be emitted after the light sources are off, leading to the recovery of gate currents. Based on transient characteristics of gate current, the extracted trap level is close to the light energy for blue LED, indicating that electron capture induced by lighting may result in the reduction of gate current. Furthermore, bidirectional C- V measurements exhibit a positive voltage shift caused by electron trapping under blue LED illumination, while a negative voltage shift is observed under UV lamp illumination. Distinct trapping and detrapping behaviors can be observed from variations in I- V and C- V curves utilizing different light sources for 4H-SiC MOS capacitors with thin insulators.

  5. Interface engineering of semiconductor/dielectric heterojunctions toward functional organic thin-film transistors.

    Science.gov (United States)

    Zhang, Hongtao; Guo, Xuefeng; Hui, Jingshu; Hu, Shuxin; Xu, Wei; Zhu, Daoben

    2011-11-09

    Interface modification is an effective and promising route for developing functional organic field-effect transistors (OFETs). In this context, however, researchers have not created a reliable method of functionalizing the interfaces existing in OFETs, although this has been crucial for the technological development of high-performance CMOS circuits. Here, we demonstrate a novel approach that enables us to reversibly photocontrol the carrier density at the interface by using photochromic spiropyran (SP) self-assembled monolayers (SAMs) sandwiched between active semiconductors and gate insulators. Reversible changes in dipole moment of SPs in SAMs triggered by lights with different wavelengths produce two distinct built-in electric fields on the OFET that can modulate the channel conductance and consequently threshold voltage values, thus leading to a low-cost noninvasive memory device. This concept of interface functionalization offers attractive new prospects for the development of organic electronic devices with tailored electronic and other properties.

  6. AC electrical conductivity and dielectric relaxation studies on n-type organic thin films of N, N‧-Dimethyl-3,4,9,10-perylenedicarboximide (DMPDC)

    Science.gov (United States)

    Qashou, Saleem I.; Darwish, A. A. A.; Rashad, M.; Khattari, Z.

    2017-11-01

    Both Alternating current (AC) conductivity and dielectric behavior of n-type organic thin films of N, N‧-Dimethyl-3,4,9,10-perylenedicarboximide (DMPDC) have been investigated. Fourier transformation infrared (FTIR) spectroscopy is used for identifying both powder and film bonds which confirm that there are no observed changes in the bonds between the DMPDC powder and evaporated films. The dependence of AC conductivity on the temperature for DMPDC evaporated films was explained by the correlated barrier hopping (CBH) model. The calculated barrier height using CBH model shows a decreasing behavior with increasing temperature. The mechanism of dielectric relaxation was interpreted on the basis of the modulus of the complex dielectric. The calculated activation energy of the relaxation process was found to be 0.055 eV.

  7. Ultra-thin films of polysilsesquioxanes possessing 3-methacryloxypropyl groups as gate insulator for organic field-effect transistors

    International Nuclear Information System (INIS)

    Nakahara, Yoshio; Kawa, Haruna; Yoshiki, Jun; Kumei, Maki; Yamamoto, Hiroyuki; Oi, Fumio; Yamakado, Hideo; Fukuda, Hisashi; Kimura, Keiichi

    2012-01-01

    Polysilsesquioxanes (PSQs) possessing 3-methacryloxypropyl groups as an organic moiety of the side chain were synthesized by sol–gel condensation copolymerization of the corresponding trialkoxysilanes. The ultra-thin PSQ film with a radical initiator and a cross-linking agent was prepared by a spin-coating method, and the film was cured integrally at low temperatures of less than 120 °C through two different kinds of polymeric reactions, which were radical polymerization of vinyl groups and sol–gel condensation polymerization of terminated silanol and alkoxy groups. The obtained PSQ film showed the almost perfect solubilization resistance to acetone, which is a good solvent of PSQ before polymerization. It became clear by atomic force microscopy observation that the surface of the PSQ film was very smooth at a nano-meter level. Furthermore, pentacene-based organic field-effect transistor (OFET) with the PSQ film as a gate insulator showed typical p-channel enhancement mode operation characteristics and therefore the ultra-thin PSQ film has the potential to be applicable for solution-processed OFET systems. - Highlights: ► Polysilsesquioxanes (PSQs) possessing 3-methacryloxypropyl groups were synthesized. ► The ultra-thin PSQ film could be cured at low temperatures of less than 120 °C. ► The PSQ film showed the almost perfect solubilization resistance to organic solvent. ► The surface of the PSQ film was very smooth at a nano-meter level. ► Pentacene-based organic field-effect transistor with the PSQ film was fabricated.

  8. Ultra-thin films of polysilsesquioxanes possessing 3-methacryloxypropyl groups as gate insulator for organic field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Nakahara, Yoshio; Kawa, Haruna [Department of Applied Chemistry, Faculty of Systems Engineering, Wakayama University, 930 Sakae-dani, Wakayama 640-8510 (Japan); Yoshiki, Jun [Division of Information and Electronic Engineering, Faculty of Engineering, Muroran Institute of Technology, 27-1 Mizumoto-cho, Muroran 050-8585 (Japan); Kumei, Maki; Yamamoto, Hiroyuki; Oi, Fumio [Konishi Chemical IND. Co., LTD., 3-4-77 Kozaika, Wakayama 641-0007 (Japan); Yamakado, Hideo [Department of Applied Chemistry, Faculty of Systems Engineering, Wakayama University, 930 Sakae-dani, Wakayama 640-8510 (Japan); Fukuda, Hisashi [Division of Engineering for Composite Functions, Faculty of Engineering, Muroran Institute of Technology, 27-1 Mizumoto-cho, Muroran 050-8585 (Japan); Kimura, Keiichi, E-mail: kkimura@center.wakayama-u.ac.jp [Department of Applied Chemistry, Faculty of Systems Engineering, Wakayama University, 930 Sakae-dani, Wakayama 640-8510 (Japan)

    2012-10-01

    Polysilsesquioxanes (PSQs) possessing 3-methacryloxypropyl groups as an organic moiety of the side chain were synthesized by sol-gel condensation copolymerization of the corresponding trialkoxysilanes. The ultra-thin PSQ film with a radical initiator and a cross-linking agent was prepared by a spin-coating method, and the film was cured integrally at low temperatures of less than 120 Degree-Sign C through two different kinds of polymeric reactions, which were radical polymerization of vinyl groups and sol-gel condensation polymerization of terminated silanol and alkoxy groups. The obtained PSQ film showed the almost perfect solubilization resistance to acetone, which is a good solvent of PSQ before polymerization. It became clear by atomic force microscopy observation that the surface of the PSQ film was very smooth at a nano-meter level. Furthermore, pentacene-based organic field-effect transistor (OFET) with the PSQ film as a gate insulator showed typical p-channel enhancement mode operation characteristics and therefore the ultra-thin PSQ film has the potential to be applicable for solution-processed OFET systems. - Highlights: Black-Right-Pointing-Pointer Polysilsesquioxanes (PSQs) possessing 3-methacryloxypropyl groups were synthesized. Black-Right-Pointing-Pointer The ultra-thin PSQ film could be cured at low temperatures of less than 120 Degree-Sign C. Black-Right-Pointing-Pointer The PSQ film showed the almost perfect solubilization resistance to organic solvent. Black-Right-Pointing-Pointer The surface of the PSQ film was very smooth at a nano-meter level. Black-Right-Pointing-Pointer Pentacene-based organic field-effect transistor with the PSQ film was fabricated.

  9. Chemical and Electronic Structure Studies of Refractory and Dielectric Thin Films.

    Science.gov (United States)

    Corneille, Jason Stephen

    This study presents the synthesis and characterization of oxide and refractory thin films under varying conditions. The deposition of the thin films is performed under vacuum conditions. The characterization of the growth, as well as the chemical and electronic properties of the thin films was accomplished using a broad array of surface analytical techniques. These model studies describe the relationship between the preparative processes and the stoichiometry, structure and electronic properties of the film products. From these efforts, the optimal deposition conditions for the production of high quality films have been established. The thin film oxides synthesized and studied here include magnesium oxide, silicon oxide and iron oxide. These oxides were synthesized on a refractory substrate using both post oxidation of thin films as well as reactive vapor deposition of the metals in the presence of an oxygen background. Comparisons and contrasts are presented for the various systems. Metallic magnesium films were grown and characterized as a preliminary study to the synthesis of magnesium oxide. Magnesium oxide (MgO(100)) was synthesized on Mo(100) by evaporating magnesium at a rate of one monolayer per minute in an oxygen background pressure of 1 times 10 ^{-6} Torr at room temperature. The resulting film was found to exhibit spectroscopic characteristics quite similar to those observed for bulk MgO. The acid/base characteristics of the films were studied using carbon monoxide, water and methanol as probe molecules. The film was found to exhibit essentially the same chemical properties as found in analogous powdered catalysts. Silicon dioxide was synthesized by evaporating silicon onto Mo(100) in an oxygen ambient. It is shown that the silicon oxide prepared at room temperature with a silicon deposition rate of {~ }{1.2}A/min and an oxygen pressure of 2 times 10^{ -8} Torr, consisted of predominantly silicon dioxide with a small fraction of suboxides. Annealing to

  10. Poly(4-vinylphenol gate insulator with cross-linking using a rapid low-power microwave induction heating scheme for organic thin-film-transistors

    Directory of Open Access Journals (Sweden)

    Ching-Lin Fan

    2016-03-01

    Full Text Available A Microwave-Induction Heating (MIH scheme is proposed for the poly(4-vinylphenol (PVP gate insulator cross-linking process to replace the traditional oven heating cross-linking process. The cross-linking time is significantly decreased from 1 h to 5 min by heating the metal below the PVP layer using microwave irradiation. The necessary microwave power was substantially reduced to about 50 W by decreasing the chamber pressure. The MIH scheme is a good candidate to replace traditional thermal heating for cross-linking of PVP as the gate insulator for organic thin-film-transistors.

  11. Poly(4-vinylphenol) gate insulator with cross-linking using a rapid low-power microwave induction heating scheme for organic thin-film-transistors

    Science.gov (United States)

    Fan, Ching-Lin; Shang, Ming-Chi; Hsia, Mao-Yuan; Wang, Shea-Jue; Huang, Bohr-Ran; Lee, Win-Der

    2016-03-01

    A Microwave-Induction Heating (MIH) scheme is proposed for the poly(4-vinylphenol) (PVP) gate insulator cross-linking process to replace the traditional oven heating cross-linking process. The cross-linking time is significantly decreased from 1 h to 5 min by heating the metal below the PVP layer using microwave irradiation. The necessary microwave power was substantially reduced to about 50 W by decreasing the chamber pressure. The MIH scheme is a good candidate to replace traditional thermal heating for cross-linking of PVP as the gate insulator for organic thin-film-transistors.

  12. C-V characterization of Schottky- and MIS-gate SiGe/Si HEMT structures

    International Nuclear Information System (INIS)

    Onojima, Norio; Kasamatsu, Akihumi; Hirose, Nobumitsu; Mimura, Takashi; Matsui, Toshiaki

    2008-01-01

    Electrical properties of Schottky- and metal-insulator-semiconductor (MIS)-gate SiGe/Si high electron mobility transistors (HEMTs) were investigated with capacitance-voltage (C-V) measurements. The MIS-gate HEMT structure was fabricated using a SiN gate insulator formed by catalytic chemical vapor deposition (Cat-CVD). The Cat-CVD SiN thin film (5 nm) was found to be an effective gate insulator with good gate controllability and dielectric properties. We previously investigated device characteristics of sub-100-nm-gate-length Schottky- and MIS-gate HEMTs, and reported that the MIS-gate device had larger maximum drain current density and transconductance (g m ) than the Schottky-gate device. The radio frequency (RF) measurement of the MIS-gate device, however, showed a relatively lower current gain cutoff frequency f T compared with that of the Schottky-gate device. In this study, C-V characterization of the MIS-gate HEMT structure demonstrated that two electron transport channels existed, one at the SiGe/Si buried channel and the other at the SiN/Si surface channel

  13. C-V characterization of Schottky- and MIS-gate SiGe/Si HEMT structures

    Energy Technology Data Exchange (ETDEWEB)

    Onojima, Norio [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan)], E-mail: nonojima@nict.go.jp; Kasamatsu, Akihumi; Hirose, Nobumitsu [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan); Mimura, Takashi [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan); Fujitsu Laboratories Ltd., Atsugi, Kanagawa 243-0197 (Japan); Matsui, Toshiaki [National Institute of Information and Communications Technology (NICT), Koganei, Tokyo 184-8795 (Japan)

    2008-07-30

    Electrical properties of Schottky- and metal-insulator-semiconductor (MIS)-gate SiGe/Si high electron mobility transistors (HEMTs) were investigated with capacitance-voltage (C-V) measurements. The MIS-gate HEMT structure was fabricated using a SiN gate insulator formed by catalytic chemical vapor deposition (Cat-CVD). The Cat-CVD SiN thin film (5 nm) was found to be an effective gate insulator with good gate controllability and dielectric properties. We previously investigated device characteristics of sub-100-nm-gate-length Schottky- and MIS-gate HEMTs, and reported that the MIS-gate device had larger maximum drain current density and transconductance (g{sub m}) than the Schottky-gate device. The radio frequency (RF) measurement of the MIS-gate device, however, showed a relatively lower current gain cutoff frequency f{sub T} compared with that of the Schottky-gate device. In this study, C-V characterization of the MIS-gate HEMT structure demonstrated that two electron transport channels existed, one at the SiGe/Si buried channel and the other at the SiN/Si surface channel.

  14. Effect of dielectric layers on device stability of pentacene-based field-effect transistors.

    Science.gov (United States)

    Di, Chong-an; Yu, Gui; Liu, Yunqi; Guo, Yunlong; Sun, Xiangnan; Zheng, Jian; Wen, Yugeng; Wang, Ying; Wu, Weiping; Zhu, Daoben

    2009-09-07

    We report stable organic field-effect transistors (OFETs) based on pentacene. It was found that device stability strongly depends on the dielectric layer. Pentacene thin-film transistors based on the bare or polystyrene-modified SiO(2) gate dielectrics exhibit excellent electrical stabilities. In contrast, the devices with the octadecyltrichlorosilane (OTS)-treated SiO(2) dielectric layer showed the worst stabilities. The effects of the different dielectrics on the device stabilities were investigated. We found that the surface energy of the gate dielectric plays a crucial role in determining the stability of the pentacene thin film, device performance and degradation of electrical properties. Pentacene aggregation, phase transfer and film morphology are also important factors that influence the device stability of pentacene devices. As a result of the surface energy mismatch between the dielectric layer and organic semiconductor, the electronic performance was degraded. Moreover, when pentacene was deposited on the OTS-treated SiO(2) dielectric layer with very low surface energy, pentacene aggregation occurred and resulted in a dramatic decrease of device performance. These results demonstrated that the stable OFETs could be obtained by using pentacene as a semiconductor layer.

  15. Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium–gallium–zinc oxide gate stack

    Science.gov (United States)

    Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

    2018-07-01

    We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium–gallium–zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>104). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

  16. Investigating degradation behavior of InGaZnO thin-film transistors induced by charge-trapping effect under DC and AC gate bias stress

    International Nuclear Information System (INIS)

    Hsieh, Tien-Yu; Chang, Ting-Chang; Chen, Te-Chih; Tsai, Ming-Yen; Chen, Yu-Te

    2013-01-01

    This paper investigates the degradation mechanism of amorphous InGaZnO thin-film transistors under DC and AC gate bias stress. Comparing the degradation behavior at equal accumulated effective stress time, more pronounced threshold voltage shift under AC positive gate bias stress in comparison with DC stress indicates extra electron-trapping phenomenon that occurs in the duration of rising/falling time in pulse. Contrarily, illuminated AC negative gate bias stress exhibits much less threshold voltage shift than DC stress, suggesting that the photo-generated hole does not have sufficient time to drift to the interface of IGZO/gate insulator and causes hole-trapping under AC operation. Since the evolution of threshold voltage fits the stretched-exponential equation well, the different degradation tendencies under DC/AC stress can be attributed to the different electron- and hole-trapping efficiencies, and this is further verified by varying pulse waveform. - Highlights: ► Static and dynamic gate bias stresses are imposed on InGaZnO TFTs. ► Dynamic positive gate bias induces more pronounced threshold voltage shift. ► Static negative-bias illumination stress induces more severe threshold voltage shift. ► Evolution of threshold voltage fits the stretched-exponential equation well

  17. Synaptic behaviors of thin-film transistor with a Pt/HfO x /n-type indium-gallium-zinc oxide gate stack.

    Science.gov (United States)

    Yang, Paul; Park, Daehoon; Beom, Keonwon; Kim, Hyung Jun; Kang, Chi Jung; Yoon, Tae-Sik

    2018-07-20

    We report a variety of synaptic behaviors in a thin-film transistor (TFT) with a metal-oxide-semiconductor gate stack that has a Pt/HfO x /n-type indium-gallium-zinc oxide (n-IGZO) structure. The three-terminal synaptic TFT exhibits a tunable synaptic weight with a drain current modulation upon repeated application of gate and drain voltages. The synaptic weight modulation is analog, voltage-polarity dependent reversible, and strong with a dynamic range of multiple orders of magnitude (>10 4 ). This modulation process emulates biological synaptic potentiation, depression, excitatory-postsynaptic current, paired-pulse facilitation, and short-term to long-term memory transition behaviors as a result of repeated pulsing with respect to the pulse amplitude, width, repetition number, and the interval between pulses. These synaptic behaviors are interpreted based on the changes in the capacitance of the Pt/HfO x /n-IGZO gate stack, the channel mobility, and the threshold voltage that result from the redistribution of oxygen ions by the applied gate voltage. These results demonstrate the potential of this structure for three-terminal synaptic transistor using the gate stack composed of the HfO x gate insulator and the IGZO channel layer.

  18. Design and fabrication of multi-dielectric thin film laser filters and mirrors

    International Nuclear Information System (INIS)

    Alsous, M. B.

    2005-01-01

    Multi-dielectric-film optical filters have designed as mirrors for frequency-doubled-Nd-YAG pumped Raman lasers at different wavelengths (435, 369.9, 319.8, 953.6, 683 nm), and for use in CVL pumped dye lasers: as beam-splitters, antireflection filters, and narrow-band filters. In this work, a theoretical design of these mirrors and filters is given. The treatment and optimization of these designs is detailed in order to overcome the difficulties and reach the final and suitable designs for our needs. In addition, we will describe the evaporation method and the best conditions to do it. These filters should be easy to make and able to resist the laser powers of the pulsed Nd-YAG laser (200mJ/pulse) and the output power of the CVL. Thus, we have adopted designs with the least number of layers and used materials and oxides, which could resist to high laser powers. These filters were tested with laser shots and the convenient designs that were able to support the laser power have been adopted. (Author)

  19. Near-field microwave detection of corrosion precursor pitting under thin dielectric coatings in metallic substrate

    International Nuclear Information System (INIS)

    Hughes, D.; Zoughi, R.; Austin, R.; Wood, N.; Engelbart, R.

    2003-01-01

    Detection of corrosion precursor pitting on metallic surfaces under various coatings and on bare metal is of keen interest in evaluation of aircraft fuselage. Near-field microwave nondestructive testing methods, utilizing open-ended rectangular waveguides and coaxial probes, have been used extensively for detection of surface flaws in metals, both on bare metal and under a dielectric coating. This paper presents the preliminary results of using microwave techniques to detect corrosion precursor pitting under paint and primer, applique and on bare metal. Machined pits of 500 μm diameter were detected using open-ended rectangular waveguides at V-Band under paint and primer and applique, and on bare metal. Using coaxial probes, machined pits with diameters down to 150 μm on bare metal were also detected. Relative pit size and density were shown on a corrosion-pitted sample using open-ended rectangular waveguides at frequencies of 35 GHz to 70 GHz. The use of Boeing's MAUS TM scanning systems provided improved results by alleviating standoff variation and scanning artifact. Typical results of this investigation are also presented

  20. Dielectric properties of thin C r2O3 films grown on elemental and oxide metallic substrates

    Science.gov (United States)

    Mahmood, Ather; Street, Michael; Echtenkamp, Will; Kwan, Chun Pui; Bird, Jonathan P.; Binek, Christian

    2018-04-01

    In an attempt to optimize leakage characteristics of α-C r2O3 thin films, its dielectric properties were investigated at local and macroscopic scale. The films were grown on Pd(111), Pt(111), and V2O3 (0001), supported on A l2O3 substrate. The local conductivity was measured by conductive atomic force microscopy mapping of C r2O3 surfaces, which revealed the nature of defects that formed conducting paths with the bottom Pd or Pt layer. A strong correlation was found between these electrical defects and the grain boundaries revealed in the corresponding topographic scans. In comparison, the C r2O3 film on V2O3 exhibited no leakage paths at similar tip bias value. Electrical resistance measurements through e-beam patterned top electrodes confirmed the resistivity mismatch between the films grown on different electrodes. The x-ray analysis attributes this difference to the twin free C r2O3 growth on V2O3 seeding.

  1. Formation and dielectric properties of polyelectrolyte multilayers studied by a silicon-on-insulator based thin film resistor.

    Science.gov (United States)

    Neff, Petra A; Wunderlich, Bernhard K; Klitzing, Regine V; Bausch, Andreas R

    2007-03-27

    The formation of polyelectrolyte multilayers (PEMs) is investigated using a silicon-on-insulator based thin film resistor which is sensitive to variations of the surface potential. The buildup of the PEMs at the silicon oxide surface of the device can be observed in real time as defined potential shifts. The influence of polymer charge density is studied using the strong polyanion poly(styrene sulfonate), PSS, combined with the statistical copolymer poly(diallyl-dimethyl-ammoniumchloride-stat-N-methyl-N-vinylacetamide), P(DADMAC-stat-NMVA), at various degrees of charge (DC). The multilayer formation stops after a few deposition steps for a DC below 75%. We show that the threshold of surface charge compensation corresponds to the threshold of multilayer formation. However, no reversion of the preceding surface charge was observed. Screening of polyelectrolyte charges by mobile ions within the polymer film leads to a decrease of the potential shifts with the number of layers deposited. This decrease is much slower for PEMs consisting of P(DADMAC-stat-NMVA) and PSS as compared to PEMs consisting of poly(allylamine-hydrochloride), PAH, and PSS. From this, significant differences in the dielectric constants of the polyelectrolyte films and in the concentration of mobile ions within the films can be derived.

  2. Corrosion in low dielectric constant Si-O based thin films: Buffer concentration effects

    International Nuclear Information System (INIS)

    Zeng, F. W.; Lane, M. W.; Gates, S. M.

    2014-01-01

    Organosilicate glass (OSG) is often used as an interlayer dielectric (ILD) in high performance integrated circuits. OSG is a brittle material and prone to stress-corrosion cracking reminiscent of that observed in bulk glasses. Of particular concern are chemical-mechanical planarization techniques and wet cleans involving solvents commonly encountered in microelectronics fabrication where the organosilicate film is exposed to aqueous environments. Previous work has focused on the effect of pH, surfactant, and peroxide concentration on the subcritical crack growth of these films. However, little or no attention has focused on the effect of the conjugate acid/base concentration in a buffer. Accordingly, this work examines the “strength” of the buffer solution in both acidic and basic environments. The concentration of the buffer components is varied keeping the ratio of acid/base and therefore pH constant. In addition, the pH was varied by altering the acid/base ratio to ascertain any additional effect of pH. Corrosion tests were conducted with double-cantilever beam fracture mechanics specimens and fracture paths were verified with ATR-FTIR. Shifts in the threshold fracture energy, the lowest energy required for bond rupture in the given environment, G TH , were found to shift to lower values as the concentration of the base in the buffer increased. This effect was found to be much larger than the effect of the hydroxide ion concentration in unbuffered solutions. The results are rationalized in terms of the salient chemical bond breaking process occurring at the crack tip and modeled in terms of the chemical potential of the reactive species

  3. Ac conductivity and dielectric spectroscopy studies on tin oxide thin films formed by spray deposition technique

    Energy Technology Data Exchange (ETDEWEB)

    Barış, Behzad, E-mail: behzadbaris@gmail.com

    2014-04-01

    Au/tin oxide/n-Si (1 0 0) structure has been created by forming a tin oxide (SnO{sub 2}) on n-type Si by using the spray deposition technique. The ac electrical conductivity (σ{sub ac}) and dielectric properties of the structure have been investigated between 30 kHz and 1 MHz at room temperature. The values of ε', ε″, tanδ, σ{sub ac}, M' and M″ were determined as 1.404, 0.357, 0.253, 1.99×10{sup −7} S/cm, 0.665 and 0.168 for 1 MHz and 6.377, 6.411, 1.005, 1.07×10{sup −7} S/cm, 0.077 and 0.078 for 30 kHz at zero bias, respectively. These changes were attributed to variation of the charge carriers from the interface traps located between semiconductor and metal in the band gap. It is concluded that the values of the ε', ε″ and tanδ increase with decreasing frequency while a decrease is seen in σ{sub ac} and the real (M') and imaginary (M″) components of the electrical modulus. The M″ parameter of the structure has a relaxation peak as a function of frequency for each examined voltage. The relaxation time of M″(τ{sub M″}) varies from 0.053 ns to 0.018 ns with increasing voltage. The variation of Cole–Cole plots of the sample shows that there is one relaxation.

  4. Influence of gating design on microstructure and fluidity of thin sections AA320.0 cast hypo-eutectic Al-Si alloy

    Science.gov (United States)

    Ramadan, Mohamed

    2018-05-01

    Influence of gating design especially number of ingrates on microstructure and fluidity of thin sections of 2, 4, 6 mm AA320.0 cast hypo-eutectic Al-Si alloy was evaluated for sand casting molding technique. Increasing the number of ingates improves the microstructe to be fine and more globular. About 87 μm of α-Al grain size, 0.6 α-Al grain sphericity and 37 μm dendrite arm spacing DAS are achieved by using 4 ingates in gating system. Increasing the number of ingates up to 3 increases hardness, filling area and related fluditiy of all cast samples. The minimum thickness of 2.5 mm for each ingate should be considered in order to successfully production of high quality light weight thin sections castings in sand mold.

  5. In-Ga-Zn-oxide thin-film transistors with Sb2TeOx gate insulators fabricated by reactive sputtering using a metallic Sb2Te target

    International Nuclear Information System (INIS)

    Cheong, Woo-Seok

    2011-01-01

    Using reactive sputtering, we made transparent amorphous Sb 2 TeO x thin films from a metallic Sb 2 Te target in an oxidizing atmosphere. In-Ga-Zn-oxide thin-film transistors (IGZO TFTs) with Sb 2 TeO x gate insulators deposited at room temperature showed a large hysteresis with a counter clockwise direction, which was caused by mobile charges in the gate insulators. The problems of the mobile charges was solved by using Sb 2 TeO x films formed at 250 .deg. C. After the IGZO TFT had been annealed at 200 .deg. C for 1 hour in an O 2 ambient, the mobility of the IGZO TFT was 22.41 cm 2 /Vs, and the drain current on-off ratio was ∼10 8 .

  6. Radiation induced leakage current and stress induced leakage current in ultra-thin gate oxides

    International Nuclear Information System (INIS)

    Ceschia, M.; Paccagnella, A.; Cester, A.; Scarpa, A.

    1998-01-01

    Low-field leakage current has been measured in thin oxides after exposure to ionizing radiation. This Radiation Induced Leakage Current (RILC) can be described as an inelastic tunneling process mediated by neutral traps in the oxide, with an energy loss of about 1 eV. The neutral trap distribution is influenced by the oxide field applied during irradiation, thus indicating that the precursors of the neutral defects are charged, likely being defects associated to trapped holes. The maximum leakage current is found under zero-field condition during irradiation, and it rapidly decreases as the field is enhanced, due to a displacement of the defect distribution across the oxide towards the cathodic interface. The RILC kinetics are linear with the cumulative dose, in contrast with the power law found on electrically stressed devices

  7. Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits

    Science.gov (United States)

    Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.

    2014-03-01

    Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration.

  8. AC and dielectric properties of vacuum evaporated InTe bilayer thin films

    Energy Technology Data Exchange (ETDEWEB)

    Matheswaran, P. [PG and Research, Department of Physics, Kongunadu Arts and Science College (Autonomous), GN Mills (po), Coimbatore 641 029, Tamil Nadu (India); Sathyamoorthy, R., E-mail: rsathya59@gmail.com [PG and Research, Department of Physics, Kongunadu Arts and Science College (Autonomous), GN Mills (po), Coimbatore 641 029, Tamil Nadu (India); Saravanakumar, R. [PG and Research, Department of Physics, Kongunadu Arts and Science College (Autonomous), GN Mills (po), Coimbatore 641 029, Tamil Nadu (India); Velumani, S. [Department of Electrical Engineering (SEES), CINVESTAV-IPN Zacatenco, D.F., 07360 (Mexico)

    2010-10-25

    III-VI compound semiconductors receive great attention due to its applications in memory devices, switching devices, gas sensors, hybrid solar cells, etc. InTe thin films were prepared by sequential thermal evaporation of In and Te at Ar atmosphere. X-ray diffraction pattern of the films shows that the films posses mixed phase of In{sub 2}Te{sub 3} and In{sub 2}Te{sub 5}. Grain size (D) and dislocation density were calculated by using Scherer's formula. Surface morphology of the film is analyzed by SEM and the surface is found to be agglomeration of well defined grains. EDS analysis reveals that elemental composition is in right stoichiometry. The value of capacitance and tan {delta} was recorded with respect to different frequencies and at different temperatures. It is observed that the capacitance decreases with increase in frequency at all temperatures. The observed nature of the capacitance is due to the inability of the dipoles to orient in a rapidly varying electric field. The pronounced increase in capacitance toward the low frequency region may be attributed to the blocking of charge carriers at the electrodes which leads to space charge layer resulting in the increase of capacitance. The mechanism responsible for AC conduction is found to be electronic hopping. TCC and TCP values were calculated and the results are discussed.

  9. Electrostatically assisted fabrication of silver-dielectric core/shell nanoparticles thin film capacitor with uniform metal nanoparticle distribution and controlled spacing.

    Science.gov (United States)

    Li, Xue; Niitsoo, Olivia; Couzis, Alexander

    2016-03-01

    An electrostatically-assisted strategy for fabrication of thin film composite capacitors with controllable dielectric constant (k) has been developed. The capacitor is composed of metal-dielectric core/shell nanoparticle (silver/silica, Ag@SiO2) multilayer films, and a backfilling polymer. Compared with the simple metal particle-polymer mixtures where the metal nanoparticles (NP) are randomly dispersed in the polymer matrix, the metal volume fraction in our capacitor was significantly increased, owing to the densely packed NP multilayers formed by the electrostatically assisted assembly process. Moreover, the insulating layer of silica shell provides a potential barrier that reduces the tunneling current between neighboring Ag cores, endowing the core/shell nanocomposites with a stable and relatively high dielectric constant (k) and low dielectric loss (D). Our work also shows that the thickness of the SiO2 shell plays a dominant role in controlling the dielectric properties of the nanocomposites. Control over metal NP separation distance was realized not only by variation the shell thickness of the core/shell NPs but also by introducing a high k nanoparticle, barium strontium titanate (BST) of relatively smaller size (∼8nm) compared to 80-160nm of the core/shell Ag@SiO2 NPs. The BST assemble between the Ag@SiO2 and fill the void space between the closely packed core/shell NPs leading to significant enhancement of the dielectric constant. This electrostatically assisted assembly method is promising for generating multilayer films of a large variety of NPs over large areas at low cost. Copyright © 2015 Elsevier Inc. All rights reserved.

  10. Preferential growth and enhanced dielectric properties of Ba0.7Sr0.3TiO3 thin films with preannealed Pt bottom electrode

    International Nuclear Information System (INIS)

    Zhu Xiaohong; Ren Yinjuan; Zhang Caiyun; Zhu Jiliang; Zhu Jianguo; Xiao Dingquan; Defaÿ, Emmanuel; Aïd, Marc

    2013-01-01

    Ba 0.7 Sr 0.3 TiO 3 (BST) thin films, about 100 nm in thickness, were prepared on unannealed and 700 °C-preannealed Pt bottom electrodes by the ion beam sputtering and post-deposition annealing method. It was found that the preannealed Pt layer has a more compact structure, making it not only a bottom electrode but also a good template for high-quality BST thin film growth. The BST films deposited on preannealed Pt bottom electrodes showed (0 0 l)-preferred orientation, dense and uniform microstructure with no intermediate phase formed at the film/electrode interface, and thus enhanced dielectric properties. As a result, the typical relative dielectric constant and tunability (under a dc electric field of 1 MV cm −1 ) reach 180 and 50.1%, respectively, for the BST thin films with preannealed Pt bottom electrodes, which are significantly higher than those (166 and 41.3%, respectively) for the BST thin films deposited on unannealed Pt bottom electrodes. (paper)

  11. Preferential growth and enhanced dielectric properties of Ba0.7Sr0.3TiO3 thin films with preannealed Pt bottom electrode

    Science.gov (United States)

    Zhu, Xiaohong; Defaÿ, Emmanuel; Aïd, Marc; Ren, Yinjuan; Zhang, Caiyun; Zhu, Jiliang; Zhu, Jianguo; Xiao, Dingquan

    2013-03-01

    Ba0.7Sr0.3TiO3 (BST) thin films, about 100 nm in thickness, were prepared on unannealed and 700 °C-preannealed Pt bottom electrodes by the ion beam sputtering and post-deposition annealing method. It was found that the preannealed Pt layer has a more compact structure, making it not only a bottom electrode but also a good template for high-quality BST thin film growth. The BST films deposited on preannealed Pt bottom electrodes showed (0 0 l)-preferred orientation, dense and uniform microstructure with no intermediate phase formed at the film/electrode interface, and thus enhanced dielectric properties. As a result, the typical relative dielectric constant and tunability (under a dc electric field of 1 MV cm-1) reach 180 and 50.1%, respectively, for the BST thin films with preannealed Pt bottom electrodes, which are significantly higher than those (166 and 41.3%, respectively) for the BST thin films deposited on unannealed Pt bottom electrodes.

  12. Improved organic thin-film transistor performance using novel self-assembled monolayers

    Science.gov (United States)

    McDowell, M.; Hill, I. G.; McDermott, J. E.; Bernasek, S. L.; Schwartz, J.

    2006-02-01

    Pentacene-based organic thin-film transistors have been fabricated using a phosphonate-linked anthracene self-assembled monolayer as a buffer between the silicon dioxide gate dielectric and the active pentacene channel region. Vast improvements in the subthreshold slope and threshold voltage are observed compared to control devices fabricated without the buffer. Both observations are consistent with a greatly reduced density of charge trapping states at the semiconductor-dielectric interface effected by introduction of the self-assembled monolayer.

  13. Understanding the influence of surface chemical states on the dielectric tunability of sputtered Ba0.5Sr0.5TiO3 thin films

    Science.gov (United States)

    Venkata Saravanan, K.; Raju, K. C. James

    2014-03-01

    The surface chemical states of RF-magnetron sputtered Ba0.5Sr0.5TiO3 (BST5) thin films deposited at different oxygen mixing percentage (OMP) was examined by x-ray photoelectron spectroscopy. The O1s XPS spectra indicate the existence of three kinds of oxygen species (dissociated oxygen ion O2 -, adsorbed oxide ion O- and lattice oxide ion O2-) on the films’ surface, which strongly depends on OMP. The presence of oxygen species other than lattice oxygen ion makes the films’ surface highly reactivity to atmospheric gases, resulting in the formation of undesired surface layers. The XPS results confirm the formation of surface nitrates for the films deposited under oxygen deficient atmosphere (OMP ≦̸ 25%), whereas the films deposited in oxygen rich atmosphere (OMP ≧̸ 75%) show the presence of metal-hydroxide. The influence of a surface dead layer on the tunable dielectric properties of BST5 films have been studied in detail and are reported. Furthermore, our observations indicate that an optimum ratio of Ar:O2 is essential for achieving desired material and dielectric properties in BST5 thin films. The films deposited at 50% OMP have the highest dielectric tunability of ~65% (@280 kV cm-1), with good ɛ r-E curve symmetry of 98% and low tan δ of 0.018. The figure of merit for these films is about 35, which is promising for frequency agile device applications.

  14. Electrospraying and ultraviolet light curing of nanometer-thin polydimethylsiloxane membranes for low-voltage dielectric elastomer transducers

    Science.gov (United States)

    Osmani, Bekim; Töpper, Tino; Siketanc, Matej; Kovacs, Gabor M.; Müller, Bert

    2017-04-01

    Dielectric elastomer transducers (DETs) have attracted interest as actuators, sensors, and even as self-sensing actuators for applications in medicine, soft robotics, and microfluidics. To reach strains of more than 10 %, they currently require operating voltages of several hundred volts. In medical applications for artificial muscles, however, their operation is limited to a very few tens of volts, which implies high permittivity materials and thin-film structures. Such micro- or nanostructures can be prepared using electro-spraying, a cost-effective technique that allows upscaling using multiple nozzles for the fabrication of silicone films down to nanometer thickness. Deposition rates of several micrometers per hour have already been reached. It has been recently demonstrated that such membranes can be fabricated by electro-spraying and subsequent ultraviolet light irradiation. Herein, we introduce a relatively fast deposition of a dimethyl silicone copolymer fluid that contains mercaptopropyl side chains in addition to the methyl groups. Its elastic modulus was tuned with the irradiation dose of the 200 W Hg-Xe lamp. We also investigated the formation of elastomer films, using polymer concentrations in ethyl acetate of 1, 2, 5 and 10 vol%. After curing, the surface roughness was measured by means of atomic force microscopy. This instrument also enabled us to determine the average elastic modulus out of, for example, 400 nanoindentation measurements, using a spherical tip with a radius of 500 nm. The elastomer films were cured for a period of less than one minute, a speed that makes it feasible to combine electro-spraying and in situ curing in a single process step for fabricating low-voltage, multilayer DETs.

  15. Ferroelectricity, Piezoelectricity, and Dielectricity of 0.06PMnN-0.94PZT(45/55 Thin Film on Silicon Substrate

    Directory of Open Access Journals (Sweden)

    Tao Zhang

    2015-01-01

    Full Text Available The high piezoelectricity and high quality factor ferroelectric thin films are important for electromechanical applications especially the micro electromechanical system (MEMS. The ternary compound ferroelectric thin films 0.06Pb(Mn1/3, Nb2/3O3 + 0.94Pb(Zr0.45, Ti0.55O3 (0.06PMnN-0.94PZT(45/55 were deposited on silicon(100 substrates by RF magnetron sputtering method considering that Mn and Nb doping will improve PZT properties in this research. For comparison, nondoped PZT(45/55 films were also deposited. The results show that both of thin films show polycrystal structures with the main (111 and (101 orientations. The transverse piezoelectric coefficients are e31,eff=−4.03 C/m2 and e31,eff=-3.5 C/m2, respectively. These thin films exhibit classical ferroelectricity, in which the coercive electric field intensities are 2Ec=147.31 kV/cm and 2Ec=135.44 kV/cm, and the saturation polarization Ps=30.86 μC/cm2 and Ps=17.74 μC/cm2, and the remnant polarization Pr=20.44 μC/cm2 and Pr=9.87 μC/cm2, respectively. Moreover, the dielectric constants and loss are εr=681 and D=5% and εr=537 and D=4.3%, respectively. In conclusion, 0.06PMnN-0.94PZT(45/55 thin films act better than nondoped films, even though their dielectric constants are higher. Their excellent ferroelectricity, piezoelectricity, and high power and energy storage property, especially the easy fabrication, integration realizable, and potentially high quality factor, make this kind of thin films available for the realistic applications.

  16. Fabrication of Crack-Free Barium Titanate Thin Film with High Dielectric Constant Using Sub-Micrometric Scale Layer-by-Layer E-Jet Deposition

    Directory of Open Access Journals (Sweden)

    Junsheng Liang

    2016-01-01

    Full Text Available Dense and crack-free barium titanate (BaTiO3, BTO thin films with a thickness of less than 4 μm were prepared by using sub-micrometric scale, layer-by-layer electrohydrodynamic jet (E-jet deposition of the suspension ink which is composed of BTO nanopowder and BTO sol. Impacts of the jet height and line-to-line pitch of the deposition on the micro-structure of BTO thin films were investigated. Results show that crack-free BTO thin films can be prepared with 4 mm jet height and 300 μm line-to-line pitch in this work. Dielectric constant of the prepared BTO thin film was recorded as high as 2940 at 1 kHz at room temperature. Meanwhile, low dissipation factor of the BTO thin film of about 8.6% at 1 kHz was also obtained. The layer-by-layer E-jet deposition technique developed in this work has been proved to be a cost-effective, flexible and easy to control approach for the preparation of high-quality solid thin film.

  17. A study on the evolution of dielectric function of ZnO thin films with decreasing film thickness

    International Nuclear Information System (INIS)

    Li, X. D.; Chen, T. P.; Liu, P.; Liu, Y.; Liu, Z.; Leong, K. C.

    2014-01-01

    Dielectric function, band gap, and exciton binding energies of ultrathin ZnO films as a function of film thickness have been obtained with spectroscopic ellipsometry. As the film thickness decreases, both real (ε 1 ) and imaginary (ε 2 ) parts of the dielectric function decrease significantly, and ε 2 shows a blue shift. The film thickness dependence of the dielectric function is shown related to the changes in the interband absorption, discrete-exciton absorption, and continuum-exciton absorption, which can be attributed to the quantum confinement effect on both the band gap and exciton binding energies

  18. A study of the microstructure and optical properties of thin lead-dielectric cermet films. Ph.D. Thesis - Va. Polytechnic Inst. and State Univ.

    Science.gov (United States)

    Owen, R. B.

    1972-01-01

    A transmission electron microscopy study involving direct and replicating techniques is directed to a definition of the microstructure of radio frequency-sputtered, thin lead-dielectric cermet films. Once defined, this microstructure is used to obtain theoretical film refractive indices. The Maxwell Garnett theory provides a basis for the theoretical results. Measurements of film transmission and reflectivity are used to obtain rough experimental values for film refractive indices by the Tekucheva method. More exact values are obtained via ellipsometry. The rough Tekucheva values are used to determine the range over which computer calculations interpreting the ellipsometric results must be made. This technique yields accurate values for the film refractive indices.

  19. Metallorganic chemical vapor deposition and atomic layer deposition approaches for the growth of hafnium-based thin films from dialkylamide precursors for advanced CMOS gate stack applications

    Science.gov (United States)

    Consiglio, Steven P.

    To continue the rapid progress of the semiconductor industry as described by Moore's Law, the feasibility of new material systems for front end of the line (FEOL) process technologies needs to be investigated, since the currently employed polysilicon/SiO2-based transistor system is reaching its fundamental scaling limits. Revolutionary breakthroughs in complementary-metal-oxide-semiconductor (CMOS) technology were recently announced by Intel Corporation and International Business Machines Corporation (IBM), with both organizations revealing significant progress in the implementation of hafnium-based high-k dielectrics along with metal gates. This announcement was heralded by Gordon Moore as "...the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s." Accordingly, the study described herein focuses on the growth of Hf-based dielectrics and Hf-based metal gates using chemical vapor-based deposition methods, specifically metallorganic chemical vapor deposition (MOCVD) and atomic layer deposition (ALD). A family of Hf source complexes that has received much attention recently due to their desirable properties for implementation in wafer scale manufacturing is the Hf dialkylamide precursors. These precursors are room temperature liquids and possess sufficient volatility and desirable decomposition characteristics for both MOCVD and ALD processing. Another benefit of using these sources is the existence of chemically compatible Si dialkylamide sources as co-precursors for use in Hf silicate growth. The first part of this study investigates properties of MOCVD-deposited HfO2 and HfSixOy using dimethylamido Hf and Si precursor sources using a customized MOCVD reactor. The second part of this study involves a study of wet and dry surface pre-treatments for ALD growth of HfO2 using tetrakis(ethylmethylamido)hafnium in a wafer scale manufacturing environment. The third part of this study is an investigation of

  20. Paraffin wax passivation layer improvements in electrical characteristics of bottom gate amorphous indium–gallium–zinc oxide thin-film transistors

    International Nuclear Information System (INIS)

    Chang, Geng-Wei; Chang, Ting-Chang; Syu, Yong-En; Tsai, Tsung-Ming; Chang, Kuan-Chang; Tu, Chun-Hao; Jian, Fu-Yen; Hung, Ya-Chi; Tai, Ya-Hsiang

    2011-01-01

    In this research, paraffin wax is employed as the passivation layer of the bottom gate amorphous indium–gallium–zinc oxide thin-film transistors (a-IGZO TFTs), and it is formed by sol–gel process in the atmosphere. The high yield and low cost passivation layer of sol–gel process technology has attracted much attention for current flat-panel-display manufacturing. Comparing with passivation-free a-IGZO TFTs, passivated devices exhibit a superior stability against positive gate bias stress in different ambient gas, demonstrating that paraffin wax shows gas-resisting characteristics for a-IGZO TFTs application. Furthermore, light-induced stretch-out phenomenon for paraffin wax passivated device is suppressed. This superior stability of the passivated device was attributed to the reduced total density of states (DOS) including the interfacial and semiconductor bulk trap densities.

  1. A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under positive gate bias stress

    Energy Technology Data Exchange (ETDEWEB)

    Niang, K. M.; Flewitt, A. J., E-mail: ajf@eng.cam.ac.uk [Electrical Engineering Division, Cambridge University, J J Thomson Avenue, Cambridge CB3 0FA (United Kingdom); Barquinha, P. M. C.; Martins, R. F. P. [i3N/CENIMAT, Department of Materials Science, Faculty of Science and Technology, Universidade NOVA de Lisboa and CEMOP/UNINOVA, Campus de Caparica, 2829-516 Caparica (Portugal); Cobb, B. [Holst Centre/TNO, High Tech Campus 31, 5656AE Eindhoven (Netherlands); Powell, M. J. [252, Valley Drive, Kendal LA9 7SL (United Kingdom)

    2016-02-29

    Thin film transistors (TFTs) employing an amorphous indium gallium zinc oxide (a-IGZO) channel layer exhibit a positive shift in the threshold voltage under the application of positive gate bias stress (PBS). The time and temperature dependence of the threshold voltage shift was measured and analysed using the thermalization energy concept. The peak energy barrier to defect conversion is extracted to be 0.75 eV and the attempt-to-escape frequency is extracted to be 10{sup 7} s{sup −1}. These values are in remarkable agreement with measurements in a-IGZO TFTs under negative gate bias illumination stress (NBIS) reported recently (Flewitt and Powell, J. Appl. Phys. 115, 134501 (2014)). This suggests that the same physical process is responsible for both PBS and NBIS, and supports the oxygen vacancy defect migration model that the authors have previously proposed.

  2. N-channel thin-film transistors based on 1,4,5,8-naphthalene tetracarboxylic dianhydride with ultrathin polymer gate buffer layer

    International Nuclear Information System (INIS)

    Tanida, Shinji; Noda, Kei; Kawabata, Hiroshi; Matsushige, Kazumi

    2009-01-01

    N-channel operation of thin-film transistors based on 1,4,5,8-naphthalene tetracarboxylic dianhydride (NTCDA) with a 9-nm-thick poly(methyl methacrylate) (PMMA) gate buffer layer was examined. The uniform coverage of the ultrathin PMMA layer on an SiO 2 gate insulator, verified by X-ray reflectivity measurement, caused the increase of electron field-effect mobility because of the suppression of electron traps existing on the SiO 2 surface. In addition, air stability for n-channel operation of the NTCDA transistor was also improved by the PMMA layer which possibly prevented the adsorption of ambient water molecules onto the SiO 2 surface.

  3. Insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor devices with Al2O3 or AlTiO gate dielectrics

    Science.gov (United States)

    Le, Son Phuong; Nguyen, Duong Dai; Suzuki, Toshi-kazu

    2018-01-01

    We have investigated insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor (MIS) devices with Al2O3 or AlTiO (an alloy of Al2O3 and TiO2) gate dielectrics obtained by atomic layer deposition on AlGaN. Analyzing insulator-thickness dependences of threshold voltages for the MIS devices, we evaluated positive interface fixed charges, whose density at the AlTiO/AlGaN interface is significantly lower than that at the Al2O3/AlGaN interface. This and a higher dielectric constant of AlTiO lead to rather shallower threshold voltages for the AlTiO gate dielectric than for Al2O3. The lower interface fixed charge density also leads to the fact that the two-dimensional electron concentration is a decreasing function of the insulator thickness for AlTiO, whereas being an increasing function for Al2O3. Moreover, we discuss the relationship between the interface fixed charges and interface states. From the conductance method, it is shown that the interface state densities are very similar at the Al2O3/AlGaN and AlTiO/AlGaN interfaces. Therefore, we consider that the lower AlTiO/AlGaN interface fixed charge density is not owing to electrons trapped at deep interface states compensating the positive fixed charges and can be attributed to a lower density of oxygen-related interface donors.

  4. Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

    Science.gov (United States)

    Wang, Kai; Ou, Hai; Chen, Jun

    2015-06-01

    Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The "smart" pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients.

  5. Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

    International Nuclear Information System (INIS)

    Wang, Kai; Ou, Hai; Chen, Jun

    2015-01-01

    Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The 'smart' pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients. (paper)

  6. High Stability Pentacene Transistors Using Polymeric Dielectric Surface Modifier.

    Science.gov (United States)

    Wang, Xiaohong; Lin, Guangqing; Li, Peng; Lv, Guoqiang; Qiu, Longzhen; Ding, Yunsheng

    2015-08-01

    1,6-bis(trichlorosilyl)hexane (C6Cl), polystyrene (PS), and cross-linked polystyrene (CPS) were investigated as gate dielectric modified layers for high performance organic transistors. The influence of the surface energy, roughness and morphology on the charge transport of the organic thin-film transistors (OTFTs) was investigated. The surface energy and roughness both affect the grain size of the pentacene films which will control the charge carrier mobility of the devices. Pentacene thin-film transistors fabricated on the CPS modified dielectric layers exhibited charge carrier mobility as high as 1.11 cm2 V-1 s-1. The bias stress stability for the CPS devices shows that the drain current only decays 1% after 1530 s and the mobility never decreases until 13530 s.

  7. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er2O3 as a gate dielectric

    International Nuclear Information System (INIS)

    Lin, Ray-Ming; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-01-01

    In this study, the rare earth erbium oxide (Er 2 O 3 ) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N t ) of the MOS–HEMT were 125 mV/decade and 4.3 × 10 12 cm −2 , respectively. The dielectric constant of the Er 2 O 3 layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er 2 O 3 MOS–HEMT. - Highlights: ► GaN/AlGaN/Er 2 O 3 metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er 2 O 3 with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I ON /I OFF ratio

  8. Structural and dielectric properties of (001) and (111)-oriented BaZr0.2Ti0.8O3 epitaxial thin films

    International Nuclear Information System (INIS)

    Ventura, J.; Fina, I.; Ferrater, C.; Langenberg, E.; Coy, L.E.; Polo, M.C.; Garcia-Cuenca, M.V.; Fabrega, L.; Varela, M.

    2010-01-01

    We have grown and characterized BaZr 0.2 Ti 0.8 O 3 (BZT) epitaxial thin films deposited on (001) and (111)-oriented SrRuO 3 -buffered SrTiO 3 substrates by pulsed laser deposition. Structural and morphological characterizations were performed using X-ray diffractometry and atomic force microscopy, respectively. A cube-on-cube epitaxial relationship was ascertained from the θ-2θ and φ diffractograms in both (001) and (111)-oriented films. The (001)-oriented films showed a smooth granular morphology, whereas the faceted pyramid-like crystallites of the (111)-oriented films led to a rough surface. The dielectric response of BZT at room temperature was measured along the growth direction. The films were found to be ferroelectric, although a well-saturated hysteresis loop was obtained only for the (001)-oriented films. High leakage currents were observed for the (111) orientation, likely associated to charge transport along the boundaries of its crystallites. The remanent polarization, coercive field, dielectric constant, and relative change of dielectric permittivity (tunability) of (111)-oriented BZT were higher than those of (001)-oriented BZT.

  9. Dielectric properties of Ca(Zr0.05Ti0.95)O3 thin films prepared by chemical solution deposition

    International Nuclear Information System (INIS)

    Cavalcante, L.S.; Simoes, A.Z.; Santos, L.P.S.; Santos, M.R.M.C.; Longo, E.; Varela, J.A.

    2006-01-01

    Ca(Zr 0.05 Ti 0.95 )O 3 (CZT) thin films were grown on Pt(111)/Ti/SiO 2 /Si(100) substrates by the soft chemical method. The films were deposited from spin-coating technique and annealed at 928K for 4h under oxygen atmosphere. CZT films present orthorhombic structure with a crack free and granular microstructure. Atomic force microscopy and field-emission scanning electron microscopy showed that CZT present grains with about 47nm and thickness about 450nm. Dielectric constant and dielectric loss of the films was approximately 210 at 100kHz and 0.032 at 1MHz. The Au/CZT/Pt capacitor shows a hysteresis loop with remnant polarization of 2.5μC/cm 2 , and coercive field of 18kV/cm, at an applied voltage of 6V. The leakage current density was about 4.6x10 -8 A/cm 2 at 3V. Dielectric constant-voltage curve is located at zero bias field suggesting the absence of internal electric fields

  10. Comparative analysis of the effects of tantalum doping and annealing on atomic layer deposited (Ta{sub 2}O{sub 5}){sub x}(Al{sub 2}O{sub 3}){sub 1−x} as potential gate dielectrics for GaN/Al{sub x}Ga{sub 1−x}N/GaN high electron mobility transistors

    Energy Technology Data Exchange (ETDEWEB)

    Partida-Manzanera, T., E-mail: sgtparti@liv.ac.uk [Centre for Materials and Structures, School of Engineering, University of Liverpool, Liverpool, L69 3GH (United Kingdom); Institute of Materials Research and Engineering, A*STAR (Agency for Science, Technology and Research), Innovis, 2 Fusionopolis way, Singapore 138634 (Singapore); Roberts, J. W.; Sedghi, N.; Potter, R. J. [Centre for Materials and Structures, School of Engineering, University of Liverpool, Liverpool, L69 3GH (United Kingdom); Bhat, T. N.; Zhang, Z.; Tan, H. R.; Dolmanan, S. B.; Tripathy, S. [Institute of Materials Research and Engineering, A*STAR (Agency for Science, Technology and Research), Innovis, 2 Fusionopolis way, Singapore 138634 (Singapore)

    2016-01-14

    This paper describes a method to optimally combine wide band gap Al{sub 2}O{sub 3} with high dielectric constant (high-κ) Ta{sub 2}O{sub 5} for gate dielectric applications. (Ta{sub 2}O{sub 5}){sub x}(Al{sub 2}O{sub 3}){sub 1−x} thin films deposited by thermal atomic layer deposition (ALD) on GaN-capped Al{sub x}Ga{sub 1−x}N/GaN high electron mobility transistor (HEMT) structures have been studied as a function of the Ta{sub 2}O{sub 5} molar fraction. X-ray photoelectron spectroscopy shows that the bandgap of the oxide films linearly decreases from 6.5 eV for pure Al{sub 2}O{sub 3} to 4.6 eV for pure Ta{sub 2}O{sub 5}. The dielectric constant calculated from capacitance-voltage measurements also increases linearly from 7.8 for Al{sub 2}O{sub 3} up to 25.6 for Ta{sub 2}O{sub 5}. The effect of post-deposition annealing in N{sub 2} at 600 °C on the interfacial properties of undoped Al{sub 2}O{sub 3} and Ta-doped (Ta{sub 2}O{sub 5}){sub 0.12}(Al{sub 2}O{sub 3}){sub 0.88} films grown on GaN-HEMTs has been investigated. These conditions are analogous to the conditions used for source/drain contact formation in gate-first HEMT technology. A reduction of the Ga-O to Ga-N bond ratios at the oxide/HEMT interfaces is observed after annealing, which is attributed to a reduction of interstitial oxygen-related defects. As a result, the conduction band offsets (CBOs) of the Al{sub 2}O{sub 3}/GaN-HEMT and (Ta{sub 2}O{sub 5}){sub 0.16}(Al{sub 2}O{sub 3}){sub 0.84}/GaN-HEMT samples increased by ∼1.1 eV to 2.8 eV and 2.6 eV, respectively, which is advantageous for n-type HEMTs. The results demonstrate that ALD of Ta-doped Al{sub 2}O{sub 3} can be used to control the properties of the gate dielectric, allowing the κ-value to be increased, while still maintaining a sufficient CBO to the GaN-HEMT structure for low leakage currents.

  11. Impedance spectroscopic and dielectric analysis of Ba{sub 0.7}Sr{sub 0.3}TiO{sub 3} thin films

    Energy Technology Data Exchange (ETDEWEB)

    Rouahi, A. [Grenoble Electrical Engineering Laboratory (G2E Lab), CNRS, University of Grenoble (UJF), 25 Rue des Martyrs, BP 166, 38042 Grenoble Cedex 9 (France); Laboratory of Materials, Organization and Properties (LMOP), Campus Universities, El Manar, 2092 Tunis (Tunisia); Kahouli, A., E-mail: kahouli.kader@yahoo.fr [Grenoble Electrical Engineering Laboratory (G2E Lab), CNRS, University of Grenoble (UJF), 25 Rue des Martyrs, BP 166, 38042 Grenoble Cedex 9 (France); Laboratory of Materials, Organization and Properties (LMOP), Campus Universities, El Manar, 2092 Tunis (Tunisia); Sylvestre, A., E-mail: alain.sylvestre@grenoble.cnrs.fr [Grenoble Electrical Engineering Laboratory (G2E Lab), CNRS, University of Grenoble (UJF), 25 Rue des Martyrs, BP 166, 38042 Grenoble Cedex 9 (France); Defaye, E. [CEA-LETI, MINATEC Campus, 17 rue des Martyrs, 38054 Grenoble Cedex 9 (France); Yangui, B. [Laboratory of Materials, Organization and Properties (LMOP), Campus Universities, El Manar, 2092 Tunis (Tunisia)

    2012-07-15

    Highlights: Black-Right-Pointing-Pointer The material exhibits the contribution of both grain and grain boundaries in the electric response of Ba{sub 0.7}Sr{sub 0.3}TiO{sub 3}. Black-Right-Pointing-Pointer The plot of normalized complex dielectric modulus and impedance as a function of frequency exhibits both short and long-range conduction in the film. Black-Right-Pointing-Pointer The frequency dependence of ac conductivity exhibits a polaron hopping mechanism with activation energy of 0.38 eV. Black-Right-Pointing-Pointer The complex dielectric modulus analysis confirmed the presence of a non-Debye type of conductivity relaxation deduced from the KWW function. - Abstract: Polycrystalline Ba{sub 0.7}Sr{sub 0.3}TiO{sub 3} thin film with Pt/BST/Pt/TiO{sub 2}/SiO{sub 2} structure was prepared by ion beam sputtering. The film was post annealed at 700 Degree-Sign C. The dielectric and electric modulus properties were studied by impedance spectroscopy over a wide frequency range [0.1-10{sup 5} Hz] at different temperatures [175-350 Degree-Sign C]. The Nyquist plots (Z Double-Prime vs . Z Prime ) show the contribution of both grain and grain boundaries at higher temperature on the electric response of BST thin films. Moreover, the resistance of grains decreases with the rise in temperature and the material exhibits a negative temperature coefficient of resistance. The electric modulus plot indicates the non-Debye type of dielectric relaxation. The values of the activation energy computed from both plots of Z Double-Prime and M Double-Prime are 0.86 eV and 0.81 eV respectively, which reveals that the species responsible for conduction are the same. The scaling behavior of M{sup Double-Prime }/M{sup Double-Prime }{sub max} shows the temperature independent nature of relaxation time. The plot of normalized complex dielectric modulus and impedance as a function of frequency exhibits both short and long-range conduction in the film.

  12. Femtosecond all-optical parallel logic gates based on tunable saturable to reverse saturable absorption in graphene-oxide thin films

    International Nuclear Information System (INIS)

    Roy, Sukhdev; Yadav, Chandresh

    2013-01-01

    A detailed theoretical analysis of ultrafast transition from saturable absorption (SA) to reverse saturable absorption (RSA) has been presented in graphene-oxide thin films with femtosecond laser pulses at 800 nm. Increase in pulse intensity leads to switching from SA to RSA with increased contrast due to two-photon absorption induced excited-state absorption. Theoretical results are in good agreement with reported experimental results. Interestingly, it is also shown that increase in concentration results in RSA to SA transition. The switching has been optimized to design parallel all-optical femtosecond NOT, AND, OR, XOR, and the universal NAND and NOR logic gates

  13. Gate voltage and drain current stress instabilities in amorphous In–Ga–Zn–O thin-film transistors with an asymmetric graphene electrode

    Directory of Open Access Journals (Sweden)

    Joonwoo Kim

    2015-09-01

    Full Text Available The gate voltage and drain current stress instabilities in amorphous In–Ga–Zn–O thin-film transistors (a-IGZO TFTs having an asymmetric graphene electrode structure are studied. A large positive shift in the threshold voltage, which is well fitted to a stretched-exponential equation, and an increase in the subthreshold slope are observed when drain current stress is applied. This is due to an increase in temperature caused by power dissipation in the graphene/a-IGZO contact region, in addition to the channel region, which is different from the behavior in a-IGZO TFTs with a conventional transparent electrode.

  14. Understanding the influence of surface chemical states on the dielectric tunability of sputtered Ba0.5Sr0.5TiO3 thin films

    International Nuclear Information System (INIS)

    Venkata Saravanan, K; James Raju, K C

    2014-01-01

    The surface chemical states of RF-magnetron sputtered Ba 0.5 Sr 0.5 TiO 3 (BST5) thin films deposited at different oxygen mixing percentage (OMP) was examined by x-ray photoelectron spectroscopy. The O1s XPS spectra indicate the existence of three kinds of oxygen species (dissociated oxygen ion O 2 − , adsorbed oxide ion O − and lattice oxide ion O 2− ) on the films’ surface, which strongly depends on OMP. The presence of oxygen species other than lattice oxygen ion makes the films’ surface highly reactivity to atmospheric gases, resulting in the formation of undesired surface layers. The XPS results confirm the formation of surface nitrates for the films deposited under oxygen deficient atmosphere (OMP not ≦ 25%), whereas the films deposited in oxygen rich atmosphere (OMP not ≧ 75%) show the presence of metal-hydroxide. The influence of a surface dead layer on the tunable dielectric properties of BST5 films have been studied in detail and are reported. Furthermore, our observations indicate that an optimum ratio of Ar:O 2 is essential for achieving desired material and dielectric properties in BST5 thin films. The films deposited at 50% OMP have the highest dielectric tunability of ∼65% (@280 kV cm −1 ), with good ϵ r -E curve symmetry of 98% and low tan δ of 0.018. The figure of merit for these films is about 35, which is promising for frequency agile device applications. (papers)

  15. Poly(vinyl acetate)/clay nanocomposite materials for organic thin film transistor application.

    Science.gov (United States)

    Park, B J; Sung, J H; Park, J H; Choi, J S; Choi, H J

    2008-05-01

    Nanocomposite materials of poly(vinyl acetate) (PVAc) and organoclay were fabricated, in order to be utilized as dielectric materials of the organic thin film transistor (OTFT). Spin coating condition of the nanocomposite solution was examined considering shear viscosity of the composite materials dissolved in chloroform. Intercalated structure of the PVAc/clay nanocomposites was characterized using both wide-angle X-ray diffraction and TEM. Fracture morphology of the composite film on silicon wafer was also observed by SEM. Dielectric constant (4.15) of the nanocomposite materials shows that the PVAc/clay nanocomposites are applicable for the gate dielectric materials.

  16. Wet chemical preparation of YVO{sub 4}:Eu thin films as red-emitting phosphor layers for fully transparent flat dielectric discharge lamp

    Energy Technology Data Exchange (ETDEWEB)

    Klausch, A. [Institute for Inorganic Chemistry, Dresden University of Technology, Mommsenstr. 6, 01069 Dresden (Germany); Althues, H. [Fraunhofer Institute for Material and Beam Technology Winterbergstr. 28, 01309 Dresden (Germany); Freudenberg, T. [Leibniz Institute for Solid State and Materials Research, Helmholtzstrasse 20, 01069 Dresden (Germany); Kaskel, S., E-mail: Stefan.Kaskel@chemie.tu-dresden.de [Institute for Inorganic Chemistry, Dresden University of Technology, Mommsenstr. 6, 01069 Dresden (Germany)

    2012-04-30

    Highly transparent YVO{sub 4}:Eu thin films were deposited via dip coating of liquid nanoparticle dispersions on glass substrates. Annealing of the nanoparticle layers resulted in restructuring of the material into oriented crystalline films. The crystallinity was confirmed using powder X-ray diffraction. Film thickness was adjusted to 467 nm by multiple deposition. The resulting coatings show > 99% absorbance for wavelength below 300 nm and > 90% transmission in the visible spectral range. Under UV-light excitation a bright red photoluminescence with a quantum efficiency of 20% is observed. A planar, transparent dielectric barrier discharge lamp was constructed using YVO{sub 4}:Eu coated glasses and transparent electrodes made from antimony-doped tin dioxide thin films. - Highlights: Black-Right-Pointing-Pointer Preparation of highly transparent Eu{sup 3+} doped YVO{sub 4} phosphor thin films. Black-Right-Pointing-Pointer Improved crystallinity and optical properties through heat treatment. Black-Right-Pointing-Pointer Red emitting films on glass substrates were combined with antimony tin oxide thin films. Black-Right-Pointing-Pointer Fully transparent, planar gas discharge lamp as prototype for a light emitting window.

  17. High temperature dielectric properties of (BxNyOz thin films deposited using ion source assisted physical vapor deposition

    Directory of Open Access Journals (Sweden)

    N. Badi

    2015-12-01

    Full Text Available The dielectric integrity has been one of the major obstacle in bringing out capacitor devices with suitable performance characteristics at high temperatures. In this paper, BxNyOz dielectric films for high temperature capacitors solutions are investigated. The films were grown on silicon substrate by using ion source assisted physical vapor deposition technique. The as-grown films were characterized by SEM, XRD, and XPS. The capacitor structures were fabricated using BxNyOz as a dielectric and titanium as metal electrodes. The elaborated devices were subjected to electrical and thermal characterization. They exhibited low electrical loss and very good stability when subjected to high temperature for a prolonged period of time.

  18. Influence of Chemical Composition and Structure in Silicon Dielectric Materials on Passivation of Thin Crystalline Silicon on Glass.

    Science.gov (United States)

    Calnan, Sonya; Gabriel, Onno; Rothert, Inga; Werth, Matteo; Ring, Sven; Stannowski, Bernd; Schlatmann, Rutger

    2015-09-02

    In this study, various silicon dielectric films, namely, a-SiOx:H, a-SiNx:H, and a-SiOxNy:H, grown by plasma enhanced chemical vapor deposition (PECVD) were evaluated for use as interlayers (ILs) between crystalline silicon and glass. Chemical bonding analysis using Fourier transform infrared spectroscopy showed that high values of oxidant gases (CO2 and/or N2), added to SiH4 during PECVD, reduced the Si-H and N-H bond density in the silicon dielectrics. Various three layer stacks combining the silicon dielectric materials were designed to minimize optical losses between silicon and glass in rear side contacted heterojunction pn test cells. The PECVD grown silicon dielectrics retained their functionality despite being subjected to harsh subsequent processing such as crystallization of the silicon at 1414 °C or above. High values of short circuit current density (Jsc; without additional hydrogen passivation) required a high density of Si-H bonds and for the nitrogen containing films, additionally, a high N-H bond density. Concurrently high values of both Jsc and open circuit voltage Voc were only observed when [Si-H] was equal to or exceeded [N-H]. Generally, Voc correlated with a high density of [Si-H] bonds in the silicon dielectric; otherwise, additional hydrogen passivation using an active plasma process was required. The highest Voc ∼ 560 mV, for a silicon acceptor concentration of about 10(16) cm(-3), was observed for stacks where an a-SiOxNy:H film was adjacent to the silicon. Regardless of the cell absorber thickness, field effect passivation of the buried silicon surface by the silicon dielectric was mandatory for efficient collection of carriers generated from short wavelength light (in the vicinity of the glass-Si interface). However, additional hydrogen passivation was obligatory for an increased diffusion length of the photogenerated carriers and thus Jsc in solar cells with thicker absorbers.

  19. Low dielectric constant-based organic field-effect transistors and metal-insulator-semiconductor capacitors

    Science.gov (United States)

    Ukah, Ndubuisi Benjamin

    This thesis describes a study of PFB and pentacene-based organic field-effect transistors (OFET) and metal-insulator-semiconductor (MIS) capacitors with low dielectric constant (k) poly(methyl methacrylate) (PMMA), poly(4-vinyl phenol) (PVP) and cross-linked PVP (c-PVP) gate dielectrics. A physical method -- matrix assisted pulsed laser evaporation (MAPLE) -- of fabricating all-polymer field-effect transistors and MIS capacitors that circumvents inherent polymer dissolution and solvent-selectivity problems, is demonstrated. Pentacene-based OFETs incorporating PMMA and PVP gate dielectrics usually have high operating voltages related to the thickness of the dielectric layer. Reduced PMMA layer thickness (≤ 70 nm) was obtained by dissolving the PMMA in propylene carbonate (PC). The resulting pentacene-based transistors exhibited very low operating voltage (below -3 V), minimal hysteresis in their transfer characteristics, and decent electrical performance. Also low voltage (within -2 V) operation using thin (≤ 80 nm) low-k and hydrophilic PVP and c-PVP dielectric layers obtained via dissolution in high dipole moment and high-k solvents -- PC and dimethyl sulfoxide (DMSO), is demonstrated to be a robust means of achieving improved electrical characteristics and high operational stability in OFETs incorporating PVP and c-PVP dielectrics.

  20. Zirconium titanate thin film prepared by surface sol-gel process and effects of thickness on dielectric property

    CERN Document Server

    Kim, C H

    2002-01-01

    Single phase of multicomponent oxide ZrTiO sub 4 film could be prepared through surface sol-gel route simply by coating the mixture of 100mM zirconium butoxide and titanium butoxide on Pt/Ti/SiO sub 2 /Si(100) substrate, following pyrolysis at 450 .deg. C, and annealing it at 770 .deg. C. The dielectric constant of the film was reduced as the film thickness decreased due to of the interfacial effects caused by layer/electrode and a few voids inside the multilayer. However, the dielectric property was independent of applied dc bias sweeps voltage (-2 to +2 V). The dielectric constant of bulk film, 31.9, estimated using series-connected capacitor model was independent of film thickness and frequency in the measurement range, but theoretical interfacial thickness, t sub i , was dependent on the frequency. It reached a saturated t sub i value, 6.9 A, at high frequency by extraction of some capacitance component formed at low frequency range. The dielectric constant of bulk ZrTiO sub 4 pellet-shaped material was 3...

  1. Influence of ultra-thin TiN thickness (1.4 nm and 2.4 nm) on positive bias temperature instability (PBTI) of high-k/metal gate nMOSFETs with gate-last process

    International Nuclear Information System (INIS)

    Qi Lu-Wei; Yang Hong; Ren Shang-Qing; Xu Ye-Feng; Luo Wei-Chun; Xu Hao; Wang Yan-Rong; Tang Bo; Wang Wen-Wu; Yan Jiang; Zhu Hui-Long; Zhao Chao; Chen Da-Peng; Ye Tian-Chun

    2015-01-01

    The positive bias temperature instability (PBTI) degradations of high-k/metal gate (HK/MG) nMOSFETs with thin TiN capping layers (1.4 nm and 2.4 nm) are systemically investigated. In this paper, the trap energy distribution in gate stack during PBTI stress is extracted by using ramped recovery stress, and the temperature dependences of PBTI (90 °C, 125 °C, 160 °C) are studied and activation energy (E a ) values (0.13 eV and 0.15 eV) are extracted. Although the equivalent oxide thickness (EOT) values of two TiN thickness values are almost similar (0.85 nm and 0.87 nm), the 2.4-nm TiN one (thicker TiN capping layer) shows better PBTI reliability (13.41% at 0.9 V, 90 °C, 1000 s). This is due to the better interfacial layer/high-k (IL/HK) interface, and HK bulk states exhibited through extracting activation energy and trap energy distribution in the high-k layer. (paper)

  2. Effects of N{sub 2} and NH{sub 3} remote plasma nitridation on the structural and electrical characteristics of the HfO{sub 2} gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Park, K.-S., E-mail: kunsik@etri.re.kr [RFID/USN Research Department, Electronics and Telecommunications Research Institute, Daejeon 305-700 (Korea, Republic of); Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology, Daejeon 305-701 (Korea, Republic of); Baek, K.-H.; Kim, D.P.; Woo, J.-C.; Do, L.-M. [RFID/USN Research Department, Electronics and Telecommunications Research Institute, Daejeon 305-700 (Korea, Republic of); No, K.-S. [Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology, Daejeon 305-701 (Korea, Republic of)

    2010-12-01

    The remote plasma nitridation (RPN) of an HfO{sub 2} film using N{sub 2} and NH{sub 3} has been investigated comparatively. X-ray photoelectron spectroscopy and Auger electron spectroscopy analyses after post-deposition annealing (PDA) at 700 deg. C show that a large amount of nitrogen is present in the bulk film as well as in the interfacial layer for the HfO{sub 2} film nitrided with NH{sub 3}-RPN. It is also shown that the interfacial layer formed during RPN and PDA is a nitrogen-rich Hf-silicate. The C-V characteristics of an HfO{sub x}N{sub y} gate dielectric nitrided with NH{sub 3}-RPN have a smaller equivalent oxide thickness than that nitrided with N{sub 2}-RPN in spite of its thicker interfacial layer.

  3. Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

    Science.gov (United States)

    Hsu, Ching-Hsiang; Shih, Wang-Cheng; Lin, Yueh-Chin; Hsu, Heng-Tung; Hsu, Hisang-Hua; Huang, Yu-Xiang; Lin, Tai-Wei; Wu, Chia-Hsun; Wu, Wen-Hao; Maa, Jer-Shen; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

    2016-04-01

    Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

  4. Energy-band alignment of (HfO2)x(Al2O3)1-x gate dielectrics deposited by atomic layer deposition on β-Ga2O3 (-201)

    Science.gov (United States)

    Yuan, Lei; Zhang, Hongpeng; Jia, Renxu; Guo, Lixin; Zhang, Yimen; Zhang, Yuming

    2018-03-01

    Energy band alignments between series band of Al-rich high-k materials (HfO2)x(Al2O3)1-x and β-Ga2O3 are investigated using X-Ray Photoelectron Spectroscopy (XPS). The results exhibit sufficient conduction band offsets (1.42-1.53 eV) in (HfO2)x(Al2O3)1-x/β-Ga2O3. In addition, it is also obtained that the value of Eg, △Ec, and △Ev for (HfO2)x(Al2O3)1-x/β-Ga2O3 change linearly with x, which can be expressed by 6.98-1.27x, 1.65-0.56x, and 0.48-0.70x, respectively. The higher dielectric constant and higher effective breakdown electric field of (HfO2)x(Al2O3)1-x compared with Al2O3, coupled with sufficient barrier height and lower gate leakage makes it a potential dielectric for high voltage β-Ga2O3 power MOSFET, and also provokes interest in further investigation of HfAlO/β-Ga2O3 interface properties.

  5. Dielectric spectroscopy of [P(NID2OD-T2)]n thin films: Effects of UV radiation on charge transport

    International Nuclear Information System (INIS)

    Sepulveda, Pablo I.; Rosado, Alexander O.; Pinto, Nicholas J.

    2014-01-01

    Poly[N,N′-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide) -2,6-diyll-alt-5,5′-(2,2′-bithiophene)]-[P(ND12OD-T2)] n is a n-doped polymer that is stable in air. Low frequency (40 Hz–30 kHz) dielectric spectroscopy shows that the polymer impedance strength is reduced under ultra-violet (UV) radiation as a result of charge increase in the bulk polymer. Photo-excitation and the creation of electron-hole pairs and subsequent hole recombination with electron trapping species adsorbed by the polymer are suggested as possible doping mechanisms. The relaxation times were also faster in the presence of UV indicating multiple pathways for oscillating dipoles to relax. These results imply increased polymer conductance with corresponding enhancement of charge mobility due to reduced scattering in the presence of UV radiation. A thin film field effect transistor was fabricated using this polymer as the active material and characterized in the presence of UV radiation. As expected, the device exhibited n-type behavior with a charge mobility of 3.0 × 10 −3 cm 2 /V-s. Exposure to UV radiation increased the channel current, shifted the threshold voltage to more negative values and doubled the value of the mobility. These results are consistent with dielectric measurements and suggest an easy method of increasing device currents and charge mobility in this polymer via UV irradiation. - Highlights: • Ultra-violet (UV) radiation dopes the polymer. • The doping is n-type. • UV radiation enhances charge mobility without post polymer processing. • Dielectric spectroscopy and field effect transistor results are self-consistent

  6. SEMICONDUCTOR TECHNOLOGY: TaN wet etch for application in dual-metal-gate integration technology

    Science.gov (United States)

    Yongliang, Li; Qiuxia, Xu

    2009-12-01

    Wet-etch etchants and the TaN film method for dual-metal-gate integration are investigated. Both HF/HN O3/H2O and NH4OH/H2O2 solutions can etch TaN effectively, but poor selectivity to the gate dielectric for the HF/HNO3/H2O solution due to HF being included in HF/HNO3/H2O, and the fact that TaN is difficult to etch in the NH4OH/H2O2 solution at the first stage due to the thin TaOxNy layer on the TaN surface, mean that they are difficult to individually apply to dual-metal-gate integration. A two-step wet etching strategy using the HF/HNO3/H2O solution first and the NH4OH/H2O2 solution later can fully remove thin TaN film with a photo-resist mask and has high selectivity to the HfSiON dielectric film underneath. High-k dielectric film surfaces are smooth after wet etching of the TaN metal gate and MOSCAPs show well-behaved C-V and Jg-Vg characteristics, which all prove that the wet etching of TaN has little impact on electrical performance and can be applied to dual-metal-gate integration technology for removing the first TaN metal gate in the PMOS region.

  7. The Relationship Between Chemical Structure and Dielectric Properties of Plasma-Enhanced Chemical Vapor Deposited Polymer Thin Films (Postprint)

    Science.gov (United States)

    2007-01-01

    C6H6, Aldrich Co., liquid , high performance liquid chromatography (HPLC) grade with a purity of 99.9%) and octafluorocyclobutane (C4F8, OFCB...attributed to the lack of molecular mobility (confined by the crosslinking) and low ionic polarization of the molecular structures [6]. The frequency...in dielectric constant at low frequencies can be traced to orientational polarizations of trapped free radicals, unpaired electron sites, oligomeric

  8. Experimental determination of thermal conductivities of dielectric thin films; Determination experimentale des conductivites thermiques de couches minces dielectriques

    Energy Technology Data Exchange (ETDEWEB)

    Scudeller, Y.; Hmina, N.; Lahmar, J.; Bardon, J.P. [Nantes Univ., 44 (France)

    1996-12-31

    This paper presents a method of measurement of thermal conductivity of sub-micron dielectric films in a direction perpendicular to the substrate. These films (oxides, nitrides, diamond..) are mainly used for the electrical insulation of semiconductor circuits and in optical treatments of high energy lasers. The principle of the method used and the experimental device are described. The results obtained with silicon oxides are discussed. (J.S.) 13 refs.

  9. AC conductivity and dielectric properties of amorphous GexSb40-xSe60 thin films

    International Nuclear Information System (INIS)

    Atyia, H.E.; Farid, A.M.; Hegab, N.A.

    2008-01-01

    Measurements of AC conductivity and dielectric properties have been made for chalcogenide film samples of Ge x Sb 40-x Se 60 (with x=0, 10 and 20 at%) at different temperatures (303-393 K) and various frequencies (10 2 -10 5 Hz). It was found that the AC conductivity obeys the law σ(ω, T)=Aω s . The exponent s 1 and dielectric loss ε 2 were found to decrease with frequency and increase with temperature. The maximum barrier height W M was calculated from dielectric measurements according to the Guintini equation. It was found that the obtained value of W m agrees with that proposed by the theory of hopping of charge carriers over potential barrier as suggested by Elliott in case of chalcogenide glasses. The density of localized states N(E F ) has also been calculated for the studied compositions. The effect of decreasing the Sb content at the expense of the Ge content was investigated for the obtained results of the studied parameters

  10. Effect of crystal orientation on the phase diagrams, dielectric and piezoelectric properties of epitaxial BaTiO3 thin films

    Directory of Open Access Journals (Sweden)

    Huaping Wu

    2016-01-01

    Full Text Available The influence of crystal orientations on the phase diagrams, dielectric and piezoelectric properties of epitaxial BaTiO3 thin films has been investigated using an expanded nonlinear thermodynamic theory. The calculations reveal that crystal orientation has significant influence on the phase stability and phase transitions in the misfit strain-temperature phase diagrams. In particular, the (110 orientation leads to a lower symmetry and more complicated phase transition than the (111 orientation in BaTiO3 films. The increase of compressive strain will dramatically enhance the Curie temperature TC of (110-oriented BaTiO3 films, which matches well with previous experimental data. The polarization components experience a great change across the boundaries of different phases at room temperature in both (110- and (111-oriented films, which leads to the huge dielectric and piezoelectric responses. A good agreement is found between the present thermodynamics calculation and previous first-principles calculations. Our work provides an insight into how to use crystal orientation, epitaxial strain and temperature to tune the structure and properties of ferroelectrics.

  11. Effect of crystal orientation on the phase diagrams, dielectric and piezoelectric properties of epitaxial BaTiO{sub 3} thin films

    Energy Technology Data Exchange (ETDEWEB)

    Wu, Huaping, E-mail: wuhuaping@gmail.com, E-mail: hpwu@zjut.edu.cn [Key Laboratory of E& M (Zhejiang University of Technology), Ministry of Education & Zhejiang Province, Hangzhou 310014 (China); State Key Laboratory of Structural Analysis for Industrial Equipment, Dalian University of Technology, Dalian 116024 (China); Ma, Xuefu; Zhang, Zheng; Zeng, Jun; Chai, Guozhong [Key Laboratory of E& M (Zhejiang University of Technology), Ministry of Education & Zhejiang Province, Hangzhou 310014 (China); Wang, Jie [Department of Engineering Mechanics, School of Aeronautics and Astronautics, Zhejiang University, Hangzhou 310027 (China)

    2016-01-15

    The influence of crystal orientations on the phase diagrams, dielectric and piezoelectric properties of epitaxial BaTiO{sub 3} thin films has been investigated using an expanded nonlinear thermodynamic theory. The calculations reveal that crystal orientation has significant influence on the phase stability and phase transitions in the misfit strain-temperature phase diagrams. In particular, the (110) orientation leads to a lower symmetry and more complicated phase transition than the (111) orientation in BaTiO{sub 3} films. The increase of compressive strain will dramatically enhance the Curie temperature T{sub C} of (110)-oriented BaTiO{sub 3} films, which matches well with previous experimental data. The polarization components experience a great change across the boundaries of different phases at room temperature in both (110)- and (111)-oriented films, which leads to the huge dielectric and piezoelectric responses. A good agreement is found between the present thermodynamics calculation and previous first-principles calculations. Our work provides an insight into how to use crystal orientation, epitaxial strain and temperature to tune the structure and properties of ferroelectrics.

  12. Microstructural and dielectric properties of Ba0.6Sr0.4Ti1-xZrxO3 based combinatorial thin film capacitors library

    International Nuclear Information System (INIS)

    Liu Guozhen; Wolfman, Jerome; Autret-Lambert, Cecile; Sakai, Joe; Roger, Sylvain; Gervais, Monique; Gervais, Francois

    2010-01-01

    Epitaxial growth of Ba 0.6 Sr 0.4 Ti 1-x Zr x O 3 (0≤x≤0.3) composition spread thin film library on SrRuO 3 /SrTiO 3 layer by combinatorial pulsed laser deposition (PLD) is reported. X-ray diffraction and energy dispersive x-ray spectroscopy studies showed an accurate control of the film phase and composition by combinatorial PLD. A complex evolution of the microstructure and morphology with composition of the library is described, resulting from the interplay between epitaxial stress, increased chemical pressure, and reduced elastic energy upon Zr doping. Statistical and temperature-related capacitive measurements across the library showed unexpected variations in the dielectric properties. Doping windows with enhanced permittivity and tunability are identified, and correlated to microstructural properties.

  13. Structural and dielectric properties of Ba{sub 0.7}Sr{sub 0.3}TiO{sub 3} thin films grown by PLD

    Energy Technology Data Exchange (ETDEWEB)

    James, K. K.; Satish, B.; Jayaraj, M. K. [Nanophotonic and Optoelectronic Devices Laboratory, Department of Physics, Cochin University of Science and Technology, Kerala (India)

    2014-01-28

    Ferroelectric thin films of Ba{sub 0.7}Sr{sub 0.3}TiO{sub 3} (BST) were deposited on Si/SiO{sub 2}/TiO{sub 2}/Pt (PtSi) substrate by pulsed laser deposition (PLD). Crystalline films with perovskite structure were obtained without post-deposition annealing. Phase purity of the deposited films was confirmed by x-ray diffraction. The lowest value of FWHM obtained for the film deposited at oxygen pressure 5.4×10{sup −4} mbar and substrate temperature 600°C, indicates the high crystallinity of the film. The room temperature dielectric constant at 100 kHz was 85. Butterfly loop, which is the characteristic of ferroelectric materials, was obtained in the regime of −4 to +4V. The leakage current density was nearly 9×10{sup −13} Acm{sup −2}.

  14. On the formation mechanisms of the diffuse atmospheric pressure dielectric barrier discharge in CVD processes of thin silica-like films

    International Nuclear Information System (INIS)

    Starostin, S A; Premkumar, P Antony; Creatore, M; Van Veldhuizen, E M; Van de Sanden, M C M; De Vries, H; Paffen, R M J

    2009-01-01

    Pathways of formation and temporal evolution of the diffuse dielectric barrier discharge at atmospheric pressure were experimentally studied in this work by means of optical (fast imaging camera) and electrical diagnostics. The chosen model system is relevant for applications of plasma-enhanced chemical vapor deposition of thin silica-like film on the polymeric substrate, from cost-efficient gas mixtures of Ar/N 2 /O 2 /hexamethyldisiloxane. It was found that the discharge can gradually experience the phases of homogeneous low current Townsend-like mode, local Townsend to glow transition and expanding high current density (∼0.7 A cm -2 ) glow-like mode. While the glow-like current spot occupies momentarily only a small part of the electrode area, its expanding behavior provides uniform treatment of the whole substrate surface. Alternatively, it was observed that a visually uniform discharge can be formed by the numerous microdischarges overlapping over the large electrode area.

  15. Solution-processed 6,13-bis(triisopropylsilylethynyl) (TIPS) pentacene thin-film transistors with a polymer dielectric on a flexible substrate

    International Nuclear Information System (INIS)

    Shin, Sang-Il; Kwon, Jae-Hong; Ju, Byeong-Kwon; Kang, Hochul

    2008-01-01

    The authors report the fabrication of solution-processed 6,13-bis(triisopropylsilylethynyl) (TIPS) pentacene thin-film transistors with a cross-linked poly-4-vinylphenol (PVP) dielectric on a polyethersulphone (PES) substrate. The device exhibited useful electrical characteristics, including a saturation field effect mobility of 2.08 × 10 −2 cm 2 V −1 s −1 , a current on/off ratio of 10 5 , a threshold voltage of −2 V and an excellent subthreshold slope of 0.86 V/dec. It was demonstrated that the significant improvement in the subthreshold slope of TIPS-pentacene TFTs could be attributed to a decreased carrier trap density at the PVP/TIPS-pentacene film interface. Furthermore, a 1,2,3,4-tetrahydronaphthalene (Tetralin) solvent used in this study had a high boiling point, which had a positive effect on the morphology and the molecular ordering of the TIPS-pentacene film

  16. Organic Field-Effect Transistors Based on a Liquid-Crystalline Polymeric Semiconductor using SU-8 Gate Dielectrics on Flexible Substrates

    Science.gov (United States)

    Tetzner, Kornelius; Bose, Indranil R.; Bock, Karlheinz

    2014-01-01

    In this work, the insulating properties of poly(4-vinylphenol) (PVP) and SU-8 (MicroChem, Westborough, MA, USA) dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP) using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor. PMID:28788243

  17. Organic Field-Effect Transistors Based on a Liquid-Crystalline Polymeric Semiconductor using SU-8 Gate Dielectrics onFlexible Substrates

    Directory of Open Access Journals (Sweden)

    Kornelius Tetzner

    2014-10-01

    Full Text Available In this work, the insulating properties of poly(4-vinylphenol (PVP and SU-8 (MicroChem, Westborough, MA, USA dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor.

  18. Organic Field-Effect Transistors Based on a Liquid-Crystalline Polymeric Semiconductor using SU-8 Gate Dielectrics onFlexible Substrates.

    Science.gov (United States)

    Tetzner, Kornelius; Bose, Indranil R; Bock, Karlheinz

    2014-10-29

    In this work, the insulating properties of poly(4-vinylphenol) (PVP) and SU-8 (MicroChem, Westborough, MA, USA) dielectrics are analyzed and compared with each other. We further investigate the performance behavior of organic field-effect transistors based on a semiconducting liquid-crystal polymer (LCP) using both dielectric materials and evaluate the results regarding the processability. Due to the lower process temperature needed for the SU-8 deposition, the realization of organic transistors on flexible substrates is demonstrated showing comparable charge carrier mobilities to devices using PVP on glass. In addition, a µ-dispensing procedure of the LCP on SU-8 is presented, improving the switching behavior of the organic transistors, and the promising stability data of the SU-8/LCP stack are verified after storing the structures for 60 days in ambient air showing negligible irreversible degradation of the organic semiconductor.

  19. Joining Chemical Pressure and Epitaxial Strain to Yield Y-doped BiFeO3 Thin Films with High Dielectric Response

    Science.gov (United States)

    Scarisoreanu, N. D.; Craciun, F.; Birjega, R.; Ion, V.; Teodorescu, V. S.; Ghica, C.; Negrea, R.; Dinescu, M.

    2016-05-01

    BiFeO3 is one of the most promising multiferroic materials but undergoes two major drawbacks: low dielectric susceptibility and high dielectric loss. Here we report high in-plane dielectric permittivity (ε’ ∼2500) and low dielectric loss (tan δ priced target.

  20. Inkjet-printed thin film radio-frequency capacitors based on sol-gel derived alumina dielectric ink

    KAUST Repository

    McKerricher, Garret; Maller, Robert; Vaseem, Mohammad; McLachlan, Martyn A.; Shamim, Atif

    2017-01-01

    passive electronics. The ability to spatially pattern high quality Al2O3 thin films using, for example, inkjet printing would tremendously simplify the incumbent fabrication processes – significantly reducing cost and allowing for the development of large

  1. Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol) for the Gate Insulator of Pentacene-Based Thin-Film Transistors

    Science.gov (United States)

    Fan, Ching-Lin; Shang, Ming-Chi; Wang, Shea-Jue; Hsia, Mao-Yuan; Lee, Win-Der; Huang, Bohr-Ran

    2017-01-01

    In this study, a proposed Microwave-Induction Heating (MIH) scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO) metal below the Poly(4-vinylphenol) (PVP) film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit) was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min) and low-power microwave-irradiation (50 W). PMID:28773101

  2. Investigation of Rapid Low-Power Microwave-Induction Heating Scheme on the Cross-Linking Process of the Poly(4-vinylphenol for the Gate Insulator of Pentacene-Based Thin-Film Transistors

    Directory of Open Access Journals (Sweden)

    Ching-Lin Fan

    2017-07-01

    Full Text Available In this study, a proposed Microwave-Induction Heating (MIH scheme has been systematically studied to acquire suitable MIH parameters including chamber pressure, microwave power and heating time. The proposed MIH means that the thin indium tin oxide (ITO metal below the Poly(4-vinylphenol (PVP film is heated rapidly by microwave irradiation and the heated ITO metal gate can heat the PVP gate insulator, resulting in PVP cross-linking. It is found that the attenuation of the microwave energy decreases with the decreasing chamber pressure. The optimal conditions are a power of 50 W, a heating time of 5 min, and a chamber pressure of 20 mTorr. When suitable MIH parameters were used, the effect of PVP cross-linking and the device performance were similar to those obtained using traditional oven heating, even though the cross-linking time was significantly decreased from 1 h to 5 min. Besides the gate leakage current, the interface trap state density (Nit was also calculated to describe the interface status between the gate insulator and the active layer. The lowest interface trap state density can be found in the device with the PVP gate insulator cross-linked by using the optimal MIH condition. Therefore, it is believed that the MIH scheme is a good candidate to cross-link the PVP gate insulator for organic thin-film transistor applications as a result of its features of rapid heating (5 min and low-power microwave-irradiation (50 W.

  3. Bimodal gate-dielectric deposition for improved performance of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    International Nuclear Information System (INIS)

    Pang Liang; Kim, Kyekyoon

    2012-01-01

    A bimodal deposition scheme combining radiofrequency magnetron sputtering and plasma enhanced chemical vapour deposition (PECVD) is proposed as a means for improving the performance of GaN-based metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs). High-density sputtered-SiO 2 is utilized to reduce the gate leakage current and enhance the breakdown voltage while low-density PECVD-SiO 2 is employed to buffer the sputtering damage and further increase the drain current by engineering the stress-induced-polarization. Thus-fabricated MOSHEMT exhibited a low leakage current of 4.21 × 10 -9 A mm -1 and high breakdown voltage of 634 V for a gate-drain distance of 6 µm, demonstrating the promise of bimodal-SiO 2 deposition scheme for the development of GaN-based MOSHEMTs for high-power application. (paper)

  4. Process development of ITO source/drain electrode for the top-gate indium-gallium-zinc oxide transparent thin-film transistor

    International Nuclear Information System (INIS)

    Cheong, Woo-Seok; Yoon, Young-sun; Shin, Jae-Heon; Hwang, Chi-Sun; Chu, Hye Yong

    2009-01-01

    Indium-tin oxide (ITO) has been widely used as electrodes for LCDs and OLEDs. The applications are expanding to the transparent thin-film transistors (TTFT S ) for the versatile circuits or transparent displays. This paper is related with optimization of ITO source and drain electrode for TTFTs on glass substrates. For example, un-etched ITO remnants, which frequently found in the wet etching process, often originate from unsuitable ITO formation processes. In order to improve them, an ion beam deposition method is introduced, which uses for forming a seed layer before the main ITO deposition. We confirm that ITO films with seed layers are effective to obtain clean and smooth glass surfaces without un-etched ITO remnants, resulting in a good long-run electrical stability of the top-gate indium-gallium-zinc oxide-TTFT.

  5. Microwave annealing effect for highly reliable biosensor: dual-gate ion-sensitive field-effect transistor using amorphous InGaZnO thin-film transistor.

    Science.gov (United States)

    Lee, In-Kyu; Lee, Kwan Hyi; Lee, Seok; Cho, Won-Ju

    2014-12-24

    We used a microwave annealing process to fabricate a highly reliable biosensor using amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs), which usually experience threshold voltage instability. Compared with furnace-annealed a-IGZO TFTs, the microwave-annealed devices showed superior threshold voltage stability and performance, including a high field-effect mobility of 9.51 cm(2)/V·s, a low threshold voltage of 0.99 V, a good subthreshold slope of 135 mV/dec, and an outstanding on/off current ratio of 1.18 × 10(8). In conclusion, by using the microwave-annealed a-IGZO TFT as the transducer in an extended-gate ion-sensitive field-effect transistor biosensor, we developed a high-performance biosensor with excellent sensing properties in terms of pH sensitivity, reliability, and chemical stability.

  6. Effects of Mg doping on the gate bias and thermal stability of solution-processed InGaZnO thin-film transistors

    International Nuclear Information System (INIS)

    Su, Bo-Yuan; Chu, Sheng-Yuan; Juang, Yung-Der; Liu, Ssu-Yin

    2013-01-01

    Graphical abstract: Mg-doped IGZO TFTs showed improved TFT performance and thermal stability due to fewer oxygen deficiencies and less interface electron trapping. Highlights: •We fabricated Mg-doped IGZO TFTs with improved performance using solution-process. •Mg doping reduced the oxygen deficiencies and less interface electron trapping of a-IGZO films. •Mg dope-TFT showed high mobility of 2.35 cm 2 /V s and an on–off current ratio over 10 6 . •For better device stability (gate-bias and thermal stability) was proved. -- Abstract: The effects of magnesium (Mg) doping (molar ratio Mg/Zn = (0–10 at.%)) on solution-processed amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) grown using the sol–gel method are investigated. TFT devices fabricated with Mg-doped films showed an improved field-effect mobility of 2.35 cm 2 /V s and a subthreshold slope (S) of 0.42 V/dec compared to those of an undoped a-IGZO TFT (0.73 cm 2 /V s and 0.74 V/dec, respectively), and an on–off current ratio of over 10 6 . Moreover, the 5 at.% Mg-doped TFT device showed improved gate bias and thermal stability due to fewer oxygen deficiencies, smaller carrier concentration, and less interface electron trapping in the a-IGZO films

  7. Influence of white light illumination on the performance of a-IGZO thin film transistor under positive gate-bias stress

    Science.gov (United States)

    Tang, Lan-Feng; Yu, Guang; Lu, Hai; Wu, Chen-Fei; Qian, Hui-Min; Zhou, Dong; Zhang, Rong; Zheng, You-Dou; Huang, Xiao-Ming

    2015-08-01

    The influence of white light illumination on the stability of an amorphous InGaZnO thin film transistor is investigated in this work. Under prolonged positive gate bias stress, the device illuminated by white light exhibits smaller positive threshold voltage shift than the device stressed under dark. There are simultaneous degradations of field-effect mobility for both stressed devices, which follows a similar trend to that of the threshold voltage shift. The reduced threshold voltage shift under illumination is explained by a competition between bias-induced interface carrier trapping effect and photon-induced carrier detrapping effect. It is further found that white light illumination could even excite and release trapped carriers originally exiting at the device interface before positive gate bias stress, so that the threshold voltage could recover to an even lower value than that in an equilibrium state. The effect of photo-excitation of oxygen vacancies within the a-IGZO film is also discussed. Project supported by the State Key Program for Basic Research of China (Grant Nos. 2011CB301900 and 2011CB922100) and the Priority Academic Program Development of Jiangsu Higher Education Institutions, China.

  8. Contact effects analyzed by a parameter extraction method based on a single bottom-gate/top-contact organic thin-film transistor

    Science.gov (United States)

    Takagaki, Shunsuke; Yamada, Hirofumi; Noda, Kei

    2018-03-01

    Contact effects in organic thin-film transistors (OTFTs) were examined by using our previously proposed parameter extraction method from the electrical characteristics of a single staggered-type device. Gate-voltage-dependent contact resistance and channel mobility in the linear regime were evaluated for bottom-gate/top-contact (BGTC) pentacene TFTs with active layers of different thicknesses, and for pentacene TFTs with contact-doped layers prepared by coevaporation of pentacene and tetrafluorotetracyanoquinodimethane (F4TCNQ). The extracted parameters suggested that the influence of the contact resistance becomes more prominent with the larger active-layer thickness, and that contact-doping experiments give rise to a drastic decrease in the contact resistance and a concurrent considerable improvement in the channel mobility. Additionally, the estimated energy distributions of trap density in the transistor channel probably reflect the trap filling with charge carriers injected into the channel regions. The analysis results in this study confirm the effectiveness of our proposed method, with which we can investigate contact effects and circumvent the influences of characteristic variations in OTFT fabrication.

  9. Moderate temperature-dependent surface and volume resistivity and low-frequency dielectric constant measurements of pure and multi-walled carbon nanotube (MWCNT) doped polyvinyl alcohol thin films

    Science.gov (United States)

    Edwards, Matthew; Guggilla, Padmaja; Reedy, Angela; Ijaz, Quratulann; Janen, Afef; Uba, Samuel; Curley, Michael

    2017-08-01

    Previously, we have reported measurements of temperature-dependent surface resistivity of pure and multi-walled carbon nanotube (MWNCT) doped amorphous Polyvinyl Alcohol (PVA) thin films. In the temperature range from 22 °C to 40 °C with humidity-controlled environment, we found the surface resistivity to decrease initially, but to rise steadily as the temperature continued to increase. Moreover, electric surface current density (Js) was measured on the surface of pure and MWCNT doped PVA thin films. In this regard, the surface current density and electric field relationship follow Ohm's law at low electric fields. Unlike Ohmic conduction in metals where free electrons exist, selected captive electrons are freed or provided from impurities and dopants to become conduction electrons from increased thermal vibration of constituent atoms in amorphous thin films. Additionally, a mechanism exists that seemingly decreases the surface resistivity at higher temperatures, suggesting a blocking effect for conducting electrons. Volume resistivity measurements also follow Ohm's law at low voltages (low electric fields), and they continue to decrease as temperatures increase in this temperature range, differing from surface resistivity behavior. Moreover, we report measurements of dielectric constant and dielectric loss as a function of temperature and frequency. Both the dielectric constant and dielectric loss were observed to be highest for MWCNT doped PVA compared to pure PVA and commercial paper, and with frequency and temperature for all samples.

  10. Broadband dielectric characterization of sapphire/TiOx/Ba₀.₃Sr₀.₇TiO₃ (111)-oriented thin films for the realization of a tunable interdigitated capacitor.

    Science.gov (United States)

    Ghalem, Areski; Ponchel, Freddy; Remiens, Denis; Legier, Jean-Francois; Lasri, Tuami

    2013-05-01

    A complete microwave characterization up to 67 GHz using specific coplanar waveguides was performed to determine the dielectric properties (permittivity, losses, and tunability) of sapphire/TiOx/Ba0.3Sr0.7TiO3 (BST) (111)-oriented thin films. To that end, BaxSr1-xTiO3 thin films were deposited by RF magnetron sputtering on sapphire (0001) substrate. To control the preferred (111) orientation, a TiOx buffer layer was deposited on sapphire. According to the detailed knowledge of the material properties, it has been possible to conceive, fabricate, and test interdigitated capacitors, the basic element for future microwave tunable applications. Retention of capacitive behavior up to 67 GHz and a tunability of 32% at 67 GHz at an applied voltage of 30 V (150 kV/cm) were observed. The Q-factor remains greater than 30 over the entire frequency band. The possibility of a complete characterization of the material for the realization of high-performance interdigitated capacitors opens the door to microwave device fabrication.

  11. Investigation of the in-plane and out-of-plane electrical properties of metallic nanoparticles in dielectric matrix thin films elaborated by atomic layer deposition

    Science.gov (United States)

    Thomas, D.; Puyoo, E.; Le Berre, M.; Militaru, L.; Koneti, S.; Malchère, A.; Epicier, T.; Roiban, L.; Albertini, D.; Sabac, A.; Calmon, F.

    2017-11-01

    Pt nanoparticles in a Al2O3 dielectric matrix thin films are elaborated by means of atomic layer deposition. These nanostructured thin films are integrated in vertical and planar test structures in order to assess both their in-plane and out-of-plane electrical properties. A shadow edge evaporation process is used to develop planar devices with electrode separation distances in the range of 30 nm. Both vertical and planar test structures show a Poole-Frenkel conduction mechanism. Low trap energy levels (<0.1 eV) are identified for the two test structures which indicates that the Pt islands themselves are not acting as traps in the PF mechanism. Furthermore, a more than three order of magnitude current density difference is observed between the two geometries. This electrical anisotropy is attributed to a large electron mobility difference in the in-plane and out-of-plane directions which can be related to different trap distributions in both directions.

  12. Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

    Science.gov (United States)

    An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

    2016-11-01

    Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

  13. Negative differential transconductance in electrolyte-gated ruthenate

    International Nuclear Information System (INIS)

    Hassan, Muhammad Umair; Dhoot, Anoop Singh; Wimbush, Stuart C.

    2015-01-01

    We report on a study of electric field-induced doping of the highly conductive ruthenate SrRuO 3 using an ionic liquid as the gate dielectric in a field-effect transistor configuration. Two distinct carrier transport regimes are identified for increasing positive gate voltage in thin (10 nm) films grown heteroepitaxially on SrTiO 3 substrates. For V g  = 2 V and lower, the sample shows an increased conductivity of up to 13%, as might be expected for electron doping of a metal. At higher V g  = 2.5 V, we observe a large decrease in electrical conductivity of >20% (at 4.2 K) due to the prevalence of strongly blocked conduction pathways

  14. Negative differential transconductance in electrolyte-gated ruthenate

    Energy Technology Data Exchange (ETDEWEB)

    Hassan, Muhammad Umair [Cavendish Laboratory, University of Cambridge, J J Thomson Avenue, Cambridge CB3 0HE (United Kingdom); Center for Micro and Nano Devices, Department of Physics, COMSATS Institute of Information Technology, Park Road, Shehzad Town 44000, Islamabad (Pakistan); Dhoot, Anoop Singh, E-mail: asd24@cam.ac.uk [Cavendish Laboratory, University of Cambridge, J J Thomson Avenue, Cambridge CB3 0HE (United Kingdom); Wimbush, Stuart C. [Department of Materials Science and Metallurgy, University of Cambridge, 27 Charles Babbage Road, Cambridge CB3 0FS (United Kingdom); The MacDiarmid Institute for Advanced Materials and Nanotechnology, Victoria University of Wellington, P.O. Box 600, Wellington 6140 (New Zealand)

    2015-01-19

    We report on a study of electric field-induced doping of the highly conductive ruthenate SrRuO{sub 3} using an ionic liquid as the gate dielectric in a field-effect transistor configuration. Two distinct carrier transport regimes are identified for increasing positive gate voltage in thin (10 nm) films grown heteroepitaxially on SrTiO{sub 3} substrates. For V{sub g} = 2 V and lower, the sample shows an increased conductivity of up to 13%, as might be expected for electron doping of a metal. At higher V{sub g} = 2.5 V, we observe a large decrease in electrical conductivity of >20% (at 4.2 K) due to the prevalence of strongly blocked conduction pathways.

  15. Remote interfacial dipole scattering and electron mobility degradation in Ge field-effect transistors with GeO x /Al2O3 gate dielectrics

    Science.gov (United States)

    Wang, Xiaolei; Xiang, Jinjuan; Wang, Shengkai; Wang, Wenwu; Zhao, Chao; Ye, Tianchun; Xiong, Yuhua; Zhang, Jing

    2016-06-01

    Remote Coulomb scattering (RCS) on electron mobility degradation is investigated experimentally in Ge-based metal-oxide-semiconductor field-effect-transistors (MOSFETs) with GeO x /Al2O3 gate stacks. It is found that the mobility increases with greater GeO x thickness (7.8-20.8 Å). The physical origin of this mobility dependence on GeO x thickness is explored. The following factors are excluded: Coulomb scattering due to interfacial traps at GeO x /Ge, phonon scattering, and surface roughness scattering. Therefore, the RCS from charges in gate stacks is studied. The charge distributions in GeO x /Al2O3 gate stacks are evaluated experimentally. The bulk charges in Al2O3 and GeO x are found to be negligible. The density of the interfacial charge is  +3.2  ×  1012 cm-2 at the GeO x /Ge interface and  -2.3  ×  1012 cm-2 at the Al2O3/GeO x interface. The electric dipole at the Al2O3/GeO x interface is found to be  +0.15 V, which corresponds to an areal charge density of 1.9  ×  1013 cm-2. The origin of this mobility dependence on GeO x thickness is attributed to the RCS due to the electric dipole at the Al2O3/GeO x interface. This remote dipole scattering is found to play a significant role in mobility degradation. The discovery of this new scattering mechanism indicates that the engineering of the Al2O3/GeO x interface is key for mobility enhancement and device performance improvement. These results are helpful for understanding and engineering Ge mobility enhancement.

  16. Drying Temperature Dependence of Sol-gel Spin Coated Bilayer Composite ZnO/TiO2 Thin Films for Extended Gate Field Effect Transistor pH Sensor

    Science.gov (United States)

    Rahman, R. A.; Zulkefle, M. A.; Yusoff, K. A.; Abdullah, W. F. H.; Rusop, M.; Herman, S. H.

    2018-03-01

    This study presents an investigation on zinc oxide (ZnO) and titanium dioxide (TiO2) bilayer film applied as the sensing membrane for extended-gate field effect transistor (EGFET) for pH sensing application. The influences of the drying temperatures on the pH sensing capability of ZnO/TiO2 were investigated. The sensing performance of the thin films were measured by connecting the thin film to a commercial MOSFET to form the extended gates. By varying the drying temperature, we found that the ZnO/TiO2 thin film dried at 150°C gave the highest sensitivity compared to other drying conditions, with the sensitivity value of 48.80 mV/pH.

  17. Electromigration study of Al thin films deposited on low dielectric polyimide and SiO sub 2 ILD

    CERN Document Server

    Eun, B S

    1999-01-01

    The electromigration characteristics of Al-1 %Si-0.5 %Cu films deposited onto three kinds of polyimides (PI-2734, PI-2611, and BG-2480) and onto SiO sub 2 prepared by low pressure chemical vapor deposition have been investigated. The Al lines deposited onto SiO sub 2 showed about a one-order higher electromigration lifetime than those deposited onto polyimide interlayer dielectrics (ILDs). The electromigration characteristics degraded as the polyimide thickness increased. Joule heat which accumulated at the Al/polyimide interface was the main cause of the decrease in the electromigration reliability because the thermal conductivity of the polyimides was about one order lower than that of SiO sub 2.

  18. Effects of Gate Stack Structural and Process Defectivity on High-k Dielectric Dependence of NBTI Reliability in 32 nm Technology Node PMOSFETs

    Directory of Open Access Journals (Sweden)

    H. Hussin

    2014-01-01

    Full Text Available We present a simulation study on negative bias temperature instability (NBTI induced hole trapping in E′ center defects, which leads to depassivation of interface trap precursor in different geometrical structures of high-k PMOSFET gate stacks using the two-stage NBTI model. The resulting degradation is characterized based on the time evolution of the interface and hole trap densities, as well as the resulting threshold voltage shift. By varying the physical thicknesses of the interface silicon dioxide (SiO2 and hafnium oxide (HfO2 layers, we investigate how the variation in thickness affects hole trapping/detrapping at different stress temperatures. The results suggest that the degradations are highly dependent on the physical gate stack parameters for a given stress voltage and temperature. The degradation is more pronounced by 5% when the thicknesses of HfO2 are increased but is reduced by 11% when the SiO2 interface layer thickness is increased during lower stress voltage. However, at higher stress voltage, greater degradation is observed for a thicker SiO2 interface layer. In addition, the existence of different stress temperatures at which the degradation behavior differs implies that the hole trapping/detrapping event is thermally activated.

  19. Control of Nanoplane Orientation in voBN for High Thermal Anisotropy in a Dielectric Thin Film: A New Solution for Thermal Hotspot Mitigation in Electronics.

    Science.gov (United States)

    Cometto, Olivier; Samani, Majid K; Liu, Bo; Sun, Shuangxi; Tsang, Siu Hon; Liu, Johan; Zhou, Kun; Teo, Edwin H T

    2017-03-01

    High anisotropic thermal materials, which allow heat to dissipate in a preferential direction, are of interest as a prospective material for electronics as an effective thermal management solution for hot spots. However, due to their preferential heat propagation in the in-plane direction, the heat spreads laterally instead of vertically. This limitation makes these materials ineffective as the density of hot spots increases. Here, we produce a new dielectric thin film material at room temperature, named vertically ordered nanocrystalline h-BN (voBN). It is produced such that its preferential thermally conductive direction is aligned in the vertical axis, which facilitates direct thermal extraction, thereby addressing the increasing challenge of thermal crosstalk. The uniqueness of voBN comes from its h-BN nanocrystals where all their basal planes are aligned in the direction normal to the substrate plane. Using the 3ω method, we show that voBN exhibits high anisotropic thermal conductivity (TC) with a 16-fold difference between through-film TC and in-plane TC (respectively 4.26 and 0.26 W·m -1 ·K -1 ). Molecular dynamics simulations also concurred with the experimental data, showing that the origin of this anisotropic behavior is due to the nature of voBN's plane ordering. While the consistent vertical ordering provides an uninterrupted and preferred propagation path for phonons in the through-film direction, discontinuity in the lateral direction leads to a reduced in-plane TC. In addition, we also use COMSOL to simulate how the dielectric and thermal properties of voBN enable an increase in hot spot density up to 295% compared with SiO 2 , without any temperature increase.

  20. Lateral protonic/electronic hybrid oxide thin-film transistor gated by SiO2 nanogranular films

    International Nuclear Information System (INIS)

    Zhu, Li Qiang; Chao, Jin Yu; Xiao, Hui

    2014-01-01

    Ionic/electronic interaction offers an additional dimension in the recent advancements of condensed materials. Here, lateral gate control of conductivities of indium-zinc-oxide (IZO) films is reported. An electric-double-layer (EDL) transistor configuration was utilized with a phosphorous-doped SiO 2 nanogranular film to provide a strong lateral electric field. Due to the strong lateral protonic/electronic interfacial coupling effect, the IZO EDL transistor could operate at a low-voltage of 1 V. A resistor-loaded inverter is built, showing a high voltage gain of ∼8 at a low supply voltage of 1 V. The lateral ionic/electronic coupling effects are interesting for bioelectronics and portable electronics