An integrated lithography concept with application on 45-nm ½ pitch flash memory devices

Science.gov (United States)

Dusa, Mircea; Engelen, Andre; Finders, Jo

2006-03-01

It is well accepted to judge imaging capability of an exposure tool primarily on printing equal line-spaces, at a minimum ½ pitch. Further on, combining line-space minimum ½ pitches with scanner maximum NA, defines the process k I. From a lithographer viewpoint, flash memory device is the perfect candidate to achieve lowest k I lithography for a given NA. This is justified by flash layout specific, with regular and relative simple 1-D topology of the critical layers that look like line-space gratings. In reality, flash layout presents a subtle topology and cannot be considered a simple 1-D line-space problem. Uniqueness to flash layout is the array-end zones, where pattern regularity is broken up by features with dimensions and separation of n x ½ pitch, where n is an integer number that we used in this work to manipulate litho process latitudes. Integrated lithography concept seeks to tweak flash pattern details and tune it with scanner control parameters. We introduce feature-center placement through focus and dose as the metric to characterize a cross-coupling phenomena occurring between adjacent features located at array-end of typical flash poly wordline layer. We comparedthe metric behavior with usual litho process window parameters and identified interactions with scanner CDU control parameters. We show how feature-center placement errors are direct functions of optical and physical characteristics of mask materials, attenuated PSM or binary, and of layout array-end topology. Imaging at extreme low-k I, effects from layout specifics and mask materials are best characterized by full vector, rigorous EM simulation, instead of scalar approach, typically used for OPC treatment. Predicted CDU performance of 1.2NA scanner, based on integrated lithography concept, matched very well the experimental results in printing 45nm ½ pitch flash wordline layer. Results show that 1.2NA scanner, operating at 0.28 k I could be an effective lithography solution for 45nm

Flash memory management system and method utilizing multiple block list windows

Science.gov (United States)

Chow, James (Inventor); Gender, Thomas K. (Inventor)

2005-01-01

The present invention provides a flash memory management system and method with increased performance. The flash memory management system provides the ability to efficiently manage and allocate flash memory use in a way that improves reliability and longevity, while maintaining good performance levels. The flash memory management system includes a free block mechanism, a disk maintenance mechanism, and a bad block detection mechanism. The free block mechanism provides efficient sorting of free blocks to facilitate selecting low use blocks for writing. The disk maintenance mechanism provides for the ability to efficiently clean flash memory blocks during processor idle times. The bad block detection mechanism provides the ability to better detect when a block of flash memory is likely to go bad. The flash status mechanism stores information in fast access memory that describes the content and status of the data in the flash disk. The new bank detection mechanism provides the ability to automatically detect when new banks of flash memory are added to the system. Together, these mechanisms provide a flash memory management system that can improve the operational efficiency of systems that utilize flash memory.

Modeling of apparent activation energy and lifetime estimation in NAND flash memory

International Nuclear Information System (INIS)

Lee, Kyunghwan; Shin, Hyungcheol; Kang, Myounggon; Hwang, Yuchul

2015-01-01

Misunderstanding apparent activation energy (E aa ) can cause serious error in lifetime predictions. In this paper, the E aa is investigated for sub 20 nm NAND flash memory. In a high-temperature (HT) regime, the interface trap (N it ) recovery mechanism has the greatest impact on the charge loss. However, the values of E aa and E a(Nit) have a wide difference. Also, the lifetime of the device cannot be estimated by the Arrhenius model due to the E aa roll-off behavior. For the first time, we reveal the origin of abnormal characteristics on E aa and derive a mathematical formula for E aa as a function of each E a(mechanism) in NAND flash memory. Using the proposed E aa equation, the accurate lifetime for the device is estimated. (paper)

Performance improvement of charge trap flash memory by using a composition-modulated high-k trapping layer

International Nuclear Information System (INIS)

Tang Zhen-Jie; Li Rong; Yin Jiang

2013-01-01

A composition-modulated (HfO 2 ) x (Al 2 O3) 1−x charge trapping layer is proposed for charge trap flash memory by controlling the Al atom content to form a peak and valley shaped band gap. It is found that the memory device using the composition-modulated (HfO 2 ) x (Al 2 O 3 ) 1−x as the charge trapping layer exhibits a larger memory window of 11.5 V, improves data retention even at high temperature, and enhances the program/erase speed. Improvements of the memory characteristics are attributed to the special band-gap structure resulting from the composition-modulated trapping layer. Therefore, the composition-modulated charge trapping layer may be useful in future nonvolatile flash memory device application. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Error Characterization and Mitigation for 16Nm MLC NAND Flash Memory Under Total Ionizing Dose Effect

Science.gov (United States)

Li, Yue (Inventor); Bruck, Jehoshua (Inventor)

2018-01-01

A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.

From silicon to organic nanoparticle memory devices.

Science.gov (United States)

Tsoukalas, D

2009-10-28

After introducing the operational principle of nanoparticle memory devices, their current status in silicon technology is briefly presented in this work. The discussion then focuses on hybrid technologies, where silicon and organic materials have been combined together in a nanoparticle memory device, and finally concludes with the recent development of organic nanoparticle memories. The review is focused on the nanoparticle memory concept as an extension of the current flash memory device. Organic nanoparticle memories are at a very early stage of research and have not yet found applications. When this happens, it is expected that they will not directly compete with mature silicon technology but will find their own areas of application.

Ensuring the Trust of NAND Flash Memory: Going Beyond the Published Interface

Science.gov (United States)

2016-03-17

SSDs), in order to evaluate advanced Flash memory devices that are not available as individual components on the open market and for which no...measurable changes due to memory cell stress is shown in Figure 3 for a 42 nm SLC Samsung K9K8G08U0D device. Two logical pages were characterized... Samsung K9K8G08U0D device to change from a logical ‘0’ to a logical ‘1’ were measured. Three bits on the page were then fully programmed and erased

Performance enhancement in p-channel charge-trapping flash memory devices with Si/Ge super-lattice channel and band-to-band tunneling induced hot-electron injection

International Nuclear Information System (INIS)

Liu, Li-Jung; Chang-Liao, Kuei-Shu; Jian, Yi-Chuen; Wang, Tien-Ko; Tsai, Ming-Jinn

2013-01-01

P-channel charge-trapping flash memory devices with Si, SiGe, and Si/Ge super-lattice channel are investigated in this work. A Si/Ge super-lattice structure with extremely low roughness and good crystal structure is obtained by precisely controlling the epitaxy thickness of Ge layer. Both programming and erasing (P/E) speeds are significantly improved by employing this Si/Ge super-lattice channel. Moreover, satisfactory retention and excellent endurance characteristics up to 10 6 P/E cycles with 3.8 V memory window show that the degradation on reliability properties is negligible when super-lattice channel is introduced. - Highlights: ► A super-lattice structure is proposed to introduce more Ge content into channel. ► Super-lattice structure possesses low roughness and good crystal structure. ► P-channel flash devices with Si, SiGe, and super-lattice channel are investigated. ► Programming/erasing speeds are significantly improved. ► Reliability properties can be kept for device with super-lattice channel

Flash-Aware Page Replacement Algorithm

Directory of Open Access Journals (Sweden)

Guangxia Xu

2014-01-01

Full Text Available Due to the limited main memory resource of consumer electronics equipped with NAND flash memory as storage device, an efficient page replacement algorithm called FAPRA is proposed for NAND flash memory in the light of its inherent characteristics. FAPRA introduces an efficient victim page selection scheme taking into account the benefit-to-cost ratio for evicting each victim page candidate and the combined recency and frequency value, as well as the erase count of the block to which each page belongs. Since the dirty victim page often contains clean data that exist in both the main memory and the NAND flash memory based storage device, FAPRA only writes the dirty data within the victim page back to the NAND flash memory based storage device in order to reduce the redundant write operations. We conduct a series of trace-driven simulations and experimental results show that our proposed FAPRA algorithm outperforms the state-of-the-art algorithms in terms of page hit ratio, the number of write operations, runtime, and the degree of wear leveling.

In2Ga2ZnO7 oxide semiconductor based charge trap device for NAND flash memory

Science.gov (United States)

Hwang, Eun Suk; Kim, Jun Shik; Jeon, Seok Min; Lee, Seung Jun; Jang, Younjin; Cho, Deok-Yong; Hwang, Cheol Seong

2018-04-01

The programming characteristics of charge trap flash memory device adopting amorphous In2Ga2ZnO7 (a-IGZO) oxide semiconductors as channel layer were evaluated. Metal-organic chemical vapor deposition (MOCVD) and RF-sputtering processes were used to grow a 45 nm thick a-IGZO layer on a 20 nm thick SiO2 (blocking oxide)/p++-Si (control gate) substrate, where 3 nm thick atomic layer deposited Al2O3 (tunneling oxide) and 5 nm thick low-pressure CVD Si3N4 (charge trap) layers were intervened between the a-IGZO and substrate. Despite the identical stoichiometry and other physicochemical properties of the MOCVD and sputtered a-IGZO, a much faster programming speed of MOCVD a-IGZO was observed. A comparable amount of oxygen vacancies was found in both MOCVD and sputtered a-IGZO, confirmed by x-ray photoelectron spectroscopy and bias-illumination-instability test measurements. Ultraviolet photoelectron spectroscopy analysis revealed a higher Fermi level (E F) of the MOCVD a-IGZO (∼0.3 eV) film than that of the sputtered a-IGZO, which could be ascribed to the higher hydrogen concentration in the MOCVD a-IGZO film. Since the programming in a flash memory device is governed by the tunneling of electrons from the channel to charge trapping layer, the faster programming performance could be the result of a higher E F of MOCVD a-IGZO.

Electric-field-controlled interface dipole modulation for Si-based memory devices.

Science.gov (United States)

Miyata, Noriyuki

2018-05-31

Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

Flash memories economic principles of performance, cost and reliability optimization

CERN Document Server

Richter, Detlev

2014-01-01

The subject of this book is to introduce a model-based quantitative performance indicator methodology applicable for performance, cost and reliability optimization of non-volatile memories. The complex example of flash memories is used to introduce and apply the methodology. It has been developed by the author based on an industrial 2-bit to 4-bit per cell flash development project. For the first time, design and cost aspects of 3D integration of flash memory are treated in this book. Cell, array, performance and reliability effects of flash memories are introduced and analyzed. Key performance parameters are derived to handle the flash complexity. A performance and array memory model is developed and a set of performance indicators characterizing architecture, cost and durability is defined.   Flash memories are selected to apply the Performance Indicator Methodology to quantify design and technology innovation. A graphical representation based on trend lines is introduced to support a requirement based pr...

Radiation damage in flash memory cells

International Nuclear Information System (INIS)

Claeys, C.; Ohyama, H.; Simoen, E.; Nakabayashi, M.; Kobayashi, K.

2002-01-01

Results are presented of a study on the effects of total ionization dose and displacement damage, induced by high-energy electrons, protons and alphas, on the performance degradation of flash memory cells integrated in a microcomputer. A conventional stacked-gate n-channel flash memory cell using a 0.8 μm n-polysilicon gate technology is employed. Irradiations by 1-MeV electrons and 20-MeV protons and alpha particles were done at room temperature. The impact of the fluence on the input characteristics, threshold voltage shift and drain and gate leakage was investigated. The threshold voltage change for proton and alpha irradiations is about three orders of magnitude larger than that for electrons. The performance degradation is mainly caused by the total ionization dose (TID) damage in the tunnel oxide and in the interpoly dielectric layer and by the creation of interface traps at the Si-SiO 2 interface. The impact of the irradiation temperature on the device degradation was studied for electrons and gammas, pointing out that irradiation at room temperature is mostly the worst case. Finally, attention is given to the impact of isochronal and isothermal annealing on the recovery of the degradation introduced after room temperature proton and electron irradiation

Non-volatile flash memory with discrete bionanodot floating gate assembled by protein template

International Nuclear Information System (INIS)

Miura, Atsushi; Yamashita, Ichiro; Uraoka, Yukiharu; Fuyuki, Takashi; Tsukamoto, Rikako; Yoshii, Shigeo

2008-01-01

We demonstrated non-volatile flash memory fabrication by utilizing uniformly sized cobalt oxide (Co 3 O 4 ) bionanodot (Co-BND) architecture assembled by a cage-shaped supramolecular protein template. A fabricated high-density Co-BND array was buried in a metal-oxide-semiconductor field-effect-transistor (MOSFET) structure to use as the charge storage node of a floating nanodot gate memory. We observed a clockwise hysteresis in the drain current-gate voltage characteristics of fabricated BND-embedded MOSFETs. Observed hysteresis obviously indicates a memory operation of Co-BND-embedded MOSFETs due to the charge confinement in the embedded BND and successful functioning of embedded BNDs as the charge storage nodes of the non-volatile flash memory. Fabricated Co-BND-embedded MOSFETs showed good memory properties such as wide memory windows, long charge retention and high tolerance to repeated write/erase operations. A new pathway for device fabrication by utilizing the versatile functionality of biomolecules is presented

GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

Energy Technology Data Exchange (ETDEWEB)

Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P. [Materials Science Centre, Indian Institute of Technology, Kharagpur 721 302 (India); Chakraborty, S. [Applied Materials Science Division, Saha Institute of Nuclear Physics, 1/AF Bidhannagar, Sector-I, Kolkata 700 064 (India); Mukherjee, Rabibrata [Department of Chemical Engineering, Indian Institute of Technology, Kharagpur 721302 (India)

2015-06-24

Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.

Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

Science.gov (United States)

Swift, G.

2002-01-01

JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

GeckoFTL: Scalable Flash Translation Techniques For Very Large Flash Devices

DEFF Research Database (Denmark)

Dayan, Niv; Bonnet, Philippe; Idreos, Stratos

2016-01-01

The volume of metadata needed by a flash translation layer (FTL) is proportional to the storage capacity of a flash device. Ideally, this metadata should reside in the device's integrated RAM to enable fast access. However, as flash devices scale to terabytes, the necessary volume of metadata...... thereby harming performance and device lifetime. In this paper, we identify a key component of the metadata called the Page Validity Bitmap (PVB) as the bottleneck. PVB is used by the garbage-collectors of state-of-the-art FTLs to keep track of which physical pages in the device are invalid. PVB...... constitutes 95% of the FTL's RAM-resident metadata, and recovering PVB after power fails takes a significant proportion of the overall recovery time. To solve this problem, we propose a page-associative FTL called GeckoFTL, whose central innovation is replacing PVB with a new data structure called Logarithmic...

Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

Science.gov (United States)

Hong, Augustin Jinwoo

Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

Optimal proximity correction: application for flash memory design

Science.gov (United States)

Chen, Y. O.; Huang, D. L.; Sung, K. T.; Chiang, J. J.; Yu, M.; Teng, F.; Chu, Lung; Rey, Juan C.; Bernard, Douglas A.; Li, Jiangwei; Li, Junling; Moroz, V.; Boksha, Victor V.

1998-06-01

Proximity Correction is the technology for which the most of IC manufacturers are committed already. The final intended result of correction is affected by many factors other than the optical characteristics of the mask-stepper system, such as photoresist exposure, post-exposure bake and development parameters, etch selectivity and anisotropy, and underlying topography. The most advanced industry and research groups already reported immediate need to consider wafer topography as one of the major components during a Proximity Correction procedure. In the present work we are discussing the corners rounding effect (which eventually cause electrical leakage) observed for the elements of Poly2 layer for a Flash Memory Design. It was found that the rounding originated by three- dimensional effects due to variation of photoresist thickness resulting from the non-planar substrate. Our major goal was to understand the reasons and correct corner rounding. As a result of this work highly effective layout correction methodology was demonstrated and manufacturable Depth Of Focus was achieved. Another purpose of the work was to demonstrate complete integration flow for a Flash Memory Design based on photolithography; deposition/etch; ion implantation/oxidation/diffusion; and device simulators.

Digital Device Architecture and the Safe Use of Flash Devices in Munitions

Science.gov (United States)

Katz, Richard B.; Flowers, David; Bergevin, Keith

2017-01-01

Flash technology is being utilized in fuzed munition applications and, based on the development of digital logic devices in the commercial world, usage of flash technology will increase. Digital devices of interest to designers include flash-based microcontrollers and field programmable gate arrays (FPGAs). Almost a decade ago, a study was undertaken to determine if flash-based microcontrollers could be safely used in fuzes and, if so, how should such devices be applied. The results were documented in the Technical Manual for the Use of Logic Devices in Safety Features. This paper will first review the Technical Manual and discuss the rationale behind the suggested architectures for microcontrollers and a brief review of the concern about data retention in flash cells. An architectural feature in the microcontroller under study will be discussed and its use will show how to screen for weak or failed cells during manufacture, storage, or immediately prior to use. As was done for microcontrollers a decade ago, architectures for a flash-based FPGA will be discussed, showing how it can be safely used in fuzes. Additionally, architectures for using non-volatile (including flash-based) storage will be discussed for SRAM-based FPGAs.

A stacked memory device on logic 3D technology for ultra-high-density data storage

International Nuclear Information System (INIS)

Kim, Jiyoung; Hong, Augustin J; Kim, Sung Min; Shin, Kyeong-Sik; Song, Emil B; Hwang, Yongha; Xiu, Faxian; Galatsis, Kosmas; Chui, Chi On; Candler, Rob N; Wang, Kang L; Choi, Siyoung; Moon, Joo-Tae

2011-01-01

We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.

A stacked memory device on logic 3D technology for ultra-high-density data storage

Energy Technology Data Exchange (ETDEWEB)

Kim, Jiyoung; Hong, Augustin J; Kim, Sung Min; Shin, Kyeong-Sik; Song, Emil B; Hwang, Yongha; Xiu, Faxian; Galatsis, Kosmas; Chui, Chi On; Candler, Rob N; Wang, Kang L [Device Research Laboratory, Department of Electrical Engineering, University of California, Los Angeles, CA 90095 (United States); Choi, Siyoung; Moon, Joo-Tae, E-mail: hbt100@ee.ucla.edu [Advanced Technology Development Team and Process Development Team, Memory R and D Center, Samsung Electronics Co. Ltd (Korea, Republic of)

2011-06-24

We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.

Fast neutron irradiation tests of flash memories used in space environment at the ISIS spallation neutron source

Directory of Open Access Journals (Sweden)

C. Andreani

2018-02-01

Full Text Available This paper presents a neutron accelerated study of soft errors in advanced electronic devices used in space missions, i.e. Flash memories performed at the ChipIr and VESUVIO beam lines at the ISIS spallation neutron source. The two neutron beam lines are set up to mimic the space environment spectra and allow neutron irradiation tests on Flash memories in the neutron energy range above 10 MeV and up to 800 MeV. The ISIS neutron energy spectrum is similar to the one occurring in the atmospheric as well as in space and planetary environments, with intensity enhancements varying in the range 108- 10 9 and 106- 10 7 respectively. Such conditions are suitable for the characterization of the atmospheric, space and planetary neutron radiation environments, and are directly applicable for accelerated tests of electronic components as demonstrated here in benchmark measurements performed on flash memories.

Fast neutron irradiation tests of flash memories used in space environment at the ISIS spallation neutron source

Science.gov (United States)

Andreani, C.; Senesi, R.; Paccagnella, A.; Bagatin, M.; Gerardin, S.; Cazzaniga, C.; Frost, C. D.; Picozza, P.; Gorini, G.; Mancini, R.; Sarno, M.

2018-02-01

This paper presents a neutron accelerated study of soft errors in advanced electronic devices used in space missions, i.e. Flash memories performed at the ChipIr and VESUVIO beam lines at the ISIS spallation neutron source. The two neutron beam lines are set up to mimic the space environment spectra and allow neutron irradiation tests on Flash memories in the neutron energy range above 10 MeV and up to 800 MeV. The ISIS neutron energy spectrum is similar to the one occurring in the atmospheric as well as in space and planetary environments, with intensity enhancements varying in the range 108- 10 9 and 106- 10 7 respectively. Such conditions are suitable for the characterization of the atmospheric, space and planetary neutron radiation environments, and are directly applicable for accelerated tests of electronic components as demonstrated here in benchmark measurements performed on flash memories.

Non-volatile memory devices with redox-active diruthenium molecular compound

International Nuclear Information System (INIS)

Pookpanratana, S; Zhu, H; Bittle, E G; Richter, C A; Li, Q; Hacker, C A; Natoli, S N; Ren, T

2016-01-01

Reduction-oxidation (redox) active molecules hold potential for memory devices due to their many unique properties. We report the use of a novel diruthenium-based redox molecule incorporated into a non-volatile Flash-based memory device architecture. The memory capacitor device structure consists of a Pd/Al 2 O 3 /molecule/SiO 2 /Si structure. The bulky ruthenium redox molecule is attached to the surface by using a ‘click’ reaction and the monolayer structure is characterized by x-ray photoelectron spectroscopy to verify the Ru attachment and molecular density. The ‘click’ reaction is particularly advantageous for memory applications because of (1) ease of chemical design and synthesis, and (2) provides an additional spatial barrier between the oxide/silicon to the diruthenium molecule. Ultraviolet photoelectron spectroscopy data identified the energy of the electronic levels of the surface before and after surface modification. The molecular memory devices display an unsaturated charge storage window attributed to the intrinsic properties of the redox-active molecule. Our findings demonstrate the strengths and challenges with integrating molecular layers within solid-state devices, which will influence the future design of molecular memory devices. (paper)

Robust resistive memory devices using solution-processable metal-coordinated azo aromatics

Science.gov (United States)

Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.

2017-12-01

Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.

Evaluating Non-In-Place Update Techniques for Flash-Based Transaction Processing Systems

Science.gov (United States)

Wang, Yongkun; Goda, Kazuo; Kitsuregawa, Masaru

Recently, flash memory is emerging as the storage device. With price sliding fast, the cost per capacity is approaching to that of SATA disk drives. So far flash memory has been widely deployed in consumer electronics even partly in mobile computing environments. For enterprise systems, the deployment has been studied by many researchers and developers. In terms of the access performance characteristics, flash memory is quite different from disk drives. Without the mechanical components, flash memory has very high random read performance, whereas it has a limited random write performance because of the erase-before-write design. The random write performance of flash memory is comparable with or even worse than that of disk drives. Due to such a performance asymmetry, naive deployment to enterprise systems may not exploit the potential performance of flash memory at full blast. This paper studies the effectiveness of using non-in-place-update (NIPU) techniques through the IO path of flash-based transaction processing systems. Our deliberate experiments using both open-source DBMS and commercial DBMS validated the potential benefits; x3.0 to x6.6 performance improvement was confirmed by incorporating non-in-place-update techniques into file system without any modification of applications or storage devices.

A Fault-Tolerant Radiation-Robust Mass Storage Concept for Highly Scaled Flash Memory

Science.gov (United States)

Fuchs, Cristian M.; Trinitis, Carsten; Appel, Nicolas; Langer, Martin

2015-09-01

Future spacemissions will require vast amounts of data to be stored and processed aboard spacecraft. While satisfying operational mission requirements, storage systems must guarantee data integrity and recover damaged data throughout the mission. NAND-flash memories have become popular for space-borne high performance mass memory scenarios, though future storage concepts will rely upon highly scaled flash or other memory technologies. With modern flash memory, single bit erasure coding and RAID based concepts are insufficient. Thus, a fully run-time configurable, high performance, dependable storage concept, requiring a minimal set of logic or software. The solution is based on composite erasure coding and can be adjusted for altered mission duration or changing environmental conditions.

Memristive behavior in a junctionless flash memory cell

Energy Technology Data Exchange (ETDEWEB)

Orak, Ikram [Vocational School of Health Services, Bingöl University, 12000 Bingöl (Turkey); Department of Physics, Faculty of Science and Art, Bingöl University, 12000 Bingöl (Turkey); Ürel, Mustafa; Dana, Aykutlu, E-mail: aykutlu@unam.bilkent.edu.tr [UNAM Institute of Materials Science and Nanotechnology, Bilkent University, 06800 Ankara (Turkey); Bakan, Gokhan [Faculty of Engineering, Antalya International University, 07190 Antalya (Turkey)

2015-06-08

We report charge storage based memristive operation of a junctionless thin film flash memory cell when it is operated as a two terminal device by grounding the gate. Unlike memristors based on nanoionics, the presented device mode, which we refer to as the flashristor mode, potentially allows greater control over the memristive properties, allowing rational design. The mode is demonstrated using a depletion type n-channel ZnO transistor grown by atomic layer deposition (ALD), with HfO{sub 2} as the tunnel dielectric, Al{sub 2}O{sub 3} as the control dielectric, and non-stoichiometric silicon nitride as the charge storage layer. The device exhibits the pinched hysteresis of a memristor and in the unoptimized device, R{sub off}/R{sub on} ratios of about 3 are presented with low operating voltages below 5 V. A simplified model predicts R{sub off}/R{sub on} ratios can be improved significantly by adjusting the native threshold voltage of the devices. The repeatability of the resistive switching is excellent and devices exhibit 10{sup 6 }s retention time, which can, in principle, be improved by engineering the gate stack and storage layer properties. The flashristor mode can find use in analog information processing applications, such as neuromorphic computing, where well-behaving and highly repeatable memristive properties are desirable.

Space Qualified, Radiation Hardened, Dense Monolithic Flash Memory, Phase II

Data.gov (United States)

National Aeronautics and Space Administration — Space Micro proposes to build a radiation hardened by design (RHBD) flash memory, using a modified version of our RH-eDRAM Memory Controller to solve all the single...

New memory devices based on the proton transfer process

Science.gov (United States)

Wierzbowska, Małgorzata

2016-01-01

Memory devices operating due to the fast proton transfer (PT) process are proposed by the means of first-principles calculations. Writing information is performed using the electrostatic potential of scanning tunneling microscopy (STM). Reading information is based on the effect of the local magnetization induced at the zigzag graphene nanoribbon (Z-GNR) edge—saturated with oxygen or the hydroxy group—and can be realized with the use of giant magnetoresistance (GMR), a magnetic tunnel junction or spin-transfer torque devices. The energetic barriers for the hop forward and backward processes can be tuned by the distance and potential of the STM tip; this thus enables us to tailor the non-volatile logic states. The proposed system enables very dense packing of the logic cells and could be used in random access and flash memory devices.

New memory devices based on the proton transfer process

International Nuclear Information System (INIS)

Wierzbowska, Małgorzata

2016-01-01

Memory devices operating due to the fast proton transfer (PT) process are proposed by the means of first-principles calculations. Writing  information is performed using the electrostatic potential of scanning tunneling microscopy (STM). Reading information is based on the effect of the local magnetization induced at the zigzag graphene nanoribbon (Z-GNR) edge—saturated with oxygen or the hydroxy group—and can be realized with the use of giant magnetoresistance (GMR), a magnetic tunnel junction or spin-transfer torque devices. The energetic barriers for the hop forward and backward processes can be tuned by the distance and potential of the STM tip; this thus enables us to tailor the non-volatile logic states. The proposed system enables very dense packing of the logic cells and could be used in random access and flash memory devices. (paper)

A low-voltage flash memory cell utilizing the gate-injection program/erase method with a recessed channel structure

International Nuclear Information System (INIS)

Wu Dake; Huang Ru; Wang Pengfei; Tang Poren; Wang Yangyuan

2008-01-01

In this paper, a low-voltage recessed channel SONOS flash memory using the gate-injection program/erase method is proposed and investigated for NAND application. It is shown that the proposed flash memory can achieve 8 V lower programming voltage compared with planar flash memory, due to the effective capacitance coupling and the electric-field enhancement by combining the recessed channel structure and the gate-injection program/erase method. In addition, more than 30% larger threshold voltage window and improved short channel effects can be obtained in the proposed flash memory

Silicon nano crystal-based non-volatile memory devices

International Nuclear Information System (INIS)

Ng, C.Y.; Chen, T.P.; Sreeduth, D.; Chen, Q.; Ding, L.; Du, A.

2006-01-01

In this work, we have investigated the performance and reliability of a Flash memory based on silicon nanocrystal synthesized with very-low energy ion beams. The devices are fabricated with a conventional CMOS process and the size of the nanocrystal is ∼ 4 nm as determined from TEM measurement. Electrical properties of the devices with a tunnel oxide of either 3 nm or 7 nm are evaluated. The devices exhibit good endurance up to 10 5 W/E cycles even at the high operation temperature of 85 deg. C for both the tunnel oxide thicknesses. For the thicker tunnel oxide (i.e., the 7-nm tunnel oxide), a good retention performance with an extrapolated 10-year memory window of ∼ 0.3 V (or ∼ 20% of charge lose after 10 years) is achieved. However, ∼ 70% of charge loss after 10 years is expected for the thinner tunnel oxide (i.e., the 3-nm tunnel oxide)

Overview of emerging nonvolatile memory technologies.

Science.gov (United States)

Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

Overview of emerging nonvolatile memory technologies

Science.gov (United States)

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

Modélisation de Fautes et Test des Mémoires Flash

OpenAIRE

Ginez , Olivier

2007-01-01

Flash memories more and more occurs in complex integrated circuits designed for portable electronic devices and dominate the area of such circuits. The lack of defects within these memories is therefore one the key elements of the production yield for manufacturers of these types of applications. However, the high integration density and the complexity of the fabrication process make these Flash memories more and more prone to manufacturing defects. To exhibit the failures that affect the fun...

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

Science.gov (United States)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

uFLIP: Understanding the Energy Consumption of Flash Devices

DEFF Research Database (Denmark)

Bjørling, Matias; Bonnet, Philippe; Bouganim, Luc

2010-01-01

Understanding the energy consumption of flash devices is important for two reasons. First, energy is emerging as a key metric for data management systems. It is thus important to understand how we can reason about the energy consumption of flash devices beyond their approximate aggregate...... consumption (low power consumption in idle mode, average Watt consumption from the data sheets). Second, when measured at a sufficiently fine granularity, the energy consumption of a given device might complement the performance characteristics derived from its response time profile. Indeed, background work...... which is not directly observable with a response time profile appears clearly when energy is used as a metric. In this paper, we discuss the results from the {uFLIP} benchmark applied to four different {SSD} devices using both response time and energy as metric....

Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets of NAND Flash Memory

Science.gov (United States)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond; Kim, Hak; Phan, Anthony; Seidleck, Christina; LaBel, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found the single-event upset (SEU) cross section varied inversely with fluence. The SEU cross section decreased with increasing fluence. We attribute the effect to the variable upset sensitivities of the memory cells. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, heavy ion irradiation of devices with variable upset sensitivity distribution using typical fluence levels may underestimate the cross section and on-orbit event rate.

Operational method of a ferroelectric (Fe)-NAND flash memory array

International Nuclear Information System (INIS)

Wang, Shouyu; Takahashi, Mitue; Li, Qiu-Hong; Sakai, Shigeki; Takeuchi, Ken

2009-01-01

Operations of arrayed ferroelectric (Fe)-NAND flash memory cells: erase, program and read were demonstrated for the first time using a small cell array of four word lines by two NAND strings. The memory cells and select-gate transistors were all n-channel Pt/SrBi 2 Ta 2 O 9 /Hf-Al-O/Si ferroelectric-gate field effect transistors. The erase was performed by applying 10 µs wide 7 V pulses to n- and p-wells. The program was performed by applying 10 µs wide 7 V pulses to selected word lines. Accumulated read currents of 51 programmed patterns in the Fe-NAND flash memory cell array successfully showed distribution of the two distinguishable '0' and '1' states. The margin between the two states became wider by applying a verification technique in programming a cell out of the eight. Retention times of bit-line currents were obtained over 33 h for both the '0' and '1' states in a program pattern

Flash Memory Reliability: Read, Program, and Erase Latency Versus Endurance Cycling

Science.gov (United States)

Heidecker, Jason

2010-01-01

This report documents the efforts and results of the fiscal year (FY) 2010 NASA Electronic Parts and Packaging Program (NEPP) task for nonvolatile memory (NVM) reliability. This year's focus was to measure latency (read, program, and erase) of NAND Flash memories and determine how these parameters drift with erase/program/read endurance cycling.

Simulation of trapping properties of high κ material as the charge storage layer for flash memory application

International Nuclear Information System (INIS)

Yeo, Yee Ngee; Wang Yingqian; Samanta, Santanu Kumar; Yoo, Won Jong; Samudra, Ganesh; Gao, Dongyue; Chong, Chee Ching

2006-01-01

We investigated the trapping properties of high κ material as the charge storage layer in non-volatile flash memory devices using a two-dimensional device simulator, Medici. The high κ material is sandwiched between two silicon oxide layers, resulting in the Silicon-Oxide-High κ-Oxide-Silicon (SOHOS) structure. The trap energy levels of the bulk electron traps in high κ material were determined. The programming and erasing voltage and time using Fowler Nordheim tunneling were estimated by simulation. The effect of deep level traps on erasing was investigated. Also, the effect of bulk traps density, thickness of block oxide and thickness of high κ material on the threshold voltage of the device was simulated

The future of memory

Science.gov (United States)

Marinella, M.

In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

76 FR 40931 - In the Matter of Certain Flash Memory and Products Containing Same; Notice of Commission...

Science.gov (United States)

2011-07-12

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-685] In the Matter of Certain Flash Memory and... for importation, and the sale within the United States after importation of certain flash memory and... other agreements, written or oral, express or implied, between the parties concerning the subject matter...

InAs quantum dots as charge storing elements for applications in flash memory devices

Energy Technology Data Exchange (ETDEWEB)

Islam, Sk Masiul; Biswas, Pranab [Materials Science Centre, Indian Institute of Technology, Kharagpur 721 302 (India); Banerji, P., E-mail: pallab@matsc.iitkgp.ernet.in [Materials Science Centre, Indian Institute of Technology, Kharagpur 721 302 (India); Chakraborty, S. [Applied Materials Science Division, Saha Institute of Nuclear Physics, 1/AF Bidhannagar, Sector-I, Kolkata 700 064 (India)

2015-08-15

Graphical abstract: - Highlights: • Catalyst-free growth of InAs quantum dots was carried out on high-k ZrO{sub 2}. • Memory device with InAs quantum dots as charge storage nodes are fabricated. • Superior memory window, low leakage and reasonably good retention were observed. • Carrier transport phenomena are explained in both program and erase operations. - Abstract: InAs quantum dots (QDs) were grown by metal organic chemical vapor deposition technique to use them as charge storage nodes. Uniform QDs were formed with average diameter 5 nm and height 5–10 nm with a density of 2 × 10{sup 11} cm{sup −2}. The QDs were grown on high-k dielectric layer (ZrO{sub 2}), which was deposited onto ultra-thin GaP passivated p-GaAs (1 0 0) substrate. A charge storage device with the structure Metal/ZrO{sub 2}/InAs QDs/ZrO{sub 2}/(GaP)GaAs/Metal was fabricated. The devices containing InAs QDs exhibit superior memory window, low leakage current density along with reasonably good charge retention. A suitable electronic band diagram corresponding to programming and erasing operations was proposed to explain the operation.

Improved speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer

International Nuclear Information System (INIS)

Zheng, Zhiwei; Huo, Zongliang; Zhang, Manhong; Zhu, Chenxin; Liu, Jing; Liu, Ming

2011-01-01

This paper reports the simultaneous improvements in erase speed and data retention characteristics in flash memory using a stacked HfO 2 /Ta 2 O 5 charge-trapping layer. In comparison to a memory capacitor with a single HfO 2 trapping layer, the erase speed of a memory capacitor with a stacked HfO 2 /Ta 2 O 5 charge-trapping layer is 100 times faster and its memory window is enlarged from 2.7 to 4.8 V for the same ±16 V sweeping voltage range. With the same initial window of ΔV FB = 4 V, the device with a stacked HfO 2 /Ta 2 O 5 charge-trapping layer has a 3.5 V extrapolated 10-year retention window, while the control device with a single HfO 2 trapping layer has only 2.5 V for the extrapolated 10-year window. The present results demonstrate that the device with the stacked HfO 2 /Ta 2 O 5 charge-trapping layer has a strong potential for future high-performance nonvolatile memory application

Analysis on applicable error-correcting code strength of storage class memory and NAND flash in hybrid storage

Science.gov (United States)

Matsui, Chihiro; Kinoshita, Reika; Takeuchi, Ken

2018-04-01

A hybrid of storage class memory (SCM) and NAND flash is a promising technology for high performance storage. Error correction is inevitable on SCM and NAND flash because their bit error rate (BER) increases with write/erase (W/E) cycles, data retention, and program/read disturb. In addition, scaling and multi-level cell technologies increase BER. However, error-correcting code (ECC) degrades storage performance because of extra memory reading and encoding/decoding time. Therefore, applicable ECC strength of SCM and NAND flash is evaluated independently by fixing ECC strength of one memory in the hybrid storage. As a result, weak BCH ECC with small correctable bit is recommended for the hybrid storage with large SCM capacity because SCM is accessed frequently. In contrast, strong and long-latency LDPC ECC can be applied to NAND flash in the hybrid storage with large SCM capacity because large-capacity SCM improves the storage performance.

Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets in a NAND Flash Memory

Science.gov (United States)

Chen, Dakai; Wilcox, Edward; Ladbury, Raymond L.; Kim, Hak; Phan, Anthony; Seidleck, Christina; Label, Kenneth

2016-01-01

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found that the single-event upset (SEU) cross section varied inversely with cumulative fluence. We attribute the effect to the variable upset sensitivities of the memory cells. Furthermore, the effect impacts only single cell upsets in general. The rate of multiple-bit upsets remained relatively constant with fluence. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, traditional SEE testing techniques may underestimate the on-orbit event rate for a device with variable upset sensitivity.

Analysis of the X-ray microbeam test result of the flash memories

International Nuclear Information System (INIS)

Yan Yihua; Ding Lili; Chen Wei; Guo Hongxia; Guo Xiaoqiang; Lin Dongsheng; Zhang Keying; Zhang Fengqi; Deng Yuliang; Fan Ruyu

2013-01-01

Background: The failure phenomenon is difficult to analyze for the flash memories when the whole chip is exposed to irradiation since both the memory array and the peripheral circuits might be degraded. Purpose: In order to detect the radiation susceptibility and corresponding phenomenon of the related circuits that included in the flash memories, the X-ray microbeam is used as the radiation source instead of 60 Co. Methods: The failure phenomenon is studied respectively when the memory array, decoder circuits, the charge pump circuits as well as the I/O circuits are exposed to radiation. The errors are mapped according to the logical address and the failure mechanism is analyzed based on the circuits. Results: Irradiated on the memory .array win lead to regularly distributed 0→1 bit flips, while only 1→0 are found when the row decoder is under exposure. Degradation of the charge pump circuits would lead to the erase/program functional failure. Conclusions: The results suggest that the X-ray microbeam radiation test is a good method for detecting the radiation susceptibility of the integrated circuits that contains lots of circuit modules. (authors)

Asymmetric Programming: A Highly Reliable Metadata Allocation Strategy for MLC NAND Flash Memory-Based Sensor Systems

Science.gov (United States)

Huang, Min; Liu, Zhaoqing; Qiao, Liyan

2014-01-01

While the NAND flash memory is widely used as the storage medium in modern sensor systems, the aggressive shrinking of process geometry and an increase in the number of bits stored in each memory cell will inevitably degrade the reliability of NAND flash memory. In particular, it's critical to enhance metadata reliability, which occupies only a small portion of the storage space, but maintains the critical information of the file system and the address translations of the storage system. Metadata damage will cause the system to crash or a large amount of data to be lost. This paper presents Asymmetric Programming, a highly reliable metadata allocation strategy for MLC NAND flash memory storage systems. Our technique exploits for the first time the property of the multi-page architecture of MLC NAND flash memory to improve the reliability of metadata. The basic idea is to keep metadata in most significant bit (MSB) pages which are more reliable than least significant bit (LSB) pages. Thus, we can achieve relatively low bit error rates for metadata. Based on this idea, we propose two strategies to optimize address mapping and garbage collection. We have implemented Asymmetric Programming on a real hardware platform. The experimental results show that Asymmetric Programming can achieve a reduction in the number of page errors of up to 99.05% with the baseline error correction scheme. PMID:25310473

Asymmetric Programming: A Highly Reliable Metadata Allocation Strategy for MLC NAND Flash Memory-Based Sensor Systems

Directory of Open Access Journals (Sweden)

Min Huang

2014-10-01

Full Text Available While the NAND flash memory is widely used as the storage medium in modern sensor systems, the aggressive shrinking of process geometry and an increase in the number of bits stored in each memory cell will inevitably degrade the reliability of NAND flash memory. In particular, it’s critical to enhance metadata reliability, which occupies only a small portion of the storage space, but maintains the critical information of the file system and the address translations of the storage system. Metadata damage will cause the system to crash or a large amount of data to be lost. This paper presents Asymmetric Programming, a highly reliable metadata allocation strategy for MLC NAND flash memory storage systems. Our technique exploits for the first time the property of the multi-page architecture of MLC NAND flash memory to improve the reliability of metadata. The basic idea is to keep metadata in most significant bit (MSB pages which are more reliable than least significant bit (LSB pages. Thus, we can achieve relatively low bit error rates for metadata. Based on this idea, we propose two strategies to optimize address mapping and garbage collection. We have implemented Asymmetric Programming on a real hardware platform. The experimental results show that Asymmetric Programming can achieve a reduction in the number of page errors of up to 99.05% with the baseline error correction scheme.

High performance SONOS flash memory with in-situ silicon nanocrystals embedded in silicon nitride charge trapping layer

Science.gov (United States)

Lim, Jae-Gab; Yang, Seung-Dong; Yun, Ho-Jin; Jung, Jun-Kyo; Park, Jung-Hyun; Lim, Chan; Cho, Gyu-seok; Park, Seong-gye; Huh, Chul; Lee, Hi-Deok; Lee, Ga-Won

2018-02-01

In this paper, SONOS-type flash memory device with highly improved charge-trapping efficiency is suggested by using silicon nanocrystals (Si-NCs) embedded in silicon nitride (SiNX) charge trapping layer. The Si-NCs were in-situ grown by PECVD without additional post annealing process. The fabricated device shows high program/erase speed and retention property which is suitable for multi-level cell (MLC) application. Excellent performance and reliability for MLC are demonstrated with large memory window of ∼8.5 V and superior retention characteristics of 7% charge loss for 10 years. High resolution transmission electron microscopy image confirms the Si-NC formation and the size is around 1-2 nm which can be verified again in X-ray photoelectron spectroscopy (XPS) where pure Si bonds increase. Besides, XPS analysis implies that more nitrogen atoms make stable bonds at the regular lattice point. Photoluminescence spectra results also illustrate that Si-NCs formation in SiNx is an effective method to form deep trap states.

Anomalous Threshold Voltage Variability of Nitride Based Charge Storage Nonvolatile Memory Devices

Directory of Open Access Journals (Sweden)

Meng Chuan Lee

2013-01-01

Full Text Available Conventional technology scaling is implemented to meet the insatiable demand of high memory density and low cost per bit of charge storage nonvolatile memory (NVM devices. In this study, effect of technology scaling to anomalous threshold voltage ( variability is investigated thoroughly on postcycled and baked nitride based charge storage NVM devices. After long annealing bake of high temperature, cell’s variability of each subsequent bake increases within stable distribution and found exacerbate by technology scaling. Apparent activation energy of this anomalous variability was derived through Arrhenius plots. Apparent activation energy (Eaa of this anomalous variability is 0.67 eV at sub-40 nm devices which is a reduction of approximately 2 times from 110 nm devices. Technology scaling clearly aggravates this anomalous variability, and this poses reliability challenges to applications that demand strict control, for example, reference cells that govern fundamental program, erase, and verify operations of NVM devices. Based on critical evidence, this anomalous variability is attributed to lateral displacement of trapped charges in nitride storage layer. Reliability implications of this study are elucidated. Moreover, potential mitigation methods are proposed to complement technology scaling to prolong the front-runner role of nitride based charge storage NVM in semiconductor flash memory market.

The imaging performance of flash memory masks characterized with AIMS

Science.gov (United States)

van Setten, Eelco; Wismans, Onno; Grim, Kees; Finders, Jo; Dusa, Mircea; Birkner, Robert; Richter, Rigo; Scherübl, Thomas

2009-04-01

Flash memory is an important driver of the lithography roadmap, with its dramatic acceleration in dimensional shrink, pushing for ever smaller feature sizes. The introduction of hyper-NA immersion lithography has brought the 45nm node and below within reach for memory makers using single exposure. At these feature sizes mask topology and the material properties of the film stack on the mask play an important role on imaging performance. Furthermore, the break up of the array pitch regularity in the NAND-type flash memory cell by two thick wordlines and a central space, leads to feature-center placement (overlay) errors, that are inherent to the design. An integral optimization approach is needed to mitigate these effects and to control both the CD and placement errors tightly. In this paper we will show that aerial image measurements at mask-level are useful for characterizing the gate layer of a NAND-Flash design before exposure. The aerial image measurements are performed with the AIMSTM 45-193i. and compared to CD measurements on the wafer obtained with an XT:1900Gi hyper-NA immersion system. An excellent correlation is demonstrated for feature-center placement errors and CD variations across the mask (see Figure 1) for several features in the gate layer down to 40nm half pitch. This shows the potential to use aerial image measurements at mask-level in combination with correction techniques on the photomask, like the CDC200 tool in combination with exposure tool correction techniques, such as DoseMapperTM, to improve both across field and across wafer CD uniformity of critical layers.

A novel sourceline voltage compensation circuit for embedded NOR flash memory

International Nuclear Information System (INIS)

Zhang Shengbo; Yang Guangjun; Hu Jian; Xiao Jun

2014-01-01

A novel sourceline voltage compensation circuit for program operation in embedded flash memory is presented. With the sourceline voltage compensation circuit, the charge pump can modulate the output voltage according to the number of cells to be programmed with data “0”. So the IR drop on the sourceline decoding path is compensated, and a stable sourceline voltage can be obtained. In order to reduce the power dissipation in program operation, a bit-inversion program circuit is adopted. By using the bit-inversion program circuit, the cells programmed to data “0” are limited to half of the bits of a write data word, thus power dissipation in program operation is greatly reduced. A 1.8-V 8 × 64-kbits embedded NOR flash memory employing the two circuits has been integrated using a GSMC 0.18-μm 4-poly 4-metal CMOS process. (semiconductor integrated circuits)

Graphene-quantum-dot nonvolatile charge-trap flash memories

International Nuclear Information System (INIS)

Sin Joo, Soong; Kim, Jungkil; Seok Kang, Soo; Kim, Sung; Choi, Suk-Ho; Won Hwang, Sung

2014-01-01

Nonvolatile flash-memory capacitors containing graphene quantum dots (GQDs) of 6, 12, and 27 nm average sizes (d) between SiO 2 layers for use as charge traps have been prepared by sequential processes: ion-beam sputtering deposition (IBSD) of 10 nm SiO 2 on a p-type wafer, spin-coating of GQDs on the SiO 2 layer, and IBSD of 20 nm SiO 2 on the GQD layer. The presence of almost a single array of GQDs at a distance of ∼13 nm from the SiO 2 /Si wafer interface is confirmed by transmission electron microscopy and photoluminescence. The memory window estimated by capacitance–voltage curves is proportional to d for sweep voltages wider than  ± 3 V, and for d = 27 nm the GQD memories show a maximum memory window of 8 V at a sweep voltage of  ± 10 V. The program and erase speeds are largest at d = 12 and 27 nm, respectively, and the endurance and data-retention properties are the best at d = 27 nm. These memory behaviors can be attributed to combined effects of edge state and quantum confinement. (papers)

SOLID-STATE STORAGE DEVICE FLASH TRANSLATION LAYER

DEFF Research Database (Denmark)

2017-01-01

Embodiments of the present invention include a method for storing a data page d on a solid-state storage device, wherein the solid-state storage device is configured to maintain a mapping table in a Log-Structure Merge (LSM) tree having a C0 component which is a random access memory (RAM) device...

Effects of tunnel oxide process on SONOS flash memory characteristics

International Nuclear Information System (INIS)

Li, Dong Hua; Park, Il Han; Yun, Jang-Gn; Park, Byung-Gook

2010-01-01

In this paper, various process conditions of tunnel oxides are applied in SONOS flash memory to investigate their effects on charge transport during the program/erase operations. We focus the key point of analysis on Fermi-level (E F ) variation at the interface of silicon substrate and tunnel oxide. The Si-O chemical bonding information which describes the interface oxidation states at the Si/SiO 2 is obtained by the core-level X-ray photoelectron spectroscopy (XPS). Moreover, relative E F position is determined by measuring the Si 2p energy shift from XPS spectrums. Experimental results from memory characteristic measurement show that MTO tunnel oxide structure exhibits faster erase speed, and larger memory window during P/E cycle compared to FTO and RTO tunnel oxide structures. Finally, we examine long-term charge retention characteristic and find that the memory windows of all the capacitors remain wider than 2 V after 10 5 s.

Physical principles and current status of emerging non-volatile solid state memories

Science.gov (United States)

Wang, L.; Yang, C.-H.; Wen, J.

2015-07-01

Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for

Models for Total-Dose Radiation Effects in Non-Volatile Memory

Energy Technology Data Exchange (ETDEWEB)

Campbell, Philip Montgomery; Wix, Steven D.

2017-04-01

The objective of this work is to develop models to predict radiation effects in non- volatile memory: flash memory and ferroelectric RAM. In flash memory experiments have found that the internal high-voltage generators (charge pumps) are the most sensitive to radiation damage. Models are presented for radiation effects in charge pumps that demonstrate the experimental results. Floating gate models are developed for the memory cell in two types of flash memory devices by Intel and Samsung. These models utilize Fowler-Nordheim tunneling and hot electron injection to charge and erase the floating gate. Erase times are calculated from the models and compared with experimental results for different radiation doses. FRAM is less sensitive to radiation than flash memory, but measurements show that above 100 Krad FRAM suffers from a large increase in leakage current. A model for this effect is developed which compares closely with the measurements.

Highly scalable 3-D NAND-NOR hybrid-type dual bit per cell flash memory devices with an additional cut-off gate

International Nuclear Information System (INIS)

Cho, Seongjae; Shim, Wonbo; Park, Ilhan; Kim, Yoon; Park, Byunggook

2010-01-01

In this work, a nonvolatile memory (NVM) device of novel structure in 3 dimensions is introduced, and its operation physics is validated. It is based on a pillar structure in which two identical storage nodes are located for dual-bit operation. The two storage nodes on neighboring pillars are controlled by using one common control gate so that the space between silicon pillars can be further reduced. For compatibility with conventional memory operations, an additional cut-off gate is constructed under the common control gate. This is considered as the ultimate form for a 3-D nonvolatile memory device based on a double-gate structure. The underlying physics is explained, and the operational schemes are validated in various aspects by using a numerical device simulation. Also, critical issues in device design for higher reliability are discussed.

Nonvolatile Memory Technology for Space Applications

Science.gov (United States)

Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

2010-01-01

This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

MoO3 trapping layers with CF4 plasma treatment in flash memory applications

International Nuclear Information System (INIS)

Kao, Chuyan Haur; Chen, Hsiang; Chen, Su-Zhien; Chen, Chian Yu; Lo, Kuang-Yu; Lin, Chun Han

2014-01-01

Highlights: • MoO 3 -based flash memories have been fabricated. • CF4 plasma treatment could enhance good memory performance. • Material analyses confirm that plasma treatment eliminated defects. • Fluorine atoms might fix the dangling bonds. - Abstract: In this research, we used MoO 3 with CF 4 plasma treatment as charge trapping layer in metal-oxide-high-k -oxide-Si-type memory. We analyzed material properties and electrical characteristics with multiple analyses. The plasma treatment could increase the trapping density, reduce the leakage current, expand band gap, and passivate the defect to enhance the memory performance. The MoO 3 charge trapping layer memory with suitable CF 4 plasma treatment is promising for future nonvolatile memory applications

Fault-tolerant NAND-flash memory module for next-generation scientific instruments

Science.gov (United States)

Lange, Tobias; Michel, Holger; Fiethe, Björn; Michalik, Harald; Walter, Dietmar

2015-10-01

Remote sensing instruments on today's space missions deliver a high amount of data which is typically evaluated on ground. Especially for deep space missions the telemetry downlink is very limited which creates the need for the scientific evaluation and thereby a reduction of data volume already on-board the spacecraft. A demanding example is the Polarimetric and Helioseismic Imager (PHI) instrument on Solar Orbiter. To enable on-board offline processing for data reduction, the instrument has to be equipped with a high capacity memory module. The module is based on non-volatile NAND-Flash technology, which requires more advanced operation than volatile DRAM. Unlike classical mass memories, the module is integrated into the instrument and allows readback of data for processing. The architecture and safe operation of such kind of memory module is described in the following paper.

Projected phase-change memory devices.

Science.gov (United States)

Koelmans, Wabe W; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos

2015-09-03

Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.

Phase change memory

CERN Document Server

Qureshi, Moinuddin K

2011-01-01

As conventional memory technologies such as DRAM and Flash run into scaling challenges, architects and system designers are forced to look at alternative technologies for building future computer systems. This synthesis lecture begins by listing the requirements for a next generation memory technology and briefly surveys the landscape of novel non-volatile memories. Among these, Phase Change Memory (PCM) is emerging as a leading contender, and the authors discuss the material, device, and circuit advances underlying this exciting technology. The lecture then describes architectural solutions t

Flash memory in embedded Java programs

DEFF Research Database (Denmark)

Korsholm, Stephan Erbs

This paper introduces a Java execution environment with the capability for storing constant heap data in Flash, thus saving valuable RAM. The extension is motivated by the structure of three industrial applications which demonstrate the need for storing constant data in Flash on small embedded...

75 FR 82071 - In the Matter of Certain Flash Memory Chips and Products Containing Same; Notice of Commission...

Science.gov (United States)

2010-12-29

... Memory Chips and Products Containing Same; Notice of Commission Decision Not To Review the ALJ's Final... flash memory chips and products containing the same by reason of infringement of various claims of... practices or exploits the '877 patent does not exist, nor is such an industry in the process of being...

Smoothing type buffer memory device

International Nuclear Information System (INIS)

Podorozhnyj, D.M.; Yashin, I.V.

1990-01-01

The layout of the micropower 4-bit smoothing type buffer memory device allowing one to record without counting the sequence of input randomly distributed pulses in multi-channel devices with serial poll, is given. The power spent by a memory cell for one binary digit recording is not greater than 0.15 mW, the device dead time is 10 mus

A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5-x/TaO2-x bilayer structures

Science.gov (United States)

Lee, Myoung-Jae; Lee, Chang Bum; Lee, Dongsoo; Lee, Seung Ryul; Chang, Man; Hur, Ji Hyun; Kim, Young-Bae; Kim, Chang-Jung; Seo, David H.; Seo, Sunae; Chung, U.-In; Yoo, In-Kyeong; Kim, Kinam

2011-08-01

Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaOx-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 1012. Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

A low-voltage sense amplifier with two-stage operational amplifier clamping for flash memory

Science.gov (United States)

Guo, Jiarong

2017-04-01

A low-voltage sense amplifier with reference current generator utilizing two-stage operational amplifier clamp structure for flash memory is presented in this paper, capable of operating with minimum supply voltage at 1 V. A new reference current generation circuit composed of a reference cell and a two-stage operational amplifier clamping the drain pole of the reference cell is used to generate the reference current, which avoids the threshold limitation caused by current mirror transistor in the traditional sense amplifier. A novel reference voltage generation circuit using dummy bit-line structure without pull-down current is also adopted, which not only improves the sense window enhancing read precision but also saves power consumption. The sense amplifier was implemented in a flash realized in 90 nm flash technology. Experimental results show the access time is 14.7 ns with power supply of 1.2 V and slow corner at 125 °C. Project supported by the National Natural Science Fundation of China (No. 61376028).

NAFFS: network attached flash file system for cloud storage on portable consumer electronics

Science.gov (United States)

Han, Lin; Huang, Hao; Xie, Changsheng

Cloud storage technology has become a research hotspot in recent years, while the existing cloud storage services are mainly designed for data storage needs with stable high speed Internet connection. Mobile Internet connections are often unstable and the speed is relatively low. These native features of mobile Internet limit the use of cloud storage in portable consumer electronics. The Network Attached Flash File System (NAFFS) presented the idea of taking the portable device built-in NAND flash memory as the front-end cache of virtualized cloud storage device. Modern portable devices with Internet connection have built-in more than 1GB NAND Flash, which is quite enough for daily data storage. The data transfer rate of NAND flash device is much higher than mobile Internet connections[1], and its non-volatile feature makes it very suitable as the cache device of Internet cloud storage on portable device, which often have unstable power supply and intermittent Internet connection. In the present work, NAFFS is evaluated with several benchmarks, and its performance is compared with traditional network attached file systems, such as NFS. Our evaluation results indicate that the NAFFS achieves an average accessing speed of 3.38MB/s, which is about 3 times faster than directly accessing cloud storage by mobile Internet connection， and offers a more stable interface than that of directly using cloud storage API. Unstable Internet connection and sudden power off condition are tolerable, and no data in cache will be lost in such situation.

Investigation of multi-state charge-storage properties of redox-active organic molecules in silicon-molecular hybrid devices for DRAM and Flash applications

Science.gov (United States)

Gowda, Srivardhan Shivappa

Molecular electronics has recently spawned a considerable amount of interest with several molecules possessing charge-conduction and charge-storage properties proposed for use in electronic devices. Hybrid silicon-molecular technology has the promise of augmenting the current silicon technology and provide for a transitional path to future molecule-only technology. The focus of this dissertation work has been on developing a class of hybrid silicon-molecular electronic devices for DRAM and Flash memory applications utilizing redox-active molecules. This work exploits the ability of molecules to store charges with single-electron precision at room temperature. The hybrid devices are fabricated by forming self-assembled monolayers of redox-active molecules on Si and oxide (SiO2 and HfO2) surfaces via formation of covalent linkages. The molecules possess discrete quantum states from which electrons can tunnel to the Si substrate at discrete applied voltages (oxidation process, cell write), leaving behind a positively charged layer of molecules. The reduction (erase) process, which is the process of electrons tunneling back from Si to the molecules, neutralizes the positively charged molecular monolayer. Hybrid silicon-molecular capacitor test structures were electrically characterized with an electrolyte gate using cyclic voltammetry (CyV) and impedance spectroscopy (CV) techniques. The redox voltages, kinetics (write/erase speeds) and charge-retention characteristics were found to be strongly dependent on the Si doping type and densities, and ambient light. It was also determined that the redox energy states in the molecules communicate with the valence band of the Si substrate. This allows tuning of write and read states by modulating minority carriers in n- and p-Si substrates. Ultra-thin dielectric tunnel barriers (SiO2, HfO2) were placed between the molecules and the Si substrate to augment charge-retention for Flash memory applications. The redox response was

TID and SEE Response of an Advanced Samsung 4G NAND Flash Memory

Science.gov (United States)

Oldham, Timothy R.; Friendlich, M.; Howard, J. W.; Berg, M. D.; Kim, H. S.; Irwin, T. L.; LaBel, K. A.

2007-01-01

Initial total ionizing dose (TID) and single event heavy ion test results are presented for an unhardened commercial flash memory, fabricated with 63 nm technology. Results are that the parts survive to a TID of nearly 200 krad (SiO2), with a tractable soft error rate of about 10(exp -l2) errors/bit-day, for the Adams Ten Percent Worst Case Environment.

An optically transparent and flexible memory with embedded gold nanoparticles in a polymethylsilsesquioxane dielectric

International Nuclear Information System (INIS)

Ooi, P.C.; Aw, K.C.; Gao, W.; Razak, K.A.

2013-01-01

In this work, we demonstrated a simple fabrication route towards an optically transparent and flexible memory device. The device is simple and consists of a metal/insulator/semiconductor structure; namely MIS. The preliminary MIS study with gold nanoparticles embedded between the polymethylsilsesquioxane layers was fabricated on p-Si substrate and the capacitance versus voltage measurements confirmed the charge trapped capability of the fabricated MIS memory device. Subsequently, an optically transparent and flexible MIS memory device made from indium–tin-oxide coated polyethylene terephthalate substrate and pentacene was used to replace the opaque p-Si substrate as the active layer. Current versus voltage (I–V) plot of the transparent and flexible device shows the presence of hysteresis. In an I–V plot, three distinct regions have been identified and the transport mechanisms are explained. The fabricated optically transparent and mechanically flexible MIS memory device can be programmed and erased multiple times, similar to a flash memory. Mechanical characterization to determine the robustness of the flexible memory device was also conducted but failed to establish any relationship in this preliminary work as the effect was random. Hence, more work is needed to understand the reliability of this device, especially when they are subjected to mechanical stress. - Highlights: ► An optically transparent and mechanically flexible memory is presented. ► Electrical characteristics show reprogrammable memory similar to flash memory. ► Transport mechanisms are proposed and explained. ► Mechanical bending tests are conducted

An optically transparent and flexible memory with embedded gold nanoparticles in a polymethylsilsesquioxane dielectric

Energy Technology Data Exchange (ETDEWEB)

Ooi, P.C. [Mechanical Engineering, The University of Auckland (New Zealand); Aw, K.C., E-mail: k.aw@auckland.ac.nz [Mechanical Engineering, The University of Auckland (New Zealand); Gao, W. [Chemical and Materials Engineering, The University of Auckland (New Zealand); Razak, K.A. [School of Materials and Mineral Resources Engineering, Universiti Sains (Malaysia); NanoBiotechnology Research and Innovation, INFORMM, Universiti Sains (Malaysia)

2013-10-01

In this work, we demonstrated a simple fabrication route towards an optically transparent and flexible memory device. The device is simple and consists of a metal/insulator/semiconductor structure; namely MIS. The preliminary MIS study with gold nanoparticles embedded between the polymethylsilsesquioxane layers was fabricated on p-Si substrate and the capacitance versus voltage measurements confirmed the charge trapped capability of the fabricated MIS memory device. Subsequently, an optically transparent and flexible MIS memory device made from indium–tin-oxide coated polyethylene terephthalate substrate and pentacene was used to replace the opaque p-Si substrate as the active layer. Current versus voltage (I–V) plot of the transparent and flexible device shows the presence of hysteresis. In an I–V plot, three distinct regions have been identified and the transport mechanisms are explained. The fabricated optically transparent and mechanically flexible MIS memory device can be programmed and erased multiple times, similar to a flash memory. Mechanical characterization to determine the robustness of the flexible memory device was also conducted but failed to establish any relationship in this preliminary work as the effect was random. Hence, more work is needed to understand the reliability of this device, especially when they are subjected to mechanical stress. - Highlights: ► An optically transparent and mechanically flexible memory is presented. ► Electrical characteristics show reprogrammable memory similar to flash memory. ► Transport mechanisms are proposed and explained. ► Mechanical bending tests are conducted.

Static memory devices

NARCIS (Netherlands)

2012-01-01

A semiconductor memory device includes n-wells (22) and p-wells (24) used to make up a plurality of memory cell elements (40). The n-wells (22) and p-5 wells (24) can be back-biased to improve reading and writing performance. One of the n-wells and p-wells can be globally biased while the other one

Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

Science.gov (United States)

Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

2018-01-01

Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these

Al203 thin films on Silicon and Germanium substrates for CMOS and flash memory applications

Science.gov (United States)

Gopalan, Sundararaman; Dutta, Shibesh; Ramesh, Sivaramakrishnan; Prathapan, Ragesh; Sreehari G., S.

2017-07-01

As scaling of device dimensions has continued, it has become necessary to replace traditional SiO2 with high dielectric constant materials in the conventional CMOS devices. In addition, use of metal gate electrodes and Germanium substrates may have to be used in order to address leakage and mobility issues. Al2O3 is one of the potential candidates both for CMOS and as a blocking dielectric for Flash memory applications owing to its low leakage. In this study, the effects of sputtering conditions and post-deposition annealing conditions on the electrical and reliability characteristics of MOS capacitors using Al2O3 films on Si and Ge substrates with Aluminium gate electrodes have been presented. It was observed that higher sputtering power resulted in larger flat-band voltage (Vfb) shifts, more hysteresis, higher interface state density (Dit) and a poorer reliability. Wit was also found that while a short duration high temperature annealing improves film characteristics, a long duration anneal even at 800C was found to be detrimental to MOS characteristics. Finally, the electronic conduction mechanism in Al2O3 films was also studied. It was observed that the conduction mechanism varied depending on the annealing condition, thickness of film and electric field.

Organic Nonvolatile Memory Devices Based on Ferroelectricity

NARCIS (Netherlands)

Naber, Ronald C. G.; Asadi, Kamal; Blom, Paul W. M.; de Leeuw, Dago M.; de Boer, Bert

2010-01-01

A memory functionality is a prerequisite for many applications of electronic devices. Organic nonvolatile memory devices based on ferroelectricity are a promising approach toward the development of a low-cost memory technology. In this Review Article we discuss the latest developments in this area

Organic nonvolatile memory devices based on ferroelectricity

NARCIS (Netherlands)

Naber, R.C.G.; Asadi, K.; Blom, P.W.M.; Leeuw, D.M. de; Boer, B. de

2010-01-01

A memory functionality is a prerequisite for many applications of electronic devices. Organic nonvolatile memory devices based on ferroelectricity are a promising approach toward the development of a low-cost memory technology. In this Review Article we discuss the latest developments in this area

Professional Flash Lite Mobile Development

CERN Document Server

Anderson, J G

2010-01-01

Discover how to create Flash Lite mobile apps from the ground up. Adobe Flash is an ideal choice for developing rich interactive content for "Flash-enabled" mobile devices; and with this book, you'll learn how to create unique applications with Flash Lite. Through a series of code samples and extensive example applications, you'll explore the core concepts, key features, and best practices of the Flash Lite player. Coverage reveals various ways to develop Flash mobile content, create applications with a cross-platform programming framework based on the Model, View and Controller conc

A study on electromechanical carbon nanotube memory devices

International Nuclear Information System (INIS)

Kang, Jeong Won; Hwang, Ho Jung

2005-01-01

Electromechanical operations of carbon-nanotube (CNT) bridge memory device were investigated by using atomistic simulations based on empirical potentials. The nanotube-bridge memory device was operated by the electrostatic and the van der Waals forces acting on the nanotube-bridge. For the CNT bridge memory device, the van der Waals interactions between the CNT bridge and the oxide were very important. As the distance between the CNT bridge and the oxide decreased and the van der Waals interaction energy increased, the pull-in bias of the CNT-bridge decreased and the nonvolatility of the nanotube-bridge memory device increased, while the pull-out voltages increased. When the materials composed of the oxide film are different, since the van der Waals interactions must be also different, the oxide materials must be carefully selected for the CNT-bridge memory device to work as a nonvolatile memory.

In-chip optical CD measurements for non-volatile memory devices

Science.gov (United States)

Vasconi, Mauro; Kremer, Stephanie; Polli, M.; Severgnini, Ermes; Trovati, Silvia S.

2006-03-01

A potential limitation to a wider usage of the scatterometry technique for CD evaluation comes from its requirement of dedicated regular measurement gratings, located in wafer scribe lanes. In fact, the simplification of the original chip layout that is often requested to design these gratings may impact on their printed dimension and shape. Etched gratings might also suffer from micro-loading effects other than in the circuit. For all these reasons, measurements collected therein may not represent the real behavior of the device. On the other hand, memory devices come with large sectors that usually possess the characteristics required for a proper scatterometry evaluation. In particular, for a leading edge flash process this approach is in principle feasible for the most critical process steps. The impact of potential drawbacks, mainly lack of pattern regularity within the tool probe area, is investigated. More, a very large sampling plan on features with equal nominal CD and density spread over the same exposure shot becomes feasible, thus yielding a deeper insight of the overall lithographic process window and a quantitative method to evaluate process equipment performance along time by comparison to acceptance data and/or last preventive maintenance. All the results gathered in the device main array are compared to those collected in standard scatterometry targets, tailored to the characteristics of the considered layers in terms of designed CD, pitch, stack and orientation.

Metal-organic molecular device for non-volatile memory storage

International Nuclear Information System (INIS)

Radha, B.; Sagade, Abhay A.; Kulkarni, G. U.

2014-01-01

Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organic complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.

Forced Ion Migration for Chalcogenide Phase Change Memory Device

Science.gov (United States)

Campbell, Kristy A (Inventor)

2013-01-01

Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

Radiation effect test on ADC/DAC and high density memory devices with 60Co γ-rays

International Nuclear Information System (INIS)

Xing Kefei; Wang Yueke; Pan Huafeng

2006-01-01

A test platform was constructed for 60 Co γ-ray irradiation experiment of microelectronics, with the aid of computer and a FPGA module. The tested sample devices included analog-to-digital converter AD10465, digital-to-analog converter AD9857, high density Flash memory MEF64M16 and anti-fused PROM XQR17V16, which are used in signal processing module in spaceborne systems. Evaluations were made on their ability of resisting the total dose based on the proper function criterion of the devices. The results showed that AD10465 and AD9857 ran properly after 1.59 kGy(Si) irradiation, but errors were found when MEF64M16 and XQR17V16's total ionizing dose is 0.13 kGy(Si) and 0.99 kGy(Si), respectively. (authors)

A light writable microfluidic "flash memory": optically addressed actuator array with latched operation for microfluidic applications.

Science.gov (United States)

Hua, Zhishan; Pal, Rohit; Srivannavit, Onnop; Burns, Mark A; Gulari, Erdogan

2008-03-01

This paper presents a novel optically addressed microactuator array (microfluidic "flash memory") with latched operation. Analogous to the address-data bus mediated memory address protocol in electronics, the microactuator array consists of individual phase-change based actuators addressed by localized heating through focused light patterns (address bus), which can be provided by a modified projector or high power laser pointer. A common pressure manifold (data bus) for the entire array is used to generate large deflections of the phase change actuators in the molten phase. The use of phase change material as the working media enables latched operation of the actuator array. After the initial light "writing" during which the phase is temporarily changed to molten, the actuated status is self-maintained by the solid phase of the actuator without power and pressure inputs. The microfluidic flash memory can be re-configured by a new light illumination pattern and common pressure signal. The proposed approach can achieve actuation of arbitrary units in a large-scale array without the need for complex external equipment such as solenoid valves and electrical modules, which leads to significantly simplified system implementation and compact system size. The proposed work therefore provides a flexible, energy-efficient, and low cost multiplexing solution for microfluidic applications based on physical displacements. As an example, the use of the latched microactuator array as "normally closed" or "normally open" microvalves is demonstrated. The phase-change wax is fully encapsulated and thus immune from contamination issues in fluidic environments.

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

Science.gov (United States)

LaBel, Kenneth A.; Cohn, Lewis M.

2008-01-01

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

Investigation on amorphous InGaZnO based resistive switching memory with low-power, high-speed, high reliability

Energy Technology Data Exchange (ETDEWEB)

Fan, Yang-Shun [Department of Photonics and Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan, ROC (China); Liu, Po-Tsun, E-mail: ptliu@mail.nctu.edu.tw [Department of Photonics and Display Institute, National Chiao Tung University, Hsinchu 30010, Taiwan, ROC (China); Hsu, Ching-Hui [Department of Photonics and Display Institute, National Chiao Tung University, Hsinchu 30010, Taiwan, ROC (China)

2013-12-31

Recently, non-volatile memory (NVM) has been widely used in electronic devices. Nowadays, the prevailing NVM is Flash memory. However, it is generally believed that the conventional Flash memory will approach its scaling limit within about a decade. The resistive random access memory (RRAM) is emerging as one of the potential candidates for future memory replacement because of its high storage density, low power consumption as well as simple structure. The purpose of this work is to develop a reliable a-InGaZnO based resistive switching memory. We investigate the resistive switching characteristics of TiN/Ti/IGZO/Pt structure and TiN/IGZO/Pt structure. The device with TiN/Ti/IGZO/Pt structure exhibits stable bipolar resistive switching. The impact of inserting a Ti interlayer is studied by material analyses. The device shows excellent resistive switching properties. For example, the DC sweep endurance can achieve over 1000 times; and the pulse induced switching cycles can reach at least 10,000 times. Furthermore, the impact of different sputtering ambience, the variable temperature measurement, and the conduction mechanisms are also investigated. According to our experiments, we propose a model to explain the resistive switching phenomenon observed in our devices.

C-RAM: breaking mobile device memory barriers using the cloud

OpenAIRE

Pamboris, A; Pietzuch, P

2015-01-01

?Mobile applications are constrained by the available memory of mobile devices. We present C-RAM, a system that uses cloud-based memory to extend the memory of mobile devices. It splits application state and its associated computation between a mobile device and a cloud node to allow applications to consume more memory, while minimising the performance impact. C-RAM thus enables developers to realise new applications or port legacy desktop applications with a large memory footprint to mobile ...

Environmental Effects on Data Retention in Flash Cells

Science.gov (United States)

Katz, Rich; Flowers, David; Bergevin, Keith

2017-01-01

Flash technology is being utilized in fuzed munition applications and, based on the development of digital logic devices in the commercial world, usage of flash technology will increase. Antifuse technology, prevalent in non-volatile field programmable gate arrays (FPGAs), will eventually be phased out as new devices have not been developed for approximately a decade. The reliance on flash technology presents a long-term reliability issue for both DoD and NASA safety- and mission-critical applications. A thorough understanding of the data retention failure modes and statistics associated with Flash data retention is of vital concern to the fuze safety community. A key retention parameter for a flash cell is the threshold voltage (VTH), which is an indirect indicator of the amount of charge stored on the cells floating gate. This paper will present the results of our on-going tests: long-term storage at 150 C for a small population of devices, neutron radiation exposure, electrostatic discharge (ESD) testing, and the trends of large populations (over 300 devices for each condition) exposed to three difference temperatures: 25 C, 125 C, and 150 C.

Electronic polymer memory devices-Easy to fabricate, difficult to understand

International Nuclear Information System (INIS)

Paul, Shashi; Salaoru, Iulia

2010-01-01

There has been a number reports on polymer memory devices for the last one decade. Polymer memory devices are fabricated by depositing a blend (an admixture of organic polymer, small organic molecules and nanoparticles) between two metal electrodes. These devices show two electrical conductance states ('1' and '0') when voltage is applied, thus rendering the structures suitable for data retention. These two states can be viewed as the realisation of memory devices. However, polymer memory devices reported so far suffer from multiple drawbacks that render their industrial implementation premature. There is a large discrepancy in the results reported by different groups. This article attempts to answer some of the questions.

Professional Flash Mobile Development Creating Android and iPhone Applications

CERN Document Server

Wagner, Richard

2010-01-01

Professional Flash Mobile Development: Creating Android and iPhone ApplicationsEverything Flash developers need to know to create native Android and iPhone appsThis Wrox guide shows Flash developers how to create native applications for Android and iPhone mobile devices using Flash. Packed with practical examples, it shows how to build a variety of apps and integrate them with core mobile services such as Accelerometer, GPS, Photo Library,and more.Offers Flash developers the tools to create apps for the Android and iPhone mobile devicesSho

One bipolar transistor selector - One resistive random access memory device for cross bar memory array

Science.gov (United States)

Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.

2017-09-01

A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

3D Printed Photoresponsive Devices Based on Shape Memory Composites.

Science.gov (United States)

Yang, Hui; Leow, Wan Ru; Wang, Ting; Wang, Juan; Yu, Jiancan; He, Ke; Qi, Dianpeng; Wan, Changjin; Chen, Xiaodong

2017-09-01

Compared with traditional stimuli-responsive devices with simple planar or tubular geometries, 3D printed stimuli-responsive devices not only intimately meet the requirement of complicated shapes at macrolevel but also satisfy various conformation changes triggered by external stimuli at the microscopic scale. However, their development is limited by the lack of 3D printing functional materials. This paper demonstrates the 3D printing of photoresponsive shape memory devices through combining fused deposition modeling printing technology and photoresponsive shape memory composites based on shape memory polymers and carbon black with high photothermal conversion efficiency. External illumination triggers the shape recovery of 3D printed devices from the temporary shape to the original shape. The effect of materials thickness and light density on the shape memory behavior of 3D printed devices is quantified and calculated. Remarkably, sunlight also triggers the shape memory behavior of these 3D printed devices. This facile printing strategy would provide tremendous opportunities for the design and fabrication of biomimetic smart devices and soft robotics. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

The charge storage characteristics of ZrO2 nanocrystallite-based charge trap nonvolatile memory

International Nuclear Information System (INIS)

Tang Zhen-Jie; Li Rong; Yin Jiang

2013-01-01

ZrO 2 nanocrystallite-based charge trap flash memory capacitors incorporating a (ZrO 2 ) 0.6 (SiO 2 ) 0.4 pseudobinary high-k oxide film as the charge trapping layer were prepared and investigated. The precipitation reaction in the charge trapping layer, forming ZrO 2 nanocrystallites during rapid thermal annealing, was investigated by transmission electron microscopy and X-ray diffraction. It was observed that a ZrO 2 nanocrystallite-based memory capacitor after post-annealing at 850 °C for 60 s exhibits a maximum memory window of about 6.8 V, good endurance and a low charge loss of ∼25% over a period of 10 years (determined by extrapolating the charge loss curve measured experimentally), even at 85 °C. Such 850 °C-annealed memory capacitors appear to be candidates for future nonvolatile flash memory device applications

Crystal that remembers: several ways to utilize nanocrystals in resistive switching memory

International Nuclear Information System (INIS)

Banerjee, Writam; Liu, Qi; Long, Shibing; Lv, Hangbing; Liu, Ming

2017-01-01

The attractive usability of quantum phenomena in futuristic devices is possible by using zero-dimensional systems like nanocrystals (NCs). The performance of nonvolatile flash memory devices has greatly benefited from the use of NCs over recent decades. The quantum abilities of NCs have been used to improve the reliability of flash devices. Its appeal is extended to the design of emerging devices such as resistive random-access memory (RRAM), a technology where the use of silicon is optional. Here, we are going to review the recent progress in the design, characterization, and utilization of NCs in RRAM devices. We will first introduce the physical design of the RRAM devices using NCs and the improvement of electrical performance in NC-RRAM over conventional ones. In particular, special care has been taken to review the ways of development provided by the NCs in the RRAM devices. In a broad sense, the NCs can play a charge trapping role in the NC-RRAM structure or it can be responsible for the localization and improvement of the stability of the conductive filament or it can play a part in the formation of the conductive filament chain by the NC migration under applied bias. Finally, the scope of NCs in the RRAM devices has also been discussed. (topical review)

Crystal that remembers: several ways to utilize nanocrystals in resistive switching memory

Science.gov (United States)

Banerjee, Writam; Liu, Qi; Long, Shibing; Lv, Hangbing; Liu, Ming

2017-08-01

The attractive usability of quantum phenomena in futuristic devices is possible by using zero-dimensional systems like nanocrystals (NCs). The performance of nonvolatile flash memory devices has greatly benefited from the use of NCs over recent decades. The quantum abilities of NCs have been used to improve the reliability of flash devices. Its appeal is extended to the design of emerging devices such as resistive random-access memory (RRAM), a technology where the use of silicon is optional. Here, we are going to review the recent progress in the design, characterization, and utilization of NCs in RRAM devices. We will first introduce the physical design of the RRAM devices using NCs and the improvement of electrical performance in NC-RRAM over conventional ones. In particular, special care has been taken to review the ways of development provided by the NCs in the RRAM devices. In a broad sense, the NCs can play a charge trapping role in the NC-RRAM structure or it can be responsible for the localization and improvement of the stability of the conductive filament or it can play a part in the formation of the conductive filament chain by the NC migration under applied bias. Finally, the scope of NCs in the RRAM devices has also been discussed.

Nonvolatile memory design magnetic, resistive, and phase change

CERN Document Server

Li, Hai

2011-01-01

The manufacture of flash memory, which is the dominant nonvolatile memory technology, is facing severe technical barriers. So much so, that some emerging technologies have been proposed as alternatives to flash memory in the nano-regime. Nonvolatile Memory Design: Magnetic, Resistive, and Phase Changing introduces three promising candidates: phase-change memory, magnetic random access memory, and resistive random access memory. The text illustrates the fundamental storage mechanism of these technologies and examines their differences from flash memory techniques. Based on the latest advances,

Flash μ-fluidics: a rapid prototyping method for fabricating microfluidic devices

KAUST Repository

Buttner, Ulrich

2016-08-01

Microfluidics has advanced in terms of design and structures; however, fabrication methods are time-consuming or expensive relative to facility costs and equipment needed. This work demonstrates a fast and economically viable 2D/3D maskless digital light-projection method based on a stereolithography process. Unlike other fabrication methods, one exposure step is used to form the whole device. Flash microfluidics is achieved by incorporating bonding and channel fabrication of complex structures in just 2.5 s to 4 s and by fabricating channel heights between 25 μm and 150 μm with photopolymer resin. The features of this fabrication technique, such as time and cost saving and easy fabrication, are used to build devices that are mostly needed in microfluidic/lab-on-chip systems. Due to the fast production method and low initial setup costs, the process could be used for point of care applications. © 2016 The Royal Society of Chemistry.

Flash μ-fluidics: a rapid prototyping method for fabricating microfluidic devices

KAUST Repository

Buttner, Ulrich; Sivashankar, Shilpa; Agambayev, Sumeyra; Mashraei, Yousof; Salama, Khaled N.

2016-01-01

Microfluidics has advanced in terms of design and structures; however, fabrication methods are time-consuming or expensive relative to facility costs and equipment needed. This work demonstrates a fast and economically viable 2D/3D maskless digital light-projection method based on a stereolithography process. Unlike other fabrication methods, one exposure step is used to form the whole device. Flash microfluidics is achieved by incorporating bonding and channel fabrication of complex structures in just 2.5 s to 4 s and by fabricating channel heights between 25 μm and 150 μm with photopolymer resin. The features of this fabrication technique, such as time and cost saving and easy fabrication, are used to build devices that are mostly needed in microfluidic/lab-on-chip systems. Due to the fast production method and low initial setup costs, the process could be used for point of care applications. © 2016 The Royal Society of Chemistry.

Investigation of Hafnium oxide/Copper resistive memory for advanced encryption applications

Science.gov (United States)

Briggs, Benjamin D.

The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its advantages over flash include ease of fabrication, speed, and lower power consumption. In addition to memory, ReRAM can also be used in advanced logic implementations given its purely resistive behavior. The combination of a new non-volatile memory element ReRAM along with high performance, low power CMOS opens new avenues for logic implementations. This dissertation will cover the design and process implementation of a ReRAM-CMOS hybrid circuit, built using IBM's 10LPe process, for the improvement of hardware AES implementations. Further the device characteristics of ReRAM, specifically the HfO2/Cu memory system, and mechanisms for operation are not fully correlated. Of particular interest to this work is the role of material properties such as the stoichiometry, crystallinity, and doping of the HfO2 layer and their effect on the switching characteristics of resistive memory. Material properties were varied by a combination of atomic layer deposition and reactive sputtering of the HfO2 layer. Several studies will be discussed on how the above mentioned material properties influence switching parameters, and change the underlying physics of device operation.

An UV photochromic memory effect in proton-based WO3 electrochromic devices

International Nuclear Information System (INIS)

Zhang Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

2008-01-01

We report an UV photochromic memory effect on a standard proton-based WO 3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices

An UV photochromic memory effect in proton-based WO3 electrochromic devices

Science.gov (United States)

Zhang, Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

2008-11-01

We report an UV photochromic memory effect on a standard proton-based WO3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices.

Status and Prospects of ZnO-Based Resistive Switching Memory Devices

Science.gov (United States)

Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen

2016-08-01

In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

Simple flash evaporator for making thin films of compounds

Energy Technology Data Exchange (ETDEWEB)

Hemanadhan, M.; Bapanayya, Ch.; Agarwal, S. C. [Department of Physics, Indian Institute of Technology, Kanpur 208016 (India)

2010-07-15

A simple and compact arrangement for flash evaporation is described. It uses a cell phone vibrator for powder dispensing that can be incorporated into a vacuum deposition chamber without any major alterations. The performance of the flash evaporation system is checked by making thin films of the optical memory chalcogenide glass Ge{sub 2}Sb{sub 2}Te{sub 5} (GST). Energy dispersive x-ray analysis shows that the flash evaporation preserves the stoichiometry in thin films.

Bioorganic nanodots for non-volatile memory devices

International Nuclear Information System (INIS)

Amdursky, Nadav; Shalev, Gil; Handelman, Amir; Natan, Amir; Rosenwaks, Yossi; Litsyn, Simon; Szwarcman, Daniel; Rosenman, Gil; Roizin, Yakov

2013-01-01

In recent years we are witnessing an intensive integration of bio-organic nanomaterials in electronic devices. Here we show that the diphenylalanine bio-molecule can self-assemble into tiny peptide nanodots (PNDs) of ∼2 nm size, and can be embedded into metal-oxide-semiconductor devices as charge storage nanounits in non-volatile memory. For that purpose, we first directly observe the crystallinity of a single PND by electron microscopy. We use these nanocrystalline PNDs units for the formation of a dense monolayer on SiO 2 surface, and study the electron/hole trapping mechanisms and charge retention ability of the monolayer, followed by fabrication of PND-based memory cell device

Extreme Ultraviolet Process Optimization for Contact Layer of 14 nm Node Logic and 16 nm Half Pitch Memory Devices

Science.gov (United States)

Tseng, Shih-En; Chen, Alek

2012-06-01

Extreme ultraviolet (EUV) lithography is considered the most promising single exposure technology at the 27 nm half-pitch node and beyond. The imaging performance of ASML TWINSCAN NXE:3100 has been demonstrated to be able to resolve 26 nm Flash gate layer and 16 nm static random access memory (SRAM) metal layer with a 0.25 numerical aperture (NA) and conventional illumination. Targeting for high volume manufacturing, ASML TWINSCAN NXE:3300B, featuring a 0.33 NA lens with off-axis illumination, will generate a higher contrast aerial image due to improved diffraction order collection efficiency and is expected to reduce target dose via mask biasing. This work performed a simulation to determine how EUV high NA imaging benefits the mask rule check trade-offs required to achieve viable lithography solutions in two device application scenarios: a 14 nm node 6T-SRAM contact layer and a 16 nm half-pitch NAND Flash staggered contact layer. In each application, the three-dimensional mask effects versus Kirchhoff mask were also investigated.

Foundation Flash CS5 for Designers

CERN Document Server

Green, T

2010-01-01

Flash is one of the most engaging, innovative, and versatile technologies available - allowing the creation of anything from animated banners and simple cartoons to Rich Internet Applications, interactive videos, and dynamic user interfaces for web sites, kiosks, devices, or DVDs. The possibilities are endless, and now it just got better. Flash CS5 boasts a host of new features, including better support for mobile devices, a whole new animation engine enabling full manipulation of tweens and paths, custom easing, improved inverse kinematics, a revamped timeline, built-in 3D, and much more. Thi

Brownmillerite thin films as fast ion conductors for ultimate-performance resistance switching memory.

Science.gov (United States)

Acharya, Susant Kumar; Jo, Janghyun; Raveendra, Nallagatlla Venkata; Dash, Umasankar; Kim, Miyoung; Baik, Hionsuck; Lee, Sangik; Park, Bae Ho; Lee, Jae Sung; Chae, Seung Chul; Hwang, Cheol Seong; Jung, Chang Uk

2017-07-27

An oxide-based resistance memory is a leading candidate to replace Si-based flash memory as it meets the emerging specifications for future memory devices. The non-uniformity in the key switching parameters and low endurance in conventional resistance memory devices are preventing its practical application. Here, a novel strategy to overcome the aforementioned challenges has been unveiled by tuning the growth direction of epitaxial brownmillerite SrFeO 2.5 thin films along the SrTiO 3 [111] direction so that the oxygen vacancy channels can connect both the top and bottom electrodes rather directly. The controlled oxygen vacancy channels help reduce the randomness of the conducting filament (CF). The resulting device displayed high endurance over 10 6 cycles, and a short switching time of ∼10 ns. In addition, the device showed very high uniformity in the key switching parameters for device-to-device and within a device. This work demonstrates a feasible example for improving the nanoscale device performance by controlling the atomic structure of a functional oxide layer.

Bioorganic nanodots for non-volatile memory devices

Energy Technology Data Exchange (ETDEWEB)

Amdursky, Nadav; Shalev, Gil; Handelman, Amir; Natan, Amir; Rosenwaks, Yossi [School of Electrical Engineering, Iby and Aladar Fleischman Faculty of Engineering, Tel Aviv University, Tel Aviv 69978 (Israel); Litsyn, Simon; Szwarcman, Daniel; Rosenman, Gil, E-mail: rgil@post.tau.ac.il [School of Electrical Engineering, Iby and Aladar Fleischman Faculty of Engineering, Tel Aviv University, Tel Aviv 69978 (Israel); StoreDot LTD, 16 Menahem Begin St., Ramat Gan (Israel); Roizin, Yakov [School of Electrical Engineering, Iby and Aladar Fleischman Faculty of Engineering, Tel Aviv University, Tel Aviv 69978 (Israel); TowerJazz, P.O. Box 619, Migdal HaEmek 23105 (Israel)

2013-12-01

In recent years we are witnessing an intensive integration of bio-organic nanomaterials in electronic devices. Here we show that the diphenylalanine bio-molecule can self-assemble into tiny peptide nanodots (PNDs) of ∼2 nm size, and can be embedded into metal-oxide-semiconductor devices as charge storage nanounits in non-volatile memory. For that purpose, we first directly observe the crystallinity of a single PND by electron microscopy. We use these nanocrystalline PNDs units for the formation of a dense monolayer on SiO{sub 2} surface, and study the electron/hole trapping mechanisms and charge retention ability of the monolayer, followed by fabrication of PND-based memory cell device.

A chiral-based magnetic memory device without a permanent magnet.

Science.gov (United States)

Ben Dor, Oren; Yochelis, Shira; Mathew, Shinto P; Naaman, Ron; Paltiel, Yossi

2013-01-01

Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices.

Performance analysis of three-dimensional-triple-level cell and two-dimensional-multi-level cell NAND flash hybrid solid-state drives

Science.gov (United States)

Sakaki, Yukiya; Yamada, Tomoaki; Matsui, Chihiro; Yamaga, Yusuke; Takeuchi, Ken

2018-04-01

In order to improve performance of solid-state drives (SSDs), hybrid SSDs have been proposed. Hybrid SSDs consist of more than two types of NAND flash memories or NAND flash memories and storage-class memories (SCMs). However, the cost of hybrid SSDs adopting SCMs is more expensive than that of NAND flash only SSDs because of the high bit cost of SCMs. This paper proposes unique hybrid SSDs with two-dimensional (2D) horizontal multi-level cell (MLC)/three-dimensional (3D) vertical triple-level cell (TLC) NAND flash memories to achieve higher cost-performance. The 2D-MLC/3D-TLC hybrid SSD achieves up to 31% higher performance than the conventional 2D-MLC/2D-TLC hybrid SSD. The factors of different performance between the proposed hybrid SSD and the conventional hybrid SSD are analyzed by changing its block size, read/write/erase latencies, and write unit of 3D-TLC NAND flash memory, by means of a transaction-level modeling simulator.

New principle of feeding for flash evaporation MOCVD devices

International Nuclear Information System (INIS)

Kaul, A.R.; Seleznev, B.V.

1993-01-01

A novel scheme of flash evaporation feeding for MOCVD processes of multi-component oxide films deposition is proposed. The scheme comprises 1) microdozage of organic solution of solid volatile precursors on the glass fiber belt, 2) evaporation of the solvent and 3) flash evaporation of MOC microdoses from the belt. The functioning of the designed feeder is described and the features of proposed scheme in comparison to existing feeding principles are discussed. (orig.)

Novel conformal organic antireflective coatings for advanced I-line lithography

Science.gov (United States)

Deshpande, Shreeram V.; Nowak, Kelly A.; Fowler, Shelly; Williams, Paul; Arjona, Mikko

2001-08-01

Flash memory chips are playing a critical role in semiconductor devices due to increased popularity of hand held electronic communication devices such as cell phones and PDAs (personal Digital Assistants). Flash memory offers two primary advantages in semiconductor devices. First, it offers flexibility of in-circuit programming capability to reduce the loss from programming errors and to significantly reduce commercialization time to market for new devices. Second, flash memory has a double density memory capability through stacked gate structures which increases the memory capability and thus saves significantly on chip real estate. However, due to stacked gate structures the requirements for manufacturing of flash memory devices are significantly different from traditional memory devices. Stacked gate structures also offer unique challenges to lithographic patterning materials such as Bottom Anti-Reflective Coating (BARC) compositions used to achieve CD control and to minimize standing wave effect in photolithography. To be applicable in flash memory manufacturing a BARC should form a conformal coating on high topography of stacked gate features as well as provide the normal anti-reflection properties for CD control. In this paper we report on a new highly conformal advanced i-line BARC for use in design and manufacture of flash memory devices. Conformal BARCs being significantly thinner in trenches than the planarizing BARCs offer the advantage of reducing BARC overetch and thus minimizing resist thickness loss.

Improved charge trapping properties by embedded graphene oxide quantum-dots for flash memory application

Science.gov (United States)

Jia, Xinlei; Yan, Xiaobing; Wang, Hong; Yang, Tao; Zhou, Zhenyu; Zhao, Jianhui

2018-06-01

In this work, we have investigated two kinds of charge trapping memory devices with Pd/Al2O3/ZnO/SiO2/p-Si and Pd/Al2O3/ZnO/graphene oxide quantum-dots (GOQDs)/ZnO/SiO2/p-Si structure. Compared with the single ZnO sample, the memory window of the ZnO-GOQDs-ZnO sample reaches a larger value (more than doubled) of 2.7 V under the sweeping gate voltage ± 7 V, indicating a better charge storage capability and the significant charge trapping effects by embedding the GOQDs trapping layer. The ZnO-GOQDs-ZnO devices have better date retention properties with the high and low capacitances loss of ˜ 1.1 and ˜ 6.9%, respectively, as well as planar density of the trapped charges of 1.48 × 1012 cm- 2. It is proposed that the GOQDs play an important role in the outstanding memory characteristics due to the deep quantum potential wells and the discrete distribution of the GOQDs. The long date retention time might have resulted from the high potential barrier which suppressed both the back tunneling and the leakage current. Intercalating GOQDs in the memory device is a promising method to realize large memory window, low-power consumption and excellent retention properties.

Total Ionizing Dose Influence on the Single Event Effect Sensitivity in Samsung 8Gb NAND Flash Memories

Science.gov (United States)

Edmonds, Larry D.; Irom, Farokh; Allen, Gregory R.

2017-08-01

A recent model provides risk estimates for the deprogramming of initially programmed floating gates via prompt charge loss produced by an ionizing radiation environment. The environment can be a mixture of electrons, protons, and heavy ions. The model requires several input parameters. This paper extends the model to include TID effects in the control circuitry by including one additional parameter. Parameters intended to produce conservative risk estimates for the Samsung 8 Gb SLC NAND flash memory are given, subject to some qualifications.

Fast, Capacious Disk Memory Device

Science.gov (United States)

Muller, Ronald M.

1990-01-01

Device for recording digital data on, and playing back data from, memory disks has high recording or playback rate and utilizes available recording area more fully. Two disks, each with own reading/writing head, used to record data at same time. Head on disk A operates on one of tracks numbered from outside in; head on disk B operates on track of same number in sequence from inside out. Underlying concept of device applicable to magnetic or optical disks.

Cell characteristics of a multiple alloy nano-dots memory structure

International Nuclear Information System (INIS)

Bea, Ji Chel; Lee, Kang-Wook; Tanaka, Tetsu; Koyanagi, Mitsumasa; Song, Yun Heub; Lee, Gae-Hun

2009-01-01

A multiple alloy metal nano-dots memory using FN tunneling was investigated in order to confirm its structural possibility for future flash memory. In this work, a multiple FePt nano-dots device with a high work function (∼5.2 eV) and extremely high dot density (∼1.2 × 10 13 cm −2 ) was fabricated. Its structural effect for multiple layers was evaluated and compared to the one with a single layer in terms of the cell characteristics and reliability. We confirm that MOS capacitor structures with two to four multiple FePt nano-dot layers provide a larger threshold voltage window and better retention characteristics. Furthermore, it was also revealed that several process parameters for block oxide and inter-tunnel oxide between the nano-dot layers are very important to improve the efficiency of electron injection into multiple nano-dots. From these results, it is expected that a multiple FePt nano-dots memory using Fowler–Nordheim (FN) tunneling could be a candidate structure for future flash memory

Bulk heterojunction polymer memory devices with reduced graphene oxide as electrodes.

Science.gov (United States)

Liu, Juqing; Yin, Zongyou; Cao, Xiehong; Zhao, Fei; Lin, Anping; Xie, Linghai; Fan, Quli; Boey, Freddy; Zhang, Hua; Huang, Wei

2010-07-27

A unique device structure with a configuration of reduced graphene oxide (rGO) /P3HT:PCBM/Al has been designed for the polymer nonvolatile memory device. The current-voltage (I-V) characteristics of the fabricated device showed the electrical bistability with a write-once-read-many-times (WORM) memory effect. The memory device exhibits a high ON/OFF ratio (10(4)-10(5)) and low switching threshold voltage (0.5-1.2 V), which are dependent on the sheet resistance of rGO electrode. Our experimental results confirm that the carrier transport mechanisms in the OFF and ON states are dominated by the thermionic emission current and ohmic current, respectively. The polarization of PCBM domains and the localized internal electrical field formed among the adjacent domains are proposed to explain the electrical transition of the memory device.

Sentinel 2 MMFU: The first European Mass Memory System Based on NAND-Flash Storage Technology

Science.gov (United States)

Staehle, M.; Cassel, M.; Lonsdorfer, U.; Gliem, F.; Walter, D.; Fichna, T.

2011-08-01

Sentinel-2 is the multispectral optical mission of the EU-ESA GMES (Global Monitoring for Environment and Security) program, currently under development by Astrium-GmbH in Friedrichshafen (Germany) for a launch in 2013. The mission features a 490 Mbit/s optical sensor operating at high duty cycles, requiring in turn a large 2.4 Tbit on-board storage capacity.The required storage capacity motivated the selection of the NAND-Flash technology which was already secured by a lengthy period (2004-2009) of detailed testing, analysis and qualification by Astrium GmbH, IDA and ESTEC. The mass memory system is currently being realized by Astrium GmbH.

Demonstration of Ultra-Fast Switching in Nano metallic Resistive Switching Memory Devices

International Nuclear Information System (INIS)

Yang, Y.

2016-01-01

Interdependency of switching voltage and time creates a dilemma/obstacle for most resistive switching memories, which indicates low switching voltage and ultra-fast switching time cannot be simultaneously achieved. In this paper, an ultra-fast (sub-100 ns) yet low switching voltage resistive switching memory device (“nano metallic ReRAM”) was demonstrated. Experimental switching voltage is found independent of pulse width (intrinsic device property) when the pulse is long but shows abrupt time dependence (“cliff”) as pulse width approaches characteristic RC time of memory device (extrinsic device property). Both experiment and simulation show that the onset of cliff behavior is dependent on physical device size and parasitic resistance, which is expected to diminish as technology nodes shrink down. We believe this study provides solid evidence that nano metallic resistive switching memory can be reliably operated at low voltage and ultra-fast regime, thus beneficial to future memory technology.

Solution-processed flexible NiO resistive random access memory device

Science.gov (United States)

Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon

2018-04-01

Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).

Resistively heated shape memory polymer device

Energy Technology Data Exchange (ETDEWEB)

Marion, III, John E.; Bearinger, Jane P.; Wilson, Thomas S.; Maitland, Duncan J.

2017-09-05

A resistively heated shape memory polymer device is made by providing a rod, sheet or substrate that includes a resistive medium. The rod, sheet or substrate is coated with a first shape memory polymer providing a coated intermediate unit. The coated intermediate unit is in turn coated with a conductive material providing a second intermediate unit. The second coated intermediate unit is in turn coated with an outer shape memory polymer. The rod, sheet or substrate is exposed and an electrical lead is attached to the rod, sheet or substrate. The conductive material is exposed and an electrical lead is attached to the conductive material.

Resistively heated shape memory polymer device

Energy Technology Data Exchange (ETDEWEB)

Marion, III, John E.; Bearinger, Jane P.; Wilson, Thomas S.; Maitland, Duncan J.

2016-10-25

A resistively heated shape memory polymer device is made by providing a rod, sheet or substrate that includes a resistive medium. The rod, sheet or substrate is coated with a first shape memory polymer providing a coated intermediate unit. The coated intermediate unit is in turn coated with a conductive material providing a second intermediate unit. The second coated intermediate unit is in turn coated with an outer shape memory polymer. The rod, sheet or substrate is exposed and an electrical lead is attached to the rod, sheet or substrate. The conductive material is exposed and an electrical lead is attached to the conductive material.

A pilot study of magnetic therapy for hot flashes after breast cancer.

Science.gov (United States)

Carpenter, Janet S; Wells, Nancy; Lambert, Beth; Watson, Peggy; Slayton, Tami; Chak, Bapsi; Hepworth, Joseph T; Worthington, W Bradley

2002-04-01

The purpose of this randomized placebo-controlled crossover pilot study was to evaluate the effectiveness and acceptability of magnetic therapy for hot flashes among breast cancer survivors. Participants completed a 24-hour baseline hot-flash monitoring session, wore the magnetic devices or placebo for 3 days, completed an after-treatment hot-flash monitoring session, experienced a 10-day washout period, and then crossed over to the opposite study arm. Magnetic devices and placebos were placed on 6 acupressure sites corresponding to hot-flash relief. Complete data were available from 11 survivors of breast cancer. Results indicated magnetic therapy was no more effective than placebo in decreasing hot-flash severity, and contrary to expectations, placebo was significantly more effective than magnets in decreasing hot-flash frequency, bother, interference with daily activities, and overall quality of life. Implications for clinical practice and future research include the need to explore alternative interventions aimed at alleviating hot flashes in this population.

System of ispFlash configuration

International Nuclear Information System (INIS)

Bourrion, Olivier

2003-01-01

The aim of this module is to allow the use of FPGA components instead of EPLD components which for an equivalent or even inferior capacity are more expensive. For instance, the idea is to replace CPLD components having 512 macro-cells by one FPGA spartan II of Xilinx. However, due to the configuration's volatility, one configuration means is needed to put under voltage. A solution appears to be the using of a high capacity Flash memory coupled to a CPLD of small size to comply with the FPGA configuration protocol; also, one has to provide an in situ configuration means for this memory. Obviously, a product having an equivalent functionality already exists, since Xilinx and ALTERA supply PROMs of serial configuration. Unfortunately, they are expensive and a dealer is implied while the FLASH, the small CPLD and the FPGA spartan II are currently available. In conclusion, by using this assembly, which requires a small supplementary surface and a delay of upmost 240 ms (for the largest FPGA 1 Mbit), one obtains a solution cheaper and more performing than an EPLD of high capacity

Study of total ionization dose effects in electronic devices

International Nuclear Information System (INIS)

Nidhin, T.S.; Bhattacharyya, Anindya; Gour, Aditya; Behera, R.P.; Jayanthi, T.

2018-01-01

Radiation effects in electronic devices are a major challenge in the dependable application developments of nuclear power plant instrumentation and control systems. The main radiation effects are total ionization dose (TID) effects, displacement damage dose (DDD) effects and single event effects (SEE). In this study, we are concentrating on TID effects in electronic devices. The focus of the study is mainly on SRAM based field programmable gate arrays (FPGA) along with that the devices of our interest are voltage regulators, flash memory and optocoupler. The experiments are conducted by exposing the devices to gamma radiation in power off condition and the degradation in the performances are analysed

A graphene integrated highly transparent resistive switching memory device

Science.gov (United States)

Dugu, Sita; Pavunny, Shojan P.; Limbu, Tej B.; Weiner, Brad R.; Morell, Gerardo; Katiyar, Ram S.

2018-05-01

We demonstrate the hybrid fabrication process of a graphene integrated highly transparent resistive random-access memory (TRRAM) device. The indium tin oxide (ITO)/Al2O3/graphene nonvolatile memory device possesses a high transmittance of >82% in the visible region (370-700 nm) and exhibits stable and non-symmetrical bipolar switching characteristics with considerably low set and reset voltages (ITO/Al2O3/Pt device and studied its switching characteristics for comparison and a better understanding of the ITO/Al2O3/graphene device characteristics. The conduction mechanisms in high and low resistance states were analyzed, and the observed polarity dependent resistive switching is explained based on electro-migration of oxygen ions.

An Analysis of MARSIS Radar Flash Memory Data from Lunae Planum, Mars: Searching for Subsurface Structures.

Science.gov (United States)

Caprarelli, G.; Orosei, R.; Mastrogiuseppe, M.; Cartacci, M.

2017-12-01

Lunae Planum is a Martian plain measuring approximately 1000 km in width and 2000 km in length, centered at coordinates 294°E-11°N. MOLA elevations range from +2500 m to +500 m in the south, gently sloping northward to -500 m. The plain is part of a belt of terrains located between the southern highlands and the northern lowlands, that are transitional in character (e.g., by elevation, age and morphology). These transitional terrains are poorly understood, in part because of their relative lack of major geomorphological features. They record however a very significant part of Mars's geologic history. The most evident features on Lunae Planum's Hesperian surface are regularly spaced, longitudinally striking, wrinkle ridges. These indicate the presence of blind thrust faults cutting through thick stacks of layers of volcanic or sedimentary rocks. The presence of fluidized ejecta craters scattered all over the region suggests also the presence of ice or volatiles in the subsurface. In a preliminary study of Lunae Planum's subsurface we used the Mars Express ground penetrating radar MARSIS dataset [1], in order to detect reflectors that could indicate the presence of fault planes or layering. Standard radargrams however, provided no evidence of changes in value of dielectric constant that could indicate possible geologic discontinuities or stratification of physically diverse materials. We thus started a new investigation based on processing of raw MARSIS data. Here we report on the preliminary results of this study. We searched the MARSIS archive for raw data stored in flash memory. When operating with flash storage, the radar collects 2 frequency bands along-track covering a distance = 100-250 km, depending on the orbiter altitude [2]. We found flash memory data from 24 orbits over the area. We processed the data focusing radar returns in off-nadir directions, to maximize the likelihood of detecting sloping subsurface structures, including those striking parallel

Electro-optical muzzle flash detection

Science.gov (United States)

Krieg, Jürgen; Eisele, Christian; Seiffer, Dirk

2016-10-01

Localizing a shooter in a complex scenario is a difficult task. Acoustic sensors can be used to detect blast waves. Radar technology permits detection of the projectile. A third method is to detect the muzzle flash using electro-optical devices. Detection of muzzle flash events is possible with focal plane arrays, line and single element detectors. In this paper, we will show that the detection of a muzzle flash works well in the shortwave infrared spectral range. Important for the acceptance of an operational warning system in daily use is a very low false alarm rate. Using data from a detector with a high sampling rate the temporal signature of a potential muzzle flash event can be analyzed and the false alarm rate can be reduced. Another important issue is the realization of an omnidirectional view required on an operational level. It will be shown that a combination of single element detectors and simple optics in an appropriate configuration is a capable solution.

Homogeneous-oxide stack in IGZO thin-film transistors for multi-level-cell NAND memory application

Science.gov (United States)

Ji, Hao; Wei, Yehui; Zhang, Xinlei; Jiang, Ran

2017-11-01

A nonvolatile charge-trap-flash memory that is based on amorphous indium-gallium-zinc-oxide thin film transistors was fabricated with a homogeneous-oxide structure for a multi-level-cell application. All oxide layers, i.e., tunneling layer, charge trapping layer, and blocking layer, were fabricated with Al2O3 films. The fabrication condition (including temperature and deposition method) of the charge trapping layer was different from those of the other oxide layers. This device demonstrated a considerable large memory window of 4 V between the states fully erased and programmed with the operation voltage less than 14 V. This kind of device shows a good prospect for multi-level-cell memory applications.

Impacts of Co doping on ZnO transparent switching memory device characteristics

Energy Technology Data Exchange (ETDEWEB)

Simanjuntak, Firman Mangasa; Wei, Kung-Hwa [Department of Materials Science and Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan (China); Prasad, Om Kumar [Department of Electrical Engineering and Computer Science, National Chiao Tung University, Hsinchu 30010, Taiwan (China); Panda, Debashis [Department of Electronics Engineering, National Institute of Science and Technology, Berhampur, Odisha 761008 (India); Lin, Chun-An; Tsai, Tsung-Ling; Tseng, Tseung-Yuen, E-mail: tseng@cc.nctu.edu.tw [Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan (China)

2016-05-02

The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnO device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.

Organic nonvolatile memory devices with charge trapping multilayer graphene film

International Nuclear Information System (INIS)

Ji, Yongsung; Choe, Minhyeok; Cho, Byungjin; Song, Sunghoon; Yoon, Jongwon; Ko, Heung Cho; Lee, Takhee

2012-01-01

We fabricated an array-type organic nonvolatile memory device with multilayer graphene (MLG) film embedded in polyimide (PI) layers. The memory devices showed a high ON/OFF ratio (over 10 6 ) and a long retention time (over 10 4 s). The switching of the Al/PI/MLG/PI/Al memory devices was due to the presence of the MLG film inserted into the PI layers. The double-log current–voltage characteristics could be explained by the space-charge-limited current conduction based on a charge-trap model. A conductive atomic force microscopy found that the conduction paths in the low-resistance ON state were distributed in a highly localized area, which was associated with a carbon-rich filamentary switching mechanism. (paper)

Development of Ultrafast Laser Flash Methods for Measuring Thermophysical Properties of Thin Films and Boundary Thermal Resistances

Science.gov (United States)

Baba, Tetsuya; Taketoshi, Naoyuki; Yagi, Takashi

2011-11-01

Reliable thermophysical property values of thin films are important to develop advanced industrial technologies such as highly integrated electronic devices, phase-change memories, magneto-optical disks, light-emitting diodes (LEDs), organic light-emitting diodes (OLEDs), semiconductor lasers (LDs), flat-panel displays, and power electronic devices. In order to meet these requirements, the National Metrology Institute of Japan of the National Institute of Advanced Industrial Science and Technology (NMIJ/AIST) has developed ultrafast laser flash methods heated by picosecond pulse or nanosecond pulse with the same geometrical configuration as the laser flash method, which is the standard method to measure the thermal diffusivity of bulk materials. Since these pulsed light heating methods induce one-dimensional heat diffusion across a well-defined length of the specimen thickness, the absolute value of thermal diffusivity across thin films can be measured reliably. Using these ultrafast laser flash methods, the thermal diffusivity of each layer of multilayered thin films and the boundary thermal resistance between the layers can be determined from the observed transient temperature curves based on the response function method. The thermophysical properties of various thin films important for modern industries such as the transparent conductive films used for flat-panel displays, hard coating films, and multilayered films of next-generation phase-change optical disks have been measured by these methods.

Ferroelectric-gate field effect transistor memories device physics and applications

CERN Document Server

Ishiwara, Hiroshi; Okuyama, Masanori; Sakai, Shigeki; Yoon, Sung-Min

2016-01-01

This book provides comprehensive coverage of the materials characteristics, process technologies, and device operations for memory field-effect transistors employing inorganic or organic ferroelectric thin films. This transistor-type ferroelectric memory has interesting fundamental device physics and potentially large industrial impact. Among the various applications of ferroelectric thin films, the development of nonvolatile ferroelectric random access memory (FeRAM) has progressed most actively since the late 1980s and has achieved modest mass production levels for specific applications since 1995. There are two types of memory cells in ferroelectric nonvolatile memories. One is the capacitor-type FeRAM and the other is the field-effect transistor (FET)-type FeRAM. Although the FET-type FeRAM claims ultimate scalability and nondestructive readout characteristics, the capacitor-type FeRAMs have been the main interest for the major semiconductor memory companies, because the ferroelectric FET has fatal handic...

Resistance Switching Characteristics in ZnO-Based Nonvolatile Memory Devices

Directory of Open Access Journals (Sweden)

Fu-Chien Chiu

2013-01-01

Full Text Available Bipolar resistance switching characteristics are demonstrated in Pt/ZnO/Pt nonvolatile memory devices. A negative differential resistance or snapback characteristic can be observed when the memory device switches from a high resistance state to a low resistance state due to the formation of filamentary conducting path. The dependence of pulse width and temperature on set/reset voltages was examined in this work. The exponentially decreasing trend of set/reset voltage with increasing pulse width is observed except when pulse width is larger than 1 s. Hence, to switch the ZnO memory devices, a minimum set/reset voltage is required. The set voltage decreases linearly with the temperature whereas the reset voltage is nearly temperature-independent. In addition, the ac cycling endurance can be over 106 switching cycles, whereas, the dependence of HRS/LRS resistance distribution indicates that a significant memory window closure may take place after about 102  dc switching cycles.

Transmission electron microscopy assessment of conductive-filament formation in Ni-HfO2-Si resistive-switching operational devices

Science.gov (United States)

Martín, Gemma; González, Mireia B.; Campabadal, Francesca; Peiró, Francesca; Cornet, Albert; Estradé, Sònia

2018-01-01

Resistive random-access memory (ReRAM) devices are currently the object of extensive research to replace flash non-volatile memory. However, elucidation of the conductive-filament formation mechanisms in ReRAM devices at nanoscale is mandatory. In this study, the different states created under real operation conditions of HfO2-based ReRAM devices are characterized through transmission electron microscopy and electron energy-loss spectroscopy. The physical mechanism behind the conductive-filament formation in Ni/HfO2/Si ReRAM devices based on the diffusion of Ni from the electrode to the Si substrate and of Si from the substrate to the electrode through the HfO2 layer is demonstrated.

Program scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation

Science.gov (United States)

Kim, Do-Bin; Kwon, Dae Woong; Kim, Seunghyun; Lee, Sang-Ho; Park, Byung-Gook

2018-02-01

To obtain high channel boosting potential and reduce a program disturbance in channel stacked NAND flash memory with layer selection by multilevel (LSM) operation, a new program scheme using boosted common source line (CSL) is proposed. The proposed scheme can be achieved by applying proper bias to each layer through its own CSL. Technology computer-aided design (TCAD) simulations are performed to verify the validity of the new method in LSM. Through TCAD simulation, it is revealed that the program disturbance characteristics is effectively improved by the proposed scheme.

Transistor memory devices with large memory windows, using multi-stacking of densely packed, hydrophobic charge trapping metal nanoparticle array

International Nuclear Information System (INIS)

Cho, Ikjun; Cho, Jinhan; Kim, Beom Joon; Cho, Jeong Ho; Ryu, Sook Won

2014-01-01

Organic field-effect transistor (OFET) memories have rapidly evolved from low-cost and flexible electronics with relatively low-memory capacities to memory devices that require high-capacity memory such as smart memory cards or solid-state hard drives. Here, we report the high-capacity OFET memories based on the multilayer stacking of densely packed hydrophobic metal NP layers in place of the traditional transistor memory systems based on a single charge trapping layer. We demonstrated that the memory performances of devices could be significantly enhanced by controlling the adsorption isotherm behavior, multilayer stacking structure and hydrophobicity of the metal NPs. For this study, tetraoctylammonium (TOA)-stabilized Au nanoparticles (TOA-Au NPs ) were consecutively layer-by-layer (LbL) assembled with an amine-functionalized poly(amidoamine) dendrimer (PAD). The formed (PAD/TOA-Au NP ) n films were used as a multilayer stacked charge trapping layer at the interface between the tunneling dielectric layer and the SiO 2 gate dielectric layer. For a single Au NP layer (i.e. PAD/TOA-Au NP ) 1 ) with a number density of 1.82 × 10 12 cm −2 , the memory window of the OFET memory device was measured to be approximately 97 V. The multilayer stacked OFET memory devices prepared with four Au NP layers exhibited excellent programmable memory properties (i.e. a large memory window (ΔV th ) exceeding 145 V, a fast switching speed (1 μs), a high program/erase (P/E) current ratio (greater than 10 6 ) and good electrical reliability) during writing and erasing over a relatively short time scale under an operation voltage of 100 V applied at the gate. (paper)

Non-volatile memory based on the ferroelectric photovoltaic effect

Science.gov (United States)

Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

2013-01-01

The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

Three-terminal resistive switching memory in a transparent vertical-configuration device

International Nuclear Information System (INIS)

Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

2014-01-01

The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies

Measuring hot flash phenomenonology using ambulatory prospective digital diaries

Science.gov (United States)

Fisher, William I.; Thurston, Rebecca C.

2016-01-01

Objective This study provides the description, protocol, and results from a novel prospective ambulatory digital hot flash phenomenon diary. Methods This study included 152 midlife women with daily hot flashes who completed an ambulatory electronic hot flash diary continuously for the waking hours of 3 consecutive days. In this diary, women recorded their hot flashes and accompanying characteristics and associations as the hot flashes occurred. Results Self-reported hot flash severity on the digital diaries indicated that the majority of hot flashes were rated as mild (41.3%) or moderate (43.7%). Severe (13.1%) and very severe (1.8%) hot flashes were less common. Hot flash bother ratings were rated as mild (43%), or moderate (33.5%), with fewer hot flashes reported bothersome (17.5%) or very bothersome (6%). The majority of hot flashes were reported as occurring on the on the face (78.9%), neck (74.7%), and chest (61.3%). Prickly skin was reported concurrently with 32% of hot flashes, 7% with anxiety and 5% with nausea. A novel finding, 38% of hot flashes were accompanied by a premonitory aura. Conclusion A prospective electronic digital hot flash diary allows for a more precise quantitation of hot flashes while overcoming many of the limitations of commonly employed retrospective questionnaires and paper diaries. Unique insights into the phenomenology, loci and associated characteristics of hot flashes were obtained using this device. The digital hot flash phenomenology diary is recommended for future ambulatory studies of hot flashes as a prospective measure of the hot flash experience. PMID:27404030

A Novel Dual Traffic/Flash Flood Monitoring System Using Passive Infrared/Ultrasonic Sensors

KAUST Repository

Mousa, Mustafa

2015-10-19

Floods are the most common type of natural disaster, causing thousands of casualties every year. Among these events, urban flash floods are particularly deadly because of the short timescales on which they occur, and because of the high concentration of population in cities. Since most flash flood casualties are caused by a lack of information, it is critical to generate accurate and detailed warnings of flash floods. However, deploying an infrastructure that solely monitor flash floods makes little economic sense, since the average periodicity of catastrophic flash floods exceeds the lifetime of a typical sensor network. To address this issue, we propose a new sensing device that can simultaneously monitor urban flash floods and another phenomenon of interest (traffic congestion on the present case). This sensing device is based on the combination of an ultrasonic rangefinder with one or multiple remote temperature sensors. We show an implementation of this device, and illustrate its performance in both traffic flow and flash flood sensing. Field data shows that the sensor can detect vehicles with a 99% accuracy, in addition to estimating their speed and classifying them in function of their length. The same sensor can also monitor urban water levels with an accuracy of less than 2 cm. Two of the sensors have been deployed in a flood prone area, where they captured the only (minor) flash flood that occurred over the one-year test period, with no false detection, and an agreement in the estimated water level estimate (during the flash flood event) of about 2 cm.

A Novel Dual Traffic/Flash Flood Monitoring System Using Passive Infrared/Ultrasonic Sensors

KAUST Repository

Mousa, Mustafa; Odat, Enas M.; Claudel, Christian

2015-01-01

Floods are the most common type of natural disaster, causing thousands of casualties every year. Among these events, urban flash floods are particularly deadly because of the short timescales on which they occur, and because of the high concentration of population in cities. Since most flash flood casualties are caused by a lack of information, it is critical to generate accurate and detailed warnings of flash floods. However, deploying an infrastructure that solely monitor flash floods makes little economic sense, since the average periodicity of catastrophic flash floods exceeds the lifetime of a typical sensor network. To address this issue, we propose a new sensing device that can simultaneously monitor urban flash floods and another phenomenon of interest (traffic congestion on the present case). This sensing device is based on the combination of an ultrasonic rangefinder with one or multiple remote temperature sensors. We show an implementation of this device, and illustrate its performance in both traffic flow and flash flood sensing. Field data shows that the sensor can detect vehicles with a 99% accuracy, in addition to estimating their speed and classifying them in function of their length. The same sensor can also monitor urban water levels with an accuracy of less than 2 cm. Two of the sensors have been deployed in a flood prone area, where they captured the only (minor) flash flood that occurred over the one-year test period, with no false detection, and an agreement in the estimated water level estimate (during the flash flood event) of about 2 cm.

Characterization of nitride hole lateral transport in a charge trap flash memory by using a random telegraph signal method

Science.gov (United States)

Liu, Yu-Heng; Jiang, Cheng-Min; Lin, Hsiao-Yi; Wang, Tahui; Tsai, Wen-Jer; Lu, Tao-Cheng; Chen, Kuang-Chao; Lu, Chih-Yuan

2017-07-01

We use a random telegraph signal method to investigate nitride trapped hole lateral transport in a charge trap flash memory. The concept of this method is to utilize an interface oxide trap and its associated random telegraph signal as an internal probe to detect a local channel potential change resulting from nitride charge lateral movement. We apply different voltages to the drain of a memory cell and vary a bake temperature in retention to study the electric field and temperature dependence of hole lateral movement in a nitride. Thermal energy absorption by trapped holes in lateral transport is characterized. Mechanisms of hole lateral transport in retention are investigated. From the measured and modeled results, we find that thermally assisted trap-to-band tunneling is a major trapped hole emission mechanism in nitride hole lateral transport.

Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure

International Nuclear Information System (INIS)

Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee

2009-01-01

The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 μm 2 to 200 x 200 nm 2 . From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I ON /I OFF ∼10 4 ), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10 000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.

Metal-free, single-polymer device exhibits resistive memory effect

KAUST Repository

Bhansali, Unnat Sampatraj; Khan, Yasser; Cha, Dong Kyu; Almadhoun, Mahmoud N.; Li, Ruipeng; Chen, Long; Amassian, Aram; Odeh, Ihab N.; Alshareef, Husam N.

2013-01-01

All-polymer, write-once-read-many times resistive memory devices have been fabricated on flexible substrates using a single polymer, poly(3,4- ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS). Spin-cast or inkjet-printed films of solvent-modified PEDOT:PSS are used as electrodes, while the unmodified or as-is PEDOT:PSS is used as the semiconducting active layer. The all-polymer devices exhibit an irreversible but stable transition from a low resistance state (ON) to a high resistance state (OFF) at low voltages caused by an electric-field-induced morphological rearrangement of PEDOT and PSS at the electrode interface. However, in the metal-PEDOT:PSS-metal devices, we have shown a metal filament formation switching the device from an initial high resistance state (OFF) to the low resistance state (ON). The all-PEDOT:PSS memory device has low write voltages (<3 V), high ON/OFF ratio (>10 3), good retention characteristics (>10 000 s), and stability in ambient storage (>3 months). © 2013 American Chemical Society.

Metal-free, single-polymer device exhibits resistive memory effect

KAUST Repository

Bhansali, Unnat Sampatraj

2013-12-23

All-polymer, write-once-read-many times resistive memory devices have been fabricated on flexible substrates using a single polymer, poly(3,4- ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS). Spin-cast or inkjet-printed films of solvent-modified PEDOT:PSS are used as electrodes, while the unmodified or as-is PEDOT:PSS is used as the semiconducting active layer. The all-polymer devices exhibit an irreversible but stable transition from a low resistance state (ON) to a high resistance state (OFF) at low voltages caused by an electric-field-induced morphological rearrangement of PEDOT and PSS at the electrode interface. However, in the metal-PEDOT:PSS-metal devices, we have shown a metal filament formation switching the device from an initial high resistance state (OFF) to the low resistance state (ON). The all-PEDOT:PSS memory device has low write voltages (<3 V), high ON/OFF ratio (>10 3), good retention characteristics (>10 000 s), and stability in ambient storage (>3 months). © 2013 American Chemical Society.

Spectral measurements of muzzle flash with multispectral and hyperspectral sensor

Science.gov (United States)

Kastek, M.; Dulski, R.; Trzaskawka, P.; Piątkowski, T.; Polakowski, H.

2011-08-01

The paper presents some practical aspects of the measurements of muzzle flash signatures. Selected signatures of sniper shot in typical scenarios has been presented. Signatures registered during all phases of muzzle flash were analyzed. High precision laboratory measurements were made in a special ballistic laboratory and as a result several flash patterns were registered. The field measurements of a muzzle flash were also performed. During the tests several infrared cameras were used, including the measurement class devices with high accuracy and frame rates. The registrations were made in NWIR, SWIR and LWIR spectral bands simultaneously. An ultra fast visual camera was also used for visible spectra registration. Some typical infrared shot signatures were presented. Beside the cameras, the LWIR imaging spectroradiometer HyperCam was also used during the laboratory experiments and the field tests. The signatures collected by the HyperCam device were useful for the determination of spectral characteristics of the muzzle flash, whereas the analysis of thermal images registered during the tests provided the data on temperature distribution in the flash area. As a result of the measurement session the signatures of several types handguns, machine guns and sniper rifles were obtained which will be used in the development of passive infrared systems for sniper detection.

Terrestrial neutron-induced soft errors in advanced memory devices

CERN Document Server

Nakamura, Takashi; Ibe, Eishi; Yahagi, Yasuo; Kameyama, Hideaki

2008-01-01

Terrestrial neutron-induced soft errors in semiconductor memory devices are currently a major concern in reliability issues. Understanding the mechanism and quantifying soft-error rates are primarily crucial for the design and quality assurance of semiconductor memory devices. This book covers the relevant up-to-date topics in terrestrial neutron-induced soft errors, and aims to provide succinct knowledge on neutron-induced soft errors to the readers by presenting several valuable and unique features. Sample Chapter(s). Chapter 1: Introduction (238 KB). Table A.30 mentioned in Appendix A.6 on

Dual-functional Memory and Threshold Resistive Switching Based on the Push-Pull Mechanism of Oxygen Ions

KAUST Repository

Huang, Yi-Jen

2016-04-07

The combination of nonvolatile memory switching and volatile threshold switching functions of transition metal oxides in crossbar memory arrays is of great potential for replacing charge-based flash memory in very-large-scale integration. Here, we show that the resistive switching material structure, (amorphous TiOx)/(Ag nanoparticles)/(polycrystalline TiOx), fabricated on the textured-FTO substrate with ITO as the top electrode exhibits both the memory switching and threshold switching functions. When the device is used for resistive switching, it is forming-free for resistive memory applications with low operation voltage (<±1 V) and self-compliance to current up to 50 μA. When it is used for threshold switching, the low threshold current is beneficial for improving the device selectivity. The variation of oxygen distribution measured by energy dispersive X-ray spectroscopy and scanning transmission electron microscopy indicates the formation or rupture of conducting filaments in the device at different resistance states. It is therefore suggested that the push and pull actions of oxygen ions in the amorphous TiOx and polycrystalline TiOx films during the voltage sweep account for the memory switching and threshold switching properties in the device.

Memory-assisted measurement-device-independent quantum key distribution

Science.gov (United States)

Panayi, Christiana; Razavi, Mohsen; Ma, Xiongfeng; Lütkenhaus, Norbert

2014-04-01

A protocol with the potential of beating the existing distance records for conventional quantum key distribution (QKD) systems is proposed. It borrows ideas from quantum repeaters by using memories in the middle of the link, and that of measurement-device-independent QKD, which only requires optical source equipment at the user's end. For certain memories with short access times, our scheme allows a higher repetition rate than that of quantum repeaters with single-mode memories, thereby requiring lower coherence times. By accounting for various sources of nonideality, such as memory decoherence, dark counts, misalignment errors, and background noise, as well as timing issues with memories, we develop a mathematical framework within which we can compare QKD systems with and without memories. In particular, we show that with the state-of-the-art technology for quantum memories, it is potentially possible to devise memory-assisted QKD systems that, at certain distances of practical interest, outperform current QKD implementations.

Memory-assisted measurement-device-independent quantum key distribution

International Nuclear Information System (INIS)

Panayi, Christiana; Razavi, Mohsen; Ma, Xiongfeng; Lütkenhaus, Norbert

2014-01-01

A protocol with the potential of beating the existing distance records for conventional quantum key distribution (QKD) systems is proposed. It borrows ideas from quantum repeaters by using memories in the middle of the link, and that of measurement-device-independent QKD, which only requires optical source equipment at the user's end. For certain memories with short access times, our scheme allows a higher repetition rate than that of quantum repeaters with single-mode memories, thereby requiring lower coherence times. By accounting for various sources of nonideality, such as memory decoherence, dark counts, misalignment errors, and background noise, as well as timing issues with memories, we develop a mathematical framework within which we can compare QKD systems with and without memories. In particular, we show that with the state-of-the-art technology for quantum memories, it is potentially possible to devise memory-assisted QKD systems that, at certain distances of practical interest, outperform current QKD implementations. (paper)

Guide wire extension for shape memory polymer occlusion removal devices

Science.gov (United States)

Maitland, Duncan J [Pleasant Hill, CA; Small, IV, Ward; Hartman, Jonathan [Sacramento, CA

2009-11-03

A flexible extension for a shape memory polymer occlusion removal device. A shape memory polymer instrument is transported through a vessel via a catheter. A flexible elongated unit is operatively connected to the distal end of the shape memory polymer instrument to enhance maneuverability through tortuous paths en route to the occlusion.

Combating Memory Corruption Attacks On Scada Devices

Science.gov (United States)

Bellettini, Carlo; Rrushi, Julian

Memory corruption attacks on SCADA devices can cause significant disruptions to control systems and the industrial processes they operate. However, despite the presence of numerous memory corruption vulnerabilities, few, if any, techniques have been proposed for addressing the vulnerabilities or for combating memory corruption attacks. This paper describes a technique for defending against memory corruption attacks by enforcing logical boundaries between potentially hostile data and safe data in protected processes. The technique encrypts all input data using random keys; the encrypted data is stored in main memory and is decrypted according to the principle of least privilege just before it is processed by the CPU. The defensive technique affects the precision with which attackers can corrupt control data and pure data, protecting against code injection and arc injection attacks, and alleviating problems posed by the incomparability of mitigation techniques. An experimental evaluation involving the popular Modbus protocol demonstrates the feasibility and efficiency of the defensive technique.

Soluble dendrimers europium(III) β-diketonate complex for organic memory devices

International Nuclear Information System (INIS)

Wang Binbin; Fang Junfeng; Li Bin; You Han; Ma Dongge; Hong Ziruo; Li Wenlian; Su Zhongmin

2008-01-01

We report the synthesis of a soluble dendrimers europium(III) complex, tris(dibenzoylmethanato)(1,3,5-tris[2-(2'-pyridyl) benzimidazoly]methylbenzene)-europium(III), and its application in organic electrical bistable memory device. Excellent stability that ensured more than 10 6 write-read-erase-reread cycles has been performed in ambient conditions without current-induced degradation. High-density, low-cost memory, good film-firming property, fascinating thermal and morphological stability allow the application of the dendrimers europium(III) complex as an active medium in non-volatile memory devices

Memory operation devices based on light-illumination ambipolar carbon-nanotube thin-film-transistors

International Nuclear Information System (INIS)

Aïssa, B.; Nedil, M.; Kroeger, J.; Haddad, T.; Rosei, F.

2015-01-01

We report the memory operation behavior of a light illumination ambipolar single-walled carbon nanotube thin film field-effect transistors devices. In addition to the high electronic-performance, such an on/off transistor-switching ratio of 10 4 and an on-conductance of 18 μS, these memory devices have shown a high retention time of both hole and electron-trapping modes, reaching 2.8 × 10 4  s at room temperature. The memory characteristics confirm that light illumination and electrical field can act as an independent programming/erasing operation method. This could be a fundamental step toward achieving high performance and stable operating nanoelectronic memory devices

Hybrid superconducting-magnetic memory device using competing order parameters.

Science.gov (United States)

Baek, Burm; Rippard, William H; Benz, Samuel P; Russek, Stephen E; Dresselhaus, Paul D

2014-05-28

In a hybrid superconducting-magnetic device, two order parameters compete, with one type of order suppressing the other. Recent interest in ultra-low-power, high-density cryogenic memories has spurred new efforts to simultaneously exploit superconducting and magnetic properties so as to create novel switching elements having these two competing orders. Here we describe a reconfigurable two-layer magnetic spin valve integrated within a Josephson junction. Our measurements separate the suppression in the superconducting coupling due to the exchange field in the magnetic layers, which causes depairing of the supercurrent, from the suppression due to the stray magnetic field. The exchange field suppression of the superconducting order parameter is a tunable and switchable behaviour that is also scalable to nanometer device dimensions. These devices demonstrate non-volatile, size-independent switching of Josephson coupling, in magnitude as well as phase, and they may enable practical nanoscale superconducting memory devices.

A new DRAM-type memory devices based on polymethacrylate containing pendant 2-methylbenzothiazole

International Nuclear Information System (INIS)

Wang Dong; Li Hua; Li Najun; Zhao Ying; Zhou Qianhao; Xu Qingfeng; Lu Jianmei; Wang Lihua

2012-01-01

Graphical abstract: The devices fabricated with 75 nm and 45 nm thick pBVMA films were both found to exhibit DRAM type memory behaviors, which may indicate that the Al nanoparticles had no penetration into the thin film during the vacuum-deposition process. Highlights: ► The side-functional moieties of pBVMA regularly arranged in film state. ► The device exhibits volatile memory behavior with an ON/OFF current ratio up to 10 5 . ► The film thickness has nothing to do with the device's memory behavior. ► Physical theoretical models and molecular simulation supported the memory mechanism. - Abstract: A polymethacrylate containing pendant 2-methylbenzothiazole (pBVMA) with good thermal stability was synthesized by free radical polymerization. The devices based on pBVMA possess a sandwich structure comprising bottom indium-tin oxide (ITO) electrode and top Al electrode. The as-fabricated device exhibits the dynamic random access memory (DRAM) behavior with an ON/OFF current ratio up to 10 5 and can endure 10 8 read cycles under −1 V pulse voltage. The effect of the film thickness on the device performance was investigated and the devices fabricated with 75 nm and 45 nm thick pBVMA films were both found to exhibit DRAM type memory behaviors, which may indicate that the Al nanoparticles had no penetration into the thin film during the vacuum-deposition process. The molecular simulation and physical theoretical models were analyzed and the mechanism of the DRAM performance may be attributed to the weak electron withdrawing ability of the molecule.

Review of radiation effects on ReRAM devices and technology

Science.gov (United States)

Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.

2017-08-01

A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.

Charge Carrier Transport Mechanism Based on Stable Low Voltage Organic Bistable Memory Device.

Science.gov (United States)

Ramana, V V; Moodley, M K; Kumar, A B V Kiran; Kannan, V

2015-05-01

A solution processed two terminal organic bistable memory device was fabricated utilizing films of polymethyl methacrylate PMMA/ZnO/PMMA on top of ITO coated glass. Electrical characterization of the device structure showed that the two terminal device exhibited favorable switching characteristics with an ON/OFF ratio greater than 1 x 10(4) when the voltage was swept between - 2 V and +3 V. The device maintained its state after removal of the bias voltage. The device did not show degradation after a 1-h retention test at 120 degrees C. The memory functionality was consistent even after fifty cycles of operation. The charge transport switching mechanism is discussed on the basis of carrier transport mechanism and our analysis of the data shows that the charge carrier trans- port mechanism of the device during the writing process can be explained by thermionic emission (TE) and space-charge-limited-current (SCLC) mechanism models while erasing process could be explained by the FN tunneling mechanism. This demonstration provides a class of memory devices with the potential for low-cost, low-power consumption applications, such as a digital memory cell.

Discovering Authentication Credentials in Volatile Memory of Android Mobile Devices

OpenAIRE

Apostolopoulos , Dimitris; Marinakis , Giannis; Ntantogian , Christoforos; Xenakis , Christos

2013-01-01

Part 5: Adoption Issues in e/m-Services; International audience; This paper investigates whether authentication credentials in the volatile memory of Android mobile devices can be discovered using freely available tools. The experiments that we carried out for each application included two different sets: In the first set, our goal was to check if we could recover our own submitted credentials from the memory dump of the mobile device. In the second set of experiments, the goal was to find pa...

Memory operation devices based on light-illumination ambipolar carbon-nanotube thin-film-transistors

Energy Technology Data Exchange (ETDEWEB)

Aïssa, B., E-mail: aissab@emt.inrs.ca [Qatar Environment and Energy Research Institute (QEERI), Qatar Foundation, P.O. Box 5825, Doha (Qatar); Centre Energie, Matériaux et Télécommunications, INRS, 1650, Boulevard Lionel-Boulet Varennes, Quebec J3X 1S2 (Canada); Nedil, M. [Telebec Wireless Underground Communication Laboratory, UQAT, 675, 1ère Avenue, Val d' Or, Quebec J9P 1Y3 (Canada); Kroeger, J. [NanoIntegris & Raymor Nanotech, Raymor Industries Inc., 3765 La Vérendrye, Boisbriand, Quebec J7H 1R8 (Canada); Haddad, T. [Department of Mechanical Engineering, McGill University, Montreal, Quebec H3A 0B8 (Canada); Rosei, F. [Centre Energie, Matériaux et Télécommunications, INRS, 1650, Boulevard Lionel-Boulet Varennes, Quebec J3X 1S2 (Canada)

2015-09-28

We report the memory operation behavior of a light illumination ambipolar single-walled carbon nanotube thin film field-effect transistors devices. In addition to the high electronic-performance, such an on/off transistor-switching ratio of 10{sup 4} and an on-conductance of 18 μS, these memory devices have shown a high retention time of both hole and electron-trapping modes, reaching 2.8 × 10{sup 4} s at room temperature. The memory characteristics confirm that light illumination and electrical field can act as an independent programming/erasing operation method. This could be a fundamental step toward achieving high performance and stable operating nanoelectronic memory devices.

Polymer ferroelectric field-effect memory device with SnO channel layer exhibits record hole mobility

KAUST Repository

Caraveo-Frescas, Jesus Alfonso; Khan, M. A.; Alshareef, Husam N.

2014-01-01

Here we report for the first time a hybrid p-channel polymer ferroelectric field-effect transistor memory device with record mobility. The memory device, fabricated at 200C on both plastic polyimide and glass substrates, uses ferroelectric polymer P(VDF-TrFE) as the gate dielectric and transparent p-type oxide (SnO) as the active channel layer. A record mobility of 3.3 cm 2V-1s-1, large memory window (~16 V), low read voltages (~-1 V), and excellent retention characteristics up to 5000 sec have been achieved. The mobility achieved in our devices is over 10 times higher than previously reported polymer ferroelectric field-effect transistor memory with p-type channel. This demonstration opens the door for the development of non-volatile memory devices based on dual channel for emerging transparent and flexible electronic devices.

Polymer ferroelectric field-effect memory device with SnO channel layer exhibits record hole mobility

KAUST Repository

Caraveo-Frescas, Jesus Alfonso

2014-06-10

Here we report for the first time a hybrid p-channel polymer ferroelectric field-effect transistor memory device with record mobility. The memory device, fabricated at 200C on both plastic polyimide and glass substrates, uses ferroelectric polymer P(VDF-TrFE) as the gate dielectric and transparent p-type oxide (SnO) as the active channel layer. A record mobility of 3.3 cm 2V-1s-1, large memory window (~16 V), low read voltages (~-1 V), and excellent retention characteristics up to 5000 sec have been achieved. The mobility achieved in our devices is over 10 times higher than previously reported polymer ferroelectric field-effect transistor memory with p-type channel. This demonstration opens the door for the development of non-volatile memory devices based on dual channel for emerging transparent and flexible electronic devices.

Light programmable organic transistor memory device based on hybrid dielectric

Science.gov (United States)

Ren, Xiaochen; Chan, Paddy K. L.

2013-09-01

We have fabricated the transistor memory devices based on SiO2 and polystyrene (PS) hybrid dielectric. The trap states densities with different semiconductors have been investigated and a maximum 160V memory window between programming and erasing is realized. For DNTT based transistor, the trapped electron density is limited by the number of mobile electrons in semiconductor. The charge transport mechanism is verified by light induced Vth shift effect. Furthermore, in order to meet the low operating power requirement of portable electronic devices, we fabricated the organic memory transistor based on AlOx/self-assembly monolayer (SAM)/PS hybrid dielectric, the effective capacitance of hybrid dielectric is 210 nF cm-2 and the transistor can reach saturation state at -3V gate bias. The memory window in transfer I-V curve is around 1V under +/-5V programming and erasing bias.

Configurable Resistive Switching between Memory and Threshold Characteristics for Protein-Based Devices

KAUST Repository

Wang, Hong

2015-05-01

The employ of natural biomaterials as the basic building blocks of electronic devices is of growing interest for biocompatible and green electronics. Here, resistive switching (RS) devices based on naturally silk protein with configurable functionality are demonstrated. The RS type of the devices can be effectively and exactly controlled by controlling the compliance current in the set process. Memory RS can be triggered by a higher compliance current, while threshold RS can be triggered by a lower compliance current. Furthermore, two types of memory devices, working in random access and WORM modes, can be achieved with the RS effect. The results suggest that silk protein possesses the potential for sustainable electronics and data storage. In addition, this finding would provide important guidelines for the performance optimization of biomaterials based memory devices and the study of the underlying mechanism behind the RS effect arising from biomaterials. Resistive switching (RS) devices with configurable functionality based on protein are successfully achieved. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Flash evaporator

OpenAIRE

1997-01-01

A device and method for flash evaporating a reagent includes an evaporation chamber that houses a dome on which evaporation occurs. The dome is solid and of high thermal conductivity and mass, and may be heated to a temperature sufficient to vaporize a specific reagent. The reagent is supplied from an external source to the dome through a nozzle, and may be supplied as a continuous stream, as a shower, and as discrete drops. A carrier gas may be introduced into the evaporation chamber and cre...

Electronic memory devices based on the chalcone with negative electrostatic potential regions

International Nuclear Information System (INIS)

Yan, Bao-Long; Sun, Ru; Ge, Jian-Feng; Wang, Dong; Li, Hua; Lu, Jian-Mei

2013-01-01

The molecular electrostatic potential (ESP) properties were used for the explanation of organic electric memory ability. Several chalcone compounds, owning a negative ESP region locates at the oxygen atom, were selected in this paper to validate the selection of compounds for organic memory materials. The synthesis, characterization, fabrication of the organic memory devices and the electrical properties for them were reported, and they were shown as WORM (write once read many times) type memory devices. The molecular geometries were optimized by the addition of a changeable electric field in the x direction inside the molecules using FF-DFT (Finite Field-Density Functionary Theory) method. The relationship between ESP of the molecules under different electric field and the property was discussed, and the mechanisms associated with the memory effect were also elucidated from DFT calculation results. - Highlights: • The molecular electrostatic potential (ESP) properties were used. • The chalcone compounds were used for the WORM type device. • The molecular geometries were optimized by the addition of a changeable electric field in the x direction. • The structure–property relationship was discussed

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Science.gov (United States)

2011-09-07

... Bldg. 3F, 2-1 Yaesu 2- chome Chuo-ku, Tokyo 104-0028, Japan. Elpida Memory (USA) Inc., 1175 Sonora..., Round Rock, TX 78682. Hewlett-Packard Company, 3000 Hanover Street, Palo Alto, CA 94304. Kingston...

A study on carbon nanotube bridge as a electromechanical memory device

Science.gov (United States)

Kang, Jeong Won; Ha Lee, Jun; Joo Lee, Hoong; Hwang, Ho Jung

2005-04-01

A nanoelectromechanical (NEM) nanotube random access memory (NRAM) device based on carbon nanotube (CNT) was investigated using atomistic simulations. For the CNT-based NEM memory, the mechanical properties of the CNT-bridge and van der Waals interactions between the CNT-bridge and substrate were very important. The critical amplitude of the CNT-bridge was 16% of the length of the CNT-bridge. As molecular dynamics time increased, the CNT-bridge went to the steady state under the electrostatic force with the damping of the potential and the kinetic energies of the CNT-bridge. The interatomic interaction between the CNT-bridge and substrate, value of the CNT-bridge slack, and damping rate of the CNT-bridge were very important for the operation of the NEM memory device as a nonvolatile memory.

Flash release an alternative for releasing complex MEMS devices

NARCIS (Netherlands)

Deladi, S.; Krijnen, Gijsbertus J.M.; Elwenspoek, Michael Curt

2004-01-01

A novel time-saving and cost-effective release technique has been developed and is described. The physical nature of the process is explained in combination with experimental observations. The results of the flash release process are compared with those of freeze-drying and supercritical CO2

Experimental study on 14 MeV neutron irradiation effects in FLASH ROM28F256 and 29C256

International Nuclear Information System (INIS)

He Chaohui; Chen Xiaohua; Li Guozheng; Wang Yanping; Ji Lin; Geng Bin; Yang Hailiang; Liu Enke

2000-01-01

Experimental results of neutron irradiation effects are given for FLASH ROM. New phenomena are observed. The 14 MeV neutron irradiation effects in 28F256 and 29C256 devices are different from the single event effects. Errors are only '0'→'1'. There is a neutron flux threshold. Errors occur when neutron flux is above the threshold, no error occurs when below the threshold. The errors go up with the increase of the neutron flux until all '0' change to '1'. Hard errors, that new data cannot be written in memory with programmer, occur in devices which are measured during irradiation and irradiated in power on mode. Errors rise with the increase of reading times. Under same neutron flux, there is no error in devices in power off mode, however, errors occur in all devices in power on mode, moreover, undefined errors occur

Fabrication and electrical characterization of a MOS memory device containing self-assembled metallic nanoparticles

Science.gov (United States)

Sargentis, Ch.; Giannakopoulos, K.; Travlos, A.; Tsamakis, D.

2007-04-01

Floating gate devices with nanoparticles embedded in dielectrics have recently attracted much attention due to the fact that these devices operate as non-volatile memories with high speed, high density and low power consumption. In this paper, memory devices containing gold (Au) nanoparticles have been fabricated using e-gun evaporation. The Au nanoparticles are deposited on a very thin SiO 2 layer and are then fully covered by a HfO 2 layer. The HfO 2 is a high- k dielectric and gives good scalability to the fabricated devices. We studied the effect of the deposition parameters to the size and the shape of the Au nanoparticles using capacitance-voltage and conductance-voltage measurements, we demonstrated that the fabricated device can indeed operate as a low-voltage memory device.

Interactions of numerical and temporal stimulus characteristics on the control of response location by brief flashes of light.

Science.gov (United States)

Fetterman, J Gregor; Killeen, P Richard

2011-09-01

Pigeons pecked on three keys, responses to one of which could be reinforced after 3 flashes of the houselight, to a second key after 6, and to a third key after 12. The flashes were arranged according to variable-interval schedules. Response allocation among the keys was a function of the number of flashes. When flashes were omitted, transitions occurred very late. Increasing flash duration produced a leftward shift in the transitions along a number axis. Increasing reinforcement probability produced a leftward shift, and decreasing reinforcement probability produced a rightward shift. Intermixing different flash rates within sessions separated allocations: Faster flash rates shifted the functions sooner in real time, but later in terms of flash count, and conversely for slower flash rates. A model of control by fading memories of number and time was proposed.

Memory, microprocessor, and ASIC

CERN Document Server

Chen, Wai-Kai

2003-01-01

System Timing. ROM/PROM/EPROM. SRAM. Embedded Memory. Flash Memories. Dynamic Random Access Memory. Low-Power Memory Circuits. Timing and Signal Integrity Analysis. Microprocessor Design Verification. Microprocessor Layout Method. Architecture. ASIC Design. Logic Synthesis for Field Programmable Gate Array (EPGA) Technology. Testability Concepts and DFT. ATPG and BIST. CAD Tools for BIST/DFT and Delay Faults.

Embedded system in FPGA-based LLRF controller for FLASH

Science.gov (United States)

Szewinski, Jaroslaw; Pucyk, Piotr; Jalmuzna, Wojciech; Fafara, Przemyslaw; Pieciukiewicz, Marcin; Romaniuk, Ryszard; Pozniak, Krzysztof T.

2006-10-01

FPGA devices are often used in High Energy Physics and accelerator technology experiments, where the highest technologies are needed. To make FPGA based systems more flexible, common technique is to provide SoC (System on a Chip) solution in the FPGA, which is in most cases a CPU unit. Such a combination gives possibility to balance between hardware and software implementation of particular task. SoC solution on FPGA can be very flexible, because in simplest cases no additional hardware is needed to run programs on CPU, and when system has such devices like UART, SDRAM memory, mass storage and network interface, it can handle full featured operating system such as Linux or VxWorks. Embedded process can be set up in different configurations, depending on the available resources on board, so every user can adjust system to his own needs. Embedded systems can be also used to perform partial self-reconfiguration of FPGA logic of the chip, on which the system is running. This paper will also present some results on SoC implementations in a Low Level RF system under design for the VUV Free Electron Laser, FLASH, DESY, Hamburg.

Non-Hebbian learning implementation in light-controlled resistive memory devices.

Science.gov (United States)

Ungureanu, Mariana; Stoliar, Pablo; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E

2012-01-01

Non-Hebbian learning is often encountered in different bio-organisms. In these processes, the strength of a synapse connecting two neurons is controlled not only by the signals exchanged between the neurons, but also by an additional factor external to the synaptic structure. Here we show the implementation of non-Hebbian learning in a single solid-state resistive memory device. The output of our device is controlled not only by the applied voltages, but also by the illumination conditions under which it operates. We demonstrate that our metal/oxide/semiconductor device learns more efficiently at higher applied voltages but also when light, an external parameter, is present during the information writing steps. Conversely, memory erasing is more efficiently at higher applied voltages and in the dark. Translating neuronal activity into simple solid-state devices could provide a deeper understanding of complex brain processes and give insight into non-binary computing possibilities.

Non-volatile memories

CERN Document Server

Lacaze, Pierre-Camille

2014-01-01

Written for scientists, researchers, and engineers, Non-volatile Memories describes the recent research and implementations in relation to the design of a new generation of non-volatile electronic memories. The objective is to replace existing memories (DRAM, SRAM, EEPROM, Flash, etc.) with a universal memory model likely to reach better performances than the current types of memory: extremely high commutation speeds, high implantation densities and retention time of information of about ten years.

RFID and Memory Devices Fabricated Integrally on Substrates

Science.gov (United States)

Schramm, Harry F.

2004-01-01

Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for

Nonvolatile write-once-read-many-times memory device with functionalized-nanoshells/PEDOT:PSS nanocomposites

International Nuclear Information System (INIS)

Avila-Nino, J.A.; Segura-Cardenas, E.; Sustaita, A.O.; Cruz-Cruz, I.; Lopez-Sandoval, R.; Reyes-Reyes, M.

2011-01-01

We have investigated the memory effect of the nanocomposites of functionalized carbon nanoshells (f-CNSs) mixed with poly(3,4-ethylenedioxythiophene) doped with polystyrenesulfonate (PEDOT:PSS) polymer. The f-CNSs were synthesized by the spray pyrolysis method and functionalized in situ with functional groups (OH, COOH, C-H, C-OH) with the aim of improving their compatibility in the aqueous dispersion of PEDOT:PSS. The current-voltage (I-V) sweep curves at room temperature for the Al/f-CNSs, for certain concentrations range, embedded in a PEDOT:PSS layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. The memory effect observed in the devices can be explained due to the existence of trapped charges in the f-CNSs/PEDOT:PSS layer. The carrier transport mechanisms for the memory devices is studied and discussed.

Nonvolatile write-once-read-many-times memory device with functionalized-nanoshells/PEDOT:PSS nanocomposites

Energy Technology Data Exchange (ETDEWEB)

Avila-Nino, J.A.; Segura-Cardenas, E. [Universidad Autonoma de San Luis Potosi, Instituto de Investigacion en Comunicacion Optica, Alvaro Obregon 64 Zona Centro, 78000 SLP (Mexico); Sustaita, A.O. [Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la presa San Jose 2055, CP 78216, San Luis Potosi (Mexico); Cruz-Cruz, I. [Universidad Autonoma de San Luis Potosi, Instituto de Investigacion en Comunicacion Optica, Alvaro Obregon 64 Zona Centro, 78000 SLP (Mexico); Lopez-Sandoval, R. [Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la presa San Jose 2055, CP 78216, San Luis Potosi (Mexico); Reyes-Reyes, M., E-mail: reyesm@iico.uaslp.mx [Universidad Autonoma de San Luis Potosi, Instituto de Investigacion en Comunicacion Optica, Alvaro Obregon 64 Zona Centro, 78000 SLP (Mexico)

2011-03-25

We have investigated the memory effect of the nanocomposites of functionalized carbon nanoshells (f-CNSs) mixed with poly(3,4-ethylenedioxythiophene) doped with polystyrenesulfonate (PEDOT:PSS) polymer. The f-CNSs were synthesized by the spray pyrolysis method and functionalized in situ with functional groups (OH, COOH, C-H, C-OH) with the aim of improving their compatibility in the aqueous dispersion of PEDOT:PSS. The current-voltage (I-V) sweep curves at room temperature for the Al/f-CNSs, for certain concentrations range, embedded in a PEDOT:PSS layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. The memory effect observed in the devices can be explained due to the existence of trapped charges in the f-CNSs/PEDOT:PSS layer. The carrier transport mechanisms for the memory devices is studied and discussed.

Multi-layered metal nanocrystals in a sol-gel spin-on-glass matrix for flash memory applications

Energy Technology Data Exchange (ETDEWEB)

Huang, Meiyu Stella [Department of Chemical and Biomolecular Engineering, National University of Singapore, Block E5, 4 Engineering Drive 4, 117576 (Singapore); Globalfoundries Singapore Pte Ltd, 60 Woodlands Industrial Park D, 738406 (Singapore); Suresh, Vignesh [Department of Chemical and Biomolecular Engineering, National University of Singapore, Block E5, 4 Engineering Drive 4, 117576 (Singapore); Agency for Science, Technology and Research - A*Star, Institute of Materials Research and Engineering (IMRE), #08-03, 2 Fusionopolis Way, Innovis, 138634 (Singapore); Chan, Mei Yin [School of Materials Science and Engineering (MSE), Nanyang Technological University (NTU), 50 Nanyang Avenue, 639798 (Singapore); Ma, Yu Wei [Globalfoundries Singapore Pte Ltd, 60 Woodlands Industrial Park D, 738406 (Singapore); Lee, Pooi See [School of Materials Science and Engineering (MSE), Nanyang Technological University (NTU), 50 Nanyang Avenue, 639798 (Singapore); Krishnamoorthy, Sivashankar [Agency for Science, Technology and Research - A*Star, Institute of Materials Research and Engineering (IMRE), #08-03, 2 Fusionopolis Way, Innovis, 138634 (Singapore); Science et Analyse des Materiaux Unit (SAM), Centre de Recherche Public-Gabriel Lippmann, 41, rue du Brill, Belvaux, 4422 (Luxembourg); Srinivasan, M.P., E-mail: srinivasan.madapusi@rmit.edu.au [Department of Chemical and Biomolecular Engineering, National University of Singapore, Block E5, 4 Engineering Drive 4, 117576 (Singapore); School of Engineering, RMIT University, Building 10, Level 11, Room 14, 376-392 Swanston Street, Melbourne, Victoria, 3001 (Australia)

2017-01-15

A simple and low-cost process of embedding metal nanocrystals as charge storage centers within a dielectric is demonstrated to address leakage issues associated with the scaling of the tunnelling oxide in flash memories. Metal nanocrystals with high work functions (nickel, platinum and palladium) were prepared as embedded species in methyl siloxane spin-on-glass (SOG) films on silicon substrates. Sub-10 nm-sized, well-isolated, uniformly distributed, multi-layered nanocrystals with high particle densities (10{sup 11}–10{sup 12} cm{sup −2}) were formed in the films by thermal curing of the spin-coated SOG films containing the metal precursors. Capacitance-Voltage measurements performed on metal-insulator-semiconductor capacitors with the SOG films show that the presence of metal nanocrystals enhanced the memory window of the films to 2.32 V at low operating voltages of ±5 V. These SOG films demonstrated the ability to store both holes and electrons. Capacitance-time measurements show good charge retention of more than 75% after 10{sup 4} s of discharging. This work demonstrates the applicability of the low-cost in-situ sol-gel preparation in contrast to conventional methods that involve multiple and expensive processing steps. - Highlights: • Sub-10 nm sized, well-isolated, uniformly distributed nanoparticle based charge trap memories. • Preparation of multi-layer high work function metal nanocrystals at low cost. • Large memory window of 2.32 V at low operating voltages of ±5 V. • Good charge retention of more than 90% and 75% after 10{sup 3} and 10{sup 4} s of discharging respectively. • Use of a 3 nm thick tunnelling oxide in compliance with ITRS specifications.

Multi-layered metal nanocrystals in a sol-gel spin-on-glass matrix for flash memory applications

International Nuclear Information System (INIS)

Huang, Meiyu Stella; Suresh, Vignesh; Chan, Mei Yin; Ma, Yu Wei; Lee, Pooi See; Krishnamoorthy, Sivashankar; Srinivasan, M.P.

2017-01-01

A simple and low-cost process of embedding metal nanocrystals as charge storage centers within a dielectric is demonstrated to address leakage issues associated with the scaling of the tunnelling oxide in flash memories. Metal nanocrystals with high work functions (nickel, platinum and palladium) were prepared as embedded species in methyl siloxane spin-on-glass (SOG) films on silicon substrates. Sub-10 nm-sized, well-isolated, uniformly distributed, multi-layered nanocrystals with high particle densities (10"1"1–10"1"2 cm"−"2) were formed in the films by thermal curing of the spin-coated SOG films containing the metal precursors. Capacitance-Voltage measurements performed on metal-insulator-semiconductor capacitors with the SOG films show that the presence of metal nanocrystals enhanced the memory window of the films to 2.32 V at low operating voltages of ±5 V. These SOG films demonstrated the ability to store both holes and electrons. Capacitance-time measurements show good charge retention of more than 75% after 10"4 s of discharging. This work demonstrates the applicability of the low-cost in-situ sol-gel preparation in contrast to conventional methods that involve multiple and expensive processing steps. - Highlights: • Sub-10 nm sized, well-isolated, uniformly distributed nanoparticle based charge trap memories. • Preparation of multi-layer high work function metal nanocrystals at low cost. • Large memory window of 2.32 V at low operating voltages of ±5 V. • Good charge retention of more than 90% and 75% after 10"3 and 10"4 s of discharging respectively. • Use of a 3 nm thick tunnelling oxide in compliance with ITRS specifications.

In Situ Transmission Electron Microscopy Observation of Nanostructural Changes in Phase-Change Memory

KAUST Repository

Meister, Stefan

2011-04-26

Phase-change memory (PCM) has been researched extensively as a promising alternative to flash memory. Important studies have focused on its scalability, switching speed, endurance, and new materials. Still, reliability issues and inconsistent switching in PCM devices motivate the need to further study its fundamental properties. However, many investigations treat PCM cells as black boxes; nanostructural changes inside the devices remain hidden. Here, using in situ transmission electron microscopy, we observe real-time nanostructural changes in lateral Ge2Sb2Te5 (GST) PCM bridges during switching. We find that PCM devices with similar resistances can exhibit distinct threshold switching behaviors due to the different initial distribution of nanocrystalline and amorphous domains, explaining variability of switching behaviors of PCM cells in the literature. Our findings show a direct correlation between nanostructure and switching behavior, providing important guidelines in the design and operation of future PCM devices with improved endurance and lower variability. © 2011 American Chemical Society.

Multilevel characteristics and memory mechanisms for nonvolatile memory devices based on CuInS2 quantum dot-polymethylmethacrylate nanocomposites

International Nuclear Information System (INIS)

Zhou, Yang; Yun, Dong Yeol; Kim, Tae Whan; Kim, Sang Wook

2014-01-01

Nonvolatile memory devices based on CuInS 2 (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10 −10 was maintained for 8 × 10 3 cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10 6 cycles converged to 2.40 × 10 −10 , indicative of the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams

Nonvolatile rewritable memory device based on solution-processable graphene/poly(3-hexylthiophene) nanocomposite

Energy Technology Data Exchange (ETDEWEB)

Zhang, Li, E-mail: lizhang9@zzu.edu.cn [School of Materials Science and Engineering, Zhengzhou University, Zhengzhou 450052 (China); Li, Ye; Shi, Jun [School of Materials Science and Engineering, Zhengzhou University, Zhengzhou 450052 (China); Shi, Gaoquan [Department of Chemistry, Tsinghua University, Beijing 100084 (China); Cao, Shaokui, E-mail: Caoshaokui@zzu.edu.cn [School of Materials Science and Engineering, Zhengzhou University, Zhengzhou 450052 (China)

2013-11-01

An electrically bistable device utilizing a nanocomposite of hexadecylamine-functionalized graphene oxide (HDAGO) with poly(3-hexylthiophene) (P3HT) is demonstrated. The device has an ITO/P3HT-HDAGO/Al sandwich structure, in which the composite film of P3HT-HDAGO was prepared by simple solution phase mixing of the exfoliated HDAGO monolayers with P3HT matrix and a spin-coating method. The memory device exhibits typical bistable electrical switching behavior and a nonvolatile rewritable memory effect, with a turn-on voltage of about 1.5 V and an ON/OFF-state current ratio of 10{sup 5}. Under ambient conditions, both the ON and OFF states are stable under a constant voltage stress or a continuous pulse voltage stress at a read voltage of 1 V. The conduction mechanism is deduced from the modeling of the nature of currents in both states, and the electrical switching behavior can be attributed to the electric-field-induced charge transfer between P3HT and HDAGO nanosheets. - Highlights: • Nonvolatile rewritable memory effect in P3HT–graphene composite is demonstrated. • The memory device was fabricated through a simple solution processing technique. • The device shows a remarkable electrical bistable behavior and excellent stability. • Memory mechanism is deduced from the modeling of the currents in both states.

Nonvolatile rewritable memory device based on solution-processable graphene/poly(3-hexylthiophene) nanocomposite

International Nuclear Information System (INIS)

Zhang, Li; Li, Ye; Shi, Jun; Shi, Gaoquan; Cao, Shaokui

2013-01-01

An electrically bistable device utilizing a nanocomposite of hexadecylamine-functionalized graphene oxide (HDAGO) with poly(3-hexylthiophene) (P3HT) is demonstrated. The device has an ITO/P3HT-HDAGO/Al sandwich structure, in which the composite film of P3HT-HDAGO was prepared by simple solution phase mixing of the exfoliated HDAGO monolayers with P3HT matrix and a spin-coating method. The memory device exhibits typical bistable electrical switching behavior and a nonvolatile rewritable memory effect, with a turn-on voltage of about 1.5 V and an ON/OFF-state current ratio of 10 5 . Under ambient conditions, both the ON and OFF states are stable under a constant voltage stress or a continuous pulse voltage stress at a read voltage of 1 V. The conduction mechanism is deduced from the modeling of the nature of currents in both states, and the electrical switching behavior can be attributed to the electric-field-induced charge transfer between P3HT and HDAGO nanosheets. - Highlights: • Nonvolatile rewritable memory effect in P3HT–graphene composite is demonstrated. • The memory device was fabricated through a simple solution processing technique. • The device shows a remarkable electrical bistable behavior and excellent stability. • Memory mechanism is deduced from the modeling of the currents in both states

Electrical studies of Ge4Sb1Te5 devices for memory applications

Science.gov (United States)

Sangeetha, B. G.; Shylashree, N.

2018-05-01

In this paper, the Ge4Sb1Te5 thin film device preparation and electrical studies for memory devices were carried out. The device was deposited using vapor-evaporation technique. RESET to SET state switching was shown using current-voltage characterization. The current-voltage characterization shows the switching between SET to RESET state and it was found that it requires a low energy for transition. Switching between amorphous to crystalline nature was studied using resistance-voltage characteristics. The endurance showed the effective use of this composition for memory device.

Sn whiskers removed by energy photo flashing

International Nuclear Information System (INIS)

Jiang, N.; Yang, M.; Novak, J.; Igor, P.; Osterman, M.

2012-01-01

Highlights: ► Sn whiskers were sintered by intense light flashing (Photosintering). ► Photosintering can effectively eliminate Sn whiskers. ► Photosintering would not damage electronic devices. ► Photosintering is a very promising approach to improve Sn-based electronic surface termination. - Abstract: Sn whiskers have been known to be the major issue resulting in electronic circuit shorts. In this study, we present a novel energy photo flashing approach (photosintering) to shorten and eliminate Sn whiskers. It has been found that photosintering is very effective to modify and remove Sn whiskers; only a sub-millisecond duration photosintering can amazingly get rid of over 90 vol.% of Sn whiskers. Moreover, this photosintering approach has also been proved to cause no damages to electronic devices, suggesting it is a potentially promising way to improve Sn-based electronic surface termination.

Digital signal processor for silicon audio playback devices; Silicon audio saisei kikiyo digital signal processor

Energy Technology Data Exchange (ETDEWEB)

NONE

2000-03-01

The digital audio signal processor (DSP) TC9446F series has been developed silicon audio playback devices with a memory medium of, e.g., flash memory, DVD players, and AV devices, e.g., TV sets. It corresponds to AAC (advanced audio coding) (2ch) and MP3 (MPEG1 Layer3), as the audio compressing techniques being used for transmitting music through an internet. It also corresponds to compressed types, e.g., Dolby Digital, DTS (digital theater system) and MPEG2 audio, being adopted for, e.g., DVDs. It can carry a built-in audio signal processing program, e.g., Dolby ProLogic, equalizer, sound field controlling, and 3D sound. TC9446XB has been lined up anew. It adopts an FBGA (fine pitch ball grid array) package for portable audio devices. (translated by NEDO)

Application of nanomaterials in two-terminal resistive-switching memory devices

Directory of Open Access Journals (Sweden)

Jianyong Ouyang

2010-05-01

Full Text Available Nanometer materials have been attracting strong attention due to their interesting structure and properties. Many important practical applications have been demonstrated for nanometer materials based on their unique properties. This article provides a review on the fabrication, electrical characterization, and memory application of two-terminal resistive-switching devices using nanomaterials as the active components, including metal and semiconductor nanoparticles (NPs, nanotubes, nanowires, and graphenes. There are mainly two types of device architectures for the two-terminal devices with NPs. One has a triple-layer structure with a metal film sandwiched between two organic semiconductor layers, and the other has a single polymer film blended with NPs. These devices can be electrically switched between two states with significant different resistances, i.e. the ‘ON’ and ‘OFF’ states. These render the devices important application as two-terminal non-volatile memory devices. The electrical behavior of these devices can be affected by the materials in the active layer and the electrodes. Though the mechanism for the electrical switches has been in argument, it is generally believed that the resistive switches are related to charge storage on the NPs. Resistive switches were also observed on crossbars formed by nanotubes, nanowires, and graphene ribbons. The resistive switches are due to nanoelectromechanical behavior of the materials. The Coulombic interaction of transient charges on the nanomaterials affects the configurable gap of the crossbars, which results into significant change in current through the crossbars. These nanoelectromechanical devices can be used as fast-response and high-density memory devices as well. Dr. Jianyong Ouyang received his bachelor degree from the Tsinghua University in Beijing, China, and MSc from the Institute of Chemistry, Chinese Academy of Science. He received his PhD from the Institute for Molecular

Observation of long term potentiation in papain-based memory devices

KAUST Repository

Bag, A.; Hota, Mrinal Kanti; Mallik, Sandipan B.; Maì ti, Chinmay Kumar

2014-01-01

Biological synaptic behavior in terms of long term potentiation has been observed in papain-based (plant protein) memory devices (memristors) for the first time. Improvement in long term potentiation depends on pulse amplitude and width (duration). Continuous/repetitive dc voltage sweep leads to an increase in memristor conductivity leading to a long term memory in the 'learning' processes.

Observation of long term potentiation in papain-based memory devices

KAUST Repository

Bag, A.

2014-06-01

Biological synaptic behavior in terms of long term potentiation has been observed in papain-based (plant protein) memory devices (memristors) for the first time. Improvement in long term potentiation depends on pulse amplitude and width (duration). Continuous/repetitive dc voltage sweep leads to an increase in memristor conductivity leading to a long term memory in the \\'learning\\' processes.

Application of graphene oxide-poly (vinyl alcohol) polymer nanocomposite for memory devices

Science.gov (United States)

Kaushal, Jyoti; Kaur, Ravneet; Sharma, Jadab; Tripathi, S. K.

2018-05-01

Significant attention has been gained by polymer nanocomposites because of their possible demands in future electronic memory devices. In the present work, device based on Graphene Oxide (GO) and polyvinyl alcohol (PVA) has been made and examined for the memory device application. The prepared Graphene oxide (GO) and GO-PVA nanocomposite (NC) has been characterized by X-ray Diffraction (XRD). GO nanosheets show the diffraction peak at 2θ = 11.60° and the interlayer spacing of 0.761 nm. The XRD of GO-PVA NC shows the diffraction peak at 2θ =18.56°. The fabricated device shows bipolar switching behavior having ON/OFF current ratio ˜102. The Write-Read-Erase-Read (WRER) cycles test shows that the Al/GO-PVA/Ag device has good stability and repeatability.

Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations

Science.gov (United States)

Chambonneau, Maxime; Souiki-Figuigui, Sarra; Chiquet, Philippe; Della Marca, Vincenzo; Postel-Pellerin, Jérémy; Canet, Pierre; Portal, Jean-Michel; Grojo, David

2017-04-01

We demonstrate that infrared femtosecond laser pulses with intensity above the two-photon ionization threshold of crystalline silicon induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables us to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, and defectivity) and for considerable developments in the growing field of ultrafast microelectronics.

Flexible NAND-Like Organic Ferroelectric Memory Array

NARCIS (Netherlands)

Kam, B.; Ke, T.H.; Chasin, A.; Tyagi, M.; Cristoferi, C.; Tempelaars, K.; Breemen, A.J.J.M. van; Myny, K.; Schols, S.; Genoe, J.; Gelinck, G.H.; Heremans, P.

2014-01-01

We present a memory array of organic ferroelectric field-effect transistors (OFeFETs) on flexible substrates. The OFeFETs are connected serially, similar to the NAND architecture of flash memory, which offers the highest memory density of transistor memories. We demonstrate a reliable addressing

Novel nano materials for high performance logic and memory devices

Science.gov (United States)

Das, Saptarshi

After decades of relentless progress, the silicon CMOS industry is approaching a stall in device performance for both logic and memory devices due to fundamental scaling limitations. In order to reinforce the accelerating pace, novel materials with unique properties are being proposed on an urgent basis. This list includes one dimensional nanotubes, quasi one dimensional nanowires, two dimensional atomistically thin layered materials like graphene, hexagonal boron nitride and the more recently the rich family of transition metal di-chalcogenides comprising of MoS2, WSe2, WS2 and many more for logic applications and organic and inorganic ferroelectrics, phase change materials and magnetic materials for memory applications. Only time will tell who will win, but exploring these novel materials allow us to revisit the fundamentals and strengthen our understanding which will ultimately be beneficial for high performance device design. While there has been growing interest in two-dimensional (2D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancies due to the lack of a complete picture of their performance potential. The fact that the 2-D layered semiconducting di-chalcogenides need to be connected to the "outside" world in order to capitalize on their ultimate potential immediately emphasizes the importance of a thorough understanding of the contacts. This thesis demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS2 layers the excellent intrinsic properties of this 2D material can be harvested. A comprehensive experimental study on the dependence of carrier mobility on the layer thickness of back gated multilayer MoS 2 field effect transistors is also provided. A resistor network model that comprises of Thomas-Fermi charge screening and interlayer coupling is used to explain the non-monotonic trend in the extracted field effect

Germanium nanoparticles grown at different deposition times for memory device applications

International Nuclear Information System (INIS)

Mederos, M.; Mestanza, S.N.M.; Lang, R.; Doi, I.; Diniz, J.A.

2016-01-01

In the present work, circular Metal-Oxide-Semiconductor capacitors with 200 μm of diameter and germanium (Ge) nanoparticles (NPs) embedded in the gate oxide are studied for memory applications. Optimal process parameters are investigated for Ge NPs growing by low pressure chemical vapor deposition at different deposition times. Photoluminescence measurements showed room-temperature size-dependent green-red region bands attributed to quantum confinement effects present in the NPs. High-frequency capacitance versus voltage measurements demonstrated the memory effects on the MOS structures due to the presence of Ge NPs in the gate oxide acting as discrete floating gates. Current versus voltage measurements confirmed the Fowler-Nordheim tunneling as the programming mechanism of the devices. - Highlights: • Ge nanoparticles with high density and uniforms sizes were obtained by LPCVD. • Room-temperature size-dependent bands of photoluminescence were observed. • MOS capacitors with Ge nanoparticles embedded in the oxide were fabricated. • Ge nanoparticles are the main responsible for the memory properties in the devices. • Fowler-Nordheim tunneling is the conduction mechanism observed on the devices.

Germanium nanoparticles grown at different deposition times for memory device applications

Energy Technology Data Exchange (ETDEWEB)

Mederos, M., E-mail: melissa.mederos@gmail.com [Center for Semiconductor Components and Nanotechnology (CCSNano), University of Campinas (Unicamp), Rua João Pandia Calógeras 90, Campinas, CEP: 13083-870, São Paulo (Brazil); Mestanza, S.N.M. [Federal University of ABC (UFABC), Rua Santa Adélia 166, Bangu, Santo André, CEP: 09210-170, São Paulo (Brazil); Lang, R. [Institute of Science and Technology, Federal University of São Paulo (UNIFESP), Rua Talim, 330, São José dos Campos, CEP: 12231-280, São Paulo (Brazil); Doi, I.; Diniz, J.A. [Center for Semiconductor Components and Nanotechnology (CCSNano), University of Campinas (Unicamp), Rua João Pandia Calógeras 90, Campinas, CEP: 13083-870, São Paulo (Brazil); School of Electrical and Computer Engineering, University of Campinas (Unicamp), Av. Albert Einstein 400, Campinas, CEP: 13083-852, São Paulo (Brazil)

2016-07-29

In the present work, circular Metal-Oxide-Semiconductor capacitors with 200 μm of diameter and germanium (Ge) nanoparticles (NPs) embedded in the gate oxide are studied for memory applications. Optimal process parameters are investigated for Ge NPs growing by low pressure chemical vapor deposition at different deposition times. Photoluminescence measurements showed room-temperature size-dependent green-red region bands attributed to quantum confinement effects present in the NPs. High-frequency capacitance versus voltage measurements demonstrated the memory effects on the MOS structures due to the presence of Ge NPs in the gate oxide acting as discrete floating gates. Current versus voltage measurements confirmed the Fowler-Nordheim tunneling as the programming mechanism of the devices. - Highlights: • Ge nanoparticles with high density and uniforms sizes were obtained by LPCVD. • Room-temperature size-dependent bands of photoluminescence were observed. • MOS capacitors with Ge nanoparticles embedded in the oxide were fabricated. • Ge nanoparticles are the main responsible for the memory properties in the devices. • Fowler-Nordheim tunneling is the conduction mechanism observed on the devices.

Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices

Science.gov (United States)

Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang

2017-12-01

Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.

Flexible All-Inorganic Perovskite CsPbBr3 Nonvolatile Memory Device.

Science.gov (United States)

Liu, Dongjue; Lin, Qiqi; Zang, Zhigang; Wang, Ming; Wangyang, Peihua; Tang, Xiaosheng; Zhou, Miao; Hu, Wei

2017-02-22

All-inorganic perovskite CsPbX 3 (X = Cl, Br, or I) is widely used in a variety of photoelectric devices such as solar cells, light-emitting diodes, lasers, and photodetectors. However, studies to understand the flexible CsPbX 3 electrical application are relatively scarce, mainly due to the limitations of the low-temperature fabricating process. In this study, all-inorganic perovskite CsPbBr 3 films were successfully fabricated at 75 °C through a two-step method. The highly crystallized films were first employed as a resistive switching layer in the Al/CsPbBr 3 /PEDOT:PSS/ITO/PET structure for flexible nonvolatile memory application. The resistive switching operations and endurance performance demonstrated the as-prepared flexible resistive random access memory devices possess reproducible and reliable memory characteristics. Electrical reliability and mechanical stability of the nonvolatile device were further tested by the robust current-voltage curves under different bending angles and consecutive flexing cycles. Moreover, a model of the formation and rupture of filaments through the CsPbBr 3 layer was proposed to explain the resistive switching effect. It is believed that this study will offer a new setting to understand and design all-inorganic perovskite materials for future stable flexible electronic devices.

Observers can reliably identify illusory flashes in the illusory flash paradigm

NARCIS (Netherlands)

Erp, J.B.F. van; Philippi, T.G.; Werkhoven, P.

2013-01-01

In the illusory flash paradigm, a single flash may be experienced as two flashes when accompanied by two beeps or taps, and two flashes may be experienced as a single flash when accompanied by one beep or tap. The classic paradigm restricts responses to '1' and '2' (2-AFC), ignoring possible

Model-assisted template extraction SRAF application to contact holes patterns in high-end flash memory device fabrication

Science.gov (United States)

Seoud, Ahmed; Kim, Juhwan; Ma, Yuansheng; Jayaram, Srividya; Hong, Le; Chae, Gyu-Yeol; Lee, Jeong-Woo; Park, Dae-Jin; Yune, Hyoung-Soon; Oh, Se-Young; Park, Chan-Ha

2018-03-01

Sub-resolution assist feature (SRAF) insertion techniques have been effectively used for a long time now to increase process latitude in the lithography patterning process. Rule-based SRAF and model-based SRAF are complementary solutions, and each has its own benefits, depending on the objectives of applications and the criticality of the impact on manufacturing yield, efficiency, and productivity. Rule-based SRAF provides superior geometric output consistency and faster runtime performance, but the associated recipe development time can be of concern. Model-based SRAF provides better coverage for more complicated pattern structures in terms of shapes and sizes, with considerably less time required for recipe development, although consistency and performance may be impacted. In this paper, we introduce a new model-assisted template extraction (MATE) SRAF solution, which employs decision tree learning in a model-based solution to provide the benefits of both rule-based and model-based SRAF insertion approaches. The MATE solution is designed to automate the creation of rules/templates for SRAF insertion, and is based on the SRAF placement predicted by model-based solutions. The MATE SRAF recipe provides optimum lithographic quality in relation to various manufacturing aspects in a very short time, compared to traditional methods of rule optimization. Experiments were done using memory device pattern layouts to compare the MATE solution to existing model-based SRAF and pixelated SRAF approaches, based on lithographic process window quality, runtime performance, and geometric output consistency.

Microwave oven fabricated hybrid memristor devices for non-volatile memory storage

International Nuclear Information System (INIS)

Verrelli, E; Gray, R J; O’Neill, M; Kemp, N T; Kelly, S M

2014-01-01

Novel hybrid non-volatile memories made using an ultra-fast microwave heating method are reported for the first time. The devices, consisting of aligned ZnO nanorods embedded in poly (methyl methacrylate), require no forming step and exhibit reliable and reproducible bipolar resistive switching at low voltages and with low power usage. We attribute these properties to a combination of the high aspect ratio of the nanorods and the polymeric hybrid structure of the device. The extremely easy, fast and low-cost solution based method of fabrication makes possible the simple and quick production of cheap memory cells. (paper)

Hot Flashes

Science.gov (United States)

Hot flashes Overview Hot flashes are sudden feelings of warmth, which are usually most intense over the face, neck and chest. Your skin might redden, as if you're blushing. Hot flashes can also cause sweating, and if you ...

All-spin logic operations: Memory device and reconfigurable computing

Science.gov (United States)

Patra, Moumita; Maiti, Santanu K.

2018-02-01

Exploiting spin degree of freedom of electron a new proposal is given to characterize spin-based logical operations using a quantum interferometer that can be utilized as a programmable spin logic device (PSLD). The ON and OFF states of both inputs and outputs are described by spin state only, circumventing spin-to-charge conversion at every stage as often used in conventional devices with the inclusion of extra hardware that can eventually diminish the efficiency. All possible logic functions can be engineered from a single device without redesigning the circuit which certainly offers the opportunities of designing new generation spintronic devices. Moreover, we also discuss the utilization of the present model as a memory device and suitable computing operations with proposed experimental setups.

Numerical analysis of a polysilicon-based resistive memory device

KAUST Repository

Berco, Dan; Chand, Umesh

2018-01-01

This study investigates a conductive bridge resistive memory device based on a Cu top electrode, 10-nm polysilicon resistive switching layer and a TiN bottom electrode, by numerical analysis for $$10^{3}$$103 programming and erase simulation cycles

Spatial memory in nonhuman primates implanted with the subdural pharmacotherapy device.

Science.gov (United States)

Ludvig, Nandor; Tang, Hai M; Baptiste, Shirn L; Stefanov, Dimitre G; Kral, John G

2015-06-01

This study investigated the possible influence of the Subdural Pharmacotherapy Device (SPD) on spatial memory in 3 adult, male bonnet macaques (Macaca radiata). The device was implanted in and above the subdural/subarachnoid space and cranium overlaying the right parietal/frontal cortex: a circuitry involved in spatial memory processing. A large test chamber, equipped with four baited and four non-baited food-ports at different locations, was used: reaches into empty food ports were counted as spatial memory errors. In this study of within-subject design, before SPD implantation (control) the animals made mean 373.3 ± 114.9 (mean ± SEM) errors in the first spatial memory test session. This value dropped to 47.7 ± 18.4 by the 8th session. After SPD implantation and alternating cycles of transmeningeal saline delivery and local cerebrospinal fluid (CSF) drainage in the implanted cortex the spatial memory error count, with the same port locations, was 33.0 ± 12.2 during the first spatial memory test session, further decreasing to 5.7 ± 3.5 by the 8th post-implantation session (Pmemory performance, which in fact included at least one completely error-free session per animal over time. The study showed that complication-free implantation and use of the SPD over the parietal and frontal cortices for months leave spatial memory processes intact in nonhuman primates. Copyright © 2015 Elsevier B.V. All rights reserved.

Charge trapping characteristics of Au nanocrystals embedded in remote plasma atomic layer-deposited Al2O3 film as the tunnel and blocking oxides for nonvolatile memory applications

International Nuclear Information System (INIS)

Lee, Jaesang; Kim, Hyungchul; Park, Taeyong; Ko, Youngbin; Ryu, Jaehun; Jeon, Heeyoung; Park, Jingyu; Jeon, Hyeongtag

2012-01-01

Remote plasma atomic layer deposited (RPALD) Al 2 O 3 films were investigated to apply as tunnel and blocking layers in the metal-oxide-semiconductor capacitor memory utilizing Au nanocrystals (NCs) for nonvolatile memory applications. The interface stability of an Al 2 O 3 film deposited by RPALD was studied to observe the effects of remote plasma on the interface. The interface formed during RPALD process has high oxidation states such as Si +3 and Si +4 , indicating that RPALD process can grow more stable interface which has a small amount of fixed oxide trap charge. The significant memory characteristics were also observed in this memory device through the electrical measurement. The memory device exhibited a relatively large memory window of 5.6 V under a 10/-10 V program/erase voltage and also showed the relatively fast programming/erasing speed and a competitive retention characteristic after 10 4 s. These results indicate that Al 2 O 3 films deposited via RPALD can be applied as the tunnel and blocking oxides for next-generation flash memory devices.

Negative effect of Au nanoparticles on an IGZO TFT-based nonvolatile memory device

Energy Technology Data Exchange (ETDEWEB)

Lim, Myunghoon; Yoo, Gwangwe; Lee, Jongtaek; Jeong, Seokwon; Roh, Yonghan; Park, Jinhong; Kwon, Namyong [Sungkyunkwan University, Suwon (Korea, Republic of); Jung, Wooshik [Stanford University, Stanford, CA (United States)

2014-02-15

In this letter, the electrical characteristics of nonvolatile memory devices based on back gate type indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) are investigated in terms of the Au nanoparticles (NPs) employed in the floating gate-stack of the device. The size of the Au NPs is controlled using a by 500 .deg. C annealing process after the Au thin-film deposition. The size and the roughness of the Au NPs were observed by using scanning electron microscopy, atomic force microscopy, and transmission electron microscopy. In order to analyze the electrical properties according to Au NP size, we measured the current-voltage (I{sub D}-V{sub G}) characteristics of the nonvolatile memory devices fabricated without Au NPs and with Au NPs of various sizes. The size of the Au NP increased, so did the surface roughness of the gate. This resulted in increased carrier scattering, which subsequently degraded the on-current of the memory device. In addition, inter-diffusion between the Au and the α-IGZO through the non-uniform Al{sub 2}O{sub 3} tunneling layer seemed to further degrade the device performance.

Interfacial behavior of resistive switching in ITO–PVK–Al WORM memory devices

International Nuclear Information System (INIS)

Whitcher, T J; Woon, K L; Wong, W S; Chanlek, N; Nakajima, H; Saisopa, T; Songsiriritthigul, P

2016-01-01

Understanding the mechanism of resistive switching in a memory device is fundamental in order to improve device performance. The mechanism of current switching in a basic organic write-once read-many (WORM) memory device is investigated by determining the energy level alignments of indium tin oxide (ITO), poly(9-vinylcarbazole) (PVK) and aluminum (Al) using x-ray and ultraviolet photoelectron spectroscopy, current–voltage characterization and Auger depth profiling. The current switching mechanism was determined to be controlled by the interface between the ITO and the PVK. The electric field applied across the device causes the ITO from the uneven surface of the anode to form metallic filaments through the PVK, causing a shorting effect within the device leading to increased conduction. This was found to be independent of the PVK thickness, although the switch-on voltage was non-linearly dependent on the thickness. The formation of these filaments also caused the destruction of the interfacial dipole at the PVK–Al interface. (paper)

Interfacial behavior of resistive switching in ITO-PVK-Al WORM memory devices

Science.gov (United States)

Whitcher, T. J.; Woon, K. L.; Wong, W. S.; Chanlek, N.; Nakajima, H.; Saisopa, T.; Songsiriritthigul, P.

2016-02-01

Understanding the mechanism of resistive switching in a memory device is fundamental in order to improve device performance. The mechanism of current switching in a basic organic write-once read-many (WORM) memory device is investigated by determining the energy level alignments of indium tin oxide (ITO), poly(9-vinylcarbazole) (PVK) and aluminum (Al) using x-ray and ultraviolet photoelectron spectroscopy, current-voltage characterization and Auger depth profiling. The current switching mechanism was determined to be controlled by the interface between the ITO and the PVK. The electric field applied across the device causes the ITO from the uneven surface of the anode to form metallic filaments through the PVK, causing a shorting effect within the device leading to increased conduction. This was found to be independent of the PVK thickness, although the switch-on voltage was non-linearly dependent on the thickness. The formation of these filaments also caused the destruction of the interfacial dipole at the PVK-Al interface.

Human sensory-evoked responses differ coincident with either "fusion-memory" or "flash-memory", as shown by stimulus repetition-rate effects

Directory of Open Access Journals (Sweden)

Baird Bill

2006-02-01

Full Text Available Abstract Background: A new method has been used to obtain human sensory evoked-responses whose time-domain waveforms have been undetectable by previous methods. These newly discovered evoked-responses have durations that exceed the time between the stimuli in a continuous stream, thus causing an overlap which, up to now, has prevented their detection. We have named them "A-waves", and added a prefix to show the sensory system from which the responses were obtained (visA-waves, audA-waves, somA-waves. Results: When A-waves were studied as a function of stimulus repetition-rate, it was found that there were systematic differences in waveshape at repetition-rates above and below the psychophysical region in which the sensation of individual stimuli fuse into a continuity. The fusion phenomena is sometimes measured by a "Critical Fusion Frequency", but for this research we can only identify a frequency-region [which we call the STZ (Sensation-Transition Zone]. Thus, the A-waves above the STZ differed from those below the STZ, as did the sensations. Study of the psychophysical differences in auditory and visual stimuli, as shown in this paper, suggest that different stimulus features are detected, and remembered, at stimulation rates above and below STZ. Conclusion: The results motivate us to speculate that: 1 Stimulus repetition-rates above the STZ generate waveforms which underlie "fusion-memory" whereas rates below the STZ show neuronal processing in which "flash-memory" occurs. 2 These two memories differ in both duration and mechanism, though they may occur in the same cell groups. 3 The differences in neuronal processing may be related to "figure" and "ground" differentiation. We conclude that A-waves provide a novel measure of neural processes that can be detected on the human scalp, and speculate that they may extend clinical applications of evoked response recordings. If A-waves also occur in animals, it is likely that A-waves will provide

Human sensory-evoked responses differ coincident with either "fusion-memory" or "flash-memory", as shown by stimulus repetition-rate effects

Science.gov (United States)

Jewett, Don L; Hart, Toryalai; Larson-Prior, Linda J; Baird, Bill; Olson, Marram; Trumpis, Michael; Makayed, Katherine; Bavafa, Payam

2006-01-01

Background: A new method has been used to obtain human sensory evoked-responses whose time-domain waveforms have been undetectable by previous methods. These newly discovered evoked-responses have durations that exceed the time between the stimuli in a continuous stream, thus causing an overlap which, up to now, has prevented their detection. We have named them "A-waves", and added a prefix to show the sensory system from which the responses were obtained (visA-waves, audA-waves, somA-waves). Results: When A-waves were studied as a function of stimulus repetition-rate, it was found that there were systematic differences in waveshape at repetition-rates above and below the psychophysical region in which the sensation of individual stimuli fuse into a continuity. The fusion phenomena is sometimes measured by a "Critical Fusion Frequency", but for this research we can only identify a frequency-region [which we call the STZ (Sensation-Transition Zone)]. Thus, the A-waves above the STZ differed from those below the STZ, as did the sensations. Study of the psychophysical differences in auditory and visual stimuli, as shown in this paper, suggest that different stimulus features are detected, and remembered, at stimulation rates above and below STZ. Conclusion: The results motivate us to speculate that: 1) Stimulus repetition-rates above the STZ generate waveforms which underlie "fusion-memory" whereas rates below the STZ show neuronal processing in which "flash-memory" occurs. 2) These two memories differ in both duration and mechanism, though they may occur in the same cell groups. 3) The differences in neuronal processing may be related to "figure" and "ground" differentiation. We conclude that A-waves provide a novel measure of neural processes that can be detected on the human scalp, and speculate that they may extend clinical applications of evoked response recordings. If A-waves also occur in animals, it is likely that A-waves will provide new methods for

Modeling of strain effects on the device behaviors of ferroelectric memory field-effect transistors

International Nuclear Information System (INIS)

Yang, Feng; Hu, Guangda; Wu, Weibing; Yang, Changhong; Wu, Haitao; Tang, Minghua

2013-01-01

The influence of strains on the channel current–gate voltage behaviors and memory windows of ferroelectric memory field-effect transistors (FeMFETs) were studied using an improved model based on the Landau–Devonshire theory. ‘Channel potential–gate voltage’ ferroelectric polarization and silicon surface potential diagrams were constructed for strained single-domain BaTiO 3 FeMFETs. The compressive strains can increase (or decrease) the amplitude of transistor currents and enlarge memory windows. However, tensile strains only decrease the maximum value of transistor currents and compress memory windows. Mismatch strains were found to have a significant influence on the electrical behaviors of the devices, therefore, they must be considered in FeMFET device designing. (fast track communication)

Camera memory study for large space telescope. [charge coupled devices

Science.gov (United States)

Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.

1975-01-01

Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

Density-controllable nonvolatile memory devices having metal nanocrystals through chemical synthesis and assembled by spin-coating technique

International Nuclear Information System (INIS)

Wang Guangli; Chen Yubin; Shi Yi; Pu Lin; Pan Lijia; Zhang Rong; Zheng Youdou

2010-01-01

A novel two-step method is employed, for the first time, to fabricate nonvolatile memory devices that have metal nanocrystals. First, size-averaged Au nanocrystals are synthesized chemically; second, they are assembled into memory devices by a spin-coating technique at room temperature. This attractive approach makes it possible to tailor the diameter and control the density of nanocrystals individually. In addition, processes at room temperature prevent Au diffusion, which is a main concern for the application of metal nanocrystal-based memory. The experimental results, both the morphology characterization and the electrical measurements, reveal that there is an optimum density of nanocrystal monolayer to balance between long data retention and a large hysteresis memory window. At the same time, density-controllable devices could also feed the preferential emphasis on either memory window or retention time. All these facts confirm the advantages and novelty of our two-step method. (semiconductor devices)

Fabrication of poly(methyl methacrylate)-MoS{sub 2}/graphene heterostructure for memory device application

Energy Technology Data Exchange (ETDEWEB)

Shinde, Sachin M.; Tanemura, Masaki [Department of Frontier Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466-8555 (Japan); Kalita, Golap, E-mail: kalita.golap@nitech.ac.jp [Department of Frontier Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466-8555 (Japan); Center for Fostering Young and Innovative Researchers, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466-8555 (Japan)

2014-12-07

Combination of two dimensional graphene and semi-conducting molybdenum disulfide (MoS{sub 2}) is of great interest for various electronic device applications. Here, we demonstrate fabrication of a hybridized structure with the chemical vapor deposited graphene and MoS{sub 2} crystals to configure a memory device. Elongated hexagonal and rhombus shaped MoS{sub 2} crystals are synthesized by sulfurization of thermally evaporated molybdenum oxide (MoO{sub 3}) thin film. Scanning transmission electron microscope studies reveal atomic level structure of the synthesized high quality MoS{sub 2} crystals. In the prospect of a memory device fabrication, poly(methyl methacrylate) (PMMA) is used as an insulating dielectric material as well as a supporting layer to transfer the MoS{sub 2} crystals. In the fabricated device, PMMA-MoS{sub 2} and graphene layers act as the functional and electrode materials, respectively. Distinctive bistable electrical switching and nonvolatile rewritable memory effect is observed in the fabricated PMMA-MoS{sub 2}/graphene heterostructure. The developed material system and demonstrated memory device fabrication can be significant for next generation data storage applications.

A portable ECG monitoring device with Bluetooth and Holter capabilities for telemedicine applications.

Science.gov (United States)

Lucani, Daniel; Cataldo, Giancarlos; Cruz, Julio; Villegas, Guillermo; Wong, Sara

2006-01-01

A prototype of a portable ECG-monitoring device has been developed for clinical and non-clinical environments as part of a telemedicine system to provide remote and continuous surveillance of patients. The device can acquire, store and/or transmit ECG signals to computer-based platforms or specially configured access points (AP) with Intranet/Internet capabilities in order to reach remote monitoring stations. Acquired data can be stored in a flash memory card in FAT16 format for later recovery, or transmitted via Bluetooth or USB to a local station or AP. This data acquisition module (DAM) operates in two modes: Holter and on-line transmission.

Improved charge trapping flash device with Al2O3/HfSiO stack as blocking layer

International Nuclear Information System (INIS)

Zheng Zhi-Wei; Huo Zong-Liang; Zhu Chen-Xin; Xu Zhong-Guang; Liu Jing; Liu Ming

2011-01-01

In this paper, we investigate an Al 2 O 3 /HfSiO stack as the blocking layer of a metal—oxide—nitride—oxide—silicon-type (MONOS) memory capacitor. Compared with a memory capacitor with a single HfSiO layer as the blocking layer or an Al 2 O 3 /HfO 2 stack as the blocking layer, the sample with the Al 2 O 3 /HfSiO stack as the blocking layer shows high program/erase (P/E) speed and good data retention characteristics. These improved performances can be explained by energy band engineering. The experimental results demonstrate that the memory device with an Al 2 O 3 /HfSiO stack as the blocking layer has great potential for further high-performance nonvolatile memory applications. (interdisciplinary physics and related areas of science and technology)

Flash autoclave settings may influence eradication but not presence of well-established biofilms on orthopaedic implant material.

Science.gov (United States)

Williams, Dustin L; Taylor, Nicholas B; Epperson, Richard T; Rothberg, David L

2017-10-04

Flash autoclaving is one of the most frequently utilized methods of sterilizing devices, implants or other materials. For a number of decades, it has been common practice for surgeons to remove implantable devices, flash autoclave and then reimplant them in a patient. Data have not yet indicated the potential for biofilms to survive or remain on the surface of orthopaedic-relevant materials following flash autoclave. In this study, monomicrobial and polymicrobial biofilms were grown on the surface of clinically relevant titanium materials and exposed to flash autoclave settings that included varying times and temperatures. Data indicated that when the sterilization and control temperatures of an autoclave were the same, biofilms were able to survive flash autoclaving that was performed for a short duration. Higher temperature and increased duration rendered biofilms non-viable, but none of the autoclave settings had the ability to remove or disperse the presence of biofilms from the titanium surfaces. These findings may be beneficial for facilities, clinics, or hospitals to consider if biofilms are suspected to be present on materials or devices, in particular implants that have had associated infection and are considered for re-implantation. © 2017 Orthopaedic Research Society. Published by Wiley Periodicals, Inc. J Orthop Res. © 2017 Orthopaedic Research Society. Published by Wiley Periodicals, Inc.

Ferroelectric Thin Films Basic Properties and Device Physics for Memory Applications

CERN Document Server

Okuyama, Masanori

2005-01-01

Ferroelectric thin films continue to attract much attention due to their developing, diverse applications in memory devices, FeRAM, infrared sensors, piezoelectric sensors and actuators. This book, aimed at students, researchers and developers, gives detailed information about the basic properties of these materials and the associated device physics. All authors are acknowledged experts in the field.

Memory characteristics of silicon nitride with silicon nanocrystals as a charge trapping layer of nonvolatile memory devices

International Nuclear Information System (INIS)

Choi, Sangmoo; Yang, Hyundeok; Chang, Man; Baek, Sungkweon; Hwang, Hyunsang; Jeon, Sanghun; Kim, Juhyung; Kim, Chungwoo

2005-01-01

Silicon nitride with silicon nanocrystals formed by low-energy silicon plasma immersion ion implantation has been investigated as a charge trapping layer of a polycrystalline silicon-oxide-nitride-oxide-silicon-type nonvolatile memory device. Compared with the control sample without silicon nanocrystals, silicon nitride with silicon nanocrystals provides excellent memory characteristics, such as larger width of capacitance-voltage hysteresis, higher program/erase speed, and lower charge loss rate at elevated temperature. These improved memory characteristics are derived by incorporation of silicon nanocrystals into the charge trapping layer as additional accessible charge traps with a deeper effective trap energy level

Resistive Switching of Ta2O5-Based Self-Rectifying Vertical-Type Resistive Switching Memory

Science.gov (United States)

Ryu, Sungyeon; Kim, Seong Keun; Choi, Byung Joon

2018-01-01

To efficiently increase the capacity of resistive switching random-access memory (RRAM) while maintaining the same area, a vertical structure similar to a vertical NAND flash structure is needed. In addition, the sneak-path current through the half-selected neighboring memory cell should be mitigated by integrating a selector device with each RRAM cell. In this study, an integrated vertical-type RRAM cell and selector device was fabricated and characterized. Ta2O5 as the switching layer and TaOxNy as the selector layer were used to preliminarily study the feasibility of such an integrated device. To make the side contact of the bottom electrode with active layers, a thick Al2O3 insulating layer was placed between the Pt bottom electrode and the Ta2O5/TaOxNy stacks. Resistive switching phenomena were observed under relatively low currents (below 10 μA) in this vertical-type RRAM device. The TaOxNy layer acted as a nonlinear resistor with moderate nonlinearity. Its low-resistance-state and high-resistance-state were well retained up to 1000 s.

Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device

International Nuclear Information System (INIS)

Seo, Kyungah; Park, Sangsu; Lee, Kwanghee; Lee, Byounghun; Hwang, Hyunsang; Kim, Insung; Jung, Seungjae; Jo, Minseok; Park, Jubong; Shin, Jungho; Biju, Kuyyadi P; Kong, Jaemin

2011-01-01

We demonstrated analog memory, synaptic plasticity, and a spike-timing-dependent plasticity (STDP) function with a nanoscale titanium oxide bilayer resistive switching device with a simple fabrication process and good yield uniformity. We confirmed the multilevel conductance and analog memory characteristics as well as the uniformity and separated states for the accuracy of conductance change. Finally, STDP and a biological triple model were analyzed to demonstrate the potential of titanium oxide bilayer resistive switching device as synapses in neuromorphic devices. By developing a simple resistive switching device that can emulate a synaptic function, the unique characteristics of synapses in the brain, e.g. combined memory and computing in one synapse and adaptation to the outside environment, were successfully demonstrated in a solid state device.

Doped SbTe phase change material in memory cells

NARCIS (Netherlands)

in ‘t Zandt, M.A.A.; Jedema, F.J.; Gravesteijn, Dirk J; Gravesteijn, D.J.; Attenborough, K.; Wolters, Robertus A.M.

2009-01-01

Phase Change Random Access Memory (PCRAM) is investigated as replacement for Flash. The memory concept is based on switching a chalcogenide from the crystalline (low ohmic) to the amorphous (high ohmic) state and vice versa. Basically two memory cell concepts exist: the Ovonic Unified Memory (OUM)

FLASH Interface; a GUI for managing runtime parameters in FLASH simulations

Science.gov (United States)

Walker, Christopher; Tzeferacos, Petros; Weide, Klaus; Lamb, Donald; Flocke, Norbert; Feister, Scott

2017-10-01

We present FLASH Interface, a novel graphical user interface (GUI) for managing runtime parameters in simulations performed with the FLASH code. FLASH Interface supports full text search of available parameters; provides descriptions of each parameter's role and function; allows for the filtering of parameters based on categories; performs input validation; and maintains all comments and non-parameter information already present in existing parameter files. The GUI can be used to edit existing parameter files or generate new ones. FLASH Interface is open source and was implemented with the Electron framework, making it available on Mac OSX, Windows, and Linux operating systems. The new interface lowers the entry barrier for new FLASH users and provides an easy-to-use tool for experienced FLASH simulators. U.S. Department of Energy (DOE), NNSA ASC/Alliances Center for Astrophysical Thermonuclear Flashes, U.S. DOE NNSA ASC through the Argonne Institute for Computing in Science, U.S. National Science Foundation.

Flash Platform Examination

Science.gov (United States)

2011-03-01

than would be performed in software”[108]. Uro Tinic, one of the Flash player’s engineers, further clarifies exactly what Flash player 10 hardware...www.adobe.com/products/flashplayer/features/ (Access date: 28 Sep 2009). [109] Uro , T. What Does GPU Acceleration Mean? (online), http...133] Shorten, A. (2009), Design to Development: Flash Catalyst to Flash Builder, In Proceedings of Adobe Max 2009, Los Angeles, CA. 142 DRDC

Measurements of SIMCON 3.1 LLRF control signal processing quality for VUV free-electron laser FLASH

Science.gov (United States)

Pietrasik, Rafal; Giergusiewicz, Wojciech; Jalmuzna, Wojciech; Pozniak, Krzysztof T.; Romaniuk, Ryszard S.; Simrock, Stefan

2006-10-01

The paper describes development of a new version of photonic and electronic control and measurement system for FLASH Laser under development in DESY Hamburg accelerator laboratory. The system is called SIMCON 3.1. and is a developmental continuation of previous systems SIMCON 1.0, SIMCON 2.1 and SIMCON 3.0. It differs from the previous systems by considerably bigger resources: 10 fast analog input channels, bigger FPGA chip with two power PC - CPU units, two multi-gigabit optical links, GbE interface, booting possibility from flash memory card. The PCB is done in VME mechanical and electrical standard. It is designed for usage in tests for FLASH Laser development.

Characterization of gold nanoparticle pentacene memory device with polymer dielectric layer

International Nuclear Information System (INIS)

Kim, Hyung-Jun; Jung, Sung Mok; Kim, Yo-Han; Kim, Bong-Jin; Ha, Sanghyub; Kim, Yong-Sang; Yoon, Tae-Sik; Lee, Hyun Ho

2011-01-01

We report on the electrical behavior of gold nanoparticles (Au NPs) intervened metal-pentacene-insulator-semiconductor structures. The structure adopts polyvinyl alcohol (PVA) and pentacene as gate insulator and semiconductor, respectively. On the PVA (250 nm) film which was spin-coated and UV cross-linked, 3-aminopropyl triethoxysilane was functionalized for self assembling of the Au NPs monolayer. The devices exhibited clockwise hysteresis in their capacitance-voltage characteristics, with a memory window depending on the range of the voltage sweep. A relatively large memory window of about 4.7 V, which was deduced from control devices, was achieved with voltage sweep of (-/+)7 V. Formation of the monolayered Au NPs was confirmed by field effect scanning electron microscopy and atomic force microscopy.

Resistive switching characteristics of HfO2-based memory devices on flexible plastics.

Science.gov (United States)

Han, Yong; Cho, Kyoungah; Park, Sukhyung; Kim, Sangsig

2014-11-01

In this study, we examine the characteristics of HfO2-based resistive switching random access memory (ReRAM) devices on flexible plastics. The Pt/HfO2/Au ReRAM devices exhibit the unipolar resistive switching behaviors caused by the conducting filaments. From the Auger depth profiles of the HfO2 thin film, it is confirmed that the relatively lower oxygen content in the interface of the bottom electrode is responsible for the resistive switching by oxygen vacancies. And the unipolar resistive switching behaviors are analyzed from the C-V characteristics in which negative and positive capacitances are measured in the low-resistance state and the high-resistance state, respectively. The devices have a high on/off ratio of 10(4) and the excellent retention properties even after a continuous bending test of two thousand cycles. The correlation between the device size and the memory characteristics is investigated as well. A relatively smaller-sized device having a higher on/off ratio operates at a higher voltage than a relatively larger-sized device.

Realization of transient memory-loss with NiO-based resistive switching device

Science.gov (United States)

Hu, S. G.; Liu, Y.; Chen, T. P.; Liu, Z.; Yu, Q.; Deng, L. J.; Yin, Y.; Hosaka, Sumio

2012-11-01

A resistive switching device based on a nickel-rich nickel oxide thin film, which exhibits inherent learning and memory-loss abilities, is reported in this work. The conductance of the device gradually increases and finally saturates with the number of voltage pulses (or voltage sweepings), which is analogous to the behavior of the short-term and long-term memory in the human brain. Furthermore, the number of the voltage pulses (or sweeping cycles) required to achieve a given conductance state increases with the interval between two consecutive voltage pulses (or sweeping cycles), which is attributed to the heat diffusion in the material of the conductive filaments formed in the nickel oxide thin film. The phenomenon resembles the behavior of the human brain, i.e., forgetting starts immediately after an impression, a larger interval of the impressions leads to more memory loss, thus the memorization needs more impressions to enhance.

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

Science.gov (United States)

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-07-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices.

The haptic and the visual flash-lag effect and the role of flash characteristics.

Directory of Open Access Journals (Sweden)

Knut Drewing

Full Text Available When a short flash occurs in spatial alignment with a moving object, the moving object is seen ahead the stationary one. Similar to this visual "flash-lag effect" (FLE it has been recently observed for the haptic sense that participants judge a moving hand to be ahead a stationary hand when judged at the moment of a short vibration ("haptic flash" that is applied when the two hands are spatially aligned. We further investigated the haptic FLE. First, we compared participants' performance in two isosensory visual or haptic conditions, in which moving object and flash were presented only in a single modality (visual: sphere and short color change, haptic: hand and vibration, and two bisensory conditions, in which the moving object was presented in both modalities (hand aligned with visible sphere, but the flash was presented only visually or only haptically. The experiment aimed to disentangle contributions of the flash's and the objects' modalities to the FLEs in haptics versus vision. We observed a FLE when the flash was visually displayed, both when the moving object was visual and visuo-haptic. Because the position of a visual flash, but not of an analogue haptic flash, is misjudged relative to a same visuo-haptic moving object, the difference between visual and haptic conditions can be fully attributed to characteristics of the flash. The second experiment confirmed that a haptic FLE can be observed depending on flash characteristics: the FLE increases with decreasing intensity of the flash (slightly modulated by flash duration, which had been previously observed for vision. These findings underline the high relevance of flash characteristics in different senses, and thus fit well with the temporal-sampling framework, where the flash triggers a high-level, supra-modal process of position judgement, the time point of which further depends on the processing time of the flash.

Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis

Science.gov (United States)

Younis, Adnan; Chu, Dewei; Li, Sean

2015-09-01

Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective.

Combined mask and illumination scheme optimization for robust contact patterning on 45nm technology node flash memory devices

Science.gov (United States)

Vaglio Pret, Alessandro; Capetti, Gianfranco; Bollin, Maddalena; Cotti, Gina; De Simone, Danilo; Cantù, Pietro; Vaccaro, Alessandro; Soma, Laura

2008-03-01

Immersion Lithography is the most important technique for extending optical lithography's capabilities and meeting the requirements of Semiconductor Roadmap. The introduction of immersion tools has recently allowed the development of 45nm technology node in single exposure. Nevertheless the usage of hyper-high NA scanners (NA > 1), some levels still remain very critical to be imaged with sufficient process performances. For memory devices, contact mask is for sure the most challenging layer. Aim of this paper is to present the lithographic assessment of 193nm contact holes process, with k I value of ~0.30 using NA 1.20 immersion lithography (minimum pitch is 100nm). Different issues will be reported, related to mask choices (Binary or Attenuated Phase Shift) and illuminator configurations. First phase of the work will be dedicated to a preliminary experimental screening on a simple test case in order to reduce the variables in the following optimization sections. Based on this analysis we will discard X-Y symmetrical illuminators (Annular, C-Quad) due to poor contrast. Second phase will be dedicated to a full simulation assessment. Different illuminators will be compared, with both mask type and several mask biases. From this study, we will identify some general trends of lithography performances that can be used for the fine tuning of the RET settings. The last phase of the work will be dedicated to find the sensitivity trends for one of the analyzed illuminators. In particular we study the effect of Numerical Aperture, mask bias in both X and Y direction and poles sigma ring-width and centre.

Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures

Science.gov (United States)

Abhijith, T.; Kumar, T. V. Arun; Reddy, V. S.

2017-03-01

Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO3) between two tris-(8-hydroxyquinoline)aluminum (Alq3) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 103 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO3 layer thickness and its location in the Alq3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.

High-performance flexible resistive memory devices based on Al2O3:GeOx composite

Science.gov (United States)

Behera, Bhagaban; Maity, Sarmistha; Katiyar, Ajit K.; Das, Samaresh

2018-05-01

In this study a resistive switching random access memory device using Al2O3:GeOx composite thin films on flexible substrate is presented. A bipolar switching characteristic was observed for the co-sputter deposited Al2O3:GeOx composite thin films. Al/Al2O3:GeOx/ITO/PET memory device shows excellent ON/OFF ratio (∼104) and endurance (>500 cycles). GeOx nanocrystals embedded in the Al2O3 matrix have been found to play a significant role in enhancing the switching characteristics by facilitating oxygen vacancy formation. Mechanical endurance was retained even after several bending. The conduction mechanism of the device was qualitatively discussed by considering Ohmic and SCLC conduction. This flexible device is a potential candidate for next-generation electronics device.

Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices

Science.gov (United States)

Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

2016-01-01

Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr07377d

Device and methods for writing and erasing analog information in small memory units via voltage pulses

Science.gov (United States)

El Gabaly Marquez, Farid; Talin, Albert Alec

2018-04-17

Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.

Feasibility study of molecular memory device based on DNA using methylation to store information

Energy Technology Data Exchange (ETDEWEB)

Jiang, Liming; Al-Dirini, Feras [Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville 3010 (Australia); Center for Neural Engineering (CfNE), The University of Melbourne, Carlton 3053 (Australia); National ICT Australia, The University of Melbourne, Parkville 3010 (Australia); Qiu, Wanzhi; Skafidas, Efstratios, E-mail: sskaf@unimelb.edu.au [Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville 3010 (Australia); Center for Neural Engineering (CfNE), The University of Melbourne, Carlton 3053 (Australia); Hossain, Faruque M. [Center for Neural Engineering (CfNE), The University of Melbourne, Carlton 3053 (Australia); Evans, Robin [Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville 3010 (Australia)

2016-07-14

DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

Feasibility study of molecular memory device based on DNA using methylation to store information

International Nuclear Information System (INIS)

Jiang, Liming; Al-Dirini, Feras; Qiu, Wanzhi; Skafidas, Efstratios; Hossain, Faruque M.; Evans, Robin

2016-01-01

DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

Flash Flood Detection in Urban Cities Using Ultrasonic and Infrared Sensors

KAUST Repository

Mousa, Mustafa; Zhang, Xiangliang; Claudel, Christian

2016-01-01

Floods are the most common type of natural disaster. Often leading to loss of lives and properties in the thousands yearly. Among these events, urban flash floods are particularly deadly because of the short timescales on which they occur, and because of the population density of cities. Since most flood casualties are caused by a lack of information on the impending flood (type, location, severity), sensing these events is critical to generate accurate and detailed warnings and short term forecasts. However, no dedicated flash flood sensing systems, that could monitor the propagation of flash floods, in real time, currently exist in cities. In the present paper, firstly a new sensing device that can simultaneously monitor urban flash floods and traffic congestion has been presented. This sensing device is based on the combination of ultrasonic range-finding with remote temperature sensing, and can sense both phenomena with a high degree of accuracy, using a combination of L1-regularized reconstruction and artificial neural networks to process measurement data. Secondly, corresponding algorithms have been implemented on a low-power wireless sensor platform, and their performance in water level estimation in a 6 months test involving four different sensors is illustrated. The results demonstrate that urban water levels can be reliably estimated with error less than 2 cm, and that the preprocessing and machine learning schemes can run in real-time on currently available wireless sensor platforms.

Flash Flood Detection in Urban Cities Using Ultrasonic and Infrared Sensors

KAUST Repository

Mousa, Mustafa

2016-07-19

Floods are the most common type of natural disaster. Often leading to loss of lives and properties in the thousands yearly. Among these events, urban flash floods are particularly deadly because of the short timescales on which they occur, and because of the population density of cities. Since most flood casualties are caused by a lack of information on the impending flood (type, location, severity), sensing these events is critical to generate accurate and detailed warnings and short term forecasts. However, no dedicated flash flood sensing systems, that could monitor the propagation of flash floods, in real time, currently exist in cities. In the present paper, firstly a new sensing device that can simultaneously monitor urban flash floods and traffic congestion has been presented. This sensing device is based on the combination of ultrasonic range-finding with remote temperature sensing, and can sense both phenomena with a high degree of accuracy, using a combination of L1-regularized reconstruction and artificial neural networks to process measurement data. Secondly, corresponding algorithms have been implemented on a low-power wireless sensor platform, and their performance in water level estimation in a 6 months test involving four different sensors is illustrated. The results demonstrate that urban water levels can be reliably estimated with error less than 2 cm, and that the preprocessing and machine learning schemes can run in real-time on currently available wireless sensor platforms.

Semiconductor-Free Nonvolatile Resistive Switching Memory Devices Based on Metal Nanogaps Fabricated on Flexible Substrates via Adhesion Lithography

KAUST Repository

Semple, James; Wyatt-Moon, Gwenhivir; Georgiadou, Dimitra G.; McLachlan, Martyn A.; Anthopoulos, Thomas D.

2017-01-01

Electronic memory cells are of critical importance in modern-day computing devices, including emerging technology sectors such as large-area printed electronics. One technology that has being receiving significant interest in recent years is resistive switching primarily due to its low dimensionality and nonvolatility. Here, we describe the development of resistive switching memory device arrays based on empty aluminum nanogap electrodes. By employing adhesion lithography, a low-temperature and large-area compatible nanogap fabrication technique, dense arrays of memory devices are demonstrated on both rigid and flexible plastic substrates. As-prepared devices exhibit nonvolatile memory operation with stable endurance, resistance ratios >10⁴ and retention times of several months. An intermittent analysis of the electrode microstructure reveals that controlled resistive switching is due to migration of metal from the electrodes into the nanogap under the application of an external electric field. This alternative form of resistive random access memory is promising for use in emerging sectors such as large-area electronics as well as in electronics for harsh environments, e.g., space, high/low temperature, magnetic influences, radiation, vibration, and pressure.

Semiconductor-Free Nonvolatile Resistive Switching Memory Devices Based on Metal Nanogaps Fabricated on Flexible Substrates via Adhesion Lithography

KAUST Repository

Semple, James

2017-01-02

Electronic memory cells are of critical importance in modern-day computing devices, including emerging technology sectors such as large-area printed electronics. One technology that has being receiving significant interest in recent years is resistive switching primarily due to its low dimensionality and nonvolatility. Here, we describe the development of resistive switching memory device arrays based on empty aluminum nanogap electrodes. By employing adhesion lithography, a low-temperature and large-area compatible nanogap fabrication technique, dense arrays of memory devices are demonstrated on both rigid and flexible plastic substrates. As-prepared devices exhibit nonvolatile memory operation with stable endurance, resistance ratios >10⁴ and retention times of several months. An intermittent analysis of the electrode microstructure reveals that controlled resistive switching is due to migration of metal from the electrodes into the nanogap under the application of an external electric field. This alternative form of resistive random access memory is promising for use in emerging sectors such as large-area electronics as well as in electronics for harsh environments, e.g., space, high/low temperature, magnetic influences, radiation, vibration, and pressure.

A study of selenium nanoparticles as charge storage element for flexible semi-transparent memory devices

Science.gov (United States)

Alotaibi, Sattam; Nama Manjunatha, Krishna; Paul, Shashi

2017-12-01

Flexible Semi-Transparent electronic memory would be useful in coming years for integrated flexible transparent electronic devices. However, attaining such flexibility and semi-transparency leads to the boundaries in material composition. Thus, impeding processing speed and device performance. In this work, we present the use of inorganic stable selenium nanoparticles (Se-NPs) as a storage element and hydrogenated amorphous carbon (a-C:H) as an insulating layer in two terminal non-volatile physically flexible and semi-transparent capacitive memory devices (2T-NMDs). Furthermore, a-C:H films can be deposited at very low temperature (industrial technique called Plasma Enhanced Chemical Vapour Deposition (PECVD) which is available in many existing fabrication labs. Self-assembled Se-NPs has several unique features including deposition at room temperature by simple vacuum thermal evaporation process without the need for further optimisation. This facilitates the fabrication of memory on a flexible substrate. Moreover, the memory behaviour of the Se-NPs was found to be more distinct than those of the semiconductor and metal nanostructures due to higher work function compared to the commonly used semiconductor and metal species. The memory behaviour was observed from the hysteresis of current-voltage (I-V) measurements while the two distinguishable electrical conductivity states (;0; and "1") were studied by current-time (I-t) measurements.

A PD-SOI based DTI-LOCOS combined cross isolation technique for minimizing TID radiation induced leakage in high density memory

International Nuclear Information System (INIS)

Qiao Fengying; Pan Liyang; Wu Dong; Liu Lifang; Xu Jun

2014-01-01

In order to minimize leakage current increase under total ionizing dose (TID) radiation in high density memory circuits, a new isolation technique, combining deep trench isolation (DTI) between the wells, local oxidation of silicon (LOCOS) isolation between the devices within the well, and a P-diffused area in order to limit leakage at the isolation edge is implemented in partly-depleted silicon-on-insulator (PD-SOI) technology. This radiation hardening technique can minimize the layout area by more than 60%, and allows flexible placement of the body contact. Radiation hardened transistors and 256 Kb flash memory chips are designed and fabricated in a 0.6 μm PD-SOI process. Experiments show that no obvious increase in leakage current is observed for single transistors under 1 Mrad(Si) radiation, and that the 256 Kb memory chip still functions well after a TID of 100 krad(Si), with only 50% increase of the active power consumption in read mode. (semiconductor devices)

Production of bio-oil with flash pyrolysis; Biooeljyn tuotanto flash-pyrolyysillae ja sen poltto

Energy Technology Data Exchange (ETDEWEB)

Nyroenen, T [Vapo Oy, Jyvaeskylae (Finland)

1997-12-01

The target of the R and D work is to study the production of bio-oils using Flash-pyrolysis technology and utilisation of the bio-oil in oil-fuelled boilers. The PDU-unit was installed at VTT Energy in Otaniemi in April 1996. The first test were carried out in June. In the whole project Vapo Oy is responsible for: acquiring the 20 kg/h PDU-device for development; follow up of the engine tests; the investment of 5 MW demonstration plant; to carry on the boiler and engine tests with Finnish bio-oils. (orig.)

Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

Science.gov (United States)

Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

2014-01-01

Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

Analysis of Conduction and Charging Mechanisms in Atomic Layer Deposited Multilayered HfO2/Al2O3 Stacks for Use in Charge Trapping Flash Memories

Directory of Open Access Journals (Sweden)

Nenad Novkovski

2018-01-01

Full Text Available Method for characterization of electrical and trapping properties of multilayered high permittivity stacks for use in charge trapping flash memories is proposed. Application of the method to the case of multilayered HfO2/Al2O3 stacks is presented. By applying our previously developed comprehensive model for MOS structures containing high-κ dielectrics on the J-V characteristics measured in the voltage range without marked degradation and charge trapping (from −3 V to +3 V, several parameters of the structure connected to the interfacial layer and the conduction mechanisms have been extracted. We found that the above analysis gives precise information on the main characteristics and the quality of the injection layer. C-V characteristics of stressed (with write and erase pulses structures recorded in a limited range of voltages between −1 V and +1 V (where neither significant charge trapping nor visible degradation of the structures is expected to occur were used in order to provide measures of the effect of stresses with no influence of the measurement process. Both trapped charge and the distribution of interface states have been determined using modified Terman method for fresh structures and for structures stressed with write and erase cycles. The proposed method allows determination of charge trapping and interface state with high resolution, promising a precise characterization of multilayered high permittivity stacks for use in charge trapping flash memories.

Development of a helmet-mounted PLZT thermal/flash protection system

International Nuclear Information System (INIS)

Harris, J.O. Jr.; Cutchen, J.T.; Pfoff, B.J.

1976-01-01

Sandia Laboratories is developing PLZT thermal/flash protective devices (TFPD's) goggles to prevent exposure and resultant eye damage from nuclear weapon detonations. The primary emphasis of the present program is to transfer technology and establish production capability for helmet-mounted PLZT/TFPD goggles for USAF flight crews, with a non-helmet-mounted configuration to follow. The first production units are anticipated in the fall of 1977. The operating principles of the PLZT/TFPD goggle device are briefly outlined, and the device configuration and operational characteristics are described

Pro Android Flash

CERN Document Server

Chin, Stephen; Campesato, Oswald

2011-01-01

Did you know you can take your Flash skills beyond the browser, allowing you to make apps for Android, iOS and the BlackBerry Tablet OS? Build dynamic apps today starting with the easy-to-use Android smartphones and tablets. Then, take your app to other platforms without writing native code. Pro Android Flash is the definitive guide to building Flash and other rich Internet applications (RIAs) on the Android platform. It covers the most popular RIA frameworks for Android developers - Flash and Flex - and shows how to build rich, immersive user experiences on both Android smartphones and tablet

Growth of Si nanocrystals on alumina and integration in memory devices

Science.gov (United States)

Baron, T.; Fernandes, A.; Damlencourt, J. F.; De Salvo, B.; Martin, F.; Mazen, F.; Haukka, S.

2003-06-01

We present a detailed study of the growth of Si quantum dots (Si QDs) by low pressure chemical vapor deposition on alumina dielectric deposited by atomic layer deposition. The Si QDs density is very high, 1012 cm-2, for a mean diameter between 5 and 10 nm. Al2O3/Si QD stacks have been integrated in memory devices as granular floating gate. The devices demonstrate good charge storage and data retention characteristics.

Flash!

Science.gov (United States)

Schilling, Govert

2002-04-01

About three times a day our sky flashes with a powerful pulse of gamma ray bursts (GRB), invisible to human eyes but not to astronomers' instruments. The sources of this intense radiation are likely to be emitting, within the span of seconds or minutes, more energy than the sun will in its entire 10 billion years of life. Where these bursts originate, and how they come to have such incredible energies, is a mystery scientists have been trying to solve for three decades. The phenomenon has resisted study -- the flashes come from random directions in space and vanish without trace -- until very recently. In what could be called a cinematic conflation of Flash Gordon and The Hunt for Red October, Govert Schilling's Flash!: The Hunt for the Biggest Explosions in the Universe describes the exciting and ever-changing field of GRB research. Based on interviews with leading scientists, Flash! provides an insider's account of the scientific challenges involved in unravelling the enigmatic nature of GRBs. A science writer who has followed the drama from the very start, Schilling describes the ambition and jealousy, collegiality and competition, triumph and tragedy, that exists among those who have embarked on this recherche. Govert Schilling is a Dutch science writer and astronomy publicist. He is a contributing editor of Sky and Telescope magazine, and regularly writes for the news sections of Science and New Scientist. Schilling is the astronomy writer for de Volkskrant, one of the largest national daily newspapers in The Netherlands, and frequently talks about the Universe on Dutch radio broadcasts. He is the author of more than twenty popular astronomy books, and hundreds of newspaper and magazine articles on astronomy.

Zinc Cadmium Selenide Cladded Quantum Dot Based Electroluminescent and Nonvolatile Memory Devices

Science.gov (United States)

Al-Amody, Fuad H.

This dissertation presents electroluminescent (EL) and nonvolatile memory devices fabricated using pseudomorphic ZnCdSe-based cladded quantum dots (QDs). These dots were grown using our own in-school built novel reactor. The EL device was fabricated on a substrate of ITO (indium tin oxide) coated glass with the quantum dots sandwiched between anode and cathode contacts with a small barrier layer on top of the QDs. The importance of these cladded dots is to increase the quantum yield of device. This device is unique as they utilize quantum dots that are pseudomorphic (nearly lattice-matched core and the shell of the dot). In the case of floating quantum dot gate nonvolatile memory, cladded ZnCdSe quantum dots are deposited on single crystalline gate insulator (ZnMgS/ZnMgSe), which is grown using metal-organic chemical vapor deposition (MOCVD). The control gate dielectric layer of the nonvolatile memory is Si3N4 or SiO2 and is grown using plasma enhanced chemical vapor deposition (PECVD). The cladded dots are grown using an improved methodology of photo-assisted microwave plasma metal-organic chemical vapor deposition (PMP-MOCVD) enhanced reactor. The cladding composition of the core and shell of the dots was engineered by the help of ultraviolet light which changed the incorporation of zinc (and hence composition of ZnCdSe). This makes ZnxCd1--xSe-ZnyCd1--y Se QDs to have a low composition of zinc in the core than the cladding (x

[Wireless device for monitoring the patients with chronic disease].

Science.gov (United States)

Ciorap, R; Zaharia, D; Corciovă, C; Ungureanu, Monica; Lupu, R; Stan, A

2008-01-01

Remote monitoring of chronic diseases can improve health outcomes and potentially lower health care costs. The high number of the patients, suffering of chronically diseases, who wish to stay at home rather then in a hospital increasing the need of homecare monitoring and have lead to a high demand of wearable medical devices. Also, extended patient monitoring during normal activity has become a very important target. In this paper are presented the design of the wireless monitoring devices based on ultra low power circuits, high storage memory flash, bluetooth communication and the firmware for the management of the monitoring device. The monitoring device is built using an ultra low power microcontroller (MSP430 from Texas Instruments) that offers the advantage of high integration of some circuits. The custom made electronic boards used for biosignal acquisition are also included modules for storage device (SD/MMC card) with FAT32 file system and Bluetooth device for short-range communication used for data transmission between monitoring device and PC or PDA. The work was focused on design and implementation of an ultra low power wearable device able to acquire patient vital parameters, causing minimal discomfort and allowing high mobility. The proposed wireless device could be used as a warning system for monitoring during normal activity.

Flexible nonvolatile memory devices based on Au/PMMA nanocomposites deposited on PEDOT:PSS/Ag nanowire hybrid electrodes

International Nuclear Information System (INIS)

Sung, Sihyun; Kim, Tae Whan

2017-01-01

Highlights: • Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a PMMA layer were fabricated. • The insertion of the PEDOT:PSS layer enhanced the surface uniformity of the AgNW bottom electrode, resulting in improved device performances. • Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices showed clockwise current hysteresis behaviors. • ON/OFF ratio of 1 × 10 3 was maintained for retention times longer than 1 × 10 4 s. • Memory characteristics of the NVM devices before and after bending were similar. - Abstract: Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a poly(methylmethacrylate) (PMMA) layer were fabricated on a silver nanowire (AgNW) or a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS)/AgNW coated on poly(ethylene terephthalate) (PET) substrates. The transmittance and the sheet resistance of the PEDOT:PSS/AgNW hybrid layer were approximately 89% and 50 Ω/sq, respectively, which were comparable to the values for commercial indium-tin-oxide (ITO) electrodes. Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices at 300 K showed clockwise current hysteresis behaviors due to the existence of the AuNPs. The endurance number of ON/OFF switching for the NVM devices was above 30 cycles. An ON/OFF ratio of 1 × 10 3 was maintained for retention times longer than 1 × 10 4 s. The maximum memory margins of the NVM devices before and after bending were approximately 3.4 × 10 3 and 1.4 × 10 3 , respectively. The retention times of the devices before and after bending remained same 1 × 10 4 s. The memory margin and the stability of flexible NVMs fabricated on AgNW electrodes were enhanced due to the embedded PEDOT:PSS buffer layer.

Flexible nonvolatile memory devices based on Au/PMMA nanocomposites deposited on PEDOT:PSS/Ag nanowire hybrid electrodes

Energy Technology Data Exchange (ETDEWEB)

Sung, Sihyun; Kim, Tae Whan, E-mail: twk@hanyang.ac.kr

2017-07-31

Highlights: • Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a PMMA layer were fabricated. • The insertion of the PEDOT:PSS layer enhanced the surface uniformity of the AgNW bottom electrode, resulting in improved device performances. • Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices showed clockwise current hysteresis behaviors. • ON/OFF ratio of 1 × 10{sup 3} was maintained for retention times longer than 1 × 10{sup 4} s. • Memory characteristics of the NVM devices before and after bending were similar. - Abstract: Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a poly(methylmethacrylate) (PMMA) layer were fabricated on a silver nanowire (AgNW) or a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS)/AgNW coated on poly(ethylene terephthalate) (PET) substrates. The transmittance and the sheet resistance of the PEDOT:PSS/AgNW hybrid layer were approximately 89% and 50 Ω/sq, respectively, which were comparable to the values for commercial indium-tin-oxide (ITO) electrodes. Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices at 300 K showed clockwise current hysteresis behaviors due to the existence of the AuNPs. The endurance number of ON/OFF switching for the NVM devices was above 30 cycles. An ON/OFF ratio of 1 × 10{sup 3} was maintained for retention times longer than 1 × 10{sup 4} s. The maximum memory margins of the NVM devices before and after bending were approximately 3.4 × 10{sup 3} and 1.4 × 10{sup 3}, respectively. The retention times of the devices before and after bending remained same 1 × 10{sup 4} s. The memory margin and the stability of flexible NVMs fabricated on AgNW electrodes were enhanced due to the embedded PEDOT:PSS buffer layer.

Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

Science.gov (United States)

Yu, Jie; Chen, Kun-ji; Ma, Zhong-yuan; Zhang, Xin-xin; Jiang, Xiao-fan; Wu, Yang-qing; Huang, Xin-fan; Oda, Shunri

2016-09-01

Based on the charge storage mode, it is important to investigate the scaling dependence of memory performance in silicon nanocrystal (Si-NC) nonvolatile memory (NVM) devices for its scaling down limit. In this work, we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor (CMOS) technology. It is found that the memory windows of eight kinds of test key cells are almost the same of about 1.64 V @ ± 7 V/1 ms, which are independent of the gate area, but mainly determined by the average size (12 nm) and areal density (1.8 × 1011/cm2) of Si-NCs. The program/erase (P/E) speed characteristics are almost independent of gate widths and lengths. However, the erase speed is faster than the program speed of test key cells, which is due to the different charging behaviors between electrons and holes during the operation processes. Furthermore, the data retention characteristic is also independent of the gate area. Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration. Project supported by the State Key Development Program for Basic Research of China (Grant No. 2010CB934402) and the National Natural Science Foundation of China (Grant Nos. 11374153, 61571221, and 61071008).

Memory device sensitivity trends in aircraft's environment

International Nuclear Information System (INIS)

Bouchet, T.; Fourtine, S.; Calvet, M.C.

1999-01-01

The authors present the SEU (single event upset) sensitivity of 31 SRAM (static random access memory) and 8 DRAM (dynamic random access memory) according to their technologies. 2 methods have been used to compute the SEU rate: the NCS (neutron cross section) method and the BGR (burst generation rate) method, the physics data required by both methods have been either found in scientific literature or directly measured. The use of new technologies implies a quicker time response through a dramatic reduction of chip size and of the amount of energy representing 1 bit. The reduction of size makes less particles are likely to interact with the chip but the reduction of the critical charge implies that these interactions are more likely to damage the chip. The SEU sensitivity is then parted between these 2 opposed trends. Results show that for technologies beyond 0,18 μm these 2 trends balance roughly. Nevertheless the feedback experience shows that the number of errors is increasing. This is due to the fact that avionics requires more and more memory to perform numerical functions, the number of bits is increasing so is the risk of errors. As far as SEU is concerned, RAM devices are less and less sensitive comparatively for 1 bit, and DRAM seem to be less sensitive than SRAM. (A.C.)

Compact modeling of CRS devices based on ECM cells for memory, logic and neuromorphic applications

International Nuclear Information System (INIS)

Linn, E; Ferch, S; Waser, R; Menzel, S

2013-01-01

Dynamic physics-based models of resistive switching devices are of great interest for the realization of complex circuits required for memory, logic and neuromorphic applications. Here, we apply such a model of an electrochemical metallization (ECM) cell to complementary resistive switches (CRSs), which are favorable devices to realize ultra-dense passive crossbar arrays. Since a CRS consists of two resistive switching devices, it is straightforward to apply the dynamic ECM model for CRS simulation with MATLAB and SPICE, enabling study of the device behavior in terms of sweep rate and series resistance variations. Furthermore, typical memory access operations as well as basic implication logic operations can be analyzed, revealing requirements for proper spike and level read operations. This basic understanding facilitates applications of massively parallel computing paradigms required for neuromorphic applications. (paper)

Search Engine Optimization for Flash Best Practices for Using Flash on the Web

CERN Document Server

Perkins, Todd

2009-01-01

Search Engine Optimization for Flash dispels the myth that Flash-based websites won't show up in a web search by demonstrating exactly what you can do to make your site fully searchable -- no matter how much Flash it contains. You'll learn best practices for using HTML, CSS and JavaScript, as well as SWFObject, for building sites with Flash that will stand tall in search rankings.

Speeding up the flash calculations in two-phase compositional flow simulations - The application of sparse grids

KAUST Repository

Wu, Yuanqing

2015-03-01

Flash calculations have become a performance bottleneck in the simulation of compositional flow in subsurface reservoirs. We apply a sparse grid surrogate model to substitute the flash calculation and thus try to remove the bottleneck from the reservoir simulation. So instead of doing a flash calculation in each time step of the simulation, we just generate a sparse grid approximation of all possible results of the flash calculation before the reservoir simulation. Then we evaluate the constructed surrogate model to approximate the values of the flash calculation results from this surrogate during the simulations. The execution of the true flash calculation has been shifted from the online phase during the simulation to the offline phase before the simulation. Sparse grids are known to require only few unknowns in order to obtain good approximation qualities. In conjunction with local adaptivity, sparse grids ensure that the accuracy of the surrogate is acceptable while keeping the memory usage small by only storing a minimal amount of values for the surrogate. The accuracy of the sparse grid surrogate during the reservoir simulation is compared to the accuracy of using a surrogate based on regular Cartesian grids and the original flash calculation. The surrogate model improves the speed of the flash calculations and the simulation of the whole reservoir. In an experiment, it is shown that the speed of the online flash calculations is increased by about 2000 times and as a result the speed of the reservoir simulations has been enhanced by 21 times in the best conditions.

Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications

Science.gov (United States)

Jayanti, Srikant

Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Integration of thin metal FGs and high-k dielectrics into a dual floating gate memory structure to result in both volatile and non-volatile modes of operation has been demonstrated, for plausible application in future unified memory architectures. The electrical characterization was performed on simple MIS/MIM and memory capacitors, fabricated through CMOS compatible processes. Various analytical characterization techniques were done to gain more insight into the material behavior of the layers in the device structure. In the first part of this study, interfacial engineering was investigated by exploring La2O3 as SiO2 scavenging layer. Through the silicate formation, the consumption of low-k SiO2 was controlled and resulted in a significant improvement in dielectric leakage. The performance improvement was also gauged through memory capacitors. In the second part of the study, a novel memory structure consisting of continuous metal FG

PLZT thermal/flash protective goggles: device concepts and constraints

International Nuclear Information System (INIS)

Cutchen, J.T.

1979-01-01

In 1975 Sandia Laboratories began the design and development of PLZT Goggles for the US Air Force to provide protection from temporary flashblindness and permanent retinal burns caused by the brilliant flash of nuclear explosions. The user requirements, system and physical constraints, and use/storage environments were all considered in arriving at the final design goals. When the program began, there was no industrial capability to manufacture large-aperture PLZT materials or bonded lens assemblies. The technology has been established from a laboratory baseline in a brief period, and operational testing and evaluation by the Air Force has been completed. The goggles, identified as the EEU-2/P,, are now in production

Huge music archives on mobile devices

DEFF Research Database (Denmark)

Blume, H.; Bischl, B.; Botteck, M.

2011-01-01

The availability of huge nonvolatile storage capacities such as flash memory allows large music archives to be maintained even in mobile devices. With the increase in size, manual organization of these archives and manual search for specific music becomes very inconvenient. Automated dynamic...... organization enables an attractive new class of applications for managing ever-increasing music databases. For these types of applications, extraction of music features as well as subsequent feature processing and music classification have to be performed. However, these are computationally intensive tasks...... and difficult to tackle on mobile platforms. Against this background, we provided an overview of algorithms for music classification as well as their computation times and other hardware-related aspects, such as power consumption on various hardware architectures. For mobile platforms such as smartphones...

Application of complex programmable logic devices in memory radiation effects test system

International Nuclear Information System (INIS)

Li Yonghong; He Chaohui; Yang Hailiang; He Baoping

2005-01-01

The application of the complex programmable logic device (CPLD) in electronics is emphatically discussed. The method of using software MAX + plus II and CPLD are introduced. A new test system for memory radiation effects is established by using CPLD devices-EPM7128C84-15. The old test system's function are realized and, moreover, a number of small scale integrated circuits are reduced and the test system's reliability is improved. (authors)

Effect of hydrogen ion beam treatment on Si nanocrystal/SiO_2 superlattice-based memory devices

International Nuclear Information System (INIS)

Fu, Sheng-Wen; Chen, Hui-Ju; Wu, Hsuan-Ta; Chuang, Bing-Ru; Shih, Chuan-Feng

2016-01-01

Graphical abstract: - Highlights: • Memory window and retention properties are improved employing HIBAS technique. • The O/Si ratio and radiative recombination are changed by HIBAS. • Memory properties are affected not only by Si NCs and O/Si ratio but also the RDCs. • The mechanism of hydrogen ion beam alters the memory properties is investigated. - Abstract: This study presents a novel route for synthesizing silicon-rich oxide (SRO)/SiO_2 superlattice-based memory devices with an improved memory window and retention properties. The SiO_2 and SRO superlattices are deposited by reactive sputtering. Specifically, the hydrogen ion beam is used to irradiate the SRO layer immediately after its deposition in the vacuum chamber. The use of the hydrogen ion beam was determined to increase oxygen content and the density of the Si nanocrystals. The memory window increased from 16 to 25.6 V, and the leakage current decreased significantly by two orders, to under ±20 V, for the hydrogen ion beam-prepared devices. This study investigates the mechanism into how hydrogen ion beam treatment alters SRO films and influences memory properties.

Unusual magnetic behavior in a chiral-based magnetic memory device

Energy Technology Data Exchange (ETDEWEB)

Ben-Dor, Oren; Yochelis, Shira [Department of Applied Physics, Center of Nanoscience and Nanotechnology, Hebrew University, Jerusalem 91904 (Israel); Felner, Israel, E-mail: Israel.felner@mail.huij.ac.il [“Racah” Institute of Physics, Hebrew University, Jerusalem 91904 (Israel); Paltiel, Yossi [Department of Applied Physics, Center of Nanoscience and Nanotechnology, Hebrew University, Jerusalem 91904 (Israel)

2016-01-15

In recent years chiral molecules were found to act as efficient spin filters. Using a multilayer structure with chiral molecules magnetic memory was realized. Observed rare magnetic phenomena in a chiral-based magnetic memory device was reported by O-Ben Dor et. al in Nature Commun, 4, 2256 (2013). This multi-layered device is built from α-helix L-polyalanine (AHPA-L) adsorbed on gold, Al{sub 2}O{sub 3} (7 nm) and Ni (30 nm) layers. It was shown that certain temperature range the FC branch crosses the magnetic peak (at 55 K) observed in the ZFC curve thus ZFC>FC. We show here that in another similar multi-layered material, at low applied field, the ZFC curve lies above the FC one up to 70 K. The two features have the same origin and the crucial necessary components to exhibit them are: AHPA-L and 30 nm Ni layered thick. Similar effects were also reported in sulfur doped amorphous carbon. A comparison between the two systems and the ingredients for these peculiar observations is discussed. - Highlights: • The highlights of the present manuscript is the peculiar magnetic behavior observed in a multilayer structure with chiral molecules, magnetic memory. • It is shown that certain temperature range the FC branch crosses the magnetic peak (at 55 K) observed in the ZFC curve thus ZFC>FC. • Similar effects were also reported in sulfur doped amorphous carbon.

Effect of vacuum annealing on evaporated pentacene thin films for memory device applications

International Nuclear Information System (INIS)

Gayathri, A.G.; Joseph, C.M.

2016-01-01

Graphical abstract: Switching of ITO/pentacene/Al thin films for different annealing temperatures. - Highlights: • Memory device performance in pentacene improved considerably with annealing. • ON/OFF ratio of the pentacene device increases due to annealing. • Threshold voltage reduces from 2.55 V to 1.35 V due to annealing. • Structure of pentacene thin films is also dependent on annealing temperature. - Abstract: Thin films of pentacene were deposited thermally onto glass substrates and annealed at 323 K, 373 K, 423 K, 473 K and 523 K in high vacuum. Effect of annealing on the morphological and structural properties of these films was studied. X-ray diffraction patterns confirmed the crystalline nature of the films. Electrical studies for the use as write once read many (WORM) memory devices were done for the vacuum deposited pentacene thin films on indium tin oxide coated glass. Due to annealing, a sharp increase in the ON/OFF ratio of current and a decrease in threshold voltage were observed at around 373 K. This device showed a stable switching with an ON/OFF current ratio as high as 10 9 and a switching threshold voltage of 1.35 V. The performance of the device degraded above 423 K due to the changes in the crystallinity of the film.

Effect of vacuum annealing on evaporated pentacene thin films for memory device applications

Energy Technology Data Exchange (ETDEWEB)

Gayathri, A.G., E-mail: gaythri305@yahoo.com; Joseph, C.M., E-mail: cmjoseph@rediffmail.com

2016-09-15

Graphical abstract: Switching of ITO/pentacene/Al thin films for different annealing temperatures. - Highlights: • Memory device performance in pentacene improved considerably with annealing. • ON/OFF ratio of the pentacene device increases due to annealing. • Threshold voltage reduces from 2.55 V to 1.35 V due to annealing. • Structure of pentacene thin films is also dependent on annealing temperature. - Abstract: Thin films of pentacene were deposited thermally onto glass substrates and annealed at 323 K, 373 K, 423 K, 473 K and 523 K in high vacuum. Effect of annealing on the morphological and structural properties of these films was studied. X-ray diffraction patterns confirmed the crystalline nature of the films. Electrical studies for the use as write once read many (WORM) memory devices were done for the vacuum deposited pentacene thin films on indium tin oxide coated glass. Due to annealing, a sharp increase in the ON/OFF ratio of current and a decrease in threshold voltage were observed at around 373 K. This device showed a stable switching with an ON/OFF current ratio as high as 10{sup 9} and a switching threshold voltage of 1.35 V. The performance of the device degraded above 423 K due to the changes in the crystallinity of the film.

Fabrication of InGaZnO Nonvolatile Memory Devices at Low Temperature of 150 degrees C for Applications in Flexible Memory Displays and Transparency Coating on Plastic Substrates.

Science.gov (United States)

Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin

2016-05-01

We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays.

Modeling of SONOS Memory Cell Erase Cycle

Science.gov (United States)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat H.

2011-01-01

Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

Nanographene charge trapping memory with a large memory window

International Nuclear Information System (INIS)

Meng, Jianling; Yang, Rong; Zhao, Jing; He, Congli; Wang, Guole; Shi, Dongxia; Zhang, Guangyu

2015-01-01

Nanographene is a promising alternative to metal nanoparticles or semiconductor nanocrystals for charge trapping memory. In general, a high density of nanographene is required in order to achieve high charge trapping capacity. Here, we demonstrate a strategy of fabrication for a high density of nanographene for charge trapping memory with a large memory window. The fabrication includes two steps: (1) direct growth of continuous nanographene film; and (2) isolation of the as-grown film into high-density nanographene by plasma etching. Compared with directly grown isolated nanographene islands, abundant defects and edges are formed in nanographene under argon or oxygen plasma etching, i.e. more isolated nanographene islands are obtained, which provides more charge trapping sites. As-fabricated nanographene charge trapping memory shows outstanding memory properties with a memory window as wide as ∼9 V at a relative low sweep voltage of ±8 V, program/erase speed of ∼1 ms and robust endurance of >1000 cycles. The high-density nanographene charge trapping memory provides an outstanding alternative for downscaling technology beyond the current flash memory. (paper)

Flash grundkursus

DEFF Research Database (Denmark)

Jensen, Henrik

2008-01-01

Flash er et programmeringssprog  og kan som sådant ikke noget i sig selv. Kursets mål er, at give den studerende et grundlæggende kendskab til Flash, så det kan bruges til præsentationer på skærm og til produktion af hjemmesider. På kurset arbejdes der med billede, grafik, lyd, video og interakti...

Chemical insight into origin of forming-free resistive random-access memory devices

KAUST Repository

Wu, X.; Fang, Z.; Li, K.; Bosman, M.; Raghavan, N.; Li, X.; Yu, H. Y.; Singh, N.; Lo, G. Q.; Zhang, Xixiang; Pey, K. L.

2011-01-01

We demonstrate the realization of a forming-step free resistive random access memory (RRAM) device using a HfOx/TiOx/HfOx/TiOxmultilayer structure, as a replacement for the conventional HfOx-based single layer structure. High-resolution transmission

Machine protection for FLASH and the European XFEL

Energy Technology Data Exchange (ETDEWEB)

Froehlich, Lars

2009-05-15

The Free-Electron Laser in Hamburg (FLASH) and the future European X-Ray Free-Electron Laser (XFEL) are sources of brilliant extremeultraviolet and X-ray radiation pulses. Both facilities are based on superconducting linear accelerators (linacs) that can produce and transport electron beams of high average power. With up to 90 kW or up to 600 kW of power, respectively, these beams hold a serious potential to damage accelerator components. This thesis discusses several passive and active machine protection measures needed to ensure safe operation. At FLASH, dark current from the rf gun electron source has activated several accelerator components to unacceptable radiation levels. Its transport through the linac is investigated with detailed tracking simulations using a parallelized and enhanced version of the tracking code Astra; possible remedies are evaluated. Beam losses can lead to the demagnetization of permanent magnet insertion devices. A number of beam loss scenarios typical for FLASH are investigated with shower simulations. A shielding setup is designed and its efficiency is evaluated. For the design parameters of FLASH, it is concluded that the average relative beam loss in the undulators must be controlled to a level of about 10{sup -8}. FLASH is equipped with an active machine protection system (MPS) comprising more than 80 photomultiplier-based beam loss monitors and several subsystems. The maximum response time to beam losses is less than 4 {mu}s. Setup procedures and calibration algorithms for MPS subsystems and components are introduced and operational problems are addressed. Finally, an architecture for a fully programmable machine protection system for the XFEL is presented. Several options for the topology of this system are reviewed, with the result that an availability goal of at least 0.999 for the MPS is achievable with moderate hardware requirements. (orig.)

Machine protection for FLASH and the European XFEL

International Nuclear Information System (INIS)

Froehlich, Lars

2009-05-01

The Free-Electron Laser in Hamburg (FLASH) and the future European X-Ray Free-Electron Laser (XFEL) are sources of brilliant extremeultraviolet and X-ray radiation pulses. Both facilities are based on superconducting linear accelerators (linacs) that can produce and transport electron beams of high average power. With up to 90 kW or up to 600 kW of power, respectively, these beams hold a serious potential to damage accelerator components. This thesis discusses several passive and active machine protection measures needed to ensure safe operation. At FLASH, dark current from the rf gun electron source has activated several accelerator components to unacceptable radiation levels. Its transport through the linac is investigated with detailed tracking simulations using a parallelized and enhanced version of the tracking code Astra; possible remedies are evaluated. Beam losses can lead to the demagnetization of permanent magnet insertion devices. A number of beam loss scenarios typical for FLASH are investigated with shower simulations. A shielding setup is designed and its efficiency is evaluated. For the design parameters of FLASH, it is concluded that the average relative beam loss in the undulators must be controlled to a level of about 10 -8 . FLASH is equipped with an active machine protection system (MPS) comprising more than 80 photomultiplier-based beam loss monitors and several subsystems. The maximum response time to beam losses is less than 4 μs. Setup procedures and calibration algorithms for MPS subsystems and components are introduced and operational problems are addressed. Finally, an architecture for a fully programmable machine protection system for the XFEL is presented. Several options for the topology of this system are reviewed, with the result that an availability goal of at least 0.999 for the MPS is achievable with moderate hardware requirements. (orig.)

Migration of interfacial oxygen ions modulated resistive switching in oxide-based memory devices

Science.gov (United States)

Chen, C.; Gao, S.; Zeng, F.; Tang, G. S.; Li, S. Z.; Song, C.; Fu, H. D.; Pan, F.

2013-07-01

Oxides-based resistive switching memory induced by oxygen ions migration is attractive for future nonvolatile memories. Numerous works had focused their attentions on the sandwiched oxide materials for depressing the characteristic variations, but the comprehensive studies of the dependence of electrodes on the migration behavior of oxygen ions are overshadowed. Here, we investigated the interaction of various metals (Ni, Co, Al, Ti, Zr, and Hf) with oxygen atoms at the metal/Ta2O5 interface under electric stress and explored the effect of top electrode on the characteristic variations of Ta2O5-based memory device. It is demonstrated that chemically inert electrodes (Ni and Co) lead to the scattering switching characteristics and destructive gas bubbles, while the highly chemically active metals (Hf and Zr) formed a thick and dense interfacial intermediate oxide layer at the metal/Ta2O5 interface, which also degraded the resistive switching behavior. The relatively chemically active metals (Al and Ti) can absorb oxygen ions from the Ta2O5 film and avoid forming the problematic interfacial layer, which is benefit to the formation of oxygen vacancies composed conduction filaments in Ta2O5 film thus exhibit the minimum variations of switching characteristics. The clarification of oxygen ions migration behavior at the interface can lead further optimization of resistive switching performance in Ta2O5-based memory device and guide the rule of electrode selection for other oxide-based resistive switching memories.

Defect engineering: reduction effect of hydrogen atom impurities in HfO2-based resistive-switching memory devices

International Nuclear Information System (INIS)

Kim, Seonghyun; Park, Jubong; Jung, Seungjae; Lee, Wootae; Shin, Jungho; Hwang, Hyunsang; Lee, Daeseok; Woo, Jiyong; Choi, Godeuni

2012-01-01

In this study, we propose a new and effective methodology for improving the resistive-switching performance of memory devices by high-pressure hydrogen annealing under ambient conditions. The reduction effect results in the uniform creation of oxygen vacancies that in turn enable forming-free operation and afford uniform switching characteristics. In addition, H + and mobile hydroxyl (OH − ) ions are generated, and these induce fast switching operation due to the higher mobility compared to oxygen ions. Defect engineering, specifically, the introduction of hydrogen atom impurities, improves the device performance for metal–oxide-based resistive-switching random access memory devices. (paper)

450mm wafer patterning with jet and flash imprint lithography

Science.gov (United States)

Thompson, Ecron; Hellebrekers, Paul; Hofemann, Paul; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2013-09-01

The next step in the evolution of wafer size is 450mm. Any transition in sizing is an enormous task that must account for fabrication space, environmental health and safety concerns, wafer standards, metrology capability, individual process module development and device integration. For 450mm, an aggressive goal of 2018 has been set, with pilot line operation as early as 2016. To address these goals, consortiums have been formed to establish the infrastructure necessary to the transition, with a focus on the development of both process and metrology tools. Central to any process module development, which includes deposition, etch and chemical mechanical polishing is the lithography tool. In order to address the need for early learning and advance process module development, Molecular Imprints Inc. has provided the industry with the first advanced lithography platform, the Imprio® 450, capable of patterning a full 450mm wafer. The Imprio 450 was accepted by Intel at the end of 2012 and is now being used to support the 450mm wafer process development demands as part of a multi-year wafer services contract to facilitate the semiconductor industry's transition to lower cost 450mm wafer production. The Imprio 450 uses a Jet and Flash Imprint Lithography (J-FILTM) process that employs drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for markets including NAND Flash memory, patterned media for hard disk drives and displays. This paper reviews the recent performance of the J-FIL technology (including overlay, throughput and defectivity), mask development improvements provided by Dai Nippon Printing, and the application of the technology to a 450mm lithography platform.

A Scalable and Highly Configurable Cache-Aware Hybrid Flash Translation Layer

Directory of Open Access Journals (Sweden)

Jalil Boukhobza

2014-03-01

Full Text Available This paper presents a cache-aware configurable hybrid flash translation layer (FTL, named CACH-FTL. It was designed based on the observation that most state-of­­-the-art flash-specific cache systems above FTLs flush groups of pages belonging to the same data block. CACH-FTL relies on this characteristic to optimize flash write operations placement, as large groups of pages are flushed to a block-mapped region, named BMR, whereas small groups are buffered into a page-mapped region, named PMR. Page group placement is based on a configurable threshold defining the limit under which it is more cost-effective to use page mapping (PMR and wait for grouping more pages before flushing to the BMR. CACH-FTL is scalable in terms of mapping table size and flexible in terms of Input/Output (I/O workload support. CACH-FTL performs very well, as the performance difference with the ideal page-mapped FTL is less than 15% in most cases and has a mean of 4% for the best CACH-FTL configurations, while using at least 78% less memory for table mapping storage on RAM.

Laboratory study on the cooling effect of flash water evaporative cooling technology for ventilation and air-conditioning of buildings

DEFF Research Database (Denmark)

Fang, Lei; Yuan, Shu; Yang, Jianrong

environments and the other simulated an air-conditioned indoor environment. The flash water evaporation cooling device was installed in the chamber that simulated indoor environment. The air from the chamber simulating outdoor environment was introduced into the cooling device and cooled by the flash water......, is effective for ventilation and air-conditioning in warm/hot and dry climate zones. The technology can provide fresh outdoor air with a temperature of 4 to 7 °C lower than room air temperature.......This paper presents a simple cooling technology using flash water evaporation. The technology combines a water atomizer with a plate heat exchanger used for heat recovery of a ventilation system. It is mainly used to cool the ventilation airflow from outdoors and is particularly suitable to be used...

Empirical study of the metal-nitride-oxide-semiconductor device characteristics deduced from a microscopic model of memory traps

International Nuclear Information System (INIS)

Ngai, K.L.; Hsia, Y.

1982-01-01

A graded-nitride gate dielectric metal-nitride-oxide-semiconductor (MNOS) memory transistor exhibiting superior device characteristics is presented and analyzed based on a qualitative microscopic model of the memory traps. The model is further reviewed to interpret some generic properties of the MNOS memory transistors including memory window, erase-write speed, and the retention-endurance characteristic features

Investigations on the effects of electrode materials on the device characteristics of ferroelectric memory thin film transistors fabricated on flexible substrates

Science.gov (United States)

Yang, Ji-Hee; Yun, Da-Jeong; Seo, Gi-Ho; Kim, Seong-Min; Yoon, Myung-Han; Yoon, Sung-Min

2018-03-01

For flexible memory device applications, we propose memory thin-film transistors using an organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator and an amorphous In-Ga-Zn-O (a-IGZO) active channel. The effects of electrode materials and their deposition methods on the characteristics of memory devices exploiting the ferroelectric field effect were investigated for the proposed ferroelectric memory thin-film transistors (Fe-MTFTs) at flat and bending states. It was found that the plasma-induced sputtering deposition and mechanical brittleness of the indium-tin oxide (ITO) markedly degraded the ferroelectric-field-effect-driven memory window and bending characteristics of the Fe-MTFTs. The replacement of ITO electrodes with metal aluminum (Al) electrodes prepared by plasma-free thermal evaporation greatly enhanced the memory device characteristics even under bending conditions owing to their mechanical ductility. Furthermore, poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT:PSS) was introduced to achieve robust bending performance under extreme mechanical stress. The Fe-MTFTs using PEDOT:PSS source/drain electrodes were successfully fabricated and showed the potential for use as flexible memory devices. The suitable choice of electrode materials employed for the Fe-MTFTs is concluded to be one of the most important control parameters for highly functional flexible Fe-MTFTs.

Learning Flash CS4 Professional

CERN Document Server

Shupe, Rich

2009-01-01

Learning Flash CS4 Professional offers beginners and intermediate Flash developers a unique introduction to the latest version of Adobe's powerful multimedia application. This easy-to-read book is loaded with full-color examples and hands-on tasks to help you master Flash CS4's new motion editor, integrated 3D system, and character control using the new inverse kinematics bones animation system. No previous Flash experience is necessary.

Harvesting Entropy for Random Number Generation for Internet of Things Constrained Devices Using On-Board Sensors

Directory of Open Access Journals (Sweden)

Marcin Piotr Pawlowski

2015-10-01

Full Text Available Entropy in computer security is associated with the unpredictability of a source of randomness. The random source with high entropy tends to achieve a uniform distribution of random values. Random number generators are one of the most important building blocks of cryptosystems. In constrained devices of the Internet of Things ecosystem, high entropy random number generators are hard to achieve due to hardware limitations. For the purpose of the random number generation in constrained devices, this work proposes a solution based on the least-significant bits concatenation entropy harvesting method. As a potential source of entropy, on-board integrated sensors (i.e., temperature, humidity and two different light sensors have been analyzed. Additionally, the costs (i.e., time and memory consumption of the presented approach have been measured. The results obtained from the proposed method with statistical fine tuning achieved a Shannon entropy of around 7.9 bits per byte of data for temperature and humidity sensors. The results showed that sensor-based random number generators are a valuable source of entropy with very small RAM and Flash memory requirements for constrained devices of the Internet of Things.

Harvesting Entropy for Random Number Generation for Internet of Things Constrained Devices Using On-Board Sensors

Science.gov (United States)

Pawlowski, Marcin Piotr; Jara, Antonio; Ogorzalek, Maciej

2015-01-01

Entropy in computer security is associated with the unpredictability of a source of randomness. The random source with high entropy tends to achieve a uniform distribution of random values. Random number generators are one of the most important building blocks of cryptosystems. In constrained devices of the Internet of Things ecosystem, high entropy random number generators are hard to achieve due to hardware limitations. For the purpose of the random number generation in constrained devices, this work proposes a solution based on the least-significant bits concatenation entropy harvesting method. As a potential source of entropy, on-board integrated sensors (i.e., temperature, humidity and two different light sensors) have been analyzed. Additionally, the costs (i.e., time and memory consumption) of the presented approach have been measured. The results obtained from the proposed method with statistical fine tuning achieved a Shannon entropy of around 7.9 bits per byte of data for temperature and humidity sensors. The results showed that sensor-based random number generators are a valuable source of entropy with very small RAM and Flash memory requirements for constrained devices of the Internet of Things. PMID:26506357

Harvesting entropy for random number generation for internet of things constrained devices using on-board sensors.

Science.gov (United States)

Pawlowski, Marcin Piotr; Jara, Antonio; Ogorzalek, Maciej

2015-10-22

Entropy in computer security is associated with the unpredictability of a source of randomness. The random source with high entropy tends to achieve a uniform distribution of random values. Random number generators are one of the most important building blocks of cryptosystems. In constrained devices of the Internet of Things ecosystem, high entropy random number generators are hard to achieve due to hardware limitations. For the purpose of the random number generation in constrained devices, this work proposes a solution based on the least-significant bits concatenation entropy harvesting method. As a potential source of entropy, on-board integrated sensors (i.e., temperature, humidity and two different light sensors) have been analyzed. Additionally, the costs (i.e., time and memory consumption) of the presented approach have been measured. The results obtained from the proposed method with statistical fine tuning achieved a Shannon entropy of around 7.9 bits per byte of data for temperature and humidity sensors. The results showed that sensor-based random number generators are a valuable source of entropy with very small RAM and Flash memory requirements for constrained devices of the Internet of Things.

Towards an Artificial Phonological Loop: An Assistive Device for Working Memory and Attentional Control

Directory of Open Access Journals (Sweden)

D. Bogen

2006-01-01

Full Text Available We describe the initial development of an artificial phonological loop (APL, a new technology to assist individuals with impairment of the working memory system. The phonological loop, along with the visuospatial sketchpad, is one of the two slave short-term memory subsystems that comprise working memory, a cognitive function closely associated with the control of attention. In the phonological loop, phonological (speech information lasting for 1–2 second is maintained active by repetitive, subvocal (silent speech rehearsal. Deficits in working memory, specifically in the phonological loop, occur in many disorders, including attention-deficit disorder and Alzheimer’s disease. In these disorders, it appears that the ability for phonological rehearsal is intact, but the regulation or triggering of the rehearsal process is inadequate, thus causing the contents of working memory to be lost. The purpose, then, of the APL is to facilitate the phonological loop by artificially extending the duration of phonological rehearsals. The APL mimics the natural phonological loop by providing audible vocal echoes to take the place of subvocal rehearsals. In this system, the user talks to him/herself in short (1–2 second phrases; the device records these phrases, stores them in electronic memory, and then repeats— i.e., echoes—the phrases multiple times over an extended period. Two versions of this device have been developed: the Echo-APL and the Rearticulation-APL. In the Echo-APL, only echoing is involved. In the Rearticulation-APL, however, the user re-vocalizes (rearticulates the phrase in response to an audible cue. The device repeats the cue until it detects (hears the re-vocalization. Future research and development of the APL will require extensive testing and careful evaluation of possible echo-schedules: the predefined program controlling inter-echo time intervals and echo-amplitude (echo loudness. The APL essentially exteriorizes the silent

Memory Device and Nanofabrication Techniques Using Electrically Configurable Materials

Science.gov (United States)

Ascenso Simões, Bruno

Development of novel nanofabrication techniques and single-walled carbon nanotubes field configurable transistor (SWCNT-FCT) memory devices using electrically configurable materials is presented. A novel lithographic technique, electric lithography (EL), that uses electric field for pattern generation has been demonstrated. It can be used for patterning of biomolecules on a polymer surface and patterning of resist as well. Using electrical resist composed of a polymer having Boc protected amine group and iodonium salt, Boc group on the surface of polymer was modified to free amine by applying an electric field. On the modified surface of the polymer, Streptavidin pattern was fabricated with a sub-micron scale. Also patterning of polymer resin composed of epoxy monomers and diaryl iodonium salt by EL has been demonstrated. Reaction mechanism for electric resist configuration is believed to be induced by an acid generation via electrochemical reduction in the resist. We show a novel field configurable transistor (FCT) based on single-walled carbon nanotube network field-effect transistors in which poly (ethylene glycol) crosslinked by electron-beam is incorporated into the gate. The device conductance can be configured to arbitrary states reversibly and repeatedly by applying external gate voltages. Raman spectroscopy revealed that evolution of the ratio of D- to G-band intensity in the SWCNTs of the FCT progressively increases as the device is configured to lower conductance states. Electron transport studies at low temperatures showed a strong temperature dependence of the resistance. Band gap widening of CNTs up to ˜ 4 eV has been observed by examining the differential conductance-gate voltage-bias voltage relationship. The switching mechanism of the FCT is attributed a structural transformation of CNTs via reversible hydrogenation and dehydrogenations induced by gate voltages, which tunes the CNT bandgap continuously and reversibly to non-volatile analog values

Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

Science.gov (United States)

Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

2016-04-01

The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

Flashing oscillation in pool water

International Nuclear Information System (INIS)

Takamasa, Tomoji; Kondo, Koichi; Hazuku, Tatsuya

1996-01-01

This paper presents an experimental study of high-pressure saturated water discharging into the pool water. The purpose of the experiment is to clarify the phenomena that occur in blow-down of high-pressure saturated water from the pressure vessel into the water-filled containment in the case of a wall-crack accident or a LOCA in an advanced reactor. The results revealed that a flashing oscillation (FO) occurs when high-pressure saturated water discharges into the pool water, under specified experimental settings. The range of the flashing oscillates between a point very close to and some distance from the vent hole. The pressures in the vent tube and pool water vary according to the flashing oscillation. The pressure oscillation and frequency of flashing position might be caused by the balancing action between the supply of saturated water, flashing at the control volume and its condensation on the steam-water interface. A linear analysis was conducted using a spherical flashing bubble model. The period of the flashing oscillation in the experiments can be explained by theoretical analysis

Scaling Techniques for Massive Scale-Free Graphs in Distributed (External) Memory

KAUST Repository

Pearce, Roger; Gokhale, Maya; Amato, Nancy M.

2013-01-01

We present techniques to process large scale-free graphs in distributed memory. Our aim is to scale to trillions of edges, and our research is targeted at leadership class supercomputers and clusters with local non-volatile memory, e.g., NAND Flash

In Situ Transmission Electron Microscopy Observation of Nanostructural Changes in Phase-Change Memory

KAUST Repository

Meister, Stefan; Kim, SangBum; Cha, Judy J.; Wong, H.-S. Philip; Cui, Yi

2011-01-01

Phase-change memory (PCM) has been researched extensively as a promising alternative to flash memory. Important studies have focused on its scalability, switching speed, endurance, and new materials. Still, reliability issues and inconsistent

Shape memory polymer medical device

Science.gov (United States)

Maitland, Duncan [Pleasant Hill, CA; Benett, William J [Livermore, CA; Bearinger, Jane P [Livermore, CA; Wilson, Thomas S [San Leandro, CA; Small, IV, Ward; Schumann, Daniel L [Concord, CA; Jensen, Wayne A [Livermore, CA; Ortega, Jason M [Pacifica, CA; Marion, III, John E.; Loge, Jeffrey M [Stockton, CA

2010-06-29

A system for removing matter from a conduit. The system includes the steps of passing a transport vehicle and a shape memory polymer material through the conduit, transmitting energy to the shape memory polymer material for moving the shape memory polymer material from a first shape to a second and different shape, and withdrawing the transport vehicle and the shape memory polymer material through the conduit carrying the matter.

An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices

Science.gov (United States)

Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

2017-12-01

Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag5In5Sb60Te30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

Hot flashes and sleep in women.

Science.gov (United States)

Moe, Karen E

2004-12-01

Sleep disturbances during menopause are often attributed to nocturnal hot flashes and 'sweats' associated with changing hormone patterns. This paper is a comprehensive critical review of the research on the relationship between sleep disturbance and hot flashes in women. Numerous studies have found a relationship between self-reported hot flashes and sleep complaints. However, hot flash studies using objective sleep assessment techniques such as polysomnography, actigraphy, or quantitative analysis of the sleep EEG are surprisingly scarce and have yielded somewhat mixed results. Much of this limited evidence suggests that hot flashes are associated with objectively identified sleep disruption in at least some women. At least some of the negative data may be due to methodological issues such as reliance upon problematic self-reports of nocturnal hot flashes and a lack of concurrent measures of hot flashes and sleep. The recent development of a reliable and non-intrusive method for objectively identifying hot flashes during the night should help address the need for substantial additional research in this area. Several areas of clinical relevance are described, including the effects of discontinuing combined hormone therapy (estrogen plus progesterone) or estrogen-only therapy, the possibility of hot flashes continuing for many years after menopause, and the link between hot flashes and depression.

MR colonography with fecal tagging: comparison between 2D turbo FLASH and 3D FLASH sequences

International Nuclear Information System (INIS)

Papanikolaou, Nickolas; Grammatikakis, John; Maris, Thomas; Prassopoulos, Panos; Gourtsoyiannis, Nicholas; Lauenstein, Thomas

2003-01-01

The objective of this study was to compare inversion recovery turbo 2D fast low-angle shot (FLASH) and 3D FLASH sequences for fecal-tagged MR colonography studies. Fifteen consecutive patients with indications for colonoscopy underwent MR colonography with fecal tagging. An inversion recovery turbo-FLASH sequence was applied and compared in terms of artifacts presence, efficiency for masking residual stool, and colonic wall conspicuity with a fat-saturated 3D FLASH sequence. Both sequences were acquired following administration of paramagnetic contrast agent. Contrast-to-noise ratio and relative contrast between colonic wall and lumen were calculated and compared for both sequences. Turbo 2D FLASH provided fewer artifacts, higher efficiency for masking the residual stool, and colonic wall conspicuity equivalent to 3D FLASH. An inversion time of 10 ms provided homogeneously low signal intensity of the colonic lumen. Contrast to noise between colonic wall and lumen was significantly higher in the 3D FLASH images, whereas differences in relative contrast were not statistically significant. An optimized inversion-recovery 2D turbo-FLASH sequence provides better fecal tagging results and should be added to the 3D FLASH sequence when designing dark-lumen MR colonography examination protocols. (orig.)

A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

Science.gov (United States)

Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

2006-04-01

A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

Magnetic Shape Memory Alloys as smart materials for micro-positioning devices

Directory of Open Access Journals (Sweden)

A. Hubert

2012-10-01

Full Text Available In the field of microrobotics, actuators based on smart materials are predominant because of very good precision, integration capabilities and high compactness. This paper presents the main characteristics of Magnetic Shape Memory Alloys as new candidates for the design of micromechatronic devices. The thermo-magneto-mechanical energy conversion process is first presented followed by the adequate modeling procedure required to design actuators. Finally, some actuators prototypes realized at the Femto-ST institute are presented, including a push-pull bidirectional actuator. Some results on the control and performances of these devices conclude the paper.

Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

Science.gov (United States)

MacLeod, Todd; Ho, Fat D.

2012-01-01

The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere

DESTINY: A Comprehensive Tool with 3D and Multi-Level Cell Memory Modeling Capability

Directory of Open Access Journals (Sweden)

Sparsh Mittal

2017-09-01

Full Text Available To enable the design of large capacity memory structures, novel memory technologies such as non-volatile memory (NVM and novel fabrication approaches, e.g., 3D stacking and multi-level cell (MLC design have been explored. The existing modeling tools, however, cover only a few memory technologies, technology nodes and fabrication approaches. We present DESTINY, a tool for modeling 2D/3D memories designed using SRAM, resistive RAM (ReRAM, spin transfer torque RAM (STT-RAM, phase change RAM (PCM and embedded DRAM (eDRAM and 2D memories designed using spin orbit torque RAM (SOT-RAM, domain wall memory (DWM and Flash memory. In addition to single-level cell (SLC designs for all of these memories, DESTINY also supports modeling MLC designs for NVMs. We have extensively validated DESTINY against commercial and research prototypes of these memories. DESTINY is very useful for performing design-space exploration across several dimensions, such as optimizing for a target (e.g., latency, area or energy-delay product for a given memory technology, choosing the suitable memory technology or fabrication method (i.e., 2D v/s 3D for a given optimization target, etc. We believe that DESTINY will boost studies of next-generation memory architectures used in systems ranging from mobile devices to extreme-scale supercomputers. The latest source-code of DESTINY is available from the following git repository: https://bitbucket.org/sparshmittal/destinyv2.

Wearable Intrinsically Soft, Stretchable, Flexible Devices for Memories and Computing.

Science.gov (United States)

Rajan, Krishna; Garofalo, Erik; Chiolerio, Alessandro

2018-01-27

A recent trend in the development of high mass consumption electron devices is towards electronic textiles (e-textiles), smart wearable devices, smart clothes, and flexible or printable electronics. Intrinsically soft, stretchable, flexible, Wearable Memories and Computing devices (WMCs) bring us closer to sci-fi scenarios, where future electronic systems are totally integrated in our everyday outfits and help us in achieving a higher comfort level, interacting for us with other digital devices such as smartphones and domotics, or with analog devices, such as our brain/peripheral nervous system. WMC will enable each of us to contribute to open and big data systems as individual nodes, providing real-time information about physical and environmental parameters (including air pollution monitoring, sound and light pollution, chemical or radioactive fallout alert, network availability, and so on). Furthermore, WMC could be directly connected to human brain and enable extremely fast operation and unprecedented interface complexity, directly mapping the continuous states available to biological systems. This review focuses on recent advances in nanotechnology and materials science and pays particular attention to any result and promising technology to enable intrinsically soft, stretchable, flexible WMC.

Dual-functional Memory and Threshold Resistive Switching Based on the Push-Pull Mechanism of Oxygen Ions

KAUST Repository

Huang, Yi-Jen; Chao, Shih-Chun; Lien, Der-Hsien; Wen, Cheng-Yen; He, Jr-Hau; Lee, Si-Chen

2016-01-01

The combination of nonvolatile memory switching and volatile threshold switching functions of transition metal oxides in crossbar memory arrays is of great potential for replacing charge-based flash memory in very-large-scale integration. Here, we

Flash-Type Discrimination

Science.gov (United States)

Koshak, William J.

2010-01-01

This viewgraph presentation describes the significant progress made in the flash-type discrimination algorithm development. The contents include: 1) Highlights of Progress for GLM-R3 Flash-Type discrimination Algorithm Development; 2) Maximum Group Area (MGA) Data; 3) Retrieval Errors from Simulations; and 4) Preliminary Global-scale Retrieval.

The October 2014 United States Treasury bond flash crash and the contributory effect of mini flash crashes.

Directory of Open Access Journals (Sweden)

Zachary S Levine

Full Text Available We investigate the causal uncertainty surrounding the flash crash in the U.S. Treasury bond market on October 15, 2014, and the unresolved concern that no clear link has been identified between the start of the flash crash at 9:33 and the opening of the U.S. equity market at 9:30. We consider the contributory effect of mini flash crashes in equity markets, and find that the number of equity mini flash crashes in the three-minute window between market open and the Treasury Flash Crash was 2.6 times larger than the number experienced in any other three-minute window in the prior ten weekdays. We argue that (a this statistically significant finding suggests that mini flash crashes in equity markets both predicted and contributed to the October 2014 U.S. Treasury Bond Flash Crash, and (b mini-flash crashes are important phenomena with negative externalities that deserve much greater scholarly attention.

The October 2014 United States Treasury bond flash crash and the contributory effect of mini flash crashes.

Science.gov (United States)

Levine, Zachary S; Hale, Scott A; Floridi, Luciano

2017-01-01

We investigate the causal uncertainty surrounding the flash crash in the U.S. Treasury bond market on October 15, 2014, and the unresolved concern that no clear link has been identified between the start of the flash crash at 9:33 and the opening of the U.S. equity market at 9:30. We consider the contributory effect of mini flash crashes in equity markets, and find that the number of equity mini flash crashes in the three-minute window between market open and the Treasury Flash Crash was 2.6 times larger than the number experienced in any other three-minute window in the prior ten weekdays. We argue that (a) this statistically significant finding suggests that mini flash crashes in equity markets both predicted and contributed to the October 2014 U.S. Treasury Bond Flash Crash, and (b) mini-flash crashes are important phenomena with negative externalities that deserve much greater scholarly attention.

Scalability of voltage-controlled filamentary and nanometallic resistance memory devices.

Science.gov (United States)

Lu, Yang; Lee, Jong Ho; Chen, I-Wei

2017-08-31

Much effort has been devoted to device and materials engineering to realize nanoscale resistance random access memory (RRAM) for practical applications, but a rational physical basis to be relied on to design scalable devices spanning many length scales is still lacking. In particular, there is no clear criterion for switching control in those RRAM devices in which resistance changes are limited to localized nanoscale filaments that experience concentrated heat, electric current and field. Here, we demonstrate voltage-controlled resistance switching, always at a constant characteristic critical voltage, for macro and nanodevices in both filamentary RRAM and nanometallic RRAM, and the latter switches uniformly and does not require a forming process. As a result, area-scalability can be achieved under a device-area-proportional current compliance for the low resistance state of the filamentary RRAM, and for both the low and high resistance states of the nanometallic RRAM. This finding will help design area-scalable RRAM at the nanoscale. It also establishes an analogy between RRAM and synapses, in which signal transmission is also voltage-controlled.

Numerical analysis of a polysilicon-based resistive memory device

KAUST Repository

Berco, Dan

2018-03-08

This study investigates a conductive bridge resistive memory device based on a Cu top electrode, 10-nm polysilicon resistive switching layer and a TiN bottom electrode, by numerical analysis for $$10^{3}$$103 programming and erase simulation cycles. The low and high resistive state values in each cycle are calculated, and the analysis shows that the structure has excellent retention reliability properties. The presented Cu species density plot indicates that Cu insertion occurs almost exclusively along grain boundaries resulting in a confined isomorphic conductive filament that maintains its overall shape and electric properties during cycling. The superior reliability of this structure may thus be attributed to the relatively low amount of Cu migrating into the RSL during initial formation. In addition, the results show a good match and help to confirm experimental measurements done over a previously demonstrated device.

DIRCM FLASH Flight Tests

National Research Council Canada - National Science Library

Molocher, Bernhard; Kaltenecker, Anton; Thum-Jaeger, Andrea; Regensburger, Martin; Formery, Martin

2005-01-01

.... FLASH operation is as follows: After handover following an alarm from the missile warning system FLASH enters autonomous passive tracking mode for tracking a missiles and sending a laser beam onto the missile...

Unpredictable visual changes cause temporal memory averaging.

Science.gov (United States)

Ohyama, Junji; Watanabe, Katsumi

2007-09-01

Various factors influence the perceived timing of visual events. Yet, little is known about the ways in which transient visual stimuli affect the estimation of the timing of other visual events. In the present study, we examined how a sudden color change of an object would influence the remembered timing of another transient event. In each trial, subjects saw a green or red disk travel in circular motion. A visual flash (white frame) occurred at random times during the motion sequence. The color of the disk changed either at random times (unpredictable condition), at a fixed time relative to the motion sequence (predictable condition), or it did not change (no-change condition). The subjects' temporal memory of the visual flash in the predictable condition was as veridical as that in the no-change condition. In the unpredictable condition, however, the flash was reported to occur closer to the timing of the color change than actual timing. Thus, an unpredictable visual change distorts the temporal memory of another visual event such that the remembered moment of the event is closer to the timing of the unpredictable visual change.

Rare-Earth Ions in Niobium-Based Devices as a Quantum Memory: Magneto-Optical Effects on Room Temperature Electrical Transport

Science.gov (United States)

2016-09-01

heterostructure can be used to implement cryogenic memory for superconducting digital computing. Our concept involves embedding rare-earth ions in...rare-earth neodymium by ion implantation in thin films of niobium and niobium-based heterostructure devices. We model the ion implantation process...the films and devices so they can properly designed and optimized for utility as quantum memory. We find that the magnetic field has a strong effect

Systematic Development Strategy for Smart Devices Based on Shape-Memory Polymers

Directory of Open Access Journals (Sweden)

Andrés Díaz Lantada

2017-10-01

Full Text Available Shape-memory polymers are outstanding “smart” materials, which can perform important geometrical changes, when activated by several types of external stimuli, and which can be applied to several emerging engineering fields, from aerospace applications, to the development of biomedical devices. The fact that several shape-memory polymers can be structured in an additive way is an especially noteworthy advantage, as the development of advanced actuators with complex geometries for improved performance can be achieved, if adequate design and manufacturing considerations are taken into consideration. Present study presents a review of challenges and good practices, leading to a straightforward methodology (or integration of strategies, for the development of “smart” actuators based on shape-memory polymers. The combination of computer-aided design, computer-aided engineering and additive manufacturing technologies is analyzed and applied to the complete development of interesting shape-memory polymer-based actuators. Aspects such as geometrical design and optimization, development of the activation system, selection of the adequate materials and related manufacturing technologies, training of the shape-memory effect, final integration and testing are considered, as key processes of the methodology. Current trends, including the use of low-cost 3D and 4D printing, and main challenges, including process eco-efficiency and biocompatibility, are also discussed and their impact on the proposed methodology is considered.

PENYEDERHANAAN ANALISA BAHAYA ARC FLASH MENGGUNAKAN KURVA BATASAN ENERGI PADA BANDARA INTERNASIONAL JUANDA

Directory of Open Access Journals (Sweden)

Yoga Firdaus

2017-01-01

Full Text Available Teknik penyederhanaan analisis digunakan untuk penentuan personal protective equipment (PPE dari bahaya busur api (arc-flash dengan berdasarkan IEEE std. 1584-2002 dan overcurrent protective device (OCPD. Tidak seperti persamaan penyederhanaan dalam IEEE 1584, teknik analisis ini berpotensi dapat diterapkan untuk semua jenis perangkat pelindung arus lebih pada setiap sistem kelistrikan yang berada dalam jangkauan persamaan empiris IEEE 1584. Saat sebuah metode tidak tepat menghitung tingkat energi insiden dan batas pelindung api (flash-protection pada bus, maka tidak dapat menentukan tingkat PPE yang dibutuhkan secara akurat dan batas jarak pelindung api (flash-protection yang maksimal untuk memungkinkan pekerja melindungi diri secara memadai terhadap bahaya busur api. Studi aktual mengenai penyederhanaan analisa busur api dilakukan pada Bandara Internasional Juanda. Pada hasil akhir dari analisa busur api dengan menggunakan metode kurva batasan energi didapatkan proses penentuan kategori PPE yang lebih singkat daripada standart IEEE 1584-2002.

Flashing inception in flowing liquids

International Nuclear Information System (INIS)

Jones, O.C. Jr.

1979-01-01

The inception of net vaporization in flashing flows is examined. It is suggested that the flashing inception can be expressed as two additive effects. One is due to the static decompression which is a function of the spinodal limit and also of the expansion rate. The other effect which is a function of Reynolds number and flashing index, is due to the turbulent fluctuations of the flowing liquid. It is shown that by taking a three standard deviation band on the turbulent velocity fluctuations, an adequate representation of the inverse mass flux effect on flashing inception for existing data is obtained

Statistical Evolution of the Lightning Flash

Science.gov (United States)

Zoghzoghy, F. G.; Cohen, M.; Said, R.; Inan, U. S.

2012-12-01

Natural lightning is one of the most fascinating and powerful electrical processes on Earth. To date, the physics behind this natural phenomenon are not fully understood, due primarily to the difficulty of obtaining measurements inside thunderstorms and to the wide range of timescales involved (from nanoseconds to seconds). Our aim is to use accurate lightning geo-location data from the National Lightning Detection Network (NLDN) to study statistical patterns in lightning, taking advantage of the fact that millions of lightning flashes occur around the globe every day. We present two sets of results, one involving the patterns of flashes in a storm, and a second involving the patterns of strokes in a flash. These patterns can provide a surrogate measure of the timescales and the spatial extents of the underlying physical processes. First, we study the timescales of charge buildup inside thunderstorms. We find that, following a lightning flash, the probability of another neighboring flash decreases and takes tens of seconds to recover. We find that this suppression effect is a function of flash type, stroke peak current, cloud-to-ground (CG) stroke multiplicity, and other lightning and geographical parameters. We find that the probabilities of subsequent flashes are more suppressed following oceanic lightning, or following flashes with higher peak currents and/or higher multiplicities (for CG flashes). Second, we use NLDN data to study the evolution of the strokes within a CG flash. A CG flash typically includes multiple return strokes, which can occur in the same channel or in multiple channels within a few kilometers. We cluster NLDN stroke data into flashes and produce the probability density function of subsequent strokes as a function of distance and time-delays relative to the previous stroke. Using this technique, we investigate processes which occur during the CG lightning flash with nanosecond to millisecond timescales. For instance, our results suggest

All-polymer bistable resistive memory device based on nanoscale phase-separated PCBM-ferroelectric blends

KAUST Repository

Khan, Yasser; Bhansali, Unnat Sampatraj; Cha, Dong Kyu; Alshareef, Husam N.

2012-01-01

All polymer nonvolatile bistable memory devices are fabricated from blends of ferroelectric poly(vinylidenefluoride-trifluoroethylene (P(VDF-TrFE)) and n-type semiconducting [6,6]-phenyl-C61-butyric acid methyl ester (PCBM). The nanoscale phase

Selected Advances in Nanoelectronic Devices Logic, Memory and RF

CERN Document Server

Joodaki, Mojtaba

2013-01-01

Nanoelectronics, as a true successor of microelectronics, is certainly a major technology boomer in the 21st century. This has been shown by its several applications and also by its enormous potential to influence all areas of electronics, computers, information technology, aerospace defense, and consumer goods. Although the current semiconductor technology is projected to reach its physical limit in about a decade, nanoscience and nanotechnology promise breakthroughs for the future. The present books provides an in-depth review of the latest advances in the technology of nanoelectronic devices and their developments over the past decades. Moreover, it introduces new concepts for the realization of future nanoelectronic devices. The main focus of the book is on three fundamental branches of semiconductor products or applications: logic, memory, and RF and communication. By pointing out to the key technical challenges, important aspects and characteristics of various designs are used to illustrate mechanisms t...

Sphinx, the high speed flash radiography

International Nuclear Information System (INIS)

Anon.

1997-01-01

Sphinx (Nanosecond Pulse X-Photon Source) is the most compact (0.1 m 3 ) existing system which can generates short pulses (10 to 30 nanoseconds) of 5 to 180 keV X-photon radiation with a repeating cadence of 100 pulses per second and doses which can reach 2 mR at 1 m. This system was developed by the Research Group on Energetics of Ionized Media (GREMI) from the CNRS (French National Center for Scientific Research) and the University of Orleans (France). Sphinx is the smallest device from a series of compact X-ray sources ranging from 5 to 400 keV. These devices can have several possible applications such as the study of ultra-fast phenomena, the high cadence flash radiography in medicine, biology, materials studies, pre-ionizing of gas lasers, self-excitation and photo-ionization of atoms, molecules or aggregates. (J.S.)

Anisotropic sensor and memory device with a ferromagnetic tunnel barrier as the only magnetic element.

Science.gov (United States)

Lόpez-Mir, L; Frontera, C; Aramberri, H; Bouzehouane, K; Cisneros-Fernández, J; Bozzo, B; Balcells, L; Martínez, B

2018-01-16

Multiple spin functionalities are probed on Pt/La 2 Co 0.8 Mn 1.2 O 6 /Nb:SrTiO 3 , a device composed by a ferromagnetic insulating barrier sandwiched between non-magnetic electrodes. Uniquely, La 2 Co 0.8 Mn 1.2 O 6 thin films present strong perpendicular magnetic anisotropy of magnetocrystalline origin, property of major interest for spintronics. The junction has an estimated spin-filtering efficiency of 99.7% and tunneling anisotropic magnetoresistance (TAMR) values up to 30% at low temperatures. This remarkable angular dependence of the magnetoresistance is associated with the magnetic anisotropy whose origin lies in the large spin-orbit interaction of Co 2+ which is additionally tuned by the strain of the crystal lattice. Furthermore, we found that the junction can operate as an electrically readable magnetic memory device. The findings of this work demonstrate that a single ferromagnetic insulating barrier with strong magnetocrystalline anisotropy is sufficient for realizing sensor and memory functionalities in a tunneling device based on TAMR.

Multistate storage nonvolatile memory device based on ferroelectricity and resistive switching effects of SrBi2Ta2O9 films

Science.gov (United States)

Song, Zhiwei; Li, Gang; Xiong, Ying; Cheng, Chuanpin; Zhang, Wanli; Tang, Minghua; Li, Zheng; He, Jiangheng

2018-05-01

A memory device with a Pt/SrBi2Ta2O9(SBT)/Pt(111) structure was shown to have excellent combined ferroelectricity and resistive switching properties, leading to higher multistate storage memory capacity in contrast to ferroelectric memory devices. In this device, SBT polycrystalline thin films with significant (115) orientation were fabricated on Pt(111)/Ti/SiO2/Si(100) substrates using CVD (chemical vapor deposition) method. Measurement results of the electric properties exhibit reproducible and reliable ferroelectricity switching behavior and bipolar resistive switching effects (BRS) without an electroforming process. The ON/OFF ratio of the resistive switching was found to be about 103. Switching mechanisms for the low resistance state (LRS) and high resistance state (HRS) currents are likely attributed to the Ohmic and space charge-limited current (SCLC) behavior, respectively. Moreover, the ferroelectricity and resistive switching effects were found to be mutually independent, and the four logic states were obtained by controlling the periodic sweeping voltage. This work holds great promise for nonvolatile multistate memory devices with high capacity and low cost.

Novel spintronics devices for memory and logic: prospects and challenges for room temperature all spin computing

Science.gov (United States)

Wang, Jian-Ping

An energy efficient memory and logic device for the post-CMOS era has been the goal of a variety of research fields. The limits of scaling, which we expect to reach by the year 2025, demand that future advances in computational power will not be realized from ever-shrinking device sizes, but rather by innovative designs and new materials and physics. Magnetoresistive based devices have been a promising candidate for future integrated magnetic computation because of its unique non-volatility and functionalities. The application of perpendicular magnetic anisotropy for potential STT-RAM application was demonstrated and later has been intensively investigated by both academia and industry groups, but there is no clear path way how scaling will eventually work for both memory and logic applications. One of main reasons is that there is no demonstrated material stack candidate that could lead to a scaling scheme down to sub 10 nm. Another challenge for the usage of magnetoresistive based devices for logic application is its available switching speed and writing energy. Although a good progress has been made to demonstrate the fast switching of a thermally stable magnetic tunnel junction (MTJ) down to 165 ps, it is still several times slower than its CMOS counterpart. In this talk, I will review the recent progress by my research group and my C-SPIN colleagues, then discuss the opportunities, challenges and some potential path ways for magnetoresitive based devices for memory and logic applications and their integration for room temperature all spin computing system.

Menopausal Hot Flashes and White Matter Hyperintensities

Science.gov (United States)

Thurston, Rebecca C.; Aizenstein, Howard J.; Derby, Carol A.; Sejdić, Ervin; Maki, Pauline M.

2015-01-01

Objective Hot flashes are the classic menopausal symptom. Emerging data links hot flashes to cardiovascular disease (CVD) risk, yet how hot flashes are related to brain health is poorly understood. We examined the relationship between hot flashes - measured via physiologic monitor and self-report - and white matter hyperintensities (WMH) among midlife women. Methods Twenty midlife women ages 40-60 without clinical CVD, with their uterus and both ovaries, and not taking hormone therapy were recruited. Women underwent 24 hours of ambulatory physiologic and diary hot flash monitoring to quantify hot flashes; magnetic resonance imaging to assess WMH burden; 72 hours of actigraphy and questionnaires to quantify sleep; and a blood draw, questionnaires, and physical measures to quantify demographics and CVD risk factors. Test of a priori hypotheses regarding relations between physiologically-monitored and self-reported wake and sleep hot flashes and WMH were conducted in linear regression models. Results More physiologically-monitored hot flashes during sleep were associated with greater WMH, controlling for age, race, and body mass index [beta(standard error)=.0002 (.0001), p=.03]. Findings persisted controlling for sleep characteristics and additional CVD risk factors. No relations were observed for self-reported hot flashes. Conclusions More physiologically-monitored hot flashes during sleep were associated with greater WMH burden among midlife women free of clinical CVD. Results suggest that relations between hot flashes and CVD risk observed in the periphery may extend to the brain. Future work should consider the unique role of sleep hot flashes in brain health. PMID:26057822

Spatial correlation of conductive filaments for multiple switching cycles in CBRAM

KAUST Repository

Pey, K. L.; Raghavan, N.; Wu, X.; Bosman, M.; Zhang, Xixiang; Li, Kun

2014-01-01

Conducting bridge random access memory (CBRAM) is one of the potential technologies being considered for replacement of Flash memory for non-volatile data storage. CBRAM devices operate on the principle of nucleation and rupture of metallic

Exploration of Uninitialized Configuration Memory Space for Intrinsic Identification of Xilinx Virtex-5 FPGA Devices

Directory of Open Access Journals (Sweden)

Oliver Sander

2012-01-01

Full Text Available SRAM-based fingerprinting uses deviations in power-up behaviour caused by the CMOS fabrication process to identify distinct devices. This method is a promising technique for unique identification of physical devices. In the case of SRAM-based hardware reconfigurable devices such as FPGAs, the integrated SRAM cells are often initialized automatically at power-up, sweeping potential identification data. We demonstrate an approach to utilize unused parts of configuration memory space for device identification. Based on a total of over 200,000 measurements on nine Xilinx Virtex-5 FPGAs, we show that the retrieved values have promising properties with respect to consistency on one device, variety between different devices, and stability considering temperature variation and aging.

Foundation Flash CS4 for Designers

CERN Document Server

Green, Tom

2008-01-01

In this book, you'll learn:* How to create effective animations using the new Motion Editor and animation tools * How to use the new 3D features to animate objects in 3D space * Best-practice tips and techniques from some of the top Flash practitioners on the planet * How to create captioned video and full-screen video, and deploy HD video using Flash * Techniques for using the Flash UI components as well as XML documents to create stunning,interactive presentations If you're a Flash designer looking for a solid overview of Flash CS4, this book is for you. Through the use of solid and practica

Parasitic resistive switching uncovered from complementary resistive switching in single active-layer oxide memory device

Science.gov (United States)

Zhu, Lisha; Hu, Wei; Gao, Chao; Guo, Yongcai

2017-12-01

This paper reports the reversible transition processes between the bipolar and complementary resistive switching (CRS) characteristics on the binary metal-oxide resistive memory devices of Pt/HfO x /TiN and Pt/TaO x /TiN by applying the appropriate bias voltages. More interestingly, by controlling the amplitude of the negative bias, the parasitic resistive switching effect exhibiting repeatable switching behavior is uncovered from the CRS behavior. The electrical observation of the parasitic resistive switching effect can be explained by the controlled size of the conductive filament. This work confirms the transformation and interrelationship among the bipolar, parasitic, and CRS effects, and thus provides new insight into the understanding of the physical mechanism of the binary metal-oxide resistive switching memory devices.

Effect of Ag nanoparticles on resistive switching of polyfluorene-based organic non-volatile memory devices

International Nuclear Information System (INIS)

Kim, Tae-Wook; Oh, Seung-Hwan; Choi, Hye-Jung; Wang, Gun-Uk; Kim, Dong-Yu; Hwang, Hyun-Sang; Lee, Tak-Hee

2010-01-01

The effects of Ag nanoparticles on the switching behavior of polyfluorene-based organic nonvolatile memory devices were investigated. Polyfluorene-derivatives (WPF-oxy-F) with and without Ag nanoparticles were synthesized, and the presence of Ag nanoparticles in Ag-WPF-oxy-F was identified by transmission electron microscopy and X-ray photoelectron spectroscopy analyses. The Ag-nanoparticles did not significantly affect the basic switching performances, such as the current-voltage characteristics, the distribution of on/off resistance, and the retention. The pulse switching time of Ag-WPF-oxy-F was faster than that of WPF-oxy-F. Ag-WPF-oxy-F memory devices showed an area dependence in the high resistance state, implying that formation of a Ag metallic channel for current conduction.

Magnetic Resonance Flow Velocity and Temperature Mapping of a Shape Memory Polymer Foam Device

Energy Technology Data Exchange (ETDEWEB)

Small IV, W; Gjersing, E; Herberg, J L; Wilson, T S; Maitland, D J

2008-10-29

Interventional medical devices based on thermally responsive shape memory polymer (SMP) are under development to treat stroke victims. The goals of these catheter-delivered devices include re-establishing blood flow in occluded arteries and preventing aneurysm rupture. Because these devices alter the hemodynamics and dissipate thermal energy during the therapeutic procedure, a first step in the device development process is to investigate fluid velocity and temperature changes following device deployment. A laser-heated SMP foam device was deployed in a simplified in vitro vascular model. Magnetic resonance imaging (MRI) techniques were used to assess the fluid dynamics and thermal changes associated with device deployment. Spatial maps of the steady-state fluid velocity and temperature change inside and outside the laser-heated SMP foam device were acquired. Though non-physiological conditions were used in this initial study, the utility of MRI in the development of a thermally-activated SMP foam device has been demonstrated.

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

Science.gov (United States)

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.

2012-06-01

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

KAUST Repository

Nayak, Pradipta K.

2012-06-22

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin filmtransistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectrictransistors, which is very promising for low-power non-volatile memory applications.

Detection of Malicious Flash Banner Advertisements

Directory of Open Access Journals (Sweden)

Kirill Alekseevich Samosadnyy

2014-09-01

Full Text Available The paper addresses the problem of detecting malicious flash advertisements. As a result, detection method based on dynamic analysis that modify flash application and execute it in Adobe Flash player is proposed and evaluated on synthetic and real world examples.

The Use of MCNP in Flash Radiographic Applications at AWE

Science.gov (United States)

Quillin, S.; Crotch, I.; McAlpin, S.; O'Malley, J.

AWE performs experiments to investigate the hydrodynamic behavior of explosive metal systems in order to underwrite the UK nuclear deterrent. The experiments involve the manufacture of a device to mock up some aspect of the weapon. Inert simulant materials replace fissile weapon components. The device is then detonated under remote control within specially designed explosive containment buildings called firing chambers. During the experiment a very brief, intense, collimated flash of high energy x-rays are used to take a snapshot of the implosion (see Fig. 1). Prom the resulting image measurements of the dynamic configuration and density distribution of the components in the device are inferred. These are then used to compare with calculations of the hydrodynamic operation of the weapon and understand how the device would perform under various conditions. This type of experiment is known as a core punch experiment.

Design of SMART alarm system using main memory database

International Nuclear Information System (INIS)

Jang, Kue Sook; Seo, Yong Seok; Park, Keun Oak; Lee, Jong Bok; Kim, Dong Hoon

2001-01-01

To achieve design goal of SMART alarm system, first of all we have to decide on how to handle and manage alarm information and how to use database. So this paper analyses concepts and deficiencies of main memory database applied in real time system. And this paper sets up structure and processing principles of main memory database using nonvolatile memory such as flash memory and develops recovery strategy and process board structures using these. Therefore this paper shows design of SMART alarm system is suited functions and requirements

A bio-inspired memory device based on interfacing Physarum polycephalum with an organic semiconductor

Energy Technology Data Exchange (ETDEWEB)

Romeo, Agostino; Dimonte, Alice; Tarabella, Giuseppe; D’Angelo, Pasquale, E-mail: dangelo@imem.cnr.it, E-mail: iannotta@imem.cnr.it; Erokhin, Victor; Iannotta, Salvatore, E-mail: dangelo@imem.cnr.it, E-mail: iannotta@imem.cnr.it [IMEM-CNR, Institute of Materials for Electronics and Magnetism-National Research Council, Parma 43124 (Italy)

2015-01-01

The development of devices able to detect and record ion fluxes is a crucial point in order to understand the mechanisms that regulate communication and life of organisms. Here, we take advantage of the combined electronic and ionic conduction properties of a conducting polymer to develop a hybrid organic/living device with a three-terminal configuration, using the Physarum polycephalum Cell (PPC) slime mould as a living bio-electrolyte. An over-oxidation process induces a conductivity switch in the polymer, due to the ionic flux taking place at the PPC/polymer interface. This behaviour endows a current-depending memory effect to the device.

Nonvolatile organic write-once-read-many-times memory devices based on hexadecafluoro-copper-phthalocyanine

Science.gov (United States)

Wang, Lidan; Su, Zisheng; Wang, Cheng

2012-05-01

Nonvolatile organic write-once-read-many-times memory device was demonstrated based on hexadecafluoro-copper-phthalocyanine (F16CuPc) single layer sandwiched between indium tin oxide (ITO) anode and Al cathode. The as fabricated device remains in ON state and it can be tuned to OFF state by applying a reverse bias. The ON/OFF current ratio of the device can reach up to 2.3 × 103. Simultaneously, the device shows long-term storage stability and long retention time in air. The ON/OFF transition is attributed to the formation and destruction of the interfacial dipole layer in the ITO/F16CuPc interface, and such a mechanism is different from previously reported ones.

On multiphase negative flash for ideal solutions

DEFF Research Database (Denmark)

Yan, Wei; Stenby, Erling Halfdan

2012-01-01

simpler than the corresponding normal flash algorithm. Unlike normal flash, multiphase negative flash for ideal solutions can diverge if the feasible domain for phase amounts is not closed. This can be judged readily during the iteration process. The algorithm can also be extended to the partial negative......There is a recent interest to solve multiphase negative flash problems where the phase amounts can be negative for normal positive feed composition. Solving such a negative flash problem using successive substitution needs an inner loop for phase distribution calculation at constant fugacity...... coefficients. It is shown that this inner loop, named here as multiphase negative flash for ideal solutions, can be solved either by Michelsen's algorithm for multiphase normal flash, or by its variation which uses F−1 phase amounts as independent variables. In either case, the resulting algorithm is actually...

Feasibilty of a Multi-bit Cell Perpendicular Magnetic Tunnel Junction Device

Science.gov (United States)

Kim, Chang Soo

The ultimate objective of this research project was to explore the feasibility of making a multi-bit cell perpendicular magnetic tunnel junction (PMTJ) device to increase the storage density of spin-transfer-torque random access memory (STT-RAM). As a first step toward demonstrating a multi-bit cell device, this dissertation contributed a systematic and detailed study of developing a single cell PMTJ device using L10 FePt films. In the beginning of this research, 13 up-and-coming non-volatile memory (NVM) technologies were investigated and evaluated to see whether one of them might outperform NAND flash memories and even HDDs on a cost-per-TB basis in 2020. This evaluation showed that STT-RAM appears to potentially offer superior power efficiency, among other advantages. It is predicted that STTRAM's density could make it a promising candidate for replacing NAND flash memories and possibly HDDs if STTRAM could be improved to store multiple bits per cell. Ta/Mg0 under-layers were used first in order to develop (001) L1 0 ordering of FePt at a low temperature of below 400 °C. It was found that the tradeoff between surface roughness and (001) L10 ordering of FePt makes it difficult to achieve low surface roughness and good perpendicular magnetic properties simultaneously when Ta/Mg0 under-layers are used. It was, therefore, decided to investigate MgO/CrRu under-layers to simultaneously achieve smooth films with good ordering below 400°C. A well ordered 4 nm L10 FePt film with RMS surface roughness close to 0.4 nm, perpendicular coercivity of about 5 kOe, and perpendicular squareness near 1 was obtained at a deposition temperature of 390 °C on a thermally oxidized Si substrate when MgO/CrRu under-layers are used. A PMTJ device was developed by depositing a thin MgO tunnel barrier layer and a top L10 FePt film and then being postannealed at 450 °C for 30 minutes. It was found that the sputtering power needs to be minimized during the thin MgO tunnel barrier

Multiferroic Memories

Directory of Open Access Journals (Sweden)

Amritendu Roy

2012-01-01

Full Text Available Multiferroism implies simultaneous presence of more than one ferroic characteristics such as coexistence of ferroelectric and magnetic ordering. This phenomenon has led to the development of various kinds of materials and conceptions of many novel applications such as development of a memory device utilizing the multifunctionality of the multiferroic materials leading to a multistate memory device with electrical writing and nondestructive magnetic reading operations. Though, interdependence of electrical- and magnetic-order parameters makes it difficult to accomplish the above and thus rendering the device to only two switchable states, recent research has shown that such problems can be circumvented by novel device designs such as formation of tunnel junction or by use of exchange bias. In this paper, we review the operational aspects of multiferroic memories as well as the materials used for these applications along with the designs that hold promise for the future memory devices.

Microwave impedance imaging on semiconductor memory devices

Science.gov (United States)

Kundhikanjana, Worasom; Lai, Keji; Yang, Yongliang; Kelly, Michael; Shen, Zhi-Xun

2011-03-01

Microwave impedance microscopy (MIM) maps out the real and imaginary components of the tip-sample impedance, from which the local conductivity and dielectric constant distribution can be derived. The stray field contribution is minimized in our shielded cantilever design, enabling quantitative analysis of nano-materials and device structures. We demonstrate here that the MIM can spatially resolve the conductivity variation in a dynamic random access memory (DRAM) sample. With DC or low-frequency AC bias applied to the tip, contrast between n-doped and p-doped regions in the dC/dV images is observed, and p-n junctions are highlighted in the dR/dV images. The results can be directly compared with data taken by scanning capacitance microscope (SCM), which uses unshielded cantilevers and resonant electronics, and the MIM reveals more information of the local dopant concentration than SCM.

Radiation Damage in Electronic Memory Devices

OpenAIRE

Fetahović, Irfan; Pejović, Milić; Vujisić, Miloš

2013-01-01

This paper investigates the behavior of semiconductor memories exposed to radiation in order to establish their applicability in a radiation environment. The experimental procedure has been used to test radiation hardness of commercial semiconductor memories. Different types of memory chips have been exposed to indirect ionizing radiation by changing radiation dose intensity. The effect of direct ionizing radiation on semiconductor memory behavior has been analyzed by using Monte Carlo simula...

Organic ferroelectric memory devices with inkjet-printed polymer electrodes on flexible substrates

KAUST Repository

Bhansali, Unnat Sampatraj

2013-05-01

Drop-on-demand piezoelectric inkjet-printing technique has been used to fabricate a functional cross-bar array of all-organic ferroelectric memory devices. The polymer-ferroelectric-polymer device consists of a ferroelectric copolymer P(VDF-TrFE) film sandwiched between inkjet-patterned, continuous, orthogonal lines of PEDOT:PSS polymer as the bottom and top electrodes. These devices exhibit well-saturated hysteresis curves with a maximum remnant polarization (Pr) = 6.7 μC/cm2, coercive field (E c) = 55 MV/m and a peak capacitance density of 45 nF/cm2. Our polarization fatigue measurements show that these devices retain ∼100% and 45% of their initial Pr values after 103 and 10 5 stress cycles, respectively. The overall performance and polarization retention characteristics of these ferroelectric capacitors with inkjet-printed polymer electrodes are comparable to metal and spin-cast polymer electrodes suggesting their potential use in large-area flexible electronics. © 2013 Elsevier Ltd. All rights reserved.

Management of long-term and reversible hysteroscopic sterilization: a novel device with nickel-titanium shape memory alloy

Science.gov (United States)

2014-01-01

Background Female sterilization is the second most commonly used method of contraception in the United States. Female sterilization can now be performed through laparoscopic, abdominal, or hysteroscopic approaches. The hysteroscopic sterilization may be a safer option than sterilization through laparoscopy or laparotomy because it avoids invading the abdominal cavity and undergoing general anaesthesia. Hysteroscopic sterilization mainly includes chemical agents and mechanical devices. Common issues related to the toxicity of the chemical agents used have raised concerns regarding this kind of contraception. The difficulty of the transcervical insertion of such mechanical devices into the fallopian tubes has increased the high incidence of device displacement or dislodgment. At present, Essure® is the only commercially available hysteroscopic sterilization device being used clinically. The system is irreversible and is not effective immediately. Presentation of the hypothesis Our new hysteroscopic sterility system consists of nickel-titanium (NiTi) shape memory alloy and a waterproof membrane. The NiTi alloy is covered with two coatings to avoid toxic Ni release and to prevent stimulation of epithelial tissue growth around the oviducts. Because of the shape memory effect of the NiTi alloy, the device works like an umbrella: it stays collapsed at low temperature before placement and opens by the force of shape memory activated by the body temperature after it is inserted hysteroscopically into the interstitial tubal lumen. The rim of the open device will incise into interstitial myometrium during the process of unfolding. Once the device is fixed, it blocks the tube completely. When the patient no longer wishes for sterilization, the device can be closed by perfusing liquid with low temperature into the uterine cavity, followed by prospective hysteroscopic removal. After the device removal, the fallopian tube will revert to its physiological functions. Testing the

Organic nonvolatile resistive memory devices based on thermally deposited Au nanoparticle

Science.gov (United States)

Jin, Zhiwen; Liu, Guo; Wang, Jizheng

2013-05-01

Uniform Au nanoparticles (NPs) are formed by thermally depositing nominal 2-nm thick Au film on a 10-nm thick polyimide film formed on a Al electrode, and then covered by a thin polymer semiconductor film, which acts as an energy barrier for electrons to be injected from the other Al electrode (on top of polymer film) into the Au NPs, which are energetically electron traps in such a resistive random access memory (RRAM) device. The Au NPs based RRAM device exhibits estimated retention time of 104 s, cycle times of more than 100, and ON-OFF ratio of 102 to 103. The carrier transport properties are also analyzed by fitting the measured I-V curves with several conduction models.

Transparent and flexible write-once-read-many (WORM) memory device based on egg albumen

International Nuclear Information System (INIS)

Qu, Bo; Lin, Qianru; Wan, Tao; Du, Haiwei; Chen, Nan; Lin, Xi; Chu, Dewei

2017-01-01

Egg albumen, as an important protein resource in nature, is an interesting dielectric material exhibiting many fascinating properties for the development of environmentally friendly electronic devices. Taking advantage of their extraordinary transparency and flexibility, this paper presents an innovative preparation approach for albumen thin film based write-once-read-many-times (WORM) memory devices in a simple, cost-effective manner. The fabricated device shows superior data retention properties including non-volatile character (over 10 5 s) and promising great read durability (10 6 times). Furthermore, our results suggested that the electric-field-induced trap-controlled space charge limited current (SCLC) conduction is responsible for the observed resistance switching effect. The present study may likely reveal another pathway towards complete see-through electrical devices. (paper)

Transparent and flexible write-once-read-many (WORM) memory device based on egg albumen

Science.gov (United States)

Qu, Bo; Lin, Qianru; Wan, Tao; Du, Haiwei; Chen, Nan; Lin, Xi; Chu, Dewei

2017-08-01

Egg albumen, as an important protein resource in nature, is an interesting dielectric material exhibiting many fascinating properties for the development of environmentally friendly electronic devices. Taking advantage of their extraordinary transparency and flexibility, this paper presents an innovative preparation approach for albumen thin film based write-once-read-many-times (WORM) memory devices in a simple, cost-effective manner. The fabricated device shows superior data retention properties including non-volatile character (over 105 s) and promising great read durability (106 times). Furthermore, our results suggested that the electric-field-induced trap-controlled space charge limited current (SCLC) conduction is responsible for the observed resistance switching effect. The present study may likely reveal another pathway towards complete see-through electrical devices.

A bio-inspired memory device based on interfacing Physarum polycephalum with an organic semiconductor

Directory of Open Access Journals (Sweden)

Agostino Romeo

2015-01-01

Full Text Available The development of devices able to detect and record ion fluxes is a crucial point in order to understand the mechanisms that regulate communication and life of organisms. Here, we take advantage of the combined electronic and ionic conduction properties of a conducting polymer to develop a hybrid organic/living device with a three-terminal configuration, using the Physarum polycephalum Cell (PPC slime mould as a living bio-electrolyte. An over-oxidation process induces a conductivity switch in the polymer, due to the ionic flux taking place at the PPC/polymer interface. This behaviour endows a current-depending memory effect to the device.

Resistive switching effect in the planar structure of all-printed, flexible and rewritable memory device based on advanced 2D nanocomposite of graphene quantum dots and white graphene flakes

International Nuclear Information System (INIS)

Rehman, Muhammad Muqeet; Siddiqui, Ghayas Uddin; Kim, Sowon; Choi, Kyung Hyun

2017-01-01

Pursuit of the most appropriate materials and fabrication methods is essential for developing a reliable, rewritable and flexible memory device. In this study, we have proposed an advanced 2D nanocomposite of white graphene (hBN) flakes embedded with graphene quantum dots (GQDs) as the functional layer of a flexible memory device owing to their unique electrical, chemical and mechanical properties. Unlike the typical sandwich type structure of a memory device, we developed a cost effective planar structure, to simplify device fabrication and prevent sneak current. The entire device fabrication was carried out using printing technology followed by encapsulation in an atomically thin layer of aluminum oxide (Al 2 O 3 ) for protection against environmental humidity. The proposed memory device exhibited attractive bipolar switching characteristics of high switching ratio, large electrical endurance and enhanced lifetime, without any crosstalk between adjacent memory cells. The as-fabricated device showed excellent durability for several bending cycles at various bending diameters without any degradation in bistable resistive states. The memory mechanism was deduced to be conductive filamentary; this was validated by illustrating the temperature dependence of bistable resistive states. Our obtained results pave the way for the execution of promising 2D material based next generation flexible and non-volatile memory (NVM) applications. (paper)

Flashing inception in flowing liquids

International Nuclear Information System (INIS)

Jones, O.C. Jr.

1980-01-01

The inception of net vaporization in flashing flows is examined. It is suggested that the flashing inception can be expressed as two additive effects. One is due to the static decompression which is a function of the initial temperature and also the expansion rate. The other effect which is a function of Reynolds number and flashing index, is due to the turbulent fluctuations of the flowing liquid. It is shown that by taking a three standard deviation band on the turbulent velocity fluctuations, an adequate representation of the inverse mass flux effect on flashing inception for existing data is obtained. The turbulence effects are combined with the correlation of Alamgir and Lienhard to provide predictive methods recommended for the case where both static and convective decompression effects exist

Impact of AlO x layer on resistive switching characteristics and device-to-device uniformity of bilayered HfO x -based resistive random access memory devices

Science.gov (United States)

Chuang, Kai-Chi; Chung, Hao-Tung; Chu, Chi-Yan; Luo, Jun-Dao; Li, Wei-Shuo; Li, Yi-Shao; Cheng, Huang-Chung

2018-06-01

An AlO x layer was deposited on HfO x , and bilayered dielectric films were found to confine the formation locations of conductive filaments (CFs) during the forming process and then improve device-to-device uniformity. In addition, the Ti interposing layer was also adopted to facilitate the formation of oxygen vacancies. As a result, the resistive random access memory (RRAM) device with TiN/Ti/AlO x (1 nm)/HfO x (6 nm)/TiN stack layers demonstrated excellent device-to-device uniformity although it achieved slightly larger resistive switching characteristics, which were forming voltage (V Forming) of 2.08 V, set voltage (V Set) of 1.96 V, and reset voltage (V Reset) of ‑1.02 V, than the device with TiN/Ti/HfO x (6 nm)/TiN stack layers. However, the device with a thicker 2-nm-thick AlO x layer showed worse uniformity than the 1-nm-thick one. It was attributed to the increased oxygen atomic percentage in the bilayered dielectric films of the 2-nm-thick one. The difference in oxygen content showed that there would be less oxygen vacancies to form CFs. Therefore, the random growth of CFs would become severe and the device-to-device uniformity would degrade.

Control rod driving hydraulic pressure device

International Nuclear Information System (INIS)

Ogawa, Masahide.

1993-01-01

The present invention concerns a control rod driving hydraulic device of a BWR type reactor, and provides an improvement for a means for supplying mechanical seal flashing water of a pump. That is, a mechanical seal flashing pipeline is branched at the downstream of a pressure-reducing orifice and connected to a minimum flow pipeline. With such a constitution, the minimum flow pipeline is connected to a minimum flow pipeline of an auxiliary pump at the downstream of the pressure-reducing orifice and returned to a suction pipeline of the pump. Pressure at the downstream of the pressure-reducing orifice is set, in the orifice, to a pressure required for mechanical seal flashing. Accordingly, the mechanical seal flashing pipeline is connected and a part of minimum flow rate is utilized, thereby enabling to cool mechanical seals. As a result, flow rate of the mechanical flashing water which has been flown out can be saved. The exhaustion amount from the pump can be reduced, to decrease the shaft power and reduce the capacity of the motor. (I.S.)

Radiation Damage in Electronic Memory Devices

Directory of Open Access Journals (Sweden)

Irfan Fetahović

2013-01-01

Full Text Available This paper investigates the behavior of semiconductor memories exposed to radiation in order to establish their applicability in a radiation environment. The experimental procedure has been used to test radiation hardness of commercial semiconductor memories. Different types of memory chips have been exposed to indirect ionizing radiation by changing radiation dose intensity. The effect of direct ionizing radiation on semiconductor memory behavior has been analyzed by using Monte Carlo simulation method. Obtained results show that gamma radiation causes decrease in threshold voltage, being proportional to the absorbed dose of radiation. Monte Carlo simulations of radiation interaction with material proved to be significant and can be a good estimation tool in probing semiconductor memory behavior in radiation environment.

Memory hierarchy using row-based compression

Science.gov (United States)

Loh, Gabriel H.; O'Connor, James M.

2016-10-25

A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

Influence of Thermal Annealing Treatment on Bipolar Switching Properties of Vanadium Oxide Thin-Film Resistance Random-Access Memory Devices

Science.gov (United States)

Chen, Kai-Huang; Cheng, Chien-Min; Kao, Ming-Cheng; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Wu, Sean; Su, Feng-Yi

2017-04-01

The bipolar switching properties and electrical conduction mechanism of vanadium oxide thin-film resistive random-access memory (RRAM) devices obtained using a rapid thermal annealing (RTA) process have been investigated in high-resistive status/low-resistive status (HRS/LRS) and are discussed herein. In addition, the resistance switching properties and quality improvement of the vanadium oxide thin-film RRAM devices were measured by x-ray diffraction (XRD) analysis, x-ray photoelectron spectrometry (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM), and current-voltage ( I- V) measurements. The activation energy of the hopping conduction mechanism in the devices was investigated based on Arrhenius plots in HRS and LRS. The hopping conduction distance and activation energy barrier were obtained as 12 nm and 45 meV, respectively. The thermal annealing process is recognized as a candidate method for fabrication of thin-film RRAM devices, being compatible with integrated circuit technology for nonvolatile memory devices.

An Analysis of Total Lightning Flash Rates Over Florida

Science.gov (United States)

Mazzetti, Thomas O.; Fuelberg, Henry E.

2017-12-01

Although Florida is known as the "Sunshine State", it also contains the greatest lightning flash densities in the United States. Flash density has received considerable attention in the literature, but lightning flash rate has received much less attention. We use data from the Earth Networks Total Lightning Network (ENTLN) to produce a 5 year (2010-2014) set of statistics regarding total flash rates over Florida and adjacent regions. Instead of tracking individual storms, we superimpose a 0.2° × 0.2° grid over the study region and count both cloud-to-ground (CG) and in-cloud (IC) flashes over 5 min intervals. Results show that the distribution of total flash rates is highly skewed toward small values, whereas the greatest rate is 185 flashes min-1. Greatest average annual flash rates ( 3 flashes min-1) are located near Orlando. The southernmost peninsula, North Florida, and the Florida Panhandle exhibit smaller average annual flash rates ( 1.5 flashes min-1). Large flash rates > 100 flashes min-1 can occur during any season, at any time during the 24 h period, and at any location within the domain. However, they are most likely during the afternoon and early evening in East Central Florida during the spring and summer months.

A global flash flood forecasting system

Science.gov (United States)

Baugh, Calum; Pappenberger, Florian; Wetterhall, Fredrik; Hewson, Tim; Zsoter, Ervin

2016-04-01

The sudden and devastating nature of flash flood events means it is imperative to provide early warnings such as those derived from Numerical Weather Prediction (NWP) forecasts. Currently such systems exist on basin, national and continental scales in Europe, North America and Australia but rely on high resolution NWP forecasts or rainfall-radar nowcasting, neither of which have global coverage. To produce global flash flood forecasts this work investigates the possibility of using forecasts from a global NWP system. In particular we: (i) discuss how global NWP can be used for flash flood forecasting and discuss strengths and weaknesses; (ii) demonstrate how a robust evaluation can be performed given the rarity of the event; (iii) highlight the challenges and opportunities in communicating flash flood uncertainty to decision makers; and (iv) explore future developments which would significantly improve global flash flood forecasting. The proposed forecast system uses ensemble surface runoff forecasts from the ECMWF H-TESSEL land surface scheme. A flash flood index is generated using the ERIC (Enhanced Runoff Index based on Climatology) methodology [Raynaud et al., 2014]. This global methodology is applied to a series of flash floods across southern Europe. Results from the system are compared against warnings produced using the higher resolution COSMO-LEPS limited area model. The global system is evaluated by comparing forecasted warning locations against a flash flood database of media reports created in partnership with floodlist.com. To deal with the lack of objectivity in media reports we carefully assess the suitability of different skill scores and apply spatial uncertainty thresholds to the observations. To communicate the uncertainties of the flash flood system output we experiment with a dynamic region-growing algorithm. This automatically clusters regions of similar return period exceedence probabilities, thus presenting the at-risk areas at a spatial

Flash CS4: The Missing Manual

CERN Document Server

Grover, Chris

2008-01-01

Unlock the power of Flash and bring gorgeous animations to life onscreen. Flash CS4: The Missing Manual includes a complete primer on animation, a guided tour of the program's tools and capabilities, lots of new illustrations, and more details on working with video. Beginners will learn to use the software in no time, and experienced Flash designers will improve their skills.

uFLIP-OC: Understanding Flash I/O Patterns on Open-Channel Solid State Drives

DEFF Research Database (Denmark)

Picoli, Ivan Luiz; Villegas Pasco, Carla Ysabela; Jónsson, Björn Thór

2017-01-01

on a clean break from the block device abstraction. Open-channel SSDs embed a minimal flash translation layer (FTL) and expose their internals to the host. The Linux open-channel SSD subsystem, LightNVM, lets kernel modules as well as user-space applications control data placement and I/O scheduling...

WORM memory devices based on conformation change of a PVK derivative with a rigid spacer in side chain

International Nuclear Information System (INIS)

Liu Yuanhua; Li Najun; Xia Xuewei; Xu Qingfeng; Ge Jianfeng; Lu Jianmei

2010-01-01

A nonvolatile write-once-read-many-times (WORM) memory device based on poly((4-vinylbenzyl)-9H-carbazole) (PVCz) was fabricated by a simple and conventional process. The as-fabricated device was found to be at its OFF state and could be programmed irreversibly to the ON state with a low transition voltage of -1.7 V. The device exhibits a high ON/OFF current ratio of up to 10 6 , high stability in retention time up to 8 h and number of read cycles up to 10 8 under a read voltage of -1.0 V in both ON and OFF states. The results of X-ray diffraction (XRD) and fluorescence emission spectra in different states of PVCz indicate that the electrical bistable phenomenon is caused by the voltage-induced conformation change of the pendant carbazole groups. With high performance, low power consumption and low production cost, the device fabricated with PVCz has a potential application for nonvolatile memory.

Comparative Study of Furnace and Flash Lamp Annealed Silicon Thin Films Grown by Plasma Enhanced Chemical Vapor Deposition

Directory of Open Access Journals (Sweden)

Maheshwar Shrestha

2018-03-01

Full Text Available Low-temperature growth of microcrystalline silicon (mc-Si is attractive for many optoelectronic device applications. This paper reports a detailed comparison of optical properties, microstructure, and morphology of amorphous silicon (a-Si thin films crystallized by furnace annealing and flash lamp annealing (FLA at temperatures below the softening point of glass substrate. The initial a-Si films were grown by plasma enhanced chemical vapor deposition (PECVD. Reflectance measurement indicated characteristic peak in the UV region ~280 nm for the furnace annealed (>550 °C and flash lamp annealed films, which provided evidence of crystallization. The film surface roughness increased with increasing the annealing temperature as well as after the flash lamp annealing. X-ray diffraction (XRD measurement indicated that the as-deposited samples were purely amorphous and after furnace crystallization, the crystallites tended to align in one single direction (202 with uniform size that increased with the annealing temperature. On the other hand, the flash lamp crystalized films had randomly oriented crystallites with different sizes. Raman spectroscopy showed the crystalline volume fraction of 23.5%, 47.3%, and 61.3% for the samples annealed at 550 °C, 650 °C, and with flash lamp, respectively. The flash lamp annealed film was better crystallized with rougher surface compared to furnace annealed ones.

Flashing coupled density wave oscillation

International Nuclear Information System (INIS)

Jiang Shengyao; Wu Xinxin; Zhang Youjie

1997-07-01

The experiment was performed on the test loop (HRTL-5), which simulates the geometry and system design of the 5 MW reactor. The phenomenon and mechanism of different kinds of two-phase flow instabilities, namely geyser instability, flashing instability and flashing coupled density wave instability are described. The especially interpreted flashing coupled density wave instability has never been studied well, it is analyzed by using a one-dimensional non-thermo equilibrium two-phase flow drift model computer code. Calculations are in good agreement with the experiment results. (5 refs.,5 figs., 1 tab.)

Study of nanoimprint lithography (NIL) for HVM of memory devices

Science.gov (United States)

Kono, Takuya; Hatano, Masayuki; Tokue, Hiroshi; Kobayashi, Kei; Suzuki, Masato; Fukuhara, Kazuya; Asano, Masafumi; Nakasugi, Tetsuro; Choi, Eun Hyuk; Jung, Wooyung

2017-03-01

A low cost alternative lithographic technology is desired to meet the decreasing feature size of semiconductor devices. Nano-imprint lithography (NIL) is one of the candidates for alternative lithographic technologies.[1][2][3] NIL has such advantages as good resolution, critical dimension (CD) uniformity and low line edge roughness (LER). On the other hand, the critical issues of NIL are defectivity, overlay, and throughput. In order to introduce NIL into the HVM, it is necessary to overcome these three challenges simultaneously.[4]-[12] In our previous study, we have reported a dramatic improvement in NIL process defectivity on a pilot line tool, FPA-1100 NZ2. We have described that the NIL process for 2x nm half pitch is getting closer to the target of HVM.[12] In this study, we report the recent evaluation of the NIL process performance to judge the applicability of NIL to memory device fabrications. In detail, the CD uniformity and LER are found to be less than 2nm. The overlay accuracy of the test device is less than 7nm. A defectivity level of below 1pcs./cm2 has been achieved at a throughput of 15 wafers per hour.

Flash CS5 The Missing Manual

CERN Document Server

Grover, Chris

2010-01-01

Once you know how to use Flash, you can create everything from simple animations to high-end desktop applications, but it's a complex tool that can be difficult to master on your own-unless you have this Missing Manual. This book will help you learn all you need to know about Flash CS5 to create animations that bring your ideas to life. Learn animation basics. Find everything you need to know to get started with FlashMaster the Flash tools. Learn the animation and effects toolset, with clear explanations and hands-on examplesUse 3D effects. Rotate and put objects in motion in three dimensions

Chemical insight into origin of forming-free resistive random-access memory devices

KAUST Repository

Wu, X.

2011-09-29

We demonstrate the realization of a forming-step free resistive random access memory (RRAM) device using a HfOx/TiOx/HfOx/TiOxmultilayer structure, as a replacement for the conventional HfOx-based single layer structure. High-resolution transmission electron microscopy (HRTEM), along with electron energy loss spectroscopy(EELS)analysis has been carried out to identify the distribution and the role played by Ti in the RRAM stack. Our results show that Ti out-diffusion into the HfOx layer is the chemical cause of forming-free behavior. Moreover, the capability of Ti to change its ionic state in HfOx eases the reduction-oxidation (redox) reaction, thus lead to the RRAM devices performance improvements.

Electrical switching and memory phenomena observed in redox-gradient dendrimer sandwich devices

OpenAIRE

Li, JianChang; Blackstock, Silas C.; Szulczewski, Greg J.

2005-01-01

We report on the fabrication of dendrimer sandwich devices with electrical switching and memory properties. The storage media is consisted of a redox-gradient dendrimer layer sandwiched in organic barrier thin films. The dendrimer layer acts as potential well where redox-state changes and consequent electrical transitions of the embedded dendrimer molecules are expected to be effectively triggered and retained, respectively. Experimental results indicated that electrical switching could be re...

Nanoscale observations of the operational failure for phase-change-type nonvolatile memory devices using Ge2Sb2Te5 chalcogenide thin films

International Nuclear Information System (INIS)

Yoon, Sung-Min; Choi, Kyu-Jeong; Lee, Nam-Yeal; Lee, Seung-Yun; Park, Young-Sam; Yu, Byoung-Gon

2007-01-01

In this study, a phase-change memory device was fabricated and the origin of device failure mode was examined using transmission electron microscopy (TEM) and energy dispersive X-ray spectroscopy (EDS). Ge 2 Sb 2 Te 5 (GST) was used as the active phase-change material in the memory device and the active pore size was designed to be 0.5 μm. After the programming signals of more than 2x10 6 cycles were repeatedly applied to the device, the high-resistance memory state (reset) could not be rewritten and the cell resistance was fixed at the low-resistance state (set). Based on TEM and EDS studies, Sb excess and Ge deficiency in the device operating region had a strong effect on device reliability, especially under endurance-demanding conditions. An abnormal segregation and oxidation of Ge also was observed in the region between the device operating and inactive peripheral regions. To guarantee an data endurability of more than 1x10 10 cycles of PRAM, it is very important to develop phase-change materials with more stable compositions and to reduce the current required for programming

Influence of post-annealing on the electrical properties of metal/oxide/silicon nitride/oxide/silicon capacitors for flash memories

International Nuclear Information System (INIS)

Kim, Hee Dong; An, Ho-Myoung; Kim, Kyoung Chan; Seo, Yu Jeong; Kim, Tae Geun

2008-01-01

We report the effect of post-annealing on the electrical properties of metal/oxide/silicon nitride/oxide/silicon (MONOS) capacitors. Four samples, namely as-deposited and annealed at 750, 850 and 950 °C for 30 s in nitrogen ambient by a rapid thermal process, were prepared and characterized for comparison. The best performance with the largest memory window of 4.4 V and the fastest program speed of 10 ms was observed for the sample annealed at 850 °C. In addition, the highest traps density of 6.84 × 10 18 cm −3 was observed with ideal trap distributions for the same sample by capacitance–voltage (C–V) measurement. These results indicate that the memory traps in the ONO structure can be engineered by post-annealing to improve the electrical properties of the MONOS device

Research of coal flash hydropyrolysis

Energy Technology Data Exchange (ETDEWEB)

Zhu, Z.; Zhu, H.; Wu, Y.; Tang, L.; Cheng, L.; Xu, Z. [East China University of Science and Technology, Shanghai (China)

2001-02-01

Using x-ray photoelectron spectroscopy (XPS) analyses the organic sufur of seven different Chinese coals and their semi-cokes from flash hydropyrolysis were studied. The results showed that the organic sulfur in coal was alkyal sulfur and thiophene with the peak of XPS located in 163.1-163.5 eV and 164.1-164.5 eV. The relative thiophene content in coal increased with the coal rank. The type of organic sulfur in semi-coke in flash hydropyrolysis was generally thiophene species; its XPS peak also located in 164.1-164.5 eV, and was in accord with its corresponding coal. Total alkyl sulfur and some thiophene sulfur were removed during the flash hydropyrolysis process. The alkyl sulfur had very high activity in hydrogenation reaction. Flash hydropyrolysis was an important new clean-coal technique and had notable desulfurization effect. 13 refs., 2 figs., 4 tabs.

Emerging memory technologies design, architecture, and applications

CERN Document Server

2014-01-01

This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits. • Provides a comprehensive reference on designing modern circuits with emerging, non-volatile memory technologies, such as MRAM and PCRAM; • Explores new design opportunities offered by emerging memory technologies, from a holistic perspective; • Describes topics in technology, modeling, architecture and applications; • Enables circuit designers to ex...

Embedded nonvolatile memory devices with various silicon nitride energy band gaps on glass used for flat panel display applications

International Nuclear Information System (INIS)

Son, Dang Ngoc; Van Duy, Nguyen; Jung, Sungwook; Yi, Junsin

2010-01-01

Nonvolatile memory (NVM) devices with a nitride–nitride–oxynitride stack structure on a rough poly-silicon (poly-Si) surface were fabricated using a low-temperature poly-Si (LTPS) thin film transistor technology on glass substrates for application of flat panel display (FPD). The plasma-assisted oxidation/nitridation method is used to form a uniform oxynitride with an ultrathin tunneling layer on a rough LTPS surface. The NVMs, using a Si-rich silicon nitride film as a charge-trapping layer, were proposed as one of the solutions for the improvement of device performance such as the program/erase speed, the memory window and the charge retention characteristics. To further improve the vertical scaling and charge retention characteristics of NVM devices, the high-κ high-density N-rich SiN x films are used as a blocking layer. The fabricated NVM devices have outstanding electrical properties, such as a low threshold voltage, a high ON/OFF current ratio, a low subthreshold swing, a low operating voltage of less than ±9 V and a large memory window of 3.7 V, which remained about 1.9 V over a period of 10 years. These characteristics are suitable for electrical switching and data storage with in FPD application

Electrostatically telescoping nanotube nonvolatile memory device

International Nuclear Information System (INIS)

Kang, Jeong Won; Jiang Qing

2007-01-01

We propose a nonvolatile memory based on carbon nanotubes (CNTs) serving as the key building blocks for molecular-scale computers and investigate the dynamic operations of a double-walled CNT memory element by classical molecular dynamics simulations. The localized potential energy wells achieved from both the interwall van der Waals energy and CNT-metal binding energy make the bistability of the CNT positions and the electrostatic attractive forces induced by the voltage differences lead to the reversibility of this CNT memory. The material for the electrodes should be carefully chosen to achieve the nonvolatility of this memory. The kinetic energy of the CNT shuttle experiences several rebounds induced by the collisions of the CNT onto the metal electrodes, and this is critically important to the performance of such an electrostatically telescoping CNT memory because the collision time is sufficiently long to cause a delay of the state transition

Bipolar cloud-to-ground lightning flash observations

Science.gov (United States)

Saba, Marcelo M. F.; Schumann, Carina; Warner, Tom A.; Helsdon, John H.; Schulz, Wolfgang; Orville, Richard E.

2013-10-01

lightning is usually defined as a lightning flash where the current waveform exhibits a polarity reversal. There are very few reported cases of cloud-to-ground (CG) bipolar flashes using only one channel in the literature. Reports on this type of bipolar flashes are not common due to the fact that in order to confirm that currents of both polarities follow the same channel to the ground, one necessarily needs video records. This study presents five clear observations of single-channel bipolar CG flashes. High-speed video and electric field measurement observations are used and analyzed. Based on the video images obtained and based on previous observations of positive CG flashes with high-speed cameras, we suggest that positive leader branches which do not participate in the initial return stroke of a positive cloud-to-ground flash later generate recoil leaders whose negative ends, upon reaching the branch point, traverse the return stroke channel path to the ground resulting in a subsequent return stroke of opposite polarity.

Role of potential fluctuations in phase-change GST memory devices

Energy Technology Data Exchange (ETDEWEB)

Agarwal, Satish C. [Department of Physics, Indian Institute of Technology, Kanpur 208016 (India)

2012-10-15

The long range potential fluctuations (LRPFs) arising from the defects and heterogeneities in disordered semiconductors are important for understanding their atomic and electronic properties. Here, they are measured in Ge{sub X}Sb{sub Y}Te{sub 1-X-Y} (GST) chalcogenide glasses used in rewritable phase change memory (PCM) devices. It is found that the most commonly used composition Ge{sub 2}Sb{sub 2}Te{sub 5} has the smallest LRPF amongst its nearby compositions. This finding may be useful in the search for better PCM materials. (Copyright copyright 2012 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Write/erase time of nanoseconds in quantum dot based memory structures

International Nuclear Information System (INIS)

Nowozin, Tobias; Marent, Andreas; Geller, Martin; Bimberg, Dieter

2008-01-01

We have developed a novel charge-storage memory concept based on III-V semiconductor quantum dots (QDs) which has a number of fundamental advantages over conventional Si/SiO 2 floating gate memories (Flash): material-tunable and voltage-tunable barriers for improved intrinsic speed and/or storage time and high endurance. To investigate the potential of this new memory concept we have determined intrinsic write/erase times in memory structures based on InAs/GaAs and GaSb/GaAs QDs using capacitance-voltage spectroscopy. We measured a write time below 15 ns independent of the localization energy (i.e. the storage time) of the QDs. This write time is more than three orders of magnitude faster than in a Flash cell and already below the write time of a dynamic random access memory (DRAM). The erase time was determined to be 42 ns for InAs/GaAs QDs and 1.5 ms for GaSb/GaAs QDs for applied electric fields of 166 kV/cm and 206 kV/cm, respectively. From these results we derive an erase time of 1 ns in GaSb QDs for an electric field of 330 kV/cm