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Sample records for effect transistor mosfet

  1. Enhancement of Transistor-to-Transistor Variability Due to Total Dose Effects in 65-nm MOSFETs

    CERN Document Server

    Gerardin, S; Cornale, D; Ding, L; Mattiazzo, S; Paccagnella, A; Faccio, F; Michelis, S

    2015-01-01

    We studied device-to-device variations as a function of total dose in MOSFETs, using specially designed test structures and procedures aimed at maximizing matching between transistors. Degradation in nMOSFETs is less severe than in pMOSFETs and does not show any clear increase in sample-to-sample variability due to the exposure. At doses smaller than 1 Mrad( SiO2) variability in pMOSFETs is also practically unaffected, whereas at very high doses-in excess of tens of Mrad( SiO2)-variability in the on-current is enhanced in a way not correlated to pre-rad variability. The phenomenon is likely due to the impact of random dopant fluctuations on total ionizing dose effects.

  2. Dual metal gate tunneling field effect transistors based on MOSFETs: A 2-D analytical approach

    Science.gov (United States)

    Ramezani, Zeinab; Orouji, Ali A.

    2018-01-01

    A novel 2-D analytical drain current model of novel Dual Metal Gate Tunnel Field Effect Transistors Based on MOSFETs (DMG-TFET) is presented in this paper. The proposed Tunneling FET is extracted from a MOSFET structure by employing an additional electrode in the source region with an appropriate work function to induce holes in the N+ source region and hence makes it as a P+ source region. The electric field is derived which is utilized to extract the expression of the drain current by analytically integrating the band to band tunneling generation rate in the tunneling region based on the potential profile by solving the Poisson's equation. Through this model, the effects of the thin film thickness and gate voltage on the potential, the electric field, and the effects of the thin film thickness on the tunneling current can be studied. To validate our present model we use SILVACO ATLAS device simulator and the analytical results have been compared with it and found a good agreement.

  3. Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study

    Science.gov (United States)

    Schulze, D; Wolff, J; Rottke, D

    2014-01-01

    Objectives: The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Methods: Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO® head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). Results: The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; −5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; −14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; −16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Conclusions: Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region. PMID:25143020

  4. Enhanced Device and Circuit-Level Performance Benchmarking of Graphene Nanoribbon Field-Effect Transistor against a Nano-MOSFET with Interconnects

    Directory of Open Access Journals (Sweden)

    Huei Chaeng Chin

    2014-01-01

    Full Text Available Comparative benchmarking of a graphene nanoribbon field-effect transistor (GNRFET and a nanoscale metal-oxide-semiconductor field-effect transistor (nano-MOSFET for applications in ultralarge-scale integration (ULSI is reported. GNRFET is found to be distinctly superior in the circuit-level architecture. The remarkable transport properties of GNR propel it into an alternative technology to circumvent the limitations imposed by the silicon-based electronics. Budding GNRFET, using the circuit-level modeling software SPICE, exhibits enriched performance for digital logic gates in 16 nm process technology. The assessment of these performance metrics includes energy-delay product (EDP and power-delay product (PDP of inverter and NOR and NAND gates, forming the building blocks for ULSI. The evaluation of EDP and PDP is carried out for an interconnect length that ranges up to 100 μm. An analysis, based on the drain and gate current-voltage (Id-Vd and Id-Vg, for subthreshold swing (SS, drain-induced barrier lowering (DIBL, and current on/off ratio for circuit implementation is given. GNRFET can overcome the short-channel effects that are prevalent in sub-100 nm Si MOSFET. GNRFET provides reduced EDP and PDP one order of magnitude that is lower than that of a MOSFET. Even though the GNRFET is energy efficient, the circuit performance of the device is limited by the interconnect capacitances.

  5. A reliable extraction method for source and drain series resistances in silicon nanowire metal-oxide-semiconductor field-effect-transistors (MOSFETs) based on radio-frequency analysis.

    Science.gov (United States)

    Hwa, Jae Hwa; Yoon, Young Jun; Lee, Hwan Gi; Yoo, Gwan Min; Cho, Eou-Sik; Cho, Seongjae; Lee, Jung-Hee; Kang, In Man

    2014-11-01

    This paper presents a new extraction method for source and drain (S/D) series resistances of silicon nanowire (SNW) metal-oxide-semiconductor field-effect transistors (MOSFETs) based on small-signal radio-frequency (RF) analysis. The proposed method can be applied to the extraction of S/D series resistances for SNW MOSFETs with finite off-state channel resistance as well as gate bias-dependent on-state resistive components realized by 3-dimensional (3-D) device simulation. The series resistances as a function of frequency and gate voltage are presented and compared with the results obtained by an existing method with infinite off-state channel resistance model. The accuracy of the newly proposed parameter extraction method has been successfully verified by Z22- and Y-parameters up to 100 GHz operation frequency.

  6. Identification of Fixed and Interface Trap Charges in Hot-Carrier Stressed Metal Oxide Semiconductor Field Effect Transistors (MOSFET's) through Ultraviolet Light Anneal and Gate Capacitance Measurements

    Science.gov (United States)

    Ling, C.

    1995-01-01

    Fixed and interface trap charges in hot-carrier degraded metal oxide semiconductor field effect transistors (MOSFET's) can be distinguished by ultraviolet light (λ=253.7 nm) annealing, and observing the resultant changes in the gate-to-drain capacitance. Trapped electrons anneal readily, resulting in large changes in the gate capacitance and the threshold voltage. This suggests a trap level below the conduction band edge of SiO2 that is smaller than the photon energy (4.9 eV). In contrast, trapped holes and interface traps do not anneal, or anneal insignificantly even after prolonged irradiation. This is consistent with a much deeper hole trap level in SiO2, generally reported.

  7. MOSFET dosimetry: temperature effects in-vivo

    International Nuclear Information System (INIS)

    Yu, P.K.N.; Cheung, T.; Butson, M.J.; Cancer Services, Wollongong, NSW

    2004-01-01

    Full text: This note investigates temperature effects on dosimetry using a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) for radiotherapy x-ray treatment. This was performed by analysing the dose response and threshold voltage outputs for MOSFET dosimeters as a function of ambient temperature. Results have shown the clinical semiconductor dosimetry system (CSDS) MOSFET provides stable dose measurements with temperatures varying from 15 deg C up to 40 deg C. Thus standard irradiations performed at room temperature can be directly compared to in-vivo dose assessments performed at near body temperature without a temperature correction function. The MOSFET dosimeter threshold voltage varies with temperature and this level is dependant on the dose history of the MOSFET dosimeter. However the variation can be accounted for in the measurement method. For accurate dosimetry the detector should be placed for approximately 60 seconds on a patient to allow thermal equilibrium before measurements are taken with the final reading performed whilst still attached to the patient or conversely left for approximately 120 seconds after removal from the patient if initial readout was measured at room temperature to allow temperature equilibrium to be established. Copyright (2004) Australasian College of Physical Scientists and Engineers in Medicine

  8. Effects of temperature variation on MOSFET dosimetry

    International Nuclear Information System (INIS)

    Cheung Tsang; Butson, Martin J; Yu, Peter K N

    2004-01-01

    This note investigates temperature effects on dosimetry using a metal oxide semiconductor field effect transistor (MOSFET) for radiotherapy x-ray treatment. This was performed by analysing the dose response and threshold voltage outputs for MOSFET dosimeters as a function of ambient temperature. Results have shown that the clinical semiconductor dosimetry system (CSDS) MOSFET provides stable dose measurements with temperatures varying from 15 deg. C up to 40 deg. C. Thus standard irradiations performed at room temperature can be directly compared to in vivo dose assessments performed at near body temperature without a temperature correction function. The MOSFET dosimeter threshold voltage varies with temperature and this level is dependent on the dose history of the MOSFET dosimeter. However, the variation can be accounted for in the measurement method. For accurate dosimetry, the detector should be placed for approximately 60 s on a patient to allow thermal equilibrium before measurements are taken with the final reading performed whilst still attached to the patient or conversely left for approximately 120 s after removal from the patient if initial readout was measured at room temperature to allow temperature equilibrium to be established. (note)

  9. Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology

    International Nuclear Information System (INIS)

    Emigh, Brent; Gordon, Christopher L.; Falkiner, Michelle; Thomas, Karen E.; Connolly, Bairbre L.

    2013-01-01

    There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences 0.18). DAP-to-effective dose conversion factors ranged from 6.5 x 10 -4 mSv per Gy-cm 2 to 4.3 x 10 -3 mSv per Gy-cm 2 for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is < 1 mSv. Estimations of effective dose associated with pediatric UGI examinations can be made for children up to the age of 10 using the DAP-normalized conversion factors provided in this study. These estimates can be further refined to reflect individual hospital examination protocols through the use of direct organ

  10. Towards Modeling the Effects of Lightning Injection on Power MOSFETs

    Science.gov (United States)

    2010-10-01

    an NPN BJT (bi-polar junction transistor ) formed where the n+ source contact is diffused. Fig- ure 8 shows the details of these parasitic components...and analysis of lightning injection on power MOSFET (Metal Oxide Semiconductor Field Effect Transistor ) devices which form an important subset of...ments that are of interest to us for analysis purposes in this paper are the parasitic capacitances. The turn-on of the BJT is undesirable since it

  11. MOSFET-BJT hybrid mode of the gated lateral bipolar junction transistor for C-reactive protein detection.

    Science.gov (United States)

    Yuan, Heng; Kwon, Hyurk-Choon; Yeom, Se-Hyuk; Kwon, Dae-Hyuk; Kang, Shin-Won

    2011-10-15

    In this study, we propose a novel biosensor based on a gated lateral bipolar junction transistor (BJT) for biomaterial detection. The gated lateral BJT can function as both a BJT and a metal-oxide-semiconductor field-effect transistor (MOSFET) with both the emitter and source, and the collector and drain, coupled. C-reactive protein (CRP), which is an important disease marker in clinical examinations, can be detected using the proposed device. In the MOSFET-BJT hybrid mode, the sensitivity, selectivity, and reproducibility of the gated lateral BJT for biosensors were evaluated in this study. According to the results, in the MOSFET-BJT hybrid mode, the gated lateral BJT shows good selectivity and reproducibility. Changes in the emitter (source) current of the device for CRP antigen detection were approximately 0.65, 0.72, and 0.80 μA/decade at base currents of -50, -30, and -10 μA, respectively. The proposed device has significant application in the detection of certain biomaterials that require a dilution process using a common biosensor, such as a MOSFET-based biosensor. Copyright © 2011 Elsevier B.V. All rights reserved.

  12. Radiation sensitivity of MOSFET

    International Nuclear Information System (INIS)

    Labrunee, M.; Tastet, P.; Garnier, J.

    1988-01-01

    Power MOS (Metal Oxide Semiconductor) transistors are widely used in Energy Conversion and radiation sensitivity is important for Space applications. After a review of the characteristics and applications of a MOSFET, we present the radiation tests (electrons flux exposure), and a synthesis about their heavy ions sensitivity). A simulation method of the radiation effect on the MOSFET behaviour used in a power converter is given. Design rules for on board systems using MOSFET are precised [fr

  13. Prognostics of Power MOSFET

    Data.gov (United States)

    National Aeronautics and Space Administration — This paper demonstrates how to apply prognostics to power MOSFETs (metal oxide field effect transistor). The methodology uses thermal cycling to age devices and...

  14. Evidence of the ion's impact position effect on SEB in N-channel power MOSFETs

    International Nuclear Information System (INIS)

    Dachs, C.; Roubaud, F.; Palau, J.M.; Bruguier, G.; Gasiot, J.

    1994-01-01

    Triggering of Single Event Burnout (SEB) in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) is studied by means of experiments and simulations based on real structures. Conditions for destructive and nondestructive events are investigated through current duration observations. The effect of the ion's impact position is experimentally pointed out. Finally, further investigation with 2D MEDICI simulations show that the different regions of the MOSFET cell indeed exhibit different sensitivity with respect to burnout triggering

  15. Strain-engineered MOSFETs

    CERN Document Server

    Maiti, CK

    2012-01-01

    Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Written from an engineering application standpoint, Strain-Engineered MOSFETs introduces promising strain techniques to fabricate strain-engineered MOSFETs and to methods to assess the applications of these techniques. The book provides the background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOSFETs at nanoscale. This book focuses on recent developments in st

  16. Electric field and temperature effects in irradiated MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Silveira, M. A. G., E-mail: marcilei@fei.edu.br; Santos, R. B. B.; Leite, F. G.; Araújo, N. E.; Cirne, K. H.; Melo, M. A. A.; Rallo, A. [Centro Universitário da FEI, São Bernardo do Campo, S.P. (Brazil); Aguiar, Vitor A. P.; Aguirre, F.; Macchione, E. L. A.; Added, N.; Medina, N. H. [Instituto de Física da USP, São Paulo, S.P. (Brazil)

    2016-07-07

    Electronic devices exposed to ionizing radiation exhibit degradation on their electrical characteristics, which may compromise the functionality of the device. Understanding the physical phenomena responsible for radiation damage, which may be specific to a particular technology, it is of extreme importance to develop methods for testing and recovering the devices. The aim of this work is to check the influence of thermal annealing processes and electric field applied during irradiation of Metal Oxide Semiconductor Field Effect Transistors (MOSFET) in total ionizing dose experiments analyzing the changes in the electrical parameters in these devices.

  17. The effect of gate length on SOI-MOSFETS operation | Baedi ...

    African Journals Online (AJOL)

    The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm were simulated. Simulations showed that with a fixed channel length, when the gate ...

  18. The effect of ionizing radiation on analog characteristics of MOSFET

    International Nuclear Information System (INIS)

    Ren Diyuan; Yu Xuefeng; Lu Wu; Gao Wenyu; Fan Long; Zhang Guoqiang; Yan Rongliang

    1994-01-01

    The effects of 60 Co γ-ray on the linearity and output characteristics of MOSFETs were investigated. The relations of oxide-trapped charge and Si/SiO 2 interface state density to the decrease of mobility μ-bar and transconductance g m , and the shift of the output curves for both P-MOSFETs and N-MOSFETs were qualitatively described. It was shown that degradation of analog characteristics, for P-MOSFETs, resulted from both oxide-trapped charge and interface state, but the degradation for N-MOSFETs was mainly due to the increase of radiation induced Si-SiO 2 interface state density

  19. Nanowire field effect transistors principles and applications

    CERN Document Server

    Jeong, Yoon-Ha

    2014-01-01

    “Nanowire Field Effect Transistor: Basic Principles and Applications” places an emphasis on the application aspects of nanowire field effect transistors (NWFET). Device physics and electronics are discussed in a compact manner, together with the p-n junction diode and MOSFET, the former as an essential element in NWFET and the latter as a general background of the FET. During this discussion, the photo-diode, solar cell, LED, LD, DRAM, flash EEPROM and sensors are highlighted to pave the way for similar applications of NWFET. Modeling is discussed in close analogy and comparison with MOSFETs. Contributors focus on processing, electrostatic discharge (ESD) and application of NWFET. This includes coverage of solar and memory cells, biological and chemical sensors, displays and atomic scale light emitting diodes. Appropriate for scientists and engineers interested in acquiring a working knowledge of NWFET as well as graduate students specializing in this subject.

  20. A new technique to control floating body effect in nano-scale double-gate MOSFET

    Science.gov (United States)

    Zare, Meisam; Etaati, Gholamreza

    2014-11-01

    This paper proposes a novel structure of Double Gate (DG) MOSFET to control the impacts of floating body effect. Floating body effect increases hole concentration in the channel region due to the impact ionization. In this novel structure which is named as SiGe Region in DG-MOSFET (SR-DG) two spacers are considered in both sides of gate region and a SiGe zone is incorporated in gate-source spacer. The SiGe region with lower band gap than silicon collects the excess hole in the channel. Our simulation with two dimensional ATLAS simulator shows that the proposed SR-DG improves the performance of DG-MOSFET in terms of threshold voltage, breakdown voltage and electric field. Also, the impacts of parasitic bipolar junction transistor (BJT) are controlled significantly.

  1. Prognostics of Power MOSFETs under Thermal Stress Accelerated Aging using Data-Driven and Model-Based Methodologies

    Data.gov (United States)

    National Aeronautics and Space Administration — An approach for predicting remaining useful life of power MOSFETs (metal oxide field effect transistor) devices has been developed. Power MOSFETs are semiconductor...

  2. Prognostics Of Power Mosfets Under Thermal Stress Accelerated Aging Using Data-Driven And Model-Based Methodologies

    Data.gov (United States)

    National Aeronautics and Space Administration — An approach for predicting remaining useful life of power MOSFETs (metal oxide field effect transistor) devices has been developed. Power MOSFETs are semiconductor...

  3. Fundamentals of nanoscaled field effect transistors

    CERN Document Server

    Chaudhry, Amit

    2013-01-01

    Fundamentals of Nanoscaled Field Effect Transistors gives comprehensive coverage of the fundamental physical principles and theory behind nanoscale transistors. The specific issues that arise for nanoscale MOSFETs, such as quantum mechanical tunneling and inversion layer quantization, are fully explored. The solutions to these issues, such as high-κ technology, strained-Si technology, alternate devices structures and graphene technology are also given. Some case studies regarding the above issues and solution are also given in the book. In summary, this book: Covers the fundamental principles behind nanoelectronics/microelectronics Includes chapters devoted to solutions tackling the quantum mechanical effects occurring at nanoscale Provides some case studies to understand the issue mathematically Fundamentals of Nanoscaled Field Effect Transistors is an ideal book for researchers and undergraduate and graduate students in the field of microelectronics, nanoelectronics, and electronics.

  4. Dimensional effects and scalability of Meta-Stable Dip (MSD) memory effect for 1T-DRAM SOI MOSFETs

    Science.gov (United States)

    Hubert, A.; Bawedin, M.; Cristoloveanu, S.; Ernst, T.

    2009-12-01

    The difficult scaling of bulk Dynamic Random Access Memories (DRAMs) has led to various concepts of capacitor-less single-transistor (1T) architectures based on SOI transistor floating-body effects. Amongst them, the Meta-Stable Dip RAM (MSDRAM), which is a double-gate Fully Depleted SOI transistor, exhibits attractive performances. The Meta-Stable Dip effect results from the reduced junction leakage current and the long carrier generation lifetime in thin silicon film transistors. In this study, various devices with different gate lengths, widths and silicon film thicknesses have been systematically explored, revealing the impact of transistor dimensions on the MSD effect. These experimental results are discussed and validated by two-dimensional numerical simulations. It is found that MSD is maintained for small dimensions even in standard SOI MOSFETs, although specific optimizations are expected to enhance MSDRAM performances.

  5. Multi-valued logic circuits using hybrid circuit consisting of three gates single-electron transistors (TG-SETs) and MOSFETs.

    Science.gov (United States)

    Shin, SeungJun; Yu, YunSeop; Choi, JungBum

    2008-10-01

    New multi-valued logic (MVL) families using the hybrid circuits consisting of three gates single-electron transistors (TG-SETs) and a metal-oxide-semiconductor field-effect transistor (MOSFET) are proposed. The use of SETs offers periodic literal characteristics due to Coulomb oscillation of SET, which allows a realization of binary logic (BL) circuits as well as multi-valued logic (MVL) circuits. The basic operations of the proposed MVL families are successfully confirmed through SPICE circuit simulation based on the physical device model of a TG-SET. The proposed MVL circuits are found to be much faster, but much larger power consumption than a previously reported MVL, and they have a trade-off between speed and power consumption. As an example to apply the newly developed MVL families, a half-adder is introduced.

  6. Modeling quantization effects in field effect transistors

    CERN Document Server

    Troger, C

    2001-01-01

    Numerical simulation in the field of semiconductor device development advanced to a valuable, cost-effective and flexible facility. The most widely used simulators are based on classical models, as they need to satisfy time and memory constraints. To improve the performance of field effect transistors such as MOSFETs and HEMTs these devices are continuously scaled down in their dimensions. Consequently the characteristics of such devices are getting more and more determined by quantum mechanical effects arising from strong transversal fields in the channel. In this work an approach based on a two-dimensional electron gas is used to describe the confinement of the carriers. Quantization is considered in one direction only. For the derivation of a one-dimensional Schroedinger equation in the effective mass framework a non-parabolic correction for the energy dispersion due to Kane is included. For each subband a non-parabolic dispersion relation characterized by subband masses and subband non-parabolicity coeffi...

  7. Etude des transistors MOSFET à barrière Schottky, à canal Silicium et Germanium sur couches minces

    OpenAIRE

    Hutin , Louis

    2010-01-01

    Until the early 2000’s Dennard’s scaling rules at the transistor level have enabled to achieve a performance gain while still preserving the basic structure of the MOSFET building block from one generation to the next. However, this conservative approach has already reached its limits as shown by the introduction of channel stressors for the sub-130 nm technological nodes, and later high-k/metal gate stacks for the sub-65 nm nodes. Despite the introduction of high-k gate dielectrics, constrai...

  8. Scheme for the fabrication of ultrashort channel metal-oxide-semiconductor field-effect transistors

    International Nuclear Information System (INIS)

    Appenzeller, J.; Martel, R.; Solomon, P.; Chan, K.; Avouris, Ph.; Knoch, J.; Benedict, J.; Tanner, M.; Thomas, S.; Wang, K. L.

    2000-01-01

    We present a scheme for the fabrication of ultrashort channel length metal-oxide-semiconductor field-effect transistors (MOSFETs) involving nanolithography and molecular-beam epitaxy. The active channel is undoped and is defined by a combination of nanometer-scale patterning and anisotropic etching of an n ++ layer grown on a silicon on insulator wafer. The method is self-limiting and can produce MOSFET devices with channel lengths of less than 10 nm. Measurements on the first batch of n-MOSFET devices fabricated with this approach show very good output characteristics and good control of short-channel effects. (c) 2000 American Institute of Physics

  9. Potential of carbon nanotube field effect transistors for analogue circuits

    Directory of Open Access Journals (Sweden)

    Khizar Hayat

    2013-11-01

    Full Text Available This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs and metal oxide semiconductor field effect transistors (MOSFETs with special focus on carbon nanotube FET's potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g(m, f(T and f(max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

  10. Potential of carbon nanotube field effect transistors for analogue circuits

    KAUST Repository

    Hayat, Khizar

    2013-05-11

    This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs) and metal oxide semiconductor field effect transistors (MOSFETs) with special focus on carbon nanotube FET\\'s potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g m , f T and f max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

  11. Silicon junctionless field effect transistors as room temperature terahertz detectors

    Science.gov (United States)

    Marczewski, J.; Knap, W.; Tomaszewski, D.; Zaborowski, M.; Zagrajek, P.

    2015-09-01

    Terahertz (THz) radiation detection by junctionless metal-oxide-semiconductor field-effect transistors (JL MOSFETs) was studied and compared with THz detection using conventional MOSFETs. It has been shown that in contrast to the behavior of standard transistors, the junctionless devices have a significant responsivity also in the open channel (low resistance) state. The responsivity for a photolithographically defined JL FET was 70 V/W and the noise equivalent power 460 pW/√Hz. Working in the open channel state may be advantageous for THz wireless and imaging applications because of its low thermal noise and possible high operating speed or large bandwidth. It has been proven that the junctionless MOSFETs can also operate in a zero gate bias mode, which enables simplification of the THz array circuitry. Existing models of THz detection by MOSFETs were considered and it has been demonstrated that the process of detection by these junctionless devices cannot be explained within the framework of the commonly accepted models and therefore requires a new theoretical approach.

  12. Two Dimensional Modeling of III-V Heterojunction Gate All Around Tunnel Field Effect Transistor

    OpenAIRE

    Manjula Vijh; R.S. Gupta; Sujata Pandey

    2017-01-01

    Tunnel Field Effect Transistor is one of the extensively researched semiconductor devices, which has captured attention over the conventional Metal Oxide Semiconductor Field Effect Transistor. This device, due to its varied advantages, is considered in applications where devices are scaled down to deep sub-micron level. Like MOSFETs, many geometries of TFETs have been studied and analyzed in the past few years. This work, presents a two dimensional analytical model for a III-V Heterojunction ...

  13. Assessment of Phospohrene Field Effect Transistors

    Science.gov (United States)

    2018-01-28

    Promising transistors based on a few layers of phosphorus atoms," in IEEE MTT-5 IMWS- AMP , Suzhou, China, Jul. 2015, pp. 1-3. DOI: 10.1109/LED...2014.2362841. DOI: 10.1109/IMWS- AMP .2015.7324944. Keywords: Contacts, dielectric films, MOSFETs, passivation, stability. [5] X. Luo, K. Xiong, J.C. M. Hwang, Y

  14. TID and Displacement Damage Effects in Vertical and Lateral Power MOSFETs for Integrated DC-DC Converters

    CERN Document Server

    Faccio, F; Michelis, S; Faccio, Federico; Fuentes, C; Allongue, B; Sorge, R; Orlandi, S

    2010-01-01

    TID and displacement damage effects are studied for vertical and lateral power MOSFETs in five different technologies in view of the development of radiation-tolerant fully integrated DC-DC converters. Investigation is pushed to the very high level of radiation expected for an upgrade to the LHC experiments. TID induces threshold voltage shifts and, in n-channel transistors, source-drain leakage currents. Wide variability in the magnitude of these effects is observed. Displacement damage increases the on-resistance of both vertical and lateral high-voltage transistors. In the latter case, degradation at high particle fluence might lead to a distortion of the output characteristics curve. HBD techniques to limit or eliminate the radiation-induced leakage currents are successfully applied to these high-voltage transistors, but have to be used carefully to avoid consequences on the breakdown voltage.

  15. Mathematical Models of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field effect Transistor

    Science.gov (United States)

    Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

    2013-01-01

    Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric- semiconductor field effect transistors (MOSFETs) are developed in this paper. The models are compared against data collected with MOSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth as well as differences and advantages as compared to the performance of each circuit using a MOSFET.

  16. Optimal design of an electret microphone metal-oxide-semiconductor field-effect transistor preamplifier.

    Science.gov (United States)

    van der Donk, A G; Bergveld, P

    1992-04-01

    A theoretical noise analysis of the combination of a capacitive microphone and a preamplifier containing a metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-value resistive bias element is given. It is found that the output signal-to-noise ratio for a source follower and for a common-source circuit is almost the same. It is also shown that the output noise can be reduced by making the microphone capacitance as well as the bias resistor as large as possible, and furthermore by keeping the parasitic gate capacitances as low as possible and finally by using an optimum value for the gate area of the MOSFET. The main noise source is the thermal noise of the gate leakage resistance of the MOSFET. It is also shown that short-channel MOSFETs produce more thermal channel noise than longer channel devices.

  17. Effective-mass approach for n-type semiconductor nanowire MOSFETs arbitrarily oriented

    International Nuclear Information System (INIS)

    Bescond, Marc; Cavassilas, Nicolas; Lannoo, Michel

    2007-01-01

    A method which calculates the effective masses in arbitrarily oriented semiconductor nanowires is presented. In order to avoid the full three-dimensional (3D) resolution of the Schroedinger equation, the method decouples within a Cartesian system the transport direction from the cross section. Results give the new effective mass expressions for each valley and channel orientation. As a direct application, transport in [100]-oriented Ge nanowire metal-oxide-semiconductor field-effect transistors (MOSFETs) is then studied by using a self-consistent 'mode-space' approach expressed in the nonequilibrium Green's function formalism. Along this wire orientation, we show that the effective masses resulting from our approach are very close to the one obtained using a sp 3 tight-binding band-structure calculation for nanowires as thin as 4 nm

  18. Effective-mass approach for n-type semiconductor nanowire MOSFETs arbitrarily oriented

    Energy Technology Data Exchange (ETDEWEB)

    Bescond, Marc [Institut de Microelectronique, Electromagnetisme et Photonique (IMEP, UMR CNRS 5130)-MINATEC, 3 Parvis Louis Neel, BP 257, F-38016 Grenoble Cedex 1 (France); Cavassilas, Nicolas [Laboratoire Materiaux et Microelectronique de Provence (L2MP, UMR CNRS 6137), Batiment IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13 (France); Lannoo, Michel [Laboratoire Materiaux et Microelectronique de Provence (L2MP, UMR CNRS 6137), Batiment IRPHE, 49 rue Joliot-Curie, BP 146, F-13384 Marseille Cedex 13 (France)

    2007-06-27

    A method which calculates the effective masses in arbitrarily oriented semiconductor nanowires is presented. In order to avoid the full three-dimensional (3D) resolution of the Schroedinger equation, the method decouples within a Cartesian system the transport direction from the cross section. Results give the new effective mass expressions for each valley and channel orientation. As a direct application, transport in [100]-oriented Ge nanowire metal-oxide-semiconductor field-effect transistors (MOSFETs) is then studied by using a self-consistent 'mode-space' approach expressed in the nonequilibrium Green's function formalism. Along this wire orientation, we show that the effective masses resulting from our approach are very close to the one obtained using a sp{sup 3} tight-binding band-structure calculation for nanowires as thin as 4 nm.

  19. Spin Hall effect transistor

    Czech Academy of Sciences Publication Activity Database

    Wunderlich, Joerg; Park, B.G.; Irvine, A.C.; Zarbo, Liviu; Rozkotová, E.; Němec, P.; Novák, Vít; Sinova, Jairo; Jungwirth, Tomáš

    2010-01-01

    Roč. 330, č. 6012 (2010), s. 1801-1804 ISSN 0036-8075 R&D Projects: GA AV ČR KAN400100652; GA MŠk LC510 EU Projects: European Commission(XE) 215368 - SemiSpinNet Grant - others:AV ČR(CZ) AP0801 Program:Akademická prémie - Praemium Academiae Institutional research plan: CEZ:AV0Z10100521 Keywords : spin Hall effect * spintronics * spin transistor Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 31.364, year: 2010

  20. 60Co-Gamma Ray Induced Total Dose Effects on P-Channel MOSFETs

    Directory of Open Access Journals (Sweden)

    Shashank Nagaraj

    2013-01-01

    Full Text Available Total Dose Effect (TDE on solid state devices is of serious concern as it changes the electrical properties leading to degradation of the devices and failure of the systems associated with them. Ionization caused due to TDE in commercial P-channel Metal Oxide Semiconductor Field Effect Transistors (MOSFETs has been studied, where the failure mechanism is found to be mainly a result of the changes in the oxide properties and the surface effects at the channel beneath the gate oxide. The threshold voltage of the MOSFETs was found to shift from −0.69 V to −2.41 V for a total gamma dose of 1 Mrad. The net negative threshold shifts in the irradiated devices reveal the major contribution of oxide trapped charges to device degradation. The radiation induced oxide and interface charge densities were estimated through subthreshold measurements, and the trap densities were found to increase by one order in magnitude after a total gamma dose of 1 Mrad. Other parameters like transconductance, subthreshold swing, and drain saturation current are also investigated as a function of gamma dose.

  1. Novel Indium Arsenide double gate and gate all around nanowire MOSFETs for diminishing the exchange correlation effect: A quantum study

    Science.gov (United States)

    Orouji, Ali A.; Nejaty, Mohammad; Mohtasham, Alireza

    2014-09-01

    In this paper we present novel double gate (DG) metal oxide semiconductor field effect transistor (MOSFET) and gate all around (GAA) nanowire metal oxide semiconductor field effect transistor (NWT) with a diminished exchange-correlation (Ex-Corr) effect. The key idea in this work is to use Indium Arsenide (InAs) semiconductor instead of Si. We have evaluated and compared different parameters of DG-MOSFET and GAA-NWTs such as threshold voltage, sub-threshold slope, drain induced barrier lowering and ON and OFF state currents from quantum view. Quantum mechanical transport approach based on non-equilibrium green's function (NEGF) has been performed in the frame work of effective mass theory in consideration with Ex-Corr effect. This simulation method consists of three dimensional Poisson's equation in which a Schrodinger equation is first solved in each slice of the device to find Eigen energies and Eigen functions. Then, a transport equation of electrons moving in the sub-bands is solved. This fully quantum method treats such effects as source-to-drain tunneling, ballistic transport, and quantum confinement on equal footing. The results show that only a few lowest Eigen sub-bands are occupied and the upper sub-bands can be safely neglected. Also, the interaction between electrons and Ex-Corr effect is diminished in the proposed structure.

  2. A new memory effect (MSD) in fully depleted SOI MOSFETs

    Science.gov (United States)

    Bawedin, M.; Cristoloveanu, S.; Yun, J. G.; Flandre, D.

    2005-09-01

    We demonstrate that the transconductance and drain current of fully depleted MOSFETs can display an interesting time-dependent hysteresis. This new memory effect, called meta-stable dip (MSD), is mainly due to the long carrier generation lifetime in the silicon film. Our parametric analysis shows that the memory window can be adjusted in view of practical applications. Various measurement conditions and devices with different doping, front oxide and silicon film thicknesses are systematically explored. The MSD effect can be generalized to several fully depleted CMOS technologies. The MSD mechanism is discussed and validated by two-dimensional simulations results.

  3. Numerical study of self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride substrate

    International Nuclear Information System (INIS)

    Ding Yanfang; Zhu Ziqiang; Zhu Ming; Lin Chenglu

    2006-01-01

    Compared with bulk-silicon technology, silicon-on-insulator (SOI) technology possesses many advantages but it is inevitable that the buried silicon dioxide layer also thermally insulates the metal-oxide-silicon field-effect transistors (MOSFETs) from the bulk due to the low thermal conductivity. One of the alternative insulator to replace the buried oxide layer is aluminum nitride (MN), which has a thermal conductivity that is about 200 times higher than that of SiO 2 (320 W·m -1 ·K -1 versus 1.4 W·m -1 ·K -l ). To investigate the self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride (SOAN) substrate, a two-dimensional numerical analysis is performed by using a device simulator called MEDICI run on a Solaris workstation to simulate the electrical characteristics and temperature distribution by comparing with those of bulk and standard SOI MOSFETs. Our study suggests that AIN is a suitable alternative to silicon dioxide as a buried dielectric in SOI and expands the applications of SOI to high temperature conditions. (authors)

  4. Silicon Power MOSFETs

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan; Campola, Michael; Ladbury, Raymond; Label, Kenneth; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

    2017-01-01

    Recent work for the NASA Electronic Parts and Packaging Program Power MOSFET task is presented. The Task technology focus, roadmap, and partners are given. Recent single-event effect test results on commercial, automotive, and radiation hardened trench power MOSFETs are summarized with an emphasis on risk of using commercial and automotive trench-gate power MOSFETs in space applications.

  5. Electrical characterization of Ω-gated uniaxial tensile strained Si nanowire-array metal-oxide-semiconductor field effect transistors with - and channel orientations

    International Nuclear Information System (INIS)

    Habicht, Stefan; Feste, Sebastian; Zhao, Qing-Tai; Buca, Dan; Mantl, Siegfried

    2012-01-01

    Nanowire-array metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated along and crystal directions on (001) un-/strained silicon-on-insulator substrates. Lateral strain relaxation through patterning was employed to transform biaxial tensile strain into uniaxial tensile strain along the nanowire. Devices feature ideal subthreshold swings and maximum on-current/off-current ratios of 10 11 for n and p-type transistors on both substrates. Electron and hole mobilities were extracted by split C–V method. For p-MOSFETs an increased mobility is observed for channel direction devices compared to devices. The n-MOSFETs showed a 45% increased electron mobility compared to devices. The comparison of strained and unstrained n-MOSFETs along and clearly demonstrates improved electron mobilities for strained channels of both channel orientations.

  6. Single photon sources in 4H-SiC metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Abe, Y.; Umeda, T.; Okamoto, M.; Kosugi, R.; Harada, S.; Haruyama, M.; Kada, W.; Hanaizumi, O.; Onoda, S.; Ohshima, T.

    2018-01-01

    We present single photon sources (SPSs) embedded in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). They are formed in the SiC/SiO2 interface regions of wet-oxidation C-face 4H-SiC MOSFETs and were not found in other C-face and Si-face MOSFETs. Their bright room-temperature photoluminescence (PL) was observed in the range from 550 to 750 nm and revealed variable multi-peak structures as well as variable peak shifts. We characterized a wide variety of their PL spectra as the inevitable variation of local atomic structures at the interface. Their polarization dependence indicates that they are formed at the SiC side of the interface. We also demonstrate that it is possible to switch on/off the SPSs by a bias voltage of the MOSFET.

  7. Electronic Model of a Ferroelectric Field Effect Transistor

    Science.gov (United States)

    MacLeod, Todd C.; Ho, Fat Duen; Russell, Larry (Technical Monitor)

    2001-01-01

    A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. T'he input and o Output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. No attempt was made to model the high frequency characteristics of the FFET. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and is compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.

  8. Verification of angular dependence in MOSFET detector

    International Nuclear Information System (INIS)

    Souza, Clayton H.; Shorto, Julian M.B.; Siqueira, Paulo T.D.; Nunes, Maíra G.; Silva Junior, Iremar A.; Yoriyaz, Hélio

    2017-01-01

    In vivo dosimetry is an essential tool for quality assurance programs, being a procedure commonly performed with thermoluminescent dosimeters (TLDs) or diodes. However, a type of dosimeter that has increasing popularity in recent years is the metal-oxide-semiconductor field effect transistor (MOSFET) detector. MOSFET dosimeters fulfill all the necessary characteristics to realize in vivo dosimetry since it has a small size, good precision and feasibility of measurement, as well as easy handling. Nevertheless, its true differential is to allow reading of the dose in real time, enabling immediate intervention in the correction of physical parameters deviations and anticipation of small anatomical changes in a patient during treatment. In order for MOSFET dosimeter to be better accepted in clinical routine, information reporting performance should be available frequently. For this reason, this work proposes to verify reproducibility and angular dependence of a standard sensitivity MOSFET dosimeter (TN-502RD-H) for Cs-137 and Co-60 sources. Experimental data were satisfactory and MOSFET dosimeter presented a reproducibility of 3.3% and 2.7% (1 SD) for Cs-137 and Co-60 sources, respectively. In addition, an angular dependence of up to 6.1% and 16.3% for both radioactive sources, respectively. It is conclusive that MOSFET dosimeter TN-502RD-H has satisfactory reproducibility and a considerable angular dependence, mainly for the Co-60 source. This means that although precise measurements, special attention must be taken for applications in certain anatomical regions in a patient. (author)

  9. Verification of angular dependence in MOSFET detector

    Energy Technology Data Exchange (ETDEWEB)

    Souza, Clayton H.; Shorto, Julian M.B.; Siqueira, Paulo T.D.; Nunes, Maíra G.; Silva Junior, Iremar A.; Yoriyaz, Hélio, E-mail: chsouza@usp.br [Instituto de Pesquisas Energeticas e Nucleares (IPEN/CNEN-SP), Sao Paulo, SP (Brazil)

    2017-07-01

    In vivo dosimetry is an essential tool for quality assurance programs, being a procedure commonly performed with thermoluminescent dosimeters (TLDs) or diodes. However, a type of dosimeter that has increasing popularity in recent years is the metal-oxide-semiconductor field effect transistor (MOSFET) detector. MOSFET dosimeters fulfill all the necessary characteristics to realize in vivo dosimetry since it has a small size, good precision and feasibility of measurement, as well as easy handling. Nevertheless, its true differential is to allow reading of the dose in real time, enabling immediate intervention in the correction of physical parameters deviations and anticipation of small anatomical changes in a patient during treatment. In order for MOSFET dosimeter to be better accepted in clinical routine, information reporting performance should be available frequently. For this reason, this work proposes to verify reproducibility and angular dependence of a standard sensitivity MOSFET dosimeter (TN-502RD-H) for Cs-137 and Co-60 sources. Experimental data were satisfactory and MOSFET dosimeter presented a reproducibility of 3.3% and 2.7% (1 SD) for Cs-137 and Co-60 sources, respectively. In addition, an angular dependence of up to 6.1% and 16.3% for both radioactive sources, respectively. It is conclusive that MOSFET dosimeter TN-502RD-H has satisfactory reproducibility and a considerable angular dependence, mainly for the Co-60 source. This means that although precise measurements, special attention must be taken for applications in certain anatomical regions in a patient. (author)

  10. Calibration and error analysis of metal-oxide-semiconductor field-effect transistor dosimeters for computed tomography radiation dosimetry.

    Science.gov (United States)

    Trattner, Sigal; Prinsen, Peter; Wiegert, Jens; Gerland, Elazar-Lars; Shefer, Efrat; Morton, Tom; Thompson, Carla M; Yagil, Yoad; Cheng, Bin; Jambawalikar, Sachin; Al-Senan, Rani; Amurao, Maxwell; Halliburton, Sandra S; Einstein, Andrew J

    2017-12-01

    Metal-oxide-semiconductor field-effect transistors (MOSFETs) serve as a helpful tool for organ radiation dosimetry and their use has grown in computed tomography (CT). While different approaches have been used for MOSFET calibration, those using the commonly available 100 mm pencil ionization chamber have not incorporated measurements performed throughout its length, and moreover, no previous work has rigorously evaluated the multiple sources of error involved in MOSFET calibration. In this paper, we propose a new MOSFET calibration approach to translate MOSFET voltage measurements into absorbed dose from CT, based on serial measurements performed throughout the length of a 100-mm ionization chamber, and perform an analysis of the errors of MOSFET voltage measurements and four sources of error in calibration. MOSFET calibration was performed at two sites, to determine single calibration factors for tube potentials of 80, 100, and 120 kVp, using a 100-mm-long pencil ion chamber and a cylindrical computed tomography dose index (CTDI) phantom of 32 cm diameter. The dose profile along the 100-mm ion chamber axis was sampled in 5 mm intervals by nine MOSFETs in the nine holes of the CTDI phantom. Variance of the absorbed dose was modeled as a sum of the MOSFET voltage measurement variance and the calibration factor variance, the latter being comprised of three main subcomponents: ionization chamber reading variance, MOSFET-to-MOSFET variation and a contribution related to the fact that the average calibration factor of a few MOSFETs was used as an estimate for the average value of all MOSFETs. MOSFET voltage measurement error was estimated based on sets of repeated measurements. The calibration factor overall voltage measurement error was calculated from the above analysis. Calibration factors determined were close to those reported in the literature and by the manufacturer (~3 mV/mGy), ranging from 2.87 to 3.13 mV/mGy. The error σ V of a MOSFET voltage

  11. Serializing off-the-shelf MOSFETs by Magnetically Coupling Their Gate Electrodes

    DEFF Research Database (Denmark)

    Dimopoulos, Emmanouil; Munk-Nielsen, Stig

    2013-01-01

    While the semiconductor industry struggles with the inherent trade-offs of solid-state devices, serialization of power switches, like the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) or the Insulated Gate Bipolar Transistor (IGBT), has been proven to be an advantageous alternative...

  12. Tunneling field effect transistor technology

    CERN Document Server

    Chan, Mansun

    2016-01-01

    This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency. · Provides comprehensive reference to tunneling field effect transistors (TFETs); · Covers all aspects of TFETs, from device process to modeling and applications; · Enables design of power-efficient integrated circuits, with low power consumption TFETs.

  13. Performance analysis of SOI MOSFET with rectangular recessed channel

    International Nuclear Information System (INIS)

    Singh, M; Mishra, G P; Mishra, S; Mohanty, S S

    2016-01-01

    In this paper a two dimensional (2D) rectangular recessed channel–silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed. (paper)

  14. The effects of ionizing radiation on commercial power MOSFETs operated at cryogenic temperatures

    International Nuclear Information System (INIS)

    Johnson, G.H.; Kemp, W.T.; Ackermann, M.R.; Pugh, R.D.; Schrimpf, R.D.; Galloway, K.F.

    1994-01-01

    This is the first report of commercial n- and p-channel power MOSFETs exposed to ionizing radiation while operating in a cryogenic environment. The transistors were exposed to low energy x-rays while placed in a liquid nitrogen-cooled dewar. Results demonstrate significant performance and survivability advantages for space-borne power MOSFETs operated at cryogenic temperatures. The key advantages for low-temperature operation of power MOSFET's in an ionizing radiation environment are: (1) steeper subthreshold current slope before and after irradiation; (2) lower off-state leakage currents before and after irradiation; and (3) larger prerad threshold voltage for n-channel devices. The first two points are also beneficial for devices that are not irradiated, but the advantages are more significant in radiation environments. The third point is only an advantage for commercial devices operated in radiation environments. Results also demonstrate that commercial off-the-shelf power MOSFETs can be used for low-temperature operations in a limited total dose environment (i.e., many space applications)

  15. Loss analysis and optimum design of a highly efficient and compact CMOS DC–DC converter with novel transistor layout using 60 nm multipillar-type vertical body channel MOSFET

    Science.gov (United States)

    Itoh, Kazuki; Endoh, Tetsuo

    2018-04-01

    In this paper, we present a novel transistor layout of multi pillar-type vertical body-channel (BC) MOSFET for cascode power switches for improving the efficiency and compactness of CMOS DC–DC converters. The proposed layout features a stacked and multifingered layout to suppress the loss due to parasitic components such as diffusion resistance and contact resistance. In addition, the loss of each MOSFET, which configures cascode power switches, is analyzed, and it is revealed that the total optimum gate width and loss with the high-side (HS) n-type MOSFET topology are 27 and 16% smaller than those with the HS p-type MOSFET topology, respectively. Moreover, a circuit simulation of 2.0 to 0.8 V, 100 MHz CMOS DC–DC converters with the proposed layout is carried out by using experimentally extracted models of BSIM4 60 nm vertical BC MOSFETs. The peak efficiency of the HS n-type MOSFET converter with the proposed layout is 90.1%, which is 6.0% higher than that with the conventional layout.

  16. Hall effect mobility for SiC MOSFETs with increasing dose of nitrogen implantation into channel region

    Science.gov (United States)

    Noguchi, Munetaka; Iwamatsu, Toshiaki; Amishiro, Hiroyuki; Watanabe, Hiroshi; Kita, Koji; Yamakawa, Satoshi

    2018-04-01

    The Hall effect mobility (μHall) of the Si-face 4H-SiC metal–oxide–semiconductor field effect transistor (MOSFET) with a nitrogen (N)-implanted channel region was investigated by increasing the N dose. The μHall in the channel region was systematically examined regarding channel structures, that is, the surface and buried channels. It was experimentally demonstrated that increasing the N dose results in an improvement in μHall in the channel region due to the formation of the buried channel. However, further increase in N dose was found to decrease the μHall in the channel region, owing to the decrease in the electron mobility in the N-implanted bulk region.

  17. Comparison of LDD and double-gate MOSFET for nanoscale devices

    Science.gov (United States)

    Ko, Suk-woong; Kim, Jae-hong; Jung, Hak-kee

    2002-11-01

    In short channel MOSFETs (metal oxide semiconductor field effect transistors), the effective channel length can be substantially shortened, leading to a slope in the saturated I-V characteristic that is analogous to the Early effect for BJT. These SCE(short channel effect) problems have been solved using the LDD(lightly doped drain) structure, but can't be completely solved at nano scale gate. To complete weakness of LDD, we have designed the MOSFET which has the DG(double gate) structure. For comparing LDD with DG MOSFETs, we have used the TCAD simulator. The structures of LDD and DG MOSFETs have been designed and simulated by the DIOS tool and the electrical characteristics simulated by the DESSIS tool in TCAD. The I-V characteristic is not good in LDD but it is very excellent in DG MOSFET of sub-50nm gate.

  18. Field Effect Transistor in Nanoscale

    Science.gov (United States)

    2017-04-26

    significant alteration in transport behaviour of these molecular junctions. 15. SUBJECT TERMS Theory , Nanoscale, Field Effect Transistor (FET), Devices...Density Functional Theory (DFT), Non-equilibrium Green Function 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT SAR 18. NUMBER OF PAGES     13...Keep in mind the amount of funding you received relative to the amount of effort you put into the report. References: 1. J. R. Heath and M

  19. CMOS-compatible batch processing of monolayer MoS2 MOSFETs

    Science.gov (United States)

    Xiong, Kuanchen; Kim, Hyun; Marstell, Roderick J.; Göritz, Alexander; Wipf, Christian; Li, Lei; Park, Ji-Hoon; Luo, Xi; Wietstruck, Matthias; Madjar, Asher; Strandwitz, Nicholas C.; Kaynak, Mehmet; Lee, Young Hee; Hwang, James C. M.

    2018-04-01

    Thousands of high-performance 2D metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated on wafer-scale chemical vapor deposited MoS2 with fully-CMOS-compatible processes such as photolithography and aluminum metallurgy. The yield was greater than 50% in terms of effective gate control with less-than-10 V threshold voltage, even for MOSFETs having deep-submicron gate length. The large number of fabricated MOSFETs allowed statistics to be gathered and the main yield limiter to be attributed to the weak adhesion between the transferred MoS2 and the substrate. With cut-off frequencies approaching the gigahertz range, the performances of the MOSFETs were comparable to that of state-of-the-art MoS2 MOSFETs, whether the MoS2 was grown by a thin-film process or exfoliated from a bulk crystal.

  20. Experimental study on vertical scaling of InAs-on-insulator metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Kim, SangHyeon; Yokoyama, Masafumi; Nakane, Ryosho; Ichikawa, Osamu; Osada, Takenori; Hata, Masahiko; Takenaka, Mitsuru; Takagi, Shinichi

    2014-06-01

    We have investigated effects of the vertical scaling on electrical properties in extremely thin-body InAs-on-insulator (-OI) metal-oxide-semiconductor field-effect transistors (MOSFETs). It is found that the body thickness (Tbody) scaling provides better short channel effect (SCE) control, whereas the Tbody scaling also causes the reduction of the mobility limited by channel thickness fluctuation (δTbody) scattering (μfluctuation). Also, in order to achieve better SCEs control, the thickness of InAs channel layer (Tchannel) scaling is more favorable than the thickness of MOS interface buffer layer (Tbuffer) scaling from a viewpoint of a balance between SCEs control and μfluctuation reduction. These results indicate necessity of quantum well channel structure in InAs-OI MOSFETs and these should be considered in future transistor design.

  1. Comparative Study of Si and SiC MOSFETs for High Voltage Class D Audio Amplifiers

    DEFF Research Database (Denmark)

    Nielsen, Dennis; Knott, Arnold; Andersen, Michael A. E.

    2014-01-01

    Silicon (Si) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) are traditional utilised in class D audio amplifiers. It has been proposed to replace the traditional inefficient electrodynamic transducer with the electrostatic transducer. This imposes new high voltage requirements...... on the MOSFETs of class D amplifiers, and significantly reduces the selection of suitable MOSFETs. As a consequence it is investigated, if Silicon-Carbide (SiC) MOSFETs could represent a valid alternative. The theory of pulse timing errors are revisited for the application of high voltage and capactive loaded...... class D amplifiers. It is shown, that SiC MOSFETs can compete with Si MSOFETs in terms of THD. Validation is done using simulations and a 500 V amplifier driving a 100 nF load. THD+N below 0.3 % is reported...

  2. Simulation of dual-gate SOI MOSFET with different dielectric layers

    Science.gov (United States)

    Yadav, Jyoti; Chaudhary, R.; Mukhiya, R.; Sharma, R.; Khanna, V. K.

    2016-04-01

    The paper presents the process design and simulation of silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG-MOSFET) stacked with different dielectric layers on the top of gate oxide. A detailed 2D process simulation of SOI-MOSFETs and its electrical characterization has been done using SILVACO® TCAD tool. A variation in transconductance was observed with different dielectric layers, AlN-gate MOSFET having the highest tranconductance value as compared to other three dielectric layers (SiO2, Si3N4 and Al2O3).

  3. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    OpenAIRE

    C. Spathis; A. Birbas; K. Georgakopoulou

    2015-01-01

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions ...

  4. Gate controlled magnetoresistance in a silicon metal-oxide-semiconductor field-effect-transistor

    Science.gov (United States)

    Ciccarelli, C.; Park, B. G.; Ogawa, S.; Ferguson, A. J.; Wunderlich, J.

    2010-08-01

    We present a study of the magnetoresistance (MR) of a Si metal-oxide-semiconductor field-effect-transistor (MOSFET) at the break-down regime when a magnetic field is applied perpendicular to the plane of the device. We have identified two different regimes where we observe a large and gate-voltage dependent MR. We suggest two different mechanisms which can explain the observed high MR. Moreover, we have studied how the MR of the MOSFET scales with the dimensions of the channel for gate voltages below the threshold. We observed a decrease in the MR by two orders of magnitude by reducing the dimensions of the channel from 50×280 μm2 to 5×5 μm2.

  5. Irradiation effect on back-gate graphene field-effect transistor

    Science.gov (United States)

    Chen, Xinlu; Srivastava, Ashok; Sharma, Ashwani K.; Mayberry, Clay

    2017-05-01

    The effects of irradiations on MOSFET and bipolar junction transistors are well known though irradiation mechanisms in two-dimensional graphene and related devices are still being investigated. In this work, we investigate irradiation mechanism based on a semi-empirical model for the graphene back-gate transistor and quantitatively analyze the irradiation influences on electrical properties of the device structure. The irradiation shifts the current which changes the region of device operation, degrades the mobility and increases the channel resistance which can increase the power dissipation. The main mechanism causing the degradation in performance of devices is the oxide trap charges near the SiO2/graphene interface and graphene layer traps charges.

  6. COMPARATIVE ANALYSIS OF QUANTUM EFFECTS IN NANOSCALE MULTIGATE MOSFETS USING VARIATIONAL APPROACH

    Directory of Open Access Journals (Sweden)

    V. PALANICHAMY

    2015-02-01

    Full Text Available In this work, the performance of multiple-gate SOI MOSFETs is analysed using variational approach including quantum effects. An analytical model is derived to accounting the quantum effects at the silicon (Si/silicon dioxide (SiO2 interface. A general procedure is used for calculating the quantum inversion charge density. Using this inversion charge density, the drain current is obtained. Our model results are compared with the simulation results and its shows very good agreement. Our results highlighted that cylindrical surrounding gate MOSFET is a good candidate to obtain the high drain current compared with other two devices.

  7. An accurate simulation study on capacitance-voltage characteristics of metal-oxide-semiconductor field-effect transistors in novel structures

    Science.gov (United States)

    Yu, Eunseon; Cho, Seongjae; Park, Byung-Gook

    2017-09-01

    An essential and important method for physical and electrical characterization of a metal-oxide-semiconductor (MOS) structure is the capacitance-voltage (C-V) measurement. Judging from the C-V characteristics of a MOS structure, we are allowed to predict the DC and AC behaviors of the field-effect transistor and extract a set of primary parameters. The MOS field-effect transistor (MOSFET) technology has evolved to enhance the gate controllability over the channel in order for effectively suppressing the short-channel effects (SCEs) unwantedly taking place as device scaling progresses. For the goal, numerous novel structures have been suggested for the advanced MOSFET devices. However, the C-V characteristics of such novel MOS structures have not been seldom studied in depth. In this work, we report the C-V characteristics of ultra-thin-body (UTB) MOSFETs on the bulk Si and silicon-on-insulator (SOI) substrates by rigorous technology computer-aided design (TCAD) simulation. For higher credibility and accuracy, quantum-mechanical models are activated and empirical material parameters are employed from the existing literature. The MOSFET structure and the material configurations are schemed referring advanced logic technology suggested by the most recent technology roadmap. The C-V characteristics of UTB MOSFETs having a floating body with extremely small volume are closely investigated.

  8. Investigation of Short Channel Effect on Vertical Structures in Nanoscale MOSFET

    Directory of Open Access Journals (Sweden)

    Munawar A. Riyadi

    2009-12-01

    Full Text Available The recent development of MOSFET demands innovative approach to maintain the scaling into nanoscale dimension. This paper focuses on the physical nature of vertical MOSFET in nanoscale regime. Vertical structure is one of the promising devices in further scaling, with relaxed-lithography feature in the manufacture. The comparison of vertical and lateral MOSFET performance for nanoscale channel length (Lch is demonstrated with the help of numerical tools. The evaluation of short channel effect (SCE parameters, i.e. threshold voltage roll-off, subthreshold swing (SS, drain induced barrier lowering (DIBL and leakage current shows the considerable advantages as well as its thread-off in implementing the structure, in particular for nanoscale regime.

  9. Nanowire Field-Effect Transistors : Sensing Simplicity?

    NARCIS (Netherlands)

    Mescher, M.

    2014-01-01

    Silicon nanowires are structures made from silicon with at least one spatial dimension in the nanometer regime (1-100 nm). From these nanowires, silicon nanowire field-effect transistors can be constructed. Since their introduction in 2001 silicon nanowire field-effect transistors have been studied

  10. New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors.

    Science.gov (United States)

    Shih, Cheng Wei; Chin, Albert

    2016-08-03

    At an ultrathin 5 nm, we report a new high-mobility tin oxide (SnO2) metal-oxide-semiconductor field-effect transistor (MOSFET) exhibiting extremely high field-effect mobility values of 279 and 255 cm(2)/V-s at 145 and 205 °C, respectively. These values are the highest reported mobility values among all wide-band-gap semiconductors of GaN, SiC, and metal-oxide MOSFETs, and they also exceed those of silicon devices at the aforementioned elevated temperatures. For the first time among existing semiconductor transistors, a new device physical phenomenon of a higher mobility value was measured at 45-205 °C than at 25 °C, which is due to the lower optical phonon scattering by the large SnO2 phonon energy. Moreover, the high on-current/off-current of 4 × 10(6) and the positive threshold voltage of 0.14 V at 25 °C are significantly better than those of a graphene transistor. This wide-band-gap SnO2 MOSFET exhibits high mobility in a 25-205 °C temperature range, a wide operating voltage of 1.5-20 V, and the ability to form on an amorphous substrate, rendering it an ideal candidate for multifunctional low-power integrated circuit (IC), display, and brain-mimicking three-dimensional IC applications.

  11. Coulomb blockade in a Si channel gated by an Al single-electron transistor

    OpenAIRE

    Sun, L.; Brown, K. R.; Kane, B. E.

    2007-01-01

    We incorporate an Al-AlO_x-Al single-electron transistor as the gate of a narrow (~100 nm) metal-oxide-semiconductor field-effect transistor (MOSFET). Near the MOSFET channel conductance threshold, we observe oscillations in the conductance associated with Coulomb blockade in the channel, revealing the formation of a Si single-electron transistor. Abrupt steps present in sweeps of the Al transistor conductance versus gate voltage are correlated with single-electron charging events in the Si t...

  12. Modeling of anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene metal-oxide semiconductor field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Jiwon [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

    2015-06-07

    Ballistic transport characteristics of metal-oxide semiconductor field effect transistors (MOSFETs) based on anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene are explored through quantum transport simulations. We focus on the effects of the channel crystal orientation and the channel length scaling on device performances. Especially, the role of degenerate conduction band (CB) valleys in monolayer HfS{sub 2} is comprehensively analyzed. Benchmarking monolayer HfS{sub 2} with phosphorene MOSFETs, we predict that the effect of channel orientation on device performances is much weaker in monolayer HfS{sub 2} than in phosphorene due to the degenerate CB valleys of monolayer HfS{sub 2}. Our simulations also reveal that at 10 nm channel length scale, phosphorene MOSFETs outperform monolayer HfS{sub 2} MOSFETs in terms of the on-state current. However, it is observed that monolayer HfS{sub 2} MOSFETs may offer comparable, but a little bit degraded, device performances as compared with phosphorene MOSFETs at 5 nm channel length.

  13. Effect of film properties for non-linear DPL model in a nanoscale MOSFET with high-k material: ZrO2/HfO2/La2O3

    Science.gov (United States)

    Shomali, Zahra; Ghazanfarian, Jafar; Abbassi, Abbas

    2015-07-01

    Numerical simulation of non-linear non-Fourier heat conduction within a nano-scale metal-oxide-semiconductor field-effect transistor (MOSFET) is presented under the framework of Dual-Phase-Lag model including the boundary phonon scattering. The MOSFET is modeled in four cases of: (I) thin silicon slab, (II) including uniform heat generation, (III) double-layered buried oxide MOSFET with uniform heat generation in silicon-dioxide layer, and (IV) high-k/metal gate transistor. First, four cases are studied under four conditions of (a) constant bulk and (b) constant film thermal properties, (c) temperature-dependent properties of bulk silicon, and (d) temperature-dependent thermal properties of film silicon. The heat source and boundary conditions are similar to what existed in a real MOSFET. It is concluded that in all cases, considering the film properties lowers the temperature jump due to the reduction of the Knudsen number. Furthermore, the speed of heat flux penetration for film properties is less than that of the cases concerning bulk properties. Also, considering the temperature-dependent properties drastically changes the temperature and heat flux distributions within the transistor, which increases the diffusion speed and more, decreases the steady state time. Calculations for case (III) presents that all previous studies have underestimated the value of the peak temperature rise by considering the constant bulk properties of silicon. Also, it is found that among the high-k dielectrics investigated in case (IV), zirconium dioxide shows the least peak temperature rise. This presents that zirconium dioxide is a good candidate as far as the thermal issues are concerned.

  14. Graphene Field Effect Transistors for Radiation Detection

    Data.gov (United States)

    National Aeronautics and Space Administration — This is propose to develop Graphene Field Effect Transistor based Radiation Sensors (GFET-RS) for NASA Manned Spaceflight Missions anticipated in next several...

  15. Characterization of MOSFET dosimeters for low-dose measurements in maxillofacial anthropomorphic phantoms

    NARCIS (Netherlands)

    Koivisto, J.H.; Wolff, J.E.; Kiljunen, T.; Schulze, D.; Kortesniemi, M.

    2015-01-01

    The aims of this study were to characterize reinforced metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters to assess the measurement uncertainty, single exposure low-dose limit with acceptable accuracy, and the number of exposures required to attain the corresponding limit of the

  16. Ambipolar phosphorene field effect transistor.

    Science.gov (United States)

    Das, Saptarshi; Demarteau, Marcel; Roelofs, Andreas

    2014-11-25

    In this article, we demonstrate enhanced electron and hole transport in few-layer phosphorene field effect transistors (FETs) using titanium as the source/drain contact electrode and 20 nm SiO2 as the back gate dielectric. The field effect mobility values were extracted to be ∼38 cm(2)/Vs for electrons and ∼172 cm(2)/Vs for the holes. On the basis of our experimental data, we also comprehensively discuss how the contact resistances arising due to the Schottky barriers at the source and the drain end effect the different regime of the device characteristics and ultimately limit the ON state performance. We also propose and implement a novel technique for extracting the transport gap as well as the Schottky barrier height at the metal-phosphorene contact interface from the ambipolar transfer characteristics of the phosphorene FETs. This robust technique is applicable to any ultrathin body semiconductor which demonstrates symmetric ambipolar conduction. Finally, we demonstrate a high gain, high noise margin, chemical doping free, and fully complementary logic inverter based on ambipolar phosphorene FETs.

  17. Organic tunnel field effect transistors

    KAUST Repository

    Tietze, Max Lutz

    2017-06-29

    Various examples are provided for organic tunnel field effect transistors (OTFET), and methods thereof. In one example, an OTFET includes a first intrinsic layer (i-layer) of organic semiconductor material disposed over a gate insulating layer; source (or drain) contact stacks disposed on portions of the first i-layer; a second i-layer of organic semiconductor material disposed on the first i-layer surrounding the source (or drain) contact stacks; an n-doped organic semiconductor layer disposed on the second i-layer; and a drain (or source) contact layer disposed on the n-doped organic semiconductor layer. The source (or drain) contact stacks can include a p-doped injection layer, a source (or drain) contact layer, and a contact insulating layer. In another example, a method includes disposing a first i-layer over a gate insulating layer; forming source or drain contact stacks; and disposing a second i-layer, an n-doped organic semiconductor layer, and a drain or source contact.

  18. Ambipolar Phosphorene Field Effect Transistor

    Energy Technology Data Exchange (ETDEWEB)

    Das, Saptarshi [Center for Nanoscale Material and ‡Division of High Energy Physics, Argonne National Laboratory, Argonne, Illinois 60439, United States; Demarteau, Marcel [Center for Nanoscale Material and ‡Division of High Energy Physics, Argonne National Laboratory, Argonne, Illinois 60439, United States; Roelofs, Andreas [Center for Nanoscale Material and ‡Division of High Energy Physics, Argonne National Laboratory, Argonne, Illinois 60439, United States

    2014-10-23

    Two dimensional materials provide an intriguing platform to investigate rich physical phenomena which could ultimately lead to the development of innovative nanotechnologies (1-17). Semiconducting black phosphorous (BP) with high carrier mobility (18-20), anisotropic transport (21, 22) and tunable bandgap (23, 24) is the most recent addition to this exotic class of two dimensional materials. In this article we experimentally demonstrate room temperature quasi ballistic transport of both holes and electrons in ionic liquid gated black phosphorous (BP) field effect transistors (FET) with sub-100nm channel length. The carrier mean free path (mfp) was found to be 15nm for the holes and 5nm for the electrons. By improving the carrier injection through superior electrostatic gate control (EOT=1.5nm), highly symmetric ambipolar conduction with record high hole current of ~0.78mA/µm and electron current of ~0.68mA/µm are achieved for VDD=0.2V. The extracted record low contact resistance of 220Ω-µm is similar to the state of the art Si technology. This is also the best contact resistance value achieved for any two dimensional metal-semiconductor interfaces. Finally, we provide an analytical framework to compare the experimental results with ballistic simulations which includes quantum capacitance considerations.

  19. Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor structure

    International Nuclear Information System (INIS)

    Kanaki, Toshiki; Asahara, Hirokatsu; Ohya, Shinobu; Tanaka, Masaaki

    2015-01-01

    We fabricate a vertical spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) structure, which is composed of an epitaxial single-crystal heterostructure with a ferromagnetic-semiconductor GaMnAs source/drain, and investigate its spin-dependent transport properties. We modulate the drain-source current I DS by ∼±0.5% with a gate-source voltage of ±10.8 V and also modulate I DS by up to 60% with changing the magnetization configuration of the GaMnAs source/drain at 3.5 K. The magnetoresistance ratio is more than two orders of magnitude higher than that obtained in the previous studies on spin MOSFETs. Our result shows that a vertical structure is one of the hopeful candidates for spin MOSFET when the device size is reduced to a sub-micron or nanometer scale

  20. SiC Power MOSFET with Improved Gate Dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Sbrockey, Nick M. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Tompa, Gary S. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Spencer, Michael G. [Structured Materials Industries, Inc., Piscataway, NJ (United States); Chandrashekhar, Chandra M.V. S. [Structured Materials Industries, Inc., Piscataway, NJ (United States)

    2010-08-23

    In this STTR program, Structured Materials Industries (SMI), and Cornell University are developing novel gate oxide technology, as a critical enabler for silicon carbide (SiC) devices. SiC is a wide bandgap semiconductor material, with many unique properties. SiC devices are ideally suited for high-power, highvoltage, high-frequency, high-temperature and radiation resistant applications. The DOE has expressed interest in developing SiC devices for use in extreme environments, in high energy physics applications and in power generation. The development of transistors based on the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) structure will be critical to these applications.

  1. Skin dose measurements using MOSFET and TLD for head and neck patients treated with tomotherapy

    International Nuclear Information System (INIS)

    Kinhikar, Rajesh A.; Murthy, Vedang; Goel, Vineeta; Tambe, Chandrashekar M.; Dhote, Dipak S.; Deshpande, Deepak D.

    2009-01-01

    The purpose of this work was to estimate skin dose for the patients treated with tomotherapy using metal oxide semiconductor field-effect transistors (MOSFETs) and thermoluminescent dosimeters (TLDs). In vivo measurements were performed for two head and neck patients treated with tomotherapy and compared to TLD measurements. The measurements were subsequently carried out for five days to estimate the inter-fraction deviations in MOSFET measurements. The variation between skin dose measured with MOSFET and TLD for first patient was 2.2%. Similarly, the variation of 2.3% was observed between skin dose measured with MOSFET and TLD for second patient. The tomotherapy treatment planning system overestimated the skin dose as much as by 10-12% when compared to both MOSFET and TLD. However, the MOSFET measured patient skin doses also had good reproducibility, with inter-fraction deviations ranging from 1% to 1.4%. MOSFETs may be used as a viable dosimeter for measuring skin dose in areas where the treatment planning system may not be accurate.

  2. Formation of a vertical MOSFET for charge sensing in a Si micro-fluidic channel

    International Nuclear Information System (INIS)

    Lyu, Hong-Kun; Kim, Dong-Sun; Shin, Jang-Kyoo; Choi, Pyung; Lee, Jong-Hyun; Park, Hey-Jung; Park, Chin-Sung; Lim, Geun-Bae

    2004-01-01

    We have formed a fluidic channel that can be used in micro-fluidic systems and fabricated a 3-dimensional vertical metal-oxide semiconductor field-effect transistor (vertical MOSFET) in the convex corner of a Si micro-fluidic channel by using an anisotropic tetramethyl ammonium hydroxide (TMAH) etching solution. A Au/Cr layer was used for the gate metal and might be useful for detecting charged biomolecules. The electrical characteristics of the vertical MOSFET and its operation as a chemical sensor were investigated. At V DS = -5 V and V GS = -5 V the drain current of the device was -22.5 μA and the threshold voltage was about -1.4 V. A non-planar, non-rectangular vertical MOSFET with a trapezoidal gate was transformed into an equivalent rectangularly based one by using a Schwartz-Christoffel transformation. The LEVEL1 device parameters of the vertical MOSFET were extracted from the measured electrical device characteristics and were used in the SPICE simulation for the vertical MOSFET. The measured and the simulated results for the vertical PMOSFET showed relatively good agreement. When the vertical MOSFET was dipped into a thiol DNA solution, the drain current decreased due to charged biomolecules probably being adsorbed on the gate, which indicates that a vertical MOSFET in a Si micro-fluidic channel might be useful for sensing charged biomolecules.

  3. A low specific on-resistance SOI MOSFET with dual gates and a recessed drain

    International Nuclear Information System (INIS)

    Luo Xiao-Rong; Hu Gang-Yi; Zhang Zheng-Yuan; Luo Yin-Chun; Fan Ye; Wang Xiao-Wei; Fan Yuan-Hang; Cai Jin-Yong; Wang Pei; Zhou Kun

    2013-01-01

    A low specific on-resistance (R on,sp ) integrable silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is proposed and investigated by simulation. The MOSFET features a recessed drain as well as dual gates, which consist of a planar gate and a trench gate extended to the buried oxide layer (BOX) (DGRD MOSFET). First, the dual gates form dual conduction channels, and the extended trench gate also acts as a field plate to improve the electric field distribution. Second, the combination of the trench gate and the recessed drain widens the vertical conduction area and shortens the current path. Third, the P-type top layer not only enhances the drift doping concentration but also modulates the surface electric field distributions. All of these sharply reduce R on,sp and maintain a high breakdown voltage (BV). The BV of 233 V and R on,sp of 4.151 mΩ·cm 2 (V GS = 15 V) are obtained for the DGRD MOSFET with 15-μm half-cell pitch. Compared with the trench gate SOI MOSFET and the conventional MOSFET, R on,sp of the DGRD MOSFET decreases by 36% and 33% with the same BV, respectively. The trench gate extended to the BOX synchronously acts as a dielectric isolation trench, simplifying the fabrication processes. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  4. Vertical InAs/InGaAs Heterostructure Metal-Oxide-Semiconductor Field-Effect Transistors on Si.

    Science.gov (United States)

    Kilpi, Olli-Pekka; Svensson, Johannes; Wu, Jun; Persson, Axel R; Wallenberg, Reine; Lind, Erik; Wernersson, Lars-Erik

    2017-10-11

    III-V compound semiconductors offer a path to continue Moore's law due to their excellent electron transport properties. One major challenge, integrating III-V's on Si, can be addressed by using vapor-liquid-solid grown vertical nanowires. InAs is an attractive material due to its superior mobility, although InAs metal-oxide-semiconductor field-effect transistors (MOSFETs) typically suffer from band-to-band tunneling caused by its narrow band gap, which increases the off-current and therefore the power consumption. In this work, we present vertical heterostructure InAs/InGaAs nanowire MOSFETs with low off-currents provided by the wider band gap material on the drain side suppressing band-to-band tunneling. We demonstrate vertical III-V MOSFETs achieving off-current below 1 nA/μm while still maintaining on-performance comparable to InAs MOSFETs; therefore, this approach opens a path to address not only high-performance applications but also Internet-of-Things applications that require low off-state current levels.

  5. Modeling of cylindrical surrounding gate MOSFETs including the fringing field effects

    International Nuclear Information System (INIS)

    Gupta, Santosh K.; Baishya, Srimanta

    2013-01-01

    A physically based analytical model for surface potential and threshold voltage including the fringing gate capacitances in cylindrical surround gate (CSG) MOSFETs has been developed. Based on this a subthreshold drain current model has also been derived. This model first computes the charge induced in the drain/source region due to the fringing capacitances and considers an effective charge distribution in the cylindrically extended source/drain region for the development of a simple and compact model. The fringing gate capacitances taken into account are outer fringe capacitance, inner fringe capacitance, overlap capacitance, and sidewall capacitance. The model has been verified with the data extracted from 3D TCAD simulations of CSG MOSFETs and was found to be working satisfactorily. (semiconductor devices)

  6. Low frequency noise in tunneling field effect transistors

    Science.gov (United States)

    Bu, S. T.; Huang, D. M.; Jiao, G. F.; Yu, H. Y.; Li, Ming-Fu

    2017-11-01

    An analytical model is developed for the fluctuation of the electrostatic potential induced by a charged trap in the gate oxide in tunneling field effect transistor (TFET). The model is applied to get the fluctuation of the drain current induced by an interface trap in TFET. A low frequency noise model based on the current transportation through the tunneling and the channel is proposed. The dependency of the normalized power spectra SId/Id2 on the frequency f and the gate bias Vg for TFET is obtained. The noise spectra in TFET are found to be very different from those of conventional MOSFETs, and have the superposition of Lorentzian and 1/f lineshapes with the former associated with tunneling and the later with channel transportation. The potential and current models are compared with TCAD simulation. The calculated IdVg and the noise spectra are also compared with our experimental observations. The results show that the normalized spectra of the current noise due to the tunneling are more significantly affected by Vg than that due to the transportation through the channel. The results also show that the noise from the channel is dominated by the mobility fluctuation rather than the carrier number fluctuation.

  7. Clinical application of a OneDose(TM) MOSFET for skin dose measurements during internal mammary chain irradiation with high dose rate brachytherapy in carcinoma of the breast

    International Nuclear Information System (INIS)

    Kinhikar, Rajesh A; Sharma, Pramod K; Tambe, Chandrashekhar M; Mahantshetty, Umesh M; Sarin, Rajiv; Deshpande, Deepak D; Shrivastava, Shyam K

    2006-01-01

    In our earlier study, we experimentally evaluated the characteristics of a newly designed metal oxide semiconductor field effect transistor (MOSFET) OneDose(TM) in-vivo dosimetry system for Ir-192 (380 keV) energy and the results were compared with thermoluminescent dosimeters (TLDs). We have now extended the same study to the clinical application of this MOSFET as an in-vivo dosimetry system. The MOSFET was used during high dose rate brachytherapy (HDRBT) of internal mammary chain (IMC) irradiation for a carcinoma of the breast. The aim of this study was to measure the skin dose during IMC irradiation with a MOSFET and a TLD and compare it with the calculated dose with a treatment planning system (TPS). The skin dose was measured for ten patients. All the patients' treatment was planned on a PLATO treatment planning system. TLD measurements were performed to compare the accuracy of the measured results from the MOSFET. The mean doses measured with the MOSFET and the TLD were identical (0.5392 Gy, 15.85% of the prescribed dose). The mean dose was overestimated by the TPS and was 0.5923 Gy (17.42% of the prescribed dose). The TPS overestimated the skin dose by 9% as verified by the MOSFET and TLD. The MOSFET provides adequate in-vivo dosimetry for HDRBT. Immediate readout after irradiation, small size, permanent storage of dose and ease of use make the MOSFET a viable alternative for TLDs. (note)

  8. Commissioning and characteristics of MOSFET dosimeter

    International Nuclear Information System (INIS)

    Gopiraj, A.; Billimagga, Ramesh S.; Rekha, M.; Ramasubramaniam, V.

    2007-01-01

    The verification of the dose delivered to a patient is an important part of the quality assurance in radiotherapy. Thermoluminescent dosimeters (TLDs) and semiconductor diodes were mostly used for this purpose. Recently Metal Oxide Semiconductor field effect transistors (MOSFET) have been proposed for the application in radiotherapy. Each type of detector has its own advantages and disadvantages. The TLD size is very small and therefore can be used both for measurement and dose delivered to a patient and for measurements of dose distribution in a humanoid phantom. The main disadvantages of the TLDs are the time required by the preparation procedure and the limited accuracy which depends on the experience of the user. Additionally, TLDs do not allow an immediate readout. The main disadvantages of semiconductor diodes are the necessity of using a cable which can disturb normal clinical work especially when in vivo measurements are carried out, and the necessity of applying of many correction factors to achieve high accuracy. We procured MOSFET system from Thomson and Nielsen Electronic Ltd. The reproducibility as a function of dose and linearity and calibration factor of the MOSFET detectors were measured. The effects of energy, field size and accumulated dose on the response of the detectors were investigated

  9. Graphene Field Effect Transistor for Radiation Detection

    Science.gov (United States)

    Li, Mary J. (Inventor); Chen, Zhihong (Inventor)

    2016-01-01

    The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.

  10. Transistor Small Signal Analysis under Radiation Effects

    International Nuclear Information System (INIS)

    Sharshar, K.A.A.

    2004-01-01

    A Small signal transistor parameters dedicate the operation of bipolar transistor before and after exposed to gamma radiation (1 Mrad up to 5 Mrads) and electron beam(1 MeV, 25 mA) with the same doses as a radiation sources, the electrical parameters of the device are changed. The circuit Model has been discussed.Parameters, such as internal emitter resistance (re), internal base resistance, internal collector resistance (re), emitter base photocurrent (Ippe) and base collector photocurrent (Ippe). These parameters affect on the operation of the device in its applications, which work as an effective element, such as current gain (hFE≡β)degradation it's and effective parameter in the device operation. Also the leakage currents (IcBO) and (IEBO) are most important parameters, Which increased with radiation doses. Theoretical representation of the change in the equivalent circuit for NPN and PNP bipolar transistor were discussed, the input and output parameters of the two types were discussed due to the change in small signal input resistance of the two types. The emitter resistance(re) were changed by the effect of gamma and electron beam irradiation, which makes a change in the role of matching impedances between transistor stages. Also the transistor stability factors S(Ico), S(VBE) and S(β are detected to indicate the transistor operations after exposed to radiation fields. In low doses the gain stability is modified due to recombination of induced charge generated during device fabrication. Also the load resistance values are connected to compensate the effect

  11. A 2D simulation study and characterization of a novel vertical SOI MOSFET with a smart source/body tie

    International Nuclear Information System (INIS)

    Lin, Jyi-Tsong; Lee, Tai-Yi; Lin, Kao-Cheng

    2008-01-01

    A novel vertical silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) with a smart source/body contact, SSBVMOS, is presented here for the first time. 2D simulations reveal that the SSBVMOS reduces self-heating effects, with the lattice temperature reduced by 14% and the hole temperature reduced by 25%. The SSBVMOS also eliminates the floating body effect, something that other SOI vertical MOSFETs are unable to accomplish, regardless of the thickness of the thin film. The SSBVMOS is further found to have a better drain-induced barrier lowering and subthreshold swing than either a conventional vertical MOSFET or an SOI vertical MOSFET. Moreover, these results are achieved using typical pillar heights and buried oxide thicknesses. Should future technological advances allow for lower pillars or thinner buried oxides, the SSBVMOS performance would further increase

  12. Dielectric Engineered Tunnel Field-Effect Transistor

    OpenAIRE

    Ilatikhameneh, Hesameddin; Ameen, Tarek A.; Klimeck, Gerhard; Appenzeller, Joerg; Rahman, Rajib

    2015-01-01

    The dielectric engineered tunnel field-effect transistor (DE-TFET) as a high performance steep transistor is proposed. In this device, a combination of high-k and low-k dielectrics results in a high electric field at the tunnel junction. As a result a record ON-current of about 1000 uA/um and a subthreshold swing (SS) below 20mV/dec are predicted for WTe2 DE-TFET. The proposed TFET works based on a homojunction channel and electrically doped contacts both of which are immune to interface stat...

  13. Single-electron effects in non-overlapped multiple-gate silicon-on-insulator metal-oxide-semiconductor field-effect transistors.

    Science.gov (United States)

    Lee, W; Su, P

    2009-02-11

    This paper systematically presents controlled single-electron effects in multiple-gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) with various gate lengths, fin widths, gate bias and temperature. Our study indicates that using the non-overlapped gate to source/drain structure as an approach to the single-electron transistor (SET) in MOSFETs is promising. Combining the advantage of gate control and the constriction of high source/drain resistances, single-electron effects are further enhanced using the multiple-gate architecture. From the presented results, downsizing multiple-gate SOI MOSFETs is needed for future room-temperature SET applications. Besides, the tunnel barriers and access resistances may need to be further optimized. Since the Coulomb blockade oscillation can be achieved in state-of-the-art complementary metal-oxide-semiconductor (CMOS) devices, it is beneficial to build SETs in low-power CMOS circuits for ultra-high-density purposes.

  14. Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal - oxide - semiconductor field-effect transistors: Effective electron mobility

    International Nuclear Information System (INIS)

    Ragnarsson, L.-A degree.; Guha, S.; Copel, M.; Cartier, E.; Bojarczuk, N. A.; Karasinski, J.

    2001-01-01

    We report on high effective mobilities in yttrium-oxide-based n-channel metal - oxide - semiconductor field-effect transistors (MOSFETs) with aluminum gates. The yttrium oxide was grown in ultrahigh vacuum using a reactive atomic-beam-deposition system. Medium-energy ion-scattering studies indicate an oxide with an approximate composition of Y 2 O 3 on top of a thin layer of interfacial SiO 2 . The thickness of this interfacial oxide as well as the effective mobility are found to be dependent on the postgrowth anneal conditions. Optimum conditions result in mobilities approaching that of SiO 2 -based MOSFETs at higher fields with peak mobilities at approximately 210 cm 2 /Vs. [copyright] 2001 American Institute of Physics

  15. Theoretical study of potential performance of armchair graphene nanoribbon field effect transistors: Dependence on channel dimensions and contact resistance

    Science.gov (United States)

    Hur, Ji-Hyun; Kim, Deok-kee

    2017-12-01

    In this paper, we examine the performance limitations of graphene nanoribbon field effect transistors (GNRFETs) with various channel dimensions and electrode contact resistances. To do this, we formulate a self-consistent non-equilibrium Green's function method in conjunction with the Poisson equation. We model the behavior of GNRFETs with nanometer dimensions and relatively large bandgaps operating as metal-oxide-semiconductor field effect transistors (MOSFETs) and calculate their performance including contact resistance effects typically occurring at the graphene nanoribbon (GNR) channel and electrodes. We propose a metric for GNRFETs to compete with the current silicon CMOS high performance or low power devices and explain that this can vary significantly depending on the contact resistance.

  16. Impact of source height on the characteristic of U-shaped channel tunnel field-effect transistor

    Science.gov (United States)

    Yang, Zhaonian; Zhang, Yue; Yang, Yuan; Yu, Ningmei

    2017-11-01

    Tunnel field-effect transistor (TFET) is very attractive in replacing a MOSFET, particularly for low-power nanoelectronic circuits. The U-shaped channel TFET (U-TFET) was proposed to improve the drain-source current with a reduced footprint. In this work, the impact of the source height (HS) on the characteristic of the U-shaped channel tunnel field-effect transistor (U-TFET) is investigated by using TCAD simulation. It is found that with a fixed gate height (HG) the drain-source current has a negative correlation with HS. This is because when the gate region is deeper than the source region, the electric field near the corner of the tunneling junction can be enhanced and the tunneling rate is increased. When HS becomes very thin, the drain-source current is limited by the source region volume. The U-TFET with an n+ pocket is also studied and the same trend is observed.

  17. Effect of stacking order on device performance of bilayer black phosphorene-field-effect transistor

    Energy Technology Data Exchange (ETDEWEB)

    Mukhopadhyay, A., E-mail: arnabm.electinstru@gmail.com; Banerjee, L.; Sengupta, A.; Rahaman, H. [School of VLSI Technology, IIEST, Shibpur, Howrah 711103 (India)

    2015-12-14

    We investigate the effect of stacking order of bilayer black phosphorene on the device properties of p-MOSFET and n-MOSFET. Two layers of black phosphorus are stacked in three different orders and are used as channel material in both n-MOSFET and p-MOSFET devices. The effects of different stacking orders on electron and hole effective masses and output characteristics of MOSFETs, such as ON currents, ON/OFF ratio, and transconductance are analyzed. Our results show that about 1.37 times and 1.49 times increase in ON current is possible along armchair and zigzag directions, respectively, 55.11% variation in transconductance is possible along armchair direction, by changing stacking orders (AA, AB, and AC) and about 8 times increase in ON current is achievable by changing channel orientation (armchair or zigzag) in p-MOSFET. About 14.8 mV/V drain induced barrier lowering is observed for both p-MOSFET and n-MOSFET, which signifies good immunity to short channel effects.

  18. Characterization of MOSFET dosimeters for low-dose measurements in maxillofacial anthropomorphic phantoms.

    Science.gov (United States)

    Koivisto, Juha H; Wolff, Jan E; Kiljunen, Timo; Schulze, Dirk; Kortesniemi, Mika

    2015-07-08

    The aims of this study were to characterize reinforced metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters to assess the measurement uncertainty, single exposure low-dose limit with acceptable accuracy, and the number of exposures required to attain the corresponding limit of the thermoluminescent dosimeters (TLD). The second aim was to characterize MOSFET dosimeter sensitivities for two dental photon energy ranges, dose dependency, dose rate dependency, and accumulated dose dependency. A further aim was to compare the performance of MOSFETs with those of TLDs in an anthropomorphic phantom head using a dentomaxillofacial CBCT device. The uncertainty was assessed by exposing 20 MOSFETs and a Barracuda MPD reference dosimeter. The MOSFET dosimeter sensitivities were evaluated for two photon energy ranges (50-90 kVp) using a constant dose and polymethylmethacrylate backscatter material. MOSFET and TLD comparative point-dose measurements were performed on an anthropomorphic phantom that was exposed with a clinical CBCT protocol. The MOSFET single exposure low dose limit (25% uncertainty, k = 2) was 1.69 mGy. An averaging of eight MOSFET exposures was required to attain the corresponding TLD (0.3 mGy) low-dose limit. The sensitivity was 3.09 ± 0.13 mV/mGy independently of the photon energy used. The MOSFET dosimeters did not present dose or dose rate sensitivity but, however, presented a 1% decrease of sensitivity per 1000 mV for accumulated threshold voltages between 8300 mV and 17500 mV. The point doses in an anthropomorphic phantom ranged for MOSFETs between 0.24 mGy and 2.29 mGy and for TLDs between 0.25 and 2.09 mGy, respectively. The mean difference was -8%. The MOSFET dosimeters presented statistically insignificant energy dependency. By averaging multiple exposures, the MOSFET dosimeters can achieve a TLD-comparable low-dose limit and constitute a feasible method for diagnostic dosimetry using anthropomorphic phantoms. However, for single in

  19. Sub-1-V-60 nm vertical body channel MOSFET-based six-transistor static random access memory array with wide noise margin and excellent power delay product and its optimization with the cell ratio on static random access memory cell

    Science.gov (United States)

    Ogasawara, Ryosuke; Endoh, Tetsuo

    2018-04-01

    In this study, with the aim to achieve a wide noise margin and an excellent power delay product (PDP), a vertical body channel (BC)-MOSFET-based six-transistor (6T) static random access memory (SRAM) array is evaluated by changing the number of pillars in each part of a SRAM cell, that is, by changing the cell ratio in the SRAM cell. This 60 nm vertical BC-MOSFET-based 6T SRAM array realizes 0.84 V operation under the best PDP and up to 31% improvement of PDP compared with the 6T SRAM array based on a 90 nm planar MOSFET whose gate length and channel width are the same as those of the 60 nm vertical BC-MOSFET. Additionally, the vertical BC-MOSFET-based 6T SRAM array achieves an 8.8% wider read static noise margin (RSNM), a 16% wider write margin (WM), and an 89% smaller leakage. Moreover, it is shown that changing the cell ratio brings larger improvements of RSNM, WM, and write time in the vertical BC-MOSFET-based 6T SRAM array.

  20. Planar graphene tunnel field-effect transistor

    OpenAIRE

    Katkov, V. L.; Osipov, V. A.

    2013-01-01

    We propose a concept for a graphene tunnel field-effect transistor. The main idea is based on the use of two graphene electrodes with zigzag termination divided by a narrow gap under the influence of the common gate. Our analysis shows that such device will have a pronounced switching effect at low gate voltage and high on/off current ratio at room temperature.

  1. Auger generation as an intrinsic limit to tunneling field-effect transistor performance

    Energy Technology Data Exchange (ETDEWEB)

    Teherani, James T., E-mail: j.teherani@columbia.edu [Department of Electrical Engineering, Columbia University, New York, New York 10027 (United States); Agarwal, Sapan [Sandia National Laboratories, Albuquerque, New Mexico 87123 (United States); Chern, Winston; Antoniadis, Dimitri A. [Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139 (United States); Solomon, Paul M. [IBM T.J. Watson Research Center, Yorktown Heights, New York 10598 (United States); Yablonovitch, Eli [Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, California 94720 (United States)

    2016-08-28

    Many in the microelectronics field view tunneling field-effect transistors (TFETs) as society's best hope for achieving a >10× power reduction for electronic devices; however, despite a decade of considerable worldwide research, experimental TFET results have significantly underperformed simulations and conventional MOSFETs. To explain the discrepancy between TFET experiments and simulations, we investigate the parasitic leakage current due to Auger generation, an intrinsic mechanism that cannot be mitigated with improved material quality or better device processing. We expose the intrinsic link between the Auger and band-to-band tunneling rates, highlighting the difficulty of increasing one without the other. From this link, we show that Auger generation imposes a fundamental limit on ultimate TFET performance.

  2. Localized Electrothermal Annealing with Nanowatt Power for a Silicon Nanowire Field-Effect Transistor.

    Science.gov (United States)

    Park, Jun-Young; Lee, Byung-Hyun; Lee, Geon-Beom; Bae, Hagyoul; Choi, Yang-Kyu

    2018-02-07

    This work investigates localized electrothermal annealing (ETA) with extremely low power consumption. The proposed method utilizes, for the first time, tunneling-current-induced Joule heat in a p-i-n diode, consisting of p-type, intrinsic, and n-type semiconductors. The consumed power used for dopant control is the lowest value ever reported. A metal-oxide-semiconductor field-effect transistor (MOSFET) composed of a p-i-n silicon nanowire, which is a substructure of a tunneling FET (TFET), was fabricated and utilized as a test platform to examine the annealing behaviors. A more than 2-fold increase in the on-state (I ON ) current was achieved using the ETA. Simulations are conducted to investigate the location of the hot spot and how its change in heat profile activates the dopants.

  3. Characterization of vertical strain silicon MOSFET incorporating dielectric pocket (SDP-VMOSFET)

    International Nuclear Information System (INIS)

    Napiah, Z. A. F. M.; Makhtar, N.; Othman, M. A.; Idris, M. I.; Arith, F.; Yasin, N. Y. M.; Taib, S. N.

    2014-01-01

    The vertical Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) leads to a double channel width that can increase the packaging density. The strained silicon MOSFET was introduced to modify the carrier transport properties of silicon in order to enhance transport of both electrons and holes within strained layer. Dielectric pocket was act to control encroachment of the drain doping into the channel and reduce short channel effects (SCE). SDP-VMOSFET which was a combination of those advantages was proposed to overcome the SCE in term of leakage current, threshold voltage roll-off also Drain Induce Barrier Lowering (DIBL). As a result, SDP-VMOSFET produces a better threshold voltage and DIBL compared to related structures. Meanwhile, it gives slightly increased for leakage current compared to Vertical MOSFET Incorporating Dielectric Pocket. The characteristics of the SDP-VMOSFET are analyzed in order to optimize the performance of the device and leading to the next generation of IC technology

  4. Tunnel-field-effect-transistor based gas-sensor: Introducing gas detection with a quantum-mechanical transducer

    Science.gov (United States)

    Sarkar, Deblina; Gossner, Harald; Hansch, Walter; Banerjee, Kaustav

    2013-01-01

    A gas-sensor based on tunnel-field-effect-transistor (TFET) is proposed that leverages the unique current injection mechanism in the form of quantum-mechanical band-to-band tunneling to achieve substantially improved performance compared to conventional metal-oxide-semiconductor field-effect-transistors (MOSFETs) for detection of gas species under ambient conditions. While nonlocal phonon-assisted tunneling model is used for detailed device simulations, in order to provide better physical insights, analytical formula for sensitivity is derived for both metal as well as organic conducting polymer based sensing elements. Analytical derivations are also presented for capturing the effects of temperature on sensor performance. Combining the developed analytical and numerical models, intricate properties of the sensor such as gate bias dependence of sensitivity, relationship between the required work-function modulation and subthreshold swing, counter-intuitive increase in threshold voltage for MOSFETs and reduction in tunneling probability for TFETs with temperature are explained. It is shown that TFET gas-sensors can not only lead to more than 10 000× increase in sensitivity but also provide design flexibility and immunity against screening of work-function modulation through non-specific gases as well as ensure stable operation under temperature variations.

  5. Vertically Integrated Multiple Nanowire Field Effect Transistor.

    Science.gov (United States)

    Lee, Byung-Hyun; Kang, Min-Ho; Ahn, Dae-Chul; Park, Jun-Young; Bang, Tewook; Jeon, Seung-Bae; Hur, Jae; Lee, Dongil; Choi, Yang-Kyu

    2015-12-09

    A vertically integrated multiple channel-based field-effect transistor (FET) with the highest number of nanowires reported ever is demonstrated on a bulk silicon substrate without use of wet etching. The driving current is increased by 5-fold due to the inherent vertically stacked five-level nanowires, thus showing good feasibility of three-dimensional integration-based high performance transistor. The developed fabrication process, which is simple and reproducible, is used to create multiple stiction-free and uniformly sized nanowires with the aid of the one-route all-dry etching process (ORADEP). Furthermore, the proposed FET is revamped to create nonvolatile memory with the adoption of a charge trapping layer for enhanced practicality. Thus, this research suggests an ultimate design for the end-of-the-roadmap devices to overcome the limits of scaling.

  6. Cylindrical-shaped nanotube field effect transistor

    KAUST Repository

    Hussain, Muhammad Mustafa

    2015-12-29

    A cylindrical-shaped nanotube FET may be manufactured on silicon (Si) substrates as a ring etched into a gate stack and filled with semiconductor material. An inner gate electrode couples to a region of the gate stack inside the inner circumference of the ring. An outer gate electrode couples to a region of the gate stack outside the outer circumference of the ring. The multi-gate cylindrical-shaped nanotube FET operates in volume inversion for ring widths below 15 nanometers. The cylindrical-shaped nanotube FET demonstrates better short channel effect (SCE) mitigation and higher performance (I.sub.on/I.sub.off) than conventional transistor devices. The cylindrical-shaped nanotube FET may also be manufactured with higher yields and cheaper costs than conventional transistors.

  7. Investigation of carrier mobility degradation effects on MOSFET leakage simulations

    CSIR Research Space (South Africa)

    Twala, B

    2016-01-01

    Full Text Available of electric field, carrier temperature and impact ionization. 4. Several vertical grid spacing inside the gate oxide when simulating gate field effects such as gate induced drain leakage (GIDL) or using any hot electron or tunneling gate current models... on its gain and is proportional to the hole or electron mobility (depending on device type); at least for low drain voltages. The transverse field dependent mobility models are of particular importance for simulating MOS devices. Because the reduction...

  8. Circuit mismatch and current coupling effect influence on paralleling SiC MOSFETs in multichip power modules

    DEFF Research Database (Denmark)

    Li, Helong; Beczkowski, Szymon; Munk-Nielsen, Stig

    2015-01-01

    This paper reveals that there are circuit mismatches and a current coupling effect in the direct bonded copper (DBC) layout of a silicon carbide (SiC) MOSFET multichip power module. According to the modelling and the mathematic analysis of the DBC layout, the mismatch of the common source stray...

  9. Design and simulation of a nanoelectronic DG MOSFET current source using artificial neural networks

    Energy Technology Data Exchange (ETDEWEB)

    Djeffal, F. [LEA, Department of Electronics, University of Batna 05000 (Algeria)], E-mail: faycaldzdz@hotmail.com; Dibi, Z. [LEA, Department of Electronics, University of Batna 05000 (Algeria)], E-mail: zohirdibi@univ-batna.dz; Hafiane, M.L.; Arar, D. [LEA, Department of Electronics, University of Batna 05000 (Algeria)

    2007-09-15

    The double gate (DG) MOSFET has received great attention in recent years owing to the inherent suppression of short channel effects (SCEs), excellent subthreshold slope (S), improved drive current (I{sub ds}) and transconductance (gm), volume inversion for symmetric devices and excellent scalability. Therefore, simulation tools which can be applied to design nanoscale transistors in the future require new theory and modeling techniques that capture the physics of quantum transport accurately and efficiently. In this sense, this work presents the applicability of the artificial neural networks (ANN) for the design and simulation of a nanoelectronic DG MOSFET current source. The latter is based on the 2D numerical Non-Equilibrium Green's Function (NEGF) simulation of the current-voltage characteristics of an undoped symmetric DG MOSFET. Our results are discussed in order to obtain some new and useful information about the ULSI technology.

  10. Simulation of 50-nm Gate Graphene Nanoribbon Transistors

    Directory of Open Access Journals (Sweden)

    Cedric Nanmeni Bondja

    2016-01-01

    Full Text Available An approach to simulate the steady-state and small-signal behavior of GNR MOSFETs (graphene nanoribbon metal-semiconductor-oxide field-effect transistor is presented. GNR material parameters and a method to account for the density of states of one-dimensional systems like GNRs are implemented in a commercial device simulator. This modified tool is used to calculate the current-voltage characteristics as well the cutoff frequency fT and the maximum frequency of oscillation fmax of GNR MOSFETs. Exemplarily, we consider 50-nm gate GNR MOSFETs with N = 7 armchair GNR channels and examine two transistor configurations. The first configuration is a simplified MOSFET structure with a single GNR channel as usually studied by other groups. Furthermore, and for the first time in the literature, we study in detail a transistor structure with multiple parallel GNR channels and interribbon gates. It is shown that the calculated fT of GNR MOSFETs is significantly lower than that of GFETs (FET with gapless large-area graphene channel with comparable gate length due to the mobility degradation in GNRs. On the other hand, GNR MOSFETs show much higher fmax compared to experimental GFETs due the semiconducting nature of the GNR channels and the resulting better saturation of the drain current. Finally, it is shown that the gate control in FETs with multiple parallel GNR channels is improved while the cutoff frequency is degraded compared to single-channel GNR MOSFETs due to parasitic capacitances of the interribbon gates.

  11. Technology computer aided design simulation for VLSI MOSFET

    CERN Document Server

    Sarkar, Chandan Kumar

    2013-01-01

    Responding to recent developments and a growing VLSI circuit manufacturing market, Technology Computer Aided Design: Simulation for VLSI MOSFET examines advanced MOSFET processes and devices through TCAD numerical simulations. The book provides a balanced summary of TCAD and MOSFET basic concepts, equations, physics, and new technologies related to TCAD and MOSFET. A firm grasp of these concepts allows for the design of better models, thus streamlining the design process, saving time and money. This book places emphasis on the importance of modeling and simulations of VLSI MOS transistors and

  12. P-Channel InGaN/GaN heterostructure metal-oxide-semiconductor field effect transistor based on polarization-induced two-dimensional hole gas.

    Science.gov (United States)

    Zhang, Kexiong; Sumiya, Masatomo; Liao, Meiyong; Koide, Yasuo; Sang, Liwen

    2016-03-29

    The concept of p-channel InGaN/GaN heterostructure field effect transistor (FET) using a two-dimensional hole gas (2DHG) induced by polarization effect is demonstrated. The existence of 2DHG near the lower interface of InGaN/GaN heterostructure is verified by theoretical simulation and capacitance-voltage profiling. The metal-oxide-semiconductor FET (MOSFET) with Al2O3 gate dielectric shows a drain-source current density of 0.51 mA/mm at the gate voltage of -2 V and drain bias of -15 V, an ON/OFF ratio of two orders of magnitude and effective hole mobility of 10 cm(2)/Vs at room temperature. The normal operation of MOSFET without freeze-out at 8 K further proves that the p-channel behavior is originated from the polarization-induced 2DHG.

  13. Etude de nano-transistors à faible pente sous le seuil pour des applications très basse consommation

    OpenAIRE

    Villalon , Anthony

    2014-01-01

    Band to band tunneling field effect transistor (TFET) is a PIN-gated architecture able to reach sub 60mV/dec subthreshold slopes at room temperature, which is an advantage over MOSFET in low power applications. The objective of this thesis is to study and characterize TFETs fabricated in CEA-LETI using MOSFET SOI technology. The first generation of devices is realized on planar FDSOI technology, and studies the impact of source/channel heterojunction, channel thickness and annealing temperatu...

  14. Evolution of the MOS transistor - From conception to VLSI

    International Nuclear Information System (INIS)

    Sah, C.T.

    1988-01-01

    Historical developments of the metal-oxide-semiconductor field-effect-transistor (MOSFET) during the last sixty years are reviewed, from the 1928 patent disclosures of the field-effect conductivity modulation concept and the semiconductor triodes structures proposed by Lilienfeld to the 1947 Shockley-originated efforts which led to the laboratory demonstration of the modern silicon MOSFET thirty years later in 1960. A survey is then made of the milestones of the past thirty years leading to the latest submicron silicon logic CMOS (Complementary MOS) and BICMOS (Bipolar-Junction-Transistor CMOS combined) arrays and the three-dimensional and ferroelectric extensions of Dennard's one-transistor dynamic random access memory (DRAM) cell. Status of the submicron lithographic technologies (deep ultra-violet light, X-ray, electron-beam) are summarized. Future trends of memory cell density and logic gate speed are projected. Comparisons of the switching speed of the silicon MOSFET with that of silicon bipolar and GaAs field-effect transistors are reviewed. Use of high-temperature superconducting wires and GaAs-on-Si monolithic semiconductor optical clocks to break the interconnect-wiring delay barrier is discussed. Further needs in basic research and mathematical modeling on the failure mechanisms in submicron silicon transistors at high electric fields (hot electron effects) and in interconnection conductors at high current densities and low as well as high electric fields (electromigration) are indicated

  15. High performance multi-finger MOSFET on SOI for RF amplifiers

    Science.gov (United States)

    Adhikari, M. Singh; Singh, Y.

    2017-10-01

    In this paper, we propose structural modifications in the conventional planar metal-oxide-semiconductor field-effect transistor (MOSFET) on silicon-on-insulator by utilizing trenches in the epitaxial layer. The proposed multi-finger MOSFET (MF-MOSFET) has dual vertical-gates placed in separate trenches to form multiple channels in the p-base which carry the drain current in parallel. The proposed device uses TaN as gate electrode and SiO2 as gate dielectric. Simultaneous conduction of multiple channels enhances the drain current (ID) and provides higher transconductance (gm) leading to significant improvement in cut-off frequency (ft). Two-dimensional simulations are performed to evaluate and compare the performance of the MF-MOSFET with the conventional MOSFET. At a gate length of 60 nm, the proposed device provides 4 times higher ID, 3 times improvement in gm and 1.25 times increase in ft with better control over the short channel effects as compared with the conventional device.

  16. Static Characteristics of the Ferroelectric Transistor Inverter

    Science.gov (United States)

    Mitchell, Cody; Laws, crystal; MacLeond, Todd C.; Ho, Fat D.

    2010-01-01

    The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.

  17. SPICE modelling of the transient response of irradiated MOSFETs

    International Nuclear Information System (INIS)

    Pouget, V.; Lapuyade, H.; Lewis, D.; Deval, Y.; Fouillat, P.; Sarger, L.

    1999-01-01

    A new SPICE model of irradiated MOSFET taking into account the real response of the 4 electrodes is proposed. The component that has been simulated is an NMOS transistor issued from the AMS BiCMOS 0.8 μm technology. A comparison between SPICE-generated transients and PISCES device simulation demonstrates the accuracy benefits when used in complex electronic architectures. This model could be used when designing electronic circuits able to sustain hardening due to SEE (single event effect), it will be an efficient complement to the physical simulations

  18. A Highly Responsive Silicon Nanowire/Amplifier MOSFET Hybrid Biosensor

    Science.gov (United States)

    2015-07-21

    Hybrid Biosensor Jieun Lee1,2, Jaeman Jang1, Bongsik Choi1, Jinsu Yoon1, Jee-Yeon Kim3, Yang-Kyu Choi3, Dong Myong Kim1, Dae Hwan Kim1 & Sung-Jin Choi1...This study demonstrates a hybrid biosensor comprised of a silicon nanowire (SiNW) integrated with an amplifier MOSFET to improve the current response...of field-effect-transistor (FET)-based biosensors . The hybrid biosensor is fabricated using conventional CMOS technology, which has the potential

  19. Heavy-ion-induced, gate-rupture in power MOSFETs

    International Nuclear Information System (INIS)

    Fischer, T.A.

    1987-01-01

    A new, heavy-ion-induced, burnout mechanism has been experimentally observed in power metal-oxide-semiconductor field-effect transistors (MOSFETs). This mechanism occurs when a heavy, charged particle passes through the gate oxide region of n- or p-channel devices having sufficient gate-to-source or gate-to-drain bias. The gate-rupture leads to significant permanent degradation of the device. A proposed failure mechanism is discussed and experimentally verified. In addition, the absolute immunity of p-channel devices to heavy-ion-induced, semiconductor burnout is demonstrated and discussed along with new, non-destructive, burnout testing methods

  20. Non-Stoichiometric SixN Metal-Oxide-Semiconductor Field-Effect Transistor for Compact Random Number Generator with 0.3 Mbit/s Generation Rate

    Science.gov (United States)

    Matsumoto, Mari; Ohba, Ryuji; Yasuda, Shin-ichi; Uchida, Ken; Tanamoto, Tetsufumi; Fujita, Shinobu

    2008-08-01

    The demand for random numbers for security applications is increasing. A conventional random number generator using thermal noise can generate unpredictable high-quality random numbers, but the circuit is extremely large because of large amplifier circuit for a small thermal signal. On the other hand, a pseudo-random number generator is small but the quality of randomness is bad. For a small circuit and a high quality of randomness, we purpose a non-stoichiometric SixN metal-oxide-semiconductor field-effect transistor (MOSFET) noise source device. This device generates a very large noise signal without an amplifier circuit. As a result, it is shown that, utilizing a SiN MOSFET, we can attain a compact random number generator with a high generation rate near 1 Mbit/s, which is suitable for almost all security applications.

  1. Recent progress in photoactive organic field-effect transistors

    Directory of Open Access Journals (Sweden)

    Yutaka Wakayama

    2014-04-01

    Full Text Available Recent progress in photoactive organic field-effect transistors (OFETs is reviewed. Photoactive OFETs are divided into light-emitting (LE and light-receiving (LR OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

  2. Recent progress in photoactive organic field-effect transistors.

    Science.gov (United States)

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-04-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

  3. Functional organic field-effect transistors.

    Science.gov (United States)

    Guo, Yunlong; Yu, Gui; Liu, Yunqi

    2010-10-25

    Functional organic field-effect transistors (OFETs) have attracted increasing attention in the past few years due to their wide variety of potential applications. Research on functional OFETs underpins future advances in organic electronics. In this review, different types of functional OFETs including organic phototransistors, organic memory FETs, organic light emitting FETs, sensors based on OFETs and other functional OFETs are introduced. In order to provide a comprehensive overview of this field, the history, current status of research, main challenges and prospects for functional OFETs are all discussed.

  4. Dose Rate Effects in Linear Bipolar Transistors

    Science.gov (United States)

    Johnston, Allan; Swimm, Randall; Harris, R. D.; Thorbourn, Dennis

    2011-01-01

    Dose rate effects are examined in linear bipolar transistors at high and low dose rates. At high dose rates, approximately 50% of the damage anneals at room temperature, even though these devices exhibit enhanced damage at low dose rate. The unexpected recovery of a significant fraction of the damage after tests at high dose rate requires changes in existing test standards. Tests at low temperature with a one-second radiation pulse width show that damage continues to increase for more than 3000 seconds afterward, consistent with predictions of the CTRW model for oxides with a thickness of 700 nm.

  5. SPICE modelling of the transient response of irradiated MOSFETs; Modelisation de la reponse transitoire de MOSFETs irradies avec SPICE

    Energy Technology Data Exchange (ETDEWEB)

    Pouget, V.; Lapuyade, H.; Lewis, D.; Deval, Y.; Fouillat, P. [Bordeaux-1 Univ., IXL, 33 - Talence (France); Sarger, L. [Bordeaux-1 Univ., CPMOH, 33 - Talence (France)

    1999-07-01

    A new SPICE model of irradiated MOSFET taking into account the real response of the 4 electrodes is proposed. The component that has been simulated is an NMOS transistor issued from the AMS BiCMOS 0.8 {mu}m technology. A comparison between SPICE-generated transients and PISCES device simulation demonstrates the accuracy benefits when used in complex electronic architectures. This model could be used when designing electronic circuits able to sustain hardening due to SEE (single event effect), it will be an efficient complement to the physical simulations.

  6. Light-emitting ambipolar organic heterostructure field-effect transistor

    NARCIS (Netherlands)

    Rost, Constance; Karg, Siegfried; Riess, Walter; Loi, Maria Antonietta; Murgia, Mauro; Muccini, Michele

    2004-01-01

    We have investigated ambipolar charge injection and transport in organic field-effect transistors (OFETs) as prerequisites for a light-emitting organic field-effect transistor (LEOFET). OFETs containing a single material as active layer generally function either as a p- or an n-channel device.

  7. Switching Characteristics of Ferroelectric Transistor Inverters

    Science.gov (United States)

    Laws, Crystal; Mitchell, Coey; MacLeod, Todd C.; Ho, Fat D.

    2010-01-01

    This paper presents the switching characteristics of an inverter circuit using a ferroelectric field effect transistor, FeFET. The propagation delay time characteristics, phl and plh are presented along with the output voltage rise and fall times, rise and fall. The propagation delay is the time-delay between the V50% transitions of the input and output voltages. The rise and fall times are the times required for the output voltages to transition between the voltage levels V10% and V90%. Comparisons are made between the MOSFET inverter and the ferroelectric transistor inverter.

  8. Extended Characterization of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

    Science.gov (United States)

    Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

    2013-01-01

    Collected data for both common-source and common-gate amplifiers is presented in this paper. Characterizations of the two amplifier circuits using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed with wider input frequency ranges and varying device sizes compared to earlier characterizations. The effects of the ferroelectric layer's capacitance and variation load, quiescent point, or input signal on each circuit are discussed. Comparisons between the MFSFET and MOSFET circuit operation and performance are discussed at length as well as applications and advantages for the MFSFETs.

  9. Individual SWCNT based ionic field effect transistor

    Science.gov (United States)

    Pang, Pei; He, Jin; Park, Jae Hyun; Krstic, Predrag; Lindsay, Stuart

    2011-03-01

    Here we report that the ionic current through a single-walled carbon nanotube (SWCNT) can be effectively gated by a perpendicular electrical field from a top gate electrode, working as ionic field effect transistor. Both our experiment and simulation confirms that the electroosmotic current (EOF) is the main component in the ionic current through the SWCNT and is responsible for the gating effect. We also studied the gating efficiency as a function of solution concentration and pH and demonstrated that the device can work effectively in the physiological relevant condition. This work opens the door to use CNT based nanofluidics for ion and molecule manipulation. This work was supported by the DNA Sequencing Technology Program of the National Human Genome Research Institute (1RC2HG005625-01, 1R21HG004770-01), Arizona Technology Enterprises and the Biodesign Institute.

  10. High mobility polymer gated organic field effect transistor using zinc ...

    Indian Academy of Sciences (India)

    Organic semiconductor; field effect transistor; phthalocyanine; high mobility. Abstract. Organic thin film transistors were fabricated using evaporated zinc phthalocyanine as the active layer. Parylene film prepared by chemical vapour deposition was used as the organic gate insulator. The annealing of the samples was ...

  11. Pressure Sensitive Insulated Gate Field Effect Transistor

    Science.gov (United States)

    Suminto, James Tjan-Meng

    A pressure sensitive insulated gate field effect transistor has been developed. The device is an elevated gate field-effect-transistor. It consists of a p-type silicon substrate in which two n^+ region, the source and drain, are formed. The gate electrode is a metal film sandwiched in an insulated micro-diaphragm resembling a pill-box which covers the gate oxide, drain, and source. The space between the gate electrode and the oxide is vacuum or an air-gap. When pressure is applied on the diaphragm it deflects and causes a change in the gate capacitance, and thus modulates the conductance of the channel between source and drain. A general theory dealing with the characteristic of this pressure sensitive insulated gate field effect transistor has been derived, and the device fabricated. The fabrication process utilizes the standard integrated circuit fabrication method. It features a batch fabrication of field effect devices followed by the batch fabrication of the deposited diaphragm on top of each field effect device. The keys steps of the diaphragm fabrication are the formation of spacer layer, formation of the diaphragm layer, and the subsequent removal of the spacer layer. The chip size of the device is 600 μm x 1050 mum. The diaphragm size is 200 μm x 200 mum. Characterization of the device has been performed. The current-voltage characteristics with pressure as parameters have been demonstrated and the current-pressure transfer curves obtained. They show non-linear characteristics as those of conventional capacitive pressure sensors. The linearity of threshold voltage versus pressure transfer curves has been demonstrated. The temperature effect on the device performances has been tested. The temperature coefficient of threshold voltage, rather than the electron mobility, has dominated the temperature coefficient of the device. Two temperature compensation schemes have been tested: one method is by connecting two identical PSIGFET in a differential amplifier

  12. Performance improvement of junctionless field effect transistors using p-GaAs/AlGaAs heterostructure

    Science.gov (United States)

    Bajelan, F.; Goharrizi, A. Yazdanpanah; Faez, R.; Darvish, G.

    2017-10-01

    The performance analysis of junctionless (JL) gate-all-around (GAA) metal oxide semiconductor field effect transistors (MOSFETs) is investigated using the Non-Equilibrium Green's Function (NEGF) formalism. The main problem of JL transistors is found to be the OFF-state current. In the present work, the OFF-state current of such devices is decreased by choosing channel materials with a large band gap and heavy effective mass. Our simulation results show that the OFF-state current of JL transistors with p-type GaAs is less than that of n-type GaAs. Plus, the heterostructure (HES) channel is proposed in this study for improving the device characteristics of JL-FETs as compared to homostructure (HOS). Therefore, p-type GaAs and GaAs/AlGaAs are used as the channel material for HOS and HES devices, respectively. The simulation is performed for different thicknesses of GaAs and AlGaAs with a fixed diameter of 5 nm for the nanowire. It is shown that the optimum electronic characteristics of HES devices is achieved when the thicknesses of GaAs and AlGaAs layers are chosen to be 0.5 nm and 4 nm, respectively. OFF-state current (IOFF) of 5.32 × 10-16 A, ON-state current (ION) of 6.44 × 10-6 A, ON/OFF current ratio (ION/IOFF) of 1.21 × 1010, subthreshold slope (SS) of 60.8 mV/dec, drain induced barrier lowering (DIBL) of 4.6 mV/V, and threshold voltage (VTH) of 330 mV are obtained for the proposed HES JL-GAA-FET.

  13. Analysis of the background noise of field effect transistors in MOS complementary technology and application in the construction of a current-sensitive integrated amplifier

    International Nuclear Information System (INIS)

    Beuville, E.

    1989-10-01

    A low noise amplifier for use in high energy physics is developed. The origin and the mechanisms of the noise in MOSFET transistors is carried out with the aim of minimizing such effects in amplifiers. The research is applied in the construction of a current-sensitive integrated amplifier. The time scale continuous filtering principle is used and allows the detection of particles arriving in the counter in a random distribution. The rules which must be taken into account in the construction of an analog integrated circuit are shown [fr

  14. A New Analytical Subthreshold Behavior Model for Single-Halo, Dual-Material Gate Silicon-on-Insulator Metal Oxide Semiconductor Field Effect Transistor

    Science.gov (United States)

    Chiang, Te-Kuang

    2008-11-01

    On the basis of the exact solution of the two-dimensional Poisson equation, a new analytical subthreshold behavior model consisting of the two-dimensional potential, threshold voltage, and subthreshold current for the single-halo, dual-material gate (SHDMG) silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) is developed. The model is verified by the good agreement with a numerical simulation using the device simulator MEDICI. The model not only offers a physical insight into device physics but is also an efficient device model for the circuit simulation.

  15. Antiferromagnetic Spin Wave Field-Effect Transistor

    Science.gov (United States)

    Cheng, Ran; Daniels, Matthew W.; Zhu, Jian-Gang; Xiao, Di

    2016-01-01

    In a collinear antiferromagnet with easy-axis anisotropy, symmetry dictates that the spin wave modes must be doubly degenerate. Theses two modes, distinguished by their opposite polarization and available only in antiferromagnets, give rise to a novel degree of freedom to encode and process information. We show that the spin wave polarization can be manipulated by an electric field induced Dzyaloshinskii-Moriya interaction and magnetic anisotropy. We propose a prototype spin wave field-effect transistor which realizes a gate-tunable magnonic analog of the Faraday effect, and demonstrate its application in THz signal modulation. Our findings open up the exciting possibility of digital data processing utilizing antiferromagnetic spin waves and enable the direct projection of optical computing concepts onto the mesoscopic scale. PMID:27048928

  16. Practical investigation of the gate bias effect on the reverse recovery behavior of the body diode in power MOSFETs

    DEFF Research Database (Denmark)

    Lindberg-Poulsen, Kristian; Petersen, Lars Press; Ouyang, Ziwei

    2014-01-01

    This work considers an alternative method of reducing the body diode reverse recovery by taking advantage of the MOSFET body effect, and applying a bias voltage to the gate before reverse recovery. A test method is presented, allowing the accurate measurement of voltage and current waveforms during...... reverse recovery at high di=dt. Different bias voltages and dead times are combined, giving a loss map which makes it possible to evaluate the practical efficacy of gate bias on reducing the MOSFET body diode reverse recovery, while comparing it to the well known methods of dead time optimization....... A selection of 60V devices for synchronous rectification are compared for their suitability for gate bias, while a selection of 600V devices are compared for the efficacy of gate bias for the zero voltage transition converter application. The results show that many of the tested devices benefit from greatly...

  17. Direct coupled amplifiers using field effect transistors

    International Nuclear Information System (INIS)

    Fowler, E.P.

    1964-03-01

    The concept of the uni-polar field effect transistor (P.E.T.) was known before the invention of the bi-polar transistor but it is only recently that they have been made commercially. Being produced as yet only in small quantities, their price imposes a restriction on use to circuits where their peculiar properties can be exploited to the full. One such application is described here where the combination of low voltage drift and relatively low input leakage current are necessarily used together. One of the instruments used to control nuclear reactors has a logarithmic response to the mean output current from a polarised ionisation chamber. The logarithmic signal is then differentiated electrically, the result being displayed on a meter calibrated to show the reactor divergence or doubling time. If displayed in doubling time the scale is calibrated reciprocally. Because of the wide range obtained in the logarithmic section and the limited supply voltage, an output of 1 volt per decade change in ionisation current is used. Differentiating this gives a current of 1.5 x 10 -8 A for p.s.D. (20 sec. doubling time) in the differentiating amplifier. To overcome some of the problems of noise due to statistical variations in input current, the circuit design necessitates a resistive path to ground at the amplifier input of 20 M.ohms. A schematic diagram is shown. 1. It is evident that a zero drift of 1% can be caused by a leakage current of 1.5 x 10 -10 A or an offset voltage of 3 mV at the amplifier input. Although the presently used electrometer valve is satisfactory from the point of view of grid current, there have been sudden changes in grid to grid voltage (the valve is a double triode) of up to 10 m.V. It has been found that a pair of F.E.T's. can be used to replace the electrometer valve so long as care is taken in correct balance of the two devices. An investigation has been made into the characteristics of some fourteen devices to see whether those with very

  18. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.

    2011-10-12

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  19. Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels

    CERN Document Server

    Re, V.; Manghisoni, M.; Riceputi, E.; Traversi, G.; Ratti, L.

    2018-01-01

    This paper is focused on the study of the noise performance of 65 nm CMOS transistors at extremely high total ionizing dose (TID) levels of the order of several hundreds of Mrad(SiO2). Noise measurements are reported and discussed, analyzing radiation effects on 1/ f noise and channel thermal noise. In nMOSFETs, up to 10 Mrad(SiO2), the experimental behavior is consistent with a damage mechanism mainly associ- ated with lateral isolation oxides, and can be modeled by parasitic transistors turning on after irradiation and contributing to the total noise of the device. At very high dose, these parasitic transistors tend to be turned off by negative charge accumulating in interface states and compensating radiation-induced positive charge building up inside thick isolation oxides. Effects associated with ionization and hydrogen transport in spacer oxides may become dominant at 600 Mrad(SiO2) and may explain the observed noise behavior at extremely high TID. The results of this analysis provide an understanding o...

  20. Modulation of sub-threshold properties of InGaAs MOSFETs by La2O3 gate dielectrics

    Directory of Open Access Journals (Sweden)

    C.-Y. Chang

    2017-09-01

    Full Text Available We have found the ferroelectric-like characteristics in atomic layer deposition (ALD La2O3 films with thermal budget lower than 300oC in polarization-electric field (P-E and capacitance-gate voltage (C-V measurements on W/La2O3/W and W/La2O3/InGaAs capacitors. The observed hysteresis and saturation of polarization in the P-E characteristics of the W/La2O3/W and the W/La2O3/InGaAs capacitors, and the counter-clockwise C-V hysteresis in the C-V curves of the W/La2O3/InGaAs capacitors suggest a possibility of ferroelectricity in the present La2O3 films. By using this gate stack, W/La2O3/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs were fabricated in order to examine the negative capacitance (NC effect due to La2O3. It is found that the sub-threshold swing (SS of W/La2O3/InGaAs MOSFETs is lower at low temperature than the theoretical limit of MOSFETs. This result strongly suggests that the W/La2O3/InGaAs MOSFETs can work as a steep-slope III-V negative capacitance field-effect transistor (NCFET.

  1. Scaling Beyond Moore: Single Electron Transistor and Single Atom Transistor Integration on CMOS

    OpenAIRE

    Deshpande , Veeresh

    2012-01-01

    Continuous scaling of MOSFET dimensions has led us to the era of nanoelectronics. Multigate FET (MuGFET) architecture with 'nanowire channel'is being considered as one feasible enabler of MOSFET scaling to end-of-roadmap. Alongside classical CMOS or Moore's law scaling, many novel device proposals exploiting nanoscale phenomena have been made. Single Electron Transistor (SET), with its unique 'Coulomb Blockade' phenomena, and Single Atom Transistor (SAT), as an ultimately scaled transistor, a...

  2. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    Directory of Open Access Journals (Sweden)

    C. Spathis

    2015-08-01

    Full Text Available Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

  3. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Spathis, C.; Birbas, A.; Georgakopoulou, K.

    2015-08-01

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

  4. Great Experiments in Physics-Discovery of Transistor Effect that ...

    Indian Academy of Sciences (India)

    Home; Journals; Resonance – Journal of Science Education; Volume 3; Issue 9. Great Experiments in Physics - Discovery of Transistor Effect that Changed the Communication World. Amit Roy. Series Article Volume 3 Issue 9 September 1998 pp 6-13 ...

  5. Organic semiconductors for organic field-effect transistors

    Directory of Open Access Journals (Sweden)

    Yoshiro Yamashita

    2009-01-01

    Full Text Available The advantages of organic field-effect transistors (OFETs, such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.

  6. Real-Time In Vivo Dosimetry With MOSFET Detectors in Serial Tomotherapy for Head and Neck Cancer Patients

    International Nuclear Information System (INIS)

    Qi Zhenyu; Deng Xiaowu; Huang Shaomin; Shiu, Almon; Lerch, Michael; Metcalfe, Peter; Rosenfeld, Anatoly; Kron, Tomas

    2011-01-01

    Purpose: A real-time dose verification method using a recently designed metal oxide semiconductor field effect transistor (MOSFET) dosimetry system was evaluated for quality assurance (QA) of intensity-modulated radiation therapy (IMRT). Methods and Materials: Following the investigation of key parameters that might affect the accuracy of MOSFET measurements (i.e., source surface distance [SSD], field size, beam incident angles and radiation energy spectrum), the feasibility of this detector in IMRT dose verification was demonstrated by comparison with ion chamber measurements taken in an IMRT QA phantom. Real-time in vivo measurements were also performed with the MOSFET system during serial tomotherapy treatments administered to 8 head and neck cancer patients. Results: MOSFET sensitivity did not change with SSD. For field sizes smaller than 20 x 20 cm 2 , MOFET sensitivity varied within 1.0%. The detector angular response was isotropic within 2% over 360 o , and the observed sensitivity variation due to changes in the energy spectrum was negligible in 6-MV photons. MOSFET system measurements and ion chamber measurements agreed at all points in IMRT phantom plan verification, within 5%. The mean difference between 48 IMRT MOSFET-measured doses and calculated values in 8 patients was 3.33% and ranged from -2.20% to 7.89%. More than 90% of the total measurements had deviations of less than 5% from the planned doses. Conclusion: The MOSFET dosimetry system has been proven to be an effective tool in evaluating the actual dose within individual patients during IMRT treatment.

  7. Temperature influence on the gate-induced floating body effect parameters in fully depleted SOI nMOSFETs

    Science.gov (United States)

    Agopian, Paula Ghedini Der; Martino, João Antonio; Simoen, Eddy; Claeys, Cor

    2008-11-01

    The temperature influence on the gate-induced floating body effect (GIFBE) in fully depleted (FD) silicon-on-insulator (SOI) nMOSFETs is investigated, based on experimental results and two-dimensional numerical simulations. The GIFBE behavior will be evaluated taking into account the impact of carrier recombination and of the effective electric field mobility degradation on the second peak in the transconductance (gm). This floating body effect is also analyzed as a function of temperature. It is shown that the variation of the studied parameters with temperature results in a "C" shape of the threshold voltage corresponding with the second peak in the gm curve.

  8. Separation of effects of oxide-trapped charge and interface-trapped charge on mobility in irradiated power MOSFETs

    International Nuclear Information System (INIS)

    Zupac, D.; Galloway, K.F.; Khosropour, P.; Anderson, S.R.; Schrimpf, R.D.

    1993-01-01

    An effective approach to separating the effects of oxide-trapped charge and interface-trapped charge on mobility degradation in irradiated MOSFETs is demonstrated. It is based on analyzing mobility data sets which have different functional relationships between the radiation-induced-oxide-trapped charge and interface-trapped charge. Separation of effects of oxide-trapped charge and interface-trapped charge is possible only if these two trapped charge components are not linearly dependent. A significant contribution of oxide-trapped charge to mobility degradation is demonstrated and quantified

  9. Non-Planar Nano-Scale Fin Field Effect Transistors on Textile, Paper, Wood, Stone, and Vinyl via Soft Material-Enabled Double-Transfer Printing

    KAUST Repository

    Rojas, Jhonathan Prieto

    2015-05-01

    The ability to incorporate rigid but high-performance nano-scale non-planar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in-situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nano-scale, non-planar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-κ/metal gate stack, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 μm gate length exhibits ION ~70 μA/μm (VDS = 2 V, VGS = 2 V) and a low sub-threshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the device’s performance with insignificant deterioration even at a high bending state.

  10. Reaching saturation in patterned source vertical organic field effect transistors

    Science.gov (United States)

    Greenman, Michael; Sheleg, Gil; Keum, Chang-min; Zucker, Jonathan; Lussem, Bjorn; Tessler, Nir

    2017-05-01

    Like most of the vertical transistors, the Patterned Source Vertical Organic Field Effect Transistor (PS-VOFET) does not exhibit saturation in the output characteristics. The importance of achieving a good saturation is demonstrated in a vertical organic light emitting transistor; however, this is critical for any application requiring the transistor to act as a current source. Thereafter, a 2D simulation tool was used to explain the physical mechanisms that prevent saturation as well as to suggest ways to overcome them. We found that by isolating the source facet from the drain-source electric field, the PS-VOFET architecture exhibits saturation. The process used for fabricating such saturation-enhancing structure is then described. The new device demonstrated close to an ideal saturation with only 1% change in the drain-source current over a 10 V change in the drain-source voltage.

  11. Separation Test Method for Investigation of Current Density Effects on Bond Wires of SiC Power MOSFET Modules

    DEFF Research Database (Denmark)

    Luo, Haoze; Iannuzzo, Francesco; Blaabjerg, Frede

    2017-01-01

    In this paper, a separation test method for eliminating the effects of different current densities on the bond wires is proposed. The separation test method makes it possible to study the effect of different current density on the fatigue damage of bond wires without changing the temperature swing...... and average temperature during the test. By analyzing the output characteristics of the linear region of MOSFET, the constraint relations among the gate voltage, on-state voltage drop and junction temperature are revealed in this paper. The one-to-one correspondence between gate voltage and conduction power...

  12. Total Dose Effects in Conventional Bipolar Transistors

    Science.gov (United States)

    Johnston, A. H.; Swift, G. W.; Rax, B. G.

    1994-01-01

    This paper examines various factors in bipolar device construction and design, and discusses their impact on radiation hardness. The intent of the paper is to improve understanding of the underlying mechanisms for practical devices without special test structures, and to provide (1) guidance in ways to select transistor designs that are more resistant to radiation damage, and (2) methods to estimate the maximum amount of damage that might be expected from a basic transistor design. The latter factor is extremely important in assessing the risk that future lots of devices will be substantially below design limits, which are usually based on test data for older devices.

  13. Characterization of a Common-Source Amplifier Using Ferroelectric Transistors

    Science.gov (United States)

    Hunt, Mitchell; Sayyah, Rana; MacLeond, Todd C.; Ho, Pat D.

    2010-01-01

    This paper presents empirical data that was collected through experiments using a FeFET in the established common-source amplifier circuit. The unique behavior of the FeFET lends itself to interesting and useful operation in this widely used common-source amplifier. The paper examines the effect of using a ferroelectric transistor for the amplifier. It also examines the effects of varying load resistance, biasing, and input voltages on the output signal and gives several examples of the output of the amplifier for a given input. The difference between a commonsource amplifier using a ferroelectric transistor and that using a MOSFET is addressed.

  14. Negative Capacitance Field Effect Transistors; Capacitance Matching and non-Hysteretic Operation

    OpenAIRE

    Saeidi, Ali; Jazaeri, Farzan; Bellando, Francesco; Stolichnov, Igor; Enz, Christian; Ionescu, Mihai Adrian

    2017-01-01

    This work experimentally demonstrates negative capacitance MOSFETs in hysteretic and non-hysteretic modes of operation. A PZT capacitor is externally connected to the gate of commercial nMOSFETs fabricated in 28nm CMOS technology to explore the negative capacitance effect. In hysteretic devices, subthreshold slope as steep as 10mV/dec is achieved in the region where the ferroelectric represents an S-shape polarization. In addition, a matching condition is achieved between a PZT capacitor and ...

  15. GaN MOSFET with Boron Trichloride-Based Dry Recess Process

    International Nuclear Information System (INIS)

    Jiang, Y; Wang, Q P; Tamai, K; Ao, J P; Ohno, Y; Miyashita, T; Motoyama, S; Wang, D J

    2013-01-01

    The dry recessed-gate GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure using boron trichloride (BCl 3 ) as etching gas were fabricated and characterized. Etching with different etching power was conducted. Devices with silicon tetrachloride (SiCl 4 ) etching gas were also prepared for comparison. Field-effect mobility and interface state density were extracted from current-voltage (I-V) characteristics. GaN MOSFETs on AlGaN/GaN heterostructure with BCl 3 based dry recess achieved a high maximum electron mobility of 141.5 cm 2 V −1 s −1 and a low interface state density.

  16. Estimating Effective Dose from Phantom Dose Measurements in Atrial Fibrillation Ablation Procedures and Comparison of MOSFET and TLD Detectors in a Small Animal Dosimetry Setting

    Science.gov (United States)

    Anderson-Evans, Colin David

    Two different studies will be presented in this work. The first involves the calculation of effective dose from a phantom study which simulates an atrial fibrillation (AF) ablation procedure. The second involves the validation of metal-oxide semiconducting field effect transistors (MOSFET) for small animal dosimetry applications as well as improved characterization of the animal irradiators on Duke University's campus. Atrial Fibrillation is an ever increasing health risk in the United States. The most common type of cardiac arrhythmia, AF is associated with increased mortality and ischemic cerebrovascular events. Managing AF can include, among other treatments, an interventional procedure called catheter ablation. The procedure involves the use of biplane fluoroscopy during which a patient can be exposed to radiation for as much as two hours or more. The deleterious effects of radiation become a concern when dealing with long fluoroscopy times, and because the AF ablation procedure is elective, it makes relating the risks of radiation ever more essential. This study hopes to quantify the risk through the derivation of dose conversion coefficients (DCCs) from the dose-area product (DAP) with the intent that DCCs can be used to provide estimates of effective dose (ED) for typical AF ablation procedures. A bi-plane fluoroscopic and angiographic system was used for the simulated AF ablation procedures. For acquisition of organ dose measurements, 20 diagnostic MOSFET detectors were placed at selected organs in a male anthropomorphic phantom, and these detectors were attached to 4 bias supplies to obtain organ dose readings. The DAP was recorded from the system console and independently validated with an ionization chamber and radiochromic film. Bi-plane fluoroscopy was performed on the phantom for 10 minutes to acquire the dose rate for each organ, and the average clinical procedure time was multiplied by each organ dose rate to obtain individual organ doses. The

  17. High performance tunnel field-effect transistor by gate and source engineering.

    Science.gov (United States)

    Huang, Ru; Huang, Qianqian; Chen, Shaowen; Wu, Chunlei; Wang, Jiaxin; An, Xia; Wang, Yangyuan

    2014-12-19

    As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I(ON)/I(OFF) ratio (∼ 10(7)) at V(DS) = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high ION/IOFF ratio of ∼ 10(8) and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec(-1) was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching.

  18. On the drain bias dependence of long-channel silicon-on-insulator-based tunnel field-effect transistors

    Science.gov (United States)

    Fukuda, Koichi; Mori, Takahiro; Asai, Hidehiro; Hattori, Junichi; Mizubayashi, Wataru; Morita, Yukinori; Fuketa, Hiroshi; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku; Endo, Kazuhiko; Matsukawa, Takashi

    2017-04-01

    The drain bias dependence of tunnel field-effect transistors (TFETs) is examined on the basis of the measured characteristics and device simulation to understand the electrical behavior of TFETs. Our analyses focus on the long-channel silicon-on-insulator (SOI)-based TFETs as a good basis for further studies of short-channel effects, scaling issues, and more complicated device structures, such as multigate or nanowire TFETs. By device simulation, it is revealed that the drain bias dependence of the transfer characteristics of the measured TFETs is governed by two physical mechanisms: the density of states (DOS) occupancy factor, which depends on drain-to-source bias voltage, and channel electrostatic potential, which is limited by the drain bias through strong carrier accumulation. These mechanisms differ from the drain-induced barrier lowering (DIBL) of metal-oxide-semiconductor field-effect-transistors (MOSFETs), and cause a significant impact even in long-channel SOIs. Finally, the obtained insights are successfully implemented in a TFET compact model.

  19. Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

    Science.gov (United States)

    Es-Sakhi, Azzedin D.

    Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the

  20. Radiation-Induced Short Channel (RISCE) and Narrow Channel (RINCE) Effects in 65 and 130 nm MOSFETs

    CERN Document Server

    Faccio, F; Cornale, D; Paccagnella, A; Gerardin, S

    2015-01-01

    The behavior of transistors in commercial-grade complementary metal-oxide semiconductor technologies in the 65 and 130 nm nodes has been explored up to a total ionizing dose of 1 Grad. The large dose tolerance of the thin gate oxide is confirmed, but defects in the spacer and STI oxides have a strong effect on the performance of the transistors. A radiation-induced short channel effect is traced to charge trapping in the spacers used for drain engineering, while a radiation-induced narrow channel effect is due to defect generation in the lateral isolation oxide (STI). These strongly degrade the electrical characteristics of short and narrow channel transistors at high doses, and their magnitude depends on the applied bias and temperature during irradiation in a complex way.

  1. Modeling and simulation of 4H-SiC field effect transistor

    Science.gov (United States)

    Pedryc, A.; Martychowiec, A.; Kociubiński, A.

    2017-08-01

    This paper presents the technological issue of silicon carbide MOSFET design. Through the use of simulations of silicon carbide transistor, the influence of the different the technological parameters are described and discussed. MOSFET transistor was performed in Silvaco TCAD using technology elaborated at Lublin University of Technology. The most important parameters related to ion implantation, which was used in p-i-n photodiode technology. The electrical simulations were performed, transfer and output characteristics for different values of technological parameters were generated - influence of gate oxide thickness on threshold voltage and influence of channel length modulation were checked. The results of simulations as well as transfer and output characteristics allowed to select optimal parameters between expected device working and available technology - gate oxide thickness and transistor channel length were established. This work was in fact carried out to increase our understanding of the device characteristics so as to allow the design of new SiC circuits which could meet the stressful requirements of ultraviolet detector systems.

  2. Charge carrier velocity in graphene field-effect transistors

    Science.gov (United States)

    Bonmann, Marlene; Vorobiev, Andrei; Andersson, Michael A.; Stake, Jan

    2017-12-01

    To extend the frequency range of transistors into the terahertz domain, new transistor technologies, materials, and device concepts must be continuously developed. The quality of the interface between the involved materials is a highly critical factor. The presence of impurities can degrade device performance and reliability. In this paper, we present a method that allows the study of the charge carrier velocity in a field-effect transistor vs impurity levels. The charge carrier velocity is found using high-frequency scattering parameter measurements followed by delay time analysis. The limiting factors of the saturation velocity and the effect of impurities are then analysed by applying analytical models of the field-dependent and phonon-limited carrier velocity. As an example, this method is applied to a top-gated graphene field-effect transistor (GFET). We find that the extracted saturation velocity is ca. 1.4 ×107 cm/s and is mainly limited by silicon oxide substrate phonons. Within the considered range of residual charge carrier concentrations, charged impurities do not limit the saturation velocity directly by the phonon mechanism. Instead, the impurities act as traps that emit charge carriers at high fields, preventing the current from saturation and thus limiting power gain of the GFETs. The method described in this work helps to better understand the influence of impurities and clarifies methods of further transistor development. High quality interfaces are required to achieve current saturation via velocity saturation in GFETs.

  3. A scanning microscopy technique based on capacitive coupling with a field-effect transistor integrated with the tip.

    Science.gov (United States)

    Shin, Kumjae; Kang, Dae sil; Lee, Sang hoon; Moon, Wonkyu

    2015-12-01

    We propose a method for measuring the capacitance of a thin layer using a Tip-on-Gate of Field-Effect Transistor (ToGoFET) probe. A ToGoFET probe with a metal-oxide-semiconductor field-effect transistor (MOSFET) with an ion-implant channel was embedded at the end of a cantilever and a Pt tip was fabricated using micro-machining. The ToGoFET probe was used to detect an alternating electric field at the dielectric surface. A dielectric buried metal sample was prepared; a sinusoidal input signal was applied to the buried metal lines; and the ToGoFET probe detected the electric field at the tip via the dielectric. The AC signal detected by the ToGoFET probe was demodulated by a simple AC-to-DC converter. Experimentally, it was shown that an electric field could be measured at the surface of the dielectric layer above a buried metal line. This promising result shows that it is possible to measure the surface local capacitance. Copyright © 2015 Elsevier B.V. All rights reserved.

  4. Electromechanical field effect transistors based on multilayer phosphorene nanoribbons

    Energy Technology Data Exchange (ETDEWEB)

    Jiang, Z.T., E-mail: jiangzhaotan@hotmail.com; Lv, Z.T.; Zhang, X.D.

    2017-06-21

    Based on the tight-binding Hamiltonian approach, we demonstrate that the electromechanical field effect transistors (FETs) can be realized by using the multilayer phosphorene nanoribbons (PNRs). The synergistic combination of the electric field and the external strains can establish the on–off switching since the electric field can shift or split the energy band, and the mechanical strains can widen or narrow the band widths. This kind of multilayer PNR FETs, much solider than the monolayer PNR one and more easily biased by different electric fields, has more transport channels consequently leading to the higher on–off current ratio or the higher sensitivity to the electric fields. Meanwhile, the strain-induced band-flattening will be beneficial for improving the flexibility in designing the electromechanical FETs. In addition, such electromechanical FETs can act as strain-controlled FETs or mechanical detectors for detecting the strains, indicating their potential applications in nano- and micro-electromechanical fields. - Highlights: • Electromechanical transistors are designed with multilayer phosphorene nanoribbons. • Electromechanical synergistic effect can establish the on–off switching more flexibly. • Multilayer transistors, solider and more easily biased, has more transport channels. • Electromechanical transistors can act as strain-controlled transistors or mechanical detectors.

  5. STRUCTURAL AND TECHNOLOGICAL PARAMETERS AFFECTING THE BIPOLAR STATIC INDUCTION TRANSISTOR (BSIT RESISTANCE

    Directory of Open Access Journals (Sweden)

    T. A. Ismailov

    2016-01-01

    Full Text Available Aim. The aim of the study is to determine the impact of structural and technological parameters on the resistance of the bipolar static induction transistor.Methods. The paper provides a comparative analysis of the advantages of bipolar static induction transistor compared to the bipolar power transistors, MOSFETs and insulated-gate bipolar transistor (IGBT. Considered are structural and technological parameters that influence the resistance of BSIT-transistor.Result. As a result of experimental study on silicon substrates were formed test prototypes of BSIT transistor structure, are presented calculation and experimental works. Obtained are the resistance dependencies of the transistor cell on the thickness of the epitaxial film; the resistance dependencies of BSIT transistor cell on the effective gate length for different values of the impurity concentration in the epitaxial film; dependencies resistance of the transistor cell on the gate length at different values of the epitaxial film thickness; the resistance dependencies of BSIT transistor cell on the distance between the mask for the p-region and the gate; dependencies on the multiplication the cell resistance by its area on the gate length.Conclusion. When increasing the gate length (Lk and the mask length for the p-region (lp + in the transistor structure, the resistance decreases and the dependence of multiplication of the cell resistance by its area Q on the gate length has this case the minimum.

  6. Vertically aligned carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi

    2012-10-01

    Vertically aligned carbon nanotube field-effect transistors (CNTFETs) have been developed using pure semiconducting carbon nanotubes. The source and drain were vertically stacked, separated by a dielectric, and the carbon nanotubes were placed on the sidewall of the stack to bridge the source and drain. Both the effective gate dielectric and gate electrode were normal to the substrate surface. The channel length is determined by the dielectric thickness between source and drain electrodes, making it easier to fabricate sub-micrometer transistors without using time-consuming electron beam lithography. The transistor area is much smaller than the planar CNTFET due to the vertical arrangement of source and drain and the reduced channel area. © 2012 Elsevier Ltd. All rights reserved.

  7. Nanowire Tunnel Field Effect Transistors: Prospects and Pitfalls

    OpenAIRE

    Sylvia, Somaia Sarwat

    2014-01-01

    The tunnel field effect transistor (TFET) has the potential to operate at lower voltages and lower power than the field effect transistor (FET). The TFET can circumvent the fundamental thermal limit of the inverse subthreshold slope (S) by exploiting interband tunneling of non-equilibrium "cold" carriers. The conduction mechanism in the TFET is governed by band-to-band tunneling which limits the drive current. TFETs built with III-V materials like InAs and InSb can produce enough tunneling cu...

  8. The Complete Semiconductor Transistor and Its Incomplete Forms

    Science.gov (United States)

    Binbin, Jie; Chih-Tang, Sah

    2009-06-01

    This paper describes the definition of the complete transistor. For semiconductor devices, the complete transistor is always bipolar, namely, its electrical characteristics contain both electron and hole currents controlled by their spatial charge distributions. Partially complete or incomplete transistors, via coined names or/and designed physical geometries, included the 1949 Shockley p/n junction transistor (later called Bipolar Junction Transistor, BJT), the 1952 Shockley unipolar 'field-effect' transistor (FET, later called the p/n Junction Gate FET or JGFET), as well as the field-effect transistors introduced by later investigators. Similarities between the surface-channel MOS-gate FET (MOSFET) and the volume-channel BJT are illustrated. The bipolar currents, identified by us in a recent nanometer FET with 2-MOS-gates on thin and nearly pure silicon base, led us to the recognition of the physical makeup and electrical current and charge compositions of a complete transistor and its extension to other three or more terminal signal processing devices, and also the importance of the terminal contacts.

  9. Modeling and PSPICE simulation of NBTI effects in VDMOS transistors

    Directory of Open Access Journals (Sweden)

    Marjanović Miloš

    2015-01-01

    Full Text Available In this paper the results of modeling and simulation of NBTI effects in p-channel power VDMOS transistor have been presented. Based on the experimental results, the threshold voltage shifts and changes of transconductance during the NBT stress have been modeled and implemented in the PSPICE model of the IRF9520 transistor. By predefining the threshold voltage value before the NBT stress, and by assigning the stress time, transfer characteristics of the transistor are simulated. These characteristics are within (1.33÷11.25% limits in respect to the measured ones, which represents a good agreement. [Projekat Ministarstva nauke Republike Srbije, br. OI 171026 i br. TR 32026

  10. Recent progress in photoactive organic field-effect transistors

    OpenAIRE

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-01-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These ar...

  11. Specifics of Pulsed Arc Welding Power Supply Performance Based On A Transistor Switch

    OpenAIRE

    Krampit, Nataliya Yurievna; Kust, Tatiana Sergeevna; Krampit, Maksim Andreevich

    2016-01-01

    Specifics of designing a pulsed arc welding power supply device are presented in the paper. Electronic components for managing large current was analyzed. Strengths and shortcomings of power supply circuits based on thyristor, bipolar transistor and MOSFET are outlined. As a base unit for pulsed arc welding was chosen MOSFET transistor, which is easy to manage. Measures to protect a transistor are given. As for the transistor control device is a microcontroller Arduino which has a low cost an...

  12. High mobility polymer gated organic field effect transistor using zinc ...

    Indian Academy of Sciences (India)

    Mater. Sci., Vol. 37, No. 1, February 2014, pp. 95–99. c Indian Academy of Sciences. High mobility polymer gated organic field effect transistor using zinc phthalocyanine. K R RAJESH. ∗. , V KANNAN, M R KIM, Y S CHAE and J K RHEE. Millimeter- Wave Innovation Technology Research Centre (MINT), Dongguk University,.

  13. Ambipolar light-emitting organic field-effect transistor

    NARCIS (Netherlands)

    Rost, Constance; Karg, Siegfried; Riess, Walter; Loi, Maria Antonietta; Murgia, Mauro; Muccini, Michele

    2004-01-01

    We demonstrate a light-emitting organic field-effect transistor (OFET) with pronounced ambipolar current characteristics. The ambipolar transport layer is a coevaporated thin film of α-quinquethiophene (α-5T) as hole-transport material and N,N'-ditridecylperylene-3,4,9,10-tetracarboxylic diimide

  14. Bimolecular recombination in ambipolar organic field effect transistors

    NARCIS (Netherlands)

    Charrier, D.S.H.; Vries, T. de; Mathijssen, S.G.J.; Geluk, E.-J.; Smits, E.C.P.; Kemerink, M.; Janssen, R.A.J.

    2009-01-01

    In ambipolar organic field effect transistors (OFET) the shape of the channel potential is intimately related to the recombination zone width W, and hence to the electron–hole recombination strength. Experimentally, the recombination profile can be assessed by scanning Kelvin probe microscopy

  15. Electronic properties of germanane field-effect transistors

    NARCIS (Netherlands)

    Madhushankar, B.N.; Kaverzin, A.; Giousis, T.; Potsi, G.; Gournis, D.; Rudolf, P.; Blake, G.R.; van der Wal, C.H.; van Wees, B.J.

    2017-01-01

    A new two dimensional (2D) material—germanane—has been synthesised recently with promising electrical and optical properties. In this paper we report the first realisation of germanane field-effect transistors fabricated from multilayer single crystal flakes. Our germanane devices show transport in

  16. Single-molecule probes in organic field-effect transistors

    NARCIS (Netherlands)

    Nicolet, Aurélien Armel Louis

    2007-01-01

    The goal of this thesis is to study charge transport phenomena in organic materials. This is done optically by means of single-molecule spectroscopy in a field-effect transistor based on a molecular crystal. We present (in Chapter 2) a fundamental requirement for single-molecule spectroscopy

  17. Physics of organic ferroelectric field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J.J.; Asadi, K.; Blom, P.W.M.; Leeuw, D.M. de

    2012-01-01

    Most of the envisaged applications of organic electronics require a nonvolatile memory that can be programmed, erased, and read electrically. Ferroelectric field-effect transistors (FeFET) are especially suitable due to the nondestructive read-out and low power consumption. Here, an analytical model

  18. Nanoscaled biological gated field effect transistors for cytogenetic analysis

    DEFF Research Database (Denmark)

    Kwasny, Dorota; Dimaki, Maria; Andersen, Karsten Brandt

    2014-01-01

    Cytogenetic analysis is the study of chromosome structure and function, and is often used in cancer diagnosis, as many chromosome abnormalities are linked to the onset of cancer. A novel label free detection method for chromosomal translocation analysis using nanoscaled field effect transistors...

  19. Operational Stability of Organic Field‐Effect Transistors

    NARCIS (Netherlands)

    Bobbert, P.A.; Sharma, A.; Matthijssen, S.J.G.; Kemerink, M.; de Leeuw, D.M.

    2012-01-01

    Organic field-effect transistors (OFETs) are considered in technological applications for which low cost or mechanical flexibility are crucial factors. The environmental stability of the organic semiconductors used in OFETs has improved to a level that is now sufficient for commercialization.

  20. Establishing a standard calibration methodology for MOSFET detectors in computed tomography dosimetry

    International Nuclear Information System (INIS)

    Brady, S. L.; Kaufman, R. A.

    2012-01-01

    Purpose: The use of metal-oxide-semiconductor field-effect transistor (MOSFET) detectors for patient dosimetry has increased by ∼25% since 2005. Despite this increase, no standard calibration methodology has been identified nor calibration uncertainty quantified for the use of MOSFET dosimetry in CT. This work compares three MOSFET calibration methodologies proposed in the literature, and additionally investigates questions relating to optimal time for signal equilibration and exposure levels for maximum calibration precision. Methods: The calibration methodologies tested were (1) free in-air (FIA) with radiographic x-ray tube, (2) FIA with stationary CT x-ray tube, and (3) within scatter phantom with rotational CT x-ray tube. Each calibration was performed at absorbed dose levels of 10, 23, and 35 mGy. Times of 0 min or 5 min were investigated for signal equilibration before or after signal read out. Results: Calibration precision was measured to be better than 5%–7%, 3%–5%, and 2%–4% for the 10, 23, and 35 mGy respective dose levels, and independent of calibration methodology. No correlation was demonstrated for precision and signal equilibration time when allowing 5 min before or after signal read out. Differences in average calibration coefficients were demonstrated between the FIA with CT calibration methodology 26.7 ± 1.1 mV cGy −1 versus the CT scatter phantom 29.2 ± 1.0 mV cGy −1 and FIA with x-ray 29.9 ± 1.1 mV cGy −1 methodologies. A decrease in MOSFET sensitivity was seen at an average change in read out voltage of ∼3000 mV. Conclusions: The best measured calibration precision was obtained by exposing the MOSFET detectors to 23 mGy. No signal equilibration time is necessary to improve calibration precision. A significant difference between calibration outcomes was demonstrated for FIA with CT compared to the other two methodologies. If the FIA with a CT calibration methodology was used to create calibration coefficients for the

  1. New Analytical Model for Short-Channel Fully Depleted Dual-Material-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors

    Science.gov (United States)

    Te-Kuang Chiang,

    2010-07-01

    Using the exact solution of the two-dimensional Poisson equation, a new analytical model comprising two-dimensional potential and threshold voltage for short-channel fully depleted dual-material-gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed. The model shows that the minimum acceptable channel length can be sustained while repressing the short-channel effects if a thin gate oxide and a thin silicon body are employed in the device. Moreover, by increasing the ratio of the screen gate length to control gate length, the threshold voltage roll-off can be more effectively reduced. The model is verified by the close agreement of its results with those of a numerical simulation using the device simulator MEDICI. The model not only offers an insight into the device physics but is also an efficient model for circuit simulation.

  2. Micro pH Sensors and Biosensors Based on Electrochemical Field Effect Transistors

    Science.gov (United States)

    Sasano, Junji; Niwa, Daisuke; Osaka, Tetsuya

    A study on ion-sensing using field effect transistor (FET) was begun by Bergveld in the 1970s [1-3]. The ion-sensitive (IS) FET is now widely used as a miniaturized pH sensor, commercialized by some companies. First, the principle and structure of the ISFET are introduced in this section. A basic design of ISFET is shown in Fig. 10.1 a. ISFET has silicon substrate with field-effect structures such as electrolyte/IS layer/(insulator)/semiconductor structures; the space charge region in the semiconductor is modulated depending on the gate voltage (V g), same as a typical metal-oxide-semiconductor (MOS) FET. A typical bias V g versus drain-source current (I ds) characteristic of the device that has silicon nitride/silicon dioxide/silicon is shown in Fig. 10.1 b. This characteristic is quite similar to the MOSFET. A prominent difference between ISFET and MOSFET is that the gate voltage for the operation of the device is applied by an electrochemical reference electrode through the electrolyte in contact with the gate insulator. The threshold voltage (V th) could shift according to the value of the pH of the solution. In the MOSFET, the V th would shift depending on the change in the space charge region in the MOS capacitor structure by the application of V g. On the other hand, the V th in ISFET would shift according to the change in the surface potential in the electrolyte/IS layer interface. Therefore, the IS layers and their interfaces in ISFET play an important role in the performance of pH responsibility. It is well-known that the silicon nitride surface shows a good pH response in solution. The silicon nitride layer is often formed by plasma-enhanced chemical vapor deposition (PECVD), which is generally formed at the thickness of 100-500 nm. The V g vs. I ds, characteristics of the silicon nitride-based ISFET indicate a good pH responsibility of 58 mV/decade that shows Nernstian response (Fig. 10.1 c). The shift of the V th depends on the changes of surface

  3. Comparison between Field Effect Transistors and Bipolar Junction Transistors as Transducers in Electrochemical Sensors

    Science.gov (United States)

    Zafar, Sufi; Lu, Minhua; Jagtiani, Ashish

    2017-01-01

    Field effect transistors (FET) have been widely used as transducers in electrochemical sensors for over 40 years. In this report, a FET transducer is compared with the recently proposed bipolar junction transistor (BJT) transducer. Measurements are performed on two chloride electrochemical sensors that are identical in all details except for the transducer device type. Comparative measurements show that the transducer choice significantly impacts the electrochemical sensor characteristics. Signal to noise ratio is 20 to 2 times greater for the BJT sensor. Sensitivity is also enhanced: BJT sensing signal changes by 10 times per pCl, whereas the FET signal changes by 8 or less times. Also, sensor calibration curves are impacted by the transducer choice. Unlike a FET sensor, the calibration curve of the BJT sensor is independent of applied voltages. Hence, a BJT sensor can make quantitative sensing measurements with minimal calibration requirements, an important characteristic for mobile sensing applications. As a demonstration for mobile applications, these BJT sensors are further investigated by measuring chloride levels in artificial human sweat for potential cystic fibrosis diagnostic use. In summary, the BJT device is demonstrated to be a superior transducer in comparison to a FET in an electrochemical sensor.

  4. Aluminum nitride insulating films for MOSFET devices

    Science.gov (United States)

    Lewicki, G. W.; Maserjian, J.

    1972-01-01

    Application of aluminum nitrides as electrical insulator for electric capacitors is discussed. Electrical properties of aluminum nitrides are analyzed and specific use with field effect transistors is defined. Operational limits of field effect transistors are developed.

  5. Fabrication and characterization of Pt/Al2O3/Y2O3/In0.53Ga0.47As MOSFETs with low interface trap density

    Science.gov (United States)

    Kim, Seong Kwang; Geum, Dae-Myeong; Shim, Jae-Phil; Kim, Chang Zoo; Kim, Hyung-jun; Song, Jin Dong; Choi, Won Jun; Choi, Sung-Jin; Kim, Dae Hwan; Kim, Sanghyeon; Kim, Dong Myong

    2017-01-01

    In this work, we fabricated the In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors (MOSFETs) with a MOS interface of Y2O3/In0.53Ga0.47As and recessed gate structure. We investigated the interfacial properties of the gate stack and the junction characteristics of the fabricated MOSFETs. Low subthreshold slope (SS = 110 mV/dec), high on/off current ratio (Ion/Ioff = 106), and high effective mobility of 1600 cm2/V.s were achieved in the MOSFETs at a sheet charge density (Ns) = 1.2 × 1012 cm-2. From the temperature dependence of I-V characteristics, the interface trap density was extracted to be Dit = 2.2 × 1011 cm-2.eV-1 with a negligible trap-assisted leakage current.

  6. Review on analog/radio frequency performance of advanced silicon MOSFETs

    Science.gov (United States)

    Passi, Vikram; Raskin, Jean-Pierre

    2017-12-01

    Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

  7. Lead iodide perovskite light-emitting field-effect transistor

    Science.gov (United States)

    Chin, Xin Yu; Cortecchia, Daniele; Yin, Jun; Bruno, Annalisa; Soci, Cesare

    2015-06-01

    Despite the widespread use of solution-processable hybrid organic-inorganic perovskites in photovoltaic and light-emitting applications, determination of their intrinsic charge transport parameters has been elusive due to the variability of film preparation and history-dependent device performance. Here we show that screening effects associated to ionic transport can be effectively eliminated by lowering the operating temperature of methylammonium lead iodide perovskite (CH3NH3PbI3) field-effect transistors. Field-effect carrier mobility is found to increase by almost two orders of magnitude below 200 K, consistent with phonon scattering-limited transport. Under balanced ambipolar carrier injection, gate-dependent electroluminescence is also observed from the transistor channel, with spectra revealing the tetragonal to orthorhombic phase transition. This demonstration of CH3NH3PbI3 light-emitting field-effect transistors provides intrinsic transport parameters to guide materials and solar cell optimization, and will drive the development of new electro-optic device concepts, such as gated light-emitting diodes and lasers operating at room temperature.

  8. Performance of a 100V Half-Bridge MOSFET Driver, Type MIC4103, Over a Wide Temperature Range

    Science.gov (United States)

    Patterson, Richard L.; Hammoud, Ahmad

    2011-01-01

    The operation of a high frequency, high voltage MOSFET (metal-oxide semiconductor field-effect transistors) driver was investigated over a wide temperature regime that extended beyond its specified range. The Micrel MIC4103 is a 100V, non-inverting, dual driver that is designed to independently drive both high-side and low-side N-channel MOSFETs. It features fast propagation delay times and can drive 1000 pF load with 10ns rise times and 6 ns fall times [1]. The device consumes very little power, has supply under-voltage protection, and is rated for a -40 C to +125 C junction temperature range. The floating high-side driver of the chip can sustain boost voltages up to 100 V. Table I shows some of the device manufacturer s specification.

  9. Signal Processing for Wireless Communication MIMO System with Nano- Scaled CSDG MOSFET based DP4T RF Switch.

    Science.gov (United States)

    Srivastava, Viranjay M

    2015-01-01

    In the present technological expansion, the radio frequency integrated circuits in the wireless communication technologies became useful because of the replacement of increasing number of functions, traditional hardware components by modern digital signal processing. The carrier frequencies used for communication systems, now a day, shifted toward the microwave regime. The signal processing for the multiple inputs multiple output wireless communication system using the Metal- Oxide-Semiconductor Field-Effect-Transistor (MOSFET) has been done a lot. In this research the signal processing with help of nano-scaled Cylindrical Surrounding Double Gate (CSDG) MOSFET by means of Double- Pole Four-Throw Radio-Frequency (DP4T RF) switch, in terms of Insertion loss, Isolation, Reverse isolation and Inter modulation have been analyzed. In addition to this a channel model has been presented. Here, we also discussed some patents relevant to the topic.

  10. Experimental Determination of Quantum and Centroid Capacitance in Arsenide-Antimonide Quantum-Well MOSFETs Incorporating Nonparabolicity Effect

    Science.gov (United States)

    2011-05-01

    14]. While extracting the effective mass from SdH oscillations, the background magnetoresistance was corrected as follows. The envelope of maxima... magnetoresistance that was subtracted from the measured ρXX. Fig. 10 shows the periodic SdH oscillations in ΔρXX/ρ0 (after removing the background...demonstration of metal gate plasmon screening and channel strain engineering in high-κ/metal-gate CMOS transistors, and the investigation of the

  11. Field-effect transistor memories based on ferroelectric polymers

    Science.gov (United States)

    Zhang, Yujia; Wang, Haiyang; Zhang, Lei; Chen, Xiaomeng; Guo, Yu; Sun, Huabin; Li, Yun

    2017-11-01

    Field-effect transistors based on ferroelectrics have attracted intensive interests, because of their non-volatile data retention, rewritability, and non-destructive read-out. In particular, polymeric materials that possess ferroelectric properties are promising for the fabrications of memory devices with high performance, low cost, and large-area manufacturing, by virtue of their good solubility, low-temperature processability, and good chemical stability. In this review, we discuss the material characteristics of ferroelectric polymers, providing an update on the current development of ferroelectric field-effect transistors (Fe-FETs) in non-volatile memory applications. Program supported partially by the NSFC (Nos. 61574074, 61774080), NSFJS (No. BK20170075), and the Open Partnership Joint Projects of NSFC-JSPS Bilateral Joint Research Projects (No. 61511140098).

  12. Simultaneous On-State Voltage and Bond-Wire Resistance Monitoring of Silicon Carbide MOSFETs

    Directory of Open Access Journals (Sweden)

    Nick Baker

    2017-03-01

    Full Text Available In fast switching power semiconductors, the use of a fourth terminal to provide the reference potential for the gate signal—known as a kelvin-source terminal—is becoming common. The introduction of this terminal presents opportunities for condition monitoring systems. This article demonstrates how the voltage between the kelvin-source and power-source can be used to specifically monitor bond-wire degradation. Meanwhile, the drain to kelvin-source voltage can be monitored to track defects in the semiconductor die or gate driver. Through an accelerated aging test on 20 A Silicon Carbide Metal-Oxide-Semiconductor-Field-Effect Transistors (MOSFETs, it is shown that there are opposing trends in the evolution of the on-state resistances of both the bond-wires and the MOSFET die. In summary, after 50,000 temperature cycles, the resistance of the bond-wires increased by up to 2 mΩ, while the on-state resistance of the MOSFET dies decreased by approximately 1 mΩ. The conventional failure precursor (monitoring a single forward voltage cannot distinguish between semiconductor die or bond-wire degradation. Therefore, the ability to monitor both these parameters due to the presence of an auxiliary-source terminal can provide more detailed information regarding the aging process of a device.

  13. Single-event burnout hardening of planar power MOSFET with partially widened trench source

    Science.gov (United States)

    Lu, Jiang; Liu, Hainan; Cai, Xiaowu; Luo, Jiajun; Li, Bo; Li, Binhong; Wang, Lixin; Han, Zhengsheng

    2018-03-01

    We present a single-event burnout (SEB) hardened planar power MOSFET with partially widened trench sources by three-dimensional (3D) numerical simulation. The advantage of the proposed structure is that the work of the parasitic bipolar transistor inherited in the power MOSFET is suppressed effectively due to the elimination of the most sensitive region (P-well region below the N+ source). The simulation result shows that the proposed structure can enhance the SEB survivability significantly. The critical value of linear energy transfer (LET), which indicates the maximum deposited energy on the device without SEB behavior, increases from 0.06 to 0.7 pC/μm. The SEB threshold voltage increases to 120 V, which is 80% of the rated breakdown voltage. Meanwhile, the main parameter characteristics of the proposed structure remain similar with those of the conventional planar structure. Therefore, this structure offers a potential optimization path to planar power MOSFET with high SEB survivability for space and atmospheric applications. Project supported by the National Natural Science Foundation of China (Nos. 61404161, 61404068, 61404169).

  14. Organic field-effect transistors using single crystals.

    Science.gov (United States)

    Hasegawa, Tatsuo; Takeya, Jun

    2009-04-01

    Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.

  15. Organic field-effect transistors using single crystals

    Directory of Open Access Journals (Sweden)

    Tatsuo Hasegawa and Jun Takeya

    2009-01-01

    Full Text Available Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs, the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20–40 cm2 Vs−1, achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.

  16. Modeling of Quasi-ballistic transport in multi-gate MOSFET for circuit simulations

    International Nuclear Information System (INIS)

    Martinie, Sebastien

    2009-01-01

    Today, the MOSFET transistor reaches deca-nanometer dimensions for which the effects of ballistic transport can no longer be neglected. The challenge is therefore to be able to introduce (quasi-)ballistic transport in the modeling of new devices and evaluates its impact at the circuit level. In this context, our work focuses on the introduction of (quasi-)ballistic transport in compact model of multi-gate transistor for the simulation of circuit elements. Firstly, the McKelvey's method applied to MOSFET has been used to synthesize existing works on analytical modeling of ballistic / quasi-ballistic transport. Then, we built a macroscopic model called 'quasi-ballistic mobility' (starting from pioneering work of Rhew et al), following the comparison between the moment method and the McKelvey method to describe (quasi-)ballistic transport in TCAD environment. Secondly, results from this first model have led us to build our (quasi-)ballistic current by adapting or creating new approaches to take into account various effects of nano-scale devices: short-channel effects, quantum confinement and scattering mechanisms. Finally, our work investigates the impact of the transport properties on the performances of circuit operation. (author)

  17. Graphene-based field-effect transistor biosensors

    Science.gov (United States)

    Chen; , Junhong; Mao, Shun; Lu, Ganhua

    2017-06-14

    The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.

  18. Interdigitated Extended Gate Field Effect Transistor Without Reference Electrode

    Science.gov (United States)

    Ali, Ghusoon M.

    2017-02-01

    An interdigitated extended gate field effect transistor (IEGFET) has been proposed as a modified pH sensor structure of an extended gate field effect transistor (EGFET). The reference electrode and the extended gate in the conventional device have been replaced by a single interdigitated extended gate. A metal-semiconductor-metal interdigitated extended gate containing two multi-finger Ni electrodes based on zinc oxide (ZnO) thin film as a pH-sensitive membrane. ZnO thin film was grown on a p-type Si (100) substrate by the sol-gel technique. The fabricated extended gate is connected to a commercial metal-oxide-semiconductor field-effect transistor device in CD4007UB. The experimental data show that this structure has real time and linear pH voltage and current sensitivities in a concentration range between pH 4 and 11. The voltage and current sensitivities are found to be about 22.4 mV/pH and 45 μA/pH, respectively. Reference electrode elimination makes the IEGFET device simple to fabricate, easy to carry out the measurements, needing a small volume of solution to test and suitable for disposable biosensor applications. Furthermore, this uncomplicated structure could be extended to fabricate multiple ions microsensors and lab-on-chip devices.

  19. Etude et modélisation du comportement électrique des transistors MOS fortement submicroniques

    OpenAIRE

    Prégaldiny , Fabien

    2003-01-01

    Membres du jury : Pr Jean-Louis Balladore (ULP), Pr Christian C. Enz (EPFL), Pr Pierre Gentil (INPG), Pr Daniel Mathiot (ULP), Pr Christophe Lallement (ULP), Dr Jean-Michel Sallese (EPFL).; Accurate MOS transistor modeling for circuit design and simulation is a constant challenge due to the continuously evolving of CMOS technology. The objective of this thesis is on the one hand to study the main effects resulting from MOSFET miniaturization and on the other hand to propose simple and origina...

  20. The four-gate transistor

    Science.gov (United States)

    Mojarradi, M. M.; Cristoveanu, S.; Allibert, F.; France, G.; Blalock, B.; Durfrene, B.

    2002-01-01

    The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.

  1. Understanding noise suppression in heterojunction field-effect transistors

    International Nuclear Information System (INIS)

    Green, F.

    1996-01-01

    Full text: The enhanced transport properties displayed by quantum-well-confined, two-dimensional, electron systems underpin the success of heterojunction, field-effect transistors. At cryogenic temperatures, these devices exhibit impressive mobilities and, as a result, high signal gain and low noise. Conventional wisdom has it that the same favourable conditions also hold for normal room-temperature operation. In that case, however, high mobilities are precluded by abundant electron-phonon scattering. Our recent study of nonequilibrium current noise shows that quantum confinement, not high mobility, is the principal source of noise in these devices; this opens up new and exciting opportunities in low-noise transistor design. As trends in millimetre-wave technology push frequencies beyond 100 GHz, it is essential to develop a genuine understanding of noise processes in heterojunction devices

  2. Graphene-graphite oxide field-effect transistors.

    Science.gov (United States)

    Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

    2012-03-14

    Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

  3. Top- and side-gated epitaxial graphene field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Li, Xuebin; Wu, Xiaosong; Sprinkle, Mike; Ming, Fan; Ruan, Ming; Hu, Yike; De Heer, Walt A. [Georgia Institute of Technology, School of Physics, Atlanta, GA (United States); Berger, Claire [Georgia Institute of Technology, School of Physics, Atlanta, GA (United States); CNRS-Institut Neel, Grenoble (France)

    2010-02-15

    Three types of first generation epitaxial graphene (EG) field effect transistors (FET) are presented and their relative merits are discussed. Graphene is epitaxially grown on both the carbon and silicon faces of hexagonal silicon carbide and patterned with electron beam lithography. The channels have a Hall bar geometry to facilitate magnetoresistance measurements. FETs patterned on the Si-face exhibit off-to-on channel resistance ratios that exceed 30. C-face FETs have lower off-to-on resistance ratios, but their mobilities (up to 5000 cm{sup 2}/Vs) are much larger than that for Si-face transistors. Initial investigations into all-graphene side-gate FET structures are promising. Conductivity (left panel) and transport resistances {rho}{sub xx} and {rho}{sub xy} of a top gate graphene Hall bar on SiC Si-face, showing a sign reversal of the hall coefficient at the resistance peak. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

  4. Total ionizing dose (TID) effect and single event effect (SEE) in quasi-SOI nMOSFETs

    International Nuclear Information System (INIS)

    Tan, Fei; Huang, Ru; An, Xia; Wu, Weikang; Feng, Hui; Huang, Liangxi; Fan, Jiewen; Zhang, Xing; Wang, Yangyuan

    2014-01-01

    This paper studies the total ionizing dose (TID) and single event effect (SEE) in quasi-SOI nMOSFETs for the first time. After exposure to gamma rays, the off-state leakage current (I off ) of a quasi-SOI device increases with the accumulating TID, and the on-state bias configuration is shown to be the worst-case bias configuration during irradiation. Although an additional TID-sensitive region is introduced by the unique structure of the quasi-SOI device, the influence of positive charge trapped in L-type oxide layers on the degradation of device performance is neglectable. Since the TID-induced leakage path in the quasi-SOI device is greatly reduced due to the isolation of L-type oxide layers, the TID-induced I off  degradation in the quasi-SOI device is greatly suppressed. In addition, 3D simulation is performed to investigate the SEE of the quasi-SOI device. The full-width at half-maximum (FWHM) of worst-case drain current transient and collected charges of the quasi-SOI device after single-ion-striking is smaller than in a bulk Si device, indicating that the quasi-SOI device inherits the advantage of an SOI device in single event transient immunity. Therefore, the quasi-SOI device, which has improved electrical properties and radiation-hardened characteristics for both TID and SEE, can be considered as one of the promising candidates for space applications. (paper)

  5. Biomolecular detection using a metal semiconductor field effect transistor

    Science.gov (United States)

    Estephan, Elias; Saab, Marie-Belle; Buzatu, Petre; Aulombard, Roger; Cuisinier, Frédéric J. G.; Gergely, Csilla; Cloitre, Thierry

    2010-04-01

    In this work, our attention was drawn towards developing affinity-based electrical biosensors, using a MESFET (Metal Semiconductor Field Effect Transistor). Semiconductor (SC) surfaces must be prepared before the incubations with biomolecules. The peptides route was adapted to exceed and bypass the limits revealed by other types of surface modification due to the unwanted unspecific interactions. As these peptides reveal specific recognition of materials, then controlled functionalization can be achieved. Peptides were produced by phage display technology using a library of M13 bacteriophage. After several rounds of bio-panning, the phages presenting affinities for GaAs SC were isolated; the DNA of these specific phages were sequenced, and the peptide with the highest affinity was synthesized and biotinylated. To explore the possibility of electrical detection, the MESFET fabricated with the GaAs SC were used to detect the streptavidin via the biotinylated peptide in the presence of the bovine Serum Albumin. After each surface modification step, the IDS (current between the drain and the source) of the transistor was measured and a decrease in the intensity was detected. Furthermore, fluorescent microscopy was used in order to prove the specificity of this peptide and the specific localisation of biomolecules. In conclusion, the feasibility of producing an electrical biosensor using a MESFET has been demonstrated. Controlled placement, specific localization and detection of biomolecules on a MESFET transistor were achieved without covering the drain and the source. This method of functionalization and detection can be of great utility for biosensing application opening a new way for developing bioFETs (Biomolecular Field-Effect Transistor).

  6. Robust mode space approach for atomistic modeling of realistically large nanowire transistors

    Science.gov (United States)

    Huang, Jun Z.; Ilatikhameneh, Hesameddin; Povolotskyi, Michael; Klimeck, Gerhard

    2018-01-01

    Nanoelectronic transistors have reached 3D length scales in which the number of atoms is countable. Truly atomistic device representations are needed to capture the essential functionalities of the devices. Atomistic quantum transport simulations of realistically extended devices are, however, computationally very demanding. The widely used mode space (MS) approach can significantly reduce the numerical cost, but a good MS basis is usually very hard to obtain for atomistic full-band models. In this work, a robust and parallel algorithm is developed to optimize the MS basis for atomistic nanowires. This enables engineering-level, reliable tight binding non-equilibrium Green's function simulation of nanowire metal-oxide-semiconductor field-effect transistor (MOSFET) with a realistic cross section of 10 nm × 10 nm using a small computer cluster. This approach is applied to compare the performance of InGaAs and Si nanowire n-type MOSFETs (nMOSFETs) with various channel lengths and cross sections. Simulation results with full-band accuracy indicate that InGaAs nanowire nMOSFETs have no drive current advantage over their Si counterparts for cross sections up to about 10 nm × 10 nm.

  7. Unijunction transistors

    International Nuclear Information System (INIS)

    1981-01-01

    The electrical characteristics of unijunction transistors can be modified by irradiation with electron beams in excess of 400 KeV and at a dose rate of 10 13 to 10 16 e/cm 2 . Examples are given of the effect of exposing the emitter-base junctions of transistors to such lattice defect causing radiation for a time sufficient to change the valley current of the transistor. (U.K.)

  8. Characteristics of a Nonvolatile SRAM Memory Cell Utilizing a Ferroelectric Transistor

    Science.gov (United States)

    Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

    2011-01-01

    The SRAM cell circuit is a standard for volatile data storage. When utilizing one or more ferroelectric transistors, the hysteresis characteristics give unique properties to the SRAM circuit, providing for investigation into the development of a nonvolatile memory cell. This paper discusses various formations of the SRAM circuit, using ferroelectric transistors, n-channel and p-channel MOSFETs, and resistive loads. With varied source and supply voltages, the effects on the timing and retention characteristics are investigated, including retention times of up to 24 hours.

  9. Intégration de transistor mono-électronique et transistor à atome unique sur CMOS

    OpenAIRE

    Deshpande, Veeresh

    2012-01-01

    Continuous scaling of MOSFET dimensions has led us to the era of nanoelectronics. Multigate FET (MuGFET) architecture with ‘nanowire channel' is being considered as one feasible enabler of MOSFET scaling to end-of-roadmap. Alongside classical CMOS or Moore's law scaling, many novel device proposals exploiting nanoscale phenomena have been made either. Single Electron Transistor (SET), with its unique ‘Coulomb Blockade' phenomena, and Single Atom Transistor (SAT), as an ultimately scaled trans...

  10. Spin Transport in Nondegenerate Si with a Spin MOSFET Structure at Room Temperature

    Science.gov (United States)

    Sasaki, Tomoyuki; Ando, Yuichiro; Kameno, Makoto; Tahara, Takayuki; Koike, Hayato; Oikawa, Tohru; Suzuki, Toshio; Shiraishi, Masashi

    2014-09-01

    Spin transport in nondegenerate semiconductors is expected to pave the way to the creation of spin transistors, spin logic devices, and reconfigurable logic circuits, because room-temperature (RT) spin transport in Si has already been achieved. However, RT spin transport has been limited to degenerate Si, which makes it difficult to produce spin-based signals because a gate electric field cannot be used to manipulate such signals. Here, we report the experimental demonstration of spin transport in nondegenerate Si with a spin metal-oxide-semiconductor field-effect transistor (MOSFET) structure. We successfully observe the modulation of the Hanle-type spin-precession signals, which is a characteristic spin dynamics in nondegenerate semiconductors. We obtain long spin transport of more than 20 μm and spin rotation greater than 4π at RT. We also observe gate-induced modulation of spin-transport signals at RT. The modulation of the spin diffusion length as a function of a gate voltage is successfully observed, which we attribute to the Elliott-Yafet spin relaxation mechanism. These achievements are expected to lead to the creation of practical Si-based spin MOSFETs.

  11. Self-Boosted Tunnel Field-Effect Transistor Using Nitride Charge Trapping Layer for Low Supply Voltage Operation.

    Science.gov (United States)

    Kim, Hyungjin; Kwon, Dae Woong; Kwon, Min-Woo; Park, Jungjin; Park, Byung-Gook

    2016-05-01

    Tunneling field-effect transistors (TFETs) have been studied as a candidate for low-power device due to the remarkable subthreshold characteristics. However, digital circuits composed of TFET have significantly large propagation delay compared with the conventional MOSFET circuits because of small current drivability and large gate-to-drain capacitance. In this work, the electrical characteristics of the self-boosted TFETs with nitride charge trapping layer have been studied using TCAD simulations. Trapped charges in the nitride layer improve subthreshold characteristics and on-current (I(ON)) of both nTFET and pTFET during gate bias sweep. In addition, the benefits of the self-boosted TFET devices to low supply voltage system application are investigated. Energy consumption and propagation delay of both conventional and self-boosted TFET inverters are compared by the mixed-mode circuit simulation study. Energy consumption is almost same but the propagation delay of the self-boosted TFET inverter is reduced especially for ultra-low voltage operation where system delay is increased dramatically.

  12. Programmable automated transistor test system

    International Nuclear Information System (INIS)

    Truong, L.V.; Sundberg, G.R.

    1986-01-01

    The paper describes a programmable automated transistor test system (PATTS) and its utilization to evaluate bipolar transistors and Darlingtons, and such MOSFET and special types as can be accommodated with the PATTS base-drive. An application of a pulsed power technique at low duty cycles in a non-destructive test is used to examine the dynamic switching characteristic curves of power transistors. Data collection, manipulation, storage, and output are operator interactive but are guided and controlled by the system software. In addition a library of test data is established on disks, tapes, and hard copies for future reference

  13. Design of a recessed-gate GaN-based MOSFET using a dual gate dielectric for high-power applications

    International Nuclear Information System (INIS)

    Yoon, Young Jun; Kang, Hee Sung; Seo, Jae Hwa; Kim, Young Jo; Bae, Jin Hyuk; Lee, Jung Hee; Kang, In Man; Cho, Eou Sik; Cho, Seong Jae

    2014-01-01

    We have investigated gallium-nitride (GaN)-based metal-oxide-semiconductor field-effect transistors(MOSFETs) having a recessed-gate structure for high-power applications. Recessed-gate GaN-based MOSFETs have been designed with a dual high-k dielectric structure to overcome low current drivability. Compared to recessed-gate GaN-based MOSFETs having a single gate dielectric with the same oxide thickness, recessed-gate GaN-based MOSFETs having a dual high-k dielectric composed of Al 2 O 3 and HfO 2 have achieved a high drain current (I D ) and transconductance (g m ) due to the high dielectric constant of HfO 2 . Also, because the dual high-k dielectric forms a high electron density in the channel layer with outstanding gate control capability, low channel resistances (R ch ) have obtained. In addition, we have studied the effect of the length between the gate and the drain (L gd ) on the on-resistance (R on ) to minimize the R on that is associated with power consumption and switching performance. Also, the electric field distribution of a device having a dual high-k dielectric has been examined with a field plate structure for high drive voltage. The proposed device was confirmed to be a remarkable candidate for switching devices in high-power applications.

  14. Electrical coupling of single cardiac rat myocytes to field-effect and bipolar transistors.

    Science.gov (United States)

    Kind, Thomas; Issing, Matthias; Arnold, Rüdiger; Müller, Bernt

    2002-12-01

    A novel bipolar transistor for extracellular recording the electrical activity of biological cells is presented, and the electrical behavior compared with the field-effect transistor (FET). Electrical coupling is examined between single cells separated from the heart of adults rats (cardiac myocytes) and both types of transistors. To initiate a local extracellular voltage, the cells are periodically stimulated by a patch pipette in voltage clamp and current clamp mode. The local extracellular voltage is measured by the planar integrated electronic sensors: the bipolar and the FET. The small signal transistor currents correspond to the local extracellular voltage. The two types of sensor transistors used here were developed and manufactured in the laboratory of our institute. The manufacturing process and the interfaces between myocytes and transistors are described. The recordings are interpreted by way of simulation based on the point-contact model and the single cardiac myocyte model.

  15. Effects of overheating in a single-electron transistor

    DEFF Research Database (Denmark)

    Korotkov, A. N.; Samuelsen, Mogens Rugholm; Vasenko, S. A.

    1994-01-01

    Heating of a single-electron transistor (SET) caused by the current flowing through it is considered. The current and the temperature increase should be calculated self-consistently taking into account various paths of the heat drain. Even if there is no heat drain from the central electrode...... of the SET due to transfer of phonons, the temperature of this electrode remains finite because electron tunneling decreases the temperature difference between the central and outer electrodes. Overheating effects can cause hysteresis in the I-V curve of the SET in the vicinity of the Coulomb blockade...

  16. Directly grown nanocrystalline diamond field-effect transistor microstructures

    Czech Academy of Sciences Publication Activity Database

    Kozak, Halyna; Kromka, Alexander; Babchenko, Oleg; Rezek, Bohuslav

    2010-01-01

    Roč. 8, č. 3 (2010), s. 482-487 ISSN 1546-198X R&D Projects: GA MŠk(CZ) LC06040; GA AV ČR KAN400100701; GA MŠk LC510; GA AV ČR(CZ) IAAX00100902; GA AV ČR KAN400100652 Institutional research plan: CEZ:AV0Z10100521 Keywords : nanocrystalline diamond * microstructures * atomic force microscopy * surface conductivity * field-effect transistor Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 0.602, year: 2010

  17. Ultrathin regioregular poly(3-hexyl thiophene) field-effect transistors

    DEFF Research Database (Denmark)

    Sandberg, H.G.O.; Frey, G.L.; Shkunov, M.N.

    2002-01-01

    Ultrathin films of regioregular poly(3-hexyl thiophene) (RR-P3HT) were deposited through a dip-coating technique and utilized as the semiconducting film in field-effect transistors (FETs). Proper selection of the substrate and solution concentration enabled the growth of a monolayer-thick RR-P3HT...... film. Atomic force microscopy (AFM), U-V-vis absorption spectroscopy, X-ray reflectivity, and grazing incidence diffraction were used to study the growth mechanism, thickness and orientation of self-organized monolayer thick RR-P3HT films on SiO2 surfaces. Films were found to adopt a Stranski...

  18. ReS2-based interlayer tunnel field effect transistor

    Science.gov (United States)

    Mohammed, Omar B.; Movva, Hema C. P.; Prasad, Nitin; Valsaraj, Amithraj; Kang, Sangwoo; Corbet, Chris M.; Taniguchi, Takashi; Watanabe, Kenji; Register, Leonard F.; Tutuc, Emanuel; Banerjee, Sanjay K.

    2017-12-01

    In this study, we report the fabrication and characterization of a vertical resonant interlayer tunneling field-effect transistor created using exfoliated, few-layer rhenium disulfide (ReS2) flakes as the electrodes and hexagonal boron nitride as the tunnel barrier. Due to the Γ-point conduction band minimum, the ReS2 based system offers the possibility of resonant interlayer tunneling and associated low-voltage negative differential resistance (NDR) without rotational alignment of the electrode crystal orientations. Substantial NDR is observed, which appears consistent with in-plane crystal momentum conserving tunneling, although considerably broadened by scattering consistent within low mobility ReS2 flakes.

  19. Effect of the interface recombination current fluctuations on 1/f noise of gated lateral bipolar transistors

    Science.gov (United States)

    Romas, Gregory G., Jr.; Ul Hoque, Md Mazhar; Celik-Butler, Zeynep

    2003-05-01

    A gated lateral bipolar transistor is a bulk lateral BJT in parallel with a MOSFET at the surface. The base current components such as surface recombination and space charge recombination currents are two of the dominant noise sources in the lateral BJT. If the gate is biased such that the MOSFET is in the off-state by accumulating carriers underneath the oxide in the base surface, the noise contribution by these two base current (Ib) components can be better understood. The carrier accumulation in the base surface can be modulated with different gate bias, which in turn will affect the fluctuation of the surface recombination current component. In this paper, noise power spectral density of gated lateral PNP transistors, fabricated in Texas Instruments Standard Bipolar Process, has been discussed. The base current noise power spectral density (SIb) was extracted from the cross-correlation noise spectrum measured between the base and the collector circuits for different gate biasing conditions. Based on the frequency exponent dependence of the noise power spectral density, it was found that the noise in the low frequency range is in the form of 1/f noise. SIb was found to be the dominant noise source for these devices as the coherence between the base and collector power spectral density was very close to 1. SIb was extracted for a base current range of 8 nA to 1microA for a gate bias range of 0V to 40V. The SPICE noise model parameters, AF and KF were also determined for each case from the dependence of SIb on Ib. The noise was measured on devices with different base width values.

  20. High frequency III-V nanowire MOSFETs

    Science.gov (United States)

    Lind, Erik

    2016-09-01

    III-V nanowire transistors are promising candidates for very high frequency electronics applications. The improved electrostatics originating from the gate-all-around geometry allow for more aggressive scaling as compared with planar field-effect transistors, and this can lead to device operation at very high frequencies. The very high mobility possible with In-rich devices can allow very high device performance at low operating voltages. GaN nanowires can take advantage of the large band gap for high voltage operation. In this paper, we review the basic physics and device performance of nanowire field- effect transistors relevant for high frequency performance. First, the geometry of lateral and vertical nanowire field-effect transistors is introduced, with special emphasis on the parasitic capacitances important for nanowire geometries. The basic important high frequency transistor metrics are introduced. Secondly, the scaling properties of gate-all-around nanowire transistors are introduced, based on geometric length scales, demonstrating the scaling possibilities of nanowire transistors. Thirdly, to model nanowire transistor performance, a two-band non-parabolic ballistic transistor model is used to efficiently calculate the current and transconductance as a function of band gap and nanowire size. The intrinsic RF metrics are also estimated. Finally, experimental state-of-the-art nanowire field-effect transistors are reviewed and benchmarked, lateral and vertical transistor geometries are explored, and different fabrication routes are highlighted. Lateral devices have demonstrated operation up to 350 GHz, and vertical devices up to 155 GHz.

  1. InGaAsP Mach-Zehnder interferometer optical modulator monolithically integrated with InGaAs driver MOSFET on a III-V CMOS photonics platform.

    Science.gov (United States)

    Park, Jin-Kown; Takagi, Shinichi; Takenaka, Mitsuru

    2018-02-19

    We demonstrated the monolithic integration of a carrier-injection InGaAsP Mach-Zehnder interferometer (MZI) optical modulator and InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) on a III-V-on-insulator (III-V-OI) wafer. A low-resistivity lateral PIN junction was formed along an InGaAsP rib waveguide by Zn diffusion and Ni-InGaAsP alloy, enabling direct driving of the InGaAsP optical modulator by the InGaAs MOSFET. A π phase shift of the InGaAsP optical modulator was obtained through the injection of a drain current from the InGaAs MOSFET with a gate voltage of approximately 1 V. This proof-of-concept demonstration of the monolithic integration of the InGaAsP optical modulator and InGaAs driver MOSFET will enable us to develop high-performance and low-power electronic-photonic integrated circuits on a III-V CMOS photonics platform.

  2. Cylindrical Field Effect Transistor: A Full Volume Inversion Device

    KAUST Repository

    Fahad, Hossain M.

    2010-12-01

    The increasing demand for high performance as well as low standby power devices has been the main reason for the aggressive scaling of conventional CMOS transistors. Current devices are at the 32nm technology node. However, due to physical limitations as well as increase in short-channel effects, leakage, power dissipation, this scaling trend cannot continue and will eventually hit a barrier. In order to overcome this, alternate device topologies have to be considered altogether. Extensive research on ultra thin body double gate FETs and gate all around nanowire FETs has shown a lot of promise. Under strong inversion, these devices have demonstrated increased performance over their bulk counterparts. This is mainly attributed to full carrier inversion in the body. However, these devices are still limited by lithographic and processing challenges making them unsuitable for commercial production. This thesis explores a unique device structure called the CFET (Cylindrical Field Effect Transistors) which also like the above, relies on complete inversion of carriers in the body/bulk. Using dual gates; an outer and an inner gate, full-volume inversion is possible with benefits such as enhanced drive currents, high Ion/Ioff ratios and reduced short channel effects.

  3. 3D assembly of carbon nanotubes for fabrication of field-effect transistors through nanomanipulation and electron-beam-induced deposition

    Science.gov (United States)

    Yu, Ning; Shi, Qing; Nakajima, Masahiro; Wang, Huaping; Yang, Zhan; Sun, Lining; Huang, Qiang; Fukuda, Toshio

    2017-10-01

    Three-dimensional carbon nanotube field-effect transistors (3D CNTFETs) possess predictable characteristics that rival those of planar CNTFETs and Si-based MOSFETs. However, due to the lack of a reliable assembly technology, they are rarely reported on, despite the amount of attention they receive. To address this problem, we propose the novel concept of a 3D CNTFET and develop its assembly strategy based on nanomanipulation and the electron-beam-induced deposition (EBID) technique inside a scanning electron microscope (SEM). In particular, the electrodes in our transistor design are three metallic cuboids of the same size, and their front, top and back surfaces are all wrapped up in CNTs. The assembly strategy is employed to build the structure through a repeated basic process of pick-up, placement, fixing and cutting of CNTs. The pick-up and placement is performed through one nanomanipulator with four degrees of freedom. Fixing is carried out through the EBID technique so as to improve the mechanical and electrical characteristics of the CNT/electrodes connection. CNT cutting is undertaken using the typical method of electrical breakdown. Experimental results showed that two CNTs were successfully assembled on the front sides of the cubic electrodes. This validates our assembly method for the 3D CNTFET. Also, when contact resistance was measured, tens of kilohms of resistance was observed at the CNT-EBID deposition-FET electrodes junction.. This manifests the electrical reliability of our assembly strategy.

  4. Effect of edge vacancies on performance of planar graphene tunnel field-effect transistor

    OpenAIRE

    Glebov, A. A.; Katkov, V. L.; Osipov, V. A.

    2017-01-01

    The influence of edge vacancies on the working ability of the planar graphene tunnel field-effect transistor (TFET) is studied at various concentrations and distributions (normal, uniform, periodic) of defects. All calculations are performed by using the Green's function method and the tight-binding approximation. It is shown that the transistor performance depends critically on two important factors associated with the defects: the destruction of the edge-localized electronic states and the ...

  5. Liquid Crystals for Organic Field-Effect Transistors

    Science.gov (United States)

    O'Neill, Mary; Kelly, Stephen M.

    Columnar, smectic and lamellar polymeric liquid crystals are widely recognized as very promising charge-transporting organic semiconductors due to their ability to spontaneously self-assemble into highly ordered domains in uniform thin films over large areas. The transport properties of smectic and columnar liquid crystals are discussed in Chaps. 2 (10.1007/978-90-481-2873-0_2) and 3 (10.1007/978-90-481-2873-0_3). Here we examine their application to organic field-effect transistors (OFETs): after a short introduction in Sect. 9.1 we introduce the OFET configuration and show how the mobility is measured in Sect. 9.2. Section 9.3 discusses polymeric liquid crystalline semiconductors in OFETs. We review research that shows that annealing of polymers in a fluid mesophase gives a more ordered microcrystalline morphology on cooling than that kinetically determined by solution processing of the thin film. We also demonstrate the benefits of monodomain alignment and show the application of liquid crystals in light-emitting field-effect transistors. Some columnar and smectic phases are highly ordered with short intermolecular separation to give large π-π coupling. We discuss their use in OFETs in Sects. 9.4, and 9.5 respectively. Section 9.6 summarises the conclusions of the chapter.

  6. Long-Term Reliability of a Hard-Switched Boost Power Processing Unit Utilizing SiC Power MOSFETs

    Science.gov (United States)

    Ikpe, Stanley A.; Lauenstein, Jean-Marie; Carr, Gregory A.; Hunter, Don; Ludwig, Lawrence L.; Wood, William; Iannello, Christopher J.; Del Castillo, Linda Y.; Fitzpatrick, Fred D.; Mojarradi, Mohammad M.; hide

    2016-01-01

    Silicon carbide (SiC) power devices have demonstrated many performance advantages over their silicon (Si) counterparts. As the inherent material limitations of Si devices are being swiftly realized, wide-band-gap (WBG) materials such as SiC have become increasingly attractive for high power applications. In particular, SiC power metal oxide semiconductor field effect transistors' (MOSFETs) high breakdown field tolerance, superior thermal conductivity and low-resistivity drift regions make these devices an excellent candidate for power dense, low loss, high frequency switching applications in extreme environment conditions. In this paper, a novel power processing unit (PPU) architecture is proposed utilizing commercially available 4H-SiC power MOSFETs from CREE Inc. A multiphase straight boost converter topology is implemented to supply up to 10 kilowatts full-scale. High Temperature Gate Bias (HTGB) and High Temperature Reverse Bias (HTRB) characterization is performed to evaluate the long-term reliability of both the gate oxide and the body diode of the SiC components. Finally, susceptibility of the CREE SiC MOSFETs to damaging effects from heavy-ion radiation representative of the on-orbit galactic cosmic ray environment are explored. The results provide the baseline performance metrics of operation as well as demonstrate the feasibility of a hard-switched PPU in harsh environments.

  7. Radiation effect on silicon transistors in mixed neutrons-gamma environment

    Science.gov (United States)

    Assaf, J.; Shweikani, R.; Ghazi, N.

    2014-10-01

    The effects of gamma and neutron irradiations on two different types of transistors, Junction Field Effect Transistor (JFET) and Bipolar Junction Transistor (BJT), were investigated. Irradiation was performed using a Syrian research reactor (RR) (Miniature Neutron Source Reactor (MNSR)) and a gamma source (Co-60 cell). For RR irradiation, MCNP code was used to calculate the absorbed dose received by the transistors. The experimental results showed an overall decrease in the gain factors of the transistors after irradiation, and the JFETs were more resistant to the effects of radiation than BJTs. The effect of RR irradiation was also greater than that of gamma source for the same dose, which could be because neutrons could cause more damage than gamma irradiation.

  8. MOSFET technologies for double-pole four-throw radio-frequency switch

    CERN Document Server

    Srivastava, Viranjay M

    2014-01-01

    This book provides analysis and discusses the design of various MOSFET technologies which are used for the design of Double-Pole Four-Throw (DP4T) RF switches for next generation communication systems. The authors discuss the design of the (DP4T) RF switch by using the Double-Gate (DG) MOSFET, as well as the Cylindrical Surrounding double-gate (CSDG) MOSFET.  The effect of HFO2 (high dielectric material) in the design of DG MOSFET and CSDG MOSFET  is also explored. Coverage includes comparison of Single-gate MOSFET and Double-gate MOSFET switching parameters, as well as testing of MOSFETs parameters using image acquisition.  ·         Provides a single-source reference to the latest technologies for the design of Double-gate MOSFET, Cylindrical Surrounding double-gate MOSFET and HFO2 based MOSFET; ·         Explains the design of RF switches using the technologies presented and simulates switches; ·         Verifies parameters and discusses feasibility of devices and switches.

  9. Solution-processed ambipolar organic field-effect transistors and inverters

    NARCIS (Netherlands)

    Meijer, E.J.; Leeuw, D.M. de; Setayesh, S.; Veenendaal, E. van; Huisman, B.H.; Blom, P.W.M.; Hummelen, J.C.; Scherf, U.; Klapwijk, T.M.

    2003-01-01

    There is ample evidence that organic field-effect transistors have reached a stage where they can be industrialized, analogous to standard metal oxide semiconductor (MOS) transistors. Monocrystalline silicon technology is largely based on complementary MOS (CMOS) structures that use both n-type and

  10. Fabrication of a vertical channel field effect transistor and a study of its electrical performances

    International Nuclear Information System (INIS)

    Bhuiyan, A.S.

    1983-01-01

    A vertical channel field effect transistor on silicon was fabricated by diffusion technique and its electrical characteristics were studied as a function of voltage and temperature. It was found that this transistor has relatively high breakdown voltage of 65 volts for drain source and of 7.5 volts for gate source terminals. (author)

  11. Analysis of long-channel nanotube field-effect-transistors (NT FETs)

    Science.gov (United States)

    Toshishige, Yamada; Kwak, Dochan (Technical Monitor)

    2001-01-01

    This viewgraph presentation provides an analysis of long-channel nanotube (NT) field effect transistors (FET) from NASA's Ames Research Center. The structure of such a transistor including the electrode contact, 1D junction, and the planar junction is outlined. Also mentioned are various characteristics of a nanotube tip-equipped scanning tunnel microscope (STM).

  12. Low-frequency noise behavior of polysilicon emitter bipolar junction transistors: a review

    Science.gov (United States)

    Deen, M. Jamal; Pascal, Fabien

    2003-05-01

    For many analog integrated circuit applications, the polysilicon emitter bipolar junction transistor (PE-BJT) is still the preferred choice because of its higher operational frequency and lower noise performance characteristics compared to MOS transistors of similar active areas and at similar biasing currents. In this paper, we begin by motivating the reader with reasons why bipolar transistors are still of great interest for analog integrated circuits. This motivation includes a comparison between BJT and the MOSFET using a simple small-signal equivalent circuit to derive important parameters that can be used to compare these two technologies. An extensive review of the popular theories used to explain low frequency noise results is presented. However, in almost all instances, these theories have not been fully tested. The effects of different processing technologies and conditions on the noise performance of PE-BJTs is reviewed and a summary of some of the key technological steps and device parameters and their effects on noise is discussed. The effects of temperature and emitter geometries scaling is reviewed. It is shown that dispersion of the low frequency noise in ultra-small geometries is a serious issue since the rate of increase of the noise dispersion is faster than the noise itself as the emitter geometry is scaled to smaller values. Finally, some ideas for future research on PE-BJTs, some of which are also applicable to SiGe heteorjunction bipolar transistors and MOSFETs, are presented after the conclusions.

  13. Optical driven electromechanical transistor based on tunneling effect.

    Science.gov (United States)

    Jin, Leisheng; Li, Lijie

    2015-04-15

    A new electromechanical transistor based on an optical driven vibrational ring structure has been postulated. In the device, optical power excites the ring structure to vibrate, which acts as the shuttle transporting electrons from one electrode to the other forming the transistor. The electrical current of the transistor is adjusted by the optical power. Coupled opto-electro-mechanical simulation has been performed. It is shown from the dynamic analysis that the stable working range of the transistor is much wider than that of the optical wave inside the cavity, i.e., the optical resonance enters nonperiodic states while the mechanical vibration of the ring is still periodic.

  14. Touching polymer chains by organic field-effect transistors.

    Science.gov (United States)

    Shao, Wei; Dong, Huanli; Wang, Zhigang; Hu, Wenping

    2014-09-17

    Organic field-effect transistors (OFETs) are used to directly "touch" the movement and dynamics of polymer chains, and then determine Tg. As a molecular-level probe, the conducting channel of OFETs exhibits several unique advantages: 1) it directly detects the motion and dynamics of polymer chain at Tg; 2) it allows the measurement of size effects in ultrathin polymer films (even down to 6 nm), which bridges the gap in understanding effects between surface and interface. This facile and reliable determination of Tg of polymer films and the understanding of polymer chain dynamics guide a new prospect for OFETs besides their applications in organic electronics and casting new light on the fundamental understanding of the nature of polymer chain dynamics.

  15. Theoretical study of phosphorene tunneling field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Jiwon; Hobbs, Chris [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

    2015-02-23

    In this work, device performances of tunneling field effect transistors (TFETs) based on phosphorene are explored via self-consistent atomistic quantum transport simulations. Phosphorene is an ultra-thin two-dimensional (2-D) material with a direct band gap suitable for TFETs applications. Our simulation shows that phosphorene TFETs exhibit subthreshold slope below 60 mV/dec and a wide range of on-current depending on the transport direction due to highly anisotropic band structures of phosphorene. By benchmarking with monolayer MoTe{sub 2} TFETs, we predict that phosphorene TFETs oriented in the small effective mass direction can yield much larger on-current at the same on-current/off-current ratio than monolayer MoTe{sub 2} TFETs. It is also observed that a gate underlap structure is required for scaling down phosphorene TFETs in the small effective mass direction to suppress the source-to-drain direct tunneling leakage current.

  16. A novel trench gate MOSFET with a multiple-layered gate oxide for high-reliability operation

    International Nuclear Information System (INIS)

    Kim, Sang Gi; Kah, Dong Ha; Na, Kyoung Il; Yang, Yil Suk; Koo, Jin Gun; Kim, Jong Dae; Lee, Jin Ho; Park, Hoon Soo

    2012-01-01

    Gate dielectrics in trench structures for trench gate metal oxide semiconductor field-effect transistor (MOSFET) power devices are very important to realize excellent characteristics. In this paper we describe multiple-layer gate dielectrics for trench gate MOSFETs with both thermal and chemical vapor deposition (CVD) gate oxides that exhibit excellent gate oxide properties and surface roughness. Through various trench etching experiments for better surface conditions in the trench, the optimum etching gas chemistry and etch conditions were found. The destruction of gate dielectric in trench gate MOSFET occurs at the top and the bottom trench corner edges. The structure of the gate electrode is pulled out with the polysilicon layer which is buried in the trench. Thus, high electric field operation is inevitable at the gate between source diffusion and the gate polysilicon. Moreover, the trench corner oxide suffers from the high electric field. We propose a multiple-gate dielectric structure of a thermal oxide and CVD oxide for highly reliable operation of the device. This enables trench surface smoothing and low thermal stress at the trench corners and provides the oxide thickness uniformity, giving superior device characteristics of high breakdown voltage and low leakage current. These improvements are caused by the excellent quality of the gate oxide and the good thickness uniformity that is formed at the inner trench with a specific geometrical factor.

  17. Impacts of gate bias and its variation on gamma-ray irradiation resistance of SiC MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Murata, Koichi; Mitomo, Satoshi; Matsuda, Takuma; Yokoseki, Takashi [Saitama University, Sakuraku (Japan); National Institutes for Quantum and Radiological Science and Technology (QST), Takasaki (Japan); Makino, Takahiro; Onoda, Shinobu; Takeyama, Akinori; Ohshima, Takeshi [National Institutes for Quantum and Radiological Science and Technology (QST), Takasaki (Japan); Okubo, Shuichi; Tanaka, Yuki; Kandori, Mikio; Yoshie, Toru [Sanken Electric Co., Ltd., Niiza, Saitama (Japan); Hijikata, Yasuto [Saitama University, Sakuraku (Japan)

    2017-04-15

    Gamma-ray irradiation into vertical type n-channel hexagonal (4H)-silicon carbide (SiC) metal-oxide-semiconductor field effect transistors (MOSFETs) was performed under various gate biases. The threshold voltage for the MOSFETs irradiated with a constant positive gate bias showed a large negative shift, and the shift slightly recovered above 100 kGy. For MOSFETs with non- and a negative constant biases, no significant change in threshold voltage, V{sub th}, was observed up to 400 kGy. By changing the gate bias from positive bias to either negative or non-bias, the V{sub th} significantly recovered from the large negative voltage shift induced by 50 kGy irradiation with positive gate bias after only 10 kGy irradiation with either negative or zero bias. It indicates that the positive charges generated in the gate oxide near the oxide-SiC interface due to irradiation were removed or recombined instantly by the irradiation under zero or negative biases. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  18. Radiation dose response of N channel MOSFET submitted to filtered X-ray photon beam

    Science.gov (United States)

    Gonçalves Filho, Luiz C.; Monte, David S.; Barros, Fabio R.; Santos, Luiz A. P.

    2018-01-01

    MOSFET can operate as a radiation detector mainly in high-energy photon beams, which are normally used in cancer treatments. In general, such an electronic device can work as a dosimeter from threshold voltage shift measurements. The purpose of this article is to show a new way for measuring the dose-response of MOSFETs when they are under X-ray beams generated from 100kV potential range, which is normally used in diagnostic radiology. Basically, the method consists of measuring the MOSFET drain current as a function of the radiation dose. For this the type of device, it has to be biased with a high value resistor aiming to see a substantial change in the drain current after it has been irradiated with an amount of radiation dose. Two types of N channel device were used in the experiment: a signal transistor and a power transistor. The delivered dose to the device was varied and the electrical curves were plotted. Also, a sensitivity analysis of the power MOSFET response was made, by varying the tube potential of about 20%. The results show that both types of devices have responses very similar, the shift in the electrical curve is proportional to the radiation dose. Unlike the power MOSFET, the signal transistor does not provide a linear function between the dose rate and its drain current. We also have observed that the variation in the tube potential of the X-ray equipment produces a very similar dose-response.

  19. Kondo effect in single-molecule magnet transistors

    Science.gov (United States)

    Gonzalez, Gabriel; Leuenberger, Michael; Mucciolo, Eduardo

    2009-03-01

    We present a careful and thorough microscopic derivation of the anisotropic Kondo Hamiltonian for single-molecule magnet (SMM) transistors. When the molecule is strongly coupled to metallic leads, we show that by applying a transverse magnetic field it is possible to topologically induce or quench the Kondo effect in the conductance of a SMM with either an integer or a half-integer spin S>1/2. This topological Kondo effect is due to the Berry-phase interference between multiple quantum tunneling paths of the spin. We calculate the renormalized Berry-phase oscillations of the two Kondo peaks as a function of a transverse magnetic field by means of the poor man's scaling approach. We illustrate our findings with the SMM Ni4, which we propose as a possible candidate for the experimental observation of the conductance oscillations.

  20. Intrinsic noise in aggressively scaled field-effect transistors

    International Nuclear Information System (INIS)

    Albareda, G; Jiménez, D; Oriols, X

    2009-01-01

    According to roadmap projections, nanoscale field-effect transistors (FETs) with channel lengths below 30 nm and several gates (for improving their gate control over the source–drain conductance) will come to the market in the next few years. However, few studies deal with the noise performance of these aggressively scaled FETs. In this work, a study of the effect of the intrinsic (thermal and shot) noise of such FETs on the performance of an analog amplifier and a digital inverter is carried out by means of numerical simulations with a powerful Monte Carlo (quantum) simulator. The numerical data indicate important drawbacks in the noise performance of aggressively scaled FETs that could invalidate roadmap projections as regards analog and digital applications

  1. Tin - an unlikely ally for silicon field effect transistors?

    KAUST Repository

    Hussain, Aftab M.

    2014-01-13

    We explore the effectiveness of tin (Sn), by alloying it with silicon, to use SiSn as a channel material to extend the performance of silicon based complementary metal oxide semiconductors. Our density functional theory based simulation shows that incorporation of tin reduces the band gap of Si(Sn). We fabricated our device with SiSn channel material using a low cost and scalable thermal diffusion process of tin into silicon. Our high-κ/metal gate based multi-gate-field-effect-transistors using SiSn as channel material show performance enhancement, which is in accordance with the theoretical analysis. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. Investigation of high mobility pseudomorphic SiGe p-channels in Si MOSFETS at low and high electric fields

    International Nuclear Information System (INIS)

    Palmer, Martin John

    2001-01-01

    Silicon Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) for high speed, high current applications are rapidly approaching the physical and financial limits of the technology. This opens opportunities for the incorporation of materials with intrinsically better transport characteristics. An alloy of silicon and germanium is one such material that is gaining much recognition as the active component of MOSFETs and as the secondary structures (such as the gate electrode). This work examines a batch of buried channel Si 0.64 Ge 0.36 p-MOSFETs, with a minimum effective length of 0.35 μm, under different bias conditions and at different temperatures. High current and transconductance enhancements are apparent at long gate lengths. The carrier mobility is up to a factor of 2.5 times that of silicon at room temperature and 7.5 times at 4 K. A clear trend of decreasing peak mobility with decreasing silicon cap thickness is evident. Simulations show that scattering caused by the roughness of the SiO 2 /Si interface dominates, rather than alloy scattering or Si/SiGe roughness, even for a buried channel. This scattering increases with the proximity of the carriers to the interface. An increase of interface trap density with decreasing cap thickness, demonstrates that segregated germanium exists some distance into the cap and interferes with the oxidation process. This will increase scattering through increased SiO 2 /Si roughness and increased trapped charge. The short channel, high field results are comparable or slightly worse than those of silicon due to lower saturation drift velocity. However, fitting to a drift-diffusion model shows an apparent increase in saturation velocity for short channels, especially at low temperatures. This effect correlates with the low field mobility and is greater for devices containing SiGe. This is an indication of velocity overshoot, which may enhance the performance of SiGe MOSFETs at deep submicron gate lengths. (author)

  3. Tuning the threshold voltage in electrolyte-gated organic field-effect transistors

    Science.gov (United States)

    Kergoat, Loïg; Herlogsson, Lars; Piro, Benoit; Pham, Minh Chau; Horowitz, Gilles; Crispin, Xavier; Berggren, Magnus

    2012-01-01

    Low-voltage organic field-effect transistors (OFETs) promise for low power consumption logic circuits. To enhance the efficiency of the logic circuits, the control of the threshold voltage of the transistors are based on is crucial. We report the systematic control of the threshold voltage of electrolyte-gated OFETs by using various gate metals. The influence of the work function of the metal is investigated in metal-electrolyte-organic semiconductor diodes and electrolyte-gated OFETs. A good correlation is found between the flat-band potential and the threshold voltage. The possibility to tune the threshold voltage over half the potential range applied and to obtain depletion-like (positive threshold voltage) and enhancement (negative threshold voltage) transistors is of great interest when integrating these transistors in logic circuits. The combination of a depletion-like and enhancement transistor leads to a clear improvement of the noise margins in depleted-load unipolar inverters. PMID:22586088

  4. Electromechanical field effect transistors based on multilayer phosphorene nanoribbons

    Science.gov (United States)

    Jiang, Z. T.; Lv, Z. T.; Zhang, X. D.

    2017-06-01

    Based on the tight-binding Hamiltonian approach, we demonstrate that the electromechanical field effect transistors (FETs) can be realized by using the multilayer phosphorene nanoribbons (PNRs). The synergistic combination of the electric field and the external strains can establish the on-off switching since the electric field can shift or split the energy band, and the mechanical strains can widen or narrow the band widths. This kind of multilayer PNR FETs, much solider than the monolayer PNR one and more easily biased by different electric fields, has more transport channels consequently leading to the higher on-off current ratio or the higher sensitivity to the electric fields. Meanwhile, the strain-induced band-flattening will be beneficial for improving the flexibility in designing the electromechanical FETs. In addition, such electromechanical FETs can act as strain-controlled FETs or mechanical detectors for detecting the strains, indicating their potential applications in nano- and micro-electromechanical fields.

  5. Gas Sensors Based on Polymer Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Aifeng Lv

    2017-01-01

    Full Text Available This review focuses on polymer field-effect transistor (PFET based gas sensor with polymer as the sensing layer, which interacts with gas analyte and thus induces the change of source-drain current (ΔISD. Dependent on the sensing layer which can be semiconducting polymer, dielectric layer or conducting polymer gate, the PFET sensors can be subdivided into three types. For each type of sensor, we present the molecular structure of sensing polymer, the gas analyte and the sensing performance. Most importantly, we summarize various analyte–polymer interactions, which help to understand the sensing mechanism in the PFET sensors and can provide possible approaches for the sensor fabrication in the future.

  6. Two dimensional analytical model for a reconfigurable field effect transistor

    Science.gov (United States)

    Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

    2018-02-01

    This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

  7. Recent Trends in Field-Effect Transistors-Based Immunosensors

    Directory of Open Access Journals (Sweden)

    Ana Carolina Mazarin de Moraes

    2016-10-01

    Full Text Available Immunosensors are analytical platforms that detect specific antigen-antibody interactions and play an important role in a wide range of applications in biomedical clinical diagnosis, food safety, and monitoring contaminants in the environment. Field-effect transistors (FET immunosensors have been developed as promising alternatives to conventional immunoassays, which require complicated processes and long-time data acquisition. The electrical signal of FET-based immunosensors is generated as a result of the antigen-antibody conjugation. FET biosensors present real-time and rapid response, require small sample volume, and exhibit higher sensitivity and selectivity. This review brings an overview on the recent literature of FET-based immunosensors, highlighting a diversity of nanomaterials modified with specific receptors as immunosensing platforms for the ultrasensitive detection of various biomolecules.

  8. A tunable colloidal quantum dot photo field-effect transistor

    KAUST Repository

    Ghosh, Subir

    2011-01-01

    We fabricate and investigate field-effect transistors in which a light-absorbing photogate modulates the flow of current along the channel. The photogate consists of colloidal quantum dots that efficiently transfer photoelectrons to the channel across a charge-separating (type-II) heterointerface, producing a primary and sustained secondary flow that is terminated via electron back-recombination across the interface. We explore colloidal quantum dot sizes corresponding to bandgaps ranging from 730 to 1475 nm and also investigate various stoichiometries of aluminum-doped ZnO (AZO) channel materials. We investigate the role of trap state energies in both the colloidal quantum dot energy film and the AZO channel. © 2011 American Institute of Physics.

  9. Slowing DNA Translocation in a Nanofluidic Field-Effect Transistor.

    Science.gov (United States)

    Liu, Yifan; Yobas, Levent

    2016-04-26

    Here, we present an experimental demonstration of slowing DNA translocation across a nanochannel by modulating the channel surface charge through an externally applied gate bias. The experiments were performed on a nanofluidic field-effect transistor, which is a monolithic integrated platform featuring a 50 nm-diameter in-plane alumina nanocapillary whose entire length is surrounded by a gate electrode. The field-effect transistor behavior was validated on the gating of ionic conductance and protein transport. The gating of DNA translocation was subsequently studied by measuring discrete current dips associated with single λ-DNA translocation events under a source-to-drain bias of 1 V. The translocation speeds under various gate bias conditions were extracted by fitting event histograms of the measured translocation time to the first passage time distributions obtained from a simple 1D biased diffusion model. A positive gate bias was observed to slow the translocation of single λ-DNA chains markedly; the translocation speed was reduced by an order of magnitude from 18.4 mm/s obtained under a floating gate down to 1.33 mm/s under a positive gate bias of 9 V. Therefore, a dynamic and flexible regulation of the DNA translocation speed, which is vital for single-molecule sequencing, can be achieved on this device by simply tuning the gate bias. The device is realized in a conventional semiconductor microfabrication process without the requirement of advanced lithography, and can be potentially further developed into a compact electronic single-molecule sequencer.

  10. Simulating single-event burnout of n-channel power MOSFET's

    International Nuclear Information System (INIS)

    Johnson, G.H.; Hohl, J.H.; Schrimpf, R.D.; Galloway, K.F.

    1993-01-01

    Heavy ions are ubiquitous in a space environment. Single-event burnout of power MOSFET's is a sudden catastrophic failure mechanism that is initiated by the passage of a heavy ion through the device structure. The passage of the heavy ion generates a current filament that locally turns on a parasitic n-p-n transistor inherent to the power MOSFET. Subsequent high currents and high voltage in the device induce second breakdown of the parasitic bipolar transistor and hence meltdown of the device. This paper presents a model that can be used for simulating the burnout mechanism in order to gain insight into the significant device parameters that most influence the single-event burnout susceptibility of n-channel power MOSFET's

  11. A Nonvolatile MOSFET Memory Device Based on Mobile Protons in SiO(2) Thin Films

    Energy Technology Data Exchange (ETDEWEB)

    Vanheusden, K.; Warren, W.L.; Devine, R.A.B.; Fleetwood, D.M.; Draper, B.L.; Schwank, J.R.

    1999-03-02

    It is shown how mobile H{sup +} ions can be generated thermally inside the oxide layer of Si/SiO{sub 2}/Si structures. The technique involves only standard silicon processing steps: the nonvolatile field effect transistor (NVFET) is based on a standard MOSFET with thermally grown SiO{sub 2} capped with a poly-silicon layer. The capped thermal oxide receives an anneal at {approximately}1100 C that enables the incorporation of the mobile protons into the gate oxide. The introduction of the protons is achieved by a subsequent 500-800 C anneal in a hydrogen-containing ambient, such as forming gas (N{sub 2}:H{sub 2} 95:5). The mobile protons are stable and entrapped inside the oxide layer, and unlike alkali ions, their space-charge distribution can be controlled and rapidly rearranged at room temperature by an applied electric field. Using this principle, a standard MOS transistor can be converted into a nonvolatile memory transistor that can be switched between normally on and normally off. Switching speed, retention, endurance, and radiation tolerance data are presented showing that this non-volatile memory technology can be competitive with existing Si-based non-volatile memory technologies such as the floating gate technologies (e.g. Flash memory).

  12. Modeling and Performance Evaluation of a Top Gated Graphene MOSFET

    Directory of Open Access Journals (Sweden)

    Jith Sarker

    2017-08-01

    Full Text Available In the modernistics years, Graphene has become a promising resplendence in the horizon of fabrication technology, due to some of its unique electronic properties like zero band gap, high saturation velocity, higher electrical conductivity and so on followed by extraordinary thermal, optical and mechanical properties such as- high thermal conductivity, optical transparency, flexibility and thinness. Graphene based devices demand to be deliberated as a possible option for post Si based fabrication technology. In this paper, we have modelled a top gated graphene metal oxide semiconductor field effect transistor (MOSFET. Surface potential dependent Quantum capacitance is obtained self-consistently along with linear and square root approximation model. Gate voltage dependence of surface potential has been analyzed with graphical illustrations and required mathematics as well. Output characteristics, transfer characteristics, transconductance (as a function of gate voltage behavior have been investigated. In the end, effect of channel length on device performance has been justified. Variation of effective mobility and minimum carrier density with respect to channel length has also been observed. Considering all of the graphical illustrations, we do like to conclude that, graphene will be a successor in post silicon era and bring revolutionary changes in the field of fabrication technology.

  13. High-Speed Gate Driver Using GaN HEMTs for 20-MHz Hard Switching of SiC MOSFETs

    OpenAIRE

    Okuda, Takafumi; Hikihara, Takashi

    2017-01-01

    In this paper, we investigated a gate driver using a GaN HEMT push-pull configuration for the high-frequency hard switching of a SiC power MOSFET. Low on-resistance and low input capacitance of GaN HEMTs are suitable for a high-frequency gate driver from the logic level, and robustness of SiC MOSFET with high avalanche capability is suitable for a valve transistor in power converters. Our proposed gate driver consists of digital isolators, complementary Si MOSFETs, and GaN HEMTs. The GaN HEMT...

  14. Investigation of the Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field Effect Transistor

    OpenAIRE

    Saurabh, Sneh; Kumar, M. Jagadesh

    2011-01-01

    In this paper, we propose the application of a Dual Material Gate (DMG) in a Tunnel Field Effect Transistor (TFET) to simultaneously optimize the on-current, the off-current and the threshold voltage, and also improve the average subthreshold slope, the nature of the output characteristics and the immunity against the DIBL effects. We demonstrate that if appropriate work-functions are chosen for the gate materials on the source side and the drain side, the tunnel field effect transistor shows...

  15. Enhanced transconductance in a double-gate graphene field-effect transistor

    Science.gov (United States)

    Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu

    2018-03-01

    Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.

  16. Reduction of self-heating effect in SOI MOSFET by forming a new buried layer structure

    International Nuclear Information System (INIS)

    Zhu Ming; Lin Qing; Liu Xianghua; Lin Zixin; Zhang Zhengxuan; Lin Chenglu

    2003-01-01

    An inherent self-heating effect of the silicon-on-insulator (SOI) devices limits their application at high current levels. In this paper a novel solution to reduce the self-heating effect is proposed, based on N + and O + co-implantation into silicon wafer to form a new buried layer structure. This new structure was simulated using Medici program, and the temperature distribution and output characteristics were compared with those of the conventional SOI counterparts. As expected, a reduction of self-heating effect in the novel SOI device was observed

  17. CHEMICALLY MODIFIED FIELD-EFFECT TRANSISTORS - POTENTIOMETRIC AG+ SELECTIVITY OF PVC MEMBRANES BASED ON MACROCYCLIC THIOETHERS

    NARCIS (Netherlands)

    BRZOZKA, Z; COBBEN, PLHM; REINHOUDT, DN; EDEMA, JJH; KELLOGG, RM

    1993-01-01

    A chemically modified field-effect transistor (CHEMFET) with satisfactory Ag+ selectivity is described. The potentiometric Ag+ selectivities of CHEMFETs with plasticized PVC membranes based on macrocyclic thioethers have been determined. All the macrocyclic thioethers tested showed silver response

  18. Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

    Science.gov (United States)

    Ikpe, Stanley A.; Lauenstein, Jean-Marie; Carr, Gregory A.; Hunter, Don; Ludwig, Lawrence L.; Wood, William; Del Castillo, Linda Y.; Fitzpatrick, Fred; Chen, Yuan

    2016-01-01

    Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

  19. Extraction method of interfacial injected charges for SiC power MOSFETs

    Science.gov (United States)

    Wei, Jiaxing; Liu, Siyang; Li, Sheng; Song, Haiyang; Chen, Xin; Li, Ting; Fang, Jiong; Sun, Weifeng

    2018-01-01

    An improved novel extraction method which can characterize the injected charges along the gate oxide interface for silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed. According to the different interface situations of the channel region and the junction FET (JFET) region, the gate capacitance versus gate voltage (Cg-Vg) curve of the device can be divided into three relatively independent parts, through which the locations and the types of the charges injected in to the oxide above the interface can be distinguished. Moreover, the densities of these charges can also be calculated by the amplitudes of the shifts in the Cg-Vg curve. The correctness of this method is proved by TCAD simulations. Moreover, experiments on devices stressed by unclamped-inductive-switching (UIS) stress and negative bias temperature stress (NBTS) are performed to verify the validity of this method.

  20. Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon.

    Science.gov (United States)

    Rigante, Sara; Scarbolo, Paolo; Wipf, Mathias; Stoop, Ralph L; Bedner, Kristine; Buitrago, Elizabeth; Bazigos, Antonios; Bouvet, Didier; Calame, Michel; Schönenberger, Christian; Ionescu, Adrian M

    2015-05-26

    Field-effect transistors (FETs) form an established technology for sensing applications. However, recent advancements and use of high-performance multigate metal-oxide semiconductor FETs (double-gate, FinFET, trigate, gate-all-around) in computing technology, instead of bulk MOSFETs, raise new opportunities and questions about the most suitable device architectures for sensing integrated circuits. In this work, we propose pH and ion sensors exploiting FinFETs fabricated on bulk silicon by a fully CMOS compatible approach, as an alternative to the widely investigated silicon nanowires on silicon-on-insulator substrates. We also provide an analytical insight of the concept of sensitivity for the electronic integration of sensors. N-channel fully depleted FinFETs with critical dimensions on the order of 20 nm and HfO2 as a high-k gate insulator have been developed and characterized, showing excellent electrical properties, subthreshold swing, SS ∼ 70 mV/dec, and on-to-off current ratio, Ion/Ioff ∼ 10(6), at room temperature. The same FinFET architecture is validated as a highly sensitive, stable, and reproducible pH sensor. An intrinsic sensitivity close to the Nernst limit, S = 57 mV/pH, is achieved. The pH response in terms of output current reaches Sout = 60%. Long-term measurements have been performed over 4.5 days with a resulting drift in time δVth/δt = 0.10 mV/h. Finally, we show the capability to reproduce experimental data with an extended three-dimensional commercial finite element analysis simulator, in both dry and wet environments, which is useful for future advanced sensor design and optimization.

  1. SiC Optically Modulated Field-Effect Transistor

    Science.gov (United States)

    Tabib-Azar, Massood

    2009-01-01

    An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification

  2. Modeling of strain effects on the device behaviors of ferroelectric memory field-effect transistors

    International Nuclear Information System (INIS)

    Yang, Feng; Hu, Guangda; Wu, Weibing; Yang, Changhong; Wu, Haitao; Tang, Minghua

    2013-01-01

    The influence of strains on the channel current–gate voltage behaviors and memory windows of ferroelectric memory field-effect transistors (FeMFETs) were studied using an improved model based on the Landau–Devonshire theory. ‘Channel potential–gate voltage’ ferroelectric polarization and silicon surface potential diagrams were constructed for strained single-domain BaTiO 3 FeMFETs. The compressive strains can increase (or decrease) the amplitude of transistor currents and enlarge memory windows. However, tensile strains only decrease the maximum value of transistor currents and compress memory windows. Mismatch strains were found to have a significant influence on the electrical behaviors of the devices, therefore, they must be considered in FeMFET device designing. (fast track communication)

  3. Die degradation effect on aging rate in accelerated cycling tests of SiC power MOSFET modules

    DEFF Research Database (Denmark)

    Luo, Haoze; Baker, Nick; Iannuzzo, Francesco

    2017-01-01

    In order to distinguish the die and bond wire degradations, in this paper both the die and bond wire resistances of SiC MOSFET modules are measured and tested during the accelerated cycling tests. It is proved that, since the die degradation under specific conditions increases the temperature swi......, bond wires undergo harsher thermo-mechanical stress than expected. The experimental results confirm the die-related thermal failure mechanism. An improved degradation model is proposed for the bond-wire resistance increase in case of die degradation....

  4. Nanowire Tunnel Field Effect Transistors: Prospects and Pitfalls

    Science.gov (United States)

    Sylvia, Somaia Sarwat

    The tunnel field effect transistor (TFET) has the potential to operate at lower voltages and lower power than the field effect transistor (FET). The TFET can circumvent the fundamental thermal limit of the inverse subthreshold slope (S) by exploiting interband tunneling of non-equilibrium "cold" carriers. The conduction mechanism in the TFET is governed by band-to-band tunneling which limits the drive current. TFETs built with III-V materials like InAs and InSb can produce enough tunneling current because of their small direct bandgap. Our simulation results show that although they require highly degenerate source doping to support the high electric fields in the tunnel region, the devices achieve minimum inverse subthreshold slopes of 30 mV/dec. In subthreshold, these devices experience both regimes of voltage-controlled tunneling and cold-carrier injection. Numerical results based on a discretized 8-band k.p model are compared to analytical WKB theory. For both regular FETs and TFETs, direct channel tunneling dominates the leakage current when the physical gate length is reduced to 5 nm. Therefore, a survey of materials is performed to determine their ability to suppress the direct tunnel current through a 5 nm barrier. The tunneling effective mass gives the best indication of the relative size of the tunnel currents. Si gives the lowest overall tunnel current for both the conduction and valence band and, therefore, it is the optimum choice for suppressing tunnel current at the 5 nm scale. Our numerical simulation shows that the finite number, random placement, and discrete nature of the dopants in the source of an InAs nanowire (NW) TFET affect both the mean value and the variance of the drive current and the inverse subthreshold slope. The discrete doping model gives an average drive current and an inverse subthreshold slope that are less than those predicted from the homogeneous doping model. The doping density required to achieve a target drive current is

  5. Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Ping Feng

    2014-09-01

    Full Text Available One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed.

  6. Single-Event Effects in Power MOSFETs During Heavy Ion Irradiations Performed After Gamma-Ray Degradation

    Science.gov (United States)

    Busatto, G.; De Luca, V.; Iannuzzo, F.; Sanseverino, A.; Velardi, F.

    2013-10-01

    The robustness of commercial power metal-oxide semiconductor field-effect transistors to combined gamma-heavy ion irradiation has been investigated, evidence that the degradation of the gate oxide caused by the γ irradiation can severely corrupt the robustness to single-event effects and drastically modify the physical behavior of the device under test after the impact of a heavy ion. A decrease of the critical voltages at which destructive burnouts and gate ruptures for heavy ion impact appear, has been detected in the devices under test, which were previously irradiated with γ rays. In addition, the amount of critical voltage reduction is strictly related to the amount of the absorbed γ-ray dose. Furthermore, at the failure voltage, the behavior of the device is affected by the conduction of a current through the gate oxide. Moreover, the single-event gate rupture” of the device appears at lower voltages because of the reduction of the Fowler-Nordheim limit in the γ-irradiated devices.

  7. Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

    Science.gov (United States)

    Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

    2001-01-01

    A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

  8. The effects of gamma irradiation on neutron displacement sensitivity of lateral PNP bipolar transistors

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Chenhui, E-mail: wangchenhui@nint.ac.cn; Chen, Wei; Liu, Yan; Jin, Xiaoming; Yang, Shanchao; Qi, Chao

    2016-09-21

    The effects of gamma irradiation on neutron displacement sensitivity of four types of lateral PNP bipolar transistors (LPNPs) with different neutral base widths, emitter widths and the doping concentrations of the epitaxial base region are studied. The physical mechanisms of the effects are explored by defect analysis using deep level transient spectroscopy (DLTS) techniques and numerical simulations of recombination process in the base region of the lateral PNP bipolar transistors, and are verified by the experiments on gate-controlled lateral PNP bipolar transistors (GCLPNPs) manufactured in the identical commercial bipolar process with different gate bias voltage. The results indicate that gamma irradiation increases neutron displacement damage sensitivity of lateral PNP bipolar transistors and the mechanism of this phenomenon is that positive charge induced by gamma irradiation enhances the recombination process in the defects induced by neutrons in the base region, leading to larger recombination component of base current and greater gain degradation.

  9. Tailoring Functional Interlayers in Organic Field-Effect Transistor Biosensors.

    Science.gov (United States)

    Magliulo, Maria; Manoli, Kyriaki; Macchia, Eleonora; Palazzo, Gerardo; Torsi, Luisa

    2015-12-09

    This review aims to provide an update on the development involving dielectric/organic semiconductor (OSC) interfaces for the realization of biofunctional organic field-effect transistors (OFETs). Specific focus is given on biointerfaces and recent technological approaches where biological materials serve as interlayers in back-gated OFETs for biosensing applications. Initially, to better understand the effects produced by the presence of biomolecules deposited at the dielectric/OSC interfacial region, the tuning of the dielectric surface properties by means of self-assembled monolayers is discussed. Afterward, emphasis is given to the modification of solid-state dielectric surfaces, in particular inorganic dielectrics, with biological molecules such as peptides and proteins. Special attention is paid on how the presence of an interlayer of biomolecules and bioreceptors underneath the OSC impacts on the charge transport and sensing performance of the device. Moreover, naturally occurring materials, such as carbohydrates and DNA, used directly as bulk gating materials in OFETs are reviewed. The role of metal contact/OSC interface in the overall performance of OFET-based sensors is also discussed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. High mobility graphene ion-sensitive field-effect transistors by noncovalent functionalization.

    Science.gov (United States)

    Fu, W; Nef, C; Tarasov, A; Wipf, M; Stoop, R; Knopfmacher, O; Weiss, M; Calame, M; Schönenberger, C

    2013-12-21

    Noncovalent functionalization is a well-known nondestructive process for property engineering of carbon nanostructures, including carbon nanotubes and graphene. However, it is not clear to what extend the extraordinary electrical properties of these carbon materials can be preserved during the process. Here, we demonstrated that noncovalent functionalization can indeed delivery graphene field-effect transistors (FET) with fully preserved mobility. In addition, these high-mobility graphene transistors can serve as a promising platform for biochemical sensing applications.

  11. Neutron effects on the electrical and switching characteristics of NPN bipolar power transistors

    Science.gov (United States)

    Frasca, Albert J.; Schwarze, Gene E.

    1988-01-01

    The use of nuclear reactors to generate electrical power for future space missions will require the electrical components used in the power conditioning, control, and transmission subsystem to operate in the associated radiation environments. An initial assessment of neutron irradiation on the electrical and switching characteristics of commercial high power NPN bipolar transistors was investigated. The results clearly show the detrimental effects caused by neutron irradiation on the electrical and switching characteristics of the NPN bipolar power transistor.

  12. Characterization of field effect transistor with TiO{sub 2} nanotube channel fabricated by dielectrophoresis

    Energy Technology Data Exchange (ETDEWEB)

    Ishii, M; Yoshimura, T; Fujimura, N [Osaka Prefecture University, 1-1 Gakuen-cho, Naka-ku, Sakai, Osaka (Japan); Terauchi, M; Nakayama, T, E-mail: tyoshi@pe.osakafu-u.ac.jp [Extreme Energy-Density Research Institute, Nagaoka University of Technology, 1603-1 Kamitomioka-cho, Nagaoka, Niigata (Japan)

    2011-10-29

    Field effect transistor with TiO{sub 2} nanotube channel was fabricated by dielectrophoresis. Although TiO{sub 2} nanotube channel is not formed at 10 MHz of the dielectrophoresis, the channel is formed at 100 kHz. It is suggested that migration distance is not enough at 10MHz. The drain current-drain voltage characteristics of the transistor and the temperature dependence indicate that the electric transport is dominated by double Schottky barrier.

  13. Development and characterization of vertical double-gate MOS field-effect transistors

    International Nuclear Information System (INIS)

    Trellenkamp, S.

    2004-07-01

    Planar MOS-field-effect transistors are common devices today used by the computer industry. When their miniaturization reaches its limit, alternate transistor concepts become necessary. In this thesis the development of vertical Double-Gate-MOS-field-effect transistors is presented. These types of transistors have a vertically aligned p-n-p junction (or n-p-n junction, respectively). Consequently, the source-drain current flows perpendicular with respect to the surface of the wafer. A Double-Gate-field-effect transistor is characterized by a very thin channel region framed by two parallel gates. Due to the symmetry of the structure and less bulk volume better gate control and hence better short channel behavior is expected, as well as an improved scaling potential. Nanostructuring of the transistor's active region is very challenging. Approximately 300 nm high and down to 30 nm wide silicon ridges are requisite. They can be realized using hydrogen silsesquioxane (HSQ) as inorganic high resolution resist for electron beam lithography. Structures defined in HSQ are then transferred with high anisotropy and selectivity into silicon using ICP-RIE (reactive ion etching with inductive coupled plasma). 25 nm wide and 330 nm high silicon ridges are achieved. Different transistor layouts are realized. The channel length is defined by epitaxial growth of doped silicon layers before or by ion implantation after nanostructuring, respectively. The transistors show source-drain currents up to 380 μA/μm and transconductances up to 480 μS/μm. Improved short channel behavior for decreasing width of the silicon ridges is demonstrated. (orig.)

  14. Organic field-effect transistor-based gas sensors.

    Science.gov (United States)

    Zhang, Congcong; Chen, Penglei; Hu, Wenping

    2015-04-21

    Organic field-effect transistors (OFETs) are one of the key components of modern organic electronics. While the past several decades have witnessed huge successes in high-performance OFETs, their sophisticated functionalization with regard to the responses towards external stimulations has also aroused increasing attention and become an important field of general concern. This is promoted by the inherent merits of organic semiconductors, including considerable variety in molecular design, low cost, light weight, mechanical flexibility, and solution processability, as well as by the intrinsic advantages of OFETs including multiparameter accessibility and ease of large-scale manufacturing, which provide OFETs with great potential as portable yet reliable sensors offering high sensitivity, selectivity, and expeditious responses. With special emphases on the works achieved since 2009, this tutorial review focuses on OFET-based gas sensors. The working principles of this type of gas sensors are discussed in detail, the state-of-the-art protocols developed for high-performance gas sensing are highlighted, and the advanced gas discrimination systems in terms of sensory arrays of OFETs are also introduced. This tutorial review intends to provide readers with a deep understanding for the future design of high-quality OFET gas sensors for potential uses.

  15. Tunnel field-effect transistor with two gated intrinsic regions

    Directory of Open Access Journals (Sweden)

    Y. Zhang

    2014-07-01

    Full Text Available In this paper, we propose and validate (using simulations a novel design of silicon tunnel field-effect transistor (TFET, based on a reverse-biased p+-p-n-n+ structure. 2D device simulation results show that our devices have significant improvements of switching performance compared with more conventional devices based on p-i-n structure. With independent gate voltages applied to two gated intrinsic regions, band-to-band tunneling (BTBT could take place at the p-n junction, and no abrupt degenerate doping profile is required. We developed single-side-gate (SSG structure and double-side-gate (DSG structure. SSG devices with HfO2 gate dielectric have a point subthreshold swing of 9.58 mV/decade, while DSG devices with polysilicon gate electrode material and HfO2 gate dielectric have a point subthreshold swing of 16.39 mV/decade. These DSG devices have ON-current of 0.255 μA/μm, while that is lower for SSG devices. Having two nano-scale independent gates will be quite challenging to realize with good uniformity across the wafer and the improved behavior of our TFET makes it a promising steep-slope switch candidate for further investigations.

  16. Intrinsic Charge Transport in Organic Field-Effect Transistors

    Science.gov (United States)

    Podzorov, Vitaly

    2005-03-01

    Organic field-effect transistors (OFETs) are essential components of modern electronics. Despite the rapid progress of organic electronics, understanding of fundamental aspects of the charge transport in organic devices is still lacking. Recently, the OFETs based on highly ordered organic crystals have been fabricated with innovative techniques that preserve the high quality of single-crystal organic surfaces. This technological progress facilitated the study of transport mechanisms in organic semiconductors [1-4]. It has been demonstrated that the intrinsic polaronic transport, not dominated by disorder, with a remarkably high mobility of ``holes'' μ = 20 cm^2/Vs can be achieved in these devices at room temperature [4]. The signatures of the intrinsic polaronic transport are the anisotropy of the carrier mobility and an increase of μ with cooling. These and other aspects of the charge transport in organic single-crystal FETs will be discussed. Co-authors are Etienne Menard, University of Illinois at Urbana Champaign; Valery Kiryukhin, Rutgers University; John Rogers, University of Illinois at Urbana Champaign; Michael Gershenson, Rutgers University. [1] V. Podzorov et al., Appl. Phys. Lett. 82, 1739 (2003); ibid. 83, 3504 (2003). [2] V. C. Sundar et al., Science 303, 1644 (2004). [3] R. W. I. de Boer et al., Phys. Stat. Sol. (a) 201, 1302 (2004). [4] V. Podzorov et al., Phys. Rev. Lett. 93, 086602 (2004).

  17. Reproducibility and stability of C60 based organic field effect transistor

    Science.gov (United States)

    Ahmed, Rizwan; Sams, Michael; Simbrunner, Clemens; Ullah, Mujeeb; Rehman, Kamila; Schwabegger, Günther; Sitter, H.; Ostermann, Timm

    2012-01-01

    A comprehensive study concerning the reproducibility and stability of organic n-type field effect transistors is presented. C60 based OFETs were chosen to investigate the fabrication reproducibility and the long term stability because C60 is a high mobility n-type material. We fabricated 48 transistors and each transistor was measured for 24 h inside the glove box. To test for life time stability – long term measurements up to three months have been undertaken. We report about the fluctuations in the device parameters of all investigated transistors by comparing the transfer characteristics, and on/off ratio for short time and long time measurements. C60 based OFETs showed good reproducibility and stability for short time measurements and a decay for long time measurements. PMID:22368321

  18. Single-Event Gate Rupture in Power MOSFETs: A New Radiation Hardness Assurance Approach

    Science.gov (United States)

    Lauenstein, Jean-Marie

    2011-01-01

    Almost every space mission uses vertical power metal-semiconductor-oxide field-effect transistors (MOSFETs) in its power-supply circuitry. These devices can fail catastrophically due to single-event gate rupture (SEGR) when exposed to energetic heavy ions. To reduce SEGR failure risk, the off-state operating voltages of the devices are derated based upon radiation tests at heavy-ion accelerator facilities. Testing is very expensive. Even so, data from these tests provide only a limited guide to on-orbit performance. In this work, a device simulation-based method is developed to measure the response to strikes from heavy ions unavailable at accelerator facilities but posing potential risk on orbit. This work is the first to show that the present derating factor, which was established from non-radiation reliability concerns, is appropriate to reduce on-orbit SEGR failure risk when applied to data acquired from ions with appropriate penetration range. A second important outcome of this study is the demonstration of the capability and usefulness of this simulation technique for augmenting SEGR data from accelerator beam facilities. The mechanisms of SEGR are two-fold: the gate oxide is weakened by the passage of the ion through it, and the charge ionized along the ion track in the silicon transiently increases the oxide electric field. Most hardness assurance methodologies consider the latter mechanism only. This work demonstrates through experiment and simulation that the gate oxide response should not be neglected. In addition, the premise that the temporary weakening of the oxide due to the ion interaction with it, as opposed to due to the transient oxide field generated from within the silicon, is validated. Based upon these findings, a new approach to radiation hardness assurance for SEGR in power MOSFETs is defined to reduce SEGR risk in space flight projects. Finally, the potential impact of accumulated dose over the course of a space mission on SEGR

  19. Solution-processed ambipolar organic field-effect transistors and inverters.

    Science.gov (United States)

    Meijer, E J; de Leeuw, D M; Setayesh, S; van Veenendaal, E; Huisman, B H; Blom, P W M; Hummelen, J C; Scherf, U; Kadam, J; Klapwijk, T M

    2003-10-01

    There is ample evidence that organic field-effect transistors have reached a stage where they can be industrialized, analogous to standard metal oxide semiconductor (MOS) transistors. Monocrystalline silicon technology is largely based on complementary MOS (CMOS) structures that use both n-type and p-type transistor channels. This complementary technology has enabled the construction of digital circuits, which operate with a high robustness, low power dissipation and a good noise margin. For the design of efficient organic integrated circuits, there is an urgent need for complementary technology, where both n-type and p-type transistor operation is realized in a single layer, while maintaining the attractiveness of easy solution processing. We demonstrate, by using solution-processed field-effect transistors, that hole transport and electron transport are both generic properties of organic semiconductors. This ambipolar transport is observed in polymers based on interpenetrating networks as well as in narrow bandgap organic semiconductors. We combine the organic ambipolar transistors into functional CMOS-like inverters.

  20. The Development and Study of Molecular Electronic Switches and their Field-Effect Transistor (FET) Device Properties

    Science.gov (United States)

    2015-02-27

    used in molecular switches, electro- and photochromatic materials, field-effect transistors (FETs), OLEDs, and photovoltaic and solar cells . We are...materials that have interesting properties as photovoltaic or materials suitable in field-effect transistor (FET). (a) Papers published in peer-reviewed...effect transistors (FETs), electrochromic materials and solar cells . The goal of this research project is to synthesize fluorene- and perylene-based

  1. Steep-slope hysteresis-free negative capacitance MoS2 transistors

    Science.gov (United States)

    Si, Mengwei; Su, Chun-Jung; Jiang, Chunsheng; Conrad, Nathan J.; Zhou, Hong; Maize, Kerry D.; Qiu, Gang; Wu, Chien-Ting; Shakouri, Ali; Alam, Muhammad A.; Ye, Peide D.

    2018-01-01

    The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption1,2. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier3. Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel4-12. Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.

  2. Nature of size effects in compact models of field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Torkhov, N. A., E-mail: trkf@mail.ru [Tomsk State University, Tomsk 634050 (Russian Federation); Scientific-Research Institute of Semiconductor Devices, Tomsk 634050 (Russian Federation); Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050 (Russian Federation); Babak, L. I.; Kokolov, A. A.; Salnikov, A. S.; Dobush, I. M. [Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050 (Russian Federation); Novikov, V. A., E-mail: novikovvadim@mail.ru; Ivonin, I. V. [Tomsk State University, Tomsk 634050 (Russian Federation)

    2016-03-07

    Investigations have shown that in the local approximation (for sizes L < 100 μm), AlGaN/GaN high electron mobility transistor (HEMT) structures satisfy to all properties of chaotic systems and can be described in the language of fractal geometry of fractional dimensions. For such objects, values of their electrophysical characteristics depend on the linear sizes of the examined regions, which explain the presence of the so-called size effects—dependences of the electrophysical and instrumental characteristics on the linear sizes of the active elements of semiconductor devices. In the present work, a relationship has been established for the linear model parameters of the equivalent circuit elements of internal transistors with fractal geometry of the heteroepitaxial structure manifested through a dependence of its relative electrophysical characteristics on the linear sizes of the examined surface areas. For the HEMTs, this implies dependences of their relative static (A/mm, mA/V/mm, Ω/mm, etc.) and microwave characteristics (W/mm) on the width d of the sink-source channel and on the number of sections n that leads to a nonlinear dependence of the retrieved parameter values of equivalent circuit elements of linear internal transistor models on n and d. Thus, it has been demonstrated that the size effects in semiconductors determined by the fractal geometry must be taken into account when investigating the properties of semiconductor objects on the levels less than the local approximation limit and designing and manufacturing field effect transistors. In general, the suggested approach allows a complex of problems to be solved on designing, optimizing, and retrieving the parameters of equivalent circuits of linear and nonlinear models of not only field effect transistors but also any arbitrary semiconductor devices with nonlinear instrumental characteristics.

  3. Simulation study of 14-nm-gate III-V trigate field effect transistor devices with In1−xGaxAs channel capping layer

    Directory of Open Access Journals (Sweden)

    Cheng-Hao Huang

    2015-06-01

    Full Text Available In this work, we study characteristics of 14-nm-gate InGaAs-based trigate MOSFET (metal-oxide-semiconductor field effect transistor devices with a channel capping layer. The impacts of thickness and gallium (Ga concentration of the channel capping layer on the device characteristic are firstly simulated and optimized by using three-dimensional quantum-mechanically corrected device simulation. Devices with In1−xGaxAs/In0.53Ga0.47As channels have the large driving current owing to small energy band gap and low alloy scattering at the channel surface. By simultaneously considering various physical and switching properties, a 4-nm-thick In0.68Ga0.32As channel capping layer can be adopted for advanced applications. Under the optimized channel parameters, we further examine the effects of channel fin angle and the work-function fluctuation (WKF resulting from nano-sized metal grains of NiSi gate on the characteristic degradation and variability. To maintain the device characteristics and achieve the minimal variation induced by WKF, the physical findings of this study indicate a critical channel fin angle of 85o is needed for the device with an averaged grain size of NiSi below 4x4 nm2.

  4. Intrinsic Nonlinearities and Layout Impacts of 100 V Integrated Power MOSFETs in Partial SOI Process

    DEFF Research Database (Denmark)

    Fan, Lin; Knott, Arnold; Jørgensen, Ivan Harald Holger

    Parasitic capacitances of power semiconductors are a part of the key design parameters of state-of-the-art very high frequency (VHF) power supplies. In this poster, four 100 V integrated power MOSFETs with different layout structures are designed, implemented, and analyzed in a 0.18 ȝm partial...... Silicon-on-Insulator (SOI) process with a die area 2.31 mm2.  A small-signal model of power MOSFETs is proposed to systematically analyze the nonlinear parasitic capacitances in different transistor states: off-state, sub-threshold region, and on-state in the linear region. 3D plots are used to summarize...

  5. Analysis of switching characteristics for negative capacitance ultra-thin-body germanium-on-insulator MOSFETs

    Science.gov (United States)

    Pi-Ho Hu, Vita; Chiu, Pin-Chieh

    2018-04-01

    The impact of device parameters on the switching characteristics of negative capacitance ultra-thin-body (UTB) germanium-on-insulator (NC-GeOI) MOSFETs is analyzed. NC-GeOI MOSFETs with smaller gate length (L g), EOT, and buried oxide thickness (T box) and thicker ferroelectric layer thickness (T FE) exhibit larger subthreshold swing improvements over GeOI MOSFETs due to better capacitance matching. Compared with GeOI MOSFETs, NC-GeOI MOSFETs exhibit better switching time due to improvements in effective drive current (I eff) and subthreshold swing. NC-GeOI MOSFET exhibits larger ST improvements at V dd = 0.3 V (‑82.9%) than at V dd = 0.86 V (‑9.7%), because NC-GeOI MOSFET shows 18.2 times higher I eff than the GeOI MOSFET at V dd = 0.3 V, while 2.5 times higher I eff at V dd = 0.86 V. This work provides the device design guideline of NC-GeOI MOSFETs for ultra-low power applications.

  6. Size-effects in indium gallium arsenide nanowire field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Zota, Cezar B., E-mail: cezar.zota@eit.lth.se; Lind, E. [Department of Electrical and Information Technology, Lund University, Lund 22101 (Sweden)

    2016-08-08

    We fabricate and analyze InGaAs nanowire MOSFETs with channel widths down to 18 nm. Low-temperature measurements reveal quantized conductance due to subband splitting, a characteristic of 1D systems. We relate these features to device performance at room-temperature. In particular, the threshold voltage versus nanowire width is explained by direct observation of quantization of the first sub-band, i.e., band gap widening. An analytical effective mass quantum well model is able to describe the observed band structure. The results reveal a compromise between reliability, i.e., V{sub T} variability, and on-current, through the mean free path, in the choice of the channel material.

  7. Electro-Thermal Transient Simulation of Silicon Carbide Power Mosfet

    Science.gov (United States)

    2013-06-01

    Bipolar Junction Transistor ( BJT ) between the Source region, the P-Base region and the Drift region where the source forms the emitter, the P-base...region forms the base and the drain/substrate forms the collector. If this BJT turns ON, the gate will lose control over the drain current and the over...are shorted together which in turn shorts the emitter and base of the parasitic BJT thus preventing latch-up. Figure 2. D-MOSFET half cell color

  8. NUMERICAL SIMULATION OF ELECTRIC CHARACTERISTICS OF DEEP SUBMICRON SILICON-ON-INSULATOR MOS TRANSISTOR

    Directory of Open Access Journals (Sweden)

    A. V. Borzdov

    2016-01-01

    Full Text Available Today submicron silicon-on-insulator (SOI MOSFET structures are widely used in different electronic components and also can be used as sensing elements in some applications. The development of devices based on the structures with specified characteristics is impossible without computer simulation of their electric properties. The latter is not a trivial task since many complicated physical processes and effects must be taken into account. In current study ensemble Monte Carlo simulation of electron and hole transport in deep submicron n-channel SOI MOSFET with 100 nm channel length is performed. The aim of the study is investigation of the influence of interband impact ionization process on the device characteristics and determination of the transistor operation modes when impact ionization process starts to make an appreciable influence on the device functioning. Determination of the modes is very important for adequate and accurate modeling of different devices on the basis of SOI MOSFET structures. Main focus thereby is maid on the comparison of the use of two models of impact ionization process treatment with respect to their influence on the transistor current-voltage characteristics. The first model is based on the frequently used Keldysh approach and the other one utilizes the results obtained via numerical calculations of silicon band structure. It is shown that the use of Keldysh impact ionization model leads to much faster growth of the drain current and provides earlier avalanche breakdown for the SOI MOSFET. It is concluded that the choice between the two considered impact ionization models may be critical for simulation of the device electric characteristics. 

  9. Cross-point-type spin-transfer-torque magnetoresistive random access memory cell with multi-pillar vertical body channel MOSFET

    Science.gov (United States)

    Sasaki, Taro; Endoh, Tetsuo

    2018-04-01

    In this paper, from the viewpoint of cell size and sensing margin, the impact of a novel cross-point-type one transistor and one magnetic tunnel junction (1T–1MTJ) spin-transfer-torque magnetoresistive random access memory (STT-MRAM) cell with a multi-pillar vertical body channel (BC) MOSFET is shown for high density and wide sensing margin STT-MRAM, with a 10 ns writing period and 1.2 V V DD. For that purpose, all combinations of n/p-type MOSFETs and bottom/top-pin MTJs are compared, where the diameter of MTJ (D MTJ) is scaled down from 55 to 15 nm and the tunnel magnetoresistance (TMR) ratio is increased from 100 to 200%. The results show that, benefiting from the proposed STT-MRAM cell with no back bias effect, the MTJ with a high TMR ratio (200%) can be used in the design of smaller STT-MRAM cells (over 72.6% cell size reduction), which is a difficult task for conventional planar MOSFET based design.

  10. Simulation for silicon-compatible InGaAs-based junctionless field-effect transistor using InP buffer layer

    Science.gov (United States)

    Seo, Jae Hwa; Cho, Seongjae; Kang, In Man

    2013-10-01

    In this paper, we present the optimized performances of indium gallium arsenide (InGaAs)-based compound junctionless field-effect transistors (JLFETs) using an indium phosphide (InP) buffer layer. The proposed InGaAs-InP material combination with little lattice mismatch provides a significant improvement in current drivability securing various potential applications. Device optimization is performed in terms of primary dc parameters and characterization is investigated by two-dimensional (2D) technology computer-aided design simulations. The optimization variables were the channel doping concentration (Nch), the buffer doping concentration (Nbf), and the channel thickness (Tch). For the optimally designed InGaAs JLFET, on-state current (Ion) of 325 µA µm-1, subthreshold swing (S) of 80 mV dec-1, and current ratio (Ion/Ioff) of 109 were obtained. In the end, the results are compared with the data of silicon (Si)-based JL MOSFETs to confirm the improvements.

  11. Effects of quantum coupling on the performance of metal-oxide ...

    Indian Academy of Sciences (India)

    performance. It suggests that the quantum coupling effect should be considered for the performance of a ballistic MOSFET due to the high injection velocity of the channel electron. Keywords. Quantum coupling; metal-oxide-semiconductor field transistors. PACS Nos 85.30.De; 85.30.Tv; 73.40.Gk; 73.40.Qv. 1. Introduction.

  12. In vivo dosimetry in intraoperative electron radiotherapy. microMOSFETs, radiochromic films and a general-purpose linac

    Energy Technology Data Exchange (ETDEWEB)

    Lopez-Tarjuelo, Juan; Marco-Blancas, Noelia de; Santos-Serra, Agustin; Quiros-Higueras, Juan David [Consorcio Hospitalario Provincial de Castellon, Servicio de Radiofisica y Proteccion Radiologica, Castellon de la Plana (Spain); Bouche-Babiloni, Ana; Morillo-Macias, Virginia; Ferrer-Albiach, Carlos [Consorcio Hospitalario Provincial de Castellon, Servicio de Oncologia Radioterapica, Castellon de la Plana (Spain)

    2014-11-15

    In vivo dosimetry is desirable for the verification, recording, and eventual correction of treatment in intraoperative electron radiotherapy (IOERT). Our aim is to share our experience of metal oxide semiconductor field-effect transistors (MOSFETs) and radiochromic films with patients undergoing IOERT using a general-purpose linac. We used MOSFETs inserted into sterile bronchus catheters and radiochromic films that were cut, digitized, and sterilized by means of gas plasma. In all, 59 measurements were taken from 27 patients involving 15 primary tumors (seven breast and eight non-breast tumors) and 12 relapses. Data were subjected to an outliers' analysis and classified according to their compatibility with the relevant doses. Associations were sought regarding the type of detector, breast and non-breast irradiation, and the radiation oncologist's assessment of the difficulty of detector placement. At the same time, 19 measurements were carried out at the tumor bed with both detectors. MOSFET measurements (D = 93.5 %, s{sub D} = 6.5 %) were not significantly shifted from film measurements (D = 96.0 %, s{sub D} = 5.5 %; p = 0.109), and no associations were found (p = 0.526, p = 0.295, and p = 0.501, respectively). As regards measurements performed at the tumor bed with both detectors, MOSFET measurements (D = 95.0 %, s{sub D} = 5.4 %) were not significantly shifted from film measurements (D = 96.4 %, s{sub D} = 5.0 %; p = 0.363). In vivo dosimetry can produce satisfactory results at every studied location with a general-purpose linac. Detector choice should depend on user factors, not on the detector performance itself. Surgical team collaboration is crucial to success. (orig.) [German] Die In-vivo-Dosimetrie ist wuenschenswert fuer die Ueberpruefung, Registrierung und die eventuelle Korrektur der Behandlungen in der IOERT (''Intraoperative Electron Radiation Therapy''). Unser Ziel ist die Veroeffentlichung unserer Erfahrungen beim

  13. A new DG nanoscale TFET based on MOSFETs by using source gate electrode: 2D simulation and an analytical potential model

    Science.gov (United States)

    Ramezani, Zeinab; Orouji, Ali A.

    2017-08-01

    This paper suggests and investigates a double-gate (DG) MOSFET, which emulates tunnel field effect transistors (M-TFET). We have combined this novel concept into a double-gate MOSFET, which behaves as a tunneling field effect transistor by work function engineering. In the proposed structure, in addition to the main gate, we utilize another gate over the source region with zero applied voltage and a proper work function to convert the source region from N+ to P+. We check the impact obtained by varying the source gate work function and source doping on the device parameters. The simulation results of the M-TFET indicate that it is a suitable case for a switching performance. Also, we present a two-dimensional analytic potential model of the proposed structure by solving the Poisson's equation in x and y directions and by derivatives from the potential profile; thus, the electric field is achieved. To validate our present model, we use the SILVACO ATLAS device simulator. The analytical results have been compared with it.

  14. Hysteresis in single-layer MoS2 field effect transistors.

    Science.gov (United States)

    Late, Dattatray J; Liu, Bin; Matte, H S S Ramakrishna; Dravid, Vinayak P; Rao, C N R

    2012-06-26

    Field effect transistors using ultrathin molybdenum disulfide (MoS(2)) have recently been experimentally demonstrated, which show promising potential for advanced electronics. However, large variations like hysteresis, presumably due to extrinsic/environmental effects, are often observed in MoS(2) devices measured under ambient environment. Here, we report the origin of their hysteretic and transient behaviors and suggest that hysteresis of MoS(2) field effect transistors is largely due to absorption of moisture on the surface and intensified by high photosensitivity of MoS(2). Uniform encapsulation of MoS(2) transistor structures with silicon nitride grown by plasma-enhanced chemical vapor deposition is effective in minimizing the hysteresis, while the device mobility is improved by over 1 order of magnitude.

  15. Differential multi-MOSFET nuclear radiation sensor

    Science.gov (United States)

    Deoliveira, W. A.

    1977-01-01

    Circuit allows minimization of thermal-drift errors, low power consumption, operation over wide dynamic range, improved sensitivity and stability with metaloxide-semiconductor field-effect transistor sensors.

  16. 3D NANOTUBE FIELD EFFECT TRANSISTORS FOR HYBRID HIGH-PERFORMANCE AND LOW-POWER OPERATION WITH HIGH CHIP-AREA EFFICIENCY

    KAUST Repository

    Fahad, Hossain M.

    2014-03-01

    scaling on silicon, the amount of current generated per device has to be increased while keeping short channel effects and off-state leakage at bay. The objective of this doctoral thesis is the investigation of an innovative vertical silicon based architecture called the silicon nanotube field effect transistor (Si NTFET). This topology incorporates a dual inner/outer core/shell gate stack strategy to control the volume inversion properties in a hollow silicon 1D quasi-nanotube under a tight electrostatic configuration. Together with vertically aligned source and drain, the Si NTFET is capable of very high on-state performance (drive current) in an area-efficient configuration as opposed to arrays of gate-all-around nanowires, while maintaining leakage characteristics similar to a single nanowire. Such a device architecture offsets the need of device arraying that is needed with fin and nanowire architectures. Extensive simulations are used to validate the potential benefits of Si NTFETs over GAA NWFETs on a variety of platforms such as conventional MOSFETs, tunnel FETs, junction-less FETs. This thesis demonstrates a novel CMOS compatible process flow to fabricate vertical nanotube transistors that offer a variety of advantages such as lithography-independent gate length definition, integration of epitaxially grown silicon nanotubes with spacer based gate dielectrics and abrupt in-situ doped source/drain junctions. Experimental measurement data will showcase the various materials and processing challenges in fabricating these devices. Finally, an extension of this work to topologically transformed wavy channel FinFETs is also demonstrated keeping in line with the theme of area efficient high-performance electronics.

  17. Oxygen plasma exposure effects on indium oxide nanowire transistors

    International Nuclear Information System (INIS)

    Kim, Seongmin; Delker, Collin; Janes, David B; Chen Pochiang; Zhou Chongwu; Ju, Sanghyun

    2010-01-01

    In 2 O 3 nanowire transistors are fabricated with and without oxygen plasma exposure of various regions of the nanowire. In two-terminal devices, exposure of the channel region results in an increased conductance of the channel region. For In 2 O 3 nanowire transistors in which the source/drain regions are exposed to oxygen plasma, the mobility, on-off current ratio and subthreshold slope, are improved with respect to those of non-exposed devices. Simulations using a two-dimensional device simulator (MEDICI) show that improved device performance can be quantified in terms of changes in interfacial trap, shifts in fixed charge densities and the corresponding reduction in Schottky barrier height at the contacts.

  18. Practical guide to organic field effect transistor circuit design

    CERN Document Server

    Sou, Antony

    2016-01-01

    The field of organic electronics spans a very wide range of disciplines from physics and chemistry to hardware and software engineering. This makes the field of organic circuit design a daunting prospect full of intimidating complexities, yet to be exploited to its true potential. Small focussed research groups also find it difficult to move beyond their usual boundaries and create systems-on-foil that are comparable with the established silicon world.This book has been written to address these issues, intended for two main audiences; firstly, physics or materials researchers who have thus far designed circuits using only basic drawing software; and secondly, experienced silicon CMOS VLSI design engineers who are already knowledgeable in the design of full custom transistor level circuits but are not familiar with organic devices or thin film transistor (TFT) devices.In guiding the reader through the disparate and broad subject matters, a concise text has been written covering the physics and chemistry of the...

  19. Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Jie; Liu, Chang-Hai; She, Xiao-Jian; Sun, Qi-Jun; Gao, Xu; Wang, Sui-Dong, E-mail: wangsd@suda.edu.cn [Institute of Functional Nano and Soft Materials (FUNSOM), Soochow University, Suzhou, Jiangsu 215123 (China)

    2014-10-20

    High-performance organic field-effect transistor nonvolatile memories have been achieved using sputtered C nanoparticles as the nano-floating-gate. The sputtered C nano-floating-gate is prepared with low-cost material and simple process, forming uniform and discrete charge trapping sites covered by a smooth and complete polystyrene layer. The devices show large memory window, excellent retention capability, and programming/reading/erasing/reading endurance. The sputtered C nano-floating-gate can effectively trap both holes and electrons, and it is demonstrated to be suitable for not only p-type but also n-type organic field-effect transistor nonvolatile memories.

  20. Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

    International Nuclear Information System (INIS)

    Liu, Jie; Liu, Chang-Hai; She, Xiao-Jian; Sun, Qi-Jun; Gao, Xu; Wang, Sui-Dong

    2014-01-01

    High-performance organic field-effect transistor nonvolatile memories have been achieved using sputtered C nanoparticles as the nano-floating-gate. The sputtered C nano-floating-gate is prepared with low-cost material and simple process, forming uniform and discrete charge trapping sites covered by a smooth and complete polystyrene layer. The devices show large memory window, excellent retention capability, and programming/reading/erasing/reading endurance. The sputtered C nano-floating-gate can effectively trap both holes and electrons, and it is demonstrated to be suitable for not only p-type but also n-type organic field-effect transistor nonvolatile memories.

  1. Highly stable organic polymer field-effect transistor sensor for selective detection in the marine environment

    Science.gov (United States)

    Knopfmacher, Oren; Hammock, Mallory L.; Appleton, Anthony L.; Schwartz, Gregor; Mei, Jianguo; Lei, Ting; Pei, Jian; Bao, Zhenan

    2014-01-01

    In recent decades, the susceptibility to degradation in both ambient and aqueous environments has prevented organic electronics from gaining rapid traction for sensing applications. Here we report an organic field-effect transistor sensor that overcomes this barrier using a solution-processable isoindigo-based polymer semiconductor. More importantly, these organic field-effect transistor sensors are stable in both freshwater and seawater environments over extended periods of time. The organic field-effect transistor sensors are further capable of selectively sensing heavy-metal ions in seawater. This discovery has potential for inexpensive, ink-jet printed, and large-scale environmental monitoring devices that can be deployed in areas once thought of as beyond the scope of organic materials.

  2. Exploring graphene field effect transistor devices to improve spectral resolution of semiconductor radiation detectors

    Energy Technology Data Exchange (ETDEWEB)

    Harrison, Richard Karl [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Howell, Stephen Wayne [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Martin, Jeffrey B. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Hamilton, Allister B. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2013-12-01

    Graphene, a planar, atomically thin form of carbon, has unique electrical and material properties that could enable new high performance semiconductor devices. Graphene could be of specific interest in the development of room-temperature, high-resolution semiconductor radiation spectrometers. Incorporating graphene into a field-effect transistor architecture could provide an extremely high sensitivity readout mechanism for sensing charge carriers in a semiconductor detector, thus enabling the fabrication of a sensitive radiation sensor. In addition, the field effect transistor architecture allows us to sense only a single charge carrier type, such as electrons. This is an advantage for room-temperature semiconductor radiation detectors, which often suffer from significant hole trapping. Here we report on initial efforts towards device fabrication and proof-of-concept testing. This work investigates the use of graphene transferred onto silicon and silicon carbide, and the response of these fabricated graphene field effect transistor devices to stimuli such as light and alpha radiation.

  3. Benzocyclobutene (BCB) Polymer as Amphibious Buffer Layer for Graphene Field-Effect Transistor.

    Science.gov (United States)

    Wu, Yun; Zou, Jianjun; Huo, Shuai; Lu, Haiyan; Kong, Yuecan; Chen, Tangshen; Wu, Wei; Xu, Jingxia

    2015-08-01

    Owing to the scattering and trapping effects, the interfaces of dielectric/graphene or substrate/graphene can tailor the performance of field-effect transistor (FET). In this letter, the polymer of benzocyclobutene (BCB) was used as an amphibious buffer layer and located at between the layers of substrate and graphene and between the layers of dielectric and graphene. Interestingly, with the help of nonpolar and hydrophobic BCB buffer layer, the large-scale top-gated, chemical vapor deposited (CVD) graphene transistors was prepared on Si/SiO2 substrate, its cutoff frequency (fT) and the maximum cutoff frequency (fmax) of the graphene field-effect transistor (GFET) can be reached at 12 GHz and 11 GHz, respectively.

  4. Bipolar single-wall carbon nanotube field-effect transistor

    OpenAIRE

    Babic, Bakir; Iqbal, Mahdi; Schonenberger, Christian

    2002-01-01

    We use a simultaneous flow of ethylene and hydrogen gases to grow single wall carbon nanotubes by chemical vapor deposition. Strong coupling to the gate is inferred from transport measurements for both metallic and semiconducting tubes. At low-temperatures, our samples act as single-electron transistors where the transport mechanism is mainly governed by Coulomb blockade. The measurements reveal very rich quantized energy level spectra spanning from valence to conduction band. The Coulomb dia...

  5. Pursuing Polymer Dielectric Interfacial Effect in Organic Transistors for Photosensing Performance Optimization

    OpenAIRE

    Wu, Xiaohan; Chu, Yingli; Liu, Rui; Katz, Howard E.; Huang, Jia

    2017-01-01

    Abstract Polymer dielectrics in organic field‐effect transistors (OFETs) are essential to provide the devices with overall flexibility, stretchability, and printability and simultaneously introduce charge interaction on the interface with organic semiconductors (OSCs). The interfacial effect between various polymer dielectrics and OSCs significantly and intricately influences device performance. However, understanding of this effect is limited because the interface is buried and the interfaci...

  6. Detailed investigation of the conducting channel in poly(3-hexylthiophene) field effect transistors

    NARCIS (Netherlands)

    von Hauff, Elizabeth; Johnen, Fabian; Tunc, Ali Veysel; Govor, Leonid; Parisi, Juergen

    2010-01-01

    In this study, the conducting channel in poly(3-hexylthiophene) (P3HT) organic field effect transistors (OFETs) was investigated. The effect of varying the P3HT layer thickness on the OFET parameters was studied. The threshold voltage and the field effect mobility were determined from both the

  7. Proton migration mechanism for operational instabilities in organic field-effect transistors

    NARCIS (Netherlands)

    Sharma, A.; Mathijssen, S.G.J.; Smits, E.C.P.; Kemerink, M.; Leeuw, D.M. de; Bobbert, P.A.

    2010-01-01

    Organic field-effect transistors exhibit operational instabilities involving a shift of the threshold gate voltage when a gate bias is applied. For a constant gate bias the threshold voltage shifts toward the applied gate bias voltage, an effect known as the bias-stress effect. Here, we report on a

  8. Ferroelectric-gate field effect transistor memories device physics and applications

    CERN Document Server

    Ishiwara, Hiroshi; Okuyama, Masanori; Sakai, Shigeki; Yoon, Sung-Min

    2016-01-01

    This book provides comprehensive coverage of the materials characteristics, process technologies, and device operations for memory field-effect transistors employing inorganic or organic ferroelectric thin films. This transistor-type ferroelectric memory has interesting fundamental device physics and potentially large industrial impact. Among the various applications of ferroelectric thin films, the development of nonvolatile ferroelectric random access memory (FeRAM) has progressed most actively since the late 1980s and has achieved modest mass production levels for specific applications since 1995. There are two types of memory cells in ferroelectric nonvolatile memories. One is the capacitor-type FeRAM and the other is the field-effect transistor (FET)-type FeRAM. Although the FET-type FeRAM claims ultimate scalability and nondestructive readout characteristics, the capacitor-type FeRAMs have been the main interest for the major semiconductor memory companies, because the ferroelectric FET has fatal handic...

  9. Multi-functional integration of organic field-effect transistors (OFETs): advances and perspectives.

    Science.gov (United States)

    Di, Chong-an; Zhang, Fengjiao; Zhu, Daoben

    2013-01-18

    Multi-functional organic field-effect transistors (OFETs), an emerging focus of organic optoelectronic devices, hold great potential for a variety of applications. This report introduces recent progress on multi-functional OFETs including OFETs based sensors, phototransistors, light-emitting transistors, memory cells, and magnetic field-effect OFETs. Key strategies towards multi- functional integration of OFETs, which involves the exploration of functional materials, interfaces modifications, modulation of condensed structures, optimization of device geometry, and device integration, are summarized. Furthermore, remaining challenges and perspectives are discussed, giving a comprehensive overview of multi-functional OFETs. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Effect of the metal work function on the electrical properties of carbon nanotube network transistors

    International Nuclear Information System (INIS)

    Kim, Un Jeong; Ko, Dae Young; Kil, Joon Pyo; Lee, Jung Wha; Park, Wan Jun

    2012-01-01

    A nearly perfect semiconducting single-walled carbon nanotube random network thin film transistor array was fabricated, and its reproducible transport properties were investigated. The effects of the metal work function for both the source and the drain on the electrical properties of the transistors were systematically investigated. Three different metal electrodes, Al, Ti, and Pd, were employed. As the metal work function increased, p-type behavior became dominant, and the field effect hole mobility dramatically increased. Also, the Schottky barrier of the Ti-nanotube contact was invariant to the molecular adsorption of species in air.

  11. On device design for steep-slope negative-capacitance field-effect-transistor operating at sub-0.2V supply voltage with ferroelectric HfO2 thin film

    Directory of Open Access Journals (Sweden)

    Masaharu Kobayashi

    2016-02-01

    Full Text Available Internet-of-Things (IoT technologies require a new energy-efficient transistor which operates at ultralow voltage and ultralow power for sensor node devices employing energy-harvesting techniques as power supply. In this paper, a practical device design guideline for low voltage operation of steep-slope negative-capacitance field-effect-transistors (NCFETs operating at sub-0.2V supply voltage is investigated regarding operation speed, material requirement and energy efficiency in the case of ferroelectric HfO2 gate insulator, which is the material fully compatible to Complementary Metal-Oxide-Semiconductor (CMOS process technologies. A physics-based numerical simulator was built to design NCFETs with the use of experimental HfO2 material parameters by modeling the ferroelectric gate insulator and FET channel simultaneously. The simulator revealed that NCFETs with ferroelectric HfO2 gate insulator enable hysteresis-free operation by setting appropriate operation point with a few nm thick gate insulator. It also revealed that, if the finite response time of spontaneous polarization of the ferroelectric gate insulator is 10-100psec, 1-10MHz operation speed can be achieved with negligible hysteresis. Finally, by optimizing material parameters and tuning negative capacitance, 2.5 times higher energy efficiency can be achieved by NCFET than by conventional MOSFETs. Thus, NCFET is expected to be a new CMOS technology platform for ultralow power IoT.

  12. Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

    Science.gov (United States)

    Phillips, Thomas A.; MacLeond, Todd C.; Sayyah, Rana; Ho, Fat Duen

    2009-01-01

    Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

  13. Impact of oxide thickness on SEGR failure in vertical power MOSFETs: Development of a semi-empirical expression

    International Nuclear Information System (INIS)

    Titus, J.L.; Wheatley, C.F.; Burton, D.I.; Mouret, I.; Allenspach, M.; Brews, J.; Schrimpf, R.; Galloway, K.; Pease, R.L.

    1995-01-01

    This paper investigates the role that the gate oxide thickness (T ox ) plays on the gate and drain failure threshold voltages required to induce the onset of single-event gate rupture (SEGR). The impact of gate oxide thickness on SEGR is experimentally determined from vertical power metal-oxide semiconductor field-effect transistors (MOSFETs) having identical process and design parameters, except for the gate oxide thickness. Power MOSFETs from five variants were specially fabricated with nominal gate oxide thicknesses of 30, 50, 70, 100, and 150 nm. Devices from each variant were characterized to mono-energetic ion beams of Nickel, Bromine, Iodine, and Gold, Employing different bias conditions, failure thresholds for the onset of SEGR were determined for each oxide thickness. Applying these experimental test results, the previously published empirical expression is extended to include the effects of gate oxide thickness. In addition, observations of ion angle, temperature, cell geometry, channel conductivity, and curvature at high drain voltages are briefly discussed

  14. Trivalued Memory Circuit Using Metal-Oxide-Semiconductor Field-Effect Transistor Bipolar-Junction-Transistor Negative-Differential-Resistance Circuits Fabricated by Standard SiGe Process

    Science.gov (United States)

    Gan, Kwang-Jow; Tsai, Cher-Shiung; Liang, Dong-Shong; Wen, Chun-Ming; Chen, Yaw-Hwang

    2006-09-01

    A trivalued memory circuit based on two cascoded metal-oxide-semiconductor field-effect transistor bipolar-junction-transistor negative-differential-resistance (MOS-BJT-NDR) devices is investigated. The MOS-BJT-NDR device is made of MOS and BJT devices, but it can show the NDR current-voltage characteristic by suitably arranging the MOS parameters. We demonstrate a trivalued memory circuit using the two-peak MOS-BJT-NDR circuit as the driver and a resistor as the load. The MOS-BJT-NDR devices and memory circuits are fabricated by the standard 0.35 μm SiGe process.

  15. Light Scattering Studies of Organic Field Effect Transistors

    Science.gov (United States)

    Adil, Danish

    Organic semiconductors hold a great promise of enabling new technology based on low cost and flexible electronic devices. While much work has been done in the field of organic semiconductors, the field is still quite immature when compared to that of traditional inorganic based devices. More work is required before the full potential of organic field effect transistors (OFETs), organic light emitting diodes (OLEDs), and organic photovoltaics (OPVs) is realized. Among such work, a further development of diagnostic tools that characterize charge transport and device robustness more efficiently is required. Charge transport in organic semiconductors is limited by the nature of the metal-semiconductor interfaces where charge is injected into the semiconductor film and the semiconductor-dielectric interface where the charge is accumulated and transported. This, combined with that fact that organic semiconductors are especially susceptible to having structural defects induced via oxidation, charge transport induced damage, and metallization results in a situation where a semiconductor film's ability to conduct charge can degrade over time. This degradation manifests itself in the electrical device characteristics of organic based electronic devices. OFETs, for example, may display changes in threshold voltage, lowering of charge carrier mobilities, or a decrease in the On/Off ratio. All these effects sum together to result in degradation in device performance. The work begins with a study where matrix assisted pulsed laser deposition (MAPLE), an alternative organic semiconductor thin film deposition method, is used to fabricate OFETs with improved semiconductor-dielectric interfaces. MAPLE allows for the controlled layer-by-layer growth of the semiconductor film. Devices fabricated using this technique are shown to exhibit desirable characteristics that are otherwise only achievable with additional surface treatments. MAPLE is shown to be viable alternative to other

  16. Unidirectional coating technology for organic field-effect transistors: materials and methods

    Science.gov (United States)

    Sun, Huabin; Wang, Qijing; Qian, Jun; Yin, Yao; Shi, Yi; Li, Yun

    2015-05-01

    Solution-processed organic field-effect transistors (OFETs) are essential for developing organic electronics. The encouraging development in solution-processed OFETs has attracted research interest because of their potential in low-cost devices with performance comparable to polycrystalline-silicon-based transistors. In recent years, unidirectional coating technology, featuring thin-film coating along only one direction and involving specific materials as well as solution-assisted fabrication methods, has attracted intensive interest. Transistors with organic semiconductor layers, which are deposited via unidirectional coating methods, have achieved high performance. In particular, carrier mobility has been greatly enhanced to values much higher than 10 cm2 V-1 s-1. Such significant improvement is mainly attributed to better control in morphology and molecular packing arrangement of organic thin film. In this review, typical materials that are being used in OFETs are discussed, and demonstrations of unidirectional coating methods are surveyed.

  17. Fabrication of metal nanopatterns for organic field effect transistor electrodes by cracking and transfer printing

    Science.gov (United States)

    Wang, Xiaonan; Fu, Tingting; Wang, Zhe

    2018-04-01

    In this paper, we demonstrate a novel method for fabricating metal nanopatterns using cracking to address the limitations of traditional techniques. Parallel crack arrays were created in a polydimethylsiloxane (PDMS) mold using a combination of surface modification and control of strain fields. The elastic PDMS containing the crack arrays was subsequently used as a stamp to prepare nanoscale metal patterns on a substrate by transfer printing. To illustrate the functionality of this technique, we employed the metal patterns as the source and drain contacts of an organic field effect transistor. Using this approach, we fabricated transistors with channel lengths ranging from 70–600 nm. The performance of these devices when the channel length was reduced was studied. The drive current density increases as expected, indicating the creation of operational transistors with recognizable properties.

  18. Photo-electronic current transport in back-gated graphene transistor

    Science.gov (United States)

    Srivastava, Ashok; Chen, Xinlu; Pradhan, Aswini K.

    2017-04-01

    In this work, we have studied photo-electronic current transport in a back-gated graphene field-effect transistor. Under the light illumination, band bending at the metal/graphene interface develops a built-in potential which generates photonic current at varying back-gate biases. A typical MOSFET type back-gated transistor structure uses a monolayer graphene as the channel layer formed over the silicon dioxide/silicon substrate. It is shown that the photo-electronic current consists of current contributions from photovoltaic, photo-thermoelectric and photo-bolometric effects. A maximum external responsivity close to 0.0009A/W is achieved at 30μW laser power source and 633nm wavelength.

  19. Temperature dependent properties of InSb and InAs nanowire field-effect transistors

    Science.gov (United States)

    Nilsson, Henrik A.; Caroff, Philippe; Thelander, Claes; Lind, Erik; Karlström, Olov; Wernersson, Lars-Erik

    2010-04-01

    We present temperature dependent electrical measurements on InSb and InAs nanowire field-effect transistors (FETs). The FETs are fabricated from InAs/InSb heterostructure nanowires, where one complete transistor is defined within each of the two segments. Both the InSb and the InAs FETs are n-type with good current saturation and low voltage operation. The off-current for the InSb FET shows a strong temperature dependence, which we attribute to a barrier lowering due to an increased band-to-band tunneling in the drain part of the channel.

  20. MOSFET dosimeter depth-dose measurements in heterogeneous tissue-equivalent phantoms at diagnostic x-ray energies

    International Nuclear Information System (INIS)

    Jones, A.K.; Pazik, F.D.; Hintenlang, D.E.; Bolch, W.E.

    2005-01-01

    The objective of the present study was to explore the use of the TN-1002RD metal-oxide-semiconductor field effect transistor (MOSFET) dosimeter for measuring tissue depth dose at diagnostic photon energies in both homogeneous and heterogeneous tissue-equivalent materials. Three cylindrical phantoms were constructed and utilized as a prelude to more complex measurements within tomographic physical phantoms of pediatric patients. Each cylindrical phantom was constructed as a stack of seven 5-cm-diameter and 1-cm-thick discs of materials radiographically representative of either soft tissue (S), bone (B), or lung tissue (L) at diagnostic photon energies. In addition to a homogeneous phantom of soft tissue (SSSSSSS), two heterogeneous phantoms were constructed: SSBBSSS and SBLLBSS. MOSFET dosimeters were then positioned at the interface of each disc, and the phantoms were then irradiated at 66 kVp and 200 mAs. Measured values of absorbed dose at depth were then compared to predicated values of point tissue dose as determined via Monte Carlo radiation transport modeling. At depths exceeding 2 cm, experimental results matched the computed values of dose with high accuracy regardless of the dosimeter orientation (epoxy bubble facing toward or away from the x-ray beam). Discrepancies were noted, however, between measured and calculated point doses near the surface of the phantom (surface to 2 cm depth) when the dosimeters were oriented with the epoxy bubble facing the x-ray beam. These discrepancies were largely eliminated when the dosimeters were placed with the flat side facing the x-ray beam. It is therefore recommended that the MOSFET dosimeters be oriented with their flat sides facing the beam when they are used at shallow depths or on the surface of either phantoms or patients

  1. On device architectures, subthreshold swing, and power consumption of the piezoelectric field-effect transistor (π-FET)

    NARCIS (Netherlands)

    Hueting, Raymond Josephus Engelbart; van Hemert, T.; Kaleli, B.; Wolters, Robertus A.M.; Schmitz, Jurriaan

    2015-01-01

    This paper describes the potential of tunable strain in field-effect transistors to boost performance of digital logic. Voltage-controlled strain can be imposed on a semiconductor body by the integration of a piezoelectric material improving transistor performance. In this paper, we derive the

  2. PH MEASUREMENTS WITH AN ION SENSITIVE FIELD-EFFECT TRANSISTOR IN THE MOUTH OF PATIENTS WITH XEROSTOMIA

    NARCIS (Netherlands)

    VISCH, LL; BERGVELD, P; LAMPRECHT, W; SGRAVENMADE, EJ

    A transistor pH electrode (ion sensitive field effect transistor), placed in the upper dentures of eleven xerostomia patients and five healthy volunteers, was used to register pH changes in five-, six- and seven-day-old dental plaque. A mouth rinse with a 10% sucrose solution caused a pH fall of

  3. Novel failure mechanism and improvement for split-gate trench MOSFET with large current under unclamped inductive switch stress

    Science.gov (United States)

    Tian, Ye; Yang, Zhuo; Xu, Zhiyuan; Liu, Siyang; Sun, Weifeng; Shi, Longxing; Zhu, Yuanzheng; Ye, Peng; Zhou, Jincheng

    2018-04-01

    In this paper, a novel failure mechanism under unclamped inductive switch (UIS) for Split-Gate Trench Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with large current is investigated. The device sample is tested and analyzed in detail. The simulation results demonstrate that the nonuniform potential distribution of the source poly should be responsible for the failure. Three structures are proposed and verified available to improve the device UIS ruggedness by TCAD simulation. The best one of the structures the device with source metal inserting into source poly through contacts in the field oxide is carried out and measured. The results demonstrate that the optimized structure can balance the trade-off between the UIS ruggedness and the static characteristics.

  4. A review of selected topics in physics based modeling for tunnel field-effect transistors

    Science.gov (United States)

    Esseni, David; Pala, Marco; Palestri, Pierpaolo; Alper, Cem; Rollo, Tommaso

    2017-08-01

    The research field on tunnel-FETs (TFETs) has been rapidly developing in the last ten years, driven by the quest for a new electronic switch operating at a supply voltage well below 1 V and thus delivering substantial improvements in the energy efficiency of integrated circuits. This paper reviews several aspects related to physics based modeling in TFETs, and shows how the description of these transistors implies a remarkable innovation and poses new challenges compared to conventional MOSFETs. A hierarchy of numerical models exist for TFETs covering a wide range of predictive capabilities and computational complexities. We start by reviewing seminal contributions on direct and indirect band-to-band tunneling (BTBT) modeling in semiconductors, from which most TCAD models have been actually derived. Then we move to the features and limitations of TCAD models themselves and to the discussion of what we define non-self-consistent quantum models, where BTBT is computed with rigorous quantum-mechanical models starting from frozen potential profiles and closed-boundary Schrödinger equation problems. We will then address models that solve the open-boundary Schrödinger equation problem, based either on the non-equilibrium Green’s function NEGF or on the quantum-transmitting-boundary formalism, and show how the computational burden of these models may vary in a wide range depending on the Hamiltonian employed in the calculations. A specific section is devoted to TFETs based on 2D crystals and van der Waals hetero-structures. The main goal of this paper is to provide the reader with an introduction to the most important physics based models for TFETs, and with a possible guidance to the wide and rapidly developing literature in this exciting research field.

  5. Wide-bandwidth charge sensitivity with a radio-frequency field-effect transistor

    NARCIS (Netherlands)

    Nishiguchi, K.; Yamaguchi, H.; Fujiwara, A.; Van der Zant, H.S.J.; Steele, G.A.

    2013-01-01

    We demonstrate high-speed charge detection at room temperature with single-electron resolution by using a radio-frequency field-effect transistor (RF-FET). The RF-FET combines a nanometer-scale silicon FET with an impedance-matching circuit composed of an inductor and capacitor. Driving the RF-FET

  6. Device characteristics of polymer dual-gate field-effect transistors

    NARCIS (Netherlands)

    Maddalena, F.; Spijkman, M.; Brondijk, J. J.; Fonteijn, P.; Brouwer, F.; Hummelen, J. C.; de Leeuw, D. M.; Blom, P. W. M.; de Boer, B.

    2008-01-01

    Dual-gate organic field-effect transistors (OFETs) were fabricated by solution processing using different p-type polymer semiconductors and polymer top-dielectric materials on prefabricated substrates with gold source-drain contacts defined by photolithography. The semiconductors and top dielectrics

  7. Ambipolar Cu- and Fe-phthalocyanine single-crystal field-effect transistors

    NARCIS (Netherlands)

    De Boer, R.W.I.; Stassen, A.F.; Craciun, M.F.; Mulder, C.L.; Molinari, A.; Rogge, S.; Morpurgo, A.F.

    2005-01-01

    We report the observation of ambipolar transport in field-effect transistors fabricated on single crystals of copper- and iron-phthalocyanine, using gold as a high work-function metal for the fabrication of source and drain electrodes. In these devices, the room-temperature mobility of holes reaches

  8. Charge transport in dual-gate organic field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J.J.; Spijkman, M.; Torricelli, F.; Blom, P.W.M.; Leeuw, D.M. de

    2012-01-01

    The charge carrier distribution in dual-gate field-effect transistors is investigated as a function of semiconductor thickness. A good agreement with 2-dimensional numerically calculated transfer curves is obtained. For semiconductor thicknesses larger than the accumulation width, two spatially

  9. Gamma radiation effects on hydrogen-terminated nanocrystalline diamond bio-transistors

    Czech Academy of Sciences Publication Activity Database

    Krátká, Marie; Babchenko, Oleg; Ukraintsev, Egor; Vachelová, Jana; Davídková, Marie; Vandrovcová, Marta; Kromka, Alexander; Rezek, Bohuslav

    2016-01-01

    Roč. 63, Mar (2016), 186-191 ISSN 0925-9635 R&D Projects: GA ČR(CZ) GBP108/12/G108 Institutional support: RVO:68378271 ; RVO:61389005 ; RVO:67985823 Keywords : diamond thin films * field effect transistors * proteins * cells * gamma irradiation * atomic force microscope * biosensors Subject RIV: BO - Biophysics Impact factor: 2.561, year: 2016

  10. Thiadiazoloquinoxaline-Fused Naphthalenediimides for n-Type Organic Field-Effect Transistors (OFETs).

    Science.gov (United States)

    Hu, Ben-Lin; Zhang, Ke; An, Cunbin; Pisula, Wojciech; Baumgarten, Martin

    2017-12-01

    Thiadiazoloquinoxaline-fused naphthalenediimides (TQ-f-NDIs) are designed and synthesized. They show high electron affinities (EAs) of ∼4.5 eV. Organic field-effect transistor (OFET) devices, fabricated by dip-coating, provided maximum high electron mobilities of 0.03 cm 2 /(V·s) with an on/off ratio of 2 × 10 5 .

  11. Gate-bias assisted charge injection in organic field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J. J.; Torricelli, F.; Smits, E. C. P.; Blom, P. W. M.; de Leeuw, D. M.

    The charge injection barriers in organic field-effect transistors (OFETs) seem to be far less critical as compared to organic light-emitting diodes (OLEDs). Counter intuitively, we show that the origin is image-force lowering of the barrier due to the gate bias at the source contact, although the

  12. N-type self-assembled monolayer field-effect transistors

    NARCIS (Netherlands)

    Ringk, A.; Li, X.; Gholamrezaie, F.; Smits, E.C.P.; Neuhold, A.; Moser, A.; Gelinck, G.H.; Resel, R.; Leeuw, D.M. de; Strohriegl, P.

    2012-01-01

    Within this work we present the synthesis and applications of a novel material designed for n-type self-assembled monolayer field-effect transistors (SAMFETs). Our novel perylene bisimide based molecule was obtained in six steps and is functionalized with a phosphonic acid linker which enables a

  13. Ambipolar organic field-effect transistors based on a solution-processed methanofullerene

    NARCIS (Netherlands)

    Anthopoulos, Thomas D.; Tanase, Cristina; Setayesh, Sepas; Meijer, Eduard J.; Hummelen, Jan C.; Blom, Paul W.M.; de Leeuw, Dagobert

    2004-01-01

    Organic field-effect transistors (OFETs, see Figure), based on the solution-processible methanofullerene [6,6]-phenyl-C-61-butyric acid methyl ester (PCBM), have been fabricated in a bottom-contact device configuration using gold electrodes. The OFET functions either as a p- or n-channel device,

  14. Near-Infrared Light-Emitting Ambipolar Organic Field-Effect Transistors

    NARCIS (Netherlands)

    Smits, E.C.P.; Setayesh, S.; Anthopoulos, T.D.; Buechel, M.; Nijssen, W.; Coehoorn, R.; Blom, P.W.M.; Leeuw, D.M. de

    2006-01-01

    Recent years have seen tremendous advances in the area of organic-based optoelectronic devices and several applications previously envisioned are now reaching the stage of commercial exploitation.[1] Organic field-effect transistors (OFETs) are among these devices and can be arguably viewed as a

  15. Gate-bias assisted charge injection in organic field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J.J.; Torricelli, F.; Smits, E.C.P.; Blom, P.W.M.; Leeuw, D.M. de

    2012-01-01

    The charge injection barriers in organic field-effect transistors (OFETs) seem to be far less critical as compared to organic light-emitting diodes (OLEDs). Counter intuitively, we show that the origin is image-force lowering of the barrier due to the gate bias at the source contact, although the

  16. The ion-sensitive field effect transistor in rapid acid-base titrations

    NARCIS (Netherlands)

    Bos, M.; Bergveld, Piet; van Veen-Blaauw, A.M.W.

    1979-01-01

    Ion-sensitive field effect transistors (ISFETs) are used as the pH sensor in rapid acid—base titrations. Titration speeds at least five times greater than those with glass electrodes are possible for accuracies better than ±1%.

  17. Intrinsic hydrogen-terminated diamond as ion-sensitive field effect transistor

    Czech Academy of Sciences Publication Activity Database

    Rezek, Bohuslav; Shin, D.; Watanabe, H.; Nebel, C.E.

    2007-01-01

    Roč. 122, - (2007), s. 596-599 ISSN 0925-4005 Institutional research plan: CEZ:AV0Z10100521 Keywords : diamond film * surface electronic properties * field effect transistor * pH sensor * semiconductor-electrolyte interface Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 2.934, year: 2007

  18. Microstructure-mobility correlation in self-organised, conjugated polymer field-effect transistors

    DEFF Research Database (Denmark)

    Sirringhaus, H.; Brown, P.J.; Friend, R.H.

    2000-01-01

    We have investigated the correlation between polymer microstructure and charge carrier mobility in high-mobility, self-organised field-effect transistors of poly-3-hexyl-thiophene (P3HT). Two different preferential orientations of the microcrystalline P3HT domains with respect to the substrate have...

  19. IC Compatible Wafer Level Fabrication of Silicon Nanowire Field Effect Transistors for Biosensing Applications

    NARCIS (Netherlands)

    Moh, T.S.Y.

    2013-01-01

    In biosensing, nano-devices such as Silicon Nanowire Field Effect Transistors (SiNW FETs) are promising components/sensors for ultra-high sensitive detection, especially when samples are low in concentration or a limited volume is available. Current processing of SiNW FETs often relies on expensive

  20. Monolithic junction field-effect transistor charge preamplifier for calorimetry at high luminosity hadron colliders

    International Nuclear Information System (INIS)

    Radeka, V.; Rescia, S.; Rehn, L.A.; Manfredi, P.F.; Speziali, V.

    1991-11-01

    The outstanding noise and radiation hardness characteristics of epitaxial-channel junction field-effect transistors (JFET) suggest that a monolithic preamplifier based upon them may be able to meet the strict specifications for calorimetry at high luminosity colliders. Results obtained so far with a buried layer planar technology, among them an entire monolithic charge-sensitive preamplifier, are described

  1. The Influence of Morphology on High-Performance Polymer Field-Effect Transistors

    DEFF Research Database (Denmark)

    Tsao, Hoi Nok; Cho, Don; Andreasen, Jens Wenzel

    2009-01-01

    The influence of molecular packing on the performance of polymer organic field-effect transistors is illustrated in this work. Both close -stacking distance and long-range order are important for achieving high mobilities. By aligning the polymers from solution, long-range order is induced...

  2. Organic nanofibers integrated by transfer technique in field-effect transistor devices

    DEFF Research Database (Denmark)

    Tavares, Luciana; Kjelstrup-Hansen, Jakob; Thilsing-Hansen, Kasper

    2011-01-01

    The electrical properties of self-assembled organic crystalline nanofibers are studied by integrating these on field-effect transistor platforms using both top and bottom contact configurations. In the staggered geometries, where the nanofibers are sandwiched between the gate and the source-drain...

  3. Graphene electrodes for n-type organic field-effect transistors

    DEFF Research Database (Denmark)

    Henrichsen, Henrik Hartmann; Boggild, P.

    2010-01-01

    field-effect transistor configuration (OFET). Single tip tungsten as well as microscale multi-point probes were used to electrically contact individual devices, making permanent connections unnecessary. The device platform has been tested with a thin film of para-hexaphenylene (p6P...

  4. High Performance Ambipolar Field-Effect Transistor of Random Network Carbon Nanotubes

    NARCIS (Netherlands)

    Bisri, Satria Zulkarnaen; Gao, Jia; Derenskyi, Vladimir; Gomulya, Widianta; Iezhokin, Igor; Gordiichuk, Pavlo; Herrmann, Andreas; Loi, Maria Antonietta

    2012-01-01

    Ambipolar field-effect transistors of random network carbon nanotubes are fabricated from an enriched dispersion utilizing a conjugated polymer as the selective purifying medium. The devices exhibit high mobility values for both holes and electrons (3 cm(2)/V.s) with a high on/off ratio (10(6)). The

  5. Ternary logic implemented on a single dopant atom field effect silicon transistor

    NARCIS (Netherlands)

    Klein, M.; Mol, J.A.; Verduijn, J.; Lansbergen, G.P.; Rogge, S.; Levine, R.D.; Remacle, F.

    2010-01-01

    We provide an experimental proof of principle for a ternary multiplier realized in terms of the charge state of a single dopant atom embedded in a fin field effect transistor (Fin-FET). Robust reading of the logic output is made possible by using two channels to measure the current flowing through

  6. A simple model for atomic layer doped field-effect transistor (ALD-FET) electronic states

    International Nuclear Information System (INIS)

    Mora R, M.E.; Gaggero S, L.M.

    1998-01-01

    We propose a simple potential model based on the Thomas-Fermi approximation to reproduce the main properties of the electronic structure of an atomic layer doped field effect transistor. Preliminary numerical results for a Si-based ALD-FET justify why bound electronic states are not observed in the experiment. (Author)

  7. Gas sensing with self-assembled monolayer field-effect transistors

    NARCIS (Netherlands)

    Andringa, Anne-Marije; Spijkman, Mark-Jan; Smits, Edsger C. P.; Mathijssen, Simon G. J.; van Hal, Paul A.; Setayesh, Sepas; Willard, Nico P.; Borshchev, Oleg V.; Ponomarenko, Sergei A.; Blom, Paul W. M.; de Leeuw, Dago M.

    A new sensitive gas sensor based on a self-assembled monolayer field-effect transistor (SAMFET) was used to detect the biomarker nitric oxide. A SAMFET based sensor is highly sensitive because the analyte and the active channel are separated by only one monolayer. SAMFETs were functionalised for

  8. Analysis of gate underlap channel double gate MOS transistor for electrical detection of bio-molecules

    Science.gov (United States)

    Ajay; Narang, Rakhi; Saxena, Manoj; Gupta, Mridula

    2015-12-01

    In this paper, an analytical model for gate drain underlap channel Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG-MOSFET) for label free electrical detection of biomolecules has been proposed. The conformal mapping technique has been used to derive the expressions for surface potential, lateral electric field, energy bands (i.e. conduction and valence band) and threshold voltage (Vth). Subsequently a full drain current model to analyze the sensitivity of the biosensor has been developed. The shift in the threshold voltage and drain current (after the biomolecules interaction with the gate underlap channel region of the MOS transistor) has been used as a sensing metric. All the characteristic trends have been verified through ATLAS (SILVACO) device simulation results.

  9. Strain-effect transistors: Theoretical study on the effects of external strain on III-nitride high-electron-mobility transistors on flexible substrates

    Energy Technology Data Exchange (ETDEWEB)

    Shervin, Shahab; Asadirad, Mojtaba [Department of Mechanical Engineering, University of Houston, Houston, Texas 77204-4006 (United States); Materials Science and Engineering Program, University of Houston, Houston, Texas 77204 (United States); Kim, Seung-Hwan; Ravipati, Srikanth; Lee, Keon-Hwa [Department of Mechanical Engineering, University of Houston, Houston, Texas 77204-4006 (United States); Bulashevich, Kirill [STR Group, Inc., Engels av. 27, P.O. Box 89, 194156, St. Petersburg (Russian Federation); Ryou, Jae-Hyun, E-mail: jryou@uh.edu [Department of Mechanical Engineering, University of Houston, Houston, Texas 77204-4006 (United States); Materials Science and Engineering Program, University of Houston, Houston, Texas 77204 (United States); Texas Center for Superconductivity at the University of Houston (TcSUH), University of Houston, Houston, Texas 77204 (United States)

    2015-11-09

    This paper presents strain-effect transistors (SETs) based on flexible III-nitride high-electron-mobility transistors (HEMTs) through theoretical calculations. We show that the electronic band structures of InAlGaN/GaN thin-film heterostructures on flexible substrates can be modified by external bending with a high degree of freedom using polarization properties of the polar semiconductor materials. Transfer characteristics of the HEMT devices, including threshold voltage and transconductance, are controlled by varied external strain. Equilibrium 2-dimensional electron gas (2DEG) is enhanced with applied tensile strain by bending the flexible structure with the concave-side down (bend-down condition). 2DEG density is reduced and eventually depleted with increasing compressive strain in bend-up conditions. The operation mode of different HEMT structures changes from depletion- to enchantment-mode or vice versa depending on the type and magnitude of external strain. The results suggest that the operation modes and transfer characteristics of HEMTs can be engineered with an optimum external bending strain applied in the device structure, which is expected to be beneficial for both radio frequency and switching applications. In addition, we show that drain currents of transistors based on flexible InAlGaN/GaN can be modulated only by external strain without applying electric field in the gate. The channel conductivity modulation that is obtained by only external strain proposes an extended functional device, gate-free SETs, which can be used in electro-mechanical applications.

  10. Technology challenges for ultrasmall silicon MOSFET's

    International Nuclear Information System (INIS)

    Dennard, R.H.

    1981-01-01

    Work on silicon MOSFET devices scaled down to half-micron dimensions is gathering momentum in research labs for VLSI applications. Further reductions in device geometries by only a factor of two will bring us to the edge of some fundamental barriers to miniaturization. Design requirements for very thin layers in the device structure lead to resistance effects, statistical fluctuation of doping impurities, and increased concern for interface properties. Scaling down of applied voltage is difficult because built-in junction potentials and other small voltage terms are no longer negligible. Increased susceptibility to spurious operation or permanent damage from alpha particles, cosmic particles, or other high-energy radiation is reviewed

  11. Low-frequency noise phenomena in switched MOSFETs

    NARCIS (Netherlands)

    van der Wel, A.P.; Klumperink, Eric A.M.; Kolhatkar, J.S.; Hoekstra, E.; Snoeij, Martijn F.; Salm, Cora; Wallinga, Hans; Nauta, Bram

    2007-01-01

    In small-area MOSFETs widely used in analog and RF circuit design, low-frequency (LF) noise behavior is increasingly dominated by single-electron effects. In this paper, we review the limitations of current compact noise models which do not model such single-electron effects. We present measurement

  12. Multifunctional Self-Assembled Monolayers for Organic Field-Effect Transistors

    Science.gov (United States)

    Cernetic, Nathan

    Organic field effect transistors (OFETs) have the potential to reach commercialization for a wide variety of applications such as active matrix display circuitry, chemical and biological sensing, radio-frequency identification devices and flexible electronics. In order to be commercially competitive with already at-market amorphous silicon devices, OFETs need to approach similar performance levels. Significant progress has been made in developing high performance organic semiconductors and dielectric materials. Additionally, a common route to improve the performance metric of OFETs is via interface modification at the critical dielectric/semiconductor and electrode/semiconductor interface which often play a significant role in charge transport properties. These metal oxide interfaces are typically modified with rationally designed multifunctional self-assembled monolayers. As means toward improving the performance metrics of OFETs, rationally designed multifunctional self-assembled monolayers are used to explore the relationship between surface energy, SAM order, and SAM dipole on OFET performance. The studies presented within are (1) development of a multifunctional SAM capable of simultaneously modifying dielectric and metal surface while maintaining compatibility with solution processed techniques (2) exploration of the relationship between SAM dipole and anchor group on graphene transistors, and (3) development of self-assembled monolayer field-effect transistor in which the traditional thick organic semiconductor is replaced by a rationally designed self-assembled monolayer semiconductor. The findings presented within represent advancement in the understanding of the influence of self-assembled monolayers on OFETs as well as progress towards rationally designed monolayer transistors.

  13. Dramatic switching behavior in suspended MoS2 field-effect transistors

    Science.gov (United States)

    Chen, Huawei; Li, Jingyu; Chen, Xiaozhang; Zhang, David; Zhou, Peng

    2018-02-01

    When integrating MoS2 flakes into scaling-down transistors, the short-channel effect, which is severe in silicon technology below 5-nanometer, can be avoided effectively. MoS2 transistors not only exhibit a high on/off ratio but also demonstrate a rapid switching speed. According to the theoretical calculation, the thermionic limit subthreshold slope (SS) of the ideal device could reach 60 mV/dec. However, due to the confinement of defects from substrates or contamination during the process, the SS deteriorates to more than 300 mV/dec, causing serious power consumption. In this work, we optimize the SS through structure design of MoS2 transistors. The suspended transistors exhibit a high on/off ratio of 107 and a minimum SS of 63 mV/dec with an ultralow standby power at room temperature. This study demonstrates the promising potential of structure design for electronic devices with ultralow-power switching behaviors.

  14. Top-down, in-plane GaAs nanowire MOSFETs on an Al2O3 buffer with a trigate oxide from focused ion-beam milling and chemical oxidation

    Science.gov (United States)

    Lee, S. C.; Neumann, A.; Jiang, Y.-B.; Artyushkova, K.; Brueck, S. R. J.

    2016-09-01

    The top-down fabrication of an in-plane nanowire (NW) GaAs metal-oxide-semiconductor field-effect transistor (MOSFET) with a trigate oxide implemented by liquid-phase chemical-enhanced oxidation (LPCEO) is reported. A 2 μm long channel having an effective cross section ˜70 × 220 nm2 is directly fabricated into an epitaxial n +-GaAs layer. This in-plane NW structure is achieved by focused ion beam (FIB) milling and hydrolyzation oxidation resulting in electronic isolation from the substrate through a semiconductor-on-insulator structure with an n +-GaAs/Al2O3 layer stack. The channel is epitaxially connected to the μm-scale source and drain within a single layer for a planar MOSFET to avoid any issues of ohmic contact and LPCEO to the NW. To fabricate a MOSFET, the top and the two sidewalls of the in-plane NW are oxidized by LPCEO to relieve the surface damage from FIB as well as to transform these surfaces to a ˜15 nm thick gate oxide. This trigate device has threshold voltage ˜0.14 V and peak transconductance ˜35 μS μm-1 with a subthreshold swing ˜150 mV/decade and on/off ratio of drain current ˜103, comparable to the performance of bottom-up NW devices.

  15. MOSFET-like CNFET based logic gate library for low-power application: a comparative study

    International Nuclear Information System (INIS)

    Gowri Sankar, P. A.; Udhayakumar, K.

    2014-01-01

    The next generation of logic gate devices are expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing CMOS technology. MOSFET like CNFETs should ideally be the best devices to work with for high-performance VLSI. This paper presents results of a comprehensive comparative study of MOSFET-like carbon nanotube field effect transistors (CNFETs) technology based logic gate library for high-speed, low-power operation than conventional bulk CMOS libraries. It focuses on comparing four promising logic families namely: complementary-CMOS (C-CMOS), transmission gate (TG), complementary pass logic (CPL) and Domino logic (DL) styles are presented. Based on these logic styles, the proposed library of static and dynamic NAND-NOR logic gates, XOR, multiplexer and full adder functions are implemented efficiently and carefully analyzed with a test bench to measure propagation delay and power dissipation as a function of supply voltage. This analysis provides the right choice of logic style for low-power, high-speed applications. Proposed logic gates libraries are simulated using Synopsys HSPICE based on the standard 32 nm CNFET model. The simulation results demonstrate that, it is best to use C-CMOS logic style gates that are implemented in CNFET technology which are superior in performance compared to other logic styles, because of their low average power-delay-product (PDP). The analysis also demonstrates how the optimum supply voltage varies with logic styles in ultra-low power systems. The robustness of the proposed logic gate library is also compared with conventional and state-art of CMOS logic gate libraries. (semiconductor integrated circuits)

  16. Utilizing Schottky barriers to suppress short-channel effects in organic transistors

    Science.gov (United States)

    Fernández, Anton F.; Zojer, Karin

    2017-10-01

    Transistors with short channel lengths exhibit profound deviations from the ideally expected behavior. One of the undesired short-channel effects is an enlarged OFF current that is associated with a premature turn on of the transistor. We present an efficient approach to suppress the OFF current, defined as the current at zero gate source bias, in short-channel organic transistors. We employ two-dimensional device simulations based on the drift-diffusion model to demonstrate that intentionally incorporating a Schottky barrier for injection enhances the ON-OFF ratio in both staggered and coplanar transistor architectures. The Schottky barrier is identified to directly counteract the origin of enlarged OFF currents: Short channels promote a drain-induced barrier lowering. The latter permits unhindered injection of charges even at reverse gate-source bias. An additional Schottky barrier hampers injection for such points of operations. We explain how it is possible to find the Schottky barrier of the smallest height necessary to exactly compensate for the premature turn on. This approach offers a substantial enhancement of the ON-OFF ratio. We show that this roots in the fact that such optimal barrier heights offer an excellent compromise between an OFF current diminished by orders of magnitude and an only slightly reduced ON current.

  17. SiC Field Effect Transistor Technology Demonstrating Prolonged Stable Operation at 500 C

    Science.gov (United States)

    Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Okojie, Robert S.; Beheim, Glenn M.; Meredith, Roger; Ferrier, Terry

    2006-01-01

    While there have been numerous reports of short-term transistor operation at 500 degree C or above, these devices have previously not demonstrated sufficient long-term operational durability at 500 degree C to be considered viable for most envisioned applications. This paper reports the development of Silicone Carbi field effect transistors capable of long-term electrical operation at 500 degree C. A 6H-SiC MESFET was packaged and subjected to continuous electrical operation while residing in a 500 degree C oven in oxidizing air atmosphere for over 2400 hours. The transistor gain, saturation current (IDSS), and on-resistance (RDS) changed by less than 20% from initial values throughout the duration of the biased 500 degree C test. Another high-temperature packaged 6H-SiC MESFET was employed to form a simple one-stage high-temperature low-frequency voltage amplifier. This single-stage common-source amplifier demonstrated stable continuous electrical operation (negligible changes to gain and operating biases) for over 600 hours while residing in a 500 degree C air ambient oven. In both cases, increased leakage from annealing of the Schottky gate-to-channel diode was the dominant transistor degradation mechanism that limited the duration of 500 degree C electrical operation.

  18. Transient nature of negative capacitance in ferroelectric field-effect transistors

    Science.gov (United States)

    Ng, Kwok; Hillenius, Steven J.; Gruverman, Alexei

    2017-10-01

    Negative capacitance (NC) in ferroelectrics, which stems from the imperfect screening of polarization, is considered a viable approach to lower voltage operation in the field-effect transistors (FETs) used in logic switches. In this paper, we discuss the implications of the transient nature of negative capacitance for its practical application. It is suggested that the NC effect needs to be characterized at the proper time scale to identify the type of circuits where functional NC-FETs can be used effectively.

  19. Ge1−xSix on Ge-based n-type metal–oxide semiconductor field-effect transistors by device simulation combined with high-order stress–piezoresistive relationships

    International Nuclear Information System (INIS)

    Lee, Chang-Chun; Hsieh, Chia-Ping; Huang, Pei-Chen; Cheng, Sen-Wen; Liao, Ming-Han

    2016-01-01

    The considerably high carrier mobility of Ge makes Ge-based channels a promising candidate for enhancing the performance of next-generation devices. The n-type metal–oxide semiconductor field-effect transistor (nMOSFET) is fabricated by introducing the epitaxial growth of high-quality Ge-rich Ge 1−x Si x alloys in source/drain (S/D) regions. However, the short channel effect is rarely considered in the performance analysis of Ge-based devices. In this study, the gate-width dependence of a 20 nm Ge-based nMOSFET on electron mobility is investigated. This investigation uses simulated fabrication procedures combined with the relationship of the interaction between stress components and piezoresistive coefficients at high-order terms. Ge 1−x Si x alloys, namely, Ge 0.96 Si 0.04 , Ge 0.93 Si 0.07 , and Ge 0.86 Si 0.14 , are individually tested and embedded into the S/D region of the proposed device layout and are used in the model of stress estimation. Moreover, a 1.0 GPa tensile contact etching stop layer (CESL) is induced to explore the effect of bi-axial stress on device geometry and subsequent mobility variation. Gate widths ranging from 30 nm to 4 μm are examined. Results show a significant change in stress when the width is < 300 nm. This phenomenon becomes notable when the Si in the Ge 1−x Si x alloy is increased. The stress contours of the Ge channel confirm the high stress components induced by the Ge 0.86 Si 0.14 stressor within the device channel. Furthermore, the stresses (S yy ) of the channel in the transverse direction become tensile when CESL is introduced. Furthermore, when pure S/D Ge 1−x Si x alloys are used, a maximum mobility gain of 28.6% occurs with an ~ 70 nm gate width. A 58.4% increase in mobility gain is obtained when a 1.0 GPa CESL is loaded. However, results indicate that gate width is extended to 200 nm at this point. - Highlights: • A 20 nm Ge-based n-channel metal–oxide semiconductor field-effect transistor is investigated

  20. Producing of pover GaAs structures of bipolar and field-effect transistor by CVD-method

    Directory of Open Access Journals (Sweden)

    Voronin V. A.

    2010-03-01

    Full Text Available Investigation results in technology of doping Sn and Bi of perfect GaAs structures preparation by the lowe-temperature isothermal chloride epitaxy method are presented. A complex problem has been solved to obtain planar layers of the n+–n–n0–p type bipolar transistors and planar layers of the i–n0–n–n+ type Schottky field-effect transistors. Heterogenetty in the thickness less than 3% and doping level less than 5% has been achieved. This allowed to get the discrete Schottky field-effect transistors with improved operation characteristics.

  1. Quantum ballistic analysis of transition metal dichalcogenides based double gate junctionless field effect transistor and its application in nano-biosensor

    Science.gov (United States)

    Shadman, Abir; Rahman, Ehsanur; Khosru, Quazi D. M.

    2017-11-01

    To reduce the thermal budget and the short channel effects in state of the art CMOS technology, Junctionless field effect transistor (JLFET) has been proposed in the literature. Numerous experimental, modeling, and simulation based works have been done on this new FET with bulk materials for various geometries until now. On the other hand, the two-dimensional layered material is considered as an alternative to current Si technology because of its ultra-thin body and high mobility. Very recently few simulation based works have been done on monolayer molybdenum disulfide based JLFET mainly to show the advantage of JLFET over conventional FET. However, no comprehensive simulation-based work has been done for double gate JLFET keeping in mind the prominent transition metal dichalcogenides (TMDC) to the authors' best knowledge. In this work, we have studied quantum ballistic drain current-gate voltage characteristics of such FETs within non-equilibrium Green's function (NEGF) framework. Our simulation results reveal that all these TMDC materials are viable options for implementing state of the art Junctionless MOSFET with emphasis on their performance at short gate lengths. Besides evaluating the prospect of TMDC materials in the digital logic application, the performance of Junctionless Double Gate trilayer TMDC heterostructure FET for the label-free electrical detection of biomolecules in dry environment has been investigated for the first time to the authors' best knowledge. The impact of charge neutral biomolecules on the electrical characteristics of the biosensor has been analyzed under dry environment situation. Our study shows that these materials could provide high sensitivity in the sub-threshold region as a channel material in nano-biosensor, a trend demonstrated by silicon on insulator FET sensor in the literature. Thus, going by the trend of replacing silicon with these novel materials in device level, TMDC heterostructure could be a viable alternative to

  2. The memory effect of a pentacene field-effect transistor with a polarizable gate dielectric

    Science.gov (United States)

    Unni, K. N. N.; de Bettignies, Remi; Dabos-Seignon, Sylvie; Nunzi, Jean-Michel

    2004-06-01

    The nonvolatile transistor memory element is an interesting topic in organic electronics. In this case a memory cell consists of only one device where the stored information is written as a gate insulator polarization by a gate voltage pulse and read by the channel conductance control with channel voltage pulse without destruction of the stored information. Therefore such transistor could be the base of non-volatile non-destructively readable computer memory of extremely high density. Also devices with polarizable gate dielectrics can function more effectively in certain circuits. The effective threshold voltage Vt can be brought very close to zero, for applications where the available gate voltage is limited. Resonant and adaptive circuits can be tuned insitu by polarizing the gates. Poly(vinylidene fluoride), PVDF and its copolymer with trifluoroethylene P(VDF-TrFE) are among the best known and most widely used ferroelectric polymers. In this manuscript, we report new results of an organic FET, fabricated with pentacene as the active material and P(VDF-TrFE) as the gate insulator. Application of a writing voltage of -50 V for short duration results in significant change in the threshold voltage and remarkable increase in the drain current. The memory effect is retained over a period of 20 hours.

  3. Charge based, continuous compact model for the channel current in organic thin-film transistors for all regions of operation

    Science.gov (United States)

    Hain, Franziska; Graef, Michael; Iñíguez, Benjamín; Kloes, Alexander

    2017-07-01

    In general most modeling approaches for organic field-effect transistors (OFETs) are based on the typical MOSFET equations. The threshold voltage is usually a fitting parameter without relation to physical parameters hence the impact of their variability on the threshold voltage is not clear. The presented modeling approach is charge based with a continuous equation for the channel current in organic field-effect transistors from below to above threshold. The model provides a physics based parameter set related to trap states, and a compatible parameter set from a circuit designer's perspective. An expression for the threshold voltage is derived depending on the density of trap states. The model considers a power-law mobility model, parasitic contact resistances and channel length modulation effects and is verified with measurements on OFETs fabricated with small molecules.

  4. Dual origin of room temperature sub-terahertz photoresponse in graphene field effect transistors

    Science.gov (United States)

    Bandurin, D. A.; Gayduchenko, I.; Cao, Y.; Moskotin, M.; Principi, A.; Grigorieva, I. V.; Goltsman, G.; Fedorov, G.; Svintsov, D.

    2018-04-01

    Graphene is considered as a promising platform for detectors of high-frequency radiation up to the terahertz (THz) range due to its superior electron mobility. Previously, it has been shown that graphene field effect transistors (FETs) exhibit room temperature broadband photoresponse to incoming THz radiation, thanks to the thermoelectric and/or plasma wave rectification. Both effects exhibit similar functional dependences on the gate voltage, and therefore, it was difficult to disentangle these contributions in previous studies. In this letter, we report on combined experimental and theoretical studies of sub-THz response in graphene field-effect transistors analyzed at different temperatures. This temperature-dependent study allowed us to reveal the role of the photo-thermoelectric effect, p-n junction rectification, and plasmonic rectification in the sub-THz photoresponse of graphene FETs.

  5. In vivo dosimetry in intraoperative electron radiotherapy: microMOSFETs, radiochromic films and a general-purpose linac.

    Science.gov (United States)

    López-Tarjuelo, Juan; Bouché-Babiloni, Ana; Morillo-Macías, Virginia; de Marco-Blancas, Noelia; Santos-Serra, Agustín; Quirós-Higueras, Juan David; Ferrer-Albiach, Carlos

    2014-10-01

    In vivo dosimetry is desirable for the verification, recording, and eventual correction of treatment in intraoperative electron radiotherapy (IOERT). Our aim is to share our experience of metal oxide semiconductor field-effect transistors (MOSFETs) and radiochromic films with patients undergoing IOERT using a general-purpose linac. We used MOSFETs inserted into sterile bronchus catheters and radiochromic films that were cut, digitized, and sterilized by means of gas plasma. In all, 59 measurements were taken from 27 patients involving 15 primary tumors (seven breast and eight non-breast tumors) and 12 relapses. Data were subjected to an outliers' analysis and classified according to their compatibility with the relevant doses. Associations were sought regarding the type of detector, breast and non-breast irradiation, and the radiation oncologist's assessment of the difficulty of detector placement. At the same time, 19 measurements were carried out at the tumor bed with both detectors. MOSFET measurements ([Formula: see text]  = 93.5 %, sD  =  6.5 %) were not significantly shifted from film measurements ([Formula: see text]  =  96.0 %, sD  =  5.5 %; p  =  0.109), and no associations were found (p = 0.526, p = 0.295,  and p = 0.501, respectively). As regards measurements performed at the tumor bed with both detectors, MOSFET measurements ([Formula: see text]  =  95.0 %, sD  =  5.4 % were not significantly shifted from film measurements ([Formula: see text]  =  96.4 %, sD  =  5.0 %; p  =  0.363). In vivo dosimetry can produce satisfactory results at every studied location with a general-purpose linac. Detector choice should depend on user factors, not on the detector performance itself. Surgical team collaboration is crucial to success.

  6. Electrical and noise characteristics of graphene field-effect transistors: ambient effects, noise sources and physical mechanisms.

    Science.gov (United States)

    Rumyantsev, S; Liu, G; Stillman, W; Shur, M; Balandin, A A

    2010-10-06

    We fabricated a large number of single and bilayer graphene transistors and carried out a systematic experimental study of their low-frequency noise characteristics. Special attention was given to determining the dominant noise sources in these devices and the effect of aging on the current-voltage and noise characteristics. The analysis of the noise spectral density dependence on the area of graphene channel showed that the dominant contributions to the low-frequency electronic noise come from the graphene layer itself rather than from the contacts. Aging of graphene transistors due to exposure to ambient conditions for over a month resulted in substantially increased noise, attributed to the decreasing mobility of graphene and increasing contact resistance. The noise spectral density in both single and bilayer graphene transistors either increased with deviation from the charge neutrality point or depended weakly on the gate bias. This observation confirms that the low-frequency noise characteristics of graphene transistors are qualitatively different from those of conventional silicon metal-oxide-semiconductor field-effect transistors.

  7. Silicon Tunneling Field Effect Transistors with a Hemicylindrical Nanowire Channel for Ultra-Low Power Application

    Science.gov (United States)

    Park, Byung-Gook; Sun, Min-Chul; Kim, Sang Wan

    In order to decrease the threshold voltage while maintaining the OFF current low, reduction of the subthreshold swing is essential in field effect transistors (FETs). To reduce the subthreshold swing below 60 mV/decade, inter-band tunneling can be used for injection of carriers and the device that utilizes such a mechanism is tunneling field effect transistor (TFET). Silicon(Si) TFETs, which are favored due to their compatibility with currently dominant complementary metal-oxide-semiconductor (CMOS) technology, suffer from low ON current because of the relatively large bandgap of Si. The ON current of Si TFETs can be increased by field and area enhancement in a cylindrical nanowire channel. Numerical analysis has confirmed that the cylindrical channel structure shows significantly higher tunneling rate and wider tunneling area than the double gate structure. Si TFETs with a hemicylindrical nanowire channel are fabricated and characterized, and the effectiveness of nanowire channel approach is demonstrated.

  8. Hole mobility enhancement of p-MOSFETs using global and local Ge-channel technologies

    International Nuclear Information System (INIS)

    Takagi, Shinichi; Tezuka, T.; Irisawa, T.; Nakaharai, S.; Maeda, T.; Numata, T.; Ikeda, K.; Sugiyama, N.

    2006-01-01

    Mobility enhancement technologies have currently been recognized as mandatory for future scaled MOSFETs. In this paper, we review our recent results on high hole mobility p-MOSFETs using global/local SiGe or Ge channels. There are two directions for introducing SiGe or Ge channels into Si CMOS platform. One is to use SiGe or Ge global substrates and the other is to form SiGe or Ge-channel regions locally on Si wafers. In both cases, the Ge condensation technique, where Ge-channel layers are formed by oxidizing SiGe films on SOI substrates, are effectively utilized. As for the global technologies, ultrathin GOI substrates are prepared and used to fabricate high mobility GOI p-MOSFETs. As for the local technologies, SGOI or GOI channels are formed locally in the active area of p-MOSFETs on SOI wafers. It is shown that the hole mobility enhancement factor of as high as 10 is obtained in locally fabricated p-MOSFETs through the effects of high-Ge content and the compressive strain. Furthermore, the local Ge-channel technologies are combined with global SiGe or Ge substrates for pursuing the optimal and individual design of n-MOSFETs and p-MOSFETs on a single Si wafer. The CMOS device composed of strained-Si n-MOSFETs and SGOI p-MOSFETs is successfully integrated on a same wafer, which is a promising CMOS structure under deep sub 100 nm technology nodes

  9. Prediction of the threshold voltage of GaAs ion-implanted metal-semiconductor field-effect transistors

    Directory of Open Access Journals (Sweden)

    Gorev N. B.

    2007-12-01

    Full Text Available It is shown that the threshold voltage of a GaAs ion-implanted metal-semiconductor field-effect transistor corresponds with a good accuracy to the voltage at which an inflection point appears in the capacitance-voltage characteristic. A method for predicting the threshold voltage of ion-implanted field-effect transistors using capacitance-voltage measurements prior to contact formation is proposed.

  10. Combining axial and radial nanowire heterostructures: radial Esaki diodes and tunnel field-effect transistors.

    Science.gov (United States)

    Dey, Anil W; Svensson, Johannes; Ek, Martin; Lind, Erik; Thelander, Claes; Wernersson, Lars-Erik

    2013-01-01

    The ever-growing demand on high-performance electronics has generated transistors with very impressive figures of merit (Radosavljevic et al., IEEE Int. Devices Meeting 2009, 1-4 and Cho et al., IEEE Int. Devices Meeting 2011, 15.1.1-15.1.4). The continued scaling of the supply voltage of field-effect transistors, such as tunnel field-effect transistors (TFETs), requires the implementation of advanced transistor architectures including FinFETs and nanowire devices. Moreover, integration of novel materials with high electron mobilities, such as III-V semiconductors and graphene, are also being considered to further enhance the device properties (del Alamo, Nature 2011, 479, 317-323, and Liao et al., Nature 2010, 467, 305-308). In nanowire devices, boosting the drive current at a fixed supply voltage or maintaining a constant drive current at a reduced supply voltage may be achieved by increasing the cross-sectional area of a device, however at the cost of deteriorated electrostatics. A gate-all-around nanowire device architecture is the most favorable electrostatic configuration to suppress short channel effects; however, the arrangement of arrays of parallel vertical nanowires to address the drive current predicament will require additional chip area. The use of a core-shell nanowire with a radial heterojunction in a transistor architecture provides an attractive means to address the drive current issue without compromising neither chip area nor device electrostatics. In addition to design advantages of a radial transistor architecture, we in this work illustrate the benefit in terms of drive current per unit chip area and compare the experimental data for axial GaSb/InAs Esaki diodes and TFETs to their radial counterparts and normalize the electrical data to the largest cross-sectional area of the nanowire, i.e. the occupied chip area, assuming a vertical device geometry. Our data on lateral devices show that radial Esaki diodes deliver almost 7 times higher peak

  11. Specifics of Pulsed Arc Welding Power Supply Performance Based On A Transistor Switch

    Science.gov (United States)

    Krampit, N. Yu; Kust, T. S.; Krampit, M. A.

    2016-08-01

    Specifics of designing a pulsed arc welding power supply device are presented in the paper. Electronic components for managing large current was analyzed. Strengths and shortcomings of power supply circuits based on thyristor, bipolar transistor and MOSFET are outlined. As a base unit for pulsed arc welding was chosen MOSFET transistor, which is easy to manage. Measures to protect a transistor are given. As for the transistor control device is a microcontroller Arduino which has a low cost and adequate performance of the work. Bead transfer principle is to change the voltage on the arc in the formation of beads on the wire end. Microcontroller controls transistor when the arc voltage reaches the threshold voltage. Thus there is a separation and transfer of beads without splashing. Control strategies tested on a real device and presented. The error in the operation of the device is less than 25 us, it can be used controlling drop transfer at high frequencies (up to 1300 Hz).

  12. Extended Gate Field-Effect Transistor Biosensors for Point-Of-Care Testing of Uric Acid.

    Science.gov (United States)

    Guan, Weihua; Reed, Mark A

    2017-01-01

    An enzyme-free redox potential sensor using off-chip extended-gate field effect transistor (EGFET) with a ferrocenyl-alkanethiol modified gold electrode has been used to quantify uric acid concentration in human serum and urine. Hexacyanoferrate (II) and (III) ions are used as redox reagent. The potentiometric sensor measures the interface potential on the ferrocene immobilized gold electrode, which is modulated by the redox reaction between uric acid and hexacyanoferrate ions. The device shows a near Nernstian response to uric acid and is highly specific to uric acid in human serum and urine. The interference that comes from glucose, bilirubin, ascorbic acid, and hemoglobin is negligible in the normal concentration range of these interferents. The sensor also exhibits excellent long term reliability and is regenerative. This extended gate field effect transistor based sensor is promising for point-of-care detection of uric acid due to the small size, low cost, and low sample volume consumption.

  13. Plasmon Field Effect Transistor for Plasmon to Electric Conversion and Amplification.

    Science.gov (United States)

    Shokri Kojori, Hossein; Yun, Ju-Hyung; Paik, Younghun; Kim, Joondong; Anderson, Wayne A; Kim, Sung Jin

    2016-01-13

    Direct coupling of electronic excitations of optical energy via plasmon resonances opens the door to improving gain and selectivity in various optoelectronic applications. We report a new device structure and working mechanisms for plasmon resonance energy detection and electric conversion based on a thin film transistor device with a metal nanostructure incorporated in it. This plasmon field effect transistor collects the plasmonically induced hot electrons from the physically isolated metal nanostructures. These hot electrons contribute to the amplification of the drain current. The internal electric field and quantum tunneling effect at the metal-semiconductor junction enable highly efficient hot electron collection and amplification. Combined with the versatility of plasmonic nanostructures in wavelength tunability, this device architecture offers an ultrawide spectral range that can be used in various applications.

  14. Vacuum-processed polyethylene as a dielectric for low operating voltage organic field effect transistors

    Science.gov (United States)

    Kanbur, Yasin; Irimia-Vladu, Mihai; Głowacki, Eric D.; Voss, Gundula; Baumgartner, Melanie; Schwabegger, Günther; Leonat, Lucia; Ullah, Mujeeb; Sarica, Hizir; Erten-Ela, Sule; Schwödiauer, Reinhard; Sitter, Helmut; Küçükyavuz, Zuhal; Bauer, Siegfried; Sariciftci, Niyazi Serdar

    2012-01-01

    We report on the fabrication and performance of vacuum-processed organic field effect transistors utilizing evaporated low-density polyethylene (LD-PE) as a dielectric layer. With C60 as the organic semiconductor, we demonstrate low operating voltage transistors with field effect mobilities in excess of 4 cm2/Vs. Devices with pentacene showed a mobility of 0.16 cm2/Vs. Devices using tyrian Purple as semiconductor show low-voltage ambipolar operation with equal electron and hole mobilities of ∼0.3 cm2/Vs. These devices demonstrate low hysteresis and operational stability over at least several months. Grazing-angle infrared spectroscopy of evaporated thin films shows that the structure of the polyethylene is similar to solution-cast films. We report also on the morphological and dielectric properties of these films. Our experiments demonstrate that polyethylene is a stable dielectric supporting both hole and electron channels. PMID:23483783

  15. Graphene Field Effect Transistor-Based Detectors for Detection of Ionizing Radiation

    International Nuclear Information System (INIS)

    Jovanovic, Igor; Cazalas, Edward; Childres, I.; Patil, A.; Koybasi, O.; Chen, Y-P.

    2013-06-01

    We present the results of our recent efforts to develop novel ionizing radiation sensors based on the nano-material graphene. Graphene used in the field effect transistor architecture could be employed to detect the radiation-induced charge carriers produced in undoped semiconductor absorber substrates, even without the need for charge collection. The detection principle is based on the high sensitivity of graphene to ionization-induced local electric field perturbations in the electrically biased substrate. We experimentally demonstrated promising performance of graphene field effect transistors for detection of visible light, X-rays, gamma-rays, and alpha particles. We propose improved detector architectures which could result in a significant improvement of speed necessary for pulsed mode operation. (authors)

  16. Controlling field-effect mobility in pentacene-based transistors by supersonic molecular-beam deposition

    International Nuclear Information System (INIS)

    Toccoli, T.; Pallaoro, A.; Coppede, N.; Iannotta, S.; De Angelis, F.; Mariucci, L.; Fortunato, G.

    2006-01-01

    We show that pentacene field-effect transistors, fabricated by supersonic molecular beams, have a performance strongly depending on the precursor's kinetic energy (K E ). The major role played by K E is in achieving highly ordered and flat films. In the range K E ≅3.5-6.5 eV, the organic field effect transistor linear mobility increases of a factor ∼5. The highest value (1.0 cm 2 V -1 s -1 ) corresponds to very uniform and flat films (layer-by-layer type growth). The temperature dependence of mobility for films grown at K E >6 eV recalls that of single crystals (bandlike) and shows an opposite trend for films grown at K E ≤5.5 eV

  17. Germanium field-effect transistor made from a high-purity substrate

    International Nuclear Information System (INIS)

    Hansen, W.L.; Goulding, F.S.; Haller, E.E.

    1978-11-01

    Field effect transistors have been fabricated on high-purity germanium substrates using low-temperature technology. The aim of this work is to preserve the low density of trapping centers in high-quality starting material by low-temperature ( 0 C) processing. The use of germanium promises to eliminate some of the traps which cause generation-recombination noise in silicon field-effect transistors (FET's) at low temperatures. Typically, the transconductance (g/sub m/) in the germanium FET's is 10 mA/V and the gate leakage can be less than 10 -12 A. Present devices exhibit a large 1/f noise component and most of this noise must be eliminated if they are to be competitive with silicon FET's commonly used in high-resolution nuclear spectrometers

  18. High-performance molybdenum disulfide field-effect transistors with spin tunnel contacts.

    Science.gov (United States)

    Dankert, André; Langouche, Lennart; Kamalakar, Mutta Venkata; Dash, Saroj Prasad

    2014-01-28

    Molybdenum disulfide has recently emerged as a promising two-dimensional semiconducting material for nanoelectronic, optoelectronic, and spintronic applications. Here, we investigate the field-effect transistor behavior of MoS2 with ferromagnetic contacts to explore its potential for spintronics. In such devices, we elucidate that the presence of a large Schottky barrier resistance at the MoS2/ferromagnet interface is a major obstacle for the electrical spin injection and detection. We circumvent this problem by a reduction in the Schottky barrier height with the introduction of a thin TiO2 tunnel barrier between the ferromagnet and MoS2. This results in an enhancement of the transistor on-state current by 2 orders of magnitude and an increment in the field-effect mobility by a factor of 6. Our magnetoresistance calculation reveals that such integration of ferromagnetic tunnel contacts opens up the possibilities for MoS2-based spintronic devices.

  19. Diketopyrrolopyrrole-diketopyrrolopyrrole-based conjugated copolymer for high-mobility organic field-effect transistors

    KAUST Repository

    Kanimozhi, Catherine K.

    2012-10-10

    In this communication, we report the synthesis of a novel diketopyrrolopyrrole-diketopyrrolopyrrole (DPP-DPP)-based conjugated copolymer and its application in high-mobility organic field-effect transistors. Copolymerization of DPP with DPP yields a copolymer with exceptional properties such as extended absorption characteristics (up to ∼1100 nm) and field-effect electron mobility values of >1 cm 2 V -1 s -1. The synthesis of this novel DPP-DPP copolymer in combination with the demonstration of transistors with extremely high electron mobility makes this work an important step toward a new family of DPP-DPP copolymers for application in the general area of organic optoelectronics. © 2012 American Chemical Society.

  20. An innovative large scale integration of silicon nanowire-based field effect transistors

    Science.gov (United States)

    Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

    2018-05-01

    Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

  1. A Single Polyaniline Nanofiber Field Effect Transistor and Its Gas Sensing Mechanisms

    Science.gov (United States)

    Chen, Dajing; Lei, Sheng; Chen, Yuquan

    2011-01-01

    A single polyaniline nanofiber field effect transistor (FET) gas sensor fabricated by means of electrospinning was investigated to understand its sensing mechanisms and optimize its performance. We studied the morphology, field effect characteristics and gas sensitivity of conductive nanofibers. The fibers showed Schottky and Ohmic contacts based on different electrode materials. Higher applied gate voltage contributes to an increase in gas sensitivity. The nanofiber transistor showed a 7% reversible resistance change to 1 ppm NH3 with 10 V gate voltage. The FET characteristics of the sensor when exposed to different gas concentrations indicate that adsorption of NH3 molecules reduces the carrier mobility in the polyaniline nanofiber. As such, nanofiber-based sensors could be promising for environmental and industrial applications. PMID:22163969

  2. Transport properties of hydrogen passivated silicon nanotubes and silicon nanotube field effect transistors

    KAUST Repository

    Montes Muñoz, Enrique

    2017-01-24

    We investigate the electronic transport properties of silicon nanotubes attached to metallic electrodes from first principles, using density functional theory and the non-equilibrium Green\\'s function method. The influence of the surface termination is studied as well as the dependence of the transport characteristics on the chirality, diameter, and length. Strong electronic coupling between nanotubes and electrodes is found to be a general feature that results in low contact resistance. The conductance in the tunneling regime is discussed in terms of the complex band structure. Silicon nanotube field effect transistors are simulated by applying a uniform potential gate. Our results demonstrate very high values of transconductance, outperforming the best commercial silicon field effect transistors, combined with low values of sub-threshold swing.

  3. In vivo dosimetry in radio-surgery using MOSFET and micro MOSFET

    International Nuclear Information System (INIS)

    Sors, Aurelie

    2010-01-01

    The author reports a study which aimed at assessing MOSFETs and micro-MOSFETs as in vivo surface dosimeters in 6 MV radio-surgery fixed beams for minimum field sizes of 6 x 6 square millimetres. The developed calibration method is adapted to small beams and MOSFET technology. It allows a reduced number of measurements to perform calibration. Moreover, a new equivalent square formula increases the accuracy of the determination of the actual dose delivered in small beams. Obtained results show that MOSFETs and micro-MOSFETs can be used as in vivo dosimeters when located at the surface

  4. Radiation resistance of wide-bandgap semiconductor power transistors

    Energy Technology Data Exchange (ETDEWEB)

    Hazdra, Pavel; Popelka, Stanislav [Department of Microelectronics, Czech Technical University in Prague (Czech Republic)

    2017-04-15

    Radiation resistance of state-of-the-art commercial wide-bandgap power transistors, 1700 V 4H-SiC power MOSFETs and 200 V GaN HEMTs, to the total ionization dose was investigated. Transistors were irradiated with 4.5 MeV electrons with doses up to 2000 kGy. Electrical characteristics and introduced defects were characterized by current-voltage (I-V), capacitance-voltage (C-V), and deep level transient spectroscopy (DLTS) measurements. Results show that already low doses of 4.5 MeV electrons (>1 kGy) cause a significant decrease in threshold voltage of SiC MOSFETs due to embedding of the positive charge into the gate oxide. On the other hand, other parameters like the ON-state resistance are nearly unchanged up to the dose of 20 kGy. At 200 kGy, the threshold voltage returns back close to its original value, however, the ON-state resistance increases and transconductance is lowered. This effect is caused by radiation defects introduced into the low-doped drift region which decrease electron concentration and mobility. GaN HEMTs exhibit significantly higher radiation resistance. They keep within the datasheet specification up to doses of 2000 kGy. Absence of dielectric layer beneath the gate and high concentration of carriers in the two dimensional electron gas channel are the reasons of higher radiation resistance of GaN HEMTs. Their degradation then occurs at much higher doses due to electron mobility degradation. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  5. Radiation resistance of wide-bandgap semiconductor power transistors

    International Nuclear Information System (INIS)

    Hazdra, Pavel; Popelka, Stanislav

    2017-01-01

    Radiation resistance of state-of-the-art commercial wide-bandgap power transistors, 1700 V 4H-SiC power MOSFETs and 200 V GaN HEMTs, to the total ionization dose was investigated. Transistors were irradiated with 4.5 MeV electrons with doses up to 2000 kGy. Electrical characteristics and introduced defects were characterized by current-voltage (I-V), capacitance-voltage (C-V), and deep level transient spectroscopy (DLTS) measurements. Results show that already low doses of 4.5 MeV electrons (>1 kGy) cause a significant decrease in threshold voltage of SiC MOSFETs due to embedding of the positive charge into the gate oxide. On the other hand, other parameters like the ON-state resistance are nearly unchanged up to the dose of 20 kGy. At 200 kGy, the threshold voltage returns back close to its original value, however, the ON-state resistance increases and transconductance is lowered. This effect is caused by radiation defects introduced into the low-doped drift region which decrease electron concentration and mobility. GaN HEMTs exhibit significantly higher radiation resistance. They keep within the datasheet specification up to doses of 2000 kGy. Absence of dielectric layer beneath the gate and high concentration of carriers in the two dimensional electron gas channel are the reasons of higher radiation resistance of GaN HEMTs. Their degradation then occurs at much higher doses due to electron mobility degradation. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  6. A subthermionic tunnel field-effect transistor with an atomically thin channel.

    Science.gov (United States)

    Sarkar, Deblina; Xie, Xuejun; Liu, Wei; Cao, Wei; Kang, Jiahao; Gong, Yongji; Kraemer, Stephan; Ajayan, Pulickel M; Banerjee, Kaustav

    2015-10-01

    The fast growth of information technology has been sustained by continuous scaling down of the silicon-based metal-oxide field-effect transistor. However, such technology faces two major challenges to further scaling. First, the device electrostatics (the ability of the transistor's gate electrode to control its channel potential) are degraded when the channel length is decreased, using conventional bulk materials such as silicon as the channel. Recently, two-dimensional semiconducting materials have emerged as promising candidates to replace silicon, as they can maintain excellent device electrostatics even at much reduced channel lengths. The second, more severe, challenge is that the supply voltage can no longer be scaled down by the same factor as the transistor dimensions because of the fundamental thermionic limitation of the steepness of turn-on characteristics, or subthreshold swing. To enable scaling to continue without a power penalty, a different transistor mechanism is required to obtain subthermionic subthreshold swing, such as band-to-band tunnelling. Here we demonstrate band-to-band tunnel field-effect transistors (tunnel-FETs), based on a two-dimensional semiconductor, that exhibit steep turn-on; subthreshold swing is a minimum of 3.9 millivolts per decade and an average of 31.1 millivolts per decade for four decades of drain current at room temperature. By using highly doped germanium as the source and atomically thin molybdenum disulfide as the channel, a vertical heterostructure is built with excellent electrostatics, a strain-free heterointerface, a low tunnelling barrier, and a large tunnelling area. Our atomically thin and layered semiconducting-channel tunnel-FET (ATLAS-TFET) is the only planar architecture tunnel-FET to achieve subthermionic subthreshold swing over four decades of drain current, as recommended in ref. 17, and is also the only tunnel-FET (in any architecture) to achieve this at a low power-supply voltage of 0.1 volts. Our

  7. Towards Prognostics of Power MOSFETs: Accelerated Aging and Precursors of Failure

    Data.gov (United States)

    National Aeronautics and Space Administration — This paper presents research results dealing with power MOSFETs (metal oxide semiconductor field effect tran- sistor) within the prognostics and health management of...

  8. Organic Field Effect Transistors with Dipole-Polarized Polymer Gate Dielectrics for Control of Threshold Voltage

    OpenAIRE

    Sakai, Heisuke; Takahashi, Yoshikazu; Murata, Hideyuki

    2007-01-01

    The authors demonstrate organic field effect transistors (OFETs) with a dipole-polarized polyurea for the gate dielectrics. In the dielectrics, the internal electric field induces the mobile charge carrier in the semiconductor layer to the semiconductor-dielectric interface. OFETs with dipole-polarized gate dielectrics exhibit lower threshold voltage. With nonpolarized gate dielectrics, the threshold voltage was -11.4 V, whereas that decreased to -5.3 V with polarized gate dielectrics. In a...

  9. Charge carrier transport in polycrystalline organic thin film based field effect transistors

    Science.gov (United States)

    Rani, Varsha; Sharma, Akanksha; Ghosh, Subhasis

    2016-05-01

    The charge carrier transport mechanism in polycrystalline thin film based organic field effect transistors (OFETs) has been explained using two competing models, multiple trapping and releases (MTR) model and percolation model. It has been shown that MTR model is most suitable for explaining charge carrier transport in grainy polycrystalline organic thin films. The energetic distribution of traps determined independently using Mayer-Neldel rule (MNR) is in excellent agreement with the values obtained by MTR model for copper phthalocyanine and pentacene based OFETs.

  10. Organic Field Effect Transistors Based on Graphene and Hexagonal Boron Nitride Heterostructures

    OpenAIRE

    Kang, Seok Ju; Lee, Gwan-Hyoung; Yu, Young-Jun; Zhao, Yue; Kim, Bumjung; Watanabe, Kenji; Taniguchi, Takashi; Hone, James; Kim, Philip; Nuckolls, Colin

    2014-01-01

    Enhancing the device performance of single crystal organic field effect transistors (OFETs) requires both optimized engineering of efficient injection of the carriers through the contact and improvement of the dielectric interface for reduction of traps and scattering centers. Since the accumulation and flow of charge carriers in operating organic FETs takes place in the first few layers of the semiconductor next to the dielectric, the mobility can be easily degraded by surface roughness, cha...

  11. Organic phthalocyanine films with high mobilities for efficient field-effect transistor switches

    Czech Academy of Sciences Publication Activity Database

    Schauer, F.; Zhivkov, I.; Nešpůrek, Stanislav

    266-269, 1-3 (2000), s. 999-1003 ISSN 0022-3093. [International Conference on Amorphous and Microcrystalline Semiconductors /18./. Snowbird, 23.08.1999-27.08.1999] R&D Projects: GA MŠk OC 518.10; GA AV ČR KSK2050602 Institutional research plan: CEZ:AV0Z4050913 Keywords : phthalocyanine * charge mobility * field-effect transistor Subject RIV: CD - Macromolecular Chemistry Impact factor: 1.269, year: 2000

  12. Gate-induced carrier delocalization in quantum dot field effect transistors.

    Science.gov (United States)

    Turk, Michael E; Choi, Ji-Hyuk; Oh, Soong Ju; Fafarman, Aaron T; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R; Kikkawa, James M

    2014-10-08

    We study gate-controlled, low-temperature resistance and magnetotransport in indium-doped CdSe quantum dot field effect transistors. We show that using the gate to accumulate electrons in the quantum dot channel increases the "localization product" (localization length times dielectric constant) describing transport at the Fermi level, as expected for Fermi level changes near a mobility edge. Our measurements suggest that the localization length increases to significantly greater than the quantum dot diameter.

  13. Direct-current amplifier using a field effect transistor as entrance element

    International Nuclear Information System (INIS)

    Quenee, R.; Vaux, Ch.

    1967-01-01

    The difficulties associated with the construction of amplifier for small direct-currents using presently available semi-conductors are first pointed out. A detailed description is given of an amplifier with direct connections making use of a MOS-type field-effect transistor, and average characteristics for six amplifiers are then presented. The various causes of drift and their corrections are analyzed in the appendix, as well as the possibilities of measuring very small currents. (authors) [fr

  14. Atomic-Monolayer MoS2 Band-to-Band Tunneling Field-Effect Transistor

    KAUST Repository

    Lan, Yann Wen

    2016-09-05

    The experimental observation of band-to-band tunneling in novel tunneling field-effect transistors utilizing a monolayer of MoS2 as the conducting channel is demonstrated. Our results indicate that the strong gate-coupling efficiency enabled by two-dimensional materials, such as monolayer MoS2, results in the direct manifestation of a band-to-band tunneling current and an ambipolar transport.

  15. Experimental DC extraction of the thermal resistance of bipolar transistors taking into account the Early effect

    Science.gov (United States)

    d'Alessandro, Vincenzo

    2017-01-01

    This paper presents three methods to experimentally extract the thermal resistance of bipolar transistors taking into account the Early effect. The approaches are improved variants of recently-proposed techniques relying on common-base DC measurements. The accuracy is numerically verified by making use of a compact model calibrated on I-V characteristics of state-of-the-art SOG BJTs and SiGe:C HBTs.

  16. Incorporating TCNQ into thiophene-fused heptacene for n-channel field effect transistor

    KAUST Repository

    Ye, Qun

    2012-06-01

    Incorporation of electron-deficient tetracyanoquinodimethane (TCNQ) into electron-rich thiophene-fused heptacene was successfully achieved for the purpose of stabilizing longer acenes and generating new n-type organic semiconductors. The heptacene-TCNQ derivative 1 was found to have good stability and an expected electron transporting property. Electron mobility up to 0.01 cm 2 V -1 s -1 has been obtained for this novel material in solution processed organic field effect transistors. © 2012 American Chemical Society.

  17. Ferroelectric-Driven Performance Enhancement of Graphene Field-Effect Transistors Based on Vertical Tunneling Heterostructures.

    Science.gov (United States)

    Yuan, Shuoguo; Yang, Zhibin; Xie, Chao; Yan, Feng; Dai, Jiyan; Lau, Shu Ping; Chan, Helen L W; Hao, Jianhua

    2016-12-01

    A vertical graphene heterostructure field-effect transistor (VGHFET) using an ultrathin ferroelectric film as a tunnel barrier is developed. The heterostructure is capable of providing new degrees of tunability and functionality via coupling between the ferroelectricity and the tunnel current of the VGHFET, which results in a high-performance device. The results pave the way for developing novel atomic-scale 2D heterostructures and devices. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  18. Experimental Observation of Quantum Confinement Effect in and Silicon Nanowire Field-Effect Transistors and Single-Electron/Hole Transistors Operating at Room Temperature

    Science.gov (United States)

    Suzuki, Ryota; Nozue, Motoki; Saraya, Takuya; Hiramoto, Toshiro

    2013-10-01

    The quantum confinement effect (QCE) in ultranarrow silicon nanowire channel field-effect transistors (FETs) as well as single-electron/hole transistors (SET/SHTs) operating at room temperature is intensively investigated for the optimization of device design and fabrication. By adopting a “shared channel” structure with the directions of and , a carrier-dependent QCE is systematically examined. It is found that nanowire pFETs exhibit a smaller threshold voltage (Vth) variability due to a weaker QCE, while nFETs and n/pFETs show comparable Vth variabilities coming from the QCE. It is also found that only SETs exhibit clear Coulomb oscillations in the case of the channel, suggesting the formation of higher tunnel barriers than SHTs. On the other hand, SHTs show undesirable multidot behavior in spite of their comparable QCEs for electrons and holes. It is concluded that -directed nanowire channel SETs and n/pFETs are suitable for the integration of CMOS and SETs.

  19. Effect of Coulomb scattering from trapped charges on the mobility in an organic field-effect transistor

    NARCIS (Netherlands)

    Sharma, A.; Janssen, N.M.A.; Matthijssen, S.J.G.; de Leeuw, D.M.; Kemerink, M.; Bobbert, P.A.

    2011-01-01

    We investigate the effect of Coulomb scattering from trapped charges on the mobility in the two-dimensional channel of an organic field-effect transistor. The number of trapped charges can be tuned by applying a prolonged gate bias. Surprisingly, after increasing the number of trapped charges to a

  20. Robust thresholdlike effect of internal noise on stochastic resonance in an organic field-effect transistor

    Science.gov (United States)

    Suzuki, Yoshiharu; Asakawa, Naoki

    2018-01-01

    The application of noise to a nonlinear system can have the effect of increasing the signal transmission of the system through the phenomenon of stochastic resonance (SR). This paper presents an analytical characterization of the dependence of the signal transmission performance of an organic field-effect transistor (OFET) on external noise. Similarly to the threshold of a nonlinear system, the additive internal noise of the system can be used to control the emergence of SR. Internal noise or the addition of random numbers to the system enables one to observe the SR phenomenon in an OFET under an intrinsically nonresonant condition. Internal noise plays a thresholdlike role, but it functions in a different manner. The fluctuations in performance due to external noise become smaller when the effect of internal noise becomes dominant compared with that of the threshold. In conclusion, it is found that internal noise plays a robust thresholdlike role with respect to variations in external noise intensity.

  1. High I on/I off current ratio graphene field effect transistor: the role of line defect.

    Science.gov (United States)

    Tajarrod, Mohammad Hadi; Saghai, Hassan Rasooli

    2015-01-01

    The present paper casts light upon the performance of an armchair graphene nanoribbon (AGNR) field effect transistor in the presence of one-dimensional topological defects. The defects containing 5-8-5 sp(2)-hybridized carbon rings were placed in a perfect graphene sheet. The atomic scale behavior of the transistor was investigated in the non-equilibrium Green's function (NEGF) and tight-binding Hamiltonian frameworks. AGNRFET basic terms such as the on/off current, transconductance and subthreshold swing were investigated along with the extended line defect (ELD). The results indicated that the presence of ELDs had a significant effect on the parameters of the GNRFET. Compared to conventional transistors, the increase of the I on/I off ratio in graphene transistors with ELDs enhances their applicability in digital devices.

  2. Extraction of mobility and Degradation coefficients in double gate junctionless transistors

    Science.gov (United States)

    Bhuvaneshwari, Y. V.; Kranti, Abhinav

    2017-12-01

    In this work, we use the modified McLarty function to understand and extract accumulation (μ acc) and bulk (μ bulk) mobility in Double Gate (DG) Junctionless (JL) MOSFETs over a wide range of doping concentration (N d) and temperature range (250 K to 520 K). The approach enables the estimation of mobility and its attenuation factors (θ 1 and θ 2) by a single method. The extracted results indicate that μ acc can reach higher values than μ bulk due to the screening effect. Results also show that θ 2 extracted in the accumulation regime of JL transistors exhibit relatively low values in comparison to inversion and accumulation mode devices. It is shown that the attenuation factor (θ 1) in JL devices designed with higher N d (≥1019 cm‑3) is mainly affected by series resistance (R sd) whereas, in inversion mode (IM) and Accumulation mode (AM) devices, θ 1 factor is governed by both the intrinsic mobility reduction factor (θ 10) and R sd. Additionally, the impact of variation in oxide thickness (T ox), gate length (L g), N d and temperature on θ 1 and θ 2 has been investigated for JL transistor. The weak dependence of μ bulk and μ acc on temperature shows the prevalence of coulomb scattering over phonon scattering for heavily doped JL transistors. The work provides insights into different modes of operation, extraction of mobility and attenuation factors which will be useful for the development of compact models for JL transistors.

  3. Multiscale modeling of nanowire-based Schottky-barrier field-effect transistors for sensor applications

    International Nuclear Information System (INIS)

    Nozaki, D; Kunstmann, J; Zoergiebel, F; Cuniberti, G; Weber, W M; Mikolajick, T

    2011-01-01

    We present a theoretical framework for the calculation of charge transport through nanowire-based Schottky-barrier field-effect transistors that is conceptually simple but still captures the relevant physical mechanisms of the transport process. Our approach combines two approaches on different length scales: (1) the finite element method is used to model realistic device geometries and to calculate the electrostatic potential across the Schottky barrier by solving the Poisson equation, and (2) the Landauer-Buettiker approach combined with the method of non-equilibrium Green's functions is employed to calculate the charge transport through the device. Our model correctly reproduces typical I-V characteristics of field-effect transistors, and the dependence of the saturated drain current on the gate field and the device geometry are in good agreement with experiments. Our approach is suitable for one-dimensional Schottky-barrier field-effect transistors of arbitrary device geometry and it is intended to be a simulation platform for the development of nanowire-based sensors.

  4. Novel field-effect schottky barrier transistors based on graphene-MoS 2 heterojunctions

    KAUST Repository

    Tian, He

    2014-08-11

    Recently, two-dimensional materials such as molybdenum disulphide (MoS 2) have been demonstrated to realize field effect transistors (FET) with a large current on-off ratio. However, the carrier mobility in backgate MoS2 FET is rather low (typically 0.5-20 cm2/V.s). Here, we report a novel field-effect Schottky barrier transistors (FESBT) based on graphene-MoS2 heterojunction (GMH), where the characteristics of high mobility from graphene and high on-off ratio from MoS2 are properly balanced in the novel transistors. Large modulation on the device current (on/off ratio of 105) is achieved by adjusting the backgate (through 300 nm SiO2) voltage to modulate the graphene-MoS2 Schottky barrier. Moreover, the field effective mobility of the FESBT is up to 58.7 cm2/V.s. Our theoretical analysis shows that if the thickness of oxide is further reduced, a subthreshold swing (SS) of 40 mV/decade can be maintained within three orders of drain current at room temperature. This provides an opportunity to overcome the limitation of 60 mV/decade for conventional CMOS devices. The FESBT implemented with a high on-off ratio, a relatively high mobility and a low subthreshold promises low-voltage and low-power applications for future electronics.

  5. Gate-Sensing Coherent Charge Oscillations in a Silicon Field-Effect Transistor.

    Science.gov (United States)

    Gonzalez-Zalba, M Fernando; Shevchenko, Sergey N; Barraud, Sylvain; Johansson, J Robert; Ferguson, Andrew J; Nori, Franco; Betz, Andreas C

    2016-03-09

    Quantum mechanical effects induced by the miniaturization of complementary metal-oxide-semiconductor (CMOS) technology hamper the performance and scalability prospects of field-effect transistors. However, those quantum effects, such as tunneling and coherence, can be harnessed to use existing CMOS technology for quantum information processing. Here, we report the observation of coherent charge oscillations in a double quantum dot formed in a silicon nanowire transistor detected via its dispersive interaction with a radio frequency resonant circuit coupled via the gate. Differential capacitance changes at the interdot charge transitions allow us to monitor the state of the system in the strong-driving regime where we observe the emergence of Landau-Zener-Stückelberg-Majorana interference on the phase response of the resonator. A theoretical analysis of the dispersive signal demonstrates that quantum and tunneling capacitance changes must be included to describe the qubit-resonator interaction. Furthermore, a Fourier analysis of the interference pattern reveals a charge coherence time, T2 ≈ 100 ps. Our results demonstrate charge coherent control and readout in a simple silicon transistor and open up the possibility to implement charge and spin qubits in existing CMOS technology.

  6. Tunable SnSe2/WSe2Heterostructure Tunneling Field Effect Transistor.

    Science.gov (United States)

    Yan, Xiao; Liu, Chunsen; Li, Chao; Bao, Wenzhong; Ding, Shijin; Zhang, David Wei; Zhou, Peng

    2017-09-01

    The burgeoning 2D semiconductors can maintain excellent device electrostatics with an ultranarrow channel length and can realize tunneling by electrostatic gating to avoid deprivation of band-edge sharpness resulting from chemical doping, which make them perfect candidates for tunneling field effect transistors. Here this study presents SnSe 2 /WSe 2 van der Waals heterostructures with SnSe 2 as the p-layer and WSe 2 as the n-layer. The energy band alignment changes from a staggered gap band offset (type-II) to a broken gap (type-III) when changing the negative back-gate voltage to positive, resulting in the device operating as a rectifier diode (rectification ratio ~10 4 ) or an n-type tunneling field effect transistor, respectively. A steep average subthreshold swing of 80 mV dec -1 for exceeding two decades of drain current with a minimum of 37 mV dec -1 at room temperature is observed, and an evident trend toward negative differential resistance is also accomplished for the tunneling field effect transistor due to the high gate efficiency of 0.36 for single gate devices. The I ON /I OFF ratio of the transfer characteristics is >10 6 , accompanying a high ON current >10 -5 A. This work presents original phenomena of multilayer 2D van der Waals heterostructures which can be applied to low-power consumption devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. Coupling between electrolyte and organic semiconductor in electrolyte-gated organic field effect transistors (Conference Presentation)

    Science.gov (United States)

    Biscarini, Fabio; Di Lauro, Michele; Berto, Marcello; Bortolotti, Carlo A.; Geerts, Yves H.; Vuillaume, Dominique

    2016-11-01

    Organic field effect transistors (OFET) operated in aqueous environments are emerging as ultra-sensitive biosensors and transducers of electrical and electrochemical signals from a biological environment. Their applications range from detection of biomarkers in bodily fluids to implants for bidirectional communication with the central nervous system. They can be used in diagnostics, advanced treatments and theranostics. Several OFET layouts have been demonstrated to be effective in aqueous operations, which are distinguished either by their architecture or by the respective mechanism of doping by the ions in the electrolyte solution. In this work we discuss the unification of the seemingly different architectures, such as electrolyte-gated OFET (EGOFET), organic electrochemical transistor (OECT) and dual-gate ion-sensing FET. We first demonstrate that these architectures give rise to the frequency-dependent response of a synapstor (synapse-like transistor), with enhanced or depressed modulation of the output current depending on the frequency of the time-dependent gate voltage. This behavior that was reported for OFETs with embedded metal nanoparticles shows the existence of a capacitive coupling through an equivalent network of RC elements. Upon the systematic change of ions in the electrolyte and the morphology of the charge transport layer, we show how the time scale of the synapstor is changed. We finally show how the substrate plays effectively the role of a second bottom gate, whose potential is actually fixed by the pH/composition of the electrolyte and the gate voltage applied.

  8. Nanopore extended field-effect transistor for selective single-molecule biosensing.

    Science.gov (United States)

    Ren, Ren; Zhang, Yanjun; Nadappuram, Binoy Paulose; Akpinar, Bernice; Klenerman, David; Ivanov, Aleksandar P; Edel, Joshua B; Korchev, Yuri

    2017-09-19

    There has been a significant drive to deliver nanotechnological solutions to biosensing, yet there remains an unmet need in the development of biosensors that are affordable, integrated, fast, capable of multiplexed detection, and offer high selectivity for trace analyte detection in biological fluids. Herein, some of these challenges are addressed by designing a new class of nanoscale sensors dubbed nanopore extended field-effect transistor (nexFET) that combine the advantages of nanopore single-molecule sensing, field-effect transistors, and recognition chemistry. We report on a polypyrrole functionalized nexFET, with controllable gate voltage that can be used to switch on/off, and slow down single-molecule DNA transport through a nanopore. This strategy enables higher molecular throughput, enhanced signal-to-noise, and even heightened selectivity via functionalization with an embedded receptor. This is shown for selective sensing of an anti-insulin antibody in the presence of its IgG isotype.Efficient detection of single molecules is vital to many biosensing technologies, which require analytical platforms with high selectivity and sensitivity. Ren et al. combine a nanopore sensor and a field-effect transistor, whereby gate voltage mediates DNA and protein transport through the nanopore.

  9. Modeling of pH Dependent Electrochemical Noise in Ion Sensitive Field Effect Transistors ISFET

    Directory of Open Access Journals (Sweden)

    M. P. Das

    2013-02-01

    Full Text Available pH ISFETs are very important sensor for in vivo continuous monitoring application of physiological and environmental system. The accuracy of Ion Sensitive Field Effect Transistor (ISFET output measurement is greatly affected by the presences of noise, drift and slow response of the device. Although the noise analysis of ISFET so far performed in different literature relates only to sources originated from Field Effect Transistor (FET structure which are almost constant for a particular device, the pH dependent electrochemical noise has not been substantially explored and analyzed. In this paper we have investigated the low frequency pH dependent electrochemical noise that originates from the ionic conductance of the electrode-electrolyte-Field Effect Transistor structure of the device and that the noise depends on the concentration of the electrolyte and 1/f in nature. The statistical and frequency analysis of this electrochemical noise of a commercial ISFET sensor, under room temperature has been performed for six different pH values ranging from pH2 to pH9.2. We have also proposed a concentration dependent a/f & b/f2 model of the noise with different values of the coefficients a, b.

  10. Investigations on field-effect transistors based on two-dimensional materials

    Energy Technology Data Exchange (ETDEWEB)

    Finge, T.; Riederer, F.; Grap, T.; Knoch, J. [Institute of Semiconductor Electronics, RWTH Aachen University (Germany); Mueller, M.R. [Institute of Semiconductor Electronics, RWTH Aachen University (Germany); Infineon Technologies, Villach (Austria); Kallis, K. [Intelligent Microsystems Chair, TU Dortmund University (Germany)

    2017-11-15

    In the present article, experimental and theoretical investigations regarding field-effect transistors based on two-dimensional (2D) materials are presented. First, the properties of contacts between a metal and 2D material are discussed. To this end, metal-to-graphene contacts as well to transition metal dichalcogenides (TMD) are studied. Whereas metal-graphene contacts can be tuned with an appropriate back-gate, metal-TMD contacts exhibit strong Fermi level pinning showing substantially limited maximum possible drive current. Next, tungsten diselenide (WSe{sub 2}) field-effect transistors are presented. Employing buried-triple-gate substrates allows tuning source, channel and drain by applying appropriate gate voltages so that the device can be reconfigured to work as n-type, p-type and as so-called band-to-band tunnel field-effect transistor on the same WSe{sub 2} flake. (copyright 2017 by WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  11. The Positive Effects of Hydrophobic Fluoropolymers on the Electrical Properties of MoS2 Transistors

    Directory of Open Access Journals (Sweden)

    Somayyeh Rahimi

    2016-08-01

    Full Text Available We report the improvement of the electrical performance of field effect transistors (FETs fabricated on monolayer chemical vapor deposited (CVD MoS2, by applying an interacting fluoropolymer capping layer (Teflon-AF. The electrical characterizations of more than 60 FETs, after applying Teflon-AF cap, show significant improvement of the device properties and reduced device to device variation. The improvement includes: 50% reduction of the average gate hysteresis, 30% reduction of the subthreshold swing and about an order of magnitude increase of the current on-off ratio. These favorable changes in device performance are attributed to the reduced exposure of MoS2 channels to the adsorbates in the ambient which can be explained by the polar nature of Teflon-AF cap. A positive shift in the threshold voltage of all the measured FETs is observed, which translates to the more desirable enhancement mode transistor characteristics.

  12. Characterisation of organic field-effect transistors using metal phthalocyanines as active layers

    Energy Technology Data Exchange (ETDEWEB)

    Korodi, Iulia G.; Lehmann, Daniel; Zahn, Dietrich R.T. [Semiconductor Physics, Chemnitz University of Technology, 09107 Chemnitz (Germany); Tippo, Tossapol [Faculty of Engineering and College of Data Storage Technology and Applications, King Mongkut' s Institute of Technology Ladkrabang, Ladkrabang Bangkok 10520 (Thailand); Hietschold, Michael [Solid Surface Analysis Physics, Chemnitz University of Technology, 09107 Chemnitz (Germany)

    2010-02-15

    In this work the performance of organic field-effect transistors (OFETs) using copper phthalocyanine (CuPc) and titanyl phthalocyanine (TiOPc) as active layers is compared. Current/voltage measurements were first performed in vacuum and later under ambient conditions. The highest hole mobility {mu}{sub vac} = (1.5 {+-} 0.6) x 10{sup -3} cm{sup 2}/Vs was obtained for the CuPc OFETs. The mobility remained constant within the error bar after exposing the OFETs to atmosphere ({mu}{sub atm} = (1.2 {+-} 0.2) x 10{sup -3} cm{sup 2}/Vs). For the TiOPc transistors a hole mobility of {mu}{sub vac} = (7.2 {+-} 4.0) x 10{sup -5} cm{sup 2}/Vs was found in vacuum. (copyright 2010 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  13. Studies on different configurations of cobalt phthalocyanine based flexible organic field effect transistor

    Science.gov (United States)

    Kumar, A.; Jha, P.; Samanta, S.; Singh, A.; Debnath, A. K.; Aswal, D. K.; Gupta, S. K.

    2016-05-01

    Organic Field Effect Transistors (OFETs) are being investigated for a number of low-cost, large area applications; particularly those that are compatible with flexible plastic substrates. Development of low temperature processes can make way for OFETs to be integrated on flexible plastic substrates. Here we have made systematic studies on OFETs in different configurations wherein we have chosen Cobalt Phthalocyanine (CoPc) as active material. We have found the best mobility (1.86 × 10-5 cm2/V-s) in Bottom Gate Top Contact configuration. However, threshold voltage (-5V) and On off ratio (62)were found to be better in Top Gate Bottom Contact configuration The electromechanical properties of the Bottom Gate Top Contact transistors were studied by measuring the transfer characteristics of the devices in bend condition and thereby calculating mobility under different radii of bending. No significant change in the mobility of the device was observed under bent conditions.

  14. Removing the current-limit of vertical organic field effect transistors

    Science.gov (United States)

    Sheleg, Gil; Greenman, Michael; Lussem, Bjorn; Tessler, Nir

    2017-11-01

    The reported Vertical Organic Field Effect Transistors (VOFETs) show either superior current and switching speeds or well-behaved transistor performance, especially saturation in the output characteristics. Through the study of the relationship between the device architecture or dimensions and the device performance, we find that achieving a saturation regime in the output characteristics requires that the device operates in the injection limited regime. In current structures, the existence of the injection limited regime depends on the source's injection barrier as well as on the buried semiconductor layer thickness. To overcome the injection limit imposed by the necessity of injection barrier, we suggest a new architecture to realize VOFETs. This architecture shows better gate control and is independent of the injection barrier at the source, thus allowing for several A cm-2 for a semiconductor having a mobility value of 0.1 cm2 V-1 s-1.

  15. Tunnel field-effect transistor using InAs nanowire/Si heterojunction

    Science.gov (United States)

    Tomioka, Katsuhiro; Fukui, Takashi

    2011-02-01

    We report on fabrication of tunnel field-effect transistor with III-V nanowire (NW)/Si heterojunction and surrounding-gate structure. The device fabricated by selective-area growth of an n+-InAs/undoped-InAs axial NW on a p+-Si(111) substrate showed switching behavior with an average subthreshold slope (SS) of 104 mV/dec under reverse bias condition. The switching behavior appeared under small supply voltage (Vds=50 mV). Transmission electron microscopy revealed misfit dislocation formed at the interface degraded the SS and ON-state current. Coherent growth without misfit dislocations would promise realization of steep-slope transistor with a SS of <60 mV/dec.

  16. Si/Ge hetero-structure nanotube tunnel field effect transistor

    Science.gov (United States)

    Hanna, A. N.; Hussain, M. M.

    2015-01-01

    We discuss the physics of conventional channel material (silicon/germanium hetero-structure) based transistor topology mainly core/shell (inner/outer) gated nanotube vs. gate-all-around nanowire architecture for tunnel field effect transistor application. We show that nanotube topology can result in higher performance through higher normalized current when compared to nanowire architecture at Vdd = 1 V due to the availability of larger tunneling cross section and lower Shockley-Reed-Hall recombination. Both architectures are able to achieve sub 60 mV/dec performance for more than five orders of magnitude of drain current. This enables the nanotube configuration achieving performance same as the nanowire architecture even when Vdd is scaled down to 0.5 V.

  17. Radiation and Thermal Cycling Effects on EPC1001 Gallium Nitride Power Transistors

    Science.gov (United States)

    Patterson, Richard L.; Scheick, Leif Z.; Lauenstein, Jean M.; Casey, Megan C.; Hammoud, Ahmad

    2012-01-01

    Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These include radiation, extreme temperatures, and thermal cycling, to name a few. Information pertaining to performance of electronic parts and systems under hostile environments is very scarce, especially for new devices. Such data is very critical so that proper design is implemented in order to ensure mission success and to mitigate risks associated with exposure of on-board systems to the operational environment. In this work, newly-developed enhancement-mode field effect transistors (FET) based on gallium nitride (GaN) technology were exposed to various particles of ionizing radiation and to long-term thermal cycling over a wide temperature range. Data obtained on control (un-irradiated) and irradiated samples of these power transistors are presented and the results are discussed.

  18. Integrating carbon nanotubes into silicon by means of vertical carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi

    2014-01-01

    Single-walled carbon nanotubes have been integrated into silicon for use in vertical carbon nanotube field-effect transistors (CNTFETs). A unique feature of these devices is that a silicon substrate and a metal contact are used as the source and drain for the vertical transistors, respectively. These CNTFETs show very different characteristics from those fabricated with two metal contacts. Surprisingly, the transfer characteristics of the vertical CNTFETs can be either ambipolar or unipolar (p-type or n-type) depending on the sign of the drain voltage. Furthermore, the p-type/n-type character of the devices is defined by the doping type of the silicon substrate used in the fabrication process. A semiclassical model is used to simulate the performance of these CNTFETs by taking the conductance change of the Si contact under the gate voltage into consideration. The calculation results are consistent with the experimental observations. This journal is © the Partner Organisations 2014.

  19. Molecular design and ordering effects in π-functional materials for transistor and solar cell applications

    KAUST Repository

    Beaujuge, Pierre

    2011-12-21

    Organic electronics are broadly anticipated to impact the development of flexible thin-film device technologies. Among these, solution-processable π-conjugated polymers and small molecules are proving particularly promising in field-effect transistors and bulk heterojunction solar cells. This Perspective analyzes some of the most exciting strategies recently suggested in the design and structural organization of π-functional materials for transistor and solar cell applications. Emphasis is placed on the interplay between molecular structure, self-assembling properties, nanoscale and mesoscale ordering, and device efficiency parameters. A critical look at the various approaches used to optimize both materials and device performance is provided to assist in the identification of new directions and further advances. © 2011 American Chemical Society.

  20. Dithiopheneindenofluorene (TIF) Semiconducting Polymers with Very High Mobility in Field-Effect Transistors

    KAUST Repository

    Chen, Hu

    2017-07-19

    The charge-carrier mobility of organic semiconducting polymers is known to be enhanced when the energetic disorder of the polymer is minimized. Fused, planar aromatic ring structures contribute to reducing the polymer conformational disorder, as demonstrated by polymers containing the indacenodithiophene (IDT) repeat unit, which have both a low Urbach energy and a high mobility in thin-film-transistor (TFT) devices. Expanding on this design motif, copolymers containing the dithiopheneindenofluorene repeat unit are synthesized, which extends the fused aromatic structure with two additional phenyl rings, further rigidifying the polymer backbone. A range of copolymers are prepared and their electrical properties and thin-film morphology evaluated, with the co-benzothiadiazole polymer having a twofold increase in hole mobility when compared to the IDT analog, reaching values of almost 3 cm2 V−1 s−1 in bottom-gate top-contact organic field-effect transistors.

  1. Si/Ge hetero-structure nanotube tunnel field effect transistor

    KAUST Repository

    Hanna, A. N.

    2015-01-07

    We discuss the physics of conventional channel material (silicon/germanium hetero-structure) based transistor topology mainly core/shell (inner/outer) gated nanotube vs. gate-all-around nanowire architecture for tunnel field effect transistor application. We show that nanotube topology can result in higher performance through higher normalized current when compared to nanowire architecture at Vdd-=-1-V due to the availability of larger tunneling cross section and lower Shockley-Reed-Hall recombination. Both architectures are able to achieve sub 60-mV/dec performance for more than five orders of magnitude of drain current. This enables the nanotube configuration achieving performance same as the nanowire architecture even when Vdd is scaled down to 0.5-V.

  2. All-Printed Thin-Film Transistor Based on Purified Single-Walled Carbon Nanotubes with Linear Response

    Directory of Open Access Journals (Sweden)

    Guiru Gu

    2011-01-01

    Full Text Available We report an all-printed thin-film transistor (TFT on a polyimide substrate with linear transconductance response. The TFT is based on our purified single-walled carbon nanotube (SWCNT solution that is primarily consists of semiconducting carbon nanotubes (CNTs with low metal impurities. The all-printed TFT exhibits a high ON/OFF ratio of around 103 and bias-independent transconductance over a certain gate bias range. Such bias-independent transconductance property is different from that of conventional metal-oxide-semiconductor field-effect transistors (MOSFETs due to the special band structure and the one-dimensional (1D quantum confined density of state (DOS of CNTs. The bias-independent transconductance promises modulation linearity for analog electronics.

  3. Current-voltage characteristics in organic field-effect transistors. Effect of interface dipoles

    Science.gov (United States)

    Sworakowski, Juliusz

    2015-07-01

    The role of polar molecules present at dielectric/semiconductor interfaces of organic field-effect transistors (OFETs) has been assessed employing the electrostatic model put forward in a recently published paper (Sworakowski et al., 2014). The interface dipoles create dipolar traps in the surface region of the semiconductor, their depths decreasing with the distance from the interface. This feature results in appearance of mobility gradients in the direction perpendicular to the dielectric/semiconductor interface, manifesting themselves in modification of the shapes of current-voltage characteristics. The effect may account for differences in carrier mobilities determined from the same experimental data using methods scanning different ranges of channel thicknesses (e.g., transconductances vs. transfer characteristics), differences between turn-on voltages and threshold voltages, and gate voltage dependence of mobility.

  4. Analytical Subthreshold Current and Subthreshold Swing Models for a Fully Depleted (FD) Recessed-Source/Drain (Re-S/D) SOI MOSFET with Back-Gate Control

    Science.gov (United States)

    Saramekala, Gopi Krishna; Tiwari, Pramod Kumar

    2017-08-01

    Two-dimensional (2D) analytical models for the subthreshold current and subthreshold swing of the back-gated fully depleted recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) are presented. The surface potential is determined by solving the 2D Poisson equation in both channel and buried-oxide (BOX) regions, considering suitable boundary conditions. To derive closed-form expressions for the subthreshold characteristics, the virtual cathode potential expression has been derived in terms of the minimum of the front and back surface potentials. The effect of various device parameters such as gate oxide and Si film thicknesses, thickness of source/drain penetration into BOX, applied back-gate bias voltage, etc. on the subthreshold current and subthreshold swing has been analyzed. The validity of the proposed models is established using the Silvaco ATLAS™ 2D device simulator.

  5. Patterning technology for solution-processed organic crystal field-effect transistors

    Science.gov (United States)

    Li, Yun; Sun, Huabin; Shi, Yi; Tsukagoshi, Kazuhito

    2014-01-01

    Organic field-effect transistors (OFETs) are fundamental building blocks for various state-of-the-art electronic devices. Solution-processed organic crystals are appreciable materials for these applications because they facilitate large-scale, low-cost fabrication of devices with high performance. Patterning organic crystal transistors into well-defined geometric features is necessary to develop these crystals into practical semiconductors. This review provides an update on recentdevelopment in patterning technology for solution-processed organic crystals and their applications in field-effect transistors. Typical demonstrations are discussed and examined. In particular, our latest research progress on the spin-coating technique from mixture solutions is presented as a promising method to efficiently produce large organic semiconducting crystals on various substrates for high-performance OFETs. This solution-based process also has other excellent advantages, such as phase separation for self-assembled interfaces via one-step spin-coating, self-flattening of rough interfaces, and in situ purification that eliminates the impurity influences. Furthermore, recommendations for future perspectives are presented, and key issues for further development are discussed. PMID:27877656

  6. Patterning technology for solution-processed organic crystal field-effect transistors

    Directory of Open Access Journals (Sweden)

    Yun Li

    2014-04-01

    Full Text Available Organic field-effect transistors (OFETs are fundamental building blocks for various state-of-the-art electronic devices. Solution-processed organic crystals are appreciable materials for these applications because they facilitate large-scale, low-cost fabrication of devices with high performance. Patterning organic crystal transistors into well-defined geometric features is necessary to develop these crystals into practical semiconductors. This review provides an update on recent development in patterning technology for solution-processed organic crystals and their applications in field-effect transistors. Typical demonstrations are discussed and examined. In particular, our latest research progress on the spin-coating technique from mixture solutions is presented as a promising method to efficiently produce large organic semiconducting crystals on various substrates for high-performance OFETs. This solution-based process also has other excellent advantages, such as phase separation for self-assembled interfaces via one-step spin-coating, self-flattening of rough interfaces, and in situ purification that eliminates the impurity influences. Furthermore, recommendations for future perspectives are presented, and key issues for further development are discussed.

  7. Low dielectric constant-based organic field-effect transistors and metal-insulator-semiconductor capacitors

    Science.gov (United States)

    Ukah, Ndubuisi Benjamin

    This thesis describes a study of PFB and pentacene-based organic field-effect transistors (OFET) and metal-insulator-semiconductor (MIS) capacitors with low dielectric constant (k) poly(methyl methacrylate) (PMMA), poly(4-vinyl phenol) (PVP) and cross-linked PVP (c-PVP) gate dielectrics. A physical method -- matrix assisted pulsed laser evaporation (MAPLE) -- of fabricating all-polymer field-effect transistors and MIS capacitors that circumvents inherent polymer dissolution and solvent-selectivity problems, is demonstrated. Pentacene-based OFETs incorporating PMMA and PVP gate dielectrics usually have high operating voltages related to the thickness of the dielectric layer. Reduced PMMA layer thickness (≤ 70 nm) was obtained by dissolving the PMMA in propylene carbonate (PC). The resulting pentacene-based transistors exhibited very low operating voltage (below -3 V), minimal hysteresis in their transfer characteristics, and decent electrical performance. Also low voltage (within -2 V) operation using thin (≤ 80 nm) low-k and hydrophilic PVP and c-PVP dielectric layers obtained via dissolution in high dipole moment and high-k solvents -- PC and dimethyl sulfoxide (DMSO), is demonstrated to be a robust means of achieving improved electrical characteristics and high operational stability in OFETs incorporating PVP and c-PVP dielectrics.

  8. Photo-excited charge collection spectroscopy probing the traps in field-effect transistors

    CERN Document Server

    Im, Seongil; Kim, Jae Hoon

    2013-01-01

    Solid state field-effect devices such as organic and inorganic-channel thin-film transistors (TFTs) have been expected to promote advances in display and sensor electronics. The operational stabilities of such TFTs are thus important, strongly depending on the nature and density of charge traps present at the channel/dielectric interface or in the thin-film channel itself. This book contains how to characterize these traps, starting from the device physics of field-effect transistor (FET). Unlike conventional analysis techniques which are away from well-resolving spectral results, newly-introduced photo-excited charge-collection spectroscopy (PECCS) utilizes the photo-induced threshold voltage response from any type of working transistor devices with organic-, inorganic-, and even nano-channels, directly probing on the traps. So, our technique PECCS has been discussed through more than ten refereed-journal papers in the fields of device electronics, applied physics, applied chemistry, nano-devices and materia...

  9. Photoionization spectroscopy of deep defects responsible for current collapse in nitride-based field effect transistors

    International Nuclear Information System (INIS)

    Klein, P B; Binari, S C

    2003-01-01

    This review is concerned with the characterization and identification of the deep centres that cause current collapse in nitride-based field effect transistors. Photoionization spectroscopy is an optical technique that has been developed to probe the characteristics of these defects. Measured spectral dependences provide information on trap depth, lattice coupling and on the location of the defects in the device structure. The spectrum of an individual trap may also be regarded as a 'fingerprint' of the defect, allowing the trap to be followed in response to the variation of external parameters. The basis for these measurements is derived through a modelling procedure that accounts quantitatively for the light-induced drain current increase in the collapsed device. Applying the model to fit the measured variation of drain current increase with light illumination provides an estimate of the concentrations and photoionization cross-sections of the deep defects. The results of photoionization studies of GaN metal-semiconductor field effect transistors and AlGaN/GaN high electron mobility transistors (HEMTs) grown by metal-organic chemical vapour deposition (MOCVD) are presented and the conclusions regarding the nature of the deep traps responsible are discussed. Finally, recent photoionization studies of current collapse induced by short-term (several hours) bias stress in AlGaN/GaN HEMTs are described and analysed for devices grown by both MOCVD and molecular beam epitaxy. (topical review)

  10. Subthreshold swing improvement in MoS2transistors by the negative-capacitance effect in a ferroelectric Al-doped-HfO2/HfO2gate dielectric stack.

    Science.gov (United States)

    Nourbakhsh, Amirhasan; Zubair, Ahmad; Joglekar, Sameer; Dresselhaus, Mildred; Palacios, Tomás

    2017-05-11

    Obtaining a subthreshold swing (SS) below the thermionic limit of 60 mV dec -1 by exploiting the negative-capacitance (NC) effect in ferroelectric (FE) materials is a novel effective technique to allow the reduction of the supply voltage and power consumption in field effect transistors (FETs). At the same time, two-dimensional layered semiconductors, such as molybdenum disulfide (MoS 2 ), have been shown to be promising candidates to replace silicon MOSFETs in sub-5 nm-channel technology nodes. In this paper, we demonstrate NC MoS 2 FETs by incorporating a ferroelectric Al-doped HfO 2 (Al : HfO 2 ), a technologically compatible material, in the FET gate stack. Al : HfO 2 thin films were deposited on Si wafers by atomic layer deposition. Voltage amplification up to 1.25 times was observed in a FE bilayer stack of Al : HfO 2 /HfO 2 with a Ni metallic intermediate layer. The minimum SS (SS min ) of the NC-MoS 2 FET built on the FE bilayer improved to 57 mV dec -1 at room temperature, compared with SS min = 67 mV dec -1 for the MoS 2 FET with only HfO 2 as a gate dielectric.

  11. Influence of molecular weight on the short-channel effect in polymer-based field-effect transistors

    NARCIS (Netherlands)

    Tunc, Ali Veysel; Ecker, Bernhard; Dogruyol, Zekeriya; Juechter, Sabrina; Ugur, Ahmet Lutfi; Erdogmus, Ali; San, Sait Eren; Parisi, Juergen; von Hauff, Elizabeth

    2012-01-01

    In this study, we demonstrate how the intrinsic properties of a polymer can influence the electrical characteristics of organic field-effect transistors (OFETs). OFETs fabricated with three batches of poly[2-methoxy,5-(3′,7′-dimethyl-octyloxy)]-p-phenylene vinylene (MDMO-PPV) were investigated. The

  12. Atomistic boron-doped graphene field-effect transistors: a route toward unipolar characteristics.

    Science.gov (United States)

    Marconcini, Paolo; Cresti, Alessandro; Triozon, François; Fiori, Gianluca; Biel, Blanca; Niquet, Yann-Michel; Macucci, Massimo; Roche, Stephan

    2012-09-25

    We report fully quantum simulations of realistic models of boron-doped graphene-based field-effect transistors, including atomistic details based on DFT calculations. We show that the self-consistent solution of the three-dimensional (3D) Poisson and Schrödinger equations with a representation in terms of a tight-binding Hamiltonian manages to accurately reproduce the DFT results for an isolated boron-doped graphene nanoribbon. Using a 3D Poisson/Schrödinger solver within the non-equilibrium Green's function (NEGF) formalism, self-consistent calculations of the gate-screened scattering potentials induced by the boron impurities have been performed, allowing the theoretical exploration of the tunability of transistor characteristics. The boron-doped graphene transistors are found to approach unipolar behavior as the boron concentration is increased and, by tuning the density of chemical dopants, the electron-hole transport asymmetry can be finely adjusted. Correspondingly, the onset of a mobility gap in the device is observed. Although the computed asymmetries are not sufficient to warrant proper device operation, our results represent an initial step in the direction of improved transfer characteristics and, in particular, the developed simulation strategy is a powerful new tool for modeling doped graphene nanostructures.

  13. Memristive device based on a depletion-type SONOS field effect transistor

    Science.gov (United States)

    Himmel, N.; Ziegler, M.; Mähne, H.; Thiem, S.; Winterfeld, H.; Kohlstedt, H.

    2017-06-01

    State-of-the-art SONOS (silicon-oxide-nitride-oxide-polysilicon) field effect transistors were operated in a memristive switching mode. The circuit design is a variation of the MemFlash concept and the particular properties of depletion type SONOS-transistors were taken into account. The transistor was externally wired with a resistively shunted pn-diode. Experimental current-voltage curves show analog bipolar switching characteristics within a bias voltage range of ±10 V, exhibiting a pronounced asymmetric hysteresis loop. The experimental data are confirmed by SPICE simulations. The underlying memristive mechanism is purely electronic, which eliminates an initial forming step of the as-fabricated cells. This fact, together with reasonable design flexibility, in particular to adjust the maximum R ON/R OFF ratio, makes these cells attractive for neuromorphic applications. The relative large set and reset voltage around ±10 V might be decreased by using thinner gate-oxides. The all-electric operation principle, in combination with an established silicon manufacturing process of SONOS devices at the Semiconductor Foundry X-FAB, promise reliable operation, low parameter spread and high integration density.

  14. Regulating charge injection in ambipolar organic field-effect transistors by mixed self-assembled monolayers.

    Science.gov (United States)

    Xu, Yong; Baeg, Kang-Jun; Park, Won-Tae; Cho, Ara; Choi, Eun-Young; Noh, Yong-Young

    2014-08-27

    We report on a technique using mixed self-assembled monolayers (SAMs) to finely regulate ambipolar charge injection in polymer organic field-effect transistors. Differing from the other works that employ single SAM specifically for efficient charge injection in p-type and n-type transistors, we blend two different SAMs of alkyl- and perfluoroalkyl thiols at different ratios and apply them to ambipolar OFETs and inverter. Thanks to the utilization of ambipolar semiconductor and one SAM mixture, the device and circuit fabrications are facile with only one step for semiconductor deposition and another for SAM treatment. This is much simpler with respect to the conventional scheme for the unipolar-device-based complementary circuitry that demands separate deposition and processing for individual p-channel and n-channel transistors. Our results show that the mixed-SAM treatments not only improve ambipolar charge injection manifesting as higher hole- and electron-mobility and smaller threshold voltage but also gradually tune the device characteristics to reach a desired condition for circuit application. Therefore, this simple but useful approach is promising for ambipolar electronics.

  15. Computational study of heterojunction graphene nanoribbon tunneling transistors with p-d orbital tight-binding method

    Science.gov (United States)

    Kim, SungGeun; Luisier, Mathieu; Boykin, Timothy B.; Klimeck, Gerhard

    2014-06-01

    The graphene nanoribbon (GNR) tunneling field effect transistor (TFET) has been a promising candidate for a future low power logic device due to its sub-60 mV/dec subthreshold characteristic and its superior gate control on the channel electrons due to its one-dimensional nature. Even though many theoretical studies have been carried out, it is not clear that GNR TFETs would outperform conventional silicon metal oxide semiconductor field effect transistors (MOSFETs). With rigorous atomistic simulations using the p/d orbital tight-binding model, this study focuses on the optimization of GNR TFETs by tuning the doping density and the size of GNRs. It is found that the optimized GNR TFET can operate at a half of the supply voltage of silicon nanowire MOSFETs in the ballistic limit. However, a study on the effects of edge roughness on the performance of the optimized GNR TFET structure reveals that experimentally feasible edge roughness can deteriorates the on-current performance if the off-current is normalized with the low power requirement specified in the international technology roadmap for semiconductors.

  16. A disorder induced field effect transistor in bilayer and trilayer graphene

    International Nuclear Information System (INIS)

    Xu Dongwei; Liu Haiwen; Sacksteder IV, Vincent; Sun Qingfeng; Song Juntao; Jiang Hua; Xie, X C

    2013-01-01

    We propose using disorder to produce a field effect transistor (FET) in biased bilayer and trilayer graphene. Modulation of the bias voltage can produce large variations in the conductance when the effects of disorder are confined to only one of the graphene layers. This effect is based on the ability of the bias voltage to select which of the graphene layers carries current, and is not tied to the presence of a gap in the density of states. In particular, we demonstrate this effect in models of gapless ABA-stacked trilayer graphene, gapped ABC-stacked trilayer graphene and gapped bilayer graphene. (paper)

  17. Fabrication of a novel RF switch device with high performance using In0.4Ga0.6As MOSFET technology

    Science.gov (United States)

    Jiahui, Zhou; Hudong, Chang; Xufang, Zhang; Jingzhi, Yang; Guiming, Liu; Haiou, Li; Honggang, Liu

    2016-02-01

    A novel radio frequency (RF) switch device has been successfully fabricated using InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) technology. The device showed drain saturation currents of 250 mA/mm, a maximum transconductance of 370 mS/mm, a turn-on resistance of 0.72 mω·mm2 and a drain current on-off (Ion/Ioff) ratio of 1 × 106. The maximum handling power of on-state of 533 mW/mm and off-state of 3667 mW/mm is obtained. The proposed In0.4Ga0.6 As MOSFET RF switch showed an insertion loss of less than 1.8 dB and an isolation of better than 20 dB in the frequency range from 0.1 to 7.5 GHz. The lowest insertion loss and the highest isolation can reach 0.27 dB and more than 68 dB respectively. This study demonstrates that the InGaAs MOSFET technology has a great potential for RF switch application. Project supported by the National Natural Science Foundation of China (Nos. 61274077, 61474031), the Guangxi Natural Science Foundation (No. 2013GXNSFGA019003), the Guangxi Department of Education Project (No. 201202ZD041), the Guilin City Technology Bureau (Nos. 20120104-8, 20130107-4), the China Postdoctoral Science Foundation Funded Project (Nos. 2012M521127, 2013T60566), the National Basic Research Program of China (Nos. 2011CBA00605, 2010CB327501), the Innovation Project of GUET Graduate Education (Nos. GDYCSZ201448, GDYCSZ201449), the State key Laboratory of Electronic Thin Films and Integrated Devices, UESTC (No. KFJJ201205), and the Guilin City Science and Technology Development Project (Nos. 20130107-4, 20120104-8).

  18. Remote N2 plasma treatment to deposit ultrathin high-k dielectric as tunneling contact layer for single-layer MoS2 MOSFET

    Science.gov (United States)

    Qian, Qingkai; Zhang, Zhaofu; Hua, Mengyuan; Wei, Jin; Lei, Jiacheng; Chen, Kevin J.

    2017-12-01

    Remote N2 plasma treatment is explored as a surface functionalization technique to deposit ultrathin high-k dielectric on single-layer MoS2. The ultrathin dielectric is used as a tunneling contact layer, which also serves as an interfacial layer below the gate region for fabricating top-gate MoS2 metal–oxide–semiconductor field-effect transistors (MOSFETs). The fabricated devices exhibited small hysteresis and mobility as high as 14 cm2·V‑1·s‑1. The contact resistance was significantly reduced, which resulted in the increase of drain current from 20 to 56 µA/µm. The contact resistance reduction can be attributed to the alleviated metal–MoS2 interface reaction and the preserved conductivity of MoS2 below the source/drain metal contact.

  19. Two-dimensional model for subthreshold current and subthreshold swing of graded-channel dual-material double-gate (GCDMDG) MOSFETs

    Science.gov (United States)

    Goel, Ekta; Kumar, Sanjay; Singh, Balraj; Singh, Kunal; Jit, Satyabrata

    2017-06-01

    The subthreshold performance of graded-channel dual-material double-gate (GCDMDG) MOSFETs is examined through two-dimensional (2D) analytical modeling of subthreshold-current (SC) and subthreshold-swing (SS). The potential function obtained by using the parabolic approach to solve the 2D Poisson's equation, has been used to formulate SC and SS characteristics of the device. The variations of SS against different device parameters have been obtained with the help of effective conduction path parameter. The SC and SS characteristics of the GCDMDG MOS transistor have been compared with those of the dual-material double-gate (DMDG) and simple graded-channel double-gate (GCDG) MOS structures to show its better subthreshold characteristics over the latter two devices. The results of the developed model are well-agreed with the commercially available SILVACO ATLAS™ simulator data.

  20. The Development of III-V Semiconductor MOSFETs for Future CMOS Applications

    Science.gov (United States)

    Greene, Andrew M.

    Alternative channel materials with superior transport properties over conventional strained silicon are required for supply voltage scaling in low power complementary metal-oxide-semiconductor (CMOS) integrated circuits. Group III-V compound semiconductor systems offer a potential solution due to their high carrier mobility, low carrier effective mass and large injection velocity. The enhancement in transistor drive current at a lower overdrive voltage allows for the scaling of supply voltage while maintaining high switching performance. This thesis focuses on overcoming several material and processing challenges associated with III-V semiconductor development including a low thermal processing budget, high interface trap state density (Dit), low resistance source/drain contacts and growth on lattice mismatched substrates. Non-planar In0.53Ga0.47As FinFETs were developed using both "gate-first" and "gate-last" fabrication methods for n-channel MOSFETs. Electron beam lithography and anisotropic plasma etching processes were optimized to create highly scaled fins with near vertical sidewalls. Plasma damage was removed using a wet etch process and improvements in gate efficiency were characterized on MOS capacitor structures. A two-step, selective removal of the pre-grown n+ contact layer was developed for "gate-last" recess etching. The final In0.53Ga 0.47As FinFET devices demonstrated an ION = 70 mA/mm, I ON/IOFF ratio = 15,700 and sub-threshold swing = 210 mV/dec. Bulk GaSb and strained In0.36Ga0.64Sb quantum well (QW) heterostructures were developed for p-channel MOSFETs. Dit was reduced to 2 - 3 x 1012 cm-2eV-1 using an InAs surface layer, (NH4)2S passivation and atomic layer deposition (ALD) of Al2O3. A self-aligned "gate-first" In0.36Ga0.64Sb MOSFET fabrication process was invented using a "T-shaped" electron beam resist patterning stack and intermetallic source/drain contacts. Ni contacts annealed at 300°C demonstrated an ION = 166 mA/mm, ION/IOFF ratio = 1

  1. Effect of TMAH Etching Duration on the Formation of Silicon Nano wire Transistor Patterned by AFM Nano lithography

    International Nuclear Information System (INIS)

    Hutagalung, S.D.; Lew, K.C.

    2012-01-01

    Atomic force microscopy (AFM) lithography was applied to produce nano scale pattern for silicon nano wire transistor fabrication. This technique takes advantage of imaging facility of AFM and the ability of probe movement controlling over the sample surface to create nano patterns. A conductive AFM tip was used to grow the silicon oxide nano patterns on silicon on insulator (SOI) wafer. The applied tip-sample voltage and writing speed were well controlled in order to form pre-designed silicon oxide nano wire transistor structures. The effect of tetra methyl ammonium hydroxide (TMAH) etching duration on the oxide covered silicon nano wire transistor structure has been investigated. A completed silicon nano wire transistor was obtained by removing the oxide layer via hydrofluoric acid etching process. The fabricated silicon nano wire transistor consists of a silicon nano wire that acts as a channel with source and drain pads. A lateral gate pad with a nano wire head was fabricated very close to the channel in the formation of transistor structures. (author)

  2. Design and characterization of Au/In4Se3/Ga2S3/C field effect transistors

    Directory of Open Access Journals (Sweden)

    Najla M. Khusayfan

    2018-03-01

    Full Text Available In the current work, the structural and electrical properties of the In4Se3/Ga2S3 interfaces are investigated. The X-ray analysis which concern the structural evolutions that is associated with the substrate type has shown that the hexagonal κ-In2Se3 and the selenium (rhombohedral rich orthorhombic In4Se3 phases of InSe are grown onto glass and gold substrates, respectively, at substrate of temperature of 300 °C in a vacuum media. The coating of the κ-In2Se3 and of In4Se3 with amorphous layer of Ga2S3 is accompanied with uniform strain. The In4Se3/Ga2S3 interface is found to be of attractive quantum confinement features as it exhibited a conduction and valence band offsets of 0.20 and 1.86 eV, respectively. When the Au/In4Se3/Ga2S3 interface was contacted with carbon metallic point contact, it reveals a back to back Schottky hybrid device that behaves typically as metal–oxidesemiconductor field effect transition (MOSFET. The depletion capacitance analysis of this device revealed built in voltage values of 1.91 and 1.64 V at the Au and C sides, respectively. The designed MOSFET which is characterized in the frequency domain of 0.01–1.80 GHz is observed to exhibit, resonance-anti-resonance phenomena associated with negative capacitance effect in a wide domain of frequency that nominate it for applications in electronic circuits as parasitic capacitance minimizer, bus switching speed enhancer and low pass/high pass filter at microwave frequencies. Keywords: k-In2Se3, Orthorhombic indium selenide, Double Schottky, Impedance, MOSFET

  3. Gate Control Coefficient Effect on CNFET Characteristic

    International Nuclear Information System (INIS)

    Sanudin, Rahmat; Ma'Radzi, Ahmad Alabqari; Nayan, Nafarizal

    2009-01-01

    The development of carbon nanotube field-effect transistor (CNFET) as alternative to existing transistor technology has long been published and discussed. The emergence of this device offers new material and structure in building a transistor. This paper intends to do an analysis of gate control coefficient effect on CNFET performance. The analysis is based on simulation study of current-voltage (I-V) characteristic of ballistic CNFET. The simulation study used the MOSFET-like CNFET mathematical model to establish the device output characteristic. Based on the analysis of simulation result, it is found that the gate control coefficient contributes to a significant effect on the performance of CNFET. The result also shown the parameter could help to improve the device performance in terms of its output and response as well. Nevertheless, the characteristic of the carbon nanotube that acts as the channel is totally important in determining the performance of the transistor as a whole.

  4. Impact of graphene polycrystallinity on the performance of graphene field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Jiménez, David; Chaves, Ferney [Departament d' Enginyeria Electrònica, Escola d' Enginyeria, Universitat Autònoma de Barcelona, 08193-Bellaterra (Spain); Cummings, Aron W.; Van Tuan, Dinh [ICN2, Institut Català de Nanociencia i Nanotecnologia, Campus UAB, 08193 Bellaterra (Barcelona) (Spain); Kotakoski, Jani [Faculty of Physics, University of Vienna, Boltzmanngasse 5, 1090 Wien (Austria); Department of Physics, University of Helsinki, P.O. Box 43, 00014 University of Helsinki (Finland); Roche, Stephan [ICN2, Institut Català de Nanociencia i Nanotecnologia, Campus UAB, 08193 Bellaterra (Barcelona) (Spain); ICREA, Institució Catalana de Recerca i Estudis Avançats, 08070 Barcelona (Spain)

    2014-01-27

    We have used a multi-scale physics-based model to predict how the grain size and different grain boundary morphologies of polycrystalline graphene will impact the performance metrics of graphene field-effect transistors. We show that polycrystallinity has a negative impact on the transconductance, which translates to a severe degradation of the maximum and cutoff frequencies. On the other hand, polycrystallinity has a positive impact on current saturation, and a negligible effect on the intrinsic gain. These results reveal the complex role played by graphene grain boundaries and can be used to guide the further development and optimization of graphene-based electronic devices.

  5. Impact of graphene polycrystallinity on the performance of graphene field-effect transistors

    International Nuclear Information System (INIS)

    Jiménez, David; Chaves, Ferney; Cummings, Aron W.; Van Tuan, Dinh; Kotakoski, Jani; Roche, Stephan

    2014-01-01

    We have used a multi-scale physics-based model to predict how the grain size and different grain boundary morphologies of polycrystalline graphene will impact the performance metrics of graphene field-effect transistors. We show that polycrystallinity has a negative impact on the transconductance, which translates to a severe degradation of the maximum and cutoff frequencies. On the other hand, polycrystallinity has a positive impact on current saturation, and a negligible effect on the intrinsic gain. These results reveal the complex role played by graphene grain boundaries and can be used to guide the further development and optimization of graphene-based electronic devices

  6. The implant-free quantum well field-effect transistor: Harnessing the power of heterostructures

    International Nuclear Information System (INIS)

    Hellings, Geert; Hikavyy, Andriy; Mitard, Jerome; Witters, Liesbeth; Benbakhti, Brahim; Alian, AliReza; Waldron, Niamh; Bender, Hugo; Eneman, Geert; Krom, Raymond; Schulze, Andreas; Vandervorst, Wilfried; Loo, Roger; Heyns, Marc; Meuris, Marc; Hoffmann, Thomas; De Meyer, Kristin

    2012-01-01

    The Implant-Free Quantum Well Field-Effect Transistor (FET) offers enhanced scalability in a planar architecture through the integration of heterostructures. The Implant-Free architecture fully utilizes the band offsets between different materials, whereby charge carriers are effectively confined to a thin channel layer. This prevents sub-surface source/drain leakage observed in classical bulk Metal-Oxide-Semiconductor FETs at small gate lengths. An investigation of the V T -tuning capabilities of this technology reveals sensitivity to both well doping and bulk voltage.

  7. Graphene-based field effect transistors for radiation-induced field sensing

    Energy Technology Data Exchange (ETDEWEB)

    Di Gaspare, Alessandra, E-mail: alessandra.digaspare@lnf.infn.it [INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Valletta, Antonio [CNR-Istituto per la Microelettronica e i Microsistemi, TorVergata, Rome (Italy); Fortunato, Guglielmo [CNR-Istituto per la Microelettronica e i Microsistemi, TorVergata, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Larciprete, Rosanna [CNR-Istituto di Sistemi Complessi, TorVergata, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Mariucci, Luigi [CNR-Istituto per la Microelettronica e i Microsistemi, TorVergata, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Notargiacomo, Andrea [CNR-Istituto di Fotonica e Nanotecnologie, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Cimino, Roberto [INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); CERN, Geneva (Switzerland)

    2016-07-11

    We propose the implementation of graphene-based field effect transistor (FET) as radiation sensor. In the proposed detector, graphene obtained via chemical vapor deposition is integrated into a Si-based field effect device as the gate readout electrode, able to sense any change in the field distribution induced by ionization in the underneath absorber, because of the strong variation in the graphene conductivity close to the charge neutrality point. Different 2-dimensional layered materials can be envisaged in this kind of device.

  8. Bias dependence of synergistic radiation effects induced by electrons and protons on silicon bipolar junction transistors

    Science.gov (United States)

    Liu, Chaoming; Li, Xingji; Yang, Jianqun; Ma, Guoliang; Xiao, Liyi

    2015-06-01

    Bias dependence on synergistic radiation effects caused by 110 keV electrons and 170 keV protons on the current gain of 3DG130 NPN bipolar junction transistors (BJTs) is studied in this paper. Experimental results indicate that the influence induced by 170 keV protons is always enhancement effect during the sequential irradiation. However, the influence induced by 110 keV electrons on the BJT under various bias cases is different during the sequential irradiation. The transition fluence of 110 keV electrons is dependent on the bias case on the emitter-base junction of BJT.

  9. Bisacenaphthopyrazinoquinoxaline derivatives: Synthesis, physical properties and applications as semiconductors for n-channel field effect transistors

    KAUST Repository

    Tong, Chenhua

    2013-01-01

    Several bisacenaphthopyrazinoquinoxaline (BAPQ) based derivatives 1-3 were synthesized by condensation between the acenaphthenequinones and 1,2,4,5-tetraaminobenzene tetrahydrochloride. Their optical, electrochemical and self-assembling properties are tuned by different substituents. Among them, compound 3 possesses a homogeneously distributed low-lying LUMO due to the peripheral substitution with four cyano groups. The corresponding n-channel field effect transistors showed a field effect electron mobility of 5 × 10-3 cm2 V-1 s-1. © 2013 The Royal Society of Chemistry.

  10. Effective Dose of Positioning Scans for Five CBCT Devices

    Science.gov (United States)

    2016-05-25

    dose was measured with metal –oxide–semiconductor field-effect transistor (MOSFET) dosimeters for five CBCT devices in a postgraduate dental clinic... measured cosmic and terrestrial sources. Cosmic radiation is dependent on elevation and latitude; while it measures about 240 µSv per year at sea level...13  1.2  Effective Dose: Sources and Definitions ............................................................. 13  1.3  Measuring

  11. Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

    Science.gov (United States)

    Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

    2018-04-01

    We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

  12. Parallel Connection of Silicon Carbide MOSFETs for Multichip Power Modules

    DEFF Research Database (Denmark)

    Li, Helong

    characterization of SiC MOSFETs regarding the influence of switching loop stray inductance and common source stray inductance. The pulse current measurement methods of fast switching speed power devices are summarized and a new method witch silicon steel current transformer is presented. With the knowledge...... to a significant transient current imbalance during the switching period. Besides the circuit mismatch, a current coupling effect is also found in the DBC layout, which aggravates the transient current imbalance among the paralleled SiC MOSFET dies. The discussions about the effects of the auxiliary source......, which turns out to be able to improve the efficiency compared to the traditional half bridge. Besides the split output topology benefits, compared to the traditional DBC layout, the proposed DBC layout significantly reduces the circuit mismatch and current coupling effect, which consequently improves...

  13. A novel δ-doped partially insulated dopant-segregated Schottky barrier SOI MOSFET for analog/RF applications

    International Nuclear Information System (INIS)

    Patil, Ganesh C; Qureshi, S

    2011-01-01

    In this paper, a comparative analysis of single-gate dopant-segregated Schottky barrier (DSSB) SOI MOSFET and raised source/drain ultrathin-body SOI MOSFET (RSD UTB) has been carried out to explore the thermal efficiency, scalability and analog/RF performance of these devices. A novel p-type δ-doped partially insulated DSSB SOI MOSFET (DSSB Pi-OX-δ) has been proposed to reduce the self-heating effect and to improve the high-frequency performance of DSSB SOI MOSFET over RSD UTB. The improved analog/RF figures of merit such as transconductance, transconductance generation factor, unity-gain frequency, maximum oscillation frequency, short-circuit current gain and unilateral power gain in DSSB Pi-OX-δ MOSFET show the suitability of this device for analog/RF applications. The reduced drain-induced barrier lowering, subthreshold swing and parasitic capacitances also make this device highly scalable. By using mixed-mode simulation capability of MEDICI simulator a cascode amplifier has been implemented using all the structures (RSD UTB, DSSB SOI and DSSB Pi-OX-δ MOSFETs). The results of this implementation show that the gain-bandwidth product in the case of DSSB Pi-OX-δ MOSFET has improved by 50% as compared to RSD UTB and by 20% as compared to DSSB SOI MOSFET. The detailed fabrication flow of DSSB Pi-OX-δ MOSFET has been proposed which shows that with the bare minimum of steps the performance of DSSB SOI MOSFET can be improved significantly in comparison to RSD UTB

  14. Interface engineering: an effective approach toward high-performance organic field-effect transistors.

    Science.gov (United States)

    Di, Chong-an; Liu, Yunqi; Yu, Gui; Zhu, Daoben

    2009-10-20

    By virtue of their excellent solution processibility and flexibility, organic field-effect transistors (OFETs) are considered outstanding candidates for application in low-cost, flexible electronics. Not only does the performance of OFETs depend on the molecular properties of the organic semiconductors involved, but it is also dramatically affected by the nature of the interfaces present. Therefore, interface engineering, a novel approach towards high-performance OFETs, has attracted considerable attention. In this Account, we focus on recent advances in the study of OFET interfaces--including electrode/organic layer interfaces, dielectric/organic layer interfaces, and organic/organic layer interfaces--that have resulted in improved device performance, enhanced stability, and the realization of organic light-emitting transistors. The electrode/organic layer interface, one of the most important interfaces in OFETs, usually determines the carrier injection characteristics. Focusing on OFETs with copper and silver electrodes, we describe effective modification approaches of the electrode/organic layer interfaces. Furthermore, the influence of electrode morphology on device performance is demonstrated. These results provide novel approaches towards high-performance, low-cost OFETs. The dielectric/organic layer interface is a vital interface that dominates carrier transport; modification of this interface therefore offers a general way to improve carrier transport accordingly. The dielectric layer also affects the device stability of OFETs. For example, high-performance pentacene OFETs with excellent stability are obtained by the selection of a dielectric layer with an appropriate surface energy. The organic/organic layer interface is a newly investigated topic in OFETs. Introduction of organic/organic layer interfaces, such as heterojunctions, can improve device performance and afford ambipolar OFETs. By designing laterally arranged heterojunctions made of organic

  15. Dirac-Point Shift by Carrier Injection Barrier in Graphene Field-Effect Transistor Operation at Room Temperature.

    Science.gov (United States)

    Lee, Sungsik; Nathan, Arokia; Alexander-Webber, Jack; Braeuninger-Weimer, Philipp; Sagade, Abhay A; Lu, Haichang; Hasko, David; Robertson, John; Hofmann, Stephan

    2018-03-21

    A positive shift in the Dirac point in graphene field-effect transistors was observed with Hall-effect measurements coupled with Kelvin-probe measurements at room temperature. This shift can be explained by the asymmetrical behavior of the contact resistance by virtue of the electron injection barrier at the source contact. As an outcome, an intrinsic resistance is given to allow a retrieval of an intrinsic carrier mobility found to be decreased with increasing gate bias, suggesting the dominance of short-range scattering in a single-layer graphene field-effect transistor. These results analytically correlate the field-effect parameters with intrinsic graphene properties.

  16. Biosensors based on enzyme field-effect transistors for determination of some substrates and inhibitors.

    Science.gov (United States)

    Dzyadevych, Sergei V; Soldatkin, Alexey P; Korpan, Yaroslav I; Arkhypova, Valentyna N; El'skaya, Anna V; Chovelon, Jean-Marc; Martelet, Claude; Jaffrezic-Renault, Nicole

    2003-10-01

    This paper is a review of the authors' publications concerning the development of biosensors based on enzyme field-effect transistors (ENFETs) for direct substrates or inhibitors analysis. Such biosensors were designed by using immobilised enzymes and ion-selective field-effect transistors (ISFETs). Highly specific, sensitive, simple, fast and cheap determination of different substances renders them as promising tools in medicine, biotechnology, environmental control, agriculture and the food industry. The biosensors based on ENFETs and direct enzyme analysis for determination of concentrations of different substrates (glucose, urea, penicillin, formaldehyde, creatinine, etc.) have been developed and their laboratory prototypes were fabricated. Improvement of the analytical characteristics of such biosensors may be achieved by using a differential mode of measurement, working solutions with different buffer concentrations and specific agents, negatively or positively charged additional membranes, or genetically modified enzymes. These approaches allow one to decrease the effect of the buffer capacity influence on the sensor response in an aim to increase the sensitivity of the biosensors and to extend their dynamic ranges. Biosensors for the determination of concentrations of different toxic substances (organophosphorous pesticides, heavy metal ions, hypochlorite, glycoalkaloids, etc.) were designed on the basis of reversible and/or irreversible enzyme inhibition effect(s). The conception of an enzymatic multibiosensor for the determination of different toxic substances based on the enzyme inhibition effect is also described. We will discuss the respective advantages and disadvantages of biosensors based on the ENFETs developed and also demonstrate their practical application.

  17. Fabrication, electrical characterization and device simulation of vertical P3HT field-effect transistors

    Directory of Open Access Journals (Sweden)

    Bojian Xu

    2017-12-01

    Full Text Available Vertical organic field-effect transistors (VOFETs provide an advantage over lateral ones with respect to the possibility to conveniently reduce the channel length. This is beneficial for increasing both the cut-off frequency and current density in organic field-effect transistor devices. We prepared P3HT (poly[3-hexylthiophene-2,5-diyl] VOFETs with a surrounding gate electrode and gate dielectric around the vertical P3HT pillar junction. Measured output and transfer characteristics do not show a distinct gate effect, in contrast to device simulations. By introducing in the simulations an edge layer with a strongly reduced charge mobility, the gate effect is significantly reduced. We therefore propose that a damaged layer at the P3HT/dielectric interface could be the reason for the strong suppression of the gate effect. We also simulated how the gate effect depends on the device parameters. A smaller pillar diameter and a larger gate electrode-dielectric overlap both lead to better gate control. Our findings thus provide important design parameters for future VOFETs.

  18. Carbon nanotube transistor based high-frequency electronics

    Science.gov (United States)

    Schroter, Michael

    At the nanoscale carbon nanotubes (CNTs) have higher carrier mobility and carrier velocity than most incumbent semiconductors. Thus CNT based field-effect transistors (FETs) are being considered as strong candidates for replacing existing MOSFETs in digital applications. In addition, the predicted high intrinsic transit frequency and the more recent finding of ways to achieve highly linear transfer characteristics have inspired investigations on analog high-frequency (HF) applications. High linearity is extremely valuable for an energy efficient usage of the frequency spectrum, particularly in mobile communications. Compared to digital applications, the much more relaxed constraints for CNT placement and lithography combined with already achieved operating frequencies of at least 10 GHz for fabricated devices make an early entry in the low GHz HF market more feasible than in large-scale digital circuits. Such a market entry would be extremely beneficial for funding the development of production CNTFET based process technology. This talk will provide an overview on the present status and feasibility of HF CNTFET technology will be given from an engineering point of view, including device modeling, experimental results, and existing roadblocks. Carbon nanotube transistor based high-frequency electronics.

  19. Neutron and gamma irradiation effects on power semiconductor switches

    Science.gov (United States)

    Schwarze, G. E.; Frasca, A. J.

    1990-01-01

    The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

  20. Novel Organic Field Effect Transistors via Nano-Modification

    National Research Council Canada - National Science Library

    Wen, Ten-Chin; Chou, Wei-Yang; Guo, Tzung-Fang; Wang, Yeong-Her

    2005-01-01

    .... The performance of organic FETs is determined primarily by the field effect mobility of the carriers in the organic semiconductor layers and by the efficiency of injecting and extracting carriers...

  1. Interface-Dependent Effective Mobility in Graphene Field-Effect Transistors

    Science.gov (United States)

    Ahlberg, Patrik; Hinnemo, Malkolm; Zhang, Shi-Li; Olsson, Jörgen

    2018-03-01

    By pretreating the substrate of a graphene field-effect transistor (G-FET), a stable unipolar transfer characteristic, instead of the typical V-shape ambipolar behavior, has been demonstrated. This behavior is achieved through functionalization of the SiO2/Si substrate that changes the SiO2 surface from hydrophilic to hydrophobic, in combination with postdeposition of an Al2O3 film by atomic layer deposition (ALD). Consequently, the back-gated G-FET is found to have increased apparent hole mobility and suppressed apparent electron mobility. Furthermore, with addition of a top-gate electrode, the G-FET is in a double-gate configuration with independent top- or back-gate control. The observed difference in mobility is shown to also be dependent on the top-gate bias, with more pronounced effect at higher electric field. Thus, the combination of top and bottom gates allows control of the G-FET's electron and hole mobilities, i.e., of the transfer behavior. Based on these observations, it is proposed that polar ligands are introduced during the ALD step and, depending on their polarization, result in an apparent increase of the effective hole mobility and an apparent suppressed effective electron mobility.

  2. Lead Iodide Perovskite Light-Emitting Field-Effect Transistor

    OpenAIRE

    Chin, Xin Yu; Cortecchia, Daniele; Yin, Jun; Bruno, Annalisa; Soci, Cesare

    2015-01-01

    Despite the widespread use of solution-processable hybrid organic?inorganic perovskites in photovoltaic and light-emitting applications, determination of their intrinsic charge transport parameters has been elusive due to the variability of film preparation and history-dependent device performance. Here we show that screening effects associated to ionic transport can be effectively eliminated by lowering the operating temperature of methylammonium lead iodide perovskite (CH3NH3PbI3) field-eff...

  3. Field-effect and capacitive properties of water-gated transistors based on polythiophene derivatives

    Directory of Open Access Journals (Sweden)

    R. Porrazzo

    2015-01-01

    Full Text Available Recently, water-gated organic field-effect transistors (WGOFET have been intensively studied for their application in the biological field. Surprisingly, a very limited number of conjugated polymers have been reported so far. Here, we systematically explore a series of polythiophene derivatives, presenting different alkyl side chains lengths and orientation, and characterized by various morphologies: comparative evaluation of their performances allows highlighting the critical role played by alkyl side chains, which significantly affects the polymer/water interface capacitance. Reported results provide useful guidelines towards further development of WGOFETs and represent a step forward in the understanding of the polymer/water interface phenomena.

  4. High Current Density InAsSb/GaSb Tunnel Field Effect Transistors

    OpenAIRE

    Dey, Anil; Borg, Mattias; Ganjipour, Bahram; Ek, Martin; Dick Thelander, Kimberly; Lind, Erik; Nilsson, Peter; Thelander, Claes; Wernersson, Lars-Erik

    2012-01-01

    Steep-slope devices, such as tunnel field-effect transistors (TFETs), have recently gained interest due to their potential for low power operation at room temperature. The devices are based on inter-band tunneling which could limit the on-current since the charge carriers must tunnel through a barrier to traverse the device. The InAs/GaSb heterostructure forms a broken type II band alignment which enables inter-band tunneling without a barrier, allowing high on-currents. We ha...

  5. High-Current GaSb/InAs(Sb) Nanowire Tunnel Field-Effect Transistors

    OpenAIRE

    Dey, Anil; Borg, Mattias; Ganjipour, Bahram; Ek, Martin; Dick Thelander, Kimberly; Lind, Erik; Thelander, Claes; Wernersson, Lars-Erik

    2013-01-01

    We present electrical characterization of GaSb/InAs(Sb) nanowire tunnel field-effect transistors. The broken band alignment of the GaSb/InAs(Sb) heterostructure is exploited to allow for interband tunneling without a barrier, leading to high ON-current levels. We report a maximum drive current of 310 μA/μm at Vds = 0.5 V. Devices with scaled gate oxides display transconductances up to gm = 250 mS/mm at Vds = 300 mV, which are normalized to the nanowire circumference at the axial heterojunction...

  6. Extended-gate organic field-effect transistor for the detection of histamine in water

    Science.gov (United States)

    Minamiki, Tsukuru; Minami, Tsuyoshi; Yokoyama, Daisuke; Fukuda, Kenjiro; Kumaki, Daisuke; Tokito, Shizuo

    2015-04-01

    As part of our ongoing research program to develop health care sensors based on organic field-effect transistor (OFET) devices, we have attempted to detect histamine using an extended-gate OFET. Histamine is found in spoiled or decayed fish, and causes foodborne illness known as scombroid food poisoning. The new OFET device possesses an extended gate functionalized by carboxyalkanethiol that can interact with histamine. As a result, we have succeeded in detecting histamine in water through a shift in OFET threshold voltage. This result indicates the potential utility of the designed OFET devices in food freshness sensing.

  7. High performance solution-processable tetrathienoacene (TTAR) based small molecules for organic field effect transistors (OFETs).

    Science.gov (United States)

    Vegiraju, Sureshraju; Huang, Deng-Yi; Priyanka, Pragya; Li, Yo-Shan; Luo, Xian-Lun; Hong, Shao-Huan; Ni, Jen-Shyang; Tung, Shih-Huang; Wang, Chien-Lung; Lien, Wei-Chieh; Yau, Shueh Lin; Liu, Cheng-Liang; Chen, Ming-Chou

    2017-05-30

    Three new organic semiconductors with alkyl chain-substituted tetrathienoacene (TTAR) as the central core and both ends capped with thiophene (DT-TTAR), thienothiophene (DTT-TTAR) and dithienothiophene (DDTT-TTAR) have been synthesized and characterized for organic field effect transistor (OFET) applications. A hole mobility of 0.81 cm 2 V -1 s -1 was achieved for the DDTT-TTAR film, which represents the highest mobility yet found for a solution-processable p-type TTAR-based small molecular semiconductors.

  8. Top-gate organic field-effect transistors fabricated on shape-memory polymer substrates

    Science.gov (United States)

    Choi, Sangmoo; Fuentes-Hernandez, Canek; Wang, Cheng-Yin; Wei, Andrew; Voit, Walter; Zhang, Yadong; Barlow, Stephen; Marder, Seth R.; Kippelen, Bernard

    2015-08-01

    We demonstrate top-gate organic field-effect transistors (OFETs) with a bilayer gate dielectric and doped contacts fabricated on shape-memory polymer (SMP) substrates. SMPs exhibit large variations in Young's modulus dependent on temperature and have the ability to fix two or more geometric configurations when a proper stimulus is applied. These unique properties make SMPs desirable for three-dimensional shape applications of OFETs. The electrical properties of OFETs on SMP substrates are presented and compared to those of OFETs on traditional glass substrates.

  9. 25th anniversary article: key points for high-mobility organic field-effect transistors.

    Science.gov (United States)

    Dong, Huanli; Fu, Xiaolong; Liu, Jie; Wang, Zongrui; Hu, Wenping

    2013-11-20

    Remarkable progress has been made in developing high performance organic field-effect transistors (OFETs) and the mobility of OFETs has been approaching the values of polycrystalline silicon, meeting the requirements of various electronic applications from electronic papers to integrated circuits. In this review, the key points for development of high mobility OFETs are highlighted from aspects of molecular engineering, process engineering and interface engineering. The importance of other factors, such as impurities and testing conditions is also addressed. Finally, the current challenges in this field for practical applications of OFETs are further discussed. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Ultra Thin Poly-Si Nanosheet Junctionless Field-Effect Transistor with Nickel Silicide Contact.

    Science.gov (United States)

    Lin, Yu-Ru; Tsai, Wan-Ting; Wu, Yung-Chun; Lin, Yu-Hsien

    2017-11-07

    This study demonstrated an ultra thin poly-Si junctionless nanosheet field-effect transistor (JL NS-FET) with nickel silicide contact. For the nickel silicide film, two-step annealing and a Ti capping layer were adopted to form an ultra thin uniform nickel silicide film with low sheet resistance (Rs). The JL NS-FET with nickel silicide contact exhibited favorable electrical properties, including a high driving current (>10⁷A), subthreshold slope (186 mV/dec.), and low parasitic resistance. In addition, this study compared the electrical characteristics of JL NS-FETs with and without nickel silicide contact.

  11. An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

    Science.gov (United States)

    Liu, Ying; He, Jin; Chan, Mansun; Du, Cai-Xia; Ye, Yun; Zhao, Wei; Wu, Wen; Deng, Wan-Ling; Wang, Wen-Ping

    2014-09-01

    An analytical model of gate-all-around (GAA) silicon nanowire tunneling field effect transistors (NW-TFETs) is developted based on the surface potential solutions in the channel direction and considering the band to band tunneling (BTBT) efficiency. The three-dimensional Poisson equation is solved to obtain the surface potential distributions in the partition regions along the channel direction for the NW-TFET, and a tunneling current model using Kane's expression is developed. The validity of the developed model is shown by the good agreement between the model predictions and the TCAD simulation results.

  12. Integrated Materials Design of Organic Semiconductors for Field-Effect Transistors

    KAUST Repository

    Mei, Jianguo

    2013-05-08

    The past couple of years have witnessed a remarkable burst in the development of organic field-effect transistors (OFETs), with a number of organic semiconductors surpassing the benchmark mobility of 10 cm2/(V s). In this perspective, we highlight some of the major milestones along the way to provide a historical view of OFET development, introduce the integrated molecular design concepts and process engineering approaches that lead to the current success, and identify the challenges ahead to make OFETs applicable in real applications. © 2013 American Chemical Society.

  13. Ultra Thin Poly-Si Nanosheet Junctionless Field-Effect Transistor with Nickel Silicide Contact

    Directory of Open Access Journals (Sweden)

    Yu-Ru Lin

    2017-11-01

    Full Text Available This study demonstrated an ultra thin poly-Si junctionless nanosheet field-effect transistor (JL NS-FET with nickel silicide contact. For the nickel silicide film, two-step annealing and a Ti capping layer were adopted to form an ultra thin uniform nickel silicide film with low sheet resistance (Rs. The JL NS-FET with nickel silicide contact exhibited favorable electrical properties, including a high driving current (>107A, subthreshold slope (186 mV/dec., and low parasitic resistance. In addition, this study compared the electrical characteristics of JL NS-FETs with and without nickel silicide contact.

  14. Characteristic Variations of Graphene Field-Effect Transistors Induced by CF4 Gas

    Science.gov (United States)

    Park, Jaehoon; Park, Kun-Sik; Jeong, Ye-Sul; Baek, Kyu-Ha; Kuk Lee, Bong; Kim, Dong-Pyo; Ryu, Jin-Hwa; Do, Lee-Mi; Imamura, Hiroshi; Yase, Kiyoshi; Choi, Jong Sun

    2012-08-01

    The influence of tetrafluoromethane (CF4) gas on the electrical characteristics of monolithic graphene field-effect transistors (FETs) is reported. Compared with the results in nitrogen ambient, FETs in CF4 ambient exhibit a positive shift in the Dirac point voltage and an increase in drain current. These changes are ascribed to the electronegative nature of the fluorine atoms in CF4 gas, which is found to induce p-type doping and excess charge carriers in graphene. The electrical response to CF4 gas exposure demonstrates the feasibility of using monolithic graphene FETs as chemical sensors.

  15. Field-effect transistors based on self-organized molecular nanostripes

    DEFF Research Database (Denmark)

    Cavallini, M.; Stoliare, P.; Moulin, J.-F.

    2005-01-01

    Charge transport properties in organic semiconductors depend strongly on molecular order. Here we demonstrate field-effect transistors where drain current flows through a precisely defined array of nanostripes made of crystalline and highly ordered molecules. The molecular stripes are fabricated ...... by the menisci once the critical concentration is reached and self-organizes into molecularly ordered stripes 100-200 nm wide and a few monolayers high. The charge mobility measured along the stripes is 2 orders of magnitude larger than the values measured for spin-coated thin films....

  16. High temperature study of flexible silicon-on-insulator fin field-effect transistors

    KAUST Repository

    Diab, Amer El Hajj

    2014-09-29

    We report high temperature electrical transport characteristics of a flexible version of the semiconductor industry\\'s most advanced architecture: fin field-effect transistor on silicon-on-insulator with sub-20 nm fins and high-κ/metal gate stacks. Characterization from room to high temperature (150 °C) was completed to determine temperature dependence of drain current (Ids), gate leakage current (Igs), transconductance (gm), and extracted low-field mobility (μ0). Mobility degradation with temperature is mainly caused by phonon scattering. The other device characteristics show insignificant difference at high temperature which proves the suitability of inorganic flexible electronics with advanced device architecture.

  17. The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory.

    Science.gov (United States)

    Zou, Xingqi; Jin, Lei; Jiang, Dandan; Zhang, Yu; Chen, Guoxing; Xia, Zhiliang; Huo, Zongliang

    2018-08-01

    In this work, the GAA (Gate All Around) L-Shaped bottom select transistor (BSG) in 3D NAND Flash Memory has been investigated. Different methods are proposed to optimize its performance from viewpoints of process and structure. BSG in 3D NAND is a novel device structure with two connected transistors: one is horizontal MOSFET (regarded as convention MOSFET) and one is vertical MOSFET (regarded as GAA transistor). With implant dose increasing in vertical channel, BSG Vth has much more tighter Vt distribution, which is beneficial for boosting potential improvement and program disturbance suppression. Meanwhile, BSG corner rounding is proposed to improve the characteristic of BSG. Experiment and TCAD simulation data are matches quite well, giving a way to improve cell characteristics distribution and self-boosting potential control in high density 3D NAND array.

  18. Magnetoresistance of Si(001) MOSFETs with high concentration of electrons

    Czech Academy of Sciences Publication Activity Database

    Smrčka, Ludvík; Makarovsky, O. N.; Schemenchinskii, S. G.; Vašek, Petr; Jurka, Vlastimil

    2004-01-01

    Roč. 22, - (2004), s. 320-323 ISSN 1386-9477. [International Conference on Electronic Properties of Two-Dimensional Systems /15./. Nara, 14.07.2003-18.07.2003] R&D Projects: GA ČR GA202/01/0754; GA ČR GA202/96/0036 Institutional research plan: CEZ:AV0Z1010914 Keywords : Si MOSFET * magnetoresistance * Hall effect Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 0.898, year: 2004

  19. Effect of Dielectric Interface on the Performance of MoS2Transistors.

    Science.gov (United States)

    Li, Xuefei; Xiong, Xiong; Li, Tiaoyang; Li, Sichao; Zhang, Zhenfeng; Wu, Yanqing

    2017-12-27

    Because of their wide bandgap and ultrathin body properties, two-dimensional materials are currently being pursued for next-generation electronic and optoelectronic applications. Although there have been increasing numbers of studies on improving the performance of MoS 2 field-effect transistors (FETs) using various methods, the dielectric interface, which plays a decisive role in determining the mobility, interface traps, and thermal transport of MoS 2 FETs, has not been well explored and understood. In this article, we present a comprehensive experimental study on the effect of high-k dielectrics on the performance of few-layer MoS 2 FETs from 300 to 4.3 K. Results show that Al 2 O 3 /HfO 2 could boost the mobility and drain current. Meanwhile, MoS 2 transistors with Al 2 O 3 /HfO 2 demonstrate a 2× reduction in oxide trap density compared to that of the devices with the conventional SiO 2 substrate. Also, we observe a negative differential resistance effect on the device with 1 μm-channel length when using conventional SiO 2 as the gate dielectric due to self-heating, and this is effectively eliminated by using the Al 2 O 3 /HfO 2 gate dielectric. This dielectric engineering provides a highly viable route to realizing high-performance transition metal dichalcogenide-based FETs.

  20. Temperature sensitivity analysis of polarity controlled electrostatically doped tunnel field-effect transistor

    Science.gov (United States)

    Nigam, Kaushal; Pandey, Sunil; Kondekar, P. N.; Sharma, Dheeraj

    2016-09-01

    The conventional tunnel field-effect transistors (TFETs) have shown potential to scale down in sub-22 nm regime due to its lower sub-threshold slope and robustness against short-channel effects (SCEs), however, sensitivity towards temperature variation is a major concern. Therefore, for the first time, we investigate temperature sensitivity analysis of a polarity controlled electrostatically doped tunnel field-effect transistor (ED-TFET). Different performance metrics and analog/RF figure-of-merits were considered and compared for both devices, and simulations were performed using Silvaco ATLAS device tool. We found that the variation in ON-state current in ED-TFET is almost temperature independent due to electrostatically doped mechanism, while, it increases in conventional TFET at higher temperature. Above room temperature, the variation in ION, IOFF, and SS sensitivity in ED-TFET are only 0.11%/K, 2.21%/K, and 0.63%/K, while, in conventional TFET the variations are 0.43%/K, 2.99%/K, and 0.71%/K, respectively. However, below room temperature, the variation in ED-TFET ION is 0.195%/K compared to 0.27%/K of conventional TFET. Moreover, it is analysed that the incomplete ionization effect in conventional TFET severely affects the drive current and the threshold voltage, while, ED-TFET remains unaffected. Hence, the proposed ED-TFET is less sensitive towards temperature variation and can be used for cryogenics as well as for high temperature applications.

  1. Technical Evaluation of Radiation Dose Delivered in Prostate Cancer Patients as Measured by an Implantable MOSFET Dosimeter

    International Nuclear Information System (INIS)

    Beyer, Gloria P.; Scarantino, Charles W.; Prestidge, Bradley R.; Sadeghi, Amir G.; Anscher, Mitchell S.; Miften, Moyed; Carrea, Tammy B.; Sims, Marianne C.; Black, Robert D.

    2007-01-01

    Purpose: To perform a comparison of the daily measured dose at depth in tissue with the predicted dose values from treatment plans for 29 prostate cancer patients involved in a clinical trial. Methods and Materials: Patients from three clinical sites were implanted with one or two dosimeters in or near the prostatic capsule. The implantable device, known as the DVS, is based on a metal-oxide-semiconductor field effect transistor (MOSFET) detector. A portable telemetric readout system couples to the dosimeter antenna (visible on kilovoltage, computed tomography, and ultrasonography) for data transfer. The predicted dose values were determined by the location of the MOSFET on the treatment planning computed tomography scan. Serial computed tomography images were taken every 2 weeks to evaluate any migration of the device. The clinical protocol did not permit alteration of the treatment parameters using the dosimeter readings. For some patients, one of several image-guided radiotherapy (RT) modalities was used for target localization. Results: The evaluation of dose discrepancy showed that in many patients the standard deviation exceeded the previous values obtained for the dosimeter in a phantom. In some patients, the cumulative dose disagreed with the planned dose by ≥5%. The data presented suggest that an implantable dosimeter can help identify dose discrepancies (random or systematic) for patients treated with external beam RT and could be used as a daily treatment verification tool for image-guided RT and adaptive RT. Conclusion: The results of our study have shown that knowledge of the dose delivered per fraction can potentially prevent over- or under-dosage to the treatment area and increase the accuracy of RT. The implantable dosimeter could also be used as a localizer for image-guided RT

  2. Negative Quantum Capacitance of Carbon Nanotube Field-Effect Transistors

    OpenAIRE

    Latessa, L.; Pecchia, A.; Di Carlo, A.; Lugli, P.

    2004-01-01

    Atomistic density functional theory (DFT) calculations of the capacitance between a metallic cylindric gate and a carbon nanotube (CNT) are reported. Results stressing the predominant effect of quantum capacitance in limiting or even enhancing screening properties of the CNT are shown. Other contributions to the quantum capacitance beyond the electronic density of state (DOS) are pointed out. Negative values of the quantum capacitance are obtained for low-density systems, which correspondingl...

  3. Large-Signal DG-MOSFET Modelling for RFID Rectification

    Directory of Open Access Journals (Sweden)

    R. Rodríguez

    2016-01-01

    Full Text Available This paper analyses the undoped DG-MOSFETs capability for the operation of rectifiers for RFIDs and Wireless Power Transmission (WPT at microwave frequencies. For this purpose, a large-signal compact model has been developed and implemented in Verilog-A. The model has been numerically validated with a device simulator (Sentaurus. It is found that the number of stages to achieve the optimal rectifier performance is inferior to that required with conventional MOSFETs. In addition, the DC output voltage could be incremented with the use of appropriate mid-gap metals for the gate, as TiN. Minor impact of short channel effects (SCEs on rectification is also pointed out.

  4. Development of power MOSFET (150 W class)

    Science.gov (United States)

    Kuboyama, Satoshi; Tamura, Takashi; Uesugi, Masato; Kanno, Tooru

    1992-08-01

    An overview of the power Metal Oxide Semiconductor (MOS) Field Effect Transistor (FET) is presented. Development was being conducted to upgrade radiation resistance without impairing electrical characteristics and to improve chip process design for decreasing on resistance by trading off with switching speed (device capacity) and small package design. Chip design were conducted to decrease the process temperature for increasing total dose resistance, suppress parasitic transistor behavior for augmenting single event resistance, and optimize FET cell structure and dimension for decreasing on resistance. Evaluation test of the trial produced samples was conducted. Package materials were selected and their assembly technologies were established. Evaluation test was conducted especially focusing on the effects of bonding and sealing property, and lead forming. The possibility to provide the engineering model to the JEM (Japanese Experiment Module) project was obtained.

  5. SU-G-IeP3-02: Characteristics of In-Vivo MOSFET Dosimeters for Diagnostic X-Ray Low-Dose Measurements

    Energy Technology Data Exchange (ETDEWEB)

    Li, S; Ali, S; Harper, K; Liang, Q; Serratore, D [Temple University Hospital, Philadelphia, PA (United States)

    2016-06-15

    Purpose: To correct in-vivo metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters dependence on X-ray energy, dose and dose rate, and temperature in order to measure doses or exposures on several anatomic points of interest undergoing some routine radiographs. Methods: A mobile MOSFET system (BEST Medical) was carefully calibrated with X-ray at kVp of 70, 80, 100, 120, and 138 kVp, phantom temperatures at 0, 21, and 43 oC, and exposure range from 0.01 to 10 R confirmed with Raysafe and RadCal dosimeters. The MOSFETS were placed on the midline bladder or uterus, left pelvic iliac artery, left abdominal above iliac crest, abdominal midline anterior at inferior margin of stomach, and left pectoral of a large and a small body-size cadavers undergoing AP/PA chest and lumber spine radiographs using manual and automatic exposure control (AEC) with and without lead shielding. MOSTFETs and TLD chips were also placed on the stomach, sigmoid, pubic symphysis, left and right pelvic walls of another cadaver for AP pelvic manual or AEC radiography prior to and after a left hip metal implant. Results: Individual MOSFET detectors had various low-dose limits in ranged from 0.03 to 0.08 R, nonlinear response to X-ray energy, and significant temperature effect of 15%. By accumulating 10 manual exposures and 20 AEC exposures, we achieved dose measured accuracy of 6%. There were up to 8 fold increases for AEC exposure of spine and chest X-ray procedure from no shielding to with shielding. For pelvic radiography, exposure to public symphysis was the highest even higher than that of the skin. After hip implant, AEC pelvic radiograph increase exposure by 30 to 200% consistent with results of TLDs. Conclusion: Dependence of energy, temperature and dose limit were accurately corrected. We have found significant exposure for those clinical pr°ocedures and the study provided evidences for developing new clinical procedures.

  6. Metal oxide-graphene field-effect transistor: interface trap density extraction model

    Directory of Open Access Journals (Sweden)

    Faraz Najam

    2016-09-01

    Full Text Available A simple to implement model is presented to extract interface trap density of graphene field effect transistors. The presence of interface trap states detrimentally affects the device drain current–gate voltage relationship Ids–Vgs. At the moment, there is no analytical method available to extract the interface trap distribution of metal-oxide-graphene field effect transistor (MOGFET devices. The model presented here extracts the interface trap distribution of MOGFET devices making use of available experimental capacitance–gate voltage Ctot–Vgs data and a basic set of equations used to define the device physics of MOGFET devices. The model was used to extract the interface trap distribution of 2 experimental devices. Device parameters calculated using the extracted interface trap distribution from the model, including surface potential, interface trap charge and interface trap capacitance compared very well with their respective experimental counterparts. The model enables accurate calculation of the surface potential affected by trap charge. Other models ignore the effect of trap charge and only calculate the ideal surface potential. Such ideal surface potential when used in a surface potential based drain current model will result in an inaccurate prediction of the drain current. Accurate calculation of surface potential that can later be used in drain current model is highlighted as a major advantage of the model.

  7. Fabrication and characterization on reduced graphene oxide field effect transistor (RGOFET) based biosensor

    Energy Technology Data Exchange (ETDEWEB)

    Rashid, A. Diyana [School of Microelectronic Engineering, Universiti Malaysia Perlis (UniMAP), Pauh, Perlis (Malaysia); Ruslinda, A. Rahim, E-mail: ruslinda@unimap.edu.my; Fatin, M. F. [Institute of Nano Electronic Engineering, Universiti Malaysia Perlis (UniMAP), 01000 Kangar, Perlis (Malaysia); Hashim, U.; Arshad, M. K. [School of Microelectronic Engineering, Universiti Malaysia Perlis (UniMAP), Pauh, Perlis (Malaysia); Institute of Nano Electronic Engineering, Universiti Malaysia Perlis (UniMAP), 01000 Kangar, Perlis (Malaysia)

    2016-07-06

    The fabrication and characterization on reduced graphene oxide field effect transistor (RGO-FET) were demonstrated using a spray deposition method for biological sensing device purpose. A spray method is a fast, low-cost and simple technique to deposit graphene and the most promising technology due to ideal coating on variety of substrates and high production speed. The fabrication method was demonstrated for developing a label free aptamer reduced graphene oxide field effect transistor biosensor. Reduced graphene oxide (RGO) was obtained by heating on hot plate fixed at various temperatures of 100, 200 and 300°C, respectively. The surface morphology of RGO were examined via atomic force microscopy to observed the temperature effect of produced RGO. The electrical measurement verify the performance of electrical conducting RGO-FET at temperature 300°C is better as compared to other temperature due to the removal of oxygen groups in GO. Thus, reduced graphene oxide was a promising material for biosensor application.

  8. 25th Anniversary Article: Organic Field-Effect Transistors: The Path Beyond Amorphous Silicon

    Science.gov (United States)

    Sirringhaus, Henning

    2014-01-01

    Over the past 25 years, organic field-effect transistors (OFETs) have witnessed impressive improvements in materials performance by 3–4 orders of magnitude, and many of the key materials discoveries have been published in Advanced Materials. This includes some of the most recent demonstrations of organic field-effect transistors with performance that clearly exceeds that of benchmark amorphous silicon-based devices. In this article, state-of-the-art in OFETs are reviewed in light of requirements for demanding future applications, in particular active-matrix addressing for flexible organic light-emitting diode (OLED) displays. An overview is provided over both small molecule and conjugated polymer materials for which field-effect mobilities exceeding > 1 cm2 V–1 s–1 have been reported. Current understanding is also reviewed of their charge transport physics that allows reaching such unexpectedly high mobilities in these weakly van der Waals bonded and structurally comparatively disordered materials with a view towards understanding the potential for further improvement in performance in the future. PMID:24443057

  9. Field Effect Transistor Biosensor Using Antigen Binding Fragment for Detecting Tumor Marker in Human Serum

    Science.gov (United States)

    Cheng, Shanshan; Hotani, Kaori; Hideshima, Sho; Kuroiwa, Shigeki; Nakanishi, Takuya; Hashimoto, Masahiro; Mori, Yasuro; Osaka, Tetsuya

    2014-01-01

    Detection of tumor markers is important for cancer diagnosis. Field-effect transistors (FETs) are a promising method for the label-free detection of trace amounts of biomolecules. However, detection of electrically charged proteins using antibody-immobilized FETs is limited by ionic screening by the large probe molecules adsorbed to the transistor gate surface, reducing sensor responsiveness. Here, we investigated the effect of probe molecule size on the detection of a tumor marker, α-fetoprotein (AFP) using a FET biosensor. We demonstrated that the small receptor antigen binding fragment (Fab), immobilized on a sensing surface as small as 2–3 nm, offers a higher degree of sensitivity and a wider concentration range (100 pg/mL–1 μg/mL) for the FET detection of AFP in buffer solution, compared to the whole antibody. Therefore, the use of a small Fab probe molecule instead of a whole antibody is shown to be effective for improving the sensitivity of AFP detection in FET biosensors. Furthermore, we also demonstrated that a Fab-immobilized FET subjected to a blocking treatment, to avoid non-specific interactions, could sensitively and selectively detect AFP in human serum. PMID:28788579

  10. P-type field effect transistor based on Na-doped BaSnO3

    Science.gov (United States)

    Jang, Yeaju; Hong, Sungyun; Park, Jisung; Char, Kookrin

    We fabricated field effect transistors (FET) based on the p-type Na-doped BaSnO3 (BNSO) channel layer. The properties of epitaxial BNSO channel layer were controlled by the doping rate. In order to modulate the p-type FET, we used amorphous HfOx and epitaxial BaHfO3 (BHO) gate oxides, both of which have high dielectric constants. HfOx was deposited by atomic-layer-deposition and BHO was epitaxially grown by pulsed laser deposition. The pulsed laser deposited SrRuO3 (SRO) was used as the source and the drain contacts. Indium-tin oxide and La-doped BaSnO3 were used as the gate electrodes on top of the HfOx and the BHO gate oxides, respectively. We will analyze and present the performances of the BNSO field effect transistor such as the IDS-VDS, the IDS-VGS, the Ion/Ioff ratio, and the field effect mobility. Samsung Science and Technology Foundation.

  11. Organosilicon derivatives of BTBT for monolayer organic field effect transistors

    Science.gov (United States)

    Agina, Elena V.; Polinskaya, Marina S.; Trul, Askold A.; Chekusova, Viktoria P.; Sizov, Alexey S.; Borshchev, Oleg V.; Ponomarenko, Sergey A.

    2017-08-01

    Synthesis of novel organosilicon derivatives of [1]benzothieno[3,2-b][1]-benzothiophene (BTBT) linked though flexible aliphatic spacers to a disiloxane anchor group is reported. They were successfully used in monolayer OFETs with the charge carrier mobilities up to 0.02 cm2 /Vs, threshold voltage close to 0 V and On/Off ratio up to 10,000. Influence of the chemical structure of the molecules synthesized on the morphology, molecular 2D ordering in the monolayers and their semiconducting properties is considered. The effect of different methods of the ultrathin semiconducting layer preparation, such as Langmuir-Blodgett, Langmuir-Schaefer, spin coating or doctor blade, on the OFET performance is discussed.

  12. Superconducting transistor

    International Nuclear Information System (INIS)

    Gray, K.E.

    1978-01-01

    A three film superconducting tunneling device, analogous to a semiconductor transistor, is presented, including a theoretical description and experimental results showing a current gain of four. Much larger current gains are shown to be feasible. Such a development is particularly interesting because of its novelty and the striking analogies with the semiconductor junction transistor

  13. Large-signal model of the bilayer graphene field-effect transistor targeting radio-frequency applications: Theory versus experiment

    Energy Technology Data Exchange (ETDEWEB)

    Pasadas, Francisco, E-mail: Francisco.Pasadas@uab.cat; Jiménez, David [Departament d' Enginyeria Electrònica, Escola d' Enginyeria, Universitat Autònoma de Barcelona, 08193 Bellaterra (Spain)

    2015-12-28

    Bilayer graphene is a promising material for radio-frequency transistors because its energy gap might result in a better current saturation than the monolayer graphene. Because the great deal of interest in this technology, especially for flexible radio-frequency applications, gaining control of it requires the formulation of appropriate models for the drain current, charge, and capacitance. In this work, we have developed them for a dual-gated bilayer graphene field-effect transistor. A drift-diffusion mechanism for the carrier transport has been considered coupled with an appropriate field-effect model taking into account the electronic properties of the bilayer graphene. Extrinsic resistances have been included considering the formation of a Schottky barrier at the metal-bilayer graphene interface. The proposed model has been benchmarked against experimental prototype transistors, discussing the main figures of merit targeting radio-frequency applications.

  14. Nonlinear Parasitic Capacitance Modelling of High Voltage Power MOSFETs in Partial SOI Process

    DEFF Research Database (Denmark)

    Fan, Lin; Knott, Arnold; Jørgensen, Ivan Harald Holger

    2016-01-01

    : off-state, sub-threshold region, and on-state in the linear region. A high voltage power MOSFET is designed in a partial Silicon on Insulator (SOI) process, with the bulk as a separate terminal. 3D plots and contour plots of the capacitances versus bias voltages for the transistor summarize......State-of-the-art power converter topologies such as resonant converters are either designed with or affected by the parasitic capacitances of the power switches. However, the power switches are conventionally characterized in terms of switching time and/or gate charge with little insight...

  15. Electrochemical Field-Effect Transistor Utilization to Study the Coupling Success Rate of Photosynthetic Protein Complexes to Cytochrome c.

    Science.gov (United States)

    Takshi, Arash; Yaghoubi, Houman; Wang, Jing; Jun, Daniel; Beatty, J Thomas

    2017-03-30

    Due to the high internal quantum efficiency, reaction center (RC) proteins from photosynthetic organisms have been studied in various bio-photoelectrochemical devices for solar energy harvesting. In vivo, RC and cytochrome c (cyt c ; a component of the biological electron transport chain) can form a cocomplex via interprotein docking. This mechanism can be used in vitro for efficient electron transfer from an electrode to the RC in a bio-photoelectrochemical device. Hence, the success rate in coupling RCs to cyt c is of great importance for practical applications in the future. In this work, we use an electrochemical transistor to study the binding of the RC to cytochrome. The shift in the transistor threshold voltage was measured in the dark and under illumination to estimate the density of cytochrome and coupled RCs on the gate of the transistor. The results show that ~33% of the cyt c s on the transistor gate were able to effectively couple with RCs. Due to the high sensitivity of the transistor, the approach can be used to make photosensors for detecting low light intensities.

  16. Single electron transistor with P-type sidewall spacer gates.

    Science.gov (United States)

    Lee, Jung Han; Li, Dong Hua; Lee, Joung-Eob; Kang, Kwon-Chil; Kim, Kyungwan; Park, Byung-Gook

    2011-07-01

    A single-electron transistor (SET) is one of the promising solutions to overcome the scaling limit of the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET). Up to now, various kinds of SETs are being proposed and SETs with a dual gate (DG) structure using an electrical potential barrier have been demonstrated for room temperature operation. To operate DG-SETs, however, extra bias of side gates is necessary. It causes new problems that the electrode for side gates and the extra bias for electrical barrier increase the complexity in circuit design and operation power consumption, respectively. For the reason, a new mechanism using work function (WF) difference is applied to operate a SET at room temperature by three electrodes. Its structure consists of an undoped active region, a control gate, n-doped source/drain electrodes, and metal/silicide or p-type silicon side gates, and a SET with metal/silicide gates or p-type silicon gates forms tunnel barriers induced by work function between an undoped channel and grounded side gates. Via simulation, the effectiveness of the new mechanism is confirmed through various silicide materials that have different WF values. Furthermore, by considering the realistic conditions of the fabrication process, SET with p-type sidewall spacer gates was designed, and its brief fabrication process was introduced. The characteristics of its electrical barrier and the controllability of its control gate were also confirmed via simulation. Finally, a single-hole transistor with n-type sidewall spacer gates was designed.

  17. Gate controlled magnetoresistance in a silicon metal-oxide-semiconductor field-effect-transistor

    Czech Academy of Sciences Publication Activity Database

    Ciccarelli, C.; Park, B.G.; Ogawa, S.; Ferguson, A.J.; Wunderlich, Joerg

    2010-01-01

    Roč. 97, č. 8 (2010), 082106/1-082106/3 ISSN 0003-6951 Institutional research plan: CEZ:AV0Z10100521 Keywords : MOSFET Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.820, year: 2010

  18. Photojunction Field-Effect Transistor Based on a Colloidal Quantum Dot Absorber Channel Layer

    KAUST Repository

    Adinolfi, Valerio

    2015-01-27

    © 2015 American Chemical Society. The performance of photodetectors is judged via high responsivity, fast speed of response, and low background current. Many previously reported photodetectors based on size-tuned colloidal quantum dots (CQDs) have relied either on photodiodes, which, since they are primary photocarrier devices, lack gain; or photoconductors, which provide gain but at the expense of slow response (due to delayed charge carrier escape from sensitizing centers) and an inherent dark current vs responsivity trade-off. Here we report a photojunction field-effect transistor (photoJFET), which provides gain while breaking prior photoconductors\\' response/speed/dark current trade-off. This is achieved by ensuring that, in the dark, the channel is fully depleted due to a rectifying junction between a deep-work-function transparent conductive top contact (MoO3) and a moderately n-type CQD film (iodine treated PbS CQDs). We characterize the rectifying behavior of the junction and the linearity of the channel characteristics under illumination, and we observe a 10 μs rise time, a record for a gain-providing, low-dark-current CQD photodetector. We prove, using an analytical model validated using experimental measurements, that for a given response time the device provides a two-orders-of-magnitude improvement in photocurrent-to-dark-current ratio compared to photoconductors. The photoJFET, which relies on a junction gate-effect, enriches the growing family of CQD photosensitive transistors.

  19. Steep switching devices for low power applications: negative differential capacitance/resistance field effect transistors

    Science.gov (United States)

    Ko, Eunah; Shin, Jaemin; Shin, Changhwan

    2018-01-01

    Simply including either single ferroelectric oxide layer or threshold selector, we can make conventional field effect transistor to have super steep switching characteristic, i.e., sub-60-mV/decade of subthreshold slope. One of the representative is negative capacitance FET (NCFET), in which a ferroelectric layer is added within its gate stack. The other is phase FET (i.e., negative resistance FET), in which a threshold selector is added to an electrode (e.g., source or drain) of conventional field effect transistor. Although the concept of the aforementioned two devices was presented more or less recently, numerous studies have been published. In this review paper, by reviewing the published studies over the last decade, we shall de-brief and discuss the history and the future perspectives of NCFET/phase FET, respectively. The background, experimental investigation, and future direction for developing the aforementioned two representative steep switching devices (i.e., NCFET and phase FET/negative resistance FET) are to be discussed in detail.

  20. Charge transport behavior of benodithiophene-diketopyrrololpyrrole-based conjugated polymer in organic field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Park, Jin Kuen [Dept. of Chemistry, Hankuk University of Foreign Studies, Yongin (Korea, Republic of)

    2015-07-15

    Organic optoelectronic devices, such as light-emitting diodes, organic solar cells (OSCs), and organic field effect transistors (OFETs), have emerged due to the development of π-conjugated polymers. Because the delocalized π-framework can significantly reduce the energy gap between the highest-occupied molecular orbital (HOMO) and the lowest-unoccupied molecular orbital (LUMO), their intrinsic optoelectronic properties can be tunable with their conjugation length in terms of average molecular weights and their π-backbone structures. The new type of low bandgap conjugated polymer (P1) has been successively polymerized via a palladium- catalyzed Stille cross-coupling reaction with bis-ethylhexyl BDT and bis-n-decane DPP. With a linear alkyl chain in the DPP units, the intermolecular packing structure was thought to be enhanced by proving the UV–Vis and UPS spectra. In addition, the electronic properties of P1 via field-effect transistors well illustrate the typical p-type semiconducting property without showing the significant improvement by thermal annealing. From a broader perspective, this research indicates that a wider choice of linear alkyl chain length in DPP units and modification of the interface between dielectric and active layers should be sought to further optimize device performance. Hence, progressive works with the strategy presented in this report will be pursued to address the different challenges in attaining target OFET performances.