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Sample records for digital signal processors

  1. Digital control card based on digital signal processor

    International Nuclear Information System (INIS)

    Hou Shigang; Yin Zhiguo; Xia Le

    2008-01-01

    A digital control card based on digital signal processor was developed. Two Freescale DSP-56303 processors were utilized to achieve 3 channels proportional- integral-differential regulations. The card offers high flexibility for 100 MeV cyclotron RF system development. It was used as feedback controller in low level radio frequency control prototype, with the feedback gain parameters continuously adjustable. By using high precision analog to digital converter with 500 kHz sampling rate, a regulation bandwidth of 20 kHz was achieved. (authors)

  2. Digital signal processor for silicon audio playback devices; Silicon audio saisei kikiyo digital signal processor

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2000-03-01

    The digital audio signal processor (DSP) TC9446F series has been developed silicon audio playback devices with a memory medium of, e.g., flash memory, DVD players, and AV devices, e.g., TV sets. It corresponds to AAC (advanced audio coding) (2ch) and MP3 (MPEG1 Layer3), as the audio compressing techniques being used for transmitting music through an internet. It also corresponds to compressed types, e.g., Dolby Digital, DTS (digital theater system) and MPEG2 audio, being adopted for, e.g., DVDs. It can carry a built-in audio signal processing program, e.g., Dolby ProLogic, equalizer, sound field controlling, and 3D sound. TC9446XB has been lined up anew. It adopts an FBGA (fine pitch ball grid array) package for portable audio devices. (translated by NEDO)

  3. Digital Signal Processor System for AC Power Drivers

    Directory of Open Access Journals (Sweden)

    Ovidiu Neamtu

    2009-10-01

    Full Text Available DSP (Digital Signal Processor is the bestsolution for motor control systems to make possible thedevelopment of advanced motor drive systems. The motorcontrol processor calculates the required motor windingvoltage magnitude and frequency to operate the motor atthe desired speed. A PWM (Pulse Width Modulationcircuit controls the on and off duty cycle of the powerinverter switches to vary the magnitude of the motorvoltages.

  4. The study of image processing of parallel digital signal processor

    International Nuclear Information System (INIS)

    Liu Jie

    2000-01-01

    The author analyzes the basic characteristic of parallel DSP (digital signal processor) TMS320C80 and proposes related optimized image algorithm and the parallel processing method based on parallel DSP. The realtime for many image processing can be achieved in this way

  5. Single particle irradiation effect of digital signal processor

    International Nuclear Information System (INIS)

    Fan Si'an; Chen Kenan

    2010-01-01

    The single particle irradiation effect of high energy neutron on digital signal processor TMS320P25 in dynamic working condition has been studied. The influence of the single particle on the device has been explored through the acquired waveform and working current of TMS320P25. Analysis results, test data and test methods have also been presented. (authors)

  6. Digital signal array processor for NSLS booster power supply upgrade

    International Nuclear Information System (INIS)

    Olsen, R.; Dabrowski, J.; Murray, J.

    1993-01-01

    The booster at the NSLS is being upgraded from 0.75 to 2 pulses per second. To accomplish this, new power supplied for the dipole, quadrupole, and sextupole have been installed. This paper will outline the design and function of the digital signal processor used as the primary control element in the power supply control system

  7. Eight-Channel Digital Signal Processor and Universal Trigger Module

    Science.gov (United States)

    Skulski, Wojtek; Wolfs, Frank

    2003-04-01

    A 10-bit, 8-channel, 40 megasamples per second digital signal processor and waveform digitizer DDC-8 (nicknamed Universal Trigger Module) is presented. The digitizer features 8 analog inputs, 1 analog output for a reconstructed analog waveform, 16 NIM logic inputs, 8 NIM logic outputs, and a pool of 16 TTL logic lines which can be individually configured as either inputs or outputs. The first application of this device is to enhance the present trigger electronics for PHOBOS at RHIC. The status of the development and the first results are presented. Possible applications of the new device are discussed. Supported by the NSF grant PHY-0072204.

  8. Interference and protection of electromagnetic pulse to digital signal processor

    International Nuclear Information System (INIS)

    Wang Yan; Jiao Hongling; He Shanhong; Pan Chao; Feng Deren; Che Wenquan; Xiong Ying

    2013-01-01

    The effective electromagnetic pulse protection is studied in this paper, first the interference of electromagnetic pulse simulator path is analyzed, including the digital signal processor (DSP) and the discharge circuit of coupling interference and net electricity coupling interference. Using the structure optimization design, the hardware block reinforcement measurement and the setting of open software trap, and the watchdog anti-jamming measures, the interference test is completed such as the central processor core voltage of DSP, input/output (I/O) ports of DSP and the display screen. The experimental results show that the combination of hardware and software protection reinforcement technology is effective, and the interference pulse amplitude of DSP board I/O port and the kernel work voltage are reduced, and the interference duration is reduced from 2 μs to 400 ns. The interference pulse is effectively restrained. (authors)

  9. Analyzing gigahertz bunch length instabilities with a digital signal processor

    International Nuclear Information System (INIS)

    Stege, R.E. Jr.; Krejcik, P.; Minty, M.G.

    1992-11-01

    A bunch length instability, nicknamed the ''sawtooth'', because of its transient behavior, has been observed at high current running in the Stanford Linear Collider (SLC) electron damping ring. The incompatibility of this instability with successful SLC naming prompted its study using a high bandwidth real-time spectrum analyzer, the Tektronix 3052 digital signal processor (DSP) system. This device has been used to study energy ramping in storage rings but this is the first time it has been used to study transient instability phenomena. It is a particularly valuable tool for use in understanding non-linear, multiple frequency phenomena. The frequency range of this device has been extended through the use of radio frequency (RF) down converters. This paper describes the measurement setup and presents some of the results

  10. Reconfigurable signal processor designs for advanced digital array radar systems

    Science.gov (United States)

    Suarez, Hernan; Zhang, Yan (Rockee); Yu, Xining

    2017-05-01

    The new challenges originated from Digital Array Radar (DAR) demands a new generation of reconfigurable backend processor in the system. The new FPGA devices can support much higher speed, more bandwidth and processing capabilities for the need of digital Line Replaceable Unit (LRU). This study focuses on using the latest Altera and Xilinx devices in an adaptive beamforming processor. The field reprogrammable RF devices from Analog Devices are used as analog front end transceivers. Different from other existing Software-Defined Radio transceivers on the market, this processor is designed for distributed adaptive beamforming in a networked environment. The following aspects of the novel radar processor will be presented: (1) A new system-on-chip architecture based on Altera's devices and adaptive processing module, especially for the adaptive beamforming and pulse compression, will be introduced, (2) Successful implementation of generation 2 serial RapidIO data links on FPGA, which supports VITA-49 radio packet format for large distributed DAR processing. (3) Demonstration of the feasibility and capabilities of the processor in a Micro-TCA based, SRIO switching backplane to support multichannel beamforming in real-time. (4) Application of this processor in ongoing radar system development projects, including OU's dual-polarized digital array radar, the planned new cylindrical array radars, and future airborne radars.

  11. Using a digital signal processor as a data stream controller for digital subtraction angiography

    International Nuclear Information System (INIS)

    Meng, J.D.; Katz, J.E.

    1991-10-01

    High speed, flexibility, and good arithmetic abilities make digital signal processors (DSP) a good choice as input/output controllers for real time applications. The DSP can be made to pre-process data in real time to reduce data volume, to open early windows on what is being acquired and to implement local servo loops. We present an example of a DSP as an input/output controller for a digital subtraction angiographic imaging system. The DSP pre-processes the raw data, reducing data volume by a factor of two, and is potentially capable of producing real-time subtracted images for immediate display

  12. TMS320C25 Digital Signal Processor For 2-Dimensional Fast Fourier Transform Computation

    International Nuclear Information System (INIS)

    Ardisasmita, M. Syamsa

    1996-01-01

    The Fourier transform is one of the most important mathematical tool in signal processing and analysis, which converts information from the time/spatial domain into the frequency domain. Even with implementation of the Fast Fourier Transform algorithms in imaging data, the discrete Fourier transform execution consume a lot of time. Digital signal processors are designed specifically to perform computation intensive digital signal processing algorithms. By taking advantage of the advanced architecture. parallel processing, and dedicated digital signal processing (DSP) instruction sets. This device can execute million of DSP operations per second. The device architecture, characteristics and feature suitable for fast Fourier transform application and speed-up are discussed

  13. Loss-Free Counting with Digital Signal Processors

    International Nuclear Information System (INIS)

    Markku Koskelo; Dave Hall; Martin Moslinger

    2000-01-01

    Loss-free-counting (LFC) techniques have frequently been used with traditional analog pulse processing systems to compensate for the time or pulses lost when a spectroscopy system is unavailable (busy) for processing an accepted pulse. With the availability of second-generation digital signal processing (DSP) electronics that offer a significantly improved performance for both high and low count rate applications, the LFC technique has been revisited. Specific attention was given to the high and ultra-high count rate behavior, using high-purity germanium (HPGe) detectors with both transistor reset preamplifiers (TRP) and conventional RC preamplifiers. The experiments conducted for this work show that the known LFC techniques further benefit when combined with modern DSP pulse shaping

  14. Floating-to-Fixed-Point Conversion for Digital Signal Processors

    Directory of Open Access Journals (Sweden)

    Menard Daniel

    2006-01-01

    Full Text Available Digital signal processing applications are specified with floating-point data types but they are usually implemented in embedded systems with fixed-point arithmetic to minimise cost and power consumption. Thus, methodologies which establish automatically the fixed-point specification are required to reduce the application time-to-market. In this paper, a new methodology for the floating-to-fixed point conversion is proposed for software implementations. The aim of our approach is to determine the fixed-point specification which minimises the code execution time for a given accuracy constraint. Compared to previous methodologies, our approach takes into account the DSP architecture to optimise the fixed-point formats and the floating-to-fixed-point conversion process is coupled with the code generation process. The fixed-point data types and the position of the scaling operations are optimised to reduce the code execution time. To evaluate the fixed-point computation accuracy, an analytical approach is used to reduce the optimisation time compared to the existing methods based on simulation. The methodology stages are described and several experiment results are presented to underline the efficiency of this approach.

  15. Floating-to-Fixed-Point Conversion for Digital Signal Processors

    Science.gov (United States)

    Menard, Daniel; Chillet, Daniel; Sentieys, Olivier

    2006-12-01

    Digital signal processing applications are specified with floating-point data types but they are usually implemented in embedded systems with fixed-point arithmetic to minimise cost and power consumption. Thus, methodologies which establish automatically the fixed-point specification are required to reduce the application time-to-market. In this paper, a new methodology for the floating-to-fixed point conversion is proposed for software implementations. The aim of our approach is to determine the fixed-point specification which minimises the code execution time for a given accuracy constraint. Compared to previous methodologies, our approach takes into account the DSP architecture to optimise the fixed-point formats and the floating-to-fixed-point conversion process is coupled with the code generation process. The fixed-point data types and the position of the scaling operations are optimised to reduce the code execution time. To evaluate the fixed-point computation accuracy, an analytical approach is used to reduce the optimisation time compared to the existing methods based on simulation. The methodology stages are described and several experiment results are presented to underline the efficiency of this approach.

  16. A digital signal processor based rf control system for the TRIUMF ISAC RFQ prototype

    International Nuclear Information System (INIS)

    Fong, K.; Fang, S.; Laverty, M.

    1996-01-01

    A stand alone digital signal processor is used to control the RFQ prototype in the TRIUMF ISAC development program. The advantage of a digital control system over the traditional analogue system is that it offers the higher degree of flexibility necessary for a development system. For this application the system is designed to have the outward appearance of an analogue system, and uses dials, knobs, and switches as the operator interface. The digital signal processor is used as a feedback controller during CW rf operation, with the feedback gain parameters continually adjustable. It is also able to perform the same regulation during pulsed operation, with additional feedforward compensation for initial pulse on duration. Using a low cost analogue-to-digital converter with a sample rate of 100 kHz, a regulation bandwidth of 10 kHz is achieved. (author)

  17. Characterization of three digital signal processor systems used in gamma ray spectrometry

    International Nuclear Information System (INIS)

    Reguigui, N.; Morel, J.; Ben Kraiem, H.; Mahjoub, A.

    2002-01-01

    Various manufacturers have recently introduced digital signal processing systems that allow data acquisition in gamma spectrometry at high-input counting rates (several thousand pulses per second). In these systems, the signal digitization is performed immediately following the preamplification stage. This allows digital shaping and filtering of the signal which increases the number of possible combinations in signal shaping and as a consequence, optimizes the resolution as a function of the detector characteristics and the counting rate. Basic characteristic parameters of three digital signal processors that were recently introduced in the market have been studied and compared to those of an analog system. This study is carried out using a hyper-pure coaxial type germanium detector and 57 Co, 60 Co and 137 Cs radioactive sources. Performance parameters such as energy resolution, system throughput, and counting losses that are due to dead time and pile-up effects are presented and discussed

  18. A Fast DCT Algorithm for Watermarking in Digital Signal Processor

    Directory of Open Access Journals (Sweden)

    S. E. Tsai

    2017-01-01

    Full Text Available Discrete cosine transform (DCT has been an international standard in Joint Photographic Experts Group (JPEG format to reduce the blocking effect in digital image compression. This paper proposes a fast discrete cosine transform (FDCT algorithm that utilizes the energy compactness and matrix sparseness properties in frequency domain to achieve higher computation performance. For a JPEG image of 8×8 block size in spatial domain, the algorithm decomposes the two-dimensional (2D DCT into one pair of one-dimensional (1D DCTs with transform computation in only 24 multiplications. The 2D spatial data is a linear combination of the base image obtained by the outer product of the column and row vectors of cosine functions so that inverse DCT is as efficient. Implementation of the FDCT algorithm shows that embedding a watermark image of 32 × 32 block pixel size in a 256 × 256 digital image can be completed in only 0.24 seconds and the extraction of watermark by inverse transform is within 0.21 seconds. The proposed FDCT algorithm is shown more efficient than many previous works in computation.

  19. A longitudinal multi-bunch feedback system using parallel digital signal processors

    International Nuclear Information System (INIS)

    Sapozhnikov, L.; Fox, J.D.; Olsen, J.J.; Oxoby, G.; Linscott, I.; Drago, A.; Serio, M.

    1994-01-01

    A programmable longitudinal feedback system based on four AT ampersand T 1610 digital signal processors has been developed as a component of the PEP-II R ampersand D program. This longitudinal quick prototype is a proof of concept for the PEP-II system and implements full-speed bunch-by-bunch signal processing for storage rings with bunch spacings of 4 ns. The design incorporates a phase-detector-based front end that digitizes the oscillation phases of bunches at the 250 MHz crossing rate, four programmable signal processors that compute correction signals, and a 250-MHz hold buffer/kicker driver stage that applies correction signals back on the beam. The design implements a general-purpose, table-driven downsampler that allows the system to be operated at several accelerator facilities. The hardware architecture of the signal processing is described, and the software algorithms used in the feedback signal computation are discussed. The system configuration used for tests at the LBL Advanced Light Source is presented

  20. Real Time Phase Noise Meter Based on a Digital Signal Processor

    Science.gov (United States)

    Angrisani, Leopoldo; D'Arco, Mauro; Greenhall, Charles A.; Schiano Lo Morille, Rosario

    2006-01-01

    A digital signal-processing meter for phase noise measurement on sinusoidal signals is dealt with. It enlists a special hardware architecture, made up of a core digital signal processor connected to a data acquisition board, and takes advantage of a quadrature demodulation-based measurement scheme, already proposed by the authors. Thanks to an efficient measurement process and an optimized implementation of its fundamental stages, the proposed meter succeeds in exploiting all hardware resources in such an effective way as to gain high performance and real-time operation. For input frequencies up to some hundreds of kilohertz, the meter is capable both of updating phase noise power spectrum while seamlessly capturing the analyzed signal into its memory, and granting as good frequency resolution as few units of hertz.

  1. A fast continuous magnetic field measurement system based on digital signal processors

    Energy Technology Data Exchange (ETDEWEB)

    Velev, G.V.; Carcagno, R.; DiMarco, J.; Kotelnikov, S.; Lamm, M.; Makulski, A.; /Fermilab; Maroussov, V.; /Purdue U.; Nehring, R.; Nogiec, J.; Orris, D.; /Fermilab; Poukhov,; Prakoshyn, F.; /Dubna, JINR; Schlabach, P.; Tompkins, J.C.; /Fermilab

    2005-09-01

    In order to study dynamic effects in accelerator magnets, such as the decay of the magnetic field during the dwell at injection and the rapid so-called ''snapback'' during the first few seconds of the resumption of the energy ramp, a fast continuous harmonics measurement system was required. A new magnetic field measurement system, based on the use of digital signal processors (DSP) and Analog to Digital (A/D) converters, was developed and prototyped at Fermilab. This system uses Pentek 6102 16 bit A/D converters and the Pentek 4288 DSP board with the SHARC ADSP-2106 family digital signal processor. It was designed to acquire multiple channels of data with a wide dynamic range of input signals, which are typically generated by a rotating coil probe. Data acquisition is performed under a RTOS, whereas processing and visualization are performed under a host computer. Firmware code was developed for the DSP to perform fast continuous readout of the A/D FIFO memory and integration over specified intervals, synchronized to the probe's rotation in the magnetic field. C, C++ and Java code was written to control the data acquisition devices and to process a continuous stream of data. The paper summarizes the characteristics of the system and presents the results of initial tests and measurements.

  2. A fast continuous magnetic field measurement system based on digital signal processors

    International Nuclear Information System (INIS)

    Velev, G.V.; Carcagno, R.; DiMarco, J.; Kotelnikov, S.; Lamm, M.; Makulski, A.; Maroussov, V.; Nehring, R.; Nogiec, J.; Orris, D.; Poukhov, O.; Prakoshyn, F.; Schlabach, P.; Tompkins, J.C.

    2005-01-01

    In order to study dynamic effects in accelerator magnets, such as the decay of the magnetic field during the dwell at injection and the rapid so-called ''snapback'' during the first few seconds of the resumption of the energy ramp, a fast continuous harmonics measurement system was required. A new magnetic field measurement system, based on the use of digital signal processors (DSP) and Analog to Digital (A/D) converters, was developed and prototyped at Fermilab. This system uses Pentek 6102 16 bit A/D converters and the Pentek 4288 DSP board with the SHARC ADSP-2106 family digital signal processor. It was designed to acquire multiple channels of data with a wide dynamic range of input signals, which are typically generated by a rotating coil probe. Data acquisition is performed under a RTOS, whereas processing and visualization are performed under a host computer. Firmware code was developed for the DSP to perform fast continuous readout of the A/D FIFO memory and integration over specified intervals, synchronized to the probe's rotation in the magnetic field. C, C++ and Java code was written to control the data acquisition devices and to process a continuous stream of data. The paper summarizes the characteristics of the system and presents the results of initial tests and measurements

  3. Digital signal processors for cryogenic high-resolution x-ray detector readout

    International Nuclear Information System (INIS)

    Friedrich, Stephan; Drury, Owen B.; Bechstein, Sylke; Hennig, Wolfgang; Momayezi, Michael

    2003-01-01

    We are developing fast digital signal processors (DSPs) to read out superconducting high-resolution X-ray detectors with on-line pulse processing. For superconducting tunnel junction (STJ) detector read-out, the DSPs offer online filtering, rise time discrimination and pile-up rejection. Compared to analog pulse processing, DSP readout somewhat degrades the detector resolution, but improves the spectral purity of the detector response. We discuss DSP performance with our 9-channel STJ array for synchrotron-based high-resolution X-ray spectroscopy. (author)

  4. A Dual Digital Signal Processor VME Board for Instrumentation and Control Applications

    International Nuclear Information System (INIS)

    H. Dong; R. Flood; C. Hovater; J. Musson

    2001-01-01

    A Dual Digital Signal Processing VME Board is being developed for the CEBAF Beam Current Monitor system at Jefferson Lab. It is a versatile general-purpose digital signal processing board using an open architecture, which allows for adaptation to various applications. The base design uses two independent Texas Instrument (TI) TMS320C6711, which are 900 MFLOPS floating-point digital signal processors (DSP). Applications that require a fixed point DSP can be implemented by replacing the baseline DSP with the pin-for-pin compatible TMS320C6211. Both parallel and serial protocols have been implemented for communicating with off board devices. The initial implementation makes use of TI Multi-channel Serial protocol and VME bus protocol. Other communication protocols can be implemented by reprogramming the FPGA. Each DSP is equipped with FLASH PROM and SDRAM for program and data storage. Additionally, each DSP has 16 bits of digital I/O, two digital analog converters, and two analog to digital converters. Dual 160 pins mezzanine connectors provide expansion capability without design modifications. The mezzanine interface conforms to the TI Expansion Daughter Card Interface standard. The design can be manufactured with a reduced chip set without redesigning the printed circuit board. For example, it can be implemented as a single-channel DSP with no analog I/O. The board supports JTAG 1149 boundary scan to facilitate testing, debugging, and programming. It is fully programmable using software development tools such as TI Code Composer Studio and a JTAG emulator such as Spectrum Digital DS510PP-PLUS. Using these tools allows one program the flash memory and FPGA through the JTAG ports, thus eliminating the need for a separate ROM/FPGA programmer. This work supported by U.S. DOE Contract No. DE-AC05-84ER40150

  5. Real time implementation of a linear predictive coding algorithm on digital signal processor DSP32C

    International Nuclear Information System (INIS)

    Sheikh, N.M.; Usman, S.R.; Fatima, S.

    2002-01-01

    Pulse Code Modulation (PCM) has been widely used in speech coding. However, due to its high bit rate. PCM has severe limitations in application where high spectral efficiency is desired, for example, in mobile communication, CD quality broadcasting system etc. These limitation have motivated research in bit rate reduction techniques. Linear predictive coding (LPC) is one of the most powerful complex techniques for bit rate reduction. With the introduction of powerful digital signal processors (DSP) it is possible to implement the complex LPC algorithm in real time. In this paper we present a real time implementation of the LPC algorithm on AT and T's DSP32C at a sampling frequency of 8192 HZ. Application of the LPC algorithm on two speech signals is discussed. Using this implementation , a bit rate reduction of 1:3 is achieved for better than tool quality speech, while a reduction of 1.16 is possible for speech quality required in military applications. (author)

  6. A new ion detector array and digital-signal-processor-based interface

    International Nuclear Information System (INIS)

    Langstaff, D.P.; McGinnity, T.M.; Forbes, D.M.; Birkinshaw, K.; Lawton, M.W.

    1994-01-01

    A new one-dimensional ion detector array on a silicon chip has been developed for use in mass spectrometry. It is much smaller and simpler than electro-optical arrays currently in use and in addition has a higher resolution and a zero noise level. The array consists of a one-dimensional array of metal strips (electrodes) with a pitch of 25 μm on the top surface of a silicon chip, each electrode having its own charge pulse sensor, 8-bit counter and control/interface circuitry. The chip is mounted on a ceramic substrate and is preceded by a micro-channel plate electron multiplier. Chips are butted to give a longer array. Test results show a stable operating region. A digital-signal-processor-based interface is described, which controls the mode of operation and reads the accumulated array data at the maximum rate to avoid counter overflow. (author)

  7. A new ion detector array and digital-signal-processor-based interface

    Energy Technology Data Exchange (ETDEWEB)

    Langstaff, D.P.; McGinnity, T.M.; Forbes, D.M.; Birkinshaw, K. (University Coll. of Wales, Aberystwyth (United Kingdom). Dept. of Physics); Lawton, M.W. (University of Wales Aberystwyth (United Kingdom). Dept. of Computer Science)

    1994-04-01

    A new one-dimensional ion detector array on a silicon chip has been developed for use in mass spectrometry. It is much smaller and simpler than electro-optical arrays currently in use and in addition has a higher resolution and a zero noise level. The array consists of a one-dimensional array of metal strips (electrodes) with a pitch of 25 [mu]m on the top surface of a silicon chip, each electrode having its own charge pulse sensor, 8-bit counter and control/interface circuitry. The chip is mounted on a ceramic substrate and is preceded by a micro-channel plate electron multiplier. Chips are butted to give a longer array. Test results show a stable operating region. A digital-signal-processor-based interface is described, which controls the mode of operation and reads the accumulated array data at the maximum rate to avoid counter overflow. (author).

  8. Use of Digital Signal Processors (DSP) in high energy physics experiments

    International Nuclear Information System (INIS)

    Crosetto, D.

    1988-01-01

    The FDDP - Fast Digital Data Processor - is a modular system for executing parallel digital processing algorithms to perform programmable trigger decisions or programmable on-line data reduction. Typical application involve zero suppression and pulse shape analysis. The characteristics of the system are: modularity, expandability and flexibility. (author). 4 refs, 5 figs

  9. Design and evaluation of an architecture for a digital signal processor for instrumentation applications

    Science.gov (United States)

    Fellman, Ronald D.; Kaneshiro, Ronald T.; Konstantinides, Konstantinos

    1990-03-01

    The authors present the design and evaluation of an architecture for a monolithic, programmable, floating-point digital signal processor (DSP) for instrumentation applications. An investigation of the most commonly used algorithms in instrumentation led to a design that satisfies the requirements for high computational and I/O (input/output) throughput. In the arithmetic unit, a 16- x 16-bit multiplier and a 32-bit accumulator provide the capability for single-cycle multiply/accumulate operations, and three format adjusters automatically adjust the data format for increased accuracy and dynamic range. An on-chip I/O unit is capable of handling data block transfers through a direct memory access port and real-time data streams through a pair of parallel I/O ports. I/O operations and program execution are performed in parallel. In addition, the processor includes two data memories with independent addressing units, a microsequencer with instruction RAM, and multiplexers for internal data redirection. The authors also present the structure and implementation of a design environment suitable for the algorithmic, behavioral, and timing simulation of a complete DSP system. Various benchmarking results are reported.

  10. Adaptive signal processor

    Energy Technology Data Exchange (ETDEWEB)

    Walz, H.V.

    1980-07-01

    An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 ..mu..sec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed.

  11. Adaptive signal processor

    International Nuclear Information System (INIS)

    Walz, H.V.

    1980-07-01

    An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 μsec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed

  12. A digital-signal-processor-based optical tomographic system for dynamic imaging of joint diseases

    Science.gov (United States)

    Lasker, Joseph M.

    Over the last decade, optical tomography (OT) has emerged as viable biomedical imaging modality. Various imaging systems have been developed that are employed in preclinical as well as clinical studies, mostly targeting breast imaging, brain imaging, and cancer related studies. Of particular interest are so-called dynamic imaging studies where one attempts to image changes in optical properties and/or physiological parameters as they occur during a system perturbation. To successfully perform dynamic imaging studies, great effort is put towards system development that offers increasingly enhanced signal-to-noise performance at ever shorter data acquisition times, thus capturing high fidelity tomographic data within narrower time periods. Towards this goal, I have developed in this thesis a dynamic optical tomography system that is, unlike currently available analog instrumentation, based on digital data acquisition and filtering techniques. At the core of this instrument is a digital signal processor (DSP) that collects, collates, and processes the digitized data set. Complementary protocols between the DSP and a complex programmable logic device synchronizes the sampling process and organizes data flow. Instrument control is implemented through a comprehensive graphical user interface which integrates automated calibration, data acquisition, and signal post-processing. Real-time data is generated at frame rates as high as 140 Hz. An extensive dynamic range (˜190 dB) accommodates a wide scope of measurement geometries and tissue types. Performance analysis demonstrates very low system noise (˜1 pW rms noise equivalent power), excellent signal precision (˜0.04%--0.2%) and long term system stability (˜1% over 40 min). Experiments on tissue phantoms validate spatial and temporal accuracy of the system. As a potential new application of dynamic optical imaging I present the first application of this method to use vascular hemodynamics as a means of characterizing

  13. A high-speed digital signal processor for atmospheric radar, part 7.3A

    Science.gov (United States)

    Brosnahan, J. W.; Woodard, D. M.

    1984-01-01

    The Model SP-320 device is a monolithic realization of a complex general purpose signal processor, incorporating such features as a 32-bit ALU, a 16-bit x 16-bit combinatorial multiplier, and a 16-bit barrel shifter. The SP-320 is designed to operate as a slave processor to a host general purpose computer in applications such as coherent integration of a radar return signal in multiple ranges, or dedicated FFT processing. Presently available is an I/O module conforming to the Intel Multichannel interface standard; other I/O modules will be designed to meet specific user requirements. The main processor board includes input and output FIFO (First In First Out) memories, both with depths of 4096 W, to permit asynchronous operation between the source of data and the host computer. This design permits burst data rates in excess of 5 MW/s.

  14. A comparative study of the energy resolution achievable with digital signal processors in x-ray spectroscopy

    International Nuclear Information System (INIS)

    Geraci, A.; Zambusi, M.; Ripamonti, G.

    1996-01-01

    Interest for digital processing of signals from radiation detectors is subject to a growing attention due to its intrinsic adaptivity, easiness of calibration, etc. This work compares two digital processing methods: a multiple-delay-line (DL) N filter and a least-mean-squares (LMS) adaptive filter for applications in high resolution X-ray spectroscopy. The signal pulse, as appears at the output of a proper analog conditioning circuit, is digitized; the samples undergo a digital filtering procedure. Both digital filters take advantage of the possibility of synthesizing the best possible weighting function with respect to the actual noise conditions. A noticeable improvement of more than 10% in energy resolution has been achieved with both systems with respect to state-of-the-art systems based on analog circuitry. In particular, the two digital processors are shown to be the best choice respectively; for on-line use with critical ballistic deficit conditions and for very-high-resolution spectroscopy systems, ultimately limited by 1/f noise

  15. Criteria for the use of digital signal processors in the control technique of the COSY particle accelerator using the example of the MOTOROLA DSP56000

    International Nuclear Information System (INIS)

    Rath, U.

    1989-11-01

    On the Cooler Synchrotron project (COSY), the beam measurement data and their processing are collected digitally. From the requirements for quick computing time (real time operation) and exact results, the use of digital signal processors is intended. The digital signal processor DSP 56000 from MOTOROLA was selected as the test object. The DSP 56000 has a development environment which makes it possible to test it on an IBM-PC AT. Tests are carried out which show that the simulation program corresponds to the functions and processes of the DSP 56000. The above-mentioned applications program calculates a 'fast Fourier transform' (FFT). This program is used to judge the speed of calculation and the accuracy of calculation of the signal processor. The algorithm used by the FFT program is explained. In order to judge the results of the DSP 56000, a comparison is made with the equivalent FORTRAN FFT. The results which the DSP gives on the ADM and the Fortran program are compared and assessed. The speed of calculation of the DSP 56000 is determined and is judged in comparison with the manufacturer's data for other digital signal processors. (orig./HP) [de

  16. The UTMOST: A Hybrid Digital Signal Processor Transforms the Molonglo Observatory Synthesis Telescope

    Science.gov (United States)

    Bailes, M.; Jameson, A.; Flynn, C.; Bateman, T.; Barr, E. D.; Bhandari, S.; Bunton, J. D.; Caleb, M.; Campbell-Wilson, D.; Farah, W.; Gaensler, B.; Green, A. J.; Hunstead, R. W.; Jankowski, F.; Keane, E. F.; Krishnan, V. Venkatraman; Murphy, Tara; O'Neill, M.; Osłowski, S.; Parthasarathy, A.; Ravi, V.; Rosado, P.; Temby, D.

    2017-10-01

    The Molonglo Observatory Synthesis Telescope (MOST) is an 18000 m2 radio telescope located 40 km from Canberra, Australia. Its operating band (820-851 MHz) is partly allocated to telecommunications, making radio astronomy challenging. We describe how the deployment of new digital receivers, Field Programmable Gate Array-based filterbanks, and server-class computers equipped with 43 Graphics Processing Units, has transformed the telescope into a versatile new instrument (UTMOST) for studying the radio sky on millisecond timescales. UTMOST has 10 times the bandwidth and double the field of view compared to the MOST, and voltage record and playback capability has facilitated rapid implementaton of many new observing modes, most of which operate commensally. UTMOST can simultaneously excise interference, make maps, coherently dedisperse pulsars, and perform real-time searches of coherent fan-beams for dispersed single pulses. UTMOST operates as a robotic facility, deciding how to efficiently target pulsars and how long to stay on source via real-time pulsar folding, while searching for single pulse events. Regular timing of over 300 pulsars has yielded seven pulsar glitches and three Fast Radio Bursts during commissioning. UTMOST demonstrates that if sufficient signal processing is applied to voltage streams, innovative science remains possible even in hostile radio frequency environments.

  17. A Digital Signal Processor for Doppler Radar Sensing of Vital Signs

    Science.gov (United States)

    2001-10-25

    shows a small spike halfway each heartbeat. This is known as the dicrotic notch , which signifies a sudden drop in pressure after systolic contraction...It is caused by a small reflux flow of blood back into the aortic valve and coronary vessels. This dicrotic notch in the heart signal is clipped...signal, and amax was the maximum amplitude of the signal in the specified window. The user could set the factor k, and it determined the threshold at

  18. Performance analysis of general purpose and digital signal processor kernels for heterogeneous systems-on-chip

    Directory of Open Access Journals (Sweden)

    T. von Sydow

    2003-01-01

    Full Text Available Various reasons like technology progress, flexibility demands, shortened product cycle time and shortened time to market have brought up the possibility and necessity to integrate different architecture blocks on one heterogeneous System-on-Chip (SoC. Architecture blocks like programmable processor cores (DSP- and GPP-kernels, embedded FPGAs as well as dedicated macros will be integral parts of such a SoC. Especially programmable architecture blocks and associated optimization techniques are discussed in this contribution. Design space exploration and thus the choice which architecture blocks should be integrated in a SoC is a challenging task. Crucial to this exploration is the evaluation of the application domain characteristics and the costs caused by individual architecture blocks integrated on a SoC. An ATE-cost function has been applied to examine the performance of the aforementioned programmable architecture blocks. Therefore, representative discrete devices have been analyzed. Furthermore, several architecture dependent optimization steps and their effects on the cost ratios are presented.

  19. Digital Signal Processors

    Indian Academy of Sciences (India)

    modems, audio systems and video game terminals, to cite a few. Their use is growing ... For example, the systems used to reserve railway tickets is on-line as the ... Many scientific instruments today use DSPs to enhance their performance and.

  20. A Fastbus module for trigger applications based on a digital signal processor and on programmable gate arrays

    International Nuclear Information System (INIS)

    Battaiotto, P.; Colavita, A.; Fratnik, F.; Lanceri, L.; Udine Univ.

    1991-01-01

    The new generation of DSP microprocessors based on RISC and Harvard-like architectures can conveniently take the place of specially built processors in fast trigger circuits for high-energy physics experiments. Presently available programmable gate arrays are well matched to them in speed and contribute to simplify the design of trigger circuits. Using these components, we designed and constructed a Fastbus module. We describe an application for the total-energy trigger of DELPHI, performing the readout of digitized calorimeter trigger data and some simple computations in less than 3 μs. (orig.)

  1. Compact lidar system using laser diode, binary continuous wave power modulation, and an avalanche photodiode-based receiver controlled by a digital signal processor

    Science.gov (United States)

    Ardanuy, Antoni; Comerón, Adolfo

    2018-04-01

    We analyze the practical limits of a lidar system based on the use of a laser diode, random binary continuous wave power modulation, and an avalanche photodiode (APD)-based photereceiver, combined with the control and computing power of the digital signal processors (DSP) currently available. The target is to design a compact portable lidar system made all in semiconductor technology, with a low-power demand and an easy configuration of the system, allowing change in some of its features through software. Unlike many prior works, we emphasize the use of APDs instead of photomultiplier tubes to detect the return signal and the application of the system to measure not only hard targets, but also medium-range aerosols and clouds. We have developed an experimental prototype to evaluate the behavior of the system under different environmental conditions. Experimental results provided by the prototype are presented and discussed.

  2. Single Event Upset Analysis: On-orbit performance of the Alpha Magnetic Spectrometer Digital Signal Processor Memory aboard the International Space Station

    Science.gov (United States)

    Li, Jiaqiang; Choutko, Vitaly; Xiao, Liyi

    2018-03-01

    Based on the collection of error data from the Alpha Magnetic Spectrometer (AMS) Digital Signal Processors (DSP), on-orbit Single Event Upsets (SEUs) of the DSP program memory are analyzed. The daily error distribution and time intervals between errors are calculated to evaluate the reliability of the system. The particle density distribution of International Space Station (ISS) orbit is presented and the effects from the South Atlantic Anomaly (SAA) and the geomagnetic poles are analyzed. The impact of solar events on the DSP program memory is carried out combining data analysis and Monte Carlo simulation (MC). From the analysis and simulation results, it is concluded that the area corresponding to the SAA is the main source of errors on the ISS orbit. Solar events can also cause errors on DSP program memory, but the effect depends on the on-orbit particle density.

  3. Application of digital beam position processor Libera on tune measurement

    International Nuclear Information System (INIS)

    Zhang Chunhui; Sun Baogen; Cao Yong; Lu Ping; Li Jihao

    2006-01-01

    Digital signal processing (DSP) is widely used in the field of beam diagnostics. Especially, DSP achieves very good performance in beam position signal analysis and betatron tune measurement. In Hefei light source, when beam was excited by narrow-band Gaussian white nose, Libera, a digital beam position processor, was used to process the signals from beam position monitor (BPM), which contained betatron oscillation. Fast Fourier transform (FFT) was applied to finding out betatron resonance frequency, from which the decimal part of betatron oscillation tune was calculated. By this means, the measure of horizontal tune was 3.5352 and the measure of vertical tune is 2.6299. (authors)

  4. A low-cost, high-performance, digital signal processor-based lock-in amplifier capable of measuring multiple frequency sweeps simultaneously

    International Nuclear Information System (INIS)

    Sonnaillon, Maximiliano Osvaldo; Bonetto, Fabian Jose

    2005-01-01

    A high-performance digital lock-in amplifier implemented in a low-cost digital signal processor (DSP) board is described. This lock in is capable of measuring simultaneously multiple frequencies that change in time as frequency sweeps (chirps). The used 32-bit DSP has enough computing power to generate N=3 simultaneous reference signals and accurately measure the N=3 responses, operating as three lock ins connected in parallel to a linear system. The lock in stores the measured values in memory until they are downloaded to the a personal computer (PC). The lock in works in stand-alone mode and can be programmed and configured through the PC serial port. Downsampling and multiple filter stages were used in order to obtain a sharp roll off and a long time constant in the filters. This makes measurements possible in presence of high-noise levels. Before each measurement, the lock in performs an autocalibration that measures the frequency response of analog output and input circuitry in order to compensate for the departure from ideal operation. Improvements from previous lock-in implementations allow measuring the frequency response of a system in a short time. Furthermore, the proposed implementation can measure how the frequency response changes with time, a characteristic that is very important in our biotechnological application. The number of simultaneous components that the lock in can generate and measure can be extended, without reprogramming, by only using other DSPs of the same family that are code compatible and work at higher clock frequencies

  5. A low-cost, high-performance, digital signal processor-based lock-in amplifier capable of measuring multiple frequency sweeps simultaneously

    Energy Technology Data Exchange (ETDEWEB)

    Sonnaillon, Maximiliano Osvaldo; Bonetto, Fabian Jose [Laboratorio de Cavitacion y Biotecnologia, San Carlos de Bariloche (8400) (Argentina)

    2005-02-01

    A high-performance digital lock-in amplifier implemented in a low-cost digital signal processor (DSP) board is described. This lock in is capable of measuring simultaneously multiple frequencies that change in time as frequency sweeps (chirps). The used 32-bit DSP has enough computing power to generate N=3 simultaneous reference signals and accurately measure the N=3 responses, operating as three lock ins connected in parallel to a linear system. The lock in stores the measured values in memory until they are downloaded to the a personal computer (PC). The lock in works in stand-alone mode and can be programmed and configured through the PC serial port. Downsampling and multiple filter stages were used in order to obtain a sharp roll off and a long time constant in the filters. This makes measurements possible in presence of high-noise levels. Before each measurement, the lock in performs an autocalibration that measures the frequency response of analog output and input circuitry in order to compensate for the departure from ideal operation. Improvements from previous lock-in implementations allow measuring the frequency response of a system in a short time. Furthermore, the proposed implementation can measure how the frequency response changes with time, a characteristic that is very important in our biotechnological application. The number of simultaneous components that the lock in can generate and measure can be extended, without reprogramming, by only using other DSPs of the same family that are code compatible and work at higher clock frequencies.

  6. The design and validation of a hybrid digital-signal-processing plug-in for traditional cochlear implant speech processors.

    Science.gov (United States)

    Hajiaghababa, Fatemeh; Marateb, Hamid R; Kermani, Saeed

    2018-06-01

    Cochlear implants (CIs) are electronic devices restoring partial hearing to deaf individuals with profound hearing loss. In this paper, a new plug-in for traditional IIR filter-banks (FBs) is presented for cochlear implants based on wavelet neural networks (WNNs). Having provided such a plug-in for commercially available CIs, it is possible not only to use available hardware in the market but also to optimize their performance compared with the-state-of-the-art. An online database of Dutch diphone perception was used in our study. The weights of the WNNs were tuned using particle swarm optimization (PSO) on a training set (speech-shaped noise (SSN) of 2 dB SNR), while its performance was assessed on a test set in terms of objective and composite measures in the hold-out validation framework. The cost function was defined based on the combination of mean square error (MSE), short‑time objective intelligibility (STOI) criteria on the training set. Variety of performance indices were used including segmental signal- to -noise ratio (SNRseg), MSE, STOI, log-likelihood ratio (LLR), weighted spectral slope (WSS), and composite measures C sig , C bak and C ovl . Meanwhile, the following CI speech processing techniques were used for comparison: traditional FBs, dual resonance nonlinear (DRNL) and simple dual path nonlinear (SPDN) models. The average SNRseg, MSE, and LLR values for the WNN in the entire data set were 2.496 ± 2.794, 0.086 ± 0.025 and 2.323 ± 0.281, respectively. The proposed method significantly improved MSE, SNR, SNRseg, LLR, C sig C bak and C ovl compared with the other three methods (repeated-measures analysis of variance (ANOVA); P < 0.05). The average running time of the proposed algorithm (written in Matlab R2013a) on the training and test sets for each consonant or vowel on an Intel dual-core 2.10 GHz CPU with 2GB of RAM was 9.91 ± 0.87 (s) and 0.19 ± 0.01 (s), respectively. The proposed algorithm is accurate and

  7. Fast digital processor for event selection according to particle number difference

    International Nuclear Information System (INIS)

    Basiladze, S.G.; Gus'kov, B.N.; Li Van Sun; Maksimov, A.N.; Parfenov, A.N.

    1978-01-01

    A fast digital processor for a magnetic spectrometer is described. It is used in experimental searches for charmed particles. The basic purpose of the processor is discriminating events in the difference of numbers of particles passing through two proportional chambers (PC). The processor consists of three units for detecting signals with PC, and a binary coder. The number of inputs of the processor is 32 for the first PC and 64 for the second. The difference in the number of particles discriminated is from 0 to 8. The resolution time is 180 ns. The processor is built in the CAMAC standard

  8. Basic digital signal processing

    CERN Document Server

    Lockhart, Gordon B

    1985-01-01

    Basic Digital Signal Processing describes the principles of digital signal processing and experiments with BASIC programs involving the fast Fourier theorem (FFT). The book reviews the fundamentals of the BASIC program, continuous and discrete time signals including analog signals, Fourier analysis, discrete Fourier transform, signal energy, power. The text also explains digital signal processing involving digital filters, linear time-variant systems, discrete time unit impulse, discrete-time convolution, and the alternative structure for second order infinite impulse response (IIR) sections.

  9. Novel memory architecture for video signal processor

    Science.gov (United States)

    Hung, Jen-Sheng; Lin, Chia-Hsing; Jen, Chein-Wei

    1993-11-01

    An on-chip memory architecture for video signal processor (VSP) is proposed. This memory structure is a two-level design for the different data locality in video applications. The upper level--Memory A provides enough storage capacity to reduce the impact on the limitation of chip I/O bandwidth, and the lower level--Memory B provides enough data parallelism and flexibility to meet the requirements of multiple reconfigurable pipeline function units in a single VSP chip. The needed memory size is decided by the memory usage analysis for video algorithms and the number of function units. Both levels of memory adopted a dual-port memory scheme to sustain the simultaneous read and write operations. Especially, Memory B uses multiple one-read-one-write memory banks to emulate the real multiport memory. Therefore, one can change the configuration of Memory B to several sets of memories with variable read/write ports by adjusting the bus switches. Then the numbers of read ports and write ports in proposed memory can meet requirement of data flow patterns in different video coding algorithms. We have finished the design of a prototype memory design using 1.2- micrometers SPDM SRAM technology and will fabricated it through TSMC, in Taiwan.

  10. Multipurpose silicon photonics signal processor core.

    Science.gov (United States)

    Pérez, Daniel; Gasulla, Ivana; Crudgington, Lee; Thomson, David J; Khokhar, Ali Z; Li, Ke; Cao, Wei; Mashanovich, Goran Z; Capmany, José

    2017-09-21

    Integrated photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint, and cost. Application-specific photonic integrated circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long development times. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable photonic processor, where a common hardware implemented by a two-dimensional photonic waveguide mesh realizes different functionalities through programming. Here, we report the demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate over 20 different functionalities with a simple seven hexagonal cell structure, which can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks, and quantum information systems. Our work is an important step toward this paradigm.Integrated optical circuits today are typically designed for a few special functionalities and require complex design and development procedures. Here, the authors demonstrate a reconfigurable but simple silicon waveguide mesh with different functionalities.

  11. Digital systems from logic gates to processors

    CERN Document Server

    Deschamps, Jean-Pierre; Terés, Lluís

    2017-01-01

    This textbook for a one-semester course in Digital Systems Design describes the basic methods used to develop “traditional” Digital Systems, based on the use of logic gates and flip flops, as well as more advanced techniques that enable the design of very large circuits, based on Hardware Description Languages and Synthesis tools. It was originally designed to accompany a MOOC (Massive Open Online Course) created at the Autonomous University of Barcelona (UAB), currently available on the Coursera platform. Readers will learn what a digital system is and how it can be developed, preparing them for steps toward other technical disciplines, such as Computer Architecture, Robotics, Bionics, Avionics and others. In particular, students will learn to design digital systems of medium complexity, describe digital systems using high level hardware description languages, and understand the operation of computers at their most basic level. All concepts introduced are reinforced by plentiful illustrations, examples, ...

  12. Making the black box signal processor transparent explains the contradictions in x-ray spectroscopy

    International Nuclear Information System (INIS)

    Papp, T.; Maxwell, J.A.; Papp, A.T.

    2008-01-01

    Full text: There are significant differences in the experimental data needed in the analysis of x-ray spectra, and many of the results contradict basic conservation laws and simple arithmetic. We have identified that the main source of the unexplainable results is rooted in the signal processing electronics. We have developed a line of fully digital signal processors that have yielded improved resolution, line shape, tailing and pile up recognition. The signal processor is a time variant, non-paralyzable signal processor. The signal processor accounts for and registers all events, sorting them into two spectra, one spectrum for the desirable or accepted events, and one spectrum for the rejected events. Although the information on the rejected events is always necessary, we recently realized its additional benefits in high rate, (10 5 -10 6 cps) analytical measurements. Having all information available we were surprised to see how different conclusions and level of understandings are possible in detector characterization, detector efficiency, spectrum evaluation methodology, and that it explains many of the contradictions. We will demonstrate how the Coster-Kronig transition measurements often do not even comply with arithmetic, and why is it difficult to interpret the spectra with other processors. It will be presented that for different spectra in origin, like radioisotope measurements, x-ray fluorescence, and particle induced x-ray emission, the primary signal from the preamplifier is so different, that the signal processor is facing very different challenges, and different metrological approaches are necessary in data processing. This data processing methodology cannot be established on the partial and fractional information offered by other approaches. However, the maximum information utilization approach offered by our processor's rejected spectrum supplements the accepted spectrum to allow the development of straight forward and accurate metrology. All the

  13. Digital implementation of the preloaded filter pulse processor

    International Nuclear Information System (INIS)

    Westphal, G.P.; Cadek, G.R.; Keroe, N.; Sauter, TH.; Thorwartl, P.C.

    1995-01-01

    Adapting it's processing time to the respective pulse intervals, the Preloaded Filter (PLF) pulse processor offers optimum resolution together with highest possible throughput rates. The PLF algorithm could be formulated in a recursive manner which made possible it's implementation by means of a large field-programmable gate array, as a fast, pipe-lined digital processor with 10 MHz maximum throughput rate. While pre-filter digitization by an ADC with 12 bit resolution and 10M Hz sampling rate resulted in a poorer resolution than that of an analog filter, a digital PLF based on an ADC with 14 bit resolution and 10 MHz sampling rate, surpassed high-quality analog filters in resolution, throughput rate and long-term stability. (author) 6 refs.; 7 figs

  14. Digital pulse processor for ion beam microprobe imaging

    International Nuclear Information System (INIS)

    Bogovac, M.; Jaksic, M.; Wegrzynek, D.; Markowicz, A.

    2009-01-01

    Capabilities of spectroscopic ion beam analysis (IBA) techniques that are available in ion microprobe facilities can be greatly improved by the use of digital pulse processing. We report here development of a digital multi parameter data acquisition system suitable for IBA imaging applications. Input signals from charge sensitive preamplifier are conditioned by using a simple circuit and digitized with fast ADCs. The digitally converted signals are processed in real time using FPGA. Implementation of several components of the system is presented.

  15. Digital signal processing

    CERN Document Server

    O'Shea, Peter; Hussain, Zahir M

    2011-01-01

    In three parts, this book contributes to the advancement of engineering education and that serves as a general reference on digital signal processing. Part I presents the basics of analog and digital signals and systems in the time and frequency domain. It covers the core topics: convolution, transforms, filters, and random signal analysis. It also treats important applications including signal detection in noise, radar range estimation for airborne targets, binary communication systems, channel estimation, banking and financial applications, and audio effects production. Part II considers sel

  16. Development of a system based in a digital signal processor (DSP) for a simulator of power regulation in a reactor: first stage

    International Nuclear Information System (INIS)

    Benitez R, J.S.; Perez C, B.

    2002-01-01

    The first stage of the development of a digital system based on a DSP is presented which forms part of an hybrid simulator for the power regulation in am model of the punctual kinetics of a TRIGA reactor type. The DSP performs the regulation, using a Mandami type algorithm of diffuse control. In the algorithm, the universe of the output variable is discretized for performing in an unique stage the aggregation functions and dis-diffusization. (Author)

  17. TC9447F, single-chip DSP (digital signal processor) for audio; 1 chip audio yo DSP LSI TC9447F

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1999-03-01

    TC9447F is a single-chip DSP for audio which builds in 2-channel AD converter/4-channel DA converter. It can build various application programs such as the sound field control like hall simulation, digital filter like equalizer, and dynamic range control, in the program memory (ROM). Further, it builds in {+-}10dB trim use electronic volume for two channels. It also builds data delay use RAM (64K-bit) in, so no RAM to be separately attached is necessary. (translated by NEDO)

  18. CERN Technical Training: Digital Signal Processors

    CERN Multimedia

    HR Department

    2009-01-01

    A new training is going to be held at CERN on the ADSP SHARC Family. The “System Development and Programming with the Analog Devices' SHARC Family” course is a 3.5-day hands-on training on Analog Devices SHARC DSPs, focusing on the latest ‘368/9 and 37x families. General DSP architecture, peripherals available, booting up process and DSP code development will be covered. Hardware tools, debugging and hardware design guidelines will be introduced as well. The course id designed for System Designers needing to make informed decisions on design tradeoffs, Hardware Designers needing to develop external interfaces, and Code Developers needing to know how to get the highest performance from their algorithms. The course will take place, in English, from 31 March to 4 April in the CERN Technical Training Center. Few places are still available. Registrations are opened on the Technical Training page. More information on our catalogue: http://cta.cern.ch/cta2/f?p=110:9 or conta...

  19. The newest digital signal processing

    International Nuclear Information System (INIS)

    Lee, Chae Uk

    2002-08-01

    This book deal with the newest digital signal processing, which contains introduction on conception of digital signal processing, constitution and purpose, signal and system such as signal, continuos signal, discrete signal and discrete system, I/O expression on impress response, convolution, mutual connection of system and frequency character,z transform of definition, range, application of z transform and relationship with laplace transform, Discrete fourier, Fast fourier transform on IDFT algorithm and FFT application, foundation of digital filter of notion, expression, types, frequency characteristic of digital filter and design order of filter, Design order of filter, Design of FIR digital filter, Design of IIR digital filter, Adaptive signal processing, Audio signal processing, video signal processing and application of digital signal processing.

  20. M7--a high speed digital processor for second level trigger selections

    International Nuclear Information System (INIS)

    Droege, T.F.; Gaines, I.; Turner, K.J.

    1978-01-01

    A digital processor is described which reconstructs mass and momentum as a second-level trigger selection. The processor is a five-address, microprogramed, pipelined, ECL machine with simultaneous memory access to four operands which load two parallel multipliers and an ALU. Source data modules are extensions of the processor

  1. A Low-Power ASIC Signal Processor for a Vestibular Prosthesis.

    Science.gov (United States)

    Töreyin, Hakan; Bhatti, Pamela T

    2016-06-01

    A low-power ASIC signal processor for a vestibular prosthesis (VP) is reported. Fabricated with TI 0.35 μm CMOS technology and designed to interface with implanted inertial sensors, the digitally assisted analog signal processor operates extensively in the CMOS subthreshold region. During its operation the ASIC encodes head motion signals captured by the inertial sensors as electrical pulses ultimately targeted for in-vivo stimulation of vestibular nerve fibers. To achieve this, the ASIC implements a coordinate system transformation to correct for misalignment between natural sensors and implanted inertial sensors. It also mimics the frequency response characteristics and frequency encoding mappings of angular and linear head motions observed at the peripheral sense organs, semicircular canals and otolith. Overall the design occupies an area of 6.22 mm (2) and consumes 1.24 mW when supplied with ± 1.6 V.

  2. Soft-core dataflow processor architecture optimised for radar signal processing: Article

    CSIR Research Space (South Africa)

    Broich, R

    2014-10-01

    Full Text Available Current radar signal processors lack either performance or flexibility. Custom soft-core processors exhibit potential in high-performance signal processing applications, yet remain relatively unexplored in research literature. In this paper, we use...

  3. Digital Processor Module Reliability Analysis of Nuclear Power Plant

    International Nuclear Information System (INIS)

    Lee, Sang Yong; Jung, Jae Hyun; Kim, Jae Ho; Kim, Sung Hun

    2005-01-01

    The system used in plant, military equipment, satellite, etc. consists of many electronic parts as control module, which requires relatively high reliability than other commercial electronic products. Specially, Nuclear power plant related to the radiation safety requires high safety and reliability, so most parts apply to Military-Standard level. Reliability prediction method provides the rational basis of system designs and also provides the safety significance of system operations. Thus various reliability prediction tools have been developed in recent decades, among of them, the MI-HDBK-217 method has been widely used as a powerful tool for the prediction. In this work, It is explained that reliability analysis work for Digital Processor Module (DPM, control module of SMART) is performed by Parts Stress Method based on MIL-HDBK-217F NOTICE2. We are using the Relex 7.6 of Relex software corporation, because reliability analysis process requires enormous part libraries and data for failure rate calculation

  4. Bluetooth telemedicine processor for multichannel biomedical signal transmission via mobile cellular networks.

    Science.gov (United States)

    Rasid, Mohd Fadlee A; Woodward, Bryan

    2005-03-01

    One of the emerging issues in m-Health is how best to exploit the mobile communications technologies that are now almost globally available. The challenge is to produce a system to transmit a patient's biomedical signals directly to a hospital for monitoring or diagnosis, using an unmodified mobile telephone. The paper focuses on the design of a processor, which samples signals from sensors on the patient. It then transmits digital data over a Bluetooth link to a mobile telephone that uses the General Packet Radio Service. The modular design adopted is intended to provide a "future-proofed" system, whose functionality may be upgraded by modifying the software.

  5. Digital signal processing theory and practice

    CERN Document Server

    Rao, K Deergha

    2018-01-01

    The book provides a comprehensive exposition of all major topics in digital signal processing (DSP). With numerous illustrative examples for easy understanding of the topics, it also includes MATLAB-based examples with codes in order to encourage the readers to become more confident of the fundamentals and to gain insights into DSP. Further, it presents real-world signal processing design problems using MATLAB and programmable DSP processors. In addition to problems that require analytical solutions, it discusses problems that require solutions using MATLAB at the end of each chapter. Divided into 13 chapters, it addresses many emerging topics, which are not typically found in advanced texts on DSP. It includes a chapter on adaptive digital filters used in the signal processing problems for faster acceptable results in the presence of changing environments and changing system requirements. Moreover, it offers an overview of wavelets, enabling readers to easily understand the basics and applications of this po...

  6. Digitally programmable signal generator

    International Nuclear Information System (INIS)

    Priatko, G.J.; Kaskey, J.A.

    1988-01-01

    A digitally programmable signal generator (DPSG) includes a first memory from which data is written into a second memory formed of n banks. Each bank includes four memories and a multiplexer, the banks being read once during each time frame, the read-out bits being multiplexed and fed out serially in synchronism with a plurality of clock pulses occuring during a time frame. The resulting serial bit streams may be fed in parallel to a digital-to-analog converter. The DPSG can be used in applications such as Atomic Vapor Laser Isotope Separation (AVLIS) to create an optimal match between the process laser's spectral profile and that of the vaporized material, optical telecommunications, non-optical telecommunication in the microwave and radio spectrum, radar, electronic countermeasures, high speed computer interconnects, local area networks, high definition video transport and the multiplexing of large quantities of slow digital memory into high speed data streams. This invention extends the operation of DPSGs into the GHz range. (author)

  7. A low power biomedical signal processor ASIC based on hardware software codesign.

    Science.gov (United States)

    Nie, Z D; Wang, L; Chen, W G; Zhang, T; Zhang, Y T

    2009-01-01

    A low power biomedical digital signal processor ASIC based on hardware and software codesign methodology was presented in this paper. The codesign methodology was used to achieve higher system performance and design flexibility. The hardware implementation included a low power 32bit RISC CPU ARM7TDMI, a low power AHB-compatible bus, and a scalable digital co-processor that was optimized for low power Fast Fourier Transform (FFT) calculations. The co-processor could be scaled for 8-point, 16-point and 32-point FFTs, taking approximate 50, 100 and 150 clock circles, respectively. The complete design was intensively simulated using ARM DSM model and was emulated by ARM Versatile platform, before conducted to silicon. The multi-million-gate ASIC was fabricated using SMIC 0.18 microm mixed-signal CMOS 1P6M technology. The die area measures 5,000 microm x 2,350 microm. The power consumption was approximately 3.6 mW at 1.8 V power supply and 1 MHz clock rate. The power consumption for FFT calculations was less than 1.5 % comparing with the conventional embedded software-based solution.

  8. Demonstrations of analog-to-digital conversion using a frequency domain stretched processor.

    Science.gov (United States)

    Reibel, Randy Ray; Harrington, Calvin; Dahl, Jason; Ostrander, Charles; Roos, Peter Aaron; Berg, Trenton; Mohan, R Krishna; Neifeld, Mark A; Babbitt, Wm R

    2009-07-06

    The first proof-of-concept demonstrations are presented for a broadband photonic-assisted analog-to-digital converter (ADC) based on spatial spectral holography (SSH). The SSH-ADC acts as a frequency-domain stretch processor converting high bandwidth input signals to low bandwidth output signals, allowing the system to take advantage of high performance, low bandwidth electronic ADCs. Demonstrations with 50 MHz effective bandwidth are shown to highlight basic performance with approximately 5 effective bits of vertical resolution. Signal capture with 1600 MHz effective bandwidth is also shown. Because some SSH materials span over 100 GHz and have large time apertures (approximately 10 micros), this technique holds promise as a candidate for the next generation of ADCs.

  9. The ALTRO Chip A 16-channel A/D Converter and Digital Processor for Gas Detectors

    CERN Document Server

    Esteve-Bosch, R; Mota, B; Musa, L

    2003-01-01

    The ALTRO (ALICE TPC Read Out) chip is a mixed-signal integrated circuit designed to be one of the building blocks of the readout electronics for gas detectors. Originally conceived and optimised for the Time Projection Chamber (TPC) of the ALICE experiment at the CERN LHC, its architecture and programmability makes it suitable for the readout of a wider class of gas detectors. In one single chip, the analogue signals from 16 channels are digitised, processed, compressed and stored in a multi-acquisition memory. The Analogue-to- Digital converters embedded in the chip have a 10-bit dynamic range and a maximum sampling rate in the range of 20 to 40MHz. After digitisation, a pipelined hardwired Processor is able to remove from the input signal a wide range of systematic and non-systematic perturbations, related to the non-ideal behaviour of the detector, temperature variation of the electronics, environmental noise, etc. Moreover, the Processor is able to suppress the signal tail within 1mus after the pulse pea...

  10. Digital image processing software system using an array processor

    International Nuclear Information System (INIS)

    Sherwood, R.J.; Portnoff, M.R.; Journeay, C.H.; Twogood, R.E.

    1981-01-01

    A versatile array processor-based system for general-purpose image processing was developed. At the heart of this system is an extensive, flexible software package that incorporates the array processor for effective interactive image processing. The software system is described in detail, and its application to a diverse set of applications at LLNL is briefly discussed. 4 figures, 1 table

  11. Fast digitizing and digital signal processing of detector signals

    International Nuclear Information System (INIS)

    Hannaske, Roland

    2008-01-01

    A fast-digitizer data acquisition system recently installed at the neutron time-of-flight experiment nELBE, which is located at the superconducting electron accelerator ELBE of Forschungszentrum Dresden-Rossendorf, is tested with two different detector types. Preamplifier signals from a high-purity germanium detector are digitized, stored and finally processed. For a precise determination of the energy of the detected radiation, the moving-window deconvolution algorithm is used to compensate the ballistic deficit and different shaping algorithms are applied. The energy resolution is determined in an experiment with γ-rays from a 22 Na source and is compared to the energy resolution achieved with analogously processed signals. On the other hand, signals from the photomultipliers of barium fluoride and plastic scintillation detectors are digitized. These signals have risetimes of a few nanoseconds only. The moment of interaction of the radiation with the detector is determined by methods of digital signal processing. Therefore, different timing algorithms are implemented and tested with data from an experiment at nELBE. The time resolutions achieved with these algorithms are compared to each other as well as to reference values coming from analog signal processing. In addition to these experiments, some properties of the digitizing hardware are measured and a program for the analysis of stored, digitized data is developed. The analysis of the signals shows that the energy resolution achieved with the 10-bit digitizer system used here is not competitive to a 14-bit peak-sensing ADC, although the ballistic deficit can be fully corrected. However, digital methods give better result in sub-ns timing than analog signal processing. (orig.)

  12. Tunable microwave signal generation based on an Opto-DMD processor and a photonic crystal fiber

    International Nuclear Information System (INIS)

    Wang Tao; Sang Xin-Zhu; Yan Bin-Bin; Li Yan; Song Fei-Jun; Zhang Xia; Wang Kui-Ru; Yuan Jin-Hui; Yu Chong-Xiu; Ai Qi; Chen Xiao; Zhang Ying; Chen Gen-Xiang; Xiao Feng; Kamal Alameh

    2014-01-01

    Frequency-tunable microwave signal generation is proposed and experimentally demonstrated with a dual-wavelength single-longitudinal-mode (SLM) erbium-doped fiber ring laser based on a digital Opto-DMD processor and four-wave mixing (FWM) in a high-nonlinear photonic crystal fiber (PCF). The high-nonlinear PCF is employed for the generation of the FWM to obtain stable and uniform dual-wavelength oscillation. Two different short passive sub-ring cavities in the main ring cavity serve as mode filters to make SLM lasing. The two lasing wavelengths are electronically selected by loading different gratings on the Opto-DMD processor controlled with a computer. The wavelength spacing can be smartly adjusted from 0.165 nm to 1.08 nm within a tuning accuracy of 0.055 nm. Two microwave signals at 17.23 GHz and 27.47 GHz are achieved. The stability of the microwave signal is discussed. The system has the ability to generate a 137.36-GHz photonic millimeter signal at room temperature

  13. A digital retina-like low-level vision processor.

    Science.gov (United States)

    Mertoguno, S; Bourbakis, N G

    2003-01-01

    This correspondence presents the basic design and the simulation of a low level multilayer vision processor that emulates to some degree the functional behavior of a human retina. This retina-like multilayer processor is the lower part of an autonomous self-organized vision system, called Kydon, that could be used on visually impaired people with a damaged visual cerebral cortex. The Kydon vision system, however, is not presented in this paper. The retina-like processor consists of four major layers, where each of them is an array processor based on hexagonal, autonomous processing elements that perform a certain set of low level vision tasks, such as smoothing and light adaptation, edge detection, segmentation, line recognition and region-graph generation. At each layer, the array processor is a 2D array of k/spl times/m hexagonal identical autonomous cells that simultaneously execute certain low level vision tasks. Thus, the hardware design and the simulation at the transistor level of the processing elements (PEs) of the retina-like processor and its simulated functionality with illustrative examples are provided in this paper.

  14. Analysis of the computational requirements of a pulse-doppler radar signal processor

    CSIR Research Space (South Africa)

    Broich, R

    2012-05-01

    Full Text Available In an attempt to find an optimal processing architecture for radar signal processing applications, the different algorithms that are typically used in a pulse-Doppler radar signal processor are investigated. Radar algorithms are broken down...

  15. Low power digital signal processing

    DEFF Research Database (Denmark)

    Paker, Ozgun

    2003-01-01

    hardwired ASICs and more than 6 21 times lower than current state of the art low-power DSP processors. An orthogonal but practical contribution of this thesis is the test bench implementation. A PCI-based FPGA board has been used to equip a standard desktop PC with tester facilities. The test bench proved...... to be a viable alternative to conventional expensive test equipment. Finally, the work presented in this thesis has been published at several IEEE workshops and conferences, and in the Journal of VLSI Signal Processing....

  16. Digital signal processing the Tevatron BPM signals

    International Nuclear Information System (INIS)

    Cancelo, G.; James, E.; Wolbers, S.

    2005-01-01

    The Beam Position Monitor (TeV BPM) readout system at Fermilab's Tevatron has been updated and is currently being commissioned. The new BPMs use new analog and digital hardware to achieve better beam position measurement resolution. The new system reads signals from both ends of the existing directional stripline pickups to provide simultaneous proton and antiproton measurements. The signals provided by the two ends of the BPM pickups are processed by analog band-pass filters and sampled by 14-bit ADCs at 74.3MHz. A crucial part of this work has been the design of digital filters that process the signal. This paper describes the digital processing and estimation techniques used to optimize the beam position measurement. The BPM electronics must operate in narrow-band and wide-band modes to enable measurements of closed-orbit and turn-by-turn positions. The filtering and timing conditions of the signals are tuned accordingly for the operational modes. The analysis and the optimized result for each mode are presented

  17. Chaotic signals in digital communications

    CERN Document Server

    Eisencraft, Marcio; Suyama, Ricardo

    2013-01-01

    Chaotic Signals in Digital Communications combines fundamental background knowledge with state-of-the-art methods for using chaotic signals and systems in digital communications. The book builds a bridge between theoretical works and practical implementation to help researchers attain consistent performance in realistic environments. It shows the possible shortcomings of the chaos-based communication systems proposed in the literature, particularly when they are subjected to non-ideal conditions. It also presents a toolbox of techniques for researchers working to actually implement such system

  18. PSpice for digital signal processing

    CERN Document Server

    Tobin, Paul

    2007-01-01

    PSpice for Digital Signal Processing is the last in a series of five books using Cadence Orcad PSpice version 10.5 and introduces a very novel approach to learning digital signal processing (DSP). DSP is traditionally taught using Matlab/Simulink software but has some inherent weaknesses for students particularly at the introductory level. The 'plug in variables and play' nature of these software packages can lure the student into thinking they possess an understanding they don't actually have because these systems produce results quicklywithout revealing what is going on. However, it must be

  19. Digital storage of repeated signals

    International Nuclear Information System (INIS)

    Prozorov, S.P.

    1984-01-01

    An independent digital storage system designed for repeated signal discrimination from background noises is described. The signal averaging is performed off-line in the real time mode by means of multiple selection of the investigated signal and integration in each point. Digital values are added in a simple summator and the result is recorded the storage device with the volume of 1024X20 bit from where it can be output on an oscillograph, a plotter or transmitted to a compUter for subsequent processing. The described storage is reliable and simple device on one base of which the systems for the nuclear magnetic resonapce signal acquisition in different experiments are developed

  20. Attitude Control of a Satellite by using Digital Signal Processing

    Directory of Open Access Journals (Sweden)

    Adirelle C. Santana

    2012-03-01

    Full Text Available This article has discussed the development of a three-axis attitude digital controller for an artificial satellite using a digital signal processor. The main motivation of this study is the attitude control system of the satellite Multi-Mission Platform, developed by the Brazilian National Institute for Space Research for application in different sort of missions. The controller design was based on the theory of the Linear Quadratic Gaussian Regulator, synthesized from the linearized model of the motion of the satellite, i.e., the kinematics and dynamics of attitude. The attitude actuators considered in this study are pairs of cold gas jets powered by a pulse width/pulse frequency modulator. In the first stage of the project development, a system controller for continuous time was studied with the aim of testing the adequacy of the adopted control. The next steps had included an analysis of discretization techniques, the setting time of sampling rate, and the testing of the digital version of the Linear Quadratic Gaussian Regulator controller in the MATLAB/SIMULINK. To fulfill the study, the controller was implemented in a digital signal processor, specifically the Blackfin BF537 from Analog Devices, along with the pulse width/pulse frequency modulator. The validation tests used a scheme of co-simulation, where the model of the satellite was simulated in MATLAB/SIMULINK, while the controller and modulator were processed in the digital signal processor with a tool called Processor-In-the-Loop, which acted as a data communication link between both environments.function and required time to achieve a given mission accuracy are determined, and results are provided as illustration.

  1. Eliminating ambiguity in digital signals

    Science.gov (United States)

    Weber, W. J., III

    1979-01-01

    Multiamplitude minimum shift keying (mamsk) transmission system, method of differential encoding overcomes problem of ambiguity associated with advanced digital-transmission techniques with little or no penalty in transmission rate, error rate, or system complexity. Principle of method states, if signal points are properly encoded and decoded, bits are detected correctly, regardless of phase ambiguities.

  2. Digital signal processing for NDT

    International Nuclear Information System (INIS)

    Georgel, B.

    1994-01-01

    NDT begins to adapt and use the most recent developments of digital signal and image processing. We briefly sum up the main characteristics of NDT situations (particularly noise and inverse problem formulation) and comment on techniques already used or just emerging (SAFT, split spectrum, adaptive learning network, noise reference filtering, stochastic models, neural networks). This survey is focused on ultrasonics, eddy currents and X-ray radiography. The final objective of end users (availability of automatic diagnosis systems) cannot be achieved only by signal processing algorithms. A close cooperation with other techniques such as artificial intelligence has therefore to be implemented. (author). 20 refs

  3. Digital Signal Processing applied to Physical Signals

    CERN Document Server

    Alberto, Diego; Musa, L

    2011-01-01

    It is well known that many of the scientific and technological discoveries of the XXI century will depend on the capability of processing and understanding a huge quantity of data. With the advent of the digital era, a fully digital and automated treatment can be designed and performed. From data mining to data compression, from signal elaboration to noise reduction, a processing is essential to manage and enhance features of interest after every data acquisition (DAQ) session. In the near future, science will go towards interdisciplinary research. In this work there will be given an example of the application of signal processing to different fields of Physics from nuclear particle detectors to biomedical examinations. In Chapter 1 a brief description of the collaborations that allowed this thesis is given, together with a list of the publications co-produced by the author in these three years. The most important notations, definitions and acronyms used in the work are also provided. In Chapter 2, the last r...

  4. Development of a digital reactivity meter and reactor physics data processor

    International Nuclear Information System (INIS)

    Shimazu, Y.; Nakano, Y.; Tahara, Y.; Okayama, T.

    1986-01-01

    Reactor physics tests at initial startup and after refueling are performed to verify the nuclear design and to assure safe operations thereafter. Analogue computers and instruments have been widely used for the acquisition of data and those data have been reduced by hand. These conventional procedures, however, require much time and labor. On the other hand, the development of digital computers and devices has made great progress. Under these circumstances the authors have digitalized the procedures mentioned. As described in the paper, the digitalized reactivity meter and data processor system proved to function satisfactorily as intended at the design stage

  5. Digital Signal Processing in Beam Instrumentation Latest Trends and Typical Applications

    CERN Document Server

    Angoletta, Maria Elena

    2003-01-01

    The last decade has seen major improvements in digital hardware, algortithms and software, which have trickled down to the Beam Instrumentation (BI) area. An advantageous transition is taking place towards systems with an ever-stronger digital presence. Digital systems are assembled by means of a rather small number of basic building blocks, with improved speed, precision, signal-to-noise ratio, dynamic range, flexibility, and accompanied by a range of powerful and user-friendly development tools. The paper reviews current digital BI trends, including using Digital Signal Processors, Field Programmable Gate Arrays, Digital Receivers and General Purpose Processors as well as some useful processing algorithms. Selected digital applications are illustrated on control/feedback and beam diagnostics.

  6. Digital image processor as a human factors engineering tool

    International Nuclear Information System (INIS)

    Clayhold, J.A.; Cook, S.A.; Harrington, T.P.; Toffer, H.

    1982-01-01

    Safe and efficient operation of a nuclear reactor requires assimilation by the operators of a large amount of information. This information which includes pressure, temperature and flow conditions, rod and valve positions, and power output is usually presented to the operator in analog form on meters, position indicators, or numerically on digital readouts. Compounding the data assimilation problem is the fact that the meters, readouts, and indicators are usually distributed throughout the control room. The plant parameter and instrumentation displays need to be visible, concise, and concentrated such that an operator can readily survey and understand the information and take proper action during a transient event. This paper describes a technique for condensing a large amount of reactor operating information into a compact readily comprehensible display to assist the reactor operator with his tasks

  7. Nuclear Instrumentation Module (NIM) standard logic processor as a portal signal analyzer

    International Nuclear Information System (INIS)

    Minges, G.P.

    1978-01-01

    A general purpose electronic logic processor has been designed into a 2 wide NIM (Nuclear Instrumentation Module) bin module. The unit utilizes a microprocessor to achieve necessary versatility. The processor's first use is as a new generation signal analyzer for use in radiometric personnel and vehicle portal monitors. Significant improvements have been obtained in sensitivity and stability over existing analog discriminators. The new analyzer is presently being used to update personnel and vehicle portal monitoring systems

  8. A Versatile Multichannel Digital Signal Processing Module for Microcalorimeter Arrays

    Science.gov (United States)

    Tan, H.; Collins, J. W.; Walby, M.; Hennig, W.; Warburton, W. K.; Grudberg, P.

    2012-06-01

    Different techniques have been developed for reading out microcalorimeter sensor arrays: individual outputs for small arrays, and time-division or frequency-division or code-division multiplexing for large arrays. Typically, raw waveform data are first read out from the arrays using one of these techniques and then stored on computer hard drives for offline optimum filtering, leading not only to requirements for large storage space but also limitations on achievable count rate. Thus, a read-out module that is capable of processing microcalorimeter signals in real time will be highly desirable. We have developed multichannel digital signal processing electronics that are capable of on-board, real time processing of microcalorimeter sensor signals from multiplexed or individual pixel arrays. It is a 3U PXI module consisting of a standardized core processor board and a set of daughter boards. Each daughter board is designed to interface a specific type of microcalorimeter array to the core processor. The combination of the standardized core plus this set of easily designed and modified daughter boards results in a versatile data acquisition module that not only can easily expand to future detector systems, but is also low cost. In this paper, we first present the core processor/daughter board architecture, and then report the performance of an 8-channel daughter board, which digitizes individual pixel outputs at 1 MSPS with 16-bit precision. We will also introduce a time-division multiplexing type daughter board, which takes in time-division multiplexing signals through fiber-optic cables and then processes the digital signals to generate energy spectra in real time.

  9. Color balancing in CCD color cameras using analog signal processors made by Kodak

    Science.gov (United States)

    Kannegundla, Ram

    1995-03-01

    The green, red, and blue color filters used for CCD sensors generally have different responses. It is often necessary to balance these three colors for displaying a high-quality image on the monitor. The color filter arrays on sensors have different architectures. A CCD with standard G R G B pattern is considered for the present discussion. A simple method of separating the colors using CDS/H that is a part of KASPs (Analog Signal Processors made by Kodak) and using the gain control, which is also a part of KASPs for color balance, is presented. The colors are separated from the video output of sensor by using three KASPs, one each for green, red, and blue colors and by using alternate sample pulses for green and 1 in 4 pulses for red and blue. The separated colors gain is adjusted either automatically or manually and sent to the monitor for direct display in the analog mode or through an A/D converter digitally to the memory. This method of color balancing demands high-quality ASPs. Kodak has designed four different chips with varying levels of power consumption and speed for analog signal processing of video output of CCD sensors. The analog ASICs have been characterized for noise, clock feedthrough, acquisition time, linearity, variable gain, line rate clamp, black muxing, affect of temperature variations on chip performance, and droop. The ASP chips have met their design specifications.

  10. Synthesis of digital locomotive receiver of automatic locomotive signaling

    Directory of Open Access Journals (Sweden)

    K. V. Goncharov

    2013-02-01

    Full Text Available Purpose. Automatic locomotive signaling of continuous type with a numeric coding (ALSN has several disadvantages: a small number of signal indications, low noise stability, high inertia and low functional flexibility. Search for new and more advanced methods of signal processing for automatic locomotive signaling, synthesis of the noise proof digital locomotive receiver are essential. Methodology. The proposed algorithm of detection and identification locomotive signaling codes is based on the definition of mutual correlations of received oscillation and reference signals. For selecting threshold levels of decision element the following criterion has been formulated: the locomotive receiver should maximum set the correct solution for a given probability of dangerous errors. Findings. It has been found that the random nature of the ALSN signal amplitude does not affect the detection algorithm. However, the distribution law and numeric characteristics of signal amplitude affect the probability of errors, and should be considered when selecting a threshold levels According to obtained algorithm of detection and identification ALSN signals the digital locomotive receiver has been synthesized. It contains band pass filter, peak limiter, normalizing amplifier with automatic gain control circuit, analog to digital converter and digital signal processor. Originality. The ALSN system is improved by the way of the transfer of technical means to modern microelectronic element base, more perfect methods of detection and identification codes of locomotive signaling are applied. Practical value. Use of digital technology in the construction of the locomotive receiver ALSN will expand its functionality, will increase the noise immunity and operation stability of the locomotive signal system in conditions of various destabilizing factors.

  11. Design of an ultra-low-power digital processor for passive UHF RFID tags

    Energy Technology Data Exchange (ETDEWEB)

    Shi Wanggen; Zhuang Yiqi; Li Xiaoming; Wang Xianghua; Jin Zhao; Wang Dan, E-mail: wanggen_shi@163.co [Key Laboratory of the Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, Institute of Microelectronics, Xidian University, Xi' an 710071 (China)

    2009-04-15

    A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed. This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption. By applying methods like system-level power management, global clock gating and low voltage implementation, the total power of the design is reduced to a few microwatts. In addition, an innovative way for the design of a true RNG is presented, which contributes to both low power and secure data transaction. The digital processor is verified by an integrated FPGA platform and implemented by the Synopsys design kit for ASIC flows. The design fits different CMOS technologies and has been taped out using the 2P4M 0.35 mum process of Chartered Semiconductor.

  12. Design of an ultra-low-power digital processor for passive UHF RFID tags

    International Nuclear Information System (INIS)

    Shi Wanggen; Zhuang Yiqi; Li Xiaoming; Wang Xianghua; Jin Zhao; Wang Dan

    2009-01-01

    A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed. This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption. By applying methods like system-level power management, global clock gating and low voltage implementation, the total power of the design is reduced to a few microwatts. In addition, an innovative way for the design of a true RNG is presented, which contributes to both low power and secure data transaction. The digital processor is verified by an integrated FPGA platform and implemented by the Synopsys design kit for ASIC flows. The design fits different CMOS technologies and has been taped out using the 2P4M 0.35 μm process of Chartered Semiconductor.

  13. Digital signal processing an experimental approach

    CERN Document Server

    Engelberg, Shlomo

    2008-01-01

    Digital Signal Processing is a mathematically rigorous but accessible treatment of digital signal processing that intertwines basic theoretical techniques with hands-on laboratory instruction. Divided into three parts, the book covers various aspects of the digital signal processing (DSP) ""problem."" It begins with the analysis of discrete-time signals and explains sampling and the use of the discrete and fast Fourier transforms. The second part of the book???covering digital to analog and analog to digital conversion???provides a practical interlude in the mathematical content before Part II

  14. Development of an Advanced Digital Reactor Protection System Using Diverse Dual Processors to Prevent Common-Mode Failure

    International Nuclear Information System (INIS)

    Shin, Hyun Kook; Nam, Sang Ku; Sohn, Se Do; Chang, Hoon Seon

    2003-01-01

    The advanced digital reactor protection system (ADRPS) with diverse dual processors has been developed to prevent common-mode failure (CMF). The principle of diversity is applied to both hardware design and software design. For hardware diversity, two different types of CPUs are used for the bistable processor and local coincidence logic (LCL) processor. The Versa Module Eurocard-based single board computers are used for the CPU hardware platforms. The QNX operating system and the VxWorks operating system were selected for software diversity. Functional diversity is also applied to the input and output modules, and to the algorithm in the bistable processors and LCL processors. The characteristics of the newly developed digital protection system are described together with the preventive capability against CMF. Also, system reliability analysis is discussed. The evaluation results show that the ADRPS has a good preventive capability against the CMF and is a highly reliable reactor protection system

  15. Fast digital recorders of signal shaping

    International Nuclear Information System (INIS)

    Meleshko, E.A.

    1997-01-01

    Methodology of fast digital registration and pulse signals through fast-action analog-to-digital converters is considered. Systems of digital recorders: sampling and storage devices and operational memory units are described. Main attention is paid to developing parallel analog-to-digital converters, making it possible to bring the conversion frequencies up to several gigahertzes are described. Parallel-sequential analog-to-digital converters, combining high action with increased accuracy are also considered. Concrete examples of designing universal and specialized digital signal recorders, applied in experimental physics, are presented. 44 refs., 12 figs

  16. Preliminary design of an advanced programmable digital filter network for large passive acoustic ASW systems. [Parallel processor

    Energy Technology Data Exchange (ETDEWEB)

    McWilliams, T.; Widdoes, Jr., L. C.; Wood, L.

    1976-09-30

    The design of an extremely high performance programmable digital filter of novel architecture, the LLL Programmable Digital Filter, is described. The digital filter is a high-performance multiprocessor having general purpose applicability and high programmability; it is extremely cost effective either in a uniprocessor or a multiprocessor configuration. The architecture and instruction set of the individual processor was optimized with regard to the multiple processor configuration. The optimal structure of a parallel processing system was determined for addressing the specific Navy application centering on the advanced digital filtering of passive acoustic ASW data of the type obtained from the SOSUS net. 148 figures. (RWR)

  17. A Versatile Image Processor For Digital Diagnostic Imaging And Its Application In Computed Radiography

    Science.gov (United States)

    Blume, H.; Alexandru, R.; Applegate, R.; Giordano, T.; Kamiya, K.; Kresina, R.

    1986-06-01

    In a digital diagnostic imaging department, the majority of operations for handling and processing of images can be grouped into a small set of basic operations, such as image data buffering and storage, image processing and analysis, image display, image data transmission and image data compression. These operations occur in almost all nodes of the diagnostic imaging communications network of the department. An image processor architecture was developed in which each of these functions has been mapped into hardware and software modules. The modular approach has advantages in terms of economics, service, expandability and upgradeability. The architectural design is based on the principles of hierarchical functionality, distributed and parallel processing and aims at real time response. Parallel processing and real time response is facilitated in part by a dual bus system: a VME control bus and a high speed image data bus, consisting of 8 independent parallel 16-bit busses, capable of handling combined up to 144 MBytes/sec. The presented image processor is versatile enough to meet the video rate processing needs of digital subtraction angiography, the large pixel matrix processing requirements of static projection radiography, or the broad range of manipulation and display needs of a multi-modality diagnostic work station. Several hardware modules are described in detail. For illustrating the capabilities of the image processor, processed 2000 x 2000 pixel computed radiographs are shown and estimated computation times for executing the processing opera-tions are presented.

  18. Digital signal processing using MATLAB

    CERN Document Server

    Schilling, Robert L

    2016-01-01

    Focus on the development, implementation, and application of modern DSP techniques with DIGITAL SIGNAL PROCESSING USING MATLAB(R), 3E. Written in an engaging, informal style, this edition immediately captures your attention and encourages you to explore each critical topic. Every chapter starts with a motivational section that highlights practical examples and challenges that you can solve using techniques covered in the chapter. Each chapter concludes with a detailed case study example, a chapter summary with learning outcomes, and practical homework problems cross-referenced to specific chapter sections for your convenience. DSP Companion software accompanies each book to enable further investigation. The DSP Companion software operates with MATLAB(R) and provides intriguing demonstrations as well as interactive explorations of analysis and design concepts.

  19. A digital signal processing system for coherent laser radar

    Science.gov (United States)

    Hampton, Diana M.; Jones, William D.; Rothermel, Jeffry

    1991-01-01

    A data processing system for use with continuous-wave lidar is described in terms of its configuration and performance during the second survey mission of NASA'a Global Backscatter Experiment. The system is designed to estimate a complete lidar spectrum in real time, record the data from two lidars, and monitor variables related to the lidar operating environment. The PC-based system includes a transient capture board, a digital-signal processing (DSP) board, and a low-speed data-acquisition board. Both unprocessed and processed lidar spectrum data are monitored in real time, and the results are compared to those of a previous non-DSP-based system. Because the DSP-based system is digital it is slower than the surface-acoustic-wave signal processor and collects 2500 spectra/s. However, the DSP-based system provides complete data sets at two wavelengths from the continuous-wave lidars.

  20. CAS - CERN Accelerator School: Course on Digital Signal Processing

    CERN Document Server

    Digital Signal Processing; CAS 2007

    2008-01-01

    These proceedings present the lectures given at the twenty-first specialized course organized by the CERN Accelerator School (CAS), the topic being Digital Signal Processing. The course was held in Sigtuna, Sweden, from 31 May–9 June 2007. This is the first time this topic has been selected for a specialized course. Taking into account the number of related applications currently in use in accelerators around the world, it was recognized that such a topic should definitively be incorporated into the CAS series of specialized courses. The specific aim of the course was to introduce the participants to the use and programming of Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs) evaluation boards. The course consisted of lectures in the mornings covering fundamental background knowledge in mathematics, controls theory, design tools, programming hardware platforms, and implementation details. In the afternoons the students split into two groups with people working in pairs. One group w...

  1. A new approach in simulating RF linacs using a general, linear real-time signal processor

    International Nuclear Information System (INIS)

    Young, A.; Jachim, S.P.

    1991-01-01

    Strict requirements on the tolerances of the amplitude and phase of the radio frequency (RF) cavity field are necessary to advance the field of accelerator technology. Due to these stringent requirements upon modern accelerators,a new approach of modeling and simulating is essential in developing and understanding their characteristics. This paper describes the implementation of a general, linear model of an RF cavity which is used to develop a real-time signal processor. This device fully emulates the response of an RF cavity upon receiving characteristic parameters (Q 0 , ω 0 , Δω, R S , Z 0 ). Simulating an RF cavity with a real-time signal processor is beneficial to an accelerator designer because the device allows one to answer fundamental questions on the response of the cavity to a particular stimulus without operating the accelerator. In particular, the complex interactions between the RF power and the control systems, the beam and cavity fields can simply be observed in a real-time domain. The signal processor can also be used upon initialization of the accelerator as a diagnostic device and as a dummy load for determining the closed-loop error of the control system. In essence, the signal processor is capable of providing information that allows an operator to determine whether the control systems and peripheral devices are operating properly without going through the tedious procedure of running the beam through a cavity

  2. Unified and Modular Modeling and Functional Verification Framework of Real-Time Image Signal Processors

    Directory of Open Access Journals (Sweden)

    Abhishek Jain

    2016-01-01

    Full Text Available In VLSI industry, image signal processing algorithms are developed and evaluated using software models before implementation of RTL and firmware. After the finalization of the algorithm, software models are used as a golden reference model for the image signal processor (ISP RTL and firmware development. In this paper, we are describing the unified and modular modeling framework of image signal processing algorithms used for different applications such as ISP algorithms development, reference for hardware (HW implementation, reference for firmware (FW implementation, and bit-true certification. The universal verification methodology- (UVM- based functional verification framework of image signal processors using software reference models is described. Further, IP-XACT based tools for automatic generation of functional verification environment files and model map files are described. The proposed framework is developed both with host interface and with core using virtual register interface (VRI approach. This modeling and functional verification framework is used in real-time image signal processing applications including cellphone, smart cameras, and image compression. The main motivation behind this work is to propose the best efficient, reusable, and automated framework for modeling and verification of image signal processor (ISP designs. The proposed framework shows better results and significant improvement is observed in product verification time, verification cost, and quality of the designs.

  3. Advanced digital signal processing and noise reduction

    CERN Document Server

    Vaseghi, Saeed V

    2008-01-01

    Digital signal processing plays a central role in the development of modern communication and information processing systems. The theory and application of signal processing is concerned with the identification, modelling and utilisation of patterns and structures in a signal process. The observation signals are often distorted, incomplete and noisy and therefore noise reduction, the removal of channel distortion, and replacement of lost samples are important parts of a signal processing system. The fourth edition of Advanced Digital Signal Processing and Noise Reduction updates an

  4. Digital signal processing - growth of a technology

    International Nuclear Information System (INIS)

    Peek, J.B.H.

    1985-01-01

    The rapid development of microelectronics has led to an increasing extent in circuits and systems for digital signal processing. This happened first in professional applications, e.g. geophysics, astronomy and space flight, and now, with the Compact Disc player, these techniques have entered the consumer field. In the near future digital TV applications will undoubtedly follow. This article outlines a number of the developments behind the advancing 'digitization' of modern technology. The article also considers the main advantages and disadvantages of digital signal processing the main modules now used and some common applications. Particular attention is paid to medical applications. (Auth.)

  5. Digital signal processing with kernel methods

    CERN Document Server

    Rojo-Alvarez, José Luis; Muñoz-Marí, Jordi; Camps-Valls, Gustavo

    2018-01-01

    A realistic and comprehensive review of joint approaches to machine learning and signal processing algorithms, with application to communications, multimedia, and biomedical engineering systems Digital Signal Processing with Kernel Methods reviews the milestones in the mixing of classical digital signal processing models and advanced kernel machines statistical learning tools. It explains the fundamental concepts from both fields of machine learning and signal processing so that readers can quickly get up to speed in order to begin developing the concepts and application software in their own research. Digital Signal Processing with Kernel Methods provides a comprehensive overview of kernel methods in signal processing, without restriction to any application field. It also offers example applications and detailed benchmarking experiments with real and synthetic datasets throughout. Readers can find further worked examples with Matlab source code on a website developed by the authors. * Presents the necess...

  6. Simulation of continuously logical base cells (CL BC) with advanced functions for analog-to-digital converters and image processors

    Science.gov (United States)

    Krasilenko, Vladimir G.; Lazarev, Alexander A.; Nikitovich, Diana V.

    2017-10-01

    The paper considers results of design and modeling of continuously logical base cells (CL BC) based on current mirrors (CM) with functions of preliminary analogue and subsequent analogue-digital processing for creating sensor multichannel analog-to-digital converters (SMC ADCs) and image processors (IP). For such with vector or matrix parallel inputs-outputs IP and SMC ADCs it is needed active basic photosensitive cells with an extended electronic circuit, which are considered in paper. Such basic cells and ADCs based on them have a number of advantages: high speed and reliability, simplicity, small power consumption, high integration level for linear and matrix structures. We show design of the CL BC and ADC of photocurrents and their various possible implementations and its simulations. We consider CL BC for methods of selection and rank preprocessing and linear array of ADCs with conversion to binary codes and Gray codes. In contrast to our previous works here we will dwell more on analogue preprocessing schemes for signals of neighboring cells. Let us show how the introduction of simple nodes based on current mirrors extends the range of functions performed by the image processor. Each channel of the structure consists of several digital-analog cells (DC) on 15-35 CMOS. The amount of DC does not exceed the number of digits of the formed code, and for an iteration type, only one cell of DC, complemented by the device of selection and holding (SHD), is required. One channel of ADC with iteration is based on one DC-(G) and SHD, and it has only 35 CMOS transistors. In such ADCs easily parallel code can be realized and also serial-parallel output code. The circuits and simulation results of their design with OrCAD are shown. The supply voltage of the DC is 1.8÷3.3V, the range of an input photocurrent is 0.1÷24μA, the transformation time is 20÷30nS at 6-8 bit binary or Gray codes. The general power consumption of the ADC with iteration is only 50÷100μW, if the

  7. A basic design of microcontroller based data processor and local display for digital logarithmic power channel

    International Nuclear Information System (INIS)

    Nur Khasan; Syahrudin Yusuf

    2009-01-01

    A data processor and its local display for a digital logarithmic power channel, which will be used as a complement and diversification of nuclear reactor instrument, has been designed using micro controller base circuit. This power channel has been designed using TTL device and microcontroller. The roll of the microcontroller will be as data acquisition, data processing for the measurement of percentage reactor power, period and the trip decision. In this design has beer; created display of numerical value will be display on the local display in on-line mode for 1 nV to 10 10 nV neutron flux measurement range. This logarithmic power channel is expected to support the existing instrument which uses analog system in Instrumentation and Control System of nuclear reactor. (author)

  8. Software verification and validation methodology for advanced digital reactor protection system using diverse dual processors to prevent common mode failure

    International Nuclear Information System (INIS)

    Son, Ki Chang; Shin, Hyun Kook; Lee, Nam Hoon; Baek, Seung Min; Kim, Hang Bae

    2001-01-01

    The Advanced Digital Reactor Protection System (ADRPS) with diverse dual processors is being developed by the National Research Lab of KOPEC for ADRPS development. One of the ADRPS goals is to develop digital Plant Protection System (PPS) free of Common Mode Failure (CMF). To prevent CMF, the principle of diversity is applied to both hardware design and software design. For the hardware diversity, two different types of CPUs are used for Bistable Processor and Local Coincidence Logic Processor. The VME based Single Board Computers (SBC) are used for the CPU hardware platforms. The QNX Operating System (OS) and the VxWorks OS are used for software diversity. Rigorous Software Verification and Validation (V and V) is also required to prevent CMF. In this paper, software V and V methodology for the ADRPS is described to enhance the ADRPS software reliability and to assure high quality of the ADRPS software

  9. Development of a new signal processor for tetralateral position sensitive detector based on single-chip microcomputer

    International Nuclear Information System (INIS)

    Huang Meizhen; Shi Longzhao; Wang Yuxing; Ni Yi; Li Zhenqing; Ding Haifeng

    2006-01-01

    An inherently nonlinear relation between the output current of the tetralateral position sensitive detector (PSD) and the position of the incident light spot has been found theoretically. Based on single-chip microcomputer and the theoretical relation between output current and position, a new signal processor capable of correcting nonlinearity and reducing position measurement deviation of tetralateral PSD was developed. A tetralateral PSD (S1200, 13x13 mm 2 , Hamamatsu Photonics K.K.) was measured with the new signal processor, a linear relation between the output position of the PSD, and the incident position of the light spot was obtained. In the 60% range of a 13x13 mm 2 active area, the position nonlinearity (rms) was 0.15% and the position measurement deviation (rms) was ±20 μm. Compared with traditional analog signal processor, the new signal processor is of better compatibility, lower cost, higher precision, and easier to be interfaced

  10. The European project Merlin on multi-gigabit, energy-efficient, ruggedized lightwave engines for advanced on-board digital processors

    Science.gov (United States)

    Stampoulidis, L.; Kehayas, E.; Karppinen, M.; Tanskanen, A.; Heikkinen, V.; Westbergh, P.; Gustavsson, J.; Larsson, A.; Grüner-Nielsen, L.; Sotom, M.; Venet, N.; Ko, M.; Micusik, D.; Kissinger, D.; Ulusoy, A. C.; King, R.; Safaisini, R.

    2017-11-01

    Modern broadband communication networks rely on satellites to complement the terrestrial telecommunication infrastructure. Satellites accommodate global reach and enable world-wide direct broadcasting by facilitating wide access to the backbone network from remote sites or areas where the installation of ground segment infrastructure is not economically viable. At the same time the new broadband applications increase the bandwidth demands in every part of the network - and satellites are no exception. Modern telecom satellites incorporate On-Board Processors (OBP) having analogue-to-digital (ADC) and digital-to-analogue converters (DAC) at their inputs/outputs and making use of digital processing to handle hundreds of signals; as the amount of information exchanged increases, so do the physical size, mass and power consumption of the interconnects required to transfer massive amounts of data through bulk electric wires.

  11. The effects of advanced digital signal processing concepts on VLSIC/VHSIC design

    Science.gov (United States)

    Jankowski, C.

    Implementations of sophisticated mathematical techniques in advanced digital signal processors can significantly improve performance. Future VLSI and VHSI circuit designs must include the practical realization of these algorithms. A structured design approach is described and illustrated with examples from a RNS FIR filter processor development project. The CAE hardware and software required to support tasks of this complexity are also discussed. An EWS is recommended for controlling essential functions such as logic optimization, simulation and verification. The total IC design system is illustrated with the implementation of a new high performance algorithm for computing complex magnitude.

  12. Digital signal processing application in nuclear spectroscopy

    Directory of Open Access Journals (Sweden)

    O. V. Zeynalova

    2009-06-01

    Full Text Available Digital signal processing algorithms for nuclear particle spectroscopy are described along with a digital pile-up elimination method applicable to equidistantly sampled detector signals pre-processed by a charge-sensitive preamplifier. The signal processing algorithms provided as recursive one- or multi-step procedures which can be easily programmed using modern computer programming languages. The influence of the number of bits of the sampling analogue-to-digital converter to the final signal-to-noise ratio of the spectrometer considered. Algorithms for a digital shaping-filter amplifier, for a digital pile-up elimination scheme and for ballistic deficit correction were investigated using a high purity germanium detector. The pile-up elimination method was originally developed for fission fragment spectroscopy using a Frisch-grid back-to-back double ionisation chamber and was mainly intended for pile-up elimination in case of high alpha-radioactivity of the fissile target. The developed pile-up elimination method affects only the electronic noise generated by the preamplifier. Therefore, the influence of the pile-up elimination scheme on the final resolution of the spectrometer investigated in terms of the distance between piled-up pulses. The efficiency of developed algorithms compared with other signal processing schemes published in literature.

  13. RF applications in digital signal processing

    CERN Document Server

    Schilcher, T

    2008-01-01

    Ever higher demands for stability, accuracy, reproducibility, and monitoring capability are being placed on Low-Level Radio Frequency (LLRF) systems of particle accelerators. Meanwhile, continuing rapid advances in digital signal processing technology are being exploited to meet these demands, thus leading to development of digital LLRF systems. The rst part of this course will begin by focusing on some of the important building-blocks of RF signal processing including mixer theory and down-conversion, I/Q (amplitude and phase) detection, digital down-conversion (DDC) and decimation, concluding with a survey of I/Q modulators. The second part of the course will introduce basic concepts of feedback systems, including examples of digital cavity eld and phase control, followed by radial loop architectures. Adaptive feed-forward systems used for the suppression of repetitive beam disturbances will be examined. Finally, applications and principles of system identi cation approaches will be summarized.

  14. Optimization of signal processing algorithm for digital beam position monitor

    International Nuclear Information System (INIS)

    Lai Longwei; Yi Xing; Leng Yongbin; Yan Yingbing; Chen Zhichu

    2013-01-01

    Based on turn-by-turn (TBT) signal processing, the paper emphasizes on the optimization of system timing and implementation of digital automatic gain control, slow application (SA) modules. Beam position including TBT, fast application (FA) and SA data can be acquired. On-line evaluation on Shanghai Synchrotron Radiation Facility (SSRF) shows that the processor is able to get the multi-rate position data which contain true beam movements. When the storage ring is 174 mA and 500 bunches filled, the resolutions of TBT data, FA data and SA data achieve 0.84, 0.44 and 0.23 μm respectively. The above results prove that the design could meet the performance requirements. (authors)

  15. An introduction to digital signal processing

    CERN Document Server

    Karl, John H

    1989-01-01

    An Introduction to Digital Signal Processing is written for those who need to understand and use digital signal processing and yet do not wish to wade through a multi-semester course sequence. Using only calculus-level mathematics, this book progresses rapidly through the fundamentals to advanced topics such as iterative least squares design of IIR filters, inverse filters, power spectral estimation, and multidimensional applications--all in one concise volume.This book emphasizes both the fundamental principles and their modern computer implementation. It presents and demonstrates how si

  16. Precision analog signal processor for beam position measurements in electron storage rings

    International Nuclear Information System (INIS)

    Hinkson, J.A.; Unser, K.B.

    1995-05-01

    Beam position monitors (BPM) in electron and positron storage rings have evolved from simple systems composed of beam pickups, coaxial cables, multiplexing relays, and a single receiver (usually a analyzer) into very complex and costly systems of multiple receivers and processors. The older may have taken minutes to measure the circulating beam closed orbit. Today instrumentation designers are required to provide high-speed measurements of the beam orbit, often at the ring revolution frequency. In addition the instruments must have very high accuracy and resolution. A BPM has been developed for the Advanced Light Source (ALS) in Berkeley which features high resolution and relatively low cost. The instrument has a single purpose; to measure position of a stable stored beam. Because the pickup signals are multiplexed into a single receiver, and due to its narrow bandwidth, the receiver is not intended for single-turn studies. The receiver delivers normalized measurements of X and Y position entirely by analog means at nominally 1 V/mm. No computers are involved. No software is required. Bergoz, a French company specializing in precision beam instrumentation, integrated the ALS design m their new BPM analog signal processor module. Performance comparisons were made on the ALS. In this paper we report on the architecture and performance of the ALS prototype BPM

  17. Precision analog signal processor for beam position measurements in electron storage rings

    International Nuclear Information System (INIS)

    Hinkson, J.A.; Unser, K.B.

    1995-01-01

    Beam position monitors (BPM) in electron and positron storage rings have evolved from simple systems composed of beam pickups, coaxial cables, multiplexing relays, and a single receiver (usually a analyzer) into very complex and costly systems of multiple receivers and processors. The older may have taken minutes to measure the circulating beam closed orbit. Today instrumentation designers are required to provide high-speed measurements of the beam orbit, often at the ring revolution frequency. In addition the instruments must have very high accuracy and resolution. A BPM has been developed for the Advanced Light Source (ALS) in Berkeley which features high resolution and relatively low cost. The instrument has a single purpose; to measure position of a stable stored beam. Because the pickup signals are multiplexed into a single receiver, and due to its narrow bandwidth, the receiver is not intended for single-turn studies. The receiver delivers normalized measurements of X and Y posit ion entirely by analog means at nominally 1 V/mm. No computers are involved. No software is required. Bergoz, a French company specializing in precision beam instrumentation, integrated the ALS design m their new BPM analog signal processor module. Performance comparisons were made on the ALS. In this paper we report on the architecture and performance of the ALS prototype BPM

  18. Computer Aided Teaching of Digital Signal Processing.

    Science.gov (United States)

    Castro, Ian P.

    1990-01-01

    Describes a microcomputer-based software package developed at the University of Surrey for teaching digital signal processing to undergraduate science and engineering students. Menu-driven software capabilities are explained, including demonstration of qualitative concepts and experimentation with quantitative data, and examples are given of…

  19. Digital signal processing at GEND's data center

    International Nuclear Information System (INIS)

    Jackson, J.E.

    1977-01-01

    The conversion and recording of analog signals in digital form has been an active element in the manufacturing operations of the General Electric Neutron Devices Department (GEND) since 1966. The first computerized data system for these digitized waveforms was implemented at GEND's data center approximately two years later during 1968. The evolution and integration of these two activities at GEND are addressed in this paper. Beginning with the tester--data center interface, emphasis is placed on previous approaches, current capabilities, near-term trends, and future requirements. The digitizing process has developed into a firmly established set of hardware and associated software techniques which has proven itself as an accurate, reliable procedure for capturing waveform characteristics. The most important aspect of this process is the recent trend toward increased sampling rates and a greater number of digitized parameters per operation. The combined effect is a tremendous increase in output data volumes. Since digital signal processing carries the potential for significant contributions to manufacturing quality and reliability, as well as engineering design and development, increased activity in this area appears extremely desirable. 11 figures

  20. Study of time-domain digital pulse shaping algorithms for nuclear signals

    International Nuclear Information System (INIS)

    Zhou Jianbin; Tuo Xianguo; Zhu Xing; Liu Yi; Zhou Wei; Lei Jiarong

    2012-01-01

    With the development on high-speed integrated circuit, fast high resolution sampling ADC and digital signal processors are replacing analog shaping amplifier circuit. This paper firstly presents the numerical analysis and simulation on R-C shaping circuit model and C-R shaping circuit model. Mathematic models are established based on 1 st order digital differential method and Kirchhoff Current Law in time domain, and a simulation and error evaluation experiment on an ideal digital signal are carried out with Excel VBA. A digital shaping test for a semiconductor X-ray detector in real time is also presented. Then a numerical analysis for Sallen-Key(S-K) low-pass filter circuit model is implemented based on the analysis of digital R-C and digital C-R shaping methods. By applying the 2 nd order non-homogeneous differential equation,the authors implement a digital Gaussian filter model for a standard exponential-decaying signal and a nuclear pulse signal. Finally, computer simulations and experimental tests are carried out and the results show the possibility of the digital pulse processing algorithms. (authors)

  1. Concurrent signal combining and channel estimation in digital communications

    Science.gov (United States)

    Ormesher, Richard C [Albuquerque, NM; Mason, John J [Albuquerque, NM

    2011-08-30

    In the reception of digital information transmitted on a communication channel, a characteristic exhibited by the communication channel during transmission of the digital information is estimated based on a communication signal that represents the digital information and has been received via the communication channel. Concurrently with the estimating, the communication signal is used to decide what digital information was transmitted.

  2. Operation and performance of a longitudinal feedback system using digital signal processing

    International Nuclear Information System (INIS)

    Teytelman, D.; Fox, J.; Hindi, H.

    1994-01-01

    A programmable longitudinal feedback system using a parallel array of AT ampersand T 1610 digital signal processors has been developed as a component of the PEP-II R ampersand D program. This system has been installed at the Advanced Light Source (LBL) and implements full speed bunch by bunch signal processing for storage rings with bunch spacing of 4ns. Open and closed loop results showing the action of the feedback system are presented, and the system is shown to damp coupled-bunch instabilities in the ALS. A unified PC-based software environment for the feedback system operation is also described

  3. Real-time simulation of MHD/steam power plants by digital parallel processors

    International Nuclear Information System (INIS)

    Johnson, R.M.; Rudberg, D.A.

    1981-01-01

    Attention is given to a large FORTRAN coded program which simulates the dynamic response of the MHD/steam plant on either a SEL 32/55 or VAX 11/780 computer. The code realizes a detailed first-principle model of the plant. Quite recently, in addition to the VAX 11/780, an AD-10 has been installed for usage as a real-time simulation facility. The parallel processor AD-10 is capable of simulating the MHD/steam plant at several times real-time rates. This is desirable in order to develop rapidly a large data base of varied plant operating conditions. The combined-cycle MHD/steam plant model is discussed, taking into account a number of disadvantages. The disadvantages can be overcome with the aid of an array processor used as an adjunct to the unit processor. The conversion of some computations for real-time simulation is considered

  4. Estimating Angle of Arrival (AOA for Wideband Signal by Sensor Delay Line (SDL and Tapped Delay Line (TDL Processors

    Directory of Open Access Journals (Sweden)

    Bassim Sayed Mohammed

    2018-04-01

    Full Text Available Angle of arrival (AOA estimation for wideband signal becomes more necessary for modern communication systems like Global System for Mobile (GSM, satellite, military applications and spread spectrum (frequency hopping and direct sequence. Most of the researchers are focusing on how to cancel the effects of signal bandwidth on AOA estimation performance by using a transversal filter (tap delay line (TDL. Most of the researchers were using two elements array antenna to study these effects. In this research, a general case of proposed (M array elements is used. A transversal filter (TDL in phase adaptive array antenna system is used to calculate the optimum number of taps required to compensate these effect. The proposed system uses a phase adaptive array antenna in conjunction with LMS algorithm to work an angle of arrival (AOA estimator for wideband signals rather than interference canceller. An alternative solution to compensate for the effect of signal bandwidth is proposed by using sensor delay line (SDL instead of fixed delay unit since it has variable time sampling in the time domain and not fixed time delay, depending on the angle of arrival of received signals. The proposed system has the ability to estimate two parameters for received signals simultaneously (the output Signal to Noise Ratio (SNR and AOA, unlike others systems which estimate AOA only. The comparison of the simulation results with Multiple Signal Classification (MUSIC technique showed that the proposed system gives good results for estimating AOA and the output SNR for wideband signals. (SDL processor shows better performance result than (TDL processor. MUSIC technique with both (SDL and (TDL processors shows unacceptable results for estimating (AOA for the wideband signal.

  5. The Digital Algorithm Processors for the ATLAS Level-1 Calorimeter Trigger

    CERN Document Server

    Silverstein, S

    2010-01-01

    The ATLAS Level-1 Calorimeter Trigger identifies high-ET jets, electrons/photons and hadrons and measures total and missing transverse energy in proton-proton collisions at the Large Hadron Collider. Two subsystems – the Jet/Energy-sum Processor (JEP) and the Cluster Processor(CP) – process data from every crossing, and report feature multiplicities and energy sums to the ATLAS Central Trigger Processor, which produces a Level-1 Accept decision. Locations and types of identified features are read out to the Level-2 Trigger as regions-of-interest, and quality-monitoring information is read out to the ATLAS data acquisition system. The JEP and CP subsystems share a great deal of common infrastructure, including a custom backplane, several common hardware modules, and readout hardware. Some of the common modules use FPGAs with selectable firmware configurations based on the location in the system. This approach saved substantial development effort and provided a uniform model for software development. We pre...

  6. The Digital Algorithm Processors for the ATLAS Level-1 Calorimeter Trigger

    CERN Document Server

    Silverstein, S; The ATLAS collaboration

    2009-01-01

    The ATLAS Level-1 Calorimeter Trigger identifies high-ET jets, electrons/photons and hadrons and measures total and missing transverse energy in proton-proton collisions at the Large Hadron Collider. Two subsystems – the Jet/Energy-sum Processor (JEP) and the Cluster Processor(CP) – process data from every crossing, and report feature multiplicities and energy sums to the ATLAS Central Trigger Processor, which produces a Level-1 Accept decision. Locations and types of identified features are read out to the Level-2 Trigger as regions-of-interest, and quality-monitoring information is read out to the ATLAS data acquisition system. The JEP and CP subsystems share a great deal of common infrastructure, including a custom backplane, several common hardware modules, and readout hardware. Some of the common modules use FPGAs with selectable firmware configurations based on the location in the system. This approach saved substantial development effort and provided a uniform model for software development. We pre...

  7. Application of specialized RISC processor for realization of algorithms for track signal filtration on data read from CCD

    International Nuclear Information System (INIS)

    Ban, Ya.; Kotov, V.M.; Kharcharufkova, K.

    1987-01-01

    Algorithms for track signal filtration from bubble and streamer spark chambers read by CCD matrix with elements of 256x288 dimensions are described. The microprogrammed RISC processor is used for preliminary processing and filtration of data obtained. It makes possible to recognize and filter track elements in the zone of 0.25 mm 2 square during 0.17-0.20 s, that maintains it in real time operation

  8. Integrated Advanced Microwave Sounding Unit-A (AMSU-A). Engineering Test Report: METSAT A1 Signal Processor (P/N: 1331670-2, S/N: F04)

    Science.gov (United States)

    Lund, D.

    1998-01-01

    This report presents a description of the tests performed, and the test data, for the A1 METSAT Signal Processor Assembly PN: 1331679-2, S/N F04. The assembly was tested in accordance with AE-26754, "METSAT Signal Processor Scan Drive Test and Integration Procedure." The objective is to demonstrate functionality of the signal processor prior to instrument integration.

  9. Digital signal processing for He3 proportional counter

    International Nuclear Information System (INIS)

    Zeynalov, Sh.S.; Ahmadov, Q.S.

    2010-01-01

    Full text : Data acquisition systems for nuclear spectroscopy have traditionally been based on systems with analog shaping amplifiers followed by analog-to-digital converters. Recently, however, new systems based on digital signal processing make possible to replace the analog shaping and timing circuitry the numerical algorithms to derive properties of the pulse such as its amplitude. DSP is a fully numerical analysis of the detector pulse signals and this technique demonstrates significant advantages over analog systems in some circumstances. From a mathematical point of view, one can consider the signal evolution from the detector to the ADC as a sequence of transformations that can be described by precisely defined mathematical expressions. Digital signal processing with ADCs has the possibility to utilize further information on the signal pulses from radiation detectors. In the experiment each step of the signal generation in the 3He filled proportional counter was described using digital signal processing techniques (DSP). The electronic system has consisted of a detector, a preamplifier and a digital oscilloscope. The pulses from the detector were digitized using a digital storage oscilloscope. This oscilloscope allowed signal digitization with accuracy of 8 bit (256 levels) and with frequency of up to 5 * 10 8 samples/s. As a neutron source was used Cf-252. To obtain detector output current pulse I(t) created by the motions of the ions/electrons pairs was written an algorithm which can easily be programmed using modern computer programming languages.

  10. Analog and digital signal analysis from basics to applications

    CERN Document Server

    Cohen Tenoudji, Frédéric

    2016-01-01

    This book provides comprehensive, graduate-level treatment of analog and digital signal analysis suitable for course use and self-guided learning. This expert text guides the reader from the basics of signal theory through a range of application tools for use in acoustic analysis, geophysics, and data compression. Each concept is introduced and explained step by step, and the necessary mathematical formulae are integrated in an accessible and intuitive way. The first part of the book explores how analog systems and signals form the basics of signal analysis. This section covers Fourier series and integral transforms of analog signals, Laplace and Hilbert transforms, the main analog filter classes, and signal modulations. Part II covers digital signals, demonstrating their key advantages. It presents z and Fourier transforms, digital filtering, inverse filters, deconvolution, and parametric modeling for deterministic signals. Wavelet decomposition and reconstruction of non-stationary signals are also discussed...

  11. High Channel Count Time-to-Digital Converter and Lasercom Processor, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — High-channel-count, high-precision, and high-throughput time-to-digital converters (TDC) are needed to support detector arrays used in deep-space optical...

  12. Closed orbit feedback with digital signal processing

    International Nuclear Information System (INIS)

    Chung, Y.; Kirchman, J.; Lenkszus, F.

    1994-01-01

    The closed orbit feedback experiment conducted on the SPEAR using the singular value decomposition (SVD) technique and digital signal processing (DSP) is presented. The beam response matrix, defined as beam motion at beam position monitor (BPM) locations per unit kick by corrector magnets, was measured and then analyzed using SVD. Ten BPMs, sixteen correctors, and the eight largest SVD eigenvalues were used for closed orbit correction. The maximum sampling frequency for the closed loop feedback was measured at 37 Hz. Using the proportional and integral (PI) control algorithm with the gains Kp = 3 and K I = 0.05 and the open-loop bandwidth corresponding to 1% of the sampling frequency, a correction bandwidth (-3 dB) of approximately 0.8 Hz was achieved. Time domain measurements showed that the response time of the closed loop feedback system for 1/e decay was approximately 0.25 second. This result implies ∼ 100 Hz correction bandwidth for the planned beam position feedback system for the Advanced Photon Source storage ring with the projected 4-kHz sampling frequency

  13. Development of a compact digital reactivity meter and a reactor physics data processor

    International Nuclear Information System (INIS)

    Shimazu, Y.; Nakano, Y.; Tahara, Y.; Okayama, T.

    1987-01-01

    Reactor physics tests at initial startup and after refuelings are performed to verify the nuclear design and to assure safe operation. Analog computers and instruments are widely used for the acquisition of data, and these data are reduced by hand. These conventional procedures, however, require much time and labor. Since there has been great progress in the development of digital computers and devices, these procedures are digitalized, which successfully reduces the time and labor required for reactor physics tests

  14. Operation and performance of a longitudinal damping system using parallel digital signal processing

    International Nuclear Information System (INIS)

    Fox, J.D.; Hindi, H.; Linscott, I.

    1994-06-01

    A programmable longitudinal feedback system based on four AT ampersand T 1610 digital signal processors has been developed as a component of the PEP-II R ampersand D program. This Longitudinal Quick Prototype is a proof of concept for the PEP-II system and implements full speed bunch-by-bunch signal processing for storage rings with bunch spacings of 4 ns. The design implements, via software, a general purpose feedback controller which allows the system to be operated at several accelerator facilities. The system configuration used for tests at the LBL Advanced Light Source is described. Open and closed loop results showing the detection and calculation of feedback signals from bunch motion are presented, and the system is shown to damp coupled-bunch instabilities in the ALS. Use of the system for accelerator diagnostics is illustrated via measurement of injection transients and analysis of open loop bunch motion

  15. eCTG: an automatic procedure to extract digital cardiotocographic signals from digital images.

    Science.gov (United States)

    Sbrollini, Agnese; Agostinelli, Angela; Marcantoni, Ilaria; Morettini, Micaela; Burattini, Luca; Di Nardo, Francesco; Fioretti, Sandro; Burattini, Laura

    2018-03-01

    Cardiotocography (CTG), consisting in the simultaneous recording of fetal heart rate (FHR) and maternal uterine contractions (UC), is a popular clinical test to assess fetal health status. Typically, CTG machines provide paper reports that are visually interpreted by clinicians. Consequently, visual CTG interpretation depends on clinician's experience and has a poor reproducibility. The lack of databases containing digital CTG signals has limited number and importance of retrospective studies finalized to set up procedures for automatic CTG analysis that could contrast visual CTG interpretation subjectivity. In order to help overcoming this problem, this study proposes an electronic procedure, termed eCTG, to extract digital CTG signals from digital CTG images, possibly obtainable by scanning paper CTG reports. eCTG was specifically designed to extract digital CTG signals from digital CTG images. It includes four main steps: pre-processing, Otsu's global thresholding, signal extraction and signal calibration. Its validation was performed by means of the "CTU-UHB Intrapartum Cardiotocography Database" by Physionet, that contains digital signals of 552 CTG recordings. Using MATLAB, each signal was plotted and saved as a digital image that was then submitted to eCTG. Digital CTG signals extracted by eCTG were eventually compared to corresponding signals directly available in the database. Comparison occurred in terms of signal similarity (evaluated by the correlation coefficient ρ, and the mean signal error MSE) and clinical features (including FHR baseline and variability; number, amplitude and duration of tachycardia, bradycardia, acceleration and deceleration episodes; number of early, variable, late and prolonged decelerations; and UC number, amplitude, duration and period). The value of ρ between eCTG and reference signals was 0.85 (P digital FHR and UC signals from digital CTG images. Copyright © 2018 Elsevier B.V. All rights reserved.

  16. Pedagogical reforms of digital signal processing education

    Science.gov (United States)

    Christensen, Michael

    The future of the engineering discipline is arguably predicated heavily upon appealing to the future generation, in all its sensibilities. The greatest burden in doing so, one might rightly believe, lies on the shoulders of the educators. In examining the causal means by which the profession arrived at such a state, one finds that the technical revolution, precipitated by global war, had, as its catalyst, institutions as expansive as the government itself to satisfy the demand for engineers, who, as a result of such an existential crisis, were taught predominantly theoretical underpinnings to address a finite purpose. By contrast, the modern engineer, having expanded upon this vision and adapted to an evolving society, is increasingly placed in the proverbial role of the worker who must don many hats: not solely a scientist, yet often an artist; not a businessperson alone, but neither financially naive; not always a representative, though frequently a collaborator. Inasmuch as change then serves as the only constancy in a global climate, therefore, the educational system - if it is to mimic the demands of the industry - is left with an inherent need for perpetual revitalization to remain relevant. This work aims to serve that end. Motivated by existing research in engineering education, an epistemological challenge is molded into the framework of the electrical engineer with emphasis on digital signal processing. In particular, it is investigated whether students are better served by a learning paradigm that tolerates and, when feasible, encourages error via a medium free of traditional adjudication. Through the creation of learning modules using the Adobe Captivate environment, a wide range of fundamental knowledge in signal processing is challenged within the confines of existing undergraduate courses. It is found that such an approach not only conforms to the research agenda outlined for the engineering educator, but also reflects an often neglected reality

  17. Recommending the heterogeneous cluster type multi-processor system computing

    International Nuclear Information System (INIS)

    Iijima, Nobukazu

    2010-01-01

    Real-time reactor simulator had been developed by reusing the equipment of the Musashi reactor and its performance improvement became indispensable for research tools to increase sampling rate with introduction of arithmetic units using multi-Digital Signal Processor(DSP) system (cluster). In order to realize the heterogeneous cluster type multi-processor system computing, combination of two kinds of Control Processor (CP) s, Cluster Control Processor (CCP) and System Control Processor (SCP), were proposed with Large System Control Processor (LSCP) for hierarchical cluster if needed. Faster computing performance of this system was well evaluated by simulation results for simultaneous execution of plural jobs and also pipeline processing between clusters, which showed the system led to effective use of existing system and enhancement of the cost performance. (T. Tanaka)

  18. Digital signal processing in power electronics control circuits

    CERN Document Server

    Sozanski, Krzysztof

    2013-01-01

    Many digital control circuits in current literature are described using analog transmittance. This may not always be acceptable, especially if the sampling frequency and power transistor switching frequencies are close to the band of interest. Therefore, a digital circuit is considered as a digital controller rather than an analog circuit. This helps to avoid errors and instability in high frequency components. Digital Signal Processing in Power Electronics Control Circuits covers problems concerning the design and realization of digital control algorithms for power electronics circuits using

  19. Digital signal processing in power system protection and control

    CERN Document Server

    Rebizant, Waldemar; Wiszniewski, Andrzej

    2011-01-01

    Digital Signal Processing in Power System Protection and Control bridges the gap between the theory of protection and control and the practical applications of protection equipment. Understanding how protection functions is crucial not only for equipment developers and manufacturers, but also for their users who need to install, set and operate the protection devices in an appropriate manner. After introductory chapters related to protection technology and functions, Digital Signal Processing in Power System Protection and Control presents the digital algorithms for signal filtering, followed

  20. Neutron coincidence counting with digital signal processing

    International Nuclear Information System (INIS)

    Bagi, Janos; Dechamp, Luc; Dransart, Pascal; Dzbikowicz, Zdzislaw; Dufour, Jean-Luc; Holzleitner, Ludwig; Huszti, Joseph; Looman, Marc; Marin Ferrer, Montserrat; Lambert, Thierry; Peerani, Paolo; Rackham, Jamie; Swinhoe, Martyn; Tobin, Steve; Weber, Anne-Laure; Wilson, Mark

    2009-01-01

    Neutron coincidence counting is a widely adopted nondestructive assay (NDA) technique used in nuclear safeguards to measure the mass of nuclear material in samples. Nowadays, most neutron-counting systems are based on the original-shift-register technology, like the (ordinary or multiplicity) Shift-Register Analyser. The analogue signal from the He-3 tubes is processed by an amplifier/single channel analyser (SCA) producing a train of TTL pulses that are fed into an electronic unit that performs the time- correlation analysis. Following the suggestion of the main inspection authorities (IAEA, Euratom and the French Ministry of Industry), several research laboratories have started to study and develop prototypes of neutron-counting systems with PC-based processing. Collaboration in this field among JRC, IRSN and LANL has been established within the framework of the ESARDA-NDA working group. Joint testing campaigns have been performed in the JRC PERLA laboratory, using different equipment provided by the three partners. One area of development is the use of high-speed PCs and pulse acquisition electronics that provide a time stamp (LIST-Mode Acquisition) for every digital pulse. The time stamp data can be processed directly during acquisition or saved on a hard disk. The latter method has the advantage that measurement data can be analysed with different values for parameters like predelay and gate width, without repeating the acquisition. Other useful diagnostic information, such as die-away time and dead time, can also be extracted from this stored data. A second area is the development of 'virtual instruments.' These devices, in which the pulse-processing system can be embedded in the neutron counter itself and sends counting data to a PC, can give increased data-acquisition speeds. Either or both of these developments could give rise to the next generation of instrumentation for improved practical neutron-correlation measurements. The paper will describe the

  1. Seismometer array station processors

    International Nuclear Information System (INIS)

    Key, F.A.; Lea, T.G.; Douglas, A.

    1977-01-01

    A description is given of the design, construction and initial testing of two types of Seismometer Array Station Processor (SASP), one to work with data stored on magnetic tape in analogue form, the other with data in digital form. The purpose of a SASP is to detect the short period P waves recorded by a UK-type array of 20 seismometers and to edit these on to a a digital library tape or disc. The edited data are then processed to obtain a rough location for the source and to produce seismograms (after optimum processing) for analysis by a seismologist. SASPs are an important component in the scheme for monitoring underground explosions advocated by the UK in the Conference of the Committee on Disarmament. With digital input a SASP can operate at 30 times real time using a linear detection process and at 20 times real time using the log detector of Weichert. Although the log detector is slower, it has the advantage over the linear detector that signals with lower signal-to-noise ratio can be detected and spurious large amplitudes are less likely to produce a detection. It is recommended, therefore, that where possible array data should be recorded in digital form for input to a SASP and that the log detector of Weichert be used. Trial runs show that a SASP is capable of detecting signals down to signal-to-noise ratios of about two with very few false detections, and at mid-continental array sites it should be capable of detecting most, if not all, the signals with magnitude above msub(b) 4.5; the UK argues that, given a suitable network, it is realistic to hope that sources of this magnitude and above can be detected and identified by seismological means alone. (author)

  2. A soft-core processor architecture optimised for radar signal processing applications

    CSIR Research Space (South Africa)

    Broich, R

    2013-12-01

    Full Text Available -performance soft-core processing architecture is proposed. To develop such a processing architecture, data and signal-flow characteristics of common radar signal processing algorithms are analysed. Each algorithm is broken down into signal processing...

  3. Electronic circuit for rapid digital NMR signal imaging

    International Nuclear Information System (INIS)

    Jurak, P.; Krejci, I.; Belusa, J.

    1992-01-01

    The circuit is made up of two analog-to-digital converters whose outputs are connected to a process computer and the synchronization inputs to the clock terminal. The one analog-to-digital converter is connected, via the signal input, to the terminal of the nuclear magnetic resonance locking signal. The signal input of the other analog-to-digital converter is connected to the time base generator, which can be switched off, and to the magnetic field sweep circuit. The assets of this citcuit include easy computerized processing of the digitized information independently of the time base generation, and prevention of interfering signals from penetrating into the magnetic field sweep circuits. (Z.S.). 1 fig

  4. Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

    Science.gov (United States)

    Baranauskas, Dalius (Inventor); Baranauskas, Gytis (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor); Lim, Boon H. (Inventor)

    2017-01-01

    According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

  5. Digital signaling decouples activation probability and population heterogeneity

    DEFF Research Database (Denmark)

    Kellogg, Ryan A; Tian, Chengzhe; Lipniacki, Tomasz

    2015-01-01

    Digital signaling enhances robustness of cellular decisions in noisy environments, but it is unclear how digital systems transmit temporal information about a stimulus. To understand how temporal input information is encoded and decoded by the NF-κB system, we studied transcription factor dynamic...

  6. Digital mineral logging system

    International Nuclear Information System (INIS)

    West, J.B.

    1980-01-01

    A digital mineral logging system acquires data from a mineral logging tool passing through a borehole and transmits the data uphole to an electronic digital signal processor. A predetermined combination of sensors, including a deviometer, is located in a logging tool for the acquisition of the desired data as the logging tool is raised from the borehole. Sensor data in analog format is converted in the logging tool to a digital format and periodically batch transmitted to the surface at a predetermined sampling rate. An identification code is provided for each mineral logging tool, and the code is transmitted to the surface along with the sensor data. The self-identifying tool code is transmitted to the digital signal processor to identify the code against a stored list of the range of numbers assigned to that type of tool. The data is transmitted up the d-c power lines of the tool by a frequency shift key transmission technique. At the surface, a frequency shift key demodulation unit transmits the decoupled data to an asynchronous receiver interfaced to the electronic digital signal processor. During a recording phase, the signals from the logging tool are read by the electronic digital signal processor and stored for later processing. During a calculating phase, the stored data is processed by the digital signal processor and the results are outputted to a printer or plotter, or both

  7. Streamlining digital signal processing a tricks of the trade guidebook

    CERN Document Server

    2012-01-01

    Streamlining Digital Signal Processing, Second Edition, presents recent advances in DSP that simplify or increase the computational speed of common signal processing operations and provides practical, real-world tips and tricks not covered in conventional DSP textbooks. It offers new implementations of digital filter design, spectrum analysis, signal generation, high-speed function approximation, and various other DSP functions. It provides:Great tips, tricks of the trade, secrets, practical shortcuts, and clever engineering solutions from seasoned signal processing professionalsAn assortment.

  8. Digital signal processing for He3 proportional counter

    International Nuclear Information System (INIS)

    Ahmadov, Q.S.; Institute of Radiation Problems, ANAS, Baku

    2011-01-01

    Full text: Data acquisition systems for nuclear spectroscopy have traditionally been based on systems with analog shaping amplifiers followed by analog-to-digital converters. Recently, however, new systems based on digital signal processing allow us to replace the analog shaping and timing circuitry the numerical algorithms to derive properties of the pulse such as its amplitude. DSP is a fully numerical analysis of the detector pulse signals and this technique demonstrates significant advantages over analog systems in some circumstances. From a mathematical point of view, one can consider the signal evolution from the detector to the ADC as a sequence of transformations that can be described by precisely defined mathematical expressions.Digital signal processing with ADCs has the possibility to utilize further information on the signal pulses from radiation detectors [1] [2]. In the experiment each step of the signal generation in the 3He filled proportional counter was described using digital signal processing techniques (DSP). The electronic system has consisted of a detector, a preamplifier and a digital oscilloscope. The pulses from the detector were digitized using a OTSZS-02 (250USB)-4 digital storage oscilloscope from ZAO R UDNEV-SHILYAYEV . This oscilloscope allowed signal digitization with accuracy of 8 bit(256 levels) and with frequency of up to 5.10''8 samples/s. As a neutron source was used Cf-252.To obtain detector output current pulse I(t) created by the motions of the ions/electrons pairs was written an algorithm which can easily be programmed using modern computer programming languages

  9. Process and circuiting arrangement for the conversion of analog signals to digital signals and digital signals to analog signals

    International Nuclear Information System (INIS)

    Wintzer, K.

    1977-01-01

    Process for analog-to-digital and digital-to-analog conversion in telecommunication systems whose outstations each have an analog transmitter and an analog receiver. The invention illustrates a method of reducing the power demand of the converters at times when no conversion processes take place. (RW) [de

  10. Influence of Signal Stationarity on Digital Stochastic Measurement Implementation

    Directory of Open Access Journals (Sweden)

    Ivan Župunski

    2013-06-01

    Full Text Available The paper presents the influence of signal stationarity on digital stochastic measurement method implementation. The implementation method is based on stochastic voltage generators, analog adders, low resolution A/D converter, and multipliers and accumulators implemented by Field-Programmable Gate Array (FPGA. The characteristic of first implementations of digital stochastic measurement was the measurement of stationary signal harmonics over the constant measurement period. Later, digital stochastic measurement was extended and used also when it was necessary to measure timeseries of non-stationary signal over the variable measurement time. The result of measurement is the set of harmonics, which is, in the case of non-stationary signals, the input for calculating digital values of signal in time domain. A theoretical approach to determine measurement uncertainty is presented and the accuracy trends with varying signal-to-noise ratio (SNR are analyzed. Noisy brain potentials (spontaneous and nonspontaneous are selected as an example of real non-stationary signal and its digital stochastic measurement is tested by simulations and experiments. Tests were performed without noise and with adding noise with SNR values of 10dB, 0dB and - 10dB. The results of simulations and experiments are compared versus theory calculations, and comparasion confirms the theory.

  11. Unified Digital Periodic Signal Filters for Power Converter Systems

    DEFF Research Database (Denmark)

    Yang, Yongheng; Xin, Zhen; Zhou, Keliang

    2017-01-01

    Periodic signal controllers like repetitive and resonant controllers have demonstrated much potential in the control of power electronic converters, where periodic signals (e.g., ac voltages and currents) can be precisely regulated to follow references. Beyond the control of periodic signals, ac...... signal processing (e.g., in synchronization and pre-filtering) is also very important for power converter systems. Hence, this paper serves to unify digital periodic signal filters so as to maximize their roles in power converter systems (e.g., enhance the control of ac signals). The unified digital...... periodic signal filters behave like a comb filter, but it can also be configured to selectively filter out the harmonics of interest (e.g., the odd-order harmonics in single-phase power converter systems). Moreover, a virtual variable-sampling-frequency unit delay that enables frequency adaptive periodic...

  12. A 16-channel real-time digital processor for pulse-shape discrimination in multiplicity assay

    International Nuclear Information System (INIS)

    Joyce, Malcolm J.; Aspinall, M.D.; Cave, F.D.; Lavietes, A.

    2013-06-01

    In recent years, real-time neutron/γ-ray pulse-shape discrimination has become feasible for use with scintillator-based detectors that respond extremely quickly, on the order of 25 ns in terms of pulse width, and their application to a variety of nuclear material assays has been reported. For the in-situ analysis of nuclear materials, measurements are often based on the multiplicity assessment of spontaneous fission events. An example of this is the 240 Pu eff assessment stemming from long-established techniques developed for 3 He-based neutron coincidence counters when 3 He was abundant and cheap. However, such measurements when using scintillator detectors can be plagued by low detection efficiencies and low orders of coincidence (often limited to triples) if the number of detectors in use is similarly limited to 3-4 detectors. Conversely, an array of >10 detector modules arranged to optimize efficiency and multiplicity sensitivity, shifts the emphasis in terms of performance requirement to the real-time digital analyzer and, critically, to the scope remaining in the temporal processing window of these systems. In this paper we report on the design, development and commissioning of a bespoke, 16-channel real-time pulse-shape discrimination analyzer specified for the materials assay challenge summarized above. The analyzer incorporates 16 dedicated and independent high-voltage supplies along with 16 independent digital processing channels offering pulse-shape discrimination at a rate of 3 x 10 6 events per second. These functions are configured from a dedicated graphical user interface, and all settings can be adjusted on-the-fly with the analyzer effectively configured one-time-only (where desired) for subsequent plug-and-play connection, for example to a fuel bundle organic scintillation detector array. (authors)

  13. Implementation theory of distortion-invariant pattern recognition for optical and digital signal processing systems

    Science.gov (United States)

    Lhamon, Michael Earl

    A pattern recognition system which uses complex correlation filter banks requires proportionally more computational effort than single-real valued filters. This introduces increased computation burden but also introduces a higher level of parallelism, that common computing platforms fail to identify. As a result, we consider algorithm mapping to both optical and digital processors. For digital implementation, we develop computationally efficient pattern recognition algorithms, referred to as, vector inner product operators that require less computational effort than traditional fast Fourier methods. These algorithms do not need correlation and they map readily onto parallel digital architectures, which imply new architectures for optical processors. These filters exploit circulant-symmetric matrix structures of the training set data representing a variety of distortions. By using the same mathematical basis as with the vector inner product operations, we are able to extend the capabilities of more traditional correlation filtering to what we refer to as "Super Images". These "Super Images" are used to morphologically transform a complicated input scene into a predetermined dot pattern. The orientation of the dot pattern is related to the rotational distortion of the object of interest. The optical implementation of "Super Images" yields feature reduction necessary for using other techniques, such as artificial neural networks. We propose a parallel digital signal processor architecture based on specific pattern recognition algorithms but general enough to be applicable to other similar problems. Such an architecture is classified as a data flow architecture. Instead of mapping an algorithm to an architecture, we propose mapping the DSP architecture to a class of pattern recognition algorithms. Today's optical processing systems have difficulties implementing full complex filter structures. Typically, optical systems (like the 4f correlators) are limited to phase

  14. Digital signal display board design: A knowledge based study

    International Nuclear Information System (INIS)

    Chaitanya, V. Sree Krishna; Rao, C. Raghavendra

    2007-01-01

    The digital signal display board is assumed to be composed of picture tubes for the purpose of displaying characters. The signal board with the picture tubes constitutes an Information System. A methodology for obtaining the discrimable matrix or table (more decisive attributes) and knowledge reduction for the above information system is proposed

  15. Development of a system based in a digital signal processor (DSP) for a simulator of power regulation in a reactor: first stage; Desarrollo de un sistema basado en un DSP para un simulador de regulacion de potencia en un reactor: 1. etapa

    Energy Technology Data Exchange (ETDEWEB)

    Benitez R, J.S.; Perez C, B. [Instituto Nacional de Investigaciones Nucleares, Km. 36.5 Carretera Mexico-Toluca, Municipio de Ocoyoacac, 52045 Estado de Mexico (Mexico)

    2002-07-01

    The first stage of the development of a digital system based on a DSP is presented which forms part of an hybrid simulator for the power regulation in am model of the punctual kinetics of a TRIGA reactor type. The DSP performs the regulation, using a Mandami type algorithm of diffuse control. In the algorithm, the universe of the output variable is discretized for performing in an unique stage the aggregation functions and dis-diffusization. (Author)

  16. A Computer- Based Digital Signal Processing for Nuclear Scintillator Detectors

    International Nuclear Information System (INIS)

    Ashour, M.A.; Abo Shosha, A.M.

    2000-01-01

    In this paper, a Digital Signal Processing (DSP) Computer-based system for the nuclear scintillation signals with exponential decay is presented. The main objective of this work is to identify the characteristics of the acquired signals smoothly, this can be done by transferring the signal environment from random signal domain to deterministic domain using digital manipulation techniques. The proposed system consists of two major parts. The first part is the high performance data acquisition system (DAQ) that depends on a multi-channel Logic Scope. Which is interfaced with the host computer through the General Purpose Interface Board (GPIB) Ver. IEEE 488.2. Also, a Graphical User Interface (GUI) has been designed for this purpose using the graphical programming facilities. The second of the system is the DSP software Algorithm which analyses, demonstrates, monitoring these data to obtain the main characteristics of the acquired signals; the amplitude, the pulse count, the pulse width, decay factor, and the arrival time

  17. Cyclic LTI Systems in Digital Signal Processing

    National Research Council Canada - National Science Library

    Vaidyanathan, P

    1998-01-01

    .... While circular convolution has been the centerpiece of many algorithms in signal processing for decades, such freedom, especially from the viewpoint of linear system theory, has not been studied in the past...

  18. Optical and digital GaAs technologies for signal-processing applications; Proceedings of the Meeting, Orlando, FL, Apr. 16-18, 1990

    Science.gov (United States)

    Bendett, Mark P.; Butler, Daniel H., Jr.; Prabhakar, Arati; Yang, Andrew

    1990-10-01

    Practical problems that need to be solved for the introduction of optical modules into processing systems are reviewed. Some papers deal with the state of the art in such key devices as Bragg cells, spatial light modulators, and fast CCDs. Issues unique to optical packaging are also highlightened. New architectures to enable real-time operations are demonstrated, and optical interconnects for parallel processors are discussed. Particular attention is given to the status and operational advantages of government-sponsored efforts to upgrade existing military systems with digital GaAs signal processors and the state of the art in computer-aided design and advanced system architectures.

  19. Digital signal processing algorithms for nuclear particle spectroscopy

    International Nuclear Information System (INIS)

    Zejnalova, O.; Zejnalov, Sh.; Hambsch, F.J.; Oberstedt, S.

    2007-01-01

    Digital signal processing algorithms for nuclear particle spectroscopy are described along with a digital pile-up elimination method applicable to equidistantly sampled detector signals pre-processed by a charge-sensitive preamplifier. The signal processing algorithms are provided as recursive one- or multi-step procedures which can be easily programmed using modern computer programming languages. The influence of the number of bits of the sampling analogue-to-digital converter on the final signal-to-noise ratio of the spectrometer is considered. Algorithms for a digital shaping-filter amplifier, for a digital pile-up elimination scheme and for ballistic deficit correction were investigated using a high purity germanium detector. The pile-up elimination method was originally developed for fission fragment spectroscopy using a Frisch-grid back-to-back double ionization chamber and was mainly intended for pile-up elimination in case of high alpha-radioactivity of the fissile target. The developed pile-up elimination method affects only the electronic noise generated by the preamplifier. Therefore the influence of the pile-up elimination scheme on the final resolution of the spectrometer is investigated in terms of the distance between pile-up pulses. The efficiency of the developed algorithms is compared with other signal processing schemes published in literature

  20. Digital signal processing with Matlab examples

    CERN Document Server

    Giron-Sierra, Jose Maria

    2017-01-01

    This is the first volume in a trilogy on modern Signal Processing. The three books provide a concise exposition of signal processing topics, and a guide to support individual practical exploration based on MATLAB programs. This book includes MATLAB codes to illustrate each of the main steps of the theory, offering a self-contained guide suitable for independent study. The code is embedded in the text, helping readers to put into practice the ideas and methods discussed. The book is divided into three parts, the first of which introduces readers to periodic and non-periodic signals. The second part is devoted to filtering, which is an important and commonly used application. The third part addresses more advanced topics, including the analysis of real-world non-stationary signals and data, e.g. structural fatigue, earthquakes, electro-encephalograms, birdsong, etc. The book’s last chapter focuses on modulation, an example of the intentional use of non-stationary signals.

  1. [Digital signal processing of a novel neuron discharge model stimulation strategy for cochlear implants].

    Science.gov (United States)

    Yang, Yiwei; Xu, Yuejin; Miu, Jichang; Zhou, Linghong; Xiao, Zhongju

    2012-10-01

    To apply the classic leakage integrate-and-fire models, based on the mechanism of the generation of physiological auditory stimulation, in the information processing coding of cochlear implants to improve the auditory result. The results of algorithm simulation in digital signal processor (DSP) were imported into Matlab for a comparative analysis. Compared with CIS coding, the algorithm of membrane potential integrate-and-fire (MPIF) allowed more natural pulse discharge in a pseudo-random manner to better fit the physiological structures. The MPIF algorithm can effectively solve the problem of the dynamic structure of the delivered auditory information sequence issued in the auditory center and allowed integration of the stimulating pulses and time coding to ensure the coherence and relevance of the stimulating pulse time.

  2. Digital signal and image processing using Matlab

    CERN Document Server

    Blanchet , Gérard

    2015-01-01

    The most important theoretical aspects of Image and Signal Processing (ISP) for both deterministic and random signals, the theory being supported by exercises and computer simulations relating to real applications.   More than 200 programs and functions are provided in the MATLAB® language, with useful comments and guidance, to enable numerical experiments to be carried out, thus allowing readers to develop a deeper understanding of both the theoretical and practical aspects of this subject.  Following on from the first volume, this second installation takes a more practical stance, provi

  3. Digital signal and image processing using MATLAB

    CERN Document Server

    Blanchet , Gérard

    2014-01-01

    This fully revised and updated second edition presents the most important theoretical aspects of Image and Signal Processing (ISP) for both deterministic and random signals. The theory is supported by exercises and computer simulations relating to real applications. More than 200 programs and functions are provided in the MATLABÒ language, with useful comments and guidance, to enable numerical experiments to be carried out, thus allowing readers to develop a deeper understanding of both the theoretical and practical aspects of this subject. This fully revised new edition updates : - the

  4. UMTS signal measurements with digital spectrum analysers

    International Nuclear Information System (INIS)

    Licitra, G.; Palazzuoli, D.; Ricci, A. S.; Silvi, A. M.

    2004-01-01

    The launch of the Universal Mobile Telecommunications System (UNITS), the most recent mobile telecommunications standard has imposed the requirement of updating measurement instrumentation and methodologies. In order to define the most reliable measurement procedure, which is aimed at assessing the exposure to electromagnetic fields, modern spectrum analysers' features for correct signal characterisation has been reviewed. (authors)

  5. Signals, systems, transforms, and digital signal processing with Matlab

    CERN Document Server

    Corinthios, Michael

    2009-01-01

    Continuous-Time and Discrete-Time Signals and SystemsIntroductionContinuous-Time SignalsPeriodic FunctionsUnit Step FunctionGraphical Representation of FunctionsEven and Odd Parts of a FunctionDirac-Delta ImpulseBasic Properties of the Dirac-Delta ImpulseOther Important Properties of the ImpulseContinuous-Time SystemsCausality, StabilityExamples of Electrical Continuous-Time SystemsMechanical SystemsTransfer Function and Frequency ResponseConvolution and CorrelationA Right-Sided and a Left-Sided FunctionConvolution with an Impulse and Its DerivativesAdditional Convolution PropertiesCorrelation FunctionProperties of the Correlation FunctionGraphical InterpretationCorrelation of Periodic FunctionsAverage, Energy and Power of Continuous-Time SignalsDiscrete-Time SignalsPeriodicityDifference EquationsEven/Odd DecompositionAverage Value, Energy and Power SequencesCausality, StabilityProblemsAnswers to Selected ProblemsFourier Series ExpansionTrigonometric Fourier SeriesExponential Fourier SeriesExponential versus ...

  6. Sound card based digital correlation detection of weak photoelectrical signals

    International Nuclear Information System (INIS)

    Tang Guanghui; Wang Jiangcheng

    2005-01-01

    A simple and low-cost digital correlation method is proposed to investigate weak photoelectrical signals, using a high-speed photodiode as detector, which is directly connected to a programmably triggered sound card analogue-to-digital converter and a personal computer. Two testing experiments, autocorrelation detection of weak flickering signals from a computer monitor under background of noisy outdoor stray light and cross-correlation measurement of the surface velocity of a motional tape, are performed, showing that the results are reliable and the method is easy to implement

  7. Real-time digital signal processing fundamentals, implementations and applications

    CERN Document Server

    Kuo, Sen M; Tian, Wenshun

    2013-01-01

    Combines both the DSP principles and real-time implementations and applications, and now updated with the new eZdsp USB Stick, which is very low cost, portable and widely employed at many DSP labs. Real-Time Digital Signal Processing introduces fundamental digital signal processing (DSP) principles and will be updated to include the latest DSP applications, introduce new software development tools and adjust the software design process to reflect the latest advances in the field. In the 3rd edition of the book, the key aspect of hands-on experiments will be enhanced to make the DSP principle

  8. Robust digital processing of speech signals

    CERN Document Server

    Kovacevic, Branko; Veinović, Mladen; Marković, Milan

    2017-01-01

    This book focuses on speech signal phenomena, presenting a robustification of the usual speech generation models with regard to the presumed types of excitation signals, which is equivalent to the introduction of a class of nonlinear models and the corresponding criterion functions for parameter estimation. Compared to the general class of nonlinear models, such as various neural networks, these models possess good properties of controlled complexity, the option of working in “online” mode, as well as a low information volume for efficient speech encoding and transmission. Providing comprehensive insights, the book is based on the authors’ research, which has already been published, supplemented by additional texts discussing general considerations of speech modeling, linear predictive analysis and robust parameter estimation.

  9. Accuracy Limitations in Optical Linear Algebra Processors

    Science.gov (United States)

    Batsell, Stephen Gordon

    1990-01-01

    One of the limiting factors in applying optical linear algebra processors (OLAPs) to real-world problems has been the poor achievable accuracy of these processors. Little previous research has been done on determining noise sources from a systems perspective which would include noise generated in the multiplication and addition operations, noise from spatial variations across arrays, and from crosstalk. In this dissertation, we propose a second-order statistical model for an OLAP which incorporates all these system noise sources. We now apply this knowledge to determining upper and lower bounds on the achievable accuracy. This is accomplished by first translating the standard definition of accuracy used in electronic digital processors to analog optical processors. We then employ our second-order statistical model. Having determined a general accuracy equation, we consider limiting cases such as for ideal and noisy components. From the ideal case, we find the fundamental limitations on improving analog processor accuracy. From the noisy case, we determine the practical limitations based on both device and system noise sources. These bounds allow system trade-offs to be made both in the choice of architecture and in individual components in such a way as to maximize the accuracy of the processor. Finally, by determining the fundamental limitations, we show the system engineer when the accuracy desired can be achieved from hardware or architecture improvements and when it must come from signal pre-processing and/or post-processing techniques.

  10. KNN BASED CLASSIFICATION OF DIGITAL MODULATED SIGNALS

    Directory of Open Access Journals (Sweden)

    Sajjad Ahmed Ghauri

    2016-11-01

    Full Text Available Demodulation process without the knowledge of modulation scheme requires Automatic Modulation Classification (AMC. When receiver has limited information about received signal then AMC become essential process. AMC finds important place in the field many civil and military fields such as modern electronic warfare, interfering source recognition, frequency management, link adaptation etc. In this paper we explore the use of K-nearest neighbor (KNN for modulation classification with different distance measurement methods. Five modulation schemes are used for classification purpose which is Binary Phase Shift Keying (BPSK, Quadrature Phase Shift Keying (QPSK, Quadrature Amplitude Modulation (QAM, 16-QAM and 64-QAM. Higher order cummulants (HOC are used as an input feature set to the classifier. Simulation results shows that proposed classification method provides better results for the considered modulation formats.

  11. A simple approach to digital signal processing

    CERN Document Server

    Marven, Craig

    1996-01-01

    A readable, understandable introduction to DSP for professionals and students alike . . . This practical guide is a welcome alternative to more complicated introductions to DSP. It assumes no prior DSP experience and takes the reader step-by-step through the most basic signal processing concepts to more complex functions and devices, including sampling, filtering, frequency transforms, data compression, and even DSP design decisions. The guide provides clear, concise explanations and examples, while keeping mathematics to a minimum, to help develop a fundamental understanding of DSP. Other features include: * An extensive resource bibliography of more advanced DSP books. * An example of a typical DSP system development cycle, including tool descriptions. * A complete glossary of DSP-related acronyms Whether you're a working engineer looking into DSP for the first time or an undergraduate struggling to comprehend the subject, this engaging introduction provides easy access to the basic knowledge that will l...

  12. Digital Signal Processing for Optical Coherent Communication Systems

    DEFF Research Database (Denmark)

    Zhang, Xu

    spectrum narrowing tolerance 112-Gb/s DP-QPSK optical coherent systems using digital adaptive equalizer. The demonstrated results show that off-line DSP algorithms are able to reduce the bit error rate (BER) penalty induced by signal spectrum narrowing. Third, we also investigate bi...... wavelength division multiplex (U-DWDM) optical coherent systems based on 10-Gbaud QPSK. We report U-DWDM 1.2-Tb/s QPSK coherent system achieving spectral efficiency of 4.0-bit/s/Hz. In the experimental demonstration, digital decision feed back equalizer (DFE) algorithms and a finite impulse response (FIR......In this thesis, digital signal processing (DSP) algorithms are studied to compensate for physical layer impairments in optical fiber coherent communication systems. The physical layer impairments investigated in this thesis include optical fiber chromatic dispersion, polarization demultiplexing...

  13. The UA1 upgrade calorimeter trigger processor

    International Nuclear Information System (INIS)

    Bains, M.; Charleton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Biddulph, P.; Eisenhandler, E.; Fensome, I.F.; Landon, M.; Robinson, D.; Oliver, J.; Sumorok, K.

    1990-01-01

    The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no dead time. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (orig.)

  14. The UA1 upgrade calorimeter trigger processor

    International Nuclear Information System (INIS)

    Bains, N.; Baird, S.A.; Biddulph, P.

    1990-01-01

    The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no deadtime. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (author)

  15. Subband coding of digital audio signals without loss of quality

    NARCIS (Netherlands)

    Veldhuis, Raymond N.J.; Breeuwer, Marcel; van de Waal, Robbert

    1989-01-01

    A subband coding system for high quality digital audio signals is described. To achieve low bit rates at a high quality level, it exploits the simultaneous masking effect of the human ear. It is shown how this effect can be used in an adaptive bit-allocation scheme. The proposed approach has been

  16. Application of Field programmable Gate Array to Digital Signal ...

    African Journals Online (AJOL)

    Journal of Research in National Development ... This work shows how one parallel technology Field Programmable Gate Array (FPGA) can be applied to digital signal processing problem to increase computational speed. ... In this research work FPGA typically exploits parallelism because FPGA is a parallel device. With the ...

  17. Foundations of digital signal processing theory, algorithms and hardware design

    CERN Document Server

    Gaydecki, Patrick

    2005-01-01

    An excellent introductory text, this book covers the basic theoretical, algorithmic and real-time aspects of digital signal processing (DSP). Detailed information is provided on off-line, real-time and DSP programming and the reader is effortlessly guided through advanced topics such as DSP hardware design, FIR and IIR filter design and difference equation manipulation.

  18. Some recent work on lattice structures for digital signal processing

    Indian Academy of Sciences (India)

    Digital signal processing (DSP); lattice structures; finite impulse ... fascinated this author for a long time, and for the known non-canonical ...... where M

  19. A high speed digital signal averager for pulsed NMR

    International Nuclear Information System (INIS)

    Srinivasan, R.; Ramakrishna, J.; Ra agopalan, S.R.

    1978-01-01

    A 256-channel digital signal averager suitable for pulsed nuclear magnetic resonance spectroscopy is described. It implements 'stable averaging' algorithm and hence provides a calibrated display of the average signal at all times during the averaging process on a CRT. It has a maximum sampling rate of 2.5 μ sec and a memory capacity of 256 x 12 bit words. Number of sweeps is selectable through a front panel control in binary steps from 2 3 to 2 12 . The enhanced signal can be displayed either on a CRT or by a 3.5-digit LED display. The maximum S/N improvement that can be achieved with this instrument is 36 dB. (auth.)

  20. Digital circuit for the introduction and later removal of dither from an analog signal

    Science.gov (United States)

    Borgen, Gary S.

    1994-05-01

    An electronics circuit is presented for accurately digitizing an analog audio or like data signal into a digital equivalent signal by introducing dither into the analog signal and then subsequently removing the dither from the digitized signal prior to its conversion to an analog signal which is a substantial replica of the incoming analog audio or like data signal. The electronics circuit of the present invention is characterized by a first pseudo-random number generator which generates digital random noise signals or dither for addition to the digital equivalent signal and a second pseudo-random number generator which generates subtractive digital random noise signals for the subsequent removal of dither from the digital equivalent signal prior its conversion to the analog replica signal.

  1. Distortions in power spectra of digitized signals - II: Suggested solution

    International Nuclear Information System (INIS)

    Njau, E.C.

    1982-04-01

    In Part I of this report we developed analytical expressions which represent exactly the energy density spectra of ''digitization processes'' that are essentially involved in spectral analysis of continuous signals. Besides, we related the spectral energy density of each digitization process to the parameters of the exact spectral energy density of the corresponding signal. On this basis, we briefly discussed the forms of distortions (or false structures) which are present in normally computed power spectra when the corresponding spectra of the digitization processes are not sufficiently decoupled from or nullified in the computed spectra. The biggest worry with regard to these distortions is not only that they may mask the actual information contained in the original signal, but also they may tempt the researcher to establish false characteristics about the signal involved. It is, in this context, that any reasonable method that could be used (even conditionally) to pinpoint false structures in computed power spectra would be both timely and useful. A simple, handy guidance through which some portions of computed energy density spectra which are dominated by the false structures mentioned above, can be located is presented herein. Equations are presented which give the various frequencies at which false peaks may be located in such ''contaminated'' portions of computed energy density spectra. The occurrence of frequency shifts in computed power spectra is also briefly discussed. (author)

  2. Digital Signal Processor for Data Transfer and Processing in MR Tomography

    Czech Academy of Sciences Publication Activity Database

    Smékal, Z.; Gescheidtová, E.; Bartušek, Karel; Dokoupil, Zdeněk

    2005-01-01

    Roč. 13, č. 1 (2005), s. 39-48 ISSN 1738-6438 R&D Projects: GA AV ČR(CZ) IAA2065201 Keywords : MR tomography * DSP96002 * preemphasis filter * communication interface Subject RIV: JA - Electronics ; Optoelectronics, Electrical Engineering

  3. Preliminary Study of Image Reconstruction Algorithm on a Digital Signal Processor

    Science.gov (United States)

    2014-03-01

    5.2 Comparison of CPU-GPU, CPU-FPGA, and CPU-DSP Designs The work for implementing VHDL description of the back-projection algorithm on a physical...FPGA was not complete. Hence, the DSP implementation results are compared with the simulated results for the VHDL design. Simulating VHDL provides an...rather than at the software level. Depending on an application’s characteristics, FPGA implementations can provide a significant performance

  4. Digital Signal Processing for In-Vehicle Systems and Safety

    CERN Document Server

    Boyraz, Pinar; Takeda, Kazuya; Abut, Hüseyin

    2012-01-01

    Compiled from papers of the 4th Biennial Workshop on DSP (Digital Signal Processing) for In-Vehicle Systems and Safety this edited collection features world-class experts from diverse fields focusing on integrating smart in-vehicle systems with human factors to enhance safety in automobiles. Digital Signal Processing for In-Vehicle Systems and Safety presents new approaches on how to reduce driver inattention and prevent road accidents. The material addresses DSP technologies in adaptive automobiles, in-vehicle dialogue systems, human machine interfaces, video and audio processing, and in-vehicle speech systems. The volume also features: Recent advances in Smart-Car technology – vehicles that take into account and conform to the driver Driver-vehicle interfaces that take into account the driving task and cognitive load of the driver Best practices for In-Vehicle Corpus Development and distribution Information on multi-sensor analysis and fusion techniques for robust driver monitoring and driver recognition ...

  5. Diagnostic analysis of vibration signals using adaptive digital filtering techniques

    Science.gov (United States)

    Jewell, R. E.; Jones, J. H.; Paul, J. E.

    1983-01-01

    Signal enhancement techniques are described using recently developed digital adaptive filtering equipment. Adaptive filtering concepts are not new; however, as a result of recent advances in microprocessor-based electronics, hardware has been developed that has stable characteristics and of a size exceeding 1000th order. Selected data processing examples are presented illustrating spectral line enhancement, adaptive noise cancellation, and transfer function estimation in the presence of corrupting noise.

  6. Processors for wavelet analysis and synthesis: NIFS and TI-C80 MVP

    Science.gov (United States)

    Brooks, Geoffrey W.

    1996-03-01

    Two processors are considered for image quadrature mirror filtering (QMF). The neuromorphic infrared focal-plane sensor (NIFS) is an existing prototype analog processor offering high speed spatio-temporal Gaussian filtering, which could be used for the QMF low- pass function, and difference of Gaussian filtering, which could be used for the QMF high- pass function. Although not designed specifically for wavelet analysis, the biologically- inspired system accomplishes the most computationally intensive part of QMF processing. The Texas Instruments (TI) TMS320C80 Multimedia Video Processor (MVP) is a 32-bit RISC master processor with four advanced digital signal processors (DSPs) on a single chip. Algorithm partitioning, memory management and other issues are considered for optimal performance. This paper presents these considerations with simulated results leading to processor implementation of high-speed QMF analysis and synthesis.

  7. A digitally assisted, signal folding neural recording amplifier.

    Science.gov (United States)

    Chen, Yi; Basu, Arindam; Liu, Lei; Zou, Xiaodan; Rajkumar, Ramamoorthy; Dawe, Gavin Stewart; Je, Minkyu

    2014-08-01

    A novel signal folding and reconstruction scheme for neural recording applications that exploits the 1/f(n) characteristics of neural signals is described in this paper. The amplified output is 'folded' into a predefined range of voltages by using comparison and reset circuits along with the core amplifier. After this output signal is digitized and transmitted, a reconstruction algorithm can be applied in the digital domain to recover the amplified signal from the folded waveform. This scheme enables the use of an analog-to-digital convertor with less number of bits for the same effective dynamic range. It also reduces the transmission data rate of the recording chip. Both of these features allow power and area savings at the system level. Other advantages of the proposed topology are increased reliability due to the removal of pseudo-resistors, lower harmonic distortion and low-voltage operation. An analysis of the reconstruction error introduced by this scheme is presented along with a behavioral model to provide a quick estimate of the post reconstruction dynamic range. Measurement results from two different core amplifier designs in 65 nm and 180 nm CMOS processes are presented to prove the generality of the proposed scheme in the neural recording applications. Operating from a 1 V power supply, the amplifier in 180 nm CMOS has a gain of 54.2 dB, bandwidth of 5.7 kHz, input referred noise of 3.8 μVrms and power dissipation of 2.52 μW leading to a NEF of 3.1 in spike band. It exhibits a dynamic range of 66 dB and maximum SNDR of 43 dB in LFP band. It also reduces system level power (by reducing the number of bits in the ADC by 2) as well as data rate to 80% of a conventional design. In vivo measurements validate the ability of this amplifier to simultaneously record spike and LFP signals.

  8. Noise and resolution with digital filtering for nuclear spectrometry

    International Nuclear Information System (INIS)

    Lakatos, T.

    1991-01-01

    Digital noise filtering looks very promising for semiconductor spectrometry. The resolution and conversion speed of the analog to digital converter (ADC) used at the input of a digital signal processor and analyzer can strongly influence the signal to noise ratio, the peak position and shape. The article leads with the investigation of these effects using computer modelling. (orig.)

  9. The Signal Validation method of Digital Process Instrumentation System on signal conditioner for SMART

    International Nuclear Information System (INIS)

    Moon, Hee Gun; Park, Sang Min; Kim, Jung Seon; Shon, Chang Ho; Park, Heui Youn; Koo, In Soo

    2005-01-01

    The function of PIS(Process Instrumentation System) for SMART is to acquire the process data from sensor or transmitter. The PIS consists of signal conditioner, A/D converter, DSP(Digital Signal Process) and NIC(Network Interface Card). So, It is fully digital system after A/D converter. The PI cabinet and PDAS(Plant Data Acquisition System) in commercial plant is responsible for data acquisition of the sensor or transmitter include RTD, TC, level, flow, pressure and so on. The PDAS has the software that processes each sensor data and PI cabinet has the signal conditioner, which is need for maintenance and test. The signal conditioner has the potentiometer to adjust the span and zero for test and maintenance. The PIS of SMART also has the signal conditioner which has the span and zero adjust same as the commercial plant because the signal conditioner perform the signal condition for AD converter such as 0∼10Vdc. But, To adjust span and zero is manual test and calibration. So, This paper presents the method of signal validation and calibration, which is used by digital feature in SMART. There are I/E(current to voltage), R/E(resistor to voltage), F/E(frequency to voltage), V/V(voltage to voltage). Etc. In this paper show only the signal validation and calibration about I/E converter that convert level, pressure, flow such as 4∼20mA into signal for AD conversion such as 0∼10Vdc

  10. The UA1 trigger processor

    International Nuclear Information System (INIS)

    Grayer, G.H.

    1981-01-01

    Experiment UA1 is a large multi-purpose spectrometer at the CERN proton-antiproton collider, scheduled for late 1981. The principal trigger is formed on the basis of the energy deposition in calorimeters. A trigger decision taken in under 2.4 microseconds can avoid dead time losses due to the bunched nature of the beam. To achieve this we have built fast 8-bit charge to digital converters followed by two identical digital processors tailored to the experiment. The outputs of groups of the 2440 photomultipliers in the calorimeters are summed to form a total of 288 input channels to the ADCs. A look-up table in RAM is used to convert the digitised photomultiplier signals to energy in one processor, combinations of input channels, and also counts the number of clusters with electromagnetic or hadronic energy above pre-determined levels. Up to twelve combinations of these conditions, together with external information, may be combined in coincidence or in veto to form the final trigger. Provision has been made for testing using simulated data in an off-line mode, and sampling real data when on-line. (orig.)

  11. High-Speed Data Acquisition and Digital Signal Processing System for PET Imaging Techniques Applied to Mammography

    Science.gov (United States)

    Martinez, J. D.; Benlloch, J. M.; Cerda, J.; Lerche, Ch. W.; Pavon, N.; Sebastia, A.

    2004-06-01

    This paper is framed into the Positron Emission Mammography (PEM) project, whose aim is to develop an innovative gamma ray sensor for early breast cancer diagnosis. Currently, breast cancer is detected using low-energy X-ray screening. However, functional imaging techniques such as PET/FDG could be employed to detect breast cancer and track disease changes with greater sensitivity. Furthermore, a small and less expensive PET camera can be utilized minimizing main problems of whole body PET. To accomplish these objectives, we are developing a new gamma ray sensor based on a newly released photodetector. However, a dedicated PEM detector requires an adequate data acquisition (DAQ) and processing system. The characterization of gamma events needs a free-running analog-to-digital converter (ADC) with sampling rates of more than 50 Ms/s and must achieve event count rates up to 10 MHz. Moreover, comprehensive data processing must be carried out to obtain event parameters necessary for performing the image reconstruction. A new generation digital signal processor (DSP) has been used to comply with these requirements. This device enables us to manage the DAQ system at up to 80 Ms/s and to execute intensive calculi over the detector signals. This paper describes our designed DAQ and processing architecture whose main features are: very high-speed data conversion, multichannel synchronized acquisition with zero dead time, a digital triggering scheme, and high throughput of data with an extensive optimization of the signal processing algorithms.

  12. Applying advanced digital signal processing techniques in industrial radioisotopes applications

    International Nuclear Information System (INIS)

    Mahmoud, H.K.A.E.

    2012-01-01

    Radioisotopes can be used to obtain signals or images in order to recognize the information inside the industrial systems. The main problems of using these techniques are the difficulty of identification of the obtained signals or images and the requirement of skilled experts for the interpretation process of the output data of these applications. Now, the interpretation of the output data from these applications is performed mainly manually, depending heavily on the skills and the experience of trained operators. This process is time consuming and the results typically suffer from inconsistency and errors. The objective of the thesis is to apply the advanced digital signal processing techniques for improving the treatment and the interpretation of the output data from the different Industrial Radioisotopes Applications (IRA). This thesis focuses on two IRA; the Residence Time Distribution (RTD) measurement and the defect inspection of welded pipes using a gamma source (gamma radiography). In RTD measurement application, this thesis presents methods for signal pre-processing and modeling of the RTD signals. Simulation results have been presented for two case studies. The first case study is a laboratory experiment for measuring the RTD in a water flow rig. The second case study is an experiment for measuring the RTD in a phosphate production unit. The thesis proposes an approach for RTD signal identification in the presence of noise. In this approach, after signal processing, the Mel Frequency Cepstral Coefficients (MFCCs) and polynomial coefficients are extracted from the processed signal or from one of its transforms. The Discrete Wavelet Transform (DWT), Discrete Cosine Transform (DCT), and Discrete Sine Transform (DST) have been tested and compared for efficient feature extraction. Neural networks have been used for matching of the extracted features. Furthermore, the Power Density Spectrum (PDS) of the RTD signal has been also used instead of the discrete

  13. Rapid prototyping and evaluation of programmable SIMD SDR processors in LISA

    Science.gov (United States)

    Chen, Ting; Liu, Hengzhu; Zhang, Botao; Liu, Dongpei

    2013-03-01

    With the development of international wireless communication standards, there is an increase in computational requirement for baseband signal processors. Time-to-market pressure makes it impossible to completely redesign new processors for the evolving standards. Due to its high flexibility and low power, software defined radio (SDR) digital signal processors have been proposed as promising technology to replace traditional ASIC and FPGA fashions. In addition, there are large numbers of parallel data processed in computation-intensive functions, which fosters the development of single instruction multiple data (SIMD) architecture in SDR platform. So a new way must be found to prototype the SDR processors efficiently. In this paper we present a bit-and-cycle accurate model of programmable SIMD SDR processors in a machine description language LISA. LISA is a language for instruction set architecture which can gain rapid model at architectural level. In order to evaluate the availability of our proposed processor, three common baseband functions, FFT, FIR digital filter and matrix multiplication have been mapped on the SDR platform. Analytical results showed that the SDR processor achieved the maximum of 47.1% performance boost relative to the opponent processor.

  14. Resolving the range ambiguity in OFDR using digital signal processing

    International Nuclear Information System (INIS)

    Riesen, Nicolas; Lam, Timothy T-Y; Chow, Jong H

    2014-01-01

    A digitally range-gated variant of optical frequency domain reflectometry is demonstrated which overcomes the beat note ambiguity when sensing beyond a single frequency sweep. The range-gating is achieved using a spread spectrum technique involving time-stamping of the optical signal using high-frequency pseudorandom phase modulation. The reflections from different sections of fiber can then be isolated in the time domain by digitally inverting the phase modulation using appropriately-delayed copies of the pseudorandom noise code. Since the technique overcomes the range ambiguity in OFDR, it permits high sweep repetition rates without sacrificing range, thus allowing for high-bandwidth sensing over long lengths of fiber. This is demonstrated for the case of quasi-distributed sensing. (paper)

  15. Analytical prediction of digital signal crosstalk of FCC

    Science.gov (United States)

    Belleisle, A. P.

    1972-01-01

    The results are presented of study effort whose aim was the development of accurate means of analyzing and predicting signal cross-talk in multi-wire digital data cables. A complete analytical model is developed n + 1 wire systems of uniform transmission lines with arbitrary linear boundary conditions. In addition, a minimum set of parameter measurements required for the application of the model are presented. Comparisons between cross-talk predicted by this model and actual measured cross-talk are shown for a six conductor ribbon cable.

  16. Digital signal processing of data from borehole creep closure

    International Nuclear Information System (INIS)

    Chakrabarti, S.; Patrick, W.C.; Duplancic, N.

    1987-01-01

    Digital signal processing, a technique commonly used in the fields of electrical engineering and communication technology, has been successfully used to analyze creep closure data obtained from a 0.91 m diameter by 5.13 deep borehole in bedded salt. By filtering the ''noise'' component of the closure data from a test borehole, important data trends were made more evident and average creep closure rates were able to be calculated. This process provided accurate estimates of closure rates that are used in the design of lined boreholes in which heat-generating transuranic nuclear wastes are emplaced at the Waste Isolation Pilot Plant

  17. Mathematical pattern, smoothing and digital filtering of a speech signal

    International Nuclear Information System (INIS)

    Razzam, Mohamed Habib

    1979-01-01

    After presentation of speech synthesis methods, characterized by a treatment of pre-recorded natural signals, or by an analog simulation of vocal tract, we present a new synthesis method especially based on a mathematical pattern of the signal, as a development of M. RODET's method. For their physiological origin, these signals are partially or totally voiced, or aleatory. For the phoneme voiced parts, we compute the formant curves, the sum of which constitute the wave, directly in time-domain by applying a specific envelope (operating as a time-window analysis) to a sinusoidal wave, The sinusoidal wave computation is made at the beginning of each signal's pseudo-period. The transition from successive periods is assured by a polynomial smoothing followed by a digital filtering. For the aleatory parts, we present an aleatory computation method of formant curves. Each signal is subjected to a melodic diagrams computed in accordance with the nature of the phoneme (vowel or consonant) and its context (isolated or not). (author) [fr

  18. Wireless receiver architectures and design antennas, RF, synthesizers, mixed signal, and digital signal processing

    CERN Document Server

    Rouphael, Tony J

    2014-01-01

    Wireless Receiver Architectures and Design presents the various designs and architectures of wireless receivers in the context of modern multi-mode and multi-standard devices. This one-stop reference and guide to designing low-cost low-power multi-mode, multi-standard receivers treats analog and digital signal processing simultaneously, with equal detail given to the chosen architecture and modulating waveform. It provides a complete understanding of the receiver's analog front end and the digital backend, and how each affects the other. The book explains the design process in great detail, s

  19. VON WISPR Family Processors: Volume 1

    National Research Council Canada - National Science Library

    Wagstaff, Ronald

    1997-01-01

    ...) and the background noise they are embedded in. Processors utilizing those fluctuations such as the von WISPR Family Processors discussed herein, are methods or algorithms that preferentially attenuate the fluctuating signals and noise...

  20. Description of the signal and background event mixing as implemented in the Marlin processor OverlayTiming

    CERN Document Server

    Schade, P

    2011-01-01

    This note documents OverlayTiming, a processor in the Marlin software frame- work. OverlayTiming can model the timing structure of a linear collider bunch train and offers the possibility to merge simulated physics events with beam-beam background events. In addition, a realistic structure of the detector readout can be imitated by defining readout time windows for each subdetector.

  1. Study of signal-to-noise ratio in digital mammography

    Science.gov (United States)

    Kato, Yuri; Fujita, Naotoshi; Kodera, Yoshie

    2009-02-01

    Mammography techniques have recently advanced from those using analog systems (the screen-film system) to those using digital systems; for example, computed radiography (CR) and flat-panel detectors (FPDs) are nowadays used in mammography. Further, phase contrast mammography (PCM)-a digital technique by which images with a magnification of 1.75× can be obtained-is now available in the market. We studied the effect of the air gap in PCM and evaluated the effectiveness of an antiscatter x-ray grid in conventional mammography (CM) by measuring the scatter fraction ratio (SFR) and relative signal-to-noise ratio (rSNR) and comparing them between PCM and the digital CM. The results indicated that the SFRs for the CM images obtained with a grid were the lowest and that these ratios were almost the same as those for the PCM images. In contrast, the rSNRs for the PCM images were the highest, which means that the scattering of x-rays was sufficiently reduced by the air gap without the loss of primary x-rays.

  2. Broadband set-top box using MAP-CA processor

    Science.gov (United States)

    Bush, John E.; Lee, Woobin; Basoglu, Chris

    2001-12-01

    Advances in broadband access are expected to exert a profound impact in our everyday life. It will be the key to the digital convergence of communication, computer and consumer equipment. A common thread that facilitates this convergence comprises digital media and Internet. To address this market, Equator Technologies, Inc., is developing the Dolphin broadband set-top box reference platform using its MAP-CA Broadband Signal ProcessorT chip. The Dolphin reference platform is a universal media platform for display and presentation of digital contents on end-user entertainment systems. The objective of the Dolphin reference platform is to provide a complete set-top box system based on the MAP-CA processor. It includes all the necessary hardware and software components for the emerging broadcast and the broadband digital media market based on IP protocols. Such reference design requires a broadband Internet access and high-performance digital signal processing. By using the MAP-CA processor, the Dolphin reference platform is completely programmable, allowing various codecs to be implemented in software, such as MPEG-2, MPEG-4, H.263 and proprietary codecs. The software implementation also enables field upgrades to keep pace with evolving technology and industry demands.

  3. Accuracies Of Optical Processors For Adaptive Optics

    Science.gov (United States)

    Downie, John D.; Goodman, Joseph W.

    1992-01-01

    Paper presents analysis of accuracies and requirements concerning accuracies of optical linear-algebra processors (OLAP's) in adaptive-optics imaging systems. Much faster than digital electronic processor and eliminate some residual distortion. Question whether errors introduced by analog processing of OLAP overcome advantage of greater speed. Paper addresses issue by presenting estimate of accuracy required in general OLAP that yields smaller average residual aberration of wave front than digital electronic processor computing at given speed.

  4. Long-distance digital signal transfers between trigger system and TOF system of BES III

    International Nuclear Information System (INIS)

    Liu Guangdong; Liu Shubin; An Qi

    2007-01-01

    This article introduces a design of digital signals communication between the trigger system and the TOF system of BES III. The design can support the BES III successfully, which is based on fiber digital communication, FPGA etc. (authors)

  5. Upgrade of the PreProcessor System for the ATLAS Level-1 Calorimeter Trigger

    CERN Document Server

    Khomich, A

    2010-01-01

    The ATLAS Level-1 Calorimeter Trigger is a hardware-based pipelined system designed to identify high-pT objects in the ATLAS calorimeters within a fixed latency of 2.5\\,us. It consists of three subsystems: the PreProcessor which conditions and digitizes analogue signals and two digital processors. The majority of the PreProcessor's tasks are performed on a dense Multi-Chip Module(MCM) consisting of FADCs, a time-adjustment and digital processing ASICs, and LVDS serialisers designed and implemented in ten years old technologies. An MCM substitute, based on today's components (dual channel FADCs and FPGA), is being developed to profit from state-of-the-art electronics and to enhance the flexibility of the digital processing. Development and first test results are presented.

  6. Upgrade of the PreProcessor System for the ATLAS LVL1 Calorimeter Trigger

    CERN Document Server

    Khomich, A; The ATLAS collaboration

    2010-01-01

    The ATLAS Level-1 Calorimeter Trigger is a hardware-based pipelined system designed to identify high-pT objects in the ATLAS calorimeters within a fixed latency of 2.5us. It consists of three subsystems: the PreProcessor which conditions and digitizes analogue signals and two digital processors. The majority of the PreProcessor's tasks are performed on a dense Multi-Chip Module(MCM) consisting of FADCs, a time-adjustment and digital processing ASICs, and LVDS serializers designed and implemented in ten years old technologies. An MCM substitute, based on today's components (dual channel FADCs and FPGA), is being developed to profit from state-of-the-art electronics and to enhance the flexibility of the digital processing. Development and first test results are presented.

  7. A Modular Pipelined Processor for High Resolution Gamma-Ray Spectroscopy

    Science.gov (United States)

    Veiga, Alejandro; Grunfeld, Christian

    2016-02-01

    The design of a digital signal processor for gamma-ray applications is presented in which a single ADC input can simultaneously provide temporal and energy characterization of gamma radiation for a wide range of applications. Applying pipelining techniques, the processor is able to manage and synchronize very large volumes of streamed real-time data. Its modular user interface provides a flexible environment for experimental design. The processor can fit in a medium-sized FPGA device operating at ADC sampling frequency, providing an efficient solution for multi-channel applications. Two experiments are presented in order to characterize its temporal and energy resolution.

  8. Digital Signal Processing and Control for the Study of Gene Networks

    Science.gov (United States)

    Shin, Yong-Jun

    2016-04-01

    Thanks to the digital revolution, digital signal processing and control has been widely used in many areas of science and engineering today. It provides practical and powerful tools to model, simulate, analyze, design, measure, and control complex and dynamic systems such as robots and aircrafts. Gene networks are also complex dynamic systems which can be studied via digital signal processing and control. Unlike conventional computational methods, this approach is capable of not only modeling but also controlling gene networks since the experimental environment is mostly digital today. The overall aim of this article is to introduce digital signal processing and control as a useful tool for the study of gene networks.

  9. Improvement of the characterization of ultrasonic data by means of digital signal processing

    International Nuclear Information System (INIS)

    Bieth, M.; Romy, D.; Weigel, D.

    1985-01-01

    The digital signal processing method for averaging using minima developed by Framatome allows to improve signal-to-noise ratio up to 7 dB during ultrasonic testing of cast stainless steel structures (primary pipes of PWR power plants). Application of digital signal processing to industrial testing conditions requires the availability of a fast analog-digital converter capable of real time processings which has been developed by CGR [fr

  10. REVIEW ARTICLE: Spectrophotometric applications of digital signal processing

    Science.gov (United States)

    Morawski, Roman Z.

    2006-09-01

    Spectrophotometry is more and more often the method of choice not only in analysis of (bio)chemical substances, but also in the identification of physical properties of various objects and their classification. The applications of spectrophotometry include such diversified tasks as monitoring of optical telecommunications links, assessment of eating quality of food, forensic classification of papers, biometric identification of individuals, detection of insect infestation of seeds and classification of textiles. In all those applications, large numbers of data, generated by spectrophotometers, are processed by various digital means in order to extract measurement information. The main objective of this paper is to review the state-of-the-art methodology for digital signal processing (DSP) when applied to data provided by spectrophotometric transducers and spectrophotometers. First, a general methodology of DSP applications in spectrophotometry, based on DSP-oriented models of spectrophotometric data, is outlined. Then, the most important classes of DSP methods for processing spectrophotometric data—the methods for DSP-aided calibration of spectrophotometric instrumentation, the methods for the estimation of spectra on the basis of spectrophotometric data, the methods for the estimation of spectrum-related measurands on the basis of spectrophotometric data—are presented. Finally, the methods for preprocessing and postprocessing of spectrophotometric data are overviewed. Throughout the review, the applications of DSP are illustrated with numerous examples related to broadly understood spectrophotometry.

  11. Digital Signal Processing For Low Bit Rate TV Image Codecs

    Science.gov (United States)

    Rao, K. R.

    1987-06-01

    In view of the 56 KBPS digital switched network services and the ISDN, low bit rate codecs for providing real time full motion color video are under various stages of development. Some companies have already brought the codecs into the market. They are being used by industry and some Federal Agencies for video teleconferencing. In general, these codecs have various features such as multiplexing audio and data, high resolution graphics, encryption, error detection and correction, self diagnostics, freezeframe, split video, text overlay etc. To transmit the original color video on a 56 KBPS network requires bit rate reduction of the order of 1400:1. Such a large scale bandwidth compression can be realized only by implementing a number of sophisticated,digital signal processing techniques. This paper provides an overview of such techniques and outlines the newer concepts that are being investigated. Before resorting to the data compression techniques, various preprocessing operations such as noise filtering, composite-component transformation and horizontal and vertical blanking interval removal are to be implemented. Invariably spatio-temporal subsampling is achieved by appropriate filtering. Transform and/or prediction coupled with motion estimation and strengthened by adaptive features are some of the tools in the arsenal of the data reduction methods. Other essential blocks in the system are quantizer, bit allocation, buffer, multiplexer, channel coding etc.

  12. Generation and coherent detection of QPSK signal using a novel method of digital signal processing

    Science.gov (United States)

    Zhao, Yuan; Hu, Bingliang; He, Zhen-An; Xie, Wenjia; Gao, Xiaohui

    2018-02-01

    We demonstrate an optical quadrature phase-shift keying (QPSK) signal transmitter and an optical receiver for demodulating optical QPSK signal with homodyne detection and digital signal processing (DSP). DSP on the homodyne detection scheme is employed without locking the phase of the local oscillator (LO). In this paper, we present an extracting one-dimensional array of down-sampling method for reducing unwanted samples of constellation diagram measurement. Such a novel scheme embodies the following major advantages over the other conventional optical QPSK signal detection methods. First, this homodyne detection scheme does not need strict requirement on LO in comparison with linear optical sampling, such as having a flat spectral density and phase over the spectral support of the source under test. Second, the LabVIEW software is directly used for recovering the QPSK signal constellation without employing complex DSP circuit. Third, this scheme is applicable to multilevel modulation formats such as M-ary PSK and quadrature amplitude modulation (QAM) or higher speed signals by making minor changes.

  13. Photonic Ultra-Wideband 781.25-Mb/s Signal Generation and Transmission Incorporating Digital Signal Processing Detection

    DEFF Research Database (Denmark)

    Gibbon, Timothy Braidwood; Yu, Xianbin; Tafur Monroy, Idelfonso

    2009-01-01

    The generation of photonic ultra-wideband (UWB) impulse signals using an uncooled distributed-feedback laser is proposed. For the first time, we experimentally demonstrate bit-for-bit digital signal processing (DSP) bit-error-rate measurements for transmission of a 781.25-Mb/s photonic UWB signal...

  14. CERN Technical Training 2003: Learning for the LHC ! DISP-2003 - Digital Signal Processing

    CERN Multimedia

    2003-01-01

    DISP-2003 - Digital Signal Processing DISP-2003 is a two-term course given by CERN and University of Lausanne (UNIL) experts within the framework of the Technical Training Programme. The course will review the current techniques dealing with Digital Signal Processing, and it is intended for an audience who work or will work on digital signal processing aspects, and who need an introductory or refresher/update course. The course will be in English, with question and answers also in French. Spring 2 Term: DISP-2003: Advanced Digital Signal Processing 30 April 2003 - 21 May 2003, 4 lectures, Wednesdays afternoon (attendance cost: 40.- CHF, registration required) Lecturers: Léonard Studer, UNIL; Laurent Deniau, AT-MTM; Elena Wildner, AT-MAS Programme: Intelligent signal processing (ISP). Non-linear time series analysis. Image processing. Wavelets. (Basic concepts and definitions have been introduced during the previous Spring 1 Term: DISP-2003: Introduction to Digital Signal Processing). DISP-2003 is open...

  15. CERN Technical Training 2003: Learning for the LHC ! DISP-2003  -  Digital Signal Processing

    CERN Multimedia

    2003-01-01

    DISP-2003 is a two-term course given by CERN and University of Lausanne (UNIL) experts within the framework of the Technical Training Programme. The course will review the current techniques dealing with Digital Signal Processing. The DISP-2003 lecture series is composed of two Terms, and it is intended for an audience who work or will work on digital signal processing aspects, and who need an introductory or refresher/update course. The course will be in English, with questions and answers also in French. Spring 1 Term: DISP-2003: Introduction to Digital Signal Processing 20 February 2003 - 3 April 2003, 7 lectures, Thursdays (attendance cost: 70.- CHF, registration required) Lecturers: Maria Elena Angoletta, AB-BDI; Guy Baribaud, AB-BDI; Philippe Baudrenghien, AB-RF; Laurent Deniau, AT-MTM Programme: 'Classical' digital signal processing. Fourier analysis. The Laplace transform. The z-transform. Digital filters. Statistics for Signal Processing. Signal Estimation and Spectral Analysis. Spring 2 T...

  16. Digital signal integrity and stability in the ATLAS Level-1 Calorimeter Trigger

    CERN Document Server

    Achenbach, R; Aharrouche, M; Andrei, V; Åsman, B; Barnett, B M; Bauss, B; Bendel, M; Bohm, C; Booth, J R A; Bracinik, J; Brawn, I P; Charlton, D G; Childers, J T; Collins, N J; Curtis, C J; Davis, A O; Eckweiler, S; Eisenhandler, E F; Faulkner, P J W; Fleckner, J; Föhlisch, F; Gee, C N P; Gillman, A R; Goringer, C; Groll, M; Hadley, D R; Hanke, P; Hellman, S; Hidvegi, A; Hillier, S J; Johansen, M; Kluge, E E; Kühl, T; Landon, M; Lendermann, V; Lilley, J N; Mahboubi, K; Mahout, G; Meier, K; Middleton, R P; Moa, T; Morris, J D; Müller, F; Neusiedl, A; Ohm, C; Oltmann, B; Perera, V J O; Prieur, D P F; Qian, W; Rieke, S; Rühr, F; Sankey, D P C; Schäfer, U; Schmitt, K; Schultz-Coulon, H C; Silverstein, S; Sjölin, J; Staley, R J; Stamen, R; Stockton, M C; Tan, C L A; Tapprogge, S; Thomas, J P; Thompson, P D; Watkins, P M; Watson, A; Weber, P; Wessels, M; Wildt, M

    2008-01-01

    The ATLAS Level-1 calorimeter trigger is a hardware-based system with the goal of identifying high-pT objects and to measure total and missing ET in the ATLAS calorimeters within an overall latency of 2.5 microseconds. This trigger system is composed of the Preprocessor which digitises about 7200 analogue input channels and two digital processors to identify high-pT signatures and to calculate the energy sums. The digital part consists of multi-stage, pipelined custom-built modules. The high demands on connectivity between the initial analogue stage and digital part and between the custom-built modules are presented. Furthermore the techniques to establish timing regimes and verify connectivity and stable operation of these digital links will be described.

  17. A New Digital Signal Processing Method for Spectrum Interference Monitoring

    Science.gov (United States)

    Angrisani, L.; Capriglione, D.; Ferrigno, L.; Miele, G.

    2011-01-01

    Frequency spectrum is a limited shared resource, nowadays interested by an ever growing number of different applications. Generally, the companies providing such services pay to the governments the right of using a limited portion of the spectrum, consequently they would be assured that the licensed radio spectrum resource is not interested by significant external interferences. At the same time, they have to guarantee that their devices make an efficient use of the spectrum and meet the electromagnetic compatibility regulations. Therefore the competent authorities are called to control the access to the spectrum adopting suitable management and monitoring policies, as well as the manufacturers have to periodically verify the correct working of their apparatuses. Several measurement solutions are present on the market. They generally refer to real-time spectrum analyzers and measurement receivers. Both of them are characterized by good metrological accuracies but show costs, dimensions and weights that make no possible a use "on the field". The paper presents a first step in realizing a digital signal processing based measurement instrument able to suitably accomplish for the above mentioned needs. In particular the attention has been given to the DSP based measurement section of the instrument. To these aims an innovative measurement method for spectrum monitoring and management is proposed in this paper. It performs an efficient sequential analysis based on a sample by sample digital processing. Three main issues are in particular pursued: (i) measurement performance comparable to that exhibited by other methods proposed in literature; (ii) fast measurement time, (iii) easy implementation on cost-effective measurement hardware.

  18. High-Level Design for Ultra-Fast Software Defined Radio Prototyping on Multi-Processors Heterogeneous Platforms

    OpenAIRE

    Moy , Christophe; Raulet , Mickaël

    2010-01-01

    International audience; The design of Software Defined Radio (SDR) equipments (terminals, base stations, etc.) is still very challenging. We propose here a design methodology for ultra-fast prototyping on heterogeneous platforms made of GPPs (General Purpose Processors), DSPs (Digital Signal Processors) and FPGAs (Field Programmable Gate Array). Lying on a component-based approach, the methodology mainly aims at automating as much as possible the design from an algorithmic validation to a mul...

  19. Digital Signal Processing for Medical Imaging Using Matlab

    CERN Document Server

    Gopi, E S

    2013-01-01

    This book describes medical imaging systems, such as X-ray, Computed tomography, MRI, etc. from the point of view of digital signal processing. Readers will see techniques applied to medical imaging such as Radon transformation, image reconstruction, image rendering, image enhancement and restoration, and more. This book also outlines the physics behind medical imaging required to understand the techniques being described. The presentation is designed to be accessible to beginners who are doing research in DSP for medical imaging. Matlab programs and illustrations are used wherever possible to reinforce the concepts being discussed.  ·         Acts as a “starter kit” for beginners doing research in DSP for medical imaging; ·         Uses Matlab programs and illustrations throughout to make content accessible, particularly with techniques such as Radon transformation and image rendering; ·         Includes discussion of the basic principles behind the various medical imaging tec...

  20. Distortions in power spectra of digitized signals - I: General formulations

    International Nuclear Information System (INIS)

    Njau, E.C.

    1982-04-01

    When a continuous signal f(t) is digitized and then spectrally analysed, the resultant energy spectral density R(ω) is given as R(ω) = |F(ω) * D(ω)| 2 , where F(ω) is the exact Fourier transform of f(t), D(ω) is the exact Fourier transform of the digitization process and * denotes convolution operation. A notable practical problem in spectral analysis is how to adequately decouple D(ω) from R(ω) and hence obtain the exact energy spectral density of f(t), i.e. |F(ω)| 2 , since R(ω) → |F(ω)| 2 only if D(ω) → delta(ω) or (under certain conditions) when D(ω) → delta(ω-ω 0 ) or if D(ω) → Σsub(n) delta(ω-ωsub(n)), where the latter is a sufficiently spaced series of delta functions and ωsub(j) is constant for a given j. A solution to this problem requires, among others, thorough understanding of D(ω), how it relates to F(ω) and hence the manner or degree to which D(ω) distorts or contaminates F(ω) to form R(ω). In this paper, we have developed exact analytical expressions of D(ω) that are well related to the corresponding F(ω) in the cases when f(t) is a simple sinusoid as well as when it is in the form of a more complex function. It is established that in either of these cases, D(ω) is a clear function of the salient parameters of both f(t) and F(ω). The contents of this paper are used in Part II to examine the manner and extent to which D(ω) causes distortions in R(ω) under given conditions, and also to establish a procedure by which such distortions may be decoupled from a practically computed R(ω). Other related issues such as frequency shifts in computed power spectra are also discussed therein. (author)

  1. Method and apparatus for analog signal conditioner for high speed, digital x-ray spectrometer

    International Nuclear Information System (INIS)

    Warburton, W.K.; Hubbard, B.

    1999-01-01

    A signal processing system which accepts input from an x-ray detector-preamplifier and produces a signal of reduced dynamic range for subsequent analog-to-digital conversion is disclosed. The system conditions the input signal to reduce the number of bits required in the analog-to-digital converter by removing that part of the input signal which varies only slowly in time and retaining the amplitude of the pulses which carry information about the x-rays absorbed by the detector. The parameters controlling the signal conditioner's operation can be readily supplied in digital form, allowing it to be integrated into a feedback loop as part of a larger digital x-ray spectroscopy system. 13 figs

  2. CERN Technical Training 2003: Learning for the LHC! DISP-2003 - Digital Signal Processing

    CERN Multimedia

    2003-01-01

    DISP-2003 is a two-term course given by CERN and University of Lausanne (UNIL) experts within the framework of the Technical Training Programme. The course will review the current techniques dealing with Digital Signal Processing, and it is intended for an audience who work or will work on digital signal processing aspects, and who need an introductory or refresher/update course. The course will be in English, with question and answers also in French. Spring 2 Term: DISP-2003: Advanced Digital Signal Processing 30 April 2003 - 21 May 2003, 4 lectures, Wednesdays afternoon. Attendance cost: 40.- CHF, registration required. Lecturers: Léonard Studer, UNIL; Laurent Deniau, AT-MTM; Elena Wildner, AT-MAS. Programme: Intelligent signal processing (ISP). Non-linear time series analysis. Image processing. Wavelets. Basic concepts and definitions have been introduced during the previous Spring 1 Term: DISP-2003: Introduction to Digital Signal Processing. DISP-2003 is open to all people interested, but registrat...

  3. Microcomputer-Based Digital Signal Processing Laboratory Experiments.

    Science.gov (United States)

    Tinari, Jr., Rocco; Rao, S. Sathyanarayan

    1985-01-01

    Describes a system (Apple II microcomputer interfaced to flexible, custom-designed digital hardware) which can provide: (1) Fast Fourier Transform (FFT) computation on real-time data with a video display of spectrum; (2) frequency synthesis experiments using the inverse FFT; and (3) real-time digital filtering experiments. (JN)

  4. Role of a transductional-transcriptional processor complex involving MyD88 and IRF-7 in Toll-like receptor signaling

    Science.gov (United States)

    Honda, Kenya; Yanai, Hideyuki; Mizutani, Tatsuaki; Negishi, Hideo; Shimada, Naoya; Suzuki, Nobutaka; Ohba, Yusuke; Takaoka, Akinori; Yeh, Wen-Chen; Taniguchi, Tadatsugu

    2004-01-01

    Toll-like receptor (TLR) activation is central to immunity, wherein the activation of the TLR9 subfamily members TLR9 and TLR7 results in the robust induction of type I IFNs (IFN-α/β) by means of the MyD88 adaptor protein. However, it remains unknown how the TLR signal “input” can be processed through MyD88 to “output” the induction of the IFN genes. Here, we demonstrate that the transcription factor IRF-7 interacts with MyD88 to form a complex in the cytoplasm. We provide evidence that this complex also involves IRAK4 and TRAF6 and provides the foundation for the TLR9-dependent activation of the IFN genes. The complex defined in this study represents an example of how the coupling of the signaling adaptor and effector kinase molecules together with the transcription factor regulate the processing of an extracellular signal to evoke its versatile downstream transcriptional events in a cell. Thus, we propose that this molecular complex may function as a cytoplasmic transductional-transcriptional processor. PMID:15492225

  5. Green Secure Processors: Towards Power-Efficient Secure Processor Design

    Science.gov (United States)

    Chhabra, Siddhartha; Solihin, Yan

    With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the software stack of a system, hardware attacks have become equally likely. Researchers have proposed Secure Processor Architectures which utilize hardware mechanisms for memory encryption and integrity verification to protect the confidentiality and integrity of data and computation, even from sophisticated hardware attacks. While there have been many works addressing performance and other system level issues in secure processor design, power issues have largely been ignored. In this paper, we first analyze the sources of power (energy) increase in different secure processor architectures. We then present a power analysis of various secure processor architectures in terms of their increase in power consumption over a base system with no protection and then provide recommendations for designs that offer the best balance between performance and power without compromising security. We extend our study to the embedded domain as well. We also outline the design of a novel hybrid cryptographic engine that can be used to minimize the power consumption for a secure processor. We believe that if secure processors are to be adopted in future systems (general purpose or embedded), it is critically important that power issues are considered in addition to performance and other system level issues. To the best of our knowledge, this is the first work to examine the power implications of providing hardware mechanisms for security.

  6. Illustration of decimation in digital signal processing (DSP) systems ...

    African Journals Online (AJOL)

    ... and engineering, especially in the areas of communication and medicine. ... This multirate DSP had been found useful in application like digital audio, video and even GSM technology. The work is implemented using MATLABTM software.

  7. 77 FR 9187 - Carriage of Digital Television Broadcast Signals: Amendment to the Commission's Rules

    Science.gov (United States)

    2012-02-16

    ... Digital Television Broadcast Signals: Amendment to the Commission's Rules AGENCY: Federal Communications... native format (e.g., .doc, .xml, .ppt, searchable .pdf). Participants in this proceeding should... Commission adopted certain rules to protect consumers as the transition to digital television (DTV...

  8. Bispectral methods of signal processing applications in radar, telecommunications and digital image restoration

    CERN Document Server

    Totsky, Alexander V; Kravchenko, Victor F

    2015-01-01

    By studying applications in radar, telecommunications and digital image restoration, this monograph discusses signal processing techniques based on bispectral methods. Improved robustness against different forms of noise as well as preservation of phase information render this method a valuable alternative to common power-spectrum analysis used in radar object recognition, digital wireless communications, and jitter removal in images.

  9. The role of lossless systems in modern digital signal processing: a tutorial

    OpenAIRE

    Vaidyanathan, P. P.; Doğanata, Zinnur

    1989-01-01

    A self-contained discussion of discrete-time lossless systems and their properties and relevance in digital signal processing is presented. The basic concept of losslessness is introduced, and several algebraic properties of lossless systems are studied. An understanding of these properties is crucial in order to exploit the rich usefulness of lossless systems in digital signal processing. Since lossless systems typically have many input and output terminals, a brief review of multiinput mult...

  10. Digital phonocardiographic experiments and signal processing in multidisciplinary fields of university education

    International Nuclear Information System (INIS)

    Nagy, Tamás; Vadai, Gergely; Gingl, Zoltán

    2017-01-01

    Modern measurement of physical signals is based on the use of sensors, electronic signal conditioning, analog-to-digital conversion and digital signal processing carried out by dedicated software. The same signal chain is used in many devices such as home appliances, automotive electronics, medical instruments, and smartphones. Teaching the theoretical, experimental, and signal processing background must be an essential part of improving the standard of higher education, and it fits well to the increasingly multidisciplinary nature of physics and engineering too. In this paper, we show how digital phonocardiography can be used in university education as a universal, highly scalable, exciting, and inspiring laboratory practice and as a demonstration at various levels and complexity. We have developed open-source software templates in modern programming languages to support immediate use and to serve as a basis of further modifications using personal computers, tablets, and smartphones. (paper)

  11. Digital phonocardiographic experiments and signal processing in multidisciplinary fields of university education

    Science.gov (United States)

    Nagy, Tamás; Vadai, Gergely; Gingl, Zoltán

    2017-09-01

    Modern measurement of physical signals is based on the use of sensors, electronic signal conditioning, analog-to-digital conversion and digital signal processing carried out by dedicated software. The same signal chain is used in many devices such as home appliances, automotive electronics, medical instruments, and smartphones. Teaching the theoretical, experimental, and signal processing background must be an essential part of improving the standard of higher education, and it fits well to the increasingly multidisciplinary nature of physics and engineering too. In this paper, we show how digital phonocardiography can be used in university education as a universal, highly scalable, exciting, and inspiring laboratory practice and as a demonstration at various levels and complexity. We have developed open-source software templates in modern programming languages to support immediate use and to serve as a basis of further modifications using personal computers, tablets, and smartphones.

  12. Digital signals processing using non-linear orthogonal transformation in frequency domain

    Directory of Open Access Journals (Sweden)

    Ivanichenko E.V.

    2017-12-01

    Full Text Available The rapid progress of computer technology in recent decades led to a wide introduction of methods of digital information processing practically in all fields of scientific research. In this case, among various applications of computing one of the most important places is occupied by digital processing systems signals (DSP that are used in data processing remote solution tasks of navigation of aerospace and marine objects, communications, radiophysics, digital optics and in a number of other applications. Digital Signal Processing (DSP is a dynamically developing an area that covers both technical and software tools. Related areas for digital signal processing are theory information, in particular, the theory of optimal signal reception and theory pattern recognition. In the first case, the main problem is signal extraction against a background of noise and interference of a different physical nature, and in the second - automatic recognition, i.e. classification and signal identification. In the digital processing of signals under a signal, we mean its mathematical description, i.e. a certain real function, containing information on the state or behavior of a physical system under an event that can be defined on a continuous or discrete space of time variation or spatial coordinates. In the broad sense, DSP systems mean a complex algorithmic, hardware and software. As a rule, systems contain specialized technical means of preliminary (or primary signal processing and special technical means for secondary processing of signals. Means of pretreatment are designed to process the original signals observed in general case against a background of random noise and interference of a different physical nature and represented in the form of discrete digital samples, for the purpose of detecting and selection (selection of the useful signal and evaluation characteristics of the detected signal. A new method of digital signal processing in the frequency

  13. SCOTT: A time and amplitude digitizer ASIC for PMT signal processing

    Science.gov (United States)

    Ferry, S.; Guilloux, F.; Anvar, S.; Chateau, F.; Delagnes, E.; Gautard, V.; Louis, F.; Monmarthe, E.; Le Provost, H.; Russo, S.; Schuller, J.-P.; Stolarczyk, Th.; Vallage, B.; Zonca, E.; KM3NeT Consortium

    2013-10-01

    SCOTT is an ASIC designed for the readout electronics of photomultiplier tubes developed for KM3NeT, the cubic-kilometer scale neutrino telescope in Mediterranean Sea. To digitize the PMT signals, the multi-time-over-threshold technique is used with up to 16 adjustable thresholds. Digital outputs of discriminators feed a circular sampling memory and a “first in first out” digital memory. A specific study has shown that five specifically chosen thresholds are suited to reach the required timing accuracy. A dedicated method based on the duration of the signal over a given threshold allows an equivalent timing precision at any charge. To verify that the KM3NeT requirements are fulfilled, this method is applied on PMT signals digitized by SCOTT.

  14. Analysis of pulse-shape discrimination techniques for BC501A using GHz digital signal processing

    International Nuclear Information System (INIS)

    Rooney, B.D.; Dinwiddie, D.R.; Nelson, M.A.; Rawool-Sullivan, Mohini W.

    2001-01-01

    A comparison study of pulse-shape analysis techniques was conducted for a BC501A scintillator using digital signal processing (DSP). In this study, output signals from a preamplifier were input directly into a 1 GHz analog-to-digital converter. The digitized data obtained with this method was post-processed for both pulse-height and pulse-shape information. Several different analysis techniques were evaluated for neutron and gamma-ray pulse-shape discrimination. It was surprising that one of the simplest and fastest techniques resulted in some of the best pulse-shape discrimination results. This technique, referred to here as the Integral Ratio technique, was able to effectively process several thousand detector pulses per second. This paper presents the results and findings of this study for various pulse-shape analysis techniques with digitized detector signals.

  15. Linear and Nonlinear Impairment Compensation in Coherent Optical Transmission with Digital Signal Processing

    DEFF Research Database (Denmark)

    Porto da Silva, Edson

    Digital signal processing (DSP) has become one of the main enabling technologies for the physical layer of coherent optical communication networks. The DSP subsystems are used to implement several functionalities in the digital domain, from synchronization to channel equalization. Flexibility...... nonlinearity compensation, (II) spectral shaping, and (III) adaptive equalization. For (I), original contributions are presented to the study of the nonlinearity compensation (NLC) with digital backpropagation (DBP). Numerical and experimental performance investigations are shown for different application...... scenarios. Concerning (II), it is demonstrated how optical and electrical (digital) pulse shaping can be allied to improve the spectral confinement of a particular class of optical time-division multiplexing (OTDM) signals that can be used as a building block for fast signaling single-carrier transceivers...

  16. An experimental digital consumer recorder for MPEG-coded video signals

    NARCIS (Netherlands)

    Saeijs, R.W.J.J.; With, de P.H.N.; Rijckaert, A.M.A.; Wong, C.

    1995-01-01

    The concept and real-time implementation of an experimental home-use digital recorder is presented, capable of recording MPEG-compressed video signals. The system has small recording mechanics based on the DVC standard and it uses MPEG compression for trick-mode signals as well

  17. Si(Li) x-ray spectrometer with signal processing system based on digital filtering

    International Nuclear Information System (INIS)

    Lakatos, Tamas

    1985-01-01

    A new signal processing system is under development at ATOMKI, Debrecen, Hungary, based on digital filtering by a microprocessor. The advantages of the new method are summarized. Dead time can be decreased and the speed of signal processing can be increased. Computer simulations verified the theoretical conclusions. (D.Gy.)

  18. DESIGN AND IMPLEMENTATION OF A VHDL PROCESSOR FOR DCT BASED IMAGE COMPRESSION

    Directory of Open Access Journals (Sweden)

    Md. Shabiul Islam

    2017-11-01

    Full Text Available This paper describes the design and implementation of a VHDL processor meant for performing 2D-Discrete Cosine Transform (DCT to use in image compression applications. The design flow starts from the system specification to implementation on silicon and the entire process is carried out using an advanced workstation based design environment for digital signal processing. The software allows the bit-true analysis to ensure that the designed VLSI processor satisfies the required specifications. The bit-true analysis is performed on all levels of abstraction (behavior, VHDL etc.. The motivation behind the work is smaller size chip area, faster processing, reducing the cost of the chip

  19. Fast modified signal-digit (MSD) multiplication technology and system

    Science.gov (United States)

    Sun, DeGui; He, Li-Ming; Wang, Na-Xin; Weng, Zhao-Heng

    1994-06-01

    In this paper, the carry-free property of modified-signed-digit (MSD) addition is analyzed with a space position logic encoding scheme. On this basis, MSD multiplication is discussed and a fast MSD multiplication system composed of optoelectronic logic technology and a multilayer optical interconnection architecture is propsed and studied. Finally, the effectivity of the fast MSD multiplication system is demostrated by using a 2X2 bit multiplication example and experimental results are given.

  20. The LASS hardware processor

    International Nuclear Information System (INIS)

    Kunz, P.F.

    1976-01-01

    The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

  1. Hybrid digital signal processing and neural networks applications in PWRs

    International Nuclear Information System (INIS)

    Eryurek, E.; Upadhyaya, B.R.; Kavaklioglu, K.

    1991-01-01

    Signal validation and plant subsystem tracking in power and process industries require the prediction of one or more state variables. Both heteroassociative and auotassociative neural networks were applied for characterizing relationships among sets of signals. A multi-layer neural network paradigm was applied for sensor and process monitoring in a Pressurized Water Reactor (PWR). This nonlinear interpolation technique was found to be very effective for these applications

  2. Design and implementation of a multiband digital filter using FPGA to extract the ECG signal in the presence of different interference signals.

    Science.gov (United States)

    Aboutabikh, Kamal; Aboukerdah, Nader

    2015-07-01

    In this paper, we propose a practical way to synthesize and filter an ECG signal in the presence of four types of interference signals: (1) those arising from power networks with a fundamental frequency of 50Hz, (2) those arising from respiration, having a frequency range from 0.05 to 0.5Hz, (3) muscle signals with a frequency of 25Hz, and (4) white noise present within the ECG signal band. This was done by implementing a multiband digital filter (seven bands) of type FIR Multiband Least Squares using a digital programmable device (Cyclone II EP2C70F896C6 FPGA, Altera), which was placed on an education and development board (DE2-70, Terasic). This filter was designed using the VHDL language in the Quartus II 9.1 design environment. The proposed method depends on Direct Digital Frequency Synthesizers (DDFS) designed to synthesize the ECG signal and various interference signals. So that the synthetic ECG specifications would be closer to actual ECG signals after filtering, we designed in a single multiband digital filter instead of using three separate digital filters LPF, HPF, BSF. Thus all interference signals were removed with a single digital filter. The multiband digital filter results were studied using a digital oscilloscope to characterize input and output signals in the presence of differing sinusoidal interference signals and white noise. Copyright © 2015 Elsevier Ltd. All rights reserved.

  3. Signal-to-noise ratio estimation in digital computer simulation of lowpass and bandpass systems with applications to analog and digital communications, volume 3

    Science.gov (United States)

    Tranter, W. H.; Turner, M. D.

    1977-01-01

    Techniques are developed to estimate power gain, delay, signal-to-noise ratio, and mean square error in digital computer simulations of lowpass and bandpass systems. The techniques are applied to analog and digital communications. The signal-to-noise ratio estimates are shown to be maximum likelihood estimates in additive white Gaussian noise. The methods are seen to be especially useful for digital communication systems where the mapping from the signal-to-noise ratio to the error probability can be obtained. Simulation results show the techniques developed to be accurate and quite versatile in evaluating the performance of many systems through digital computer simulation.

  4. Recursive Matrix Inverse Update On An Optical Processor

    Science.gov (United States)

    Casasent, David P.; Baranoski, Edward J.

    1988-02-01

    A high accuracy optical linear algebraic processor (OLAP) using the digital multiplication by analog convolution (DMAC) algorithm is described for use in an efficient matrix inverse update algorithm with speed and accuracy advantages. The solution of the parameters in the algorithm are addressed and the advantages of optical over digital linear algebraic processors are advanced.

  5. Method and apparatus for digitally based high speed x-ray spectrometer

    International Nuclear Information System (INIS)

    Warburton, W.K.; Hubbard, B.

    1997-01-01

    A high speed, digitally based, signal processing system which accepts input data from a detector-preamplifier and produces a spectral analysis of the x-rays illuminating the detector. The system achieves high throughputs at low cost by dividing the required digital processing steps between a ''hardwired'' processor implemented in combinatorial digital logic, which detects the presence of the x-ray signals in the digitized data stream and extracts filtered estimates of their amplitudes, and a programmable digital signal processing computer, which refines the filtered amplitude estimates and bins them to produce the desired spectral analysis. One set of algorithms allow this hybrid system to match the resolution of analog systems while operating at much higher data rates. A second set of algorithms implemented in the processor allow the system to be self calibrating as well. The same processor also handles the interface to an external control computer. 19 figs

  6. Digital generation of stochastic signals of arbitrary spectral shape

    International Nuclear Information System (INIS)

    Behringer, K.; Nishihara, H.; Spiekerman, G.

    1986-10-01

    For computer-simulation experiments in the development of noise monitoring systems three methods of generating ergodic Gaussian random noise with specified spectral properties have been investigated: digital filtering of white noise optimum symmetric FIR filters, a modified Rice formulation and an approximation of the Kac representation of noise. The proposed modified Rice formulation is a new noise generation method which is most efficient with regard to the computation time. By windowing subsequent Rice sequences a smooth noise record of any desired length can be produced. (author)

  7. Digital generation of stochastic signals of arbitrary spectral shape

    International Nuclear Information System (INIS)

    Behringer, K.; Nishihara, H.; Spiekerman, G.

    1986-01-01

    For computer-simulation experiments in the development of noise monitoring systems three methods of generating ergodic Gaussian random noise with specified spectral properties have been investigated: digital filtering of white noise with optimum symmetric FIR filters, a modified Rice formulation and an approximation of the Kac representation of noise. The proposed modified Rice formulation is a new noise generation method which is most efficient with regard to the computation time. By windowing subsequent Rice sequences a smooth noise record of any desired length can be produced. (author)

  8. Digitizing high frequency signals using serial analog memories

    International Nuclear Information System (INIS)

    Coonrod, J.W.

    1975-10-01

    An online computer system has been developed as a replacement for oscilloscopes and cameras on the Tormac project. Up to 32 simultaneous waveforms are recorded at up to 2 MHz in analog shift registers, then digitized sequentially after the event into a small PDP-11 computer. Data and functions of data may be displayed or plotted locally, and then forwarded for storage at a larger, remote computer via a network arrangement. Advantages over scopes have been lower incremental cost (approximately $200/channel), less noise pickup, better resolution (less than 1%), and immediate presentation of data

  9. Digital signal processing for wireless communication using Matlab

    CERN Document Server

    Gopi, E S

    2016-01-01

    This book examines signal processing techniques used in wireless communication illustrated by using the Matlab program. The author discusses these techniques as they relate to Doppler spread; delay spread; Rayleigh and Rician channel modeling; rake receiver; diversity techniques; MIMO and OFDM -based transmission techniques; and array signal processing. Related topics such as detection theory, link budget, multiple access techniques, and spread spectrum are also covered.   ·         Illustrates signal processing techniques involved in wireless communication using Matlab ·         Discusses multiple access techniques such as Frequency division multiple access, Time division multiple access, and Code division multiple access ·         Covers band pass modulation techniques such as Binary phase shift keying, Differential phase shift keying, Quadrature phase shift keying, Binary frequency shift keying, Minimum shift keying, and Gaussian minimum shift keying.

  10. Embedding supplemental data in a digital video signal

    NARCIS (Netherlands)

    2005-01-01

    An MPEG-encoded video signal includes groups of pictures (GOPs), each GOP having an intraframe coded (I) picture and a series of predictively encoded (P) pictures and bidirectionally predictively encoded (B) pictures. Usually, the GOP structure IBBPBBP . . . is used. However, in order to embed a

  11. Embedding supplemental data in a digital video signal

    NARCIS (Netherlands)

    2005-01-01

    An MPEG-encoded video signal includes groups of pictures (GOPs), each GOP having an intraframe coded (I) picture and a series of predictively encoded (P) pictures and bi-directionally predictively (B) pictures. Usually, the GOP structure IBBPBBP . . . is used. However, in order to embed a watermark

  12. Joint time frequency analysis in digital signal processing

    DEFF Research Database (Denmark)

    Pedersen, Flemming

    with this technique is that the resolution is limited because of distortion. To overcome the resolution limitations of the Fourier Spectogram, many new distributions have been developed. In spite of this the Fourier Spectogram is by far the prime method for the analysis of signals whose spectral content is varying...

  13. Digital Signal Processing Applied to the Modernization Of Polish Navy Sonars

    Directory of Open Access Journals (Sweden)

    Marszal Jacek

    2014-04-01

    Full Text Available The article presents the equipment and digital signal processing methods used for modernizing the Polish Navy’s sonars. With the rapid advancement of electronic technologies and digital signal processing methods, electronic systems, including sonars, become obsolete very quickly. In the late 1990s a team of researchers of the Department of Marine Electronics Systems, Faculty of Electronics, Telecommunications and Informatics, Gdansk University of Technology, began work on modernizing existing sonar systems for the Polish Navy. As part of the effort, a methodology of sonar modernization was implemented involving a complete replacement of existing electronic components with newly designed ones by using bespoke systems and methods of digital signal processing. Large and expensive systems of ultrasound transducers and their dipping and stabilisation systems underwent necessary repairs but were otherwise left unchanged. As a result, between 2001 and 2014 the Gdansk University of Technology helped to modernize 30 sonars of different types.

  14. Distortion-Free 1-Bit PWM Coding for Digital Audio Signals

    Directory of Open Access Journals (Sweden)

    John Mourjopoulos

    2007-01-01

    Full Text Available Although uniformly sampled pulse width modulation (UPWM represents a very efficient digital audio coding scheme for digital-to-analog conversion and full-digital amplification, it suffers from strong harmonic distortions, as opposed to benign non-harmonic artifacts present in analog PWM (naturally sampled PWM, NPWM. Complete elimination of these distortions usually requires excessive oversampling of the source PCM audio signal, which results to impractical realizations of digital PWM systems. In this paper, a description of digital PWM distortion generation mechanism is given and a novel principle for their minimization is proposed, based on a process having some similarity to the dithering principle employed in multibit signal quantization. This conditioning signal is termed “jither” and it can be applied either in the PCM amplitude or the PWM time domain. It is shown that the proposed method achieves significant decrement of the harmonic distortions, rendering digital PWM performance equivalent to that of source PCM audio, for mild oversampling (e.g., ×4 resulting to typical PWM clock rates of 90 MHz.

  15. Distortion-Free 1-Bit PWM Coding for Digital Audio Signals

    Directory of Open Access Journals (Sweden)

    Mourjopoulos John

    2007-01-01

    Full Text Available Although uniformly sampled pulse width modulation (UPWM represents a very efficient digital audio coding scheme for digital-to-analog conversion and full-digital amplification, it suffers from strong harmonic distortions, as opposed to benign non-harmonic artifacts present in analog PWM (naturally sampled PWM, NPWM. Complete elimination of these distortions usually requires excessive oversampling of the source PCM audio signal, which results to impractical realizations of digital PWM systems. In this paper, a description of digital PWM distortion generation mechanism is given and a novel principle for their minimization is proposed, based on a process having some similarity to the dithering principle employed in multibit signal quantization. This conditioning signal is termed "jither" and it can be applied either in the PCM amplitude or the PWM time domain. It is shown that the proposed method achieves significant decrement of the harmonic distortions, rendering digital PWM performance equivalent to that of source PCM audio, for mild oversampling (e.g., resulting to typical PWM clock rates of 90 MHz.

  16. Development of FPGA-based digital signal processing system for radiation spectroscopy

    International Nuclear Information System (INIS)

    Lee, Pil Soo; Lee, Chun Sik; Lee, Ju Hahn

    2013-01-01

    We have developed an FPGA-based digital signal processing system that performs both online digital signal filtering and pulse-shape analysis for both particle and gamma-ray spectroscopy. Such functionalities were made possible by a state-of-the-art programmable logic device and system architectures employed. The system performance as measured, for example, in the system dead time and accuracy for pulse-height and rise-time determination, was evaluated with standard alpha- and gamma-ray sources using a CsI(Tl) scintillation detector. It is resulted that the present system has shown its potential application to various radiation-related fields such as particle identification, radiography, and radiation imaging. - Highlights: ► An FPGA-based digital processing system was developed for radiation spectroscopy. ► Our digital system has a 14-bit resolution and a 100-MHz sampling rate. ► The FPGA implements the online digital filtering and pulse-shape analysis. ► The pileup rejection is implemented in trigger logic before digital filtering process. ► Our digital system was verified in alpha-gamma measurements using a CsI detector

  17. Development of Softcore Processor based RTU for FBR

    International Nuclear Information System (INIS)

    Gour, Aditya; Santhana Raj, A.; Behera, R.P.; Murali, N.; Swaminathan, P.

    2010-01-01

    Remote Terminal Units (RTU) are used to acquire analog/digital signals and generate potential free contact outputs and send the acquired data through LAN. The aim of this design is to develop a Soft-Core Processor based RTU by implementing the glue logic along with 8051 microcontroller present in existing RTUs into a single FPGA, so that component count and power consumption on the board will be reduced and thereby achieving a higher reliability than before. Implementation of glue logic was done using VHDL and Altium's TSK51 Softcore was used in place of 8051 microcontroller. (author)

  18. Time resolution improvement of Schottky CdTe PET detectors using digital signal processing

    International Nuclear Information System (INIS)

    Nakhostin, M.; Ishii, K.; Kikuchi, Y.; Matsuyama, S.; Yamazaki, H.; Torshabi, A. Esmaili

    2009-01-01

    We present the results of our study on the timing performance of Schottky CdTe PET detectors using the technique of digital signal processing. The coincidence signals between a CdTe detector (15x15x1 mm 3 ) and a fast liquid scintillator detector were digitized by a fast digital oscilloscope and analyzed. In the analysis, digital versions of the elements of timing circuits, including pulse shaper and time discriminator, were created and a digital implementation of the Amplitude and Rise-time Compensation (ARC) mode of timing was performed. Owing to a very fine adjustment of the parameters of timing measurement, a good time resolution of less than 9.9 ns (FWHM) at an energy threshold of 150 keV was achieved. In the next step, a new method of time pickoff for improvement of timing resolution without loss in the detection efficiency of CdTe detectors was examined. In the method, signals from a CdTe detector are grouped by their rise-times and different procedures of time pickoff are applied to the signals of each group. Then, the time pickoffs are synchronized by compensating the fixed time offset, caused by the different time pickoff procedures. This method leads to an improved time resolution of ∼7.2 ns (FWHM) at an energy threshold of as low as 150 keV. The methods presented in this work are computationally fast enough to be used for online processing of data in an actual PET system.

  19. Programmable optical processor chips: toward photonic RF filters with DSP-level flexibility and MHz-band selectivity

    Directory of Open Access Journals (Sweden)

    Xie Yiwei

    2017-12-01

    Full Text Available Integrated optical signal processors have been identified as a powerful engine for optical processing of microwave signals. They enable wideband and stable signal processing operations on miniaturized chips with ultimate control precision. As a promising application, such processors enables photonic implementations of reconfigurable radio frequency (RF filters with wide design flexibility, large bandwidth, and high-frequency selectivity. This is a key technology for photonic-assisted RF front ends that opens a path to overcoming the bandwidth limitation of current digital electronics. Here, the recent progress of integrated optical signal processors for implementing such RF filters is reviewed. We highlight the use of a low-loss, high-index-contrast stoichiometric silicon nitride waveguide which promises to serve as a practical material platform for realizing high-performance optical signal processors and points toward photonic RF filters with digital signal processing (DSP-level flexibility, hundreds-GHz bandwidth, MHz-band frequency selectivity, and full system integration on a chip scale.

  20. Computer Generated Inputs for NMIS Processor Verification

    International Nuclear Information System (INIS)

    J. A. Mullens; J. E. Breeding; J. A. McEvers; R. W. Wysor; L. G. Chiang; J. R. Lenarduzzi; J. T. Mihalczo; J. K. Mattingly

    2001-01-01

    Proper operation of the Nuclear Identification Materials System (NMIS) processor can be verified using computer-generated inputs [BIST (Built-In-Self-Test)] at the digital inputs. Preselected sequences of input pulses to all channels with known correlation functions are compared to the output of the processor. These types of verifications have been utilized in NMIS type correlation processors at the Oak Ridge National Laboratory since 1984. The use of this test confirmed a malfunction in a NMIS processor at the All-Russian Scientific Research Institute of Experimental Physics (VNIIEF) in 1998. The NMIS processor boards were returned to the U.S. for repair and subsequently used in NMIS passive and active measurements with Pu at VNIIEF in 1999

  1. Digital signal processing for CdTe detectors using VXIbus data collection systems

    Energy Technology Data Exchange (ETDEWEB)

    Fukuda, Daiji; Takahashi, Hiroyuki; Kurahashi, Tomohiko; Iguchi, Tetsuo; Nakazawa, Masaharu

    1996-07-01

    Recently fast signal digitizing technique has been developed, and signal waveforms with very short time periods can be obtained. In this paper, we analyzed each measured pulse which was digitized by an apparatus of this kind, and tried to improve an energy resolution of a CdTe semiconductor detector. The result of the energy resolution for {sup 137}Cs 662 keV photopeak was 13 keV. Also, we developed a fast data collection system based on VXIbus standard, and the counting rate on this system was obtained about 50 counts per second. (author)

  2. Emitter signal separation method based on multi-level digital channelization

    Science.gov (United States)

    Han, Xun; Ping, Yifan; Wang, Sujun; Feng, Ying; Kuang, Yin; Yang, Xinquan

    2018-02-01

    To solve the problem of emitter separation under complex electromagnetic environment, a signal separation method based on multi-level digital channelization is proposed in this paper. A two-level structure which can divide signal into different channel is designed first, after that, the peaks of different channels are tracked using the track filter and the coincident signals in time domain are separated in time-frequency domain. Finally, the time domain waveforms of different signals are acquired by reverse transformation. The validness of the proposed method is proved by experiment.

  3. CERN Technical Training: Signal Processor

    CERN Multimedia

    HR Department

    2009-01-01

    A new training is going to be held at CERN on the ADSP SHARC Family. The "System Development and Programming with the Analog Devices’ SHARC Family" course is a 3.5-day hands-on training on Analog Devices SHARC DSPs, focusing on the latest ‘368/9 and 37x families. General DSP architecture, peripherals available, booting up process and DSP code development will be covered. Hardware tools, debugging and hardware design guidelines will be introduced as well. The course id designed for System Designers needing to make informed decisions on design tradeoffs, Hardware Designers needing to develop external interfaces, and Code Developers needing to know how to get the highest performance from their algorithms. The course will take place, in English, from 31 March to 4 April in the CERN Technical Training Center. Few places are still available. Registrations are opened on the Technical Training page. More information on our catalogue: http://cta.cern.ch/cta2/f?p=110:9 or contact us with your que...

  4. Lipid rafts generate digital-like signal transduction in cell plasma membranes.

    Science.gov (United States)

    Suzuki, Kenichi G N

    2012-06-01

    Lipid rafts are meso-scale (5-200 nm) cell membrane domains where signaling molecules assemble and function. However, due to their dynamic nature, it has been difficult to unravel the mechanism of signal transduction in lipid rafts. Recent advanced imaging techniques have revealed that signaling molecules are frequently, but transiently, recruited to rafts with the aid of protein-protein, protein-lipid, and/or lipid-lipid interactions. Individual signaling molecules within the raft are activated only for a short period of time. Immobilization of signaling molecules by cytoskeletal actin filaments and scaffold proteins may facilitate more efficient signal transmission from rafts. In this review, current opinions of how the transient nature of molecular interactions in rafts generates digital-like signal transduction in cell membranes, and the benefits this phenomenon provides, are discussed. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Digital Signal Processing for a Sliceable Transceiver for Optical Access Networks

    DEFF Research Database (Denmark)

    Saldaña Cercos, Silvia; Wagner, Christoph; Vegas Olmos, Juan José

    2015-01-01

    Methods to upgrade the network infrastructure to cope with current traffic demands has attracted increasing research efforts. A promising alternative is signal slicing. Signal slicing aims at re-using low bandwidth equipment to satisfy high bandwidth traffic demands. This technique has been used...... also for implementing full signal path symmetry in real-time oscilloscopes to provide performance and signal fidelity (i.e. lower noise and jitter). In this paper the key digital signal processing (DSP) subsystems required to achieve signal slicing are surveyed. It also presents, for the first time...... penalty is reported for 10 Gbps. Power savings of the order of hundreds of Watts can be obtained when using signal slicing as an alternative to 10 Gbps implemented access networks....

  6. VLSI for High-Speed Digital Signal Processing

    Science.gov (United States)

    1994-09-30

    particular, the design, layout and fab - rication of integrated circuits. The primary project for this grant has been the design and implementation of a...targeted at 33.36 dB, and PSNR (dB) Rate ( bpp ) the FRSBC algorithm, targeted at 0.5 bits/pixel, respec- Filter FDSBC FRSBC FDSBC FRSBC tively. The filter...to mean square error d by as shown in Fig. 6, is used, yielding a total of 16 subbands. 255’ The rates, in bits per pixel ( bpp ), and the peak signal

  7. Oversampling of digitized images. [effects on interpolation in signal processing

    Science.gov (United States)

    Fischel, D.

    1976-01-01

    Oversampling is defined as sampling with a device whose characteristic width is greater than the interval between samples. This paper shows why oversampling should be avoided and discusses the limitations in data processing if circumstances dictate that oversampling cannot be circumvented. Principally, oversampling should not be used to provide interpolating data points. Rather, the time spent oversampling should be used to obtain more signal with less relative error, and the Sampling Theorem should be employed to provide any desired interpolated values. The concepts are applicable to single-element and multielement detectors.

  8. Signal-Noise Ratio Control Subsystem of Digital Equipment for Transmission of "Strela" Relay Protection Commands

    Directory of Open Access Journals (Sweden)

    I. I. Zabenkov

    2012-01-01

    Full Text Available Continuous measurement function of relative noise and interference level in the information transmission channel is considered as an important one for controlling parameters of high-frequency signal. The present paper simulates an algorithm for measuring signal-noise ratio in the transmission channel of high-voltage lines which is used in the digital equipment for transmission of relay protection and emergency automation commands of "Strela" complex.

  9. Development of a compact and cost effective multi-input digital signal processing system

    Science.gov (United States)

    Darvish-Molla, Sahar; Chin, Kenrick; Prestwich, William V.; Byun, Soo Hyun

    2018-01-01

    A prototype digital signal processing system (DSP) was developed using a microcontroller interfaced with a 12-bit sampling ADC, which offers a considerably inexpensive solution for processing multiple detectors with high throughput. After digitization of the incoming pulses, in order to maximize the output counting rate, a simple algorithm was employed for pulse height analysis. Moreover, an algorithm aiming at the real-time pulse pile-up deconvolution was implemented. The system was tested using a NaI(Tl) detector in comparison with a traditional analogue and commercial digital systems for a variety of count rates. The performance of the prototype system was consistently superior to the analogue and the commercial digital systems up to the input count rate of 61 kcps while was slightly inferior to the commercial digital system but still superior to the analogue system in the higher input rates. Considering overall cost, size and flexibility, this custom made multi-input digital signal processing system (MMI-DSP) was the best reliable choice for the purpose of the 2D microdosimetric data collection, or for any measurement in which simultaneous multi-data collection is required.

  10. PC-based digital feedback control for scanning force microscope

    International Nuclear Information System (INIS)

    Mohd Ashhar Khalid

    2002-01-01

    In the past, most digital feedback implementation for scanned-probe microscope were based on a digital signal processor (DSP). At present DSP plug-in card with the input-output interface module is still expensive compared to a fast pentium PC motherboard. For a magnetic force microscope (MFM) digital feedback has an advantage where the magnetic signal can be easily separated from the topographic signal. In this paper, a simple low-cost PC-based digital feedback and imaging system for Scanning Force Microscope (SFM) is presented. (Author)

  11. A High Density Low Cost Digital Signal Processing Module for Large Scale Radiation Detectors

    International Nuclear Information System (INIS)

    Tan, Hui; Hennig, Wolfgang; Walby, Mark D.; Breus, Dimitry; Harris, Jackson T.; Grudberg, Peter M.; Warburton, William K.

    2013-06-01

    A 32-channel digital spectrometer PIXIE-32 is being developed for nuclear physics or other radiation detection applications requiring digital signal processing with large number of channels at relatively low cost. A single PIXIE-32 provides spectrometry and waveform acquisition for 32 input signals per module whereas multiple modules can be combined into larger systems. It is based on the PCI Express standard which allows data transfer rates to the host computer of up to 800 MB/s. Each of the 32 channels in a PIXIE-32 module accepts signals directly from a detector preamplifier or photomultiplier. Digitally controlled offsets can be individually adjusted for each channel. Signals are digitized in 12-bit, 50 MHz multi-channel ADCs. Triggering, pile-up inspection and filtering of the data stream are performed in real time, and pulse heights and other event data are calculated on an event-by event basis. The hardware architecture, internal and external triggering features, and the spectrometry and waveform acquisition capability of the PIXIE- 32 as well as its capability to distribute clock and triggers among multiple modules, are presented. (authors)

  12. Natrium: Use of FPGA embedded processors for real-time data compression

    Energy Technology Data Exchange (ETDEWEB)

    Ammendola, R; Salamon, A; Salina, G [INFN Sezione di Roma Tor Vergata, Rome (Italy); Biagioni, A; Frezza, O; Cicero, F Lo; Lonardo, A; Rossetti, D; Simula, F; Tosoratto, L; Vicini, P [INFN Sezione di Roma, Rome (Italy)

    2011-12-15

    We present test results and characterization of a data compression system for the readout of the NA62 liquid krypton calorimeter trigger processor. The Level-0 electromagnetic calorimeter trigger processor of the NA62 experiment at CERN receives digitized data from the calorimeter main readout board. These data are stored on an on-board DDR2 RAM memory and read out upon reception of a Level-0 accept signal. The maximum raw data throughput from the trigger front-end cards is 2.6 Gbps. To readout these data over two Gbit Ethernet interfaces we investigated different implementations of a data compression system based on the Rice-Golomb coding: one is implemented in the FPGA as a custom block and one is implemented on the FPGA embedded processor running a C code. The two implementations are tested on a set of sample events and compared with respect to achievable readout bandwidth.

  13. Natrium: Use of FPGA embedded processors for real-time data compression

    International Nuclear Information System (INIS)

    Ammendola, R; Salamon, A; Salina, G; Biagioni, A; Frezza, O; Cicero, F Lo; Lonardo, A; Rossetti, D; Simula, F; Tosoratto, L; Vicini, P

    2011-01-01

    We present test results and characterization of a data compression system for the readout of the NA62 liquid krypton calorimeter trigger processor. The Level-0 electromagnetic calorimeter trigger processor of the NA62 experiment at CERN receives digitized data from the calorimeter main readout board. These data are stored on an on-board DDR2 RAM memory and read out upon reception of a Level-0 accept signal. The maximum raw data throughput from the trigger front-end cards is 2.6 Gbps. To readout these data over two Gbit Ethernet interfaces we investigated different implementations of a data compression system based on the Rice-Golomb coding: one is implemented in the FPGA as a custom block and one is implemented on the FPGA embedded processor running a C code. The two implementations are tested on a set of sample events and compared with respect to achievable readout bandwidth.

  14. PERFORMANCE EVALUATION OF OR1200 PROCESSOR WITH EVOLUTIONARY PARALLEL HPRC USING GEP

    Directory of Open Access Journals (Sweden)

    R. Maheswari

    2012-04-01

    Full Text Available In this fast computing era, most of the embedded system requires more computing power to complete the complex function/ task at the lesser amount of time. One way to achieve this is by boosting up the processor performance which allows processor core to run faster. This paper presents a novel technique of increasing the performance by parallel HPRC (High Performance Reconfigurable Computing in the CPU/DSP (Digital Signal Processor unit of OR1200 (Open Reduced Instruction Set Computer (RISC 1200 using Gene Expression Programming (GEP an evolutionary programming model. OR1200 is a soft-core RISC processor of the Intellectual Property cores that can efficiently run any modern operating system. In the manufacturing process of OR1200 a parallel HPRC is placed internally in the Integer Execution Pipeline unit of the CPU/DSP core to increase the performance. The GEP Parallel HPRC is activated /deactivated by triggering the signals i HPRC_Gene_Start ii HPRC_Gene_End. A Verilog HDL(Hardware Description language functional code for Gene Expression Programming parallel HPRC is developed and synthesised using XILINX ISE in the former part of the work and a CoreMark processor core benchmark is used to test the performance of the OR1200 soft core in the later part of the work. The result of the implementation ensures the overall speed-up increased to 20.59% by GEP based parallel HPRC in the execution unit of OR1200.

  15. Feasibility of Johnson Noise Thermometry based on Digital Signal Processing Techniques

    International Nuclear Information System (INIS)

    Hwang, In Koo; Kim, Yang Mo

    2014-01-01

    This paper presents an implementation strategy of noise thermometry based on a digital signal processing technique and demonstrates its feasibilities. A key factor in its development is how to extract the small thermal noise signal from other noises, for example, random noise from amplifiers and continuous electromagnetic interference from the environment. The proposed system consists of two identical amplifiers and uses a cross correlation function to cancel the random noise of the amplifiers. Then, the external interference noises are eliminated by discriminating the difference in the peaks between the thermal signal and external noise. The gain of the amplifiers is estimated by injecting an already known pilot signal. The experimental simulation results of signal processing methods have demonstrated that the proposed approach is an effective method in eliminating an external noise signal and performing gain correction for development of the thermometry

  16. Enhancement of the automatic ultrasonic signal processing system using digital technology

    International Nuclear Information System (INIS)

    Koo, In Soo; Park, H. Y.; Suh, Y. S.; Kim, D. Hoon; Huh, S.; Sung, S. H.; Jang, G. S.; Ryoo, S. G.; Choi, J. H.; Kim, Y. H.; Lee, J. C.; Kim, D. Hyun; Park, H. J.; Kim, Y. C.; Lee, J. P.; Park, C. H.; Kim, M. S.

    1999-12-01

    The objective of this study is to develop the automatic ultrasonic signal processing system which can be used in the inspection equipment to assess the integrity of the reactor vessel by enhancing the performance of the ultrasonic signal processing system. Main activities of this study divided into three categories such as the development of the circuits for generating ultrasonic signal and receiving the signal from the inspection equipment, the development of signal processing algorithm and H/W of the data processing system, and the development of the specification for application programs and system S/W for the analysis and evaluation computer. The results of main activities are as follows 1) the design of the ultrasonic detector and the automatic ultrasonic signal processing system by using the investigation of the state-of-the-art technology in the inside and outside of the country. 2) the development of H/W and S/W of the data processing system based on the results. Especially, the H/W of the data processing system, which have both advantages of digital and analog controls through the real-time digital signal processing, was developed using the DSP which can process the digital signal in the real-time, and was developed not only firmware of the data processing system in order for the peripherals but also the test algorithm of specimen for the calibration. The application programs and the system S/W of the analysis/evaluation computer were developed. Developed equipment was verified by the performance test. Based on developed prototype for the automatic ultrasonic signal processing system, the localization of the overall ultrasonic inspection equipment for nuclear industries would be expected through the further studies of the H/W establishment of real applications, developing the S/W specification of the analysis computer. (author)

  17. A phase-equalized digital multirate filter for 50 Hz signal processing

    Energy Technology Data Exchange (ETDEWEB)

    Vainio, O. [Tampere University of Technology, Signal Processing Laboratory, Tampere (Finland)

    1997-12-31

    A new multistage digital filter is proposed for 50 Hz line frequency signal processing in zero-crossing detectors and synchronous power systems. The purpose of the filter is to extract the fundamental sinusoidal signal from noise and impulsive disturbances so that the output is accurately in phase with the primary input signal. This is accomplished with a cascade of a median filter, a linear-phase FIR filter, and a phase corrector. A 10 kHz output timing resolution is achieved by up-sampling with a customized interpolation filter. (orig.) 15 refs.

  18. Expert System Constant False Alarm Rate (CFAR) Processor

    National Research Council Canada - National Science Library

    Wicks, Michael C

    2006-01-01

    An artificial intelligence system improves radar signal processor performance by increasing target probability of detection and reducing probability of false alarm in a severe radar clutter environment...

  19. Full-field wrist pulse signal acquisition and analysis by 3D Digital Image Correlation

    Science.gov (United States)

    Xue, Yuan; Su, Yong; Zhang, Chi; Xu, Xiaohai; Gao, Zeren; Wu, Shangquan; Zhang, Qingchuan; Wu, Xiaoping

    2017-11-01

    Pulse diagnosis is an essential part in four basic diagnostic methods (inspection, listening, inquiring and palpation) in traditional Chinese medicine, which depends on longtime training and rich experience, so computerized pulse acquisition has been proposed and studied to ensure the objectivity. To imitate the process that doctors using three fingertips with different pressures to feel fluctuations in certain areas containing three acupoints, we established a five dimensional pulse signal acquisition system adopting a non-contacting optical metrology method, 3D digital image correlation, to record the full-field displacements of skin fluctuations under different pressures. The system realizes real-time full-field vibration mode observation with 10 FPS. The maximum sample frequency is 472 Hz for detailed post-processing. After acquisition, the signals are analyzed according to the amplitude, pressure, and pulse wave velocity. The proposed system provides a novel optical approach for digitalizing pulse diagnosis and massive pulse signal data acquisition for various types of patients.

  20. Probabilistic programmable quantum processors

    International Nuclear Information System (INIS)

    Buzek, V.; Ziman, M.; Hillery, M.

    2004-01-01

    We analyze how to improve performance of probabilistic programmable quantum processors. We show how the probability of success of the probabilistic processor can be enhanced by using the processor in loops. In addition, we show that an arbitrary SU(2) transformations of qubits can be encoded in program state of a universal programmable probabilistic quantum processor. The probability of success of this processor can be enhanced by a systematic correction of errors via conditional loops. Finally, we show that all our results can be generalized also for qudits. (Abstract Copyright [2004], Wiley Periodicals, Inc.)

  1. Digital Detection and feedback Fluxgate Magnetometer

    DEFF Research Database (Denmark)

    Piil-Henriksen, J.; Merayo, José M.G.; Nielsen, Otto V

    1996-01-01

    A new full Earth's field dynamic feedback fluxgate magnetometer is described. It is based entirely on digital signal processing and digital feedback control, thereby replacing the classical second harmonic tuned analogue electronics by processor algorithms. Discrete mathematical cross......-correlation routines and substantial oversampling reduce the noise to 71 pT root-mean-square in a 0.25-10 Hz bandwidth for a full Earth's field range instrument....

  2. A BUNCH TO BUCKET PHASE DETECTOR USING DIGITAL RECEIVER TECHNOLOGY

    International Nuclear Information System (INIS)

    DELONG, J.; BRENNAN, J.M.; HAYES, T.; LE, T.N.; SMITH, K.

    2003-01-01

    Transferring high-speed digital signals to a Digital Signal Processor is limited by the IO bandwidth of the DSP. A digital receiver circuit is used to translate high frequency W signals to base-band. The translated output frequency is close to DC and the data rate can be reduced, by decimation, before transfer to the DSP. By translating both the longitudinal beam (bunch) and RF cavity pick-ups (bucket) to DC, a DSP can be used to measure their relative phase angle. The result can be used as an error signal in a beam control servo loop and any phase differences can be compensated

  3. C-HEAP : a heterogeneous multi-processor architecture template and scalable and flexible protocol for the design of embedded signal processing systems

    NARCIS (Netherlands)

    Nieuwland, A.K.; Kang, J.; Gangwal, O.P.; Sethuraman, R.; Busá, N.G.; Goossens, K.G.W.; Peset Llopis, R.; Lippens, P.E.R.

    2002-01-01

    The key issue in the design of Systems-on-a-Chip (SoC) is to trade-off efficiency against flexibility, and time to market versus cost. Current deep submicron processing technologies enable integration of multiple software programmable processors (e.g., CPUs, DSPs) and dedicated hardware components

  4. Accuracy requirements of optical linear algebra processors in adaptive optics imaging systems

    Science.gov (United States)

    Downie, John D.; Goodman, Joseph W.

    1989-10-01

    The accuracy requirements of optical processors in adaptive optics systems are determined by estimating the required accuracy in a general optical linear algebra processor (OLAP) that results in a smaller average residual aberration than that achieved with a conventional electronic digital processor with some specific computation speed. Special attention is given to an error analysis of a general OLAP with regard to the residual aberration that is created in an adaptive mirror system by the inaccuracies of the processor, and to the effect of computational speed of an electronic processor on the correction. Results are presented on the ability of an OLAP to compete with a digital processor in various situations.

  5. Power estimation on functional level for programmable processors

    Directory of Open Access Journals (Sweden)

    M. Schneider

    2004-01-01

    Full Text Available In diesem Beitrag werden verschiedene Ansätze zur Verlustleistungsschätzung von programmierbaren Prozessoren vorgestellt und bezüglich ihrer Übertragbarkeit auf moderne Prozessor-Architekturen wie beispielsweise Very Long Instruction Word (VLIW-Architekturen bewertet. Besonderes Augenmerk liegt hierbei auf dem Konzept der sogenannten Functional-Level Power Analysis (FLPA. Dieser Ansatz basiert auf der Einteilung der Prozessor-Architektur in funktionale Blöcke wie beispielsweise Processing-Unit, Clock-Netzwerk, interner Speicher und andere. Die Verlustleistungsaufnahme dieser Bl¨ocke wird parameterabhängig durch arithmetische Modellfunktionen beschrieben. Durch automatisierte Analyse von Assemblercodes des zu schätzenden Systems mittels eines Parsers können die Eingangsparameter wie beispielsweise der erzielte Parallelitätsgrad oder die Art des Speicherzugriffs gewonnen werden. Dieser Ansatz wird am Beispiel zweier moderner digitaler Signalprozessoren durch eine Vielzahl von Basis-Algorithmen der digitalen Signalverarbeitung evaluiert. Die ermittelten Schätzwerte für die einzelnen Algorithmen werden dabei mit physikalisch gemessenen Werten verglichen. Es ergibt sich ein sehr kleiner maximaler Schätzfehler von 3%. In this contribution different approaches for power estimation for programmable processors are presented and evaluated concerning their capability to be applied to modern digital signal processor architectures like e.g. Very Long InstructionWord (VLIW -architectures. Special emphasis will be laid on the concept of so-called Functional-Level Power Analysis (FLPA. This approach is based on the separation of the processor architecture into functional blocks like e.g. processing unit, clock network, internal memory and others. The power consumption of these blocks is described by parameter dependent arithmetic model functions. By application of a parser based automized analysis of assembler codes of the systems to be estimated

  6. Power estimation on functional level for programmable processors

    Science.gov (United States)

    Schneider, M.; Blume, H.; Noll, T. G.

    2004-05-01

    In diesem Beitrag werden verschiedene Ansätze zur Verlustleistungsschätzung von programmierbaren Prozessoren vorgestellt und bezüglich ihrer Übertragbarkeit auf moderne Prozessor-Architekturen wie beispielsweise Very Long Instruction Word (VLIW)-Architekturen bewertet. Besonderes Augenmerk liegt hierbei auf dem Konzept der sogenannten Functional-Level Power Analysis (FLPA). Dieser Ansatz basiert auf der Einteilung der Prozessor-Architektur in funktionale Blöcke wie beispielsweise Processing-Unit, Clock-Netzwerk, interner Speicher und andere. Die Verlustleistungsaufnahme dieser Bl¨ocke wird parameterabhängig durch arithmetische Modellfunktionen beschrieben. Durch automatisierte Analyse von Assemblercodes des zu schätzenden Systems mittels eines Parsers können die Eingangsparameter wie beispielsweise der erzielte Parallelitätsgrad oder die Art des Speicherzugriffs gewonnen werden. Dieser Ansatz wird am Beispiel zweier moderner digitaler Signalprozessoren durch eine Vielzahl von Basis-Algorithmen der digitalen Signalverarbeitung evaluiert. Die ermittelten Schätzwerte für die einzelnen Algorithmen werden dabei mit physikalisch gemessenen Werten verglichen. Es ergibt sich ein sehr kleiner maximaler Schätzfehler von 3%. In this contribution different approaches for power estimation for programmable processors are presented and evaluated concerning their capability to be applied to modern digital signal processor architectures like e.g. Very Long InstructionWord (VLIW) -architectures. Special emphasis will be laid on the concept of so-called Functional-Level Power Analysis (FLPA). This approach is based on the separation of the processor architecture into functional blocks like e.g. processing unit, clock network, internal memory and others. The power consumption of these blocks is described by parameter dependent arithmetic model functions. By application of a parser based automized analysis of assembler codes of the systems to be estimated the input

  7. Digital nonlinearity compensation in high-capacity optical communication systems considering signal spectral broadening effect.

    Science.gov (United States)

    Xu, Tianhua; Karanov, Boris; Shevchenko, Nikita A; Lavery, Domaniç; Liga, Gabriele; Killey, Robert I; Bayvel, Polina

    2017-10-11

    Nyquist-spaced transmission and digital signal processing have proved effective in maximising the spectral efficiency and reach of optical communication systems. In these systems, Kerr nonlinearity determines the performance limits, and leads to spectral broadening of the signals propagating in the fibre. Although digital nonlinearity compensation was validated to be promising for mitigating Kerr nonlinearities, the impact of spectral broadening on nonlinearity compensation has never been quantified. In this paper, the performance of multi-channel digital back-propagation (MC-DBP) for compensating fibre nonlinearities in Nyquist-spaced optical communication systems is investigated, when the effect of signal spectral broadening is considered. It is found that accounting for the spectral broadening effect is crucial for achieving the best performance of DBP in both single-channel and multi-channel communication systems, independent of modulation formats used. For multi-channel systems, the degradation of DBP performance due to neglecting the spectral broadening effect in the compensation is more significant for outer channels. Our work also quantified the minimum bandwidths of optical receivers and signal processing devices to ensure the optimal compensation of deterministic nonlinear distortions.

  8. Digital timing: sampling frequency, anti-aliasing filter and signal interpolation filter dependence on timing resolution

    International Nuclear Information System (INIS)

    Cho, Sanghee; Grazioso, Ron; Zhang Nan; Aykac, Mehmet; Schmand, Matthias

    2011-01-01

    The main focus of our study is to investigate how the performance of digital timing methods is affected by sampling rate, anti-aliasing and signal interpolation filters. We used the Nyquist sampling theorem to address some basic questions such as what will be the minimum sampling frequencies? How accurate will the signal interpolation be? How do we validate the timing measurements? The preferred sampling rate would be as low as possible, considering the high cost and power consumption of high-speed analog-to-digital converters. However, when the sampling rate is too low, due to the aliasing effect, some artifacts are produced in the timing resolution estimations; the shape of the timing profile is distorted and the FWHM values of the profile fluctuate as the source location changes. Anti-aliasing filters are required in this case to avoid the artifacts, but the timing is degraded as a result. When the sampling rate is marginally over the Nyquist rate, a proper signal interpolation is important. A sharp roll-off (higher order) filter is required to separate the baseband signal from its replicates to avoid the aliasing, but in return the computation will be higher. We demonstrated the analysis through a digital timing study using fast LSO scintillation crystals as used in time-of-flight PET scanners. From the study, we observed that there is no significant timing resolution degradation down to 1.3 Ghz sampling frequency, and the computation requirement for the signal interpolation is reasonably low. A so-called sliding test is proposed as a validation tool checking constant timing resolution behavior of a given timing pick-off method regardless of the source location change. Lastly, the performance comparison for several digital timing methods is also shown.

  9. Influence of Wilbraham-Gibbs Phenomenon on Digital Stochastic Measurement of EEG Signal Over an Interval

    Directory of Open Access Journals (Sweden)

    Sovilj P.

    2014-10-01

    Full Text Available Measurement methods, based on the approach named Digital Stochastic Measurement, have been introduced, and several prototype and small-series commercial instruments have been developed based on these methods. These methods have been mostly investigated for various types of stationary signals, but also for non-stationary signals. This paper presents, analyzes and discusses digital stochastic measurement of electroencephalography (EEG signal in the time domain, emphasizing the problem of influence of the Wilbraham-Gibbs phenomenon. The increase of measurement error, related to the Wilbraham-Gibbs phenomenon, is found. If the EEG signal is measured and measurement interval is 20 ms wide, the average maximal error relative to the range of input signal is 16.84 %. If the measurement interval is extended to 2s, the average maximal error relative to the range of input signal is significantly lowered - down to 1.37 %. Absolute errors are compared with the error limit recommended by Organisation Internationale de Métrologie Légale (OIML and with the quantization steps of the advanced EEG instruments with 24-bit A/D conversion

  10. Preserving privacy of online digital physiological signals using blind and reversible steganography.

    Science.gov (United States)

    Shiu, Hung-Jr; Lin, Bor-Sing; Huang, Chien-Hung; Chiang, Pei-Ying; Lei, Chin-Laung

    2017-11-01

    Physiological signals such as electrocardiograms (ECG) and electromyograms (EMG) are widely used to diagnose diseases. Presently, the Internet offers numerous cloud storage services which enable digital physiological signals to be uploaded for convenient access and use. Numerous online databases of medical signals have been built. The data in them must be processed in a manner that preserves patients' confidentiality. A reversible error-correcting-coding strategy will be adopted to transform digital physiological signals into a new bit-stream that uses a matrix in which is embedded the Hamming code to pass secret messages or private information. The shared keys are the matrix and the version of the Hamming code. An online open database, the MIT-BIH arrhythmia database, was used to test the proposed algorithms. The time-complexity, capacity and robustness are evaluated. Comparisons of several evaluations subject to related work are also proposed. This work proposes a reversible, low-payload steganographic scheme for preserving the privacy of physiological signals. An (n,  m)-hamming code is used to insert (n - m) secret bits into n bits of a cover signal. The number of embedded bits per modification is higher than in comparable methods, and the computational power is efficient and the scheme is secure. Unlike other Hamming-code based schemes, the proposed scheme is both reversible and blind. Copyright © 2017 Elsevier B.V. All rights reserved.

  11. A comparative study of chaotic and white noise signals in digital watermarking

    International Nuclear Information System (INIS)

    Mooney, Aidan; Keating, John G.; Pitas, Ioannis

    2008-01-01

    Digital watermarking is an ever increasing and important discipline, especially in the modern electronically-driven world. Watermarking aims to embed a piece of information into digital documents which their owner can use to prove that the document is theirs, at a later stage. In this paper, performance analysis of watermarking schemes is performed on white noise sequences and chaotic sequences for the purpose of watermark generation. Pseudorandom sequences are compared with chaotic sequences generated from the chaotic skew tent map. In particular, analysis is performed on highpass signals generated from both these watermark generation schemes, along with analysis on lowpass watermarks and white noise watermarks. This analysis focuses on the watermarked images after they have been subjected to common image distortion attacks. It is shown that signals generated from highpass chaotic signals have superior performance than highpass noise signals, in the presence of such attacks. It is also shown that watermarks generated from lowpass chaotic signals have superior performance over the other signal types analysed

  12. Experimental demonstration of a format-flexible single-carrier coherent receiver using data-aided digital signal processing.

    Science.gov (United States)

    Elschner, Robert; Frey, Felix; Meuer, Christian; Fischer, Johannes Karl; Alreesh, Saleem; Schmidt-Langhorst, Carsten; Molle, Lutz; Tanimura, Takahito; Schubert, Colja

    2012-12-17

    We experimentally demonstrate the use of data-aided digital signal processing for format-flexible coherent reception of different 28-GBd PDM and 4D modulated signals in WDM transmission experiments over up to 7680 km SSMF by using the same resource-efficient digital signal processing algorithms for the equalization of all formats. Stable and regular performance in the nonlinear transmission regime is confirmed.

  13. Digital broadcasting

    International Nuclear Information System (INIS)

    Park, Ji Hyeong

    1999-06-01

    This book contains twelve chapters, which deals with digitization of broadcast signal such as digital open, digitization of video signal and sound signal digitization of broadcasting equipment like DTPP and digital VTR, digitization of equipment to transmit such as digital STL, digital FPU and digital SNG, digitization of transmit about digital TV transmit and radio transmit, digital broadcasting system on necessity and advantage, digital broadcasting system abroad and Korea, digital broadcasting of outline, advantage of digital TV, ripple effect of digital broadcasting and consideration of digital broadcasting, ground wave digital broadcasting of DVB-T in Europe DTV in U.S.A and ISDB-T in Japan, HDTV broadcasting, satellite broadcasting, digital TV broadcasting in Korea, digital radio broadcasting and new broadcasting service.

  14. Bounds on achievable accuracy in analog optical linear-algebra processors

    Science.gov (United States)

    Batsell, Stephen G.; Walkup, John F.; Krile, Thomas F.

    1990-07-01

    Upper arid lower bounds on the number of bits of accuracy achievable are determined by applying a seconth-ortler statistical model to the linear algebra processor. The use of bounds was found necessary due to the strong signal-dependence of the noise at the output of the optical linear algebra processor (OLAP). 1 1. ACCURACY BOUNDS One of the limiting factors in applying OLAPs to real world problems has been the poor achievable accuracy of these processors. Little previous research has been done on determining noise sources from a systems perspective which would include noise generated in the multiplication ard addition operations spatial variations across arrays and crosstalk. We have previously examined these noise sources and determined a general model for the output noise mean and variance. The model demonstrates a strony signaldependency in the noise at the output of the processor which has been confirmed by our experiments. 1 We define accuracy similar to its definition for an analog signal input to an analog-to-digital (ND) converter. The number of bits of accuracy achievable is related to the log (base 2) of the number of separable levels at the P/D converter output. The number of separable levels is fouri by dividing the dynamic range by m times the standard deviation of the signal a. 2 Here m determines the error rate in the P/D conversion. The dynamic range can be expressed as the

  15. Research on control law accelerator of digital signal process chip TMS320F28035 for real-time data acquisition and processing

    Science.gov (United States)

    Zhao, Shuangle; Zhang, Xueyi; Sun, Shengli; Wang, Xudong

    2017-08-01

    TI C2000 series digital signal process (DSP) chip has been widely used in electrical engineering, measurement and control, communications and other professional fields, DSP TMS320F28035 is one of the most representative of a kind. When using the DSP program, need data acquisition and data processing, and if the use of common mode C or assembly language programming, the program sequence, analogue-to-digital (AD) converter cannot be real-time acquisition, often missing a lot of data. The control low accelerator (CLA) processor can run in parallel with the main central processing unit (CPU), and the frequency is consistent with the main CPU, and has the function of floating point operations. Therefore, the CLA coprocessor is used in the program, and the CLA kernel is responsible for data processing. The main CPU is responsible for the AD conversion. The advantage of this method is to reduce the time of data processing and realize the real-time performance of data acquisition.

  16. Data collection from FASTBUS to a DEC UNIBUS processor through the UNIBUS-Processor Interface

    International Nuclear Information System (INIS)

    Larwill, M.; Barsotti, E.; Lesny, D.; Pordes, R.

    1983-01-01

    This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the Digital Equipment Corporation UNIBUS. The UPI was developed by Fermilab and the University of Illinois. Details of the use of this interface in a high energy physics experiment at Fermilab are given. The paper includes a discussion of the operation of the UPI on the UNIBUS of a VAX-11, and plans for using the UPI to perform data acquisition from FASTBUS to a VAX-11 Processor

  17. Front-end data reduction of diagnostic signals by real-time digital filtering

    International Nuclear Information System (INIS)

    Zasche, D.; Fahrbach, H.U.; Harmeyer, E.

    1984-01-01

    Diagnostic measurements on a fusion plasma with high resolution in space, time and signal amplitude involve handling large amounts of data. In the design of the soft-X-ray pinhole camera diagnostic for JET (100 detectors in 2 cameras) a new approach to this problem was found. The analogue-to-digital conversion is performed continuously at the highest sample rate of 200 kHz, lower sample rates (10 kHz, 1 kHz, 100 Hz) are obtained by real-time digital filters which calculate weighted averages over consecutive samples and are undersampled at their outputs to reduce the data rate. At any time, the signals from all detectors are available at all possible data rates in ring buffers. The appropriate data rate can always be recorded on demand. (author)

  18. Key technology research of nuclear signal digitized pulse shaping in real time

    International Nuclear Information System (INIS)

    Zhou Jianbin; Wang Min; Zhou Wei; Zhu Xing; Liu Yi; Chen Bao; Lu Baoping; Yue Aizhong; Qin Li; He Xuxin

    2014-01-01

    The computer simulation and analysis were carried out for the ideal nuclear pulse signal and the actual detector output signals, and the determination method of digital trapezoidal shape parameter for different nuclear pulse shaping time was summarized. At high count rate measurement occasion, the effective count rate is increased, some pile-up pulses are eliminated and the accumulation of dead time of the system is reduced. Meanwhile, Si-PIN semiconductor detector performance was tested by 256 points and 512 points digital triangle forming methods and the analog circuit forming methods for comparative tests. Test results show that the pulse forming treatment method increases the count rate performance and the resolution of detector. (authors)

  19. Upregulation of transmitter release probability improves a conversion of synaptic analogue signals into neuronal digital spikes

    Science.gov (United States)

    2012-01-01

    Action potentials at the neurons and graded signals at the synapses are primary codes in the brain. In terms of their functional interaction, the studies were focused on the influence of presynaptic spike patterns on synaptic activities. How the synapse dynamics quantitatively regulates the encoding of postsynaptic digital spikes remains unclear. We investigated this question at unitary glutamatergic synapses on cortical GABAergic neurons, especially the quantitative influences of release probability on synapse dynamics and neuronal encoding. Glutamate release probability and synaptic strength are proportionally upregulated by presynaptic sequential spikes. The upregulation of release probability and the efficiency of probability-driven synaptic facilitation are strengthened by elevating presynaptic spike frequency and Ca2+. The upregulation of release probability improves spike capacity and timing precision at postsynaptic neuron. These results suggest that the upregulation of presynaptic glutamate release facilitates a conversion of synaptic analogue signals into digital spikes in postsynaptic neurons, i.e., a functional compatibility between presynaptic and postsynaptic partners. PMID:22852823

  20. Data-derived symbol synchronization of MASK and QASK signals. [for multilevel digital communication systems

    Science.gov (United States)

    Simon, M. K.

    1974-01-01

    Multilevel amplitude-shift-keying (MASK) and quadrature amplitude-shift-keying (QASK) as signaling techniques for multilevel digital communications systems, and the problem of providing symbol synchronization in the receivers of such systems are discussed. A technique is presented for extracting symbol sync from an MASK or QASK signal. The scheme is a generalization of the data transition tracking loop used in PSK systems. The performance of the loop was analyzed in terms of its mean-squared jitter and its effects on the data detection process in MASK and QASK systems.

  1. Improvement of the energy resolution via an optimized digital signal processing in GERDA Phase I

    Science.gov (United States)

    Agostini, M.; Allardt, M.; Bakalyarov, A. M.; Balata, M.; Barabanov, I.; Barros, N.; Baudis, L.; Bauer, C.; Becerici-Schmidt, N.; Bellotti, E.; Belogurov, S.; Belyaev, S. T.; Benato, G.; Bettini, A.; Bezrukov, L.; Bode, T.; Borowicz, D.; Brudanin, V.; Brugnera, R.; Budjáš, D.; Caldwell, A.; Cattadori, C.; Chernogorov, A.; D'Andrea, V.; Demidova, E. V.; Vacri, A. di; Domula, A.; Doroshkevich, E.; Egorov, V.; Falkenstein, R.; Fedorova, O.; Freund, K.; Frodyma, N.; Gangapshev, A.; Garfagnini, A.; Grabmayr, P.; Gurentsov, V.; Gusev, K.; Hegai, A.; Heisel, M.; Hemmer, S.; Heusser, G.; Hofmann, W.; Hult, M.; Inzhechik, L. V.; Janicskó Csáthy, J.; Jochum, J.; Junker, M.; Kazalov, V.; Kihm, T.; Kirpichnikov, I. V.; Kirsch, A.; Klimenko, A.; Knöpfle, K. T.; Kochetov, O.; Kornoukhov, V. N.; Kuzminov, V. V.; Laubenstein, ********************M.; Lazzaro, A.; Lebedev, V. I.; Lehnert, B.; Liao, H. Y.; Lindner, M.; Lippi, I.; Lubashevskiy, A.; Lubsandorzhiev, B.; Lutter, G.; Macolino, C.; Majorovits, B.; Maneschg, W.; Medinaceli, E.; Misiaszek, M.; Moseev, P.; Nemchenok, I.; Palioselitis, D.; Panas, K.; Pandola, L.; Pelczar, K.; Pullia, A.; Riboldi, S.; Rumyantseva, N.; Sada, C.; Salathe, M.; Schmitt, C.; Schneider, B.; Schönert, S.; Schreiner, J.; Schütz, A.-K.; Schulz, O.; Schwingenheuer, B.; Selivanenko, O.; Shirchenko, M.; Simgen, H.; Smolnikov, A.; Stanco, L.; Stepaniuk, M.; Ur, C. A.; Vanhoefer, L.; Vasenko, A. A.; Veresnikova, A.; von Sturm, K.; Wagner, V.; Walter, M.; Wegmann, A.; Wester, T.; Wilsenach, H.; Wojcik, M.; Yanovich, E.; Zavarise, P.; Zhitnikov, I.; Zhukov, S. V.; Zinatulina, D.; Zuber, K.; Zuzel, G.

    2015-06-01

    An optimized digital shaping filter has been developed for the Gerda experiment which searches for neutrinoless double beta decay in Ge. The Gerda Phase I energy calibration data have been reprocessed and an average improvement of 0.3 keV in energy resolution (FWHM) corresponding to 10 % at the value for decay in Ge is obtained. This is possible thanks to the enhanced low-frequency noise rejection of this Zero Area Cusp (ZAC) signal shaping filter.

  2. Depth of quantization in signals of the digital X-ray television

    International Nuclear Information System (INIS)

    Beuthan, J.

    1989-01-01

    The technological realization of image acquisition and processing in digital X-ray television in methodical dependence on the image-forming purpose places particular requirements in signal quantization. By evaluation of experimental results with simultaneous modification of a special calculation method an optimum quantization stage is ascertained with method-relevant quantization characteristic. In addition to consideration made so far in this field a self-contained solution is presented with inclusion of vision physiology and information gain. (author)

  3. Universal Michelson Gires-Tournois interferometer optical interleaver based on digital signal processing.

    Science.gov (United States)

    Zhang, Juan; Yang, Xiaowei

    2010-03-01

    Optical interleavers based on Michelson Gires-Tournois interferometer (MGTI) with arbitrary cascaded reflectors for symmetrical or asymmetrical periodic frequency response with arbitrary duty cycles are defined as universal MGTI optical interleaver (UMGTIOI). It can significantly enhance flexibility and applicability of optical networks. A novel and simple method based on digital signal processing is proposed for the design of UMGTIOI. Different kinds of design examples are given to confirm effectiveness of the method.

  4. Measurement of definite integral of sinusoidal signal absolute value third power using digital stochastic method

    Directory of Open Access Journals (Sweden)

    Beljić Željko

    2017-01-01

    Full Text Available In this paper a special case of digital stochastic measurement of the third power of definite integral of sinusoidal signal’s absolute value, using 2-bit AD converters is presented. This case of digital stochastic method had emerged from the need to measure power and energy of the wind. Power and energy are proportional to the third power of wind speed. Anemometer output signal is sinusoidal. Therefore an integral of the third power of sinusoidal signal is zero. Two approaches are proposed for the third power calculation of the wind speed signal. One approach is to use absolute value of sinusoidal signal (before AD conversion for which there is no need of multiplier hardware change. The second approach requires small multiplier hardware change, but input signal remains unchanged. For the second approach proposed minimal hardware change was made to calculate absolute value of the result after AD conversion. Simulations have confirmed theoretical analysis. Expected precision of wind energy measurement of proposed device is better than 0,00051% of full scale. [Project of the Serbian Ministry of Education, Science and Technological Development, Grant no. TR32019

  5. Application of adaptive digital signal processing to speech enhancement for the hearing impaired.

    Science.gov (United States)

    Chabries, D M; Christiansen, R W; Brey, R H; Robinette, M S; Harris, R W

    1987-01-01

    A major complaint of individuals with normal hearing and hearing impairments is a reduced ability to understand speech in a noisy environment. This paper describes the concept of adaptive noise cancelling for removing noise from corrupted speech signals. Application of adaptive digital signal processing has long been known and is described from a historical as well as technical perspective. The Widrow-Hoff LMS (least mean square) algorithm developed in 1959 forms the introduction to modern adaptive signal processing. This method uses a "primary" input which consists of the desired speech signal corrupted with noise and a second "reference" signal which is used to estimate the primary noise signal. By subtracting the adaptively filtered estimate of the noise, the desired speech signal is obtained. Recent developments in the field as they relate to noise cancellation are described. These developments include more computationally efficient algorithms as well as algorithms that exhibit improved learning performance. A second method for removing noise from speech, for use when no independent reference for the noise exists, is referred to as single channel noise suppression. Both adaptive and spectral subtraction techniques have been applied to this problem--often with the result of decreased speech intelligibility. Current techniques applied to this problem are described, including signal processing techniques that offer promise in the noise suppression application.

  6. FIPSER: Performance study of a readout concept with few digitization levels for fast signals

    Energy Technology Data Exchange (ETDEWEB)

    Limyansky, B., E-mail: brent.limyansky@gatech.edu [School of Physics and Center for Relativistic Astrophysics, Georgia Institute of Technology, Atlanta (United States); Reese, R., E-mail: bobbeyreese@gmail.com [School of Physics and Center for Relativistic Astrophysics, Georgia Institute of Technology, Atlanta (United States); Cressler, J.D. [School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta (United States); Otte, A.N.; Taboada, I. [School of Physics and Center for Relativistic Astrophysics, Georgia Institute of Technology, Atlanta (United States); Ulusoy, C. [Dept. of Electrical and Computer Engineering, Michigan State University, East Lansing (United States)

    2016-11-21

    We discuss the performance of a readout system, Fixed Pulse Shape Efficient Readout (FIPSER), to digitize signals from detectors with a fixed pulse shape. In this study we are mainly interested in the readout of fast photon detectors like photomultipliers or Silicon photomultipliers. But the concept can be equally applied to the digitization of other detector signals. FIPSER is based on the flash analog to digital converter (FADC) concept, but has the potential to lower costs and power consumption by using an order of magnitude fewer discrete voltage levels. Performance is bolstered by combining the discretized signal with the knowledge of the underlying pulse shape. Simulated FIPSER data was reconstructed with two independent methods. One using a maximum likelihood method and the other using a modified χ{sup 2} test. Both methods show that utilizing 12 discrete voltage levels with a sampling rate of 4 samples per full width half maximum (FWHM) of the pulse achieves an amplitude resolution that is better than the Poisson limit for photon-counting experiments. The time resolution achieved in this configuration ranges between 0.02 and 0.16 FWHM and depends on the pulse amplitude. In a situation where the waveform is composed of two consecutive pulses the pulses can be separated if they are at least 0.05–0.30 FWHM apart with an amplitude resolution that is better than 20%.

  7. The digital traces of bubbles: feedback cycles between socio-economic signals in the Bitcoin economy

    Science.gov (United States)

    Garcia, David; Tessone, Claudio J.; Mavrodiev, Pavlin; Perony, Nicolas

    2014-01-01

    What is the role of social interactions in the creation of price bubbles? Answering this question requires obtaining collective behavioural traces generated by the activity of a large number of actors. Digital currencies offer a unique possibility to measure socio-economic signals from such digital traces. Here, we focus on Bitcoin, the most popular cryptocurrency. Bitcoin has experienced periods of rapid increase in exchange rates (price) followed by sharp decline; we hypothesize that these fluctuations are largely driven by the interplay between different social phenomena. We thus quantify four socio-economic signals about Bitcoin from large datasets: price on online exchanges, volume of word-of-mouth communication in online social media, volume of information search and user base growth. By using vector autoregression, we identify two positive feedback loops that lead to price bubbles in the absence of exogenous stimuli: one driven by word of mouth, and the other by new Bitcoin adopters. We also observe that spikes in information search, presumably linked to external events, precede drastic price declines. Understanding the interplay between the socio-economic signals we measured can lead to applications beyond cryptocurrencies to other phenomena that leave digital footprints, such as online social network usage. PMID:25100315

  8. The digital traces of bubbles: feedback cycles between socio-economic signals in the Bitcoin economy.

    Science.gov (United States)

    Garcia, David; Tessone, Claudio J; Mavrodiev, Pavlin; Perony, Nicolas

    2014-10-06

    What is the role of social interactions in the creation of price bubbles? Answering this question requires obtaining collective behavioural traces generated by the activity of a large number of actors. Digital currencies offer a unique possibility to measure socio-economic signals from such digital traces. Here, we focus on Bitcoin, the most popular cryptocurrency. Bitcoin has experienced periods of rapid increase in exchange rates (price) followed by sharp decline; we hypothesize that these fluctuations are largely driven by the interplay between different social phenomena. We thus quantify four socio-economic signals about Bitcoin from large datasets: price on online exchanges, volume of word-of-mouth communication in online social media, volume of information search and user base growth. By using vector autoregression, we identify two positive feedback loops that lead to price bubbles in the absence of exogenous stimuli: one driven by word of mouth, and the other by new Bitcoin adopters. We also observe that spikes in information search, presumably linked to external events, precede drastic price declines. Understanding the interplay between the socio-economic signals we measured can lead to applications beyond cryptocurrencies to other phenomena that leave digital footprints, such as online social network usage. © 2014 The Author(s) Published by the Royal Society. All rights reserved.

  9. Digitally generated excitation and near-baseband quadrature detection of rapid scan EPR signals.

    Science.gov (United States)

    Tseitlin, Mark; Yu, Zhelin; Quine, Richard W; Rinard, George A; Eaton, Sandra S; Eaton, Gareth R

    2014-12-01

    The use of multiple synchronized outputs from an arbitrary waveform generator (AWG) provides the opportunity to perform EPR experiments differently than by conventional EPR. We report a method for reconstructing the quadrature EPR spectrum from periodic signals that are generated with sinusoidal magnetic field modulation such as continuous wave (CW), multiharmonic, or rapid scan experiments. The signal is down-converted to an intermediate frequency (IF) that is less than the field scan or field modulation frequency and then digitized in a single channel. This method permits use of a high-pass analog filter before digitization to remove the strong non-EPR signal at the IF, that might otherwise overwhelm the digitizer. The IF is the difference between two synchronized X-band outputs from a Tektronix AWG 70002A, one of which is for excitation and the other is the reference for down-conversion. To permit signal averaging, timing was selected to give an exact integer number of full cycles for each frequency. In the experiments reported here the IF was 5kHz and the scan frequency was 40kHz. To produce sinusoidal rapid scans with a scan frequency eight times IF, a third synchronized output generated a square wave that was converted to a sine wave. The timing of the data acquisition with a Bruker SpecJet II was synchronized by an external clock signal from the AWG. The baseband quadrature signal in the frequency domain was reconstructed. This approach has the advantages that (i) the non-EPR response at the carrier frequency is eliminated, (ii) both real and imaginary EPR signals are reconstructed from a single physical channel to produce an ideal quadrature signal, and (iii) signal bandwidth does not increase relative to baseband detection. Spectra were obtained by deconvolution of the reconstructed signals for solid BDPA (1,3-bisdiphenylene-2-phenylallyl) in air, 0.2mM trityl OX63 in water, 15 N perdeuterated tempone, and a nitroxide with a 0.5G partially-resolved proton

  10. Embedded Processor Laboratory

    Data.gov (United States)

    Federal Laboratory Consortium — The Embedded Processor Laboratory provides the means to design, develop, fabricate, and test embedded computers for missile guidance electronics systems in support...

  11. Multithreading in vector processors

    Science.gov (United States)

    Evangelinos, Constantinos; Kim, Changhoan; Nair, Ravi

    2018-01-16

    In one embodiment, a system includes a processor having a vector processing mode and a multithreading mode. The processor is configured to operate on one thread per cycle in the multithreading mode. The processor includes a program counter register having a plurality of program counters, and the program counter register is vectorized. Each program counter in the program counter register represents a distinct corresponding thread of a plurality of threads. The processor is configured to execute the plurality of threads by activating the plurality of program counters in a round robin cycle.

  12. Digital Receiver Phase Meter

    Science.gov (United States)

    Marcin, Martin; Abramovici, Alexander

    2008-01-01

    The software of a commercially available digital radio receiver has been modified to make the receiver function as a two-channel low-noise phase meter. This phase meter is a prototype in the continuing development of a phase meter for a system in which radiofrequency (RF) signals in the two channels would be outputs of a spaceborne heterodyne laser interferometer for detecting gravitational waves. The frequencies of the signals could include a common Doppler-shift component of as much as 15 MHz. The phase meter is required to measure the relative phases of the signals in the two channels at a sampling rate of 10 Hz at a root power spectral density measurements in laser metrology of moving bodies. To illustrate part of the principle of operation of the phase meter, the figure includes a simplified block diagram of a basic singlechannel digital receiver. The input RF signal is first fed to the input terminal of an analog-to-digital converter (ADC). To prevent aliasing errors in the ADC, the sampling rate must be at least twice the input signal frequency. The sampling rate of the ADC is governed by a sampling clock, which also drives a digital local oscillator (DLO), which is a direct digital frequency synthesizer. The DLO produces samples of sine and cosine signals at a programmed tuning frequency. The sine and cosine samples are mixed with (that is, multiplied by) the samples from the ADC, then low-pass filtered to obtain in-phase (I) and quadrature (Q) signal components. A digital signal processor (DSP) computes the ratio between the Q and I components, computes the phase of the RF signal (relative to that of the DLO signal) as the arctangent of this ratio, and then averages successive such phase values over a time interval specified by the user.

  13. Can persistence hunting signal male quality? A test considering digit ratio in endurance athletes.

    Directory of Open Access Journals (Sweden)

    Daniel Longman

    Full Text Available Various theories have been posed to explain the fitness payoffs of hunting success among hunter-gatherers. 'Having' theories refer to the acquisition of resources, and include the direct provisioning hypothesis. In contrast, 'getting' theories concern the signalling of male resourcefulness and other desirable traits, such as athleticism and intelligence, via hunting prowess. We investigated the association between androgenisation and endurance running ability as a potential signalling mechanism, whereby running prowess, vital for persistence hunting, might be used as a reliable signal of male reproductive fitness by females. Digit ratio (2D:4D was used as a proxy for prenatal androgenisation in 439 males and 103 females, while a half marathon race (21km, representing a distance/duration comparable with that of persistence hunting, was used to assess running ability. Digit ratio was significantly and positively correlated with half-marathon time in males (right hand: r = 0.45, p<0.001; left hand: r = 0.42, p<0.001 and females (right hand: r = 0.26, p<0.01; left hand: r = 0.23, p = 0.02. Sex-interaction analysis showed that this correlation was significantly stronger in males than females, suggesting that androgenisation may have experienced stronger selective pressure from endurance running in males. As digit ratio has previously been shown to predict reproductive success, our results are consistent with the hypothesis that endurance running ability may signal reproductive potential in males, through its association with prenatal androgen exposure. However, further work is required to establish whether and how females respond to this signalling for fitness.

  14. Low-Latency Digital Signal Processing for Feedback and Feedforward in Quantum Computing and Communication

    Science.gov (United States)

    Salathé, Yves; Kurpiers, Philipp; Karg, Thomas; Lang, Christian; Andersen, Christian Kraglund; Akin, Abdulkadir; Krinner, Sebastian; Eichler, Christopher; Wallraff, Andreas

    2018-03-01

    Quantum computing architectures rely on classical electronics for control and readout. Employing classical electronics in a feedback loop with the quantum system allows us to stabilize states, correct errors, and realize specific feedforward-based quantum computing and communication schemes such as deterministic quantum teleportation. These feedback and feedforward operations are required to be fast compared to the coherence time of the quantum system to minimize the probability of errors. We present a field-programmable-gate-array-based digital signal processing system capable of real-time quadrature demodulation, a determination of the qubit state, and a generation of state-dependent feedback trigger signals. The feedback trigger is generated with a latency of 110 ns with respect to the timing of the analog input signal. We characterize the performance of the system for an active qubit initialization protocol based on the dispersive readout of a superconducting qubit and discuss potential applications in feedback and feedforward algorithms.

  15. Detection of coherent beam-beam modes with digitized beam position monitor signals

    CERN Document Server

    Stancari, G.; White, S.M.

    2014-01-01

    A system for bunch-by-bunch detection of transverse proton and antiproton coherent oscillations in the Fermilab Tevatron collider is described. It is based on the signal from a single beam-position monitor located in a region of the ring with large amplitude functions. The signal is digitized over a large number of turns and Fourier-analyzed offline with a dedicated algorithm. To enhance the signal, band-limited noise is applied to the beam for about 1 s. This excitation does not adversely affect the circulating beams even at high luminosities. The device has a response time of a few seconds, a frequency resolution of $1.6\\times 10^{-5}$ in fractional tune, and it is sensitive to oscillation amplitudes of 60 nm. It complements Schottky detectors as a diagnostic tool for tunes, tune spreads, and beam-beam effects. Measurements of coherent mode spectra are presented and compared with models of beam-beam oscillations.

  16. Digital Carrier Modulation and Sampling Issues of Matrix Converters

    DEFF Research Database (Denmark)

    Loh, Poh Chiang; Rong, Runjie; Blaabjerg, Frede

    2009-01-01

    because of its inherent autosequencing process, and easier implementation using fast on-chip timers embedded in most modern digital signal processors. Motivated by these likely merits, which have previously been proven for dc-ac inverters, an investigation is now pursued here to develop appropriate...

  17. Digital signal processing for velocity measurements in dynamical material's behaviour studies

    International Nuclear Information System (INIS)

    Devlaminck, Julien; Luc, Jerome; Chanal, Pierre-Yves

    2014-01-01

    In this work, we describe different configurations of optical fiber interferometers (types Michelson and Mach-Zehnder) used to measure velocities during dynamical material's behaviour studies. We detail the algorithms of processing developed and optimized to improve the performance of these interferometers especially in terms of time and frequency resolutions. Three methods of analysis of interferometric signals were studied. For Michelson interferometers, the time-frequency analysis of signals by Short-Time Fourier Transform (STFT) is compared to a time-frequency analysis by Continuous Wavelet Transform (CWT). The results have shown that the CWT was more suitable than the STFT for signals with low signal-to-noise, and low velocity and high acceleration areas. For Mach- Zehnder interferometers, the measurement is carried out by analyzing the phase shift between three interferometric signals (Triature processing). These three methods of digital signal processing were evaluated, their measurement uncertainties estimated, and their restrictions or operational limitations specified from experimental results performed on a pulsed power machine. (authors)

  18. Design of 10Gbps optical encoder/decoder structure for FE-OCDMA system using SOA and opto-VLSI processors.

    Science.gov (United States)

    Aljada, Muhsen; Hwang, Seow; Alameh, Kamal

    2008-01-21

    In this paper we propose and experimentally demonstrate a reconfigurable 10Gbps frequency-encoded (1D) encoder/decoder structure for optical code division multiple access (OCDMA). The encoder is constructed using a single semiconductor optical amplifier (SOA) and 1D reflective Opto-VLSI processor. The SOA generates broadband amplified spontaneous emission that is dynamically sliced using digital phase holograms loaded onto the Opto-VLSI processor to generate 1D codewords. The selected wavelengths are injected back into the same SOA for amplifications. The decoder is constructed using single Opto-VLSI processor only. The encoded signal can successfully be retrieved at the decoder side only when the digital phase holograms of the encoder and the decoder are matched. The system performance is measured in terms of the auto-correlation and cross-correlation functions as well as the eye diagram.

  19. Digital Signal Processing Applications and Implementation for Accelerators Digital Notch Filter with Programmable Delay and Betatron Phase Adjustment for the PS, SPS and LHC Transverse Dampers

    CERN Document Server

    Rossi, V

    2002-01-01

    In the framework of the LHC project and the modifications of the SPS as its injector, I present the concept of global digital signal processing applied to a particle accelerator, using Field Programmable Gate Array (FPGA) technology. The approach of global digital synthesis implements in numerical form the architecture of a system, from the start up of a project and the very beginning of the signal flow. It takes into account both the known parameters and the future evolution, whenever possible. Due to the increased performance requirements of today's projects, the CAE design methodology becomes more and more necessary to handle successfully the added complexity and speed of modern electronic circuits. Simulation is performed both for behavioural analysis, to ensure conformity to functional requirements, and for time signal analysis (speed requirements). The digital notch filter with programmable delay for the SPS Transverse Damper is now fully operational with fixed target and LHC-type beams circulating in t...

  20. Data Acquisition and Digital Filtering for Infrasonic Records on Active Volcanoes

    Directory of Open Access Journals (Sweden)

    José Chilo

    2007-03-01

    Full Text Available This paper presents the design of a digital data acquisition system for volcanic infrasound records. The system includes four electret condenser element microphones, a QF4A512 programmable signal converter from Quickfilter Technologies and a MSP430 microcontroller from Texas Instruments. The signal output of every microphone is converted to digital via a 16-bit Analog to Digital Converter (ADC. To prevent errors in the conversion process, Anti-Aliasing Filters are employed prior to the ADC. Digital filtering is performed after the ADC using a Digital Signal Processor, which is implemented on the QF4A512. The four digital signals are summed to get only one signal. Data storing and digital wireless data transmission will be described in a future paper.

  1. Re-configurable digital receiver for optically envelope detected half cycle BPSK and MSK radio-on-fiber signals

    DEFF Research Database (Denmark)

    Guerrero Gonzalez, Neil; Prince, Kamau; Zibar, Darko

    2011-01-01

    We present the first known integration of a digital receiver into optically envelope detection radio-on-fiber systems. We also present a re-configurable scheme for two different types of optically envelope detected wireless signals while keeping the complexity of used optical components low. Our...... novel digital receiver consists of a digital signal processing unit integrating functions such as filtering, peak-powers detection, symbol synchronization and signal demodulation for optically envelope detected half-cycle binary phase-shift-keying and minimum-shift-keying signals. Furthermore, radio......-frequency signal down-conversion is not required in our proposed approach; simplifying evens more the optical receiver front-end. We experimentally demonstrate error-free optical transmission (bit-error rate corresponding to 10−3 related to FEC-compatible levels) for both 416.6 Mbit/s half-cycle binary phase...

  2. Integrated fuel processor development

    International Nuclear Information System (INIS)

    Ahmed, S.; Pereira, C.; Lee, S. H. D.; Krumpelt, M.

    2001-01-01

    The Department of Energy's Office of Advanced Automotive Technologies has been supporting the development of fuel-flexible fuel processors at Argonne National Laboratory. These fuel processors will enable fuel cell vehicles to operate on fuels available through the existing infrastructure. The constraints of on-board space and weight require that these fuel processors be designed to be compact and lightweight, while meeting the performance targets for efficiency and gas quality needed for the fuel cell. This paper discusses the performance of a prototype fuel processor that has been designed and fabricated to operate with liquid fuels, such as gasoline, ethanol, methanol, etc. Rated for a capacity of 10 kWe (one-fifth of that needed for a car), the prototype fuel processor integrates the unit operations (vaporization, heat exchange, etc.) and processes (reforming, water-gas shift, preferential oxidation reactions, etc.) necessary to produce the hydrogen-rich gas (reformate) that will fuel the polymer electrolyte fuel cell stacks. The fuel processor work is being complemented by analytical and fundamental research. With the ultimate objective of meeting on-board fuel processor goals, these studies include: modeling fuel cell systems to identify design and operating features; evaluating alternative fuel processing options; and developing appropriate catalysts and materials. Issues and outstanding challenges that need to be overcome in order to develop practical, on-board devices are discussed

  3. Improvement of the energy resolution via an optimized digital signal processing in GERDA Phase I

    International Nuclear Information System (INIS)

    Agostini, M.; Allardt, M.; Bakalyarov, A. M.; Balata, M.

    2015-01-01

    An optimized digital shaping filter has been developed for the Gerda experiment which searches for neutrinoless double beta decay in 76 Ge. The Gerda Phase I energy calibration data have been reprocessed and an average improvement of 0.3 keV in energy resolution (FWHM) corresponding to 10 % at the Q value for 0νββ decay in 76 Ge is obtained. This is possible thanks to the enhanced low-frequency noise rejection of this Zero Area Cusp (ZAC) signal shaping filter

  4. Improvement of the energy resolution via an optimized digital signal processing in GERDA Phase I

    Energy Technology Data Exchange (ETDEWEB)

    Agostini, M. [Physik Department and Excellence Cluster Universe, Technische Universität München, Munich (Germany); Allardt, M. [Institut für Kern- und Teilchenphysik, Technische Universität Dresden, Dresden (Germany); Bakalyarov, A. M. [National Research Center “Kurchatov Institute”, Moscow (Russian Federation); Balata, M. [INFN Laboratori Nazionali del Gran Sasso, LNGS, and Gran Sasso Science Institute, GSSI, Assergi (Italy); Collaboration: GERDA Collaboration; and others

    2015-06-09

    An optimized digital shaping filter has been developed for the Gerda experiment which searches for neutrinoless double beta decay in {sup 76}Ge. The Gerda Phase I energy calibration data have been reprocessed and an average improvement of 0.3 keV in energy resolution (FWHM) corresponding to 10 % at the Q value for 0νββ decay in {sup 76}Ge is obtained. This is possible thanks to the enhanced low-frequency noise rejection of this Zero Area Cusp (ZAC) signal shaping filter.

  5. Improvement of the energy resolution via an optimized digital signal processing in GERDA Phase I

    Energy Technology Data Exchange (ETDEWEB)

    Agostini, M.; Bode, T.; Budjas, D.; Janicsko Csathy, J.; Lazzaro, A.; Schoenert, S. [Technische Universitaet Muenchen, Physik Department and Excellence Cluster Universe, Munich (Germany); Allardt, M.; Domula, A.; Lehnert, B.; Schneider, B.; Wester, T.; Wilsenach, H.; Zuber, K. [Technische Universitaet Dresden, Institut fuer Kern- und Teilchenphysik, Dresden (Germany); Bakalyarov, A.M.; Belyaev, S.T.; Lebedev, V.I.; Zhukov, S.V. [National Research Center ' ' Kurchatov Institute' ' , Moscow (Russian Federation); Balata, M.; D' Andrea, V.; Di Vacri, A.; Junker, M.; Laubenstein, M.; Macolino, C.; Zavarise, P. [LNGS, Assergi (Italy); Barabanov, I.; Bezrukov, L.; Doroshkevich, E.; Fedorova, O.; Gurentsov, V.; Kazalov, V.; Kuzminov, V.V.; Lubsandorzhiev, B.; Moseev, P.; Selivanenko, O.; Veresnikova, A.; Yanovich, E. [Institute for Nuclear Research of the Russian Academy of Sciences, Moscow (Russian Federation); Barros, N. [Technische Universitaet Dresden, Institut fuer Kern- und Teilchenphysik, Dresden (Germany); University of Pennsylvania, Department of Physics and Astronomy, Philadelphia, PA (United States); Baudis, L.; Benato, G.; Walter, M. [Physik Institut der Universitaet Zuerich, Zurich (Switzerland); Bauer, C.; Heisel, M.; Heusser, G.; Hofmann, W.; Kihm, T.; Kirsch, A.; Knoepfle, K.T.; Lindner, M.; Maneschg, W.; Salathe, M.; Schreiner, J.; Schwingenheuer, B.; Simgen, H.; Smolnikov, A.; Stepaniuk, M.; Wagner, V.; Wegmann, A. [Max-Planck-Institut fuer Kernphysik, Heidelberg (Germany); Becerici-Schmidt, N.; Caldwell, A.; Liao, H.Y.; Majorovits, B.; Palioselitis, D.; Schulz, O.; Vanhoefer, L. [Max-Planck-Institut fuer Physik, Munich (Germany); Bellotti, E. [Universita Milano Bicocca, Dipartimento di Fisica, Milan (Italy); INFN Milano Bicocca, Milan (Italy); Belogurov, S.; Kornoukhov, V.N. [Institute for Nuclear Research of the Russian Academy of Sciences, Moscow (Russian Federation); Institute for Theoretical and Experimental Physics, Moscow (Russian Federation); Bettini, A.; Brugnera, R.; Garfagnini, A.; Hemmer, S.; Medinaceli, E.; Sada, C.; Sturm, K. von [Universita di Padova, Dipartimento di Fisica e Astronomia, Padua (Italy); INFN Padova, Padua (Italy); Borowicz, D. [Jagiellonian University, Institute of Physics, Krakow (Poland); Joint Institute for Nuclear Research, Dubna (Russian Federation); Brudanin, V.; Egorov, V.; Kochetov, O.; Nemchenok, I.; Rumyantseva, N.; Zhitnikov, I.; Zinatulina, D. [Joint Institute for Nuclear Research, Dubna (Russian Federation); Cattadori, C. [INFN Milano Bicocca, Milan (Italy); Chernogorov, A.; Demidova, E.V.; Kirpichnikov, I.V.; Vasenko, A.A. [Institute for Theoretical and Experimental Physics, Moscow (Russian Federation); Falkenstein, R.; Freund, K.; Grabmayr, P.; Hegai, A.; Jochum, J.; Schmitt, C.; Schuetz, A.K. [Eberhard Karls Universitaet Tuebingen, Physikalisches Institut, Tuebingen (Germany); Frodyma, N.; Misiaszek, M.; Panas, K.; Pelczar, K.; Wojcik, M.; Zuzel, G. [Jagiellonian University, Institute of Physics, Krakow (Poland); Gangapshev, A. [Max-Planck-Institut fuer Kernphysik, Heidelberg (Germany); Institute for Nuclear Research of the Russian Academy of Sciences, Moscow (Russian Federation); Gusev, K. [Joint Institute for Nuclear Research, Dubna (Russian Federation); National Research Center ' ' Kurchatov Institute' ' , Moscow (Russian Federation); Technische Universitaet Muenchen, Physik Department and Excellence Cluster Universe, Munich (Germany); Hult, M.; Lutter, G. [Institute for Reference Materials and Measurements, Geel (Belgium); Inzhechik, L.V. [Institute for Nuclear Research of the Russian Academy of Sciences, Moscow (Russian Federation); Moscow Institute of Physics and Technology, Moscow (Russian Federation); Klimenko, A. [Joint Institute for Nuclear Research, Dubna (Russian Federation); Max-Planck-Institut fuer Kernphysik, Heidelberg (Germany); International University for Nature, Society and Man ' ' Dubna' ' , Dubna (Russian Federation); Lippi, I.; Stanco, L.; Ur, C.A. [INFN Padova, Padua (Italy); Lubashevskiy, A. [Joint Institute for Nuclear Research, Dubna (Russian Federation); Max-Planck-Institut fuer Kernphysik, Heidelberg (Germany); Pandola, L. [INFN Laboratori Nazionali del Sud, Catania (Italy); Pullia, A.; Riboldi, S. [Universita degli Studi di Milano, Dipartimento di Fisica, Milan (Italy); INFN, Milano (Italy); Shirchenko, M. [Joint Institute for Nuclear Research, Dubna (Russian Federation); National Research Center ' ' Kurchatov Institute' ' , Moscow (Russian Federation); Collaboration: GERDA Collaboration

    2015-06-15

    An optimized digital shaping filter has been developed for the Gerda experiment which searches for neutrinoless double beta decay in {sup 76}Ge. The GERDA Phase I energy calibration data have been reprocessed and an average improvement of 0.3 keV in energy resolution (FWHM) corresponding to 10% at the Q value for 0νββ decay in {sup 76}Ge is obtained. This is possible thanks to the enhanced low-frequency noise rejection of this Zero Area Cusp (ZAC) signal shaping filter. (orig.)

  6. Detection of interference phase by digital computation of quadrature signals in homodyne laser interferometry

    Czech Academy of Sciences Publication Activity Database

    Řeřucha, Šimon; Buchta, Zdeněk; Šarbort, Martin; Lazar, Josef; Číp, Ondřej

    2012-01-01

    Roč. 12, č. 10 (2012), s. 14095-14112 ISSN 1424-8220 R&D Projects: GA ČR GAP102/10/1813; GA MŠk ED0017/01/01; GA MPO FR-TI2/705; GA MPO FR-TI1/241; GA MŠk EE2.3.30.0054 Institutional support: RVO:68081731 Keywords : digital signal processing * homodyne detection * laser interferometry * optical metrology Subject RIV: BH - Optics, Masers, Lasers Impact factor: 1.953, year: 2012

  7. Seismic qualification using digital signal processing/modal testing and finite element techniques

    International Nuclear Information System (INIS)

    Steedman, J.B.; Edelstein, A.

    1983-01-01

    A systematic procedure in which digital signal processing, modal testing and finite element techniques can be used to seismically qualify Class IE equipment for use in nuclear generating stations is presented. A new method was also developed in which measured transmissibility functions and Fourier transformation techniques were combined to compute instrument response spectra. As an illustrative example of the qualification method, the paper follows the qualification of a safety related Class IE Heating, Ventilating, and Air Conditioning (HVAC) Control Panel subjected to both seismic and hydrodynamic loading conditions

  8. Digital system for acquiring signals from photodiode arrays. No. Program Element 2317-08-03

    International Nuclear Information System (INIS)

    Le Guen, M.; Meric, B.

    1981-01-01

    A model of circuit allowing the digitization and the memorization of signals coming from linear arrays of photodiodes have been realized. The authors first recall the organization and present in the second part some test results on experimental sites. The model consists of 1 - an acquisition, memorization and visualization card (AMV card) for the data from RETICON 121 photodiode strips, 2 - a series transfer card for the memorized data, and 3 - an interface and multiplexing card associated with a system using a 6800 microprocessor allowing the management of eight acquisition cards [fr

  9. POSITION CONTROL OF BRUSHLESS DC MOTOR BASED ON DIGITAL SIGNAL PROCESSING

    Directory of Open Access Journals (Sweden)

    Çetin GENÇER

    2006-01-01

    Full Text Available Brushless DC Motors (BLDC have been used widely high performance control systems which are depended on to development of power electronic and control technology. In these motors to fed commutated supply, the control of position without oscilation has been required. In this study, position control of BLDC with digital signal processing has been implemented by a proportional-derivative (PD controller because of its simple structure. It has been seen that the controller which is proposed from simulation and experimental studies, has a quick dynamic responce with nonoscillation.

  10. Experimental verification of preset time count rate meters based on adaptive digital signal processing algorithms

    Directory of Open Access Journals (Sweden)

    Žigić Aleksandar D.

    2005-01-01

    Full Text Available Experimental verifications of two optimized adaptive digital signal processing algorithms implemented in two pre set time count rate meters were per formed ac cording to appropriate standards. The random pulse generator realized using a personal computer, was used as an artificial radiation source for preliminary system tests and performance evaluations of the pro posed algorithms. Then measurement results for background radiation levels were obtained. Finally, measurements with a natural radiation source radioisotope 90Sr-90Y, were carried out. Measurement results, con ducted without and with radio isotopes for the specified errors of 10% and 5% showed to agree well with theoretical predictions.

  11. Fast realization of nonrecursive digital filters with limits on signal delay

    Science.gov (United States)

    Titov, M. A.; Bondarenko, N. N.

    1983-07-01

    Attention is given to the problem of achieving a fast realization of nonrecursive digital filters with the aim of reducing signal delay. It is shown that a realization wherein the impulse characteristic of the filter is divided into blocks satisfies the delay requirements and is almost as economical in terms of the number of multiplications as conventional fast convolution. In addition, the block method leads to a reduction in the needed size of the memory and in the number of additions; the short-convolution procedure is substantially simplified. Finally, the block method facilitates the paralleling of computations owing to the simple transfers between subfilters.

  12. Higher order spectra and their use in digital communication signal estimation

    Science.gov (United States)

    Yayci, Cihat

    1995-03-01

    This thesis compared the detection ability of the spectrogram, the 1-1/2D instantaneous power spectrum (l-1/2D(sub ips)), the bispectrum, and outer product (dyadic) representation for digitally modulated signals corrupted by additive white Gaussian noise. Four detection schemes were tried on noise free BPSK, QPSK, FSK, and OOK signals using different transform lengths. After determining the optimum transform length, each test signal is corrupted by additive white Gaussian noise. Different SNR levels were used to determine the lowest SNR level at which the message or the modulation type could be extracted. The optimal transform length was found to be the symbol duration when processing BPSK, OOK, and FSK via the spectrogram, the 1-1/2D(sub ips) or the bispectrum method. The best transform size for QPSK was half of the symbol length. For the outer product (dyadic) spectral representation, the best transform size was four times larger than the symbol length. For all processing techniques, with the exception of the other product representation, the minimum detectable SNR is about 15 dB for BPSK, FSK, and OOK signals and about 20 dB for QPSK signals. For the outer product spectral method, these values tend to be about 10 dB lower.

  13. Software-defined reconfigurable microwave photonics processor.

    Science.gov (United States)

    Pérez, Daniel; Gasulla, Ivana; Capmany, José

    2015-06-01

    We propose, for the first time to our knowledge, a software-defined reconfigurable microwave photonics signal processor architecture that can be integrated on a chip and is capable of performing all the main functionalities by suitable programming of its control signals. The basic configuration is presented and a thorough end-to-end design model derived that accounts for the performance of the overall processor taking into consideration the impact and interdependencies of both its photonic and RF parts. We demonstrate the model versatility by applying it to several relevant application examples.

  14. THOR Fields and Wave Processor - FWP

    Science.gov (United States)

    Soucek, Jan; Rothkaehl, Hanna; Ahlen, Lennart; Balikhin, Michael; Carr, Christopher; Dekkali, Moustapha; Khotyaintsev, Yuri; Lan, Radek; Magnes, Werner; Morawski, Marek; Nakamura, Rumi; Uhlir, Ludek; Yearby, Keith; Winkler, Marek; Zaslavsky, Arnaud

    2017-04-01

    If selected, Turbulence Heating ObserveR (THOR) will become the first spacecraft mission dedicated to the study of plasma turbulence. The Fields and Waves Processor (FWP) is an integrated electronics unit for all electromagnetic field measurements performed by THOR. FWP will interface with all THOR fields sensors: electric field antennas of the EFI instrument, the MAG fluxgate magnetometer, and search-coil magnetometer (SCM), and perform signal digitization and on-board data processing. FWP box will house multiple data acquisition sub-units and signal analyzers all sharing a common power supply and data processing unit and thus a single data and power interface to the spacecraft. Integrating all the electromagnetic field measurements in a single unit will improve the consistency of field measurement and accuracy of time synchronization. The scientific value of highly sensitive electric and magnetic field measurements in space has been demonstrated by Cluster (among other spacecraft) and THOR instrumentation will further improve on this heritage. Large dynamic range of the instruments will be complemented by a thorough electromagnetic cleanliness program, which will prevent perturbation of field measurements by interference from payload and platform subsystems. Taking advantage of the capabilities of modern electronics and the large telemetry bandwidth of THOR, FWP will provide multi-component electromagnetic field waveforms and spectral data products at a high time resolution. Fully synchronized sampling of many signals will allow to resolve wave phase information and estimate wavelength via interferometric correlations between EFI probes. FWP will also implement a plasma resonance sounder and a digital plasma quasi-thermal noise analyzer designed to provide high cadence measurements of plasma density and temperature complementary to data from particle instruments. FWP will rapidly transmit information about magnetic field vector and spacecraft potential to the

  15. A 96-channel FPGA-based Time-to-Digital Converter (TDC) and fast trigger processor module with multi-hit capability and pipeline

    International Nuclear Information System (INIS)

    Bogdan, Mircea; Frisch, Henry; Heintz, Mary; Paramonov, Alexander; Sanders, Harold; Chappa, Steve; DeMaat, Robert; Klein, Rod; Miao, Ting; Wilson, Peter; Phillips, Thomas J.

    2005-01-01

    We describe an field-programmable gate arrays based (FPGA), 96-channel, Time-to-Digital converter (TDC) and trigger logic board intended for use with the Central Outer Tracker (COT) [T. Affolder et al., Nucl. Instr. and Meth. A 526 (2004) 249] in the CDF Experiment [The CDF-II detector is described in the CDF Technical Design Report (TDR), FERMILAB-Pub-96/390-E. The TDC described here is intended as a further upgrade beyond that described in the TDR] at the Fermilab Tevatron. The COT system is digitized and read out by 315 TDC cards, each serving 96 wires of the chamber. The TDC is physically configured as a 9U VME card. The functionality is almost entirely programmed in firmware in two Altera Stratix FPGAs. The special capabilities of this device are the availability of 840MHz LVDS inputs, multiple phase-locked clock modules, and abundant memory. The TDC system operates with an input resolution of 1.2ns, a minimum input pulse width of 4.8ns and a minimum separation of 4.8ns between pulses. Each input can accept up to 7 hits per collision. The time-to-digital conversion is done by first sampling each of the 96 inputs in 1.2-ns bins and filling a circular memory; the memory addresses of logical transitions (edges) in the input data are then translated into the time of arrival and width of the COT pulses. Memory pipelines with a depth of 5.5μs allow deadtime-less operation in the first-level trigger; the data are multiple-buffered to diminish deadtime in the second-level trigger. The complete process of edge-detection and filling of buffers for readout takes 12μs. The TDC VME interface allows a 64-bit Chain Block Transfer of multiple boards in a crate with transfer-rates up to 47Mbytes/s. The TDC module also produces prompt trigger data every Tevatron crossing via a deadtimeless fast logic path that can be easily reprogrammed. The trigger bits are clocked onto the P3 VME backplane connector with a 22-ns clock for transmission to the trigger. The full TDC design and

  16. Digital signal processing and spectral analysis for scientists concepts and applications

    CERN Document Server

    Alessio, Silvia Maria

    2016-01-01

    This book covers the basics of processing and spectral analysis of monovariate discrete-time signals. The approach is practical, the aim being to acquaint the reader with the indications for and drawbacks of the various methods and to highlight possible misuses. The book is rich in original ideas, visualized in new and illuminating ways, and is structured so that parts can be skipped without loss of continuity. Many examples are included, based on synthetic data and real measurements from the fields of physics, biology, medicine, macroeconomics etc., and a complete set of MATLAB exercises requiring no previous experience of programming is provided. Prior advanced mathematical skills are not needed in order to understand the contents: a good command of basic mathematical analysis is sufficient. Where more advanced mathematical tools are necessary, they are included in an Appendix and presented in an easy-to-follow way. With this book, digital signal processing leaves the domain of engineering to address the ne...

  17. Advanced digital signal processing for short haul optical fiber transmission beyond 100G

    Science.gov (United States)

    Kikuchi, Nobuhiko

    2017-01-01

    Significant increase of intra and inter data center traffic has been expected by the rapid spread of various network applications like SNS, IoT, mobile and cloud computing, and the needs for ultra-high speed and cost-effective short- to medium-reach optical fiber links beyond 100-Gbit/s is becoming larger and larger. Such high-speed links typically use multilevel modulation to lower signaling speed, which in turn face serious challenges in limited loss budget and waveform distortion tolerance. One of the promising techniques to overcome them is the use of advanced digital signal processing (DSP) and we review various DSP applications for short-to-medium reach applications.

  18. Digital Signal Processing Based on a Clustering Algorithm for Ir/Au TES Microcalorimeter

    Science.gov (United States)

    Zen, N.; Kunieda, Y.; Takahashi, H.; Hiramoto, K.; Nakazawa, M.; Fukuda, D.; Ukibe, M.; Ohkubo, M.

    2006-02-01

    In recent years, cryogenic microcalorimeters using their superconducting transition edge have been under development for possible application to the research for astronomical X-ray observations. To improve the energy resolution of superconducting transition edge sensors (TES), several correction methods have been developed. Among them, a clustering method based on digital signal processing has recently been proposed. In this paper, we applied the clustering method to Ir/Au bilayer TES. This method resulted in almost a 10% improvement in the energy resolution. Conversely, from the point of view of imaging X-ray spectroscopy, we applied the clustering method to pixellated Ir/Au-TES devices. We will thus show how a clustering method which sorts signals by their shapes is also useful for position identification

  19. Digital Signal Processing and Generation for a DC Current Transformer for Particle Accelerators

    Energy Technology Data Exchange (ETDEWEB)

    Zorzetti, Silvia [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)

    2013-01-01

    The thesis topic, digital signal processing and generation for a DC current transformer, focuses on the most fundamental beam diagnostics in the field of particle accelerators, the measurement of the beam intensity, or beam current. The technology of a DC current transformer (DCCT) is well known, and used in many areas, including particle accelerator beam instrumentation, as non-invasive (shunt-free) method to monitor the DC current in a conducting wire, or in our case, the current of charged particles travelling inside an evacuated metal pipe. So far, custom and commercial DCCTs are entirely based on analog technologies and signal processing, which makes them inflexible, sensitive to component aging, and difficult to maintain and calibrate.

  20. Logistic Fuel Processor Development

    National Research Council Canada - National Science Library

    Salavani, Reza

    2004-01-01

    ... to light gases then steam reform the light gases into hydrogen rich stream. This report documents the efforts in developing a fuel processor capable of providing hydrogen to a 3kW fuel cell stack...

  1. 3081/E processor

    International Nuclear Information System (INIS)

    Kunz, P.F.; Gravina, M.; Oxoby, G.

    1984-04-01

    The 3081/E project was formed to prepare a much improved IBM mainframe emulator for the future. Its design is based on a large amount of experience in using the 168/E processor to increase available CPU power in both online and offline environments. The processor will be at least equal to the execution speed of a 370/168 and up to 1.5 times faster for heavy floating point code. A single processor will thus be at least four times more powerful than the VAX 11/780, and five processors on a system would equal at least the performance of the IBM 3081K. With its large memory space and simple but flexible high speed interface, the 3081/E is well suited for the online and offline needs of high energy physics in the future

  2. Logistic Fuel Processor Development

    National Research Council Canada - National Science Library

    Salavani, Reza

    2004-01-01

    The Air Base Technologies Division of the Air Force Research Laboratory has developed a logistic fuel processor that removes the sulfur content of the fuel and in the process converts logistic fuel...

  3. An electromagnetic signals monitoring and analysis wireless platform employing personal digital assistants and pattern analysis techniques

    Science.gov (United States)

    Ninos, K.; Georgiadis, P.; Cavouras, D.; Nomicos, C.

    2010-05-01

    This study presents the design and development of a mobile wireless platform to be used for monitoring and analysis of seismic events and related electromagnetic (EM) signals, employing Personal Digital Assistants (PDAs). A prototype custom-developed application was deployed on a 3G enabled PDA that could connect to the FTP server of the Institute of Geodynamics of the National Observatory of Athens and receive and display EM signals at 4 receiver frequencies (3 KHz (E-W, N-S), 10 KHz (E-W, N-S), 41 MHz and 46 MHz). Signals may originate from any one of the 16 field-stations located around the Greek territory. Employing continuous recordings of EM signals gathered from January 2003 till December 2007, a Support Vector Machines (SVM)-based classification system was designed to distinguish EM precursor signals within noisy background. EM-signals corresponding to recordings preceding major seismic events (Ms≥5R) were segmented, by an experienced scientist, and five features (mean, variance, skewness, kurtosis, and a wavelet based feature), derived from the EM-signals were calculated. These features were used to train the SVM-based classification scheme. The performance of the system was evaluated by the exhaustive search and leave-one-out methods giving 87.2% overall classification accuracy, in correctly identifying EM precursor signals within noisy background employing all calculated features. Due to the insufficient processing power of the PDAs, this task was performed on a typical desktop computer. This optimal trained context of the SVM classifier was then integrated in the PDA based application rendering the platform capable to discriminate between EM precursor signals and noise. System's efficiency was evaluated by an expert who reviewed 1/ multiple EM-signals, up to 18 days prior to corresponding past seismic events, and 2/ the possible EM-activity of a specific region employing the trained SVM classifier. Additionally, the proposed architecture can form a

  4. Digital signal processing applied to crystal identification in Positron Emission Tomography dedicated to small animals

    International Nuclear Information System (INIS)

    Fontaine, Rejean; Viscogliosi, Nicolas; Semmaoui, Hicham; Belanger, Francois; Lemieux, Francois; Tetrault, Marc-Andre; Michaud, Jean-Baptiste; Berard, Philippe; Cadorette, Jules; Pepin, Catherine M.; Lecomte, Roger

    2007-01-01

    The recent introduction of all-digital electronic architecture in Positron Emission Tomography (PET) scanners, enables new paradigms to be explored for extracting relevant information from the detector signals, such as energy, time and crystal identification. The LabPET TM small animal scanner, which implements free-running 45-MHz sampling directly at the output of the charge sensitive preamplifiers, provides an excellent platform to test such advanced digital algorithms. A real-time identification method, based on an Auto-Regressive Moving-Average (ARMA) scheme, was tested for discriminating between LYSO (t r ∼40 ns) and LGSO (t r ∼65 ns) scintillators in phoswich detectors, coupled to a single Avalanche Photodiode (APD). Even with a low energy threshold of 250 keV applied individually, error rates 10%, typically with conventional analog pulse shape discrimination techniques. Such digital crystal identification techniques can be readily implemented with phoswich detectors for improving spatial resolution in PET, either by increasing crystal pixellization or by mitigating parallax errors through depth-of-interaction determination. It also allows to reduce the event rate presented to the real-time coincidence engine by applying a low energy limit at the crystal granularity and rejecting more Compton photons

  5. Digital signal processing applied to crystal identification in Positron Emission Tomography dedicated to small animals

    Energy Technology Data Exchange (ETDEWEB)

    Fontaine, Rejean [Department of Electrical and Computer Engineering, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada)]. E-mail: Rejean.Fontaine@Usherbrooke.ca; Viscogliosi, Nicolas [Department of Electrical and Computer Engineering, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Semmaoui, Hicham [Department of Electrical and Computer Engineering, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Belanger, Francois [Department of Electrical and Computer Engineering, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Lemieux, Francois [Department of Electrical and Computer Engineering, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Tetrault, Marc-Andre [Department of Electrical and Computer Engineering, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Michaud, Jean-Baptiste [Department of Electrical and Computer Engineering, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Berard, Philippe [Department of Nuclear Medicine and Radiobiology, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Cadorette, Jules [Department of Nuclear Medicine and Radiobiology, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Pepin, Catherine M. [Department of Nuclear Medicine and Radiobiology, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada); Lecomte, Roger [Department of Nuclear Medicine and Radiobiology, Universite de Sherbrooke, 2500 Boul. Universite, Sherbrooke, Que., J1 K 2R1 (Canada)

    2007-02-01

    The recent introduction of all-digital electronic architecture in Positron Emission Tomography (PET) scanners, enables new paradigms to be explored for extracting relevant information from the detector signals, such as energy, time and crystal identification. The LabPET{sup TM} small animal scanner, which implements free-running 45-MHz sampling directly at the output of the charge sensitive preamplifiers, provides an excellent platform to test such advanced digital algorithms. A real-time identification method, based on an Auto-Regressive Moving-Average (ARMA) scheme, was tested for discriminating between LYSO (t{sub r}{approx}40 ns) and LGSO (t{sub r}{approx}65 ns) scintillators in phoswich detectors, coupled to a single Avalanche Photodiode (APD). Even with a low energy threshold of 250 keV applied individually, error rates<4% can be achieved, as compared to >10%, typically with conventional analog pulse shape discrimination techniques. Such digital crystal identification techniques can be readily implemented with phoswich detectors for improving spatial resolution in PET, either by increasing crystal pixellization or by mitigating parallax errors through depth-of-interaction determination. It also allows to reduce the event rate presented to the real-time coincidence engine by applying a low energy limit at the crystal granularity and rejecting more Compton photons.

  6. Control structures for high speed processors

    Science.gov (United States)

    Maki, G. K.; Mankin, R.; Owsley, P. A.; Kim, G. M.

    1982-01-01

    A special processor was designed to function as a Reed Solomon decoder with throughput data rate in the Mhz range. This data rate is significantly greater than is possible with conventional digital architectures. To achieve this rate, the processor design includes sequential, pipelined, distributed, and parallel processing. The processor was designed using a high level language register transfer language. The RTL can be used to describe how the different processes are implemented by the hardware. One problem of special interest was the development of dependent processes which are analogous to software subroutines. For greater flexibility, the RTL control structure was implemented in ROM. The special purpose hardware required approximately 1000 SSI and MSI components. The data rate throughput is 2.5 megabits/second. This data rate is achieved through the use of pipelined and distributed processing. This data rate can be compared with 800 kilobits/second in a recently proposed very large scale integration design of a Reed Solomon encoder.

  7. Embedded processor extensions for image processing

    Science.gov (United States)

    Thevenin, Mathieu; Paindavoine, Michel; Letellier, Laurent; Heyrman, Barthélémy

    2008-04-01

    The advent of camera phones marks a new phase in embedded camera sales. By late 2009, the total number of camera phones will exceed that of both conventional and digital cameras shipped since the invention of photography. Use in mobile phones of applications like visiophony, matrix code readers and biometrics requires a high degree of component flexibility that image processors (IPs) have not, to date, been able to provide. For all these reasons, programmable processor solutions have become essential. This paper presents several techniques geared to speeding up image processors. It demonstrates that a gain of twice is possible for the complete image acquisition chain and the enhancement pipeline downstream of the video sensor. Such results confirm the potential of these computing systems for supporting future applications.

  8. Array processor architecture

    Science.gov (United States)

    Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

    1983-01-01

    A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.

  9. Digitization

    DEFF Research Database (Denmark)

    Finnemann, Niels Ole

    2014-01-01

    what a concept of digital media might add to the understanding of processes of mediatization and what the concept of mediatization might add to the understanding of digital media. It is argued that digital media open an array of new trajectories in human communication, trajectories which were...

  10. Front-end data reduction of diagnostic signals by real-time digital filtering

    International Nuclear Information System (INIS)

    Zasche, D.; Fahrbach, H.U.; Harmeyer, E.

    1985-01-01

    Diagnostic measurements on a fusion plasma with high resolution in space, time and signal amplitude involve handling large amounts of data. In the design of the soft-X-ray pinhole camera diagnostic for JET (100 detectors in 2 cameras) a new approach to this problem was found. The analogue-to-digital conversion is performed continuously at the highest sample rate of 200 kHz, lower sample rates (10 kHz, 1 kHz, 100 Hz) are obtained by real-time digital filters which calculate weighted averages over consecutive samples and are undersampled at their outputs to reduce the data rate. At any time, the signals from all detectors are available at all possible data rates in ring buffers. Thus the appropriate data rate can always be recorded on demand (preprogrammed or triggered by the experiment). With this system a reduction of the raw data by a factor of up to 2000 (typically 200) is possible without severe loss of information

  11. A SystemC-Based Design Methodology for Digital Signal Processing Systems

    Directory of Open Access Journals (Sweden)

    Christian Haubelt

    2007-03-01

    Full Text Available Digital signal processing algorithms are of big importance in many embedded systems. Due to complexity reasons and due to the restrictions imposed on the implementations, new design methodologies are needed. In this paper, we present a SystemC-based solution supporting automatic design space exploration, automatic performance evaluation, as well as automatic system generation for mixed hardware/software solutions mapped onto FPGA-based platforms. Our proposed hardware/software codesign approach is based on a SystemC-based library called SysteMoC that permits the expression of different models of computation well known in the domain of digital signal processing. It combines the advantages of executability and analyzability of many important models of computation that can be expressed in SysteMoC. We will use the example of an MPEG-4 decoder throughout this paper to introduce our novel methodology. Results from a five-dimensional design space exploration and from automatically mapping parts of the MPEG-4 decoder onto a Xilinx FPGA platform will demonstrate the effectiveness of our approach.

  12. A mutation in Ihh that causes digit abnormalities alters its signalling capacity and range.

    Science.gov (United States)

    Gao, Bo; Hu, Jianxin; Stricker, Sigmar; Cheung, Martin; Ma, Gang; Law, Kit Fong; Witte, Florian; Briscoe, James; Mundlos, Stefan; He, Lin; Cheah, Kathryn S E; Chan, Danny

    2009-04-30

    Brachydactyly type A1 (BDA1) was the first recorded disorder of the autosomal dominant Mendelian trait in humans, characterized by shortened or absent middle phalanges in digits. It is associated with heterozygous missense mutations in indian hedgehog (IHH). Hedgehog proteins are important morphogens for a wide range of developmental processes. The capacity and range of signalling is thought to be regulated by its interaction with the receptor PTCH1 and antagonist HIP1. Here we show that a BDA1 mutation (E95K) in Ihh impairs the interaction of IHH with PTCH1 and HIP1. This is consistent with a recent paper showing that BDA1 mutations cluster in a calcium-binding site essential for the interaction with its receptor and cell-surface partners. Furthermore, we show that in a mouse model that recapitulates the E95K mutation, there is a change in the potency and range of signalling. The mice have digit abnormalities consistent with the human disorder.

  13. The IceCube data acquisition system: Signal capture, digitization,and timestamping

    Energy Technology Data Exchange (ETDEWEB)

    The IceCube Collaboration; Matis, Howard

    2009-03-02

    IceCube is a km-scale neutrino observatory under construction at the South Pole with sensors both in the deep ice (InIce) and on the surface (IceTop). The sensors, called Digital Optical Modules (DOMs), detect, digitize and timestamp the signals from optical Cherenkov-radiation photons. The DOM Main Board (MB) data acquisition subsystem is connected to the central DAQ in the IceCube Laboratory (ICL) by a single twisted copper wire-pair and transmits packetized data on demand. Time calibration ismaintained throughout the array by regular transmission to the DOMs of precisely timed analog signals, synchronized to a central GPS-disciplined clock. The design goals and consequent features, functional capabilities, and initial performance of the DOM MB, and the operation of a combined array of DOMs as a system, are described here. Experience with the first InIce strings and the IceTop stations indicates that the system design and performance goals have been achieved.

  14. Combination of digital signal processing methods towards an improved analysis algorithm for structural health monitoring.

    Science.gov (United States)

    Pentaris, Fragkiskos P.; Makris, John P.

    2013-04-01

    In Structural Health Monitoring (SHM) is of great importance to reveal valuable information from the recorded SHM data that could be used to predict or indicate structural fault or damage in a building. In this work a combination of digital signal processing methods, namely FFT along with Wavelet Transform is applied, together with a proposed algorithm to study frequency dispersion, in order to depict non-linear characteristics of SHM data collected in two university buildings under natural or anthropogenic excitation. The selected buildings are of great importance from civil protection point of view, as there are the premises of a public higher education institute, undergoing high use, stress, visit from academic staff and students. The SHM data are collected from two neighboring buildings that have different age (4 and 18 years old respectively). Proposed digital signal processing methods are applied to the data, presenting a comparison of the structural behavior of both buildings in response to seismic activity, weather conditions and man-made activity. Acknowledgments This work was supported in part by the Archimedes III Program of the Ministry of Education of Greece, through the Operational Program "Educational and Lifelong Learning", in the framework of the project entitled «Interdisciplinary Multi-Scale Research of Earthquake Physics and Seismotectonics at the front of the Hellenic Arc (IMPACT-ARC) » and is co-financed by the European Union (European Social Fund) and Greek National Fund.

  15. Dynamic strain analysis of structures employing digital signal processing, storage and display

    Energy Technology Data Exchange (ETDEWEB)

    Patwardhan, P K; Misra, V M; Kumar, Surendra

    1975-01-01

    A multi-channel digital technique has been adopted for analysing wave patterns of stresses and strains in structures, particularly under dynamic conditions. This technique provides adequate signal to noise discrimination and high sensitivity for very small (few milli-volts) and slow varying signals (few Hz to 100 Hz.), and A-D conversion accompined by live display during the course of data gathering and computer compatible output. This system also provides fast response because of inherent 50 MHz digitising speed and a large dynamic range of 1024 discrete signal steps. The signals can be suitably fed to the A-D converter (50 MHz) or can be analysed employing frequency modulation techniques and time mode operation of the analyser. The data can be gathered in the field on cassette tapes and replayed in the laboratory for detailed analysis. This technique would provide a versatile system for dynamic analysis of structures under varying conditions. e.g. structures in nuclear power systems, such as testing of end fittings, calandria, vibration testing and measurements exploying pressure transducers.

  16. Dynamic strain analysis of structures employing digital signal processing, storage and display

    International Nuclear Information System (INIS)

    Patwardhan, P.K.; Misra, V.M.; Kumar, Surendra

    1975-01-01

    A multi-channel digital technique has been adopted for analysing wave patterns of stresses and strains in structures, particularly under dynamic conditions. This technique provides adequate signal to noise discrimination and high sensitivity for very small (few milli-volts) and slow varying signals (few Hz to 100 Hz.), A-D conversion accompined by live display during the course of data gathering and computer compatible output. This system also provides fast response because of inherent 50 MHz digitising speed and a large dynamic range of 1024 discrete signal steps. The signals can be suitably fed to the A-D converter (50 MHz) or can be analysed employing frequency modulation techniques and time mode operation of the analyser. The data can be gathered in the field on cassette tapes and replayed in the laboratory for detailed analysis. This technique would provide a versatile system for dynamic analysis of structures under varying conditions. e.g. structures in nuclear power systems, such as testing of end fittings, calandria, vibration testing and measurements exploying pressure transducers. (author)

  17. Functional unit for a processor

    NARCIS (Netherlands)

    Rohani, A.; Kerkhoff, Hans G.

    2013-01-01

    The invention relates to a functional unit for a processor, such as a Very Large Instruction Word Processor. The invention further relates to a processor comprising at least one such functional unit. The invention further relates to a functional unit and processor capable of mitigating the effect of

  18. Neutron-Gamma Pulse Shape Discrimination With Ne-213 Liquid Scintillator By Using Digital Signal Processing Combined With Similarity Method

    International Nuclear Information System (INIS)

    Mardiyanto

    2008-01-01

    Neutron-Gamma Pulse Shape Discrimination with a NE-213 Liquid Scintillator by Using Digital Signal Processing Combined with Similarity Method. Measurement of mixed neutron-gamma radiation is difficult because a nuclear detector is usually sensitive to both radiations. A new attempt of neutron-gamma pulse shape discrimination for a NE-213 liquid scintillator is presented by using digital signal processing combined with an off-line similarity method. The output pulse shapes are digitized with a high speed digital oscilloscope. The n-γ discrimination is done by calculating the index of each pulse shape, which is determined by the similarity method, and then fusing it with its corresponding pulse height. Preliminary results demonstrate good separation of neutron and gamma-ray signals from a NE-213 scintillator with a simple digital system. The results were better than those with a conventional rise time method. Figure of Merit is used to determine the quality of discrimination. The figure of merit of the discrimination using digital signal processing combined with off-line similarity method are 1.9; 1.7; 1.1; 1.1; and 0.8; on the other hand by using conventional method the rise time are 0.9; 0.9; 0.9; 0.7; and 0.4 for the equivalent electron energy of 800; 278; 139; 69; and 30 keV. (author)

  19. Array processors: an introduction to their architecture, software, and applications in nuclear medicine

    International Nuclear Information System (INIS)

    King, M.A.; Doherty, P.W.; Rosenberg, R.J.; Cool, S.L.

    1983-01-01

    Array processors are ''number crunchers'' that dramatically enhance the processing power of nuclear medicine computer systems for applicatons dealing with the repetitive operations involved in digital image processing of large segments of data. The general architecture and the programming of array processors are introduced, along with some applications of array processors to the reconstruction of emission tomographic images, digital image enhancement, and functional image formation

  20. Optimal processor for malfunction detection in operating nuclear reactor

    International Nuclear Information System (INIS)

    Ciftcioglu, O.

    1990-01-01

    An optimal processor for diagnosing operational transients in a nuclear reactor is described. Basic design of the processor involves real-time processing of noise signal obtained from a particular in core sensor and the optimality is based on minimum alarm failure in contrast to minimum false alarm criterion from the safe and reliable plant operation viewpoint

  1. Fractal Communication System Using Digital Signal Processing Starter Kit (DSK TMS320c6713

    Directory of Open Access Journals (Sweden)

    Arsyad Ramadhan Darlis

    2015-12-01

    Full Text Available In 1992, Wornell and Oppenheim did research on a modulation which is formed by using wavelet theory. In some other studies, proved that this modulation can survive on a few channels and has reliability in some applications. Because of this modulation using the concept of fractal, then it is called as fractalmodulation. Fractal modulation is formed by inserting information signal into fractal signals that are selffractal similary. This modulation technique has the potential to replace the OFDM (Orthogonal Frequency Division Multiplexing, which is currently used on some of the latest telecommunication technologies. The purpose of this research is to implement the fractal communication system using Digital Signal Processing Starter Kit (DSK TMS320C6713 without using AWGN and Rayleigh channel in order to obtain the ideal performance of the system. From the simulation results using MATLAB7.4. it appears that this communication system has good performance on some channels than any other communication systems. While in terms of implementation by using (DSK via TMS320C6713 Code Composer Studio (CCS, it can be concluded that thefractal communication system has a better execution time on some tests.

  2. Fast digitization and discrimination of prompt neutron and photon signals using a novel silicon carbide detector

    International Nuclear Information System (INIS)

    Brandon W. Blackburn; James T. Johnson; Scott M. Watson; David L. Chichester; James L. Jones; Frank H. Ruddy; John G. Seidel; Robert W. Flammang

    2007-01-01

    Current requirements of some Homeland Security active interrogation projects for the detection of Special Nuclear Material (SNM) necessitate the development of faster inspection and acquisition capabilities. In order to do so, fast detectors which can operate during and shortly after intense interrogation radiation flashes are being developed. Novel silicon carbide (SiC) semiconductor Schottky diodes have been utilized as robust neutron and photon detectors in both pulsed photon and pulsed neutron fields and are being integrated into active inspection environments to allow exploitation of both prompt and delayed emissions. These detectors have demonstrated the capability of detecting both photon and neutron events during intense photon flashes typical of an active inspection environment. Beyond the inherent insensitivity of SiC to gamma radiation, fast digitization and processing has demonstrated that pulse shape discrimination (PSD) in combination with amplitude discrimination can further suppress unwanted gamma signals and extract fast neutron signatures. Usable neutron signals have been extracted from mixed radiation fields where the background has exceeded the signals of interest by >1000:1

  3. A molecular-sized optical logic circuit for digital modulation of a fluorescence signal

    Science.gov (United States)

    Nishimura, Takahiro; Tsuchida, Karin; Ogura, Yusuke; Tanida, Jun

    2018-03-01

    Fluorescence measurement allows simultaneous detection of multiple molecular species by using spectrally distinct fluorescence probes. However, due to the broad spectra of fluorescence emission, the multiplicity of fluorescence measurement is generally limited. To overcome this limitation, we propose a method to digitally modulate fluorescence output signals with a molecular-sized optical logic circuit by using optical control of fluorescence resonance energy transfer (FRET). The circuit receives a set of optical inputs represented with different light wavelengths, and then it switches high and low fluorescence intensity from a reporting molecule according to the result of the logic operation. By using combinational optical inputs in readout of fluorescence signals, the number of biomolecular species that can be identified is increased. To implement the FRET-based circuits, we designed two types of basic elements, YES and NOT switches. An YES switch produces a high-level output intensity when receiving a designated light wavelength input and a low-level intensity without the light irradiation. A NOT switch operates inversely to the YES switch. In experiments, we investigated the operation of the YES and NOT switches that receive a 532-nm light input and modulate the fluorescence intensity of Alexa Fluor 488. The experimental result demonstrates that the switches can modulate fluorescence signals according to the optical input.

  4. Use of higher order signal moments and high speed digital sampling technique for neutron flux measurements

    Science.gov (United States)

    Baers, L. B.; Gutierrez, T. Rivero; Mendoza, R. A. Carrillo; Santana, G. Jimenez

    1993-08-01

    The second (conventional variance or Campbell signal), the third, and the modified fourth order central signal moments associated with the amplified and filtered currents from two electrodes of an ex-core neutron sensitive fission detector were measured versus the reactor power of the 1-MW TRIGA reactor in Mexico City. Two channels of a high-speed (400-MHz) multiplexing data sampler and an analog-to-digital converter with 12-b resolution and 1-Mword buffer memory were used. The data were further retrieved into a PC, and estimates for autocorrelation and cross-correlation moments up to the fifth order, coherence, skewness, excess, etc., quantities were calculated offline. Five-mode operation of the detector was achieved, including conventional counting rates and currents in agreement with theory and the authors' previous results with analog techniques. The signals are proportional to the neutron flux and reactor power in some flux ranges. The suppression of background noise is improved and the lower limit of the measurement range is extended as the order of moment is increased, in agreement with theory.

  5. An all digital phase locked loop for synchronization of a sinusoidal signal embedded in white Gaussian noise

    Science.gov (United States)

    Reddy, C. P.; Gupta, S. C.

    1973-01-01

    An all digital phase locked loop which tracks the phase of the incoming sinusoidal signal once per carrier cycle is proposed. The different elements and their functions and the phase lock operation are explained in detail. The nonlinear difference equations which govern the operation of the digital loop when the incoming signal is embedded in white Gaussian noise are derived, and a suitable model is specified. The performance of the digital loop is considered for the synchronization of a sinusoidal signal. For this, the noise term is suitably modelled which allows specification of the output probabilities for the two level quantizer in the loop at any given phase error. The loop filter considered increases the probability of proper phase correction. The phase error states in modulo two-pi forms a finite state Markov chain which enables the calculation of steady state probabilities, RMS phase error, transient response and mean time for cycle skipping.

  6. MULTI-CORE AND OPTICAL PROCESSOR RELATED APPLICATIONS RESEARCH AT OAK RIDGE NATIONAL LABORATORY

    Energy Technology Data Exchange (ETDEWEB)

    Barhen, Jacob [ORNL; Kerekes, Ryan A [ORNL; ST Charles, Jesse Lee [ORNL; Buckner, Mark A [ORNL

    2008-01-01

    High-speed parallelization of common tasks holds great promise as a low-risk approach to achieving the significant increases in signal processing and computational performance required for next generation innovations in reconfigurable radio systems. Researchers at the Oak Ridge National Laboratory have been working on exploiting the parallelization offered by this emerging technology and applying it to a variety of problems. This paper will highlight recent experience with four different parallel processors applied to signal processing tasks that are directly relevant to signal processing required for SDR/CR waveforms. The first is the EnLight Optical Core Processor applied to matched filter (MF) correlation processing via fast Fourier transform (FFT) of broadband Dopplersensitive waveforms (DSW) using active sonar arrays for target tracking. The second is the IBM CELL Broadband Engine applied to 2-D discrete Fourier transform (DFT) kernel for image processing and frequency domain processing. And the third is the NVIDIA graphical processor applied to document feature clustering. EnLight Optical Core Processor. Optical processing is inherently capable of high-parallelism that can be translated to very high performance, low power dissipation computing. The EnLight 256 is a small form factor signal processing chip (5x5 cm2) with a digital optical core that is being developed by an Israeli startup company. As part of its evaluation of foreign technology, ORNL's Center for Engineering Science Advanced Research (CESAR) had access to a precursor EnLight 64 Alpha hardware for a preliminary assessment of capabilities in terms of large Fourier transforms for matched filter banks and on applications related to Doppler-sensitive waveforms. This processor is optimized for array operations, which it performs in fixed-point arithmetic at the rate of 16 TeraOPS at 8-bit precision. This is approximately 1000 times faster than the fastest DSP available today. The optical core

  7. MULTI-CORE AND OPTICAL PROCESSOR RELATED APPLICATIONS RESEARCH AT OAK RIDGE NATIONAL LABORATORY

    International Nuclear Information System (INIS)

    Barhen, Jacob; Kerekes, Ryan A.; St Charles, Jesse Lee; Buckner, Mark A.

    2008-01-01

    High-speed parallelization of common tasks holds great promise as a low-risk approach to achieving the significant increases in signal processing and computational performance required for next generation innovations in reconfigurable radio systems. Researchers at the Oak Ridge National Laboratory have been working on exploiting the parallelization offered by this emerging technology and applying it to a variety of problems. This paper will highlight recent experience with four different parallel processors applied to signal processing tasks that are directly relevant to signal processing required for SDR/CR waveforms. The first is the EnLight Optical Core Processor applied to matched filter (MF) correlation processing via fast Fourier transform (FFT) of broadband Dopplersensitive waveforms (DSW) using active sonar arrays for target tracking. The second is the IBM CELL Broadband Engine applied to 2-D discrete Fourier transform (DFT) kernel for image processing and frequency domain processing. And the third is the NVIDIA graphical processor applied to document feature clustering. EnLight Optical Core Processor. Optical processing is inherently capable of high-parallelism that can be translated to very high performance, low power dissipation computing. The EnLight 256 is a small form factor signal processing chip (5x5 cm2) with a digital optical core that is being developed by an Israeli startup company. As part of its evaluation of foreign technology, ORNL's Center for Engineering Science Advanced Research (CESAR) had access to a precursor EnLight 64 Alpha hardware for a preliminary assessment of capabilities in terms of large Fourier transforms for matched filter banks and on applications related to Doppler-sensitive waveforms. This processor is optimized for array operations, which it performs in fixed-point arithmetic at the rate of 16 TeraOPS at 8-bit precision. This is approximately 1000 times faster than the fastest DSP available today. The optical core

  8. Z+$\\gamma$ differential cross section measurements and the digital timing calibration of the level-1 calorimeter trigger cluster processor system in ATLAS.

    CERN Document Server

    Lilley, Joseph

    2011-01-01

    This thesis investigates the reconstruction of $Z(\\rightarrow ee)\\gamma$ events with the ATLAS detector at the LHC. The capabilities of the detector are explored for the initial run scenario with a proton-proton centre of mass collision energy of $\\sqrt{s}$ = 7TeV, and an integrated luminosity of $\\mathcal{L} = 1,fb^{-1}$. Monte Carlo simulations are used to predict the expected precision of a differential cross-section measurement for initial state radiation $Z+\\gamma$ events, both with respect to the transverse momentum of the photon, $p_{T}(\\gamma)$, and the three body $ee\\gamma$ invariant mass. A bin-by-bin correction is used to account for the signal selection efficiency and purity, and to correct the measured (simulated) distribution back to the theoretical prediction. The main backgrounds are found to be from the final state radiation $Z+\\gamma$ process, and from jets faking photons in $Z \\rightarrow ee$ events. The possible QCD multijet background is studied using a fake-rate method, and found to be ...

  9. 3081//sub E/ processor

    International Nuclear Information System (INIS)

    Kunz, P.F.; Gravina, M.; Oxoby, G.; Trang, Q.; Fucci, A.; Jacobs, D.; Martin, B.; Storr, K.

    1983-03-01

    Since the introduction of the 168//sub E/, emulating processors have been successful over an amazingly wide range of applications. This paper will describe a second generation processor, the 3081//sub E/. This new processor, which is being developed as a collaboration between SLAC and CERN, goes beyond just fixing the obvious faults of the 168//sub E/. Not only will the 3081//sub E/ have much more memory space, incorporate many more IBM instructions, and have much more memory space, incorporate many more IBM instructions, and have full double precision floating point arithmetic, but it will also have faster execution times and be much simpler to build, debug, and maintain. The simple interface and reasonable cost of the 168//sub E/ will be maintained for the 3081//sub E/

  10. Mixed-signal early vision chip with embedded image and programming memories and digital I/O

    Science.gov (United States)

    Linan-Cembrano, Gustavo; Rodriguez-Vazquez, Angel; Dominguez-Castro, Rafael; Espejo, Servando

    2003-04-01

    From a system level perspective, this paper presents a 128x128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS technology. The core processing array has been designed to achieve high-speed of operation and large-enough accuracy (~7bit) with low power consumption. The chip includes on-chip program memory to allow for the execution of complex, sequential and/or bifurcation flow image processing algorithms. It also includes the structures and circuits needed to guarantee its embedding into conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. The chip features up to 330GOPs (Giga Operations per second), and uses the power supply (180GOP/Joule) and the silicon area (3.8 GOPS/mm2) efficiently, as it is able to maintain VGA processing throughputs of 100Frames/s with about 15 basic image processing tasks on each frame.

  11. Digital signal processing reveals circadian baseline oscillation in majority of mammalian genes.

    Directory of Open Access Journals (Sweden)

    Andrey A Ptitsyn

    2007-06-01

    Full Text Available In mammals, circadian periodicity has been described for gene expression in the hypothalamus and multiple peripheral tissues. It is accepted that 10%-15% of all genes oscillate in a daily rhythm, regulated by an intrinsic molecular clock. Statistical analyses of periodicity are limited by the small size of datasets and high levels of stochastic noise. Here, we propose a new approach applying digital signal processing algorithms separately to each group of genes oscillating in the same phase. Combined with the statistical tests for periodicity, this method identifies circadian baseline oscillation in almost 100% of all expressed genes. Consequently, circadian oscillation in gene expression should be evaluated in any study related to biological pathways. Changes in gene expression caused by mutations or regulation of environmental factors (such as photic stimuli or feeding should be considered in the context of changes in the amplitude and phase of genetic oscillations.

  12. Low-complexity camera digital signal imaging for video document projection system

    Science.gov (United States)

    Hsia, Shih-Chang; Tsai, Po-Shien

    2011-04-01

    We present high-performance and low-complexity algorithms for real-time camera imaging applications. The main functions of the proposed camera digital signal processing (DSP) involve color interpolation, white balance, adaptive binary processing, auto gain control, and edge and color enhancement for video projection systems. A series of simulations demonstrate that the proposed method can achieve good image quality while keeping computation cost and memory requirements low. On the basis of the proposed algorithms, the cost-effective hardware core is developed using Verilog HDL. The prototype chip has been verified with one low-cost programmable device. The real-time camera system can achieve 1270 × 792 resolution with the combination of extra components and can demonstrate each DSP function.

  13. Signal processing for high granularity calorimeter: amplification, filtering, memorization and digitalization

    Energy Technology Data Exchange (ETDEWEB)

    Royer, L; Manen, S; Gay, P, E-mail: royer@clermont.in2p3.f [Clermont Universite, Universite Blaise Pascal, CNRS/IN2P3, LPC, BP 10448, F-63000 Clermont-Ferrand (France)

    2010-12-15

    A very-front-end electronics dedicated to high granularity calorimeters has been designed and its performance measured. This electronics performs the amplification of the charge delivered by the detector thanks to a low-noise Charge Sensitive Amplifier. The dynamic range is improved using a bandpass filter based on a Gated Integrator. Studying its weighting function, we show that this filter is more efficient than standard CRRC shaper, thanks to the integration time which can be expand near the bunch interval time, whereas the peaking time of the CRRC shaper is limited to pile-up consideration. Moreover, the Gated Integrator performs intrinsically the analog memorization of the signal before its delayed digital conversion. The analog-to-digital conversion is performed through a 12-bit cyclic ADC specifically developed for this application. The very-front-end channel has been fabricated using a 0.35 {mu}m CMOS technology. Measurements show a global non-linearity better than 0.1%. The Equivalent Noise Charge at the input of the channel is evaluated to 1.8 fC, compare to the maximum input charge of 10 pC. The power consumption of the complete channel is limited to 6.5 mW.

  14. Simulation of a processor switching circuit with APLSV

    International Nuclear Information System (INIS)

    Dilcher, H.

    1979-01-01

    The report describes the simulation of a processor switching circuit with APL. Furthermore an APL function is represented to simulate a processor in an assembly like language. Both together serve as a tool for studying processor properties. By means of the programming function it is also possible to program other simulated processors. The processor is to be used in the processing of data in real time analysis that occur in high energy physics experiments. The data are already offered to the computer in digitalized form. A typical data rate is at 10 KB/ sec. The data are structured in blocks. The particular blocks are 1 KB wide and are independent from each other. Aprocessor has to decide, whether the block data belong to an event that is part of the backround noise and can therefore be forgotten, or whether the data should be saved for a later evaluation. (orig./WB) [de

  15. Virtual instrumentation technique used in the nuclear digital signal processing system design: Energy and time measurement tests

    International Nuclear Information System (INIS)

    Pechousek, J.; Prochazka, R.; Prochazka, V.; Frydrych, J.

    2011-01-01

    In this report, computer-based digital signal processing system with a 200 MS s -1 sampling digitizer is presented. Virtual instrumentation technique is used to easily develop a system which provides spectroscopy measurements such as amplitude and time signal analysis, with the time-of-flight facility. Several test measurements were performed to determine the characteristics of a system. The presented system may find its application in the coincidence measurement since the system is usable for different types of detectors and sensitive to decay lifetimes from tens of nanoseconds to seconds.

  16. Some important aspects of the amplitude, charge and shape analog signals digitization in nuclear physics experiment

    International Nuclear Information System (INIS)

    Kulka, Z.

    1995-01-01

    One of the fundamental reasons of the special requirements concerning analog-to-digital converters (ADC's) used in nuclear experimental physics, especially in nuclear spectroscopy, in comparison to the conventional ADC's is a fact that they are utilized for continuous distribution measurements which are the nuclear radiation spectra. The ADC's used for distribution registration in form of amplitude or charge histogram spectra should have the differential linearity of two orders of magnitude better than that for conventional ADC's. Moreover, the problem of achievement the acceptable differential linearity (as well as stability) in nuclear spectroscopy is much more complicated because high resolution and high speed of the converters are also required. The first requirement comes out from application of semiconductor detectors, the second one comes from the statistical character of the nuclear processes, as well as, a necessity of collection of huge amount of nuclear data - often in a short time. In this report the influence of the specific needs of the nuclear experiments on the conversion methods selection and construction principles of the pulse ADC's is analyzed. Focus is taken on these ADC's which are used mainly to digital amplitude and charge detector signals measurements in nuclear spectroscopy. Based on the chosen examples of different types of ADC's it is shown how to obtain the required metrological parameters by using enlarged converter's structures and proper choice of the electronics components. In addition, a problem of the detector signals shape measurements in particle physics using the high speed flash ADC's is also discussed. (author). 196 refs, 99 figs, 7 tabs

  17. Optimal design of RTCs in digital circuit fault self-repair based on global signal optimization

    Institute of Scientific and Technical Information of China (English)

    Zhang Junbin; Cai Jinyan; Meng Yafeng

    2016-01-01

    Since digital circuits have been widely and thoroughly applied in various fields, electronic systems are increasingly more complicated and require greater reliability. Faults may occur in elec-tronic systems in complicated environments. If immediate field repairs are not made on the faults, elec-tronic systems will not run normally, and this will lead to serious losses. The traditional method for improving system reliability based on redundant fault-tolerant technique has been unable to meet the requirements. Therefore, on the basis of (evolvable hardware)-based and (reparation balance technology)-based electronic circuit fault self-repair strategy proposed in our preliminary work, the optimal design of rectification circuits (RTCs) in electronic circuit fault self-repair based on global sig-nal optimization is deeply researched in this paper. First of all, the basic theory of RTC optimal design based on global signal optimization is proposed. Secondly, relevant considerations and suitable ranges are analyzed. Then, the basic flow of RTC optimal design is researched. Eventually, a typical circuit is selected for simulation verification, and detailed simulated analysis is made on five circumstances that occur during RTC evolution. The simulation results prove that compared with the conventional design method based RTC, the global signal optimization design method based RTC is lower in hardware cost, faster in circuit evolution, higher in convergent precision, and higher in circuit evolution success rate. Therefore, the global signal optimization based RTC optimal design method applied in the elec-tronic circuit fault self-repair technology is proven to be feasible, effective, and advantageous.

  18. Experimental testing of the noise-canceling processor.

    Science.gov (United States)

    Collins, Michael D; Baer, Ralph N; Simpson, Harry J

    2011-09-01

    Signal-processing techniques for localizing an acoustic source buried in noise are tested in a tank experiment. Noise is generated using a discrete source, a bubble generator, and a sprinkler. The experiment has essential elements of a realistic scenario in matched-field processing, including complex source and noise time series in a waveguide with water, sediment, and multipath propagation. The noise-canceling processor is found to outperform the Bartlett processor and provide the correct source range for signal-to-noise ratios below -10 dB. The multivalued Bartlett processor is found to outperform the Bartlett processor but not the noise-canceling processor. © 2011 Acoustical Society of America

  19. A dedicated line-processor as used at the SHF

    International Nuclear Information System (INIS)

    Bevan, A.V.; Hatley, R.W.; Price, D.R.; Rankin, P.

    1985-01-01

    A hardwired trigger processor was used at the SLAC Hybrid Facility to find evidence for charged tracks originating from the fiducial volume of a 40'' rapidcycling bubble chamber. Straight-line projections of these tracks in the plane perpendicular to the applied magnetic field were searched for using data from three sets of proportional wire chambers (PWC). This information was made directly available to the processor by means of a special digitizing card. The results memory of the processor simulated read-only memory in a 168/E processor and was accessible by it. The 168/E controlled the issuing of a trigger command to the bubble chamber flash tubes. The same design of digitizer card used by the line processor was incorporated into the 168/E, again as read only memory, which allowed it access to the raw data for continual monitoring of trigger integrity. The design logic of the trigger processor was verified by running real PWC data through a FORTRAN simulation of the hardware. This enabled the debugging to become highly automated since a step by step, computer controlled comparison of processor registers to simulation predictions could be made

  20. Digital Beamforming Scatterometer

    Science.gov (United States)

    Rincon, Rafael F.; Vega, Manuel; Kman, Luko; Buenfil, Manuel; Geist, Alessandro; Hillard, Larry; Racette, Paul

    2009-01-01

    This paper discusses scatterometer measurements collected with multi-mode Digital Beamforming Synthetic Aperture Radar (DBSAR) during the SMAP-VEX 2008 campaign. The 2008 SMAP Validation Experiment was conducted to address a number of specific questions related to the soil moisture retrieval algorithms. SMAP-VEX 2008 consisted on a series of aircraft-based.flights conducted on the Eastern Shore of Maryland and Delaware in the fall of 2008. Several other instruments participated in the campaign including the Passive Active L-Band System (PALS), the Marshall Airborne Polarimetric Imaging Radiometer (MAPIR), and the Global Positioning System Reflectometer (GPSR). This campaign was the first SMAP Validation Experiment. DBSAR is a multimode radar system developed at NASA/Goddard Space Flight Center that combines state-of-the-art radar technologies, on-board processing, and advances in signal processing techniques in order to enable new remote sensing capabilities applicable to Earth science and planetary applications [l]. The instrument can be configured to operate in scatterometer, Synthetic Aperture Radar (SAR), or altimeter mode. The system builds upon the L-band Imaging Scatterometer (LIS) developed as part of the RadSTAR program. The radar is a phased array system designed to fly on the NASA P3 aircraft. The instrument consists of a programmable waveform generator, eight transmit/receive (T/R) channels, a microstrip antenna, and a reconfigurable data acquisition and processor system. Each transmit channel incorporates a digital attenuator, and digital phase shifter that enables amplitude and phase modulation on transmit. The attenuators, phase shifters, and calibration switches are digitally controlled by the radar control card (RCC) on a pulse by pulse basis. The antenna is a corporate fed microstrip patch-array centered at 1.26 GHz with a 20 MHz bandwidth. Although only one feed is used with the present configuration, a provision was made for separate corporate

  1. Robustness of digitally modulated signal features against variation in HF noise model

    Directory of Open Access Journals (Sweden)

    Shoaib Mobien

    2011-01-01

    Full Text Available Abstract High frequency (HF band has both military and civilian uses. It can be used either as a primary or backup communication link. Automatic modulation classification (AMC is of an utmost importance in this band for the purpose of communications monitoring; e.g., signal intelligence and spectrum management. A widely used method for AMC is based on pattern recognition (PR. Such a method has two main steps: feature extraction and classification. The first step is generally performed in the presence of channel noise. Recent studies show that HF noise could be modeled by Gaussian or bi-kappa distributions, depending on day-time. Therefore, it is anticipated that change in noise model will have impact on features extraction stage. In this article, we investigate the robustness of well known digitally modulated signal features against variation in HF noise. Specifically, we consider temporal time domain (TTD features, higher order cumulants (HOC, and wavelet based features. In addition, we propose new features extracted from the constellation diagram and evaluate their robustness against the change in noise model. This study is targeting 2PSK, 4PSK, 8PSK, 16QAM, 32QAM, and 64QAM modulations, as they are commonly used in HF communications.

  2. GELATIO: a general framework for modular digital analysis of high-purity Ge detector signals

    International Nuclear Information System (INIS)

    Agostini, M; Pandola, L; Zavarise, P; Volynets, O

    2011-01-01

    GELATIO is a new software framework for advanced data analysis and digital signal processing developed for the GERDA neutrinoless double beta decay experiment. The framework is tailored to handle the full analysis flow of signals recorded by high purity Ge detectors and photo-multipliers from the veto counters. It is designed to support a multi-channel modular and flexible analysis, widely customizable by the user either via human-readable initialization files or via a graphical interface. The framework organizes the data into a multi-level structure, from the raw data up to the condensed analysis parameters, and includes tools and utilities to handle the data stream between the different levels. GELATIO is implemented in C++. It relies upon ROOT and its extension TAM, which provides compatibility with PROOF, enabling the software to run in parallel on clusters of computers or many-core machines. It was tested on different platforms and benchmarked in several GERDA-related applications. A stable version is presently available for the GERDA Collaboration and it is used to provide the reference analysis of the experiment data.

  3. An SVM classifier to separate false signals from microcalcifications in digital mammograms

    Energy Technology Data Exchange (ETDEWEB)

    Bazzani, Armando; Bollini, Dante; Brancaccio, Rosa; Campanini, Renato; Riccardi, Alessandro; Romani, Davide [Department of Physics, University of Bologna (Italy); INFN, Bologna (Italy); Lanconelli, Nico [Department of Physics, University of Bologna, and INFN, Bologna (Italy). E-mail: nico.lanconelli@bo.infn.it; Bevilacqua, Alessandro [Department of Electronics, Computer Science and Systems, University of Bologna, and INFN, Bologna (Italy)

    2001-06-01

    In this paper we investigate the feasibility of using an SVM (support vector machine) classifier in our automatic system for the detection of clustered microcalcifications in digital mammograms. SVM is a technique for pattern recognition which relies on the statistical learning theory. It minimizes a function of two terms: the number of misclassified vectors of the training set and a term regarding the generalization classifier capability. We compare the SVM classifier with an MLP (multi-layer perceptron) in the false-positive reduction phase of our detection scheme: a detected signal is considered either microcalcification or false signal, according to the value of a set of its features. The SVM classifier gets slightly better results than the MLP one (Az value of 0.963 against 0.958) in the presence of a high number of training data; the improvement becomes much more evident (Az value of 0.952 against 0.918) in training sets of reduced size. Finally, the setting of the SVM classifier is much easier than the MLP one. (author)

  4. GELATIO: a general framework for modular digital analysis of high-purity Ge detector signals

    Science.gov (United States)

    Agostini, M.; Pandola, L.; Zavarise, P.; Volynets, O.

    2011-08-01

    GELATIO is a new software framework for advanced data analysis and digital signal processing developed for the GERDA neutrinoless double beta decay experiment. The framework is tailored to handle the full analysis flow of signals recorded by high purity Ge detectors and photo-multipliers from the veto counters. It is designed to support a multi-channel modular and flexible analysis, widely customizable by the user either via human-readable initialization files or via a graphical interface. The framework organizes the data into a multi-level structure, from the raw data up to the condensed analysis parameters, and includes tools and utilities to handle the data stream between the different levels. GELATIO is implemented in C++. It relies upon ROOT and its extension TAM, which provides compatibility with PROOF, enabling the software to run in parallel on clusters of computers or many-core machines. It was tested on different platforms and benchmarked in several GERDA-related applications. A stable version is presently available for the GERDA Collaboration and it is used to provide the reference analysis of the experiment data.

  5. Climate Signals: An On-Line Digital Platform for Mapping Climate Change Impacts in Real Time

    Science.gov (United States)

    Cutting, H.

    2016-12-01

    Climate Signals is an on-line digital platform for cataloging and mapping the impacts of climate change. The CS platform specifies and details the chains of connections between greenhouse gas emissions and individual climate events. Currently in open-beta release, the platform is designed to to engage and serve the general public, news media, and policy-makers, particularly in real-time during extreme climate events. Climate Signals consists of a curated relational database of events and their links to climate change, a mapping engine, and a gallery of climate change monitors offering real-time data. For each event in the database, an infographic engine provides a custom attribution "tree" that illustrates the connections to climate change. In addition, links to key contextual resources are aggregated and curated for each event. All event records are fully annotated with detailed source citations and corresponding hyper links. The system of attribution used to link events to climate change in real-time is detailed here. This open-beta release is offered for public user testing and engagement. Launched in May 2016, the operation of this platform offers lessons for public engagement in climate change impacts.

  6. Automatic analysis of digitized TV-images by a computer-driven optical microscope

    International Nuclear Information System (INIS)

    Rosa, G.; Di Bartolomeo, A.; Grella, G.; Romano, G.

    1997-01-01

    New methods of image analysis and three-dimensional pattern recognition were developed in order to perform the automatic scan of nuclear emulsion pellicles. An optical microscope, with a motorized stage, was equipped with a CCD camera and an image digitizer, and interfaced to a personal computer. Selected software routines inspired the design of a dedicated hardware processor. Fast operation, high efficiency and accuracy were achieved. First applications to high-energy physics experiments are reported. Further improvements are in progress, based on a high-resolution fast CCD camera and on programmable digital signal processors. Applications to other research fields are envisaged. (orig.)

  7. Real-Time Hardware-in-the-Loop Testing for Digital Controllers

    DEFF Research Database (Denmark)

    Cha, Seung-Tae; Kwon, Park In; Wu, Qiuwei

    2012-01-01

    of the power electronics hardware are not included in the RTDS. Instead, the control algorithms are coded using the native C code and downloaded to the dedicated digital signal processor (DSP)/microcontrollers. The two experimental applications illustrate the effectiveness of the HIL controller testing...

  8. The Central Trigger Processor (CTP)

    CERN Multimedia

    Franchini, Matteo

    2016-01-01

    The Central Trigger Processor (CTP) receives trigger information from the calorimeter and muon trigger processors, as well as from other sources of trigger. It makes the Level-1 decision (L1A) based on a trigger menu.

  9. Very Long Instruction Word Processors

    Indian Academy of Sciences (India)

    Pentium Processor have modified the processor architecture to exploit parallelism in a program. .... The type of operation itself is encoded using 14 bits. .... text of designing simple architectures with low power consump- tion and execute x86 ...

  10. DIGITAL

    Data.gov (United States)

    Federal Emergency Management Agency, Department of Homeland Security — The Digital Flood Insurance Rate Map (DFIRM) Database depicts flood risk information and supporting data used to develop the risk data. The primary risk...

  11. Iterative Signal Processing for Mitigation of Analog-to-Digital Converter Clipping Distortion in Multiband OFDMA Receivers

    Directory of Open Access Journals (Sweden)

    Markus Allén

    2012-01-01

    Full Text Available In modern wideband communication receivers, the large input-signal dynamics is a fundamental problem. Unintentional signal clipping occurs, if the receiver front-end with the analog-to-digital interface cannot respond to rapidly varying conditions. This paper discusses digital postprocessing compensation of such unintentional clipping in multiband OFDMA receivers. The proposed method iteratively mitigates the clipping distortion by exploiting the symbol decisions. The performance of the proposed method is illustrated with various computer simulations and also verified by concrete laboratory measurements with commercially available analog-to-digital hardware. It is shown that the clipping compensation algorithm implemented in a turbo decoding OFDM receiver is able to remove almost all the clipping distortion even under significant clipping in fading channel circumstances. That is to say, it is possible to nearly recover the receiver performance to the level, which would be achieved in the equivalent nonclipped situation.

  12. 37 CFR 258.4 - Royalty fee for secondary transmission of digital signals of broadcast stations by satellite...

    Science.gov (United States)

    2010-07-01

    ... 37 Patents, Trademarks, and Copyrights 1 2010-07-01 2010-07-01 false Royalty fee for secondary... AND PROCEDURES ADJUSTMENT OF ROYALTY FEE FOR SECONDARY TRANSMISSIONS BY SATELLITE CARRIERS § 258.4 Royalty fee for secondary transmission of digital signals of broadcast stations by satellite carriers. (a...

  13. First Tests of a New Fast Waveform Digitizer for PMT Signal Read-out from Liquid Argon Dark Matter Detectors

    Science.gov (United States)

    Szelc, A. M.; Canci, N.; Cavanna, F.; Cortopassi, A.; D'Incecco, M.; Mini, G.; Pietropaolo, F.; Romboli, A.; Segreto, E.; Acciarri, R.

    A new generation Waveform Digitizer board as been recently made available on the market by CAEN. The new board CAEN V1751 with 8 Channels per board, 10 bit, 1 GS/s Flash ADC Waveform Digitizer (or 4 channel, 10 bit, 2 GS/s Flash ADC Waveform Digitizer -Dual Edge Sampling mode) with threshold and Auto-Trigger capabilities provides an ideal (relatively low-cost) solution for reading signals from liquid Argon detectors for Dark Matter search equipped with an array of PMTs for the detection of scintillation light. The board was extensively used in real experimental conditions to test its usefulness for possible future uses and to compare it with a state of the art digital oscilloscope. As results, PMT Signal sampling at 1 or 2 GS/s is appropriate for the reconstruction of the fast component of the signal scintillation in Argon (characteristic time of about 4 ns) and the extended dynamic range, after a small customization, allows for the detection of signals in the range of energy needed. The bandwidth is found to be adequate and the intrinsic noise is very low.

  14. Dependable Digitally-Assisted Mixed-Signal IPs Based on Integrated Self-Test & Self-Calibration

    NARCIS (Netherlands)

    Kerkhoff, Hans G.; Wan, J.

    2010-01-01

    Heterogeneous SoC devices, including sensors, analogue and mixed-signal front-end circuits and the availability of massive digital processing capability, are being increasingly used in safety-critical applications like in the automotive, medical, and the security arena. Already a significant amount

  15. Experiment on Synchronous Timing Signal Detection from ISDB-T Terrestrial Digital TV Signal with Application to Autonomous Distributed ITS-IVC Network

    Science.gov (United States)

    Karasawa, Yoshio; Kumagai, Taichi; Takemoto, Atsushi; Fujii, Takeo; Ito, Kenji; Suzuki, Noriyoshi

    A novel timing synchronizing scheme is proposed for use in inter-vehicle communication (IVC) with an autonomous distributed intelligent transport system (ITS). The scheme determines the timing of packet signal transmission in the IVC network and employs the guard interval (GI) timing in the orthogonal frequency divisional multiplexing (OFDM) signal currently used for terrestrial broadcasts in the Japanese digital television system (ISDB-T). This signal is used because it is expected that the automotive market will demand the capability for cars to receive terrestrial digital TV broadcasts in the near future. The use of broadcasts by automobiles presupposes that the on-board receivers are capable of accurately detecting the GI timing data in an extremely low carrier-to-noise ratio (CNR) condition regardless of a severe multipath environment which will introduce broad scatter in signal arrival times. Therefore, we analyzed actual broadcast signals received in a moving vehicle in a field experiment and showed that the GI timing signal is detected with the desired accuracy even in the case of extremely low-CNR environments. Some considerations were also given about how to use these findings.

  16. Global synchronization of parallel processors using clock pulse width modulation

    Science.gov (United States)

    Chen, Dong; Ellavsky, Matthew R.; Franke, Ross L.; Gara, Alan; Gooding, Thomas M.; Haring, Rudolf A.; Jeanson, Mark J.; Kopcsay, Gerard V.; Liebsch, Thomas A.; Littrell, Daniel; Ohmacht, Martin; Reed, Don D.; Schenck, Brandon E.; Swetz, Richard A.

    2013-04-02

    A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.

  17. The Molen Polymorphic Media Processor

    NARCIS (Netherlands)

    Kuzmanov, G.K.

    2004-01-01

    In this dissertation, we address high performance media processing based on a tightly coupled co-processor architectural paradigm. More specifically, we introduce a reconfigurable media augmentation of a general purpose processor and implement it into a fully operational processor prototype. The

  18. Dual-core Itanium Processor

    CERN Multimedia

    2006-01-01

    Intel’s first dual-core Itanium processor, code-named "Montecito" is a major release of Intel's Itanium 2 Processor Family, which implements the Intel Itanium architecture on a dual-core processor with two cores per die (integrated circuit). Itanium 2 is much more powerful than its predecessor. It has lower power consumption and thermal dissipation.

  19. Digital Circuit Analysis Using an 8080 Processor.

    Science.gov (United States)

    Greco, John; Stern, Kenneth

    1983-01-01

    Presents the essentials of a program written in Intel 8080 assembly language for the steady state analysis of a combinatorial logic gate circuit. Program features and potential modifications are considered. For example, the program could also be extended to include clocked/unclocked sequential circuits. (JN)

  20. A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals

    Science.gov (United States)

    Kim, Youbean; Kim, Kicheol; Kim, Incheol; Kang, Sungho

    Testing PLLs (phase-locked loops) is becoming an important issue that affects both time-to-market and production cost of electronic systems. Though a PLL is the most common mixed-signal building block, it is very difficult to test due to internal analog blocks and signals. In this paper, we propose a new PLL BIST (built-in self test) using the distorted frequency detector that uses only internal digital signals. The proposed BIST does not need to load any analog nodes of the PLL. Therefore, it provides an efficient defect-oriented structural test scheme, reduced area overhead, and improved test quality compared with previous approaches.

  1. A GI Proposal to Display ECG Digital Signals Wirelessly Real-time Transmitted onto a Remote PC

    Directory of Open Access Journals (Sweden)

    Marius Corneliu Rosu

    2018-03-01

    Full Text Available The sensors, as wireless communication system, comply the 7-layer model Open Systems Interconnection (OSI. In this paper, a point-to-point transmission model was used. The ECG signal is transmitted from the Router Sensor (RS to an end Coordinator Node (CN plugged-in to the laptop via USB port; RS acquires ECG signal in analogical mode, and is also responsible with sampling, quantization and sending it wirelessly direct to CN. The distance between RS and CN is a single-hop transmission, and does not exceed the range of the XBeeS2Pro transceivers. The communication protocol is ZigBee. Remote viewing of the transmitted signal is performed on a Graphical Interface (GI written under MATLAB, after the signal has been digitized; the choice of MATLAB was motivated by future developments. Particular aspects will be highlighted, so that the reader to be edified about the results obtained during laboratory experiments. Recording demonstrate that the purpose exposed in title has been reached: Direct link in Real-Time was established, and the digital ECG signal received is reconstituted accurately on MATLAB GI; signal received on laptop is compared with the analog signal displayed on oscilloscope.

  2. Multimode power processor

    Science.gov (United States)

    O'Sullivan, George A.; O'Sullivan, Joseph A.

    1999-01-01

    In one embodiment, a power processor which operates in three modes: an inverter mode wherein power is delivered from a battery to an AC power grid or load; a battery charger mode wherein the battery is charged by a generator; and a parallel mode wherein the generator supplies power to the AC power grid or load in parallel with the battery. In the parallel mode, the system adapts to arbitrary non-linear loads. The power processor may operate on a per-phase basis wherein the load may be synthetically transferred from one phase to another by way of a bumpless transfer which causes no interruption of power to the load when transferring energy sources. Voltage transients and frequency transients delivered to the load when switching between the generator and battery sources are minimized, thereby providing an uninterruptible power supply. The power processor may be used as part of a hybrid electrical power source system which may contain, in one embodiment, a photovoltaic array, diesel engine, and battery power sources.

  3. The front-end analog and digital signal processing electronics for the drift chambers of the Stanford Large Detector

    International Nuclear Information System (INIS)

    Haller, G.M.; Freytag, D.R.; Fox, J.; Olsen, J.; Paffrath, L.; Yim, A.; Honma, A.

    1990-10-01

    The front-end signal processing electronics for the drift-chambers of the Stanford Large Detector (SLD) at the Stanford Linear Collider is described. The system is implemented with printed-circuit boards which are shaped for direct mounting on the detector. Typically, a motherboard comprises 64 channels of transimpedance amplification and analog waveform sampling, A/D conversion, and associated control and readout circuitry. The loaded motherboard thus forms a processor which records low-level wave forms from 64 detector channels and transforms the information into a 64 k-byte serial data stream. In addition, the package performs calibration functions, measures leakage currents on the wires, and generates wire hit patterns for triggering purposes. The construction and operation of the electronic circuits utilizing monolithic, hybridized, and programmable components are discussed

  4. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel J M

    2010-01-01

    The design of an analog-to-digital converter or digital-to-analog converter is one of the most fascinating tasks in micro-electronics. In a converter the analog world with all its intricacies meets the realm of the formal digital abstraction. Both disciplines must be understood for an optimum conversion solution. In a converter also system challenges meet technology opportunities. Modern systems rely on analog-to-digital converters as an essential part of the complex chain to access the physical world. And processors need the ultimate performance of digital-to-analog converters to present the results of their complex algorithms. The same progress in CMOS technology that enables these VLSI digital systems creates new challenges for analog-to-digital converters: lower signal swings, less power and variability issues. Last but not least, the analog-to-digital converter must follow the cost reduction trend. These changing boundary conditions require micro-electronics engineers to consider their design choices for...

  5. Research on digital PID control algorithm for HPCT

    International Nuclear Information System (INIS)

    Zeng Yi; Li Rui; Shen Tianjian; Ke Xinhua

    2009-01-01

    Digital PID applied in high-precision HPCT (High-precision current transducer) based on Digital Signal Processor (DSP) TMS320F2812 and special D/A converter was researched. By using increment style PID Control algorithm, the stability and precision of high-precision HPCT output voltage is improved. On basis of deeply analysing incremental digital PID, the scheme model of HPCT is proposed, the feasibility simulation using Matlab is given. Practical hardware circuit verified the incremental PID has closed-loop control process in tracking HPCT output voltage. (authors)

  6. Acoustooptic linear algebra processors - Architectures, algorithms, and applications

    Science.gov (United States)

    Casasent, D.

    1984-01-01

    Architectures, algorithms, and applications for systolic processors are described with attention to the realization of parallel algorithms on various optical systolic array processors. Systolic processors for matrices with special structure and matrices of general structure, and the realization of matrix-vector, matrix-matrix, and triple-matrix products and such architectures are described. Parallel algorithms for direct and indirect solutions to systems of linear algebraic equations and their implementation on optical systolic processors are detailed with attention to the pipelining and flow of data and operations. Parallel algorithms and their optical realization for LU and QR matrix decomposition are specifically detailed. These represent the fundamental operations necessary in the implementation of least squares, eigenvalue, and SVD solutions. Specific applications (e.g., the solution of partial differential equations, adaptive noise cancellation, and optimal control) are described to typify the use of matrix processors in modern advanced signal processing.

  7. Real-Time Digital Signal Processing Based on FPGAs for Electronic Skin Implementation †

    Directory of Open Access Journals (Sweden)

    Ali Ibrahim

    2017-03-01

    Full Text Available Enabling touch-sensing capability would help appliances understand interaction behaviors with their surroundings. Many recent studies are focusing on the development of electronic skin because of its necessity in various application domains, namely autonomous artificial intelligence (e.g., robots, biomedical instrumentation, and replacement prosthetic devices. An essential task of the electronic skin system is to locally process the tactile data and send structured information either to mimic human skin or to respond to the application demands. The electronic skin must be fabricated together with an embedded electronic system which has the role of acquiring the tactile data, processing, and extracting structured information. On the other hand, processing tactile data requires efficient methods to extract meaningful information from raw sensor data. Machine learning represents an effective method for data analysis in many domains: it has recently demonstrated its effectiveness in processing tactile sensor data. In this framework, this paper presents the implementation of digital signal processing based on FPGAs for tactile data processing. It provides the implementation of a tensorial kernel function for a machine learning approach. Implementation results are assessed by highlighting the FPGA resource utilization and power consumption. Results demonstrate the feasibility of the proposed implementation when real-time classification of input touch modalities are targeted.

  8. Low-Latency Embedded Vision Processor (LLEVS)

    Science.gov (United States)

    2016-03-01

    algorithms, low-latency video processing, embedded image processor, wearable electronics, helmet-mounted systems, alternative night / day imaging...external subsystems and data sources with the device. The establishment of data interfaces in terms of data transfer rates, formats and types are...video signals from Near-visible Infrared (NVIR) sensor, Shortwave IR (SWIR) and Longwave IR (LWIR) is the main processing for Night Vision (NI) system

  9. Novel ultra-wideband photonic signal generation and transmission featuring digital signal processing bit error rate measurements

    DEFF Research Database (Denmark)

    Gibbon, Timothy Braidwood; Yu, Xianbin; Tafur Monroy, Idelfonso

    2009-01-01

    We propose the novel generation of photonic ultra-wideband signals using an uncooled DFB laser. For the first time we experimentally demonstrate bit-for-bit DSP BER measurements for transmission of a 781.25 Mbit/s photonic UWB signal.......We propose the novel generation of photonic ultra-wideband signals using an uncooled DFB laser. For the first time we experimentally demonstrate bit-for-bit DSP BER measurements for transmission of a 781.25 Mbit/s photonic UWB signal....

  10. ALICE chip processor

    CERN Multimedia

    Maximilien Brice

    2003-01-01

    This tiny chip provides data processing for the time projection chamber on ALICE. Known as the ALICE TPC Read Out (ALTRO), this device was designed to minimize the size and power consumption of the TPC front end electronics. This single chip contains 16 low-power analogue-to-digital converters with six million transistors of digital processing and 8 kbits of data storage.

  11. Video frame processor

    International Nuclear Information System (INIS)

    Joshi, V.M.; Agashe, Alok; Bairi, B.R.

    1993-01-01

    This report provides technical description regarding the Video Frame Processor (VFP) developed at Bhabha Atomic Research Centre. The instrument provides capture of video images available in CCIR format. Two memory planes each with a capacity of 512 x 512 x 8 bit data enable storage of two video image frames. The stored image can be processed on-line and on-line image subtraction can also be carried out for image comparisons. The VFP is a PC Add-on board and is I/O mapped within the host IBM PC/AT compatible computer. (author). 9 refs., 4 figs., 19 photographs

  12. Trigger and decision processors

    International Nuclear Information System (INIS)

    Franke, G.

    1980-11-01

    In recent years there have been many attempts in high energy physics to make trigger and decision processes faster and more sophisticated. This became necessary due to a permanent increase of the number of sensitive detector elements in wire chambers and calorimeters, and in fact it was possible because of the fast developments in integrated circuits technique. In this paper the present situation will be reviewed. The discussion will be mainly focussed upon event filtering by pure software methods and - rather hardware related - microprogrammable processors as well as random access memory triggers. (orig.)

  13. Optical Finite Element Processor

    Science.gov (United States)

    Casasent, David; Taylor, Bradley K.

    1986-01-01

    A new high-accuracy optical linear algebra processor (OLAP) with many advantageous features is described. It achieves floating point accuracy, handles bipolar data by sign-magnitude representation, performs LU decomposition using only one channel, easily partitions and considers data flow. A new application (finite element (FE) structural analysis) for OLAPs is introduced and the results of a case study presented. Error sources in encoded OLAPs are addressed for the first time. Their modeling and simulation are discussed and quantitative data are presented. Dominant error sources and the effects of composite error sources are analyzed.

  14. Microlens array processor with programmable weight mask and direct optical input

    Science.gov (United States)

    Schmid, Volker R.; Lueder, Ernst H.; Bader, Gerhard; Maier, Gert; Siegordner, Jochen

    1999-03-01

    We present an optical feature extraction system with a microlens array processor. The system is suitable for online implementation of a variety of transforms such as the Walsh transform and DCT. Operating with incoherent light, our processor accepts direct optical input. Employing a sandwich- like architecture, we obtain a very compact design of the optical system. The key elements of the microlens array processor are a square array of 15 X 15 spherical microlenses on acrylic substrate and a spatial light modulator as transmissive mask. The light distribution behind the mask is imaged onto the pixels of a customized a-Si image sensor with adjustable gain. We obtain one output sample for each microlens image and its corresponding weight mask area as summation of the transmitted intensity within one sensor pixel. The resulting architecture is very compact and robust like a conventional camera lens while incorporating a high degree of parallelism. We successfully demonstrate a Walsh transform into the spatial frequency domain as well as the implementation of a discrete cosine transform with digitized gray values. We provide results showing the transformation performance for both synthetic image patterns and images of natural texture samples. The extracted frequency features are suitable for neural classification of the input image. Other transforms and correlations can be implemented in real-time allowing adaptive optical signal processing.

  15. Programmable level-1 trigger with 3D-Flow processor array

    International Nuclear Information System (INIS)

    Crosetto, D.

    1994-01-01

    The 3D-Flow parallel processing system is a new concept in processor architecture, system architecture, and assembly architecture. Compared to the electronics used in present systems, this approach reduces the cost and complexity of the hardware and allows easy assembly, disassembly, incremental upgrading, and maintenance of different interconnection topologies. The 3D-Flow parallel-processing system benefits high energy physics (HEP) by allowing: (1) common less costly hardware to be used in different experiments. (2) new uses of existing installations. (3) tuning of trigger based on the first analyzed data, and (4) selection of desired events directly from raw data. The goal of this parallel-processing architecture is to acquire multiple data in parallel (up to 100 million frames per second) and to process them at high speed, accomplishing digital filtering on the input data, pattern recognition (particle identification), data moving, and data formatting. The main features of the system are its programmability, scalability, high-speed communication, and low cost. The compactness of the 3D-Flow parallel-processing system in concert with the processor architecture allows processor interconnections to be mapped into the geometry of sensors (detectors in HEP) without large interconnection signal delay, enabling real-time pattern recognition. The overall 3D-Flow project has passed a major design review at Fermilab (Reviewers included experts in computers, triggering, system assembly, and electronics)

  16. AMD's 64-bit Opteron processor

    CERN Multimedia

    CERN. Geneva

    2003-01-01

    This talk concentrates on issues that relate to obtaining peak performance from the Opteron processor. Compiler options, memory layout, MPI issues in multi-processor configurations and the use of a NUMA kernel will be covered. A discussion of recent benchmarking projects and results will also be included.BiographiesDavid RichDavid directs AMD's efforts in high performance computing and also in the use of Opteron processors...

  17. A single chip pulse processor for nuclear spectroscopy

    International Nuclear Information System (INIS)

    Hilsenrath, F.; Bakke, J.C.; Voss, H.D.

    1985-01-01

    A high performance digital pulse processor, integrated into a single gate array microcircuit, has been developed for spaceflight applications. The new approach takes advantage of the latest CMOS high speed A/D flash converters and low-power gated logic arrays. The pulse processor measures pulse height, pulse area and the required timing information (e.g. multi detector coincidence and pulse pile-up detection). The pulse processor features high throughput rate (e.g. 0.5 Mhz for 2 usec gausssian pulses) and improved differential linearity (e.g. + or - 0.2 LSB for a + or - 1 LSB A/D). Because of the parallel digital architecture of the device, the interface is microprocessor bus compatible. A satellite flight application of this module is presented for use in the X-ray imager and high energy particle spectrometers of the PEM experiment on the Upper Atmospheric Research Satellite

  18. 16-Bit RISC Processor Design for Convolution Application

    OpenAIRE

    Anand Nandakumar Shardul

    2013-01-01

    In this project, we propose a 16-bit non-pipelined RISC processor, which is used for signal processing applications. The processor consists of the blocks, namely, program counter, clock control unit, ALU, IDU and registers. Advantageous architectural modifications have been made in the incremented circuit used in program counter and carry select adder unit of the ALU in the RISC CPU core. Furthermore, a high speed and low power modified modifies multiplier has been designed and introduced in ...

  19. Digital DC-Reconstruction of AC-Coupled Electrophysiological Signals with a Single Inverting Filter

    DEFF Research Database (Denmark)

    Abächerli, Roger; Isaksen, Jonas; Schmid, Ramun

    2016-01-01

    Since the introduction of digital electrocardiographs, high-pass filters have been necessary for successful analog-to-digital conversion with a reasonable amplitude resolution. On the other hand, such high-pass filters may distort the diagnostically significant ST-segment of the ECG, which can...

  20. Optical linear algebra processors - Noise and error-source modeling

    Science.gov (United States)

    Casasent, D.; Ghosh, A.

    1985-01-01

    The modeling of system and component noise and error sources in optical linear algebra processors (OLAPs) are considered, with attention to the frequency-multiplexed OLAP. General expressions are obtained for the output produced as a function of various component errors and noise. A digital simulator for this model is discussed.

  1. Optical linear algebra processors: noise and error-source modeling.

    Science.gov (United States)

    Casasent, D; Ghosh, A

    1985-06-01

    The modeling of system and component noise and error sources in optical linear algebra processors (OLAP's) are considered, with attention to the frequency-multiplexed OLAP. General expressions are obtained for the output produced as a function of various component errors and noise. A digital simulator for this model is discussed.

  2. Intelligent trigger processor for the crystal box

    International Nuclear Information System (INIS)

    Sanders, G.H.; Butler, H.S.; Cooper, M.D.

    1981-01-01

    A large solid angle modular NaI(Tl) detector with 432 phototubes and 88 trigger scintillators is being used to search simultaneously for three lepton flavor changing decays of muon. A beam of up to 10 6 muons stopping per second with a 6% duty factor would yield up to 1000 triggers per second from random triple coincidences. A reduction of the trigger rate to 10 Hz is required from a hardwired primary trigger processor described in this paper. Further reduction to < 1 Hz is achieved by a microprocessor based secondary trigger processor. The primary trigger hardware imposes voter coincidence logic, stringent timing requirements, and a non-adjacency requirement in the trigger scintillators defined by hardwired circuits. Sophisticated geometric requirements are imposed by a PROM-based matrix logic, and energy and vector-momentum cuts are imposed by a hardwired processor using LSI flash ADC's and digital arithmetic loci. The secondary trigger employs four satellite microprocessors to do a sparse data scan, multiplex the data acquisition channels and apply additional event filtering

  3. Two applications of direct digital down converters in beam diagnostics

    International Nuclear Information System (INIS)

    Powers, Tom; Flood, Roger; Hovater, Curt; Musson, John

    2000-01-01

    The technologies of direct digital down converters, digital frequency synthesis, and digital signal processing are being used in many commercial applications. Because of this commercialization, the component costs are being reduced to the point where they are economically viable for large scale accelerator applications. This paper will discuss two applications of these technologies to beam diagnostics. In the first application the combination of direct digital frequency synthesis and direct digital down converters are coupled with digital signal processor technology in order to maintain the stable gain environment required for a multi-electrode beam position monitoring system. This is done by injecting a CW reference signal into the electronics as part of the front-end circuitry. In the second application direct digital down converters are used to provide a novel approach to the measurement of beam intensity using cavity current monitors. In this system a pair of reference signals are injected into the cavity through an auxiliary port. The beam current is then calculated as the ratio of the beam signal divided by the average of the magnitude of the two reference signals

  4. Signal processors for position-sensitive detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hasegawa, Ken-ichi [Hosei Univ., Koganei, Tokyo (Japan). Coll. of Engineering

    1996-07-01

    Position-sensitive detectors (PSD) are widely used in following various fields: condensed matter studies, material engineering, medical radiology particle physics, astrophysics and industrial applications. X-ray diffraction analysis is one of the field where PSDs are the most important instruments. In this field, many types of PSAs are employed: position-sensitive proportional counters (PSPC), multi-wire proportional chambers (MWPC), imaging plates, image intensifiers combined CCD cameras and semiconductor array devices. Two readout systems used for PSDs, where one is a charge-division type with high stability and the other is an encoder with multiple delay, line readout circuits useful for fast counting, were reported in this paper. The multiple delay line encoding system can be applicable to high counting rate 1D and 2D gas proportional detectors. (G.K.)

  5. High-Speed Micro Signal Processor.

    Science.gov (United States)

    1982-06-01

    4) 29 S1424-35 ADOR/QUANTITY FIELD - 2048 TO +409510, NOTE: POSITIVE VALUES 2047 4AP TO NEGKTIVE VALUES SK436 HALT 0 E ENABLE HALT 1 D DISABLE SM37 38...0 to 31 numeric. QUANT - 12 bit Quantity field to be used as the ALU ’Am operand. Value - (- 2048 to +2047)10 numeric. If (ASEL - Q16E) then, one...15AI12 1 9 rS EAO 1 41 1A!)3 I 10 TSEBO I 42 DTII1 I 11 TSEBI I 43 DTTIO T 12 VDI 1 44 )1109 1 13 DTAOO 0 45 DTI08 I 14 DTBOO 0 46 DTI07 I 15 DTBO1 0

  6. Reconfigurable L-band Radar Transceiver using Digital Signal Synthesis, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — This Phase II proposal, builds upon the extensive research and digital radar design that has been successfully completed during the Phase I contract. Key innovations...

  7. Virtual unit delay for digital frequency adaptive T/4 delay phase-locked loop system

    DEFF Research Database (Denmark)

    Yang, Yongheng; Zhou, Keliang; Blaabjerg, Frede

    2016-01-01

    /processor with a fixed sampling rate considering the cost and complexity, where the number of unit delays that have been adopted should be an integer. For instance, in conventional digital control systems, a single-phase T/4 Delay Phase-Locked Loop (PLL) system takes 50 unit delays (i.e., in a 50-Hz system...... Delay PLL system should be done in its implementation. This process will result in performance degradation in the digital control system, as the exactly required number of delays is not realized. Hence, in this paper, a Virtual Unit Delay (VUD) has been proposed to address such challenges to the digital......Digital micro-controllers/processors enable the cost-effective control of grid-connected power converter systems in terms of system monitoring, signal processing (e.g., grid synchronization), control (e.g., grid current and voltage control), etc. Normally, the control is implemented in a micro-controller...

  8. Digital Semaphore: Technical Feasibility of QR Code Optical Signaling for Fleet Communications

    Science.gov (United States)

    2013-06-01

    Standards (http://www.iso.org) JIS Japanese Industrial Standard JPEG Joint Photographic Experts Group (digital image format; http://www.jpeg.org) LED...Denso Wave corporation in the 1990s for the Japanese automotive manufacturing industry. See Appendix A for full details. Reed-Solomon Error...eliminates camera blur induced by the shutter, providing clear images at extremely high frame rates. Thusly, digital cinema cameras are more suitable

  9. Input/output Buffer based Vedic Multiplier Design for Thermal Aware Energy Efficient Digital Signal Processing on 28nm FPGA

    DEFF Research Database (Denmark)

    Goswami, Kavita; Pandey, Bishwajeet; Hussain, Dil muhammed Akbar

    2016-01-01

    Multiplier is used for multiplication of a signal and a constant in digital signal processing (DSP). 28nm technology based Vedic multiplier is implemented with use of VHDL HDL, Xilinx ISE, Kintex-7 FPGA and XPower Analyzer. Vedic multiplier gain speed improvements by parallelizing the generation...... Programmable Gate Array (FPGA) in order to reduce the development cost. The development cost for Application Specific Integrated Circuits (ASICs) are high in compare to FPGA. Selection of the most energy efficient IO standards in place of signal gating is the main design methodology for design of energy...... efficient Vedic multiplier.There is 68.51%, 69.86%, 74.65%, and 78.39% contraction in total power of Vedic multiplier on 28nm Kintex-7 FPGA, when we use HSTL_II in place of HSTL_II_DCI_18 at 56.7oC, 53.5oC, 40oC and 21oC respectively....

  10. MAP3D: a media processor approach for high-end 3D graphics

    Science.gov (United States)

    Darsa, Lucia; Stadnicki, Steven; Basoglu, Chris

    1999-12-01

    Equator Technologies, Inc. has used a software-first approach to produce several programmable and advanced VLIW processor architectures that have the flexibility to run both traditional systems tasks and an array of media-rich applications. For example, Equator's MAP1000A is the world's fastest single-chip programmable signal and image processor targeted for digital consumer and office automation markets. The Equator MAP3D is a proposal for the architecture of the next generation of the Equator MAP family. The MAP3D is designed to achieve high-end 3D performance and a variety of customizable special effects by combining special graphics features with high performance floating-point and media processor architecture. As a programmable media processor, it offers the advantages of a completely configurable 3D pipeline--allowing developers to experiment with different algorithms and to tailor their pipeline to achieve the highest performance for a particular application. With the support of Equator's advanced C compiler and toolkit, MAP3D programs can be written in a high-level language. This allows the compiler to successfully find and exploit any parallelism in a programmer's code, thus decreasing the time to market of a given applications. The ability to run an operating system makes it possible to run concurrent applications in the MAP3D chip, such as video decoding while executing the 3D pipelines, so that integration of applications is easily achieved--using real-time decoded imagery for texturing 3D objects, for instance. This novel architecture enables an affordable, integrated solution for high performance 3D graphics.

  11. Tests of variable-band multilayers designed for investigating optimal signal-to-noise vs artifact signal ratios in Dual-Energy Digital Subtraction Angiography (DDSA) imaging systems

    International Nuclear Information System (INIS)

    Boyers, D.; Ho, A.; Li, Q.; Piestrup, M.; Rice, M.; Tatchyn, R.

    1993-08-01

    In recent work, various design techniques were applied to investigate the feasibility of controlling the bandwidth and bandshape profiles of tungsten/boron-carbon (W/B 4 C) and tungsten/silicon (W/Si) multilayers for optimizing their performance in synchrotron radiation based angiographical imaging systems at 33 keV. Varied parameters included alternative spacing geometries, material thickness ratios, and numbers of layer pairs. Planar optics with nominal design reflectivities of 30%--94% and bandwidths ranging from 0.6%--10% were designed at the Stanford Radiation Laboratory, fabricated by the Ovonic Synthetic Materials Company, and characterized on Beam Line 4-3 at the Stanford Synchrotron Radiation Laboratory, in this paper we report selected results of these tests and review the possible use of the multilayers for determining optimal signal to noise vs. artifact signal ratios in practical Dual-Energy Digital Subtraction Angiography systems

  12. Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification

    Directory of Open Access Journals (Sweden)

    Pierangelo Terreni

    2010-01-01

    Full Text Available The paper addresses the algorithmic and architectural design of digital input power audio amplifiers. A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Different amplifier architectures are configured and compared to find optimal trade-offs among different cost-functions: low distortion, high efficiency, low circuit complexity and low sensitivity to parameter changes. A novel amplifier architecture is derived; its prototype implements digital processing IP macrocells (oversampler, interpolating filter, PWM cross-point deriver, noise shaper, multilevel PWM modulator, dead time compensator on a single low-complexity FPGA while off-chip components are used only for the power output stage (LC filter and power MOS bridge; no heatsink is required. The resulting digital input amplifier features a power efficiency higher than 90% and a total harmonic distortion down to 0.13% at power levels of tens of Watts. Discussions towards the full-silicon integration of the mixed-signal amplifier in embedded devices, using BCD technology and targeting power levels of few Watts, are also reported.

  13. High-Speed General Purpose Genetic Algorithm Processor.

    Science.gov (United States)

    Hoseini Alinodehi, Seyed Pourya; Moshfe, Sajjad; Saber Zaeimian, Masoumeh; Khoei, Abdollah; Hadidi, Khairollah

    2016-07-01

    In this paper, an ultrafast steady-state genetic algorithm processor (GAP) is presented. Due to the heavy computational load of genetic algorithms (GAs), they usually take a long time to find optimum solutions. Hardware implementation is a significant approach to overcome the problem by speeding up the GAs procedure. Hence, we designed a digital CMOS implementation of GA in [Formula: see text] process. The proposed processor is not bounded to a specific application. Indeed, it is a general-purpose processor, which is capable of performing optimization in any possible application. Utilizing speed-boosting techniques, such as pipeline scheme, parallel coarse-grained processing, parallel fitness computation, parallel selection of parents, dual-population scheme, and support for pipelined fitness computation, the proposed processor significantly reduces the processing time. Furthermore, by relying on a built-in discard operator the proposed hardware may be used in constrained problems that are very common in control applications. In the proposed design, a large search space is achievable through the bit string length extension of individuals in the genetic population by connecting the 32-bit GAPs. In addition, the proposed processor supports parallel processing, in which the GAs procedure can be run on several connected processors simultaneously.

  14. Direct digital conversion detector technology

    Science.gov (United States)

    Mandl, William J.; Fedors, Richard

    1995-06-01

    Future imaging sensors for the aerospace and commercial video markets will depend on low cost, high speed analog-to-digital (A/D) conversion to efficiently process optical detector signals. Current A/D methods place a heavy burden on system resources, increase noise, and limit the throughput. This paper describes a unique method for incorporating A/D conversion right on the focal plane array. This concept is based on Sigma-Delta sampling, and makes optimum use of the active detector real estate. Combined with modern digital signal processors, such devices will significantly increase data rates off the focal plane. Early conversion to digital format will also decrease the signal susceptibility to noise, lowering the communications bit error rate. Computer modeling of this concept is described, along with results from several simulation runs. A potential application for direct digital conversion is also reviewed. Future uses for this technology could range from scientific instruments to remote sensors, telecommunications gear, medical diagnostic tools, and consumer products.

  15. Exploitation of Digital Filters to Advance the Single-Phase T/4 Delay PLL System

    DEFF Research Database (Denmark)

    Yang, Yongheng; Zhou, Keliang; Blaabjerg, Frede

    2016-01-01

    will violate this design rule and it can become a major challenge for digital controllers. To deal with the above issue, this paper first exploits a virtual unit delay (z_v^-1) to emulate the viable sampling behavior in practical digital signal processors with a fixed sampling rate. This exploitation......With the development of digital signal processing technologies, control and monitoring of power electronics conversion systems have been evolving to become fully digital. As the basic element in the design and analysis phase of digital controllers or filters, a number of unit delays (z^-1) have...... been employed, e.g., in a cascaded structure. Practically, the number of unit delays is designed as an integer, which is related to the sampling frequency (e.g., 50 Hz). More common, the sampling frequency is fixed during operation for simplicity and design. Hence, any disturbance in the ac signal...

  16. Composable processor virtualization for embedded systems

    NARCIS (Netherlands)

    Molnos, A.M.; Milutinovic, A.; She, D.; Goossens, K.G.W.

    2010-01-01

    Processor virtualization divides a physical processor's time among a set of virual machines, enabling efficient hardware utilization, application security and allowing co-existence of different operating systems on the same processor. Through initially intended for the server domain, virtualization

  17. Ring-array processor distribution topology for optical interconnects

    Science.gov (United States)

    Li, Yao; Ha, Berlin; Wang, Ting; Wang, Sunyu; Katz, A.; Lu, X. J.; Kanterakis, E.

    1992-01-01

    The existing linear and rectangular processor distribution topologies for optical interconnects, although promising in many respects, cannot solve problems such as clock skews, the lack of supporting elements for efficient optical implementation, etc. The use of a ring-array processor distribution topology, however, can overcome these problems. Here, a study of the ring-array topology is conducted with an aim of implementing various fast clock rate, high-performance, compact optical networks for digital electronic multiprocessor computers. Practical design issues are addressed. Some proof-of-principle experimental results are included.

  18. Wavelength-encoded OCDMA system using opto-VLSI processors.

    Science.gov (United States)

    Aljada, Muhsen; Alameh, Kamal

    2007-07-01

    We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

  19. Wavelength-encoded OCDMA system using opto-VLSI processors

    Science.gov (United States)

    Aljada, Muhsen; Alameh, Kamal

    2007-07-01

    We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

  20. Comparison of the analog and digital pulse-shaping methods in signal processing in nuclear detections

    International Nuclear Information System (INIS)

    Golnabi, H.

    2002-01-01

    The goal of this article is to describe the potential applications of the new improved digital techniques and provide a meaningful figure of merit for the comparison of the analog and digital methods. The experimental operation of a typical digital pulse shaper used in a spectrometer with the 23 Na source and a Ge y-ray detector is discussed. The effect of different imposed dead time on the counted pulses is investigated. It is noticed that nuclear events distribution in all ranges of dead time does not obey Poisson's law and deviation from this distribution depends on the counting rate. For a given dead time, deviation from this distribution increases linearly by increasing imposed dead time. For a fixed dead time, when counting rate increases deviation from Poisson's distribution law increases accordingly, and vice versa. (Author)

  1. A Human Error Analysis with Physiological Signals during Utilizing Digital Devices

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Yong Hee; Oh, Yeon Ju; Shin, Kwang Hyeon [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2011-10-15

    The introduction of advanced MCR is accompanied with lots of changes and different forms and features through the virtue of new digital technologies. There are various kinds of digital devices such as flat panel displays, touch screens, and so on. The characteristics of these digital devices give many chances to the interface management, and can be integrated into a compact single workstation in an advanced MCR so that workers can operate the plant with minimum burden during any operating condition. However, these devices may introduce new types of human errors, and thus we need a means to evaluate and prevent such error, especially those related to the digital devices. Human errors have been retrospectively assessed for accident reviews and quantitatively evaluated through HRA for PSA. However, the ergonomic verification and validation is an important process to defend all human error potential in the NPP design. HRA is a crucial part of a PSA, and helps in preparing a countermeasure for design by drawing potential human error items that affect the overall safety of NPPs. Various HRA techniques are available however: they reveal shortages of the HMI design in the digital era. - HRA techniques depend on PSFs: this means that the scope dealing with human factors is previously limited, and thus all attributes of new digital devices may not be considered in HRA. - The data used to HRA are not close to the evaluation items. So, human error analysis is not easy to apply to design by several individual experiments and cases. - The results of HRA are not statistically meaningful because accidents including human errors in NPPs are rare and have been estimated as having an extremely low probability

  2. The development of a digital signal processing and plotting package to support testing of hazardous and radioactive material packages

    International Nuclear Information System (INIS)

    Ludwigsen, J.S.; Uncapher, W.L.; Arviso, M.; Lattier, C.N.; Hankinson, M.; Cannone, D.J.

    1995-01-01

    Federal regulations allow package designers to use analysis, testing, or a combination of analysis and testing to support certification of packages used to transport hazardous or radioactive materials. In recent years, many certified packages were subjected to a combination of analysis and testing. A major part of evaluating structural or thermal package response is the collection, reduction and presentation of instrumentation measurement data. Sandia National Laboratories, under the sponsorship of the US Department of Energy, has developed a comprehensive analysis and plotting package (known as KAPP) that performs digital signal processing of both transient structural and thermal data integrated with a comprehensive plotting package designed to support radioactive material package testing

  3. Low-power digital ASIC for on-chip spectral analysis of low-frequency physiological signals

    International Nuclear Information System (INIS)

    Nie Zedong; Zhang Fengjuan; Li Jie; Wang Lei

    2012-01-01

    A digital ASIC chip customized for battery-operated body sensing devices is presented. The ASIC incorporates a novel hybrid-architecture fast Fourier transform (FFT) unit that is capable of scalable spectral analysis, a licensed ARM7TDMI IP hardcore and several peripheral IP blocks. Extensive experimental results suggest that the complete chip works as intended. The power consumption of the FFT unit is 0.69 mW at 1 MHz with 1.8 V power supply. The low-power and programmable features of the ASIC make it suitable for ‘on-the-fly’ low-frequency physiological signal processing. (semiconductor integrated circuits)

  4. Distributed processor systems

    International Nuclear Information System (INIS)

    Zacharov, B.

    1976-01-01

    In recent years, there has been a growing tendency in high-energy physics and in other fields to solve computational problems by distributing tasks among the resources of inter-coupled processing devices and associated system elements. This trend has gained further momentum more recently with the increased availability of low-cost processors and with the development of the means of data distribution. In two lectures, the broad question of distributed computing systems is examined and the historical development of such systems reviewed. An attempt is made to examine the reasons for the existence of these systems and to discern the main trends for the future. The components of distributed systems are discussed in some detail and particular emphasis is placed on the importance of standards and conventions in certain key system components. The ideas and principles of distributed systems are discussed in general terms, but these are illustrated by a number of concrete examples drawn from the context of the high-energy physics environment. (Auth.)

  5. Fixed-point signal processing

    CERN Document Server

    Padgett, Wayne T

    2009-01-01

    This book is intended to fill the gap between the ""ideal precision"" digital signal processing (DSP) that is widely taught, and the limited precision implementation skills that are commonly required in fixed-point processors and field programmable gate arrays (FPGAs). These skills are often neglected at the university level, particularly for undergraduates. We have attempted to create a resource both for a DSP elective course and for the practicing engineer with a need to understand fixed-point implementation. Although we assume a background in DSP, Chapter 2 contains a review of basic theory

  6. Broadband analog to digital conversion with spatial-spectral holography

    International Nuclear Information System (INIS)

    Babbitt, W. Randall; Neifeld, Mark A.; Merkel, Kristian D.

    2007-01-01

    A new approach to broadband photonic-assisted analog-to-digital converter (ADC) technology is proposed and analyzed. The core of the device is a spatial spectral holographic (SSH) material, which can directly record the signals of interest in the frequency domain. An SSH-ADC acts as a frequency-domain stretch processor, which leverages the high performance of conventional ADCs by converting high bandwidth input signals to low bandwidth output signals without loss of information. Analysis of a 10 GHz bandwidth SSH-ADC predicts that 10-bit performance can be achieved with currently available materials and components. SSH-ADC technology is scalable to bandwidths over 100 GHz with recently developed SSH materials. While the SSH-ADC is a transient digitizer, the spatial parallelism of SSH materials can be utilized to enable continuous digitization

  7. Broadband analog to digital conversion with spatial-spectral holography

    Energy Technology Data Exchange (ETDEWEB)

    Babbitt, W. Randall [Spectrum Lab, Montana State University, Bozeman, MT 59717-3510 (United States)]. E-mail: babbitt@physics.montana.edu; Neifeld, Mark A. [Spectrum Lab, Montana State University, Bozeman, MT 59717-3510 (United States); Merkel, Kristian D. [Spectrum Lab, Montana State University, Bozeman, MT 59717-3510 (United States)

    2007-11-15

    A new approach to broadband photonic-assisted analog-to-digital converter (ADC) technology is proposed and analyzed. The core of the device is a spatial spectral holographic (SSH) material, which can directly record the signals of interest in the frequency domain. An SSH-ADC acts as a frequency-domain stretch processor, which leverages the high performance of conventional ADCs by converting high bandwidth input signals to low bandwidth output signals without loss of information. Analysis of a 10 GHz bandwidth SSH-ADC predicts that 10-bit performance can be achieved with currently available materials and components. SSH-ADC technology is scalable to bandwidths over 100 GHz with recently developed SSH materials. While the SSH-ADC is a transient digitizer, the spatial parallelism of SSH materials can be utilized to enable continuous digitization.

  8. Design and Implementation of a linear-phase equalizer in digital audio signal processing

    NARCIS (Netherlands)

    Slump, Cornelis H.; van Asma, C.G.M.; Barels, J.K.P.; Barels, J.K.P.; Brunink, W.J.A; Drenth, F.B.; Pol, J.V.; Schouten, D.S.; Samsom, M.M.; Samsom, M.M.; Herrmann, O.E.

    1992-01-01

    This contribution presents the four phases of a project aiming at the realization in VLSI of a digital audio equalizer with a linear phase characteristic. The first step includes the identification of the system requirements, based on experience and (psycho-acoustical) literature. Secondly, the

  9. Implementation of Adaptive Digital Controllers on Programmable Logic Devices

    Science.gov (United States)

    Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Monenegro, Justino (Technical Monitor)

    2002-01-01

    Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment

  10. Processors and systems (picture processing)

    Energy Technology Data Exchange (ETDEWEB)

    Gemmar, P

    1983-01-01

    Automatic picture processing requires high performance computers and high transmission capacities in the processor units. The author examines the possibilities of operating processors in parallel in order to accelerate the processing of pictures. He therefore discusses a number of available processors and systems for picture processing and illustrates their capacities for special types of picture processing. He stresses the fact that the amount of storage required for picture processing is exceptionally high. The author concludes that it is as yet difficult to decide whether very large groups of simple processors or highly complex multiprocessor systems will provide the best solution. Both methods will be aided by the development of VLSI. New solutions have already been offered (systolic arrays and 3-d processing structures) but they also are subject to losses caused by inherently parallel algorithms. Greater efforts must be made to produce suitable software for multiprocessor systems. Some possibilities for future picture processing systems are discussed. 33 references.

  11. A high-accuracy optical linear algebra processor for finite element applications

    Science.gov (United States)

    Casasent, D.; Taylor, B. K.

    1984-01-01

    Optical linear processors are computationally efficient computers for solving matrix-matrix and matrix-vector oriented problems. Optical system errors limit their dynamic range to 30-40 dB, which limits their accuray to 9-12 bits. Large problems, such as the finite element problem in structural mechanics (with tens or hundreds of thousands of variables) which can exploit the speed of optical processors, require the 32 bit accuracy obtainable from digital machines. To obtain this required 32 bit accuracy with an optical processor, the data can be digitally encoded, thereby reducing the dynamic range requirements of the optical system (i.e., decreasing the effect of optical errors on the data) while providing increased accuracy. This report describes a new digitally encoded optical linear algebra processor architecture for solving finite element and banded matrix-vector problems. A linear static plate bending case study is described which quantities the processor requirements. Multiplication by digital convolution is explained, and the digitally encoded optical processor architecture is advanced.

  12. Development of an experimental device based on the digitalization of the signal and dedicated to the characterization of fission fragments and prompt neutrons

    International Nuclear Information System (INIS)

    Varapai, N.

    2006-12-01

    The present work demonstrates the application of the digital technique for nuclear measurements. This new technique is based on the digitalization of the signals from the detectors and has several advantages. This technique allows us to extract the maximum amount of information contained in the signal shape. In the case of an ionization chamber this signal contains the necessary information on the particle kinetic energy, emission angle and mass. This method has been implemented for measurements of promptly emitted fission neutrons in coincidence with fission fragments from 252 Cf(sf). A double Frisch-grid ionization chamber is used as fission fragment detector. The promptly emitted neutrons are detected by a NE213 liquid scintillation detector. This work displays how delicate analysis of the digitalized signals permitted us to infer the mass and kinetic energy distributions of the fission fragments as well as the neutron energy spectrum and multiplicity. The outline of this thesis is as follows: Chapter 2 gives an overview of the experimental tools used in this work. Chapter 3 explains the analysis procedure of the digitalized anode signal from an ionization chamber. Chapter 4 gives a detailed explanation of the analysis procedure of the digitalized signal from a neutron detector. In Chapter 5 the analysis procedure of the fission fragment events in coincidence with neutrons is given

  13. Modal Processor Effects Inspired by Hammond Tonewheel Organs

    Directory of Open Access Journals (Sweden)

    Kurt James Werner

    2016-06-01

    Full Text Available In this design study, we introduce a novel class of digital audio effects that extend the recently introduced modal processor approach to artificial reverberation and effects processing. These pitch and distortion processing effects mimic the design and sonics of a classic additive-synthesis-based electromechanical musical instrument, the Hammond tonewheel organ. As a reverb effect, the modal processor simulates a room response as the sum of resonant filter responses. This architecture provides precise, interactive control over the frequency, damping, and complex amplitude of each mode. Into this framework, we introduce two types of processing effects: pitch effects inspired by the Hammond organ’s equal tempered “tonewheels”, “drawbar” tone controls, vibrato/chorus circuit, and distortion effects inspired by the pseudo-sinusoidal shape of its tonewheels and electromagnetic pickup distortion. The result is an effects processor that imprints the Hammond organ’s sonics onto any audio input.

  14. Advanced signal separation and recovery algorithms for digital x-ray spectroscopy

    International Nuclear Information System (INIS)

    Mahmoud, Imbaby I.; El-Tokhy, Mohamed S.

    2015-01-01

    X-ray spectroscopy is widely used for in-situ applications for samples analysis. Therefore, spectrum drawing and assessment of x-ray spectroscopy with high accuracy is the main scope of this paper. A Silicon Lithium Si(Li) detector that cooled with a nitrogen is used for signal extraction. The resolution of the ADC is 12 bits. Also, the sampling rate of ADC is 5 MHz. Hence, different algorithms are implemented. These algorithms were run on a personal computer with Intel core TM i5-3470 CPU and 3.20 GHz. These algorithms are signal preprocessing, signal separation and recovery algorithms, and spectrum drawing algorithm. Moreover, statistical measurements are used for evaluation of these algorithms. Signal preprocessing based on DC-offset correction and signal de-noising is performed. DC-offset correction was done by using minimum value of radiation signal. However, signal de-noising was implemented using fourth order finite impulse response (FIR) filter, linear phase least-square FIR filter, complex wavelet transforms (CWT) and Kalman filter methods. We noticed that Kalman filter achieves large peak signal to noise ratio (PSNR) and lower error than other methods. However, CWT takes much longer execution time. Moreover, three different algorithms that allow correction of x-ray signal overlapping are presented. These algorithms are 1D non-derivative peak search algorithm, second derivative peak search algorithm and extrema algorithm. Additionally, the effect of signal separation and recovery algorithms on spectrum drawing is measured. Comparison between these algorithms is introduced. The obtained results confirm that second derivative peak search algorithm as well as extrema algorithm have very small error in comparison with 1D non-derivative peak search algorithm. However, the second derivative peak search algorithm takes much longer execution time. Therefore, extrema algorithm introduces better results over other algorithms. It has the advantage of recovering and

  15. A technique of scatter and glare correction for videodensitometric studies in digital subtraction videoangiography

    International Nuclear Information System (INIS)

    Shaw, C.G.; Ergun, D.L.; Myerowitz, P.D.; Van Lysel, M.S.; Mistretta, C.A.; Zarnstorff, W.C.; Crummy, A.B.

    1982-01-01

    The logarithmic amplification of video signals and the availability of data in digital form make digital subtraction videoangiography a suitable tool for videodensitometric estimation of physiological quantities. A system for this purpose was implemented with a digital video image processor. However, it was found that the radiation scattering and veiling glare present in the image-intensified video must be removed to make meaningful quantitations. An algorithm to make such a correction was developed and is presented. With this correction, the videodensitometry system was calibrated with phantoms and used to measure the left ventricular ejection fraction of a canine heart

  16. Digital signal processing for the Johnson noise thermometry: a time series analysis of the Johnson noise

    International Nuclear Information System (INIS)

    Moon, Byung Soo; Hwang, In Koo; Chung, Chong Eun; Kwon, Kee Choon; David, E. H.; Kisner, R.A.

    2004-06-01

    In this report, we first proved that a random signal obtained by taking the sum of a set of signal frequency signals generates a continuous Markov process. We used this random signal to simulate the Johnson noise and verified that the Johnson noise thermometry can be used to improve the measurements of the reactor coolant temperature within an accuracy of below 0.14%. Secondly, by using this random signal we determined the optimal sampling rate when the frequency band of the Johnson noise signal is given. Also the results of our examination on how good the linearity of the Johnson noise is and how large the relative error of the temperature could become when the temperature increases are described. Thirdly, the results of our analysis on a set of the Johnson noise signal blocks taken from a simple electric circuit are described. We showed that the properties of the continuous Markov process are satisfied even when some channel noises are present. Finally, we describe the algorithm we devised to handle the problem of the time lag in the long-term average or the moving average in a transient state. The algorithm is based on the Haar wavelet and is to estimate the transient temperature that has much smaller time delay. We have shown that the algorithm can track the transient temperature successfully

  17. Real-time digital signal recovery for a multi-pole low-pass transfer function system.

    Science.gov (United States)

    Lee, Jhinhwan

    2017-08-01

    In order to solve the problems of waveform distortion and signal delay by many physical and electrical systems with multi-pole linear low-pass transfer characteristics, a simple digital-signal-processing (DSP)-based method of real-time recovery of the original source waveform from the distorted output waveform is proposed. A mathematical analysis on the convolution kernel representation of the single-pole low-pass transfer function shows that the original source waveform can be accurately recovered in real time using a particular moving average algorithm applied on the input stream of the distorted waveform, which can also significantly reduce the overall delay time constant. This method is generalized for multi-pole low-pass systems and has noise characteristics of the inverse of the low-pass filter characteristics. This method can be applied to most sensors and amplifiers operating close to their frequency response limits to improve the overall performance of data acquisition systems and digital feedback control systems.

  18. Digital Radiography

    Science.gov (United States)

    1986-01-01

    System One, a digital radiography system, incorporates a reusable image medium (RIM) which retains an image. No film is needed; the RIM is read with a laser scanner, and the information is used to produce a digital image on an image processor. The image is stored on an optical disc. System allows the radiologist to "dial away" unwanted images to compare views on three screens. It is compatible with existing equipment and cost efficient. It was commercialized by a Stanford researcher from energy selective technology developed under a NASA grant.

  19. Robust 9-QAM digital recovery for spectrum shaped coherent QPSK signal

    DEFF Research Database (Denmark)

    Huang, Bo; Zhang, Junwen; Yu, Jianjun

    2013-01-01

    division multiplexing (NWDM). The final equalized signal is detected by maximum likelihood sequence decision (MLSD) for data bit-error-ratio (BER) measurement. Optical signal-to-noise ratio (OSNR) tolerance is improved by 0.5 dB at a BER of 1x10-3 compared to constant modulus algorithm (CMA) plus post......We propose 9-ary quadrature amplitude modulation (9-QAM) data recovery for polarization multiplexing-quadrature phase shift keying (PM-QPSK) signal in presence of strong filtering to approach Nyquist bandwidth. The decision-directed least radius distance (DD-LRD) algorithm for blind equalization...

  20. CMOS time-to-digital converters for mixed-mode signal processing

    OpenAIRE

    Fei Yuan

    2014-01-01

    This study provides an in-depth review of the principles, architectures and design techniques of CMOS time-to-digital converters (TDCs). The classification of TDCs is introduced. It is followed by the examination of the parameters quantifying the performance of TDCs. Sampling TDCs including direct-counter TDCs, tapped delay-line TDCs, pulse-shrinking delay-line TDCs, cyclic pulse-shrinking TDCs, direct-counter TDCs with interpolation, vernier TDCs, flash TDCs, successive approximation TDCs an...

  1. [Improved detection of the pulse oximeter signal with a digital nerve block in patients in poor health status].

    Science.gov (United States)

    Cordoví de Armas, L; Espinaco Valdés, J; Jiménez Paneque, R E; Costa Hidalgo, T; Vallongo Menéndez, M B

    2008-10-01

    To demonstrate the efficacy of a digital nerve block for improving pulse oximetry in conditions of low tissue perfusion. A randomized single-blind study of adult patients undergoing surgery under general anesthesia for conditions characterized by hypoperfusion. Patients were assigned to a control group or an experimental group. The experimental group received a digital nerve block in the middle finger of the left hand; a sensor was then placed on the finger for between 120 and 300 minutes. Age, sex, diagnosis, total observation time (TOT), percentage of time with no pulse oximeter signal (NoPO), and percentage of time with an unstable pulse oximeter signal (UnstPO) were recorded. Each patient was questioned between 16 and 24 hours after surgery and was examined for flushing, paresthesia, hypoesthesia, pain, and ecchymosis. The chi2 test was used to compare dichotomized or nominal variables and the t test was used to compare age, TOT, NoPO, and UnstPO. Values of P<.05 were considered statistically significant in both cases. Fifty patients were randomized to each group. A total of 82 patients remained in the study (control group=42, experimental group=40). There were no significant between-group differences in diagnoses or TOT. The mean values for NoPO and UnstPO were higher in the control group than in the experimental group (11.1% vs 4.4% and 35.9% vs 15.7%, respectively; P<.001). A digital nerve block can be used to prevent pulse oximetry failures in conditions of low peripheral perfusion.

  2. Digital Tracking Array for FM Signals Based on Off-The-Shelf Wireless Technologies

    National Research Council Canada - National Science Library

    Edmund, Hui K

    2007-01-01

    ... a 2.4 GHz frequency modulation (FM) video signal from an unmanned air vehicle. The tracking is done using a monopulse technique Various numbers of elements were simulated to access the pattern coverage...

  3. The DECMU: a digital device for delayed analysis of multi-frequency eddy current signals

    International Nuclear Information System (INIS)

    Pigeon, Michel.

    1981-08-01

    A delayed data analysis system has been realized by the CEA and Intercontrole for in-service inspection of steam generators of nuclear plants by multifrequency eddy current testing. This device allows, out of the plant, adjustment during switching of the probes, graph recording and analysis for defect signal qualification. The equipment contains an analog mixing device, as IC3FA multi-frequency appartus, but has in addition a memory allowing data cycling and signal isolation for adjustment or analysis [fr

  4. Influence of the position of the foot on MRI signal in the deep digital flexor tendon and collateral ligaments of the distal interphalangeal joint in the standing horse.

    Science.gov (United States)

    Spriet, M; Zwingenberger, A

    2009-05-01

    Hyperintense signal is sometimes observed in ligaments and tendons of the equine foot on standing magnetic resonance examination without associated changes in size and shape. In such cases, the presence of a true lesion or an artifact should be considered. A change in position of a ligament or tendon relative to the magnetic field can induce increased signal intensity due to the magic angle effect. To assess if positional rotation of the foot in the solar plane could be responsible for artifactual changes in signal intensity in the collateral ligaments of the distal interphalangeal joint and in the deep digital flexor tendon. Six isolated equine feet were imaged with a standing equine magnetic resonance system in 9 different positions with different degrees of rotation in the solar plane. Rotation of the limb induced a linear hyperintense signal on all feet at the palmar aspect of one of the lobes of the deep digital flexor tendon and at the dorsal aspect of the other lobe. Changes in signal intensity in the collateral ligaments of the distal interphalangeal joint occurred with rotation of the limb only in those feet where mediolateral hoof imbalance was present. The position and conformation of the foot influence the signal intensity in the deep digital flexor tendon and in the collateral ligaments of the distal interphalangeal joint. The significance of increased signal intensity in the deep digital flexor tendon and in the collateral ligaments of the distal interphalangeal joint should be interpreted with regard to the position and the conformation of the foot.

  5. Architecture for a 1-GHz Digital RADAR

    Science.gov (United States)

    Mallik, Udayan

    2011-01-01

    An architecture for a Direct RF-digitization Type Digital Mode RADAR was developed at GSFC in 2008. Two variations of a basic architecture were developed for use on RADAR imaging missions using aircraft and spacecraft. Both systems can operate with a pulse repetition rate up to 10 MHz with 8 received RF samples per pulse repetition interval, or at up to 19 kHz with 4K received RF samples per pulse repetition interval. The first design describes a computer architecture for a Continuous Mode RADAR transceiver with a real-time signal processing and display architecture. The architecture can operate at a high pulse repetition rate without interruption for an infinite amount of time. The second design describes a smaller and less costly burst mode RADAR that can transceive high pulse repetition rate RF signals without interruption for up to 37 seconds. The burst-mode RADAR was designed to operate on an off-line signal processing paradigm. The temporal distribution of RF samples acquired and reported to the RADAR processor remains uniform and free of distortion in both proposed architectures. The majority of the RADAR's electronics is implemented in digital CMOS (complementary metal oxide semiconductor), and analog circuits are restricted to signal amplification operations and analog to digital conversion. An implementation of the proposed systems will create a 1-GHz, Direct RF-digitization Type, L-Band Digital RADAR--the highest band achievable for Nyquist Rate, Direct RF-digitization Systems that do not implement an electronic IF downsample stage (after the receiver signal amplification stage), using commercially available off-the-shelf integrated circuits.

  6. Dual beam vidicon digitizer

    International Nuclear Information System (INIS)

    Evans, T.L.

    1976-01-01

    A vidicon waveform digitizer which can simultaneously digitize two independent signals has been developed. Either transient or repetitive waveforms can be digitized with this system. A dual beam oscilloscope is used as the signal input device. The light from the oscilloscope traces is optically coupled to a television camera, where the signals are temporarily stored prior to digitizing

  7. Time signal distribution in communication networks based on synchronous digital hierarchy

    Science.gov (United States)

    Imaoka, Atsushi; Kihara, Masami

    1993-01-01

    A new method that uses round-trip paths to accurately measure transmission delay for time synchronization is proposed. The performance of the method in Synchronous Digital Hierarchy networks is discussed. The feature of this method is that it separately measures the initial round trip path delay and the variations in round-trip path delay. The delay generated in SDH equipment is determined by measuring the initial round-trip path delay. In an experiment with actual SDH equipment, the error of initial delay measurement was suppressed to 30ns.

  8. Real-time wavefront processors for the next generation of adaptive optics systems: a design and analysis

    Science.gov (United States)

    Truong, Tuan; Brack, Gary L.; Troy, Mitchell; Trinh, Thang; Shi, Fang; Dekany, Richard G.

    2003-02-01

    Adaptive optics (AO) systems currently under investigation will require at least two orders of magitude increase in the number of actuators, which in turn translates to effectively a 104 increase in compute latency. Since the performance of an AO system invariably improves as the compute latency decreases, it is important to study how today's computer systems will scale to address this expected increase in actuator utilization. This paper answers this question by characterizing the performance of a single deformable mirror (DM) Shack-Hartmann natural guide star AO system implemented on the present-generation digital signal processor (DSP) TMS320C6701 from Texas Instruments. We derive the compute latency of such a system in terms of a few basic parameters, such as the number of DM actuators, the number of data channels used to read out the camera pixels, the number of DSPs, the available memory bandwidth, as well as the inter-processor communication (IPC) bandwidth and the pixel transfer rate. We show how the results would scale for future systems that utilizes multiple DMs and guide stars. We demonstrate that the principal performance bottleneck of such a system is the available memory bandwidth of the processors and to lesser extent the IPC bandwidth. This paper concludes with suggestions for mitigating this bottleneck.

  9. [Improving speech comprehension using a new cochlear implant speech processor].

    Science.gov (United States)

    Müller-Deile, J; Kortmann, T; Hoppe, U; Hessel, H; Morsnowski, A

    2009-06-01

    The aim of this multicenter clinical field study was to assess the benefits of the new Freedom 24 sound processor for cochlear implant (CI) users implanted with the Nucleus 24 cochlear implant system. The study included 48 postlingually profoundly deaf experienced CI users who demonstrated speech comprehension performance with their current speech processor on the Oldenburg sentence test (OLSA) in quiet conditions of at least 80% correct scores and who were able to perform adaptive speech threshold testing using the OLSA in noisy conditions. Following baseline measures of speech comprehension performance with their current speech processor, subjects were upgraded to the Freedom 24 speech processor. After a take-home trial period of at least 2 weeks, subject performance was evaluated by measuring the speech reception threshold with the Freiburg multisyllabic word test and speech intelligibility with the Freiburg monosyllabic word test at 50 dB and 70 dB in the sound field. The results demonstrated highly significant benefits for speech comprehension with the new speech processor. Significant benefits for speech comprehension were also demonstrated with the new speech processor when tested in competing background noise.In contrast, use of the Abbreviated Profile of Hearing Aid Benefit (APHAB) did not prove to be a suitably sensitive assessment tool for comparative subjective self-assessment of hearing benefits with each processor. Use of the preprocessing algorithm known as adaptive dynamic range optimization (ADRO) in the Freedom 24 led to additional improvements over the standard upgrade map for speech comprehension in quiet and showed equivalent performance in noise. Through use of the preprocessing beam-forming algorithm BEAM, subjects demonstrated a highly significant improved signal-to-noise ratio for speech comprehension thresholds (i.e., signal-to-noise ratio for 50% speech comprehension scores) when tested with an adaptive procedure using the Oldenburg

  10. 76 FR 38306 - Digital Television Signals Pursuant to the Satellite Home Viewer Extension and Reauthorization...

    Science.gov (United States)

    2011-06-30

    ... contact Cathy Williams on (202) 418-2918 or via e-mail to: cathy.williams@fcc.gov mailto: cathy.williams... strength that a household received. The information gathered as part of the Grade B signal strength tests... written records of test results will be made after testing and predicting the strength of a television...

  11. Digital signal processing in ultrasonic based navigation system for mobile robots

    Directory of Open Access Journals (Sweden)

    Stączek Paweł

    2017-01-01

    Full Text Available A system for estimating the coordinates of automated guided vehicles (AGV was presented in this article. Ultrasonic waves for distance measurement were applied. Used hardware was characterised, as well as signal processing algorithms. The system was tested on wheeled mobile robot in model 2D environment. The results of working range and errors of position estimation were discussed.

  12. XL-100S microprogrammable processor

    International Nuclear Information System (INIS)

    Gorbunov, N.V.; Guzik, Z.; Sutulin, V.A.; Forytski, A.

    1983-01-01

    The XL-100S microprogrammable processor providing the multiprocessor operation mode in the XL system crate is described. The processor meets the EUR 6500 CAMAC standards, address up to 4 Mbyte memory, and interacts with 7 CAMAC branchas. Eight external requests initiate operations preset by a sequence of microcommands in a memory of the capacity up to 64 kwords of 32-Git. The microprocessor architecture allows one to emulate commands of the majority of mini- or micro-computers, including floating point operations. The XL-100S processor may be used in various branches of experimental physics: for physical experiment apparatus control, fast selection of useful physical events, organization of the of input/output operations, organization of direct assess to memory included, etc. The Am2900 microprocessor set is used as an elementary base. The device is made in the form of a single width CAMAC module

  13. Making CSB + -Trees Processor Conscious

    DEFF Research Database (Denmark)

    Samuel, Michael; Pedersen, Anders Uhl; Bonnet, Philippe

    2005-01-01

    of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose......Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance...... a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager....

  14. Java Processor Optimized for RTSJ

    Directory of Open Access Journals (Sweden)

    Tu Shiliang

    2007-01-01

    Full Text Available Due to the preeminent work of the real-time specification for Java (RTSJ, Java is increasingly expected to become the leading programming language in real-time systems. To provide a Java platform suitable for real-time applications, a Java processor which can execute Java bytecode is directly proposed in this paper. It provides efficient support in hardware for some mechanisms specified in the RTSJ and offers a simpler programming model through ameliorating the scoped memory of the RTSJ. The worst case execution time (WCET of the bytecodes implemented in this processor is predictable by employing the optimization method proposed in our previous work, in which all the processing interfering predictability is handled before bytecode execution. Further advantage of this method is to make the implementation of the processor simpler and suited to a low-cost FPGA chip.

  15. An effective coded excitation scheme based on a predistorted FM signal and an optimized digital filter

    DEFF Research Database (Denmark)

    Misaridis, Thanasis; Jensen, Jørgen Arendt

    1999-01-01

    This paper presents a coded excitation imaging system based on a predistorted FM excitation and a digital compression filter designed for medical ultrasonic applications, in order to preserve both axial resolution and contrast. In radars, optimal Chebyshev windows efficiently weight a nearly...... as with pulse excitation (about 1.5 lambda), depending on the filter design criteria. The axial sidelobes are below -40 dB, which is the noise level of the measuring imaging system. The proposed excitation/compression scheme shows good overall performance and stability to the frequency shift due to attenuation...... be removed by weighting. We show that by using a predistorted chirp with amplitude or phase shaping for amplitude ripple reduction and a correlation filter that accounts for the transducer's natural frequency weighting, output sidelobe levels of -35 to -40 dB are directly obtained. When an optimized filter...

  16. IIR digital filter design for powerline noise cancellation of ECG signal using arduino platform

    Science.gov (United States)

    Rahmatillah, Akif; Ataulkarim

    2017-05-01

    Powerline noise has been one of significant noises of Electrocardiogram (ECG) signal measurement. This noise is characterized by a sinusoidal signal which has 50 Hz of noise and 0.3 mV of maximum amplitude. This paper describes the design of IIR Notch filter design to reject a 50 Hz power line noise. IIR filter coefficients were calculated using pole placement method with three variations of band stop cut off frequencies of (49-51)Hz, (48 - 52)Hz, and (47 - 53)Hz. The algorithm and coefficients of filter were embedded to Arduino DUE (ARM 32 bit microcontroller). IIR notch filter designed has been able to reject power line noise with average square of error value of 0.225 on (49-51) Hz filter design and 0.2831 on (48 - 52)Hz filter design.

  17. Digital mammography: Signal-extraction strategies for computer-aided detection of microcalcifications

    International Nuclear Information System (INIS)

    Chan, H.P.; Doi, K.; Metz, C.E.; Vyborny, C.J.; Lam, K.L.; Schmidt, R.A.

    1987-01-01

    The authors found that the structured background of a mammogram can be removed effectively by either a difference-image technique (using a matched filter in combination with a median filter, a contrast-reversal filter, or a box-rim filter) or a visual response filter alone. Locally adaptive gray-level thresholding and region-growing techniques can then be employed to extract microcalcifications from the processed image. Signals are further distinguished from noise or artifacts by their size, contrast, and clustering properties. The authors studied the dependence of the detectability of microcalcifications on the various signal-extraction strategies. Potential application of the computer-aided system to mammography is assessed by its performance on clinical mammograms

  18. ARM Processor Based Embedded System for Remote Data Acquisition

    OpenAIRE

    Raj Kumar Tiwari; Santosh Kumar Agrahari

    2014-01-01

    The embedded systems are widely used for the data acquisition. The data acquired may be used for monitoring various activity of the system or it can be used to control the parts of the system. Accessing various signals with remote location has greater advantage for multisite operation or unmanned systems. The remote data acquisition used in this paper is based on ARM processor. The Cortex M3 processor used in this system has in-built Ethernet controller which facilitate to acquire the remote ...

  19. Band extension in digital methods of transfer function determination – signal conditioners asymmetry error corrections

    Directory of Open Access Journals (Sweden)

    Zbigniew Staroszczyk

    2014-12-01

    Full Text Available [b]Abstract[/b]. In the paper, the calibrating method for error correction in transfer function determination with the use of DSP has been proposed. The correction limits/eliminates influence of transfer function input/output signal conditioners on the estimated transfer functions in the investigated object. The method exploits frequency domain conditioning paths descriptor found during training observation made on the known reference object.[b]Keywords[/b]: transfer function, band extension, error correction, phase errors

  20. Optical Array Processor: Laboratory Results

    Science.gov (United States)

    Casasent, David; Jackson, James; Vaerewyck, Gerard

    1987-01-01

    A Space Integrating (SI) Optical Linear Algebra Processor (OLAP) is described and laboratory results on its performance in several practical engineering problems are presented. The applications include its use in the solution of a nonlinear matrix equation for optimal control and a parabolic Partial Differential Equation (PDE), the transient diffusion equation with two spatial variables. Frequency-multiplexed, analog and high accuracy non-base-two data encoding are used and discussed. A multi-processor OLAP architecture is described and partitioning and data flow issues are addressed.

  1. Fast processor for dilepton triggers

    International Nuclear Information System (INIS)

    Katsanevas, S.; Kostarakis, P.; Baltrusaitis, R.

    1983-01-01

    We describe a fast trigger processor, developed for and used in Fermilab experiment E-537, for selecting high-mass dimuon events produced by negative pions and anti-protons. The processor finds candidate tracks by matching hit information received from drift chambers and scintillation counters, and determines their momenta. Invariant masses are calculated for all possible pairs of tracks and an event is accepted if any invariant mass is greater than some preselectable minimum mass. The whole process, accomplished within 5 to 10 microseconds, achieves up to a ten-fold reduction in trigger rate

  2. A user configurable data acquisition and signal processing system for high-rate, high channel count applications

    International Nuclear Information System (INIS)

    Salim, Arwa; Crockett, Louise; McLean, John; Milne, Peter

    2012-01-01

    Highlights: ► The development of a new digital signal processing platform is described. ► The system will allow users to configure the real-time signal processing through software routines. ► The architecture of the DRUID system and signal processing elements is described. ► A prototype of the DRUID system has been developed for the digital chopper-integrator. ► The results of acquisition on 96 channels at 500 kSamples/s per channel are presented. - Abstract: Real-time signal processing in plasma fusion experiments is required for control and for data reduction as plasma pulse times grow longer. The development time and cost for these high-rate, multichannel signal processing systems can be significant. This paper proposes a new digital signal processing (DSP) platform for the data acquisition system that will allow users to easily customize real-time signal processing systems to meet their individual requirements. The D-TACQ reconfigurable user in-line DSP (DRUID) system carries out the signal processing tasks in hardware co-processors (CPs) implemented in an FPGA, with an embedded microprocessor (μP) for control. In the fully developed platform, users will be able to choose co-processors from a library and configure programmable parameters through the μP to meet their requirements. The DRUID system is implemented on a Spartan 6 FPGA, on the new rear transition module (RTM-T), a field upgrade to existing D-TACQ digitizers. As proof of concept, a multiply-accumulate (MAC) co-processor has been developed, which can be configured as a digital chopper-integrator for long pulse magnetic fusion devices. The DRUID platform allows users to set options for the integrator, such as the number of masking samples. Results from the digital integrator are presented for a data acquisition system with 96 channels simultaneously acquiring data at 500 kSamples/s per channel.

  3. Determination of poles and zeroes using SAVOSIM for digital impulse-shaping

    International Nuclear Information System (INIS)

    Mohamad Idris Taib; Abu Bakar Ghazali; Salina Abdul Samad; Azah Mohamed

    2002-01-01

    Digital impulse pulse-shaping can be used to correct the pile-up for pulse-height (Energy) analyzer because of its fast processing speed. In this initial work on digital impulse pulse-shaping, a study is made on the input signals obtained from combination of preamplifier and prefilter of nuclear instrumentation with specific and general transfer function. Three types of pulses that are commonly produced by a nuclear detection preamplifier and prefilter are used for this application. For the determination of zeros and poles in z-transform, the summation of absolute value of output signal is minimum (SAVOSIM) method is used. Simulations for this type of signal are carried out using the MATLAB software and the TMS320C6701 evaluation module and the results are presented in this paper. Initial results show that the method can be expanded to design and develop for a nuclear spectroscopy based on digital signal processor. (Author)

  4. Digital signal processing for a thermal neutron detector using ZnS(Ag):{sup 6}LiF scintillating layers read out with WLS fibers and SiPMs

    Energy Technology Data Exchange (ETDEWEB)

    Mosset, J.-B., E-mail: jean-baptiste.mosset@psi.ch; Stoykov, A.; Greuter, U.; Hildebrandt, M.; Schlumpf, N.

    2016-07-11

    We present a digital signal processing system based on a photon counting approach which we developed for a thermal neutron detector consisting of ZnS(Ag):{sup 6}LiF scintillating layers read out with WLS fibers and SiPMs. Three digital filters have been evaluated: a moving sum, a moving sum after differentiation and a digital CR-RC{sup 4} filter. The performances of the detector with these filters are presented. A full analog signal processing using a CR-RC{sup 4} filter has been emulated digitally. The detector performance obtained with this analog approach is compared with the one obtained with the best performing digital approach. - Highlights: • Application of digital signal processing for a SiPM-based ZnS:6LiF neutron detector. • Optimisation of detector performances with 3 different digital filters. • Comparison with detector performances with a full analog signal processing.

  5. Negative base encoding in optical linear algebra processors

    Science.gov (United States)

    Perlee, C.; Casasent, D.

    1986-01-01

    In the digital multiplication by analog convolution algorithm, the bits of two encoded numbers are convolved to form the product of the two numbers in mixed binary representation; this output can be easily converted to binary. Attention is presently given to negative base encoding, treating base -2 initially, and then showing that the negative base system can be readily extended to any radix. In general, negative base encoding in optical linear algebra processors represents a more efficient technique than either sign magnitude or 2's complement encoding, when the additions of digitally encoded products are performed in parallel.

  6. A Bayesian sequential processor approach to spectroscopic portal system decisions

    Energy Technology Data Exchange (ETDEWEB)

    Sale, K; Candy, J; Breitfeller, E; Guidry, B; Manatt, D; Gosnell, T; Chambers, D

    2007-07-31

    The development of faster more reliable techniques to detect radioactive contraband in a portal type scenario is an extremely important problem especially in this era of constant terrorist threats. Towards this goal the development of a model-based, Bayesian sequential data processor for the detection problem is discussed. In the sequential processor each datum (detector energy deposit and pulse arrival time) is used to update the posterior probability distribution over the space of model parameters. The nature of the sequential processor approach is that a detection is produced as soon as it is statistically justified by the data rather than waiting for a fixed counting interval before any analysis is performed. In this paper the Bayesian model-based approach, physics and signal processing models and decision functions are discussed along with the first results of our research.

  7. Embedded Processor Based Automatic Temperature Control of VLSI Chips

    Directory of Open Access Journals (Sweden)

    Narasimha Murthy Yayavaram

    2009-01-01

    Full Text Available This paper presents embedded processor based automatic temperature control of VLSI chips, using temperature sensor LM35 and ARM processor LPC2378. Due to the very high packing density, VLSI chips get heated very soon and if not cooled properly, the performance is very much affected. In the present work, the sensor which is kept very near proximity to the IC will sense the temperature and the speed of the fan arranged near to the IC is controlled based on the PWM signal generated by the ARM processor. A buzzer is also provided with the hardware, to indicate either the failure of the fan or overheating of the IC. The entire process is achieved by developing a suitable embedded C program.

  8. Low-voltage analog front-end processor design for ISFET-based sensor and H+ sensing applications

    Science.gov (United States)

    Chung, Wen-Yaw; Yang, Chung-Huang; Peng, Kang-Chu; Yeh, M. H.

    2003-04-01

    This paper presents a modular-based low-voltage analog-front-end processor design in a 0.5mm double-poly double-metal CMOS technology for Ion Sensitive Field Effect Transistor (ISFET)-based sensor and H+ sensing applications. To meet the potentiometric response of the ISFET that is proportional to various H+ concentrations, the constant-voltage and constant current (CVCS) testing configuration has been used. Low-voltage design skills such as bulk-driven input pair, folded-cascode amplifier, bootstrap switch control circuits have been designed and integrated for 1.5V supply and nearly rail-to-rail analog to digital signal processing. Core modules consist of an 8-bit two-step analog-digital converter and bulk-driven pre-amplifiers have been developed in this research. The experimental results show that the proposed circuitry has an acceptable linearity to 0.1 pH-H+ sensing conversions with the buffer solution in the range of pH2 to pH12. The processor has a potential usage in battery-operated and portable healthcare devices and environmental monitoring applications.

  9. 'Iconic' tracking algorithms for high energy physics using the TRAX-I massively parallel processor

    International Nuclear Information System (INIS)

    Vesztergombi, G.

    1989-01-01

    TRAX-I, a cost-effective parallel microcomputer, applying associative string processor (ASP) architecture with 16 K parallel processing elements, is being built by Aspex Microsystems Ltd. (UK). When applied to the tracking problem of very complex events with several hundred tracks, the large number of processors allows one to dedicate one or more processors to each wire (in MWPC), each pixel (in digitized images from streamer chambers or other visual detectors), or each pad (in TPC) to perform very efficient pattern recognition. Some linear tracking algorithms based on this ''ionic'' representation are presented. (orig.)

  10. 'Iconic' tracking algorithms for high energy physics using the TRAX-I massively parallel processor

    International Nuclear Information System (INIS)

    Vestergombi, G.

    1989-11-01

    TRAX-I, a cost-effective parallel microcomputer, applying Associative String Processor (ASP) architecture with 16 K parallel processing elements, is being built by Aspex Microsystems Ltd. (UK). When applied to the tracking problem of very complex events with several hundred tracks, the large number of processors allows one to dedicate one or more processors to each wire (in MWPC), each pixel (in digitized images from streamer chambers or other visual detectors), or each pad (in TPC) to perform very efficient pattern recognition. Some linear tracking algorithms based on this 'iconic' representation are presented. (orig.)

  11. Very Long Instruction Word Processors

    Indian Academy of Sciences (India)

    Explicitly Parallel Instruction Computing (EPIC) is an instruction processing paradigm that has been in the spot- light due to its adoption by the next generation of Intel. Processors starting with the IA-64. The EPIC processing paradigm is an evolution of the Very Long Instruction. Word (VLIW) paradigm. This article gives an ...

  12. A programmable systolic trigger processor for FERA bus data

    International Nuclear Information System (INIS)

    Appelquist, G.; Hovander, B.; Sellden, B.; Bohm, C.

    1992-09-01

    A generic CAMAC based trigger processor module for fast processing of large amounts of ADC data, has been designed. This module has been realised using complex programmable gate arrays (LCAs from XILINX). The gate arrays have been connected to memories and multipliers in such a way that different gate array configurations can cover a wide range of module applications. Using this module, it is possible to construct complex trigger processors. The module uses both the fast ECL FERA bus and the CAMAC bus for inputs and outputs. The latter, however, is primarily used for set-up and control but may also be used for data output. Large numbers of ADCs can be served by a hierarchical arrangement of trigger processor modules, processing ADC data with pipe-line arithmetics producing the final result at the apex of the pyramid. The trigger decision will be transmitted to the data acquisition system via a logic signal while numeric results may be extracted by the CAMAC controller. The trigger processor was originally developed for the proposed neutral particle search experiment at CERN, NUMASS. There it was designed to serve as a second level trigger processor. It was required to correct all ADC raw data for efficiency and pedestal, calculate the total calorimeter energy, obtain the optimal time of flight data and calculate the particle mass. A suitable mass cut would then deliver the trigger decision. More complex triggers were also considered. (au)

  13. Improvement of the real-time processor in JT-60 data processing system

    International Nuclear Information System (INIS)

    Sakata, S.; Kiyono, K.; Sato, M.; Kominato, T.; Sueoka, M.; Hosoyama, H.; Kawamata, Y.

    2009-01-01

    Real-time processor, RTP is a basic subsystem in the JT-60 data processing system and plays an important role in JT-60 feedback control for plasma experiment. During the experiment, RTP acquires various diagnostic signals, processes them into a form of physical values, and transfers them as sensor signals to the particle supply and heating control supervisor for feedback control via reflective memory synchronization with 1 ms clock signals. After the start of RTP operation in 1997, to meet the demand for advanced plasma experiment, RTP had been improved continuously such as by addition of diagnostic signals with faster digitizers, reducing time for data transfer utilizing reflective memory instead of CAMAC. However, it is becoming increasingly difficult to maintain, manage, and improve the outdated RTP with limited system CPU capability. Currently, a prototype RTP system is being developed for the next real-time processing system, which is composed of clustered system utilizing VxWorks computer. The processes on the existing RTP system will be decentralized to the VxWorks computer to solve the issues of the existing RTP system. The prototype RTP system will start to operate in August 2008.

  14. A Two-Stage Reconstruction Processor for Human Detection in Compressive Sensing CMOS Radar.

    Science.gov (United States)

    Tsao, Kuei-Chi; Lee, Ling; Chu, Ta-Shun; Huang, Yuan-Hao

    2018-04-05

    Complementary metal-oxide-semiconductor (CMOS) radar has recently gained much research attraction because small and low-power CMOS devices are very suitable for deploying sensing nodes in a low-power wireless sensing system. This study focuses on the signal processing of a wireless CMOS impulse radar system that can detect humans and objects in the home-care internet-of-things sensing system. The challenges of low-power CMOS radar systems are the weakness of human signals and the high computational complexity of the target detection algorithm. The compressive sensing-based detection algorithm can relax the computational costs by avoiding the utilization of matched filters and reducing the analog-to-digital converter bandwidth requirement. The orthogonal matching pursuit (OMP) is one of the popular signal reconstruction algorithms for compressive sensing radar; however, the complexity is still very high because the high resolution of human respiration leads to high-dimension signal reconstruction. Thus, this paper proposes a two-stage reconstruction algorithm for compressive sensing radar. The proposed algorithm not only has lower complexity than the OMP algorithm by 75% but also achieves better positioning performance than the OMP algorithm especially in noisy environments. This study also designed and implemented the algorithm by using Vertex-7 FPGA chip (Xilinx, San Jose, CA, USA). The proposed reconstruction processor can support the 256 × 13 real-time radar image display with a throughput of 28.2 frames per second.

  15. A Two-Stage Reconstruction Processor for Human Detection in Compressive Sensing CMOS Radar

    Directory of Open Access Journals (Sweden)

    Kuei-Chi Tsao

    2018-04-01

    Full Text Available Complementary metal-oxide-semiconductor (CMOS radar has recently gained much research attraction because small and low-power CMOS devices are very suitable for deploying sensing nodes in a low-power wireless sensing system. This study focuses on the signal processing of a wireless CMOS impulse radar system that can detect humans and objects in the home-care internet-of-things sensing system. The challenges of low-power CMOS radar systems are the weakness of human signals and the high computational complexity of the target detection algorithm. The compressive sensing-based detection algorithm can relax the computational costs by avoiding the utilization of matched filters and reducing the analog-to-digital converter bandwidth requirement. The orthogonal matching pursuit (OMP is one of the popular signal reconstruction algorithms for compressive sensing radar; however, the complexity is still very high because the high resolution of human respiration leads to high-dimension signal reconstruction. Thus, this paper proposes a two-stage reconstruction algorithm for compressive sensing radar. The proposed algorithm not only has lower complexity than the OMP algorithm by 75% but also achieves better positioning performance than the OMP algorithm especially in noisy environments. This study also designed and implemented the algorithm by using Vertex-7 FPGA chip (Xilinx, San Jose, CA, USA. The proposed reconstruction processor can support the 256 × 13 real-time radar image display with a throughput of 28.2 frames per second.

  16. Satellite on-board real-time SAR processor prototype

    Science.gov (United States)

    Bergeron, Alain; Doucet, Michel; Harnisch, Bernd; Suess, Martin; Marchese, Linda; Bourqui, Pascal; Desnoyers, Nicholas; Legros, Mathieu; Guillot, Ludovic; Mercier, Luc; Châteauneuf, François

    2017-11-01

    A Compact Real-Time Optronic SAR Processor has been successfully developed and tested up to a Technology Readiness Level of 4 (TRL4), the breadboard validation in a laboratory environment. SAR, or Synthetic Aperture Radar, is an active system allowing day and night imaging independent of the cloud coverage of the planet. The SAR raw data is a set of complex data for range and azimuth, which cannot be compressed. Specifically, for planetary missions and unmanned aerial vehicle (UAV) systems with limited communication data rates this is a clear disadvantage. SAR images are typically processed electronically applying dedicated Fourier transformations. This, however, can also be performed optically in real-time. Originally the first SAR images were optically processed. The optical Fourier processor architecture provides inherent parallel computing capabilities allowing real-time SAR data processing and thus the ability for compression and strongly reduced communication bandwidth requirements for the satellite. SAR signal return data are in general complex data. Both amplitude and phase must be combined optically in the SAR processor for each range and azimuth pixel. Amplitude and phase are generated by dedicated spatial light modulators and superimposed by an optical relay set-up. The spatial light modulators display the full complex raw data information over a two-dimensional format, one for the azimuth and one for the range. Since the entire signal history is displayed at once, the processor operates in parallel yielding real-time performances, i.e. without resulting bottleneck. Processing of both azimuth and range information is performed in a single pass. This paper focuses on the onboard capabilities of the compact optical SAR processor prototype that allows in-orbit processing of SAR images. Examples of processed ENVISAT ASAR images are presented. Various SAR processor parameters such as processing capabilities, image quality (point target analysis), weight and

  17. Feedback correction of injection errors using digital signal-processing techniques

    Directory of Open Access Journals (Sweden)

    N. S. Sereno

    2007-01-01

    Full Text Available Efficient transfer of electron beams from one accelerator to another is important for 3rd-generation light sources that operate using top-up. In top-up mode, a constant amount of charge is injected at regular intervals into the storage ring to replenish beam lost primarily due to Touschek scattering. Top-up therefore requires that the complex of injector accelerators that fill the storage ring transport beam with a minimum amount of loss. Injection can be a source of significant beam loss if not carefully controlled. In this note we describe a method of processing injection transient signals produced by beam-position monitors and using the processed data in feedback. Feedback control using the technique described here has been incorporated in the Advanced Photon Source (APS booster synchrotron to correct injection transients.

  18. An efficient digital signal processing method for RRNS-based DS-CDMA systems

    Directory of Open Access Journals (Sweden)

    Peter Olsovsky

    2017-09-01

    Full Text Available This paper deals with an efficient method for achieving low power and high speed in advanced Direct-Sequence Code Division Multiple-Access (DS-CDMA wireless communication systems based on the Residue Number System (RNS. A modified algorithm for multiuser DS-CDMA signal generation in MATLAB is proposed and investigated. The most important characteristics of the generated PN code are also presented. Subsequently, a DS-CDMA system based on the combination of the RNS or the so-called Redundant Residue Number System (RRNS is proposed. The enhanced method using a spectrally efficient 8-PSK data modulation scheme to improve the bandwidth efficiency for RRNS-based DS-CDMA systems is presented. By using the C-measure (complexity measure of the error detection function, it is possible to estimate the size of the circuit. Error detection function in RRNSs can be efficiently implemented by LookUp Table (LUT cascades.

  19. Design Principles for Synthesizable Processor Cores

    DEFF Research Database (Denmark)

    Schleuniger, Pascal; McKee, Sally A.; Karlsson, Sven

    2012-01-01

    As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput...

  20. Coherent time-stretch transformation for real-time capture of wideband signals.

    Science.gov (United States)

    Buckley, Brandon W; Madni, Asad M; Jalali, Bahram

    2013-09-09

    Time stretch transformation of wideband waveforms boosts the performance of analog-to-digital converters and digital signal processors by slowing down analog electrical signals before digitization. The transform is based on dispersive Fourier transformation implemented in the optical domain. A coherent receiver would be ideal for capturing the time-stretched optical signal. Coherent receivers offer improved sensitivity, allow for digital cancellation of dispersion-induced impairments and optical nonlinearities, and enable decoding of phase-modulated optical data formats. Because time-stretch uses a chirped broadband (>1 THz) optical carrier, a new coherent detection technique is required. In this paper, we introduce and demonstrate coherent time stretch transformation; a technique that combines dispersive Fourier transform with optically broadband coherent detection.