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Sample records for circuits fully integrated

  1. Fully integrated quantum photonic circuit with an electrically driven light source

    Science.gov (United States)

    Khasminskaya, Svetlana; Pyatkov, Felix; Słowik, Karolina; Ferrari, Simone; Kahl, Oliver; Kovalyuk, Vadim; Rath, Patrik; Vetter, Andreas; Hennrich, Frank; Kappes, Manfred M.; Gol'Tsman, G.; Korneev, A.; Rockstuhl, Carsten; Krupke, Ralph; Pernice, Wolfram H. P.

    2016-11-01

    Photonic quantum technologies allow quantum phenomena to be exploited in applications such as quantum cryptography, quantum simulation and quantum computation. A key requirement for practical devices is the scalable integration of single-photon sources, detectors and linear optical elements on a common platform. Nanophotonic circuits enable the realization of complex linear optical systems, while non-classical light can be measured with waveguide-integrated detectors. However, reproducible single-photon sources with high brightness and compatibility with photonic devices remain elusive for fully integrated systems. Here, we report the observation of antibunching in the light emitted from an electrically driven carbon nanotube embedded within a photonic quantum circuit. Non-classical light generated on chip is recorded under cryogenic conditions with waveguide-integrated superconducting single-photon detectors, without requiring optical filtering. Because exclusively scalable fabrication and deposition methods are used, our results establish carbon nanotubes as promising nanoscale single-photon emitters for hybrid quantum photonic devices.

  2. A compact picosecond pulsed laser source using a fully integrated CMOS driver circuit

    Science.gov (United States)

    He, Yuting; Li, Yuhua; Yadid-Pecht, Orly

    2016-03-01

    Picosecond pulsed laser source have applications in areas such as optical communications, biomedical imaging and supercontinuum generation. Direct modulation of a laser diode with ultrashort current pulses offers a compact and efficient approach to generate picosecond laser pulses. A fully integrated complementary metaloxide- semiconductor (CMOS) driver circuit is designed and applied to operate a 4 GHz distributed feedback laser (DFB). The CMOS driver circuit combines sub-circuits including a voltage-controlled ring oscillator, a voltagecontrolled delay line, an exclusive-or (XOR) circuit and a current source circuit. Ultrashort current pulses are generated by the XOR circuit when the delayed square wave is XOR'ed with the original square wave from the on-chip oscillator. Circuit post-layout simulation shows that output current pulses injected into an equivalent circuit load of the laser have a pulse full width at half maximum (FWHM) of 200 ps, a peak current of 80 mA and a repetition rate of 5.8 MHz. This driver circuit is designed in a 0.13 μm CMOS process and taped out on a 0.3 mm2 chip area. This CMOS chip is packaged and interconnected with the laser diode on a printed circuit board (PCB). The optical output waveform from the laser source is captured by a 5 GHz bandwidth photodiode and an 8 GHz bandwidth oscilloscope. Measured results show that the proposed laser source can output light pulses with a pulse FWHM of 151 ps, a peak power of 6.4 mW (55 mA laser peak forward current) and a repetition rate of 5.3 MHz.

  3. A fully integral, differential, high-speed, low-power consumption CMOS recovery clock circuit

    Directory of Open Access Journals (Sweden)

    Daniel Pacheco Bautista

    2010-04-01

    Full Text Available The clock recovery circuit (CRC plays a fundamental role in electronic information recovery systems (hard disks, DVD and CD read/writeable units and baseband digital communication systems in recovering the clock signal contained in the received data. This signal is necessary for synchronising subsequent information processing. Nowadays, this task is difficult to achieve because of the data’s random nature and its high transfer rate. This paper presents the design of a high-performance integral CMOS technology clock recovery circuit (CRC wor-king at 1.2 Gbps and only consuming 17.4 mW using a 3.3V power supply. The circuit was fully differentially designed to obtain high performance. Circuit architecture was based on a conventional phase lock loop (PLL, current mode logic (MCML and a novel two stage ring-based voltage controlled oscillator (VCO. The design used 0.35 μm CMOS AMS process parameters. Hspice simulation results proved the circuit’s high performance, achieving tracking in less than 300 ns.

  4. A multi-channel fully differential programmable integrated circuit for neural recording application

    Science.gov (United States)

    Yun, Gui; Xu, Zhang; Yuan, Wang; Ming, Liu; Weihua, Pei; Kai, Liang; Suibiao, Huang; Bin, Li; Hongda, Chen

    2013-10-01

    A multi-channel, fully differential programmable chip for neural recording application is presented. The integrated circuit incorporates eight neural recording amplifiers with tunable bandwidth and gain, eight 4th-order Bessel switch capacitor filters, an 8-to-1 analog time-division multiplexer, a fully differential successive approximation register analog-to-digital converter (SAR ADC), and a serial peripheral interface for communication. The neural recording amplifier presents a programmable gain from 53 dB to 68 dB, a tunable low cut-off frequency from 0.1 Hz to 300 Hz, and 3.77 μVrms input-referred noise over a 5 kHz bandwidth. The SAR ADC digitizes signals at maximum sampling rate of 20 kS/s per channel and achieves an ENOB of 7.4. The integrated circuit is designed and fabricated in 0.18-μm CMOS mix-signal process. We successfully performed a multi-channel in-vivo recording experiment from a rat cortex using the neural recording chip.

  5. Fully integrated low-noise readout circuit with automatic offset cancellation loop for capacitive microsensors.

    Science.gov (United States)

    Song, Haryong; Park, Yunjong; Kim, Hyungseup; Cho, Dong-Il Dan; Ko, Hyoungho

    2015-10-14

    Capacitive sensing schemes are widely used for various microsensors; however, such microsensors suffer from severe parasitic capacitance problems. This paper presents a fully integrated low-noise readout circuit with automatic offset cancellation loop (AOCL) for capacitive microsensors. The output offsets of the capacitive sensing chain due to the parasitic capacitances and process variations are automatically removed using AOCL. The AOCL generates electrically equivalent offset capacitance and enables charge-domain fine calibration using a 10-bit R-2R digital-to-analog converter, charge-transfer switches, and a charge-storing capacitor. The AOCL cancels the unwanted offset by binary-search algorithm based on 10-bit successive approximation register (SAR) logic. The chip is implemented using 0.18 μm complementary metal-oxide-semiconductor (CMOS) process with an active area of 1.76 mm². The power consumption is 220 μW with 3.3 V supply. The input parasitic capacitances within the range of -250 fF to 250 fF can be cancelled out automatically, and the required calibration time is lower than 10 ms.

  6. Fully Integrated Low-Noise Readout Circuit with Automatic Offset Cancellation Loop for Capacitive Microsensors

    Directory of Open Access Journals (Sweden)

    Haryong Song

    2015-10-01

    Full Text Available Capacitive sensing schemes are widely used for various microsensors; however, such microsensors suffer from severe parasitic capacitance problems. This paper presents a fully integrated low-noise readout circuit with automatic offset cancellation loop (AOCL for capacitive microsensors. The output offsets of the capacitive sensing chain due to the parasitic capacitances and process variations are automatically removed using AOCL. The AOCL generates electrically equivalent offset capacitance and enables charge-domain fine calibration using a 10-bit R-2R digital-to-analog converter, charge-transfer switches, and a charge-storing capacitor. The AOCL cancels the unwanted offset by binary-search algorithm based on 10-bit successive approximation register (SAR logic. The chip is implemented using 0.18 μm complementary metal-oxide-semiconductor (CMOS process with an active area of 1.76 mm2. The power consumption is 220 μW with 3.3 V supply. The input parasitic capacitances within the range of −250 fF to 250 fF can be cancelled out automatically, and the required calibration time is lower than 10 ms.

  7. Note: Fully integrated active quenching circuit achieving 100 MHz count rate with custom technology single photon avalanche diodes

    Science.gov (United States)

    Acconcia, G.; Labanca, I.; Rech, I.; Gulinatti, A.; Ghioni, M.

    2017-02-01

    The minimization of Single Photon Avalanche Diodes (SPADs) dead time is a key factor to speed up photon counting and timing measurements. We present a fully integrated Active Quenching Circuit (AQC) able to provide a count rate as high as 100 MHz with custom technology SPAD detectors. The AQC can also operate the new red enhanced SPAD and provide the timing information with a timing jitter Full Width at Half Maximum (FWHM) as low as 160 ps.

  8. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  9. SEMICONDUCTOR INTEGRATED CIRCUITS: A fully integrated UHF RFID reader SoC for handheld applications in the 0.18 μm CMOS process

    Science.gov (United States)

    Jingchao, Wang; Chun, Zhang; Zhihua, Wang

    2010-08-01

    A low cost fully integrated single-chip UHF radio frequency identification (RFID) reader SoC for short distance handheld applications is presented. The SoC integrates all building blocks—including an RF transceiver, a PLL frequency synthesizer, a digital baseband and an MCU—in a 0.18 μm CMOS process. A high-linearity RX front-end is designed to handle the large self-interferer. A class-E power amplifier with high power efficiency is also integrated to fulfill the function of a UHF passive RFID reader. The measured maximum output power of the transmitter is 20.28 dBm and the measured receiver sensitivity is -60 dBm. The digital baseband including MCU core consumes 3.91 mW with a clock of 10 MHz and the analog part including power amplifier consumes 368.4 mW. The chip has a die area of 5.1 × 3.8 mm2 including pads.

  10. Monolithic microwave integrated circuits

    Science.gov (United States)

    Pucel, R. A.

    Monolithic microwave integrated circuits (MMICs), a new microwave technology which is expected to exert a profound influence on microwave circuit designs for future military systems as well as for the commercial and consumer markets, is discussed. The book contains an historical discussion followed by a comprehensive review presenting the current status in the field. The general topics of the volume are: design considerations, materials and processing considerations, monolithic circuit applications, and CAD, measurement, and packaging techniques. All phases of MMIC technology are covered, from design to testing.

  11. Photonic Integrated Circuits

    Science.gov (United States)

    Krainak, Michael; Merritt, Scott

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  12. Graphene radio frequency receiver integrated circuit.

    Science.gov (United States)

    Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

    2014-01-01

    Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

  13. Radio frequency integrated circuit design

    CERN Document Server

    Rogers, John W M

    2010-01-01

    This newly revised and expanded edition of the 2003 Artech House classic, Radio Frequency Integrated Circuit Design, serves as an up-to-date, practical reference for complete RFIC know-how. The second edition includes numerous updates, including greater coverage of CMOS PA design, RFIC design with on-chip components, and more worked examples with simulation results. By emphasizing working designs, this book practically transports you into the authors' own RFIC lab so you can fully understand the function of each design detailed in this book. Among the RFIC designs examined are RF integrated LC

  14. Bioluminescent bioreporter integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L. (Knoxville, TN); Sayler, Gary S. (Blaine, TN); Paulus, Michael J. (Knoxville, TN)

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  15. Digital integrated circuits

    Science.gov (United States)

    Polasek, P.; Halamik, J.

    1984-05-01

    The term semicustom designed integrated circuits denotes integrated circuits of an all purpose character in which the production of chips is completed by using one to three custom design stencil type exposure masks. This involves in most cases interconnecting masks that are used to devise the circuit function desired by the customer. Silicon plates with an all purpose gate matrix are produced up to the interconnection level and can be kept at this phase in storage, after which a customer's specific demands can be met very expediently. All purpose logic fields containing 200 logic gates on a chip and an all purpose chip to be expanded to 1,000 logic gates are discussed. The technology facilitates the devising of fast gates with a delay of approximately 5 ns and power dissipation of 1 mW. In assembly it will be possible to make use of the entire assortment of the currently used casings with 16, 18, 20, 24, 28 and 40 outlets. In addition to the development of the mentioned technology, a general methodology for design of the mentioned gate fields is currently under way.

  16. A 2.5-Gb/s fully-integrated, low-power clock and recovery circuit in 0.18-{mu}m CMOS

    Energy Technology Data Exchange (ETDEWEB)

    Zhang Changchun; Wang Zhigong; Shi Si; Guo Yufeng, E-mail: zgwang@seu.edu.c [Institute of RF- and OE-ICs, Southeast University, Nanjing 210096 (China)

    2010-03-15

    Based on the devised system-level design methodology, a 2.5-Gb/s monolithic bang-bang phase-locked clock and data recovery (CDR) circuit has been designed and fabricated in SMIC's 0.18-{mu}m CMOS technology. The Pottbaecker phase frequency detector and a differential 4-stage inductorless ring VCO are adopted, where an additional current source is added to the VCO cell to improve the linearity of the VCO characteristic. The CDR has an active area of 340 x 440 {mu}m{sup 2}, and consumes apower of only about 60 mW from a 1.8 V supply voltage, with an input sensitivity of less than 25 mV, and an output single-ended swing of more than 300 mV It has a pull-in range of 800 MHz, and a phase noise of -111.54 dBc/Hz at 10 kHz offset. The CDR works reliably at any input data rate between 1.8 Gb/s and 2.6 Gb/s without any need for reference clock, off-chip tuning, or external components. (semiconductor integrated circuits)

  17. Linear integrated circuits

    CERN Document Server

    Carr, Joseph

    1996-01-01

    The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

  18. Nano integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Yoon, Yung Sup

    2004-02-15

    This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

  19. Diamond Integrated Optomechanical Circuits

    CERN Document Server

    Rath, Patrik; Nebel, Christoph; Wild, Christoph; Pernice, Wolfram H P

    2013-01-01

    Diamond offers unique material advantages for the realization of micro- and nanomechanical resonators due to its high Young's modulus, compatibility with harsh environments and superior thermal properties. At the same time, the wide electronic bandgap of 5.45eV makes diamond a suitable material for integrated optics because of broadband transparency and the absence of free-carrier absorption commonly encountered in silicon photonics. Here we take advantage of both to engineer full-scale optomechanical circuits in diamond thin films. We show that polycrystalline diamond films fabricated by chemical vapour deposition provide a convenient waferscale substrate for the realization of high quality nanophotonic devices. Using free-standing nanomechanical resonators embedded in on-chip Mach-Zehnder interferometers, we demonstrate efficient optomechanical transduction via gradient optical forces. Fabricated diamond resonators reproducibly show high mechanical quality factors up to 11,200. Our low cost, wideband, carri...

  20. Secure integrated circuits and systems

    CERN Document Server

    Verbauwhede, Ingrid MR

    2010-01-01

    On any advanced integrated circuit or 'system-on-chip' there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area,

  1. Fully Integral, Flexible Composite Driveshaft

    Science.gov (United States)

    Lawrie, Duncan

    2014-01-01

    An all-composite driveshaft incorporating integral flexible diaphragms was developed for prime contractor testing. This new approach makes obsolete the split lines required to attach metallic flex elements and either metallic or composite spacing tubes in current solutions. Subcritical driveshaft weights can be achieved that are half that of incumbent technology for typical rotary wing shaft lengths. Spacing tubes compose an integral part of the initial tooling but remain part of the finished shaft and control natural frequencies and torsional stability. A concurrently engineered manufacturing process and design for performance competes with incumbent solutions at significantly lower weight and with the probability of improved damage tolerance and fatigue life.

  2. CADAT integrated circuit mask analysis

    Science.gov (United States)

    1981-01-01

    CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

  3. Variational integrators for electric circuits

    Energy Technology Data Exchange (ETDEWEB)

    Ober-Blöbaum, Sina, E-mail: sinaob@math.upb.de [Computational Dynamics and Optimal Control, University of Paderborn (Germany); Tao, Molei [Courant Institute of Mathematical Sciences, New York University (United States); Cheng, Mulin [Applied and Computational Mathematics, California Institute of Technology (United States); Owhadi, Houman; Marsden, Jerrold E. [Control and Dynamical Systems, California Institute of Technology (United States); Applied and Computational Mathematics, California Institute of Technology (United States)

    2013-06-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.

  4. Fully integrated, fully automated generation of short tandem repeat profiles

    Science.gov (United States)

    2013-01-01

    Background The generation of short tandem repeat profiles, also referred to as ‘DNA typing,’ is not currently performed outside the laboratory because the process requires highly skilled technical operators and a controlled laboratory environment and infrastructure with several specialized instruments. The goal of this work was to develop a fully integrated system for the automated generation of short tandem repeat profiles from buccal swab samples, to improve forensic laboratory process flow as well as to enable short tandem repeat profile generation to be performed in police stations and in field-forward military, intelligence, and homeland security settings. Results An integrated system was developed consisting of an injection-molded microfluidic BioChipSet cassette, a ruggedized instrument, and expert system software. For each of five buccal swabs, the system purifies DNA using guanidinium-based lysis and silica binding, amplifies 15 short tandem repeat loci and the amelogenin locus, electrophoretically separates the resulting amplicons, and generates a profile. No operator processing of the samples is required, and the time from swab insertion to profile generation is 84 minutes. All required reagents are contained within the BioChipSet cassette; these consist of a lyophilized polymerase chain reaction mix and liquids for purification and electrophoretic separation. Profiles obtained from fully automated runs demonstrate that the integrated system generates concordant short tandem repeat profiles. The system exhibits single-base resolution from 100 to greater than 500 bases, with inter-run precision with a standard deviation of ±0.05 - 0.10 bases for most alleles. The reagents are stable for at least 6 months at 22°C, and the instrument has been designed and tested to Military Standard 810F for shock and vibration ruggedization. A nontechnical user can operate the system within or outside the laboratory. Conclusions The integrated system represents the

  5. Design and Analysis of Fully Integrated Differential VCOs

    Directory of Open Access Journals (Sweden)

    M. Prochaska

    2005-01-01

    Full Text Available Oscillators play a decisive role for electronic equipment in many fields - like communication, navigation or data processing. Especially oscillators are key building blocks in integrated transceivers for wired and wireless communication systems. In this context the study of fully integrated differential VCOs has received attention. In this paper we present an analytic analysis of the steady state oscillation of integrated differential VCOs which is based on a nonlinear model of the oscillator. The outcomes of this are design formulas for the amplitude as well as the stability of the oscillator which take the nonlinearity of the circuit into account.

  6. Vertically Integrated Circuits at Fermilab

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  7. Integrated circuits for multimedia applications

    DEFF Research Database (Denmark)

    Vandi, Luca

    2007-01-01

    This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described......, and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt...

  8. Delay locked loop integrated circuit.

    Energy Technology Data Exchange (ETDEWEB)

    Brocato, Robert Wesley

    2007-10-01

    This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.

  9. Towards fully integrated wireless impedimetric sensors.

    Science.gov (United States)

    Segura-Quijano, Fredy; Sacristán-Riquelme, Jordi; García-Cantón, Jesús; Osés, Maria Teresa; Baldi, Antonio

    2010-01-01

    We report on the design and characterization of the building blocks of a single-chip wireless chemical sensor fabricated with a commercial complementary metal-oxide-silicon (CMOS) technology, which includes two types of transducers for impedimetric measurements (4-electrode array and two interdigitated electrodes), instrumentation circuits, and a metal coil and circuits for inductive power and data transfer. The electrodes have been formed with a polycrystalline silicon layer of the technology by a simple post-process that does not require additional deposition or lithography steps, but just etching steps. A linear response to both conductivity and permittivity of solutions has been obtained. Wireless communication of the sensor chip with a readout unit has been demonstrated. The design of the chip was prepared for individual block characterization and not for full system characterization. The integration of chemical transducers within monolithic wireless platforms will lead to smaller, cheaper, and more reliable chemical microsensors, and will open up the door to numerous new applications where liquid mediums that are enclosed in sealed receptacles have to be measured.

  10. Towards Fully Integrated Wireless Impedimetric Sensors

    Directory of Open Access Journals (Sweden)

    Fredy Segura-Quijano

    2010-04-01

    Full Text Available We report on the design and characterization of the building blocks of a single-chip wireless chemical sensor fabricated with a commercial complementary metal-oxide-silicon (CMOS technology, which includes two types of transducers for impedimetric measurements (4-electrode array and two interdigitated electrodes, instrumentation circuits, and a metal coil and circuits for inductive power and data transfer. The electrodes have been formed with a polycrystalline silicon layer of the technology by a simple post-process that does not require additional deposition or lithography steps, but just etching steps. A linear response to both conductivity and permittivity of solutions has been obtained. Wireless communication of the sensor chip with a readout unit has been demonstrated. The design of the chip was prepared for individual block characterization and not for full system characterization. The integration of chemical transducers within monolithic wireless platforms will lead to smaller, cheaper, and more reliable chemical microsensors, and will open up the door to numerous new applications where liquid mediums that are enclosed in sealed receptacles have to be measured.

  11. A novel fully integrated handheld gamma camera

    Energy Technology Data Exchange (ETDEWEB)

    Massari, R.; Ucci, A.; Campisi, C. [Biostructure and Bioimaging Institute (IBB), National Research Council of Italy (CNR), Rome (Italy); Scopinaro, F. [University of Rome “La Sapienza”, S. Andrea Hospital, Rome (Italy); Soluri, A., E-mail: alessandro.soluri@ibb.cnr.it [Biostructure and Bioimaging Institute (IBB), National Research Council of Italy (CNR), Rome (Italy)

    2016-10-01

    In this paper, we present an innovative, fully integrated handheld gamma camera, namely designed to gather in the same device the gamma ray detector with the display and the embedded computing system. The low power consumption allows the prototype to be battery operated. To be useful in radioguided surgery, an intraoperative gamma camera must be very easy to handle since it must be moved to find a suitable view. Consequently, we have developed the first prototype of a fully integrated, compact and lightweight gamma camera for radiopharmaceuticals fast imaging. The device can operate without cables across the sterile field, so it may be easily used in the operating theater for radioguided surgery. The prototype proposed consists of a Silicon Photomultiplier (SiPM) array coupled with a proprietary scintillation structure based on CsI(Tl) crystals. To read the SiPM output signals, we have developed a very low power readout electronics and a dedicated analog to digital conversion system. One of the most critical aspects we faced designing the prototype was the low power consumption, which is mandatory to develop a battery operated device. We have applied this detection device in the lymphoscintigraphy technique (sentinel lymph node mapping) comparing the results obtained with those of a commercial gamma camera (Philips SKYLight). The results obtained confirm a rapid response of the device and an adequate spatial resolution for the use in the scintigraphic imaging. This work confirms the feasibility of a small gamma camera with an integrated display. This device is designed for radioguided surgery and small organ imaging, but it could be easily combined into surgical navigation systems.

  12. Long-wavelength silicon photonic integrated circuits

    OpenAIRE

    2014-01-01

    In this paper we elaborate on our development of silicon photonic integrated circuits operating at wavelengths beyond the telecommunication wavelength window. Silicon-on-insulator waveguide circuits up to 3.8 mu m wavelength are demonstrated as well as germanium-on-silicon waveguide circuits operating in the 5-5 mu m wavelength range. The heterogeneous integration of III-V semiconductors and IV-VI semiconductors on this platform is described for the integration of lasers and photodetectors op...

  13. Scaling of graphene integrated circuits

    Science.gov (United States)

    Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A.; Pop, Eric; Sordan, Roman

    2015-04-01

    The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing. Electronic supplementary information (ESI) available: Discussions on the cutoff frequency fT, the maximum frequency of oscillation fmax, and the intrinsic gate delay CV/I. See DOI: 10.1039/c5nr01126d

  14. Analog integrated circuits design for processing physiological signals.

    Science.gov (United States)

    Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

    2010-01-01

    Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

  15. Active components for integrated plasmonic circuits

    DEFF Research Database (Denmark)

    Krasavin, A.V.; Bolger, P.M.; Zayats, A.V.;

    2009-01-01

    We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides.......We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides....

  16. Microcontroller based Integrated Circuit Tester

    Directory of Open Access Journals (Sweden)

    Yousif Taha Yousif Elamin

    2015-02-01

    Full Text Available The digital integrated circuit (IC tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD. The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . This model applies the necessary signals to the inputs of the IC, monitoring the outputs at each stage and comparing them with the outputs in the truth table. Any discrepancy in the functioning of the IC results in a fail indication, displays the faulty and good gates on the LCD. The testing procedure is accomplished with the help of keypad keys present on the main board design. The test has been accomplished with most commonly used digital IC's, mainly belonging to the 74 series. Digital IC tester tests three samples of IC's ( NAND, NOT, NOR. The design is flexible . We can add extra IC bases and subroutines to test any other IC in the 74 series.

  17. Wafer-scale graphene integrated circuit.

    Science.gov (United States)

    Lin, Yu-Ming; Valdes-Garcia, Alberto; Han, Shu-Jen; Farmer, Damon B; Meric, Inanc; Sun, Yanning; Wu, Yanqing; Dimitrakopoulos, Christos; Grill, Alfred; Avouris, Phaedon; Jenkins, Keith A

    2011-06-10

    A wafer-scale graphene circuit was demonstrated in which all circuit components, including graphene field-effect transistor and inductors, were monolithically integrated on a single silicon carbide wafer. The integrated circuit operates as a broadband radio-frequency mixer at frequencies up to 10 gigahertz. These graphene circuits exhibit outstanding thermal stability with little reduction in performance (less than 1 decibel) between 300 and 400 kelvin. These results open up possibilities of achieving practical graphene technology with more complex functionality and performance.

  18. Analog VLSI neural network integrated circuits

    Science.gov (United States)

    Kub, F. J.; Moon, K. K.; Just, E. A.

    1991-01-01

    Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit.

  19. Semiconductors integrated circuit design for manufacturability

    CERN Document Server

    Balasinki, Artur

    2011-01-01

    Because of the continuous evolution of integrated circuit manufacturing (ICM) and design for manufacturability (DfM), most books on the subject are obsolete before they even go to press. That's why the field requires a reference that takes the focus off of numbers and concentrates more on larger economic concepts than on technical details. Semiconductors: Integrated Circuit Design for Manufacturability covers the gradual evolution of integrated circuit design (ICD) as a basis to propose strategies for improving return-on-investment (ROI) for ICD in manufacturing. Where most books put the spotl

  20. Silicon integrated circuits part A : supplement 2

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

  1. LC Quadrature Generation in Integrated Circuits

    DEFF Research Database (Denmark)

    Christensen, Kåre Tais

    2001-01-01

    Today quadrature signals for IQ demodulation are provided through RC polyphase networks, quadrature oscillators or double frequency VCOs. This paper presents a new method for generating quadrature signals in integrated circuits using only inductors and capacitors. This LC quadrature generation...

  2. Radio-frequency integrated-circuit engineering

    CERN Document Server

    Nguyen, Cam

    2015-01-01

    Radio-Frequency Integrated-Circuit Engineering addresses the theory, analysis and design of passive and active RFIC's using Si-based CMOS and Bi-CMOS technologies, and other non-silicon based technologies. The materials covered are self-contained and presented in such detail that allows readers with only undergraduate electrical engineering knowledge in EM, RF, and circuits to understand and design RFICs. Organized into sixteen chapters, blending analog and microwave engineering, Radio-Frequency Integrated-Circuit Engineering emphasizes the microwave engineering approach for RFICs. Provide

  3. Integrated Circuit Stellar Magnitude Simulator

    Science.gov (United States)

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  4. Handbook of microwave integrated circuits

    Science.gov (United States)

    Hoffmann, Reinmut K.

    The design and operation of ICs for use in the 0.5-20-GHz range are described in an introductory and reference work for industrial engineers. Chapters are devoted to an overview of microwave IC (MIC) technology, general stripline characteristics, microwave transmission line (MTL) parameters for microstrips with isotropic dielectric substrates, higher-order modes on a microstrip, the effects of metallic enclosure on MTL transmission parameters, losses in microstrips, the measurement of MTL parameters, and MTLs on anisotropic dielectric substrates. Consideration is given to coupled microstrips on dielectric substrates, microstrip discontinuities, radiation from microstrip circuits, MTL variations, coplanar MTLs, slotlines, and spurious modes in MTL circuits. Diagrams, drawings, graphs, and a glossary of symbols are provided.

  5. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  6. Fully Integral, Flexible Composite Driveshaft Project

    Data.gov (United States)

    National Aeronautics and Space Administration — An all-composite driveshaft incorporating integral flexible diaphragms is described and proposed for further refinement. An approach is explored which obsoletes the...

  7. Fully Integral, Flexible Composite Driveshaft Project

    Data.gov (United States)

    National Aeronautics and Space Administration — An all-composite driveshaft incorporating integral flexible diaphragms is described and proposed for phase II prime conractor testing. The approach obsoletes the...

  8. Progress in organic integrated circuit manufacture

    Science.gov (United States)

    Taylor, D. Martin

    2016-02-01

    This review article focuses on the development of processes for the manufacture of organic electronic circuits. Beginning with the first report of an organic transistor it highlights the key developments leading to the successful manufacture of microprocessors and other complex circuits incorporating organic transistors. Both batch processing (based on silicon integrated circuit technology) as well as mass-printing, roll-to-roll (R2R) approaches are discussed. Currently, the best circuit performances are achieved using batch processing. It is suggested that an emerging, large mass-market for electronic tags may dictate that R2R manufacture will likely be required to meet the high throughput rates needed. However, significant improvements in resolution and registration are necessary to achieve increased circuit operating speeds.

  9. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    Science.gov (United States)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  10. Maximum Temperature Detection System for Integrated Circuits

    Science.gov (United States)

    Frankiewicz, Maciej; Kos, Andrzej

    2015-03-01

    The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

  11. Solution methods for very highly integrated circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Nong, Ryan; Thornquist, Heidi K.; Chen, Yao; Mei, Ting; Santarelli, Keith R.; Tuminaro, Raymond Stephen

    2010-12-01

    While advances in manufacturing enable the fabrication of integrated circuits containing tens-to-hundreds of millions of devices, the time-sensitive modeling and simulation necessary to design these circuits poses a significant computational challenge. This is especially true for mixed-signal integrated circuits where detailed performance analyses are necessary for the individual analog/digital circuit components as well as the full system. When the integrated circuit has millions of devices, performing a full system simulation is practically infeasible using currently available Electrical Design Automation (EDA) tools. The principal reason for this is the time required for the nonlinear solver to compute the solutions of large linearized systems during the simulation of these circuits. The research presented in this report aims to address the computational difficulties introduced by these large linearized systems by using Model Order Reduction (MOR) to (i) generate specialized preconditioners that accelerate the computation of the linear system solution and (ii) reduce the overall dynamical system size. MOR techniques attempt to produce macromodels that capture the desired input-output behavior of larger dynamical systems and enable substantial speedups in simulation time. Several MOR techniques that have been developed under the LDRD on 'Solution Methods for Very Highly Integrated Circuits' will be presented in this report. Among those presented are techniques for linear time-invariant dynamical systems that either extend current approaches or improve the time-domain performance of the reduced model using novel error bounds and a new approach for linear time-varying dynamical systems that guarantees dimension reduction, which has not been proven before. Progress on preconditioning power grid systems using multi-grid techniques will be presented as well as a framework for delivering MOR techniques to the user community using Trilinos and the Xyce circuit

  12. Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

    Science.gov (United States)

    Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

    1995-01-01

    Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

  13. Human-friendly organic integrated circuits

    Directory of Open Access Journals (Sweden)

    Tsuyoshi Sekitani

    2011-09-01

    Full Text Available Many electronic systems such as flat-panel displays, optical detectors, and sensor arrays would benefit greatly from mechanical flexibility. Ultraflexible and foldable electronics demonstrate ultimate flexibility, and are highly portable. A major obstacle toward the development of foldable electronics is the fundamental compromise between operation voltage, transistor performance, and mechanical flexibility. This review describes foldable and conformable integrated circuits based on organic thin-film transistors (TFTs with very high mechanical stability. We review our work on such transistors and integrated circuits, that continue to operate without failure, without detectable degradation during folding of the plastic substrate.

  14. Silicon Photonic Integrated Circuit Mode Multiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ou, Haiyan; Xu, Jing;

    2013-01-01

    We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully exc...

  15. Bioluminescent bioreporter integrated circuit detection methods

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L.; Paulus, Michael J.; Sayler, Gary S.; Applegate, Bruce M.; Ripp, Steven A.

    2005-06-14

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for detection of particular analytes, including ammonia and estrogen compounds.

  16. Bottom-up organic integrated circuits

    NARCIS (Netherlands)

    Smits, Edsger C. P.; Mathijssen, Simon G. J.; van Hal, Paul A.; Setayesh, Sepas; Geuns, Thomas C. T.; Mutsaers, Kees A. H. A.; Cantatore, Eugenio; Wondergem, Harry J.; Werzer, Oliver; Resel, Roland; Kemerink, Martijn; Kirchmeyer, Stephan; Muzafarov, Aziz M.; Ponomarenko, Sergei A.; de Boer, Bert; Blom, Paul W. M.; de Leeuw, Dago M.

    2008-01-01

    Self- assembly - the autonomous organization of components into patterns and structures(1) - is a promising technology for the mass production of organic electronics. Making integrated circuits using a bottom- up approach involving self- assembling molecules was proposed(2) in the 1970s. The basic b

  17. Integrated Circuits in the Introductory Electronics Laboratory

    Science.gov (United States)

    English, Thomas C.; Lind, David A.

    1973-01-01

    Discusses the use of an integrated circuit operational amplifier in an introductory electronics laboratory course for undergraduate science majors. The advantages of this approach and the implications for scientific instrumentation are identified. Describes a number of experiments suitable for the undergraduate laboratory. (Author/DF)

  18. Accurate Electromagnetic Modeling Methods for Integrated Circuits

    NARCIS (Netherlands)

    Sheng, Z.

    2010-01-01

    The present development of modern integrated circuits (IC’s) is characterized by a number of critical factors that make their design and verification considerably more difficult than before. This dissertation addresses the important questions of modeling all electromagnetic behavior of features on t

  19. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  20. Power management techniques for integrated circuit design

    CERN Document Server

    Chen, Ke-Horng

    2016-01-01

    This book begins with the premise that energy demands are directing scientists towards ever-greener methods of power management, so highly integrated power control ICs (integrated chip/circuit) are increasingly in demand for further reducing power consumption. * A timely and comprehensive reference guide for IC designers dealing with the increasingly widespread demand for integrated low power management * Includes new topics such as LED lighting, fast transient response, DVS-tracking and design with advanced technology nodes * Leading author (Chen) is an active and renowned contributor to the power management IC design field, and has extensive industry experience * Accompanying website includes presentation files with book illustrations, lecture notes, simulation circuits, solution manuals, instructors manuals, and program downloads.

  1. Two Stage Fully Differential Sample and Hold Circuit Using .18µm Technology

    Directory of Open Access Journals (Sweden)

    Dharmendra Dongardiye

    2014-05-01

    Full Text Available This paper presents a well-established Fully Differential sample & hold circuitry, implemented in 180-nm CMOS technology. In this two stage method the first stage give us very high gain and second stage gives large voltage swing. The proposed opamp provides 149MHz unity-gain bandwidth , 78 degree phase margin and a differential peak to peak output swing more than 2.4v. using the improved fully differential two stage operational amplifier of 76.7dB gain. Although the sample and hold circuit meets the requirements of SNR specifications.

  2. An integrator circuit in cerebellar cortex.

    Science.gov (United States)

    Maex, Reinoud; Steuber, Volker

    2013-09-01

    The brain builds dynamic models of the body and the outside world to predict the consequences of actions and stimuli. A well-known example is the oculomotor integrator, which anticipates the position-dependent elasticity forces acting on the eye ball by mathematically integrating over time oculomotor velocity commands. Many models of neural integration have been proposed, based on feedback excitation, lateral inhibition or intrinsic neuronal nonlinearities. We report here that a computational model of the cerebellar cortex, a structure thought to implement dynamic models, reveals a hitherto unrecognized integrator circuit. In this model, comprising Purkinje cells, molecular layer interneurons and parallel fibres, Purkinje cells were able to generate responses lasting more than 10 s, to which both neuronal and network mechanisms contributed. Activation of the somatic fast sodium current by subthreshold voltage fluctuations was able to maintain pulse-evoked graded persistent activity, whereas lateral inhibition among Purkinje cells via recurrent axon collaterals further prolonged the responses to step and sine wave stimulation. The responses of Purkinje cells decayed with a time-constant whose value depended on their baseline spike rate, with integration vanishing at low ( 30 per s). The model predicts that the apparently fast circuit of the cerebellar cortex may control the timing of slow processes without having to rely on sensory feedback. Thus, the cerebellar cortex may contain an adaptive temporal integrator, with the sensitivity of integration to the baseline spike rate offering a potential mechanism of plasticity of the response time-constant.

  3. Tomographic reconstruction of an integrated circuit interconnect

    Energy Technology Data Exchange (ETDEWEB)

    Levine, Z.H. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899 (United States); Kalukin, A.R. [Physics Department, Rensselaer Polytechnic Institute, Troy, New York 12180-3590 (United States); Frigo, S.P.; McNulty, I. [Advanced Photon Source, Argonne National Laboratory, Argonne, Illinois 60439 (United States); Kuhn, M. [Digital Equipment Corporation, Hudson, Massachusetts 01749 (United States)

    1999-01-01

    An Al{endash}W-silica integrated circuit interconnect sample was thinned to several {mu}m and scanned across a 200 nm focal spot of a Fresnel zone plate operating at photon energy of 1573 eV. The experiment was performed on beamline 2-ID-B of the Advanced Photon Source, a third-generation synchrotron facility. Thirteen scanned projections of the sample were acquired over the angular range {plus_minus}69.2{degree}. At least 301{times}301 pixels were acquired at each angle with a step size of 77{times}57 nm. A three-dimensional image with an approximate uncertainty of 400 nm was reconstructed from projection data using a standard algorithm. The two layers of the integrated circuit and the presence of the focused ion beam markers on the surface of the sample are clearly shown in the reconstruction. {copyright} {ital 1999 American Institute of Physics.}

  4. Biquadratic Filter Applications Using a Fully-Differential Active-Only Integrator

    Directory of Open Access Journals (Sweden)

    H. A. Yildiz

    2013-04-01

    Full Text Available A new class of active filters, real active-only filters is described and possible implementation issues of these filters are discussed. To remedy these issues, a fully-differential active-only integrator block built around current controlled current conveyors is presented. The integration frequency of the proposed circuit is adjustable over a wide frequency range. As an application, a real active-only filter based on the classical two-integrator loop topology is presented and designed. The feasibility of this filter in a 0.35µm CMOS process is verified through SPECTRE simulation program in the CADENCE design tool.

  5. Viewing Integrated-Circuit Interconnections By SEM

    Science.gov (United States)

    Lawton, Russel A.; Gauldin, Robert E.; Ruiz, Ronald P.

    1990-01-01

    Back-scattering of energetic electrons reveals hidden metal layers. Experiment shows that with suitable operating adjustments, scanning electron microscopy (SEM) used to look for defects in aluminum interconnections in integrated circuits. Enables monitoring, in situ, of changes in defects caused by changes in temperature. Gives truer picture of defects, as etching can change stress field of metal-and-passivation pattern, causing changes in defects.

  6. Progress in radiation immune thermionic integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Lynn, D.K.; McCormick, J.B. (comps.)

    1985-08-01

    This report describes the results of a program directed at evaluating the thermionic integrated circuit (TIC) technology for applicability to military systems. Previous programs under the sponsorship of the Department of Energy, Office of Basic Energy Sciences, have developed an initial TIC technology base and demonstrated operation in high-temperature and high-radiation environments. The program described in this report has two parts: (1) a technical portion in which experiments and analyses were conducted to refine perceptions of near-term as well as ultimate performance levels of the TIC technology and (2) an applications portion in which the technical conclusions were to be evaluated against potential military applications. This report draws several conclusions that strongly suggest that (1) useful radiation-hard/high-temperature operable integrated circuits can be developed using the TIC technology; (2) because of their ability to survive and operate in hostile environments, a variety of potential military applications have been projected for this technology; and (3) based on the above two conclusions, an aggressive TIC development program should be initiated to provide the designers of future systems with integrated circuits and devices with the unique features of the TICs.

  7. Power system with an integrated lubrication circuit

    Science.gov (United States)

    Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  8. Fully Parallel Self-Learning Analog Support Vector Machine Employing Compact Gaussian Generation Circuits

    Science.gov (United States)

    Zhang, Renyuan; Shibata, Tadashi

    2012-04-01

    An analog support vector machine (SVM) processor employing a fully parallel self-learning circuitry was developed for the classification of highly dimensional patterns. To implement a highly dimensional Gaussian function, which is the most powerful kernel function in classification algorithms but computationally expensive, a compact analog Gaussian generation circuit was developed. By employing this proposed Gaussian generation circuit, a fully parallel self-learning processor based on an SVM algorithm was built for 64 dimension pattern classification. The chip real estate occupied by the processor is very small. The object images from two classes were converted into 64 dimension vectors using the algorithm developed in a previous work and fed into the processor. The learning process autonomously proceeded without any clock-based control and self-converged within a single clock cycle of the system (at 10 MHz). Some test object images were used to verify the learning performance. According to the circuit simulation results, it was shown that all the test images were classified into correct classes in real time. A proof-of-concept chip was designed in a 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology, and the performance of the proposed SVM processor was confirmed from the measurement results of the fabricated chips.

  9. A Fully Differential Interface Circuit of Closed-loop Accelerometer with Force Feedback Linearization

    Institute of Scientific and Technical Information of China (English)

    HongLin Xu; HongNa Liu; Chong He; Liang Yin; XiaoWei Liu

    2014-01-01

    In this paper, a fifth-order fully differential interface circuit ( IC) is presented to improve the noise performance for micromechanical sigma-delta (Σ-Δ) accelerometer. A lead compensator is adopted to ensure the stability of the closed-loop high-order system. A low noise capacitance detection circuit is described with a correlated-double-sampling ( CDS) technique to decrease 1/f noise and offset of the operational amplifier. This paper also proposes a self-test technique for the interface circuit to test the harmonic distortion. An electrostatic force feedback linearization circuit is presented to reduce the harmonic distortion resulting in larger dynamic range ( DR) . The layout of the IC is implemented in a standard 0�6 μm CMOS technology and operates at a sampling frequency of 250 kHz. The interface consumes 20 mW from a 5 V supply. The post-simulation results indicate that the noise floor of the digital accelerometer is about -140 dBV/Hz1/2 at low frequency. The sensitivity is 2.5 V/g and the nonlinearity is 0�11%. The self-test function is achieved with 98�2 dB third-order harmonic distortion detection based on the electrostatic force feedback linearization.

  10. Integrated Circuits for Analog Signal Processing

    CERN Document Server

    2013-01-01

      This book presents theory, design methods and novel applications for integrated circuits for analog signal processing.  The discussion covers a wide variety of active devices, active elements and amplifiers, working in voltage mode, current mode and mixed mode.  This includes voltage operational amplifiers, current operational amplifiers, operational transconductance amplifiers, operational transresistance amplifiers, current conveyors, current differencing transconductance amplifiers, etc.  Design methods and challenges posed by nanometer technology are discussed and applications described, including signal amplification, filtering, data acquisition systems such as neural recording, sensor conditioning such as biomedical implants, actuator conditioning, noise generators, oscillators, mixers, etc.   Presents analysis and synthesis methods to generate all circuit topologies from which the designer can select the best one for the desired application; Includes design guidelines for active devices/elements...

  11. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    Science.gov (United States)

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  12. Pneumatic oscillator circuits for timing and control of integrated microfluidics.

    Science.gov (United States)

    Duncan, Philip N; Nguyen, Transon V; Hui, Elliot E

    2013-11-05

    Frequency references are fundamental to most digital systems, providing the basis for process synchronization, timing of outputs, and waveform synthesis. Recently, there has been growing interest in digital logic systems that are constructed out of microfluidics rather than electronics, as a possible means toward fully integrated laboratory-on-a-chip systems that do not require any external control apparatus. However, the full realization of this goal has not been possible due to the lack of on-chip frequency references, thus requiring timing signals to be provided from off-chip. Although microfluidic oscillators have been demonstrated, there have been no reported efforts to characterize, model, or optimize timing accuracy, which is the fundamental metric of a clock. Here, we report pneumatic ring oscillator circuits built from microfluidic valves and channels. Further, we present a compressible-flow analysis that differs fundamentally from conventional circuit theory, and we show the utility of this physically based model for the optimization of oscillator stability. Finally, we leverage microfluidic clocks to demonstrate circuits for the generation of phase-shifted waveforms, self-driving peristaltic pumps, and frequency division. Thus, pneumatic oscillators can serve as on-chip frequency references for microfluidic digital logic circuits. On-chip clocks and pumps both constitute critical building blocks on the path toward achieving autonomous laboratory-on-a-chip devices.

  13. Inrush Current Suppression Circuit and Method for Controlling When a Load May Be Fully Energized

    Science.gov (United States)

    Schwerman, Paul (Inventor)

    2017-01-01

    A circuit and method for controlling when a load may be fully energized includes directing electrical current through a current limiting resistor that has a first terminal connected to a source terminal of a field effect transistor (FET), and a second terminal connected to a drain terminal of the FET. The gate voltage magnitude on a gate terminal of the FET is varied, whereby current flow through the FET is increased while current flow through the current limiting resistor is simultaneously decreased. A determination is made as to when the gate voltage magnitude on the gate terminal is equal to or exceeds a predetermined reference voltage magnitude, and the load is enabled to be fully energized when the gate voltage magnitude is equal to or exceeds the predetermined reference voltage magnitude.

  14. Application prof iles of integrated circuits in various industry fields

    Institute of Scientific and Technical Information of China (English)

    Hongjing Zhang

    2014-01-01

    Integrated circuits play an increasingly important role in various fields. The aging effects, which lead to robustness problems in integrated circuits, has gained more attention. Therefore, during the design process the robustness problem must already be calculated. Generally, the time-dependent influences such as NBTI (negative bias temperature instability) and HCI (hot carrier injection) contribute to circuit aging problems [1] .

  15. Diode lasers and photonic integrated circuits

    CERN Document Server

    Coldren, Larry A; Mashanovitch, Milan L

    2011-01-01

    Diode Lasers and Photonic Integrated Circuits, Second Edition provides a comprehensive treatment of optical communication technology, its principles and theory, treating students as well as experienced engineers to an in-depth exploration of this field. Diode lasers are still of significant importance in the areas of optical communication, storage, and sensing. Using the the same well received theoretical foundations of the first edition, the Second Edition now introduces timely updates in the technology and in focus of the book. After 15 years of development in the field, this book wil

  16. Thermoelectricity from wasted heat of integrated circuits

    KAUST Repository

    Fahad, Hossain M.

    2012-05-22

    We demonstrate that waste heat from integrated circuits especially computer microprocessors can be recycled as valuable electricity to power up a portion of the circuitry or other important accessories such as on-chip cooling modules, etc. This gives a positive spin to a negative effect of ever increasing heat dissipation associated with increased power consumption aligned with shrinking down trend of transistor dimension. This concept can also be used as an important vehicle for self-powered systemson- chip. We provide theoretical analysis supported by simulation data followed by experimental verification of on-chip thermoelectricity generation from dissipated (otherwise wasted) heat of a microprocessor.

  17. Accelerating functional verification of an integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Deindl, Michael; Ruedinger, Jeffrey Joseph; Zoellin, Christian G.

    2015-10-27

    Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

  18. Testing Fixture For Microwave Integrated Circuits

    Science.gov (United States)

    Romanofsky, Robert; Shalkhauser, Kurt

    1989-01-01

    Testing fixture facilitates radio-frequency characterization of microwave and millimeter-wave integrated circuits. Includes base onto which two cosine-tapered ridge waveguide-to-microstrip transitions fastened. Length and profile of taper determined analytically to provide maximum bandwidth and minimum insertion loss. Each cosine taper provides transformation from high impedance of waveguide to characteristic impedance of microstrip. Used in conjunction with automatic network analyzer to provide user with deembedded scattering parameters of device under test. Operates from 26.5 to 40.0 GHz, but operation extends to much higher frequencies.

  19. Microwave plasmatrons for giant integrated circuit processing

    Energy Technology Data Exchange (ETDEWEB)

    Petrin, A.B.

    2000-02-01

    A method for calculating the interaction of a powerful microwave with a plane layer of magnetoactive low-pressure plasma under conditions of electron cyclotron resonance is presented. In this paper, the plasma layer is situated between a plane dielectric layer and a plane metal screen. The calculation model contains the microwave energy balance, particle balance, and electron energy balance. The equation that expressed microwave properties of nonuniform magnetoactive plasma is found. The numerical calculations of the microwave-plasma interaction for a one-dimensional model of the problem are considered. Applications of the results for microwave plasmatrons designed for processing giant integrated circuits are suggested.

  20. An integrated circuit floating point accumulator

    Science.gov (United States)

    Goldsmith, T. C.

    1977-01-01

    Goddard Space Flight Center has developed a large scale integrated circuit (type 623) which can perform pulse counting, storage, floating point compression, and serial transmission, using a single monolithic device. Counts of 27 or 19 bits can be converted to transmitted values of 12 or 8 bits respectively. Use of the 623 has resulted in substantial savaings in weight, volume, and dollar resources on at least 11 scientific instruments to be flown on 4 NASA spacecraft. The design, construction, and application of the 623 are described.

  1. Computer Aided Engineering of Semiconductor Integrated Circuits

    Science.gov (United States)

    1976-04-01

    transistor opera tion; (4) theoretical invest! jations of carrifr mobli *!;y *"« inversion layer of an MOSFET; (5) mathematical investigations for high...satisfactory greLnt «Lh experiment. In time, the rapid groWth of se.r- oonduotor integrated circuit (IC, technology created ^ ^ °n" £or which this theory was...and Technology of Semiconductor Devices, John Wiley and Sons, Inc., N.Y. (1967). [2] S. K. Ghandi, The Theory and Practice of

  2. Laser Integration on Silicon Photonic Circuits Through Transfer Printing

    Science.gov (United States)

    2017-03-10

    AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

  3. Design of Integrated Circuits Approaching Terahertz Frequencies

    DEFF Research Database (Denmark)

    Yan, Lei

    heterodyne receivers with requirements of room temperature operation, low system complexity, and high sensitivity, monolithic integrated Schottky diode technology is chosen for the implementation of submillimeterwave components. The corresponding subharmonic mixer and multiplier for a THz radiometer system......In this thesis, monolithic microwave integrated circuits(MMICs) are presented for millimeter-wave and submillimeter-wave or terahertz(THz) applications. Millimeter-wave power generation from solid state devices is not only crucial for the emerging high data rate wireless communications but also...... important for driving THz signal sources. To meet the requirement of high output power, amplifiers based on InP double heterojunction bipolar transistor (DHBT) devices from the III-V Lab in Marcoussic, F rance are designed for the power generation at millimeter-wave frequency range. For future THz...

  4. Harnessing optical forces in integrated photonic circuits.

    Science.gov (United States)

    Li, Mo; Pernice, W H P; Xiong, C; Baehr-Jones, T; Hochberg, M; Tang, H X

    2008-11-27

    The force exerted by photons is of fundamental importance in light-matter interactions. For example, in free space, optical tweezers have been widely used to manipulate atoms and microscale dielectric particles. This optical force is expected to be greatly enhanced in integrated photonic circuits in which light is highly concentrated at the nanoscale. Harnessing the optical force on a semiconductor chip will allow solid state devices, such as electromechanical systems, to operate under new physical principles. Indeed, recent experiments have elucidated the radiation forces of light in high-finesse optical microcavities, but the large footprint of these devices ultimately prevents scaling down to nanoscale dimensions. Recent theoretical work has predicted that a transverse optical force can be generated and used directly for electromechanical actuation without the need for a high-finesse cavity. However, on-chip exploitation of this force has been a significant challenge, primarily owing to the lack of efficient nanoscale mechanical transducers in the photonics domain. Here we report the direct detection and exploitation of transverse optical forces in an integrated silicon photonic circuit through an embedded nanomechanical resonator. The nanomechanical device, a free-standing waveguide, is driven by the optical force and read out through evanescent coupling of the guided light to the dielectric substrate. This new optical force enables all-optical operation of nanomechanical systems on a CMOS (complementary metal-oxide-semiconductor)-compatible platform, with substantial bandwidth and design flexibility compared to conventional electrical-based schemes.

  5. An automatic synthesis method of compact models of integrated circuit devices based on equivalent circuits

    Science.gov (United States)

    Abramov, I. I.

    2006-05-01

    An automatic synthesis method of equivalent circuits of integrated circuit devices is described in the paper. This method is based on a physical approach to construction of finite-difference approximation to basic equations of semiconductor device physics. It allows to synthesize compact equivalent circuits of different devices automatically as alternative to, for example, sufficiently formal BSIM2 and BSIM3 models used in circuit simulation programs of SPICE type. The method is one of possible variants of general methodology for automatic synthesis of compact equivalent circuits of almost arbitrary devices and circuit-type structures of micro- and nanoelecronics [1]. The method is easily extended in the case of necessity to account thermal effects in integrated circuits. It was shown that its application would be especially perspective for analysis of integrated circuit fragments as a whole and for identification of significant collective physical effects, including parasitic effects in VLSI and ULSI. In the paper the examples illustrating possibilities of the method for automatic synthesis of compact equivalent circuits of some of semiconductor devices and integrated circuit devices are considered. Special attention is given to examples of integrated circuit devices for coarse grids of spatial discretization (less than 10 nodes).

  6. Electronically Tunable Fully Integrated Fractional-Order Resonator

    KAUST Repository

    Tsirimokou, Georgia

    2017-03-20

    A fully integrated implementation of a parallel fractional-order resonator which employs together a fractional order capacitor and a fractional-order inductor is proposed in this paper. The design utilizes current-controlled Operational Transconductance Amplifiers as building blocks, designed and fabricated in AMS 0:35m CMOS process, and based on a second-order approximation of a fractional-order differentiator/ integrator magnitude optimized in the range 10Hz–700Hz. An attractive benefit of the proposed scheme is its electronic tuning capability.

  7. Accurate pattern registration for integrated circuit tomography

    Energy Technology Data Exchange (ETDEWEB)

    Levine, Zachary H.; Grantham, Steven; Neogi, Suneeta; Frigo, Sean P.; McNulty, Ian; Retsch, Cornelia C.; Wang, Yuxin; Lucatorto, Thomas B.

    2001-07-15

    As part of an effort to develop high resolution microtomography for engineered structures, a two-level copper integrated circuit interconnect was imaged using 1.83 keV x rays at 14 angles employing a full-field Fresnel zone plate microscope. A major requirement for high resolution microtomography is the accurate registration of the reference axes in each of the many views needed for a reconstruction. A reconstruction with 100 nm resolution would require registration accuracy of 30 nm or better. This work demonstrates that even images that have strong interference fringes can be used to obtain accurate fiducials through the use of Radon transforms. We show that we are able to locate the coordinates of the rectilinear circuit patterns to 28 nm. The procedure is validated by agreement between an x-ray parallax measurement of 1.41{+-}0.17 {mu}m and a measurement of 1.58{+-}0.08 {mu}m from a scanning electron microscope image of a cross section.

  8. Post irradiation effects (PIE) in integrated circuits

    Science.gov (United States)

    Shaw, D. C.; Lowry, L.; Barnes, C.; Zakharia, M.; Agarwal, S.; Rax, B.

    1991-01-01

    Post-irradiation effects (PIE) ranging from normal recovery to catastrophic failure have been observed in integrated circuits during the PIE period. Data presented show failure due to rebound after a 10 krad(Si) dose. In particular, five device types are investigated with varying PIE response. Special attention has been given to the HI1-507A analog multiplexer because its PIE response is extreme. X-ray diffraction has been uniquely employed to measure physical stress in the HI1-507A metallization. An attempt has been made to show a relationship between stress relaxation and radiation effects. All data presented support the current MIL-STD Method 1019.4 but demonstrate the importance of performing PIE measurements, even when mission doses are as low as 10 krad(Si).

  9. Parallel Jacobi EVD Methods on Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Chi-Chia Sun

    2014-01-01

    Full Text Available Design strategies for parallel iterative algorithms are presented. In order to further study different tradeoff strategies in design criteria for integrated circuits, A 10 × 10 Jacobi Brent-Luk-EVD array with the simplified μ-CORDIC processor is used as an example. The experimental results show that using the μ-CORDIC processor is beneficial for the design criteria as it yields a smaller area, faster overall computation time, and less energy consumption than the regular CORDIC processor. It is worth to notice that the proposed parallel EVD method can be applied to real-time and low-power array signal processing algorithms performing beamforming or DOA estimation.

  10. RD53A Integrated Circuit Specifications

    CERN Document Server

    Garcia-Sciveres, Mauricio

    2015-01-01

    Specifications for the RD53 collaboration’s first engineering wafer run of an integrated circuit (IC) for hybrid pixel detector readout, called RD53A. RD53A is intended to demonstrate in a large format IC the suitability of the technology (including radiation tolerance), the stable low threshold operation, and the high hit and trigger rate capabilities, required for HL-LHC upgrades of ATLAS and CMS. The wafer scale production will permit the experiments to prototype bump bonding assembly with realistic sensors in this new technology and to measure the performance of hybrid assemblies. RD53A is not intended to be a final production IC for use in an experiment, and will contain design variations for testing purposes, making the pixel matrix non-uniform.

  11. Broadband plasmonic absorber for photonic integrated circuits

    CERN Document Server

    Xiong, Xiao; Ren, Xi-Feng; Guo, Guang-Can

    2013-01-01

    The loss of surface plasmon polaritons has long been considered as a fatal shortcoming in information transport. Here we propose a plasmonic absorber utilizing this "shortcoming" to absorb the stray light in photonic integrated circuits (PICs). Based on adiabatic mode evolution, its performance is insensitive to incident wavelength with bandwidth larger than 300nm, and robust against surrounding environment and temperature. Besides, the use of metal enables it to be very compact and beneficial to thermal dissipation. With this 40um-long absorber, the absorption efficiency can be over 99.8% at 1550nm, with both the reflectivity and transmittance of incident light reduced to less than 0.1%. Such device may find various applications in PICs, to eliminate the residual strong pump laser or stray light.

  12. Photonic integrated circuits: new challenges for lithography

    Science.gov (United States)

    Bolten, Jens; Wahlbrink, Thorsten; Prinzen, Andreas; Porschatis, Caroline; Lerch, Holger; Giesecke, Anna Lena

    2016-10-01

    In this work routes towards the fabrication of photonic integrated circuits (PICs) and the challenges their fabrication poses on lithography, such as large differences in feature dimension of adjacent device features, non-Manhattan-type features, high aspect ratios and significant topographic steps as well as tight lithographic requirements with respect to critical dimension control, line edge roughness and other key figures of merit not only for very small but also for relatively large features, are highlighted. Several ways those challenges are faced in today's low-volume fabrication of PICs, including the concept multi project wafer runs and mix and match approaches, are presented and possible paths towards a real market uptake of PICs are discussed.

  13. Monolithic Lumped Element Integrated Circuit (M2LEIC) Transistors.

    Science.gov (United States)

    INTEGRATED CIRCUITS, *MONOLITHIC STRUCTURES(ELECTRONICS), *TRANSISTORS, CHIPS(ELECTRONICS), FABRICATION, EPITAXIAL GROWTH, ULTRAHIGH FREQUENCY, POLYSILICONS, PHOTOLITHOGRAPHY, RADIOFREQUENCY POWER, IMPEDANCE MATCHING .

  14. Integrated Reconfigurable High-Voltage Transmitting Circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger;

    2014-01-01

    -out and measurements are performed on the integrated circuit. The transmitting circuit is reconfigurable externally making it able to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes, pulse voltages up to 100 V, maximum pulse range of 50 V and frequencies up to 5 MHz. The area...

  15. Low-power CMOS fully-folding ADC with a mixed-averaging distributed T/H circuit

    Institute of Scientific and Technical Information of China (English)

    Liu Zhen; Jia Song; Wang Yuan; Ji Lijiu; Zhang Xing

    2009-01-01

    This paper describes an 8-bit 125 Mhzlow-powerCMOS fully-foldinganalog-to-digital converter(ADC).A novel mixed-averaging distributed T/H circuit is proposed to improve the accuracy. Folding circuits are not only used in the fine converter but also in the coarse one and in the bit synchronization block to reduce the number of comparators for low power. This ADC is implemented in 0.5μm CMOS technology and occupies a die area of 2 × 1.5 mm~2. The measured differential nonlinearity and integral nonlinearity are 0.6 LSB/-0.8 LSB and 0.9 LSB/-1.2 LSB, respectively. The ADC exhibits 44.3 dB of signal-to-noise plus distortion ratio and 53.5 dB of spurious-free dynamic range for 1 MHz input sine-wave. The power dissipation is 138 mW at a sampling rate of 125 MHz at a 5 V supply.

  16. Fully Integrated Ultra-Low Voltage Step-up Converter with Voltage Doubling LC-Tank for Energy Harvesting Applications

    Science.gov (United States)

    Jayaweera, H. M. P. C.; Pathirana, W. P. M. R.; Muhtaroğlu, Ali

    2015-12-01

    This paper reports the design, fabrication, and validation of a novel integrated interface circuit for ultra-low voltage step up converter in 0.18 μm CMOS technology. The circuit does not use off-chip components. Fully integrated centre-tap differential inductors are introduced in the proposed LC oscillator design to achieve 38% area reduction compared to the use of four separate inductors. The efficiency of the system is hence enhanced through the elimination of clock buffer circuits traditionally utilized to drive the step-up converter. The experimental results prove that the system can self-start, and step 0.25 V up to 1.7 V to supply a 46 μW load with 15.5% efficiency. The minimum validated input voltage is 0.15 V, which is boosted up to 1.2 V under open circuit conditions.

  17. Fully integrated wireless inductive tongue computer interface for disabled people.

    Science.gov (United States)

    Struijk, Lotte N S Andreasen; Lontis, Eugen Romulus; Bentsen, Bo; Christensen, Henrik Vie; Caltenco, Hector A; Lund, Morten Enemark

    2009-01-01

    This work describes a novel fully integrated inductive tongue computer interface for disabled people. The interface consists of an oral unit placed in the mouth, including inductive sensors, related electronics, a system for wireless transmission and a rechargeable battery. The system is activated using an activation unit placed on the tongue, and incorporates 18 inductive sensors, arranged in both a key area and a mouse-pad area. The system's functionality was demonstrated in a pilot experiment, where a typing rate of up to 70 characters/minute was obtained with an error rate of 3%. Future work will include tests with disabled subjects.

  18. Topology Optimization of Building Blocks for Photonic Integrated Circuits

    DEFF Research Database (Denmark)

    Jensen, Jakob Søndergaard; Sigmund, Ole

    2005-01-01

    Photonic integrated circuits are likely candidates as high speed replacements for the standard electrical integrated circuits of today. However, in order to obtain a satisfactorily performance many design prob- lems that up until now have resulted in too high losses must be resolved. In this work...... we demonstrate how the method of topology optimization can be used to design a variety of high performance building blocks for the future circuits....

  19. Model GC1312S Multifunction Integrated Optical Circuit Devices

    Institute of Scientific and Technical Information of China (English)

    2001-01-01

    Model GC1312S multifunction integrated optical circuit device (MIOC) used in inertial-grade interferometric fiber optics gyroscopes (IFOGs) is fabricated by annealing and proton exchange process (APE). The unique feature of the device is the incorporation of the beat detection circuit besides all the features the conventional single Y-branch multifunction integrated optical circuit devices have. The device structure, operation principle and typical characteristics, etc., are briefly presented in this paper.

  20. Integrated capacitors for conductive lithographic film circuits

    OpenAIRE

    Harrey, PM; Evans, PSA; Harrison, DJ

    2001-01-01

    This paper reports on fabrication of low-value embedded capacitors in conductive lithographic film (CLF) circuit boards. The CLF process is a low-cost and high speed manufacturing technique for flexible circuits and systems. We report on the construction and electrical characteristics of CLF capacitor structures printed onto flexible substrates. These components comprise a single polyester dielectric layer, which separates the printed electrode films. Multilayer circuit boards with printed co...

  1. Designing TSVs for 3D Integrated Circuits

    CERN Document Server

    Khan, Nauman

    2013-01-01

    This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits.  It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks.  Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a floorplan are available....

  2. Counterfeit integrated circuits detection and avoidance

    CERN Document Server

    Tehranipoor, Mark (Mohammad); Forte, Domenic

    2015-01-01

    This timely and exhaustive study offers a much-needed examination of the scope and consequences of the electronic counterfeit trade.  The authors describe a variety of shortcomings and vulnerabilities in the electronic component supply chain, which can result in counterfeit integrated circuits (ICs).  Not only does this book provide an assessment of the current counterfeiting problems facing both the public and private sectors, it also offers practical, real-world solutions for combatting this substantial threat.   ·      Helps beginners and practitioners in the field by providing a comprehensive background on the counterfeiting problem; ·      Presents innovative taxonomies for counterfeit types, test methods, and counterfeit defects, which allows for a detailed analysis of counterfeiting and its mitigation; ·      Provides step-by-step solutions for detecting different types of counterfeit ICs; ·      Offers pragmatic and practice-oriented, realistic solutions to counterfeit IC d...

  3. Ultraviolet integrated photonic circuits (Conference Presentation)

    Science.gov (United States)

    Fanto, Michael L.; Steidle, Jeffrey A.; Lu, Tsung-Ju; Preble, Stefan F.; Englund, Dirk R.; Tison, Christopher C.; Smith, Amos M.; Howland, Gregory A.; Soderberg, Kathy-Anne; Alsing, Paul M.

    2016-10-01

    Quantum information processing relies on the fundamental property of quantum interference, where the quality of the interference directly correlates to the indistinguishability of the interacting particles. The creation of these indistinguishable particles, photons in this case, has conventionally been accomplished with nonlinear crystals and optical filters to remove spectral distinguishability, albeit sacrificing the number of photons. This research describes the use of an integrated aluminum nitride microring resonator circuit to selectively generate photon pairs at the narrow cavity transmissions, thereby producing spectrally indistinguishable photons. These spectrally indistinguishable photons can then be routed through optical waveguide circuitry, concatenated interferometers, to manipulate and entangle the photons into the desired quantum states. Photon sources and circuitry are only two of the three required pieces of the puzzle. The final piece which this research is aimed at interfacing with are trapped ion quantum memories, based on trapped Ytterbium ions. These ions serve as very long lived and stable quantum memories with storage times on the order of 10's of minutes, compared with photonic quantum memories which are limited to 10-6 to 10-3 seconds. The caveat with trapped ions is the interaction wavelength of the photons is 369.5nm and therefore the goal of this research is to develop entangled photon sources and circuitry in that wavelength regime to interact directly with the trapped ions and bypass the need for frequency conversion.

  4. Securing Health Sensing Using Integrated Circuit Metric

    Directory of Open Access Journals (Sweden)

    Ruhma Tahir

    2015-10-01

    Full Text Available Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware “fingerprints”. The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner.

  5. Securing health sensing using integrated circuit metric.

    Science.gov (United States)

    Tahir, Ruhma; Tahir, Hasan; McDonald-Maier, Klaus

    2015-10-20

    Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric) that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware "fingerprints". The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner.

  6. Design of 3D integrated circuits and systems

    CERN Document Server

    Sharma, Rohit

    2014-01-01

    Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and sys

  7. Integrated differential high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Farch, Kjartan;

    2015-01-01

    In this paper an integrated differential high-voltage transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is designed and implemented in a 0.35 μm high-voltage process. Measurements are performed on the integrated circuit in order...... to assess its performance. The circuit generates pulses at differential voltage levels of 60V, 80V and 100 V, a frequency up to 5MHz and a measured driving strength of 1.75 V/ns with the CMUT connected. The total on-chip area occupied by the transmitting circuit is 0.18 mm2 and the power consumption...

  8. F-Paris: integrated electronic circuits [Tender

    CERN Multimedia

    2003-01-01

    "Fourniture, montage et tests des circuits imprimes et modules multi composants pour le trajectographe central de CMS. Maximum de 12 000 circuits imprimes et modules multi-composants necessaires au trajectographe central de l'experience CMS aupres du Large Hadron Collider" (1 page).

  9. Parallel sparse direct solver for integrated circuit simulation

    CERN Document Server

    Chen, Xiaoming; Yang, Huazhong

    2017-01-01

    This book describes algorithmic methods and parallelization techniques to design a parallel sparse direct solver which is specifically targeted at integrated circuit simulation problems. The authors describe a complete flow and detailed parallel algorithms of the sparse direct solver. They also show how to improve the performance by simple but effective numerical techniques. The sparse direct solver techniques described can be applied to any SPICE-like integrated circuit simulator and have been proven to be high-performance in actual circuit simulation. Readers will benefit from the state-of-the-art parallel integrated circuit simulation techniques described in this book, especially the latest parallel sparse matrix solution techniques. · Introduces complicated algorithms of sparse linear solvers, using concise principles and simple examples, without complex theory or lengthy derivations; · Describes a parallel sparse direct solver that can be adopted to accelerate any SPICE-like integrated circuit simulato...

  10. A fully integrated standalone portable cavity ringdown breath acetone analyzer

    Science.gov (United States)

    Sun, Meixiu; Jiang, Chenyu; Gong, Zhiyong; Zhao, Xiaomeng; Chen, Zhuying; Wang, Zhennan; Kang, Meiling; Li, Yingxin; Wang, Chuji

    2015-09-01

    Breath analysis is a promising new technique for nonintrusive disease diagnosis and metabolic status monitoring. One challenging issue in using a breath biomarker for potential particular disease screening is to find a quantitative relationship between the concentration of the breath biomarker and clinical diagnostic parameters of the specific disease. In order to address this issue, we need a new instrument that is capable of conducting real-time, online breath analysis with high data throughput, so that a large scale of clinical test (more subjects) can be achieved in a short period of time. In this work, we report a fully integrated, standalone, portable analyzer based on the cavity ringdown spectroscopy technique for near-real time, online breath acetone measurements. The performance of the portable analyzer in measurements of breath acetone was interrogated and validated by using the certificated gas chromatography-mass spectrometry. The results show that this new analyzer is useful for reliable online (online introduction of a breath sample without pre-treatment) breath acetone analysis with high sensitivity (57 ppb) and high data throughput (one data per second). Subsequently, the validated breath analyzer was employed for acetone measurements in 119 human subjects under various situations. The instrument design, packaging, specifications, and future improvements were also described. From an optical ringdown cavity operated by the lab-set electronics reported previously to this fully integrated standalone new instrument, we have enabled a new scientific tool suited for large scales of breath acetone analysis and created an instrument platform that can even be adopted for study of other breath biomarkers by using different lasers and ringdown mirrors covering corresponding spectral fingerprints.

  11. On ageing effects in analogue integrated circuits

    OpenAIRE

    Salfelder, Felix (Dipl. Math.)

    2016-01-01

    The behaviour of electronic circuits is influenced by ageing effects. Modelling the behaviour of circuits is a standard approach for the design of faster, smaller, more reliable and more robust systems. In this thesis, we propose a formalization of robustness that is derived from a failure model, which is based purely on the behavioural specification of a system. For a given specification, simulation can reveal if a system does not comply with a specification, and thus provide a failure model...

  12. 76 FR 76434 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions...

    Science.gov (United States)

    2011-12-07

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Receipt... Commission has received a complaint entitled In Re Certain Integrated Circuits, Chipsets, And Products... importation of certain integrated circuits, chipsets, and products containing same including televisions....

  13. Fully Integrated Biopotential Acquisition Analog Front-End IC.

    Science.gov (United States)

    Song, Haryong; Park, Yunjong; Kim, Hyungseup; Ko, Hyoungho

    2015-09-30

    A biopotential acquisition analog front-end (AFE) integrated circuit (IC) is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA) to achieve low input referred noise (IRN) and to block unwanted DC potential signals. A DC servo loop (DSL) is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL) is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL) is designed to enhance the input impedance and common mode rejection ratio (CMRR) without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL) at each CCIA stage. The biopotential AFE is fabricated using a 0.18 μm one polysilicon and six metal layers (1P6M) complementary metal oxide semiconductor (CMOS) process. The core chip size of the AFE without input/output (I/O) pads is 10.5 mm². A fourth-order band-pass filter (BPF) with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 μVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions.

  14. Four Quadrant Chopper Drive with Specialized Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Alexandru Morar

    2009-12-01

    Full Text Available The paper presents a high performance system for separately-excited D.C. motor control, which was designed and performed with a specialized integrated circuit (L292, made by SGS-THOMSON Microelectronics Company. With an interface and an adequate software, L292 circuit can be used as a chopper in 2 or 4 quadrant.

  15. Four Quadrant Chopper Drive with Specialized Integrated Circuits

    OpenAIRE

    Alexandru Morar

    2009-01-01

    The paper presents a high performance system for separately-excited D.C. motor control, which was designed and performed with a specialized integrated circuit (L292), made by SGS-THOMSON Microelectronics Company. With an interface and an adequate software, L292 circuit can be used as a chopper in 2 or 4 quadrant.

  16. 35 GHz integrated circuit rectifying antenna with 33 percent efficiency

    Science.gov (United States)

    Yoo, T.-W.; Chang, K.

    1991-01-01

    A 35 GHz integrated circuit rectifying antenna (rectenna) has been developed using a microstrip dipole antenna and beam-lead mixer diode. Greater than 33 percent conversion efficiency has been achieved. The circuit should have applications in microwave/millimeter-wave power transmission and detection.

  17. Superconducting single photon detectors integrated with diamond nanophotonic circuits

    CERN Document Server

    Rath, Patrik; Ferrari, Simone; Sproll, Fabian; Lewes-Malandrakis, Georgia; Brink, Dietmar; Ilin, Konstantin; Siegel, Michael; Nebel, Christoph; Pernice, Wolfram

    2015-01-01

    Photonic quantum technologies promise to repeat the success of integrated nanophotonic circuits in non-classical applications. Using linear optical elements, quantum optical computations can be performed with integrated optical circuits and thus allow for overcoming existing limitations in terms of scalability. Besides passive optical devices for realizing photonic quantum gates, active elements such as single photon sources and single photon detectors are essential ingredients for future optical quantum circuits. Material systems which allow for the monolithic integration of all components are particularly attractive, including III-V semiconductors, silicon and also diamond. Here we demonstrate nanophotonic integrated circuits made from high quality polycrystalline diamond thin films in combination with on-chip single photon detectors. Using superconducting nanowires coupled evanescently to travelling waves we achieve high detection efficiencies up to 66 % combined with low dark count rates and timing resolu...

  18. Radiation-hardened transistor and integrated circuit

    Science.gov (United States)

    Ma, Kwok K.

    2007-11-20

    A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

  19. Addressable-Matrix Integrated-Circuit Test Structure

    Science.gov (United States)

    Sayah, Hoshyar R.; Buehler, Martin G.

    1991-01-01

    Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.

  20. The fully integrated engineer combining technical ability and leadership prowess

    CERN Document Server

    Cerri, Steven T

    2016-01-01

    College teaches you to be a good engineer. But it's likely that your college engineering courses didn't have time to teach you how to effectively contribute your ideas or how to transition to management or leadership. This book provides you with those missing tools. This book addresses the differences between being proficient as a technical individual and effectively contributing to and leading a team to effectively contribute to various projects. The Fully Integrated Engineer: Combining Technical Ability and Leadership Prowess shines a light on how the habits learned in school, while contributing to individual short-term success, actually become hindrances in the modern engineering workplace if your goal is to achieve long-term success as either an engineer, a team lead, manager, or leader. The author offers specific ways to address those limiting habits, turning you into an effective team contributor and leader building toward long-term career succes . The author’s approach to retooling less-than-op...

  1. Secondary Side CMOS Feedback Control Integrated Circuit

    Science.gov (United States)

    1990-06-01

    Temperature ( Celc ~us) Figure 5.1: Experimental Temperature Dependence cf Untrimmed Bandgap Circuit 104 1. I I ’ - ’ 0 0.9 . -0-0 Ouput Voit -ge ---.o M...Schlecht and L.F. Casey, "Comparison of the Square-Wave and Quasi- Resonant Topologies," IEEE PESC Record, 1987, pp. 124-134. 132

  2. Hybrid and monolithic integration of planar lightwave circuits (PLCs)

    Science.gov (United States)

    Chen, Ray T.

    2008-02-01

    In this paper, we review the status of monolithic and hybrid integration of planar lightwave circuits (PLCs). Building blocks needed for system integration based on polymeric materials, III-V semiconductor materials, LiNbO 3 and SOI on Silicon are summarized with pros and cons. Due to the maturity of silicon CMOS technology, silicon becomes the platform of choice for optical application specific integrated circuits (OASICs). However, the indirect bandgap of silicon makes the formation of electrically pumped silicon laser a remote plausibility which requires hybrid integration of laser sources made out of III-V compound semicouductor.

  3. Study of CMOS integrated signal processing circuit in capacitive sensors

    Institute of Scientific and Technical Information of China (English)

    CAO Yi-jiang; YU Xiang; WANG Lei

    2007-01-01

    A CMOS integrated signal processing circuit based on capacitance resonance principle whose structure is simple in capacitive sensors is designed. The waveform of output voltage is improved by choosing bootstrap reference current mirror with initiate circuit, CMOS analogy switch and positive feedback of double-stage inverter in the circuit. Output voltage of this circuit is a symmetric square wave signal. The variation of sensitive capacitance, which is part of the capacitive sensors, can be denoted by the change of output voltage's frequency. The whole circuit is designed with 1.5 μm P-well CMOS process and simulated by PSpice software.Output frequency varies from 261.05 kHz to 47.93 kHz if capacitance varies in the range of 1PF~15PF. And the variation of frequency can be easily detected using counter or SCU.

  4. Multi-channel detector readout method and integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2004-05-18

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  5. Multi-channel detector readout method and integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2006-12-12

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  6. Innovative devices for integrated circuits - A design perspective

    Science.gov (United States)

    Schmitt-Landsiedel, D.; Werner, C.

    2009-04-01

    MOS devices go 3D, new quantum effect devices appear in the research labs. This paper discusses the impact of various innovative device architectures on circuit design. Examples of circuits with FinFETs or Multi-Gate-FETs are shown and their performance is compared with classically scaled CMOS circuits both for digital and analog applications. As an example for novel quantum effect devices beyond CMOS we discuss circuits with Tunneling Field Effect Transistors and their combination with classical MOSFETs and MuGFETs. Finally the potential of more substantial paradigm changes in circuit design will be exploited for the example of magnetic quantum cellular automata using a novel integrated magnetic field clocking scheme.

  7. Short circuit analysis of distribution system with integration of DG

    DEFF Research Database (Denmark)

    Su, Chi; Liu, Zhou; Chen, Zhe;

    2014-01-01

    during both balanced and unbalanced faults. Major factors such as external grid short circuit power capacity, WT integration location, connection type of WT integration transformer are taken into account. In turn, the challenges brought to the protection system in the distribution network are presented...

  8. Science Letters:The Moore's Law for photonic integrated circuits

    Institute of Scientific and Technical Information of China (English)

    THYL(E)N L.; HE Sai-ling; WOSINSKI L.; DAI Dao-xin

    2006-01-01

    We formulate a "Moore's law" for photonic integrated circuits (PICs) and their spatial integration density using two methods. One is decomposing the integrated photonics devices of diverse types into equivalent basic elements, which makes a comparison with the generic elements of electronic integrated circuits more meaningful. The other is making a complex component equivalent to a series of basic elements of the same functionality, which is used to calculate the integration density for functional components realized with different structures. The results serve as a benchmark of the evolution of PICs and we can conclude that the density of integration measured in this way roughly increases by a factor of 2 per year. The prospects for a continued increase of spatial integration density are discussed.

  9. Micro-relay technology for energy-efficient integrated circuits

    CERN Document Server

    Kam, Hei

    2015-01-01

    This book describes the design of relay-based circuit systems from device fabrication to circuit micro-architectures. This book is ideal for both device engineers as well as circuit system designers and highlights the importance of co-design across design hierarchies when optimizing system performance (in this case, energy-efficiency). This book is ideal for researchers and engineers focused on semiconductors, integrated circuits, and energy efficient electronics. This book also: ·         Covers microsystem fabrication, MEMS device design, circuit design, circuit micro-architecture, and CAD ·         Describes work previously done in the field and also lays the groundwork and criteria for future energy-efficient device and system design ·         Maximizes reader insights into the design and modeling of micro-relay, micro-relay reliability, integrated circuit design with micro-relays, and more

  10. An improved fully integrated, high-speed, dual-modulus divider

    Science.gov (United States)

    Zheng, Sun; Yong, Xu; Guangyan, Ma; Hui, Shi; Fei, Zhao; Ying, Lin

    2014-11-01

    A fully integrated 2n/2n+1 dual-modulus divider in GHz frequency range is presented. The improved structure can make all separated logic gates embed into correlative D flip—flops completely. In this way, the complex logic functions can be performed with a minimum number of devices and with maximum speed, so that lower power consumption and faster speed are obtained. In addition, the low-voltage bandgap reference needed by the frequency divider is specifically designed to provide a 1.0 V output. According to the design demand, the circuit is fabricated in 0.18 μm standard CMOS process, and the measured results show that its operating frequency range is 1.1-2.5 GHz. The dual-modulus divider dissipates 1.1 mA from a 1.8 V power supply. The temperature coefficient of the reference voltage circuit is 8.3 ppm/°C when the temperature varies from -40 to +125 °C. By comparison, the dual-modulus divide designed in this paper can possess better performance and flexibility.

  11. An improved fully integrated, high-speed, dual-modulus divider

    Institute of Scientific and Technical Information of China (English)

    Sun Zheng; Xu Yong; Ma Guangyan; Shi Hui; Zhao Fei; Lin Ying

    2014-01-01

    A fully integrated 2n/2n+l dual-modulus divider in GHz frequency range is presented.The improved structure can make all separated logic gates embed into correlative D flip-flops completely.In this way,the complex logic functions can be performed with a minimum number of devices and with maximum speed,so that lower power consumption and faster speed are obtained.In addition,the low-voltage bandgap reference needed by the frequency divider is specifically designed to provide a 1.0 V output.According to the design demand,the circuit is fabricated in 0.18μm standard CMOS process,and the measured results show that its operating frequency range is 1.1-2.5 GHz.The dual-modulus divider dissipates 1.1 mA from a 1.8 V power supply.The temperature coefficient of the reference voltage circuit is 8.3 ppm/℃ when the temperature varies from-40 to + 125 ℃.By comparison,the dual-modulus divide designed in this paper can possess better performance and flexibility.

  12. DESIGN OF LOW-VOLTAGE AND LOW-POWER FULLY INTEGRATED FILTER BASED ON LOG-DOMAIN CURRENT-MODE INTEGRATOR

    Institute of Scientific and Technical Information of China (English)

    Li Shutao; Wang Yaonan; Wu Jie

    2001-01-01

    In this paper a novel log-domain current-mode integrator based on MOS transistors in subthreshold is proposed. The integrator's time-constant is tunable by varying a reference bias current. By use of the integrator, a fifth-order Chebyshev lowpass filter with 0.1dB ripples is designed. The simulation results demonstrate that the proposed filter has such advantages as low power supply(1.5V), very low power dissipation (μW level), nearly ideal frequency response, very small sensitivity to components in passband, and adjustable cut-off frequency over a wide range.The circuit is composed of NMOS transistors and grounded capacitors which make it suitable for fully integrated circuit implementation.

  13. Hybrid CMOS/Nanodevice Integrated Circuits Design and Fabrication

    Science.gov (United States)

    2008-08-25

    This approach combines a semiconductor transistor system with a nanowire crossbar, with simple two-terminal nanodevices self-assembled at each...hybrid CMOS/nanodevice integrated circuits [10-12]. Such circuit combines a semiconductor transistors system with a nanowire crossbar, with simple two...both with and without embedded metallic clusters), self-assembled molecular monolayers, and thin chalcogenide and crystalline perovskite layers [20

  14. Advances in organic field-effect transistors and integrated circuits

    Institute of Scientific and Technical Information of China (English)

    2009-01-01

    Organic field-effect transistors (OFETs) have received significant research interest because of their promising applications in low cast, lager area, plastic circuits, and tremendous progress has been made in materials, device performance, OFETs based circuits in recent years. In this article we introduce the advances in organic semiconductor materials, OFETs based integrating techniques, and in particular highlight the recent progress. Finally, the prospects and problems of OFETs are discussed.

  15. Advances in organic field-effect transistors and integrated circuits

    Institute of Scientific and Technical Information of China (English)

    WANG Hong; JI ZhuoYu; LIU Ming; SHANG LiWei; LIU Ge; LIU XingHua; LIU Jiang; PENG YingQuan

    2009-01-01

    Organic field-effect transistors (OFETs) have received significant research interest because of their promising applications in low cast, lager area, plastic circuits, and tremendous progress has been made in materials, device performance, OFETs based circuits in recent years.In this article we intro-duce the advances in organic semiconductor materials, OFETs based integrating techniques, and in particular highlight the recent progress.Finally, the prospects and problems of OFETs are discussed.

  16. Dielectric isolation for power integrated circuits; Isolation dielectrique enterree pour les circuits integres de puissance

    Energy Technology Data Exchange (ETDEWEB)

    Zerrouk, D.

    1997-07-18

    Considerable efforts have been recently directed towards integrating onto the same chip, sense or protection elements that is low voltage analog and/or digital control circuitry together with high voltage/high current devices. Most of these so called `smart power` devices use either self isolation, junction isolation or Silicon-On-Insulator (SOI) to integrate low voltage elements with vertical power devices. Dielectric isolation is superior to the other isolation techniques such as self isolation or junction isolation. Thesis work consists of the study of the feasibility of a dielectric technology based on the melting and the solidification in a Rapid Thermal Processing furnace (RTP), of thick polysilicon films deposited on oxide. The purpose of this technique is to obtain substrate with localized SOI structures for smart power applications. SOI technology offers significant potential advantages, such as non-occurrence of latch-up in CMOS structures, high packaging density, low parasitic capacitance and the possibility of 3D structures. In addition, SOI technology using thick silicon films (10-100 {mu}m) offers special advantages for high voltage integrated circuits. Several techniques have been developed to form SOI films. Zone melting recrystallization is one of the most promising for localized SOI. The SOI structures have first been analyzed in term of extended defects. N-channel MOSFET`s transistors have also been fabricated in the SOI substrates and electrically characterized (threshold voltages, off-state leakage current, mobilities,...). The SOI transistors exhibit good characteristics, although inferior to witness transistors. The recrystallized silicon films are therefore found to be suitable for the fabrication of SOI devices. (author) 106 refs.

  17. Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

    Science.gov (United States)

    Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin; Challa, Samyuktha; Chen, Kevin; Peck, Austin; Fahad, Hossain M.; Ota, Hiroki; Shiraki, Hiroshi; Kiriya, Daisuke; Lien, Der-Hsien; Brooks, George A.; Davis, Ronald W.; Javey, Ali

    2016-01-01

    Wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual’s state of health. Sampling human sweat, which is rich in physiological information, could enable non-invasive monitoring. Previously reported sweat-based and other non-invasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanically flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plastic-based sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing. This application could not have been realized using either of these technologies alone owing to their respective inherent limitations. The wearable system is used to measure the detailed sweat profile of human subjects engaged in prolonged indoor and outdoor physical activities, and to make a real-time assessment of the physiological state of the subjects. This platform enables a wide range of personalized diagnostic and physiological monitoring applications.

  18. Process Variations and Probabilistic Integrated Circuit Design

    CERN Document Server

    Haase, Joachim

    2012-01-01

    Uncertainty in key parameters within a chip and between different chips in the deep sub micron era plays a more and more important role. As a result, manufacturing process spreads need to be considered during the design process.  Quantitative methodology is needed to ensure faultless functionality, despite existing process variations within given bounds, during product development.   This book presents the technological, physical, and mathematical fundamentals for a design paradigm shift, from a deterministic process to a probability-orientated design process for microelectronic circuits.  Readers will learn to evaluate the different sources of variations in the design flow in order to establish different design variants, while applying appropriate methods and tools to evaluate and optimize their design.  Trains IC designers to recognize problems caused by parameter variations during manufacturing and to choose the best methods available to mitigate these issues during the design process; Offers both qual...

  19. Graphene/Si CMOS Hybrid Hall Integrated Circuits

    OpenAIRE

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-01-01

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal a...

  20. Photonic integrated circuits based on silica and polymer PLC

    Science.gov (United States)

    Izuhara, T.; Fujita, J.; Gerhardt, R.; Sui, B.; Lin, W.; Grek, B.

    2013-03-01

    Various methods of hybrid integration of photonic circuits are discussed focusing on merits and challenges. Material platforms discussed in this report are mainly polymer and silica. We categorize the hybridization methods using silica and polymer waveguides into two types, chip-to-chip and on-chip integration. General reviews of these hybridization technologies from the past works are reviewed. An example for each method is discussed in details. We also discuss current status of our silica PLC hybrid integration technology.

  1. Integrated CMOS photodetectors and signal processing for very low-level chemical sensing with the bioluminescent bioreporter integrated circuit

    Science.gov (United States)

    Bolton, Eric K.; Sayler, Gary S.; Nivens, David E.; Rochelle, James M.; Ripp, Steven; Simpson, Michael L.

    2002-01-01

    We report an integrated CMOS microluminometer optimized for the detection of low-level bioluminescence as part of the bioluminescent bioreporter integrated circuit (BBIC). This microluminometer improves on previous devices through careful management of the sub-femtoampere currents, both signal and leakage, that flow in the front-end processing circuitry. In particular, the photodiode is operated with a reverse bias of only a few mV, requiring special attention to the reset circuitry of the current-to-frequency converter (CFC) that forms the front-end circuit. We report a sub-femtoampere leakage current and a minimum detectable signal (MDS) of 0.15 fA (1510 s integration time) using a room temperature 1.47 mm2 CMOS photodiode. This microluminometer can detect luminescence from as few as 5000 fully induced Pseudomonas fluorescens 5RL bacterial cells. c2002 Elsevier Science B.V. All rights reserved.

  2. Silicon integrated circuits advances in materials and device research

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

  3. NQR Spectrometer with a Two Integrated Circuits Radio Frequency Head

    Science.gov (United States)

    Zikumaru, Yushi

    1990-04-01

    An NQR spectrometer has been constructed using two linear integrated circuits in its oscillator-detector. This is very simple and compact and works in range 3-65 MHz. The radio frequency voltage can be varied from 10 mVp-p to 15 V p-p by changing the supply-voltage of an integrated circuit μA 733. The utility of the spectrometer is demonstrated by recording 35Cl NQR spectra in p-C6H4Cl2 , NaClO3 , and KClO3 .

  4. Thermally-induced voltage alteration for integrated circuit analysis

    Energy Technology Data Exchange (ETDEWEB)

    Cole, Jr., Edward I. (Albuquerque, NM)

    2000-01-01

    A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

  5. Thermally-induced voltage alteration for integrated circuit analysis

    Energy Technology Data Exchange (ETDEWEB)

    Cole, E.I. Jr.

    2000-06-20

    A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

  6. Biochips: The Integrated Circuit of Biology

    DEFF Research Database (Denmark)

    Madsen, Jan

    2012-01-01

    Microfluidic biochips integrate different biochemical analysis functionalities (e.g., dispensers, filters, mixers, separators, detectors) on-chip, miniaturizing the macroscopic chemical and biological processes often processed by lab-robots, to a sub-millimeter scale. These microsystems offer...... several advantages over the conventional biochemical analyzers, e.g., reduced sample and reagent volumes, speeded up biochemical reactions, ultra-sensitive detection and higher system throughput, with several assays being integrated on the same chip. Hence, microfluidic biochips are replacing...... the conventional biochemical analyzers, and areable to integrate on-chip all the necessary functions for biochemical analysis. Microfluidic biochips have an immense potential in multiple application areas, such as clinical diagnostics, advanced sequencing, drug discovery, and environmental monitoring, to name...

  7. Integrated logic circuits using single-atom transistors.

    Science.gov (United States)

    Mol, J A; Verduijn, J; Levine, R D; Remacle, F; Rogge, S

    2011-08-23

    Scaling down the size of computing circuits is about to reach the limitations imposed by the discrete atomic structure of matter. Reducing the power requirements and thereby dissipation of integrated circuits is also essential. New paradigms are needed to sustain the rate of progress that society has become used to. Single-atom transistors, SATs, cascaded in a circuit are proposed as a promising route that is compatible with existing technology. We demonstrate the use of quantum degrees of freedom to perform logic operations in a complementary-metal-oxide-semiconductor device. Each SAT performs multilevel logic by electrically addressing the electronic states of a dopant atom. A single electron transistor decodes the physical multivalued output into the conventional binary output. A robust scalable circuit of two concatenated full adders is reported, where by utilizing charge and quantum degrees of freedom, the functionality of the transistor is pushed far beyond that of a simple switch.

  8. 77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

    Science.gov (United States)

    2012-03-29

    ...] [FR Doc No: 2012-7567] INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated... Certain Semiconductor Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is... importation of certain semiconductor integrated circuit devices and products containing same. The...

  9. 75 FR 51843 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2010-08-23

    ... Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products Containing the Same... certain large scale integrated circuit semiconductor chips and products containing same by reason of... including the following: Freescale Semiconductor Xiqing Integrated Semiconductor Manufacturing...

  10. Photonic Integrated Circuits for mmW Systems

    DEFF Research Database (Denmark)

    Vegas Olmos, Juan José; Heck, M. J. R.; Tafur Monroy, Idelfonso

    and carrier frequencies required for high- capacity wireless networks and remote sensing applications. In this paper, we will introduce our e®orts to leverage the advantages of microwave photonics and photonic integrated circuits to de- velop low-cost and ubiquitous wireless technology enabled by silicon...

  11. Bioluminescent bioreporter integrated circuit devices and methods for detecting ammonia

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L [Knoxville, TN; Paulus, Michael J [Knoxville, TN; Sayler, Gary S [Blaine, TN; Applegate, Bruce M [West Lafayette, IN; Ripp, Steven A [Knoxville, TN

    2007-04-24

    Monolithic bioelectronic devices for the detection of ammonia includes a microorganism that metabolizes ammonia and which harbors a lux gene fused with a heterologous promoter gene stably incorporated into the chromosome of the microorganism and an Optical Application Specific Integrated Circuit (OASIC). The microorganism is generally a bacterium.

  12. Plasma Etching for Failure Analysis of Integrated Circuit Packages

    NARCIS (Netherlands)

    Tang, J.; Schelen, J.B.J.; Beenakker, C.I.M.

    2011-01-01

    Plastic integrated circuit packages with copper wire bonds are decapsulated by a Microwave Induced Plasma system. Improvements on microwave coupling of the system are achieved by frequency tuning and antenna modification. Plasmas with a mixture of O2 and CF4 showed a high etching rate around 2 mm3/m

  13. FUZZY NEURAL NETWORK FOR OBJECT IDENTIFICATION ON INTEGRATED CIRCUIT LAYOUTS

    Directory of Open Access Journals (Sweden)

    A. A. Doudkin

    2015-01-01

    Full Text Available Fuzzy neural network model based on neocognitron is proposed to identify layout objects on images of topological layers of integrated circuits. Testing of the model on images of real chip layouts was showed a highеr degree of identification of the proposed neural network in comparison to base neocognitron.

  14. Electromagnetic Interactions in High-Speed Integrated Electronic Circuits

    Science.gov (United States)

    1989-03-31

    East Lansing, MI, December 1987. [81 D. P. Nyquist, M. S. Viola, M. J. Cloud, and M. Havrilla , "On Sommerfeld-integral electric field kernels for...KERNELS FOR NICROSTRIP-BASED CIRCUITS D.P. Nyquist, M.S. Viola, M.J. Cloud and M. Havrilla Department of Electrical Engineering Michigan State

  15. Three-dimensional integrated circuit design

    CERN Document Server

    Xie, Yuan; Sapatnekar, Sachin S

    2009-01-01

    This book presents an overview of the field of 3D IC design, with an emphasis on electronic design automation (EDA) tools and algorithms that can enable the adoption of 3D ICs, and the architectural implementation and potential for future 3D system design. The aim of this book is to provide the reader with a complete understanding of: the promise of 3D ICs in building novel systems that enable the chip industry to continue along the path of performance scaling, the state of the art in fabrication technologies for 3D integration, the most prominent 3D-specific EDA challenges, along with solutio

  16. Radio frequency integrated circuit design for cognitive radio systems

    CERN Document Server

    Fahim, Amr

    2015-01-01

    This book fills a disconnect in the literature between Cognitive Radio systems and a detailed account of the circuit implementation and architectures required to implement such systems.  Throughout the book, requirements and constraints imposed by cognitive radio systems are emphasized when discussing the circuit implementation details.  In addition, this book details several novel concepts that advance state-of-the-art cognitive radio systems.  This is a valuable reference for anybody with background in analog and radio frequency (RF) integrated circuit design, needing to learn more about integrated circuits requirements and implementation for cognitive radio systems. ·         Describes in detail cognitive radio systems, as well as the circuit implementation and architectures required to implement them; ·         Serves as an excellent reference to state-of-the-art wideband transceiver design; ·         Emphasizes practical requirements and constraints imposed by cognitive radi...

  17. Flexible circuits with integrated switches for robotic shape sensing

    Science.gov (United States)

    Harnett, C. K.

    2016-05-01

    Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

  18. Classical Conditioning with Pulsed Integrated Neural Networks: Circuits and System

    DEFF Research Database (Denmark)

    Lehmann, Torsten

    1998-01-01

    In this paper we investigate on-chip learning for pulsed, integrated neural networks. We discuss the implementational problems the technology imposes on learning systems and we find that abiologically inspired approach using simple circuit structures is most likely to bring success. We develop...... a suitable learning algorithm -- a continuous-time version of a temporal differential Hebbian learning algorithm for pulsed neural systems with non-linear synapses -- as well as circuits for the electronic implementation. Measurements from an experimental CMOS chip are presented. Finally, we use our test...

  19. Digital integrated circuit design using Verilog and SystemVerilog

    CERN Document Server

    Mehler, Ronald W

    2014-01-01

    For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually

  20. Quantum dot rolled-up microtube optoelectronic integrated circuit.

    Science.gov (United States)

    Bhowmick, Sishir; Frost, Thomas; Bhattacharya, Pallab

    2013-05-15

    A rolled-up microtube optoelectronic integrated circuit operating as a phototransceiver is demonstrated. The microtube is made of a InGaAs/GaAs strained bilayer with InAs self-organized quantum dots inserted in the GaAs layer. The phototransceiver consists of an optically pumped microtube laser and a microtube photoconductive detector connected by an a-Si/SiO2 waveguide. The loss in the waveguide and responsivity of the entire phototransceiver circuit are 7.96 dB/cm and 34 mA/W, respectively.

  1. Fully Integrated SAW-Less Discrete-Time Superheterodyne Receiver

    NARCIS (Netherlands)

    Madadi, I.

    2015-01-01

    There are nowadays strong business and technical demands to integrate radio- frequency (RF) receivers (RX) into a complete system-on-chip (SoC) realized in scaled digital processes technology. As a consequence, the RF circuitry has to function well in face of reduced power supply ( V DD ) while the

  2. A fully integrated microbattery for an implantable microelectromechanical system

    Energy Technology Data Exchange (ETDEWEB)

    Albano, F. [Department of Material Science Engineering, University of Michigan, Ann Arbor, MI 48109 (United States); Department of Mechanical Engineering, University of Michigan, Ann Arbor, MI 48109 (United States); Lin, Y.S.; Blaauw, D.; Sylvester, D.M. [Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109 (United States); Wise, K.D. [Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109 (United States); Department of Biomedical Engineering, University of Michigan, Ann Arbor, MI 48109 (United States); Sastry, A.M. [Department of Material Science Engineering, University of Michigan, Ann Arbor, MI 48109 (United States); Department of Biomedical Engineering, University of Michigan, Ann Arbor, MI 48109 (United States); Department of Mechanical Engineering, University of Michigan, Ann Arbor, MI 48109 (United States)

    2008-12-01

    The Wireless Integrated Microsystems Engineering Research Center's Intraocular Sensor (WIMS-ERC IOS) was studied as a model system for an integrated, autonomous implantable device. In the present study, we had four objectives: (1) select and designing an optimized power supply for the WIMS-IOS; (2) develop a fabrication technique allowing small scale, low-cost, and integrable fabrication for CMOS systems, and experimentally demonstrate a microscopic power source; (3) map capacity and lifetime of several fabricated microbatteries; (4) determine the effects of miniaturization on capacity, lifetime and device architecture. Physical vapor deposition (PVD) was used to deposit thin layers ({<=}1 {mu}m) of metal sequentially onto glass substrates (SiO{sub 2}, as used in the device). To map the influence of size over cell capacity and cycle life, we fabricated and tested five stand-alone cells using a Solartron {sup registered} 1470E battery tester and a Maccor {sup registered} 4000 series tester. A sixth battery was fabricated to investigate the effects of system integration, variable discharge rate and size reduction simultaneously. The highest experimental capacity among the larger cells O(cm{sup 2}) was 100 {mu}Ah, achieved by IOS-C-1 at 250 {mu}A (1.4 C) discharge. Among O(mm{sup 2}) cells, IOS-M-1 achieved the highest capacity (2.75 {mu}Ah, {proportional_to}76% of theoretical) at 2.5 {mu}A discharge (0.7 C rate). (author)

  3. Wirelessly powered, fully internal optogenetics for brain, spinal and peripheral circuits in mice.

    Science.gov (United States)

    Montgomery, Kate L; Yeh, Alexander J; Ho, John S; Tsao, Vivien; Mohan Iyer, Shrivats; Grosenick, Logan; Ferenczi, Emily A; Tanabe, Yuji; Deisseroth, Karl; Delp, Scott L; Poon, Ada S Y

    2015-10-01

    To enable sophisticated optogenetic manipulation of neural circuits throughout the nervous system with limited disruption of animal behavior, light-delivery systems beyond fiber optic tethering and large, head-mounted wireless receivers are desirable. We report the development of an easy-to-construct, implantable wireless optogenetic device. Our smallest version (20 mg, 10 mm(3)) is two orders of magnitude smaller than previously reported wireless optogenetic systems, allowing the entire device to be implanted subcutaneously. With a radio-frequency (RF) power source and controller, this implant produces sufficient light power for optogenetic stimulation with minimal tissue heating (optogenetic control throughout the nervous system (brain, spinal cord and peripheral nerve endings) of behaving mice. This technology opens the door for optogenetic experiments in which animals are able to behave naturally with optogenetic manipulation of both central and peripheral targets.

  4. Series-connected substrate-integrated lead-carbon hybrid ultracapacitors with voltage-management circuit

    Indian Academy of Sciences (India)

    A Banerjee; R Srinivasan; A K Shukla

    2015-02-01

    Cell voltage for a fully charged-substrate-integrated lead-carbon hybrid ultracapacitor is about 2.3 V. Therefore, for applications requiring higher DC voltage, several of these ultracapacitors need to be connected in series. However, voltage distribution across each series-connected ultracapacitor tends to be uneven due to tolerance in capacitance and parasitic parallel-resistance values. Accordingly, voltage-management circuit is required to protect constituent ultracapacitors from exceeding their rated voltage. In this study, the design and characterization of the substrate-integrated lead-carbon hybrid ultracapacitor with co-located terminals is discussed. Voltage-management circuit for the ultracapacitor is presented, and its effectiveness is validated experimentally.

  5. Development of a viable 3D integrated circuit technology

    Institute of Scientific and Technical Information of China (English)

    陈文新; 高秉强

    2001-01-01

    Three_dimensional integrated circuit technology with transistors stacked on top of one another in multi-layer silicon film has always been a vision in the future technology direction. While the idea is simple, the technique to obtain high performance multi-layer transistors is extraordinarily difficult. Not until recently does such technology become feasible. In this paper, the background and various techniques to form three-dimensional circuits will be reviewed. Recent development of a simple and promising technology to achieve three-dimensional integration using Metal-Induced-Lateral-Crystallization will be described. Preliminary results of 3D inverters will also be provided to demonstrate the viability for 3D integration.

  6. Millimeter-wave and terahertz integrated circuit antennas

    Science.gov (United States)

    Rebeiz, Gabriel M.

    1992-01-01

    This paper presents a comprehensive review of integrated circuit antennas suitable for millimeter and terahertz applications. A great deal of research was done on integrated circuit antennas in the last decade and many of the problems associated with electrically thick dielectric substrates, such as substrate modes and poor radiation patterns, have been understood and solved. Several new antennas, such as the integrated horn antenna, the dielectric-filled parabola, the Fresnel plate antenna, the dual-slot antenna, and the log-periodic and spiral antennas on extended hemispherical lenses, have resulted in excellent performance at millimeter-wave frequencies, and are covered in detail in this paper. Also, a review of the efficiency definitions used with planar antennas is given in detail in the appendix.

  7. Integrated microchannel cooling in a three dimensional integrated circuit: A thermal management

    Directory of Open Access Journals (Sweden)

    Wang Kang-Jia

    2016-01-01

    Full Text Available Microchannel cooling is a promising technology for solving the three-dimensional integrated circuit thermal problems. However, the relationship between the microchannel cooling parameters and thermal behavior of the three dimensional integrated circuit is complex and difficult to understand. In this paper, we perform a detailed evaluation of the influence of the microchannel structure and the parameters of the cooling liquid on steady-state temperature profiles. The results presented in this paper are expected to aid in the development of thermal design guidelines for three dimensional integrated circuit with microchannel cooling.

  8. RF and microwave integrated circuit development technology, packaging and testing

    CERN Document Server

    Gamand, Patrice; Kelma, Christophe

    2017-01-01

    RF and Microwave Integrated Circuit Development bridges the gap between existing literature, which focus mainly on the 'front-end' part of a product development (system, architecture, design techniques), by providing the reader with an insight into the 'back-end' part of product development. In addition, the authors provide practical answers and solutions regarding the choice of technology, the packaging solutions and the effects on the performance on the circuit and to the industrial testing strategy. It will also discuss future trends and challenges and includes case studies to illustrate examples. * Offers an overview of the challenges in RF/microwave product design * Provides practical answers to packaging issues and evaluates its effect on the performance of the circuit * Includes industrial testing strategies * Examines relevant RF MIC technologies and the factors which affect the choice of technology for a particular application, e.g. technical performance and cost * Discusses future trends and challen...

  9. Integrated circuit electrometer and sweep circuitry for an atmospheric probe

    Science.gov (United States)

    Zimmerman, L. E.

    1971-01-01

    The design of electrometer circuitry using an integrated circuit operational amplifier with a MOSFET input is described. Input protection against static voltages is provided by a dual ultra low leakage diode or a neon lamp. Factors affecting frequency response leakage resistance, and current stability are discussed, and methods are suggested for increasing response speed and for eliminating leakage resistance and current instabilities. Based on the above, two practical circuits, one having a linear response and the other a logarithmic response, were designed and evaluated experimentally. The design of a sweep circuit to implement mobility measurements using atmospheric probes is presented. A triangular voltage waveform is generated and shaped to contain a step in voltage from zero volts in both positive and negative directions.

  10. Fully integrated safeguards and security for reprocessing plant monitoring.

    Energy Technology Data Exchange (ETDEWEB)

    Duran, Felicia Angelica; Ward, Rebecca; Cipiti, Benjamin B.; Middleton, Bobby D.

    2011-10-01

    Nuclear fuel reprocessing plants contain a wealth of plant monitoring data including material measurements, process monitoring, administrative procedures, and physical protection elements. Future facilities are moving in the direction of highly-integrated plant monitoring systems that make efficient use of the plant data to improve monitoring and reduce costs. The Separations and Safeguards Performance Model (SSPM) is an analysis tool that is used for modeling advanced monitoring systems and to determine system response under diversion scenarios. This report both describes the architecture for such a future monitoring system and present results under various diversion scenarios. Improvements made in the past year include the development of statistical tests for detecting material loss, the integration of material balance alarms to improve physical protection, and the integration of administrative procedures. The SSPM has been used to demonstrate how advanced instrumentation (as developed in the Material Protection, Accounting, and Control Technologies campaign) can benefit the overall safeguards system as well as how all instrumentation is tied into the physical protection system. This concept has the potential to greatly improve the probability of detection for both abrupt and protracted diversion of nuclear material.

  11. The two independent equations of circuits in integral form of field theory: The fundamental law of circuits

    Institute of Scientific and Technical Information of China (English)

    CHEN Shennian

    2005-01-01

    Circuit theory is an extremely important basic theory in electrical and electronic sciences and technologies. Over more than a century, researchers have come to the conclusion that a fundamental law of circuits needs to satisfy the following three conditions: (1) Independency. It must be able to solve independently the basic problems of general solutions to the distribution of current and voltage in circuits. (2)Fundamentality. It cannot be derived from circuit theory and it must be the starting point for the establishment of circuit theory; it deduces the problem relevant to circuit theory by using purely logical inference, and establishes circuit theory into an independent deductive system. (3) Applicability. It must be widely applicable to all spheres of circuits,which includes sinusoidal steady-state linear and nonlinear networks, non-sinusoidal steady-state linear and nonlinear networks, transient-state processes, etc. From all networks to which the fundamental law of circuits applies, sinusoidal steady-state linear network is chosen as the most basic one to demonstrate that the two independent equations of circuits in integral form derived from Maxwell equations are able to meet these three conditions. Consequently, it is believed to be the fundamental law of circuits newly recognized today. This paper also makes the initiative to establish a circuit theory by which the basic rules of electromagnetic field govern the circuits, and the unity of electromagnetic fields and circuits is achieved.

  12. Power-Integrated Circuit Active Leakage Current Detector

    Directory of Open Access Journals (Sweden)

    M. F. Bulacio

    2012-01-01

    Full Text Available Most of the failures of induction motors become insulation faults, causing a permanent damage. Using differential current transformers, a system capable of insulation fault detection was developed, based on the differential relay protection scheme. Both signal injection and fault detection circuitry were integrated in a single chip. The proposed scheme is faster than other existing protection and not restricted to protect induction motors, but several other devices (such as IGBTs and systems. This paper explains the principle of operation of fault protection scheme and analyzes an integrated implementation through simulations and experimental results. A power-integrated circuit (PIC implementation is presented.

  13. Attachment method for stacked integrated circuit (IC) chips

    Energy Technology Data Exchange (ETDEWEB)

    Bernhardt, Anthony F. (Berkeley, CA); Malba, Vincent (Livermore, CA)

    1999-01-01

    An attachment method for stacked integrated circuit (IC) chips. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM.

  14. Attachment method for stacked integrated circuit (IC) chips

    Energy Technology Data Exchange (ETDEWEB)

    Bernhardt, A.F.; Malba, V.

    1999-08-03

    An attachment method for stacked integrated circuit (IC) chips is disclosed. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM. 12 figs.

  15. Hardware-Efficient and Fully Autonomous Quantum Error Correction in Superconducting Circuits.

    Science.gov (United States)

    Kapit, Eliot

    2016-04-15

    Superconducting qubits are among the most promising platforms for building a quantum computer. However, individual qubit coherence times are not far past the scalability threshold for quantum error correction, meaning that millions of physical devices would be required to construct a useful quantum computer. Consequently, further increases in coherence time are very desirable. In this Letter, we blueprint a simple circuit consisting of two transmon qubits and two additional lossy qubits or resonators, which is passively protected against all single-qubit quantum error channels through a combination of continuous driving and engineered dissipation. Photon losses are rapidly corrected through two-photon drive fields implemented with driven superconducting quantum interference device couplings, and dephasing from random potential fluctuations is heavily suppressed by the drive fields used to implement the multiqubit Hamiltonian. Comparing our theoretical model to published noise estimates from recent experiments on flux and transmon qubits, we find that logical state coherence could be improved by a factor of 40 or more compared to the individual qubit T_{1} and T_{2} using this technique. We thus demonstrate that there is substantial headroom for improving the coherence of modern superconducting qubits with a fairly modest increase in device complexity.

  16. Hardware-Efficient and Fully Autonomous Quantum Error Correction in Superconducting Circuits

    Science.gov (United States)

    Kapit, Eliot

    2016-04-01

    Superconducting qubits are among the most promising platforms for building a quantum computer. However, individual qubit coherence times are not far past the scalability threshold for quantum error correction, meaning that millions of physical devices would be required to construct a useful quantum computer. Consequently, further increases in coherence time are very desirable. In this Letter, we blueprint a simple circuit consisting of two transmon qubits and two additional lossy qubits or resonators, which is passively protected against all single-qubit quantum error channels through a combination of continuous driving and engineered dissipation. Photon losses are rapidly corrected through two-photon drive fields implemented with driven superconducting quantum interference device couplings, and dephasing from random potential fluctuations is heavily suppressed by the drive fields used to implement the multiqubit Hamiltonian. Comparing our theoretical model to published noise estimates from recent experiments on flux and transmon qubits, we find that logical state coherence could be improved by a factor of 40 or more compared to the individual qubit T1 and T2 using this technique. We thus demonstrate that there is substantial headroom for improving the coherence of modern superconducting qubits with a fairly modest increase in device complexity.

  17. Design and implementation of a high sensitivity fully integrated passive UHF RFID tag

    Science.gov (United States)

    Shoucheng, Li; Xin'an, Wang; Ke, Lin; Jinpeng, Shen; Jinhai, Zhang

    2014-10-01

    A fully integrated passive UHF RFID tag complying with the ISO18000-6B protocol is presented, which includes an analog front-end, a baseband processor, and an EEPROM memory. To extend the communication range, a high efficiency differential-drive CMOS rectifier is adopted. A novel high performance voltage limiter is used to provide a stable limiting voltage, with a 172 mV voltage variation against temperature variation and process dispersion. The dynamic band-enhancement technique is used in the regulator circuit to improve the regulating capacity. A rail-to-rail hysteresis comparator is adopted to demodulate the signal correctly in any condition. The whole transponder chip is implemented in a 0.18 μm CMOS process, with a die size of 900 × 800 μm2. Our measurement results show that the total power consumption of the tag chip is only 6.8 μW, with a sensitivity of -13.5 dBm

  18. 77 FR 42764 - Certain Integrated Circuits, Chipsets, & Products Containing Same Including Televisions; Notice...

    Science.gov (United States)

    2012-07-20

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION Certain Integrated Circuits, Chipsets, & Products Containing Same Including Televisions; Notice of... limited exclusion order against certain integrated circuits, chipsets, and products containing the...

  19. 75 FR 75694 - Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing...

    Science.gov (United States)

    2010-12-06

    ... COMMISSION Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing... United States after importation of certain semiconductor integrated circuits using tungsten metallization... following six respondents ] remained in the investigation: Tower Semiconductor, Ltd. of Israel;...

  20. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

    Science.gov (United States)

    Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

    2017-02-01

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

  1. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit

    Science.gov (United States)

    Chakrabarti, B.; Lastras-Montaño, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Cheng, K.-T.; Strukov, D. B.

    2017-01-01

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore’s law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + “Molecular”) architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit. PMID:28195239

  2. Total Dose Effects on Bipolar Integrated Circuits at Low Temperature

    Science.gov (United States)

    Johnston, A. H.; Swimm, R. T.; Thorbourn, D. O.

    2012-01-01

    Total dose damage in bipolar integrated circuits is investigated at low temperature, along with the temperature dependence of the electrical parameters of internal transistors. Bandgap narrowing causes the gain of npn transistors to decrease far more at low temperature compared to pnp transistors, due to the large difference in emitter doping concentration. When irradiations are done at temperatures of -140 deg C, no damage occurs until devices are warmed to temperatures above -50 deg C. After warm-up, subsequent cooling shows that damage is then present at low temperature. This can be explained by the very strong temperature dependence of dispersive transport in the continuous-time-random-walk model for hole transport. For linear integrated circuits, low temperature operation is affected by the strong temperature dependence of npn transistors along with the higher sensitivity of lateral and substrate pnp transistors to radiation damage.

  3. PECASE: All-Optical Photonic Integrated Circuits in Silicon

    Science.gov (United States)

    2011-01-14

    Soltani , and A. Adibi, “High Quality Planar Silicon Nitride Microdisk Resonators for Integrated Photonics in the Visible Wavelength Range,” Optics...contrast, high-Q resonators in chalcogenide glass for sensing,” Opt. Lett. 33, 2500–2502 (2008). [4] B. Momeni, S. Yegnanarayanan, M. Soltani , A. A...lightwave circuits,” J. Lightwave Technol. 17(11), 2032–2038 (1999). [14] B. Momeni, J. Huang, M. Soltani , M. Askari, S. Mohammadi, M. Rakhshandehroo, and

  4. Integrated Circuit Readout for the Silicon Sensor Test Station

    CERN Document Server

    Atkin, E; Silaev, A; Fedenko, A; Karmanov, D; Merkin, M; Voronin, A

    2009-01-01

    Various chips for the silicon sensors measurements are described. These chips are based on 0.35 um and 0.18um CMOS technology. Several analog chips together with self-trigger /derandomizer one allow to measure silicon sensors designed for different purposes. Tracking systems, calorimeters, particle charge measurement system and other application sensors can be investigated by the integrated circuit readout with laser or radioactive sources. Also electrical parameters of silicon sensors can be studied by such test setup.

  5. Optimization of Segmentation Quality of Integrated Circuit Images

    Directory of Open Access Journals (Sweden)

    Gintautas Mušketas

    2012-04-01

    Full Text Available The paper presents investigation into the application of genetic algorithms for the segmentation of the active regions of integrated circuit images. This article is dedicated to a theoretical examination of the applied methods (morphological dilation, erosion, hit-and-miss, threshold and describes genetic algorithms, image segmentation as optimization problem. The genetic optimization of the predefined filter sequence parameters is carried out. Improvement to segmentation accuracy using a non optimized filter sequence makes 6%.Artcile in Lithuanian

  6. Experimental study of surface crystallization on integrated circuit chips

    Institute of Scientific and Technical Information of China (English)

    Zhang Xin; Liu Meng-Xin; Gao Yong; Wang Cai-Lin; Wang Zhi-Wei; Zhang Xian

    2006-01-01

    A surface crystallization phenomenon on bonding pads and wires of integrated circuit chip is reported in this paper. Through a lot of experiments, an unknown failure effect caused by mixed crystalline matter is revealed, whereas non-plasma fluorine contamination cannot cause the failure of bonding pads. By experiments combined with infrared spectroscopy analysis, the surface crystallization effect is studied. The conclusion of the study can provide the guidance for IC fabrication, modelling and analysis.

  7. Advances in Developing Transitions in Microwave Integrated Circuits

    Institute of Scientific and Technical Information of China (English)

    ZHANG Yun-chuan; WANG Bing-zhong

    2005-01-01

    Advances in developing transitions in microwave integrated circuits during the last ten years are reviewed. Some typical structures of transition are introduced. Transition structures can be classified into two basic types: one is transition between the same kind of transmission lines on different planes of a common substrate, the other transition between different types of transmission lines.Furthermore, future development of transition structures is discussed.

  8. Ohmic Contacts for High Temperature Integrated Circuits in Silicon Carbide

    OpenAIRE

    2014-01-01

    In electrical devices and integrated circuits, ohmic contacts are necessary and a prerequisite for the current transport over the metal-semiconductor junctions. At the same time, a desired property of the ohmic contacts is to not add resistance or in other way disturb the performance. For high temperature electronics, the material demands are high regarding functionality and stability at elevated working temperatures, during and after temperature cycling and during long time of use.  Silicon ...

  9. Integrated silicon and silicon nitride photonic circuits on flexible substrates.

    Science.gov (United States)

    Chen, Yu; Li, Mo

    2014-06-15

    Flexible integrated photonic devices based on crystalline materials on plastic substrates have a promising potential in many unconventional applications. In this Letter, we demonstrate a fully integrated photonic system including ring resonators and grating couplers, based on both crystalline silicon and silicon nitride, on flexible plastic substrate by using the stamping-transfer method. A high yield has been achieved by a simple, yet reliable transfer method without significant performance degradation.

  10. Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

    CERN Document Server

    Ding, Yunhong; Dalgaard, Kjeld; Ye, Feihong; Asif, Rameez; Gross, Simon; Withford, Michael J; Galili, Michael; Morioka, Toshio; Oxenlowe, Leif Katsuo

    2016-01-01

    Space division multiplexing using multicore fibers is becoming a more and more promising technology. In space-division multiplexing fiber network, the reconfigurable switch is one of the most critical components in network nodes. In this paper we for the first time demonstrate reconfigurable space-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-on-insulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7x7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained for the whole C-band. 1 Tb/s/core transmission over a 2-km 7-core fiber and space-division multiplexing swi...

  11. Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

    Science.gov (United States)

    Zhang, Bowei; Dong, Quan; Korman, Can E.; Li, Zhenyu; Zaghloul, Mona E.

    2013-01-01

    A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstration we integrated a CMOS magnetic sensor chip and associate microfluidic channels on a polydimethylsiloxane (PDMS) substrate that allows precise delivery of small liquid samples to the sensor. Furthermore, the packaged system is fully functional under bending curvature radius of one centimetre and uniaxial strain of 15%. The flexible integration of solid-state ICs with microfluidics enables compact flexible electronic and lab-on-a-chip systems, which hold great potential for wearable health monitoring, point-of-care diagnostics and environmental sensing among many other applications.

  12. 77 FR 1505 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice...

    Science.gov (United States)

    2012-01-10

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice... importation, and the sale within the United States after importation of certain integrated circuits, chipsets... importation, or the sale within the United States after importation of certain integrated circuits,...

  13. 77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

    Science.gov (United States)

    2012-05-01

    ... COMMISSION Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of... the sale within the United States after importation of certain semiconductor integrated circuit... semiconductor integrated circuit devices and products containing same that infringe one or more of claims 1,...

  14. Arbitrary modeling of TSVs for 3D integrated circuits

    CERN Document Server

    Salah, Khaled; El-Rouby, Alaa

    2014-01-01

    This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductor?and inductive-based

  15. Photonic-integrated circuit for continuous-wave THz generation.

    Science.gov (United States)

    Theurer, Michael; Göbel, Thorsten; Stanze, Dennis; Troppenz, Ute; Soares, Francisco; Grote, Norbert; Schell, Martin

    2013-10-01

    We demonstrate a photonic-integrated circuit for continuous-wave (cw) terahertz (THz) generation. By comprising two lasers and an optical phase modulator on a single chip, the full control of the THz signal is enabled via a unique bidirectional operation technique. Integrated heaters allow for continuous tuning of the THz frequency over 570 GHz. Applied to a coherent cw THz photomixing system operated at 1.5 μm optical wavelength, we reach a signal-to-noise ratio of 44 dB at 1.25 THz, which is identical to the performance of a standard system based on discrete components.

  16. Diamond electro-optomechanical resonators integrated in nanophotonic circuits

    CERN Document Server

    Rath, P; Diewald, S; Lewes-Malandrakis, G; Brink, D; Heidrich, N; Nebel, C; Pernice, W H P

    2014-01-01

    Diamond integrated photonic devices are promising candidates for emerging applications in nanophotonics and quantum optics. Here we demonstrate active modulation of diamond nanophotonic circuits by exploiting mechanical degrees of freedom in free-standing diamond electro-optomechanical resonators. We obtain high quality factors up to 9600, allowing us to read out the driven nanomechanical response with integrated optical interferometers with high sensitivity. We are able to excite higher order mechanical modes up to 115 MHz and observe the nanomechanical response also under ambient conditions.

  17. FDTD-SPICE for Characterizing Metamaterials Integrated with Electronic Circuits

    Directory of Open Access Journals (Sweden)

    Zhengwei Hao

    2012-01-01

    Full Text Available A powerful time-domain FDTD-SPICE simulator is implemented and applied to the broadband analysis of metamaterials integrated with active and tunable circuit elements. First, the FDTD-SPICE modeling theory is studied and details of interprocess communication and hybridization of the two techniques are discussed. To verify the model, some simple cases are simulated with results in both time domain and frequency domain. Then, simulation of a metamaterial structure constructed from periodic resonant loops integrated with lumped capacitor elements is studied, which demonstrates tuning resonance frequency of medium by changing the capacitance of the integrated elements. To increase the bandwidth of the metamaterial, non-Foster transistor configurations are integrated with the loops and FDTD-SPICE is applied to successfully bridge the physics of electromagnetic and circuit topologies and to model the whole composite structure. Our model is also applied to the design and simulation of a metasurface integrated with nonlinear varactors featuring tunable reflection phase characteristic.

  18. Universal discrete Fourier optics RF photonic integrated circuit architecture.

    Science.gov (United States)

    Hall, Trevor J; Hasan, Mehedi

    2016-04-04

    This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

  19. Compressive failure modes and parameter optimization of the trabecular structure of biomimetic fully integrated honeycomb plates.

    Science.gov (United States)

    Chen, Jinxiang; Tuo, Wanyong; Zhang, Xiaoming; He, Chenglin; Xie, Juan; Liu, Chang

    2016-12-01

    To develop lightweight biomimetic composite structures, the compressive failure and mechanical properties of fully integrated honeycomb plates were investigated experimentally and through the finite element method. The results indicated that: fracturing of the fully integrated honeycomb plates primarily occurred in the core layer, including the sealing edge structure. The morphological failures can be classified into two types, namely dislocations and compactions, and were caused primarily by the stress concentrations at the interfaces between the core layer and the upper and lower laminations and secondarily by the disordered short-fiber distribution in the material; although the fully integrated honeycomb plates manufactured in this experiment were imperfect, their mass-specific compressive strength was superior to that of similar biomimetic samples. Therefore, the proposed bio-inspired structure possesses good overall mechanical properties, and a range of parameters, such as the diameter of the transition arc, was defined for enhancing the design of fully integrated honeycomb plates and improving their compressive mechanical properties.

  20. SEMICONDUCTOR INTEGRATED CIRCUITS: 4 GHz bit-stream adder based on ΣΔ modulation

    Science.gov (United States)

    Yong, Liang; Zhigong, Wang; Qiao, Meng; Xiaodan, Guo

    2010-08-01

    The conventional circuit model of a bit-stream adder based on sigma delta (ΣΔ) modulation is improved with pipeline technology to make it work correctly at high frequencies. The integrated circuit (IC) of the bit-stream adder is designed with the source coupled logic structure and designed at the transistor level to increase the operating frequency. The IC is fabricated in TSMC's 0.18-μm CMOS process. The chip area is 475 × 570 μm2. A fully digital ΣΔ signal generator is designed with a field programmable gate array to test the chip. Experimental results show that the chip meets the function and performance demand of the design, and the chip can work at a frequency of higher than 4 GHz. The noise performance of the adder is analyzed and compared with both theory and experimental results.

  1. Scalable, Lightweight, Integrated and Quick-to-Assemble (SLIQ) Hyperdrives for Functional Circuit Dissection.

    Science.gov (United States)

    Liang, Li; Oline, Stefan N; Kirk, Justin C; Schmitt, Lukas Ian; Komorowski, Robert W; Remondes, Miguel; Halassa, Michael M

    2017-01-01

    Independently adjustable multielectrode arrays are routinely used to interrogate neuronal circuit function, enabling chronic in vivo monitoring of neuronal ensembles in freely behaving animals at a single-cell, single spike resolution. Despite the importance of this approach, its widespread use is limited by highly specialized design and fabrication methods. To address this, we have developed a Scalable, Lightweight, Integrated and Quick-to-assemble multielectrode array platform. This platform additionally integrates optical fibers with independently adjustable electrodes to allow simultaneous single unit recordings and circuit-specific optogenetic targeting and/or manipulation. In current designs, the fully assembled platforms are scalable from 2 to 32 microdrives, and yet range 1-3 g, light enough for small animals. Here, we describe the design process starting from intent in computer-aided design, parameter testing through finite element analysis and experimental means, and implementation of various applications across mice and rats. Combined, our methods may expand the utility of multielectrode recordings and their continued integration with other tools enabling functional dissection of intact neural circuits.

  2. Scalable, Lightweight, Integrated and Quick-to-Assemble (SLIQ) Hyperdrives for Functional Circuit Dissection

    Science.gov (United States)

    Liang, Li; Oline, Stefan N.; Kirk, Justin C.; Schmitt, Lukas Ian; Komorowski, Robert W.; Remondes, Miguel; Halassa, Michael M.

    2017-01-01

    Independently adjustable multielectrode arrays are routinely used to interrogate neuronal circuit function, enabling chronic in vivo monitoring of neuronal ensembles in freely behaving animals at a single-cell, single spike resolution. Despite the importance of this approach, its widespread use is limited by highly specialized design and fabrication methods. To address this, we have developed a Scalable, Lightweight, Integrated and Quick-to-assemble multielectrode array platform. This platform additionally integrates optical fibers with independently adjustable electrodes to allow simultaneous single unit recordings and circuit-specific optogenetic targeting and/or manipulation. In current designs, the fully assembled platforms are scalable from 2 to 32 microdrives, and yet range 1–3 g, light enough for small animals. Here, we describe the design process starting from intent in computer-aided design, parameter testing through finite element analysis and experimental means, and implementation of various applications across mice and rats. Combined, our methods may expand the utility of multielectrode recordings and their continued integration with other tools enabling functional dissection of intact neural circuits. PMID:28243194

  3. Integrating anatomy and function for zebrafish circuit analysis.

    Science.gov (United States)

    Arrenberg, Aristides B; Driever, Wolfgang

    2013-01-01

    Due to its transparency, virtually every brain structure of the larval zebrafish is accessible to light-based interrogation of circuit function. Advanced stimulation techniques allow the activation of optogenetic actuators at different resolution levels, and genetically encoded calcium indicators report the activity of a large proportion of neurons in the CNS. Large datasets result and need to be analyzed to identify cells that have specific properties-e.g., activity correlation to sensory stimulation or behavior. Advances in three-dimensional (3D) functional mapping in zebrafish are promising; however, the mere coordinates of implicated neurons are not sufficient. To comprehensively understand circuit function, these functional maps need to be placed into the proper context of morphological features and projection patterns, neurotransmitter phenotypes, and key anatomical landmarks. We discuss the prospect of merging functional and anatomical data in an integrated atlas from the perspective of our work on long-range dopaminergic neuromodulation and the oculomotor system. We propose that such a resource would help researchers to surpass current hurdles in circuit analysis to achieve an integrated understanding of anatomy and function.

  4. Design automation for integrated nonlinear logic circuits (Conference Presentation)

    Science.gov (United States)

    Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

    2016-05-01

    A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite

  5. SEMICONDUCTOR INTEGRATED CIRCUITS: Soft error generation analysis in combinational logic circuits

    Science.gov (United States)

    Qian, Ding; Yu, Wang; Rong, Luo; Hui, Wang; Huazhong, Yang

    2010-09-01

    Reliability is expected to become a big concern in future deep sub-micron integrated circuits design. Soft error rate (SER) of combinational logic is considered to be a great reliability problem. Previous SER analysis and models indicated that glitch width has a great impact on electrical masking and latch window masking effects, but they failed to achieve enough insights. In this paper, an analytical glitch generation model is proposed. This model shows that after an inflexion point the collected charge has an exponential relationship with glitch duration and the model only introduces an estimation error of on average 2.5%.

  6. Monocrystalline silicon used for integrated circuits: still on the way

    Institute of Scientific and Technical Information of China (English)

    Jia-he CHEN; De-ren YANG; Duan-lin QUE

    2008-01-01

    With the rapid development of semiconductor technology, highly integrated circuits (ICs) and future nano-scale devices require large diameter and defect-free monocrystalline silicon wafers. The ongoing innovation from silicon materials is one of the driving forces in future micro and nano-technologies. In this work, the recent developments in the controlling of large diameter silicon crystal growth processes, the improvement of material features by co-doping with the intend-introduced impur-ities, and the progress of defect engineered silicon wafers (epitaxial silicon wafer, strained silicon, silicon on insu-lator) are reviewed. It is proposed that the silicon man-ufacturing infrastructure could still meet the increasingly stringent requirements arising from ULSI circuits and will expand Moore's law into a couple of decades.

  7. Integrated Circuit Design in US High-Energy Physics

    CERN Document Server

    De Geronimo, G; Bebek, C; Garcia-Sciveres, M; Von der Lippe, H; Haller, G; Grillo, A A; Newcomer, M

    2013-01-01

    This whitepaper summarizes the status, plans, and challenges in the area of integrated circuit design in the United States for future High Energy Physics (HEP) experiments. It has been submitted to CPAD (Coordinating Panel for Advanced Detectors) and the HEP Community Summer Study 2013(Snowmass on the Mississippi) held in Minnesota July 29 to August 6, 2013. A workshop titled: US Workshop on IC Design for High Energy Physics, HEPIC2013 was held May 30 to June 1, 2013 at Lawrence Berkeley National Laboratory (LBNL). A draft of the whitepaper was distributed to the attendees before the workshop, the content was discussed at the meeting, and this document is the resulting final product. The scope of the whitepaper includes the following topics: Needs for IC technologies to enable future experiments in the three HEP frontiers Energy, Cosmic and Intensity Frontiers; Challenges in the different technology and circuit design areas and the related R&D needs; Motivation for using different fabrication technologies...

  8. Adaptive Voltage Management Enabling Energy Efficiency in Nanoscale Integrated Circuits

    Science.gov (United States)

    Shapiro, Alexander E.

    Battery powered devices emphasize energy efficiency in modern sub-22 nm CMOS microprocessors rendering classic power reduction solutions not sufficient. Classical solutions that reduce power consumption in high performance integrated circuits are superseded with novel and enhanced power reduction techniques to enable the greater energy efficiency desired in modern microprocessors and emerging mobile platforms. Dynamic power consumption is reduced by operating over a wide range of supply voltages. This region of operation is enabled by a high speed and power efficient level shifter which translates low voltage digital signals to higher voltages (and vice versa), a key component that enables communication among circuits operating at different voltage levels. Additionally, optimizing the wide supply voltage range of signals propagating across long interconnect enables greater energy savings. A closed-form delay model supporting wide voltage range is developed to enable this capability. The model supports an ultra-wide voltage range from nominal voltages to subthreshold voltages, and a wide range of repeater sizes. To mitigate the drawback of lower operating speed at reduced supply voltages, the high performance exhibited by MOS current mode logic technology is exploited. High performance and energy efficient circuits are enabled by combining this logic style with power efficient near threshold circuits. Many-core systems that operate at high frequencies and process highly parallel workloads benefit from this combination of MCML with NTC. Due to aggressive scaling, static power consumption can in some cases overshadow dynamic power. Techniques to lower leakage power have therefore become an important objective in modern microprocessors. To address this issue, an adaptive power gating technique is proposed. This technique utilizes high levels of granularity to save additional leakage power when a circuit is active as opposed to standard power gating that saves static

  9. Implantable neurotechnologies: a review of integrated circuit neural amplifiers.

    Science.gov (United States)

    Ng, Kian Ann; Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V

    2016-01-01

    Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

  10. High-precision analog circuit technology for power supply integrated circuits; Dengen IC yo koseido anarogu kairo gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Nakamori, A.; Suzuki, T.; Mizoe, K. [Fuji Electric Corporate Research and Development,Ltd., Kanagawa (Japan)

    2000-08-10

    With the recent rapid spread of portable electronic appliances, specification requirements such as compact power supply and long operation with batteries have become severer. Power supply ICs (integrated circuits) are required to reduce power consumption in the circuit and perform high-precision control. To meet these requirements, Fuji Electric develops high-precision CMOS (complementary metal-oxide semiconductor) analog technology. This paper describes three analog circuit technologies of a voltage reference, an operational amplifier and a comparator as circuit components particularly important for the precision of power supply ICs. (author)

  11. 77 FR 66481 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice...

    Science.gov (United States)

    2012-11-05

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions; Notice..., and the sale within the United States after importation of certain integrated circuits, chipsets, and... Circuits, Chipsets, and Products Containing Same Including Televisions, Inv. No. 337-TA-786. On August...

  12. Noise estimation for deep sub-micron integrated circuits

    Institute of Scientific and Technical Information of China (English)

    陈彬; 杨华中; 汪惠

    2001-01-01

    Noise analysis and avoidance are an increasingly critical step in the design of deep submicron (DSM) integrated circuits (Ics). The crosstalk between neighboring interconnects gradually becomes the main noise sources in DSM Ics. We introduce an efficient and accurate noise-evaluation method for capacitively coupled nets of Ics. The method holds for a victim net with arbitrary number of aggressive nets under ramp input excitation. For common RC nets extracted by electronic design automation (EDA) tools, the deviation between our method and HSPICE is under 10%.

  13. Investigation of Optimal Integrated Circuit Raster Image Vectorization Method

    Directory of Open Access Journals (Sweden)

    Leonas Jasevičius

    2011-03-01

    Full Text Available Visual analysis of integrated circuit layer requires raster image vectorization stage to extract layer topology data to CAD tools. In this paper vectorization problems of raster IC layer images are presented. Various line extraction from raster images algorithms and their properties are discussed. Optimal raster image vectorization method was developed which allows utilization of common vectorization algorithms to achieve the best possible extracted vector data match with perfect manual vectorization results. To develop the optimal method, vectorized data quality dependence on initial raster image skeleton filter selection was assessed.Article in Lithuanian

  14. The FE-I4 pixel readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M., E-mail: mgarcia-sciveres@bl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Arutinov, D.; Barbero, M. [University of Bonn, Bonn (Germany); Beccherle, R. [Istituto Nazionale di Fisica Nucleare Sezione di Genova, Genova (Italy); Dube, S.; Elledge, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Fleury, J. [Laboratoire de l' Accelerateur Lineaire, Orsay (France); Fougeron, D.; Gensolen, F. [Centre de Physique des Particules de Marseille, Marseille (France); Gnani, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Gromov, V. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Hemperek, T.; Karagounis, M. [University of Bonn, Bonn (Germany); Kluit, R. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Kruth, A. [University of Bonn, Bonn (Germany); Mekkaoui, A. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Menouni, M. [Centre de Physique des Particules de Marseille, Marseille (France); Schipper, J.-D. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands)

    2011-04-21

    A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.

  15. CALCULATIONS OF DOUBLE IMPURITY DIFFUSION IN INTEGRATED CIRCUIT PRODUCTION

    Directory of Open Access Journals (Sweden)

    V. A. Bondarev

    2005-01-01

    Full Text Available Analytical formulae for calculating simultaneous diffusion of two impurities in silicon are presented. The formulae are based on analytical solutions of diffusion equations that have been obtained for the first time by the author while using some special mathematical functions. In contrast to usual formal mathematical approaches, new functions are determined in the process of investigation of real physical models. Algorithms involve some important relations from thermodynamics of irreversible processes and also variational thermodynamic functionals that were previously obtained by the author for transfer processes. Calculations considerably reduce the time required for development of new integrated circuits

  16. Cycles of self-pulsations in a photonic integrated circuit.

    Science.gov (United States)

    Karsaklian Dal Bosco, Andreas; Kanno, Kazutaka; Uchida, Atsushi; Sciamanna, Marc; Harayama, Takahisa; Yoshimura, Kazuyuki

    2015-12-01

    We report experimentally on the bifurcation cascade leading to the appearance of self-pulsation in a photonic integrated circuit in which a laser diode is subjected to delayed optical feedback. We study the evolution of the self-pulsing frequency with the increase of both the feedback strength and the injection current. Experimental observations show good qualitative accordance with numerical results carried out with the Lang-Kobayashi rate equation model. We explain the mechanism underlying the self-pulsations by a phenomenon of beating between successive pairs of external cavity modes and antimodes.

  17. Integrated circuit authentication hardware Trojans and counterfeit detection

    CERN Document Server

    Tehranipoor, Mohammad; Zhang, Xuehui

    2013-01-01

    This book describes techniques to verify the authenticity of integrated circuits (ICs). It focuses on hardware Trojan detection and prevention and counterfeit detection and prevention. The authors discuss a variety of detection schemes and design methodologies for improving Trojan detection techniques, as well as various attempts at developing hardware Trojans in IP cores and ICs. While describing existing Trojan detection methods, the authors also analyze their effectiveness in disclosing various types of Trojans, and demonstrate several architecture-level solutions. 

  18. VISA Final Report: Fully Integrated Power Electronic Systems in Automotive Electronics

    NARCIS (Netherlands)

    Waffenschmidt, E.

    2011-01-01

    This report summarizes the activities related to the public funded project “Vollintegrierte leistungselektronische Systeme in der Automobilelektronik – VISA” (Fully Integrated Power Electronic Systems in Automotive Electronics). Aim of the project is to investigate the integration of components into

  19. A novel voltage output integrated circuit temperature sensor

    Institute of Scientific and Technical Information of China (English)

    吴晓波; 方志刚; 等

    2002-01-01

    The novel integrated circuit(IC) temperature sensor presented in this paper works similarly as a two-terminal Zener,has breakdown voltage directly proportional to Kelvin temperature at 10mV/℃,with typical error of less tha ±1.0℃ over a temperature range from-50℃to +120℃ .In addition to all the features that conventional IC temperature sensors have,the new device also has very low static power dissipation(0.5mW),low output impedance(less than 1Ω),execllent stability,high reproducibility,and high precision.The sensor's circuit design and layout are discussed in detail.Applications of the sensor include almost and type of temperature sensing over the range of -50℃-+125℃。The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy.Due to the excellent performance and low cost of this sensor.more application of the sensor over wide temperature range are expected.

  20. Stainless Steel NaK Circuit Integration and Fill Submission

    Science.gov (United States)

    Garber, Anne E.

    2006-01-01

    The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed to hold a eutectic mixture of sodium potassium (NaK), was redesigned to hold lithium; but due to a shift in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature loop include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a full design) was selected for fabrication and test. This document summarizes the integration and fill of the pumped liquid metal NaK flow circuit.

  1. Design and application of multilayer monolithic microwave integrated circuit transformers

    Energy Technology Data Exchange (ETDEWEB)

    Economides, S.B

    1999-07-01

    fabricated on standard foundry processes. With careful modelling it is also feasible to integrate the two couplers into a single tri-filar transformer structure. This is a robust balun topology, which could be widely adopted. A push-pull MESFET amplifier with 8 dB gain demonstrated this at 12 GHz, using the balun chips connected to amplifier circuits. (author)

  2. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit.

    Science.gov (United States)

    Nakazato, Kazuo

    2014-03-28

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor.

  3. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit

    Science.gov (United States)

    Nakazato, Kazuo

    2014-01-01

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor. PMID:24567475

  4. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  5. RELATIONAL THEORY APPLICATION FOR OPTIMAL DESIGN OF INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    D. V. Demidov

    2014-09-01

    Full Text Available This paper deals with a method of relational theory adaptation for integrated circuits CAD systems. A new algorithm is worked out for optimal search of implicit Don’t Care values for combinational multiple-level digital circuits. The algorithm is described in terms of the adapted relational theory that gives the possibility for a very simple algorithm description for both intuitive understanding and formal analysis. The proposed method makes it possible to apply progressive experience of relational databases in efficient implementation of relational algebra operations (including distributed ones. Comparative analysis of the proposed algorithm and a classic one for optimal search of implicit Don’t Cares is carried out. The analysis has proved formal correctness of the proposed algorithm and its considerably less worst-case complexity. The search of implicit Don’t Care values in the integrated circuits design makes it easier to optimize such characteristics of IC as chip area, power, verifiability and reliability. However, the classic algorithm for optimal search of implicit Don’t Care values is not used in practice due to its very high computational complexity. Application of algorithms for sub-optimal search doesn’t give the possibility to realize the potential of IC optimization to the full. Implementation of the proposed algorithm in IC CAD (a.k.a., EDA systems is adequate due to much lower computational complexity, and potentially makes it possible to improve the quality-development time ratio of IC (chip area, power, verifiability and reliability. Developed method gives the possibility for creation of distributed EDA system with higher computational power and, consequently, for design automation of more complex IC.

  6. Bipolar integrated circuits in SiC for extreme environment operation

    Science.gov (United States)

    Zetterling, Carl-Mikael; Hallén, Anders; Hedayati, Raheleh; Kargarrazi, Saleh; Lanni, Luigia; Malm, B. Gunnar; Mardani, Shabnam; Norström, Hans; Rusu, Ana; Saveda Suvanam, Sethu; Tian, Ye; Östling, Mikael

    2017-03-01

    Silicon carbide (SiC) integrated circuits have been suggested for extreme environment operation. The challenge of a new technology is to develop process flow, circuit models and circuit designs for a wide temperature range. A bipolar technology was chosen to avoid the gate dielectric weakness and low mobility drawback of SiC MOSFETs. Higher operation temperatures and better radiation hardness have been demonstrated for bipolar integrated circuits. Both digital and analog circuits have been demonstrated in the range from room temperature to 500 °C. Future steps are to demonstrate some mixed signal circuits of greater complexity. There are remaining challenges in contacting, metallization, packaging and reliability.

  7. Mixed signal custom integrated circuit development for physics instrumentation

    Energy Technology Data Exchange (ETDEWEB)

    Britton, C.L. Jr.; Bryan, W.L.; Emery, M.S. [and others

    1998-10-01

    The Monolithic Systems Development Group at the Oak Ridge National Laboratory has been greatly involved in custom mixed-mode integrated circuit development for the PHENIX detector at the Relativistic Heavy Ion collider (RHIC) at Brookhaven National Laboratory and position-sensitive germanium spectrometer front-ends for the Naval Research Laboratory (NRL). This paper will outline the work done for both PHENIX and the Naval Research Laboratory in the area of full-custom, mixed-signal CMOS integrated electronics. This paper presents the architectures chosen for the various PHENIX detectors which include position-sensitive silicon, capacitive pixel, and phototube detectors, and performance results for the subsystems as well as a system description of the NRL germanium strip system and its performance. The performance of the custom preamplifiers, discriminators, analog memories, analog-digital converters, and control circuitry for all systems will be presented.

  8. Development of optical packet and circuit integrated ring network testbed.

    Science.gov (United States)

    Furukawa, Hideaki; Harai, Hiroaki; Miyazawa, Takaya; Shinada, Satoshi; Kawasaki, Wataru; Wada, Naoya

    2011-12-12

    We developed novel integrated optical packet and circuit switch-node equipment. Compared with our previous equipment, a polarization-independent 4 × 4 semiconductor optical amplifier switch subsystem, gain-controlled optical amplifiers, and one 100 Gbps optical packet transponder and seven 10 Gbps optical path transponders with 10 Gigabit Ethernet (10GbE) client-interfaces were newly installed in the present system. The switch and amplifiers can provide more stable operation without equipment adjustments for the frequent polarization-rotations and dynamic packet-rate changes of optical packets. We constructed an optical packet and circuit integrated ring network testbed consisting of two switch nodes for accelerating network development, and we demonstrated 66 km fiber transmission and switching operation of multiplexed 14-wavelength 10 Gbps optical paths and 100 Gbps optical packets encapsulating 10GbE frames. Error-free (frame error rate < 1×10(-4)) operation was achieved with optical packets of various packet lengths and packet rates, and stable operation of the network testbed was confirmed. In addition, 4K uncompressed video streaming over OPS links was successfully demonstrated.

  9. Graphene/Si CMOS hybrid hall integrated circuits.

    Science.gov (United States)

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-07-07

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process.

  10. Graphene/Si CMOS Hybrid Hall Integrated Circuits

    Science.gov (United States)

    Huang, Le; Xu, Huilong; Zhang, Zhiyong; Chen, Chengying; Jiang, Jianhua; Ma, Xiaomeng; Chen, Bingyan; Li, Zishen; Zhong, Hua; Peng, Lian-Mao

    2014-07-01

    Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS ICs for the first time, and a high performance graphene/CMOS hybrid Hall IC is demonstrated. Signal amplifying/process ICs are manufactured via commercial 0.18 um silicon CMOS technology, and graphene Hall elements (GHEs) are fabricated on top of the passivation layer of the CMOS chip via a low-temperature micro-fabrication process. The sensitivity of the GHE on CMOS chip is further improved by integrating the GHE with the CMOS amplifier on the Si chip. This work not only paves the way to fabricate graphene/Si CMOS Hall ICs with much higher performance than that of conventional Hall ICs, but also provides a general method for scalable integration of graphene devices with silicon CMOS ICs via a low-temperature process.

  11. Sub-10 nm colloidal lithography for circuit-integrated spin-photo-electronic devices.

    Science.gov (United States)

    Iovan, Adrian; Fischer, Marco; Lo Conte, Roberto; Korenivski, Vladislav

    2012-01-01

    Patterning of materials at sub-10 nm dimensions is at the forefront of nanotechnology and employs techniques of various complexity, efficiency, areal scale, and cost. Colloid-based patterning is known to be capable of producing individual sub-10 nm objects. However, ordered, large-area nano-arrays, fully integrated into photonic or electronic devices have remained a challenging task. In this work, we extend the practice of colloidal lithography to producing large-area sub-10 nm point-contact arrays and demonstrate their circuit integration into spin-photo-electronic devices. The reported nanofabrication method should have broad application areas in nanotechnology as it allows ballistic-injection devices, even for metallic materials with relatively short characteristic relaxation lengths.

  12. Sub-10 nm colloidal lithography for circuit-integrated spin-photo-electronic devices

    Directory of Open Access Journals (Sweden)

    Adrian Iovan

    2012-12-01

    Full Text Available Patterning of materials at sub-10 nm dimensions is at the forefront of nanotechnology and employs techniques of various complexity, efficiency, areal scale, and cost. Colloid-based patterning is known to be capable of producing individual sub-10 nm objects. However, ordered, large-area nano-arrays, fully integrated into photonic or electronic devices have remained a challenging task. In this work, we extend the practice of colloidal lithography to producing large-area sub-10 nm point-contact arrays and demonstrate their circuit integration into spin-photo-electronic devices. The reported nanofabrication method should have broad application areas in nanotechnology as it allows ballistic-injection devices, even for metallic materials with relatively short characteristic relaxation lengths.

  13. Sub-10 nm colloidal lithography for circuit-integrated spin-photo-electronic devices

    Science.gov (United States)

    Iovan, Adrian; Fischer, Marco; Lo Conte, Roberto

    2012-01-01

    Summary Patterning of materials at sub-10 nm dimensions is at the forefront of nanotechnology and employs techniques of various complexity, efficiency, areal scale, and cost. Colloid-based patterning is known to be capable of producing individual sub-10 nm objects. However, ordered, large-area nano-arrays, fully integrated into photonic or electronic devices have remained a challenging task. In this work, we extend the practice of colloidal lithography to producing large-area sub-10 nm point-contact arrays and demonstrate their circuit integration into spin-photo-electronic devices. The reported nanofabrication method should have broad application areas in nanotechnology as it allows ballistic-injection devices, even for metallic materials with relatively short characteristic relaxation lengths. PMID:23365801

  14. A fully integrated direct-conversion digital satellite tuner in 0.18μ m CMOS*

    Institute of Scientific and Technical Information of China (English)

    Chen Si; Yang Zengwang; Gu Mingliang

    2011-01-01

    A fully integrated direct-conversion digital satellite tuner for DVB-S/S2 and ABS-S applications is presented. A broadband noise-canceling Balun-LNA and passive quadrature mixers provided a high-linearity low noise RF front-end, while the synthesizer integrated the loop filter to reduce the solution cost and system debug time. Fabricated in 0.18 μm CMOS, the chip achieves a less than 7.6 dB noise figure over a 900-2150 MHz Lband, while the measured sensitivity for 4.42 MS/s QPSK-3/4 mode is -91 dBm at the PCB connector. The fully integrated integer-N synthesizer operating from 2150 to 4350 MHz achieves less than 1 C integrated phase error.The chip consumes about 145 mA at a 3.3 V supply with internal integrated LDOs.

  15. Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

    Science.gov (United States)

    Reagor, James A; Holt, David W

    2016-03-01

    Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

  16. Fully 3D-Integrated Pixel Detectors for X-Rays

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz W. [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Gabriella, Carini [SLAC National Accelerator Lab., Menlo Park, CA (United States); Enquist, Paul [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Grybos, Pawel [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Holm, Scott [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Lipton, Ronald [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Maj, Piotr [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Patti, Robert [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Siddons, David Peter [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Szczygiel, Robert [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Yarema, Raymond [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)

    2016-01-01

    The vertically integrated photon imaging chip (VIPIC1) pixel detector is a stack consisting of a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed circuit board (PCB). The integrated circuit tiers were bonded using the direct bonding technology with copper, and each tier features 1-μm-diameter through-silicon vias that were used for connections to the sensor on one side, and to the host PCB on the other side. The 80-μm-pixel-pitch sensor was the direct bonding technology with nickel bonded to the integrated circuit. The stack was mounted on the board using Sn–Pb balls placed on a 320-μm pitch, yielding an entirely wire-bond-less structure. The analog front-end features a pulse response peaking at below 250 ns, and the power consumption per pixel is 25 μW. We successful completed the 3-D integration and have reported here. Additionally, all pixels in the matrix of 64 × 64 pixels were responding on well-bonded devices. Correct operation of the sparsified readout, allowing a single 153-ns bunch timing resolution, was confirmed in the tests on a synchrotron beam of 10-keV X-rays. An equivalent noise charge of 36.2 e- rms and a conversion gain of 69.5 μV/e- with 2.6 e- rms and 2.7 μV/e- rms pixel-to-pixel variations, respectively, were measured.

  17. 77 FR 57589 - Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions...

    Science.gov (United States)

    2012-09-18

    ... COMMISSION Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions... found that those Zoran products that were adjudicated in Integrated Circuits I are precluded under the... recommended a limited exclusion order barring entry of Zoran's and MediaTek's infringing integrated...

  18. A novel voltage output integrated circuit temperature sensor

    Institute of Scientific and Technical Information of China (English)

    吴晓波; 赵梦恋; 严晓浪; 方志刚

    2002-01-01

    The novel integrated circuit (IC) temperature sensor presented in this paper works similarly as a two-terminal Zener, has breakdown voltage directly proportional to Kelvin temperature at 10 mV/℃, with typical error of less than ±1.0℃ over a temperature range from -50℃ to +125℃. In addition to all the features that conventional IC temperature sensors have, the new device also has very low static power dissipation ( 0.5 mW ) , low output impedance ( less than 1Ω), excellent stability, high reproducibility, and high precision. The sensor's circuit design and layout are discussed in detail. Applications of the sensor include almost any type of temperature sensing over the range of -50℃-+125℃. The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy. Due to the excellent performance and low cost of this sensor, more applications of the sensor over wide temperature range are expected.

  19. Minimizing the area required for time constants in integrated circuits

    Science.gov (United States)

    Lyons, J. C.

    1972-01-01

    When a medium- or large-scale integrated circuit is designed, efforts are usually made to avoid the use of resistor-capacitor time constant generators. The capacitor needed for this circuit usually takes up more surface area on the chip than several resistors and transistors. When the use of this network is unavoidable, the designer usually makes an effort to see that the choice of resistor and capacitor combinations is such that a minimum amount of surface area is consumed. The optimum ratio of resistance to capacitance that will result in this minimum area is equal to the ratio of resistance to capacitance which may be obtained from a unit of surface area for the particular process being used. The minimum area required is a function of the square root of the reciprocal of the products of the resistance and capacitance per unit area. This minimum occurs when the area required by the resistor is equal to the area required by the capacitor.

  20. CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

    2000-08-10

    In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

  1. Integrated circuit for processing a low-frequency signal from a seismic detector

    Energy Technology Data Exchange (ETDEWEB)

    Malashevich, N. I.; Roslyakov, A. S.; Polomoshnov, S. A., E-mail: S.Polomoshnov@tsen.ru; Fedorov, R. A. [Research and Production Complex ' Technological Center' of the Moscow Institute of Electronic Technology (Russian Federation)

    2011-12-15

    Specific features for the detection and processing of a low-frequency signal from a seismic detector are considered in terms of an integrated circuit based on a large matrix crystal of the 5507 series. This integrated circuit is designed for the detection of human movements. The specific features of the information signal, obtained at the output of the seismic detector, and the main characteristics of the integrated circuit and its structure are reported.

  2. Enabling the Internet of Things from integrated circuits to integrated systems

    CERN Document Server

    2017-01-01

    This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia. After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT: ultra-low power digital architectures and circuits low- and zero-leakage memories (including emerging technologies) circuits for hardwar...

  3. Bitpipe vs. service: Why do pure service providers outperform fully integrated operators?

    OpenAIRE

    Grove, Nico; Baumann, Oliver

    2011-01-01

    With the emergence of pure internet-based service providers, the business landscape of fully integrated telecommunications providers - industry incumbents that provide services on their own infrastructure - has changed massively. While various pure service providers exhibit successful business models and high performance, the services offered by the integrated telecommunication firms are not able to compete on neither price nor user experience. To shed light on this issue, we build upon work ...

  4. Applications of Data Mining in Integrated Circuits Manufacturing

    Directory of Open Access Journals (Sweden)

    Sidda Reddy Kurakula

    2014-09-01

    Full Text Available Integrated circuits (a.k.a chips or IC’s are some of the most complex devices manufactured. Making chips is a complex process requiring hundreds of precisely controlled steps such as film deposition, etching and patterning of various materials until the final device structure is realized. Also, each chip goes through a huge number of complicated tests and inspection steps to ensure quality. In IC manufacturing, yield is defined as the percentage of chips in a finished wafer that pass all tests and function properly. Yield improvement translates directly into increased revenues. A humongous amount of data (Terabytes per day is logged from the equipment in the fab. This paper describes some applications of advanced data mining techniques used by chip makers and equipment suppliers in order to improve yield, match equipment, increase equipment output and also to predict the change in equipment performance before and after maintenance activities.

  5. Monolithic microwave integrated circuit devices for active array antennas

    Science.gov (United States)

    Mittra, R.

    1984-01-01

    Two different aspects of active antenna array design were investigated. The transition between monolithic microwave integrated circuits and rectangular waveguides was studied along with crosstalk in multiconductor transmission lines. The boundary value problem associated with a discontinuity in a microstrip line is formulated. This entailed, as a first step, the derivation of the propagating as well as evanescent modes of a microstrip line. The solution is derived to a simple discontinuity problem: change in width of the center strip. As for the multiconductor transmission line problem. A computer algorithm was developed for computing the crosstalk noise from the signal to the sense lines. The computation is based on the assumption that these lines are terminated in passive loads.

  6. Wireless Neural Recording With Single Low-Power Integrated Circuit

    Science.gov (United States)

    Harrison, Reid R.; Kier, Ryan J.; Chestek, Cynthia A.; Gilja, Vikash; Nuyujukian, Paul; Ryu, Stephen; Greger, Bradley; Solzbacher, Florian; Shenoy, Krishna V.

    2010-01-01

    We present benchtop and in vivo experimental results from an integrated circuit designed for wireless implantable neural recording applications. The chip, which was fabricated in a commercially available 0.6-μm 2P3M BiCMOS process, contains 100 amplifiers, a 10-bit analog-to-digital converter (ADC), 100 threshold-based spike detectors, and a 902–928 MHz frequency-shift-keying (FSK) transmitter. Neural signals from a selected amplifier are sampled by the ADC at 15.7 kSps and telemetered over the FSK wireless data link. Power, clock, and command signals are sent to the chip wirelessly over a 2.765-MHz inductive (coil-to-coil) link. The chip is capable of operating with only two off-chip components: a power/command receiving coil and a 100-nF capacitor. PMID:19497825

  7. Plasmonic nanopatch array for optical integrated circuit applications.

    Science.gov (United States)

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-11-08

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle.

  8. Plasmonic nanopatch array for optical integrated circuit applications

    Science.gov (United States)

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-01-01

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle. PMID:24201454

  9. Infrared transparent graphene heater for silicon photonic integrated circuits.

    Science.gov (United States)

    Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

    2016-04-18

    Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

  10. A kind of integrated method discuss of fOG signal processing circuit

    Science.gov (United States)

    Lu, Jun; Pan, Xin; Ying, Jiaju; Liu, Jie

    2014-12-01

    In view of the circuit miniaturization need in project application of fiber optic gyroscope(FOG), a new integrated technical scheme adopting system in package(SIP) for signal processing circuit of FOG was put forward. At first, the principle on signal processing circuit of FOG was analyzed, and the technical scheme adopting SIP based on low-temperature co-fired substrate technology was presented according to circuit characteristic and actual condition. Secondly, under the prerequisite of the concept introduction of SIP and LTCC, the SIP prototype of signal processing circuit of FOG was trialed produced,and it passed through the debug test. This SIP modular is an overall circuit complete integrated the signal processing circuit of FOG, and only a potentiometer and EPROM do not case outside. The testing results indicate that SIP is a kind of feasible scheme that carries out miniaturization for signal processing circuit of FOG.

  11. An integrated energy-efficient capacitive sensor digital interface circuit

    KAUST Repository

    Omran, Hesham

    2014-06-19

    In this paper, we propose an energy-efficient 13-bit capacitive sensor interface circuit. The proposed design fully relies on successive approximation algorithm, which eliminates the need for oversampling and digital decimation filtering, and thus low-power consumption is achieved. The proposed architecture employs a charge amplifier stage to acheive parasitic insensitive operation and fine absolute resolution. Moreover, the output code is not affected by offset voltages or charge injection. The successive approximation algorithm is implemented in the capacitance-domain using a coarse-fine programmable capacitor array, which allows digitizing wide capacitance range in compact area. Analysis for the maximum achievable resolution due to mismatch is provided. The proposed design is insensitive to any reference voltage or current which translates to low temperature sensitivity. The operation of a prototype fabricated in a standard CMOS technology is experimentally verified using both on-chip and off-chip capacitive sensors. Compared to similar prior work, the fabricated prototype achieves and excellent energy efficiency of 34 pJ/step.

  12. A fully-integrated high-compliance voltage SoC for epi-retinal and neural prostheses.

    Science.gov (United States)

    Lo, Yi-Kai; Chen, Kuanfu; Gad, Parag; Liu, Wentai

    2013-12-01

    This paper presents a fully functionally integrated 1024-channel mixed-mode and mixed-voltage system-on-a-chip (SoC) for epi-retinal and neural prostheses. Taking an AC input, an integrated power telemetry circuits is capable of generating multiple DC voltages with a voltage conversion efficiency of 83% at a load of 100 mW without external diodes or separate power integrated circuits, reducing the form factor of the prosthetic device. A wireless DPSK receiver with a novel noise reduction scheme supports a data rate of 2 Mb/s at a bit-error-rate of 2 ×10⁻⁷. The 1024-channel stimulator array meets an output compliance voltage of ±10 V and provides flexible stimulation waveforms. Through chip-clustering, the stimulator array can be further expanded to 4096 channels. This SoC is designed and fabricated in TSMC 0.18 μm high-voltage 32 V CMOS process and occupies a chip area of 5.7 mm × 6.6 mm. Using this SoC, a retinal implant bench-top test system is set up with real-time visual verification. In-vitro experiment conducted in artificial vitreous humor is designed and set-up to investigate stimulation waveforms for better visual resolution. In our in-vivo experiment, a hind-limb paralyzed rat with spinal cord transection and implanted chronic epidural electrodes has been shown to regain stepping and standing abilities using stimulus provided by the SoC.

  13. A fully integrated high-Q Whispering-Gallery Wedge Resonator

    CERN Document Server

    Ramiro-Manzano, F; Pavesi, L; Pucker, G; Ghulinyan, M

    2012-01-01

    Microresonator devices which posses ultra-high quality factors are essential for fundamental investigations and applications. Microsphere and microtoroid resonators support remarkably high Q's at optical frequencies, while planarity constrains preclude their integration into functional lightwave circuits. Conventional semiconductor processing can also be used to realize ultra-high-Q's with planar wedge-resonators. Still, their full integration with side-coupled dielectric waveguides remains an issue. Here we show the full monolithic integration of a wedge-resonator/waveguide vertically-coupled system on a silicon chip. In this approach the cavity and the waveguide lay in different planes. This permits to realize the shallow-angle wedge while the waveguide remains intact, allowing therefore to engineer a coupling of arbitrary strength between these two. The precise size-control and the robustness against post-processing operation due to its monolithic integration makes this system a prominent platform for indu...

  14. A monolithic, standard CMOS, fully differential optical receiver with an integrated MSM photodetector

    Institute of Scientific and Technical Information of China (English)

    Yu Changliang; Mao Luhong; Xiao Xindong; Xie Sheng; Zhang Shilin

    2009-01-01

    This paper presents a realization of a silicon-based standard CMOS, fully differential optoelectronic inte grated receiver based on a metal-semiconductor-metal light detector (MSM photodetector). In the optical receiver, two MSM photodetectors are integrated to convert the incident light signal into a pair of fully differential photo generated currents. The optoelectronic integrated receiver was designed and implemented in a chartered 0.35 μm, 3.3 V standard CMOS process. For 850 nm wavelength, it achieves a 1 GHz 3 dB bandwidth due to the MSM pho todetector's low capacitance and high intrinsic bandwidth. In addition, it has a transimpedance gain of 98.75 dBΩ, and an equivalent input integrated referred noise current of 283 nA from 1 Hz up to -3 dB frequency.

  15. The TNF receptor and Ig superfamily members form an integrated signaling circuit controlling dendritic cell homeostasis

    Science.gov (United States)

    De Trez, Carl; Ware, Carl F.

    2008-01-01

    Dendritic cells (DC) constitute the most potent antigen presenting cells of the immune system, playing a key role bridging innate and adaptive immune responses. Specialized DC subsets differ depending on their origin, tissue location and the influence of trophic factors, the latter remain to be fully understood. Stromal cell and myeloid-associated Lymphotoxin-β receptor (LTβR) signaling is required for the local proliferation of lymphoid tissue DC. This review focuses the LTβR signaling cascade as a crucial positive trophic signal in the homeostasis of DC subsets. The noncanonical coreceptor pathway comprised of the Immunoglobulin (Ig) superfamily member, B and T lymphocyte attenuator (BTLA) and TNFR superfamily member, Herpesvirus entry mediator (HVEM) counter regulates the trophic signaling by LTβR. Together both pathways form an integrated signaling circuit achieving homeostasis of DC subsets. PMID:18511331

  16. Focused ion beam damage to MOS integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    FLEETWOOD,D.M.; CAMPBELL,ANN N.; HEMBREE,CHARLES E.; TANGYUNYONG,PAIBOON; JESSING,JEFFREY R.; SODEN,JERRY M.

    2000-05-10

    Commercial focused ion beam (FIB) systems are commonly used to image integrated circuits (ICS) after device processing, especially in failure analysis applications. FIB systems are also often employed to repair faults in metal lines for otherwise functioning ICS, and are being evaluated for applications in film deposition and nanofabrication. A problem that is often seen in FIB imaging and repair is that ICS can be damaged during the exposure process. This can result in degraded response or out-right circuit failure. Because FIB processes typically require the surface of an IC to be exposed to an intense beam of 30--50 keV Ga{sup +} ions, both charging and secondary radiation damage are potential concerns. In previous studies, both types of effects have been suggested as possible causes of device degradation, depending on the type of device examined and/or the bias conditions. Understanding the causes of this damage is important for ICS that are imaged or repaired by a FIB between manufacture and operation, since the performance and reliability of a given IC is otherwise at risk in subsequent system application. In this summary, the authors discuss the relative roles of radiation damage and charging effects during FIB imaging. Data from exposures of packaged parts under controlled bias indicate the possibility for secondary radiation damage during FIB exposure. On the other hand, FIB exposure of unbiased wafers (a more common application) typically results in damage caused by high-voltage stress or electrostatic discharge. Implications for FIB exposure and subsequent IC use are discussed.

  17. SDN architecture for optical packet and circuit integrated networks

    Science.gov (United States)

    Furukawa, Hideaki; Miyazawa, Takaya

    2016-02-01

    We have been developing an optical packet and circuit integrated (OPCI) network, which realizes dynamic optical path, high-density packet multiplexing, and flexible wavelength resource allocation. In the OPCI networks, a best-effort service and a QoS-guaranteed service are provided by employing optical packet switching (OPS) and optical circuit switching (OCS) respectively, and users can select these services. Different wavelength resources are assigned for OPS and OCS links, and the amount of their wavelength resources are dynamically changed in accordance with the service usage conditions. To apply OPCI networks into wide-area (core/metro) networks, we have developed an OPCI node with a distributed control mechanism. Moreover, our OPCI node works with a centralized control mechanism as well as a distributed one. It is therefore possible to realize SDN-based OPCI networks, where resource requests and a centralized configuration are carried out. In this paper, we show our SDN architecture for an OPS system that configures mapping tables between IP addresses and optical packet addresses and switching tables according to the requests from multiple users via a web interface. While OpenFlow-based centralized control protocol is coming into widespread use especially for single-administrative, small-area (LAN/data-center) networks. Here, we also show an interworking mechanism between OpenFlow-based networks (OFNs) and the OPCI network for constructing a wide-area network, and a control method of wavelength resource selection to automatically transfer diversified flows from OFNs to the OPCI network.

  18. Development of wide range charge integration application specified integrated circuit for photo-sensor

    Energy Technology Data Exchange (ETDEWEB)

    Katayose, Yusaku, E-mail: katayose@ynu.ac.jp [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan); Ikeda, Hirokazu [Institute of Space and Astronautical Science (ISAS)/Japan Aerospace Exploration Agency (JAXA), 3-1-1 Yoshinodai, Chuo-ku, Sagamihara, Kanagawa 252-5210 (Japan); Tanaka, Manobu [National Laboratory for High Energy Physics, KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Shibata, Makio [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan)

    2013-01-21

    A front-end application specified integrated circuit (ASIC) is developed with a wide dynamic range amplifier (WDAMP) to read-out signals from a photo-sensor like a photodiode. The WDAMP ASIC consists of a charge sensitive preamplifier, four wave-shaping circuits with different amplification factors and Wilkinson-type analog-to-digital converter (ADC). To realize a wider range, the integrating capacitor in the preamplifier can be changed from 4 pF to 16 pF by a two-bit switch. The output of a preamplifier is shared by the four wave-shaping circuits with four gains of 1, 4, 16 and 64 to adapt the input range of ADC. A 0.25-μm CMOS process (of UMC electronics CO., LTD) is used to fabricate the ASIC with four-channels. The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC and the noise performance of 0.46 fC + 6.4×10{sup −4} fC/pF. -- Highlights: ► A front-end ASIC is developed with a wide dynamic range amplifier. ► The ASIC consists of a CSA, four wave-shaping circuits and pulse-height-to-time converters. ► The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC.

  19. A Sparsity-based Framework for Resolution Enhancement in Optical Fault Analysis of Integrated Circuits

    Science.gov (United States)

    2015-01-01

    CIRCUITS by T. BERKİN ÇİLİNGİROĞLU B.S., Koç University, 2006 M.S., Koç University, 2008 Submitted in partial fulfillment of the requirements...Framework for Resolution Enhancement in Optical Fault Analysis of Integrated Circuits 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM ELEMENT NUMBER...13. SUPPLEMENTARY NOTES 14. ABSTRACT The increasing density and smaller length scales in integrated circuits (ICs) create resolution challenges for

  20. 77 FR 39510 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Determination Not...

    Science.gov (United States)

    2012-07-03

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Determination Not... the sale within the United States after importation of certain semiconductor integrated...

  1. 75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

    Science.gov (United States)

    2010-02-04

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice... importation, and sale within the United States after importation of certain semiconductor integrated...

  2. Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld;

    2016-01-01

    We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

  3. 75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2010-05-05

    ... COMMISSION In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos... certain large scale integrated circuit semiconductor chips or products containing the same that...

  4. Fully-integrated, bezel-less transistor arrays using reversibly foldable interconnects and stretchable origami substrates

    Science.gov (United States)

    Kim, Mijung; Park, Jihun; Ji, Sangyoon; Shin, Sung-Ho; Kim, So-Yun; Kim, Young-Cheon; Kim, Ju-Young; Park, Jang-Ung

    2016-05-01

    Here we demonstrate fully-integrated, bezel-less transistor arrays using stretchable origami substrates and foldable conducting interconnects. Reversible folding of these arrays is enabled by origami substrates which are composed of rigid support fixtures and foldable elastic joints. In addition, hybrid structures of thin metal films and metallic nanowires worked as foldable interconnects which are located on the elastomeric joints.Here we demonstrate fully-integrated, bezel-less transistor arrays using stretchable origami substrates and foldable conducting interconnects. Reversible folding of these arrays is enabled by origami substrates which are composed of rigid support fixtures and foldable elastic joints. In addition, hybrid structures of thin metal films and metallic nanowires worked as foldable interconnects which are located on the elastomeric joints. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr02041k

  5. Monolithic Microwave Integrated Circuit (MMIC) Phased Array Demonstrated With ACTS

    Science.gov (United States)

    1996-01-01

    Monolithic Microwave Integrated Circuit (MMIC) arrays developed by the NASA Lewis Research Center and the Air Force Rome Laboratory were demonstrated in aeronautical terminals and in mobile or fixed Earth terminals linked with NASA's Advanced Communications Technology Satellite (ACTS). Four K/Ka-band experimental arrays were demonstrated between May 1994 and May 1995. Each array had GaAs MMIC devices at each radiating element for electronic beam steering and distributed power amplification. The 30-GHz transmit array used in uplinks to ACTS was developed by Lewis and Texas Instruments. The three 20-GHz receive arrays used in downlinks from ACTS were developed in cooperation with the Air Force Rome Laboratory, taking advantage of existing Air Force integrated-circuit, active-phased-array development contracts with the Boeing Company and Lockheed Martin Corporation. Four demonstrations, each related to an application of high interest to both commercial and Department of Defense organizations, were conducted. The location, type of link, and the data rate achieved for each of the applications is shown. In one demonstration-- an aeronautical terminal experiment called AERO-X--a duplex voice link between an aeronautical terminal on the Lewis Learjet and ACTS was achieved. Two others demonstrated duplex voice links (and in one case, interactive video links as well) between ACTS and an Army high-mobility, multipurpose wheeled vehicle (HMMWV, or "humvee"). In the fourth demonstration, the array was on a fixed mount and was electronically steered toward ACTS. Lewis served as project manager for all demonstrations and as overall system integrator. Lewis engineers developed the array system including a controller for open-loop tracking of ACTS during flight and HMMWV motion, as well as a laptop data display and recording system used in all demonstrations. The Jet Propulsion Laboratory supported the AERO-X program, providing elements of the ACTS Mobile Terminal. The successful

  6. Microcoil Spring Interconnects for Ceramic Grid Array Integrated Circuits

    Science.gov (United States)

    Strickland, S. M.; Hester, J. D.; Gowan, A. K.; Montgomery, R. K.; Geist, D. L.; Blanche, J. F.; McGuire, G. D.; Nash, T. S.

    2011-01-01

    As integrated circuit miniaturization trends continue, they drive the need for smaller higher input/output (I/O) packages. Hermetically sealed ceramic area array parts are the package of choice by the space community for high reliability space flight electronic hardware. Unfortunately, the coefficient of thermal expansion mismatch between the ceramic area array package and the epoxy glass printed wiring board limits the life of the interconnecting solder joint. This work presents the results of an investigation by Marshall Space Flight Center into a method to increase the life of this second level interconnection by the use of compliant microcoil springs. The design of the spring and its attachment process are presented along with thermal cycling results of microcoil springs (MCS) compared with state-of-the-art ball and column interconnections. Vibration testing has been conducted on MCS and high lead column parts. Radio frequency simulation and measurements have been made and the MCS has been modeled and a stress analysis performed. Thermal cycling and vibration testing have shown MCS interconnects to be significantly more reliable than solder columns. Also, MCS interconnects are less prone to handling damage than solder columns. Future work that includes shock testing, incorporation into a digital signal processor board, and process evaluation of expansion from a 400 I/O device to a device with over 1,100 I/O is identified.

  7. Efficient Fingerprint Matching Algorithm for Integrated Circuit Cards

    Institute of Scientific and Technical Information of China (English)

    Jian-Wei Yang; Li-Feng Liu; Tian-Zi Jiang

    2004-01-01

    Fingerprint matching is a crucial step in fingerprint identification.Recently,a variety of algorithms for this issue have been developed.Each of them is application situation specific and has its advantages and disadvantages.It is highly desired to develop an efficient fingerprint verification technology for Integrated Circuit(IC)Cards or chips.IC cards have some special characteristics,such as very small storage space and slow processing speed,which hinder the use of most fingerprint matching algorithms in such situations.In order to solve this problem,the paper presents an improved minutia-pattern(minutiae-based)matching algorithm by employing the orientation field of the fingerprint as a new feature.Our algorithm not only inherits the advantages of the general minutia-pattern matching algorithms,but also overcomes their disadvantages.Experimental results show that the proposed algorithm can greatly improve the performance of fingerprint matching in both accuracy and efficiency,and it is very suitable for applications in IC cards.

  8. Integrated circuits and electrode interfaces for noninvasive physiological monitoring.

    Science.gov (United States)

    Ha, Sohmyung; Kim, Chul; Chi, Yu M; Akinin, Abraham; Maier, Christoph; Ueno, Akinori; Cauwenberghs, Gert

    2014-05-01

    This paper presents an overview of the fundamentals and state of the-art in noninvasive physiological monitoring instrumentation with a focus on electrode and optrode interfaces to the body, and micropower-integrated circuit design for unobtrusive wearable applications. Since the electrode/optrode-body interface is a performance limiting factor in noninvasive monitoring systems, practical interface configurations are offered for biopotential acquisition, electrode-tissue impedance measurement, and optical biosignal sensing. A systematic approach to instrumentation amplifier (IA) design using CMOS transistors operating in weak inversion is shown to offer high energy and noise efficiency. Practical methodologies to obviate 1/f noise, counteract electrode offset drift, improve common-mode rejection ratio, and obtain subhertz high-pass cutoff are illustrated with a survey of the state-of-the-art IAs. Furthermore, fundamental principles and state-of-the-art technologies for electrode-tissue impedance measurement, photoplethysmography, functional near-infrared spectroscopy, and signal coding and quantization are reviewed, with additional guidelines for overall power management including wireless transmission. Examples are presented of practical dry-contact and noncontact cardiac, respiratory, muscle and brain monitoring systems, and their clinical applications.

  9. GaAs integrated circuits and heterojunction devices

    Science.gov (United States)

    Fowlis, Colin

    1986-06-01

    The state of the art of GaAs technology in the U.S. as it applies to digital and analog integrated circuits is examined. In a market projection, it is noted that whereas analog ICs now largely dominate the market, in 1994 they will amount to only 39 percent vs. 57 percent for digital ICs. The military segment of the market will remain the largest (42 percent in 1994 vs. 70 percent today). ICs using depletion-mode-only FETs can be constructed in various forms, the closest to production being BFL or buffered FET logic. Schottky diode FET logic - a lower power approach - can reach higher complexities and strong efforts are being made in this direction. Enhancement type devices appear essential to reach LSI and VLSI complexity, but process control is still very difficult; strong efforts are under way, both in the U.S. and in Japan. Heterojunction devices appear very promising, although structures are fairly complex, and special fabrication techniques, such as molecular beam epitaxy and MOCVD, are necessary. High-electron-mobility-transistor (HEMT) devices show significant performance advantages over MESFETs at low temperatures. Initial results of heterojunction bipolar transistor devices show promise for high speed A/D converter applications.

  10. PETRIC - A positron emission tomography readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Pedrali-Noy, Marzio; Gruber, Gregory; Krieger, Bradley; Mandelli, Emmanuele; Meddeler, Gerrit; Moses, William; Rosso, Valeria

    2000-11-05

    We present architecture, critical design issues and performance measurements of PETRIC, a 64-channel mixed signal front-end integrated circuit (IC) for reading out a photodiode (PD) array coupled with LSO scintillator crystals for a medical imaging application (PET). Each channel consists of a low noise charge sensitive pre-amplifier (CSA), an RC-CR pulse shaper and a winner-take-all (WTA) multiplexer that selects the channel with the largest input signal. Triggered by an external timing signal, a switch opens and a capacitor stores the peak voltage of the winner channel. The shaper rise and fall times are adjustable by means of external current inputs over a continuous range of 0.7 (mu)s to 9 (mu)s. Power consumption is 5.4 mW per channel, measured Equivalent Noise Charge (ENC) at 1 (mu)s peaking time. Zero leakage current is 33 rms electrons plus 7.3 rms electrons per pF of input capacitance. Design is fabricated in 0.5 (mu)m 3.3V CMOS technology.

  11. High Voltage Dielectrophoretic and Magnetophoretic Hybrid Integrated Circuit / Microfluidic Chip

    Science.gov (United States)

    Issadore, David; Franke, Thomas; Brown, Keith A.; Hunt, Thomas P.; Westervelt, Robert M.

    2010-01-01

    A hybrid integrated circuit (IC) / microfluidic chip is presented that independently and simultaneously traps and moves microscopic objects suspended in fluid using both electric and magnetic fields. This hybrid chip controls the location of dielectric objects, such as living cells and drops of fluid, on a 60 × 61 array of pixels that are 30 × 38 μm2 in size, each of which can be individually addressed with a 50 V peak-to-peak, DC to 10 MHz radio frequency voltage. These high voltage pixels produce electric fields above the chip’s surface with a magnitude , resulting in strong dielectrophoresis (DEP) forces . Underneath the array of DEP pixels there is a magnetic matrix that consists of two perpendicular sets of 60 metal wires running across the chip. Each wire can be sourced with 120 mA to trap and move magnetically susceptible objects using magnetophoresis (MP). The DEP pixel array and magnetic matrix can be used simultaneously to apply forces to microscopic objects, such as living cells or lipid vesicles, that are tagged with magnetic nanoparticles. The capabilities of the hybrid IC / microfluidic chip demonstrated in this paper provide important building blocks for a platform for biological and chemical applications. PMID:20625468

  12. Wireless Amperometric Neurochemical Monitoring Using an Integrated Telemetry Circuit

    Science.gov (United States)

    Roham, Masoud; Halpern, Jeffrey M.; Martin, Heidi B.; Chiel, Hillel J.

    2015-01-01

    An integrated circuit for wireless real-time monitoring of neurochemical activity in the nervous system is described. The chip is capable of conducting high-resolution amperometric measurements in four settings of the input current. The chip architecture includes a first-order ΔΣ modulator (ΔΣM) and a frequency-shift-keyed (FSK) voltage-controlled oscillator (VCO) operating near 433 MHz. It is fabricated using the AMI 0.5 μm double-poly triple-metal n-well CMOS process, and requires only one off-chip component for operation. Measured dc current resolutions of ~250 fA, ~1.5 pA, ~4.5 pA, and ~17 pA were achieved for input currents in the range of ±5, ±37, ±150, and ±600 nA, respectively. The chip has been interfaced with a diamond-coated, quartz-insulated, microneedle, tungsten electrode, and successfully recorded dopamine concentration levels as low as 0.5 μM wirelessly over a transmission distance of ~0.5 m in flow injection analysis experiments. PMID:18990633

  13. Tomography of integrated circuit interconnect with an electromigration void

    Energy Technology Data Exchange (ETDEWEB)

    Levine, Zachary H. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Rensselaer Polytechnic Institute, Troy, New York 12180-3590 (United States); Kalukin, Andrew R. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Kuhn, Markus [Intel Corporation RA1-329, 5200 Northeast Elam Young Parkway, Hillsboro, Oregon 74124 (United States); Frigo, Sean P. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); McNulty, Ian [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Retsch, Cornelia C. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Wang, Yuxin [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Arp, Uwe [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Lucatorto, Thomas B. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Ravel, Bruce D. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States)] (and others)

    2000-05-01

    An integrated circuit interconnect was subject to accelerated-life test conditions to induce an electromigration void. The silicon substrate was removed, leaving only the interconnect test structure encased in silica. We imaged the sample with 1750 eV photons using the 2-ID-B scanning transmission x-ray microscope at the Advanced Photon Source, a third-generation synchrotron facility. Fourteen views through the sample were obtained over a 170 degree sign range of angles (with a 40 degree sign gap) about a single rotation axis. Two sampled regions were selected for three-dimensional reconstruction: one of the ragged end of a wire depleted by the void, the other of the adjacent interlevel connection (or ''via''). We applied two reconstruction techniques: the simultaneous iterative reconstruction technique and a Bayesian reconstruction technique, the generalized Gaussian Markov random field method. The stated uncertainties are total, with one standard deviation, which resolved the sample to 200{+-}70 and 140{+-}30 nm, respectively. The tungsten via is distinguished from the aluminum wire by higher absorption. Within the void, the aluminum is entirely depleted from under the tungsten via. The reconstructed data show the applicability of this technique to three-dimensional imaging of buried defects in submicrometer structures relevant to the microelectronics industry. (c) 2000 American Institute of Physics.

  14. Neural Networks Integrated Circuit for Biomimetics MEMS Microrobot

    Directory of Open Access Journals (Sweden)

    Ken Saito

    2014-06-01

    Full Text Available In this paper, we will propose the neural networks integrated circuit (NNIC which is the driving waveform generator of the 4.0, 2.7, 2.5 mm, width, length, height in size biomimetics microelectromechanical systems (MEMS microrobot. The microrobot was made from silicon wafer fabricated by micro fabrication technology. The mechanical system of the robot was equipped with small size rotary type actuators, link mechanisms and six legs to realize the ant-like switching behavior. The NNIC generates the driving waveform using synchronization phenomena such as biological neural networks. The driving waveform can operate the actuators of the MEMS microrobot directly. Therefore, the NNIC bare chip realizes the robot control without using any software programs or A/D converters. The microrobot performed forward and backward locomotion, and also changes direction by inputting an external single trigger pulse. The locomotion speed of the microrobot was 26.4 mm/min when the step width was 0.88 mm. The power consumption of the system was 250 mWh when the room temperature was 298 K.

  15. Mathematical model of an integrated circuit cooling through cylindrical rods

    Directory of Open Access Journals (Sweden)

    Beltrán-Prieto Luis Antonio

    2017-01-01

    Full Text Available One of the main challenges in integrated circuits development is to propose alternatives to handle the extreme heat generated by high frequency of electrons moving in a reduced space that cause overheating and reduce the lifespan of the device. The use of cooling fins offers an alternative to enhance the heat transfer using combined a conduction-convection systems. Mathematical model of such process is important for parametric design and also to gain information about temperature distribution along the surface of the transistor. In this paper, we aim to obtain the equations for heat transfer along the chip and the fin by performing energy balance and heat transfer by conduction from the chip to the rod, followed by dissipation to the surrounding by convection. Newton's law of cooling and Fourier law were used to obtain the equations that describe the profile temperature in the rod and the surface of the chip. Ordinary differential equations were obtained and the respective analytical solutions were derived after consideration of boundary conditions. The temperature along the rod decreased considerably from the initial temperature (in contatct with the chip surface. This indicates the benefit of using a cilindrical rod to distribute the heat generated in the chip.

  16. An integrated modelling framework for neural circuits with multiple neuromodulators

    Science.gov (United States)

    Vemana, Vinith

    2017-01-01

    Neuromodulators are endogenous neurochemicals that regulate biophysical and biochemical processes, which control brain function and behaviour, and are often the targets of neuropharmacological drugs. Neuromodulator effects are generally complex partly owing to the involvement of broad innervation, co-release of neuromodulators, complex intra- and extrasynaptic mechanism, existence of multiple receptor subtypes and high interconnectivity within the brain. In this work, we propose an efficient yet sufficiently realistic computational neural modelling framework to study some of these complex behaviours. Specifically, we propose a novel dynamical neural circuit model that integrates the effective neuromodulator-induced currents based on various experimental data (e.g. electrophysiology, neuropharmacology and voltammetry). The model can incorporate multiple interacting brain regions, including neuromodulator sources, simulate efficiently and easily extendable to large-scale brain models, e.g. for neuroimaging purposes. As an example, we model a network of mutually interacting neural populations in the lateral hypothalamus, dorsal raphe nucleus and locus coeruleus, which are major sources of neuromodulator orexin/hypocretin, serotonin and norepinephrine/noradrenaline, respectively, and which play significant roles in regulating many physiological functions. We demonstrate that such a model can provide predictions of systemic drug effects of the popular antidepressants (e.g. reuptake inhibitors), neuromodulator antagonists or their combinations. Finally, we developed user-friendly graphical user interface software for model simulation and visualization for both fundamental sciences and pharmacological studies. PMID:28100828

  17. A Fully Integrated Nanosystem of Semiconductor Nanowires for Direct Solar Water Splitting

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Chong; Tang, Jinyao; Chen, Hao Ming; Liu, Bin; Yang, Peidong

    2013-06-12

    Artificial photosynthesis, the biomimetic approach to converting sunlight?s energy directly into chemical fuels, aims to imitate nature by using an integrated system of nanostructures, each of which plays a specific role in the sunlight-to-fuel conversion process. Here we describe a fully integrated system of nanoscale photoelectrodes assembled from inorganic nanowires for direct solar water splitting. Similar to the photosynthetic system in a chloroplast, the artificial photosynthetic system comprises two semiconductor light absorbers with large surface area, an interfacial layer for charge transport, and spatially separated cocatalysts to facilitate the water reduction and oxidation. Under simulated sunlight, a 0.12percent solar-to-fuel conversion efficiency is achieved, which is comparable to that of natural photosynthesis. The result demonstrates the possibility of integrating material components into a functional system that mimics the nanoscopic integration in chloroplasts. It also provides a conceptual blueprint of modular design that allows incorporation of newly discovered components for improved performance.

  18. A Fully Integrated Nanosystem of Semiconductor Nanowires for Direct Solar Water Splitting

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Chong; Tang, Jinyao; Chen, HaoMing; Liu, Bin; Yang, Peidong

    2013-02-21

    Artificial photosynthesis, the biomimetic approach to converting sunlight?s energy directly into chemical fuels, aims to imitate nature by using an integrated system of nanostructures, each of which plays a specific role in the sunlight-to-fuel conversion process. Here we describe a fully integrated system of nanoscale photoelectrodes assembled from inorganic nanowires for direct solar water splitting. Similar to the photosynthetic system in a chloroplast, the artificial photosynthetic system comprises two semiconductor light absorbers with large surface area, an interfacial layer for charge transport, and spatially separated cocatalysts to facilitate the water reduction and oxidation. Under simulated sunlight, a 0.12percent solar-to-fuel conversion efficiency is achieved, which is comparable to that of natural photosynthesis. The result demonstrates the possibility of integrating material components into a functional system that mimics the nanoscopic integration in chloroplasts. It also provides a conceptual blueprint of modular design that allows incorporation of newly discovered components for improved performance.

  19. Novel immunoassay formats for integrated microfluidic circuits: diffusion immunoassays (DIA)

    Science.gov (United States)

    Weigl, Bernhard H.; Hatch, Anson; Kamholz, Andrew E.; Yager, Paul

    2000-03-01

    Novel designs of integrated fluidic microchips allow separations, chemical reactions, and calibration-free analytical measurements to be performed directly in very small quantities of complex samples such as whole blood and contaminated environmental samples. This technology lends itself to applications such as clinical diagnostics, including tumor marker screening, and environmental sensing in remote locations. Lab-on-a-Chip based systems offer many *advantages over traditional analytical devices: They consume extremely low volumes of both samples and reagents. Each chip is inexpensive and small. The sampling-to-result time is extremely short. They perform all analytical functions, including sampling, sample pretreatment, separation, dilution, and mixing steps, chemical reactions, and detection in an integrated microfluidic circuit. Lab-on-a-Chip systems enable the design of small, portable, rugged, low-cost, easy to use, yet extremely versatile and capable diagnostic instruments. In addition, fluids flowing in microchannels exhibit unique characteristics ('microfluidics'), which allow the design of analytical devices and assay formats that would not function on a macroscale. Existing Lab-on-a-chip technologies work very well for highly predictable and homogeneous samples common in genetic testing and drug discovery processes. One of the biggest challenges for current Labs-on-a-chip, however, is to perform analysis in the presence of the complexity and heterogeneity of actual samples such as whole blood or contaminated environmental samples. Micronics has developed a variety of Lab-on-a-Chip assays that can overcome those shortcomings. We will now present various types of novel Lab- on-a-Chip-based immunoassays, including the so-called Diffusion Immunoassays (DIA) that are based on the competitive laminar diffusion of analyte molecules and tracer molecules into a region of the chip containing antibodies that target the analyte molecules. Advantages of this

  20. Integrated ionic liquid-based electrofluidic circuits for pressure sensing within polydimethylsiloxane microfluidic systems.

    Science.gov (United States)

    Wu, Chueh-Yu; Liao, Wei-Hao; Tung, Yi-Chung

    2011-05-21

    This paper reports a novel pressure sensor with an electrical readout based on electrofluidic circuits constructed by ionic liquid (IL)-filled microfluidic channels. The developed pressure sensor can be seamlessly fabricated into polydimethylsiloxane (PDMS) microfluidic systems using the well-developed multilayer soft lithography (MSL) technique without additional assembly or sophisticated cleanroom microfabrication processes. Therefore, the device can be easily scaled up and is fully disposable. The pressure sensing is achieved by measuring the pressure-induced electrical resistance variation of the constructed electrofluidic resistor. In addition, an electrofluidic Wheatstone bridge circuit is designed for accurate and stable resistance measurements. The pressure sensor is characterized using pressurized nitrogen gas and various liquids which flow into the microfluidic channels. The experimental results demonstrate the great long-term stability (more than a week), temperature stability (up to 100 °C), and linear characteristics of the developed pressure sensing scheme. Consequently, the integrated microfluidic pressure sensor developed in this paper is promising for better monitoring and for characterizing the flow conditions and liquid properties inside the PDMS microfluidic systems in an easier manner for various lab on a chip applications.

  1. GaAs Photonic Integrated Circuit (PIC) development for high performance communications

    Energy Technology Data Exchange (ETDEWEB)

    Sullivan, C.T.

    1998-03-01

    Sandia has established a foundational technology in photonic integrated circuits (PICs) based on the (Al,Ga,In)As material system for optical communication, radar control and testing, and network switching applications at the important 1.3{mu}m/1.55{mu}m wavelengths. We investigated the optical, electrooptical, and microwave performance characteristics of the fundamental building-block PIC elements designed to be as simple and process-tolerant as possible, with particular emphasis placed on reducing optical insertion loss. Relatively conventional device array and circuit designs were built using these PIC elements: (1) to establish a baseline performance standard; (2) to assess the impact of epitaxial growth accuracy and uniformity, and of fabrication uniformity and yield; (3) to validate our theoretical and numerical models; and (4) to resolve the optical and microwave packaging issues associated with building fully packaged prototypes. Novel and more complex PIC designs and fabrication processes, viewed as higher payoff but higher risk, were explored in a parallel effort with the intention of meshing those advances into our baseline higher-yield capability as they mature. The application focus targeted the design and fabrication of packaged solitary modulators meeting the requirements of future wideband and high-speed analog and digital data links. Successfully prototyped devices are expected to feed into more complex PICs solving specific problems in high-performance communications, such as optical beamforming networks for phased array antennas.

  2. Diagnosis of soft faults in analog integrated circuits based on fractional correlation

    Institute of Scientific and Technical Information of China (English)

    Deng Yong; Shi Yibing; Zhang Wei

    2012-01-01

    Aiming at the problem of diagnosing soft faults in analog integrated circuits,an approach based on fractional correlation is proposed.First,the Volterra series of the circuit under test (CUT) decomposed by the fractional wavelet packet are used to calculate the fractional correlation functions.Then,the calculated fractional correlation functions are used to form the fault signatures of the CUT.By comparing the fault signatures,the different soft faulty conditions of the CUT are identified and the faults are located.Simulations of benchmark circuits illustrate the proposed method and validate its effectiveness in diagnosing soft faults in analog integrated circuits.

  3. Full Wave Simulation of Integrated Circuits Using Hybrid Numerical Methods

    Science.gov (United States)

    Tan, Jilin

    Transmission lines play an important role in digital electronics, and in microwave and millimeter-wave circuits. Analysis, modeling, and design of transmission lines are critical to the development of the circuitry in the chip, subsystem, and system levels. In the past several decays, at the EM modeling level, the quasi-static approximation has been widely used due to its great simplicity. As the clock rates increase, the inter-connect effects such as signal delay, distortion, dispersion, reflection, and crosstalk, limit the performance of microwave systems. Meanwhile, the quasi-static approach loses its validity for some complex system structures. Since the successful system design of the PCB, MCM, and the chip packaging, rely very much on the computer aided EM level modeling and simulation, many new methods have been developed, such as the full wave approach, to guarantee the successful design. Many difficulties exist in the rigorous EM level analysis. Some of these include the difficulties in describing the behavior of the conductors with finite thickness and finite conductivity, the field singularity, and the arbitrary multilayered multi-transmission lines structures. This dissertation concentrates on the full wave study of the multi-conductor transmission lines with finite conductivity and finite thickness buried in an arbitrary lossy multilayered environment. Two general approaches have been developed. The first one is the integral equation method in which the dyadic Green's function for arbitrary layered media has been correctly formulated and has been tested both analytically and numerically. By applying this method, the double layered high dielectric permitivitty problem and the heavy dielectrical lossy problem in multilayered media in the CMOS circuit design have been solved. The second approach is the edge element method. In this study, the correct functional for the two dimensional propagation problem has been successfully constructed in a rigorous way

  4. Integrated reconfigurable high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger;

    2015-01-01

    In this paper a high-voltage transmitting circuit aimed for capacitive micromachined ultrasonic transducers (CMUTs) used in scanners for medical applications is designed and implemented in a 0.35 μm high-voltage CMOS process. The transmitting circuit is reconfigurable externally making it able...... to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes with voltages up to 100 V, maximum pulse range of 50 V, frequencies up to 5 MHz and different driving slew rates. Measurements are performed on the circuit in order to assess its functionality and power consumption...... performance. The design occupies an on-chip area of 0.938 mm2 and the power consumption of a 128-element transmitting circuit array that would be used in an portable ultrasound scanner is found to be a maximum of 181 mW....

  5. Fully integrated patterned carbon nanotube strain sensors on flexible sensing skin substrates for structural health monitoring

    Science.gov (United States)

    Burton, Andrew R.; Kurata, Masahiro; Nishino, Hiromichi; Lynch, Jerome P.

    2016-04-01

    New advances in nanotechnology and material processing is creating opportunities for the design and fabrication of a new generation of thin film sensors that can used to assess structural health. In particular, thin film sensors attached to large areas of the structure surface has the potential to provide spatially rich data on the performance and health of a structure. This study focuses on the development of a fully integrated strain sensor that is fabricated on a flexible substrate for potentially use in sensing skins. This is completed using a carbon nanotube-polymer composite material that is patterned on a flexible polyimide substrate using optical lithography. The piezoresistive carbon nanotube elements are integrated into a complete sensing system by patterning copper electrodes and integrating off-the-shelf electrical components on the flexible film for expanded functionality. This diverse material utilization is realized in a versatile process flow to illustrate a powerful toolbox for sensing severity, location, and failure mode of damage on structural components. The fully integrated patterned carbon nanotube strain sensor is tested on a quarter-scale, composite beam column connection. The results and implications for future structural damage detection are discussed.

  6. A 5.2 GHz RF combined power amplifier with fully integrated on-chip impedance matching Wilkinson power combiner and splitter

    OpenAIRE

    Kaymaksüt, Ercan; Kaymaksut, Ercan

    2008-01-01

    In this thesis a 5.2 GHz combined power amplifier is designed for Wireless Local Area Network (WLAN) application. A new on-chip power combining technique by using impedance matching Wilkinson power divider circuits will be presented. Two impedance matching Wilkinson power dividers are employed for matching the input and output impedances of the amplifier to 50 (omega)Ω as well as splitting the input power into two amplifiers and combining their output powers. A 5.2 GHz fully integrated class-...

  7. Integrated reconfigurable high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger;

    2015-01-01

    In this paper a high-voltage transmitting circuit aimed for capacitive micromachined ultrasonic transducers (CMUTs) used in scanners for medical applications is designed and implemented in a 0.35 μm high-voltage CMOS process. The transmitting circuit is reconfigurable externally making it able...... performance. The design occupies an on-chip area of 0.938 mm2 and the power consumption of a 128-element transmitting circuit array that would be used in an portable ultrasound scanner is found to be a maximum of 181 mW....

  8. Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

    Directory of Open Access Journals (Sweden)

    Heck Martijn J.R.

    2016-06-01

    Full Text Available Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

  9. Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

    Science.gov (United States)

    Heck, Martijn J. R.

    2017-01-01

    Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D) imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC) technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

  10. Electrothermal Analysis of Three-Dimensional Integrated Circuits

    Science.gov (United States)

    Harris, Theodore Robert

    2011-12-01

    Transient electro-thermal simulation of a three dimensional integrated circuit (3DIC) is reported that uses a cell-based simulation to provide a selected transistor thermal profile while providing advantages of hierarchical simulation. Due to CPU and memory limitations, full transistor electro-thermal simulations on a useful scale are not possible. Standard cells are considered on a per-instance basis and modeled with electro-thermal macro-models developed in a multi-physics simulator. Simulations are compared favorably to measurements for a token-generating 3DIC clocking at a maximum of 1 GHz. The 3DIC, which is composed of 9 by 3 layers of repetitive frequency multipliers and dividers, was fabricated with the Massachusetts Institute of Technology Lincoln Laboratory (MITLL) 3DIC process. Measurements indicated a linear rise in temperature of the active areas over a range of applied background ambient temperatures. An average of 7.5 K change in temperature was measured across dense areas of circuitry. For thermal simulation, the physical characteristics of the 3DIC were extracted from flattened OpenAccess layout files. Material parameters, connections, and geometries were considered in order to create a more physically accurate resistive thermal mesh. Physical thermal networks extracted with resolutions of 10 mum and 5 mum connect thermal terminals of the electrothermal macromodel cell elements to active layers yielding temporal and spatial simulated dynamic thermal results in three dimensions. Coupled with model-order reduction techniques, hierarchical dynamic electrothermal simulation of large 3DICs is shown to be tractable, yielding spatial and temporal selected transistor-level thermal profiles.

  11. Flip-chip integration of tilted VCSELs onto a silicon photonic integrated circuit.

    Science.gov (United States)

    Lu, Huihui; Lee, Jun Su; Zhao, Yan; Scarcella, Carmelo; Cardile, Paolo; Daly, Aidan; Ortsiefer, Markus; Carroll, Lee; O'Brien, Peter

    2016-07-25

    In this article we describe a cost-effective approach for hybrid laser integration, in which vertical cavity surface emitting lasers (VCSELs) are passively-aligned and flip-chip bonded to a Si photonic integrated circuit (PIC), with a tilt-angle optimized for optical-insertion into standard grating-couplers. A tilt-angle of 10° is achieved by controlling the reflow of the solder ball deposition used for the electrical-contacting and mechanical-bonding of the VCSEL to the PIC. After flip-chip integration, the VCSEL-to-PIC insertion loss is -11.8 dB, indicating an excess coupling penalty of -5.9 dB, compared to Fibre-to-PIC coupling. Finite difference time domain simulations indicate that the penalty arises from the relatively poor match between the VCSEL mode and the grating-coupler.

  12. Design and Fabrication of a Monolithic Optoelectronic Integrated Circuit Chip Based on CMOS Compatible Technology

    Institute of Scientific and Technical Information of China (English)

    GUO Wei-Feng; ZHAO Yong; WANG Wan-Jun; SHAO Hai-Feng; YANG Jian-Yi; JIANG Xiao-Qing

    2012-01-01

    A monolithic optoelectronic integrated circuit chip on a silicon-on-insulator is designed and fabricated based on complementary metal oxide semiconductor compatible technology.The chip integrates an optical Mach-Zehnder modulator (MZM) and a CMOS driving circuit with the amplification function.Test results show that the extinction ratio of the MZM is close to 20dB and the small-signal gain of the CMOS driving circuit is about 26.9dB.A 50m V 10 MHz sine wave signal is amplified by the driving circuit,and then drives the MZM successfully.%A monolithic optoelectronic integrated circuit chip on a silicon-on-insulator is designed and fabricated based on complementary metal oxide semiconductor compatible technology. The chip integrates an optical Mach-Zehnder modulator (MZM) and a CMOS driving circuit with the amplification function. Test results show that the extinction ratio of the MZM is close to 20 dB and the small-signal gain of the CMOS driving circuit is about 26.9dB. A 50mV 10MHz sine wave signal is amplified by the driving circuit, and then drives the MZM successfully.

  13. A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

    Science.gov (United States)

    Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

    2010-01-01

    This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

  14. Low-power integrated-circuit driver for ferrite-memory word lines

    Science.gov (United States)

    Katz, S.

    1970-01-01

    Composite circuit uses both n-p-n bipolar and p-channel MOS transistors /BIMOS/. The BIMOS driver provides 1/ ease of integrated circuit construction, 2/ low standby power consumption, 3/ bidirectional current pulses, and 4/ current-pulse amplitudes and rise times independent of active device parameters.

  15. The fully integrated biomedical engineering programme at Eindhoven University of Technology.

    Science.gov (United States)

    Slaaf, D W; van Genderen, M H P

    2009-05-01

    The development of a fully integrated biomedical engineering programme (life sciences included from the start) is described. Details are provided about background, implementation, and didactic concept: design centred learning combined with courses. The curriculum has developed into a bachelor-master's programme with two different master's degrees: Master's Degree in Biomedical Engineering and Master's Degree in Medical Engineering. Recently, the programme has adopted semester programming, has included a major and minor in the bachelor's degree phase, and a true bachelor's degree final project. Details about the programme and data about where graduates find jobs are provided in this paper.

  16. A novel fully-integrated miniature six-axis force/torque sensor

    Institute of Scientific and Technical Information of China (English)

    Wang Jiali; Xie Zongwu; Liu Hong; Jiang Li; Gao Xiaohui

    2006-01-01

    This paper presents a new designed miniature six DOF (degree of freedom) force/torque sensor.This sensor is fully integrated with a micro DSP (digital signal processor), so all the signal conditioning,A/D, decoupling, digital-signals serial output are performed in the sensor. Some experimental results are presented to demonstrate the capability of the proposed design. Finally, a neural network was used for decoupling the interacting signals, compared with the conventional method using the inverse matrix, this new method is more accurate.

  17. SEMICONDUCTOR INTEGRATED CIRCUITS: A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

    Science.gov (United States)

    Tao, Tong; Baoyong, Chi; Ziqiang, Wang; Ying, Zhang; Hanjun, Jiang; Zhihua, Wang

    2010-05-01

    A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 μm CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a Gm-C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some Gm cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively.

  18. A fully-integrated 12.5-Gb/s 850-nm CMOS optical receiver based on a spatially-modulated avalanche photodetector.

    Science.gov (United States)

    Lee, Myung-Jae; Youn, Jin-Sung; Park, Kang-Yeob; Choi, Woo-Young

    2014-02-10

    We present a fully integrated 12.5-Gb/s optical receiver fabricated with standard 0.13-µm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. Our integrated optical receiver includes a newly proposed CMOS-compatible spatially-modulated avalanche photodetector, which provides larger photodetection bandwidth than previously reported CMOS-compatible photodetectors. The receiver also has high-speed CMOS circuits including transimpedance amplifier, DC-balanced buffer, equalizer, and limiting amplifier. With the fabricated optical receiver, detection of 12.5-Gb/s optical data is successfully achieved at 5.8 pJ/bit. Our receiver achieves the highest data rate ever reported for 850-nm integrated CMOS optical receivers.

  19. Fully transparent quantum dot light-emitting diode integrated with graphene anode and cathode.

    Science.gov (United States)

    Seo, Jung-Tak; Han, Junebeom; Lim, Taekyung; Lee, Ki-Heon; Hwang, Jungseek; Yang, Heesun; Ju, Sanghyun

    2014-12-23

    A fully transparent quantum dot light-emitting diode (QD-LED) was fabricated by incorporating two types (anode and cathode) of graphene-based electrodes, which were controlled in their work functions and sheet resistances. Either gold nanoparticles or silver nanowires were inserted between layers of graphene to control the work function, whereas the sheet resistance was determined by the number of graphene layers. The inserted gold nanoparticles or silver nanowires in graphene films caused a charge transfer and changed the work function to 4.9 and 4.3 eV, respectively, from the original work function (4.5 eV) of pristine graphene. Moreover the sheet resistance values for the anode and cathode electrodes were improved from ∼63,000 to ∼110 Ω/sq and from ∼100,000 to ∼741 Ω/sq as the number of graphene layers increased from 1 to 12 and from 1 to 8, respectively. The main peak wavelength, luminance, current efficiency, and optical transmittance of the fully transparent QD-LED integrated with graphene anode and cathode were 535 nm, ∼358 cd/m2, ∼0.45 cd/A, and 70-80%, respectively. The findings of the study are expected to lay a foundation for the production of high-efficiency, fully transparent, and flexible displays using graphene-based electrodes.

  20. A new pixel level digital read out integrated circuits for ultraviolet imaging sensors

    Science.gov (United States)

    Xu, Bin; Lan, Tian-yi; Yuan, Yong-gang; Li, Xiang-yang

    2014-11-01

    The ultraviolet imaging sensors consist of two important parts: the array of detectors and the read out integrated circuits. Along with the demand for the fine resolution, large input dynamic range and high integration degree of the imaging sensors, the functions of read out integrated circuits are becoming more and more important. The on chip analog to digital conversion is the main directions of research on this area. In this paper, we presented a new digital read out integrated circuits for ultraviolet imaging sensors. The proposed circuits have an analog to digital converter in each pixel, which enable the parallel analog to digital conversion of the whole pixel array. The developed circuits have a 50um×50um pixel area with a 128×128 size, and are designed in a 0.35um four metal double poly mixed signal CMOS process. The simulation results show that the designed analog to digital converter has an accuracy of 0.2mV and can achieve the dynamic range of 88dB. The proposed circuits realize the low noise and high speed digital output of read out integrated circuits for ultraviolet imaging sensors.

  1. A fully integrated 3.5 GHz CMOS differential power amplifier driver

    Science.gov (United States)

    Xiaodong, Xu; Haigang, Yang; Tongqiang, Gao; Hongfeng, Zhang

    2013-07-01

    A fully integrated CMOS differential power amplifier driver (PAD) is proposed for WiMAX applications. In order to fulfill the differential application requirements, a transmission line transformer is used as the output matching network. A differential inductance constitutes an inter-stage matching network. Meanwhile, an on chip balun realizes input matching as well as single-end to differential conversion. The PAD is fabricated in a 0.13 μm RFCMOS process. The chip size is 1.1 × 1.1 mm2 with all of the matching network integrated on chip. The saturated power is around 10 dBm and power gain is about 12 dB.

  2. Sample to answer: a fully integrated nucleic acid identification system for bacteria monitoring

    Science.gov (United States)

    Kim, Jungkyu; Elsnab, John; Johnson, Michael; Gale, Bruce K.

    2010-02-01

    A fully integrated microfluidic system was developed and incorporates an EC-MWCNT (electrochemical multiwalled carbon nanotube) sensor for the detection of bacteria. Sample metering, reagent metering and delivery was implemented with microvalves and pumps embedded inside the microfluidic system. The nucleic acid extraction was performed using microchannels controlled using automated platforms and a disposable microfluidic silica cartridge. The target samples were flowed and hybridized with probe ssDNA (single strand DNA) across the MWCNT-EC sensor (built on a silicon chip), which was embedded in a microfluidic cell. The 9-pad sensor was scanned before and after hybridization to measure the quantity of RNA (Ribonucleic acid) bound to the array surface. A rapid and accurate sample-in answer-out nucleic acid system was realized with automated volume metering, microfluidic sample preparation, and integrated nano-biosensors.

  3. Digital Radiography and Computed Tomography Project -- Fully Integrated Linear Detector ArrayStatus Report

    Energy Technology Data Exchange (ETDEWEB)

    Tim Roney; Robert Seifert; Bob Pink; Mike Smith

    2011-09-01

    The field-portable Digital Radiography and Computed Tomography (DRCT) x-ray inspection systems developed for the Project Manager for NonStockpile Chemical Materiel (PMNSCM) over the past 13 years have used linear diode detector arrays from two manufacturers; Thomson and Thales. These two manufacturers no longer produce this type of detector. In the interest of insuring the long term viability of the portable DRCT single munitions inspection systems and to improve the imaging capabilities, this project has been investigating improved, commercially available detectors. During FY-10, detectors were evaluated and one in particular, manufactured by Detection Technologies (DT), Inc, was acquired for possible integration into the DRCT systems. The remainder of this report describes the work performed in FY-11 to complete evaluations and fully integrate the detector onto a representative DRCT platform.

  4. Note: Fully integrated 3.2 Gbps quantum random number generator with real-time extraction

    Science.gov (United States)

    Zhang, Xiao-Guang; Nie, You-Qi; Zhou, Hongyi; Liang, Hao; Ma, Xiongfeng; Zhang, Jun; Pan, Jian-Wei

    2016-07-01

    We present a real-time and fully integrated quantum random number generator (QRNG) by measuring laser phase fluctuations. The QRNG scheme based on laser phase fluctuations is featured for its capability of generating ultra-high-speed random numbers. However, the speed bottleneck of a practical QRNG lies on the limited speed of randomness extraction. To close the gap between the fast randomness generation and the slow post-processing, we propose a pipeline extraction algorithm based on Toeplitz matrix hashing and implement it in a high-speed field-programmable gate array. Further, all the QRNG components are integrated into a module, including a compact and actively stabilized interferometer, high-speed data acquisition, and real-time data post-processing and transmission. The final generation rate of the QRNG module with real-time extraction can reach 3.2 Gbps.

  5. Low-power analog integrated circuits for wireless ECG acquisition systems.

    Science.gov (United States)

    Tsai, Tsung-Heng; Hong, Jia-Hua; Wang, Liang-Hung; Lee, Shuenn-Yuh

    2012-09-01

    This paper presents low-power analog ICs for wireless ECG acquisition systems. Considering the power-efficient communication in the body sensor network, the required low-power analog ICs are developed for a healthcare system through miniaturization and system integration. To acquire the ECG signal, a low-power analog front-end system, including an ECG signal acquisition board, an on-chip low-pass filter, and an on-chip successive-approximation analog-to-digital converter for portable ECG detection devices is presented. A quadrature CMOS voltage-controlled oscillator and a 2.4 GHz direct-conversion transmitter with a power amplifier and upconversion mixer are also developed to transmit the ECG signal through wireless communication. In the receiver, a 2.4 GHz fully integrated CMOS RF front end with a low-noise amplifier, differential power splitter, and quadrature mixer based on current-reused folded architecture is proposed. The circuits have been implemented to meet the specifications of the IEEE 802.15.4 2.4 GHz standard. The low-power ICs of the wireless ECG acquisition systems have been fabricated using a 0.18 μm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS standard process. The measured results on the human body reveal that ECG signals can be acquired effectively by the proposed low-power analog front-end ICs.

  6. Waveguide Phase Modulator for Integrated Planar Lightwave Circuits in KTP Project

    Data.gov (United States)

    National Aeronautics and Space Administration — This SBIR Phase II effort proposes the development and integration of a Planar Lightwave Circuit (PLC) into an all fiber-based seed laser system used in high...

  7. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

    2013-01-01

    Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

  8. An Integrated-Circuit Temperature Sensor for Calorimetry and Differential Temperature Measurement.

    Science.gov (United States)

    Muyskens, Mark A.

    1997-01-01

    Describes the application of an integrated-circuit (IC) chip which provides an easy-to-use, inexpensive, rugged, computer-interfaceable temperature sensor for calorimetry and differential temperature measurement. Discusses its design and advantages. (JRH)

  9. Light collection from scattering media in a silicon photonics integrated circuit

    OpenAIRE

    2011-01-01

    We present a silicon photonics integrated circuit to efficiently couple scattered light into a single mode waveguide. By modulating the phase of N light-capturing elements, the collection efficiency can be increased by a factor N.

  10. 77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

    Science.gov (United States)

    2012-10-04

    ... From the Federal Register Online via the Government Publishing Office INTERNATIONAL TRADE COMMISSION Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of... importation, and the sale within the United States after importation of certain semiconductor...

  11. High-speed Integrated Circuits for electrical/Optical Interfaces

    DEFF Research Database (Denmark)

    Jespersen, Christoffer Felix

    2008-01-01

    This thesis is a continuation of the effort to increase the bandwidth of communicationnetworks. The thesis presents the results of the design of several high-speed electrical ircuits for an electrical/optical interface. These circuits have been a contribution to the ESTA project in collaboration...... with the OptCom project. The aim of the ESTA project was to investigate issues at 100 Gb/s and beyond, such as architecture and components. The OptCom project had a more tangible purpose; to create a 100 Gb/s optical/electrical transceiver demonstrator. The thesis focuses on the design of VCO, LA and CDR...... circuits at the receiver interface, though VCOs are also found in the transmitter where a multitude of independent sources have to be mutually synchronized before multiplexing. The circuits are based on an InP DHBT process (VIP-2) supplied by Vitesse and made publicly available as MPW. The VIP-2 process...

  12. RNA signal amplifier circuit with integrated fluorescence output.

    Science.gov (United States)

    Akter, Farhima; Yokobayashi, Yohei

    2015-05-15

    We designed an in vitro signal amplification circuit that takes a short RNA input that catalytically activates the Spinach RNA aptamer to produce a fluorescent output. The circuit consists of three RNA strands: an internally blocked Spinach aptamer, a fuel strand, and an input strand (catalyst), as well as the Spinach aptamer ligand 3,5-difluoro-4-hydroxylbenzylidene imidazolinone (DFHBI). The input strand initially displaces the internal inhibitory strand to activate the fluorescent aptamer while exposing a toehold to which the fuel strand can bind to further displace and recycle the input strand. Under a favorable condition, one input strand was able to activate up to five molecules of the internally blocked Spinach aptamer in 185 min at 30 °C. The simple RNA circuit reported here serves as a model for catalytic activation of arbitrary RNA effectors by chemical triggers.

  13. A BIST GENERATOR CAD TOOL FOR NUMERIC INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    Chiraz Khedhiri

    2011-07-01

    Full Text Available This paper describes a training and research tool for learning basic issues related to BIST (Built-In Self-Test generator. The main didactic aim of the tool is presenting complicated concepts in a comprehensivegraphical and analytical way. The paper describes a computer-aided design (CAD that is used to generateautomatically the BIST to any digital circuit. This software technique attempts to reduce the amount ofextra hardware and cost of the circuit.In order to make our software being easily available, we used the Java platform, which is supported bymost operating systems. The multi-platform JAVA runtime environment allows for easy access and usage ofthe tool.

  14. Integrated Design Validation: Combining Simulation and Formal Verification for Digital Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Lun Li

    2006-04-01

    Full Text Available The correct design of complex hardware continues to challenge engineers. Bugs in a design that are not uncovered in early design stages can be extremely expensive. Simulation is a predominantly used tool to validate a design in industry. Formal verification overcomes the weakness of exhaustive simulation by applying mathematical methodologies to validate a design. The work described here focuses upon a technique that integrates the best characteristics of both simulation and formal verification methods to provide an effective design validation tool, referred as Integrated Design Validation (IDV. The novelty in this approach consists of three components, circuit complexity analysis, partitioning based on design hierarchy, and coverage analysis. The circuit complexity analyzer and partitioning decompose a large design into sub-components and feed sub-components to different verification and/or simulation tools based upon known existing strengths of modern verification and simulation tools. The coverage analysis unit computes the coverage of design validation and improves the coverage by further partitioning. Various simulation and verification tools comprising IDV are evaluated and an example is used to illustrate the overall validation process. The overall process successfully validates the example to a high coverage rate within a short time. The experimental result shows that our approach is a very promising design validation method.

  15. CMOS analog integrated circuits high-speed and power-efficient design

    CERN Document Server

    Ndjountche, Tertulien

    2011-01-01

    High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important tren

  16. V-band low-noise integrated circuit receiver. [for space communication systems

    Science.gov (United States)

    Chang, K.; Louie, K.; Grote, A. J.; Tahim, R. S.; Mlinar, M. J.; Hayashibara, G. M.; Sun, C.

    1983-01-01

    A compact low-noise V-band integrated circuit receiver has been developed for space communication systems. The receiver accepts an RF input of 60-63 GHz and generates an IF output of 3-6 GHz. A Gunn oscillator at 57 GHz is phaselocked to a low-frequency reference source to achieve high stability and low FM noise. The receiver has an overall single sideband noise figure of less than 10.5 dB and an RF to IF gain of 40 dB over a 3-GHz RF bandwidth. All RF circuits are fabricated in integrated circuits on a Duroid substrate.

  17. Integrated-Circuit Controller For Brushless dc Motor

    Science.gov (United States)

    Le, Dong Tuan

    1994-01-01

    Generic circuit performs commutation-logic and power-switching functions for control of brushless dc motor. Controller includes commutation-logic and associated control circuitry, power supply, and inverters containing power transistors. Major advantages of controller are size, weight, and power consumption can be made less than other brushless-dc-motor controllers.

  18. High-voltage integrated transmitting circuit with differential driving for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Færch, Kjartan Ullitz;

    2016-01-01

    In this paper, a high-voltage integrated differential transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is presented. Due to its application, area and power consumption are critical and need to be minimized. The circuitry...... is designed and implemented in AMS 0.35 μ m high-voltage process. Measurements are performed on the fabricated integrated circuit in order to assess its performance. The transmitting circuit consists of a low-voltage control logic, pulse-triggered level shifters and a differential output stage that generates...... conditions is 0.936 mW including the load. The integrated circuits measured prove to be consistent and robust to local process variations by measurements....

  19. Integral Battery Power Limiting Circuit for Intrinsically Safe Applications

    Science.gov (United States)

    Burns, Bradley M.; Blalock, Norman N.

    2010-01-01

    A circuit topology has been designed to guarantee the output of intrinsically safe power for the operation of electrical devices in a hazardous environment. This design uses a MOSFET (metal oxide semiconductor field-effect transistor) as a switch to connect and disconnect power to a load. A test current is provided through a separate path to the load for monitoring by a comparator against a preset threshold level. The circuit is configured so that the test current will detect a fault in the load and open the switch before the main current can respond. The main current passes through the switch and then an inductor. When a fault occurs in the load, the current through the inductor cannot change immediately, but the voltage drops immediately to safe levels. The comparator detects this drop and opens the switch before the current in the inductor has a chance to respond. This circuit protects both the current and voltage from exceeding safe levels. Typically, this type of protection is accomplished by a fuse or a circuit breaker, but in order for a fuse or a circuit breaker to blow or trip, the current must exceed the safe levels momentarily, which may be just enough time to ignite anything in a hazardous environment. To prevent this from happening, a fuse is typically current-limited by the addition of the resistor to keep the current within safe levels while the fuse reacts. The use of a resistor is acceptable for non-battery applications where the wasted energy and voltage drop across the resistor can be tolerated. The use of the switch and inductor minimizes the wasted energy. For example, a circuit runs from a 3.6-V battery that must be current-limited to 200 mA. If the circuit normally draws 10 mA, then an 18-ohm resistor would drop 180 mV during normal operation, while a typical switch (0.02 ohm) and inductor (0.97 ohm) would only drop 9.9 mV. From a power standpoint, the current-limiting resistor protection circuit wastes about 18 times more power than the

  20. Noise tolerant voltage-controlled LC oscillator circuits for deep submicron VLSI system-on-a-chip radio circuits

    OpenAIRE

    Typpö, Jukka

    2003-01-01

    This thesis studies the problems with maintaining the spectral purity of fully integrated VCO circuits for radio frequency synthesizers in single-chip system designs. LC tank circuit oscillator circuits are shown to convert amplitude variation in the tank circuit voltage into frequency modulation, if voltage dependent capacitances are present in the tank circuit. Since the parasitic capacitances of the gain transistors and the capacitance of the varactor device in a VCO circuit are voltage de...

  1. A fully integrated VCO with a wide tuning range for DVB-H

    Science.gov (United States)

    Khemchandani, S. L.; Betancort, G.; del Pino Suarez, Javier; Alvarado, Unai; Goni-Iturri, Amaya; Hernandez, Antonio

    2007-05-01

    European standard DVB-T (Digital Video Broadcasting - Terrestrial) has already proven its exceptional features, including the possibility to receive broadcast services also with portable devices and even in receivers with a limited mobility such as cars. This paper presents a fully integrated LC voltage controlled oscillator (VCO) in a low cost 0.35 μm SiGe technology for DVB-H standard. To obtain VCO specifications system simulations have been done. The designed VCO is suitable to operate with ZERO and LOW IF receiver architectures. To integrate all the VCO components, it oscillates at double of the frequency band, from 940 to 1724 MHz. In order to sweep the whole frequency range, the tank is composed of an array of switched capacitors together with the varactors. The integrated inductors have been designed by electromagnetic simulations using Momentum(C). Techniques like using a capacitor divider, biasing the transistor for minimum noise and emitter degeneration have been utilized to improve phase noise requirements. The obtained phase noise is -108 dBc/Hz at 100 kHz offset and the power consumption, including the output buffers, is 28 mW.

  2. A Fully Integrated and Miniaturized Heavy-metal-detection Sensor Based on Micro-patterned Reduced Graphene Oxide

    OpenAIRE

    2016-01-01

    For this paper, a fully integrated and highly miniaturized electrochemical sensor was designed and fabricated on a silicon substrate. A solvothermal-assisted reduced graphene oxide named “TRGO” was then successfully micro-patterned using a lithography technique, followed by the electrodeposition of bismuth (Bi) on the surface of the micro-patterned TRGO for the electrochemical detection of heavy metal ions. The fully integrated electrochemical micro-sensor was then measured and evaluated for ...

  3. A BIST GENERATOR CAD TOOL FOR NUMERIC INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    Chiraz Khedhiri

    2011-06-01

    Full Text Available This paper describes a training and research tool for learning basic issues related to BIST (Built-In Self-Test generator. The main didactic aim of the tool is presenting complicated concepts in a comprehensive graphical and analytical way. The paper describes a computer-aided design (CAD that is used to generate automatically the BIST to any digital circuit. This software technique attempts to reduce the amount of extra hardware and cost of the circuit.In order to make our software being easily available, we used the Java platform, which is supported by most operating systems. The multi-platform JAVA run time environment allows for easy access and usage of the tool.

  4. A Multi-Gigahertz Analog Transient Recorder Integrated Circuit

    CERN Document Server

    Kleinfelder, Stuart A

    2015-01-01

    A monolithic multi-channel analog transient recorder, implemented using switched capacitor sample-and-hold circuits and a high-speed analogically-adjustable delay-line-based write clock, has been designed, fabricated and tested. The 2.1 by 6.9 mm layout, in 1.2 micron CMOS, includes over 31,000 transistors and 2048 double polysilicon capacitors. The circuit contains four parallel channels, each with a 512 deep switched-capacitor sample-and-hold system. A 512 deep edge sensitive tapped active delay line uses look-ahead and 16 way interleaving to develop the 512 sample and hold clocks, each as little as 3.2 ns wide and 200 ps apart. Measurements of the device have demonstrated 5 GHz maximum sample rate, at least 350 MHz bandwidth, an extrapolated rms aperture uncertainty per sample of 0.7 ps, and a signal to rms noise ratio of 2000:1.

  5. Fully printed, highly sensitive multifunctional artificial electronic whisker arrays integrated with strain and temperature sensors.

    Science.gov (United States)

    Harada, Shingo; Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

    2014-04-22

    Mammalian-mimicking functional electrical devices have tremendous potential in robotics, wearable and health monitoring systems, and human interfaces. The keys to achieve these devices are (1) highly sensitive sensors, (2) economically fabricated macroscale devices on flexible substrates, and (3) multifunctions beyond mammalian functions. Although highly sensitive artificial electronic devices have been reported, none have been fabricated using cost-effective macroscale printing methods and demonstrate multifunctionalities of artificial electronics. Herein we report fully printed high-sensitivity multifunctional artificial electronic whiskers (e-whisker) integrated with strain and temperature sensors using printable nanocomposite inks. Importantly, changing the composition ratio tunes the sensitivity of strain. Additionally, the printed temperature sensor array can be incorporated with the strain sensor array beyond mammalian whisker functionalities. The sensitivity for the strain sensor is impressively high (∼59%/Pa), which is the best sensitivity reported to date (>7× improvement). As the proof-of-concept for a truly printable multifunctional artificial e-whisker array, two- and three-dimensional space and temperature distribution mapping are demonstrated. This fully printable flexible sensor array should be applicable to a wide range of low-cost macroscale electrical applications.

  6. A fully integrated CMOS super-regenerative wake-up receiver for EEG applications

    Science.gov (United States)

    Yiqi, Mao; Tongqiang, Gao; Xiaodong, Xu; Haigang, Yang; Xinxia, Cai

    2016-09-01

    A fully integrated super-regenerative wake-up receiver for wireless body area network applications is presented. The super-regeneration receiver is designed to receive OOK-modulated data from the base station. A low power waveform generator is adopted both to provide a quench signal for VCO and to provide a clock signal for the digital module. The receiver is manufactured in 0.18 μm CMOS process and the active area is 0.67 mm2. It achieves a sensitivity of -80 dBm for 10-3 BER with a data rate of 200 kbps. The power consumption of the super-regenerative wake-up receiver is about 2.16 mW. Project supported by the National Basic Research Program of China (No. 2014CB744600) and the National Natural Science Foundation of China (No. 61474120).

  7. Technological and physical compatibilities in hybrid integration of laser and monolithic integration of waveguide, photodetector and CMOS circuits on silicon

    NARCIS (Netherlands)

    Zhou, Ming-Jiang; Ikkink, Ton; Chalmers, John; Kranenburg, van Herma; Albers, Hans; Holleman, Jisk; Lambeck, Paul; Joppe, Jan Leendert; Bekman, Herman; Krijger, de Ton; Lambeck, P.V.

    1994-01-01

    In this paper, technological and physical compatibilities in hybrid integration of AlInGaP laser and monolithic integration of ZnO monomode waveguide, pin-photodetector, CMOS circuits for laser power control and signal amplification on silicon substrate are studied. Prospective problems and their po

  8. Technological and Physical Compatibilities in Hybrid Integration of Laser and Monolithic Integration of Waveguide, Photodetector and CMOS Circuits on Silicon

    NARCIS (Netherlands)

    Zhou, M.J.; Ikkink, T.; Chalmers, J.; Kranenburg, H. van; Albers, H.; Holleman, J.; Lambeck, P.V.; Joppe, J.L.; Bekman, H.H.P.T.; Krijger, A.J.T. de

    1994-01-01

    In this paper, technological and physical compatibilities in hybrid integration of AlInGaP laser and monolithic integration of ZnO monomode waveguide, pin-photodetector, CMOS circuits for laser power control and signal amplification on silicon substrate are studied. Prospective problems and their po

  9. Integrated digital printing of flexible circuits for wireless sensing (Conference Presentation)

    Science.gov (United States)

    Mei, Ping; Whiting, Gregory L.; Schwartz, David E.; Ng, Tse Nga; Krusor, Brent S.; Ready, Steve E.; Daniel, George; Veres, Janos; Street, Bob

    2016-09-01

    Wireless sensing has broad applications in a wide variety of fields such as infrastructure monitoring, chemistry, environmental engineering and cold supply chain management. Further development of sensing systems will focus on achieving light weight, flexibility, low power consumption and low cost. Fully printed electronics provide excellent flexibility and customizability, as well as the potential for low cost and large area applications, but lack solutions for high-density, high-performance circuitry. Conventional electronics mounted on flexible printed circuit boards provide high performance but are not digitally fabricated or readily customizable. Incorporation of small silicon dies or packaged chips into a printed platform enables high performance without compromising flexibility or cost. At PARC, we combine high functionality c-Si CMOS and digitally printed components and interconnects to create an integrated platform that can read and process multiple discrete sensors. Our approach facilitates customization to a wide variety of sensors and user interfaces suitable for a broad range of applications including remote monitoring of health, structures and environment. This talk will describe several examples of printed wireless sensing systems. The technologies required for these sensor systems are a mix of novel sensors, printing processes, conventional microchips, flexible substrates and energy harvesting power solutions.

  10. Flexible hybrid circuit fully inkjet-printed: Surface mount devices assembled by silver nanoparticles-based inkjet ink

    Science.gov (United States)

    Arrese, J.; Vescio, G.; Xuriguera, E.; Medina-Rodriguez, B.; Cornet, A.; Cirera, A.

    2017-03-01

    Nowadays, inkjet-printed devices such as transistors are still unstable in air and have poor performances. Moreover, the present electronics applications require a high degree of reliability and quality of their properties. In order to accomplish these application requirements, hybrid electronics is fulfilled by combining the advantages of the printing technologies with the surface-mount technology. In this work, silver nanoparticle-based inkjet ink (AgNP ink) is used as a novel approach to connect surface-mount devices (SMDs) onto inkjet-printed pads, conducted by inkjet printing technology. Excellent quality AgNP ink-junctions are ensured with high resolution picoliter drop jetting at low temperature (˜150 °C). Electrical, mechanical, and morphological characterizations are carried out to assess the performance of the AgNP ink junction. Moreover, AgNP ink is compared with common benchmark materials (i.e., silver epoxy and solder). Electrical contact resistance characterization shows a similar performance between the AgNP ink and the usual ones. Mechanical characterization shows comparable shear strength for AgNP ink and silver epoxy, and both present higher adhesion than solder. Morphological inspections by field-emission scanning electron microscopy confirm a high quality interface of the silver nanoparticle interconnection. Finally, a flexible hybrid circuit on paper controlled by an Arduino board is manufactured, demonstrating the viability and scalability of the AgNP ink assembling technique.

  11. A numerical integration-based yield estimation method for integrated circuits

    Institute of Scientific and Technical Information of China (English)

    Liang Tao; Jia Xinzhang

    2011-01-01

    A novel integration-based yield estimation method is developed for yield optimization of integrated circuits. This method tries to integrate the joint probability density function on the acceptability region directly.To achieve this goal, the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation (BCT). In order to reduce the estimation variances of the model parameters of the density function, orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations. The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed. Two yield estimation examples, a fourth-order OTA-C filter and a three-dimensional (3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values. Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases. Therefore, our method is more suitable for parametric yield optimization.

  12. Fully Integrated on-Chip Switched DC–DC Converter for Battery-Powered Mixed-Signal SoCs

    Directory of Open Access Journals (Sweden)

    Heungjun Jeon

    2017-01-01

    Full Text Available This paper presents a fully integrated on-chip switched-capacitor (SC DC–DC converter that supports a programmable regulated power supply ranging from 2.6 to 3.2 V out of a 5 V input supply. The proposed 4-to-3 step-down topology utilizes two conventional 2-to-1 step-down topologies; each of them (2-to-1_up and 2-to-1_dw has a different flying capacitance to maximize the load current driving capability while minimizing the bottom-plate capacitance loss. The control circuits use a low power supply provided by a small internal low-drop output (LDO connected to the internal load voltage (VL_dw from the 2-to-1_dw, and low swing level-shifted gate-driving signals are generated using the internal load voltage (VL_dw. Therefore, the proposed implementation reduces control circuit and switching power consumptions. The programmable power supply voltage is regulated by means of a pulse frequency modulation (PFM technique with the compensated two-stage operational transconductance amplifier (OTA and the current-starved voltage controlled oscillator (VCO to maintain high efficiency over a wide range of load currents. The proposed on-chip SC DC–DC converter is designed and simulated using high-voltage 0.35 μm bipolar, complementary metal-oxide-semiconductor (CMOS and DMOS (BCDMOS technology. It achieves a peak efficiency of 74% when delivering an 8 mA load current at a 3.2 V supply voltage level, and it provides a maximum output power of 48 mW (IL = 15 mA at VL_up = 3.2 V at 70.5% efficiency. The proposed on-chip SC voltage regulator shows better efficiency than the ideal linear regulator over a wide range of output power, from 2.6 mW to 48 mW. The 18-phase interleaving technique enables the worst-case output voltage ripple to be less than 5.77% of the load voltage.

  13. The Scalable Integration of long-lived quantum memories into a photonic circuit

    CERN Document Server

    Mouradian, Sara L; Poitras, Carl B; Li, Luozhou; Goldstein, Jordan; Chen, Edward H; Cardenas, Jaime; Markham, Matthew L; Twitchen, Daniel J; Lipson, Michal; Englund, Dirk

    2014-01-01

    We demonstrate a photonic circuit with integrated long-lived quantum memories. Pre-selected quantum nodes - diamond micro-waveguides containing single, stable, and negatively charged nitrogen vacancy centers - are deterministically integrated into low-loss silicon nitride waveguides. Each quantum memory node efficiently couples into the single-mode waveguide (> 1 Mcps collected into the waveguide) and exhibits long spin coherence times of up to 120 {\\mu}s. Our system facilitates the assembly of multiple quantum memories into a photonic integrated circuit with near unity yield, paving the way towards scalable quantum information processing.

  14. III-V/silicon photonic integrated circuits for communication and sensing applications

    Science.gov (United States)

    Roelkens, Gunther; Keyvaninia, Shahram; Stankovic, Stevan; De Koninck, Yannick; Tassaert, Martijn; Mechet, Pauline; Spuesens, Thijs; Hattasan, N.; Gassenq, A.; Muneeb, M.; Ryckeboer, E.; Ghosh, Samir; Van Thourhout, D.; Baets, R.

    2013-03-01

    In this paper we review our work in the field of heterogeneous integration of III-V semiconductors and non-reciprocal optical materials on a silicon waveguide circuit. We elaborate on the heterogeneous integration technology based on adhesive DVS-BCB die-to-wafer bonding and discuss several device demonstrations. The presented devices are envisioned to be used in photonic integrated circuits for communication applications (telecommunications and optical interconnects) as well as in spectroscopic sensing systems operating in the short-wave infrared wavelength range.

  15. Heat management in integrated circuits on-chip and system-level monitoring and cooling

    CERN Document Server

    Ogrenci-Memik, Seda

    2016-01-01

    This essential overview covers the subject of thermal monitoring and management in integrated circuits. Specifically, it focuses on devices and materials that are intimately integrated on-chip (as opposed to in-package or on-board) for the purposes of thermal monitoring and thermal management.

  16. 76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2011-03-17

    ... COMMISSION In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos... Semiconductor Xiqing Integrated Semiconductor Manufacturing Site (``Freescale Xiqing'') of China;...

  17. Plasmonic and electronic device-based integrated circuits and their characteristics

    Science.gov (United States)

    Sakai, H.; Okahisa, S.; Nakayama, Y.; Nakayama, K.; Fukuhara, M.; Kimura, Y.; Ishii, Y.; Fukuda, M.

    2016-11-01

    This paper presents a plasmonic circuit that has been monolithically integrated with electronic devices on a silicon substrate and then discusses the concept behind this circuit. To form the proposed circuit, two plasmonic waveguides and a detector are integrated with metal-oxide-semiconductor field-effect transistors (MOSFETs) on the substrate. In the circuit, intensity signals or coherent plasmonic signals are generated by coherent light at an operating wavelength at which silicon is transparent, and these signals propagate along the waveguides before they are converted into electrical signals by the detector. These electrical intensity and coherent signals then drive the MOSFETs during both DC and AC operation. The measured performances of the devices indicate that surface plasmon polaritons propagate on the metal surface at the speed of light and drive the electronic devices without any absorption in the silicon.

  18. Rapid mapping of digital integrated circuit logic gates via multi-spectral backside imaging

    CERN Document Server

    Adato, Ronen; Zangeneh, Mahmoud; Zhou, Boyou; Joshi, Ajay; Goldberg, Bennett; Unlu, M Selim

    2016-01-01

    Modern semiconductor integrated circuits are increasingly fabricated at untrusted third party foundries. There now exist myriad security threats of malicious tampering at the hardware level and hence a clear and pressing need for new tools that enable rapid, robust and low-cost validation of circuit layouts. Optical backside imaging offers an attractive platform, but its limited resolution and throughput cannot cope with the nanoscale sizes of modern circuitry and the need to image over a large area. We propose and demonstrate a multi-spectral imaging approach to overcome these obstacles by identifying key circuit elements on the basis of their spectral response. This obviates the need to directly image the nanoscale components that define them, thereby relaxing resolution and spatial sampling requirements by 1 and 2 - 4 orders of magnitude respectively. Our results directly address critical security needs in the integrated circuit supply chain and highlight the potential of spectroscopic techniques to addres...

  19. Fully integrated system-on-chip for pixel-based 3D depth and scene mapping

    Science.gov (United States)

    Popp, Martin; De Coi, Beat; Thalmann, Markus; Gancarz, Radoslav; Ferrat, Pascal; Dürmüller, Martin; Britt, Florian; Annese, Marco; Ledergerber, Markus; Catregn, Gion-Pol

    2012-03-01

    We present for the first time a fully integrated system-on-chip (SoC) for pixel-based 3D range detection suited for commercial applications. It is based on the time-of-flight (ToF) principle, i.e. measuring the phase difference of a reflected pulse train. The product epc600 is fabricated using a dedicated process flow, called Espros Photonic CMOS. This integration makes it possible to achieve a Quantum Efficiency (QE) of >80% in the full wavelength band from 520nm up to 900nm as well as very high timing precision in the sub-ns range which is needed for exact detection of the phase delay. The SoC features 8x8 pixels and includes all necessary sub-components such as ToF pixel array, voltage generation and regulation, non-volatile memory for configuration, LED driver for active illumination, digital SPI interface for easy communication, column based 12bit ADC converters, PLL and digital data processing with temporary data storage. The system can be operated at up to 100 frames per second.

  20. Fully integrated reflection-mode photoacoustic, two-photon, and second harmonic generation microscopy in vivo

    Science.gov (United States)

    Song, Wei; Xu, Qiang; Zhang, Yang; Zhan, Yang; Zheng, Wei; Song, Liang

    2016-08-01

    The ability to obtain comprehensive structural and functional information from intact biological tissue in vivo is highly desirable for many important biomedical applications, including cancer and brain studies. Here, we developed a fully integrated multimodal microscopy that can provide photoacoustic (optical absorption), two-photon (fluorescence), and second harmonic generation (SHG) information from tissue in vivo, with intrinsically co-registered images. Moreover, using a delicately designed optical-acoustic coupling configuration, a high-frequency miniature ultrasonic transducer was integrated into a water-immersion optical objective, thus allowing all three imaging modalities to provide a high lateral resolution of ~290 nm with reflection-mode imaging capability, which is essential for studying intricate anatomy, such as that of the brain. Taking advantage of the complementary and comprehensive contrasts of the system, we demonstrated high-resolution imaging of various tissues in living mice, including microvasculature (by photoacoustics), epidermis cells, cortical neurons (by two-photon fluorescence), and extracellular collagen fibers (by SHG). The intrinsic image co-registration of the three modalities conveniently provided improved visualization and understanding of the tissue microarchitecture. The reported results suggest that, by revealing complementary tissue microstructures in vivo, this multimodal microscopy can potentially facilitate a broad range of biomedical studies, such as imaging of the tumor microenvironment and neurovascular coupling.

  1. Fully integrated reflection-mode photoacoustic, two-photon, and second harmonic generation microscopy in vivo

    Science.gov (United States)

    Song, Wei; Xu, Qiang; Zhang, Yang; Zhan, Yang; Zheng, Wei; Song, Liang

    2016-01-01

    The ability to obtain comprehensive structural and functional information from intact biological tissue in vivo is highly desirable for many important biomedical applications, including cancer and brain studies. Here, we developed a fully integrated multimodal microscopy that can provide photoacoustic (optical absorption), two-photon (fluorescence), and second harmonic generation (SHG) information from tissue in vivo, with intrinsically co-registered images. Moreover, using a delicately designed optical-acoustic coupling configuration, a high-frequency miniature ultrasonic transducer was integrated into a water-immersion optical objective, thus allowing all three imaging modalities to provide a high lateral resolution of ~290 nm with reflection-mode imaging capability, which is essential for studying intricate anatomy, such as that of the brain. Taking advantage of the complementary and comprehensive contrasts of the system, we demonstrated high-resolution imaging of various tissues in living mice, including microvasculature (by photoacoustics), epidermis cells, cortical neurons (by two-photon fluorescence), and extracellular collagen fibers (by SHG). The intrinsic image co-registration of the three modalities conveniently provided improved visualization and understanding of the tissue microarchitecture. The reported results suggest that, by revealing complementary tissue microstructures in vivo, this multimodal microscopy can potentially facilitate a broad range of biomedical studies, such as imaging of the tumor microenvironment and neurovascular coupling. PMID:27576922

  2. A fully integrated W-band push-push CMOS VCO with low phase noise and wide tuning range.

    Science.gov (United States)

    Wang, To-Po

    2011-07-01

    A circuit topology suitable for a low-phase-noise wide-tuning-range push-push voltage-controlled oscillator (VCO) is proposed in this paper. By applying varactors connected between drain and source terminations of the cross-coupled pair, the tuning range is effectively increased and the phase noise is improved. Moreover, a small capacitor is inserted between the VCO core and testing buffer to reduce loading effects on the VCO core. Furthermore, the enhanced second-harmonic output signal is extracted at middle of the varactors, leading to the elimination of RF choke at VCO's second-harmonic output port and a reduced chip size. Based on the proposed architecture, this VCO fabricated in 0.18-μm CMOS exhibits a measured 6.35% tuning range. Operating at a supply voltage of 1.2 V, the VCO core consumes 7.5-mW dc power, and the measured phase noise is -75 dBc/Hz and -91.5 dBc/Hz at 100-kHz and 1-MHz offsets from the 77.8-GHz carrier, respectively. Compared with previously published silicon-based VCOs over 70 GHz, this work can simultaneously achieve low phase noise, wide tuning range, and low dc power consumption, leading to a superior figure of merit (FOM), and better figure of merit considering the tuning range (FOM(T)). In addition, this fully integrated VCO also demonstrates the highest operation frequency among previously published 0.18-μm CMOS VCOs.

  3. Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.

    Science.gov (United States)

    LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J

    2014-06-01

    We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.

  4. Duplication-based Concurrent Detection of Hardware Trojans in Integrated Circuits

    OpenAIRE

    Palanichamy, Manikandan; Ba, Papa-Sidy; Dupuis, Sophie; Flottes, Marie-Lise; Di Natale, Giorgio; Rouzeyre, Bruno

    2016-01-01

    International audience; Outsourcing the fabrication process to low-cost locations has become a major trend in the Integrated Circuits (ICs) industry in the last decade. This trend raises the question about untrusted foundries in which an adversary can tamper with the circuit by inserting a malicious behavior in the ICs, referred to as Hardware Trojans (HTs). The serious impact of HTs in security applications and global economy brings extreme importance to detection as well as prevention techn...

  5. Assessment of Lightning Shielding Performance of a 400 kV Double-Circuit Fully Composite Transmission Line Pylon

    DEFF Research Database (Denmark)

    Jahangiri, Tohid; Bak, Claus Leth; Silva, Filipe Miguel Faria da

    2016-01-01

    . In Europe alone, 28.000 km of 400 kV transmission line is needed by 2020 to fulfil the aim of providing 20% of Europe’s energy from green energies. It means that more than 100.000 new pylons will be needed [1]. For this reason, the next generation of overhead line is introduced, by developing new design......Modern day overhead transmission lines are taking a giant leap in modernization, with the change in power generation from fossil fuels to renewable sources such as solar power, hydro power and wind power. The renewable generation needs to be connected to a large scale high voltage transmission grid...... for the fully composite pylon is one of the major challenges in the electrical design of the pylon which also has to be considered in terms of mechanical and material designs. The other challenges are determination of air clearances and design of shed profiles on the unibody cross-arm which are discussed in [2...

  6. Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

    Science.gov (United States)

    Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

    2012-10-21

    Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

  7. Precision Instrumentation Amplifiers and Read-Out Integrated Circuits

    CERN Document Server

    Wu, Rong; Makinwa, Kofi A A

    2013-01-01

    This book presents innovative solutions in the design of precision instrumentation amplifier and read-out ICs, which can be used to boost millivolt-level signals transmitted by modern sensors, to levels compatible with the input ranges of typical Analog-to-Digital Converters (ADCs).  The discussion includes the theory, design and realization of interface electronics for bridge transducers and thermocouples. It describes the use of power efficient techniques to mitigate low frequency errors, resulting in interface electronics with high accuracy, low noise and low drift. Since this book is mainly about techniques for eliminating low frequency errors, it describes the nature of these errors and the associated dynamic offset cancellation techniques used to mitigate them.  Surveys comprehensively offset cancellation and accuracy improvement techniques applied in precision amplifier designs; Presents techniques in precision circuit design to mitigate low frequency errors in millivolt-level signals transmitted by ...

  8. Dictionary-based image reconstruction for superresolution in integrated circuit imaging.

    Science.gov (United States)

    Cilingiroglu, T Berkin; Uyar, Aydan; Tuysuzoglu, Ahmet; Karl, W Clem; Konrad, Janusz; Goldberg, Bennett B; Ünlü, M Selim

    2015-06-01

    Resolution improvement through signal processing techniques for integrated circuit imaging is becoming more crucial as the rapid decrease in integrated circuit dimensions continues. Although there is a significant effort to push the limits of optical resolution for backside fault analysis through the use of solid immersion lenses, higher order laser beams, and beam apodization, signal processing techniques are required for additional improvement. In this work, we propose a sparse image reconstruction framework which couples overcomplete dictionary-based representation with a physics-based forward model to improve resolution and localization accuracy in high numerical aperture confocal microscopy systems for backside optical integrated circuit analysis. The effectiveness of the framework is demonstrated on experimental data.

  9. System-level integrated circuit (SLIC) development for phased array antenna applications

    Science.gov (United States)

    Shalkhauser, K. A.; Raquet, C. A.

    1991-01-01

    A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

  10. Application of a fully-integrated groundwater-surface water flow model in municipal asset management

    Science.gov (United States)

    Bowman, L. K.; Unger, A.; Jones, J. P.

    2014-12-01

    Access to affordable potable water is critical in the development and maintenance of urban centres. Given that water is a public good in Canada, all funds related to operation and maintenance of the drinking water and wastewater networks must come from consumers. An asset management system can be put in place by municipalities to more efficiently manage their water and wastewater distribution system to ensure proper use of these funds. The system works at the operational, tactical, and strategic levels, thus ensuring optimal scheduling of operation and maintenance activities, as well as prediction of future water demand scenarios. At the operational level, a fully integrated model is used to simulate the groundwater-surface water interaction of the Laurel Creek Watershed, of which 80% is urbanized by the City of Waterloo. Canadian municipalities typically lose 13% of their potable water through leaks in watermains and sanitary sewers, and sanitary sewers often generate substantial inflows from fractures in pipe walls. The City of Waterloo sanitary sewers carry an additional 10,000 cubic meters of water to wastewater treatment plants. Therefore, watermain and sanitary sewers present a significant impact on the groundwater-surface water interaction, as well as the affordability of the drinking water and wastewater networks as a whole. To determine areas of concern within the network, the integrated groundwater-surface water model also simulates flow through the City of Waterloo's watermain and sanitary sewer networks. The final model will be used to assess the interaction between measured losses of water from the City of Waterloo's watermain system, infiltration into the sanitary sewer system adjacent to the watermains, and the response of the groundwater system to deteriorated sanitary sewers or to pipes that have been recently renovated. This will ultimately contribute to the City of Waterloo's municipal asset management plan.

  11. The One-Water Hydrologic Flow Model - The next generation in fully integrated hydrologic simulation software

    Science.gov (United States)

    Boyce, S. E.; Hanson, R. T.

    2015-12-01

    The One-Water Hydrologic Flow Model (MF-OWHM) is a MODFLOW-based integrated hydrologic flow model that is the most complete version, to date, of the MODFLOW family of hydrologic simulators needed for the analysis of a broad range of conjunctive-use issues. MF-OWHM fully links the movement and use of groundwater, surface water, and imported water for consumption by agriculture and natural vegetation on the landscape, and for potable and other uses within a supply-and-demand framework. MF-OWHM is based on the Farm Process for MODFLOW-2005 combined with Local Grid Refinement, Streamflow Routing, Surface-water Routing Process, Seawater Intrusion, Riparian Evapotranspiration, and the Newton-Raphson solver. MF-OWHM also includes linkages for deformation-, flow-, and head-dependent flows; additional observation and parameter options for higher-order calibrations; and redesigned code for facilitation of self-updating models and faster simulation run times. The next version of MF-OWHM, currently under development, will include a new surface-water operations module that simulates dynamic reservoir operations, the conduit flow process for karst aquifers and leaky pipe networks, a new subsidence and aquifer compaction package, and additional features and enhancements to enable more integration and cross communication between traditional MODFLOW packages. By retaining and tracking the water within the hydrosphere, MF-OWHM accounts for "all of the water everywhere and all of the time." This philosophy provides more confidence in the water accounting by the scientific community and provides the public a foundation needed to address wider classes of problems such as evaluation of conjunctive-use alternatives and sustainability analysis, including potential adaptation and mitigation strategies, and best management practices. By Scott E. Boyce and Randall T. Hanson

  12. A fully integrated frequency synthesizer for a dual-mode GPS and Compass receiver

    Institute of Scientific and Technical Information of China (English)

    Chu Xiaojie; Lin Min; Shi Yin; Dai F F

    2012-01-01

    This paper presents a fully integrated frequency synthesizer for a dual-mode GPS and Compass receiver fabricated in a 0.13 μm CMOS technology.The frequency synthesizer is implemented with an on-chip symmetric inductor and an on-chip loop filter.A capacitance multiplying approach is proposed in the on-chip loop filter design for area-saving consideration.Pulse-swallow topology with a multistage noise shaping △ Σ modulator is adopted in the frequency divider design.The synthesizer generates local oscillating signals at 1571.328 MHz and 1568.259 MHz with a 16.368 MHz reference clock by working in integer and fractional modes.Measurement results show that the phase noise of the synthesizer achieves -91.3 dBc/Hz and -117 dBc/Hz out of band at 100 kHz and 1 MHz frequency offset,separately.The proposed frequency synthesizer consumes 8.6 mA from a 1.2 V power supply and occupies an area of 0.92 mm2.

  13. Fully Integrated Passive UHF RFID Tag for Hash-Based Mutual Authentication Protocol

    Directory of Open Access Journals (Sweden)

    Shugo Mikami

    2015-01-01

    Full Text Available Passive radio-frequency identification (RFID tag has been used in many applications. While the RFID market is expected to grow, concerns about security and privacy of the RFID tag should be overcome for the future use. To overcome these issues, privacy-preserving authentication protocols based on cryptographic algorithms have been designed. However, to the best of our knowledge, evaluation of the whole tag, which includes an antenna, an analog front end, and a digital processing block, that runs authentication protocols has not been studied. In this paper, we present an implementation and evaluation of a fully integrated passive UHF RFID tag that runs a privacy-preserving mutual authentication protocol based on a hash function. We design a single chip including the analog front end and the digital processing block. We select a lightweight hash function supporting 80-bit security strength and a standard hash function supporting 128-bit security strength. We show that when the lightweight hash function is used, the tag completes the protocol with a reader-tag distance of 10 cm. Similarly, when the standard hash function is used, the tag completes the protocol with the distance of 8.5 cm. We discuss the impact of the peak power consumption of the tag on the distance of the tag due to the hash function.

  14. Mechatronic design of a fully integrated camera for mini-invasive surgery.

    Science.gov (United States)

    Zazzarini, C C; Patete, P; Baroni, G; Cerveri, P

    2013-06-01

    This paper describes the design features of an innovative fully integrated camera candidate for mini-invasive abdominal surgery with single port or transluminal access. The apparatus includes a CMOS imaging sensor, a light-emitting diode (LED)-based unit for scene illumination, a photodiode for luminance detection, an optical system designed according to the mechanical compensation paradigm, an actuation unit for enabling autofocus and optical zoom, and a control logics based on microcontroller. The bulk of the apparatus is characterized by a tubular shape with a diameter of 10 mm and a length of 35 mm. The optical system, composed of four lens groups, of which two are mobile, has a total length of 13.46 mm and an effective focal length ranging from 1.61 to 4.44 mm with a zoom factor of 2.75×, with a corresponding angular field of view ranging from 16° to 40°. The mechatronics unit, devoted to move the zoom and the focus lens groups, is implemented adopting miniature piezoelectric motors. The control logics implements a closed-loop mechanism, between the LEDs and photodiode, to attain automatic control light. Bottlenecks of the design and some potential issues of the realization are discussed. A potential clinical scenario is introduced.

  15. Sub-micron imaging of buried integrated circuit structures using scanning confocal electron microscopy.

    Energy Technology Data Exchange (ETDEWEB)

    Frigo, S. P.; Levine, Z.; Zaluzec, N. J.; Materials Science Division; Northern Arizona Univ.; NIST

    2002-09-09

    Two-dimensional images of model integrated circuit components were collected using the technique of scanning confocal electron microscopy. For structures embedded about 5 {mu}m below the surface of a silicon oxide dielectric, a lateral resolution of 76{+-}9 nm was measured. Elemental mapping via x-ray emission spectrometry is demonstrated. A parallax analysis of images taken for various tilt angles to the electron beam allowed determination of the spacing between two wiring planes. The results show that scanning confocal electron microscopy is capable of probing buried structures at resolutions that will be necessary for the inspection of next-generation integrated circuit technology.

  16. Wafer-level testing and test during burn-in for integrated circuits

    CERN Document Server

    Bahukudumbi, Sudarshan

    2010-01-01

    Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing.Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constrain

  17. Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

    Energy Technology Data Exchange (ETDEWEB)

    Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V. [JSC “Lenhydroproject” (Russian Federation)

    2015-09-15

    One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

  18. System and method for interfacing large-area electronics with integrated circuit devices

    Science.gov (United States)

    Verma, Naveen; Glisic, Branko; Sturm, James; Wagner, Sigurd

    2016-07-12

    A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.

  19. Integrated Circuit Interconnect Lines on Lossy Silicon Substrate with Finite Element Method

    Directory of Open Access Journals (Sweden)

    Sarhan M. Musa,

    2014-01-01

    Full Text Available The silicon substrate has a significant effect on the inductance parameter of a lossy interconnect line on integrated circuit. It is essential to take this into account in determining the transmission line electrical parameters. In this paper, a new quasi-TEM capacitance and inductance analysis of multiconductor multilayer interconnects is successfully demonstrated using finite element method (FEM. We specifically illustrate the electrostatic modeling of single and coupled interconnected lines on a silicon-silicon oxide substrate. Also, we determine the quasi-static spectral for the potential distribution of the silicon-integrated circuit.

  20. A 77 GHz on-chip strip dipole antenna integrated with balun circuits for automotive radar

    OpenAIRE

    2012-01-01

    In this paper, design and implementation of a 77 GHz on-chip strip dipole antenna integrated with both lumped and transmission line based balun circuits are presented. The on-chip antenna is realized by using IHP’s 0.25 μm SiGe BiCMOS technology with localized back-side etch (LBE) module to decrease substrate loss. The strip dipole antenna is fed by both a lumped LC circuit and strip line tapered baluns integrated on the same substrate and occupies an area of 1x1.2 mm2 including the RF pads. ...

  1. Detection of orbital angular momentum using a photonic integrated circuit.

    Science.gov (United States)

    Rui, Guanghao; Gu, Bing; Cui, Yiping; Zhan, Qiwen

    2016-06-20

    Orbital angular momentum (OAM) state of photons offer an attractive additional degree of freedom that has found a variety of applications. Measurement of OAM state, which is a critical task of these applications, demands photonic integrated devices for improved fidelity, miniaturization, and reconfiguration. Here we report the design of a silicon-integrated OAM receiver that is capable of detecting distinct and variable OAM states. Furthermore, the reconfiguration capability of the detector is achieved by applying voltage to the GeSe film to form gratings with alternate states. The resonant wavelength for arbitrary OAM state is demonstrated to be tunable in a quasi-linear manner through adjusting the duty cycle of the gratings. This work provides a viable approach for the realization of a compact integrated OAM detection device with enhanced functionality that may find important applications in optical communications and information processing with OAM states.

  2. Analog integrated circuits for the Lotka-Volterra competitive neural networks.

    Science.gov (United States)

    Asai, T; Ohtani, M; Yonezu, H

    1999-01-01

    A subthreshold MOS integrated circuit (IC) is designed and fabricated for implementing a competitive neural network of the Lotka-Volterra (LV) type which is derived from conventional membrane dynamics of neurons and is used for the selection of external inputs. The steady-state solutions to the LV equation can be classified into three types, each of which represents qualitatively different selection behavior. Among the solutions, the winners-share-all (WSA) solution in which a certain number of neurons remain activated in steady states is particularly useful owing to robustness in the selection of inputs from a noisy environment. The measured results of the fabricated LV IC's agree well with the theoretical prediction as long as the influence of device mismatches is small. Furthermore, results of extensive circuit simulations prove that the large-scale LV circuit producing the WSA solution does exhibit a reliable selection compared with winner-take-all circuits, in the possible presence of device mismatches.

  3. Photonic Integrated Circuits for Phased-Array Beamforming

    NARCIS (Netherlands)

    Vliet, F.E. van; Stulemeijer, J.; Benoist, K.W.; Maat, D.H.P.; Smit, M.K.; Dijk, R. van

    1999-01-01

    Photonic integration is very promising to bring down volume and weight of phased-array beamforming networks. In addition, photonics allows for increased functionality for wide bandwidth systems. In this paper we demonstrate the feasibiÌity of phase and amplitude control of a 16-elernent phased-array

  4. Computer-Aided Engineering of Semiconductor Integrated Circuits

    Science.gov (United States)

    1979-07-01

    norma - lization condition- fG( Yi f’) " 1 (.26) The integral of G is expressible in terms of the inverse cosine function. Now consider a transition from...list d-values for a-cristobalite ( ASTM -11-695) and corresponding (hkl) indices. Measure- ments obtained from plates processed by conventional

  5. A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

    Energy Technology Data Exchange (ETDEWEB)

    Arefin, Md Shamsul, E-mail: md.arefin@monash.edu; Redoute, Jean-Michel; Rasit Yuce, Mehmet [Electrical and Computer Systems Engineering, Monash University, Melbourne (Australia); Bulut Coskun, M.; Alan, Tuncay; Neild, Adrian [Mechanical and Aerospace Engineering, Monash University, Melbourne (Australia)

    2014-06-02

    This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0–5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

  6. Tunable quantum interference in a 3D integrated circuit.

    Science.gov (United States)

    Chaboyer, Zachary; Meany, Thomas; Helt, L G; Withford, Michael J; Steel, M J

    2015-04-27

    Integrated photonics promises solutions to questions of stability, complexity, and size in quantum optics. Advances in tunable and non-planar integrated platforms, such as laser-inscribed photonics, continue to bring the realisation of quantum advantages in computation and metrology ever closer, perhaps most easily seen in multi-path interferometry. Here we demonstrate control of two-photon interference in a chip-scale 3D multi-path interferometer, showing a reduced periodicity and enhanced visibility compared to single photon measurements. Observed non-classical visibilities are widely tunable, and explained well by theoretical predictions based on classical measurements. With these predictions we extract Fisher information approaching a theoretical maximum. Our results open a path to quantum enhanced phase measurements.

  7. InP HEMT Integrated Circuits for Submillimeter Wave Radiometers in Earth Remote Sensing

    Science.gov (United States)

    Deal, William R.; Chattopadhyay, Goutam

    2012-01-01

    The operating frequency of InP integrated circuits has pushed well into the Submillimeter Wave frequency band, with amplification reported as high as 670 GHz. This paper provides an overview of current performance and potential application of InP HEMT to Submillimeter Wave radiometers for earth remote sensing.

  8. Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6

    NARCIS (Netherlands)

    Roozeboom, F.; Narayanan, V.; Kakushima, K.; Timans, P.J.; Gusev, E.P.; Karim, Z.; Gendt, S. De

    2016-01-01

    The topics of this annual symposium continue to describe the evolution of traditional scaling in CMOS integrated circuit manufacturing (More Moore for short), combined with the opportunities from growing diversification and embedded functionality (More than Moore). Once again, the main objective was

  9. Development of Application-specific Integrated Circuit for Detector Signal Readout

    Institute of Scientific and Technical Information of China (English)

    LIU; Hai-feng; WAN; Yu-qing; TIAN; Hua-yang

    2013-01-01

    In general,the development of nuclear electronics was mainly promoted by nuclear physics,high energy physics and other disciplines.As nuclear physics research developed,the requirement of detection equipment which contained a large number of detectors gave birth to nuclear electronics ASIC(application-specific integrated circuit).The institutions such as European Organization for Nuclear

  10. Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits.

    Science.gov (United States)

    Aull, Brian

    2016-04-08

    This article reviews MIT Lincoln Laboratory's work over the past 20 years to develop photon-sensitive image sensors based on arrays of silicon Geiger-mode avalanche photodiodes. Integration of these detectors to all-digital CMOS readout circuits enable exquisitely sensitive solid-state imagers for lidar, wavefront sensing, and passive imaging.

  11. 78 FR 10635 - Certain Integrated Circuit Devices and Products Containing the Same; Notice of Receipt of...

    Science.gov (United States)

    2013-02-14

    ...Notice is hereby given that the U.S. International Trade Commission has received a complaint entitled Certain Integrated Circuit Devices and Products Containing the Same, DN 2938; the Commission is soliciting comments on any public interest issues raised by the complaint or complainant's filing under section 210.8(b) of the Commission's Rules of Practice and Procedure (19 CFR...

  12. 77 FR 33486 - Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products...

    Science.gov (United States)

    2012-06-06

    ...Notice is hereby given that the U.S. International Trade Commission has received a complaint entitled Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products Containing Same, DN 2899; the Commission is soliciting comments on any public interest issues raised by the complaint or complainant's filing under section 210.8(b) of the Commission's Rules of......

  13. Effective Teaching of the Physical Design of Integrated Circuits Using Educational Tools

    Science.gov (United States)

    Aziz, Syed Mahfuzul; Sicard, Etienne; Ben Dhia, Sonia

    2010-01-01

    This paper presents the strategies used for effective teaching and skill development in integrated circuit (IC) design using project-based learning (PBL) methodologies. It presents the contexts in which these strategies are applied to IC design courses at the University of South Australia, Adelaide, Australia, and the National Institute of Applied…

  14. Design of a co-integrated CMOS/NEMS oscillator with a simple electronic circuit

    OpenAIRE

    Arndt, Grégory; Colinet, Eric; Juillard, Jérôme

    2010-01-01

    This paper presents the theoretical study of a monolithically integrated NEMS/CMOS oscillator with electrostatic actuation and piezoresistive detection. A feedback circuit based on a single active transistor is implemented. The proposed architecture is so compact that it can be implemented with ease in a sensor array application for example. A brief description of the NEMS resonator is given and the conditions for oscillation build-up are stated. We show how the co-integration allows the use ...

  15. Millimeter-wave integrated circuits based on novel probe microstrip line and coplanar stripline exciters

    OpenAIRE

    Iezhov, Oleksandr; Omelianenko, Mykhaylo

    2009-01-01

    Novel designs of compact integrated waveguide exciters of microstrip line and coplanar stipline are presented in the paper. An E-plane microstrip 0-π phase-shift modulator with independent p-i-n diode control networks has been designed at 24 GHz on the basis of proposed exciters. The total length of the integrated circuit substrate including exciters is no more than 0.62 of waveguide wavelength.

  16. Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

    OpenAIRE

    Bowei Zhang; Quan Dong; Korman, Can E.; Zhenyu Li; Zaghloul, Mona E.

    2013-01-01

    A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstratio...

  17. A Full CMOS Integration Including ISFET Microsensors and Interface Circuit for Biochemical Applications

    Institute of Scientific and Technical Information of China (English)

    Jinbao Wei; Haigang Yang; Hongguang Sun; Zengjin Lin; Shanhong Xia

    2006-01-01

    One of today's challenges is the integration of ISFETs in chemical and biochemical Microsystems. This article presents a full integration of ISFET chip containing the ISFET/REFET (reference FET) pair, ISFET/REFET amplifiers, bias current generator, as well as a reference electrode structure, all integrated on the same chip based on CMOS technology. The sensor chip was fabricated in a standard 0.35 μm CMOS process (Chartered Semiconductor, Singapore). The extra post processing steps have been developed and added for depositing membranes. Finally, the pH response of the integrated sensor was measured with the interface circuit.

  18. CMOS-based carbon nanotube pass-transistor logic integrated circuits.

    Science.gov (United States)

    Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

    2012-02-14

    Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration.

  19. An analog integrated signal processing circuit for on-chip diffusion-based gas analysis

    Science.gov (United States)

    Sadeghi, Hesam; Ghafarinia, Vahid

    2013-07-01

    In diffusion-based gas analysis, the transient of gas diffusion process is recorded by a generic gas sensor to serve as a fingerprint for qualitative and quantitative analysis of gaseous samples. Following the acquisition of these specific signals, any standalone gas analyzer requires a pattern recognition system for pattern classification. The classic digital pattern recognition methods require computing hardware of adequate computational throughput. In this paper, we have followed a straightforward mathematical procedure to relate the signals to their associated target gases. We have shown that the procedure can be implemented by a set of analog functions. Based on the results, we have designed an analog integrated circuit, in 0.18 µm standard CMOS process, for processing the diffusion-based transient signals. The main circuit components are a low-pass filter, the differentiator, the feature extractor and an artificial neural network. The output of the circuit is a 2-bit binary code that specifies the target gas. The circuit successfully classified four alcoholic vapors by processing the experimentally obtained response patterns. The proposed signal processing circuit, the semiconductor gas sensor and the diffusion channel can all be implemented on a single substrate to fabricate an integrated micro gas analyzer.

  20. A Novel Optimization Tool for Automated Design of Integrated Circuits based on MOSGA

    Directory of Open Access Journals (Sweden)

    Maryam Dehbashian

    2011-11-01

    Full Text Available In this paper a novel optimization method based on Multi-Objective Gravitational Search Algorithm (MOGSA is presented for automated design of analog integrated circuits. The recommended method firstly simulates a selected circuit using a simulator and then simulated results are optimized by MOGSA algorithm. Finally this process continues to meet its optimum result. The main programs of the proposed method have been implemented in MATLAB while analog circuits are simulated by HSPICE software. To show the capability of this method, its proficiency will be examined in the optimization of analog integrated circuits design. In this paper, an analog circuit sizing scheme -Optimum Automated Design of a Temperature independent Differential Op-amp using Widlar Current Source- is illustrated as a case study. The computer results obtained from implementing this method indicate that the design specifications are closely met. Moreover, according to various design criteria, this tool by proposing a varied set of answers can give more options to designers to choose a desirable scheme among other suggested results. MOGSA, the proposal algorithm, introduces a novel method in multi objective optimization on the basis of Gravitational Search Algorithm in which the concept of “Pareto-optimality” is used to determine “non-dominated” positions as well as an external repository to keep these positions. To ensure the accuracy of MOGSA performance, this algorithm is validated using several standard test functions from some specialized literatures. Final results indicate that our method is highly competitive with current multi objective optimization algorithms.

  1. A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit

    Directory of Open Access Journals (Sweden)

    Zong Yao

    2016-06-01

    Full Text Available This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of −50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts, the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor’s output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.

  2. A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit.

    Science.gov (United States)

    Yao, Zong; Liang, Ting; Jia, Pinggang; Hong, Yingping; Qi, Lei; Lei, Cheng; Zhang, Bin; Xiong, Jijun

    2016-06-18

    This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI) material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of -50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts), the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor's output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.

  3. Power Management Integrated Circuit for Indoor Photovoltaic Energy Harvesting System

    Science.gov (United States)

    Jain, Vipul

    In today's world, power dissipation is a main concern for battery operated mobile devices. Key design decisions are being governed by power rather than area/delay because power requirements are growing more stringent every year. Hence, a hybrid power management system is proposed, which uses both a solar panel to harvest energy from indoor lighting and a battery to power the load. The system tracks the maximum power point of the solar panel and regulates the battery and microcontroller output load voltages through the use of an on-chip switched-capacitor DC-DC converter. System performance is verified through simulation at the 180nm technology node and is made to be integrated on-chip with 0.25 second startup time, 79% efficiency, --8/+14% ripple on the load, an average 1micro A of quiescent current (3.7micro W of power) and total on-chip area of 1.8mm2 .

  4. A METHOD AND AN APPARATUS FOR PROVIDING TIMING SIGNALS TO A NUMBER OF CIRCUITS, AN INTEGRATED CIRCUIT AND A NODE

    DEFF Research Database (Denmark)

    2006-01-01

    A method of providing or transporting a timing signal between a number of circuits, electrical or optical, where each circuit is fed by a node. The nodes forward timing signals between each other, and at least one node is adapted to not transmit a timing signal before having received a timing...... signal from at least two nodes. In this manner, the direction of the timing skew between nodes and circuits is known and data transport between the circuits made easier....

  5. A novel high voltage start up circuit for an integrated switched mode power supply

    Energy Technology Data Exchange (ETDEWEB)

    Hu Hao; Chen Xingbi, E-mail: huhao21@uestc.edu.c [State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 (China)

    2010-09-15

    A novel high voltage start up circuit for providing an initial bias voltage to an integrated switched mode power supply (SMPS) is presented. An enhanced mode VDMOS transistor, the gate of which is biased by a floating p-island, is used to provide start up current and sustain high voltage. An NMOS transistor having a high source to ground breakdown voltage is included to extend the bias voltage range to the SMPS. Simulation results indicate that the high voltage start up circuit can start and restart as designed. The proposed structure is believed to be more energy saving and cost-effective compared with other solutions. (semiconductor devices)

  6. LARGE-SCALE PHOTONIC INTEGRATED CIRCUIT FOR QPSK REGENERATION AND WAVELENGTH CONVERSION USING SOA-MZI

    Directory of Open Access Journals (Sweden)

    V.BHARATHI

    2013-06-01

    Full Text Available We investigate through numerical studies and experiments the performance of QPSK regeneration and wavelength-conversion of a large scale, silica-on-silicon photonic integrated circuit using cross phase modulation in a semiconductor optical amplifier(SOA. The phase changing is obtained because of the XPM in SOA. The QPSK signal is generated from 10 Gb/s two NRZ- OOK signals and RZ clock pulse signal. Simulation studies reveal the wavelength conversion potential of the circuit with enhanced regenerative capability of QPSK modulation. The tolerance power, BER, and Q factor value is analytically evaluated. Also calculate the power penalty.

  7. SEMICONDUCTOR DEVICES: A novel high voltage start up circuit for an integrated switched mode power supply

    Science.gov (United States)

    Hao, Hu; Xingbi, Chen

    2010-09-01

    A novel high voltage start up circuit for providing an initial bias voltage to an integrated switched mode power supply (SMPS) is presented. An enhanced mode VDMOS transistor, the gate of which is biased by a floating p-island, is used to provide start up current and sustain high voltage. An NMOS transistor having a high source to ground breakdown voltage is included to extend the bias voltage range to the SMPS. Simulation results indicate that the high voltage start up circuit can start and restart as designed. The proposed structure is believed to be more energy saving and cost-effective compared with other solutions.

  8. Measurements of complex impedance in microwave high power systems with a new bluetooth integrated circuit.

    Science.gov (United States)

    Roussy, Georges; Dichtel, Bernard; Chaabane, Haykel

    2003-01-01

    By using a new integrated circuit, which is marketed for bluetooth applications, it is possible to simplify the method of measuring the complex impedance, complex reflection coefficient and complex transmission coefficient in an industrial microwave setup. The Analog Devices circuit AD 8302, which measures gain and phase up to 2.7 GHz, operates with variable level input signals and is less sensitive to both amplitude and frequency fluctuations of the industrial magnetrons than are mixers and AM crystal detectors. Therefore, accurate gain and phase measurements can be performed with low stability generators. A mechanical setup with an AD 8302 is described; the calibration procedure and its performance are presented.

  9. Impact-Based Area Allocation for Yield Optimization in Integrated Circuits

    Science.gov (United States)

    Abraham, Billion; Widodo, Arif; Chen, Poki

    2016-06-01

    In analog integrated circuit (IC) layout, area allocation is a very important issue for achieving good mismatch cancellation. However, most IC layout papers focus only on layout strategy to reduce systematic mismatch. In 2006, an outstanding paper presenting area allocation strategy was published to introduce technique for random mismatch reduction. Instead of using general theoretical study to prove the strategy, this research presented close-to-optimum simulations only on case-bycase basis. The impact-based area allocation for yield optimization in integrated circuits is proposed in this chapter. To demonstrate the corresponding strategy, not only a theoretical analysis but also an integral nonlinearity-based yield simulation will be given to derive optimum area allocation for binary weighted current steering digital-to-analog converter (DAC). The result will be concluded to convince IC designers how to allocate area for critical devices in an optimum way.

  10. Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication

    Science.gov (United States)

    Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

    2017-02-01

    In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80–100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes.

  11. Study on Pulse Skip Modulation Mode in Smart Power Integrated Circuits and Its Test Technology

    Institute of Scientific and Technical Information of China (English)

    LUO Ping

    2005-01-01

    @@ Up to now, the popular control modes for smart power integrated circuit (SPIC) are PWM and PFM.PWM bases on constant frequency variable width (CFVW) control pulse, whereas, PFM bases on constant width variable frequency (CWVF) control pulse. PWM converter has low efficiency with light loads and high amplitude harmonic. On the other hand,the control circuit and filter for PFM are much complex. This dissertation proposes a novel modulation mode named pulse skip modulation (PSM)for SPIC converter, which bases on constant width constant frequency (CWCF) control pulse. It is shown that PSM converter would improve its efficiency and suppress EMI. It also has quick response speed, good interfere rejection and strong robust. Furthermore, it is easy to realize PSM control circuit. The modulating theories of PSM are firstly studied in the world according to the author's investigation.

  12. Moving the boundary between wavelength resources in optical packet and circuit integrated ring network.

    Science.gov (United States)

    Furukawa, Hideaki; Miyazawa, Takaya; Wada, Naoya; Harai, Hiroaki

    2014-01-13

    Optical packet and circuit integrated (OPCI) networks provide both optical packet switching (OPS) and optical circuit switching (OCS) links on the same physical infrastructure using a wavelength multiplexing technique in order to deal with best-effort services and quality-guaranteed services. To immediately respond to changes in user demand for OPS and OCS links, OPCI networks should dynamically adjust the amount of wavelength resources for each link. We propose a resource-adjustable hybrid optical packet/circuit switch and transponder. We also verify that distributed control of resource adjustments can be applied to the OPCI ring network testbed we developed. In cooperation with the resource adjustment mechanism and the hybrid switch and transponder, we demonstrate that automatically allocating a shared resource and moving the wavelength resource boundary between OPS and OCS links can be successfully executed, depending on the number of optical paths in use.

  13. Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication

    Science.gov (United States)

    Habibpour, Omid; He, Zhongxia Simon; Strupinski, Wlodek; Rorsman, Niklas; Zirath, Herbert

    2017-01-01

    In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80–100 GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes. PMID:28145513

  14. Integrated circuits and molecular components for stress and feeding: implications for eating disorders.

    Science.gov (United States)

    Hardaway, J A; Crowley, N A; Bulik, C M; Kash, T L

    2015-01-01

    Eating disorders are complex brain disorders that afflict millions of individuals worldwide. The etiology of these diseases is not fully understood, but a growing body of literature suggests that stress and anxiety may play a critical role in their development. As our understanding of the genetic and environmental factors that contribute to disease in clinical populations like anorexia nervosa, bulimia nervosa and binge eating disorder continue to grow, neuroscientists are using animal models to understand the neurobiology of stress and feeding. We hypothesize that eating disorder clinical phenotypes may result from stress-induced maladaptive alterations in neural circuits that regulate feeding, and that these circuits can be neurochemically isolated using animal model of eating disorders.

  15. SEMICONDUCTOR INTEGRATED CIRCUITS: Design and realization of an ultra-low-power low-phase-noise CMOS LC-VCO

    Science.gov (United States)

    Xiushan, Wu; Zhigong, Wang; Zhiqun, Li; Jun, Xia; Qing, Li

    2010-08-01

    A fully integrated cross-coupled LC tank voltage-controlled oscillator (LC-VCO) using transformer feedback is proposed to achieve a low phase noise and ultra-low-power design even at a supply below the threshold voltage. The ultra-low-power VCO is implemented in the mixed-signal and RF 1P6M 0.18-μm CMOS technology of SMIC. The measured phase noise is -125.3 dBc/Hz at an offset frequency of 1 MHz from a carrier of 2.433 GHz, while the VCO core circuit draws only 640 μW from a 0.4-V supply. The designed VCO can cover a frequency range from 2.28 to 2.48 GHz. The tuning range of the circuit is 200 MHz (8.7%) and the FOM is -195.7 dB, which is suitable for an IEEE 802.11b receiver.

  16. Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

    Science.gov (United States)

    Geier, Michael

    Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and

  17. I-RaCM: A Fully Integrated Risk and Lifecycle Cost Model Project

    Data.gov (United States)

    National Aeronautics and Space Administration — SpaceWorks Engineering, Inc. (SEI) proposes development of the Integrated Risk and Cost Model I-RaCM, as the innovation to meet the need for integrated cost and risk...

  18. 2.3 µm range InP-based type-II quantum well Fabry-Perot lasers heterogeneously integrated on a silicon photonic integrated circuit.

    Science.gov (United States)

    Wang, Ruijun; Sprengel, Stephan; Boehm, Gerhard; Muneeb, Muhammad; Baets, Roel; Amann, Markus-Christian; Roelkens, Gunther

    2016-09-01

    Heterogeneously integrated InP-based type-II quantum well Fabry-Perot lasers on a silicon waveguide circuit emitting in the 2.3 µm wavelength range are demonstrated. The devices consist of a "W"-shaped InGaAs/GaAsSb multi-quantum-well gain section, III-V/silicon spot size converters and two silicon Bragg grating reflectors to form the laser cavity. In continuous-wave (CW) operation, we obtain a threshold current density of 2.7 kA/cm2 and output power of 1.3 mW at 5 °C for 2.35 μm lasers. The lasers emit over 3.7 mW of peak power with a threshold current density of 1.6 kA/cm2 in pulsed regime at room temperature. This demonstration of heterogeneously integrated lasers indicates that the material system and heterogeneous integration method are promising to realize fully integrated III-V/silicon photonics spectroscopic sensors in the 2 µm wavelength range.

  19. High-voltage integrated active quenching circuit for single photon count rate up to 80 Mcounts/s.

    Science.gov (United States)

    Acconcia, Giulia; Rech, Ivan; Gulinatti, Angelo; Ghioni, Massimo

    2016-08-01

    Single photon avalanche diodes (SPADs) have been subject to a fast improvement in recent years. In particular, custom technologies specifically developed to fabricate SPAD devices give the designer the freedom to pursue the best detector performance required by applications. A significant breakthrough in this field is represented by the recent introduction of a red enhanced SPAD (RE-SPAD) technology, capable of attaining a good photon detection efficiency in the near infrared range (e.g. 40% at a wavelength of 800 nm) while maintaining a remarkable timing resolution of about 100ps full width at half maximum. Being planar, the RE-SPAD custom technology opened the way to the development of SPAD arrays particularly suited for demanding applications in the field of life sciences. However, to achieve such excellent performance custom SPAD detectors must be operated with an external active quenching circuit (AQC) designed on purpose. Next steps toward the development of compact and practical multichannel systems will require a new generation of monolithically integrated AQC arrays. In this paper we present a new, fully integrated AQC fabricated in a high-voltage 0.18 µm CMOS technology able to provide quenching pulses up to 50 Volts with fast leading and trailing edges. Although specifically designed for optimal operation of RE-SPAD devices, the new AQC is quite versatile: it can be used with any SPAD detector, regardless its fabrication technology, reaching remarkable count rates up to 80 Mcounts/s and generating a photon detection pulse with a timing jitter as low as 119 ps full width at half maximum. The compact design of our circuit has been specifically laid out to make this IC a suitable building block for monolithically integrated AQC arrays.

  20. Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

    Science.gov (United States)

    Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

    2016-08-10

    Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

  1. Integrated Power Flow and Short Circuit Calculation Method for Distribution Network with Inverter Based Distributed Generation

    Directory of Open Access Journals (Sweden)

    Shan Yang

    2016-01-01

    Full Text Available Power flow calculation and short circuit calculation are the basis of theoretical research for distribution network with inverter based distributed generation. The similarity of equivalent model for inverter based distributed generation during normal and fault conditions of distribution network and the differences between power flow and short circuit calculation are analyzed in this paper. Then an integrated power flow and short circuit calculation method for distribution network with inverter based distributed generation is proposed. The proposed method let the inverter based distributed generation be equivalent to Iθ bus, which makes it suitable to calculate the power flow of distribution network with a current limited inverter based distributed generation. And the low voltage ride through capability of inverter based distributed generation can be considered as well in this paper. Finally, some tests of power flow and short circuit current calculation are performed on a 33-bus distribution network. The calculated results from the proposed method in this paper are contrasted with those by the traditional method and the simulation method, whose results have verified the effectiveness of the integrated method suggested in this paper.

  2. Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits

    KAUST Repository

    Lechuga Aranda, Jesus Javier

    2016-05-01

    Since the introduction of Complementary-Metal-Oxide-Semiconductor (CMOS) technology, the chip industry has enjoyed many benefits of transistor feature size scaling, including higher speed and device density and improved energy efficiency. However, in the recent years, the IC designers have encountered a few roadblocks, namely reaching the physical limits of scaling and also increased device leakage which has resulted in a slow-down of supply voltage and power density scaling. Therefore, there has been an extensive hunt for alternative circuit architectures and switching devices that can alleviate or eliminate the current crisis in the semiconductor industry. The Nano-Electro-Mechanical (NEM) relay is a promising alternative switch that offers zero leakage and abrupt turn-on behaviour. Even though these devices are intrinsically slower than CMOS transistors, new circuit design techniques tailored for the electromechanical properties of such devices can be leveraged to design medium performance, ultra-low power integrated circuits. In this thesis, we deal with a new generation of such devices that is built in the back end of line (BEOL) CMOS process and is an ideal option for full integration with current CMOS transistor technology. Simulation and verification at the circuit and system level is a critical step in the design flow of microelectronic circuits, and this is especially important for new technologies that lack the standard design infrastructure and well-known verification platforms. Although most of the physical and electrical properties of NEM structures can be simulated using standard electronic automation software, there is no report of a reliable behavioural model for NEMS switches that enable large circuit simulations. In this work, we present an optimised model of a BEOL nano relay that encompasses all the electromechanical characteristics of the device and is robust and lightweight enough for VLSI applications that require simulation of thousands of

  3. Integrated bistable generator for wideband energy harvesting with optimized synchronous electric charge extraction circuit

    Science.gov (United States)

    Liu, Weiqun; Badel, Adrien; Formosa, Fabien; Wu, Yipeng; Agbossou, Amen

    2013-12-01

    Bistable generators have been proposed as potential solutions to the challenge of variable vibration frequencies. In the authors' previous works, a specific BSM (Buckled-Spring-Mass) harvester architecture has been suggested. It presents some properties of interests: simplicity, compactness and wide bandwidth. Using a normalized model of the BSM generator for design and optimization at different scales, this paper presents a new integrated BSM bistable generator design with the OSECE (Optimized Synchronous Electric Charge Extraction) technique which is used for broadband energy harvesting. The experimental results obtained from an initial prototype device show that the BSM generator with the OSECE circuit exhibits better performance for low coupling cases or reverse sweep excitations. This is also confirmed by simulations for the proposed integrated generator. Good applications prospective is expected for the bistable generator with the nonlinear OSECE circuit.

  4. Integrated Circuit-Based Biofabrication with Common Biomaterials for Probing Cellular Biomechanics.

    Science.gov (United States)

    Sung, Chun-Yen; Yang, Chung-Yao; Yeh, J Andrew; Cheng, Chao-Min

    2016-02-01

    Recent advances in bioengineering have enabled the development of biomedical tools with modifiable surface features (small-scale architecture) to mimic extracellular matrices and aid in the development of well-controlled platforms that allow for the application of mechanical stimulation for studying cellular biomechanics. An overview of recent developments in common biomaterials that can be manufactured using integrated circuit-based biofabrication is presented. Integrated circuit-based biofabrication possesses advantages including mass and diverse production capacities for fabricating in vitro biomedical devices. This review highlights the use of common biomaterials that have been most frequently used to study cellular biomechanics. In addition, the influence of various small-scale characteristics on common biomaterial surfaces for a range of different cell types is discussed.

  5. Amorphous Zinc Oxide Integrated Wavy Channel Thin Film Transistor Based High Performance Digital Circuits

    KAUST Repository

    Hanna, Amir

    2015-12-04

    High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high performance in material agnostic way. We further demonstrate digital logic NAND circuit using the WC architecture and compare it to the conventional planar architecture. The WC architecture circuits have shown 2× higher peak-to-peak output voltage for the same input voltage. They also have 3× lower high-to-low propagation delay times, respectively, when compared to the planar architecture. The performance enhancement is attributed to both extra device width and enhanced field effect mobility due to higher gate field electrostatics control.

  6. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  7. Localization and Imaging of Integrated Circuit Defect Using Simple Optical Feedback Detection

    Directory of Open Access Journals (Sweden)

    Vernon Julius Cemine

    2004-12-01

    Full Text Available High-contrast microscopy of semiconductor and metal edifices in integrated circuits is demonstrated by combining laser-scanning confocal reflectance microscopy, one-photon optical-beam-induced current (1P-OBIC imaging, and optical feedback detection via a commercially available semiconductor laser that also serves as the excitation source. The confocal microscope has a compact in-line arrangement with no external photodetector. Confocal and 1P-OBIC images are obtained simultaneously from the same focused beam that is scanned across the sample plane. Image pairs are processed to generate exclusive high-contrast distributions of the semiconductor, metal, and dielectric sites in a GaAs photodiode array sample. The method is then utilized to demonstrate defect localization and imaging in an integrated circuit.

  8. A multi-ring optical packet and circuit integrated network with optical buffering.

    Science.gov (United States)

    Furukawa, Hideaki; Shinada, Satoshi; Miyazawa, Takaya; Harai, Hiroaki; Kawasaki, Wataru; Saito, Tatsuhiko; Matsunaga, Koji; Toyozumi, Tatuya; Wada, Naoya

    2012-12-17

    We newly developed a 3 × 3 integrated optical packet and circuit switch-node. Optical buffers and burst-mode erbium-doped fiber amplifiers with the gain flatness are installed in the 3 × 3 switch-node. The optical buffer can prevent packet collisions and decrease packet loss. We constructed a multi-ring optical packet and circuit integrated network testbed connecting two single-ring networks and a client network by the 3 × 3 switch-node. For the first time, we demonstrated 244 km fiber transmission and 5-node hopping of multiplexed 14-wavelength 10 Gbps optical paths and 100 Gbps optical packets encapsulating 10 Gigabit Ethernet frames on the testbed. Error-free (frame error rate < 1 × 10(-4)) operation was achieved with optical packets of various packet lengths. In addition, successful avoidance of packet collisions by optical buffers was confirmed.

  9. Advanced field-solver techniques for RC extraction of integrated circuits

    CERN Document Server

    Yu, Wenjian

    2014-01-01

    Resistance and capacitance (RC) extraction is an essential step in modeling the interconnection wires and substrate coupling effect in nanometer-technology integrated circuits (IC). The field-solver techniques for RC extraction guarantee the accuracy of modeling, and are becoming increasingly important in meeting the demand for accurate modeling and simulation of VLSI designs. Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits presents a systematic introduction to, and treatment of, the key field-solver methods for RC extraction of VLSI interconnects and substrate coupling in mixed-signal ICs. Various field-solver techniques are explained in detail, with real-world examples to illustrate the advantages and disadvantages of each algorithm. This book will benefit graduate students and researchers in the field of electrical and computer engineering, as well as engineers working in the IC design and design automation industries. Dr. Wenjian Yu is an Associate Professor at the Department of ...

  10. Advances in gallium arsenide monolithic microwave integrated-circuit technology for space communications systems

    Science.gov (United States)

    Bhasin, K. B.; Connolly, D. J.

    1986-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. In this paper, current developments in GaAs MMIC technology are described, and the status and prospects of the technology are assessed.

  11. Simple Wide Frequency Range Impedance Meter Based on AD5933 Integrated Circuit

    OpenAIRE

    Chabowski Konrad; Piasecki Tomasz; Dzierka Andrzej; Nitsch Karol

    2015-01-01

    As it contains elements of complete digital impedance meter, the AD5933 integrated circuit is an interesting solution for impedance measurements. However, its use for measurements in a wide range of impedances and frequencies requires an additional digital and analogue circuitry. This paper presents the design and performance of a simple impedance meter based on the AD5933 IC. Apart from the AD5933 IC it consists of a clock generator with a programmable prescaler, a novel DC offset canceller ...

  12. Evolution of the Department of Defense Millimeter and Microwave Monolithic Integrated Circuit Program

    Science.gov (United States)

    2007-02-01

    Dertouzos, Michael; Lester, Richard K.; Solow , Robert M.; Thorow, Lester C., “Toward a New Industrial America Scientific American, June 1989, pp...Vladimir Gelnovatch, Director of the U.S. Army Electronics Technology and Devices Laboratory; and Robert Heaston, Office of Under Secretary of Defense...Jack S. Kilby and Robert N. Noyce shared honors for the achievement. Hybrid microwave and millimeter wave integrated circuits achieved greater

  13. Protecting integrated circuits from excessive charge accumulation during plasma cleaning of multichip modules

    Energy Technology Data Exchange (ETDEWEB)

    Rodenbeck, Christopher T; Girardi, Michael

    2015-04-21

    Internal nodes of a constituent integrated circuit (IC) package of a multichip module (MCM) are protected from excessive charge during plasma cleaning of the MCM. The protected nodes are coupled to an internal common node of the IC package by respectively associated discharge paths. The common node is connected to a bond pad of the IC package. During MCM assembly, and before plasma cleaning, this bond pad receives a wire bond to a ground bond pad on the MCM substrate.

  14. Whispering-gallery microcavity semiconductor lasers suitable for photonic integrated circuits and optical interconnects

    Institute of Scientific and Technical Information of China (English)

    2009-01-01

    The characteristics of whispering-gallery-like modes in the equilateral triangle and square microresonators are introduced,including directional emission triangle and square microlasers connected to an output waveguide.We propose a photonic interconnect scheme by connecting two directional emission microlasers with an optical waveguide on silicon integrated circuit chip.The measurement indicates that the triangle microlasers can work as a resonance enhanced photodetector for optical interconnect.

  15. Self-contained sub-millimeter wave rectifying antenna integrated circuit

    Science.gov (United States)

    Siegel, Peter H. (Inventor)

    2004-01-01

    The invention is embodied in a monolithic semiconductor integrated circuit in which is formed an antenna, such as a slot dipole antenna, connected across a rectifying diode. In the preferred embodiment, the antenna is tuned to received an electromagnetic wave of about 2500 GHz so that the device is on the order of a wavelength in size, or about 200 microns across and 30 microns thick. This size is ideal for mounting on a microdevice such as a microrobot for example. The antenna is endowed with high gain in the direction of the incident radiation by providing a quarter-wavelength (30 microns) thick resonant cavity below the antenna, the cavity being formed as part of the monolithic integrated circuit. Preferably, the integrated circuit consists of a thin gallium arsenide membrane overlying the resonant cavity and supporting an epitaxial Gallium Arsenide semiconductor layer. The rectifying diode is a Schottky diode formed in the GaAs semiconductor layer and having an area that is a very small fraction of the wavelength of the 2500 GHz incident radiation. The cavity provides high forward gain in the antenna and isolation from surrounding structure.

  16. Vertical optical ring resonators fully integrated with nanophotonic waveguides on silicon-on-insulator substrates

    CERN Document Server

    Madani, Abbas; Stolarek, David; Zimmermann, Lars; Ma, Libo; Schmidt, Oliver G

    2015-01-01

    We demonstrate full integration of vertical optical ring resonators with silicon nanophotonic waveguides on silicon-on-insulator substrates to accomplish a significant step towards 3D photonic integration. The on-chip integration is realized by rolling up 2D differentially strained TiO2 nanomembranes into 3D microtube cavities on a nanophotonic microchip. The integration configuration allows for out of plane optical coupling between the in-plane nanowaveguides and the vertical microtube cavities as a compact and mechanically stable optical unit, which could enable refined vertical light transfer in 3D stacks of multiple photonic layers. In this vertical transmission scheme, resonant filtering of optical signals at telecommunication wavelengths is demonstrated based on subwavelength thick walled microcavities. Moreover, an array of microtube cavities is prepared and each microtube cavity is integrated with multiple waveguides which opens up interesting perspectives towards parallel and multi-routing through a ...

  17. Optoelectronic cross-injection locking of a dual-wavelength photonic integrated circuit for low-phase-noise millimeter-wave generation.

    Science.gov (United States)

    Kervella, Gaël; Van Dijk, Frederic; Pillet, Grégoire; Lamponi, Marco; Chtioui, Mourad; Morvan, Loïc; Alouini, Mehdi

    2015-08-01

    We report on the stabilization of a 90-GHz millimeter-wave signal generated from a fully integrated photonic circuit. The chip consists of two DFB single-mode lasers whose optical signals are combined on a fast photodiode to generate a largely tunable heterodyne beat note. We generate an optical comb from each laser with a microwave synthesizer, and by self-injecting the resulting signal, we mutually correlate the phase noise of each DFB and stabilize the beatnote on a multiple of the frequency delivered by the synthesizer. The performances achieved beat note linewidth below 30 Hz.

  18. Custom integrated front-end circuit for the CMS electromagnetic calorimeter

    CERN Document Server

    Walder, J P; Denes, P; Mathez, H; Pangaud, P

    2001-01-01

    A wide dynamic range multi-gain transimpedance amplifier custom integrated circuit has been developed for the readout of avalanche photodiode and vacuum photodiode in the CMS electromagnetic calorimeter for LHC experiment. The 92 db input dynamic range is divided into four ranges of 12 bits each in order to provide 40 MHz analog sampled data to a 12 bits ADC. This concept, which has been integrated in rad-hard full complementary bipolar technology, will be described. Experimental results obtained in lab and under irradiation will be presented along with test strategy being used for mass production. 6 Refs.

  19. Hybrid-integrated coherent receiver using silica-based planar lightwave circuit technology

    Science.gov (United States)

    Kim, Jong-Hoi; Choe, Joong-Seon; Choi, Kwang-Seong; Youn, Chun-Ju; Kim, Duk-Jun; Jang, Sun-Hyok; Kwon, Yong-Hwan; Nam, Eun-Soo

    2011-12-01

    A hybrid-integrated coherent receiver module has been achieved using flip-chip bonding technology, consisting of a silica-based 90°-hybrid planar lightwave circuit (PLC) platform, a spot-size converter integrated waveguide photodiode (SSC-WG-PD), and a dual-channel transimpedance amplifier (TIA). The receiver module shows error-free operation up to 40Gb/s and OSNR sensitivity of 11.5 dB for BER = 10-3 at 25 Gb/s.

  20. 76 FR 19174 - In the Matter of Circuit Systems, Inc., Global Energy Group, Inc., Integrated Medical Resources...

    Science.gov (United States)

    2011-04-06

    ... From the Federal Register Online via the Government Publishing Office SECURITIES AND EXCHANGE COMMISSION File No. 500-1 In the Matter of Circuit Systems, Inc., Global Energy Group, Inc., Integrated... information concerning the securities of Circuit Systems, Inc. because it has not filed any periodic...

  1. A Fault Dictionary-Based Fault Diagnosis Approach for CMOS Analog Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Mouna Karmani

    2011-09-01

    Full Text Available In this paper, we propose a simulation-before-test (SBT fault diagnosis methodology based on the use of a fault dictionary approach. This technique allows the detection and localization of the most likely defects of open-circuit type occurring in Complementary Metal–Oxide–Semiconductor (CMOS analog integrated circuits (ICs interconnects. The fault dictionary is built by simulating the most likely defects causing the faults to be detected at the layout level. Then, for each injected fault, the spectre’s frequency responses and the power consumption obtained by simulation are stored in a table which constitutes the fault dictionary.In fact, each line in the fault dictionary constitutes a fault signature used to identify and locate a considered defect. When testing, the circuit under test is excited with the same stimulus, and the responses obtained are compared to the stored ones. To prove the efficiency of the proposed technique, a full custom CMOS operational amplifier is implemented in 0.25 μm technology and the most likely faults of open circuit type are deliberately injected and simulated at the layout level.

  2. Layout-aware simulation of soft errors in sub-100 nm integrated circuits

    Science.gov (United States)

    Balbekov, A.; Gorbunov, M.; Bobkov, S.

    2016-12-01

    Single Event Transient (SET) caused by charged particle traveling through the sensitive volume of integral circuit (IC) may lead to different errors in digital circuits in some cases. In technologies below 180 nm, a single particle can affect multiple devices causing multiple SET. This fact adds the complexity to fault tolerant devices design, because the schematic design techniques become useless without their layout consideration. The most common layout mitigation technique is a spatial separation of sensitive nodes of hardened circuits. Spatial separation decreases the circuit performance and increases power consumption. Spacing should thus be reasonable and its scaling follows the device dimensions' scaling trend. This paper presents the development of the SET simulation approach comprised of SPICE simulation with "double exponent" current source as SET model. The technique uses layout in GDSII format to locate nearby devices that can be affected by a single particle and that can share the generated charge. The developed software tool automatizes multiple simulations and gathers the produced data to present it as the sensitivity map. The examples of conducted simulations of fault tolerant cells and their sensitivity maps are presented in this paper.

  3. Design, Fabrication and Integration of a NaK-Cooled Circuit

    Science.gov (United States)

    Garber, Anne; Godfroy, Thomas

    2006-01-01

    The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed for use with a eutectic mixture of sodium potassium (NaK), was redesigned to for use with lithium. Due to a shi$ in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature circuit include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a fill design) was selected for fabrication and test. This paper summarizes the integration and preparations for the fill of the pumped liquid metal NaK flow circuit.

  4. SEMICONDUCTOR INTEGRATED CIRCUITS: A high precision high PSRR bandgap reference with thermal hysteresis protection

    Science.gov (United States)

    Yintang, Yang; Yani, Li; Zhangming, Zhu

    2010-09-01

    To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits, a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature variations. In addition, an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is proposed. Based on the CSMC 0.5 μm 20 V BCD process, the designed circuit is implemented; the active die area is 0.17 × 0.20 mm2. Simulation and testing results show that the temperature coefficient is 13.7ppm/K with temperature ranging from -40 to 150 °C, the power supply rejection ratio is -98.2 dB, the line regulation is 0.3 mV/V, and the power consumption is only 0.38 mW. The proposed bandgap voltage reference has good characteristics such as small area, low power consumption, good temperature stability, high power supply rejection ratio, as well as low line regulation. This circuit can effectively prevent thermal oscillation and is suitable for on-chip voltage reference in high precision analog, digital and mixed systems.

  5. Cooley building opens in Houston. Demonstrates value of fully integrated marketing communications.

    Science.gov (United States)

    Rees, Tom

    2002-01-01

    The Texas Heart Institute at St. Luke's Episcopal HospiTal in Houston dedicated its new 10-story Denton A. Cooley Building in January. The structure opened with a fanfare, thanks to a well-integrated marketing communications program.

  6. Fully Automated Non-Native Speech Recognition Using Confusion-Based Acoustic Model Integration

    OpenAIRE

    Bouselmi, Ghazi; Fohr, Dominique; Illina, Irina; Haton, Jean-Paul

    2005-01-01

    This paper presents a fully automated approach for the recognition of non-native speech based on acoustic model modification. For a native language (L1) and a spoken language (L2), pronunciation variants of the phones of L2 are automatically extracted from an existing non-native database as a confusion matrix with sequences of phones of L1. This is done using L1's and L2's ASR systems. This confusion concept deals with the problem of non existence of match between some L2 and L1 phones. The c...

  7. Deterministic separation of arbitrary photon pair states in integrated quantum circuits

    CERN Document Server

    Marchildon, Ryan P

    2015-01-01

    Entangled photon pairs generated within integrated devices must often be spatially separated for their subsequent manipulation in quantum circuits. Separation that is both deterministic and universal can in principle be achieved through anti-coalescent two-photon quantum interference. However, such interference-facilitated pair separation (IFPS) has not been extensively studied in the integrated setting, where the strong polarization and wavelength dependencies of integrated couplers -- as opposed to bulk-optics beamsplitters -- can have important implications for performance beyond the identical-photon regime. This paper provides a detailed review of IFPS and examines how these dependencies impact separation fidelity and interference visibility. Focus is given to IFPS mediated by an integrated directional coupler. The analysis applies equally to both on-chip and in-fiber implementations, and can be expanded to other coupler architectures such as multimode interferometers. When coupler dispersion is present, ...

  8. 6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

    Science.gov (United States)

    Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith, Roger; Ferrier, Terry; Krasowski, Michael J.; Prokop, Norman F.

    2008-01-01

    The NASA Glenn Research Center is developing very high temperature semiconductor integrated circuits (ICs) for use in the hot sections of aircraft engines and for Venus exploration where ambient temperatures are well above the approximately 300 degrees Centigrade effective limit of silicon-on-insulator IC technology. In order for beneficial technology insertion to occur, such transistor ICs must be capable of prolonged operation in such harsh environments. This paper reports on the fabrication and long-term 500 degrees Centigrade operation of 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs have now demonstrated thousands of hours of continuous 500 degrees Centigrade operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Electrical characterization and modeling of transistors and circuits at temperatures from 24 degrees Centigrade to 500 degrees Centigrade is also described. Desired analog and digital IC functionality spanning this temperature range was demonstrated without changing the input signals or power supply voltages.

  9. A combined noise analysis and power supply current based testing of CMOS analog integrated circuits

    Science.gov (United States)

    Srivastava, Ashok; Pulendra, Vani K.; Yellampalli, Siva

    2005-05-01

    A technique integrating the noise analysis based testing and the conventional power supply current testing of CMOS analog integrated circuits is presented for bridging type faults due to manufacturing defects. The circuit under test (CUT) is a CMOS amplifier designed for operation at +/- 2.5 V and implemented in 1.5 μm CMOS process. The faults simulating possible manufacturing defects have been introduced using the fault injection transistors. The amplifier circuit is analyzed and simulated in SPICE for its performance with and without fault injections. The faults in the CUT are identified by observing the variation in the equivalent noise voltage at the output of CUT. In power supply current testing, the current (IPS) through the power supply voltage, VDD is measured under the application of an AC input stimulus. The effect of parametric variation is taken into consideration by determining the tolerance limit using the Monte-Carlo analysis. The fault is identified if the power supply current, IPS lies outside the deviation given by Monte-Carlo analysis. Simulation results are in close agreement with the corresponding experimental values.

  10. Development of a universal serial bus interface circuit for ion beam current integrators.

    Science.gov (United States)

    Suresh, K; Panigrahi, B K; Nair, K G M

    2007-08-01

    A universal serial bus (USB) interface circuit has been developed to enable easy interfacing of commercial as well as custom-built ion beam current integrators to personal computer (PC) based automated experimental setups. Built using the popular PIC16F877A reduced instruction set computer and a USB-universal asynchronous receiver-transmitter/first in, first out controller, DLP2232, this USB interface circuit virtually emulates the ion beam current integrators on a host PC and uses USB 2.0 protocol to implement high speed bidirectional data transfer. Using this interface, many tedious and labor intensive ion beam irradiation and characterization experiments can be redesigned into PC based automated ones with advantages of improved accuracy, rapidity, and ease of use and control. This interface circuit was successfully used in carrying out online in situ resistivity measurement of 70 keV O(+) ion irradiated tin thin films using four probe method. In situ electrical resistance measurement showed the formation of SnO(2) phase during ion implantation.

  11. Fully integrated planar magnetics for primary-parallel isolated boost converter

    DEFF Research Database (Denmark)

    Ouyang, Ziwei; Sen, Gökhan; Thomsen, Ole Cornelius;

    2011-01-01

    by interleaving the primary and secondary turns of the transformers. To verify the validity of the design approach, a 1-kW prototype converter with two primary power stages is implemented for a fuel cell fed battery charger application with 20–40 V input and 170–230 V output. An efficiency of 96% can be achieved......A high efficient planar integrated magnetics (PIM) design approach for primary parallel isolated boost converters is presented. All magnetic components in the converter including two input inductors and two transformers with primary-parallel and secondary-series windings are integrated into an E......-I-E core geometry. Due to a low reluctance path provided by the shared I-core, the two transformers as well as the two input inductors can be integrated independently, reducing the total ferrite volume and core loss. AC losses in the windings and the leakage inductance of the transformer are kept low...

  12. Silicon CMOS optical receiver circuits with integrated thin-film compound semiconductor detectors

    Science.gov (United States)

    Brooke, Martin A.; Lee, Myunghee; Jokerst, Nan Marie; Camperi-Ginestet, C.

    1995-04-01

    While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors

  13. Integration of Morphology and Graph-based Techniques for Fully Automatic Liver Segmentation

    Directory of Open Access Journals (Sweden)

    Hans Burkhardt

    2010-09-01

    Full Text Available Here a fully 3D algorithm for automatic liver segmentation from CT volumetric datasets is presented. The algorithm starts by smoothing the original volume using anisotropic diffusion. The coarse liver region is obtained from the threshold process that is based on a priori knowledge. Then, several morphological operations is performed such as operating the liver to detach the unwanted region connected to the liver and finding the largest component using the connected component labeling (CCL algorithm. At this stage, both 3D and 2D CCL is done subsequently. However, in 2D CCL, the adjacent slices are also affected from current slice changes. Finally, the boundary of the liver is refined using graph-cuts solver. Our algorithm does not require any user interaction or training datasets to be used. The algorithm has been evaluated on 10 CT scans of the liver and the results are encouraging to poor quality of images.

  14. DrugOn: a fully integrated pharmacophore modeling and structure optimization toolkit

    Directory of Open Access Journals (Sweden)

    Dimitrios Vlachakis

    2015-01-01

    Full Text Available During the past few years, pharmacophore modeling has become one of the key components in computer-aided drug design and in modern drug discovery. DrugOn is a fully interactive pipeline designed to exploit the advantages of modern programming and overcome the command line barrier with two friendly environments for the user (either novice or experienced in the field of Computer Aided Drug Design to perform pharmacophore modeling through an efficient combination of the PharmACOphore, Gromacs, Ligbuilder and PDB2PQR suites. Our platform features a novel workflow that guides the user through each logical step of the iterative 3D structural optimization setup and drug design process. For the pharmacophore modeling we are focusing on either the characteristics of the receptor or the full molecular system, including a set of selected ligands. DrugOn can be freely downloaded from our dedicated server system at www.bioacademy.gr/bioinformatics/drugon/.

  15. A fully coupled depth-integrated model for surface water and groundwater flows

    Science.gov (United States)

    Li, Yuanyi; Yuan, Dekui; Lin, Binliang; Teo, Fang-Yenn

    2016-11-01

    This paper presents the development of a fully coupled surface water and groundwater flow model. The governing equations of the model are derived based on a control volume approach, with the velocity profiles of the two types of flows being both taken into consideration. The surface water and groundwater flows are both modelled based on the unified equations and the water exchange and interaction between the two types of flows can be taken into account. The model can be used to simulate the surface water and groundwater flows simultaneously with the same numerical scheme without other effort being needed to link them. The model is not only suitable for the porous medium consisting of fine sediments, but also for coarse sediments and crushed rocks by adding a quadratic friction term. Benchmark tests are conducted to validate the model. The model predictions agree well with the data.

  16. Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits

    Science.gov (United States)

    Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-01

    Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

  17. Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits.

    Science.gov (United States)

    Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-27

    Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

  18. 60-GHz integrated-circuit high data rate quadriphase shift keying exciter and modulator

    Science.gov (United States)

    Grote, A.; Chang, K.

    1984-01-01

    An integrated-circuit quadriphase shift keying (QPSK) exciter and modulator have demonstrated excellent performance directly modulating a carrier frequency of 60 GHz with an output phase error of less than 3 degrees and maximum amplitude error of 0.5 dB. The circuit consists of a 60-GHz Gunn VCO phase-locked to a low-frequency reference source, a 4th subharmonic mixer, and a QPSK modlator packaged into a small volume of 1.8 x 2.5 x 0.35 in. The use of microstrip has the advantages of small size, light-weight, and low-cost fabrication. The unit has the potential for multigigabit data rate applications.

  19. A SQUID gradiometer module with wire-wound pickup antenna and integrated voltage feedback circuit

    Energy Technology Data Exchange (ETDEWEB)

    Zhang Guofeng [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology (SIMIT), Chinese Academy of Sciences (CAS), Shanghai 200050 (China); Peter Gruenberg Institute (PGI-8), Forschungszentrum Juelich (FZJ), D-52425 Juelich (Germany); Joint Research Laboratory on Superconductivity and Bioelectronics, Collaboration between CAS-Shanghai and FZJ, Shanghai 200050 (China); Graduate University of the Chinese Academy of Sciences, Beijing 100049 (China); Zhang, Yi, E-mail: y.zhang@fz-juelich.de [Peter Gruenberg Institute (PGI-8), Forschungszentrum Juelich (FZJ), D-52425 Juelich (Germany); Joint Research Laboratory on Superconductivity and Bioelectronics, Collaboration between CAS-Shanghai and FZJ, Shanghai 200050 (China); Zhang Shulin [State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology (SIMIT), Chinese Academy of Sciences (CAS), Shanghai 200050 (China); Joint Research Laboratory on Superconductivity and Bioelectronics, Collaboration between CAS-Shanghai and FZJ, Shanghai 200050 (China); Krause, Hans-Joachim [Peter Gruenberg Institute (PGI-8), Forschungszentrum Juelich (FZJ), D-52425 Juelich (Germany); Joint Research Laboratory on Superconductivity and Bioelectronics, Collaboration between CAS-Shanghai and FZJ, Shanghai 200050 (China); and others

    2012-10-15

    The performance of the direct readout schemes for dc SQUID, Additional Positive Feedback (APF), noise cancellation (NC) and SQUID bootstrap circuit (SBC), have been studied in conjunction with planar SQUID magnetometers. In this paper, we examine the NC technique applied to a niobium SQUID gradiometer module with an Nb wire-wound antenna connecting to a dual-loop SQUID chip with an integrated voltage feedback circuit for suppression of the preamplifier noise contribution. The sensitivity of the SQUID gradiometer module is measured to be about 1 fT/(cm {radical}Hz) in the white noise range in a magnetically shielded room. Using such gradiometer, both MCG and MEG signals are recorded.

  20. Neural CMOS-integrated circuit and its application to data classification.

    Science.gov (United States)

    Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

    2012-05-01

    Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

  1. A Zinc Oxide Nanorod Ammonia Microsensor Integrated with a Readout Circuit on-a-Chip

    Directory of Open Access Journals (Sweden)

    Chyan-Chyi Wu

    2011-11-01

    Full Text Available A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 mm complementary metal oxide semiconductor (CMOS process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature.

  2. A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip.

    Science.gov (United States)

    Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

    2011-01-01

    A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature.

  3. A flexible and robust soft-error testing system for microelectronic devices and integrated circuits

    Institute of Scientific and Technical Information of China (English)

    王晓辉; 杨振雷; 童腾; 苏弘; 刘杰; 张战刚; 古松; 刘天奇; 孔洁; 赵兴文

    2015-01-01

    Single event effects (SEEs) induced by radiations become a significant reliability challenge for modern elec-tronic systems. To evaluate SEEs susceptibility for microelectronic devices and integrated circuits (ICs), an SEE testing system with flexibility and robustness was developed at Heavy Ion Research Facility in Lanzhou (HIRFL). The system is compatible with various types of microelectronic devices and ICs, and supports plenty of complex and high-speed test schemes and plans for the irradiated devices under test (DUTs). Thanks to the combination of meticulous circuit design and the hardened logic design, the system has additional performances to avoid an overheated situation and irradiations by stray radiations. The system has been tested and verified by experiments for irradiating devices at HIRFL.

  4. Monolithically mode division multiplexing photonic integrated circuit for large-capacity optical interconnection.

    Science.gov (United States)

    Chen, Guanyu; Yu, Yu; Zhang, Xinliang

    2016-08-01

    We propose and fabricate an on-chip mode division multiplexed (MDM) photonic interconnection system. Such a monolithically photonic integrated circuit (PIC) is composed of a grating coupler, two micro-ring modulators, mode multiplexer/demultiplexer, and two germanium photodetectors. The signals' generation, multiplexing, transmission, demultiplexing, and detection are successfully demonstrated on the same chip. Twenty Gb/s MDM signals are successfully processed with clear and open eye diagrams, validating the feasibility of the proposed circuit. The measured power penalties show a good performance of the MDM link. The proposed on-chip MDM system can be potentially used for large-capacity optical interconnection in future high-performance computers and big data centers.

  5. A Zinc Oxide Nanorod Ammonia Microsensor Integrated with a Readout Circuit on-a-Chip

    Science.gov (United States)

    Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

    2011-01-01

    A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature. PMID:22247656

  6. Charge Yield at Low Electric Fields: Considerations for Bipolar Integrated Circuits

    Science.gov (United States)

    Johnston, A. H.; Swimm, R. T.; Thorbourn, D. O.

    2013-01-01

    A significant reduction in total dose damage is observed when bipolar integrated circuits are irradiated at low temperature. This can be partially explained by the Onsager theory of recombination, which predicts a strong temperature dependence for charge yield under low-field conditions. Reduced damage occurs for biased as well as unbiased devices because the weak fringing field in thick bipolar oxides only affects charge yield near the Si/SiO2 interface, a relatively small fraction of the total oxide thickness. Lowering the temperature of bipolar ICs - either continuously, or for time periods when they are exposed to high radiation levels - provides an additional degree of freedom to improve total dose performance of bipolar circuits, particularly in space applications.

  7. Segregated cholinergic transmission modulates dopamine neurons integrated in distinct functional circuits.

    Science.gov (United States)

    Dautan, Daniel; Souza, Albert S; Huerta-Ocampo, Icnelia; Valencia, Miguel; Assous, Maxime; Witten, Ilana B; Deisseroth, Karl; Tepper, James M; Bolam, J Paul; Gerdjikov, Todor V; Mena-Segovia, Juan

    2016-08-01

    Dopamine neurons in the ventral tegmental area (VTA) receive cholinergic innervation from brainstem structures that are associated with either movement or reward. Whereas cholinergic neurons of the pedunculopontine nucleus (PPN) carry an associative/motor signal, those of the laterodorsal tegmental nucleus (LDT) convey limbic information. We used optogenetics and in vivo juxtacellular recording and labeling to examine the influence of brainstem cholinergic innervation of distinct neuronal subpopulations in the VTA. We found that LDT cholinergic axons selectively enhanced the bursting activity of mesolimbic dopamine neurons that were excited by aversive stimulation. In contrast, PPN cholinergic axons activated and changed the discharge properties of VTA neurons that were integrated in distinct functional circuits and were inhibited by aversive stimulation. Although both structures conveyed a reinforcing signal, they had opposite roles in locomotion. Our results demonstrate that two modes of cholinergic transmission operate in the VTA and segregate the neurons involved in different reward circuits.

  8. Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

    Science.gov (United States)

    Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith Roger D.; Ferrier, Terry L.; Krasowski, Michael J.; Prokop, Norman F.

    2008-01-01

    NASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

  9. Ultrasensitive mass sensor fully integrated with complementary metal-oxide-semiconductor circuitry

    DEFF Research Database (Denmark)

    Forsén, Esko Sebastian; Abadal, G.; Ghatnekar-Nilsson, S.;

    2005-01-01

    and display ultrasensitive mass detection in air. A mass sensitivity of 4 ag/Hz has been determined in air by placing a single glycerine drop, having a measured weight of 57 fg, at the apex of a cantilever and subsequently measuring a frequency shift of 14.8 kHz. CMOS integration enables electrostatic...

  10. Fully Integrated Micro Coriolis Mass Flow Sensor Operating at Atmospheric Pressure

    NARCIS (Netherlands)

    Wiegerink, R.J.; Lammerink, T.S.J.; Haneveld, J.; Hageman, T.A.G.; Lötters, J.C.

    2011-01-01

    This paper discusses the design and realization of a micromachined micro Coriolis flow sensor with integrated electrodes for both electrostatic actuation and capacitive readout. The sensor was realized using semicircular channels just beneath the surface of the silicon wafer. The channels have thin

  11. Fully integrated micro coriolis mass flow sensor operating at atmospheric pressure

    NARCIS (Netherlands)

    Lötters, Joost C.; Lammerink, Theo S.; Haneveld, Jeroen; Hageman, Tijmen A.G.; Wiegerink, Remco J.

    2012-01-01

    This paper discusses the design and realization of a micromachined micro Coriolis flow sensor with integrated electrodes for both electrostatic actuation and capacitive readout. The sensor was realized using semicircular channels just beneath the surface of the silicon wafer. The channels have thin

  12. Toward a fully integrated wireless wearable EEG-NIRS bimodal acquisition system

    Science.gov (United States)

    Safaie, J.; Grebe, R.; Abrishami Moghaddam, H.; Wallois, F.

    2013-10-01

    Objective. Interactions between neuronal electrical activity and regional changes in microcirculation are assumed to play a major role in physiological brain activity and the development of pathological disorders, but have been poorly elucidated to date. There is a need for advanced diagnostic tools to investigate the relationships between these two physiological processes.Approach. To meet these needs, a wireless wearable system has been developed, which combines a near infrared spectroscopy (NIRS) system using light emitting diodes (LEDs) as a light source and silicon photodiodes as a detector with an integrated electroencephalography (EEG) system. Main results. The main advantages over currently available devices are miniaturization and integration of a real-time electrical and hemodynamic activity monitor into one wearable device. For patient distributed monitoring and creating a body-area network, up to seven same devices can be connected to a single base station (PC) synchronously. Each node presents enhanced portability due to the wireless communication and highly integrated components resulting in a small, lightweight signal acquisition device. Further progress includes the individual control of LEDs output to automatically or interactively adjust emitted light to the actual local situation online, the use of silicon photodiodes with a safe low-voltage power supply, and an integrated three dimensional accelerometer for movement detection for the identification of motion artifacts. Significance. The device was tested and validated using our enhanced EEG-NIRS tissue mimicking fluid phantom for sensitivity mapping. Typical somatotopic electrical evoked potential experiments were performed to verify clinical applicability.

  13. Cascade photonic integrated circuit architecture for electro-optic in-phase quadrature/single sideband modulation or frequency conversion.

    Science.gov (United States)

    Hasan, Mehedi; Hall, Trevor

    2015-11-01

    A photonic integrated circuit architecture for implementing frequency upconversion is proposed. The circuit consists of a 1×2 splitter and 2×1 combiner interconnected by two stages of differentially driven phase modulators having 2×2 multimode interference coupler between the stages. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. The intrinsic conversion efficiency of the proposed design is improved by 6 dB over the alternative functionally equivalent circuit based on dual parallel Mach-Zehnder modulators known in the prior art. A two-tone analysis is presented to study the linearity of the proposed circuit, and a comparison is provided over the alternative. The proposed circuit is suitable for integration in any platform that offers linear electro-optic phase modulation such as LiNbO(3), silicon, III-V, or hybrid technology.

  14. A 200 C Universal Gate Driver Integrated Circuit for Extreme Environment Applications

    Energy Technology Data Exchange (ETDEWEB)

    Tolbert, Leon M [ORNL; Huque, Mohammad A [ORNL; Islam, Syed K [ORNL; Blalock, Benjamin J [ORNL

    2012-01-01

    High-temperature power converters (dc-dc, dc-ac, etc.) have enormous potential in extreme environment applications, including automotive, aerospace, geothermal, nuclear, and well logging. For successful realization of such high-temperature power conversion modules, the associated control electronics also need to perform at high temperature. This paper presents a silicon-on-insulator (SOI) based high-temperature gate driver integrated circuit (IC) incorporating an on-chip low-power temperature sensor and demonstrating an improved peak output current drive over our previously reported work. This driver IC has been primarily designed for automotive applications, where the underhood temperature can reach 200 C. This new gate driver prototype has been designed and implemented in a 0.8 {micro}m, 2-poly, and 3-metal bipolar CMOS-DMOS (Double-Diffused Metal-Oxide Semiconductor) on SOI process and has been successfully tested for up to 200 C ambient temperature driving a SiC MOSFET and a SiC normally-ON JFET. The salient feature of the proposed universal gate driver is its ability to drive power switches over a wide range of gate turn-ON voltages such as MOSFET (0 to 20 V), normally-OFF JFET (-7 to 3 V), and normally-ON JFET (-20 to 0 V). The measured peak output current capability of the driver is around 5 A and is thus capable of driving several power switches connected in parallel. An ultralow-power on-chip temperature supervisory circuit has also been integrated into the die to safeguard the driver circuit against excessive die temperature ({ge}220 C). This approach utilizes increased diode leakage current at higher temperature to monitor the die temperature. The power consumption of the proposed temperature sensor circuit is below 10 {micro}W for operating temperature up to 200 C.

  15. Fully Integrated Applications of Thin Films on Low Temperature Cofired Ceramic (LTCC)

    Energy Technology Data Exchange (ETDEWEB)

    Ambrose Wolf; Ken Peterson; Matt O' Keefe; Wayne Huebner; Bill Kuhn

    2012-04-19

    Thin film multilayers have previously been introduced on multilayer low temperature cofired ceramic (LTCC), as well as initial thin film capacitors on LTCC. The ruggedness of a multipurpose Ti-Cu-Pt-Au stack for connectivity and RF conductivity has continued to benefit fabrication and reliability in state of-the-art modules, while the capacitors have followed the traditional Metal-Insulator-Metal (MIM) style. The full integration of thin film passives with thin film connectivity traces is presented. Certain passives, such as capacitors, require specifically tailored and separately patterned thin film (multi-)layers, including a dielectric. Different capacitance values are achieved by variation of both the insulator layer thickness and the active area of the capacitor. Other passives, such as filters, require only the conductor - a single thin film multilayer. This can be patterned from the same connectivity thin film material (Ti-Cu-Pt-Au), or a specially tailored thin film material (e.g. Ti-Cu-Au) can be deposited. Both versions are described, including process and integration details. Examples are discussed, ranging from patterning for maximum tolerances, to space and performance-optimized designs. Cross-sectional issues associated with integration are also highlighted in the discussion.

  16. Fully Integrated, Miniature, High-Frequency Flow Probe Utilizing MEMS Leadless SOI Technology

    Science.gov (United States)

    Ned, Alex; Kurtz, Anthony; Shang, Tonghuo; Goodman, Scott; Giemette. Gera (d)

    2013-01-01

    This work focused on developing, fabricating, and fully calibrating a flowangle probe for aeronautics research by utilizing the latest microelectromechanical systems (MEMS), leadless silicon on insulator (SOI) sensor technology. While the concept of angle probes is not new, traditional devices had been relatively large due to fabrication constraints; often too large to resolve flow structures necessary for modern aeropropulsion measurements such as inlet flow distortions and vortices, secondary flows, etc. Mea surements of this kind demanded a new approach to probe design to achieve sizes on the order of 0.1 in. (.3 mm) diameter or smaller, and capable of meeting demanding requirements for accuracy and ruggedness. This approach invoked the use of stateof- the-art processing techniques to install SOI sensor chips directly onto the probe body, thus eliminating redundancy in sensor packaging and probe installation that have historically forced larger probe size. This also facilitated a better thermal match between the chip and its mount, improving stability and accuracy. Further, the leadless sensor technology with which the SOI sensing element is fabricated allows direct mounting and electrical interconnecting of the sensor to the probe body. This leadless technology allowed a rugged wire-out approach that is performed at the sensor length scale, thus achieving substantial sensor size reductions. The technology is inherently capable of high-frequency and high-accuracy performance in high temperatures and harsh environments.

  17. Separate Brain Circuits Support Integrative and Semantic Priming in the Human Language System.

    Science.gov (United States)

    Feng, Gangyi; Chen, Qi; Zhu, Zude; Wang, Suiping

    2016-07-01

    Semantic priming is a crucial phenomenon to study the organization of semantic memory. A novel type of priming effect, integrative priming, has been identified behaviorally, whereby a prime word facilitates recognition of a target word when the 2 concepts can be combined to form a unitary representation. We used both functional and anatomical imaging approaches to investigate the neural substrates supporting such integrative priming, and compare them with those in semantic priming. Similar behavioral priming effects for both semantic (Bread-Cake) and integrative conditions (Cherry-Cake) were observed when compared with an unrelated condition. However, a clearly dissociated brain response was observed between these 2 types of priming. The semantic-priming effect was localized to the posterior superior temporal and middle temporal gyrus. In contrast, the integrative-priming effect localized to the left anterior inferior frontal gyrus and left anterior temporal cortices. Furthermore, fiber tractography showed that the integrative-priming regions were connected via uncinate fasciculus fiber bundle forming an integrative circuit, whereas the semantic-priming regions connected to the posterior frontal cortex via separated pathways. The results point to dissociable neural pathways underlying the 2 distinct types of priming, illuminating the neural circuitry organization of semantic representation and integration.

  18. Multi-channel integrated circuits for the detection and measurement of ionizing radiation

    Science.gov (United States)

    Engel, G. L.; Duggireddi, N.; Vangapally, V.; Elson, J. M.; Sobotka, L. G.; Charity, R. J.

    2011-10-01

    The Integrated Circuits (IC) Design Research Laboratory at Southern Illinois University Edwardsville (SIUE) has collaborated with the Nuclear Reactions Group at Washington University (WU) to develop a family of multi-channel integrated circuits. To date, the collaboration has successfully produced two micro-chips. The first was an analog shaped and peak sensing chip with on-board constant-fraction discriminators and sparsified readout. This chip is known as Heavy-Ion Nuclear Physics-16 Channel (HINP16C). The second chip, christened PSD8C, was designed to logically complement (in terms of detector types) the HINP16C chip. Pulse Shape Discrimination-8 Channel (PSD8C), featuring three settable charge integration windows per channel, performs pulse shape discrimination (PSD). This paper summarizes the design, capabilities, and features of the HINP16C and PSD8C ICs. It proceeds to discuss the modifications, made to the ICs and their associated systems, which have attempted to improve ease of use, increase performance, and extend capabilities. The paper concludes with a brief discussion of what may be the next chip (employing a multi-sampling scheme) to be added to our CMOS ASIC "tool box" for radiation detection instrumentation.

  19. Analog integrated circuit design automation placement, routing and parasitic extraction techniques

    CERN Document Server

    Martins, Ricardo; Horta, Nuno

    2017-01-01

    This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets. Introduces readers to hierarchical combination of Pareto fronts of placements; Presents electromigration-aware routing with multilayer multiport terminal structures...

  20. Low-Power Fully Integrated CMOS DTV Tuner Front-End for ATSC Terrestrial Broadcasting

    Directory of Open Access Journals (Sweden)

    Jianhong Xiao

    2007-01-01

    Full Text Available A low-cost low-power DTV tuner for current digital television application is described. In order to increase integration level and reduce power consumption for off-air DTV tuner application, an SAW-filterless tuner front-end architecture is adopted. As a part of the concept, key building blocks for this architecture are implemented on a main stream 0.35 μm CMOS technology. Experimental measurements for the prototype chip validate the system architecture; the prototype consumes 300 mw and achieves 45 dB of image rejection ratio within the entire 750 MHz frequency band.

  1. Fully integrated optical system for lab-on-a-chip applications

    DEFF Research Database (Denmark)

    Balslev, Søren; Olsen, Brian Bilenberg; Geschke, Oliver

    2004-01-01

    We present a lab-on-a-chip device featuring a microfluidic dye laser, wave-guides, microfluidic components and photo-detectors integrated on the chip. The microsystem is designed for wavelength selective absorption measurements in the visible range on a fluidic sample, which can be prepared....../mixed on-chip. The laser structures, wave-guides and micro-fluidic handling system are defined in a single UV-lithography step on a 10 μm thick SU-8 layer on top of the substrate. The SU-8 structures are sealed by a Borofloat glass lid, using polymethylmethacrylate (PMMA) adhesive bonding....

  2. Fully Integrated On-Chip Coil in 0.13 μm CMOS for Wireless Power Transfer Through Biological Media.

    Science.gov (United States)

    Zargham, Meysam; Gulak, P Glenn

    2015-04-01

    Delivering milliwatts of wireless power at centimeter distances is advantageous to many existing and emerging biomedical applications. It is highly desirable to fully integrate the receiver on a single chip in standard CMOS with no additional post-processing steps or external components. This paper presents a 2 × 2.18 mm(2) on-chip wireless power transfer (WPT) receiver (Rx) coil fabricated in 0.13 μm CMOS. The WPT system utilizes a 14.5 × 14.5 mm(2) transmitter (Tx) coil that is fabricated on a standard FR4 substrate. The on-chip power harvester demonstrates a peak WPT efficiency of -18.47 dB , -20.96 dB and -20.15 dB at 10 mm of separation through air, bovine muscle and 0.2 molar NaCl, respectively. The achieved efficiency enables the delivery of milliwatts of power to application circuits while staying below safe power density and electromagnetic (EM) exposure limits.

  3. SmartStep: A Fully Integrated, Low-Power Insole Monitor

    Directory of Open Access Journals (Sweden)

    Nagaraj Hegde

    2014-06-01

    Full Text Available Shoe-mounted wearable sensors can be used in applications, such as activity monitoring, gait analysis, post-stroke rehabilitation, body weight measurements and energy expenditure studies. Such wearable sensors typically require the modification or alteration of the shoe, which is not typically feasible for large populations without the direct involvement of shoe manufacturers. This article presents an insole-based wearable sensor (SmartStep that has its electronics fully embedded into a generic insole, which is usable with a large variety of shoes and, thus, resolves the need for shoe modification. The SmartStep is an always-on electronic device that comprises a 3D accelerometer, a 3D gyroscope and resistive pressure sensors implemented around a CC2540 system-on-chip with an 8051 processor core, Bluetooth low energy (BLE connectivity and flash memory buffer. The SmartStep is wirelessly interfaced to an Android smart phone application with data logging and visualization capabilities. This article focuses on low-power implementation methods and on the method developed for reliable data buffering, alleviating intermittent connectivity resulting from the user leaving the vicinity of the smart phone. The conducted tests illustrate the power consumption for several possible usage scenarios and the reliability of the data retention method. The trade-off between the power consumption and supported functionality is discussed, demonstrating that SmartStep can be worn for more than two days between battery recharges. The results of the mechanical reliability test on the SmartStep indicate that the pressure sensors in the SmartStep tolerated prolonged human wear. The SmartStep system collected more than 98.5% of the sensor data, in real usage scenarios, having intermittent connectivity with the smart phone.

  4. Photonic Quantum Noise Reduction with Low-Pump Parametric Amplifiers for Photonic Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Andre Vatarescu

    2016-11-01

    Full Text Available An approximation-free and fully quantum optic formalism for parametric processes is presented. Phase-dependent gain coefficients and related phase-pulling effects are identified for quantum Rayleigh emission and the electro-optic conversion of photons providing parametric amplification in small-scale integration of photonic devices. These mechanisms can be manipulated to deliver, simultaneously, sub-Poissonian distributions of photons as well as phase-dependent amplification in the same optical quadrature of a signal field.

  5. Applying the problem-based learning approach in teaching digital integrated circuit design

    OpenAIRE

    Lei, CU

    2010-01-01

    The problem-based learning (PBL) method has been applied to curriculum development in some areas of electrical engineering. The overall result has been a positive learning experience for students. However, PBL has not, as yet, been used in the area of digital integrated circuit (IC) design. IC design is in a revolutionary phase at present. It could even be said that IC design is at the beginning of a new epoch. Design is moving toward nano-size. Thus, design techniques are advancing so rap...

  6. Organic–Inorganic Eu3+/Tb3+ codoped hybrid films for temperature mapping in integrated circuits

    Science.gov (United States)

    Brites, Carlos D. S.; Lima, Patrícia P.; Silva, Nuno J. O.; Millán, Angel; Amaral, Vitor S.; Palacio, Fernando; Carlos, Luís D.

    2013-01-01

    The continuous decrease on the geometric size of electronic devices and integrated circuits generates higher local power densities and localized heating problems that cannot be characterized by conventional thermographic techniques. Here, a self-referencing intensity-based molecular thermometer involving a di-ureasil organic-inorganic hybrid thin film co-doped with Eu3+ and Tb3+ tris (β-diketonate) chelates is used to obtain the temperature map of a FR4 printed wiring board with spatio-temporal resolutions of 0.42 μm/4.8 ms. PMID:24790938

  7. All-fiber hybrid photon-plasmon circuits: integrating nanowire plasmonics with fiber optics.

    Science.gov (United States)

    Li, Xiyuan; Li, Wei; Guo, Xin; Lou, Jingyi; Tong, Limin

    2013-07-01

    We demonstrate all-fiber hybrid photon-plasmon circuits by integrating Ag nanowires with optical fibers. Relying on near-field coupling, we realize a photon-to-plasmon conversion efficiency up to 92% in a fiber-based nanowire plasmonic probe. Around optical communication band, we assemble an all-fiber resonator and a Mach-Zehnder interferometer (MZI) with Q-factor of 6 × 10(6) and extinction ratio up to 30 dB, respectively. Using the MZI, we demonstrate fiber-compatible plasmonic sensing with high sensitivity and low optical power.

  8. Performance evaluation of a burst-mode EDFA in an optical packet and circuit integrated network.

    Science.gov (United States)

    Shiraiwa, Masaki; Awaji, Yoshinari; Furukawa, Hideaki; Shinada, Satoshi; Puttnam, Benjamin J; Wada, Naoya

    2013-12-30

    We experimentally investigate the performance of burst-mode EDFA in an optical packet and circuit integrated system. In such networks, packets and light paths can be dynamically assigned to the same fibers, resulting in gain transients in EDFAs throughout the network that can limit network performance. Here, we compare the performance of a 'burst-mode' EDFA (BM-EDFA), employing transient suppression techniques and optical feedback, with conventional EDFAs, and those using automatic gain control and previous BM-EDFA implementations. We first measure gain transients and other impairments in a simplified set-up before making frame error-rate measurements in a network demonstration.

  9. Rolled-up inductor structure for a radiofrequency integrated circuit (RFIC)

    Energy Technology Data Exchange (ETDEWEB)

    Li, Xiuling; Huang, Wen; Ferreira, Placid M.; Yu, Xin

    2015-12-29

    A rolled-up inductor structure for a radiofrequency integrated circuit (RFIC) comprises a multilayer sheet in a rolled configuration comprising multiple turns about a longitudinal axis. The multilayer sheet comprises a conductive pattern layer on a strain-relieved layer, and the conductive pattern layer comprises at least one conductive strip having a length extending in a rolling direction. The at least one conductive strip thereby wraps around the longitudinal axis in the rolled configuration. The conductive pattern layer may also comprise two conductive feed lines connected to the conductive strip for passage of electrical current therethrough. The conductive strip serves as an inductor cell of the rolled-up inductor structure.

  10. SEM analysis of ionizing radiation effects in linear integrated circuits. [Scanning Electron Microscope

    Science.gov (United States)

    Stanley, A. G.; Gauthier, M. K.

    1977-01-01

    A successful diagnostic technique was developed using a scanning electron microscope (SEM) as a precision tool to determine ionization effects in integrated circuits. Previous SEM methods radiated the entire semiconductor chip or major areas. The large area exposure methods do not reveal the exact components which are sensitive to radiation. To locate these sensitive components a new method was developed, which consisted in successively irradiating selected components on the device chip with equal doses of electrons /10 to the 6th rad (Si)/, while the whole device was subjected to representative bias conditions. A suitable device parameter was measured in situ after each successive irradiation with the beam off.

  11. Wideband Monolithic Microwave Integrated Circuit Frequency Converters with GaAs mHEMT Technology

    DEFF Research Database (Denmark)

    Krozer, Viktor; Johansen, Tom Keinicke; Djurhuus, Torsten;

    2005-01-01

    , baluns and combiners. Single ended and balanced configurations DC and AC coupled have been investigated. The instantaneous 3 dB bandwidth at both the RF and the IF port of the frequency converters is ∼ 20 GHz with excellent amplitude and phase linearity. The predicted conversion gain is around 10 d......We present monolithic microwave integrated circuit (MMIC) frequency converter, which can be used for up and down conversion, due to the large RF and IF port bandwidth. The MMIC converters are based on commercially available GaAs mHEMT technology and are comprised of a Gilbert mixer cell core...

  12. A design concept for an MMIC (Monolithic Microwave Integrated Circuit) microstrip phased array

    Science.gov (United States)

    Lee, Richard Q.; Smetana, Jerry; Acosta, Roberto

    1987-01-01

    A conceptual design for a microstrip phased array with monolithic microwave integrated circuit (MMIC) amplitude and phase controls is described. The MMIC devices used are 20 GHz variable power amplifiers and variable phase shifters recently developed by NASA contractors for applications in future Ka proposed design, which concept is for a general NxN element array of rectangular lattice geometry. Subarray excitation is incorporated in the MMIC phased array design to reduce the complexity of the beam forming network and the number of MMIC components required.

  13. Detection of alpha particle contamination on ultra low activity-grade integrated circuits

    Directory of Open Access Journals (Sweden)

    Fernandes Ana C.

    2016-01-01

    Full Text Available We propose to apply the superheated droplet detector (SDD technology to the measurement of alpha-particle emissivity on integrated circuits of ultra-low activity grade (< 1α/khcm2 for high reliability applications. This work is based on the SDDs employed within our team to the direct search for dark matter. We describe the modifications in the dark matter SDDs with respect to fabrication, signal analysis and characterization, in order to obtain a device with the adequate detection sensitivity and background noise.

  14. Nonlinearity characterization of temperature sensing systems for integrated circuit testing by intermodulation products monitoring.

    Science.gov (United States)

    Altet, J; Mateo, D; Perpiñà, X; Grauby, S; Dilhaire, S; Jordà, X

    2011-09-01

    This work presents an alternative characterization strategy to quantify the nonlinear behavior of temperature sensing systems. The proposed approach relies on measuring the temperature under thermal sinusoidal steady state and observing the intermodulation products that are generated within the sensing system itself due to its nonlinear temperature-output voltage characteristics. From such intermodulation products, second-order interception points can be calculated as a figure of merit of the measuring system nonlinear behavior. In this scenario, the present work first shows a theoretical analysis. Second, it reports the experimental results obtained with three thermal sensing techniques used in integrated circuits.

  15. Proposed design for high precision refractive index sensor using integrated planar lightwave circuit

    Science.gov (United States)

    Maru, Koichi; Fujii, Yusaku; Zhang, Shulian; Hou, Wenmei

    2009-07-01

    A high precision and compact refractive index sensor is proposed. The combination of coarse measurement utilizing the change of the angle of refraction and fine measurement utilizing the phase change is newly proposed to measure absolute refractive index precisely. The proposed method does not need expensive optical measurement equipment such as an optical spectrum analyzer. The integrated planar lightwave circuit (PLC) technology enables us to obtain a compact sensor that is preferable for the practical use. The principle, design, and some configurations for precise refractive index measurement are described.

  16. Fully integrated ready-to-use paper-based electrochemical biosensor to detect nerve agents.

    Science.gov (United States)

    Cinti, Stefano; Minotti, Clarissa; Moscone, Danila; Palleschi, Giuseppe; Arduini, Fabiana

    2017-07-15

    Paper-based microfluidic devices are gaining large popularity because of their uncontested advantages of simplicity, cost-effectiveness, limited necessity of laboratory infrastructure and skilled personnel. Moreover, these devices require only small volumes of reagents and samples, provide rapid analysis, and are portable and disposable. Their combination with electrochemical detection offers additional benefits of high sensitivity, selectivity, simplicity of instrumentation, portability, and low cost of the total system. Herein, we present the first example of an integrated paper-based screen-printed electrochemical biosensor device able to quantify nerve agents. The principle of this approach is based on dual electrochemical measurements, in parallel, of butyrylcholinesterase (BChE) enzyme activity towards butyrylthiocholine with and without exposure to contaminated samples. The sensitivity of this device is largely improved using a carbon black/Prussian Blue nanocomposite as a working electrode modifier. The proposed device allows an entirely reagent-free analysis. A strip of a nitrocellulose membrane, that contains the substrate, is integrated with a paper-based test area that holds a screen-printed electrode and BChE. Paraoxon, chosen as nerve agent simulant, is linearly detected down to 3µg/L. The use of extremely affordable manufacturing techniques provides a rapid, sensitive, reproducible, and inexpensive tool for in situ assessment of nerve agent contamination. This represents a powerful approach for use by non-specialists, that can be easily broadened to other (bio)systems.

  17. Hydrogenated Amorphous Silicon Sensor Deposited on Integrated Circuit for Radiation Detection

    CERN Document Server

    Despeisse, M; Jarron, P; Kaplon, J; Moraes, D; Nardulli, A; Powolny, F; Wyrsch, N

    2008-01-01

    Radiation detectors based on the deposition of a 10 to 30 mum thick hydrogenated amorphous silicon (a-Si:H) sensor directly on top of integrated circuits have been developed. The performance of this detector technology has been assessed for the first time in the context of particle detectors. Three different circuits were designed in a quarter micron CMOS technology for these studies. The so-called TFA (Thin-Film on ASIC) detectors obtained after deposition of a-Si:H sensors on the developed circuits are presented. High internal electric fields (104 to 105 V/cm) can be built in the a-Si:H sensor and overcome the low mobility of electrons and holes in this amorphous material. However, the deposited sensor's leakage current at such fields turns out to be an important parameter which limits the performance of a TFA detector. Its detailed study is presented as well as the detector's pixel segmentation. Signal induction by generated free carrier motion in the a-Si:H sensor has been characterized using a 660 nm pul...

  18. Integrated plasticity at inhibitory and excitatory synapses in the cerebellar circuit

    Directory of Open Access Journals (Sweden)

    Lisa eMapelli

    2015-05-01

    Full Text Available The way long-term potentiation (LTP and depression (LTD are integrated within the different synapses of brain neuronal circuits is poorly understood. In order to progress beyond the identification of specific molecular mechanisms, a system in which multiple forms of plasticity can be correlated with large-scale neural processing is required. In this paper we take as an example the cerebellar network , in which extensive investigations have revealed LTP and LTD at several excitatory and inhibitory synapses. Cerebellar LTP and LTD occur in all three main cerebellar subcircuits (granular layer, molecular layer, deep cerebellar nuclei and correspondingly regulate the function of their three main neurons: granule cells (GrCs, Purkinje cells (PCs and deep cerebellar nuclear (DCN cells. All these neurons, in addition to be excited, are reached by feed-forward and feed-back inhibitory connections, in which LTP and LTD may either operate synergistically or homeostatically in order to control information flow through the circuit. Although the investigation of individual synaptic plasticities in vitro is essential to prove their existence and mechanisms, it is insufficient to generate a coherent view of their impact on network functioning in vivo. Recent computational models and cell-specific genetic mutations in mice are shedding light on how plasticity at multiple excitatory and inhibitory synapses might regulate neuronal activities in the cerebellar circuit and contribute to learning and memory and behavioral control.

  19. Integrated plasticity at inhibitory and excitatory synapses in the cerebellar circuit.

    Science.gov (United States)

    Mapelli, Lisa; Pagani, Martina; Garrido, Jesus A; D'Angelo, Egidio

    2015-01-01

    The way long-term potentiation (LTP) and depression (LTD) are integrated within the different synapses of brain neuronal circuits is poorly understood. In order to progress beyond the identification of specific molecular mechanisms, a system in which multiple forms of plasticity can be correlated with large-scale neural processing is required. In this paper we take as an example the cerebellar network, in which extensive investigations have revealed LTP and LTD at several excitatory and inhibitory synapses. Cerebellar LTP and LTD occur in all three main cerebellar subcircuits (granular layer, molecular layer, deep cerebellar nuclei) and correspondingly regulate the function of their three main neurons: granule cells (GrCs), Purkinje cells (PCs) and deep cerebellar nuclear (DCN) cells. All these neurons, in addition to be excited, are reached by feed-forward and feed-back inhibitory connections, in which LTP and LTD may either operate synergistically or homeostatically in order to control information flow through the circuit. Although the investigation of individual synaptic plasticities in vitro is essential to prove their existence and mechanisms, it is insufficient to generate a coherent view of their impact on network functioning in vivo. Recent computational models and cell-specific genetic mutations in mice are shedding light on how plasticity at multiple excitatory and inhibitory synapses might regulate neuronal activities in the cerebellar circuit and contribute to learning and memory and behavioral control.

  20. Microfluidic pneumatic logic circuits and digital pneumatic microprocessors for integrated microfluidic systems.

    Science.gov (United States)

    Rhee, Minsoung; Burns, Mark A

    2009-11-07

    We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprocessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner.

  1. Modeling for infrared readout integrated circuit based on Verilog-A

    Science.gov (United States)

    Wang, Xiao; Shi, Zelin

    2015-04-01

    Infrared detectors are the core of infrared imaging systems, while readout integrated circuits are the key components of detectors. In order to grasp the performance of circuits quickly and accurately, a method of circuit modeling using Verilog-A language is proposed, which present a behavioral simulation model for the ROIC. At first, a typical capacitor trans-impedance amplifier(CTIA) ROIC unit is showed, then the two essential parts of it,operational amplifier and switch are modeled on behavioral level. The op amp model concludes these non-ideal factors, such as finite gain-bandwidth product, input and output offset, output resistance and so on. Non-deal factors that affect switches are considered in the switch behavioral model, such as rise and fall time, on-resistance and so on. At last time-domain modeling method for noise is presented, which is compared with the classical frequency domain method for difference. The analysis results shows that in the situation that noise interested bandwidth(NIBW) is more than 5MHz, the difference between the two methods leads to less than 1% if the sample rate of noise is larger 4 times of the NIBW

  2. A Framework for Robust Multivariable Optimization of Integrated Circuits in Space Applications

    Science.gov (United States)

    DuMonthier, Jeffrey; Suarez, George

    2013-01-01

    Application Specific Integrated Circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way which facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as framework of software modules, templates and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation. Templates provide a starting point for both while toolbox functions minimize the code required. Once a test bench has been coded to optimize a particular circuit, it is also used to verify the final design. The combination of test bench and cost function can then serve as a template for similar circuits or be re-used to migrate the design to different processes by re-running it with the

  3. Fully integrated monolithic opoelectronic transducer for real.time protein and DNA detection

    DEFF Research Database (Denmark)

    Misiakos, Konstatinos; S. Petrou, Panagiota; E. Kakabakos, Sotirios

    2010-01-01

    scheme through a board-to-board receptacle was developed and combined with a portable customized readout and control instrument. Real-time detection of deleterious mutations in BRCA1 gene related to predisposition to hereditary breast/ovarian cancer was performed with the instrument developed using PCR......The development and testing of a portable bioanalytical device which was capable for real-time monitoring of binding assays was demonstrated. The device was based on arrays of nine optoelectronic transducers monolithically integrated on silicon chips. The optocouplers consisted of nine silicon...... products. Detection was based on waveguided photons elimination through interaction with fluorescently labeled PCR products. Detection of single biomolecular binding events was also demonstrated using nanoparticles as labels. In addition, label-free monitoring of bioreactions in real time was achieved...

  4. Wide range fully integrated VCO with new cells-based varactor

    Science.gov (United States)

    Marrero-Martin, Margarita; Gonzalez, Benito; Garcia, Javier; Khemchandani, Sunil L.; Hernandez, Antonio; del Pino, Javier

    2012-08-01

    This article presents a wide range inductance-capacitance voltage controlled oscillator (VCO) with a unit cells-based varactor. The unit cell represents the minimum possible integrated varactor based on p-n junction diodes, where N+ diffusions are central rectangles, surrounded by doughnut shaped P+ diffusions, with their respective contacts. The varactors are designed using the AMS 0.35 µm BiCMOS process. A physical model has been derived from the measurement of a set of eight fabricated varactors. Measurements indicate that the VCO, which is intended to be used in DVB-H, oscillates from 1.087 to 2.032 GHz, with a 61% tuning range. The phase noises of -124 dBc/Hz at 1 MHz offset and -108 dBc/Hz at 100 kHz offset are obtained.

  5. Fully integrated reflection-mode photoacoustic/two-photon microscopy in vivo (Conference Presentation)

    Science.gov (United States)

    Song, Liang; Song, Wei; Zhang, Yang; Zheng, Wei

    2016-03-01

    Using a water-immersion optical objective in conjunction with a miniature 40-MHz ultrasonic transducer, we developed reflection-mode photoacoustic microscopy with a transverse resolution as high as 320 nm. Here, we further integrated two-photon microscopy capability into the system to enable multimodality in vivo biomedical imaging at submicron resolution. As a result, the system is capable of tri-modality label-free imaging of microvasculature, collagen, and cell morphology, based on the contrast of optical absorption, second-harmonic generation, and autofluorescence, respectively. In addition, we demonstrated simultaneous microscopic imaging of neuron and microvasculature in the brain cortex of a living mouse, which may offer new opportunities for studying the mechanisms of neurovascular coupling.

  6. Design, fabrication, and characterisation of fully etched TM grating coupler for photonic integrated system-in-package

    Science.gov (United States)

    Gili-de-Villasante, Oriol; Tcheg, Paul; Wang, Bei; Suna, Alpaslan; Giannoulis, Giannis; Lazarou, Ioannis; Apostolopoulos, Dimitrios; Avramopoulos, Hercules; Pleros, Nikos; Baus, Matthias; Karl, Matthias; Tekin, Tolga

    2012-06-01

    Grating couplers are the best solution for testing nano-photonic circuits. Their main benefit is that they allow access via an optical fiber from the top and therefore there is no need to dice the chip and prepare the facets crucially. In the PLATON project grating couplers were designed to couple TM mode into and out of the SOI waveguides. Simulations came up with a grating coupler layout capable of theoretical coupling losses lower than 3dB for 1550 nm in TM configuration. A fully etched grating structure was chosen for fabrication simplicity and the optimal filling factor was found. The structures were fabricated using proximity error correction (PEC) and show a uniform coupling efficiency for all couplers. Therefore they are well-suited for all applications which demand for stable fiber-to-chip coupling. The spectral response of the structures was measured from 1500 to 1580 nm with 2 nm step and measuring the fiber-tofiber losses of three straight waveguides equipped with three grating couplers with different gap widths. The optimal grating period exhibits adequate coupling losses of 3.23 dB per coupler at 1557 nm, being therefore the most promising design.

  7. Integrated hydrometeorological predictions with the fully-coupled WRF-Hydro modeling system in western North America

    Science.gov (United States)

    Gochis, D. J.; Yu, W.

    2013-12-01

    Prediction of heavy rainfall and associated streamflow responses remain as critical hydrometeorological challenges and require improved understanding of the linkages between atmospheric and land surface processes. Streamflow prediction skill is intrinsically liked to quantitative precipitation forecast skill, which emphasizes the need to produce mesoscale predictions of rainfall of high fidelity. However, in many cases land surface parameters can also exert significant control on the runoff response to heavy rainfall and on the formation or localization of heavy rainfall as well. A new generation of integrated atmospheric-hydrologic modeling systems is emerging from different groups around the world to meet the challenge of integrated water cycle predictions. In this talk the community WRF-Hydro modeling system will be presented. After a brief reviewing the architectural features of the WRF-Hydro system short-term forecasting and regional hydroclimate prediction applications of the model from western North America will be presented. In these applications, analyses will present results from observation-validated prediction experiments where atmospheric and terrestrial hydrologic model components are run in both a fully coupled mode and separately without two-way interactions. Emphasis is placed on illustrating an assessment framework using an initial state perturbation methodology to quantify the role of land-atmosphere energy and moisture flux partitioning in controlling precipitation and runoff forecast skill. Issues related to experimental design of fully-coupled model prediction experiments will also be discussed as will issues related to computational performance.

  8. A Fully Integrated and Miniaturized Heavy-metal-detection Sensor Based on Micro-patterned Reduced Graphene Oxide

    Science.gov (United States)

    Xuan, Xing; Hossain, Md. Faruk; Park, Jae Yeong

    2016-09-01

    For this paper, a fully integrated and highly miniaturized electrochemical sensor was designed and fabricated on a silicon substrate. A solvothermal-assisted reduced graphene oxide named “TRGO” was then successfully micro-patterned using a lithography technique, followed by the electrodeposition of bismuth (Bi) on the surface of the micro-patterned TRGO for the electrochemical detection of heavy metal ions. The fully integrated electrochemical micro-sensor was then measured and evaluated for the detection of cadmium and lead-heavy metal ions in an acetic-acid buffered solution using the square wave anodic stripping voltammetry (SWASV) technique. The fabricated micro-sensor exhibited a linear detection range of 1.0 μg L-1 to 120.0 μg L-1 for both of the metal ions, and detection limits of 0.4 μg L-1 and 1.0 μg L-1 were recorded for the lead and cadmium (S/N = 3), respectively. Drinking-water samples were used for the practical assessment of the fabricated micro-sensor, and it showed an acceptable detection performance regarding the metal ions.

  9. Novel fully integrated computer system for custom footwear: from 3D digitization to manufacturing

    Science.gov (United States)

    Houle, Pascal-Simon; Beaulieu, Eric; Liu, Zhaoheng

    1998-03-01

    This paper presents a recently developed custom footwear system, which integrates 3D digitization technology, range image fusion techniques, a 3D graphical environment for corrective actions, parametric curved surface representation and computer numerical control (CNC) machining. In this system, a support designed with the help of biomechanics experts can stabilize the foot in a correct and neutral position. The foot surface is then captured by a 3D camera using active ranging techniques. A software using a library of documented foot pathologies suggests corrective actions on the orthosis. Three kinds of deformations can be achieved. The first method uses previously scanned pad surfaces by our 3D scanner, which can be easily mapped onto the foot surface to locally modify the surface shape. The second kind of deformation is construction of B-Spline surfaces by manipulating control points and modifying knot vectors in a 3D graphical environment to build desired deformation. The last one is a manual electronic 3D pen, which may be of different shapes and sizes, and has an adjustable 'pressure' information. All applied deformations should respect a G1 surface continuity, which ensure that the surface can accustom a foot. Once the surface modification process is completed, the resulting data is sent to manufacturing software for CNC machining.

  10. Enabling the democratization of the genomics revolution with a fully integrated web-based bioinformatics platform

    Science.gov (United States)

    Li, Po-E; Lo, Chien-Chi; Anderson, Joseph J.; Davenport, Karen W.; Bishop-Lilly, Kimberly A.; Xu, Yan; Ahmed, Sanaa; Feng, Shihai; Mokashi, Vishwesh P.; Chain, Patrick S.G.

    2017-01-01

    Continued advancements in sequencing technologies have fueled the development of new sequencing applications and promise to flood current databases with raw data. A number of factors prevent the seamless and easy use of these data, including the breadth of project goals, the wide array of tools that individually perform fractions of any given analysis, the large number of associated software/hardware dependencies, and the detailed expertise required to perform these analyses. To address these issues, we have developed an intuitive web-based environment with a wide assortment of integrated and cutting-edge bioinformatics tools in pre-configured workflows. These workflows, coupled with the ease of use of the environment, provide even novice next-generation sequencing users with the ability to perform many complex analyses with only a few mouse clicks and, within the context of the same environment, to visualize and further interrogate their results. This bioinformatics platform is an initial attempt at Empowering the Development of Genomics Expertise (EDGE) in a wide range of applications for microbial research. PMID:27899609

  11. Capacitive Micro Pressure Sensor Integrated with a Ring Oscillator Circuit on Chip

    Directory of Open Access Journals (Sweden)

    Cheng-Yang Liu

    2009-12-01

    Full Text Available The study investigates a capacitive micro pressure sensor integrated with a ring oscillator circuit on a chip. The integrated capacitive pressure sensor is fabricated using the commercial CMOS (complementary metal oxide semiconductor process and a post-process. The ring oscillator is employed to convert the capacitance of the pressure sensor into the frequency output. The pressure sensor consists of 16 sensing cells in parallel. Each sensing cell contains a top electrode and a lower electrode, and the top electrode is a sandwich membrane. The pressure sensor needs a post-CMOS process to release the membranes after completion of the CMOS process. The post-process uses etchants to etch the sacrificial layers, and to release the membranes. The advantages of the post-process include easy execution and low cost. Experimental results reveal that the pressure sensor has a high sensitivity of 7 Hz/Pa in the pressure range of 0–300 kPa.

  12. Operational Excellence through Schedule Optimization and Production Simulation of Application Specific Integrated Circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Flory, John Andrew [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Padilla, Denise D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Gauthier, John H. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Zwerneman, April Marie [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Miller, Steven P [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2016-05-01

    Upcoming weapon programs require an aggressive increase in Application Specific Integrated Circuit (ASIC) production at Sandia National Laboratories (SNL). SNL has developed unique modeling and optimization tools that have been instrumental in improving ASIC production productivity and efficiency, identifying optimal operational and tactical execution plans under resource constraints, and providing confidence in successful mission execution. With ten products and unprecedented levels of demand, a single set of shared resources, highly variable processes, and the need for external supplier task synchronization, scheduling is an integral part of successful manufacturing. The scheduler uses an iterative multi-objective genetic algorithm and a multi-dimensional performance evaluator. Schedule feasibility is assessed using a discrete event simulation (DES) that incorporates operational uncertainty, variability, and resource availability. The tools provide rapid scenario assessments and responses to variances in the operational environment, and have been used to inform major equipment investments and workforce planning decisions in multiple SNL facilities.

  13. A quantum entropy source on an InP photonic integrated circuit for random number generation

    CERN Document Server

    Abellan, Carlos; Domenech, David; Muñoz, Pascual; Capmany, Jose; Longhi, Stefano; Mitchell, Morgan W; Pruneri, Valerio

    2016-01-01

    Random number generators are essential to ensure performance in information technologies, including cryptography, stochastic simulations and massive data processing. The quality of random numbers ultimately determines the security and privacy that can be achieved, while the speed at which they can be generated poses limits to the utilisation of the available resources. In this work we propose and demonstrate a quantum entropy source for random number generation on an indium phosphide photonic integrated circuit made possible by a new design using two-laser interference and heterodyne detection. The resulting device offers high-speed operation with unprecedented security guarantees and reduced form factor. It is also compatible with complementary metal-oxide semiconductor technology, opening the path to its integration in computation and communication electronic cards, which is particularly relevant for the intensive migration of information processing and storage tasks from local premises to cloud data centre...

  14. Waveguide photon-number-resolving detectors for quantum photonic integrated circuits

    CERN Document Server

    Sahin, D; Zhou, Z; Jahanmirinejad, S; Mattioli, F; Leoni, R; Beetz, J; Lermer, M; Kamp, M; Höfling, S; Fiore, A

    2013-01-01

    Quantum photonic integration circuits are a promising approach to scalable quantum processing with photons. Waveguide single-photon-detectors (WSPDs) based on superconducting nanowires have been recently shown to be compatible with single-photon sources for a monolithic integration. While standard WSPDs offer single-photon sensitivity, more complex superconducting nanowire structures can be configured to have photon-number-resolving capability. In this work, we present waveguide photon-number-resolving detectors (WPNRDs) on GaAs/Al0.75Ga0.25As ridge waveguides based on a series connection of nanowires. The detection of 0-4 photons has been demonstrated with a four-wire WPNRD, having a single electrical read-out. A device quantum efficiency ~24 % is reported at 1310 nm for the TE polarization.

  15. Capacitive Micro Pressure Sensor Integrated with a Ring Oscillator Circuit on Chip

    Science.gov (United States)

    Dai, Ching-Liang; Lu, Po-Wei; Chang, Chienliu; Liu, Cheng-Yang

    2009-01-01

    The study investigates a capacitive micro pressure sensor integrated with a ring oscillator circuit on a chip. The integrated capacitive pressure sensor is fabricated using the commercial CMOS (complementary metal oxide semiconductor) process and a post-process. The ring oscillator is employed to convert the capacitance of the pressure sensor into the frequency output. The pressure sensor consists of 16 sensing cells in parallel. Each sensing cell contains a top electrode and a lower electrode, and the top electrode is a sandwich membrane. The pressure sensor needs a post-CMOS process to release the membranes after completion of the CMOS process. The post-process uses etchants to etch the sacrificial layers, and to release the membranes. The advantages of the post-process include easy execution and low cost. Experimental results reveal that the pressure sensor has a high sensitivity of 7 Hz/Pa in the pressure range of 0–300 kPa. PMID:22303167

  16. SEMICONDUCTOR INTEGRATED CIRCUITS: Sigma-delta modulator modeling analysis and design

    Science.gov (United States)

    Binjie, Ge; Xin'an, Wang; Xing, Zhang; Xiaoxing, Feng; Qingqin, Wang

    2010-09-01

    This paper introduces a new method for SC sigma-delta modulator modeling. It studies the integrator's different equivalent circuits in the integrating and sampling phases. This model uses the OP-AMP input pair's tail current (I0) and overdrive voltage (von) as variables. The modulator's static and dynamic errors are analyzed. A group of optimized I0 and von for maximum SNR and power × area ratio can be obtained through this model. As examples, a MASH21 modulator for digital audio and a second order modulator for RFID baseband are implemented and tested, and they can achieve 91 dB and 72 dB respectively, which verifies the modeling and design criteria.

  17. A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems.

    Science.gov (United States)

    Park, Kyeonghwan; Kim, Seung Mok; Eom, Won-Jin; Kim, Jae Joon

    2017-04-03

    This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC) for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR) of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS) process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors.

  18. Simultaneous detection of lactate and glucose by integrated printed circuit board based array sensing chip

    Energy Technology Data Exchange (ETDEWEB)

    Li, Xuelian [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China); School of Chemistry and Chemical Engineering, Southwest University, Chongqing 400715 (China); Zang, Jianfeng [Department of Mechanical Engineering and Materials Science, Duke University, Durham, NC 27708 (United States); Liu, Yingshuai; Lu, Zhisong [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China); Li, Qing, E-mail: Qli@swu.edu.cn [School of Chemistry and Chemical Engineering, Southwest University, Chongqing 400715 (China); Li, Chang Ming, E-mail: ecmli@swu.edu.cn [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China)

    2013-04-10

    Highlights: ► An integrated printed circuit board (PCB) based array sensing chip was developed. ► Simultaneous detection of lactate and glucose in serum has been demonstrated. ► The array electronic biochip has high signal to noise ratio and high sensitivity. ► Additional electrodes were designed on the chip to correct interferences. -- Abstract: An integrated printed circuit board (PCB) based array sensing chip was developed to simultaneously detect lactate and glucose in mouse serum. The novelty of the chip relies on a concept demonstration of inexpensive high-throughput electronic biochip, a chip design for high signal to noise ratio and high sensitivity by construction of positively charged chitosan/redox polymer Polyvinylimidazole-Os (PVI-Os)/carbon nanotube (CNT) composite sensing platform, in which the positively charged chitosan/PVI-Os is mediator and electrostatically immobilizes the negatively charged enzyme, while CNTs function as an essential cross-linker to network PVI-Os and chitosan due to its negative charged nature. Additional electrodes on the chip with the same sensing layer but without enzymes were prepared to correct the interferences for high specificity. Low detection limits of 0.6 μM and 5 μM were achieved for lactate and glucose, respectively. This work could be extended to inexpensive array sensing chips with high sensitivity, good specificity and high reproducibility for various sensor applications.

  19. Integrated circuit/microfluidic chip to programmably trap and move cells and droplets with dielectrophoresis.

    Science.gov (United States)

    Hunt, Thomas P; Issadore, David; Westervelt, R M

    2008-01-01

    We present an integrated circuit/microfluidic chip that traps and moves individual living biological cells and chemical droplets along programmable paths using dielectrophoresis (DEP). Our chip combines the biocompatibility of microfluidics with the programmability and complexity of integrated circuits (ICs). The chip is capable of simultaneously and independently controlling the location of thousands of dielectric objects, such as cells and chemical droplets. The chip consists of an array of 128 x 256 pixels, 11 x 11 microm(2) in size, controlled by built-in SRAM memory; each pixel can be energized by a radio frequency (RF) voltage of up to 5 V(pp). The IC was built in a commercial foundry and the microfluidic chamber was fabricated on its top surface at Harvard. Using this hybrid chip, we have moved yeast and mammalian cells through a microfluidic chamber at speeds up to 30 microm sec(-1). Thousands of cells can be individually trapped and simultaneously positioned in controlled patterns. The chip can trap and move pL droplets of water in oil, split one droplet into two, and mix two droplets into one. Our IC/microfluidic chip provides a versatile platform to trap and move large numbers of cells and fluid droplets individually for lab-on-a-chip applications.

  20. Large scale MoS2 nanosheet logic circuits integrated by photolithography on glass

    Science.gov (United States)

    Kwon, Hyeokjae; Jeon, Pyo Jin; Kim, Jin Sung; Kim, Tae-Young; Yun, Hoyeol; Lee, Sang Wook; Lee, Takhee; Im, Seongil

    2016-12-01

    We demonstrate 500 × 500 μm2 large scale polygrain MoS2 nanosheets and field effect transistor (FET) circuits integrated using those nanosheets, which are initially grown on SiO2/p+-Si by chemical vapor deposition but transferred onto glass substrate to be patterned by photolithography. In fact, large scale growth of two-dimensional MoS2 and its conventional way of patterning for integrated devices have remained as one of the unresolved important issues. In the present study, we achieved maximum linear mobility of ˜9 cm2 V-1 s-1 from single-domain MoS2 FET on SiO2/p+-Si substrate and 0.5˜3.0 cm2 V-1 s-1 from large scale MoS2 sheet transferred onto glass. Such reduced mobility is attributed to the transfer process-induced wrinkles and crevices, domain boundaries, residue on MoS2, and loss of the back gate-charging effects that might exist due to SiO2/p+-Si substrate. Among 16 MoS2-based FETs, 13 devices successfully work (yield was more than 80%) producing NOT, NOR, and NAND logic circuits. Inverter (NOT gate) shows quite a high voltage gain over 12 at a supply voltage of 5 V, also displaying 60 μs switching speed in kilohertz dynamics.