WorldWideScience

Sample records for chipping headrig

  1. Atom chips

    CERN Document Server

    Reichel, Jakob

    2010-01-01

    This book provides a stimulating and multifaceted picture of a rapidly developing field. The first part reviews fundamentals of atom chip research in tutorial style, while subsequent parts focus on the topics of atom-surface interaction, coherence on atom chips, and possible future directions of atom chip research. The articles are written by leading researchers in the field in their characteristic and individual styles.

  2. Chips 2020

    CERN Document Server

    2016-01-01

    The release of this second volume of CHIPS 2020 coincides with the 50th anniversary of Moore’s Law, a critical year marked by the end of the nanometer roadmap and by a significantly reduced annual rise in chip performance. At the same time, we are witnessing a data explosion in the Internet, which is consuming 40% more electrical power every year, leading to fears of a major blackout of the Internet by 2020. The messages of the first CHIPS 2020, published in 2012, concerned the realization of quantum steps for improving the energy efficiency of all chip functions. With this second volume, we review these messages and amplify upon the most promising directions: ultra-low-voltage electronics, nanoscale monolithic 3D integration, relevant-data, brain- and human-vision-inspired processing, and energy harvesting for chip autonomy. The team of authors, enlarged by more world leaders in low-power, monolithic 3D, video, and Silicon brains, presents new vistas in nanoelectronics, promising  Moore-like exponential g...

  3. Atom Chips

    CERN Document Server

    Folman, R; Cassettari, D; Hessmo, B; Maier, T; Schmiedmayer, J; Folman, Ron; Krüger, Peter; Cassettari, Donatella; Hessmo, Björn; Maier, Thomas

    1999-01-01

    Atoms can be trapped and guided using nano-fabricated wires on surfaces, achieving the scales required by quantum information proposals. These Atom Chips form the basis for robust and widespread applications of cold atoms ranging from atom optics to fundamental questions in mesoscopic physics, and possibly quantum information systems.

  4. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  5. Chip Multithreaded Consistency Model

    Institute of Scientific and Technical Information of China (English)

    Zu-Song Li; Dan-Dan Huan; Wei-Wu Hu; Zhi-Min Tang

    2008-01-01

    Multithreaded technique is the developing trend of high performance processor. Memory consistency model is essential to the correctness, performance and complexity of multithreaded processor. The chip multithreaded consistency model adapting to multithreaded processor is proposed in this paper. The restriction imposed on memory event ordering by chip multithreaded consistency is presented and formalized. With the idea of critical cycle built by Wei-Wu Hu, we prove that the proposed chip multithreaded consistency model satisfies the criterion of correct execution of sequential consistency model. Chip multithreaded consistency model provides a way of achieving high performance compared with sequential consistency model and ensures the compatibility of software that the execution result in multithreaded processor is the same as the execution result in uniprocessor. The implementation strategy of chip multithreaded consistency model in Godson-2 SMT processor is also proposed. Godson-2 SMT processor supports chip multithreaded consistency model correctly by exception scheme based on the sequential memory access queue of each thread.

  6. CHIP, CHIP, ARRAY! THREE CHIPS FOR POST-GENOMIC RESEARCH

    Science.gov (United States)

    Cambridge Healthtech Institute recently held the 4th installment of their popular "Lab-on-a-Chip" series in Zurich, Switzerland. As usual, it was enthusiastically received and over 225 people attended the 2-1/2 day meeting to see and hear about some of the latest developments an...

  7. ALICE chip processor

    CERN Multimedia

    Maximilien Brice

    2003-01-01

    This tiny chip provides data processing for the time projection chamber on ALICE. Known as the ALICE TPC Read Out (ALTRO), this device was designed to minimize the size and power consumption of the TPC front end electronics. This single chip contains 16 low-power analogue-to-digital converters with six million transistors of digital processing and 8 kbits of data storage.

  8. Advanced flip chip packaging

    CERN Document Server

    Lai, Yi-Shao; Wong, CP

    2013-01-01

    Advanced Flip Chip Packaging presents past, present and future advances and trends in areas such as substrate technology, material development, and assembly processes. Flip chip packaging is now in widespread use in computing, communications, consumer and automotive electronics, and the demand for flip chip technology is continuing to grow in order to meet the need for products that offer better performance, are smaller, and are environmentally sustainable. This book also: Offers broad-ranging chapters with a focus on IC-package-system integration Provides viewpoints from leading industry executives and experts Details state-of-the-art achievements in process technologies and scientific research Presents a clear development history and touches on trends in the industry while also discussing up-to-date technology information Advanced Flip Chip Packaging is an ideal book for engineers, researchers, and graduate students interested in the field of flip chip packaging.

  9. Causes of stem end chip defect in chipping potatoes

    Science.gov (United States)

    Stem-end chip defect (SECD) is a serious tuber quality concern that affects chipping potatoes. This defect is characterized by dark-colored vascular tissues and adjacent cortical tissues at the tuber stem-end of potato chips after frying. Chips with SECD are unappealing to consumers and raw product ...

  10. Medicaid CHIP ESPC Database

    Data.gov (United States)

    U.S. Department of Health & Human Services — The Environmental Scanning and Program Characteristic (ESPC) Database is in a Microsoft (MS) Access format and contains Medicaid and CHIP data, for the 50 states...

  11. Utilization of titanium chips

    International Nuclear Information System (INIS)

    Complex of equipment is created for realization of developed technology in experimental-inductrial production of secondary titanium alloys with annual efficiency of 50-100 t. The complex includes a section for chips preparation, facility for electride vacuum hot pressins, vacuum arc furnace for melting ingots of <200 kg. The ingots obtained will be reprocessed into bars, forgins, powers and also be used for production of shaped castings. Approbation of the developed technology was carried out by production of three types of secondary titanium lloys. The technical titanium chips were used as blend for production of TV1 alloy, chips of VT5 and PT3V alloys for TV2 and chips of VT6 and VT23 alloys for TV3 alloys. Study of chemical composition, mechanical properties and structure of secondary titanium alloys were performed on forged bars 20 mm in diameter

  12. China's first WLAN chips

    Institute of Scientific and Technical Information of China (English)

    2007-01-01

    @@ The wireless local area network (WLAN) chips independently developed by CAS researchers were in the limelight of the recent Electronic Manufacture Exposition held in Suzhou, east China's Jiangsu Province.

  13. Nanoslits in silicon chips

    International Nuclear Information System (INIS)

    Potassium hydroxide (KOH) etching of a patterned oriented silicon wafer produces V-shaped etch pits. We demonstrate that the remaining thickness of silicon at the tip of the etch pit can be reduced to ∼5 μm using an appropriately sized etch mask and optical feedback. Starting from such an etched chip, we have developed two different routes for fabricating 100 nm scale slits that penetrate through the macroscopic silicon chip (the slits are ∼850 μm wide at one face of the chip and gradually narrow to ∼100-200 nm wide at the opposite face of the chip). In the first process, the etched chips are sonicated to break the thin silicon at the tip of the etch pit and then further KOH etched to form a narrow slit. In the second process, focused ion beam milling is used to etch through the thin silicon at the tip of the etch pit. The first method has the advantage that it uses only low-resolution technology while the second method offers more control over the length and width of the slit. Our slits can be used for preparing mechanically stable, transmission electron microscopy samples compatible with electrical transport measurements or as nanostencils for depositing nanowires seamlessly connected to their contact pads.

  14. SU-8 cantilever chip interconnection

    DEFF Research Database (Denmark)

    Johansson, Alicia Charlotte; Janting, Jakob; Schultz, Peter;

    2006-01-01

    the electrodes on the SU-8 chip to a printed circuit board. Here, we present two different methods of electrically connecting an SU-8 chip, which contains a microfluidic network and free-hanging mechanical parts. The tested electrical interconnection techniques are flip chip bonding using underfill or flip chip...... bonding using an anisotropic conductive film (ACF). These are both widely used in the Si industry and might also be used for the large scale interconnection of SU-8 chips. The SU-8 chip, to which the interconnections are made, has a microfluidic channel with integrated micrometer-sized cantilevers...... that can be used for label-free biochemical detection. All the bonding tests are compared with results obtained using similar Si chips. It is found that it is significantly more complicated to interconnect SU-8 than Si cantilever chips primarily due to the softness of SU-8....

  15. Price of forest chips decreasing

    International Nuclear Information System (INIS)

    Use of forest chips was studied in 1999 in the national Puuenergia (Wood Energy) research program. Wood combusting heating plants were questioned about are the main reasons restricting the increment of the use of forest chips. Heating plants, which did not use forest chips at all or which used less than 250 m3 (625 bulk- m3) in 1999 were excluded. The main restrictions for additional use of forest chips were: too high price of forest chips; lack of suppliers and/or uncertainty of deliveries; technical problems of reception and processing of forest chips; insufficiency of boiler output especially in winter; and unsatisfactory quality of chips. The price of forest chips becomes relatively high because wood biomass used for production of forest chips has to be collected from wide area. Heavy equipment has to be used even though small fragments of wood are processed, which increases the price of chips. It is essential for forest chips that the costs can be pressed down because competition with fossil fuels, peat and industrial wood residues is hard. Low market price leads to the situation in which forest owner gets no price of the raw material, the entrepreneurs operate at the limit of profitability and renovation of machinery is difficult, and forest chips suppliers have to sell the chips at prime costs. Price of forest chips has decreased significantly during the past decade. Nominal price of forest chips is now lower than two decades ago. The real price of chips has decreased even more than the nominal price, 35% during the past decade and 20% during the last five years. Chips, made of small diameter wood, are expensive because the price includes the felling costs and harvesting is carried out at thinning lots. Price is especially high if chips are made of delimbed small diameter wood due to increased the work and reduced amount of chips. The price of logging residue chips is most profitable because cutting does not cause additional costs. Recovery of chips is

  16. Networks on chip

    CERN Document Server

    Jantsch, Axel

    2007-01-01

    From the reviews:""This edited book is concerned with the fundamentals of Networks-on-Chip design. … Overall, the various authors have done an excellent job in covering their material, and the book is well edited. The authors' objectives were that of providing an in-depth, up-to-date, unified and comprehensive treatment ... . These are difficult objectives … and they have done a creditable job of attaining them. In summary, this book is a welcome addition to the literature on networks on chip design … ."" (Mile Stojcev, Microelectronics Reliability, Vol. 44, 2004)

  17. Trapping molecules on chips

    CERN Document Server

    Santambrogio, Gabriele

    2015-01-01

    In the last years, it was demonstrated that neutral molecules can be loaded on a microchip directly from a supersonic beam. The molecules are confined in microscopic traps that can be moved smoothly over the surface of the chip. Once the molecules are trapped, they can be decelerated to a standstill, for instance, or pumped into selected quantum states by laser light or microwaves. Molecules are detected on the chip by time-resolved spatial imaging, which allows for the study of the distribution in the phase space of the molecular ensemble.

  18. Flock on a chip

    Science.gov (United States)

    Bartolo, Denis; Desreumaux, Nicolas

    2015-11-01

    We will show how to motorize colloidal particles capable of sensing the orientation of their neighbors and how to handle them in microfluidic chips. These populations of colloidal rollers display non-equilibrium transitions toward swarming or swirling motion depending on the system geometry . After characterizing these emergent patterns we will quantitatively describe them by means of an hydrodynamic theory of polar active liquids.

  19. Copper chip technology

    Science.gov (United States)

    Edelstein, Daniel C.

    1998-09-01

    Recently, IBM announced the first silicon integrated circuit technology that incorporates copper on-chip wiring. This technology, which combines industry-leading CMOS ULSI devices with 6 levels of hierarchically-scaled Cu metallization, has reached the point of manufacturing, after passing the qualification tests required to prove feasibility, yield, reliability, and manufacturability. The discussion of the change from Al To Cu interconnects for ULSI encompasses a wide variety of issues. This paper attempts to address these by way of example, from the broad range of detailed studies that have been performed in the course of developing these so-called 'copper chips.' Motivational issues are covered by comparative modeling of performance aspects and cost. The technology parameters and features are shown, as well as data relating to the process integration, electrical yield and parametric behavior, early manufacturing data, high-frequency modeling and measurements, noise and clock skew. The viability of this technology is indicated by results from reliability stressing, as well as the first successful demonstrations of fully functional SRAM, DRAM, and microprocessor chips with Cu wiring. The advantages of integrated Cu wiring may be applied even more broadly in the future. An example shown here is the achievement of very high-quality integrated inductors; these may help prospects for complete integration of RF and wireless communications chips onto silicon.

  20. Fish and chips

    OpenAIRE

    Delvenne, Philippe; Deprez, Manuel; Bisig, Bettina; JAMAR, Mauricette; Boniver, Jacques; Bours, Vincent; Herens, Christian

    2010-01-01

    Academic hospital laboratories should offer patients the possibility to have the most accurate diagnosis by the development of new analyses, such as molecular biology tests including FISH (Fluorescent In Situ Hybridization) and chips (microarrays,...). The purpose of this article is to describe the principles and the potential applications of these techniques.

  1. Preservation of forest wood chips

    Energy Technology Data Exchange (ETDEWEB)

    Kofman, P.D.; Thomsen, I.M.; Ohlsson, C.; Leer, E.; Ravn Schmidt, E.; Soerensen, M.; Knudsen, P.

    1999-01-01

    As part of the Danish Energy Research Programme on biomass utilisation for energy production (EFP), this project concerns problems connected to the handling and storing of wood chips. In this project, the possibility of preserving wood chips of the Norway Spruce (Picea Abies) is addressed, and the potential improvements by anaerobic storage are tested. Preservation of wood chips aims at reducing dry matter losses from extensive heating during storage and to reduce production of fungal spores. Fungal spores pose a health hazards to workers handling the chips. Further the producers of wood chips are interested in such a method since it would enable them to give a guarantee for the delivery of homogeneous wood chips also during the winter period. Three different types of wood chips were stored airtight and further one of these was stored in accordance with normal practise and use as reference. The results showed that airtight storage had a beneficial impact on the quality of the chips: no redistribution of moisture, low dry matter losses, unfavourable conditions for microbial activity of most fungi, and the promotion of yeasts instead of fungi with airborne spores. Likewise the firing tests showed that no combustion problems, and no increased risk to the environment or to the health of staff is caused by anaerobic storage of wood chips. In all, the tests of the anaerobic storage method of forest wood chips were a success and a large-scale test of the method will be carried out in 1999. (au)

  2. Silicon chips light up

    International Nuclear Information System (INIS)

    Researchers have demonstrated a continuous laser in silicon, which paves the way for computing at the speed of light Silicon is the racehorse of microelectronics. For the last 40 years, the number of transistors that can be crammed onto a single silicon wafer has doubled every 18 months or so, with the latest 'Itanium' chip packing in almost half a billion of them. But Moore's law, as this exponential trend is popularly known, is coming to an end due to fundamental physical limitations. These include the difficulty of keeping the chips cool and the fact that length scales are quickly approaching those of a single atom. A silicon laser could help chip makers beat these limitations by harnessing light, thus reducing the size and cost of microelectronic circuits even further,while at the same time increasing their speed. The problem is that silicon is a very inefficient light emitter, which means that silicon-based optoelectronics has remained out of reach. Since 2000 all this has changed and the race to build a silicon laser has begun in earnest. Now, Mario Paniccia and colleagues at Intel in the US and Israel have demonstrated the first continuous all-silicon laser by harnessing a phenomenon called Raman scattering (Nature 433 292 and 725). (U.K.)

  3. Dental Care for Medicaid and CHIP Enrollees

    Science.gov (United States)

    ... Amendments Dental Care Dental Care for Medicaid and CHIP Enrollees Dental health is an important part of ... for dental services. Dental Benefits for Children in CHIP States that provide CHIP coverage to children through ...

  4. Chips with everything

    CERN Document Server

    CERN. Geneva

    2007-01-01

    In March 1972, Sir Robin Saxby gave a talk to the Royal Television Society called 'TV and Chips' about a 'state of the art' integrated circuit, containing 50 resistors and 50 transistors. Today's 'state of the art' chips contain up to a billion transistors. This enormous leap forward illustrates how dramatically the semiconductor industry has evolved in the past 34 years. The next 10 years are predicted to bring times of turbulent change for the industry, as more and more digital devices are used around the world. In this talk, Sir Robin will discuss the history of the Microchip Industry in parallel with ARM's history, demonstrating how a small European start-up can become a world player in the IT sector. He will also present his vision of important applications and developments in the next 20 years that are likely to become even more pervasive than the mobile phone is today, and will provide anecdotes and learning points from his own experience at ARM. About ARM: Sir Robin and a group of designers from Acorn...

  5. Ultra-thin chip technology and applications

    CERN Document Server

    2010-01-01

    Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.

  6. CRRES microelectronic test chip

    International Nuclear Information System (INIS)

    This paper reports on the JPL CRRES chip which was designed and fabricated in 1985 and included in the CRRES MEP. MOSFET Matrix results show the effect of shielding on radiation-induced MOSFET threshold voltage shifts and channel mobility degradation. Shielded (middle board) MOSFETs have a threshold-voltage damage factor that is approximately three-orders of magnitude smaller than would be estimated from Co-60 ground tests. Temperature swings as large as 23 degrees C with a 22.5 orbit periodicity affected the MOSFET data and was removed from the data in order to reveal the radiation effects. This experiment demonstrated the feasibility of characterizing MOSFETs in a matrix thus reducing the complexity and mass of the experiment

  7. S-Chip Technical Assistance

    Data.gov (United States)

    U.S. Department of Health & Human Services — The page will provide access to reports and other published products designed to assist states with complicated S-Chip technical issues. The reports and products...

  8. On-Chip Optical Squeezing

    CERN Document Server

    Dutt, Avik; Manipatruni, Sasikanth; Gaeta, Alexander L; Nussenzveig, Paulo; Lipson, Michal

    2013-01-01

    A squeezed light source, i.e. a source with ultra low noise level, below the standard quantum limit (SQL), can enable quantum enhanced sensing, spectroscopy[1, 2], metrology[3] and quantum information processing[4,5]. To date, such a non classical light source on-chip, scalable, compact and robust has not been demonstrated. Such a source could not only enable ultrasensitive measurements on chip, but also provide squeezing over high bandwidths in contrast to most sources which usually rely on large optical cavities with narrow bandwidths. Here, we report the observation of squeezed light in an on-chip monolithically integrated platform, generated in a micron-size silicon nitride oscillator[6] with GHz cavity linewidth. We show 1.7dB noise squeezing, i.e. reduction of the noise level below the standard quantum limit, of the intensity difference between two beams generated by an on-chip optical parametric oscillator.

  9. Whole-Teflon microfluidic chips

    OpenAIRE

    Ren, Kangning; Dai, Wen; Zhou, Jianhua; Su, Jing; Wu, Hongkai

    2011-01-01

    Although microfluidics has shown exciting potential, its broad applications are significantly limited by drawbacks of the materials used to make them. In this work, we present a convenient strategy for fabricating whole-Teflon microfluidic chips with integrated valves that show outstanding inertness to various chemicals and extreme resistance against all solvents. Compared with other microfluidic materials [e.g., poly(dimethylsiloxane) (PDMS)] the whole-Teflon chip has a few more advantages, ...

  10. Atom chip gravimeter

    Science.gov (United States)

    Schubert, Christian; Abend, Sven; Gebbe, Martina; Gersemann, Matthias; Ahlers, Holger; Müntinga, Hauke; Matthias, Jonas; Sahelgozin, Maral; Herr, Waldemar; Lämmerzahl, Claus; Ertmer, Wolfgang; Rasel, Ernst

    2016-04-01

    Atom interferometry has developed into a tool for measuring rotations [1], accelerations [2], and testing fundamental physics [3]. Gravimeters based on laser cooled atoms demonstrated residual uncertainties of few microgal [2,4] and were simplified for field applications [5]. Atomic gravimeters rely on the interference of matter waves which are coherently manipulated by laser light fields. The latter can be interpreted as rulers to which the position of the atoms is compared. At three points in time separated by a free evolution, the light fields are pulsed onto the atoms. First, a coherent superposition of two momentum states is produced, then the momentum is inverted, and finally the two trajectories are recombined. Depending on the acceleration the atoms experienced, the number of atoms detected in the output ports will change. Consequently, the acceleration can be determined from the output signal. The laser cooled atoms with microkelvin temperatures used in state-of-the-art gravimeters impose limits on the accuracy [4]. Therefore, ultra-cold atoms generated by Bose-Einstein condensation and delta-kick collimation [6,7] are expected to be the key for further improvements. These sources suffered from a low flux implying an incompatible noise floor, but a competitive performance was demonstrated recently with atom chips [8]. In the compact and robust setup constructed for operation in the drop tower [6] we demonstrated all steps necessary for an atom chip gravimeter with Bose-Einstein condensates in a ground based operation. We will discuss the principle of operation, the current performance, and the perspectives to supersede the state of the art. The authors thank the QUANTUS cooperation for contributions to the drop tower project in the earlier stages. This work is supported by the German Space Agency (DLR) with funds provided by the Federal Ministry for Economic Affairs and Energy (BMWi) due to an enactment of the German Bundestag under grant numbers DLR 50WM

  11. Stem end chip defect in tubers used for potato chip production

    Science.gov (United States)

    Stem-end chip defect (SECD) is a serious tuber quality concern that affects chipping potatoes (Solanum tuberosum). SECD defect is characterized by dark-colored vascular tissues and adjacent cortical tissues at the tuber stem-end portion of potato chips after frying. Chips with SECD are unattractive ...

  12. Development, Fabrication and Characterisation of Atom Chips

    OpenAIRE

    Groth, Sönke

    2006-01-01

    Atom chips are robust and extremely powerful toolboxes for quantum optical experiments, since they make it possible to create exceedingly precise magnetic traps for neutral atoms with minimal field modulations. Accurate manipulation of trapped atoms is feasible with magnetic and electric fields created on the atom chip. Therefore atom chips with high quality surfaces and extremely well defined wires were build (roughness < 20nm). Furthermore new generations of atom chips were developed, like ...

  13. Near Field On Chip RFID Antenna Design

    OpenAIRE

    Vargas, Alberto; Vojtech, Lukas

    2010-01-01

    The process of fabricating the antenna on the top of the RFID chip eliminates the need for a separated and costly expensive process for antenna printing and assemblage, compulsory for a separated "off-chip" antenna which is much more times larger than the chip itself. This

  14. On-Chip Optical Squeezing

    Science.gov (United States)

    Dutt, Avik; Luke, Kevin; Manipatruni, Sasikanth; Gaeta, Alexander L.; Nussenzveig, Paulo; Lipson, Michal

    2015-04-01

    We report the observation of all-optical squeezing in an on-chip monolithically integrated CMOS-compatible platform. Our device consists of a low-loss silicon nitride microring optical parametric oscillator (OPO) with a gigahertz cavity linewidth. We measure 1.7 dB (5 dB corrected for losses) of sub-shot-noise quantum correlations between bright twin beams generated in the microring four-wave-mixing OPO pumped above threshold. This experiment demonstrates a compact, robust, and scalable platform for quantum-optics and quantum-information experiments on chip.

  15. FERMI multi-chip module

    CERN Multimedia

    This FERMI multi-chip module contains five million transistors. 25 000 of these modules will handle the flood of information through parts of the ATLAS and CMS detectors at the LHC. To select interesting events for recording, crucial decisions are taken before the data leaves the detector. FERMI modules are being developed at CERN in partnership with European industry.

  16. Fiber cavities for atom chips

    OpenAIRE

    Klappauf, B.G.; Horak, P.; Kazansky, P. G.

    2003-01-01

    We present experimental realizations of several micro-cavities, constructed from standard fiber optic components, which meet the theoretical criteria for single atom detection from laser-cooled samples. We discuss integration of these cavities into state-of-the-art 'atom chips'.

  17. Tunable on chip optofluidic laser

    DEFF Research Database (Denmark)

    Bakal, Avraham; Vannahme, Christoph; Kristensen, Anders;

    2015-01-01

    A chip scale tunable laser in the visible spectral band is realized by generating a periodic droplet array inside a microfluidic channel. Combined with a gain medium within the droplets, the periodic structure provides the optical feedback of the laser. By controlling the pressure applied to two...

  18. Kinerja Pengeringan Chip Ubi Kayu

    Directory of Open Access Journals (Sweden)

    Sandi Asmara

    2010-10-01

    Full Text Available Lampung Province is the largest producer of cassava in Indonesia. Cassava has a weakness that is easily damaged and could not be stored longer. To overcome this, there is a need of an effective drying process so that cassava can be processed into other materials of lower power use as well as its economic value. A hybrid drying system is one solution to resolve the issue. The purpose of this research is to study the performance of drying cassava chips by using a hybrid type of dryer rack. The process of drying cassava chips made using a three-stage treatments with three replicates with the input load of 30 kg of cassava chips. The results showed that the pattern of decline in water levels in each treatment is uneven. The time needed to dry cassava chips to reach the water content of 10% - 12% in the drying of materials using sunlight for 18 hours, using electrical energy for 16 hours and use the energy of sunlight and electricity for 12 hours. The higher temperatures produced the shorter the time required in the drying process. Electrical energy required for the drying process using electric energy was 91 440 kJ and drying using electrical energy and sunlight was 68600 kJ.

  19. Reconfigurable Networks-on-Chip

    CERN Document Server

    Chen, Sao-Jie; Tsai, Wen-Chung; Hu, Yu-Hen

    2012-01-01

    This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.   Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.     From the Foreword: Overall this book shows important advances over the...

  20. Programmable synaptic chip for electronic neural networks

    Science.gov (United States)

    Moopenn, A.; Langenbacher, H.; Thakoor, A. P.; Khanna, S. K.

    1988-01-01

    A binary synaptic matrix chip has been developed for electronic neural networks. The matrix chip contains a programmable 32X32 array of 'long channel' NMOSFET binary connection elements implemented in a 3-micron bulk CMOS process. Since the neurons are kept off-chip, the synaptic chip serves as a 'cascadable' building block for a multi-chip synaptic network as large as 512X512 in size. As an alternative to the programmable NMOSFET (long channel) connection elements, tailored thin film resistors are deposited, in series with FET switches, on some CMOS test chips, to obtain the weak synaptic connections. Although deposition and patterning of the resistors require additional processing steps, they promise substantial savings in silicon area. The performance of synaptic chip in a 32-neuron breadboard system in an associative memory test application is discussed.

  1. Solid state silicon based condenser microphone for hearing aid, has transducer chip and IC chip between intermediate chip and openings on both sides of intermediate chip, to allow sound towards diaphragm

    DEFF Research Database (Denmark)

    2000-01-01

    NOVELTY - A silicon transducer chip (1) has parallel backplate and movable diaphragm (12) and forms an electrical capacitor. The chip and electronic circuit chip (3) are provided on either sides of intermediate chip (2). The chip (2) has openings (4,10) between two sides of the chip, to allow sound...... towards diaphragm. Surface of the chip (2) has electrical conductors (14) to connect chip with IC chip (3). USE - For use in miniature electroacoustic devices such as hearing aid. ADVANTAGE - Since sound inlet is covered by filter, dust, moisture and other impurities do not obstruct interior and sound...

  2. Darwinian Evolution on a Chip

    OpenAIRE

    Paegel, Brian M.; Joyce, Gerald F.

    2008-01-01

    Author Summary The principles of Darwinian evolution are fundamental to understanding biological organization and have been applied to the development of functional molecules in the test tube. Laboratory evolution is greatly accelerated compared with natural evolution, but it usually requires substantial manipulation by the experimenter. Here we describe a system that relies on computer control and microfluidic chip technology to automate the directed evolution of functional molecules, subjec...

  3. Future trends in secure chip data managemen

    OpenAIRE

    Anciaux, Nicolas; Bouganim, Luc; Pucheral, Philippe

    2007-01-01

    Secure chips, e.g. present in smart cards, TPM, USB dongles are now ubiquitous in applications with strong security requirements. Secure chips host personal data that must be carefully managed and protected, thus requiring embedded data management techniques. However, secure chips have severe hardware constraints which make traditional database techniques irrelevant. We previously addressed the problem of scaling down database techniques for the smart card and proposed the design of a DBMS ke...

  4. Future Trends in Secure Chip Data Management

    OpenAIRE

    Anciaux, Nicolas; Bouganim, Luc; Pucheral, Philippe

    2007-01-01

    Secure chips, e.g. present in smart cards, TPM, USB dongles are now ubiquitous in applications with strong security requirements. Secure chips host personal data that must be carefully managed and protected, thus requiring embedded data management techniques. However, secure chips have severe hardware constraints which make traditional database techniques irrelevant. We previously addressed the problem of scaling down database techniques for the smart card and proposed the design of a DBMS ke...

  5. Wireless network-on-chip: a survey

    OpenAIRE

    Shuai Wang; Tao Jin

    2014-01-01

    To alleviate the complex communication problems arising in the network-on-chip (NoC) architectures as the number of on-chip components increases, several novel interconnect infrastructures have been recently proposed to replace the traditional on-chip interconnection systems that are reaching their limits in terms of performance, power and area constraints. Wireless NoC (WiNoC) is among the most promising scalable interconnection architectures for future generation NoCs. In this study, the au...

  6. Photonic network-on-chip design

    CERN Document Server

    Bergman, Keren; Biberman, Aleksandr; Chan, Johnnie; Hendry, Gilbert

    2013-01-01

    This book provides a comprehensive synthesis of the theory and practice of photonic devices for networks-on-chip. It outlines the issues in designing photonic network-on-chip architectures for future many-core high performance chip multiprocessors. The discussion is built from the bottom up: starting with the design and implementation of key photonic devices and building blocks, reviewing networking and network-on-chip theory and existing research, and finishing with describing various architectures, their characteristics, and the impact they will have on a computing system. After acquainting

  7. Wax-bonding 3D microfluidic chips

    KAUST Repository

    Gong, Xiuqing

    2013-10-10

    We report a simple, low-cost and detachable microfluidic chip incorporating easily accessible paper, glass slides or other polymer films as the chip materials along with adhesive wax as the recycling bonding material. We use a laser to cut through the paper or film to form patterns and then sandwich the paper and film between glass sheets or polymer membranes . The hot-melt adhesive wax can realize bridge bonding between various materials, for example, paper, polymethylmethacrylate (PMMA) film, glass sheets, or metal plate. The bonding process is reversible and the wax is reusable through a melting and cooling process. With this process, a three-dimensional (3D) microfluidic chip is achievable by vacuating and venting the chip in a hot-water bath. To study the biocompatibility and applicability of the wax-based microfluidic chip, we tested the PCR compatibility with the chip materials first. Then we applied the wax-paper based microfluidic chip to HeLa cell electroporation (EP ). Subsequently, a prototype of a 5-layer 3D chip was fabricated by multilayer wax bonding. To check the sealing ability and the durability of the chip, green fluorescence protein (GFP) recombinant Escherichia coli (E. coli) bacteria were cultured, with which the chemotaxis of E. coli was studied in order to determine the influence of antibiotic ciprofloxacin concentration on the E. coli migration.

  8. Infrared vertically-illuminated photodiode for chip alignment feedback

    CERN Document Server

    Alloatti, Luca

    2016-01-01

    We report on vertically-illuminated photodiodes fabricated in the GlobalFoundries 45nm 12SOI node and on a packaging concept for optically-interconnected chips. The photodiodes are responsive at 1180 nm, a wavelength currently used in chip-to-chip communications. They have further a wide field-of-view which enables chip-to-board positional feedback in chip-board assemblies. Monolithic integration enables on-chip processing of the positional data.

  9. Self-powered integrated systems-on-chip (energy chip)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-04-23

    In today\\'s world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  10. On-Chip Optical Squeezing

    OpenAIRE

    Dutt, Avik; Luke, Kevin; Manipatruni, Sasikanth; Gaeta, Alexander L.; Nussenzveig, Paulo; Lipson, Michal

    2013-01-01

    We present the first demonstration of all-optical squeezing in an on-chip monolithically integrated CMOS-compatible platform. Our device consists of a low loss silicon nitride microring optical parametric oscillator (OPO) with a gigahertz cavity linewidth. We measure 1.7 dB (5 dB corrected for losses) of sub-shot noise quantum correlations between bright twin beams generated in the microring four-wave-mixing OPO pumped above threshold. This experiment demonstrates a compact, robust, and scala...

  11. Teaching Quality Control with Chocolate Chip Cookies

    Science.gov (United States)

    Baker, Ardith

    2014-01-01

    Chocolate chip cookies are used to illustrate the importance and effectiveness of control charts in Statistical Process Control. By counting the number of chocolate chips, creating the spreadsheet, calculating the control limits and graphing the control charts, the student becomes actively engaged in the learning process. In addition, examining…

  12. Assembly, chip and method of operating

    NARCIS (Netherlands)

    Reefman, D.; Roozeboom, F.; Klootwijk, J.H.

    2012-01-01

    The chip comprises a network of trench capacitors and an inductor, wherein the trench capacitors are coupled in parallel with a pattern of interconnects that is designed so as to limit generation of eddy current induced by the inductor in the interconnects. This allows the use of the chip as a porti

  13. Microluminometer chip and method to measure bioluminescence

    Science.gov (United States)

    Simpson, Michael L [Knoxville, TN; Paulus, Michael J [Knoxville, TN; Sayler, Gary S [Blaine, TN; Applegate, Bruce M [West Lafayette, IN; Ripp, Steven A [Knoxville, TN

    2008-05-13

    An integrated microluminometer includes an integrated circuit chip having at least one n-well/p-substrate junction photodetector for converting light received into a photocurrent, and a detector on the chip for processing the photocurrent. A distributed electrode configuration including a plurality of spaced apart electrodes disposed on an active region of the photodetector is preferably used to raise efficiency.

  14. Least cost supply strategies for wood chips

    DEFF Research Database (Denmark)

    Möller, Bernd

    The abstract presents a study based on a geographical information system, which produce  cost-supply curves by location for forest woods chips in Denmark.......The abstract presents a study based on a geographical information system, which produce  cost-supply curves by location for forest woods chips in Denmark....

  15. Simple photolithographic rapid prototyping of microfluidic chips

    DEFF Research Database (Denmark)

    Kunstmann-Olsen, Casper; Hoyland, James; Rubahn, Horst-Günter

    2012-01-01

    Vi præsenterer en simpel metode til at producere støbeforme til støbning af PDMS mikrofluide chips vha. fotolitografi, med 35mm fotonegativer som masker. Vi demonstrer metodens muligheder og begrænsninger. Vi har optimeret processen til at fremstille planare lab-on-a-chip strukturer med meget høj...

  16. Radiation Behavior of Analog Neural Network Chip

    Science.gov (United States)

    Langenbacher, H.; Zee, F.; Daud, T.; Thakoor, A.

    1996-01-01

    A neural network experiment conducted for the Space Technology Research Vehicle (STRV-1) 1-b launched in June 1994. Identical sets of analog feed-forward neural network chips was used to study and compare the effects of space and ground radiation on the chips. Three failure mechanisms are noted.

  17. Asynchronous design of Networks-on-Chip

    DEFF Research Database (Denmark)

    Sparsø, Jens

    2007-01-01

    The Network-on-chip concept has evolved as a solution to a broad range of problems related to the design of complex systems-on-chip (SoC) with tenths or hundreds of (heterogeneous) IP-cores. The paper introduces the NoC concept, identifies a range of possible timing organizations (globally...

  18. Extensible chip of optofluidic variable optical attenuator.

    Science.gov (United States)

    Wan, J; Xue, F L; Wu, L X; Fu, Y J; Hu, J; Zhang, W; Hu, F R

    2016-05-01

    A core chip of optofluidic variable optical attenuator (VOA) is reported. The chip, with a simple structure, utilizes microfluid and compressed air to regulate the optical attenuation, and it can be expanded to form a number of VOAs by using different microfluidic driving technologies. Three VOAs based on this chip and different driving technologies are introduced. The theoretical and experimental results show that the proposed chip possesses the advantages of large optical attenuation range (> 50dB) and low insertion loss (0.55 dB). Moreover it is a broadband optical device which can be operated in visible and near infrared wavelengths. The proposed chip provides a new method for seeking miniaturized VOAs with good performances, and it is promising to develop a number of different VOAs. PMID:27137582

  19. Carbon Nanotube Amperometric Chips with Pneumatic Micropumps

    Science.gov (United States)

    Tsujita, Yuichi; Maehashi, Kenzo; Matsumoto, Kazuhiko; Chikae, Miyuki; Torai, Soichiro; Takamura, Yuzuru; Tamiya, Eiichi

    2008-04-01

    We fabricated carbon nanotube (CNT) amperometric chips with pneumatic micropumps by the combination of amperometric biosensors based on CNT-arrayed electrodes and microchannels with pneumatic micropumps made of poly(dimethylsiloxane). On the chip, phosphate buffer solution and potassium ferricyanide, K3[Fe(CN)6], were introduced into the CNT electrodes using each pneumatic micropump and electrochemically measured by differential pulse voltammetry. The results indicate that our chip can automatically exchange reagents on the CNT electrodes and clearly detect molecules. Moreover, by modifying the CNT electrodes with enzyme glucose oxidase, glucose molecules could be detected using our chips by cyclic voltammetry and chronoamperometry. We conclude that microfluidic chips with CNT-arrayed electrodes are a promising candidate for the development of hand-held electrochemical biosensors.

  20. Supply chains of forest chip production in Finland

    Energy Technology Data Exchange (ETDEWEB)

    Kaerhae, K. (Metsaeteho Oy, Helsinki (Finland)), Email: kalle.karha@metsateho.fi

    2009-07-01

    The Metsaeteho study investigated how logging residue chips. stump wood chips, and chips from small-sized thinning wood and large-sized (rotten) roundwood used by heating and power plants were produced in Finland in 2008. Almost all the major forest chip suppliers in Finland were involved in the study. The total volume of forest chips supplied in 2008 by these suppliers was 6,5 TWh. The study was implemented by conducting an e-mail questionnaire survey and telephone interviews. Research data was collected in March-May 2009. The majority of the logging residue chips and chips from small-sized thinning wood were produced using the roadside chipping supply chain in Finland in 2008. The chipping at plant supply chain was also significant in the production of logging residue chips. 70% of all stump wood chips consumed were comminuted at the plant and 29% at terminals. The role of the terminal chipping supply chain was also significant in the production of chips from logging residues and small-sized wood chips. When producing chips from large-sized (rotten) roundwood, nearly a half of chips were comminuted at plants and more than 40 % at terminals. (orig.)

  1. Supply systems of forest chip production in Finland

    Energy Technology Data Exchange (ETDEWEB)

    Kaerhae, K. (Metsaeteho Oy, Helsinki (Finland)), e-mail: kalle.karha@metsateho.fi

    2010-07-01

    The Metsaeteho study investigated how logging residue chips, stump wood chips, and chips from small-diameter thinning wood and large-sized (rotten) roundwood used by heating and power plants were produced in Finland in 2009. Almost all the major forest chip suppliers in Finland were involved in the study. The total volume of forest chips supplied in 2009 by these suppliers was 8,4 TWh. The study was implemented by conducting an e-mail questionnaire survey and telephone interviews. Research data was collected from March-May, 2010. The majority of the logging residue chips and chips from small-diameter thinning wood were produced using the roadside chipping supply system in Finland in 2009. The chipping at plant supply system was also significant in the production of logging residue chips. Nearly 70 % of all stump wood chips consumed were comminuted at the plant and 28 % at terminals. The role of the terminal chipping supply system was also significant in the production of chips from logging residues and small-diameter wood chips. When producing chips from large-sized (rotten) roundwood, similarly roughly 70 % of chips were comminuted at plants and 23 % at terminals. (orig.)

  2. Supply chains of forest chip production in Finland

    Energy Technology Data Exchange (ETDEWEB)

    Kaerhae, Kalle (Metsaeteho Oy, Helsinki (Finland)), e-mail: kalle.karha@metsateho.fi

    2010-07-15

    The Metsaeteho study investigated how logging residue chips, stump wood chips, and chips from small sized thinning wood and large-sized (rotten) roundwood used by heating and power plants were produced in Finland in 2008. Almost all the major forest chip suppliers in Finland were involved in the study. The total volume of forest chips supplied in 2008 by these suppliers was 6.5 TWh. The study was implemented by conducting an e-mail questionnaire survey and telephone interviews. Research data was collected in March-May 2009. The majority of the logging residue chips and chips from small-sized thinning wood were produced using the roadside chipping supply chain in Finland in 2008. The chipping at plant supply chain was also significant in the production of logging residue chips. 70% of all stump wood chips consumed were comminuted at the plant and 29% at terminals. The role of the terminal chipping supply chain was also significant in the production of chips from logging residues and small-sized wood chips. When producing chips from large-sized (rotten) roundwood, nearly a half of chips were comminuted at plants and more than 40% at terminals

  3. Microchannel cooling of face down bonded chips

    Science.gov (United States)

    Bernhardt, Anthony F.

    1993-01-01

    Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

  4. Drop on demand in a microfluidic chip

    International Nuclear Information System (INIS)

    In this work, we introduce the novel technique of in-chip drop on demand, which consists in dispensing picoliter to nanoliter drops on demand directly in the liquid-filled channels of a polymer microfluidic chip, at frequencies up to 2.5 kHz and with precise volume control. The technique involves a PDMS chip with one or several microliter-size chambers driven by piezoelectric actuators. Individual aqueous microdrops are dispensed from the chamber to a main transport channel filled with an immiscible fluid, in a process analogous to atmospheric drop on demand dispensing. In this paper, the drop formation process is characterized with respect to critical dispense parameters such as the shape and duration of the driving pulse, and the size of both the fluid chamber and the nozzle. Several features of the in-chip drop on demand technique with direct relevance to lab-on-a-chip applications are presented and discussed, such as the precise control of the dispensed volume, the ability to merge drops of different reagents and the ability to move a drop from the shooting area of one nozzle to another for multistep reactions. The possibility to drive the microfluidic chip with inexpensive audio electronics instead of research-grade equipment is also examined and verified. Finally, we show that the same piezoelectric technique can be used to generate a single gas bubble on demand in a microfluidic chip

  5. Silicon Photonics: The System on Chip Perspective

    Science.gov (United States)

    Scandurra, Alberto

    This chapter describes possible applications of silicon photonics to the System on Chip (SoC) domain. Systems on Chip (SoCs) are complex systems containing billions of transistors integrated in a unique silicon-chip, implementing even complex functionalities by means of a variety of modules communicating with the system memories and/or between them through a proper communication system. The higher and higher integration density is becoming such that many issues arise when a SoC has to be integrated, and electrical limits of interconnect wires are a limiting factor for performance. According to this scenario, a new technology is required for the on-chip interconnect, in order to overcome current physical and performance issues; one possible solution is the optical interconnect, exploiting the many benefits of light to transport information across the chip. From an industrial point of view it is fundamental that such a new technology be fully CMOS compatible, in order to be able to continue to use current SoC design methodologies as well as present manufacturing equipment for the whole electronic part of the chip. Many semiconductor industries are today investigating such a novel field and a number of projects are currently running in order to demonstrate the feasibility of such a revolutionary on-chip communication system relying on both CMOS technology and photonics.

  6. Ex Vacuo Atom Chip Bose-Einstein Condensate (BEC)

    CERN Document Server

    Squires, Matthew B; Kasch, Brian; Stickney, James A; Erickson, Christopher J; Crow, Jonathan A R; Carlson, Evan J; Burke, John H

    2016-01-01

    Ex vacuo atom chips, used in conjunction with a custom thin walled vacuum chamber, have enabled the rapid replacement of atom chips for magnetically trapped cold atom experiments. Atoms were trapped in $>2$ kHz magnetic traps created using high power atom chips. The thin walled vacuum chamber allowed the atoms to be trapped $\\lesssim1$ mm from the atom chip conductors which were located outside of the vacuum system. Placing the atom chip outside of the vacuum simplified the electrical connections and improved thermal management. Using a multi-lead Z-wire chip design, a Bose-Einstein condensate was produced with an external atom chip. Vacuum and optical conditions were maintained while replacing the Z-wire chip with a newly designed cross-wire chip. The atom chips were exchanged and an initial magnetic trap was achieved in less than three hours.

  7. 75 FR 30046 - Medicaid and CHIP Programs; Meeting of the CHIP Working Group-June 14, 2010

    Science.gov (United States)

    2010-05-28

    ... published on May 1, 2009 (74 FR 20323). The CHIP Working Group will meet two times to develop a model... Administration Medicaid and CHIP Programs; Meeting of the CHIP Working Group-- June 14, 2010 AGENCY: Centers for... the second meeting of the Medicaid, Children's Health Insurance Program (``CHIP''), and...

  8. A multi-year survey of stem-end chip defect in chipping potatoes (Solanum tuberosum L.)

    Science.gov (United States)

    One of the most serious tuber quality concerns of US chip potato growers is stem-end chip defect, which is defined as a localized post-fry discoloration in and adjacent to the vasculature on the stem end portion of potato chips. The incidence and severity of stem-end chip defect vary with growing lo...

  9. METAL CHIP HEATING PROCESS INVESTIGATION (Part 3

    Directory of Open Access Journals (Sweden)

    O. M. Dyakonov

    2008-01-01

    Full Text Available The numerical solution algorithm of mathematical model of metal chip heating process in continuous muffle furnace and computer calculation program that allow to determine the heat- and mass transfer parameters have been worked out. The numerical modeling has been performed for three different lubricant-coolant compositions and six different furnace heights (all together 18 variants at the furnace productivity2000 kgof chip per hour. The main characteristics of chip heating process have been calculated. There was determined that the optimum furnace height at the point of its highest energy efficiency equals4,5 m. 

  10. Imaging Cold Molecules on a Chip

    CERN Document Server

    Marx, S; Abel, M J; Zehentbauer, T; Meijer, G; Santambrogio, G

    2013-01-01

    We present the integrated imaging of cold molecules in a microchip environment. The on-chip de- tection is based on REMPI, which is quantum-state-selective and generally applicable. We demon- strate and characterize time-resolved spatial imaging and subsequently use it to analyze the effect of a phase-space manipulation sequence aimed at compressing the velocity distribution of a molec- ular ensemble with a view to future high-resolution spectroscopic studies. The realization of such on-chip measurements adds the final fundamental component to the molecule chip, offering a new and promising route for investigating cold molecules.

  11. ToxChip and its applications

    Institute of Scientific and Technical Information of China (English)

    2001-01-01

    @@\tToxChip is the molecular biological technology which has been developed based on genome and DNA microarray technologies. It will be able to make the sci-entists evaluate the toxicity of extraneous toxicants at the molecular level. ToxChip was successfully developed by a group of the National Institute of Environmental Health Sciences (NIEHS) researchers in the United States in 1999[1]. The technology bears revolutionary significance on the traditional toxicology. It foretells the epoch in which DNA effects of environmental dangers and toxi-cants can be made certain rapidly and efficiently to fall. ToxChip will pioneer novel approaches for medicine, environmental and ecological toxicologies.

  12. Flit Synchronous Aelite Network on Chip

    OpenAIRE

    Subburaman, Mahesh Balaji

    2008-01-01

      The deep sub micron process technology and application convergence increases the design challenges in System-on-Chip (SoC). The traditional bus based on chip communication are not scalable and fails to deliver the performance requirements of the complex SoC. The Network on Chip (NoC) has been emerged as a solution to address these complexities of a efficient, high performance, scalable SoC design. The Aethereal NoC provides the latency and throughput bounds by pipelined timedivision multipl...

  13. Chip integrated fuel cell accumulator

    Science.gov (United States)

    Frank, M.; Erdler, G.; Frerichs, H.-P.; Müller, C.; Reinecke, H.

    A unique new design of a chip integrated fuel cell accumulator is presented. The system combines an electrolyser and a self-breathing polymer electrolyte membrane (PEM) fuel cell with integrated palladium hydrogen storage on a silicon substrate. Outstanding advantages of this assembly are the fuel cell with integrated hydrogen storage, the possibility of refuelling it by electrolysis and the opportunity of simply refilling the electrolyte by adding water. By applying an electrical current, wiring the palladium hydrogen storage as cathode and the counter-electrode as anode, the electrolyser produces hydrogen at the palladium surface and oxygen at the electrolyser cell anode. The generated hydrogen is absorbed by the palladium electrode and the hydrogen storage is refilled consequently enabling the fuel cell to function.

  14. Chip integrated fuel cell accumulator

    Energy Technology Data Exchange (ETDEWEB)

    Frank, M.; Mueller, C.; Reinecke, H. [Laboratory for Process Technology, IMTEK-Department of Microsystems Engineering, University of Freiburg, Georges-Koehler-Allee 103, 79110 Freiburg (Germany); Erdler, G.; Frerichs, H.-P. [Micronas GmbH, Hans-Bunte-Strasse 19, Freiburg (Germany)

    2008-07-01

    A unique new design of a chip integrated fuel cell accumulator is presented. The system combines an electrolyser and a self-breathing polymer electrolyte membrane (PEM) fuel cell with integrated palladium hydrogen storage on a silicon substrate. Outstanding advantages of this assembly are the fuel cell with integrated hydrogen storage, the possibility of refuelling it by electrolysis and the opportunity of simply refilling the electrolyte by adding water. By applying an electrical current, wiring the palladium hydrogen storage as cathode and the counter-electrode as anode, the electrolyser produces hydrogen at the palladium surface and oxygen at the electrolyser cell anode. The generated hydrogen is absorbed by the palladium electrode and the hydrogen storage is refilled consequently enabling the fuel cell to function. (author)

  15. On-chip spiral spectrometer

    CERN Document Server

    Redding, Brandon; Bromberg, Yaron; Sarma, Raktim; Cao, Hui

    2016-01-01

    We designed an on-chip spectrometer based on an evanescently-coupled multimode spiral waveguide. Interference between the modes in the waveguide forms a wavelength-dependent speckle pattern which can be used as a fingerprint to identify the input wavelength after calibration. Evanescent coupling between neighboring arms of the spiral enhances the temporal spread of light propagating through the spiral, leading to a dramatic increase in the spectral resolution. Experimentally, we demonstrated that a 250 {\\mu}m radius spiral spectrometer provides a resolution of 0.01 nm at a wavelength of 1520 nm. Spectra containing 40 independent spectral channels can be recovered simultaneously and the operation bandwidth can be increased further when measuring sparse spectra.

  16. Attachment method for stacked integrated circuit (IC) chips

    Science.gov (United States)

    Bernhardt, Anthony F.; Malba, Vincent

    1999-01-01

    An attachment method for stacked integrated circuit (IC) chips. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM.

  17. On-chip positionable photonic waveguides for chip-to-chip optical interconnects

    Science.gov (United States)

    Peters, Tjitte-Jelte; Tichem, Marcel

    2016-05-01

    This paper reports on the progress related to a multichannel photonic alignment concept, aiming for sub-micrometer precision in the alignment of the waveguides of two photonic integrated circuits (PICs). The concept consists of two steps: chip-to-chip positioning and chip bonding provide a coarse alignment after which waveguide-to-waveguide positioning and fixing result in a fine alignment. For the waveguide-to-waveguide alignment, an alignment functionality is developed and integrated in one of the PICs, consisting of mechanically flexible waveguides and MEMS actuators. This paper reports on the fabrication and characterization of a mechanically flexible waveguide array that can be positioned by two out-of-plane actuators. Thermal actuators are integrated with mechanically flexible waveguide beams to enable positioning them with high precision. By adding a poly-Si pattern on top of SiO2 beams, an out-of-plane bimorph actuator can be realized. An analytical model enables estimating the curvature and the deflection of a single bimorph beam. Acquiring a small initial deflection while having a large motion range of the actuator proves to have conflicting demands on the poly-Si/SiO2 thickness ratio. In this paper, we show that suspended waveguide arrays with integrated alignment functionality have an initial deflection- they curl up- due to residual stress in the materials. The actuators can be operated using a driving voltage between 0V to 45V, corresponding to ~50mW. Using higher voltages brings the risk of permanently changing the material properties of the heaters. The actuators can accomplish an out-of-plane crossbar translation up to 6.5 μm at ~50mW as well as a rotation around the propagation direction of the light ranging from -0:1° to 0.1°. At a constant actuation power of ~50mW, the crossbar shows a drift in vertical deflection of 0.16 μm over a time of 30 min.

  18. On-chip power delivery and management

    CERN Document Server

    Vaisband, Inna P; Popovich, Mikhail; Mezhiba, Andrey V; Köse, Selçuk; Friedman, Eby G

    2016-01-01

    This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

  19. Spacecraft on a Chip Development Project

    Data.gov (United States)

    National Aeronautics and Space Administration — System on a chip is a method to increase engineering efficiency. State of the art components are increasing in gate count as expected according to Moore’s...

  20. A Chip for an Implantable Neural Stimulator

    DEFF Research Database (Denmark)

    Gudnason, Gunnar; Bruun, Erik; Haugland, Morten

    2000-01-01

    This paper describes a chip for a multichannel neural stimulator for functional electrical stimulation (FES). The purpose of FES is to restore muscular control in disabled patients. The chip performs all the signal processing required in an implanted neural stimulator. The power and digital data...... transmission to the stimulator passes through a 5 MHz inductive link. From the signals transmitted to the stimulator, the chip is able to generate charge-balanced current pulses with a controllable length up to 256 µs and an amplitude up to 2 mA, for stimulation of nerve fibers. The quiescent current...... consumption of the chip is approx. 650 µA at supply voltages of 6–12 V, and its size is 3.9×3.5 mm2. It has 4 output channels for use in a multipolar cuff electrode....

  1. Medicaid CHIP Environmental Scanning and Program Char...

    Data.gov (United States)

    U.S. Department of Health & Human Services — ESPC development is sponsored by the CMS Center for Medicare and Medicaid Innovation in partnership with the Center for Medicaid and CHIP Services (CMCS) under the...

  2. Link between chips and cutting moments evolution

    CERN Document Server

    Cahuc, Olivier; Gérard, Alain; 10.4028/WWW.scientific.net/AMR.423.89

    2012-01-01

    The better understanding of the material cutting process has been shown with the benefit of the forces and moments measurement since some years ago. In paper, simultaneous six mechanical components and chip orientation measurements were realized during turning tests. During these tests, the influence of the depth of cut or feed rate has been observed and a link between the chip orientation and the moment vector orientation or the central axis characteristics has been shown.

  3. Open Tiled Manycore System-on-Chip

    OpenAIRE

    Wallentowitz, Stefan; Wagner, Philipp; Tempelmeier, Michael; Wild, Thomas; Herkersdorf, Andreas

    2013-01-01

    Manycore System-on-Chip include an increasing amount of processing elements and have become an important research topic for improvements of both hardware and software. While research can be conducted using system simulators, prototyping requires a variety of components and is very time consuming. With the Open Tiled Manycore System-on-Chip (OpTiMSoC) we aim at building such an environment for use in our and other research projects as prototyping platform. This paper describes the project goal...

  4. Surface enhanced raman spectroscopy on chip

    DEFF Research Database (Denmark)

    Hübner, Jörg; Anhøj, Thomas Aarøe; Zauner, Dan;

    2007-01-01

    In this paper we report low resolution surface enhanced Raman spectra (SERS) conducted with a chip based spectrometer. The flat field spectrometer presented here is fabricated in SU-8 on silicon, showing a resolution of around 3 nm and a free spectral range of around 100 nm. The output facet...... fiber. The obtained spectra show that chip based spectrometer together with the SERS active surface can be used as Raman sensor....

  5. Materials for microfluidic chip fabrication.

    Science.gov (United States)

    Ren, Kangning; Zhou, Jianhua; Wu, Hongkai

    2013-11-19

    Through manipulating fluids using microfabricated channel and chamber structures, microfluidics is a powerful tool to realize high sensitive, high speed, high throughput, and low cost analysis. In addition, the method can establish a well-controlled microenivroment for manipulating fluids and particles. It also has rapid growing implementations in both sophisticated chemical/biological analysis and low-cost point-of-care assays. Some unique phenomena emerge at the micrometer scale. For example, reactions are completed in a shorter amount of time as the travel distances of mass and heat are relatively small; the flows are usually laminar; and the capillary effect becomes dominant owing to large surface-to-volume ratios. In the meantime, the surface properties of the device material are greatly amplified, which can lead to either unique functions or problems that we would not encounter at the macroscale. Also, each material inherently corresponds with specific microfabrication strategies and certain native properties of the device. Therefore, the material for making the device plays a dominating role in microfluidic technologies. In this Account, we address the evolution of materials used for fabricating microfluidic chips, and discuss the application-oriented pros and cons of different materials. This Account generally follows the order of the materials introduced to microfluidics. Glass and silicon, the first generation microfluidic device materials, are perfect for capillary electrophoresis and solvent-involved applications but expensive for microfabriaction. Elastomers enable low-cost rapid prototyping and high density integration of valves on chip, allowing complicated and parallel fluid manipulation and in-channel cell culture. Plastics, as competitive alternatives to elastomers, are also rapid and inexpensive to microfabricate. Their broad variety provides flexible choices for different needs. For example, some thermosets support in-situ fabrication of

  6. Advanced Flip Chips in Extreme Temperature Environments

    Science.gov (United States)

    Ramesham, Rajeshuni

    2010-01-01

    The use of underfill materials is necessary with flip-chip interconnect technology to redistribute stresses due to mismatching coefficients of thermal expansion (CTEs) between dissimilar materials in the overall assembly. Underfills are formulated using organic polymers and possibly inorganic filler materials. There are a few ways to apply the underfills with flip-chip technology. Traditional capillary-flow underfill materials now possess high flow speed and reduced time to cure, but they still require additional processing steps beyond the typical surface-mount technology (SMT) assembly process. Studies were conducted using underfills in a temperature range of -190 to 85 C, which resulted in an increase of reliability by one to two orders of magnitude. Thermal shock of the flip-chip test articles was designed to induce failures at the interconnect sites (-40 to 100 C). The study on the reliability of flip chips using underfills in the extreme temperature region is of significant value for space applications. This technology is considered as an enabling technology for future space missions. Flip-chip interconnect technology is an advanced electrical interconnection approach where the silicon die or chip is electrically connected, face down, to the substrate by reflowing solder bumps on area-array metallized terminals on the die to matching footprints of solder-wettable pads on the chosen substrate. This advanced flip-chip interconnect technology will significantly improve the performance of high-speed systems, productivity enhancement over manual wire bonding, self-alignment during die joining, low lead inductances, and reduced need for attachment of precious metals. The use of commercially developed no-flow fluxing underfills provides a means of reducing the processing steps employed in the traditional capillary flow methods to enhance SMT compatibility. Reliability of flip chips may be significantly increased by matching/tailoring the CTEs of the substrate

  7. Flip chip assembly of thinned chips for hybrid pixel detector applications

    CERN Document Server

    Fritzsch, T; Woehrmann, M; Rothermund, M; Huegging, F; Ehrmann, O; Oppermann, H; Lang, K.D

    2014-01-01

    There is a steady trend to ultra-thin microelectronic devices. Especially for future particle detector systems a reduced readout chip thickness is required to limit the loss of tracking precision due to scattering. The reduction of silicon thickness is performed at wafer level in a two-step thinning process. To minimize the risk of wafer breakage the thinned wafer needs to be handled by a carrier during the whole process chain of wafer bumping. Another key process is the flip chip assembly of thinned readout chips onto thin sensor tiles. Besides the prevention of silicon breakage the minimization of chip warpage is one additional task for a high yield and reliable flip chip process. A new technology using glass carrier wafer will be described in detail. The main advantage of this technology is the combination of a carrier support during wafer processing and the chip support during flip chip assembly. For that a glass wafer is glue-bonded onto the backside of the thinned readout chip wafer. After the bump depo...

  8. Fabrication technology of integrated fiber microfluidic electrophoresis chip

    Institute of Scientific and Technical Information of China (English)

    LI MengChun

    2007-01-01

    The technology of PCB was used to fabricate the chip mould, and the microfluidic electrophoresis chip was fabricated with PDMS material. The fiber integrated on the chip was used as the transmission medium, so the light spot size was near the depth of microchannel. The detection sensitivity was improved, and the optical focusing system was spared. The fabrication process, sealing methods and structure characteristic of PDMS microfluidic electrophoresis chips were discussed. The experiment was achieved by using the fabricated chip to separate FITC fluorescein and FITC-labeled amino acid mixture reagent, and the feasibility of the chip was validated.

  9. On-chip liquid storage and dispensing for lab-on-a-chip applications

    International Nuclear Information System (INIS)

    This work presents novel components for on-chip storage and dispensing inside a lab-on-a-chip (LOC) for applications in immunoassay point-of-care testing (POCT), where incubation and washing steps are essential. It involves easy-to-use on-chip solutions for the sequential thermo-hydraulic actuation of liquids. The novel concept of combining the use of a rubber plug, both as a non-return valve cap and as a liquid injection interface of a sealed reservoir, allows simple filling of a sterilized cavity, as well as the storage and dispensing of reagent and washing buffer liquids. Segmenting the flow with air spacers enables effective rinsing and the use of small volumes of on-chip stored liquids. The chip uses low-resistance resistors as heaters in the paraffin actuator, providing the low-voltage actuation that is preferred for handheld battery driven instruments

  10. Discovery Mondays: Chips with everything!

    CERN Multimedia

    2003-01-01

    Electronics to hear the sound of matter From the TV to the fridge, the wristwatch to the washing machine, hardly any consumer product in this day and age can escape the influence of electronics, and the ever more powerful microchip. So it's hardly surprising to learn that such sophisticated devices as particle detectors are bristling with the best and most powerful microchips technology has to offer! Particle detectors known as trackers are like 3-D digital cameras. They are used to detect the tracks of particles created in the accelerator and to pin down their momentum and thus their identity. A chip seen with a microscope.Come to Microcosm and see with your own eyes a silicon detector, packed full of electronic microchips. Get up closer with a microscope and admire the way in which the fine details of the etchings break down light. Further on, watch a TV as you've never done before - from the inside! Then try out our special simulation game that helps you understand the purpose of a particle detector. Bu...

  11. An analog CMOS chip set for neural networks with arbitrary topologies

    OpenAIRE

    Lansner, John; Lehmann, Torsten

    1993-01-01

    An analog CMOS chip set for implementations of artificial neural networks (ANNs) has been fabricated and tested. The chip set consists of two cascadable chips: a neuron chip and a synapse chip. Neurons on the neuron chips can be interconnected at random via synapses on the synapse chips thus implementing an ANN with arbitrary topology. The neuron test chip contains an array of 4 neurons with well defined hyperbolic tangent activation functions which is implemented by using parasitic lateral b...

  12. Assessment of Deformation of Shear Localized Chip in High Speed Machining

    Institute of Scientific and Technical Information of China (English)

    T; C; LEE; W; S; LAU; S; K; CHAN

    2002-01-01

    As the cutting speed goes higher, the mechanism of chip deformation will be changed significantly, i.e., continuous chip in low cutting speed will shift to serrated chip with shear localization. For the shear localized chip, the parameters used to assess the chip deformation for continuous chip, such as shorten coefficient ξ, shear angle φ and shear strain ε, can not describe the chip deformation correctly or comprehensively. This paper deals with the assessment of chip deformation of shear localization. Th...

  13. Experiment list: SRX112178 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available line=OS25 ES cells || chip antibody=8WG16 (MMS-126R, Covance) || chip antibody manufacturer=Covance || chromatin=Fixed || beads=Magn...etic beads http://dbarchive.biosciencedbc.jp/kyushu-u/mm

  14. The single chip microcomputer technique in an intelligent nuclear instrument

    International Nuclear Information System (INIS)

    The authors present that how to acquire and process the output signals from the nuclear detector adopting single chip microcomputer technique, including working principles and the designing method of the computer's software and hardware in the single chip microcomputer instrument

  15. Experiment list: SRX180159 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available sd || cell type=hemogenic endothelium || chip antibody=CEBPb || chip antibody vendor=santa cruz biotechnol...ogy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachData/bw/SRX180159.bw http://

  16. Experiment list: SRX352043 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available technologies http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachData/bw/SRX352043.b...e primary epidermal keratinocytes || chip antibody=anti-Brg1 (H-88) || chip antibody vendor=Santa Cruz Bio

  17. Experiment list: SRX367328 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nology) || sirna transfection=siCTL http://dbarchive.bio...=HEK293T cell || cell line=Human Embryonic Kidney 293 cells || chip antibody=CDK9 || chip antibody details=2316S (Cell Signaling Tech

  18. Experiment list: SRX367330 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nology) || sirna transfection=siBrd4 http://dbarchive.bi...=HEK293T cell || cell line=Human Embryonic Kidney 293 cells || chip antibody=CDK9 || chip antibody details=2316S (Cell Signaling Tech

  19. Experiment list: SRX367329 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available hnology) || sirna transfection=siJMJD6 http://dbarchive....e=HEK293T cell || cell line=Human Embryonic Kidney 293 cells || chip antibody=CDK9 || chip antibody details=2316S (Cell Signaling Tec

  20. Experiment list: SRX821820 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnolog...ies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/each

  1. Experiment list: SRX821806 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnolog...ies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/each

  2. Experiment list: SRX821815 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnolog...ies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/each

  3. Experiment list: SRX821812 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnolo...gies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/eac

  4. Experiment list: SRX821821 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnolog...ies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/each

  5. Experiment list: SRX821809 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnolog...ies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/each

  6. Novel High Pressure Pump-on-a-Chip Technology Project

    Data.gov (United States)

    National Aeronautics and Space Administration — HJ Science & Technology, Inc proposes to develop a novel high pressure "pump-on-a-chip" and "valve-on-a-chip" microfluidic technology for NASA planetary science...

  7. Performance and Energy Efficient Network-on-Chip Architectures

    OpenAIRE

    Vangal, Sriram

    2007-01-01

    The scaling of MOS transistors into the nanometer regime opens the possibility for creating large Network-on-Chip (NoC) architectures containing hundreds of integrated processing elements with on-chip communication. NoC architectures, with structured on-chip networks are emerging as a scalable and modular solution to global communications within large systems-on-chip. NoCs mitigate the emerging wire-delay problem and addresses the need for substantial interconnect bandwidth by replacing today...

  8. CHIPS: The Cosmological HI Power Spectrum Estimator

    CERN Document Server

    Trott, Cathryn M; Procopio, Pietro; Wayth, Randall B; Mitchell, Daniel A; McKinley, Benjamin; Tingay, Steven J; Barry, N; Beardsley, A P; Bernardi, G; Bowman, Judd D; Briggs, F; Cappallo, R J; Carroll, P; de Oliveira-Costa, A; Dillon, Joshua S; Ewall-Wice, A; Feng, L; Greenhill, L J; Hazelton, B J; Hewitt, J N; Hurley-Walker, N; Johnston-Hollitt, M; Jacobs, Daniel C; Kaplan, D L; Kim, HS; Lenc, E; Line, J; Loeb, A; Lonsdale, C J; Morales, M F; Morgan, E; Neben, A R; Thyagarajan, Nithyanandan; Oberoi, D; Offringa, A R; Ord, S M; Paul, S; Pober, J C; Prabu, T; Riding, J; Shankar, N Udaya; Sethi, Shiv K; Srivani, K S; Subrahmanyan, R; Sullivan, I S; Tegmark, M; Webster, R L; Williams, A; Williams, C L; Wu, C; Wyithe, J S B

    2016-01-01

    Detection of the cosmological neutral hydrogen signal from the Epoch of Reionization, and estimation of its basic physical parameters, is the principal scientific aim of many current low-frequency radio telescopes. Here we describe the Cosmological HI Power Spectrum Estimator (CHIPS), an algorithm developed and implemented with data from the Murchison Widefield Array (MWA), to compute the two-dimensional and spherically-averaged power spectrum of brightness temperature fluctuations. The principal motivations for CHIPS are the application of realistic instrumental and foreground models to form the optimal estimator, thereby maximising the likelihood of unbiased signal estimation, and allowing a full covariant understanding of the outputs. CHIPS employs an inverse-covariance weighting of the data through the maximum likelihood estimator, thereby allowing use of the full parameter space for signal estimation ("foreground suppression"). We describe the motivation for the algorithm, implementation, application to ...

  9. A compact PE memory for vision chips

    International Nuclear Information System (INIS)

    This paper presents a novel compact memory in the processing element (PE) for single-instruction multiple-data (SIMD) vision chips. The PE memory is constructed with 8 × 8 register cells, where one latch in the slave stage is shared by eight latches in the master stage. The memory supports simultaneous read and write on the same address in one clock cycle. Its compact area of 14.33 μm2/bit promises a higher integration level of the processor. A prototype chip with a 64 × 64 PE array is fabricated in a UMC 0.18 μm CMOS technology. Five types of the PE memory cell structure are designed and compared. The testing results demonstrate that the proposed PE memory architecture well satisfies the requirement of the vision chip in high-speed real-time vision applications, such as 1000 fps edge extraction. (semiconductor integrated circuits)

  10. Variation Tolerant On-Chip Interconnects

    CERN Document Server

    Nigussie, Ethiopia Enideg

    2012-01-01

    This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.                          

  11. Rehydration characteristics and modeling of cassava chips

    Directory of Open Access Journals (Sweden)

    Ajala, A.S

    2015-05-01

    Full Text Available Cassava chips with dimension 4x2x0.2cm were re-hydrated in distilled water at 200C, 300C and 400C in a laboratory water bath. Kinetics of re-hydration was investigated using three different re-hydration models namely Peleg, exponential and Weibull. The pattern of water absorption was observed to be faster at the initial period of soaking. Higher temperature induces faster moisture absorption in the chips. Non linear regression analysis was used to fit in the experimental data and the coefficient of determination was found to be greater than 0.72 for all the models. The values of R2 , RMSE, MBE and reduced chi square showed that Weibull model best described the re-hydrating behaviour of the cassava chips.

  12. On-chip electro membrane extraction

    DEFF Research Database (Denmark)

    Petersen, Nickolaj Jacob; Jensen, Henrik; Hansen, Steen Honore;

    2010-01-01

    This paper presents the first downscaling of electro membrane extraction (EME) to a chip format. The voltage-controlled extraction for sample preparation on microfluidic devices has several advantages such as selective extraction removing the high ionic strength of biological samples, preconcentr......This paper presents the first downscaling of electro membrane extraction (EME) to a chip format. The voltage-controlled extraction for sample preparation on microfluidic devices has several advantages such as selective extraction removing the high ionic strength of biological samples...... basic drugs were selectively extracted from the flowing sample solution, into the organic phase SLM, and further into just 7 mu I of 10 mM HCI, serving as acceptor solution. Subsequently, the acceptor solution was analyzed by capillary electrophoresis. The electro membrane chip was highly efficient...

  13. Wireless network-on-chip: a survey

    Directory of Open Access Journals (Sweden)

    Shuai Wang

    2014-04-01

    Full Text Available To alleviate the complex communication problems arising in the network-on-chip (NoC architectures as the number of on-chip components increases, several novel interconnect infrastructures have been recently proposed to replace the traditional on-chip interconnection systems that are reaching their limits in terms of performance, power and area constraints. Wireless NoC (WiNoC is among the most promising scalable interconnection architectures for future generation NoCs. In this study, the authors first provide a general description of the WiNoC architecture. Then, they discuss the research problems under five categories: topology, routing, flow control, antenna and reliability. Open research issues for the realisation of the WiNoC are also discussed.

  14. Lab-on a-Chip

    Science.gov (United States)

    1999-01-01

    Labs on chips are manufactured in many shapes and sizes and can be used for numerous applications, from medical tests to water quality monitoring to detecting the signatures of life on other planets. The eight holes on this chip are actually ports that can be filled with fluids or chemicals. Tiny valves control the chemical processes by mixing fluids that move in the tiny channels that look like lines, connecting the ports. Scientists at NASA's Marshall Space Flight Center (MSFC) in Huntsville, Alabama designed this chip to grow biological crystals on the International Space Station (ISS). Through this research, they discovered that this technology is ideally suited for solving the challenges of the Vision for Space Exploration. For example, thousands of chips the size of dimes could be loaded on a Martian rover looking for biosignatures of past or present life. Other types of chips could be placed in handheld devices used to monitor microbes in water or to quickly conduct medical tests on astronauts. The portable, handheld Lab-on-a Chip Application Development Portable Test System (LOCAD-PTS) made its debut flight aboard Discovery during the STS-116 mission launched December 9, 2006. The system allowed crew members to monitor their environment for problematic contaminants such as yeast, mold, and even E.coli, and salmonella. Once LOCAD-PTS reached the ISS, the Marshall team continued to manage the experiment, monitoring the study from a console in the Payload Operations Center at MSFC. The results of these studies will help NASA researchers refine the technology for future Moon and Mars missions. (NASA/MSFC/D.Stoffer)

  15. Biostability of an implantable glucose sensor chip

    International Nuclear Information System (INIS)

    Surface materials of an implantable microelectronic chip intended for medical applications were evaluated with respect to their long-term stability in bio-environments. The sensor chip shall apply in a glucose monitor by operating as a microviscosimeter according to the principle of affinity viscosimetry. A monolithic integration of a microelectromechanical system (MEMS) into the sensor chip was successfully performed in a combined 0.25 μm CMOS/BiCMOS technology. In order to study material durability and biostability of the surfaces, sensor chips were exposed to various in vitro and in vivo tests. Corrosional damage of SiON, SiO2 and TiN surfaces was investigated by optical microscopy, ellipsometry and AFM. The results served for optimizing the Back-end-of-Line (BEoL) stack, from which the MEMS was prepared. Corrosion of metal lines could significantly be reduced by improving the topmost passivation layer. The experiments revealed no visible damage of the actuator or other functionally important MEMS elements. Sensor chips were also exposed to human body fluid for three month by implantation into the abdomen of a volunteer. Only small effects were observed for layer thickness and Ra roughness after explantation. In particular, TiN as used for the actuator beam showed no degradation by biocorrosion. The highest degradation rate of about 50 nm per month was revealed for the SiON passivation layer. These results suggest that the sensor chip may safely operate in subcutaneous tissue for a period of several months.

  16. A simple clockless Network-on-Chip for a commercial audio DSP chip

    DEFF Research Database (Denmark)

    Stensgaard, Mikkel Bystrup; Bjerregaard, Tobias; Sparsø, Jens;

    2006-01-01

    We design a very small, packet-switched, clockless Network-on-Chip (NoC) as a replacement for the existing crossbar-based communication infrastructure in a commercial audio DSP chip. Both solutions are laid out in a 0.18 um process, and compared in terms of area, power consumption and routing...... complexity. Even though the NoC turns out to be larger and more power consuming than the existing crossbar implementation, it still accounts for less than 1% of the total chip area and power consumption, and is justified by a long list of advantages: The NoC is modular, scalable, and in contrast...

  17. Wood chip delivery and research project at Mikkeli region

    International Nuclear Information System (INIS)

    In 1994, a large-scale energywood production chain was started as a co-operation project by the Mikkeli city forest office and local forestry societies. Over 60 000 m3 (about 46 000 MWh of energy) of forest processed chips were delivered to Pursiala heat and power plant in Mikkeli. About 60 % of these chips was whole tree chips from improvement cuttings of young forest stands and the rest was logging waste chips from regeneration cutting areas. The average total delivery costs of forest processed chips after reduction of energywood and other subsidies were approximately 51 FIM/m3 (68 FIM/MWh) for the whole tree chips and 40 FIM/m3 (53 FIM/MWh) for logging waste chips. The delivery costs of wood chips could compete with those of fuel peat only in the most favourable cases. The resources of forest processed chips were studied on the basis of forestry plans. According to the study, there is enough raw material for permanent, large-scale delivery of forest processed chips (up to 250 000 m3/a) in the forests located at a distance of under 40 road kilometers from the Pursiala heat and power plant. The following project stages will involve further development of the wood chip delivery chain logistics, as well as improvement of logging and chipping equipment and methods in energywood and logging waste production. Also the effects of wood energy production on the economy and environment of the whole Mikkeli region will be studied. (author)

  18. Chip-size-packaged silicon microphones [for hearing instruments

    DEFF Research Database (Denmark)

    Müllenborn, Matthias; Rombach, Pirmin; Klein, Udo;

    2001-01-01

    The first results of silicon microphones that are completely batch-packaged and integrated with signal conditioning circuitry in a chip stack are discussed. The chip stack is designed to be directly mounted into a system, such as a hearing instrument, without further single-chip handling or wire...

  19. Optical stretching on chip with acoustophoretic prefocusing

    DEFF Research Database (Denmark)

    Khoury Arvelo, Maria; Laub Busk, L.; Bruus, Henrik;

    2012-01-01

    prefocusing. This focusing mechanism aims for target particles to always ow in the correct height relative to the optical stretcher, and is induced by a piezo-electric ultrasound transducer attached underneath the chip and driven at a frequency leading to a vertical standing ultrasound wave...... in the microchannel. Trapping and manipulation is demonstrated for dielectric beads. In addition, we show trapping, manipulation and stretching of red blood cells and vesicles, whereby we extract the elastic properties of these objects. Our design points towards the construction of a low-cost, high-throughput lab-on-a-chip...

  20. Wireless Interconnect for Board and Chip Level

    OpenAIRE

    Fettweis, Gerhard P.; ul Hassan, Najeeb; Landau, Lukas; Fischer, Erik

    2013-01-01

    Electronic systems of the future require a very high bandwidth communications infrastructure within the system. This way the massive amount of compute power which will be available can be inter-connected to realize future powerful advanced electronic systems. Today, electronic inter-connects between 3D chip-stacks, as well as intra-connects within 3D chip-stacks are approaching data rates of 100 Gbit/s soon. Hence, the question to be answered is how to efficiently design the communications in...

  1. Microfluidic chip-capillary electrophoresis devices

    CERN Document Server

    Fung, Ying Sing; Du, Fuying; Guo, Wenpeng; Ma, Tongmei; Nie, Zhou; Sun, Hui; Wu, Ruige; Zhao, Wenfeng

    2015-01-01

    Capillary electrophoresis (CE) and microfluidic chip (MC) devices are relatively mature technologies, but this book demonstrates how they can be integrated into a single, revolutionary device that can provide on-site analysis of samples when laboratory services are unavailable. By introducing the combination of CE and MC technology, Microfluidic Chip-Capillary Electrophoresis Devices broadens the scope of chemical analysis, particularly in the biomedical, food, and environmental sciences.The book gives an overview of the development of MC and CE technology as well as technology that now allows

  2. Plasmonics: the next chip-scale technology

    Directory of Open Access Journals (Sweden)

    Rashid Zia

    2006-07-01

    Full Text Available The development of chip-scale electronics and photonics has led to remarkable data processing and transport capabilities that permeate almost every facet of our lives. Plasmonics is an exciting new device technology that has recently emerged. It exploits the unique optical properties of metallic nanostructures to enable routing and manipulation of light at the nanoscale. A tremendous synergy can be attained by integrating plasmonic, electronic, and conventional dielectric photonic devices on the same chip and taking advantage of the strengths of each technology.

  3. 75 FR 16149 - Medicaid and CHIP Programs; Meeting of the CHIP Working Group-April 26, 2010

    Science.gov (United States)

    2010-03-31

    ... nominations submitted in response to a Federal Register solicitation notice published on May 1, 2009 (74 FR... Administration Medicaid and CHIP Programs; Meeting of the CHIP Working Group-- April 26, 2010 AGENCIES: Centers... announces the first meeting of the Medicaid, Children's Health Insurance Program (``CHIP''), and...

  4. The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture

    CERN Document Server

    Biagioni, Andrea; Lonardo, Alessandro; Paolucci, Pier Stanislao; Perra, Mersia; Rossetti, Davide; Sidore, Carlo; Simula, Francesco; Tosoratto, Laura; Vicini, Piero

    2012-01-01

    One of the most demanding challenges for the designers of parallel computing architectures is to deliver an efficient network infrastructure providing low latency, high bandwidth communications while preserving scalability. Besides off-chip communications between processors, recent multi-tile (i.e. multi-core) architectures face the challenge for an efficient on-chip interconnection network between processor's tiles. In this paper, we present a configurable and scalable architecture, based on our Distributed Network Processor (DNP) IP Library, targeting systems ranging from single MPSoCs to massive HPC platforms. The DNP provides inter-tile services for both on-chip and off-chip communications with a uniform RDMA style API, over a multi-dimensional direct network with a (possibly) hybrid topology.

  5. Simulating the Effect of Modulated Tool-Path Chip Breaking On Surface Texture and Chip Length

    Energy Technology Data Exchange (ETDEWEB)

    Smith, K.S.; McFarland, J.T.; Tursky, D. A.; Assaid, T. S.; Barkman, W. E.; Babelay, Jr., E. F.

    2010-04-30

    One method for creating broken chips in turning processes involves oscillating the cutting tool in the feed direction utilizing the CNC machine axes. The University of North Carolina at Charlotte and the Y-12 National Security Complex have developed and are refining a method to reliably control surface finish and chip length based on a particular machine's dynamic performance. Using computer simulations it is possible to combine the motion of the machine axes with the geometry of the cutting tool to predict the surface characteristics and map the surface texture for a wide range of oscillation parameters. These data allow the selection of oscillation parameters to simultaneously ensure broken chips and acceptable surface characteristics. This paper describes the machine dynamic testing and characterization activities as well as the computational method used for evaluating and predicting chip length and surface texture.

  6. Cool down computer chips with liquid metal device driven by the heat of chips

    Institute of Scientific and Technical Information of China (English)

    2008-01-01

    @@ With the soaring advances in computational speed, thermal management becomes a major concern in computer systems. To remove heat generated by computer chips or very large scale integrated circuits, a research team headed by Prof.

  7. A Neuron- and a Synapse Chip for Artificial Neural Networks

    OpenAIRE

    Lansner, John; Lehmann, Torsten

    1992-01-01

    A cascadable, analog, CMOS chip set has been developed for hardware implementations of artificial neural networks (ANN's):I) a neuron chip containing an array of neurons with hyperbolic tangent activation functions and adjustable gains, and II) a synapse chip (or a matrix-vector multiplier) where the matrix is stored on-chip as differential voltages on capacitors. In principal any ANN configuration can be made using these chips. A neuron array of 4 neurons and a 4 × 4 matrix-vector multiplie...

  8. Integrated magneto-optical traps on a chip

    OpenAIRE

    Pollock, S.; Cotter, J. P.; Laliotis, A.; Hinds, E. A.

    2009-01-01

    We have integrated magneto-optical traps (MOTs) into an atom chip by etching pyramids into a silicon wafer. These have been used to trap atoms on the chip, directly from a room temperature vapor of rubidium. This new atom trapping method provides a simple way to integrate several atom sources on the same chip. It represents a substantial advance in atom chip technology and offers new possibilities for atom chip applications such as integrated single atom or photon sources and molecules on a c...

  9. An automatic system for elaboration of chip breaking diagrams

    DEFF Research Database (Denmark)

    Andreasen, Jan Lasson; De Chiffre, Leonardo

    1998-01-01

    A laboratory system for fully automatic elaboration of chip breaking diagrams has been developed and tested. The system is based on automatic chip breaking detection by frequency analysis of cutting forces in connection with programming of a CNC-lathe to scan different feeds, speeds and cutting...... depths. An evaluation of the system based on a total of 1671 experiments has shown that unfavourable snarled chips can be detected with 98% certainty which indeed makes the system a valuable tool in chip breakability tests. Using the system, chip breaking diagrams can be elaborated with a previously...

  10. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif

    2012-07-28

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  11. Recycling of steel chips: Recikliranje jeklenih ostružkov:

    OpenAIRE

    Lamut, Martin; Millaku, Agron; Torkar, Matjaž

    2010-01-01

    The recycling of waste metallic materials and the use of scrap are important for the economic production of a steelworks. Here, we investigate the technology of remelting steel chips. It was confirmed that the main problems with using chips in an electric arc furnace were the chips' large specific surface and the high losses due to the chipsć oxidation. To overcome both problems the compaction and remelting of the chips were tested. The investigation revealed that a major problem for the recy...

  12. Chip PCR. I. Surface passivation of microfabricated silicon-glass chips for PCR.

    OpenAIRE

    Shoffner, M A; Cheng, J; Hvichia, G E; Kricka, L J; Wilding, P.

    1996-01-01

    The microreaction volumes of PCR chips (a microfabricated silicon chip bonded to a piece of flat glass to form a PCR reaction chamber) create a relatively high surface to volume ratio that increases the significance of the surface chemistry in the polymerase chain reaction (PCR). We investigated several surface passivations in an attempt to identify 'PCR friendly' surfaces and used those surfaces to obtain amplifications comparable with those obtained in conventional PCR amplification systems...

  13. "Hook"-calibration of GeneChip-microarrays: Chip characteristics and expression measures

    Directory of Open Access Journals (Sweden)

    Krohn Knut

    2008-08-01

    Full Text Available Abstract Background Microarray experiments rely on several critical steps that may introduce biases and uncertainty in downstream analyses. These steps include mRNA sample extraction, amplification and labelling, hybridization, and scanning causing chip-specific systematic variations on the raw intensity level. Also the chosen array-type and the up-to-dateness of the genomic information probed on the chip affect the quality of the expression measures. In the accompanying publication we presented theory and algorithm of the so-called hook method which aims at correcting expression data for systematic biases using a series of new chip characteristics. Results In this publication we summarize the essential chip characteristics provided by this method, analyze special benchmark experiments to estimate transcript related expression measures and illustrate the potency of the method to detect and to quantify the quality of a particular hybridization. It is shown that our single-chip approach provides expression measures responding linearly on changes of the transcript concentration over three orders of magnitude. In addition, the method calculates a detection call judging the relation between the signal and the detection limit of the particular measurement. The performance of the method in the context of different chip generations and probe set assignments is illustrated. The hook method characterizes the RNA-quality in terms of the 3'/5'-amplification bias and the sample-specific calling rate. We show that the proper judgement of these effects requires the disentanglement of non-specific and specific hybridization which, otherwise, can lead to misinterpretations of expression changes. The consequences of modifying probe/target interactions by either changing the labelling protocol or by substituting RNA by DNA targets are demonstrated. Conclusion The single-chip based hook-method provides accurate expression estimates and chip-summary characteristics

  14. The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture

    OpenAIRE

    Biagioni, Andrea; Cicero, Francesca Lo; Lonardo, Alessandro; Paolucci, Pier Stanislao; Perra, Mersia; Rossetti, Davide; Sidore, Carlo; Simula, Francesco; Tosoratto, Laura; Vicini, Piero

    2012-01-01

    One of the most demanding challenges for the designers of parallel computing architectures is to deliver an efficient network infrastructure providing low latency, high bandwidth communications while preserving scalability. Besides off-chip communications between processors, recent multi-tile (i.e. multi-core) architectures face the challenge for an efficient on-chip interconnection network between processor's tiles. In this paper, we present a configurable and scalable architecture, based on...

  15. Sensing systems using chip-based spectrometers

    Science.gov (United States)

    Nitkowski, Arthur; Preston, Kyle J.; Sherwood-Droz, Nicolás.; Behr, Bradford B.; Bismilla, Yusuf; Cenko, Andrew T.; DesRoches, Brandon; Meade, Jeffrey T.; Munro, Elizabeth A.; Slaa, Jared; Schmidt, Bradley S.; Hajian, Arsen R.

    2014-06-01

    Tornado Spectral Systems has developed a new chip-based spectrometer called OCTANE, the Optical Coherence Tomography Advanced Nanophotonic Engine, built using a planar lightwave circuit with integrated waveguides fabricated on a silicon wafer. While designed for spectral domain optical coherence tomography (SD-OCT) systems, the same miniaturized technology can be applied to many other spectroscopic applications. The field of integrated optics enables the design of complex optical systems which are monolithically integrated on silicon chips. The form factors of these systems can be significantly smaller, more robust and less expensive than their equivalent free-space counterparts. Fabrication techniques and material systems developed for microelectronics have previously been adapted for integrated optics in the telecom industry, where millions of chip-based components are used to power the optical backbone of the internet. We have further adapted the photonic technology platform for spectroscopy applications, allowing unheard-of economies of scale for these types of optical devices. Instead of changing lenses and aligning systems, these devices are accurately designed programmatically and are easily customized for specific applications. Spectrometers using integrated optics have large advantages in systems where size, robustness and cost matter: field-deployable devices, UAVs, UUVs, satellites, handheld scanning and more. We will discuss the performance characteristics of our chip-based spectrometers and the type of spectral sensing applications enabled by this technology.

  16. The Kindness in a Bag of Chips

    Institute of Scientific and Technical Information of China (English)

    韩小庆

    2011-01-01

    难度:★★★☆☆词数:406建议阅读时间:10分钟Last Sunday, my son and I were in line at the Dollar store buying an assortment of products. In a line next to ours, a woman was waiting to make her 1 . She had a few necessities and one bag of chips.

  17. The Kindness in a Bag of Chips

    Institute of Scientific and Technical Information of China (English)

    韩小庆

    2011-01-01

    Last Sunday, my son and I were in line at the Dollar store buying an assortment of products. In a line next to ours, a woman was waiting to make her 1 . She had a few necessities and one bag of chips.

  18. Hybrid photonic chip interferometer for embedded metrology

    Science.gov (United States)

    Kumar, P.; Martin, H.; Maxwell, G.; Jiang, X.

    2014-03-01

    Embedded metrology is the provision of metrology on the manufacturing platform, enabling measurement without the removal of the work piece. Providing closer integration of metrology upon the manufacturing platform can lead to the better control and increased throughput. In this work we present the development of a high precision hybrid optical chip interferometer metrology device. The complete metrology sensor system is structured into two parts; optical chip and optical probe. The hybrid optical chip interferometer is based on a silica-on-silicon etched integrated-optic motherboard containing waveguide structures and evanescent couplers. Upon the motherboard, electro-optic components such as photodiodes and a semiconductor gain block are mounted and bonded to provide the required functionality. The key structure in the device is a tunable laser module based upon an external-cavity diode laser (ECDL). Within the cavity is a multi-layer thin film filter which is rotated to select the longitudinal mode at which the laser operates. An optical probe, which uses a blazed diffracting grating and collimating objective lens, focuses light of different wavelengths laterally over the measurand. Incident laser light is then tuned in wavelength time to effectively sweep an `optical stylus' over the surface. Wavelength scanning and rapid phase shifting can then retrieve the path length change and thus the surface height. We give an overview of the overall design of the final hybrid photonic chip interferometer, constituent components, device integration and packaging as well as experimental test results from the current version now under evaluation.

  19. Increasing security in inter-chip communication

    Energy Technology Data Exchange (ETDEWEB)

    Edwards, Nathan J; Hamlet, Jason; Bauer, Todd; Helinski, Ryan

    2014-10-28

    An apparatus for increasing security in inter-chip communication includes a sending control module, a communication bus, and a receiving control module. The communication bus is coupled between the sending control module and the receiving control module. The sending control module operates to send data on the communication bus, disable the communication bus when threats are detected, or both.

  20. What's A Pixel Particle Sensor Chip?

    CERN Multimedia

    2008-01-01

    ATLAS particle physics experiment aided with collaboration ON Semiconductor was recently honored by the European Council for Nuclear Research (CERN), with an Industrial Award recognizing the company's contribution in supplying complex "Pixel Particle Sensor" chips for use in CERN's ATLAS particle physics experiment.

  1. Writing for a Change, Writing for Chip

    Science.gov (United States)

    Berry, Patrick W.

    2014-01-01

    What does it mean to write for change? How do we negotiate the space between hope and critique? Drawing on Dewey's notion of a common faith, this article contemplates what the author learned from Chip Bruce. It suggests that when we compartmentalize the ideal and the everyday, the hopeful and the critical, we reduce the complexity of human…

  2. Production Quality Control Of Microfluidic Chip Designs

    DEFF Research Database (Denmark)

    Calaon, Matteo; Hansen, Hans Nørgaard; Tosello, Guido;

    2012-01-01

    environment the precision of measuring results and the accuracy of measurement relocation are very relevant. In this paper, the possibility of producing with high volume Lab-on-chip devices through injection molding are presented. Preparation of master geometries was made by etching a Si wafer by e...

  3. Light-colored, Low Acrylamide Potato Chips

    Science.gov (United States)

    Potato tubers are stored at cold temperatures to prevent sprouting, minimize disease losses and increase the marketing window. Cold storage also causes an accumulation of reducing sugars, a phenomenon referred to as cold-induced sweetening. Unacceptable, dark colored chips and fries are formed durin...

  4. Smart Chips for Smart Surroundings - 4S

    NARCIS (Netherlands)

    Schuler, Eberhard; König, Ralf; Becker, Jürgen; Rauwerda, Gerard; Burgwal, van de Marcel; Smit, Gerard J.M.; Cardoso, João M.P.; Hübner, Michael

    2011-01-01

    The overall mission of the 4S project (Smart Chips for Smart Surroundings) was to define and develop efficient flexible, reconfigurable core building blocks, including the supporting tools, for future Ambient System Devices. Reconfigurability offers the needed flexibility and adaptability, it provid

  5. System-on-Chip Design and Implementation

    Science.gov (United States)

    Brackenbury, L. E. M.; Plana, L. A.; Pepper, J.

    2010-01-01

    The system-on-chip module described here builds on a grounding in digital hardware and system architecture. It is thus appropriate for third-year undergraduate computer science and computer engineering students, for post-graduate students, and as a training opportunity for post-graduate research students. The course incorporates significant…

  6. Flip-a-Chip to Build Vocabulary.

    Science.gov (United States)

    Mountain, Lee

    2002-01-01

    Presents a word-game strategy that builds vocabulary and comprehension while motivating students. Concludes that activities like Flip-a-Chip (along with crossword puzzles and other forms of wordplay) have helped the author create a pleasantly literate environment in her classroom. (SG)

  7. Microprocessors: From basic chips to complete systems

    International Nuclear Information System (INIS)

    These lectures aim to present and explain in general terms some of the characteristics of microprocessor chips and associated components. They show how systems are synthesized from the basic integrated circuit building blocks which are currently available; processor, memory, input-output (I/0) devices, etc. (orig./HSI)

  8. A multipurpose programmable read-out chip

    International Nuclear Information System (INIS)

    A mixed-signal integrated chip in IBM 130nm technology suitable to a variety of detectors with different requirements is under development. The CBM experiment at FAIR could be a good candidate for the use of this chip. The chip can read out 128 channels, which can be masked in groups of 16, 32 or 64. The multichannel ASIC includes a low noise PreAmplifier and Shaping Amplifier (PASA), a Peak Detector (PD), a Time-to-Amplitude Converter (TAC) and fast arbitration and sequencing logic to concentrate the data before it is sent to a pipelined Analog-to-Digital Converter (ADC). The chip is self-triggered, which is essential for applications where the detector pulses arrive randomly in time. The PASA is programmable for different detector capacitances (from 1 pF to 50 pF), input pulse polarity, preamplifier gain, peaking time (from 20 to 200 ns) and conversion gain in order to suit a wide range of application requirements. The ADC is programmable to support either 8, 10 or 12 bit resolution with a conversion rate from 1 MHz to 100 MHz; the switched-capacitor bias network provides bias currents proportional to the operating frequency. Simulations of the ADC will be shown together with plots of the expected performance

  9. Novel PbS detector chip pattern with extinction function

    Science.gov (United States)

    Chen, Fengjin; Si, Junjie; Su, Xianjun; Lv, Yanqiu; Shi, Zhengfeng

    2015-10-01

    A novel chip pattern with extinction function in Lead salt detectors is specified. Lead Sulfide (PbS) polycrystalline film is prepared by Chemical Bath Deposition (CMD) on a transparent substrate, then a special figure and structure is saved by lithography techonology on the substrate. As a quaternion detector chip that made by PbS thin film for example in this paper, whose performance including signal, noise, weak-peaks and the uniformity of the chip are too poor to meet the detecting system at the initial stage of research, and the qualified ratio of chips is only 3% .This paper explains the reason why the performance and qualified ratio of chips were so poor, focuses on a novel chip pattern with extinction which avoided the disadvantages of traditional one. the novel chip pattern has been applied in detectors. The novel chip pattern is prepared with PbS thin film which both "extinction slice" and detector chip are based on a same substrate , which not only had absorbed the jumbled light , improved the uniformity and other performance of photosensitive elements, but also had left out the assembly diffculty and precision demand when a extinction slice assembly in the restricted space of inswept detector chip, omitted the production process of extinction slice and shorten the assembly process of the detectors, and the qualified ratio of chips had been improved from 3% to 98%.

  10. Modulated Tool-Path (MTP) Chip Breaking System

    Energy Technology Data Exchange (ETDEWEB)

    Graham, K. B.

    2010-04-01

    The Modulated Tool-Path (MTP) Chip Breaking System produces user-selectable chip lengths and workpiece finishes and is compatible with any material, workpiece shape, and depth of cut. The MTP chip breaking system consistently creates the desired size of chips regardless of workpiece size, shape, or material, and the machine operator does not need to make any adjustments during the machining operation. The system's programmer configures the part program that commands the machine tool to move in a specific fashion to deliver the desired part size, shape, chip length, and workpiece surface finish. The MTP chip breaking system helps manufacturers avoid the detrimental effects of continuous chips, including expensive repair costs, delivery delays, and hazards to personnel.

  11. Investigation of formation mechanisms of chips in orthogonal cutting process

    Science.gov (United States)

    Ma, W.

    2012-08-01

    This work investigates the formation mechanisms of chips in orthogonal cutting of mild steel and the transformation conditions between various morphology chips. It is supposed that the modeling material follows the Johnson-Cook constitutive model. In orthogonal cutting process, both the plastic flow and the instability behaviors of chip materials are caused by the plane strain loadings. Therefore, the general instability behaviors of materials in plane strain state are first analyzed with linear perturbation method and a universal instability criterion is established. Based on the analytical results, the formation mechanisms of chips and the transformation conditions between continuous and serrated chips are further studied by instability phase diagram method. The results show that the chip formation strongly depends on the intensity ratios between shear and normal stresses. The ratios of dissipative rates of plastic work done by compression and shear stresses govern the transformation from continuous to serrated chips. These results are verified by the numerical simulations on the orthogonal cutting process.

  12. Modeling of chip bed packing in a continuous kraft cooking digester

    OpenAIRE

    Laakso, Sampsa

    2008-01-01

    This work focused on modeling of the chip bed packing phenomena in a continuous kraft cooking digester. A better understanding of chip bed packing would make it possible to optimize chip flow conditions in the digester, thereby ensuring uniform fiber quality and production efficiency. Chips are fed continuously into the digester, with the chip flow forming a solid bed. As the solid chip bed moves slowly downwards, cooking reactions proceed, which leads to softening of the chips. The soft...

  13. Flip-chip packaging for smart MEMS

    Science.gov (United States)

    Mayer, Felix; Ofner, Gerald; Koll, Andreas; Paul, Oliver; Baltes, Henry

    1998-07-01

    The cointegration of IC microsensors, actuators and readout circuit leads to smart Micro Electro Mechanical Systems (MEMS) which are superior in many aspects to their conventional discrete counterparts. However, the packaging of such device is still a challenge and a major factor of the overall production cost. On one hand MEMS need protection against mechanical contact and media. On the other hand, the encapsulation of the transducer must be partially permeable to the environment. We developed a packaging method which successfully addresses these challenges. Thereby the number of steps needed to electrically contact and partially seal the MEMS are reduced by combining them using flip-chip technology. An opening in the substrate is aligned with the transducer, and enables the interaction with external media. Concurrently with the electrical connections, a frame plated onto the microsystem is soldered to a corresponding structure on the substrate. This frame seals the rest of the chip from the medium interacting with the transducer. Using passive test chips we evaluate the performance of the new packaging method. Various underbump metal and solder deposition techniques were investigated. Both ceramic and flexible organic substrate materials were used. The combination Ni/Au bumps/InPb40 solder/ceramic substrate showed the following mechanical and electrical parameters: For 98% of the tested chips, the helium leakage rate of the sealing frame surrounding the sensor is below the threshold of the used mass spectrometer (5 X 10-7 Pa l s-1). For flip-chip pads ranging from 200 to 300 mm square, the bump resistances are smaller than 2 m(Omega) . The approach, is illustrated with three successfully packaged MEMS for the measurement of humidity, gas flow, and volatile organic compounds, respectively. They all contain integrated readout circuitry providing digital output.

  14. Performance Analysis and Comparison of Full Chip and Half Chip Rate DC and NC Code Acquisition in MIMO DSCDMA over Uncorrelated Rayleigh Wireless Channel

    OpenAIRE

    Kumar, N. Sathish; K.R. Shankar Kumar

    2011-01-01

    This paper presents the performance analysis and comparison of full chip and half chip rate of noncoherent (NC) and differentially coherent (DC) code acquisition scheme in (multiple input-multiple output) MIMO assisted by direct sequence spread spectrum (DS-CDMA) wireless system when communicated over uncorrelated Rayleigh channel. Four schemes are investigated, namely, SISO with full chip rate, SISO with Half chip rate, MIMO with full chip rate, and MIMO with half chip rate by varying the co...

  15. Quality requirements for forest chips; Kaeyttaejien laatuvaatimukset metsaehakkeelle

    Energy Technology Data Exchange (ETDEWEB)

    Impola, R. [VTT Energy, Jyvaeskylae (Finland)

    1999-07-01

    Forest chips have been used decades in Finland for energy purposes. Increment of oil prices has periodically increased the construction of municipal district heating plants. The utilization of forest chips in 1998 for energy was 0.5 million m{sup 3} (1.2 million bulk-m{sup 3}). The objective of the National Wood Energy Research Program is to increase the annual consumption of forest chips up to 2.5 million m{sup 3} (about 5 TWh) within 5 years. The largest additional potential for forest chips is in mixed combustion of forest chips in large energy production plants (e.g. power plants of forest industry). In smaller target (district heating plants and heating of large real estates) the regional significance of the utilization of forest chips is often significant. Logging residues from final fellings of spruce predominant felling areas form the largest and most profitable potential source of forest chips. Other interesting targets for the future are harvesting of energy wood from silvicultural plantations and first thinnings of lots. In present power plants there are not such technical solutions in use, which would prevent the enhancement of the utilization of forest chip, especially if chips to be combusted are mixed e.g. with peat. Even though the fuel processing systems are designed for processing of peat, bark and wood residues, the utilization of pure forest chip might cause problems, e.g. freezing of moist forest chips and arching in the reception, conveyors and storage. Problems might occur also in sieving and crushing of chips. The quality of forest chips plays an important role. The moisture content has to be in control also in winter. The homogeneity of chips, including the particle size, has to be suitable for the plants. Oversized particles, long branches and impurities cause problems in processing and feeding devices. Secure purchase and reliable delivery of the fuel under all circumstances are the main factors effecting on the increment of the

  16. On-chip concentration of bacteria using a 3D dielectrophoretic chip and subsequent laser-based DNA extraction in the same chip

    International Nuclear Information System (INIS)

    We report the on-chip concentration of bacteria using a dielectrophoretic (DEP) chip with 3D electrodes and subsequent laser-based DNA extraction in the same chip. The DEP chip has a set of interdigitated Au post electrodes with 50 µm height to generate a network of non-uniform electric fields for the efficient trapping by DEP. The metal post array was fabricated by photolithography and subsequent Ni and Au electroplating. Three model bacteria samples (Escherichia coli, Staphylococcus epidermidis, Streptococcus mutans) were tested and over 80-fold concentrations were achieved within 2 min. Subsequently, on-chip DNA extraction from the concentrated bacteria in the 3D DEP chip was performed by laser irradiation using the laser-irradiated magnetic bead system (LIMBS) in the same chip. The extracted DNA was analyzed with silicon chip-based real-time polymerase chain reaction (PCR). The total process of on-chip bacteria concentration and the subsequent DNA extraction can be completed within 10 min including the manual operation time.

  17. An analog CMOS chip set for neural networks with arbitrary topologies

    DEFF Research Database (Denmark)

    Lansner, John; Lehmann, Torsten

    1993-01-01

    An analog CMOS chip set for implementations of artificial neural networks (ANNs) has been fabricated and tested. The chip set consists of two cascadable chips: a neuron chip and a synapse chip. Neurons on the neuron chips can be interconnected at random via synapses on the synapse chips thus...... implementing an ANN with arbitrary topology. The neuron test chip contains an array of 4 neurons with well defined hyperbolic tangent activation functions which is implemented by using parasitic lateral bipolar transistors. The synapse test chip is a cascadable 4×4 matrix-vector multiplier with variable, 10-b...

  18. Use of forest chips in Finland. Position paper for 1999

    International Nuclear Information System (INIS)

    Finland has decided to raise the energy use of forest chips to 5 million m3 solid by 2010. This corresponds to 0.9 million tonnes of oil equivalent. In order to monitor the ongoing development and the effectiveness of energy policy matters, the Wood Energy Technology Program of Tekes executed a survey of the use of forest chips in 1999. Forest chips were used in 135 heating plants (minimum size 0,5 MW), 21 power plants, and several thousands of small buildings and farm houses. The commercial use was 567 000 m3 solid and small-scale non- commercial use 180 000 m3 solid. The use of forest chips is increasing rapidly especially in combined production of heat and electricity. The report gives information on the use in plants of different size, seasonal variation of use, raw material sources of chips, moisture content of chips, and the development of prices. During the 1990s, the average price of forest chips was reduced by 35 %. In 1999, the average price at the plant was 61 FIM/MWh for whole-tree chips, 44 FIM/MWh for chips reduced from logging residues from forest regeneration areas, and 53 FIM/MWh for the entire flow of forest chips, VAT excluded. (orig.)

  19. Stem-end chip defect in response to high temperature stress

    Science.gov (United States)

    Stem-end chip defect is a serious quality concern for the potato chip industry. Chips with stem-end chip defect are unacceptably dark along the vasculature at the tuber stem end and in adjacent tissues. Tubers that produce stem-end defect chips are undesirable to processors and increase financial ri...

  20. Photonic Wire Bonds for Terabit/s Chip-to-Chip Interconnects

    CERN Document Server

    Lindenmann, Nicole; Hillerkuss, David; Schmogrow, Rene; Jordan, Meinert; Leuthold, Juerg; Freude, Wolfgang; Koos, Christian

    2011-01-01

    Photonic integration has witnessed tremendous progress over the last years, and chip-scale transceiver systems with Terabit/s data rates have come into reach. However, as on-chip integration density increases, efficient off-chip interfaces are becoming more and more crucial. A technological breakthrough is considered indispensable to cope with the challenges arising from large-scale photonic integration, and this particularly applies to short-distance optical interconnects. In this letter we introduce the concept of photonic wire bonding, where transparent waveguide wire bonds are used to bridge the gap between nanophotonic circuits located on different chips. We demonstrate for the first time the fabrication of three-dimensional freeform photonic wire bonds (PWB), and we confirm their viability in a multi-Terabit/s data transmission experiment. First-generation prototypes allow for efficient broadband coupling with overall losses of only 1.6 dB. Photonic wire bonding will enable flexible optical multi-chip a...

  1. Fabrication of Microfluidic Fiber Chip Detection System

    Institute of Scientific and Technical Information of China (English)

    Bo Su; Da-fu Cui; Chang-chun Liu; Xing Chen

    2006-01-01

    The diameter of the excitation beam was decreased greatly by integrating the fiber on the microfluidic chip as light propagation medium. The coupling efficiency of the fiber was improved with optical fiber collimation device coupling beam.The chip was placed in the darkroom to avoid the interference of the external light. The cost of the instrument was decreased with a high brightness blue LED as excitation source; the performance of the system was valuated by the determination of FITC fluorescein with a minimum detectable concentration of 2.2×10-8 mol/L, the Signal-to-Noise Ratio (SNR) S/N=5. The correlation coefficient of the detection system within the range of 1.8 × 10-7 mol/L~ 4 × 10-5mol/L was 0.9972.

  2. Invisibility Cloak Printed on a Photonic Chip

    Science.gov (United States)

    Feng, Zhen; Wu, Bing-Hong; Zhao, Yu-Xi; Gao, Jun; Qiao, Lu-Feng; Yang, Ai-Lin; Lin, Xiao-Feng; Jin, Xian-Min

    2016-01-01

    Invisibility cloak capable of hiding an object can be achieved by properly manipulating electromagnetic field. Such a remarkable ability has been shown in transformation and ray optics. Alternatively, it may be realistic to create a spatial cloak by means of confining electromagnetic field in three-dimensional arrayed waveguides and introducing appropriate collective curvature surrounding an object. We realize the artificial structure in borosilicate by femtosecond laser direct writing, where we prototype up to 5,000 waveguides to conceal millimeter-scale volume. We characterize the performance of the cloak by normalized cross correlation, tomography analysis and continuous three-dimensional viewing angle scan. Our results show invisibility cloak can be achieved in waveguide optics. Furthermore, directly printed invisibility cloak on a photonic chip may enable controllable study and novel applications in classical and quantum integrated photonics, such as invisualising a coupling or swapping operation with on-chip circuits of their own. PMID:27329510

  3. Invisibility Cloak Printed on a Photonic Chip.

    Science.gov (United States)

    Feng, Zhen; Wu, Bing-Hong; Zhao, Yu-Xi; Gao, Jun; Qiao, Lu-Feng; Yang, Ai-Lin; Lin, Xiao-Feng; Jin, Xian-Min

    2016-01-01

    Invisibility cloak capable of hiding an object can be achieved by properly manipulating electromagnetic field. Such a remarkable ability has been shown in transformation and ray optics. Alternatively, it may be realistic to create a spatial cloak by means of confining electromagnetic field in three-dimensional arrayed waveguides and introducing appropriate collective curvature surrounding an object. We realize the artificial structure in borosilicate by femtosecond laser direct writing, where we prototype up to 5,000 waveguides to conceal millimeter-scale volume. We characterize the performance of the cloak by normalized cross correlation, tomography analysis and continuous three-dimensional viewing angle scan. Our results show invisibility cloak can be achieved in waveguide optics. Furthermore, directly printed invisibility cloak on a photonic chip may enable controllable study and novel applications in classical and quantum integrated photonics, such as invisualising a coupling or swapping operation with on-chip circuits of their own. PMID:27329510

  4. Design considerations for pixel readout chips

    CERN Document Server

    Fischer, P

    2003-01-01

    Pixel detectors are becoming a standard tracking component in modern particle physics experiment and find first applications in X-ray diffraction, medical imaging and astronomy. The amplification and the readout of the small signal charges from the pixel sensor require highly integrated ASICs in which several thousand low-noise charge-sensitive amplifiers are densely interspersed with fast data-processing logic. The reduction of crosstalk from the digital to the analog section is therefore crucial. The frequent demand for radiation tolerance requires special chip technologies or the use of deep sub-micron processes with suited design rules. This paper summarizes a few designs aspects particularly important for pixel readout chips.

  5. Ion trap in a semiconductor chip

    Science.gov (United States)

    Stick, D.; Hensinger, W. K.; Olmschenk, S.; Madsen, M. J.; Schwab, K.; Monroe, C.

    2006-01-01

    The electromagnetic manipulation of isolated atoms has led to many advances in physics, from laser cooling and Bose-Einstein condensation of cold gases to the precise quantum control of individual atomic ions. Work on miniaturizing electromagnetic traps to the micrometre scale promises even higher levels of control and reliability. Compared with `chip traps' for confining neutral atoms, ion traps with similar dimensions and power dissipation offer much higher confinement forces and allow unparalleled control at the single-atom level. Moreover, ion microtraps are of great interest in the development of miniature mass-spectrometer arrays, compact atomic clocks and, most notably, large-scale quantum information processors. Here we report the operation of a micrometre-scale ion trap, fabricated on a monolithic chip using semiconductor micro-electromechanical systems (MEMS) technology. We confine, laser cool and measure heating of a single 111Cd+ ion in an integrated radiofrequency trap etched from a doped gallium-arsenide heterostructure.

  6. Ion Trap in a Semiconductor Chip

    CERN Document Server

    Stick, D; Olmschenk, S; Madsen, M J; Schwab, K; Monroe, C

    2006-01-01

    The electromagnetic manipulation of isolated atoms has led to many advances in physics, from laser cooling and Bose-Einstein condensation of cold gases to the precise quantum control of individual atomic ion. Work on miniaturizing electromagnetic traps to the micrometer scale promises even higher levels of control and reliability. Compared with 'chip traps' for confining neutral atoms, ion traps with similar dimensions and power dissipation offer much higher confinement forces and allow unparalleled control at the single-atom level. Moreover, ion microtraps are of great interest in the development of miniature mass spectrometer arrays, compact atomic clocks, and most notably, large scale quantum information processors. Here we report the operation of a micrometer-scale ion trap, fabricated on a monolithic chip using semiconductor micro-electromechanical systems (MEMS) technology. We confine, laser cool, and measure heating of a single 111Cd+ ion in an integrated radiofrequency trap etched from a doped gallium...

  7. Chip based electroanalytical systems for cell analysis

    DEFF Research Database (Denmark)

    Spegel, C.; Heiskanen, A.; Skjolding, L.H.D.;

    2008-01-01

    ' measurements of processes related to living cells, i.e., systems without lysing the cells. The focus is on chip based amperometric and impedimetric cell analysis systems where measurements utilizing solely carbon fiber microelectrodes (CFME) and other nonchip electrode formats, such as CFME for exocytosis......This review with 239 references has as its aim to give the reader an introduction to the kinds of methods used for developing microchip based electrode systems as well as to cover the existing literature on electroanalytical systems where microchips play a crucial role for 'nondestructive...... studies and scanning electrochemical microscopy (SECM) studies of living cells have been omitted. Included is also a discussion about some future and emerging nano tools and considerations that might have an impact on the future of "nondestructive" chip based electroanalysis of living cells....

  8. Cold molecular ions on a chip

    OpenAIRE

    Mokhberi, A.; Willitsch, S.

    2014-01-01

    We report the sympathetic cooling and Coulomb crystallization of molecular ions above the surface of an ion-trap chip. N$_2^+$ and CaH$^+$ ions were confined in a surface-electrode radiofrequency ion trap and cooled by the interaction with laser-cooled Ca$^{+}$ ions to secular translational temperatures in the millikelvin range. The configuration of trapping potentials generated by the surface electrodes enabled the formation of planar bicomponent Coulomb crystals and the spatial separation o...

  9. Micro-fluidic chip for cell sorting

    Czech Academy of Sciences Publication Activity Database

    Šerý, Mojmír; Pilát, Zdeněk; Ježek, Jan; Kaňka, Jan; Zemánek, Pavel

    Munich : EOS, 2015. ISBN 978-952-93-5069-8. [EOS Conferences at the World of Photonics Congress 2015. Munich (DE), 22.06.2015-25.06.2015] R&D Projects: GA MŠk(CZ) LD14069; GA MŠk(CZ) LO1212; GA TA ČR TA03010642; GA MŠk ED0017/01/01 Institutional support: RVO:68081731 Keywords : Micro-fluidic chip * cell sorting Subject RIV: BH - Optics, Masers, Lasers

  10. On-chip Ultrasonic Sample Preparation

    OpenAIRE

    Iranmanesh, Ida Sadat

    2015-01-01

    Acoustofluidics has become a well-established technology in the lab-on-a-chip scientific community. The technology involves primarily the manipulation of fluids and/or particles in microfluidic systems. It is used today for variety of applications such as handling, sorting, washing and separation of cells or micro-particles, and for mixing and pumping of fluids. When such manipulation functions are integrated in micro-devices, the technology has been used for clinical sample preparation as we...

  11. Imaging Cold Molecules on a Chip

    OpenAIRE

    Marx, S.; Adu Smith, D.; Abel, M.; Zehentbauer, T.; Meijer, G.J.M.; Santambrogio, G.

    2013-01-01

    We present the integrated imaging of cold molecules in a microchip environment. The on-chip detection is based on resonance-enhanced multiphoton ionization, which is quantum state selective and generally applicable. We demonstrate and characterize time-resolved spatial imaging and subsequently use it to analyze the effect of a phase-space manipulation sequence aimed at compressing the velocity distribution of a molecular ensemble with a view to future high-resolution spectroscopic studies. Th...

  12. On-Chip Single Plasmon Detection

    OpenAIRE

    Heeres, Reinier W.; Dorenbos, Sander N.; Koene, Benny; Solomon, Glenn S.; Kouwenhoven, Leo P.; Zwiller, Valery

    2010-01-01

    Surface plasmon polaritons (plasmons) have the potential to interface electronic and optical devices. They could prove extremely useful for integrated quantum information processing. Here we demonstrate on-chip electrical detection of single plasmons propagating along gold waveguides. The plasmons are excited using the single-photon emission of an optically emitting quantum dot. After propagating for several micrometers, the plasmons are coupled to a superconducting detector in the near-field...

  13. Dynamically Reconfigurable Systems-on-Chip

    OpenAIRE

    Stechele, Walter

    2006-01-01

    The design space for dynamically reconfigurable SoCs can be seen in three dimensions: 1) the system architecture for computation and communication, ranging from dataflow-oriented dedicated logic blocks to instruction flow-oriented microprocessor cores, from dedicated point-to-point connections to Networks-on-Chip. 2) the granularity of reconfigurable elements, ranging from simple logic Look-Up-Tables to complex hardware accelerator engines and reconfigurable interconnect structures. 3) the co...

  14. Pyramidal micromirrors for microsystems and atom chips

    Science.gov (United States)

    Trupke, M.; Ramirez-Martinez, F.; Curtis, E. A.; Ashmore, J. P.; Eriksson, S.; Hinds, E. A.; Moktadir, Z.; Gollasch, C.; Kraft, M.; Vijaya Prakash, G.; Baumberg, J. J.

    2006-02-01

    Concave pyramids are created in the (100) surface of a silicon wafer by anisotropic etching in potassium hydroxide. High quality micromirrors are then formed by sputtering gold onto the smooth silicon (111) faces of the pyramids. These mirrors show great promise as high quality optical devices suitable for integration into micro-optoelectromechanical systems and atom chips. We have shown that structures of this shape can be used to laser-cool and hold atoms in a magneto-optical trap.

  15. A single chip with multiple talents

    CERN Multimedia

    Francesco Poppi

    2010-01-01

    The Medipix chips developed at CERN are being used in a variety of fields: from medicine to education and back to high-tech engineering. The scene is set for a bright future for this versatile technology.   The Medipix chip. It didn’t take long for a brilliant team of physicists and engineers who were working on pixel detectors for the LHC to realize that the technology had great potential in medical imaging. This was the birth of the Medipix project. Fifteen years later, with the collaboration of 18 research institutes, the team has produced an advanced version of the initial ideas: Medipix3 is a device that can measure very accurately the position and energy of the photons (one by one) that hit the associated detector. Radiography and computed tomography (CT) use X-ray photons to study the human body. The different energies of the photons in the beam can be thought of as the colours of the X-ray spectrum. This is why the use of Medipix3 chips in such diagnostic techniques is referred...

  16. Chip breaking system for automated machine tool

    Science.gov (United States)

    Arehart, Theodore A.; Carey, Donald O.

    1987-01-01

    The invention is a rotary selectively directional valve assembly for use in an automated turret lathe for directing a stream of high pressure liquid machining coolant to the interface of a machine tool and workpiece for breaking up ribbon-shaped chips during the formation thereof so as to inhibit scratching or other marring of the machined surfaces by these ribbon-shaped chips. The valve assembly is provided by a manifold arrangement having a plurality of circumferentially spaced apart ports each coupled to a machine tool. The manifold is rotatable with the turret when the turret is positioned for alignment of a machine tool in a machining relationship with the workpiece. The manifold is connected to a non-rotational header having a single passageway therethrough which conveys the high pressure coolant to only the port in the manifold which is in registry with the tool disposed in a working relationship with the workpiece. To position the machine tools the turret is rotated and one of the tools is placed in a material-removing relationship of the workpiece. The passageway in the header and one of the ports in the manifold arrangement are then automatically aligned to supply the machining coolant to the machine tool workpiece interface for breaking up of the chips as well as cooling the tool and workpiece during the machining operation.

  17. A fast template matching method for LED chip Localization

    Directory of Open Access Journals (Sweden)

    Zhong Fuqiang

    2015-01-01

    Full Text Available Efficiency determines the profits of the semiconductor producers. So the producers spare no effort to enhance the efficiency of every procedure. The purpose of the paper is to present a method to shorten the time to locate the LED chips on wafer. The method consists of 3 steps. Firstly, image segmentation and blob analyzation are used to predict the positions of potential chips. Then predict the orientations of potential chips based on their dominant orientations. Finally, according to the positions and orientations predicted above, locate the chips precisely based on gradient orientation features. Experiments show that the algorithm is faster than the traditional method we choose to locate the LED chips. Besides, even the orientations of the chips on wafer are of big deviation to the orientation of the template, the efficiency of this method won't be affected.

  18. Flip-chip light emitting diode with resonant optical microcavity

    Science.gov (United States)

    Gee, James M.; Bogart, Katherine H.A.; Fischer, Arthur J.

    2005-11-29

    A flip-chip light emitting diode with enhanced efficiency. The device structure employs a microcavity structure in a flip-chip configuration. The microcavity enhances the light emission in vertical modes, which are readily extracted from the device. Most of the rest of the light is emitted into waveguided lateral modes. Flip-chip configuration is advantageous for light emitting diodes (LEDs) grown on dielectric substrates (e.g., gallium nitride LEDs grown on sapphire substrates) in general due to better thermal dissipation and lower series resistance. Flip-chip configuration is advantageous for microcavity LEDs in particular because (a) one of the reflectors is a high-reflectivity metal ohmic contact that is already part of the flip-chip configuration, and (b) current conduction is only required through a single distributed Bragg reflector. Some of the waveguided lateral modes can also be extracted with angled sidewalls used for the interdigitated contacts in the flip-chip configuration.

  19. A Neuron- and a Synapse Chip for Artificial Neural Networks

    DEFF Research Database (Denmark)

    Lansner, John; Lehmann, Torsten

    1992-01-01

    A cascadable, analog, CMOS chip set has been developed for hardware implementations of artificial neural networks (ANN's):I) a neuron chip containing an array of neurons with hyperbolic tangent activation functions and adjustable gains, and II) a synapse chip (or a matrix-vector multiplier) where...... the matrix is stored on-chip as differential voltages on capacitors. In principal any ANN configuration can be made using these chips. A neuron array of 4 neurons and a 4 × 4 matrix-vector multiplier has been fabricated in a standard 2.4 ¿m CMOS process for test purposes. The propagation time through...... the synapse and neuron chips is less than 4 ¿s and the weight matrix has a 10 bit resolution....

  20. Application of Ferrite Nanomaterial in RF On-Chip Inductors

    Directory of Open Access Journals (Sweden)

    Hua-Lin Cai

    2013-01-01

    Full Text Available Several kinds of ferrite-integrated on-chip inductors are presented. Ferrite nanomaterial applied in RF on-chip inductors is prepared and analyzed to show the properties of high permeability, high ferromagnetic resonance frequency, high resistivity, and low loss, which has the potential that will improve the performance of RF on-chip inductors. Simulations of different coil and ferrite nanomaterial parameters, inductor structures, and surrounding structures are also conducted to achieve the trend of gains of inductance and quality factor of on-chip inductors. By integrating the prepared ferrite magnetic nanomaterial to the on-chip inductors with different structures, the measurement performances show an obvious improvement even in GHz frequency range. In addition, the studies of CMOS compatible process to integrate the nanomaterial promote the widespread application of magnetic nanomaterial in RF on-chip inductors.

  1. A primary battery-on-a-chip using monolayer graphene

    Science.gov (United States)

    Iost, Rodrigo M.; Crespilho, Frank N.; Kern, Klaus; Balasubramanian, Kannan

    2016-07-01

    We present here a bottom-up approach for realizing on-chip on-demand batteries starting out with chemical vapor deposition-grown graphene. Single graphene monolayers contacted by electrode lines on a silicon chip serve as electrodes. The anode and cathode are realized by electrodeposition of zinc and copper respectively onto graphene, leading to the realization of a miniature graphene-based Daniell cell on a chip. The electrolyte is housed partly in a gel and partly in liquid form in an on-chip enclosure molded using a 3d printer or made out of poly(dimethylsiloxane). The realized batteries provide a stable voltage (∼1.1 V) for many hours and exhibit capacities as high as 15 μAh, providing enough power to operate a pocket calculator. The realized batteries show promise for deployment as on-chip power sources for autonomous systems in lab-on-a-chip or biomedical applications.

  2. Liquid-phase microextraction in a microfluidic-chip

    DEFF Research Database (Denmark)

    Payán, María D. Ramos; Jensen, Henrik; Petersen, Nickolaj J.;

    2012-01-01

    In this work, a microfluidic-chip based system for liquid-phase microextraction (LPME-chip) was developed. Sample solutions were pumped into the LPME-chip with a micro-syringe pump at a flow rate of 3-4µLmin(-1). Inside the LPME chip, the sample was in direct contact with a supported liquid...... electrophoresis for exact quantification, or on-line by UV detection or electrospray ionization mass spectrometry for time profiling of concentrations. The LPME-chip was found to be highly effective, and extraction efficiencies were in the range of 52-91%. When the flow of acceptor phase was turned off during...... that the LPME-chip has great potentials for very efficient analyte enrichments from limited sample volumes in the future....

  3. Neural network chips for trigger purposes in high energy physics

    International Nuclear Information System (INIS)

    Two novel neural chips SAND (Simple Applicable Neural Device) and SIOP (Serial Input - Operating Parallel) are described. Both are highly usable for hardware triggers in particle physics. The chips are optimized for a high input data rate at a very low cost basis. The performance of a single SAND chip is 200 MOPS due to four parallel 16 bit multipliers and 40 bit adders working in one clock cycle. The chip is able to implement feedforward neural networks, Kohonen feature maps and radial basis function networks. Four chips will be implemented on a PCI-board for simulation and on a VUE board for trigger and on- and off-line analysis. For small sized feedforward neural networks the bit-serial neuro-chip SIOP may lead to even smaller latencies because each synaptic connection is implemented by its own bit serial multiplier and adder

  4. Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects

    International Nuclear Information System (INIS)

    A power-aware transceiver for half-duplex bidirectional chip-to-chip optical interconnects has been designed and fabricated in a 0.13 μm complementary metal–oxide–semiconductor (CMOS) technology. The transceiver can detect the presence and absence of received signals and saves 55% power in Rx enabled mode and 45% in Tx enabled mode. The chip occupies an area of 1.034 mm2 and achieves a 3-dB bandwidth of 6 GHz and 7 GHz in Tx and Rx modes, respectively. The disabled outputs for the Tx and Rx modes are isolated with 180 dB and 139 dB, respectively, from the enabled outputs. Clear eye diagrams are obtained at 4.25 Gbps for both the Tx and Rx modes. (semiconductor integrated circuits)

  5. Polystyrene Based SPR Biosensor Chip for Use in Immunoassay

    Institute of Scientific and Technical Information of China (English)

    1999-01-01

    Biosensors are widely used in immunoassay.The biosensor chip carries a receptor which is used in immunoassay and the chip properties have an important influence on the detecting sensitivity of the biosensor.This paper describes a polystyrene-based biosensor chip developed and used as part of a surface plasmon resonance (SPR) biosensor.The SPR biosensor has a much higher detecting sensitivity than enzyme-linked immunoserbent assay (ELISA).

  6. Modelling of air resistance during drying of wood-chips

    OpenAIRE

    Karaj, S.; Barfuss, Isabel; Schalk, J.; Reisinger, G.; Pude, R.; Müller, Joachim

    2011-01-01

    The objective of this study was to investigate the parameters that affect the drying process of wood chips at low air flow conditions. This objective was determined by measuring the air pressure resistance being produced by wood chips by examining different variables such as: air flow rate, air velocity, wood chip size, bulk density, bulk height and porosity. The air flow resistance was measured inside a 3 meter high cylindrical air duct constructed at University of Hohenheim. Physical proper...

  7. Wood chips procurement and research project at the Mikkeli region

    International Nuclear Information System (INIS)

    In 1993-94, a large-scale energywood production chain started as a co-operation project by the Mikkeli city forest office and local forestry societies. In 1995 over 115 000 m3 (about 85 000 MWh of energy) of wood chips were delivered to Pursiala heat and power plant in Mikkeli. About 75 % of these chips was forest processed chips. About 70 % of the forest processed chips was whole tree chips from improvement cuttings of young forest stands and the rest was logging waste chips from regeneration cutting areas. The average total delivery costs of forest processed chips after reduction of energywood and other subsidies were approximately 45 FIM/m3 (60 FIM/MWh) for the whole tree chips and 38 FIM/m3 (50 FIM/MWh) for logging waste chips. The delivery costs of forest processed chips could meet the target of Bioenergy Research Programme (45 FIM/MWh) only in the most favourable cases. In an average the delivery costs were about 9 FIM/MWh more than the price obtained when sold to the heat and power plant. However the wood chip production created 27 new jobs and the increase of income to the local economy was about 2.2 milj. FIM /year. The local communities got new tax revenue about 3 FIM/MWh. The gain for the forestry was approximated to be 5 - 6 FIM/MWh. The resources of forest processed chips were studied on the basis of stand measurements. According to the study the most remarkable energywood resources were in young thinning stands on Oxalis-Myrtillus and Myrtillus forest site types. On Oxalis-Myrtillus type almost every and on Myrtillus type every second stand included energywood more than 40 m3/ha

  8. The Technological Investigations Of Manufacturing Of Energy Chips

    OpenAIRE

    Miklašēvičs, Ziedonis

    2015-01-01

    The methodology in Latvia forest industry provide to determine the quality of energy chips only in long- term storage places before selling. Due to the lack of hard empirical data about the quality parameters of energy chips in different phases of manufacturing process, this research paper consists of: - the identification and analyses of the factors that influenced the values of energy chips quality features such as: bulk density, moisture content, ash content, higher and lower heating value...

  9. CMOS Image Sensors: Electronic Camera On A Chip

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

  10. The Cutting Process, Chips and Cutting Forces in Machining CFRP

    DEFF Research Database (Denmark)

    Koplev, A.; Lystrup, Aage; Vorm, T.

    1983-01-01

    The cutting of unidirectional CFRP, perpendicular as well as parallel to the fibre orientation, is examined. Shaping experiments, ‘quick-stop’ experiments, and a new chip preparation technique are used for the investigation. The formation of the chips, and the quality of the machined surface is d...... discussed. The cutting forces parallel and perpendicular to the cutting direction are measured for various parameters, and the results correlated to the formation of chips and the wear of the tool....

  11. Effect of cutting parameters on chip formation in orthogonal cutting

    OpenAIRE

    Ben Salem, S.; E. Bayraktar; M. Boujelbene; D. Katundi

    2012-01-01

    Purpose: of this paper is to study the chip formation to obtain the optimal cutting conditions and to observe the different chip formation mechanisms. Analysis of machining of a hardened alloy, X160CrMoV12-1 (cold work steel: AISI D2 with a ferritic and cementite matrix and coarse primary carbides), showed that there are relationships between the chip geometry, cutting conditions and the different micrographs under different metallurgical states.Design/methodology/approach: Machining of harde...

  12. Large Chip Production Mechanism under the Extreme Load Cutting Conditions

    Institute of Scientific and Technical Information of China (English)

    LIU Xianli; HE Genghuang; YAN Fugang; CHENG Yaonan; LIU Li

    2015-01-01

    There has existed a great deal of theory researches in term of chip production and chip breaking characteristics under conventional cutting and high speed cutting conditions, however, there isn’t sufficient research on chip formation mechanism as well as its influence on cutting state regarding large workpieces under extreme load cutting. This paper presents a model of large saw-tooth chip through applying finite element simulation method, which gives a profound analysis about the characteristics of the extreme load cutting as well as morphology and removal of the large chip. In the meantime, a calculation formula that gives a quantitative description of the saw-tooth level regarding the large chip is established on the basis of cutting experiments on high temperature and high strength steel 2.25Cr-1Mo-0.25V. The cutting experiments are carried out by using the scanning electron microscope and super depth of field electron microscope to measure and calculate the large chip produced under different cutting parameters, which can verify the validity of the established model. The calculating results show that the large saw-toothed chip is produced under the squeezing action between workpiece and cutting tools. In the meanwhile, the chip develops a hardened layer where contacts the cutting tool and the saw-tooth of the chip tend to form in transverse direction. This research creates the theoretical model for large chip and performs the cutting experiments under the extreme load cutting condition, as well as analyzes the production mechanism of the large chip in the macro and micro conditions. Therefore, the proposed research could provide theoretical guidance and technical support in improving productivity and cutting technology research.

  13. Firing with wood chips in heating and cogeneration plants

    International Nuclear Information System (INIS)

    The document was produced for use as detailed teaching material aimed at spreading information on the use of wood chips as fuel for heating and cogeneration plants. It includes information and articles on wood fuels generally, combustion values, chopping machines, suppliers, occupational health hazards connected with the handling of wood chips, measuring amounts, the selection of types, prices, ash, environmental aspects and information on the establishment of a wood-chip fired district heating plant. (AB)

  14. Exploring Alternative Topologies for Network-on-Chip Architectures

    OpenAIRE

    Shafi Patel; Parag Parandkar; Sumant Katiyal; Ankit Agrawal

    2011-01-01

    With increase in integration density and complexity of the system-on-Chip (SOC), the conventional interconnects are not suitable to fulfill the demands. The application of traditional network technologies in the form of Network-on-Chip is a potential solution. NoC design space has many variables. Selection of a better topology results in lesser complexities and better power-efficiency. In the proposed work, key research area in Network-on-chip design targeting communication infrastructure spe...

  15. Fermions and bosons on an atom chip

    Science.gov (United States)

    Extravour, Marcius H. T.

    Ultra-cold dilute gases of neutral atoms are attractive candidates for creating controlled mesoscopic quantum systems. In particular, quantum degenerate gases of bosonic and fermionic atoms can be used to model the correlated many-body behaviour of Bose and Fermi condensed matter systems, and to study matter wave interference and coherence. This thesis describes the experimental realization and manipulation of Bose-Einstein condensates (BECs) of 87Rb and degenerate Fermi gases (DFGs) of 40K using static and dynamic magnetic atom chip traps. Atom chips are versatile modern tools used to manipulate atomic gases. The chips consist of micrometre-scale conductors supported by a planar insulating substrate, and can be used to create confining potentials for neutral atoms tens or hundreds of micrometres from the chip surface. We demonstrate for the first time that a DFG can be produced via sympathetic cooling with a BEC using a simple single-vacuum-chamber apparatus. The large 40 K-87Rb collision rate afforded by the strongly confining atom chip potential permits rapid cooling of 40K to quantum degeneracy via sympathetic cooling with 87Rb. By studying 40K-87Rb cross-thermalization as a function of temperature, we observe the Ramsauer-Townsend reduction in the 40K-87Rb elastic scattering cross-section. We achieve DFG temperatures as low as T ≈ 0:1TF, and observe Fermi pressure in the time-of-flight expansion of the gas. This thesis also describes the radio-frequency (RF) manipulation of trapped atoms to create dressed state double-well potentials for BEC and DFG. We demonstrate for the first time that RF-dressed potentials are species-selective, permitting the formation of simultaneous 87Rb double-well and 40K single-well potentials using a 40K-87Rb mixture. We also develop tools to measure fluctuations of the relative atom number and relative phase of a dynamically split 87Rb BEC. In particular, we observe atom number fluctuations at the shot-noise level using time

  16. Chromosome and genetic testing using ChIP assay.

    Science.gov (United States)

    Kohzaki, Hidetsugu; Asano, Maki

    2016-01-01

    Chromatin immunoprecipitation (ChIP) assay can be used to easily visualize information about proteins, DNA, and RNA on chromosomes and is widely used for analysis of genomes, epigenomes, mRNAs, and non-coding RNAs. The ChIP assay can detect, not only DNA-binding proteins of various organisms, but also the temporal and spatial regulating mechanisms of RNA-binding proteins. Because of these features, demand for ChIP assay is expected to grow. Here, by using yeast and Drosophila as examples, we describe the superiority of the improved ChIP assay that we have developed. PMID:27100707

  17. Cost Effective Routing Implementations for On-chip Networks

    OpenAIRE

    Rodrigo Mocholi, Samuel

    2010-01-01

    Arquitecturas de múltiples núcleos como multiprocesadores (CMP) y soluciones multiprocesador para sistemas dentro del chip (MPSoCs) actuales se basan en la eficacia de las redes dentro del chip (NoC) para la comunicación entre los diversos núcleos. Un diseño eficiente de red dentro del chip debe ser escalable y al mismo tiempo obtener valores ajustados de área, latencia y consumo de energía. Para diseños de red dentro del chip de propósito general se suele usar topologías de malla 2D ya que s...

  18. Numerical Simulation of Chip Formation in Metal Cutting Process

    Directory of Open Access Journals (Sweden)

    HUANG Meixia

    2012-07-01

    Full Text Available In order to study the chip formation mechanism in metal cutting process, based on finite element software ABAQUS, establish finite element model, and carry out numerical simulation on serrated chip formation of Ni-base superalloy GH4169 and ribbon chip formation of 45# steel respectively.In addition, analyze the influence law of three factors (cutting speed, feed rate, back cutting depth on cutting force and the distribution rule of cutting heat in serrated chip formation of GH4169.  

  19. Mechanically Flexible Active Silicon Chips and Systems Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Using innovative chip thinning technology married with recently available packaging technology, this effort will produce Mechanically Flexible Multifunctional...

  20. HPV 9G DNA Chip: 100% Clinical Sensitivity and Specificity

    OpenAIRE

    An, Heejung; Song, Keum-Soo; Nimse, Satish Balasaheb; Kim, Junghoon; Nguyen, Van-Thuan; Ta, Van-Thao; Sayyed, Danishmalik Rafiq; Kim, Taisun

    2012-01-01

    We describe a novel HPV 9G DNA chip test for the accurate and reliable genotyping of human papillomavirus (HPV). The HPV 9G DNA chip test established its efficiency in terms of a signal-to-background ratio (SBR) of 200, which is 50 times superior to commercial HPV DNA chips, and 100% target-specific hybridization at 25°C. We compared the genotyping results for the 439 clinical samples by the HPV 9G DNA chip test with the sequencing results for the MY11/GP6+ (M2) primer set-mediated PCR produc...

  1. ANALYTICAL CHIP FORMATION MODEL OF MICRO-END-MILLING

    Institute of Scientific and Technical Information of China (English)

    LI Chengfeng; LAI Xinmin; LI Hongtao; PENG Linfa; NI Jun

    2008-01-01

    A new analytical chip formation model is proposed for micro-end-milling operations. The model calculates an instantaneous uncut chip thickness by considering the combination of exact trochoidal trajectory of the tool tip and tool run-out, while the simplified circular trajectory and the neglected run-out create negligible change in conventional-scale chip formation models. Newton-Raphson iterative method is employed during the calculation to obtain quadratic convergence. The proposed approach allows the calculation of instantaneous uncut chip thickness to be done accurately and rapidly, and the prediction accuracy of this model is also verified by comparing the simulation results to experimental cutting forces.

  2. Integrated lasers for polymer Lab-on-a-Chip systems

    DEFF Research Database (Denmark)

    Mappes, Timo; Vannahme, Christoph; Grosmann, Tobias; Beck, Torsten; Wienhold, Tobias; Bog, Uwe; Breithaupt, Felix; Brammer, Marko; Liu, Xin; Klinkhammer, Sonke; Laue, Thomas; Hirtz, Michael; Christiansen, Mads Brokner; Kristensen, Anders; Lemmer, Uli; Kalt, Heinz

    2012-01-01

    We develop optical Lab-on-a-Chips on different platforms for marker-based and label-free biophotonic sensor applications. Our chips are based on polymers and fabricated by mass production technologies to integrate microfluidic channels, optical waveguides and miniaturized lasers.......We develop optical Lab-on-a-Chips on different platforms for marker-based and label-free biophotonic sensor applications. Our chips are based on polymers and fabricated by mass production technologies to integrate microfluidic channels, optical waveguides and miniaturized lasers....

  3. Router Architecture for Network on Chip Using FPGA

    Directory of Open Access Journals (Sweden)

    P. B. Domkondwar D. S. Chaudhari

    2012-04-01

    Full Text Available On Single chip integration of storage and computational block has becoming feasible due to continuous shrinkage of CMOS technology [1]. Field programmable gate arrays (FPGA’s are power efficient devices [3] support more complex design with good performance and low cost [6]. For effective global on-chip communication, on-chip routers provide essential routing functionality with low complexity and relatively high performance [1]. Routers implemented within FPGA can give better performance with reduced area and hence reduced power consumption [4]. This paper will provide an overview of related work for on-chip router architectures.

  4. DVFS using clock scheduling for Multicore Systems-on-Chip and Networks-on-Chip

    OpenAIRE

    Yadav, Manoj Kumar

    2014-01-01

    A modern System-on-Chip (SoC) contains processor cores, application-specific process- ing elements, memory, peripherals, all connected with a high-bandwidth and low-latency Network-on-Chip (NoC). The downside of such very high level of integration and con- nectivity is the high power consumption. In CMOS technology this is made of a dynamic and a static component. To reduce the dynamic component, Dynamic voltage and Fre- quency Scaling (DVFS) has been adopted. Although DVFS is very effective ...

  5. Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers

    Science.gov (United States)

    Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Kim, Sun Ae; Oh, Jin Hyuk; Park, Jaegyu; Kim, Sanggi

    2016-03-01

    We present new scheme for chip-level photonic I/Os, based on monolithically integrated vertical photonic devices on bulk silicon, which increases the integration level of PICs to a complete photonic transceiver (TRx) including chip-level light source. A prototype of the single-chip photonic TRx based on a bulk silicon substrate demonstrated 20 Gb/s low power chip-level optical interconnects between fabricated chips, proving that this scheme can offer compact low-cost chip-level I/O solutions and have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, 3D-IC, and LAN/SAN/data-center and network applications.

  6. Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip

    OpenAIRE

    Kritikos, William V.; Andrew G. Schmidt; Ron Sass; Anderson, Erik K.; Matthew French

    2012-01-01

    The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core Systems on a programmable chip (MCSoPC). Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software and/or hardware, that communicate over a seamless interface. Redsharc incorporates two on-chip networks that directly implement the API to suppor...

  7. Evaluation of Pressure Stable Chip-to-Tube Fittings Enabling High-Speed Chip-HPLC with Mass Spectrometric Detection.

    Science.gov (United States)

    Lotter, Carsten; Heiland, Josef J; Stein, Volkmar; Klimkait, Michael; Queisser, Marco; Belder, Detlev

    2016-08-01

    Appropriate chip-to-tube interfacing is an enabling technology for high-pressure and high-speed liquid chromatography on chip. For this purpose, various approaches, to connect pressure resistant glass chips with HPLC pumps working at pressures of up to 500 bar, were examined. Three side-port and one top-port connection approach were evaluated with regard to pressure stability and extra column band broadening. A clamp-based top-port approach enabled chip-HPLC-MS analysis of herbicides at the highest pressure and speed. PMID:27397738

  8. A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection

    Directory of Open Access Journals (Sweden)

    Diwei He

    2015-07-01

    Full Text Available Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 µm CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the transimpedance amplifier, transimpedance gain of the transimpedance amplifier, and the central frequency and bandwidth of the analogue band-pass filters, show a good match (within 1% with the circuit simulations. With modulated light source and integrated lock-in detection the sensor effectively suppresses the interference from ambient light and 1/f noise. In a breath hold and release experiment the single chip sensor demonstrates consistent and comparable performance to commercial pulse oximetry devices with a mean of 1.2% difference. The single-chip sensor enables a compact and robust design solution that offers a route towards wearable devices for health monitoring.

  9. "Chips with Everything": A Laboratory Exercise for Comparing Subjective and Objective Measurements of Potato Chips

    Science.gov (United States)

    Davies, Cathy

    2005-01-01

    The following laboratory exercise was designed to aid student understanding of the differences between subjective and objective measurements. Students assess the color and texture of different varieties of potato chip (crisps) by means of an intensity rating scale and a rank test and objectively with a colorimeter and texture analyzer. For data…

  10. A chemically inert multichannel chip-to-world interface to connect microfluidic chips

    Science.gov (United States)

    Neumann, Christiane; Wilhelm, Elisabeth; Duttenhofer, Thomas; Pires, Leonardo; Rapp, Bastian E.

    2014-03-01

    Within the last decades more and more microfluidic systems for applications in chemistry, biology or medicine were developed. Most of them need a connection between the chip and its macroscopic environment e.g., pumps. Numerous concepts for such interconnections are known from literature but most of them allow only a small number of connections and are neither chemically inert nor contamination-free. We developed a chemically inert, reusable, multichannel Chipto- World-Interface (CWI) based on a force fit connection. This principle is comparable to hollow screws as used in highperformance liquid chromatography. The CWI can be used to connect chips, made of different materials, e.g., glass, polydimethylsiloxane (PDMS), or epoxy polymers, with up to 100 thermoplastic tubes. The dimensions of the CWI and the number of connections can be individually adapted depending on the chip dimensions but the pitch between the tubes is fixed. Due to the design of the CWI the fluid is only in contact with the chip and the tubing material, thus leading to a contamination free and zero dead volume interconnection. Using tubes of polytetrafluorethylene (PTFE, Teflon®) even enables probing with organic solvents like dimethylformamide, dichloromethane or tetrahydrofuran over several hours without leakage or corrosion of the CWI. During experiments the CWI with 100 connections resisted pressure up to 630 kPa (6.3 bar) and sustained flow rates higher than 4 ml/min.

  11. Computer System Design System-on-Chip

    CERN Document Server

    Flynn, Michael J

    2011-01-01

    The next generation of computer system designers will be less concerned about details of processors and memories, and more concerned about the elements of a system tailored to particular applications. These designers will have a fundamental knowledge of processors and other elements in the system, but the success of their design will depend on the skills in making system-level tradeoffs that optimize the cost, performance and other attributes to meet application requirements. This book provides a new treatment of computer system design, particularly for System-on-Chip (SOC), which addresses th

  12. Heterogeneously integrated microsystem-on-a-chip

    Science.gov (United States)

    Chanchani, Rajen

    2008-02-26

    A microsystem-on-a-chip comprises a bottom wafer of normal thickness and a series of thinned wafers can be stacked on the bottom wafer, glued and electrically interconnected. The interconnection layer comprises a compliant dielectric material, an interconnect structure, and can include embedded passives. The stacked wafer technology provides a heterogeneously integrated, ultra-miniaturized, higher performing, robust and cost-effective microsystem package. The highly integrated microsystem package, comprising electronics, sensors, optics, and MEMS, can be miniaturized both in volume and footprint to the size of a bottle-cap or less.

  13. On-a-chip surface plasmon tweezers

    Science.gov (United States)

    Wong, H. M. K.; Righini, M.; Gates, J. C.; Smith, P. G. R.; Pruneri, V.; Quidant, R.

    2011-08-01

    We report on an integrated optical trapping platform operated by simple fiber coupling. The system consists of a dielectric channel optical waveguide decorated with an array of gold micro-pads. Through a suitable engineering of the waveguide mode, we achieve light coupling to the surface plasmon resonance of the gold pads that act as individual plasmonic traps. We demonstrate parallel trapping of both micrometer size polystyrene beads and yeast cells at predetermined locations on the chip with only 20 mW total incident laser power.

  14. Cooperative phenomena in superconducting atom-chips

    Energy Technology Data Exchange (ETDEWEB)

    Fuchs, Sebastian; Kubala, Bjoern; Ankerhold, Joachim [Institut fuer Theoretische Physik, Universitaet Ulm, Albert-Einstein-Allee 11, 89069 Ulm (Germany)

    2013-07-01

    We theoretically investigate the physics of hybrid quantum systems, where a cloud of cold atoms is coupled to superconducting microstructures, so called superconducting atom-chips. Coherent enhancement, due to the large number of atoms in the cloud, opens a path to the study of strong coupling effects, like superradiance/Dicke-physics in a decohering environment. A structured environment can be designed by embedding a Cooper pair box within the cavity. Moreover, in such a system the transfer of quantum information between the atomic cloud and the superconducting solid state system can be studied.

  15. Cooperative phenomena in superconducting atom-chips

    International Nuclear Information System (INIS)

    We theoretically investigate the physics of hybrid quantum systems, where a cloud of cold atoms is coupled to superconducting microstructures, so called superconducting atom-chips. Coherent enhancement, due to the large number of atoms in the cloud, opens a path to the study of strong coupling effects, like superradiance/Dicke-physics in a decohering environment. A structured environment can be designed by embedding a Cooper pair box within the cavity. Moreover, in such a system the transfer of quantum information between the atomic cloud and the superconducting solid state system can be studied.

  16. Wood harvesting as chunkwood chips and multi-stage chipping; Puun korjuu palahakkeena ja monivaiheinen lastuaminen

    Energy Technology Data Exchange (ETDEWEB)

    Kaipainen, H.; Seppaenen, V.

    1996-12-31

    The task for the year 1995 was to define the preliminary results of the previous years, to measure the productivity of a harvester, designed for production of chunkwood, and the properties of the chunks. The costs of the PALAPUU method from the felling site to pulpwood chips were to be examined on this basis. Because the prototype of the harvester was not yet available for field tests, the costs were partially calculated on the basis of previous measurements, completed by productivity data obtained from the time-consumption measurements of a multi-tree harvester, applied with minor alteration for this purpose. According to the calculations the PALAPUU method cannot compete with partial-tree or shortwood methods. The profitability of the method could be improved by adding the transportation density and the productivity of the harvester. It is also possible to procure timber to the mill as partial-trees and to chunk it while feeding it into the drum. Chipping tests were made using the steel-frame-chipper owned by VTT Construction Technology. The blade construction of the chipper was changed so, that it was possible to adjust the cutting thickness of the chips to 4 mm, while in the previous mill-tests it had been 6 mm. The chips were used for cooking tests in the Department of Chemistry of the University of Jyvaeskylae. The results showed that the thinner chips were cooked further under the same cooking conditions. By using the chunkwood method it is possible to harvest 10-70 more biomass for the mills, than it is possible in the pulpwood harvesting

  17. Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

    Directory of Open Access Journals (Sweden)

    Dasheng Lee

    2008-12-01

    Full Text Available In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV measurement. The energy harvesting wireless sensor network (WSN was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an

  18. Experiment list: SRX119684 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 2,13603 GSM874990: ES.H3K79me2; Homo sapiens; ChIP-Seq source_name=H1 human Embryonic stem cell || cell line=H1 || treatment=diagnost...ic sample (pre-treatment) || chip antibody=H3K79me2 || chip antibody manufacturer=A

  19. Experiment list: SRX119679 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 8,18360 GSM874985: ES.H3K27me3; Homo sapiens; ChIP-Seq source_name=H1 human Embryonic stem cells || cell line=H1 || treatment=diagnos...tic sample (pre-treatment) || chip antibody=H3K27me3 || chip antibody manufacturer=

  20. Experiment list: SRX170376 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Diagnosis=Normal 9474255,92.7,4.5,398 GSM971949: HEK293 HP1a ChIPSeq; Homo sapiens; ChIP-Seq source_name=HEK293..., HP1a ChIP || cell line=HEK293 || chip antibody=anti-FLAG M2 affinity gel || antibody vendor=Sigma-Aldri

  1. Experiment list: SRX170377 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Diagnosis=Normal 11861200,76.8,8.0,229 GSM971950: HEK293 HP1b ChIPSeq; Homo sapiens; ChIP-Seq source_name=HEK293..., HP1b ChIP || cell line=HEK293 || chip antibody=anti-FLAG M2 affinity gel || antibody vendor=Sigma-Aldr

  2. Experiment list: SRX170373 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Diagnosis=Normal 12749066,94.0,7.9,19829 GSM971946: HEK293 Brd2 ChIPSeq; Homo sapiens; ChIP-Seq source_name=HEK293..., Brd2 ChIP || cell line=HEK293 || chip antibody=anti-FLAG M2 affinity gel || antibody vendor=Sigma-Al

  3. Experiment list: SRX170374 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Diagnosis=Normal 12901656,89.7,3.2,445 GSM971947: HEK293 Brd3 ChIPSeq; Homo sapiens; ChIP-Seq source_name=HEK293..., Brd3 ChIP || cell line=HEK293 || chip antibody=anti-FLAG M2 affinity gel || antibody vendor=Sigma-Aldr

  4. Experiment list: SRX170375 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Diagnosis=Normal 13813513,90.4,3.3,191 GSM971948: HEK293 Brd4 ChIPSeq; Homo sapiens; ChIP-Seq source_name=HEK293..., Brd4 ChIP || cell line=HEK293 || chip antibody=anti-FLAG M2 affinity gel || antibody vendor=Sigma-Aldr

  5. Experiment list: SRX507382 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available + (wildtype) || age of animals=1-5 day old || tissue=Ovaries || chip antibody=Anti-H3K9me3 || chip antibody ... Anti-H3K9me3- replicate#2; Drosophila melanogaster; ChIP-Seq source_name=WT_WT_Anti-H3K9me3 || strain=piwi/

  6. Experiment list: SRX507383 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available + (wildtype) || age of animals=1-5 day old || tissue=Ovaries || chip antibody=Anti-H3K4me2 || chip antibody ... Anti-H3K4me2- replicate#1; Drosophila melanogaster; ChIP-Seq source_name=WT_WT_Anti-H3K4me2 || strain=piwi/

  7. Experiment list: SRX507380 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available + (wildtype) || age of animals=1-5 day old || tissue=Ovaries || chip antibody=anti-HP1 || chip antibody vend...1770: WT anti-HP1- replicate#2; Drosophila melanogaster; ChIP-Seq source_name=WT_WT_anti-HP1 || strain=piwi/

  8. Experiment list: SRX507381 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available + (wildtype) || age of animals=1-5 day old || tissue=Ovaries || chip antibody=Anti-H3K9me3 || chip antibody ...Anti-H3K9me3 - replicate#1; Drosophila melanogaster; ChIP-Seq source_name=WT_WT_Anti-H3K9me3 || strain=piwi/

  9. Design and test of the CMS pixel readout chip

    Science.gov (United States)

    Barbero, M.; Bertl, W.; Dietrich, G.; Dorokhov, A.; Erdmann, W.; Gabathuler, K.; Heising, St.; Hörmann, Ch.; Horisberger, R.; Kästli, H. Chr.; Kotlinski, D.; Meier, B.; Weber, R.

    2004-01-01

    The readout chip for the CMS pixel detector must handle an enormous flux of data, while keeping the data loss at a minimum. Full size prototype readout chips bump-bonded to sensors have been tested in a pion beam simulating an LHC-like environment, and the data loss as a function of particle fluence has been measured.

  10. Experiment list: SRX1038541 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1695734: H8083 Red1 ChIP in pREC8-SCC1 biological replicate 1; Saccharomyces cerevisiae; ChIP-Seq source_nam...e=Red1 ChIP in pREC8-SCC1 biological replicate 1 || strain=sk1 || meiotic timepoint=3 hour || genotype=pREC8

  11. Experiment list: SRX1038525 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1695718: H119 Red1 ChIP biological replicate 1; Saccharomyces cerevisiae; ChIP-Seq source_name=Red1 ChIP of H119 biological...SRX1038525 sacCer3 TFs and others RED1 Yeast strain SK1 NA 22907545,92.4,48.3,0 GSM

  12. Experiment list: SRX1038526 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 695719: H119 Red1 ChIP biological replicate 2; Saccharomyces cerevisiae; ChIP-Seq source_name=Red1 ChIP of H119 biological...SRX1038526 sacCer3 TFs and others RED1 Yeast strain SK1 NA 6440074,94.5,38.5,0 GSM1

  13. Experiment list: SRX1038537 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1695730: H6200 Red1 ChIP in rec8 delta biological replicate 1; Saccharomyces cerevisiae; ChIP-Seq source_nam...e=Red1 ChIP in rec8 delta biological replicate 1 || strain=sk1 || meiotic timepoint=3 hour || genotype=rec8

  14. Experiment list: SRX1038542 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1695735: H8083 Red1 ChIP in pREC8-SCC1 biological replicate 2; Saccharomyces cerevisiae; ChIP-Seq source_nam...e=Red1 ChIP in pREC8-SCC1 biological replicate 2 || strain=sk1 || meiotic timepoint=3 hour || genotype=pREC8

  15. Experiment list: SRX1038534 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 95727: H6309 Smc3 ChIP biological replicate 1; Saccharomyces cerevisiae; ChIP-Seq source_name=Smc3 ChIP of H6309 biological...SRX1038534 sacCer3 TFs and others SMC3 Yeast strain SK1 NA 1594898,87.7,9.1,0 GSM16

  16. Experiment list: SRX1038532 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 695725: H4471 Rec8 ChIP biological replicate 2; Saccharomyces cerevisiae; ChIP-Seq source_name=Red1 ChIP of H4471 biological...SRX1038532 sacCer3 TFs and others RED1 Yeast strain SK1 NA 1426016,92.6,26.8,0 GSM1

  17. Experiment list: SRX1038538 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 695731: H7660 Red1 ChIP in rec8 delta biological replicate 2; Saccharomyces cerevisiae; ChIP-Seq source_name...=Red1 ChIP in rec8 delta biological replicate 2 || strain=sk1 || meiotic timepoint=3 hour || genotype=rec8 d

  18. Experiment list: SRX821798 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available riment type=PPARG ChIP-seq || strain=N/A || tissue=NA || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotech...nologies http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/

  19. Experiment list: SRX821808 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available pe=PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechno...logies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/e

  20. Design of an Enterobacteriaceae Pan-genome Microarray Chip

    DEFF Research Database (Denmark)

    Lukjancenko, Oksana; Ussery, David

    2010-01-01

    -density microarray chip has been designed, using 116 Enterobacteriaceae genome sequences, taking into account the enteric pan-genome. Probes for the microarray were checked in silico and performance of the chip, based on experimental strains from four different genera, demonstrate a relatively high ability...

  1. Flow control in microfluidic chips : Material choice and smart design

    NARCIS (Netherlands)

    Debrauwer, P.; Emmelkamp, J.; Bolt, P.J.

    2009-01-01

    This paper describes a model and experiments to validate it for the design of bubble free chambers and channels in microfluidic chips. When handling liquids in a microfluidic chip problems may arise with entrapping air or liquid. These air and liquid bubbles deteriorate the efficiency of the process

  2. Experiment list: SRX1338947 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ription=Progenitor cells from which all blood cells derive. 38987751,98.2,6.0,267 GSM1909031: Resistant line ChIP input...tion=Resistant || strain=C57BL/6 || chip antibody=none (input) http://dbarchive.b

  3. Experiment list: SRX671992 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ; Mus musculus; ChIP-Seq source_name=embryonic stem cells, TC11, empty vector, input || strain/background=12...9/Ola || transchromosomic=hsa11 || plasmid=empty vector || chip_or_input=input DNA || chip antibody=none ||

  4. Experiment list: SRX365696 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e_name=Kc167_CP190_ChIP-seq || cell line=Kc167 || chip antibody=CP190 rabbit || chip antibody reference=PMID:21852534 || input... used=input-b http://dbarchive.biosciencedbc.jp/kyushu-u/dm3/ea

  5. Experiment list: SRX1338948 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ription=Progenitor cells from which all blood cells derive. 38012300,94.7,8.9,314 GSM1909032: Sensitive line ChIP input...tion=Sensitive || strain=C57BL/6 || chip antibody=none (input) http://dbarchive.b

  6. Experiment list: SRX791596 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available idered part of the BASAL GANGLIA. 172081391,94.4,6.9,1090 GSM1556658: C Input; Mus musculus; ChIP-Seq source_name=mouse cocai...ne NAc ChIP input || tissue=nucleus accumbens || chip antibody=input || strategy=ChIP-seq || treatment=Cocai

  7. Experiment list: SRX200052 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 4 GSM1023626: LaminA ChIP, HGPS, p16, rep2; Homo sapiens; ChIP-Seq source_name=patient forearm skin biopsy, ...lamin ChIP || disease status=Hutchinson-Gilford progeria syndrome || tissue=forearm skin biopsy || cell type

  8. Experiment list: SRX200048 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 7 GSM1023622: LaminA ChIP, Father, p16, rep2; Homo sapiens; ChIP-Seq source_name=normal forearm skin biopsy,... lamin ChIP || disease status=normal || tissue=forearm skin biopsy || cell type=fibroblasts || gender=male |

  9. Experiment list: SRX200038 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available M1023612: H3K27me3 ChIP, Father, p19; Homo sapiens; ChIP-Seq source_name=normal forearm skin biopsy, H3K27me...3 ChIP || disease status=normal || tissue=forearm skin biopsy || cell type=fibroblasts || gender=male || cel

  10. Experiment list: SRX200046 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available GSM1023620: LaminA ChIP, Father, p16, rep1; Homo sapiens; ChIP-Seq source_name=normal forearm skin biopsy, ...lamin ChIP || disease status=normal || tissue=forearm skin biopsy || cell type=fibroblasts || gender=male ||

  11. Experiment list: SRX200042 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1023616: H3K27me3 ChIP, HGPS, p14; Homo sapiens; ChIP-Seq source_name=patient forearm skin biopsy, H3K27me3 ...ChIP || disease status=Hutchinson-Gilford progeria syndrome || tissue=forearm skin biopsy || cell type=fibro

  12. Experiment list: SRX200044 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available M1023618: H3K27me3 ChIP, HGPS, p17; Homo sapiens; ChIP-Seq source_name=patient forearm skin biopsy, H3K27me3... ChIP || disease status=Hutchinson-Gilford progeria syndrome || tissue=forearm skin biopsy || cell type=fibr

  13. Experiment list: SRX200050 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available GSM1023624: LaminA ChIP, HGPS, p16, rep1; Homo sapiens; ChIP-Seq source_name=patient forearm skin biopsy, l...amin ChIP || disease status=Hutchinson-Gilford progeria syndrome || tissue=forearm skin biopsy || cell type=

  14. Experiment list: SRX200040 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 14: H3K27me3 ChIP, Age Control, p17; Homo sapiens; ChIP-Seq source_name=normal skin biopsy, H3K27me3 ChIP ||... disease status=normal || tissue=skin biopsy || cell type=fibroblasts || gender=female || cell line=AG08470

  15. Advanced Micro Narrows Gap in Race for New Chip

    Institute of Scientific and Technical Information of China (English)

    John Markoff; 张宁

    2004-01-01

    @@ Hoping to catch up with Intel and I. B. M. in an advanced chip-making technology, the semiconductor maker Advanced Micro Devices plans to announce Tuesday that it has begun to ship chips based on an advanced manufacturing process that is being used to build the next generation of processors.

  16. Fast prototyping of injection molded polymer microfluidic chips

    DEFF Research Database (Denmark)

    Hansen, Thomas Steen; Selmeczi, David; Larsen, Niels Bent

    2010-01-01

    , likely due to the resulting reduction in sidewall steepness. We employed the latter method for injection molding bondable polymer microfluidic chips with integrated conducting polymer electrode arrays that permitted the culture and on-chip analysis of cell spreading by impedance spectroscopy....

  17. Experiment list: SRX220827 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available n fetal lung fibroblast cells, growing, H3K4me3 ChIP || cell line=IMR90 || cell type=human fetal lung fibrob...last cell line || growth state=growing || chip antibody=anti-H3K4me3 http://dbarc

  18. Experiment list: SRX821816 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e=PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnol...ogies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/ea

  19. Experiment list: SRX821807 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e=PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnol...ogies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/ea

  20. Experiment list: SRX821810 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e=PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechnol...ogies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/ea

  1. Experiment list: SRX821814 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available pe=PPARG ChIP-seq || tissue=SQ White Adipose Tissue || chip antibody=anti-PPAR? antibody || chip antibody vendor=Santa Cruz Biotechno...logies http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/e

  2. Experiment list: SRX262791 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available nology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/ea...IH3T3_MRTFB_LAT || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-B || chip antibody vendor=Santa Cruz Biotech

  3. Experiment list: SRX262797 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 3T3_SAP1_03 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SAP-1a || chip antibody vendor=Santa Cruz Biotechnolo...gy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachDa

  4. Experiment list: SRX262787 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available IH3T3_MRTFA_LAT || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-A || chip antibody vendor=Santa Cruz Biotech...nology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/ea

  5. Experiment list: SRX262792 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available H3T3_MRTFB_UO || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-B || chip antibody vendor=Santa Cruz Biotechno...logy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/each

  6. Experiment list: SRX262798 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 3T3_SAP1_15 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SAP-1a || chip antibody vendor=Santa Cruz Biotechnolo...gy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eachDa

  7. Experiment list: SRX262790 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available IH3T3_MRTFB_15 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-B || chip antibody vendor=Santa Cruz Biotechn...ology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/eac

  8. Experiment list: SRX262789 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available H3T3_MRTFB_03 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-B || chip antibody vendor=Santa Cruz Biotechno...logy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/each

  9. Experiment list: SRX262781 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available _name=NIH3T3_SRF_15 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=SRF || chip antibody vendor=Santa Cruz Biotec...hnology http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/e

  10. Experiment list: SRX262785 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available H3T3_MRTFA_03 || cell line=NIH3T3 fibroblasts || genotype=normal || chip antibody=MRTF-A || chip antibody vendor=Santa Cruz Biotechno...logy http://dbarchive.biosciencedbc.jp/kyushu-u/mm9/each

  11. The three-dimensional structure of human erythrocyte aquaporin CHIP.

    Science.gov (United States)

    Walz, T; Smith, B L; Agre, P; Engel, A

    1994-07-01

    Water-permeable membranes of several plant and mammalian tissues contain specific water channel proteins, the 'aquaporins'. The best characterized aquaporin is CHIP, a 28 kDa red blood cell channel-forming integral protein. Isolated CHIP and Escherichia coli lipids may be assembled into 2-D crystals for structural analyses. Here we present (i) a structural characterization of the solubilized CHIP oligomers, (ii) projections of CHIP arrays after negative staining or metal-shadowing, and (iii) the 3-D structure at 1.6 nm resolution. Negatively stained CHIP oligomers exhibited a side length of 6.9 nm with four-fold symmetry, and a mass of 202 +/- 3 kDa determined by scanning transmission electron microscopy. Reconstituted into lipid bilayers, CHIP formed 2-D square lattices with unit cell dimensions a = b = 9.6 nm and a p422(1) symmetry. The 3-D map revealed that CHIP tetramers contain central stain-filled depressions about the fourfold axis. These cavities extend from both sides into the transbilayer domain of the molecule leaving only a thin barrier to be penetrated by the water pores. Although CHIP monomers behave as independent pores, we propose that their particular structure requires tetramerization for stable integration into the bilayer. PMID:7518771

  12. Experiment list: SRX037430 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =peripheral blood mononuclear cells 14488927,12.8,2.8,1378 GSM648492: Treg-H3K4me1 source_name=Treg cells fr...om PBMC, normal || gender=male || cell type=Treg cells || chip antibody=H3K4me1 || chip antibody vendor=Abca

  13. Experiment list: SRX037431 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =peripheral blood mononuclear cells 20224353,15.6,11.0,26171 GSM648493: Treg-H3K4me3 source_name=Treg cells ...from PBMC, normal || gender=male || cell type=Treg cells || chip antibody=H3K4me3 || chip antibody vendor=Ab

  14. Experiment list: SRX327768 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Site of Extraction=Effusion, Pleural|Tissue Diagnosis=Carcinoma Small Cell 49325280,95.0,26.6,19188 GSM11955...68: H2171 DMSO POL2 ChipSeq; Homo sapiens; ChIP-Seq source_name=Small Cell Lung Carcinoma || chip antibody=R

  15. Experiment list: SRX204900 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ction=Effusion, Pleural|Tissue Diagnosis=Carcinoma Small Cell 46274812,93.4,19.9,50407 GSM1038270: H2171 BRD...4; Homo sapiens; ChIP-Seq source_name=Small Cell Lung Carcinoma || chip antibody=Brd4 || chip antibody detai

  16. Research of Dielectric Breakdown Micro fluidic Sampling Chip

    International Nuclear Information System (INIS)

    Micro fluidic chip is mainly driven electrically by external electrode and array electrode, but there are certain disadvantages in both of ways, which affect the promotion and application of micro fluidic technology. This paper discusses a scheme that uses the conductive solution in a microchannel made by PDMS, replacing electrodes and the way of dielectric breakdown to achieve microfluidic chip driver. It could reduce the driving voltage and simplify the chip production process. To prove the feasibility of this method, we produced a micro fluidic chip used in PDMS material with the lithography technology and experimented it. The results showed that using the dielectric breakdown to achieve microfluidic chip driver is feasible, and it has certain application prospect.

  17. Reagent-loaded plastic microfluidic chips for detecting homocysteine

    International Nuclear Information System (INIS)

    This report describes the preliminary study on plastic microfluidic chips with pre-loaded reagents for detecting homocysteine (Hcy). All reagents needed in an Hcy immunoassay were included in a microfluidic chip to remove tedious assay steps. A simple and cost-effective bonding method was developed to realize reagent-loaded microfluidic chips. This technique uses an intermediate layer between two plastic substrates by selectively patterning polydimethylsiloxane (PDMS) on the embossed surface of microchannels and fixing the substrates under pressure. Using this bonding method, the competitive immunoassay for SAH, a converted form of Hcy, was performed without any damage to reagents in chips, and the results showed that the fluorescent signal from antibody antigen binding decreased as the SAH concentration increased. Based on the SAH immunoassay, whole immunoassay steps for Hcy detection were carried out in plastic microfluidic chips with all necessary reagents. These experiments demonstrated the feasibility of the Hcy immunoassay in microfluidic devices

  18. Isotachophoretic analysis using injection-moulded polystyrene chip devices

    International Nuclear Information System (INIS)

    A new type of miniaturized separation chip for performing isotachophoresis has been produced. The design uses polystyrene as a substrate material and incorporates carbon fibre loaded polystyrene drive and conductivity detection electrodes. This fully polymeric composition allows for the devices to be produced using injection moulding. Ultrasonic welding is used for sealing to give robust chips that can potentially be easily transported and used outside of a laboratory environment. A batch of devices was produced and tested with a number of inorganic cationic species as samples. The entire batch of 22 devices were successfully used for isotachophoretic separations. Good reproducibility was observed in the qualitative behaviour of the devices. For example, with lithium a relative step height ± standard deviation of 1.49 ± 0.01 was observed on a run-to-run basis with a single chip and of 1.47 ± 0.03 on a chip-to-chip basis over the entire batch of devices

  19. A Chip of Counter and Parallel Interface Port Using FPGA

    International Nuclear Information System (INIS)

    A chip contained two 16 bit counters and parallel interface port has been constructed by using Field Programmable Gate Array (FPGA) made by Altera. One of the aim of this activity was to replace the interfacing card which were using Programmable Logic Device (PLD) and others supporting components placed on personal computer expansion slot ISA or EISA, with a compatible Chip. The result was a 44 pin Chip with a single 5 V supply. The experiment test showed that the input output ports were working properly. The Simulation timing showed suitably as the requirement. The Chip was designed for the instruments which needed a counter, timer and connected to the computer as data acquisition and control. The advantage of this Chip was the compatibility of the pin parallel port standard, it can be connected with any computers type. (author)

  20. Mathematical Simulation for Integrated Linear Fresnel Spectrometer Chip

    Science.gov (United States)

    Park, Yeonjoon; Yoon, Hargoon; Lee, Uhn; King, Glen C.; Choi, Sang H.

    2012-01-01

    A miniaturized solid-state optical spectrometer chip was designed with a linear gradient-gap Fresnel grating which was mounted perpendicularly to a sensor array surface and simulated for its performance and functionality. Unlike common spectrometers which are based on Fraunhoffer diffraction with a regular periodic line grating, the new linear gradient grating Fresnel spectrometer chip can be miniaturized to a much smaller form-factor into the Fresnel regime exceeding the limit of conventional spectrometers. This mathematical calculation shows that building a tiny motionless multi-pixel microspectrometer chip which is smaller than 1 cubic millimter of optical path volume is possible. The new Fresnel spectrometer chip is proportional to the energy scale (hc/lambda), while the conventional spectrometers are proportional to the wavelength scale (lambda). We report the theoretical optical working principle and new data collection algorithm of the new Fresnel spectrometer to build a compact integrated optical chip.

  1. Mathematical simulation for integrated linear Fresnel spectrometer chip

    Science.gov (United States)

    Park, Yeonjoon; Yoon, Hargsoon; Lee, Uhn; King, Glen C.; Choi, Sang

    2012-04-01

    A miniaturized solid-state optical spectrometer chip was designed with a linear gradient-gap Fresnel grating which was mounted perpendicularly to a sensor array surface and simulated for its performance and functionality. Unlike common spectrometers which are based on Fraunhoffer diffraction with a regular periodic line grating, the new linear gradient grating Fresnel spectrometer chip can be miniaturized to a much smaller form-factor into the Fresnel regime exceeding the limit of conventional spectrometers. This mathematical calculation shows that building a tiny motionless multi-pixel microspectrometer chip which is smaller than 1mm3 of optical path volume is possible. The new Fresnel spectrometer chip is proportional to the energy scale (hc/λ), while the conventional spectrometers are proportional to the wavelength scale (λ). We report the theoretical optical working principle and new data collection algorithm of the new Fresnel spectrometer to build a compact integrated optical chip.

  2. Progress in Atom Chips and the Integration of Optical Microcavities

    Science.gov (United States)

    Hinds, E. A.; Trupke, M.; Darquie, B.; Goldwin, J.; Dutier, G.

    2008-04-01

    We review recent progress at the Centre for Cold Matter in developing atom chips. An important advantage of miniaturizing atom traps on a chip is the possibility of obtaining very tight trapping structures with the capability of manipulating atoms on the micron length scale. We recall some of the pros and cons of bringing atoms close to the chip surface, as is required in order to make small static structures, and we discuss the relative merits of metallic, dielectric and superconducting chip surfaces. We point out that the addition of integrated optical devices on the chip can enhance its capability through single atom detection and controlled photon production. Finally, we review the status of integrated microcavities that have recently been demonstrated at our Centre and discuss their prospects for future development.

  3. Modelling, Synthesis, and Configuration of Networks-on-Chips

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo

    This thesis presents three contributions in two different areas of network-on-chip and system-on-chip research: Application modelling and identifying and solving different optimization problems related to two specific network-on-chip architectures. The contribution related to application modelling...... is an analytical method for deriving the worst-case traffic pattern caused by an application and the cache-coherence protocol in a cache-coherent shared-memory system. The contributions related to network-on-chip optimization problems consist of two parts: The development and evaluation of six...... heuristics for solving the network synthesis problem in the MANGO network-on-chip, and the identification and formalization of the ReNoC configuration problem together with three heuristics for solving it....

  4. 75 FR 447 - In the Matter of Certain Semiconductor Chips With Minimized Chip Package Size and Products...

    Science.gov (United States)

    2010-01-05

    ..., 2007. 73 FR 2276 (Jan. 14, 2008). The complaint alleged violations of section 337 of the Tariff Act of... it determined to review, and on remedy, the public interest and bonding. 74 FR 57192 (Nov. 4, 2009... COMMISSION In the Matter of Certain Semiconductor Chips With Minimized Chip Package Size and...

  5. An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable System-on-Chip

    OpenAIRE

    Kavaldjiev, Nikolay; Smit, Gerard J.M.

    2004-01-01

    This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It is used in a System-on-Chip platform for future multimedia mobile devices. The network is packet switching wormhole network with virtual-channel flow control and source routing. The initial implementation results for a network router show its feasibility and size comparable with other available solutions.

  6. Optical continuum generation on a silicon chip

    Science.gov (United States)

    Jalali, Bahram; Boyraz, Ozdal; Koonath, Prakash; Raghunathan, Varun; Indukuri, Tejaswi; Dimitropoulos, Dimitri

    2005-08-01

    Although the Raman effect is nearly two orders of magnitude stronger than the electronic Kerr nonlinearity in silicon, under pulsed operation regime where the pulse width is shorter than the phonon response time, Raman effect is suppressed and Kerr nonlinearity dominates. Continuum generation, made possible by the non-resonant Kerr nonlinearity, offers a technologically and economically appealing path to WDM communication at the inter-chip or intra-chip levels. We have studied this phenomenon experimentally and theoretically. Experimentally, a 2 fold spectral broadening is obtained by launching ~4ps optical pulses with 2.2GW/cm2 peak power into a conventional silicon waveguide. Theoretical calculations, that include the effect of two-photon-absorption, free carrier absorption and refractive index change indicate that up to >30 times spectral broadening is achievable in an optimized device. The broadening is due to self phase modulation and saturates due to two photon absorption. Additionally, we find that free carrier dynamics also contributes to the spectral broadening and cause the overall spectrum to be asymmetric with respect to the pump wavelength.

  7. On-chip p-MOSFET dosimetry

    International Nuclear Information System (INIS)

    In this work, a p-FET dosimeter is developed under the constraint that the dosimeter be useful in predicting the radiation dose of an IC fabricated with a non-radiation hardened 1.2-μm CMOS process. On-chip p-FETs were developed to monitor the radiation dose of n-well CMOS ICs by monitoring threshold voltage shifts due to radiation induced oxide and interface charge. The design employs closed geometry FETs and a zero-biased n-well to eliminate leakage currents. The FETs are operated using a constant current chosen to greatly reduce the FET's temperature sensitivity. The dose sensitivity of these p-FETs is about -2.6 mV/krad(Si) and the off-chip instrumentation resolves about 400 rad(Si)/bit. When operated with a current at the temperature-independent point, it was discovered that the pre-irradiation output voltage is about -1.5 V which depends only on design-independent silicon material parameters. The temperature sensitivity is less than 63 μV/C over a 70 C temperature range centered about the temperature insensitive point

  8. Readout Architecture for Hybrid Pixel Readout Chips

    CERN Document Server

    AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

    The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

  9. Microfluidic distillation chip for methanol concentration detection.

    Science.gov (United States)

    Wang, Yao-Nan; Liu, Chan-Chiung; Yang, Ruey-Jen; Ju, Wei-Jhong; Fu, Lung-Ming

    2016-03-17

    An integrated microfluidic distillation system is proposed for separating a mixed ethanol-methanol-water solution into its constituent components. The microfluidic chip is fabricated using a CO2 laser system and comprises a serpentine channel, a boiling zone, a heating zone, and a cooled collection chamber filled with de-ionized (DI) water. In the proposed device, the ethanol-methanol-water solution is injected into the microfluidic chip and driven through the serpentine channel and into the collection chamber by means of a nitrogen carrier gas. Following the distillation process, the ethanol-methanol vapor flows into the collection chamber and condenses into the DI water. The resulting solution is removed from the collection tank and reacted with a mixed indicator. Finally, the methanol concentration is inversely derived from the absorbance measurements obtained using a spectrophotometer. The experimental results show the proposed microfluidic system achieves an average methanol distillation efficiency of 97%. The practicality of the proposed device is demonstrated by detecting the methanol concentrations of two commercial fruit wines. It is shown that the measured concentration values deviate by no more than 3% from those obtained using a conventional bench top system. PMID:26920777

  10. BAE systems' SMART chip camera FPA development

    Science.gov (United States)

    Sengupta, Louise; Auroux, Pierre-Alain; McManus, Don; Harris, D. Ahmasi; Blackwell, Richard J.; Bryant, Jeffrey; Boal, Mihir; Binkerd, Evan

    2015-06-01

    BAE Systems' SMART (Stacked Modular Architecture High-Resolution Thermal) Chip Camera provides very compact long-wave infrared (LWIR) solutions by combining a 12 μm wafer-level packaged focal plane array (FPA) with multichip-stack, application-specific integrated circuit (ASIC) and wafer-level optics. The key innovations that enabled this include a single-layer 12 μm pixel bolometer design and robust fabrication process, as well as wafer-level lid packaging. We used advanced packaging techniques to achieve an extremely small-form-factor camera, with a complete volume of 2.9 cm3 and a thermal core weight of 5.1g. The SMART Chip Camera supports up to 60 Hz frame rates, and requires less than 500 mW of power. This work has been supported by the Defense Advanced Research Projects Agency's (DARPA) Low Cost Thermal Imager - Manufacturing (LCTI-M) program, and BAE Systems' internal research and development investment.

  11. Applications of artificial neural network chips

    International Nuclear Information System (INIS)

    In a collaboration between CERN and Royal Institute of Technology Stockholm a so called Asynchronous Transfer Mode (ATM) test setup was developed. The main goal of the task was the experimental verification of the harware design principles and methods, partly the application of the test setup for testing the neural network controlled self-routing, asynchronous event-building ATM networks. We took part in the first implementation of the IBM Zero Instruction Set Computer (ZISC036)[2] on a PC-486 ISA-bus card. This chip has been designed for cost-effective recognition and classification in real time. After building the PC interface card and testing the main functions of the built-in logic a code for character recognition was developed for comparing its performance to other RBF-type methods. The results show that the ZISC036 is performing quite well. The most attractive feature of the chip is the speed: if it is operated at 20 MHz, 64 component the evaluation is ready in 0.5 μ sec. (K.A.) 2 refs.; 1 fig

  12. Stem-end defect in chipping potatoes (Solanum tuberosum L.) as influenced by mild environmental stresses

    Science.gov (United States)

    Global consumption of potato (Solanum tuberosum, L.) continues to shift from fresh potatoes to value-added processed food products such as potato chips. One serious tuber quality defect of chipping potatoes is stem-end chip defect, which results in chips with dark vasculature and adjacent tissues at...

  13. Thermal characterization and modeling of ultra-thin silicon chips

    Science.gov (United States)

    Alshahed, Muhammad; Yu, Zili; Rempp, Horst; Richter, Harald; Harendt, Christine; Burghartz, Joachim N.

    2015-11-01

    Manufacturing ultra-thin chip is an emerging field in semiconductor technology that is driven by 3-D integrated circuits and flexible electronics. Unlike bulk silicon (Si) chips with thickness greater than 400 μm, the thermal management of ultra-thin Si chips with thickness smaller than 20 μm is challenging due to the increased lateral thermal resistance implying stringent cooling requirements. Therefore, a reasonable prediction of temperature gradients in such chips is necessary. In this work, a thermal chip is implemented in an ultra-thin 0.5 μm CMOS technology to be employed in surface steady-state and transient temperature measurement. Test chips are either packaged in a Pin Grid Array (PGA) ceramic package or attached to a flexible polyimide substrate. The experimental results show an on-chip temperature gradient of ∼15 °C for a dissipated power of 0.4 W in the case of the PGA package and ∼30 °C for the polyimide substrate. The time constants are ∼50 s and ∼1 s for the PGA and the polyimide packages respectively. The measurements are complemented by FEM simulations using ANSYS 14.5 workbench and spice simulations using an equivalent lumped-component thermal circuit model. The lumped-element thermal circuit model is then used for the surface temperature prediction, which is compared to measurement results.

  14. Thermal-Aware Scheduling for Future Chip Multiprocessors

    Directory of Open Access Journals (Sweden)

    Pedro Trancoso

    2007-04-01

    Full Text Available The increased complexity and operating frequency in current single chip microprocessors is resulting in a decrease in the performance improvements. Consequently, major manufacturers offer chip multiprocessor (CMP architectures in order to keep up with the expected performance gains. This architecture is successfully being introduced in many markets including that of the embedded systems. Nevertheless, the integration of several cores onto the same chip may lead to increased heat dissipation and consequently additional costs for cooling, higher power consumption, decrease of the reliability, and thermal-induced performance loss, among others. In this paper, we analyze the evolution of the thermal issues for the future chip multiprocessor architectures and show that as the number of on-chip cores increases, the thermal-induced problems will worsen. In addition, we present several scenarios that result in excessive thermal stress to the CMP chip or significant performance loss. In order to minimize or even eliminate these problems, we propose thermal-aware scheduler (TAS algorithms. When assigning processes to cores, TAS takes their temperature and cooling ability into account in order to avoid thermal stress and at the same time improve the performance. Experimental results have shown that a TAS algorithm that considers also the temperatures of neighboring cores is able to significantly reduce the temperature-induced performance loss while at the same time, decrease the chip's temperature across many different operation and configuration scenarios.

  15. Low-power wireless on-chip microparticle manipulation system

    Science.gov (United States)

    Dei, Yoshiaki; Kishiwada, Yasushi; Yamane, Rie; Inoue, Taisuke; Matsuoka, Toshimasa

    2015-04-01

    In order to realize an easy-to-use on-chip microparticle manipulation system, a chip that can manipulate microparticles by pulse-driven dielectrophoresis (DEP) in a solution with wireless power reception function was designed. Considering both of the DEP operation and power consumption of the chip, the internal supply voltage and the DEP driving signal frequency for CMOS digital circuits including the ring oscillator were assigned to about 0.5 V and about 1 MHz, respectively. The simulation results of wireless power transfer reveals that the use of higher-frequency (13 MHz) and input-matching circuits improve power transfer efficiency (4.7% for the rectification and DEP driving signal generation) and a smaller required available power of the AC power source (19.2 mW). The chip fabricated in a 180 nm triple-well CMOS process demonstrates the wireless on-chip DEP operation. Compared with power transfer systems using an off-chip transformer, the small primary coil on the PCB and the on-chip secondary coil dominate the power dissipation.

  16. Biological Denitrification Treatment of Wastewater Using Wood Chips

    Science.gov (United States)

    Mizoguchi, Tadaaki; Koremura, Nao; Sato, Aya; Yoshioka, Toshiaki

    A novel method for removing nitrate in waste water which uses wood chips as a reduction agent and growth support mechanism for denitrification bacteria is studied in this report. A higher denitrification rate was obtained when a portion of the wood chips packed in a column were exposed to air than when all of the wood chips were entirely immersed in solution. Cherry tree chips were more effective than cedar chips, as almost a 100% denitirification rate was maintained for at least 69 days at an inlet concentration of 20mg-N/L and HRT of 20 hr. The denitrification rate decreased significantly when the initial nitrate concentration was increased from 21mg-N/L to 46 mg-N/L. It was possible to use wood chips exclusively as a supply source of organic compounds. An excess amount of organic compounds which is discharged from the reactor can be reduced by passing the solution through a column packed with activated carbon. Cedar chips prepared from a fresh log shortly after cutting were used as a supporting material for denitirification bacteria. A satisfactorily high degree of denitirifation was obtained at HRT of 0.76 hr by adding ethanol as a reduction agent for nitrate.

  17. Investigation of formation mechanisms of chips in orthogonal cutting process

    Directory of Open Access Journals (Sweden)

    Ma W.

    2012-08-01

    Full Text Available This work investigates the formation mechanisms of chips in orthogonal cutting of mild steel and the transformation conditions between various morphology chips. It is supposed that the modeling material follows the Johnson-Cook constitutive model. In orthogonal cutting process, both the plastic flow and the instability behaviors of chip materials are caused by the plane strain loadings. Therefore, the general instability behaviors of materials in plane strain state are first analyzed with linear perturbation method and a universal instability criterion is established. Based on the analytical results, the formation mechanisms of chips and the transformation conditions between continuous and serrated chips are further studied by instability phase diagram method. The results show that the chip formation strongly depends on the intensity ratios between shear and normal stresses. The ratios of dissipative rates of plastic work done by compression and shear stresses govern the transformation from continuous to serrated chips. These results are verified by the numerical simulations on the orthogonal cutting process.

  18. FY1995 trial production of brain functional chip; 1995 nendo no kino shuseki chip no shisaku

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    The present computer system will run on a program which is prepared in advance. On the other hand, the human brain can acquire some processes from learning with experiments. It would be very useful us human nature, if these learning process should be build up artificially. Our aim is to reveal basic self-acquiring mechanism of information and its processes of the brain, and preliminary research, including theoretical problems, for building up specialized processor chip. Many research on the brain have been held at the views of scientifically and medically. However; we focused on the principle brain learning process itself. The results of the research was directly realized on a specialized processor chip tuned for high-speed simulation of neural network. We could pointed out some problems on the present brain type processor, and discussed about basic technique for implementation of the next age brain type processor and theories. (NEDO)

  19. On-Chip Bondwire Magnetics with Ferrite-Epoxy Glob Coating for Power Systems on Chip

    Directory of Open Access Journals (Sweden)

    Jian Lu

    2008-01-01

    Full Text Available A novel concept of on-chip bondwire inductors and transformers with ferrite epoxy glob coating is proposed to offer a cost effective approach realizing power systems on chip (SOC. We have investigated the concept both experimentally and with finite element modeling. A Q factor of 30–40 is experimentally demonstrated for the bondwire inductors which represents an improvement by a factor of 3–30 over the state-of-the-art MEMS micromachined inductors. Transformer parameters including self- and mutual inductance and coupling factors are extracted from both modeled and measured S-parameters. More importantly, the bondwire magnetic components can be easily integrated into SOC manufacturing processes with minimal changes and open enormous possibilities for realizing cost-effective, high-current, high-efficiency power SOCs.

  20. On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips

    CERN Document Server

    Goel, Sandeep Kumar

    2011-01-01

    Multi-site testing is a popular and effective way to increase test throughput and reduce test costs. We present a test throughput model, in which we focus on wafer testing, and consider parameters like test time, index time, abort-on-fail, and contact yield. Conventional multi-site testing requires sufficient ATE resources, such as ATE channels, to allow to test multiple SOCs in parallel. In this paper, we design and optimize on-chip DfT, in order to maximize the test throughput for a given SOC and ATE. The on-chip DfT consists of an E-RPCT wrapper, and, for modular SOCs, module wrappers and TAMs. We present experimental results for a Philips SOC and several ITC'02 SOC Test Benchmarks.

  1. Silicon-chip-based ultrafast optical oscilloscope.

    Science.gov (United States)

    Foster, Mark A; Salem, Reza; Geraghty, David F; Turner-Foster, Amy C; Lipson, Michal; Gaeta, Alexander L

    2008-11-01

    With the realization of faster telecommunication data rates and an expanding interest in ultrafast chemical and physical phenomena, it has become important to develop techniques that enable simple measurements of optical waveforms with subpicosecond resolution. State-of-the-art oscilloscopes with high-speed photodetectors provide single-shot waveform measurement with 30-ps resolution. Although multiple-shot sampling techniques can achieve few-picosecond resolution, single-shot measurements are necessary to analyse events that are rapidly varying in time, asynchronous, or may occur only once. Further improvements in single-shot resolution are challenging, owing to microelectronic bandwidth limitations. To overcome these limitations, researchers have looked towards all-optical techniques because of the large processing bandwidths that photonics allow. This has generated an explosion of interest in the integration of photonics on standard electronics platforms, which has spawned the field of silicon photonics and promises to enable the next generation of computer processing units and advances in high-bandwidth communications. For the success of silicon photonics in these areas, on-chip optical signal-processing for optical performance monitoring will prove critical. Beyond next-generation communications, silicon-compatible ultrafast metrology would be of great utility to many fundamental research fields, as evident from the scientific impact that ultrafast measurement techniques continue to make. Here, using time-to-frequency conversion via the nonlinear process of four-wave mixing on a silicon chip, we demonstrate a waveform measurement technology within a silicon-photonic platform. We measure optical waveforms with 220-fs resolution over lengths greater than 100 ps, which represent the largest record-length-to-resolution ratio (>450) of any single-shot-capable picosecond waveform measurement technique. Our implementation allows for single-shot measurements and uses

  2. A novel optical network on chip design for future generation of multiprocessors system on chip

    OpenAIRE

    M. Channoufi; P. Lecoy; S. Le Beux; Attia, R; Delacressonniere, B

    2013-01-01

    The paper presents a novel Optical Network on Chip (ONoC) relying on the multi-level optical layer design paradigm and called “OMNoC”. The proposed ONoC relies on multi-level microring resonator allowing efficient light coupling between superposed waveguides. Such microring resonator avoids using waveguide crossing, which contribute to reduce propagation losses. Preliminary experimental results demonstrate the potential of multi-level optical layer for reducing power consumption and increasin...

  3. Design and application of a GaAs digital RF memory chip

    Science.gov (United States)

    White, William A.; Taddiken, Albert H.; Shichijo, Hisashi; Vernon, Michael A.; Whitmire, David A.

    1990-08-01

    A GaAs integrated memory/logic chip designed for digital RF memory (DRFM) applications is described. This chip, called a programmable delay-line element (PDLE), implements the basic DRFM storage and delay functions. The configuration combines a 4-kb static RAM with 750 logic gates, providing on a single chip the components for storage, address generation, demultiplexing, multiplexing, and control functions normally provided by a variety of separate chips. A distributed control organization, where the chip is configured to provide as outputs all the signals required as inputs to another identical chip, is used. Chips cascaded into strings implement the programmable delay lines required for DRFM systems. Within a string, signal distribution requires only local interconnections between adjacent chips. Correct operation of all functions was demonstrated in a four-chip string which provides a total memory capacity of 16 kb. The maximum sampling rate was 800 MHz, and power dissipation was approximately 2 W per chip.

  4. Lab-on-a-chip techniques, circuits, and biomedical applications

    CERN Document Server

    Ghallab, Yehya H

    2010-01-01

    Here's a groundbreaking book that introduces and discusses the important aspects of lab-on-a-chip, including the practical techniques, circuits, microsystems, and key applications in the biomedical, biology, and life science fields. Moreover, this volume covers ongoing research in lab-on-a-chip integration and electric field imaging. Presented in a clear and logical manner, the book provides you with the fundamental underpinnings of lab-on-a-chip, presents practical results, and brings you up to date with state-of-the-art research in the field. This unique resource is supported with over 160 i

  5. Test of an ME Chip Based on FPGAs

    Institute of Scientific and Technical Information of China (English)

    2000-01-01

    The characteristic of FPGA, motion estimation(ME) and the full search block matching arithmetic were introduced, it analyses the collectivity configuration of basic working flow in ME.Based on FPGA, the study concentrates on the control, computing and test part of ME chip implementation.In the end PCB of ME chip is designed and completed.ME is an important link of MPEG standard on picture compression, whose characteristics is its huge amount of data and computing task.So people often use special chip to meet the requirement, but there is still not such production in China at present.

  6. On-chip solar battery structure for CMOS LSI

    OpenAIRE

    Arima, Yutaka; Ehara, Masaya

    2006-01-01

    A built-in method of on-chip solar battery in a CMOS LSI is proposed. The proposed solar battery can be formed using conventional CMOS process technology. It can generate a high voltage of 0.6-0.83 V by a series connection structure of two types of p-n junction diodes formed with the CMOS circuit simultaneously on the LSI chip. The generated voltage is sufficient to drive the conventional CMOS circuit without modi. cation. The test chip was produced experimentally using conventional 0.35 mu m...

  7. SNP typing on the NanoChip electronic microarray

    DEFF Research Database (Denmark)

    Børsting, Claus; Sanchez Sanchez, Juan Jose; Morling, Niels

    2005-01-01

    We describe a single nucleotide polymorphism (SNP) typing protocol developed for the NanoChip electronic microarray. The NanoChip array consists of 100 electrodes covered by a thin hydrogel layer containing streptavidin. An electric currency can be applied to one, several, or all electrodes at the...... the bound DNA. Base stacking between the short reporter and the longer stabilizer oligo stabilizes the binding of a matching reporter, whereas the binding of a reporter carrying a mismatch in the SNP position will be relatively weak. Thermal stringency is applied to the NanoChip array according to a...

  8. An Electrochromatography Chip with Integrated Waveguides for UV Absorbance Detection

    DEFF Research Database (Denmark)

    Gustafsson, Omar; Mogensen, Klaus Bo; Ohlsson, Pelle Daniel;

    2008-01-01

    A silicon-based microchip for electrochromatographic separations is presented. Apart from a microfluidic network, the microchip has integrated UV-transparent waveguides for detection and integrated couplers for optical fibers on the chip, yielding the most complete chromatography microchip to date...... of an octylsilane covalently bonded to the surfaces to provide chromatographic interaction. The chip features a 1 mm long U-shaped detection cell and planar silicon dioxide waveguides that couple light to and from the detection cell. Microfabricated on-chip fiber couplers assure perfect alignment of optical fibers...

  9. Inherent polarization entanglement generated from a monolithic semiconductor chip

    DEFF Research Database (Denmark)

    Horn, Rolf T.; Kolenderski, Piotr; Kang, Dongpeng;

    2013-01-01

    Creating miniature chip scale implementations of optical quantum information protocols is a dream for many in the quantum optics community. This is largely because of the promise of stability and scalability. Here we present a monolithically integratable chip architecture upon which is built...... filtering or post-selection. After splitting the twin-photons immediately after they emerge from the chip, we perform a variety of correlation tests on the photon pairs and show non-classical behaviour in their polarization. Combined with the BRW's versatile architecture our results signify the BRW design...

  10. Electrochemical Migration on Electronic Chip Resistors in Chloride Environments

    DEFF Research Database (Denmark)

    Minzari, Daniel; Jellesen, Morten Stendahl; Møller, Per;

    2009-01-01

    Electrochemical migration behavior of end terminals on ceramic chip resistors (CCRs) was studied using a novel experimental setup in varying sodium chloride concentrations from 0 to 1000 ppm. The chip resistor used for the investigation was 10-kΩ CCR size 0805 with end terminals made of 97Sn3Pb...... alloy. Anodic polarization behavior of the electrode materials was investigated using a microelectrochemical setup. Material makeup of the chip resistor was investigated using scanning electron microscopy (SEM)/energy dispersive spectroscopy and focused-ion-beam SEM. Results showed that the dissolution...

  11. A 0.5-GHz CMOS digital RF memory chip

    Science.gov (United States)

    Schnaitter, W. M.; Lewis, E. T.; Gordon, B. E.

    1986-10-01

    Digital RF memories (DRFM's) are key elements for modern radar jamming. An RF signal is sampled, stored in random access memory (RAM), and later recreated from the stored data. Here the first CMOS DRFM chip, integrating static RAM, control circuitry, and two channels of shift registers, on a single chip is described. The sample rate achieved was 0.5 GHz, VLSI density was made possible by the low-power dissipation of quiescent CMOS circuits. An 8K RAM prototype chip has been built and tested.

  12. Chip-based electrochromatography coupled to ESI-MS detection.

    Science.gov (United States)

    Dietze, Claudia; Hackl, Claudia; Gerhardt, Renata; Seim, Stephan; Belder, Detlev

    2016-05-01

    In this study, we present the coupling of chip-based electrochromatography to MS using a glass chip with a monolithically integrated nanoelectrospray emitter. As separation column, an acrylate-based porous polymer monolith is implemented into the glass chip by photopolymerization. For the establishment and development of this method, we used a test mixture detectable with both fluorescence and ESI-MS. After successful evaluation of the approach with the test solutes, it was applied exemplarily for drug analysis such as high-speed separations of benzodiazepines in pharmaceuticals. PMID:26873181

  13. On-chip integrated lasers for biophotonic applications

    DEFF Research Database (Denmark)

    Mappes, Timo; Wienhold, Tobias; Bog, Uwe;

    Meeting the need of biomedical users, we develop disposable Lab-on-a-Chip systems based on commercially available polymers. We are combining passive microfluidics with active optical elements on-chip by integrating multiple solid-state and liquid-core lasers. While covering a wide range of laser...... emission wavelengths, the chips have the size of microscope cover slips and use optical and fluidic interconnects only. Here, we present our latest realizations of integrated optofluidic lasers using whispering gallery mode or distributed feedback laser cavities....

  14. Packetizing OCP Transactions in the MANGO Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    The scaling of CMOS technology causes a widening gap between the performance of on-chip communication and computation. This calls for a communication-centric design flow. The MANGO network-on-chip architecture enables globally asynchronous locally synchronous (GALS) system-on-chip design, while...... transactions are packetized and transmitted across the shared network, and illustrate how this affects the end-to-end performance. A high predictability of the latency of communication on shared links is shown in a MANGO-based demonstrator system...

  15. Long-Range Dependence and On-chip Processor traffic

    OpenAIRE

    Scherrer, Antoine; Fraboulet, Antoine; Risset, Tanguy

    2009-01-01

    Long-range dependence is a property of stochastic processes that has an important impact on network performance, especially on the buffer usage in routers. We analyze the presence of long-range dependence in on-chip processor traffic and we study the impact of long-range dependence on networks-on-chip. long-range dependence in communication traces of processor ips at the cycle-accurate level. We also study the impact of long-range dependence on a real network-on-chip using the SocLib simulati...

  16. Energy model of network-on-chip and a bus

    OpenAIRE

    Wolkotte, Pascal T.; Smit, Gerard J.M.; Kavaldjiev, Nikolay; Becker, Jens E.; Becker, Jurgen

    2005-01-01

    A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon- Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both NoC architectures to predict their energy consumption per transported bit. Both architectures are also compared with a traditional bus architecture. The energy model is primarily needed to find a ...

  17. Energy Model of Networks-on-Chip and a Bus

    OpenAIRE

    Wolkotte, Pascal T.; Smit, Gerard J.M.; Kavaldjiev, Nikolay; Becker, Jens E.; Becker, Jürgen

    2005-01-01

    A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon-Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both NoC architectures to predict their energy consumption per transported bit. Both architectures are also compared with a traditional bus architecture. The energy model is primarily needed to find a n...

  18. The principal and application of gene chips

    Institute of Scientific and Technical Information of China (English)

    2001-01-01

    @@Today we are living in an information era. Everyone can see what a tremendously change has been brought by the using of the computers. The advent of the computer chip let us embed our smarts in everything from satellite to greeting cards to internet.   People said that the human genome project is the second "Apollo". Human Genome Project, the international effort that is expected to unravel the structures of all 30 000 to 35 000 or so human genes by 2003. But deconstructing the genome is only the first step-like learning to pick out words in a foreign language before grappling with their meanings. Realizing the gene revolution's potential will require understanding how genes collaborate to cement memories in our brains, say, or how they malfunction to change a healthy adult into one dying of cancer. That's the goal of the second phase of the revolution, functional genomics.

  19. Droplet Microfluidics for Chip-Based Diagnostics

    Directory of Open Access Journals (Sweden)

    Karan V. I. S. Kaler

    2014-12-01

    Full Text Available Droplet microfluidics (DMF is a fluidic handling technology that enables precision control over dispensing and subsequent manipulation of droplets in the volume range of microliters to picoliters, on a micro-fabricated device. There are several different droplet actuation methods, all of which can generate external stimuli, to either actively or passively control the shape and positioning of fluidic droplets over patterned substrates. In this review article, we focus on the operation and utility of electro-actuation-based DMF devices, which utilize one or more micro-/nano-patterned substrates to facilitate electric field-based handling of chemical and/or biological samples. The underlying theory of DMF actuations, device fabrication methods and integration of optical and opto-electronic detectors is discussed in this review. Example applications of such electro-actuation-based DMF devices have also been included, illustrating the various actuation methods and their utility in conducting chip-based laboratory and clinical diagnostic assays.

  20. MAROC, a generic photomultiplier readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Blin, S; Barrillon, P; La Taille, C de, E-mail: blin@lal.in2p3.f [CNRS/IN2p3/LAL-OMEGA, Universite Paris Sud, Bat.200, 91898 Orsay (France)

    2010-12-15

    The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a dynamic range around 10 pe ( {approx} 1.6 pC) and a 12 bit Wilkinson ADC is embedded. Three versions of this chip have been submitted. MAROC 2 is the production version for the ATLAS luminometer and MAROC3 is a version with lower dissipation and significant improvements concerning the charge (30 pe: {approx} 5 pC) and trigger (discrimination from 10fC). This third version showed very good characteristics that are presented here.

  1. MAROC, a generic photomultiplier readout chip

    Science.gov (United States)

    Blin, S.; Barrillon, P.; de La Taille, C.

    2010-12-01

    The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a dynamic range around 10 pe ( ~ 1.6 pC) and a 12 bit Wilkinson ADC is embedded. Three versions of this chip have been submitted. MAROC 2 is the production version for the ATLAS luminometer and MAROC3 is a version with lower dissipation and significant improvements concerning the charge (30 pe: ~ 5 pC) and trigger (discrimination from 10fC). This third version showed very good characteristics that are presented here.

  2. Invisibility Cloak Printed on a Photonic Chip

    CERN Document Server

    Feng, Zhen; Zhao, Yu-Xi; Gao, Jun; Qiao, Lu-Feng; Yang, Ai-Lin; Lin, Xiao-Feng; Jin, Xian-Min

    2016-01-01

    Invisibility cloak capable of hiding an object can be achieved by properly manipulating electromagnetic field. Such a remarkable ability has been shown in transformation and ray optics. Alternatively, it may be realistic to create a spatial cloak by means of confining electromagnetic field in three-dimensional arrayed waveguides and introducing appropriate collective curvature surrounding an object. We realize the artificial structure in borosilicate by femtosecond laser direct writing, where we prototype up to 5000 waveguides to conceal millimeter-scale volume. We characterize the performance of the cloak by normalized cross correlation, tomography analysis and continuous three-dimensional viewing angle scan. Our results show invisibility cloak can be achieved in waveguide optics. Furthermore, directly printed invisibility cloak on a photonic chip may enable controllable study and novel applications in classical and quantum integrated photonics, such as invisualising a coupling or swapping operation with on-...

  3. Synchronization of Integrated Systems on a Chip

    Directory of Open Access Journals (Sweden)

    González-Díaz O.

    2012-04-01

    Full Text Available In the present paper, the non-conventional interconnected and coupled ring oscillators approach working as clock distribution networks to synchronize electronic systems on a chip (SoC is proposed. Typical CMOS (Complementary Metal-Oxide Semiconductor N-well 0.35 µm Austria Micro Systems process parameters were used for conventional and non-conventional clock distribution nets design and simulation. Experimental results from local and global clock distribution networks fabricated using a CMOS 0.35 µm process show that the use of interconnected rings arrays, as globally asynchronous locally synchronous (GALS clock distribution networks, represent an appropriate approach due to good performance regarding scalability, low clock-skew, high-speed, faults tolerant and robust under process variations, regularity, and modularity.

  4. Octave Spanning Frequency Comb on a Chip

    CERN Document Server

    Del'Haye, P; Gavartin, E; Holzwarth, R; Kippenberg, T J

    2009-01-01

    Optical frequency combs have revolutionized the field of frequency metrology within the last decade and have become enabling tools for atomic clocks, gas sensing and astrophysical spectrometer calibration. The rapidly increasing number of applications has heightened interest in more compact comb generators. Optical microresonator based comb generators bear promise in this regard. Critical to their future use as 'frequency markers', is however the absolute frequency stabilization of the optical comb spectrum. A powerful technique for this stabilization is self-referencing, which requires a spectrum that spans a full octave, i.e. a factor of two in frequency. In the case of mode locked lasers, overcoming the limited bandwidth has become possible only with the advent of photonic crystal fibres for supercontinuum generation. Here, we report for the first time the generation of an octave-spanning frequency comb directly from a toroidal microresonator on a silicon chip. The comb spectrum covers the wavelength range...

  5. CERN_DxCTA counting mode chip

    CERN Document Server

    Moraes, D; Nygård, E

    2008-01-01

    This ASIC is a counting mode front-end electronic optimized for the readout of CdZnTe/CdTe and silicon sensors, for possible use in applications where the flux of ionizing radiation is high. The chip is implemented in 0.25 μm CMOS technology. The circuit comprises 128 channels equipped with a transimpedance amplifier followed by a gain shaper stage with 21 ns peaking time, two discriminators and two 18-bit counters. The channel architecture is optimized for the detector characteristics in order to achieve the best energy resolution at counting rates of up to 5 M counts/second. The amplifier shows a linear sensitivity of 118 mV/fC and an equivalent noise charge of about 711 e−, for a detector capacitance of 5 pF. Complete evaluation of the circuit is presented using electronic pulses and pixel detectors.

  6. Research and Development on the Photoelectric Detection Technology of Microfluidic Chip

    OpenAIRE

    Zhang Rong-biao; Yang Ning; Zhao Yu-qi; Li Shu-han; Guo Jian-jiang

    2013-01-01

    The microfluidic chip has been widely applied to areas such as medicine, bio-detection. Photoelectric detection technology is one of the most common method used in microfluidic chip detection, this study summarizes the development and application of the microfluidic chip photoelectric detection technology in recent years and analyses of the photoelectric detection of the microfluidic chip in key technologies and summarized the advantages and disadvantages of different microfluidic chip photoe...

  7. Resonator quantum electrodynamics on a microtrap chip

    International Nuclear Information System (INIS)

    In the present dissertation experiments on resonator quantum electrodynamics on a microtrap chip are described. Thereby for the first time single atoms catched in a chip trap could be detected. For this in the framework of this thesis a novel optical microresonator was developed, which can because of its miniaturization be combined with the microtrap technique introduced in our working group for the manipulation of ultracold atoms. For this resonator glass-fiber ends are used as mirror substrates, between which a standing light wave is formed. With such a fiber Fabry-Perot resonator we obtain a finess of up to ∼37,000. Because of the small mode volumina in spite of moderate resonator quality the coherent interaction between an atom and a photon can be made so large that the regime of the strong atom-resonator coupling is reached. For the one-atom-one-photon coupling rate and the one-atom-one-photon cooperativity thereby record values of g0=2π.300 MHz respectively C0=210 are reached. Just so for the first time the strong coupling regime between a Bose-Einstein condensate (BEC) and the field of a high-quality resonator could be reached. The BEC was thereby by means of the magnetic microtrap potentials deterministically brought to a position within the resonator and totally transformed in a well defined antinode of an additionally optical standing-wave trap. The spectrum of the coupled atom-resonator system was measured for different atomic numbers and atom-resonator detunings, whereby a collective vacuum Rabi splitting of more than 20 GHz could be reached.

  8. An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing

    OpenAIRE

    Kritikos, William V.; Shanyuan Gao; Andrew G. Schmidt; Ron Sass

    2012-01-01

    As the number of cores per discrete integrated circuit (IC) device grows, the importance of the network on chip (NoC) increases. However, the body of research in this area has focused on discrete IC devices alone which may or may not serve the high-performance computing community which needs to assemble many of these devices into very large scale, parallel computing machines. This paper describes an integrated on-chip/off-chip network that has been implemented on an all-FPGA computing cluster...

  9. Cascaded VLSI Chips Help Neural Network To Learn

    Science.gov (United States)

    Duong, Tuan A.; Daud, Taher; Thakoor, Anilkumar P.

    1993-01-01

    Cascading provides 12-bit resolution needed for learning. Using conventional silicon chip fabrication technology of VLSI, fully connected architecture consisting of 32 wide-range, variable gain, sigmoidal neurons along one diagonal and 7-bit resolution, electrically programmable, synaptic 32 x 31 weight matrix implemented on neuron-synapse chip. To increase weight nominally from 7 to 13 bits, synapses on chip individually cascaded with respective synapses on another 32 x 32 matrix chip with 7-bit resolution synapses only (without neurons). Cascade correlation algorithm varies number of layers effectively connected into network; adds hidden layers one at a time during learning process in such way as to optimize overall number of neurons and complexity and configuration of network.

  10. Experiment list: SRX333554 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available genotype/variation=MBD3+/+ mouse Embryonic Fibroblast Cells (MEF) transgenic for DOX inducible OSKM reprogramming || stage in reprogr...amming=8 days after DOX induction || chip antibody=none

  11. Experiment list: SRX333571 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available duction || genotype/variation=MBD3flox/- mouse Embryonic Fibroblast Cells (MEF) transgenic for DOX inducible OSKM reprogramming... || stage in reprogramming=4 days after DOX induction || chip

  12. Experiment list: SRX500852 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available cell type=Embryonic Fibroblast Cells (MEF) || genotype/variation=MBD3+/+ transgenic for DOX inducible OSKM reprogramming... || stage in reprogramming=8 days after DOX induction || chip antibod

  13. Experiment list: SRX950703 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available type/variation=MBD3+/+ mouse Embryonic Fibroblast Cells (MEF) transgenic for DOX inducible OSKM reprogramming || stage in reprogrammi...ng=4 days after DOX induction || chip antibody=Oct4 (sc5

  14. Experiment list: SRX333580 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e/variation=MBD3flox/- mouse Embryonic Fibroblast Cells (MEF) transgenic for DOX inducible OSKM reprogramming || stage in reprogrammi...ng=iPSC || chip antibody=none http://dbarchive.bioscienc

  15. Thermal properties of AlN-based atom chips

    CERN Document Server

    Armijo, Julien; Bouchoule, Isabelle

    2009-01-01

    We have studied the thermal properties of atom chips consisting o high thermal conductivity Aluminum Nitride (AlN) substrates on which gold microwires are directly deposited. We have measured the heating of wires of several widths and with different thermal couplings to the copper mount holding the chip. The results are in good agreement with a theoretical model where the copper mount is treated as a heat sink and the thermal interface resistance between the wire and the substrate is vanishing. We give analytical formulas describing the different transient heating regimes and the steady state. We identify criteria to optimize the design of a chip as well as the maximal currents $I_c$ that can be fed in the wires. For a 600$\\mu$m thick-chip glued on a copper block with Epotek H77, we find $I_c=16$A for a 3$\\mu$m high, 200$\\mu$m wide-wire.

  16. Can Increases in CHIP Copayments Reduce Program Exp..

    Data.gov (United States)

    U.S. Department of Health & Human Services — According to the article, Can increases in CHIP copayments reduce program expenditures on prescription drugs in Volume 4, Issue 2, of Medicare and Medicaid Research...

  17. Multichannel arrays on polymer substrates: toward a disposable proteomics chip

    Science.gov (United States)

    Becker, Holger; Ehrfeld, Wolfgang; Pommersheim, Rainer

    1999-03-01

    Miniaturization is dramatically changing the shape of biotechnology. After the first wave of discoveries inventions in the field of analytical methods and DNA-probes on silicon chips, the trend in recent years has been to more complex and integrated systems in terms of microfabrication for production purposes mainly focused on polymer substrates. Additionally, an increased complexity in the biochemical functionality for tasks like cell handling, cell lysis, polymerase chain reaction, DNA-sequencing and recently in the field of proteomics research can be observed. In this paper we describe the practical approach to a polymer substrate based, microfabricated chip-based multichannel array for 2D capillary electrophoresis. This chip can be fabricated by classical mass production techniques like hot embossing or injection modeling, and has the potential for on-chip-integration of electrodes and detection system.

  18. Benchmarking the True Random Number Generator of TPM Chips

    CERN Document Server

    Suciu, Alin

    2010-01-01

    A TPM (trusted platform module) is a chip present mostly on newer motherboards, and its primary function is to create, store and work with cryptographic keys. This dedicated chip can serve to authenticate other devices or to protect encryption keys used by various software applications. Among other features, it comes with a True Random Number Generator (TRNG) that can be used for cryptographic purposes. This random number generator consists of a state machine that mixes unpredictable data with the output of a one way hash function. According the specification it can be a good source of unpredictable random numbers even without having to require a genuine source of hardware entropy. However the specification recommends collecting entropy from any internal sources available such as clock jitter or thermal noise in the chip itself, a feature that was implemented by most manufacturers. This paper will benchmark the random number generator of several TPM chips from two perspectives: the quality of the random bit s...

  19. Chip-level three-dimensional assembling of microsystems

    Science.gov (United States)

    Toshiyoshi, Hiroshi; Mita, Yoshio; Ogawa, Minoru; Fujita, Hiroyuki

    1999-03-01

    We propose a new method of assembling 3D microsystems by means of chip level electrical interconnection. Silicon dies are flip-chipped out of a silicon wafer by using ICP-RIE instead of a dicing saw. Fringes of the chips are patterned into pin-shapes so that they can be vertically inserted into the micro motherboard for electrical and physical connection. The pins are coated with Cr-Au, and the contact pads are electroplated with Cu for low contact resistance. the pins are tapered in width, and assembling was easily done by manual positing under the optical binocular microscope. This technique is a break through to the hybrid integration of various kinds of micro chips independent of materials or fabrication compatibility.

  20. Power and Thermal Management of System-on-Chip

    DEFF Research Database (Denmark)

    Liu, Wei

    With greater integration of VLSI circuits, power consumption and power density have increased dramatically resulting in high chip temperatures and presenting a heat removal challenge. To effectively limit the high temperature inside a chip, thermal specific approaches, besides low power techniques......, are necessary at the chip design level. In this work, we investigate the power and thermal management of System-on- Chips (SoCs). Thermal analysis is performed in a SPICE simulation approach based on the electrical-thermal analogy. We investigate the impact of inter- connects on heat distribution in...... of temperature reduction, timing and area overhead to the general method, which enlarges the circuit area uniformly. A case study analyzes the design of Floating Point Units (FPU) from an energy and a thermal perspective. For the division operation, we compare different implementations and illustrate...

  1. Gain spectroscopy of a type-II VECSEL chip

    CERN Document Server

    Lammers, Christian; Berger, Christian; Möller, Christoph; Fuchs, Christian; Perez, Antje Ruiz; Rahimi-Iman, Arash; Hader, Jörg; Moloney, Jerome; Stolz, Wolfgang; Koch, Stephan W; Koch, Martin

    2016-01-01

    Using optical pump-white light probe spectroscopy the gain dynamics is investigated for a VECSEL chip which is based on a type-II heterostructure. The active region the chip consists of a GaAs/(GaIn)As/Ga(AsSb)/(GaIn)As/GaAs multiple quantum well. For this structure, a fully microscopic theory predicts a modal room temperature gain at a wavelength of 1170 nm, which is confirmed by experimental spectra. The results show a gain buildup on the type-II chip which is delayed relative to that of a type-I chip. This slower gain dynamics is attributed to a diminished cooling rate arising from reduced electron-hole scattering.

  2. Hardware support for CSP on a Java chip multiprocessor

    DEFF Research Database (Denmark)

    Gruian, Flavius; Schoeberl, Martin

    2013-01-01

    Due to memory bandwidth limitations, chip multiprocessors (CMPs) adopting the convenient shared memory model for their main memory architecture scale poorly. On-chip core-to-core communication is a solution to this problem, that can lead to further performance increase for a number of multithreaded...... applications. Programmatically, the Communicating Sequential Processes (CSPs) paradigm provides a sound computational model for such an architecture with message based communication. In this paper we explore hardware support for CSP in the context of an embedded Java CMP. The hardware support for CSP are on-chip...... communication channels, implemented by a ring-based network-on-chip (NoC), to reduce the memory bandwidth pressure on the shared memory.The presented solution is scalable and also specific for our limited resources and real-time predictability requirements. CMP architectures of three to eight processors were...

  3. Multiplex polymerase chain reaction (PCR) on a SU-8 chip

    DEFF Research Database (Denmark)

    Christensen, Troels Balmer; Bang, Dang Duong; Wolff, Anders

    2008-01-01

    We present the detection of Campylobacter at species level using multiplex PCR in a micro fabricated PCR chip. The chip is based on the polymer SU-8 that allows integration with different microfluidic components, e.g., sample pre-treatment before PCR, and DNA detection simultaneously with or after...... the PCR. The chip performs very well with respect to heating and cooling rates with values up to around 40 °C/s and 20 °C/s, respectively, and has low power consumption (0.5–2.5 W depending on temperature). Multiplex DNA amplification by PCR for the detection of Campylobacter at species level...... was performed successfully on the chip with results comparable to conventional PCR methods. Microsystems often show serious PCR inhibition due to a high surface to volume ratio which causes an increased proclivity of the PCR mix ingredients to stick to the surfaces. To avoid this, a simple method of dynamic...

  4. Development of gold based solder candidates for flip chip assembly

    DEFF Research Database (Denmark)

    Chidambaram, Vivek; Hald, John; Hattel, Jesper Henri

    2009-01-01

    Flip chip technology is now rapidly replacing the traditional wire bonding interconnection technology in the first level packaging applications due to the miniaturization drive in the microelectronics industry. Flip chip assembly currently involves the use of high lead containing solders...... for interconnecting the chip to a carrier in certain applications due to the unique properties of lead. Despite of all the beneficial attributes of lead, its potential environmental impact when the products are discarded to land fills has resulted in various legislatives to eliminate lead from the electronic products...... based on its notorious legacy as a major health hazard across the spectrum of human generations and cultures. Flip chip assembly is also now increasingly being used for the high-performance (H-P) systems. These H-P systems perform mission-critical operations and are expected to experience virtually...

  5. Experiment list: SRX143851 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available cerebellar nuclei. Its function is to coordinate voluntary movements, maintain ba...lance, and learn motor skills. 57796523,71.5,23.1,31516 GSM918759: LICR ChipSeq Cerebellum CTCF adult-8wks s

  6. Experiment list: SRX150262 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available alance, and learn motor skills. 26472027,92.7,6.9,186 GSM939576: ChIP of MNase mononucleosome selected cereb... cerebellar nuclei. Its function is to coordinate voluntary movements, maintain b

  7. Crosstalk in modern on-chip interconnects a FDTD approach

    CERN Document Server

    Kaushik, B K; Patnaik, Amalendu

    2016-01-01

    The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the ...

  8. Experiment list: SRX395531 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available III antibody (gift from Jason Lieb) || strain=N2 http://dbarchive.biosciencedbc.j...ce_name=staged young adults (N2) || developmental stage=YA || tissue=whole animal || chip antibody=anti-Pol

  9. Diffusion driven optofluidic dye lasers encapsulated into polymer chips

    DEFF Research Database (Denmark)

    Wienhold, Tobias; Breithaupt, Felix; Vannahme, Christoph;

    2012-01-01

    Lab-on-a-chip systems made of polymers are promising for the integration of active optical elements, enabling e.g. on-chip excitation of fluorescent markers or spectroscopy. In this work we present diffusion operation of tunable optofluidic dye lasers in a polymer foil. We demonstrate...... that these first order distributed feedback lasers can be operated for more than 90 min at a pulse repetition rate of 2 Hz without fluidic pumping. Ultra-high output pulse energies of more than 10 μJ and laser thresholds of 2 μJ are achieved for resonator lengths of 3 mm. By introducing comparatively large on-chip...... dye solution reservoirs, the required exchange of dye molecules is accomplished solely by diffusion. Polymer chips the size of a microscope cover slip (18 × 18 mm2) were fabricated in batches on a wafer using a commercially available polymer (TOPAS® Cyclic Olefin Copolymer). Thermal imprinting...

  10. Droplets actuating chip based on electrowetting-on-dielectric

    Institute of Scientific and Technical Information of China (English)

    WU Jiangang; YUE Ruifeng; ZENG Xuefeng; LIU Litian

    2007-01-01

    A droplet-based actuating chip by using the method of electrowetting-on-dielectric (EWOD)was developed to manipulate the microfluidics.Here,the actuation mechanism of the sandwiched-configuration EWOD chips was carefully studied,and the movement of droplets was numerically analyzed by using the computational fluidic software,CFD-ACE+.The fabrication of the chip,including a heavily phosphorus-doped poly-silicon micro-electrode array and a thermally grown SiO2 dielectric layer,was exploited to improve the chip stability and decrease the actuation voltage.In experiments,the transportation of a deionized droplet of about 0.5 μL is successfully achieved in air by applying the low voltage of 45 V.

  11. Experiment list: SRX020951 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ologies, 06-942) http://dbarchive.biosciencedbc.jp/kyush... lysine 9 || cell line=3T3-L1 || developmental stage=10 days after inducing differentiation || chip antibody=H3K9ac (Upstate Biotechn

  12. Experiment list: SRX503337 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ame=Human Burkitt lymphoma || cell type=Human Burkitt lymphoma B cells || cell line=BJAB || chip antibody=LANA (Advanced Biotechnolog...ies, 13-210-100) http://dbarchive.biosciencedbc.jp/kyush

  13. Experiment list: SRX425486 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ologies, Inc.) http://dbarchive.biosciencedbc.jp/kyushu-...28 || cell type=mineralizing osteoblast || passages=28-31 || strain=C57BL/6 || chip antibody=Runx2 antibody (M70, Santa Cruz Biotechn

  14. Experiment list: SRX386203 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available body=TAL1 - Santa Cruz Biotechnology sc-12984 http://dbarchive.biosciencedbc.jp/k...ell type=CD34+ HSPC-derived proerythroblasts || tissue=bone marrow || developmental stage=adult || chip anti

  15. Novel High Pressure Pump-on-a-Chip Technology Project

    Data.gov (United States)

    National Aeronautics and Space Administration — HJ Science & Technology, Inc. proposes to develop a novel high pressure "pump-on-a-chip" (HPPOC) technology capable of generating high pressure and flow rate on...

  16. Polymer Flip Chips with Extreme Temperature Stability in Space Project

    Data.gov (United States)

    National Aeronautics and Space Administration — The objective of the proposed SBIR Phase I program is to develop highly thermally and electrically conductive nanocomposites for space-based flip chips for...

  17. On-Chip Network Design Automation with Source Routing Switches

    Institute of Scientific and Technical Information of China (English)

    MA Liwei; SUN Yihe

    2007-01-01

    Network-on-chip (NoC) is a new design paradigm for system-on-chip intraconnections in the billion-transistor era. Application specific on-chip network design is essential for NoC success in this new era.This paper presents a class of source routing switch that can be used to efficiently form arbitrary network topologies and that can be optimized for various applications. Hardware description language versions of the networks can be generated automatically for simulations and for syntheses. A series of switches and networks has been configured with their performances including latency, delay, area, and power, and analyzed theoretically and experimentally. The results show that this NoC architecture provides a large design space for application specific on-chip network designs.

  18. Fault Tolerance Mechanism in Chip Many-Core Processors

    Institute of Scientific and Technical Information of China (English)

    ZHANG Lei; HAN Yinhe; LI Huawei; LI Xiaowei

    2007-01-01

    As semiconductor technology advances, there will be billions of transistors on a single chip. Chip many-core processors are emerging to take advantage of these greater transistor densities to deliver greater performance. Effective fault tolerance techniques are essential to improve the yield of such complex chips. In this paper, a core-level redundancy scheme called N+M is proposed to improve N-core processors'yield by providing M spare cores. In such architecture, topology is an important factor because it greatly affects the processors'performance. The concept of logical topology and a topology reconfiguration problem are introduced, which is able to transparently provide target topology with lowest performance degradation as the presence of faulty cores on-chip. A row rippling and column stealing (RRCS) algorithm is also proposed. Results show that PRCS can give solutions with average 13.8% degradation with negligible computing time.

  19. Bier and Pastis, a pixel readout prototype chip for LHC

    CERN Document Server

    Berg, C; Bonzom, V; Delpierre, P A; Desch, Klaus; Fischer, P; Keil, M; Meuser, S; Raith, B A; Wermes, N

    2000-01-01

    The 12*63 pixel readout prototype chip Bieu&Pastis, designed to cope with the environment imposed on a pixel detector by high-energy proton-proton collisions as expected at the Large Hadron Collider (LHC), is described. The chip contains the full pixel cell functionality, but not yet the full peripheral architecture for data transfer and readout with LHC speed. Design considerations and lab tests to characterize the performance as well as some test beam results are described. (7 refs).

  20. Bier&Pastis, a pixel readout prototype chip for LHC

    Science.gov (United States)

    Berg, C.; Blanquart, L.; Bonzom, V.; Delpierre, P.; Desch, K.; Fischer, P.; Keil, M.; Meuser, S.; Raith, B.; Wermes, N.

    2000-01-01

    The 12×63 pixel readout prototype chip Bier&Pastis, designed to cope with the environment imposed on a pixel detector by high-energy proton-proton collisions as expected at the Large Hadron Collider (LHC), is described. The chip contains the full pixel cell functionality, but not yet the full peripheral architecture for data transfer and readout with LHC speed. Design considerations and lab tests to characterize the performance as well as some test beam results are described.

  1. Efficient high-speed on-chip global interconnects

    OpenAIRE

    Caputa, Peter

    2006-01-01

    The continuous miniaturization of integrated circuits has opened the path towards System-on-Chip realizations. Process shrinking into the nanometer regime improves transistor performancewhile the delay of global interconnects, connecting circuit blocks separated by a long distance, significantly increases. In fact, global interconnects extending across a full chip can have a delay corresponding to multiple clock cycles. At the same time, global clock skew constraints, not only between blocks ...

  2. Experiment list: SRX736201 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available SRX736201 hg19 TFs and others BRD4 Neural 90-8TL NA 21809477,90.2,33.6,30233 GSM1527926: DMSO... BRD4 ChIPseq; Homo sapiens; ChIP-Seq source_name=MPNST cells 90-8TL_DMSO || cell line=MPNST cell ...line 90-8TL || treated with=DMSO for 24hrs || chip antibody=BRD4 || chip antibody vendor=Bethyl http://dbarc

  3. Experiment list: SRX203388 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available cular Immunology, 2d ed, p20) 47665471,89.3,52.3,11244 GSM1033753: MM.1S Brd4 DMSO JL ChipSeq; Homo sapiens;... ChIP-Seq source_name=Chromatin IP against Brd4 in MM.1S (DMSO) || diagnosis=Multiple myeloma || chip antibo...reatment duration=24 hr || treatment drug=DMSO http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/eachData/bw/S

  4. Perancangan Dan Implementasi Pengendali PID DIgital Pada Komputer Chip Tunggal

    OpenAIRE

    Adnan, Adnan; Intan, Sari Areni

    2006-01-01

    Penelitian ini bertujuan untuk merancang sistem kendali PID digital yang diimplementaasikan pada sistem komputer chip tunggal. Sistem komputer chip tunggal yang diiigunakan adalah sistem DT51 low cost micro yang berbasis CPU Atmel AT89S51. Perangkat lunak dirancang berdasarkan analisis dan penurunan model matematis yang kemudian diimplementasikan dalam bahasa C. Simulasi dilakukan untuk memverifikasi bahwa rancangan pengendali memenuhi spesifikasi yang telah ditentukan untuk menstabilk...

  5. Signal processing for on-chip space division multiplexing

    DEFF Research Database (Denmark)

    Peucheret, Christophe; Ding, Yunhong; Xu, Jing;

    2015-01-01

    Our recent results on the demonstration of on-chip mode-division multiplexing are reviewed, with special emphasis on nonlinear all-optical signal processing. Mode-selective parametric processes are demonstrated in a silicon-on-insulator waveguide.......Our recent results on the demonstration of on-chip mode-division multiplexing are reviewed, with special emphasis on nonlinear all-optical signal processing. Mode-selective parametric processes are demonstrated in a silicon-on-insulator waveguide....

  6. Chemical Neurostimulation Using Pulse Code Modulation (PCM) Microfluidic Chips

    OpenAIRE

    Azizi, Farouk; Lu, Hui; Chiel, Hillel J.; Mastrangelo, Carlos H

    2010-01-01

    We report the implementation of a chemical neurostimulation technique using microfluidic devices. The microfluidic chip in this research is used for the in vitro study of the nervous system of Aplysia californica under localized chemical stimulation. The polydimethylsiloxane (PDMS) device is a one-bit pulse code modulator that digitally controls the concentration of the non-hydrolysable cholinergic agonist carbachol injected directly above a ganglion. The chip was successful in repeatedly and...

  7. Readout chip for the CMS pixel detector upgrade

    International Nuclear Information System (INIS)

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper

  8. On-chip clock error characterization for clock distribution system

    OpenAIRE

    Shan, Chuan; Galayko, Dimitri; Anceau, François

    2013-01-01

    In this paper, we investigate a test strategy for characterization of clock error statistics between two clock domains in high-speed clocking systems (gigahertz and more). The method allows an indirect measurement (not based on time interval measurement) of clock error distribution by observing the integrity of a periodic sequence transmitted between two clocking domains. The method is compatible with fully on-chip implementation, and the readout of result to off-chip signals is cadenced at l...

  9. Chip-Level Design for Digital Microfluidic Biochips

    Directory of Open Access Journals (Sweden)

    Shang Tsung Yu

    2014-11-01

    Full Text Available Recently, electrowetting-on-dielectric (EWOD chips have become the most popular actuator for droplet-based digital microfluidic biochips (DMFBs due to its high throughput, automatic control, and low cost. As the complexity of biochemical assays increases, powerful computer-aided-design (CAD tools are needed. This paper provides an overview of DMFBs and describes some important issues and problems in the chip-level design of DMFBs.

  10. Experiment list: SRX796321 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available last|Lineage=primaryCells|Description=Mouse Embryonic Fibroblast 31665544,97.7,15.6,275 GSM1558591: HMGA2 Chip seq in MEF Hmga...L/6 || genotype/variation=Hmga2 Ko || chip antibody=HMGA2 (Santa cruz, cat. sc-30223, lot: F1407 ) http://db...SRX796321 mm9 TFs and others Hmga2 Embryonic fibroblast MEF Tissue=Embryonic Fibrob

  11. Readout chip for the CMS pixel detector upgrade

    Science.gov (United States)

    Rossini, Marco

    2014-11-01

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

  12. Experiment list: SRX100529 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available aterial_provider=WiCell Research Institute || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody... (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This gene encode...s the largest subunit of RNA polymerase II, the polymerase responsible for synthesizing messenger RNA in eukaryotes || antibody... vendorname=abcam || antibody vendorid=ab5408 || controlid=SL9

  13. Experiment list: SRX100504 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available .1 source_name=U87 || biomaterial_provider=ATCC || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibody antib...odydescription=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody... (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This gene e...ncodes the largest subunit of RNA polymerase II, the polymerase responsible for synthesizing messenger RNA in eukaryotes || antibody... vendorname=abcam || antibody vendorid=ab5408 || controli

  14. Experiment list: SRX190193 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available rce_name=HL-60 || biomaterial_provider=ATCC || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody... (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This gene encod...es the largest subunit of RNA polymerase II, the polymerase responsible for synthesizing messenger RNA in eukaryotes || antibody... vendorname=abcam || antibody vendorid=ab5408 || controlid=SL

  15. Experiment list: SRX190259 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e_name=H1-neurons || biomaterial_provider=CDI || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibody antibod...ydescription=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody... (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This gene enc...odes the largest subunit of RNA polymerase II, the polymerase responsible for synthesizing messenger RNA in eukaryotes || antibody... vendorname=abcam || antibody vendorid=ab5408 || controlid=

  16. Reconstitution of CHIP E3 Ubiquitin Ligase Activity

    OpenAIRE

    Ren, Hong Yu; Patterson, Cam; Cyr, Douglas M.; Rosser, Meredith F. N.

    2011-01-01

    CHIP, the carboxyl-terminus of Hsp70 interacting protein, is both an E3 ubiquitin ligase and an Hsp70 co-chaperone and is implicated in the degradation of cytosolic quality control and numerous disease substrates. CHIP has been shown to monitor the folding status of the CFTR protein, and we have successfully reconstituted this activity using a recombinant CFTR fragment consisting of the cytosolic NBD1 and R domains. We have found that efficient ubiquitination of substrates requires chaperone ...

  17. Bioareactor-on-a chip: application to Baker's yeast fermentation

    OpenAIRE

    Soares, Filomena; Correia, J. H.

    2000-01-01

    This paper presents a miniaturized bioreactor (bioreactor-on-a-chip) applied to baker’s yeast fermentation. The bioreactor-on-a-chip is fabricated using a silicon and glass wafers applying micromachining technology (wet-etching techniques) in order to create microchannels, mixerchannels, microvalves. The miniaturization and integration allows smaller volumes to be used, which can be often rather challenging from the analytical point of view. Also, optical detection by absorption, ele...

  18. Single-chip microprocessor that communicates directly using light.

    Science.gov (United States)

    Sun, Chen; Wade, Mark T; Lee, Yunsup; Orcutt, Jason S; Alloatti, Luca; Georgas, Michael S; Waterman, Andrew S; Shainline, Jeffrey M; Avizienis, Rimas R; Lin, Sen; Moss, Benjamin R; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H; Cook, Henry M; Ou, Albert J; Leu, Jonathan C; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J; Popović, Miloš A; Stojanović, Vladimir M

    2015-12-24

    Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems--from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a 'zero-change' approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers. PMID:26701054

  19. Single-chip microprocessor that communicates directly using light

    Science.gov (United States)

    Sun, Chen; Wade, Mark T.; Lee, Yunsup; Orcutt, Jason S.; Alloatti, Luca; Georgas, Michael S.; Waterman, Andrew S.; Shainline, Jeffrey M.; Avizienis, Rimas R.; Lin, Sen; Moss, Benjamin R.; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H.; Cook, Henry M.; Ou, Albert J.; Leu, Jonathan C.; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J.; Popović, Miloš A.; Stojanović, Vladimir M.

    2015-12-01

    Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices8. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

  20. Reliability, Availability and Serviceability of Networks-on-Chip

    CERN Document Server

    Cota, Érika; Soares Lubaszewski, Marcelo

    2012-01-01

    This book presents an overview of the issues related to the test, diagnosis and fault-tolerance of Network on Chip-based systems. It is the first book dedicated to the quality aspects of NoC-based systems and will serve as an invaluable reference to the problems, challenges, solutions, and trade-offs related to designing and implementing state-of-the-art, on-chip communication architectures.

  1. Experiment list: SRX398299 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available cinoma || chip antibody=None || antibody catalog number=None WCE || cell line=HT29 || cell type=Colon Carcin...on|Tissue Diagnosis=Adenocarcinoma 18380673,54.8,14.3,4635 GSM1296642: HT29 WCE ChipSeq; Homo sapiens; ChIP-Seq source_name=Colon Car...oma http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/each

  2. Power Cycle Testing of Press-Pack IGBT Chips

    OpenAIRE

    Frank, Øyvind Bjerke

    2014-01-01

    In this thesis the power cycling capability of individual press-pack IGBT chips is investigated. Press-pack is a packaging technology used for power semiconductors. For press-packs, both thermal and electrical contact to the semiconductor chip is obtained by the application of force on the package. Press-pack IGBTs is claimed by the manufacturers to be especially suitable for high-power applications with large variations in power output. Power cycle testing is an accelerated lifetime stress t...

  3. A contact-lens-shaped IC chip technology

    International Nuclear Information System (INIS)

    We report on novel contact-lens-shaped silicon integrated circuit chip technology for applications such as forming a conforming retinal prosthesis. This is achieved by means of patterning thin films of high residual stress on top of a shaped thin silicon substrate. Several strategies are employed to achieve curvatures of various amounts. Firstly, high residual stress on a thin film makes a thin chip deform into a designed three-dimensional shape. Also, a series of patterned stress films and ‘petal-shaped’ chips were fabricated and analyzed. Large curvatures can also be formed and maintained by the packaging process of bonding the chips to constraining elements such as thin-film polymer ring structures. As a demonstration, a complementary metal oxide semiconductor transistor (CMOS) image-sensing retina chip is made into a contact-lens shape conforming to a human eyeball 12.5 mm in radius. This non-planar and flexible chip technology provides a desirable device surface interface to soft tissues or non-planar bio surfaces and opens up many other possibilities for biomedical applications. (paper)

  4. Forecasting forest chip energy production in Finland 2008-2014

    International Nuclear Information System (INIS)

    Energy policy measures aim to increase energy production from forest chips in Finland to 10 TWh by year 2010. However, on the regional level production differences are large, and the regional estimates of the potential base of raw materials for the production of forest chips are heterogeneous. In order to analyse the validity of the above target, two methods are proposed to derive forecasts for region-level energy production from forest chips in Finland in the years 2008-2014. The plant-level data from 2003-2007 gives a starting point for a detailed statistical analysis of present and future region-level forest chip production. Observed 2008 regional levels are above the estimated prediction 95% confidence intervals based on aggregation of plant-level time averages. A simple time trend model with fixed-region effects provides accurate forecasts for the years 2008-2014. Forest chip production forecast confidence intervals cover almost all regions for the 2008 levels and the estimates of potential production levels for 2014. The forecast confidence intervals are also derived with re-sampling methods, i.e. with bootstrap methods, to obtain more reliable results. Results confirm that a general materials shortfall is not expected in the near future for forest chip energy production in Finland.

  5. Fate of fumonisins during the production of fried tortilla chips.

    Science.gov (United States)

    Voss, K A; Poling, S M; Meredith, F I; Bacon, C W; Saunders, D S

    2001-06-01

    The fate of fumonisin B(1) (FB(1)), a mycotoxin found in corn, during the commercial manufacture of fried tortilla chips was studied. FB(1) and hydrolyzed FB(1) (HFB(1)) concentrations in four lots of corn and in the masa, other intermediates, liquid and waste byproducts, and fried chips were determined by HPLC. FB(1) concentrations in the masa and chips were reduced significantly, up to 80% in the fried chips, compared to that in the raw corn. HFB(1) was also found in the masa and chips, but at low concentrations compared to FB(1). LC-MS analyses corroborated HPLC findings and further showed the presence of partially hydrolyzed FB(1) (PHFB(1)), which, like HFB(1), was formed during the nixtamalization (cooking/steeping the corn in alkaline water to make masa) step and found predominantly in the cooking/steeping liquid and solid waste. No significant amounts of N-(carboxymethyl)-FB(1) or N-(1-deoxy-D-fructos-1-yl)-FB(1), indicative of fumonisin-sugar adduct formation, were found. Thus, FB(1) is removed from corn and diverted into liquid and waste byproducts during the commercial production of fried tortilla chips. Nixtamalization and rinsing are the critical steps, whereas grinding, sheeting, baking, and frying the masa had little effect. PMID:11410018

  6. Chipping operations and efficiency in different operational environments

    Energy Technology Data Exchange (ETDEWEB)

    Roeser, D.; Mola-Yudego, B.; Prinz, R.; Emer, B.; Sikanen, L., e-mail: dominik.roser@metla.fi

    2012-11-01

    This research analyses the productivity of energy wood chipping operations at several sites in Austria and Finland. The aim of the work is to examine the differences in productivity and the effects of the operational environment for the chipping of bioenergy at the roadside. Furthermore, the study quantifies the effects of different variables such as forest energy assortments, tree species, sieve size and machines on the overall productivity of chipping. The results revealed that there are significant differences in the chipping productivity in Austria and Finland which are largely based on the use of different sieve sizes. Furthermore, the different operational environments in both countries, as well as the characteristics of the raw material also seem to have an effect on productivity. In order to improve the chipping productivity, particularly in Central European conditions, all relevant stakeholders need to work jointly to find solutions that will allow a greater variation of chip size. Furthermore, in the future more consideration has to be given to the close interlinkage between the chipper, crane and grapple. As a result, investments costs can be optimized and operational costs and stress on the machines reduced. (orig.)

  7. Microstereolithography and its application to biochemical IC chip

    Science.gov (United States)

    Ikuta, Koji; Maruo, Shoji; Hasegawa, Tadahiro; Adachi, Takao

    2001-06-01

    The world's first micro stereo lithography, named IH process, was proposed and developed by the speaker in 1992. By now, several types of micro stereo lithography systems have been developed. Three-dimensional resolution of solidification has reached to 0.2 micron at present. These 3D micro fabrication processes using UV curable polymer gave a big impact on not only MEMS but also optics. The latest version of IH process enables us to make a movable micro mechanism without assemble process or sacrificial layer technique often used in silicon process. It is well known that the IH process is the mother of two-photon micro stereo lithography and its applications. Recently new micro chemical device named Biochemical IC Chip was proposed and developed by the speaker. This chip is based on the module IC chip-set like today's TTL family. IH process enable to make the biochemical IC including real three-dimensional micro fluid channels. Various kinds of Biochemical IC chips such as micro pump, switching valve, reactor, concentrator and detector have already been fabricated successfully. Basic performance of micro chemical devices constructed by the biochemical IC chips were demonstrated. The biochemical IC chips will open new bioscience and medicine based on innovative technology.

  8. Estimate the thermomechanical fatigue life of two flip chip packages

    International Nuclear Information System (INIS)

    The continuing demand towards high density and low profile integrated circuit packaging has accelerated the development of flip chip structures as used in direct chip attach (DCA) technology, ball grid array (BOA) and chip scale package (CSP). In such structures the most widely used flip chip interconnects are solder joints. The reliability of flip chip structures largely depends on the reliability of solder joints. In this work solder joint fatigue life prediction for two chip scale packages is carried out. Elasto-plastic deformation behavior of the solder was simulated using ANSYS. Two dimensional plain strain finite element models were developed for each package to numerically compute the stress and total strain of the solder joints under temperature cycling. These stress and strain values are then used to predict the solder joint lifetime through modified Coffin Manson equation. The effect of solder joint's distance from edge of silicon die on life of the package is explored. The solder joint fatigue response is modeled for a typical temperature cycling of -60 to 140 degree C. (author)

  9. An investigation of cutting mechanics in 2 dimensional ultrasonic vibration assisted milling toward chip thickness and chip formation

    Science.gov (United States)

    Rasidi, I. I.; Rafai, N. H.; Rahim, E. A.; Kamaruddin, S. A.; Ding, H.; Cheng, K.

    2015-12-01

    The purpose of this paper is to investigate the effects of 2 dimensional Ultrasonic Vibration Assisted Milling (UVAM) cutting mechanics, considering tool path trajectory and the effect on the chip thickness. The theoretical modelling of cutting mechanics is focused by considering the trajectory of the tool locus into the workpiece during the machining. The studies found the major advantages of VAM are come from the intermittent tool tip interaction phenomena between cutting tool and workpiece. The reduction of thinning chip thickness formations can be identifying advantages from vibration assisted milling in 2 dimensional. The finding will be discussing the comparison between conventional machining the potential of the advantages toward the chip thickness and chip formation in conclusion.

  10. Dynamic On-Chip micro Temperature and Flow Sensor for miniaturized lab-on-a-chip instruments Project

    Data.gov (United States)

    National Aeronautics and Space Administration — The purpose of this project is to design, fabricate, and characterize a Dynamic On-Chip Flow and Temperature Sensor (DOCFlaTS) to mature and enable miniaturized...

  11. FISH & CHIPS: Four Electrode Conductivity / Salinity Sensor on a Silicon Multi-sensor chip for Fisheries Research

    DEFF Research Database (Denmark)

    Hyldgård, Anders; Olafsdottir, Iris; Olesen, M.;

    2005-01-01

    The design and fabrication of a single chip silicon salinity, temperature, pressure and light multisensor is presented. The behavior 2- and 4-electrode conductivity microsensors are described and methods for precise determination of water conductivity are given......The design and fabrication of a single chip silicon salinity, temperature, pressure and light multisensor is presented. The behavior 2- and 4-electrode conductivity microsensors are described and methods for precise determination of water conductivity are given...

  12. Characterizing Rat PNS Electrophysiological Response to Electrical Stimulation Using in vitro Chip-Based Human Investigational Platform (iCHIP)

    Energy Technology Data Exchange (ETDEWEB)

    Khani, Joshua [Georgetown Univ., Washington, DC (United States); Prescod, Lindsay [Georgetown Univ., Washington, DC (United States); Enright, Heather [Georgetown Univ., Washington, DC (United States); Felix, Sarah [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Osburn, Joanne [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Wheeler, Elizabeth [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Kulp, Kris [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2015-08-18

    Ex vivo systems and organ-on-a-chip technology offer an unprecedented approach to modeling the inner workings of the human body. The ultimate goal of LLNL’s in vitro Chip-based Human Investigational Platform (iCHIP) is to integrate multiple organ tissue cultures using microfluidic channels, multi-electrode arrays (MEA), and other biosensors in order to effectively simulate and study the responses and interactions of the major organs to chemical and physical stimulation. In this study, we focused on the peripheral nervous system (PNS) component of the iCHIP system. Specifically we sought to expound on prior research investigating the electrophysiological response of rat dorsal root ganglion cells (rDRGs) to chemical exposures, such as capsaicin. Our aim was to establish a protocol for electrical stimulation using the iCHIP device that would reliably elicit a characteristic response in rDRGs. By varying the parameters for both the stimulation properties – amplitude, phase width, phase shape, and stimulation/ return configuration – and the culture conditions – day in vitro and neural cell types - we were able to make several key observations and uncover a potential convention with a minimal number of devices tested. Future work will seek to establish a standard protocol for human DRGs in the iCHIP which will afford a portable, rapid method for determining the effects of toxins and novel therapeutics on the PNS.

  13. Fully Automated On-Chip Imaging Flow Cytometry System with Disposable Contamination-Free Plastic Re-Cultivation Chip

    Directory of Open Access Journals (Sweden)

    Tomoyuki Kaneko

    2011-06-01

    Full Text Available We have developed a novel imaging cytometry system using a poly(methyl methacrylate (PMMA based microfluidic chip. The system was contamination-free, because sample suspensions contacted only with a flammable PMMA chip and no other component of the system. The transparency and low-fluorescence of PMMA was suitable for microscopic imaging of cells flowing through microchannels on the chip. Sample particles flowing through microchannels on the chip were discriminated by an image-recognition unit with a high-speed camera in real time at the rate of 200 event/s, e.g., microparticles 2.5 μm and 3.0 μm in diameter were differentiated with an error rate of less than 2%. Desired cells were separated automatically from other cells by electrophoretic or dielectrophoretic force one by one with a separation efficiency of 90%. Cells in suspension with fluorescent dye were separated using the same kind of microfluidic chip. Sample of 5 μL with 1 × 106 particle/mL was processed within 40 min. Separated cells could be cultured on the microfluidic chip without contamination. The whole operation of sample handling was automated using 3D micropipetting system. These results showed that the novel imaging flow cytometry system is practically applicable for biological research and clinical diagnostics.

  14. Network-on-chip the next generation of system-on-chip integration

    CERN Document Server

    Kundu, Santanu

    2014-01-01

    ""What makes this book special as compared to the current literature in the field is that it provides a complete picture of NoC architectures. In fact, current books in the context of NoCs are usually specific and presuppose a basic knowledge of NoC architectures. Conversely, this book provides a complete guide for both unskilled readers and researchers working in the area, to acquire not only the basic concepts but also the advanced techniques for improving power, cost and performance metrics of the on-chip communication system.""-Maurizio Palesi, Kore University, Italy.

  15. Logistics of in-wood chipping and trucking of chips; Palstahaketuksen logistinen ketju

    Energy Technology Data Exchange (ETDEWEB)

    Nuuja, J. [Joensuu Univ. (Finland). Faculty of Forestry; Asikainen, A. [Metsaeosaamiskeskus, Joensuu (Finland). Joensuu Science Park

    1996-12-31

    In this study a in wood chipper and truck transport of chips were modelled and studied by discrete-event simulation. The input data, which included stand characteristics and information about transport distances was compiled by GRASS-program. This data based on the inventory done by Forestry Center TAPIO. With the model various transport alternatives were compared and the effect of work condition factors were studied. It was find out, that a long distance transport with interchangeable container truck gives better productivity than a truck with a trailer. This results from shorter loading time for the interchangeable container truck

  16. Avaliação da aceitação de "chips" de mandioca Acceptance evaluation of cassava chips

    Directory of Open Access Journals (Sweden)

    Regina Kitagawa Grizotto

    2003-12-01

    Full Text Available Pré-tratamentos como o cozimento, a fermentação natural e a secagem parcial foram aplicados em raízes de mandioca, visando a obtenção de "chips" comestíveis. A avaliação sensorial foi feita com base na aceitação e aparência dos "chips" das variedades IAC Mantiqueira e IAC 576.70. Trinta consumidores potenciais do produto foram selecionados em função da disponibilidade e interesse em participar dos testes. Foi utilizada escala hedônica de 7 pontos, onde os provadores avaliaram as amostras delineadas em blocos casualizados. Os resultados obtidos mostraram que os "chips" controle e pré-cozidos foram aceitos sensorialmente, apresentado médias de 5,1 (gostei ligeiramente para IAC Mantiqueira e 6,0 (gostei moderadamente para IAC 576.70. Os "chips" pré-fermentados de ambas variedades foram rejeitados. Os termos de agrado mais comentados pelos provadores foram "sabor de mandioca", "crocância" e "textura". Os termos de desagrado mais citados incluem "textura dura", "falta sabor de mandioca" e "gosto de óleo". Os provadores consideraram adequada a aparência dos "chips" de ambas variedades, sendo ligeiramente preferida a aparência dos "chips" da IAC 576.70, com exceção dos "chips" cozidos por 8 minutos e os fermentados, rejeitados pelos consumidores. A cor amarela da polpa pode ter influenciado a aceitação da variedade IAC 576.70. A composição centesimal e o teor de fibras na mandioca in natura e, o teor de lipídeos em "chips" de mandioca, também foram apresentados.Pre-treatments such as cooking, natural fermentation and partial drying were applied to cassava roots, aimed at obtaining edible cassava chips. The sensory evaluation was based on the acceptance and appearance of the chips, using the varieties IAC Mantiqueira and IAC 576.70. Thirty potential consumers of the product were selected based on their availability and interest. A 7-point hedonic scale was used, all the judges evaluating all the samples using a randomised

  17. Power consumption optimization and delay based on ant colony algorithm in network-on-chip

    OpenAIRE

    He, Tao; Guo, Yunfei

    2013-01-01

    With a further increase of the number of on-chip devices, the bus structure has not met the requirements. In order to make better communication between each part, the chip designers need to explore a new NoC structure to solve the interconnection of an on-chip device. For the purpose of improving the performance of a network-on-chip without a significant increase in power consumption, the paper proposes a network-on-chip that selects NoC (Network-On-Chip) platform with 2-dimension mesh as the...

  18. KPIX a pixel detector imaging chip

    CERN Document Server

    Cadeddu, S; Caria, M

    2002-01-01

    We present a VLSI custom device, named KPIX, developed in a 0.6 mu m CMOS technology. The circuit is dedicated to readout solid-state detectors covering large areas (on the order of square centimetre) and featuring very small currents. KPIX integrates 1024 channels (current amplifiers) and 8 ADCs on a 15.5x4 mm sup 2 area. Both an analogue and digital readout are allowed, with a 10 bit amplitude resolution. Amplifiers are organized in 8 columns of 128 rows. When choosing the digital or the analogue readout, the complete set of channels can be read out in about 30 ms. The specific design of the amplification cells allows to measure very small input current levels, on the order of fractions of pico-ampere. Power consumption has also been kept at the level of 80 mu W per cell and 150 mW (peak value) in total. The specific chip architecture and geometry allow use of many KPIX circuits together in order to serve a large detector sensitive area. The KPIX structure is presented along with some measurements character...

  19. Material Biocompatibility for PCR Microfluidic Chips

    KAUST Repository

    Kodzius, Rimantas

    2010-04-23

    As part of the current miniaturization trend, biological reactions and processes are being adapted to microfluidics devices. PCR is the primary method employed in DNA amplification, its miniaturization is central to efforts to develop portable devices for diagnostics and testing purposes. A problem is the PCR-inhibitory effect due to interaction between PCR reagents and the surrounding environment, which effect is increased in high-surface-are-to-volume ration microfluidics. In this study, we evaluated the biocompatibility of various common materials employed in the fabrication of microfluidic chips, including silicon, several kinds of silicon oxide, glasses, plastics, wax, and adhesives. Two-temperature PCR was performed with these materials to determine their PCR-inhibitory effect. In most of the cases, addition of bovine serum albumin effectively improved the reaction yield. We also studied the individual PCR components from the standpoint of adsorption. Most of the materials did not inhibit the DNA, whereas they did show noticeable interaction with the DNA polymerase. Our test, instead of using microfluidic devices, can be easily conducted in common PCR tubes using a standard bench thermocycler. Our data supports an overview of the means by which the materials most bio-friendly to microfluidics can be selected.

  20. On-Chip Diamond Raman Laser

    CERN Document Server

    Latawiec, Pawel; Burek, Michael J; Hausmann, Birgit J M; Bulu, Irfan; Loncar, Marko

    2015-01-01

    Synthetic single-crystal diamond has recently emerged as a promising platform for Raman lasers at exotic wavelengths due to its giant Raman shift, large transparency window and excellent thermal properties yielding a greatly enhanced figure-of-merit compared to conventional materials. To date, diamond Raman lasers have been realized using bulk plates placed inside macroscopic cavities, requiring careful alignment and resulting in high threshold powers (~W-kW). Here we demonstrate an on-chip Raman laser based on fully-integrated, high quality-factor, diamond racetrack micro-resonators embedded in silica. Pumping at telecom wavelengths, we show Stokes output discretely tunable over a ~100nm bandwidth around 2-{\\mu}m with output powers >250 {\\mu}W, extending the functionality of diamond Raman lasers to an interesting wavelength range at the edge of the mid-infrared spectrum. Continuous-wave operation with only ~85 mW pump threshold power in the feeding waveguide is demonstrated along with continuous, mode-hop-fr...

  1. Miniature fluorescence detection system for protein chips

    Science.gov (United States)

    Kim, Hoseong; Choi, Jaeho; Lee, Kook-Nyung; Kim, Yongkwon

    2005-01-01

    We report the development of miniature fluorescence detection systems that employ miniature prism, mirrors and low cost CCD camera to detect the fluorescence emitted from 40 fluorescently-labeled protein patterns without scanner. This kind of miniature fluorescence detection systems can be used in point of care. We introduce two systems, one uses prism + mirror block and the other uses prism and two mirrors. A large NA microscope eyepiece and low cost CCD camera are used. We fabricated protein chip containing multi-pattern BSA labeled with Cy5, using MEMS technology and modified the surface chemically to clean and to immobilize proteins. The measurements show that the combination of prism and mirrors can homogenize elliptical excitation light over the sample with higher optical efficiency, and increase the separation between excitation and fluorescence light at the CCD to give higher signal intensity and higher signal to noise ratio. The measurements also show that protein concentrations ranging from 10 ng/ml to 1000 ng/ml can be assayed with very small error. We believe that the proposed fluorescence detection system can be refined to build a commercially valuable hand-held or miniature detection device.

  2. Actual trends in chip electrospray ionization mass spectrometry

    International Nuclear Information System (INIS)

    Full text: Mass spectrometry (MS) has the potential to revolutionize carbohydrate research and help in understanding of how post-translational events such as glycosylation affect biomolecular activities. In the past decade, capillary nanoelectrospray (nanoESI) MS developed as an effective means in glycomics. However, the disadvantages of the method include low sample throughput, potential sample carryover, and poor reproducibility due to the variable shape of the spray tip. The recent introduction of chip-based nano and microESI in biological MS is driven by the high performance, efficiency, throughput, sensitivity and speed of analysis. The analytical potential of these assemblies were lately largely proven in proteomics, direct bioanalyses of drugs, drug development and small molecule characterization. For the MS ionization/separation of quantity-limited complex carbohydrates derived from biological matrices, our group implemented in the last few years an arsenal of novel methodologies based on microfluidics and lab-on-a-chip systems. In this study microfluidic ESI systems operating in the negative ion mode, in combination with Fourier transform ion cyclotron resonance (FTICR) at 9.4 Tesla and quadrupole time-of-flight (QTOF) tandem mass spectrometry (MS/MS) are introduced for glycolipidomic surveys in biomedical research. Two different chip ESI systems: a fully automated chip-based nanoESI robot and a thin chip microsprayer have been coupled each to both a hybrid quadrupole time-of-flight (QTOF) MS and a Fourier transform ion cyclotron resonance (FTICR) MS at 9.4 T. The feasibility of the chip MS approaches was tested for the determination of ganglioside differential expression in human brain regions and elucidation of the topospecific structures. The obtained data indicate that the high sensitivity and ionization efficiency provided at nano- and microscale level by the chip MS infusion in combination with tandem MS make this new approach ideal for studies

  3. Cost and profitability of biofuel chipping in Alnus incana stands in Lithuania

    Energy Technology Data Exchange (ETDEWEB)

    Mizaras, Stasys; Sadauskiene, Liana; Mizaraite, Diana (Department of Forest Resources, Economics and Policy, Lithuanian Research Centre for Agriculture and Forestry, Inst. of Forestry, Girionys, (Lithuania)), e-mail: l.sadauskiene@mi.lt

    2011-07-01

    The demand for forest fuels is increasing in Lithuania. One biofuel source could be grey alder stands, which are currently underused. This study examines the economic feasibility of producing chips from grey alder stands. The research was performed on three grey alder stands. Three chip production technologies were analysed: chips from logging residues, stemwood chips and whole-tree chips. Work time expenditures and costs were assessed for each mode of chip production. When raw material for chips are sold at the roadside, their production from logging residues is usually not profitable. Profitability of whole-tree raw material for chips depends on forwarding distance. Production of raw material for chips from stemwood is profitable. When chips are sold at the heating plant, production is profitable if the chips are made from stemwood and whole trees. Production of chips from logging residues can be profitable if forwarding distances are short. If it is desired to promote the use of grey alder stands for fuel, the problem of the competing profitability of this raw material for chip production should be solved by instituting subsidies or increasing its price

  4. HTS and PCT Reliability of Chips and Flex Substrates Assembled Using a Thermosonic Flip-Chip Bonding Process

    Science.gov (United States)

    Chuang, Cheng-Li; Kang, Min-Yi

    2012-09-01

    This study assesses the high-temperature storage (HTS) test and the pressure-cooker test (PCT) reliability of an assembly of chips and flexible substrates. After the chips were bonded onto the flexible substrates, specimens were utilized to assess the HTS test and PCT reliability. After the PCT and HTS tests, the die-shear test was applied to examine changes in die-shear forces. The microstructure of the test specimens was analyzed to evaluate reliability and to identify possible failure mechanisms. When the duration of the HTS test was increased, the percentage of gold bumps that peeled off from the surface of the copper pads on the chip side increased, and a crack was present at the bonding interface between the gold bumps and chip bond pads. This crack was due to thermal stress generated during the HTS test, and degraded the die-shear force of the assembly of chips and flexible substrates. After the PCT, the crack was present at the interface between deposited layers of copper electrodes after the specimens were subjected to the PCT for various durations. Moisture penetrated into the deposited layers of the copper electrodes, deposited layers lost their adhesion, and the crack progressed from the corner into the central bond area as the test duration increased. To improve the PCT reliability of assemblies of chips and flexible substrates using the thermosonic flip-chip bonding process, one must prevent moisture from penetrating into deposited layers of copper electrodes and prevent crack formation at the interface between nickel and copper layers. Underfill would be an effective approach to prevent moisture from penetrating into deposited layers during the PCT, thereby improving the reliability of the samples during the PCT.

  5. Using Ant Colony Optimization for Routing in VLSI Chips

    Science.gov (United States)

    Arora, Tamanna; Moses, Melanie

    2009-04-01

    Rapid advances in VLSI technology have increased the number of transistors that fit on a single chip to about two billion. A frequent problem in the design of such high performance and high density VLSI layouts is that of routing wires that connect such large numbers of components. Most wire-routing problems are computationally hard. The quality of any routing algorithm is judged by the extent to which it satisfies routing constraints and design objectives. Some of the broader design objectives include minimizing total routed wire length, and minimizing total capacitance induced in the chip, both of which serve to minimize power consumed by the chip. Ant Colony Optimization algorithms (ACO) provide a multi-agent framework for combinatorial optimization by combining memory, stochastic decision and strategies of collective and distributed learning by ant-like agents. This paper applies ACO to the NP-hard problem of finding optimal routes for interconnect routing on VLSI chips. The constraints on interconnect routing are used by ants as heuristics which guide their search process. We found that ACO algorithms were able to successfully incorporate multiple constraints and route interconnects on suite of benchmark chips. On an average, the algorithm routed with total wire length 5.5% less than other established routing algorithms.

  6. Nanoimprinted nanopillar array chip for procalcitonin detection (Conference Presentation)

    Science.gov (United States)

    Sun, Ling Ling; Zhou, Xiaodong

    2016-03-01

    Procalcitonin (PCT) is an early and highly specific biomarker in response to bacterial infection. The PCT-guided antibiotic therapy has demonstrated to be more efficient than standard therapy to reduce in antibiotic use without adverse outcome in mortality. The PCT detection in clinics is required to be highly sensitive with a sensitivity of 0.5 ng/ml. At present, the technologies for PCT detection are limited. This paper reported a highly sensitive nanoimprinted gold nanopillar array chip for PCT detection. To achieve high sensitivity for PCT detection, the gold nanopillar array sensing chip was designed by plasmonic simulation and fabricated by high fidelity nanoimprinting technology. The gold nanopillars of 140 nm were nanoimprinted on glass substrate. A robust sandwich bioassay of capture antibody /PCT / quantum dot (QD) conjugated detection antibody was established on the gold nanopillar array chip to detect PCT. The nanopillars serve as localized surface plasmon resonance (LSPR) generators to enhance the fluorescent emission from QD. A limit of detection (LOD) of 0.5 ng/ml was achieved for PCT detection. This is the first time that PCT is detected with such high sensitivity by LSPR enhanced QD emission. By considering the low-cost, high sensitivity of the bioassay, as well as the inexpensive mass fabrication of the high quality chips, this novel nanoimprinted gold nanopillar array chip is particularly useful for developing a point-of-care system for PCT detection.

  7. AC Zeeman potentials for atom chip-based ultracold atoms

    Science.gov (United States)

    Fancher, Charles; Pyle, Andrew; Ziltz, Austin; Aubin, Seth

    2015-05-01

    We present experimental and theoretical progress on using the AC Zeeman force produced by microwave magnetic near-fields from an atom chip to manipulate and eventually trap ultracold atoms. These AC Zeeman potentials are inherently spin-dependent and can be used to apply qualitatively different potentials to different spin states simultaneously. Furthermore, AC Zeeman traps are compatible with the large DC magnetic fields necessary for accessing Feshbach resonances. Applications include spin-dependent trapped atom interferometry and experiments in 1D many-body physics. Initial experiments and results are geared towards observing the bipolar detuning-dependent nature of the AC Zeeman force at 6.8 GHz with ultracold 87Rb atoms trapped in the vicinity of an atom chip. Experimental work is also underway towards working with potassium isotopes at frequencies of 1 GHz and below. Theoretical work is focused on atom chip designs for AC Zeeman traps produced by magnetic near-fields, while also incorporating the effect of the related electric near-fields. Electromagnetic simulations of atom chip circuits are used for mapping microwave propagation in on-chip transmission line structures, accounting for the skin effect, and guiding impedance matching.

  8. On-chip enucleation of an oocyte by untethered microrobots

    International Nuclear Information System (INIS)

    We propose a novel on-chip enucleation of an oocyte with zona pellucida by using a combination of untethered microrobots. To achieve enucleation within the closed space of a microfluidic chip, two microrobots, a microknife and a microgripper were integrated into the microfluidic chip. These microrobots were actuated by an external magnetic force produced by permanent magnets placed on the robotic stage. The tip of the microknife was designed by considering the biological geometric feature of an oocyte, i.e. the oocyte has a polar body in maturation stage II. Moreover, the microknife was fabricated by using grayscale lithography, which allows fabrication of three-dimensional microstructures. The microgripper has a gripping function that is independent of the driving mechanism. On-chip enucleation was demonstrated, and the enucleated oocytes are spherical, indicating that the cell membrane of the oocytes remained intact. To confirm successful enucleation using this method, we investigated the viability of oocytes after enucleation. The results show that the production rate, i.e. the ratio between the number of oocytes that reach the blastocyst stage and the number of bovine oocytes after nucleus transfer, is 100%. The technique will contribute to complex cell manipulation such as cell surgery in lab-on-a-chip devices. (paper)

  9. Circulating polymerase chain reaction chips utilizing multiple-membrane activation

    Science.gov (United States)

    Wang, Chih-Hao; Chen, Yi-Yu; Liao, Chia-Sheng; Hsieh, Tsung-Min; Luo, Ching-Hsing; Wu, Jiunn-Jong; Lee, Huei-Huang; Lee, Gwo-Bin

    2007-02-01

    This paper reports a new micromachined, circulating, polymerase chain reaction (PCR) chip for nucleic acid amplification. The PCR chip is comprised of a microthermal control module and a polydimethylsiloxane (PDMS)-based microfluidic control module. The microthermal control modules are formed with three individual heating and temperature-sensing sections, each modulating a specific set temperature for denaturation, annealing and extension processes, respectively. Micro-pneumatic valves and multiple-membrane activations are used to form the microfluidic control module to transport sample fluids through three reaction regions. Compared with other PCR chips, the new chip is more compact in size, requires less time for heating and cooling processes, and has the capability to randomly adjust time ratios and cycle numbers depending on the PCR process. Experimental results showed that detection genes for two pathogens, Streptococcus pyogenes (S. pyogenes, 777 bps) and Streptococcus pneumoniae (S. pneumoniae, 273 bps), can be successfully amplified using the new circulating PCR chip. The minimum number of thermal cycles to amplify the DNA-based S. pyogenes for slab gel electrophoresis is 20 cycles with an initial concentration of 42.5 pg µl-1. Experimental data also revealed that a high reproducibility up to 98% could be achieved if the initial template concentration of the S. pyogenes was higher than 4 pg µl-1. The preliminary results of the current paper were presented at the 19th IEEE International Conference on Micro Electro Mechanical Systems (IEEE MEMS 2006), Istanbul, Turkey, 22-26 January, 2006.

  10. PERFORMANCE ENHANCED ROUTER DESIGN FOR NETWORK ON CHIP

    Directory of Open Access Journals (Sweden)

    Anbu chozhan.P

    2013-04-01

    Full Text Available Network on chip is a new paradigm for on chip design that is able to sustain the communication provisions for the SoC with the desired performance. NOC applies networking methodology concepts to system on chip data transfer and it gives noticeable elevation over conventionalbus based communication. NOC router is the backbone of on chip communication which directs the flow of data. In NOC router the arbiter is used during number of inputs request for the similar out port. Arbiter generates the grant based on the priority and previous granted input. For NOC router we have design the efficient round robin arbiter and analyse the power and area. In this paper on chip router is designed with a buffering technique of FWFT based asynchronous FIFO which improves timing and reduce power consumption. The proposed design of router is simulated and synthesized in Xilinx ISE 13.2 and the source code is written in Verilog. Cadence soc encounter of technology ami035 is used to generate layout of router and RTL compiler is used to compute area, power and timing.

  11. Silicon integrated nanophotonics for on-chip interconnects

    Science.gov (United States)

    Vlasov, Yurii

    2008-03-01

    Current trend in microelectronics industry is to increase the parallelism in computation by multi-threading, by building large scale multi-chip systems and, more recently, by increasing the number of cores on a single chip. With such increase of parallelization the interconnect bandwidth between the racks, chips or different cores is becoming a limiting factor for the design of high performance computer systems. The on-chip ultrahigh-bandwidth silicon-based photonic network might provide an attractive solution to this bandwidth bottleneck. We will review recent results on silicon nanophotonic circuits based on photonic wires and photonic crystals. Strong light confinement at the diffraction limit enables dramatic scaling of the device area and allows unprecedented control over optical signals. Silicon nanophotonic devices have immense capacity for low-loss, high-bandwidth data processing that might enable the design of ultra-compact on-chip optical networks. In particular we will show recent results on design and characterization of various ultra-compact (circuits as optical delay lines, electro-optic modulators, broadband optical switches, wavelength filters, etc.

  12. Adsorbate Electric Fields on a Cryogenic Atom Chip

    CERN Document Server

    Chan, K S; Hufnagel, C; Dumke, R

    2013-01-01

    We investigate the behaviour of electric fields originating from adsorbates deposited on a cryogenic atom chip as it is cooled from room temperature to cryogenic temperature. Using Rydberg electromagnetically induced transparency we measure the field strength versus distance from a 1 mm square of YBCO patterned onto a YSZ chip substrate. We find a localized and stable dipole field at room temperature and attribute it to a saturated layer of chemically adsorbed rubidium atoms on the YBCO. As the chip is cooled towards 83 K we observe a change in sign of the electric field as well as a transition from a localized to a delocalized dipole density. We relate these changes to the onset of physisorption on the chip surface when the van der Waals attraction overcomes the thermal desorption mechanisms. Our findings suggest that, through careful selection of substrate materials, it may be possible to reduce the electric fields caused by atomic adsorption on chips, opening up experiments to controlled Rydberg-surface co...

  13. LSST camera readout chip ASPIC: test tools

    International Nuclear Information System (INIS)

    The LSST camera will have more than 3000 video-processing channels. The readout of this large focal plane requires a very compact readout chain. The correlated ''Double Sampling technique'', which is generally used for the signal readout of CCDs, is also adopted for this application and implemented with the so called ''Dual Slope integrator'' method. We have designed and implemented an ASIC for LSST: the Analog Signal Processing asIC (ASPIC). The goal is to amplify the signal close to the output, in order to maximize signal to noise ratio, and to send differential outputs to the digitization. Others requirements are that each chip should process the output of half a CCD, that is 8 channels and should operate at 173 K. A specific Back End board has been designed especially for lab test purposes. It manages the clock signals, digitizes the analog differentials outputs of ASPIC and stores data into a memory. It contains 8 ADCs (18 bits), 512 kwords memory and an USB interface. An FPGA manages all signals from/to all components on board and generates the timing sequence for ASPIC. Its firmware is written in Verilog and VHDL languages. Internals registers permit to define various tests parameters of the ASPIC. A Labview GUI allows to load or update these registers and to check a proper operation. Several series of tests, including linearity, noise and crosstalk, have been performed over the past year to characterize the ASPIC at room and cold temperature. At present, the ASPIC, Back-End board and CCD detectors are being integrated to perform a characterization of the whole readout chain.

  14. Cytostretch, an Organ-on-Chip Platform

    Directory of Open Access Journals (Sweden)

    Nikolas Gaio

    2016-07-01

    Full Text Available Organ-on-Chips (OOCs are micro-fabricated devices which are used to culture cells in order to mimic functional units of human organs. The devices are designed to simulate the physiological environment of tissues in vivo. Cells in some types of OOCs can be stimulated in situ by electrical and/or mechanical actuators. These actuations can mimic physiological conditions in real tissue and may include fluid or air flow, or cyclic stretch and strain as they occur in the lung and heart. These conditions similarly affect cultured cells and may influence their ability to respond appropriately to physiological or pathological stimuli. To date, most focus has been on devices specifically designed to culture just one functional unit of a specific organ: lung alveoli, kidney nephrons or blood vessels, for example. In contrast, the modular Cytostretch membrane platform described here allows OOCs to be customized to different OOC applications. The platform utilizes silicon-based micro-fabrication techniques that allow low-cost, high-volume manufacturing. We describe the platform concept and its modules developed to date. Membrane variants include membranes with (i through-membrane pores that allow biological signaling molecules to pass between two different tissue compartments; (ii a stretchable micro-electrode array for electrical monitoring and stimulation; (iii micro-patterning to promote cell alignment; and (iv strain gauges to measure changes in substrate stress. This paper presents the fabrication and the proof of functionality for each module of the Cytostretch membrane. The assessment of each additional module demonstrate that a wide range of OOCs can be achieved.

  15. Recycling of AlMgSi1 aluminium chips by cold compression

    Directory of Open Access Journals (Sweden)

    T. Pepelnjak

    2012-10-01

    Full Text Available Current work elaborates possibilities for direct conversion of AlMgSi1 aluminium chips into solid billets by solid state recycling. Milling chips from an aluminium alloy were cold compressed in a closed cylindrical die by means of a 2,5 MN hydraulic press. Due to low initial relative density of the chips, several pre-compressions were needed. In order to establish the infl uence of chip geometry on the final density of billets different types of chips were cut by using various milling regimes. The infl uence of a compression regime due to various chip types were followed by load–stroke diagrams. Up to 97 % of density measured at extruded aluminium was attained for one type of chips. Results show that the shapes of the chips and their size (especially thickness have a considerable infl uence on the final integrity of billets.

  16. ChIP on SNP-chip for genome-wide analysis of human histone H4 hyperacetylation

    Directory of Open Access Journals (Sweden)

    Porter Christopher J

    2007-09-01

    Full Text Available Abstract Background SNP microarrays are designed to genotype Single Nucleotide Polymorphisms (SNPs. These microarrays report hybridization of DNA fragments and therefore can be used for the purpose of detecting genomic fragments. Results Here, we demonstrate that a SNP microarray can be effectively used in this way to perform chromatin immunoprecipitation (ChIP on chip as an alternative to tiling microarrays. We illustrate this novel application by mapping whole genome histone H4 hyperacetylation in human myoblasts and myotubes. We detect clusters of hyperacetylated histone H4, often spanning across up to 300 kilobases of genomic sequence. Using complementary genome-wide analyses of gene expression by DNA microarray we demonstrate that these clusters of hyperacetylated histone H4 tend to be associated with expressed genes. Conclusion The use of a SNP array for a ChIP-on-chip application (ChIP on SNP-chip will be of great value to laboratories whose interest is the determination of general rules regarding the relationship of specific chromatin modifications to transcriptional status throughout the genome and to examine the asymmetric modification of chromatin at heterozygous loci.

  17. Optimisation of an oak chips-grape mix maceration process. Influence of chip dose and maceration time.

    Science.gov (United States)

    Gordillo, Belén; Baca-Bocanegra, Berta; Rodriguez-Pulído, Francisco J; González-Miret, M Lourdes; García Estévez, Ignacio; Quijada-Morín, Natalia; Heredia, Francisco J; Escribano-Bailón, M Teresa

    2016-09-01

    Oak chips-related phenolics are able to modify the composition of red wine and modulate the colour stability. In this study, the effect of two maceration techniques, traditional and oak chips-grape mix process, on the phenolic composition and colour of Syrah red wines from warm climate was studied. Two doses of oak chips (3 and 6g/L) at two maceration times (5 and 10days) during fermentation was considered. Changes on phenolic composition (HPLC-DAD-MS), copigmentation/polymerisation (spectrophotometry), and colour (Tristimulus and Differential Colorimetry) were assessed by multivariate statistical techniques. The addition of oak chips at shorter maceration times enhanced phenolic extraction, colour and its stabilisation in comparison to the traditional maceration. On contrast, increasing chip dose in extended maceration time resulted in wines with lighter and less stable colour. Results open the possibility of optimise alternative technological applications to traditional grape maceration for avoiding the common loss of colour of wines from warm climate. PMID:27041323

  18. Sea otter dental enamel is highly resistant to chipping due to its microstructure

    OpenAIRE

    Ziscovici, Charles; Lucas, Peter W.; Constantino, Paul J.; Bromage, Timothy G; van Casteren, Adam

    2014-01-01

    Dental enamel is prone to damage by chipping with large hard objects at forces that depend on chip size and enamel toughness. Experiments on modern human teeth have suggested that some ante-mortem chips on fossil hominin enamel were produced by bite forces near physiological maxima. Here, we show that equivalent chips in sea otter enamel require even higher forces than human enamel. Increased fracture resistance correlates with more intense enamel prism decussation, often seen also in some fo...

  19. Temporal and Spatial Isolation and Protection of Program Modules for an Embedded System-on-Chip

    OpenAIRE

    Vermeer, Håvard

    2011-01-01

    Nordic Semiconductor ASA wishes to improve its product value by enabling Bluetooth Low Energy functionality on their new Cortex-M0 based radio microcontrollers.The new device will be single-chip, thereby evolving their current dual-chip solution.% using a single chip, thereby evolving their current dual-chip solution. This report handles the challenge of protecting the radio subsystem from the user applications since they now must reside on the same microcontroller.The Bluetooth Low Energy pr...

  20. Production of structured thin wooden chips by milling with small cutting angles

    OpenAIRE

    Heisel, Uwe; Tröger, Johannes

    1994-01-01

    Thin wooden chips can be used in a wide range, primarily to produce ecological positive materials to substitute plastics and mineral wool for the use of thermal isolation and packaging materials. There are wide resources of wood and it can be wasted ecologically. Additionally, the production of wooden chips for the above mentioned purposes has clear advantages regarding the expenditure of energy. With existing machining methods for the production of wooden cutting chips, only a chip thickness...

  1. Enrolling eligible children in Medicaid and CHIP: a research update.

    Science.gov (United States)

    Sommers, Benjamin D

    2010-07-01

    Keeping children who are eligible for Medicaid and the Children's Health Insurance Program (CHIP) enrolled in these programs remains an important policy challenge. An earlier study showed that one-third of all uninsured children in 2006 had been enrolled in Medicaid or CHIP the previous year. Updated results show that in 2008, children enrolled in Medicaid were somewhat more likely to remain in the program than in 2006. However, more than a quarter of all uninsured children in 2008 had been enrolled in Medicaid or CHIP the year before. In other words, roughly two million children became uninsured in 2008, despite their ongoing eligibility for these programs. It is possible that fewer children may also be enrolling in public programs since 2006 because of requirements that their U.S. citizenship status be documented. PMID:20606187

  2. Anderson localisation of visible light on a nanophotonic chip

    CERN Document Server

    Crane, Tom; Sapienza, Luca

    2016-01-01

    Controlling the propagation of visible light on a chip is of tremendous interest in research areas such as energy harvesting, imaging, sensing and biology. Technological advances allow us to control light at the nanoscale and to strongly enhance the light-matter interaction in highly engineered devices. However, compared to state-of-the-art two-dimensional optical cavities operating at longer wavelengths, the quality factor of on-chip visible light confinement is several orders of magnitude lower. Our approach makes use of fabrication imperfections to trap light: we demonstrate, for the first time, Anderson localisation of visible light on a chip. Remarkably, compared to quality factors of engineered cavities, disorder-induced localisation proves to be more efficient in trapping light than highly engineered devices, thus reversing the trend observed so far. We measure light-confinement quality factors as high as 7600 and, by implementing a sensitive imaging technique, we directly visualise the localised modes...

  3. The development of taste transduction and taste chip technology

    Institute of Scientific and Technical Information of China (English)

    LI Yan; LIU Qingjun; XU Ying; CAI Hua; QIN Lifeng; WANG Lijiang; WANG Ping

    2005-01-01

    The intrinsic perception process of taste is obviously far less known than those of vision, audition, touch and olfaction. Despite that taste cells utilize a variety of sensory mechanisms to translate plenty of gustatory sensations such as sour, sweet, bitter, salty and umami into cellular signals, gustatory perception mechanisms are still under exploration due to the lack of effective methods on cellular and molecular level. Recently the development of molecular biological and electrophysiological studies has promoted exploration of olfactory and gustatory transduction and coding mechanisms dramatically. Based on the studies of artificial olfaction, artificial taste and cell-based biosensor in our laboratory, this paper reviews the current research on taste transduction mechanism. We introduce the recent advances in cell chip that combined biology with microelectronics, discuss taste cell chip as well as its potential of prospective application in taste transduction mechanism in detail and propose the research trends of taste chip in future.

  4. AtomChips: mesoscopic physics with ultracold atoms

    International Nuclear Information System (INIS)

    Full text: Miniaturization and integration of atom-optical components on atom chips allow coherent manipulation of matter waves on the quantum level by using high spatial resolution electro magnetic potentials from structures on the atom chip or by employing adiabatic radio frequency (RF) or micro wave (MW) potentials. Bose-Einstein condensates (BECs) on these AtomChips can be used for many different tasks. These range from measuring magnetic and electric fields with unprecedented sensitivity by observing the density modulations in trapped highly elongated 1d BECs, to fundamental studies of the universal properties in low dimensional systems like non equilibrium dynamics and coherence decay in one-dimensional super fluids. The talk will give an overview of the recent advances and experiments. (author)

  5. Microfluidic-Based sample chips for radioactive solutions

    International Nuclear Information System (INIS)

    Historical nuclear fuel cycle process sampling techniques required sample volumes ranging in the tens of milliliters. The radiation levels experienced by analytical personnel and equipment, in addition to the waste volumes generated from analysis of these samples, have been significant. These sample volumes also impacted accountability inventories of required analytes during process operations. To mitigate radiation dose and other issues associated with the historically larger sample volumes, a microcapillary sample chip was chosen for further investigation. The ability to obtain microliter volume samples coupled with a remote automated means of sample loading, tracking, and transporting to the analytical instrument would greatly improve analytical efficiency while reducing both personnel exposure and radioactive waste volumes. Sample chip testing was completed to determine the accuracy, repeatability, and issues associated with the use of microfluidic sample chips used to supply µL sample volumes of lanthanide analytes dissolved in nitric acid for introduction to an analytical instrument for elemental analysis

  6. Characterization of the Medipix3 pixel readout chip

    CERN Document Server

    Ballabriga, R; Wong, W; Greiffenberg, D; Turecek, D; Blaj, G; Heijne, E H M; Plackett, R; Campbell, M; Procz, S; Llopart, X; Fiederle, M

    2011-01-01

    The Medipix3 chip is a hybrid pixel detector readout chip working in Single Photon Counting Mode. It has been developed with a new front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors. In the new architecture charge deposited in overlapping clusters of four pixels is summed event-by-event and the incoming quantum is assigned as a single hit to the summing circuit with the biggest charge deposit (this mode of operation is called Charge Summing Mode (CSM)). In Single Pixel Mode (SPM) the charge reconstruction and the communication between neighbouring pixels is disabled. This is the operating mode in traditional detector systems. This paper presents the results of the characterization of the chip with electrical stimuli and radioactive sources.

  7. Pion Irradiation of the APV25 Front-end Chip

    CERN Document Server

    Friedl, M; Pernicka, Manfred

    2001-01-01

    The Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) at CERN will include a Silicon Strip Tracker covering a sensitive area of 206m2. About ten million channels will be read out by APV25 front-end chips, fabricated in the 0.25um deep submicron process. Although permanent damage is not expected within CMS radiation levels, transient Single Event Upsets (SEUs) are inevitable and affect both digital and analog circuits. Eight APV25 chips (version S1) were exposed to a high-intensity pion beam at the Paul Scherrer Institute (Villigen/CH) to study the radiation induced effects in detail. The results, which are compatible to similar measurements performed with heavy ions, are used to predict the chip error rate at CMS.

  8. Effect of on-chip filter on Coulomb blockade thermometer

    International Nuclear Information System (INIS)

    Coulomb Blockade Thermometer (CBT) is a primary thermometer based on electric conductance of normal tunnel junction arrays. One limitation for CBT use at the lowest temperatures has been due to environmental noise heating. To improve on this limitation, we have done measurements on CBT sensors fabricated with different on-chip filtering structures in a dilution refrigerator with a base temperature of 10 mK. The CBT sensors were produced with a wafer scale tunnel junction process. We present how the different on-chip filtering schemes affect the limiting saturation temperatures and show that CBT sensors with proper on-chip filtering work at temperatures below 20 mK and are tolerant to noisy environment.

  9. EXPERIMENTAL STUDY ON THE HOT EMBOSSING POLYMER MICROFLUIDIC CHIP

    Institute of Scientific and Technical Information of China (English)

    HE Yong; FU Jianzhong; CHEN Zichen

    2008-01-01

    Experiments are used to study the fabrication of polymer microfluidic chip with hot embossing method. The pattern fidelity with respect to the process parameters is analyzed. Experiment results show that the relationship between the imprint temperature and the microchannel width is approximately exponential. However, the depth of micro channel isn't sensitive to the imprint temperature. When the imprint pressure is larger than 1 MPa and the imprint time is longer than 2 min, the increasing of imprint pressure and holding time has little impact on the microchannel width. So over long holding time is not needed in hot embossing. Based on the experiment analysis, a series of optimization process parameters is obtained and a fine microfluidic chip is fabricated. The electrophoresis separation experiment are used to verify the microfluidic chip performance after bonding. The results show that 100bp-ladder DNA sample can be separated in less than 5 min successfully.

  10. Testing and operating a multiprocessor chip with processor redundancy

    Science.gov (United States)

    Bellofatto, Ralph E; Douskey, Steven M; Haring, Rudolf A; McManus, Moyra K; Ohmacht, Martin; Schmunkamp, Dietmar; Sugavanam, Krishnan; Weatherford, Bryan J

    2014-10-21

    A system and method for improving the yield rate of a multiprocessor semiconductor chip that includes primary processor cores and one or more redundant processor cores. A first tester conducts a first test on one or more processor cores, and encodes results of the first test in an on-chip non-volatile memory. A second tester conducts a second test on the processor cores, and encodes results of the second test in an external non-volatile storage device. An override bit of a multiplexer is set if a processor core fails the second test. In response to the override bit, the multiplexer selects a physical-to-logical mapping of processor IDs according to one of: the encoded results in the memory device or the encoded results in the external storage device. On-chip logic configures the processor cores according to the selected physical-to-logical mapping.

  11. Recycling of wood chips and wheat dregs for sludge processing.

    Science.gov (United States)

    Lin, Y F; Jing, S R; Lee, D Y

    2001-01-01

    A Buchner filtration study was conducted to investigate the effect on sludge dewatering of adding organic waste solids (wood chips or wheat dregs) to sludge after chemical preconditioning (with ferric chloride or alum). Increasing the dose of wood chips or wheat dregs enhanced sludge filtration performance and increased the energy content of the filter cake, but did not consistently increase the total filtrate removed. The additional filtrate removal was found to balance the inert solids load only when the chemical preconditioner used did not result in sufficient coagulation of the sludge and the skeleton builder dose was low (< or = 90%). Accordingly, various dose ranges of wood chips and wheat dregs are suggested for different sludge management schemes. PMID:11131800

  12. Microfluidic-Based Sample Chips for Radioactive Solutions

    Energy Technology Data Exchange (ETDEWEB)

    Tripp, J. L.; Law, J. D.; Smith, T. E.; Rutledge, V. J.; Bauer, W. F.; Ball, R. D.; Hahn, P. A.

    2014-02-01

    Historical nuclear fuel cycle process sampling techniques required sample volumes ranging in the tens of milliliters. The radiation levels experienced by analytical personnel and equipment, in addition to the waste volumes generated from analysis of these samples, have been significant. These sample volumes also impacted accountability inventories of required analytes during process operations. To mitigate radiation dose and other issues associated with the historically larger sample volumes, a microcapillary sample chip was chosen for further investigation. The ability to obtain microliter volume samples coupled with a remote automated means of sample loading, tracking, and transporting to the analytical instrument would greatly improve analytical efficiency while reducing both personnel exposure and radioactive waste volumes. Sample chip testing was completed to determine the accuracy, repeatability, and issues associated with the use of microfluidic sample chips used to supply µL sample volumes of lanthanide analytes dissolved in nitric acid for introduction to an analytical instrument for elemental analysis.

  13. Various On-Chip Sensors with Microfluidics for Biological Applications

    Directory of Open Access Journals (Sweden)

    Hun Lee

    2014-09-01

    Full Text Available In this paper, we review recent advances in on-chip sensors integrated with microfluidics for biological applications. Since the 1990s, much research has concentrated on developing a sensing system using optical phenomena such as surface plasmon resonance (SPR and surface-enhanced Raman scattering (SERS to improve the sensitivity of the device. The sensing performance can be significantly enhanced with the use of microfluidic chips to provide effective liquid manipulation and greater flexibility. We describe an optical image sensor with a simpler platform for better performance over a larger field of view (FOV and greater depth of field (DOF. As a new trend, we review consumer electronics such as smart phones, tablets, Google glasses, etc. which are being incorporated in point-of-care (POC testing systems. In addition, we discuss in detail the current optical sensing system integrated with a microfluidic chip.

  14. PCR thermal management in an integrated Lab on Chip

    International Nuclear Information System (INIS)

    Thermal management modelling and simulations of a polymerase chain reaction (PCR) device to be integrated on a lab on chip (LOC) have been carried out and presented. A typical MEMS PCR in symmetrical configuration is the base model for this study. When the PCR device is integrated on a fluidic chip with many other bio-analysis components such as DNA extraction, RNA extraction, electro-chemical sensor, flow through components and channels etc., thermal symmetry required for uniform temperature across the PCR chamber is normally lost. In this paper, ANSYS 8.0 simulations in varying conditions and corresponding physical basis have been investigated and presented. Model optimizations are carried out when PCR chamber is placed, one, in the centre (symmetry) and two, in the corner (asymmetry) of the integrated chip. In both cases, temperature uniformity within ±0.5 deg. C variation is obtained

  15. Liquid metal cooling in thermal management of computer chips

    Institute of Scientific and Technical Information of China (English)

    MA Kunquan; LIU Jing

    2007-01-01

    With the rapid improvement of computer performance,tremendous heat generation in the chip becomes a major serious concern for thermal management.Meanwhile,CPU chips are becoming smaller and smaller with almost no room for the heat to escape.The total power-dissipation levels now reside on the order of 100 W with a peak power density of 400-500 W/cm2,and are still steadily climbing.As a result,it is extremely hard to attain higher performance and reliability.Because the conventional conduction and forcedair convection techniques are becoming incapable in providing adequate cooling for sophisticated electronic systems,new solutions such as liquid cooling,thermoelectric cooling,heat pipes,vapor chambers,etc.are being studied.Recently,it was realized that using a liquid metal or its alloys with a low melting point as coolant could significantly lower the chip temperature.This new generation heat transfer enhancement method raised many important fundamentals and practical issues to be solved.To accommodate to the coming endeavor in this area,this paper is dedicated to presenting an overall review on chip cooling using liquid metals or their alloys as coolant.Much more attention will be paid to the thermal properties of liquid metals with low melting points or their alloys and their potential applications in the chip cooling.Meanwhile,principles of several typical pumping methods such as mechanical,electromagnetic or peristaltic pumps will be illustrated.Some new advancement in making a liquid metal cooling device will be discussed.The liquid metal cooling is expected to open a new world for computer chip cooling because of its evident merits over traditional coolant.

  16. A single VLSI chip for computing syndromes in the (225, 223) Reed-Solomon decoder

    Science.gov (United States)

    Hsu, I. S.; Truong, T. K.; Shao, H. M.; Deutsch, L. J.

    1986-11-01

    A description of a single VLSI chip for computing syndromes in the (255, 223) Reed-Solomon decoder is presented. The architecture that leads to this single VLSI chip design makes use of the dual basis multiplication algorithm. The same architecture can be applied to design VLSI chips to compute various kinds of number theoretic transforms.

  17. A polymer chip-integrable piezoelectric micropump with low backpressure dependence

    DEFF Research Database (Denmark)

    Conde, A. J.; Bianchetti, A.; Veiras, F. E.;

    2015-01-01

    We describe a piezoelectric micropump constructed in polymers with conventional machining methods. The micropump is self-contained and can be built as an independent device or as an on-chip module within laminated microfluidic chips. We demonstrate on-chip integrability by the fabrication...

  18. Chlorhexidine Chip in the Treatment of Chronic Periodontitis – A Clinical Study

    OpenAIRE

    Medaiah, Sangeetha; Srinivas, M; Melath, Anil; Girish, Suragimath; Polepalle, Tejaswin; Dasari, Ankineedu Babu

    2014-01-01

    Aim: The aim of this study was to clinically evaluate the use of biodegradable chlorhexidine chip when used as an adjunct to scaling and root planing (SRP) in the treatment of moderate to severe periodontitis patients. The study also intended to compare the combined therapy (SRP and Chlorhexidine chip) with chlorhexidine chip alone in individuals with periodontitis.

  19. The behavior of Chip Firing Game and related model: A comprehensive survey

    Directory of Open Access Journals (Sweden)

    Le Manh Ha

    2015-11-01

    Full Text Available In this paper, we give a survey of known results concerning the presence of order structure and lattices in the context of discrete dynamical models derived from studies of Chip Firing Games. Index Terms—Chip Firing Game, Conflicting Chip Firing Game, Discrete dynamical system, order and lattice structure, Petri net, Rotor router.

  20. 21 CFR 102.41 - Potato chips made from dried potatoes.

    Science.gov (United States)

    2010-04-01

    ... 21 Food and Drugs 2 2010-04-01 2010-04-01 false Potato chips made from dried potatoes. 102.41... Specific Nonstandardized Foods § 102.41 Potato chips made from dried potatoes. (a) The common or usual name of the food product that resembles and is of the same composition as potato chips, except that it...

  1. 75 FR 3904 - Appointments to the Medicaid and CHIP Payment and Access Commission (MACPAC)

    Science.gov (United States)

    2010-01-25

    ... OFFICE Appointments to the Medicaid and CHIP Payment and Access Commission (MACPAC) AGENCY: Government... Reauthorization Act of 2009 established MACPAC to review Medicaid and CHIP access and payment policies and to advise Congress on issues affecting Medicaid and CHIP. The Act directs the Comptroller General to...

  2. 42 CFR 431.974 - Basic elements of Medicaid and CHIP eligibility reviews.

    Science.gov (United States)

    2010-10-01

    ... 42 Public Health 4 2010-10-01 2010-10-01 false Basic elements of Medicaid and CHIP eligibility... ADMINISTRATION Requirements for Estimating Improper Payments in Medicaid and CHIP § 431.974 Basic elements of Medicaid and CHIP eligibility reviews. (a) General requirements. (1) States selected in any given year...

  3. 78 FR 45208 - Children's Health Insurance Program (CHIP); Final Allotments to States, the District of Columbia...

    Science.gov (United States)

    2013-07-26

    ... September 16, 2009 Federal Register (74 FR 47517) which contained the FY 2009 CHIP allotments, the February 17, 2011 Federal Register (76 FR 9233) which contained the FY 2010 and FY 2011 CHIP allotments, and the July 24, 2012 Federal Register (77 FR 43290) which contained the FY 2012 CHIP allotments. ] 3....

  4. Identifying Professional Competencies of the Flip-Chip Packaging Engineer in Taiwan

    Science.gov (United States)

    Guu, Y. H.; Lin, Kuen-Yi; Lee, Lung-Sheng

    2014-01-01

    This study employed a literature review, expert interviews, and a questionnaire survey to construct a set of two-tier competencies for a flip-chip packaging engineer. The fuzzy Delphi questionnaire was sent to 12 flip-chip engineering experts to identify professional competencies that a flip-chip packaging engineer must have. Four competencies,…

  5. 42 CFR 457.216 - Treatment of uncashed or canceled (voided) CHIP checks.

    Science.gov (United States)

    2010-10-01

    ... 42 Public Health 4 2010-10-01 2010-10-01 false Treatment of uncashed or canceled (voided) CHIP... canceled (voided) CHIP checks. (a) Purpose. This section provides rules to ensure that States refund the... section— Canceled (voided) check means an CHIP check issued by a State or fiscal agent that prior to...

  6. A system-level multiprocessor system-on-chip modeling framework

    DEFF Research Database (Denmark)

    Virk, Kashif Munir; Madsen, Jan

    2004-01-01

    We present a system-level modeling framework to model system-on-chips (SoC) consisting of heterogeneous multiprocessors and network-on-chip communication structures in order to enable the developers of today's SoC designs to take advantage of the flexibility and scalability of network-on-chip and...

  7. Implementation of Guaranteed Services in the MANGO Clockless Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    Shared, segmented, on-chip interconnection networks, known as networks-on-chip (NoC), may become the preferred way of interconnecting intellectual property (IP) cores in future giga-scale system-on-chip (SoC) designs. A NoC can provide the required communication bandwidth while accommodating the...

  8. Trapping atoms on a transparent permanent-magnet atom chip

    CERN Document Server

    Shevchenko, A; Jaakkola, A; Kaivola, M; Lindvall, T; Pfau, T; Tittonen, I

    2006-01-01

    We describe experiments on trapping of atoms in microscopic magneto-optical traps on an optically transparent permanent-magnet atom chip. The chip is made of magnetically hard ferrite-garnet material deposited on a dielectric substrate. The confining magnetic fields are produced by miniature magnetized patterns recorded in the film by magneto-optical techniques. We trap Rb atoms on these structures by applying three crossed pairs of counter-propagating laser beams in the conventional magneto-optical trapping (MOT) geometry. We demonstrate the flexibility of the concept in creation and in-situ modification of the trapping geometries through several experiments.

  9. Handbook of VLSI chip design and expert systems

    CERN Document Server

    Schwarz, A F

    1993-01-01

    Handbook of VLSI Chip Design and Expert Systems provides information pertinent to the fundamental aspects of expert systems, which provides a knowledge-based approach to problem solving. This book discusses the use of expert systems in every possible subtask of VLSI chip design as well as in the interrelations between the subtasks.Organized into nine chapters, this book begins with an overview of design automation, which can be identified as Computer-Aided Design of Circuits and Systems (CADCAS). This text then presents the progress in artificial intelligence, with emphasis on expert systems.

  10. Experiment list: SRX736202 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available SRX736202 hg19 Histone H3K27ac Neural 90-8TL NA 23805227,94.9,16.5,34146 GSM1527927: DMSO... H3K27Ac ChIPseq; Homo sapiens; ChIP-Seq source_name=MPNST cells 90-8TL_DMSO || cell line=MPNST cell l...ine 90-8TL || treated with=DMSO for 24hrs || chip antibody=H3K27Ac || chip antibody vendor=Abcam http://dbar

  11. Nonequilibrium dynamics, Optimal Control and Nanofibers on an Atom Chip

    International Nuclear Information System (INIS)

    Full text: We present experiments on dynamical scaling of many-particle states, performed on degenerate 87Rb Bose gases in a time dependent trapping potential. A stochastic optimal control scheme has been implemented to manipulate the motional dynamics of such clouds, with prospects to engineer specific nonequilibrium states. Further, we present a novel atom - photon interface based on integrating optical nanofibers and nanofiber - cavities on an atom chip. Applications encompass light storage and nonlinear interactions between photons within the device, facilitated by the high optical densities and low temperatures of ultracold atom clouds in a chip trap, as well as the high transmission of an optical nanofiber. (author)

  12. CHIP Demonstrator: Semantics-Driven Recommendations and Museum Tour Generation

    Science.gov (United States)

    Aroyo, Lora; Stash, Natalia; Wang, Yiwen; Gorgels, Peter; Rutledge, Lloyd

    The main objective of the CHIP project is to demonstrate how Semantic Web technologies can be deployed to provide personalized access to digital museum collections. We illustrate our approach with the digital database ARIA of the Rijksmuseum Amsterdam. For the semantic enrichment of the Rijksmuseum ARIA database we collaborated with the CATCH STITCH project to produce mappings to Iconclass, and with the MultimediaN E-culture project to produce the RDF/OWL of the ARIA and Adlib databases. The main focus of CHIP is on exploring the potential of applying adaptation techniques to provide personalized experience for the museum visitors both on the Web site and in the museum.

  13. INVESTIGATION OF METAL CHIP HEATING PROCESS (Part 2

    Directory of Open Access Journals (Sweden)

    O. M. Dyakonov

    2008-01-01

    Full Text Available A physical and mathematical model of metal chip heating process in a continuous muffle furnace has been worked out. The model describes a conjugated heat- and mass transfer in the given  furnace (conductive, convective, radiant, heating of chips and furnace parts, lubricant-coolant evaporation, oil vapour combustion, flue gas movement. The received set of equations is a completed one that allows to solve a specified problem that is to find an optimum height for a furnace with the given productivity  and minimum natural gas consumption. 

  14. Integrated photonic qubit quantum computing on a superconducting chip

    Energy Technology Data Exchange (ETDEWEB)

    Du Lianghui; Hu Yong; Zhou Zhengwei; Guo Guangcan; Zhou Xingxiang, E-mail: xizhou@ustc.edu.c [Key Laboratory of Quantum Information, University of Science and Technology of China, Chinese Academy of Sciences, Hefei 230026 (China)

    2010-06-15

    We study a quantum computing system using microwave photons in transmission line resonators on a superconducting chip as qubits. We show that linear optics and other controls necessary for quantum computing can be implemented by coupling to Josephson devices on the same chip. By taking advantage of the strong nonlinearities in Josephson junctions, photonic qubit interactions can be realized. We analyze the gate error rate to demonstrate that our scheme is realistic even for Josephson devices with limited decoherence times. As a conceptually innovative solution based on existing technologies, our scheme provides an integrated and scalable approach to the next key milestone for photonic qubit quantum computing.

  15. Integrated photonic qubit quantum computing on a superconducting chip

    CERN Document Server

    Du, Lianghui; Zhou, Zheng-Wei; Guo, Guang-Can; Zhou, Xingxiang

    2009-01-01

    We study a quantum computing system using microwave photons in transmission line resonators on a superconducting chip as qubits. We show that all control necessary for quantum computing can be implemented by coupling to Josephson devices on the same chip, and take advantage of their strong inherent nonlinearities to realize qubit interactions. We analyze the gate error rate to demonstrate that our scheme is realistic even for Josephson devices with limited decoherence times. A conceptually innovative solution based on existing technologies, our scheme provides an integrated and scalable approach to the next key milestone for photonic qubit quantum computing.

  16. A single chip microcontroller based portable multichannel analyzer

    International Nuclear Information System (INIS)

    The development of a portable multichannel analyzer for gamma spectroscopy applications is described. The developed unit is based on the Intel 8751 single chip microcontroller and has CRT and liquid crystal displays, preamplifying and amplifying sections, high voltage supply, built-in printer and runs on rechargeable batteries. The design uses standard off the shelf components, minimizes chip count by using all the microcontroller's resources and implementing most functions in software, and this results in a low cost system with good performance. Hardware and software design along with their integration are discussed. (orig.)

  17. Bose–Einstein condensation on an atom chip

    International Nuclear Information System (INIS)

    This paper reports an experiment of creating Bose–Einstein condensate (BEC) on an atom chip. The chip-based Z-wire current with a homogeneous bias magnetic field creates a tight magnetic trap, which allows for a fast production of BEC. After a 4.17-s forced radio frequency evaporative cooling, a condensate with about 3000 atoms appears. The transition temperature is about 300 nK. This compact system is quite robust, allowing for versatile extensions and further studying of BEC. (atomic and molecular physics)

  18. Toward On-Chip Mid-Infrared Sensors.

    Science.gov (United States)

    Sieger, Markus; Mizaikoff, Boris

    2016-06-01

    This Feature highlights recent advances on mid-infrared thin-film waveguide technology and on-chip photonics facilitating next-generation label-free chem/bio sensor and assay platforms. Complemented by more recent advancements toward on-chip semiconductor waveguides, it is anticipated that label-free integrated mid-infrared sensing schemes will readily complement existing chem/bio sensor technologies in applications ranging from process monitoring and environmental analysis to biomedical diagnostics and point-of-care devices. PMID:27081763

  19. Integrated photonic qubit quantum computing on a superconducting chip

    International Nuclear Information System (INIS)

    We study a quantum computing system using microwave photons in transmission line resonators on a superconducting chip as qubits. We show that linear optics and other controls necessary for quantum computing can be implemented by coupling to Josephson devices on the same chip. By taking advantage of the strong nonlinearities in Josephson junctions, photonic qubit interactions can be realized. We analyze the gate error rate to demonstrate that our scheme is realistic even for Josephson devices with limited decoherence times. As a conceptually innovative solution based on existing technologies, our scheme provides an integrated and scalable approach to the next key milestone for photonic qubit quantum computing.

  20. On-chip photonic interconnects a computer architect's perspective

    CERN Document Server

    Nitta, Christopher J; Akella, Venkatesh

    2013-01-01

    As the number of cores on a chip continues to climb, architects will need to address both bandwidth and power consumption issues related to the interconnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated without special (and expensive) cooling and packaging techniques. Thus, there is a need to seek alternatives to electrical signaling for on-chip interconnection appli

  1. Experiment list: SRX100488 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available romatin IP Sequencing || antibody antibodydescription=Mouse monoclonal to RNA pol...ymerase II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescripti...essenger RNA in eukaryotes || antibody vendorname=abcam || antibody vendorid=ab54...08 || controlid=SL2455 || labexpid=SL2940,SL2939 || replicate=1,2 || softwareversion=MACS || antibody=Pol2-4H8 || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade || antibody

  2. Experiment list: SRX190275 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available dy antibodydescription=Mouse monoclonal to RNA polymeras...e II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=Thi...er RNA in eukaryotes || antibody vendorname=abcam || antibody vendorid=ab5408 || ...controlid=SL2339 || labexpid=SL5610,SL2353 || softwareversion=MACS || cell sex=M || antibody=Pol2-4H8 || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody (4H8) - ChIP Gra

  3. Experiment list: SRX190244 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 1610.1 source_name=PANC-1 || biomaterial_provider=ATCC || datatype=ChipSeq || datatype description=Chromatin IP Sequencing || antibod...y antibodydescription=Mouse monoclonal to RNA polymerase... II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescription=This...r RNA in eukaryotes || antibody vendorname=abcam || antibody vendorid=ab5408 || c...ontrolid=SL2340 || labexpid=SL2343,SL5609 || softwareversion=MACS || cell sex=M || antibody=Pol2-4H8 || antibody antibody

  4. Experiment list: SRX100519 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available omatin IP Sequencing || antibody antibodydescription=Mouse monoclonal to RNA poly...merase II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade. Antibody Target: POL2 || antibody targetdescriptio...ssenger RNA in eukaryotes || antibody vendorname=abcam || antibody vendorid=ab540...8 || controlid=SL3457 || labexpid=SL3830,SL3456 || replicate=1,2 || softwareversion=MACS || antibody=Pol2-4H8 || antibody antibody...description=Mouse monoclonal to RNA polymerase II CTD repeat YSPTSPS antibody (4H8) - ChIP Grade || antibody

  5. A Time-predictable Memory Network-on-Chip

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Chong, David VH; Puffitsch, Wolfgang;

    2014-01-01

    To derive safe bounds on worst-case execution times (WCETs), all components of a computer system need to be time-predictable: the processor pipeline, the caches, the memory controller, and memory arbitration on a multicore processor. This paper presents a solution for time-predictable memory...... arbitration and access for chip-multiprocessors. The memory network-on-chip is organized as a tree with time-division multiplexing (TDM) of accesses to the shared memory. The TDM based arbitration completely decouples processor cores and allows WCET analysis of the memory accesses on individual cores without...

  6. Designing network on-chip architectures in the nanoscale era

    CERN Document Server

    Flich, Jose

    2010-01-01

    Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues.Exploring the design process of the network, the first part of the book focuses on basic aspects of switch architecture and design, topology selection, and routing implementation. In the second part, contributors discuss their experiences in the industry, offering a roadmap to recent p

  7. New circuit switching techniques in on-chip networks

    OpenAIRE

    Shaoteng, Liu

    2015-01-01

    Network on Chip (NoC) is proposed as a promising technology to address the communication challenges in deep sub-micron era. NoC brings network-based communication into the on-chip environment and tackles the problems like long wire complexities, bandwidth scaling and so on. After more than a decade's evolution and development, there are many NoC architectures and solutions available. Nevertheless, NoCs can be classi_ed into two categories: packet switched NoC and circuit switched NoC. In this...

  8. Freestanding optical fibers fabricated in a glass chip using femtosecond laser micromachining for lab-on-a-chip application.

    Science.gov (United States)

    Cheng, Ya; Sugioka, Koji; Midorikawa, Katsumi

    2005-09-01

    We describe the fabrication of freestanding optical fibers in a glass chip by femtosecond laser three-dimensional (3D) micro-machining. The process has mainly four steps: (1) femtosecond laser scanning of the areas surrounding the fibers; (2) postan-nealing of the sample for the modification of the exposed areas; (3) chemical etching of the sample for the selective removal of the modified areas; and (4) second postannealing for smoothening the surfaces of the fibers. The measured optical loss of the fibers is approximately 0.7dB/cm. Integrating the freestanding fibers with 3D micromirrors is also demonstrated, enabling functions such as light folding or splitting in the glass chips. Furthermore, we demonstrate that the freestanding fibers can be incorporated into a microfluidic circuit for on-chip biophotonic applications. PMID:19498745

  9. Design of Networks-on-Chip for Real-Time Multi-Processor Systems-on-Chip

    DEFF Research Database (Denmark)

    Sparsø, Jens

    2012-01-01

    This paper addresses the design of networks-on-chips for use in multi-processor systems-on-chips - the hardware platforms used in embedded systems. These platforms typically have to guarantee real-time properties, and as the network is a shared resource, it has to provide service guarantees...... Commissions seventh framework programme. The aim of this project is to develop a general-purpose multi-core platform for real-time systems as well as tools supporting its use (compiler, simulator, and worst-case execution time analysis tool)....

  10. FISH & CHIPS: Single Chip Silicon MEMS CTDL Salinity, Temperature, Pressure and Light sensor for use in fisheries research

    DEFF Research Database (Denmark)

    Hyldgård, Anders; Hansen, Ole; Thomsen, Erik Vilain

    2005-01-01

    A single-chip silicon MEMS CTDL multi sensor for use in aqueous environments is presented. The new sensor chip consists of a conductivity sensor based on platinum electrodes (C), an ion-implanted thermistor temperature sensor (T), a piezoresistive pressure sensor (D for depth/pressure) and an ion......-implanted p-n junction light sensor (L). The design and fabrication process is described. A temperature sensitivity of 0.8 × 10-3K-1 has been measured and detailed analysis of conductivity measurement data shows a cell constant of 81 cm-1....

  11. Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network

    OpenAIRE

    Xin Wang; Jari Nurmi

    2007-01-01

    Two network-on-chip (NoC) designs are examined and compared in this paper. One design applies a bidirectional ring connection scheme, while the other design applies a code-division multiple-access (CDMA) connection scheme. Both of the designs apply globally asynchronous locally synchronous (GALS) scheme in order to deal with the issue of transferring data in a multiple-clock-domain environment of an on-chip system. The two NoC designs are compared with each other by their network structures, ...

  12. Recycling of AlMgSi1 aluminium chips by cold compression

    OpenAIRE

    T. Pepelnjak; K. Kuzman; Kačmarčik, I.; Plančak, M.

    2012-01-01

    Current work elaborates possibilities for direct conversion of AlMgSi1 aluminium chips into solid billets by solid state recycling. Milling chips from an aluminium alloy were cold compressed in a closed cylindrical die by means of a 2,5 MN hydraulic press. Due to low initial relative density of the chips, several pre-compressions were needed. In order to establish the infl uence of chip geometry on the final density of billets different types of chips were cut by using various milling regimes...

  13. MM98.19 An automatic system for elaboration of chip breaking diagrams

    DEFF Research Database (Denmark)

    Andreasen, Jan Lasson; Chiffre, Leonardo De

    1998-01-01

    A laboratory system for fully automatic elaboration of chip breaking diagrams has been developed and tested. The system is based on automatic chip breaking detection by frequency analysis of cutting forces in connection with programming of a CNC-lathe to scan different feeds, speeds and cutting...... depths. An evaluation of the system based on a total of 1671 experiments has shown that unfavourable snarled chips can be detected with 98% certainty which indeed makes the system a valuable tool in chip breakability tests. Using the system, chip breaking diagrams can be elaborated with a previously...

  14. Efficient On-Chip Pipelined Streaming Computations on Scalable Manycore Architectures

    OpenAIRE

    Melot, Nicolas; Kessler, Christoph; Keller, Jörg

    2012-01-01

    Performance of manycore processors is limited by programs' use of off-chip main memory. Streaming computation organized in a pipeline limits accesses to main memory to tasks at boundaries of the pipeline to read or write to main memory. The Single Chip Cloud computer (SCC) offers 48 cores linked by a high-speed on-chip network, and allows the implementation of such on-chip pipelined technique. We assess the performance and constraints provided by the SCC and investigate on on-chip pipelined m...

  15. Sea otter dental enamel is highly resistant to chipping due to its microstructure.

    Science.gov (United States)

    Ziscovici, Charles; Lucas, Peter W; Constantino, Paul J; Bromage, Timothy G; van Casteren, Adam

    2014-10-01

    Dental enamel is prone to damage by chipping with large hard objects at forces that depend on chip size and enamel toughness. Experiments on modern human teeth have suggested that some ante-mortem chips on fossil hominin enamel were produced by bite forces near physiological maxima. Here, we show that equivalent chips in sea otter enamel require even higher forces than human enamel. Increased fracture resistance correlates with more intense enamel prism decussation, often seen also in some fossil hominins. It is possible therefore that enamel chips in such hominins may have formed at even greater forces than currently envisaged. PMID:25319817

  16. Experiment list: SRX211427 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available 8.9,121 GSM1054748: untagged 4hrs DMSO RapExpt ChIP; Saccharomyces cerevisiae; ChIP-Seq source_name=S. cerev...isiae untagged strain || yeast strain=BY4741 || treatment=DMSO || hours treatment=4 || antibody=anti-Myc (9E

  17. On-chip microsystems in silicon: opportunities and limitations

    Science.gov (United States)

    Wolffenbuttel, R. F.

    1996-03-01

    Integrated on-chip micro-instrumentation systems in silicon are complete data acquisition systems on a single chip. This concept has appeared to be the ultimate solution in many applications, as it enables in principle the metamorphosis of a basic sensing element, affected with many shortcomings, into an on-chip data acquisition unit that provides an output digital data stream in a standard format not corrupted by sensor non-idealities. Market acceptance would be maximum, as no special knowledge about the internal operation is required, self-test and self-calibration can be included and the dimensions are not different from those of the integrated circuit. The various aspects that are relevant in estimating the constraints for successful implementation of the integrated silicon smart sensor will be outlined in comparison with the properties of more conventional sensor fabrication technologies. It will be shown that the acceptance of on-chip functional integration in an application depends primarily on the added value in terms of improved specification or functionality that the resulting device provides in that application. The economic viability is therefore decisive rather than the technological constraints. This is in contrast to the traditional technology push prevailing in sensor research over market pull mechanisms.

  18. Laser Direct Writing of Thick Hybrid Polymers for Microfluidic Chips

    Directory of Open Access Journals (Sweden)

    Akanksha Singh

    2014-07-01

    Full Text Available This work presents patterning of thick (10–50 µm hybrid polymer structures of ORMOCER® by laser direct writing. ORMOCER® combine polymer-like fabrication processes with glass-like surface chemistry that is beneficial for many bio-microfluidic applications. ORMOCER® is liquid before exposure, so patterning is done by contact-free lithography, such as proximity exposure. With laser direct writing, we obtained higher resolution patterns, with smaller radius of curvature (~2–4 µm, compared to proximity exposure (~10–20 µm. Process parameters were studied to find the optimal dose for different exposure conditions and ORMOCER® layer thicknesses. Two fluidic devices were successfully fabricated: a directional wetting device (fluidic diode and an electrophoresis chip. The fluidic diode chip operation depends on the sharp corner geometry and water contact angle, and both have been successfully tailored to obtain diodicity. Electrophoresis chips were used to separate of two fluorescent dyes, rhodamine 123 and fluorescein. The electrophoresis chip also made use of ORMOCER® to ORMOCER® bonding.

  19. Experiment list: SRX968914 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available an Neural Progenitor Cell, inhibition of the PI3K and MAPK signaling pathways || chip antibody=H3K4me3 || ce...ll type=Neural Progenitor Cell || treatment=Inhibition of P53 and PI3K and MAPK signaling pathways

  20. Experiment list: SRX968912 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available d human Neural Progenitor Cell, P53 knockdown and inhibition of the PI3K and MAPK signaling pathways || chip... and PI3K and MAPK signaling pathways || cell line=iPSC derived http://dbarchive.biosciencedbc.jp/kyushu-u/h

  1. Experiment list: SRX968916 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available d human Neural Progenitor Cell, P53 knockdown and inhibition of the PI3K and MAPK signaling pathways || chip...n of PI3K and MAPK signaling pathways || cell line=iPSC derived http://dbarchive.biosciencedbc.jp/kyushu-u/h

  2. Fully integrated circuit chip of microelectronic neural bridge

    International Nuclear Information System (INIS)

    Nerve tracts interruption is one of the major reasons for dysfunction after spiral cord injury. The microelectronic neural bridge is a method to restore function of interrupted neural pathways, by making use of microelectronic chips to bypass the injured nerve tracts. A low-power fully integrated microelectronic neural bridge chip is designed, using CSMC 0.5-μm CMOS technology. The structure and the key points in the circuit design will be introduced in detail. In order to meet the requirement for implantation, the circuit was modified to avoid the use of off-chip components, and fully monolithic integration is achieved. The operating voltage of the circuit is ±2.5 V, and the chip area is 1.21 × 1.18 mm2. According to the characteristic of neural signal, the time-domain method is used in testing. The pass bandwidth of the microelectronic neural bridge system covers the whole frequency range of the neural signal, power consumption is 4.33 mW, and the gain is adjustable. The design goals are achieved. (semiconductor integrated circuits)

  3. Effect of Chipped Rubber Aggregates on Performance of Concrete

    Directory of Open Access Journals (Sweden)

    Sunil N. Shah

    2014-12-01

    Full Text Available Due to rapid growth in automobile industry, use of tyre increases day to day and there is no reuse of the same to decrease the environmental pollution. The decomposition and disposing of waste tyre rubber is harmful to environment. This research reflects the reuse of waste tyre rubber into concrete after observing their properties. In that experimental work chipped rubber aggregates replaced to the natural coarse aggregates by varying percentage of 3, 6, 9 and 12 with comparison of 0% replacement. Silica fume is replaced in 10% with cement for improving the bond properties between cement paste and rubber. In evaluation, test has been carried out to determine the properties of concrete such as workability, unit weight, flexural strength and split tensile strength. The workability of fresh concrete is observed with the help of compaction factor test. From the test of compaction factor, workability is decrease with increasing percentage of chipped rubber. The specific gravity of chipped rubber aggregates is lower as compared to natural aggregates therefore decrease the unit weight of rubber mix concrete. Increasing chipped rubber aggregates as partial replacement into concrete reduces compressive strength. So these can use in non-primary structural applications of medium to low strength requirements. The overall results of study show that it is possible to use recycled rubber tyre aggregates in concrete construction as partial replacement to natural coarse aggregates.

  4. Experiment list: SRX1084161 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available tissue=whole animal || gender=female || age=1-3 days || genotype=k6801/k6801;gHA-KDM5 || chip antibody=HA ht...,0 GSM1811343: P1 HA ChIPSeq; Drosophila melanogaster; ChIP-Seq source_name=Female whole animal_paraquat ||

  5. Experiment list: SRX998287 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e=90 || Cause of death=Sepsis || postmortem delay=15.3 hrs || experiment type=ChIP-Seq || chip antibody=H3K2...an female thalamic nuclei tissue || tissue=Thalamic nuclei || gender=female || ag

  6. Experiment list: SRX608343 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =Normal 32560212,73.5,12.2,841 GSM1414502: HEK293T Control-1 ChIP-seq; Homo sapiens; ChIP-Seq source_name=HEK293...T_none (control) || cell line=HEK293T || transfected with=none (control) || chip antibody=GFP antibody h

  7. Experiment list: SRX608345 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =Normal 28947886,75.3,8.3,922 GSM1414504: HEK293T emx1-1 ChIP-seq; Homo sapiens; ChIP-Seq source_name=HEK293...T_emx1 sgRNA || cell line=HEK293T || transfected with=emx1 sgRNA || chip antibody=GFP antibody http://dbarch

  8. Experiment list: SRX608346 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =Normal 17902274,81.8,7.7,379 GSM1414505: HEK293T emx1-2 ChIP-seq; Homo sapiens; ChIP-Seq source_name=HEK293...T_emx1 sgRNA || cell line=HEK293T || transfected with=emx1 sgRNA || chip antibody=GFP antibody http://dbarch

  9. Experiment list: SRX608344 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =Normal 21107098,69.6,5.5,460 GSM1414503: HEK293T Control-2 ChIP-seq; Homo sapiens; ChIP-Seq source_name=HEK293...T_none (control) || cell line=HEK293T || transfected with=none (control) || chip antibody=GFP antibody ht

  10. Experiment list: SRX170378 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Diagnosis=Normal 47076220,74.6,6.3,571 GSM971951: HEK293 control ChIPSeq; Homo sapiens; ChIP-Seq source_name=HEK293..., control || cell line=HEK293 || chip antibody=none http://dbarchive.biosciencedbc.jp/kyushu-u/hg19/e

  11. Experiment list: SRX1131949 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Pre-PB || cell sorting strategy=CD138–GFP+CD22- FACS-sorted || chip antibody=H3K2.../6 || genotype/background=Blimp1(GFP/+) || cell preparation=4-day LPS stimulation, FACS sorted || cell type=

  12. Experiment list: SRX1131942 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ategy=CD138+ MACS sorted || chip antibody=Irf4 Ab, Santa...d=C57BL/6 || genotype/background=Wild-type || cell preparation=4-day LPS stimulation, MACS sorted || cell type=PB || cell sorting str

  13. Experiment list: SRX620738 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available mal 74603351,96.3,9.8,163459 GSM1418961: H3K4me1 ChIP (DMSO); Homo sapiens; ChIP-Seq source_name=IMR90 fetal... lung fibroblasts || cell line=IMR90 || treatment=DMSO (6hrs) || passages=30-35 || antibody=H3K4me1 (Abcam)

  14. Experiment list: SRX038734 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available of Extraction=Pleura|Tissue Diagnosis=Adenocarcinoma 10317128,81.8,10.6,2041 GSM588563: FAIRE sequencing in non-treated (DMSO...ype=breast cancer cells || agent=DMSO || chip antibody=none http://dbarchive.bios

  15. Experiment list: SRX692062 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available SRX692062 mm9 Histone H3K79me2 Blood MLL-AF9 leukemic cell NA 41253275,96.1,7.9,5660 GSM1495602: shLUC-DMSO...line=MLL-AF9 transformed leukemic cells || treatment=shLUC RNA interference || agent=DMSO || time=6d || chip

  16. Experiment list: SRX620290 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ssue Diagnosis=Normal 54491791,97.7,78.5,22965 GSM1418776: H3K27Ac starved DMSO; Mus musculus; ChIP-Seq sour...ce_name=NIH3T3 fibroblasts || culture condition=serum starved || chemicals=DMSO || chip antibody=H3K27Ac ( a

  17. Experiment list: SRX620736 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available mal 129367844,99.0,48.1,39179 GSM1418959: H3K4me3 ChIP (DMSO); Homo sapiens; ChIP-Seq source_name=IMR90 feta...l lung fibroblasts || cell line=IMR90 || treatment=DMSO (6hrs) || passages=30-35 || antibody=H3K4me3 (Abcam)

  18. Experiment list: SRX330321 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ype=Fibroblast 11854476,67.5,46.0,4657 GSM1199134: C/EBPα ChIP-seq, 3T3-L1 Day7 1h DMSO; Mus musculus; ChIP-...; Santa Cruz) || treatment=0.1% DMSO (Vehicle) for 1 hour http://dbarchive.biosci

  19. Experiment list: SRX005631 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available SRX005631 ce10 TFs and others daf-16 Adult Young adult NA 3482818,50.5,13.1,4578 ch...ip antibody=anti-GFP to DAF-16 || growth stage=L4/Young adult || strain=TJ356 http://dbarchive.biosciencedbc

  20. Experiment list: SRX005635 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available SRX005635 ce10 RNA polymerase RNA polymerase II Adult Young adult NA 1958846,46.8,1...0.6,556 chip antibody=POL II || growth stage=L4/Young adult || strain=TJ356 http://dbarchive.biosciencedbc.j