WorldWideScience

Sample records for chip scale package

  1. Fabrication method for chip-scale-vacuum-packages based on a chip-to-wafer-process

    Science.gov (United States)

    Bauer, J.; Weiler, D.; Ruß, M.; Heß, J.; Yang, P.; Voß, J.; Arnold, N.,; Vogt, H.

    2010-10-01

    This paper introduces a simple vacuum packaging method which is based on a Chip-to-Wafer process. The MEMS-device is provided with an electroplated solder frame. A Si-lid with the same solder frame is mounted on each die of the wafer using a flip chip process. The same materials for lid and substrate are used in order to reduce the mechanical stress due to the same thermal coefficients of expansion. The resulting cavity between die and lid can be evacuated and hermetically sealed with an eutectic soldering process. The feasibility of the method is demonstrated with an infrared focal plane array (IR-FPA). In this case, the Si-lid acts as an optical window and contains an anti reflective layer for the 8-14 μm wavelength area on both sides. The long-term vacuum stability is supported by a getter film inside the package. This method simplifies the sawing process and has the additional cost benefit that it is possible to package only known good dies.

  2. Advanced flip chip packaging

    CERN Document Server

    Lai, Yi-Shao; Wong, CP

    2013-01-01

    Advanced Flip Chip Packaging presents past, present and future advances and trends in areas such as substrate technology, material development, and assembly processes. Flip chip packaging is now in widespread use in computing, communications, consumer and automotive electronics, and the demand for flip chip technology is continuing to grow in order to meet the need for products that offer better performance, are smaller, and are environmentally sustainable. This book also: Offers broad-ranging chapters with a focus on IC-package-system integration Provides viewpoints from leading industry executives and experts Details state-of-the-art achievements in process technologies and scientific research Presents a clear development history and touches on trends in the industry while also discussing up-to-date technology information Advanced Flip Chip Packaging is an ideal book for engineers, researchers, and graduate students interested in the field of flip chip packaging.

  3. Reliability and Characteristics of Wafer-Level Chip-Scale Packages under Current Stress

    Science.gov (United States)

    Chen, Po-Ying; Kung, Heng-Yu; Lai, Yi-Shao; Hsiung Tsai, Ming; Yeh, Wen-Kuan

    2008-02-01

    In this work, we present a novel approach and method for elucidating the characteristics of wafer-level chip-scale packages (WLCSPs) for electromigration (EM) tests. The die in WLCSP was directly attached to the substrate via a soldered interconnect. The shrinking of the area of the die that is available for power, and the solder bump also shrinks the volume and increases the density of electrons for interconnect efficiency. The bump current density now approaches to 106 A/cm2, at which point the EM becomes a significant reliability issue. As known, the EM failure depends on numerous factors, including the working temperature and the under bump metallization (UBM) thickness. A new interconnection geometry is adopted extensively with moderate success in overcoming larger mismatches between the displacements of components during current and temperature changes. Both environments and testing parameters for WLCSP are increasingly demanded. Although failure mechanisms are considered to have been eliminated or at least made manageable, new package technologies are again challenging its process, integrity and reliability. WLCSP technology was developed to eliminate the need for encapsulation to ensure compatibility with smart-mount technology (SMT). The package has good handing properties but is now facing serious reliability problems. In this work, we investigated the reliability of a WLCSP subjected to different accelerated current stressing conditions at a fixed ambient temperature of 125 °C. A very strong correlation exists between the mean time to failure (MTTF) of the WLCSP test vehicle and the mean current density that is carried by a solder joint. A series of current densities were applied to the WLCSP architecture; Black's power law was employed in a failure mode simulation. Additionally, scanning electron microscopy (SEM) was adopted to determine the differences existing between high- and low-current-density failure modes.

  4. Self-adaptive phosphor coating technology for wafer-level scale chip packaging

    Institute of Scientific and Technical Information of China (English)

    Zhou Linsong; Rao Haibo; Wang Wei; Wan Xianlong; Liao Junyuan; Wang Xuemei; Zhou Da

    2013-01-01

    A new self-adaptive phosphor coating technology has been successfully developed,which adopted a slurry method combined with a self-exposure process.A phosphor suspension in the water-soluble photoresist was applied and exposed to LED blue light itself and developed to form a conformal phosphor coating with selfadaptability to the angular distribution of intensity of blue light and better-performing spatial color uniformity.The self-adaptive phosphor coating technology had been successfully adopted in the wafer surface to realize a waferlevel scale phosphor conformal coating.The first-stage experiments show satisfying results and give an adequate demonstration of the flexibility of self-adaptive coating technology on application of WLSCP.

  5. Packaging commercial CMOS chips for lab on a chip integration.

    Science.gov (United States)

    Datta-Chaudhuri, Timir; Abshire, Pamela; Smela, Elisabeth

    2014-05-21

    Combining integrated circuitry with microfluidics enables lab-on-a-chip (LOC) devices to perform sensing, freeing them from benchtop equipment. However, this integration is challenging with small chips, as is briefly reviewed with reference to key metrics for package comparison. In this paper we present a simple packaging method for including mm-sized, foundry-fabricated dies containing complementary metal oxide semiconductor (CMOS) circuits within LOCs. The chip is embedded in an epoxy handle wafer to yield a level, large-area surface, allowing subsequent photolithographic post-processing and microfluidic integration. Electrical connection off-chip is provided by thin film metal traces passivated with parylene-C. The parylene is patterned to selectively expose the active sensing area of the chip, allowing direct interaction with a fluidic environment. The method accommodates any die size and automatically levels the die and handle wafer surfaces. Functionality was demonstrated by packaging two different types of CMOS sensor ICs, a bioamplifier chip with an array of surface electrodes connected to internal amplifiers for recording extracellular electrical signals and a capacitance sensor chip for monitoring cell adhesion and viability. Cells were cultured on the surface of both types of chips, and data were acquired using a PC. Long term culture (weeks) showed the packaging materials to be biocompatible. Package lifetime was demonstrated by exposure to fluids over a longer duration (months), and the package was robust enough to allow repeated sterilization and re-use. The ease of fabrication and good performance of this packaging method should allow wide adoption, thereby spurring advances in miniaturized sensing systems.

  6. The extended Beer-Lambert theory for ray tracing modeling of LED chip-scaled packaging application with multiple luminescence materials

    Science.gov (United States)

    Yuan, Cadmus C. A.

    2015-12-01

    Optical ray tracing modeling applied Beer-Lambert method in the single luminescence material system to model the white light pattern from blue LED light source. This paper extends such algorithm to a mixed multiple luminescence material system by introducing the equivalent excitation and emission spectrum of individual luminescence materials. The quantum efficiency numbers of individual material and self-absorption of the multiple luminescence material system are considered as well. By this combination, researchers are able to model the luminescence characteristics of LED chip-scaled packaging (CSP), which provides simple process steps and the freedom of the luminescence material geometrical dimension. The method will be first validated by the experimental results. Afterward, a further parametric investigation has been then conducted.

  7. IC chip stress during plastic package molding

    Energy Technology Data Exchange (ETDEWEB)

    Palmer, D.W.; Benson, D.A.; Peterson, D.W.; Sweet, J.N.

    1998-02-01

    Approximately 95% of the world`s integrated chips are packaged using a hot, high pressure transfer molding process. The stress created by the flow of silica powder loaded epoxy can displace the fine bonding wires and can even distort the metalization patterns under the protective chip passivation layer. In this study the authors developed a technique to measure the mechanical stress over the surface of an integrated circuit during the molding process. A CMOS test chip with 25 diffused resistor stress sensors was applied to a commercial lead frame. Both compression and shear stresses were measured at all 25 locations on the surface of the chip every 50 milliseconds during molding. These measurements have a fine time and stress resolution which should allow comparison with computer simulation of the molding process, thus allowing optimization of both the manufacturing process and mold geometry.

  8. Reliability evaluation of CIF (chip-in-flex) and COF (chip-on-flex) packages

    Science.gov (United States)

    Jang, Jae-Won; Suk, Kyoung-Lim; Paik, Kyung-Wook; Lee, Soon-Bok

    2010-03-01

    CIF (chip-in-flex) and COF (chip-on-flex) packages have the advantages of fine pitch capability, and flexibility. Anisotropic conductive films (ACFs) are used for the interconnection between chip and substrate. Display, mobile device, and semiconductor industry require for smaller and more integrated packages. Both CIF and COF packages are an alternative for the demands. However, there are some reliability problems of interconnection between the chip and substrate because the packages are subjected to various loading conditions. These may degrade the functionality of the packages. Therefore, reliability assessment of both packages is necessary. In this study, experimental tests were performed to evaluate the reliability of interconnection between the chip and substrate of CIF and COF packages. Thermal cycling tests were performed to evaluate the resistance against thermal fatigue. The shape and warpage of the chip of CIF and COF packages were observed using optical methods (e.g., shadow Moiré and Twyman/Green interferometry). These optical Moiré techniques are widely used for measuring small deformations in microelectronic packages. The stress distribution around the chip was evaluated through FEA (finite element analysis). In addition, we suggested modifying design parameter of CIF packages for the reliability enhancement.

  9. 75 FR 447 - In the Matter of Certain Semiconductor Chips With Minimized Chip Package Size and Products...

    Science.gov (United States)

    2010-01-05

    ... Certain Semiconductor Chips With Minimized Chip Package Size and Products Containing Same (III); Notice of... States after importation of certain semiconductor chips with minimized chip package size or products... Semiconductor Corporation of Hsinchu, Taiwan; ProMOS Technologies, Inc. of Hsinchu, Taiwan; Ramaxel...

  10. Chip-size-packaged silicon microphones [for hearing instruments

    DEFF Research Database (Denmark)

    Müllenborn, Matthias; Rombach, Pirmin; Klein, Udo;

    2001-01-01

    The first results of silicon microphones that are completely batch-packaged and integrated with signal conditioning circuitry in a chip stack are discussed. The chip stack is designed to be directly mounted into a system, such as a hearing instrument, without further single-chip handling or wire ...... consumption of about 50 μW in the near future, thereby living up to the tight specifications of microphones for hearing instruments. Other potential applications include mobile phones, headsets, and wearable computers, in which space is constrained....

  11. Dry-film polymer waveguide for silicon photonics chip packaging.

    Science.gov (United States)

    Hsu, Hsiang-Han; Nakagawa, Shigeru

    2014-09-22

    Polymer waveguide made by dry film process is demonstrated for silicon photonics chip packaging. With 8 μm × 11.5 μm core waveguide, little penalty is observed up to 25 Gbps before or after the light propagate through a 10-km long single-mode fiber (SMF). Coupling loss to SMF is 0.24 dB and 1.31 dB at the polymer waveguide input and output ends, respectively. Alignment tolerance for 0.5 dB loss increase is +/- 1.0 μm along both vertical and horizontal directions for the coupling from the polymer waveguide to SMF. The dry-film polymer waveguide demonstrates promising performance for silicon photonics chip packaging used in next generation optical multi-chip module.

  12. Fully additive chip packaging: science or fiction?

    NARCIS (Netherlands)

    Oosterhuis, G.; Zon, C.M.B. van der; Maalderink, H.H.

    2011-01-01

    The current trend in IC packaging towards an ever increasing degree of integration, combined with a high level of production flexibility calls for novel approaches in manufacturing. To address these challenges in a flexible manufacturing setting, TNO investigated to what extend mask-less additive ma

  13. Identifying Professional Competencies of the Flip-Chip Packaging Engineer in Taiwan

    Science.gov (United States)

    Guu, Y. H.; Lin, Kuen-Yi; Lee, Lung-Sheng

    2014-01-01

    This study employed a literature review, expert interviews, and a questionnaire survey to construct a set of two-tier competencies for a flip-chip packaging engineer. The fuzzy Delphi questionnaire was sent to 12 flip-chip engineering experts to identify professional competencies that a flip-chip packaging engineer must have. Four competencies,…

  14. Laser applications in advanced chip packaging

    Science.gov (United States)

    Müller, Dirk; Held, Andrew; Pätzel, Rainer; Clark, Dave; van Nunen, Joris

    2016-03-01

    While applications such as drilling μ-vias and laser direct imaging have been well established in the electronics industry, the mobile device industry's push for miniaturization is generating new demands for packaging technologies that allow for further reduction in feature size while reducing manufacturing cost. CO lasers have recently become available and their shorter wavelength allows for a smaller focus and drilling hole diameters down to 25μm whilst keeping the cost similar to CO2 lasers. Similarly, nanosecond UV lasers have gained significantly in power, become more reliable and lower in cost. On a separate front, the cost of ownership reduction for Excimer lasers has made this class of lasers attractive for structuring redistribution layers of IC substrates with feature sizes down to 2μm. Improvements in reliability and lower up-front cost for picosecond lasers is enabling applications that previously were only cost effective with mechanical means or long-pulsed lasers. We can now span the gamut from 100μm to 2μm for via drilling and can cost effectively structure redistribution layers with lasers instead of UV lamps or singulate packages with picosecond lasers.

  15. The Numerical Analysis of Strain Behavior at Solder Joint and Interface of Flip Chip Package

    Institute of Scientific and Technical Information of China (English)

    S; C; Chen; Y; C; Lin

    2002-01-01

    The flip chip package is a kind of advanced electri ca l packages. Due to the requirement of miniaturization, lower weight, higher dens ity and higher performance in the advanced electric package, it is expected that flip chip package will soon be a mainstream technology. The silicon chip is dir ectly connected to printing circuit substrate by SnPb solder joints. Also, the u nderfill, a composite of polymer and silica particles, is filled in the gap betw een the chip and substrate around the solder joint...

  16. Fechnerian Scaling in R: The Package fechner

    Directory of Open Access Journals (Sweden)

    Ehtibar N. Dzhafarov

    2009-08-01

    Full Text Available Fechnerian scaling is a procedure for constructing a metric on a set of objects (e.g., colors, symbols, X-ray films, or even statistical models to represent dissimilarities among the objects "from the point of view" of a system (e.g., person, technical device, or even computational algorithm "perceiving" these objects. This metric, called Fechnerian, is computed from a data matrix of pairwise discrimination probabilities or any other pairwise measure which can be interpreted as the degree with which two objects within the set are discriminated from each other. This paper presents the package fechner for performing Fechnerian scaling of object sets in R. We describe the functions of the package. Fechnerian scaling then is demonstrated on real and artificial data sets accompanying the package.

  17. Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

    OpenAIRE

    Bowei Zhang; Quan Dong; Korman, Can E.; Zhenyu Li; Zaghloul, Mona E.

    2013-01-01

    A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstratio...

  18. Chip-package nano-structured copper and nickel interconnections with metallic and polymeric bonding interfaces

    Science.gov (United States)

    Aggarwal, Ankur

    With the semiconductor industry racing toward a historic transition, nano chips with less than 45 nm features demand I/Os in excess of 20,000 that support computing speed in terabits per second, with multi-core processors aggregately providing highest bandwidth at lowest power. On the other hand, emerging mixed signal systems are driving the need for 3D packaging with embedded active components and ultra-short interconnections. Decreasing I/O pitch together with low cost, high electrical performance and high reliability are the key technological challenges identified by the 2005 International Technology Roadmap for Semiconductors (ITRS). Being able to provide several fold increase in the chip-to-package vertical interconnect density is essential for garnering the true benefits of nanotechnology that will utilize nano-scale devices. Electrical interconnections are multi-functional materials that must also be able to withstand complex, sustained and cyclic thermo-mechanical loads. In addition, the materials must be environmentally-friendly, corrosion resistant, thermally stable over a long time, and resistant to electro-migration. A major challenge is also to develop economic processes that can be integrated into back end of the wafer foundry, i.e. with wafer level packaging. Device-to-system board interconnections are typically accomplished today with either wire bonding or solders. Both of these are incremental and run into either electrical or mechanical barriers as they are extended to higher density of interconnections. Downscaling traditional solder bump interconnect will not satisfy the thermo-mechanical reliability requirements at very fine pitches of the order of 30 microns and less. Alternate interconnection approaches such as compliant interconnects typically require lengthy connections and are therefore limited in terms of electrical properties, although expected to meet the mechanical requirements. A novel chip-package interconnection technology is

  19. Flexible packaging of solid-state integrated circuit chips with elastomeric microfluidics

    Science.gov (United States)

    Zhang, Bowei; Dong, Quan; Korman, Can E.; Li, Zhenyu; Zaghloul, Mona E.

    2013-01-01

    A flexible technology is proposed to integrate smart electronics and microfluidics all embedded in an elastomer package. The microfluidic channels are used to deliver both liquid samples and liquid metals to the integrated circuits (ICs). The liquid metals are used to realize electrical interconnects to the IC chip. This avoids the traditional IC packaging challenges, such as wire-bonding and flip-chip bonding, which are not compatible with current microfluidic technologies. As a demonstration we integrated a CMOS magnetic sensor chip and associate microfluidic channels on a polydimethylsiloxane (PDMS) substrate that allows precise delivery of small liquid samples to the sensor. Furthermore, the packaged system is fully functional under bending curvature radius of one centimetre and uniaxial strain of 15%. The flexible integration of solid-state ICs with microfluidics enables compact flexible electronic and lab-on-a-chip systems, which hold great potential for wearable health monitoring, point-of-care diagnostics and environmental sensing among many other applications.

  20. New IC package, assembly technique by means of a "blind" alignment "flip-chip" method and assembling facilities

    Institute of Scientific and Technical Information of China (English)

    Vladimir V. Novikov

    2004-01-01

    @@ In spite of a long period of the development ofmicroelectronic components base, the problem of the creation of IC package design, providing minimal area losses in contrast with area of a chip, remains unsolved [1]Area losses can be described by the parameter P,which is equal to the ratio between the package area in plan and the chip area:

  1. Low temperature co-fired ceramic packaging of CMOS capacitive sensor chip towards cell viability monitoring

    Directory of Open Access Journals (Sweden)

    Niina Halonen

    2016-11-01

    Full Text Available Cell viability monitoring is an important part of biosafety evaluation for the detection of toxic effects on cells caused by nanomaterials, preferably by label-free, noninvasive, fast, and cost effective methods. These requirements can be met by monitoring cell viability with a capacitance-sensing integrated circuit (IC microchip. The capacitance provides a measurement of the surface attachment of adherent cells as an indication of their health status. However, the moist, warm, and corrosive biological environment requires reliable packaging of the sensor chip. In this work, a second generation of low temperature co-fired ceramic (LTCC technology was combined with flip-chip bonding to provide a durable package compatible with cell culture. The LTCC-packaged sensor chip was integrated with a printed circuit board, data acquisition device, and measurement-controlling software. The packaged sensor chip functioned well in the presence of cell medium and cells, with output voltages depending on the medium above the capacitors. Moreover, the manufacturing of microfluidic channels in the LTCC package was demonstrated.

  2. A two-dimensional simulation model for the molded underfill process in flip chip packaging

    Energy Technology Data Exchange (ETDEWEB)

    Guo, Xue Ru; Young, Wen Bin [National Cheng Kung University, Tainan (China)

    2015-07-15

    The flip chip process involves the deposition of solder bumps on the chip surface and their subsequent direct attachment and connection to a substrate. Underfilling traditional flip chip packaging is typically performed following a two-step approach. The first step uses capillary force to fill the gap between the chip and the substrate, and the second step uses epoxy molding compound (EMC) to overmold the package. Unlike traditional flip chip packaging, the molded underfill (MUF) concept uses a single-step approach to simultaneously achieve both underfill and overmold. MUF is a simpler and faster process. In this study, a 2D numerical model is developed to simulate the front movement of EMC flow and the void formation for different geometric parameters. The 2D model simplifies the procedures of geometric modeling and reduces the modeling time for the MUF simulation. Experiments are conducted to verify the prediction results of the model. The effect on void formation for different geometric parameters is investigated using a 2D model.

  3. A novel approach on fluid dispensing for a DNA/RNA extraction chip package

    Science.gov (United States)

    Xie, Ling; Premachandran, C. S.; Chew, Michelle; Yao, Qiang; Xu, Diao; Pinjala, D.

    2008-02-01

    Micro fluidic package with integrated reservoirs has been developed for DNA /RNA extraction application. A membrane based pump which consists of a reservoir to store reagents and a pin valve to control the fluid is developed to dispense the reagents into the chip. A programmable external actuator is fabricated to dispense the fluid from the membrane pump into the DNA chip. An elastic and high elongation thin rubber membrane is used to seal the membrane pump and at the same time prevent actuator from mixing with different reagents in the micro fluidic package. Break displacement during actuation of membrane pump sealing material is studied with different ratios of PDMS and other types of rubber materials. The fluid flow from the reservoir to the chip is controlled by a pin valve which is activated during the external actuation. A CFD simulation is performed to study the pumping action dusting the external actuation and is validated with experimental results.

  4. Method of Images for the Fast Calculation of Temperature Distributions in Packaged VLSI Chips

    CERN Document Server

    Hériz, Virginia Martín; Kemper, T; Kang, S -M; Shakouri, A

    2008-01-01

    Thermal aware routing and placement algorithms are important in industry. Currently, there are reasonably fast Green's function based algorithms that calculate the temperature distribution in a chip made from a stack of different materials. However, the layers are all assumed to have the same size, thus neglecting the important fact that the thermal mounts which are placed underneath the chip can be significantly larger than the chip itself. In an earlier publication, we showed that the image blurring technique can be used to calculate quickly temperature distribution in realistic packages. For this method to be effective, temperature distribution for several point heat sources at the center and at the corner and edges of the chip should be calculated using finite element analysis (FEA) or measured. In addition, more accurate results require correction by a weighting function that will need several FEA simulations. In this paper, we introduce the method of images that take the symmetry of the thermal boundary...

  5. Application of Underfill for Flip-Chip Package Using Ultrasonic Bonding

    Science.gov (United States)

    Noh, Bo-In; Koo, Ja-Myeong; Jo, Jung-Lae; Jung, Seung-Boo

    2008-05-01

    In this study, the reliability of flip-chip (FC) packages with various underfills using ultrasonic bonding was evaluated in temperature and humidity (TH) tests. Fatigue cracks began at the interface between the Au bumps and glass substrate and then propagated through the interface with increasing dwell time in the TH test. The initial electrical resistance of Au bumps with lower viscosity underfill was lower than that of Au bumps with higher viscosity underfill. Entrapped underfill between the Au bumps and glass substrate or void formation between the Au bumps in FC packages was caused by high viscosity of the underfill. As the dwell time of the TH test increased, the electrical resistance of the FC packages increased. The fatigue life of an FC package with underfill that has a higher glass transition temperature (Tg) and lower coefficient of thermal expansion (CTE) value was higher than that of an FC package with underfill with lower Tg and a higher CTE value. Therefore, the properties of underfill affect the fatigue life of FC packages with underfill using ultrasonic bonding.

  6. Microelectronic packaging

    CERN Document Server

    Datta, M; Schultze, J Walter

    2004-01-01

    Microelectronic Packaging analyzes the massive impact of electrochemical technologies on various levels of microelectronic packaging. Traditionally, interconnections within a chip were considered outside the realm of packaging technologies, but this book emphasizes the importance of chip wiring as a key aspect of microelectronic packaging, and focuses on electrochemical processing as an enabler of advanced chip metallization.Divided into five parts, the book begins by outlining the basics of electrochemical processing, defining the microelectronic packaging hierarchy, and emphasizing the impac

  7. Insight into economies of scale for waste packaging sorting plants

    DEFF Research Database (Denmark)

    Cimpan, Ciprian; Wenzel, Henrik; Maul, Anja

    2015-01-01

    This contribution presents the results of a techno-economic analysis performed for German Materials Recovery Facilities (MRFs) which sort commingled lightweight packaging waste (consisting of plastics, metals, beverage cartons and other composite packaging). The study addressed the importance...... of economies of scale and discussed complementary relations occurring between capacity size, technology level and operational practice. Processing costs (capital and operational expenditure) per unit waste input were found to decrease from above 100 € for small plants with a basic technology level to 60...

  8. Compact Shorted Stacked-Patch Antenna Integrated with Chip-Package Based on LTCC Technology

    Directory of Open Access Journals (Sweden)

    Yongjiu Li

    2014-01-01

    Full Text Available A low profile chip-package stacked-patch antenna is proposed by using low temperature cofired ceramic (LTCC technology. The proposed antenna employs a stacked-patch to achieve two operating frequency bands and enhance the bandwidth. The height of the antenna is decreased to 4.09 mm (about λ/25 at 2.45 GHz due to the shorted pin. The package is mounted on a 44 × 44 mm2 ground plane to miniaturize the volume of the system. The design parameters of the antenna and the effect of the antenna on chip-package cavity are carefully analyzed. The designed antenna operates at a center frequency of 2.45 GHz and its impedance bandwidth (S11< -10 dB is 200 MHz, resulting from two neighboring resonant frequencies at 2.41 and 2.51 GHz, respectively. The average gain across the frequency band is about 5.28 dBi.

  9. 75 FR 51843 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2010-08-23

    ... Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products Containing the Same... certain large scale integrated circuit semiconductor chips and products containing same by reason of... including the following: Freescale Semiconductor Xiqing Integrated Semiconductor Manufacturing...

  10. New Polymer Materials for Microelectronics Packaging

    Institute of Scientific and Technical Information of China (English)

    2005-01-01

    @@ Researchers at the CAS Institute of Chemistry (ICCAS) have made breakthrough progress in developing the manufacturing technology of advanced polymer materials for microelectronics packaging applications. The advanced integrated circuit (IC) packaging polymer materials, including photoimageable polyimide resins and liquid epoxy underfills, are a key issue for FC-BGA/CSP(flip chip-ball grill array/chip scale packaging) which is the main stream for the next generation of microelectronics devices. With the down-sizing, thinning and high I/O (input/output) of IC chips, microelectronics packaging is now facing a big technology challenge.

  11. Packaging a free-space intra-chip optical interconnect module: Monte Carlo tolerance study and assembly results

    Science.gov (United States)

    Vervaeke, Michael; Lahti, Markku; Karpinnen, Mikko; Debaes, Christof; Volckaerts, Bart; Karioja, Pentti; Thienpont, Hugo

    2006-04-01

    In this paper we give an overview of the fabrication and assembly induced performance degradation of an intra-multi-chip-module free-space optical interconnect, integrating micro-lenses and a deflection prism above a dense opto-electronic chip. The proposed component is used to demonstrate the capabilities of an accurate micro-optical rapid prototype technique, namely the Deep Proton Writing (DPW). To evaluate the accuracy of DPW and to assess whether our assembly scheme will provide us with a reasonable process yield, we have built a simulation framework combining mechanical Monte Carlo analysis with optical simulations. Both the technological requirements to ensure a high process yield, and the specifications of our in-house DPW technology are discussed. Therefore, we first conduct a sensitivity analysis and we subsequently simulate the effect of combined errors using a Monte Carlo simulation. We are able to investigate the effect of a technology accuracy enhancement on the fabrication and assembly yield by scaling the standard deviation of the errors proportionally to each sensitivity interval. We estimate that 40% of the systems fabricated with DPW will show an optical transmission efficiency above -4.32 dB, which is -3 dB below the theoretical obtainable value. We also discuss our efforts to implement an opto-mechanical Monte Carlo simulator. It enables us to address specific issues not directly related with the micro-optical or DPW components, such as the influence of glueing layers and structures that allow for self-alignment, by combining mechanical tolerancing algorithms with optical simulation software. More in particular we determined that DPW provides ample accuracy to meet the requirements to obtain a high manufacturing yield. Finally, we shortly highlight the basic layout of a completed demonstrator. The adhesive bonding of opto-electronic devices in their package is subject to further improvement to enhance the tilt accuracy of the devices with

  12. 75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2010-05-05

    ... COMMISSION In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos... certain large scale integrated circuit semiconductor chips or products containing the same that...

  13. Development of Equivalent Material Properties of Microbump for Simulating Chip Stacking Packaging

    Directory of Open Access Journals (Sweden)

    Chang-Chun Lee

    2015-08-01

    Full Text Available three-dimensional integrated circuit (3D-IC structure with a significant scale mismatch causes difficulty in analytic model construction. This paper proposes a simulation technique to introduce an equivalent material composed of microbumps and their surrounding wafer level underfill (WLUF. The mechanical properties of this equivalent material, including Young’s modulus (E, Poisson’s ratio, shear modulus, and coefficient of thermal expansion (CTE, are directly obtained by applying either a tensile load or a constant displacement, and by increasing the temperature during simulations, respectively. Analytic results indicate that at least eight microbumps at the outermost region of the chip stacking structure need to be considered as an accurate stress/strain contour in the concerned region. In addition, a factorial experimental design with analysis of variance is proposed to optimize chip stacking structure reliability with four factors: chip thickness, substrate thickness, CTE, and E-value. Analytic results show that the most significant factor is CTE of WLUF. This factor affects microbump reliability and structural warpage under a temperature cycling load and high-temperature bonding process. WLUF with low CTE and high E-value are recommended to enhance the assembly reliability of the 3D-IC architecture.

  14. ChIPpeakAnno: a Bioconductor package to annotate ChIP-seq and ChIP-chip data

    Directory of Open Access Journals (Sweden)

    Pagès Hervé

    2010-05-01

    Full Text Available Abstract Background Chromatin immunoprecipitation (ChIP followed by high-throughput sequencing (ChIP-seq or ChIP followed by genome tiling array analysis (ChIP-chip have become standard technologies for genome-wide identification of DNA-binding protein target sites. A number of algorithms have been developed in parallel that allow identification of binding sites from ChIP-seq or ChIP-chip datasets and subsequent visualization in the University of California Santa Cruz (UCSC Genome Browser as custom annotation tracks. However, summarizing these tracks can be a daunting task, particularly if there are a large number of binding sites or the binding sites are distributed widely across the genome. Results We have developed ChIPpeakAnno as a Bioconductor package within the statistical programming environment R to facilitate batch annotation of enriched peaks identified from ChIP-seq, ChIP-chip, cap analysis of gene expression (CAGE or any experiments resulting in a large number of enriched genomic regions. The binding sites annotated with ChIPpeakAnno can be viewed easily as a table, a pie chart or plotted in histogram form, i.e., the distribution of distances to the nearest genes for each set of peaks. In addition, we have implemented functionalities for determining the significance of overlap between replicates or binding sites among transcription factors within a complex, and for drawing Venn diagrams to visualize the extent of the overlap between replicates. Furthermore, the package includes functionalities to retrieve sequences flanking putative binding sites for PCR amplification, cloning, or motif discovery, and to identify Gene Ontology (GO terms associated with adjacent genes. Conclusions ChIPpeakAnno enables batch annotation of the binding sites identified from ChIP-seq, ChIP-chip, CAGE or any technology that results in a large number of enriched genomic regions within the statistical programming environment R. Allowing users to pass their

  15. Semiconductor Yield Analysis and Multi-Chip Package (MCP) Die Pairing Optimization using Machine Learning

    Institute of Scientific and Technical Information of China (English)

    Randall Goodwin; Russell Miller; Eugene Tuv; Alexander Borisov

    2006-01-01

    Machine Learning, Artificial Intelligence (AI) and Statistical Learning are related mathematical fields which utilize computer algorithms to create models for the purposes of data description and/or prediction. Some well known examples include biometric identification and authorization systems, speech recognition and user targeted internet advertising. Statistical Learning, which we will use in this paper, also has many applications in semiconductor manufacturing.Some of the challenging characteristics of semiconductor data include high dimensionality, mixtures of categorical and numeric data, non-randomly missing data, non-Gaussian and multimodal distributions, nonlinear complex relationships, noise, outliers and temporal dependencies. These challenges are becoming particularly acute as the quantity of available data increases and the ability to trace lots, wafers, die, and packages throughout the full fab, wafer test, assembly and final test manufacturing flow improves. Statistical-learning techniques are applied to address these challenges. In this paper we discuss the advancement and applications of Tree based classification and regression methods to semiconductor data. We begin the paper with a description of the problem, followed by and overview of the statistical-learning techniques we use in our case studies. We then describe how the challenges presented by semiconductor data were addressed with original extensions to tree-based and kernel-based methods. Next, we review four case studies: home sales price prediction, signal identification/separation, final speed bin classification and die pairing optimization for Multi-Chip Packages (MCP). Results from the case studies demonstrate how statistical-learning addresses the challenges presented by semiconductor manufacturing data and enables improved data discovery and prediction when compared to traditional statistical approaches.

  16. Materials for advanced packaging

    CERN Document Server

    Wong, CP

    2017-01-01

    This second edition continues to be the most comprehensive review on the developments in advanced electronic packaging technologies, with a focus on materials and processing. Recognized experts in the field contribute to 22 updated and new chapters that provide comprehensive coverage on various 3D package architectures, novel bonding and joining techniques, wire bonding, wafer thinning techniques, organic substrates, and novel approaches to make electrical interconnects between integrated circuit and substrates. Various chapters also address advances in several key packaging materials, including: Lead-free solders Flip chip underfills Epoxy molding compounds Conductive adhesives Die attach adhesives/films Thermal interface materials (TIMS) Materials for fabricating embedded passives including capacitors, inductors, and resistors Materials and processing aspects on wafer-level chip scale package (CSP) and MicroElectroMechanical system (MEMS) Contributors also review new and emerging technologies such as Light ...

  17. Characterization of AGIPD1.0: The full scale chip

    Science.gov (United States)

    Mezza, D.; Allahgholi, A.; Arino-Estrada, G.; Bianco, L.; Delfs, A.; Dinapoli, R.; Goettlicher, P.; Graafsma, H.; Greiffenberg, D.; Hirsemann, H.; Jack, S.; Klanner, R.; Klyuev, A.; Krueger, H.; Marras, A.; Mozzanica, A.; Poehlsen, J.; Schmitt, B.; Schwandt, J.; Sheviakov, I.; Shi, X.; Trunk, U.; Xia, Q.; Zhang, J.; Zimmer, M.

    2016-12-01

    The AGIPD (adaptive gain integrating pixel detector) detector is a high frame rate (4.5 MHz) and high dynamic range (up to 104 ·12.4 keV photons) detector with single photon resolution (down to 4 keV taking 5σ as limit and lowest noise settings) developed for the European XFEL (XFEL.EU). This work is focused on the characterization of AGIPD1.0, which is the first full scale version of the chip. The chip is 64×64 pixels and each pixel has a size of 200×200 μm2. Each pixel can store up to 352 images at a rate of 4.5 MHz (corresponding to 220 ns). A detailed characterization of the AGIPD1.0 chip has been performed in order to assess the main performance of the ASIC in terms of gain, noise, speed and dynamic range. From the measurements presented in this paper a good uniformity of the gain, a noise around 320 e- (rms) in standard mode and around 240 e- (rms) in high gain mode has been measured. Furthermore a detailed discussion about the non-linear behavior after the gain switching is presented with both experimental results and simulations.

  18. Nonspecific hybridization scaling of microarray expression estimates: a physicochemical approach for chip-to-chip normalization.

    Science.gov (United States)

    Binder, Hans; Brücker, Jan; Burden, Conrad J

    2009-03-05

    The problem of inferring accurate quantitative estimates of transcript abundances from gene expression microarray data is addressed. Particular attention is paid to correcting chip-to-chip variations arising mainly as a result of unwanted nonspecific background hybridization to give transcript abundances measured in a common scale. This study verifies and generalizes a model of the mutual dependence between nonspecific background hybridization and the sensitivity of the specific signal using an approach based on the physical chemistry of surface hybridization. We have analyzed GeneChip oligonucleotide microarray data taken from a set of five benchmark experiments including dilution, Latin Square, and "Golden spike" designs. Our analysis concentrates on the important effect of changes in the unwanted nonspecific background inherent in the technology due to changes in total RNA target concentration and/or composition. We find that incremental changes in nonspecific background entail opposite sign incremental changes in the effective specific binding constant. This effect, which we refer to as the "up-down" effect, results from the subtle interplay of competing interactions between the probes and specific and nonspecific targets at the chip surface and in bulk solution. We propose special rules for proper normalization of expression values considering the specifics of the up-down effect. Particularly for normalization one has to level the expression values of invariant expressed probes. Existing heuristic normalization techniques which do not exclude absent probes, level intensities instead of expression values, and/or use low variance criteria for identifying invariant sets of probes lead to biased results. Strengths and pitfalls of selected normalization methods are discussed. We also find that the extent of the up-down effect is modified if RNA targets are replaced by DNA targets, in that microarray sensitivity and specificity are improved via a decrease in

  19. Chip-scale cavity optomechanics in lithium niobate

    CERN Document Server

    Jiang, Wei C

    2016-01-01

    We develop a chip-scale cavity optomechanical system in single-crystal lithium niobate that exhibits high optical quality factors and a large frequency-quality product as high as $3.6\\times 10^{12}$ Hz at room temperature and atmosphere. The excellent optical and mechanical properties together with the strong optomechanical coupling allow us to efficiently excite the coherent regenerative optomechanical oscillation operating at 375.8 MHz with a threshold power of 174 ${\\rm \\mu W}$ in the air. The demonstrated lithium niobate optomechanical device enables great potential for achieving electro-optic-mechanical hybrid systems for broad applications in sensing, metrology, and quantum physics.

  20. Lab and Bench-Scale Pelletization of Torrefied Wood Chips

    DEFF Research Database (Denmark)

    Shang, Lei; Nielsen, Niels Peter K.; Stelte, Wolfgang

    2013-01-01

    Combined torrefaction and pelletization is used to increase the fuel value of biomass by increasing its energy density and improving its handling and combustion properties. In the present study, a single-pellet press tool was used to screen for the effects of pellet die temperature, moisture...... up from single-pellet press to bench-scale pelletizer. Tuning moisture content or increasing the die temperature did not ease the pellet production of torrefied wood chips significantly. The addition of rapeseed oil as a lubricant reduced the static friction by half and stabilized pellet production...... content, additive addition, and the degree of torrefaction on the pelletizing properties and pellet quality, i.e., density, static friction, and pellet strength. Results were compared with pellet production using a bench-scale pelletizer. The results indicate that friction is the key factor when scaling...

  1. Chip-scale spacecraft swarms: Dynamics, control, and exploration

    Science.gov (United States)

    Weis, Lorraine

    Chip-scale spacecraft (chipsats) swarms will open new avenues for space exploration, both near Earth and in interplanetary space. The ability to create distributed sensor networks through swarms of low-cost, low-mass spacecraft shall enable the exploration of asteroids, icy moons, and the Earths magnetosphere become more feasible. This research develops new techniques for analyzing swarm dynamics, both in the limited case of the Kepler problem, and in general gravity environments, investigates several techniques for providing chipsat propulsion, and develops possible mission strategies. This work applies the Kustaanheimo-Stiefel (KS) transformation to the stochastic exploration presented by chipsat swarms. The contributions towards understanding swarm dynamics include analytical and numerical study of swarms in the purely Kepler problem as well as in general potential fields. A study of swarm evolution near an asteroid provides an example of the richness of behaviors that can be provided by chip-scale spacecraft swarms. Swarm actuation can be achieved through a number of means. This research presents a novel attitude control and propulsion system for chipsat swarms near Earth using a mutliple electrodynamic tethers. A numerical study of tether configurations for the greatest control authority is also presented. In addition, active solar sails are evaluated for swarm actuation beyond Earth, and a visualization of available control authority is presented. An example mission of swarm deployment near the Earth-Moon Lagrange point highlights the utility of swarm-based exploration. The candidate mission shows that a swarm with minimal actuation and a simple control scheme might provide distributed sensors in the region for a year or more, or dissipate quickly if uncontrolled. Such a chip-spacecraft mission would be a valuable precursor to further space development in these regions.

  2. FlexiChip package: an universal microarray with a dedicated analysis software for high-thoughput SNPs detection linked to anti-malarial drug resistance

    Directory of Open Access Journals (Sweden)

    Dondorp Arjen M

    2009-10-01

    Full Text Available Abstract Background A number of molecular tools have been developed to monitor the emergence and spread of anti-malarial drug resistance to Plasmodium falciparum. One of the major obstacles to the wider implementation of these tools is the absence of practical methods enabling high throughput analysis. Here a new Zip-code array is described, called FlexiChip, linked to a dedicated software program, which largely overcomes this problem. Methods Previously published microarray probes detecting single-nucleotide polymorphisms (SNP associated with parasite resistance to anti-malarial drugs (ResMalChip were adapted for a universal microarray FlexiChip format. To evaluate the overall sensitivity of the FlexiChip package (microarray + software, the results of FlexiChip were compared to ResMalChip microarray, using the same extension probes and with the same PCR products. In both cases, sequence results were used as gold standard to calculate sensitivity and specificity. FlexiChip results obtained with a set of field isolates were then compared to those assessed in an independent reference laboratory. Results The FlexiChip package gave results identical to the ResMalChip results in 92.7% of samples (kappa coefficient 0.8491, with a standard error 0.021 and had a sensitivity of 95.88% and a specificity of 97.68% compared to the sequencing as the reference method. Moreover the method performed well compared to the results obtained in the reference laboratories, with 99.7% of identical results (kappa coefficient 0.9923, S.E. 0.0523. Conclusion Microarrays could be employed to monitor P. falciparum drug resistance markers with greater cost effectiveness and the possibility for high throughput analysis. The FlexiChip package is a promising tool for use in poor resource settings of malaria endemic countries.

  3. Exploring massive, genome scale datasets with the genometricorr package

    KAUST Repository

    Favorov, Alexander

    2012-05-31

    We have created a statistically grounded tool for determining the correlation of genomewide data with other datasets or known biological features, intended to guide biological exploration of high-dimensional datasets, rather than providing immediate answers. The software enables several biologically motivated approaches to these data and here we describe the rationale and implementation for each approach. Our models and statistics are implemented in an R package that efficiently calculates the spatial correlation between two sets of genomic intervals (data and/or annotated features), for use as a metric of functional interaction. The software handles any type of pointwise or interval data and instead of running analyses with predefined metrics, it computes the significance and direction of several types of spatial association; this is intended to suggest potentially relevant relationships between the datasets. Availability and implementation: The package, GenometriCorr, can be freely downloaded at http://genometricorr.sourceforge.net/. Installation guidelines and examples are available from the sourceforge repository. The package is pending submission to Bioconductor. © 2012 Favorov et al.

  4. Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems.

    Science.gov (United States)

    Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei

    2015-12-16

    In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

  5. Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems

    Directory of Open Access Journals (Sweden)

    Kenji Okabe

    2015-12-01

    Full Text Available In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI chip on the very thin parylene film (5 μm enables the integration of the rectifier circuits and the flexible antenna (rectenna. In the demonstration of wireless power transmission (WPT, the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

  6. Reliability of an ultra-fine-pitch COF flip-chip package using non-conductive paste

    Science.gov (United States)

    Kim, Hae-Yeon; Min, Kyung-Eun; Lee, Jun-Sik; Lee, So-Jeong; Lee, Sung-Soo; Kim, Jun-Ki

    2016-01-01

    Ultra-fine-pitch chip-on-film (COF) packages such as display-drive-integrated circuit (DDI) modules are manufactured through an underfill process following Au-to-Sn thermo-compression bonding. As the interconnection pitch becomes finer and is reduced to less than 25 um, however, an alternative flip-chip technology, such as non-conductive paste (NCP) bonding, is needed in place of the capillary underfill process. In this study, new NCP formulations are investigated to achieve rapid curing at a temperature high enough to form a metallic bond between the bump and the pad. An appropriate curing agent was determined through a dielectric analysis (DEA). COF samples were prepared with a DDI chip 11,772 × 924 um in size and with a 38 um-thick polyimide flexible printed circuit by both NCP bonding and thermo-compressionunderfill processes. Pressure cooker tests lasting as long as 192 h revealed that the reliability of the NCP sample against high temperatures and high humidity levels exceeded somewhat that of the underfill sample. In thermal cycling test up to 500 cycles, however, the reliability of the NCP sample was inferior to that of the underfill sample. It was considered that unbonded faults and NCP trapping at the bump-to-pad joint were responsible for the premature failure of the NCP sample under a thermal cycling condition. [Figure not available: see fulltext.

  7. The fastclime Package for Linear Programming and Large-Scale Precision Matrix Estimation in R.

    Science.gov (United States)

    Pang, Haotian; Liu, Han; Vanderbei, Robert

    2014-02-01

    We develop an R package fastclime for solving a family of regularized linear programming (LP) problems. Our package efficiently implements the parametric simplex algorithm, which provides a scalable and sophisticated tool for solving large-scale linear programs. As an illustrative example, one use of our LP solver is to implement an important sparse precision matrix estimation method called CLIME (Constrained L1 Minimization Estimator). Compared with existing packages for this problem such as clime and flare, our package has three advantages: (1) it efficiently calculates the full piecewise-linear regularization path; (2) it provides an accurate dual certificate as stopping criterion; (3) it is completely coded in C and is highly portable. This package is designed to be useful to statisticians and machine learning researchers for solving a wide range of problems.

  8. 76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

    Science.gov (United States)

    2011-03-17

    ... COMMISSION In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products... semiconductor chips and products containing same by reason of infringement of certain claims of U.S. Patent Nos... Semiconductor Xiqing Integrated Semiconductor Manufacturing Site (``Freescale Xiqing'') of China;...

  9. Scale-up considerations relevant to experimental studies of nuclear waste-package behavior

    Energy Technology Data Exchange (ETDEWEB)

    Coles, D.G.; Peters, R.D.

    1986-04-01

    Results from a study that investigated whether testing large-scale nuclear waste-package assemblages was technically warranted are reported. It was recognized that the majority of the investigations for predicting waste-package performance to date have relied primarily on laboratory-scale experimentation. However, methods for the successful extrapolation of the results from such experiments, both geometrically and over time, to actual repository conditions have not been well defined. Because a well-developed scaling technology exists in the chemical-engineering discipline, it was presupposed that much of this technology could be applicable to the prediction of waste-package performance. A review of existing literature documented numerous examples where a consideration of scaling technology was important. It was concluded that much of the existing scale-up technology is applicable to the prediction of waste-package performance for both size and time extrapolations and that conducting scale-up studies may be technically merited. However, the applicability for investigating the complex chemical interactions needs further development. It was recognized that the complexity of the system, and the long time periods involved, renders a completely theoretical approach to performance prediction almost hopeless. However, a theoretical and experimental study was defined for investigating heat and fluid flow. It was concluded that conducting scale-up modeling and experimentation for waste-package performance predictions is possible using existing technology. A sequential series of scaling studies, both theoretical and experimental, will be required to formulate size and time extrapolations of waste-package performance.

  10. Simulation and analysis of effects of Young's modulus of isolation material on natural frequencies of the sensor package and displacement of the chip

    Institute of Scientific and Technical Information of China (English)

    YIN Jing-hua; LV Guang-jun; LIU Xiao-wei; LEI Qing-quan

    2005-01-01

    For the first time an anti-shock packaging model of an acoustic-vibration sensor system has been designed by using the shocking isolation principle. The finite element analysis has been applied for design and simulation of the model. The effects of Young's modulus of anti-shock rubber on naturally occurring frequencies of the combination of rubber and an acoustic sensor chip were analyzed. The displacement of the acoustic sensor chip is loaded with force. The results of static analysis and harmonic analysis show that while increasing Young's modulus of anti-chock rubber, the first five natural frequencies of the package body also increases. Yet the displacement of the acoustic sensor chip around the resonant frequency decreases. The results of static and transient analysis show that the displacement of the acoustic sensor chip decreases with the increase of Young's modulus of anti-chock rubber being loaded with either transient force or static force at the bottom of the combination of rubber and acoustic sensor chip.

  11. Chip-Scale Magnetic Source of Cold Atoms

    Science.gov (United States)

    2013-06-01

    30 3.7 The transistor motherboard and the 100 pin breakout board. . . . . . . . . . . . 31 3.8 The full structure of the slowing chip...a separate motherboard of 60 N-channel IRLB3813PbF International Rectifier MOSFET transistors. These transistors will be turned on and off by...60 wires from the slowing chip were soldered to a motherboard of 60 transistors, lined up in two rows of 30 on a 0.1 inch grid perforated prototyping

  12. Lab on a chip Canada--rapid diffusion over large length scales.

    Science.gov (United States)

    Juncker, David; Wheeler, Aaron R; Sinton, David

    2013-07-07

    The roots of lab on a chip in Canada are deep, comprising of some of the earliest contributions and first demonstrations of the potential of microfluidic chips. In an editorial leading off this special issue, Jed Harrison of University of Alberta reflects on these early days and Canada's role in the field's development (DOI: 10.1039/c3lc50522g). Over the last decade, microfluidics and lab-on-a-chip research efforts grew exponentially - rapidly diffusing across the vast Canadian length scales.

  13. MEMS Direct Chip Attach Packaging Methodologies and Apparatuses for Harsh Environments

    Science.gov (United States)

    Okojie, Robert S. (Inventor)

    2009-01-01

    Methods of bulk manufacturing high temperature sensor subassembly packages are disclosed and claimed. Sensors are sandwiched between a top cover and a bottom cover so as to enable the peripheries of the top covers, sensors and bottom covers to be sealed and bound securely together are disclosed and claimed. Sensors are placed on the bottom covers leaving the periphery of the bottom cover exposed. Likewise, top covers are placed on the sensors leaving the periphery of the sensor exposed. Individual sensor sub-assemblies are inserted into final packaging elements which are also disclosed and claimed. Methods of directly attaching wires or pins to contact pads on the sensors are disclosed and claimed. Sensors, such as pressure sensors and accelerometers, and headers made out of silicon carbide and aluminum nitride are disclosed and claimed. Reference cavities are formed in some embodiments disclosed and claimed herein where top covers are not employed.

  14. A Comparative Study of Inspection Techniques for Array Packages

    Science.gov (United States)

    Mohammed, Jelila; Green, Christopher

    2008-01-01

    This viewgraph presentation reviews the inspection techniques for Column Grid Array (CGA) packages. The CGA is a method of chip scale packaging using high temperature solder columns to attach part to board. It is becoming more popular over other techniques (i.e. quad flat pack (QFP) or ball grid array (BGA)). However there are environmental stresses and workmanship challenges that require good inspection techniques for these packages.

  15. Photonic packaging sourcebook fiber-chip coupling for optical components, basic calculations, modules

    CERN Document Server

    Fischer-Hirchert, Ulrich H P

    2015-01-01

    This book serves as a guide on photonic assembly techniques. It provides an overview of today's state-of-the-art technologies for photonic packaging experts and professionals in the field. The text guides the readers to the practical use of optical connectors. It also assists engineers to find a way to an effective and inexpensive set-up for their own needs. In addition, many types of current industrial modules and state-of-the-art applications from single fiber to multi fiber are described in detail. Simulation techniques such as FEM, BPM and ray tracing are explained in depth. Finally, all recent reliability test procedures for datacom and telecom modules are illustrated in combination with related standardization aspects.

  16. Characterization of integrated circuit packaging materials

    CERN Document Server

    Moore, Thomas

    1993-01-01

    Chapters in this volume address important characteristics of IC packages. Analytical techniques appropriate for IC package characterization are demonstrated through examples of the measurement of critical performance parameters and the analysis of key technological problems of IC packages. Issues are discussed which affect a variety of package types, including plastic surface-mount packages, hermetic packages, and advanced designs such as flip-chip, chip-on-board and multi-chip models.

  17. Micron-Scale Differential Scanning Calorimeter on a Chip

    Science.gov (United States)

    Cavicchi, Richard E; Poirier, Gregory Ernest; Suehle, John S; Gaitan, Michael; Tea, Nim H

    1998-06-30

    A differential scanning microcalorimeter produced on a silicon chip enables microscopic scanning calorimetry measurements of small samples and thin films. The chip may be fabricated using standard CMOS processes. The microcalorimeter includes a reference zone and a sample zone. The reference and sample zones may be at opposite ends of a suspended platform or may reside on separate platforms. An integrated polysilicon heater provides heat to each zone. A thermopile consisting of a succession of thermocouple junctions generates a voltage representing the temperature difference between the reference and sample zones. Temperature differences between the zones provide information about the chemical reactions and phase transitions that occur in a sample placed in the sample zone.

  18. GaN-on-Si blue/white LEDs: epitaxy, chip, and package

    Science.gov (United States)

    Qian, Sun; Wei, Yan; Meixin, Feng; Zengcheng, Li; Bo, Feng; Hanmin, Zhao; Hui, Yang

    2016-04-01

    The dream of epitaxially integrating III-nitride semiconductors on large diameter silicon is being fulfilled through the joint R&D efforts of academia and industry, which is driven by the great potential of GaN-on-silicon technology in improving the efficiency yet at a much reduced manufacturing cost for solid state lighting and power electronics. It is very challenging to grow high quality GaN on Si substrates because of the huge mismatch in the coefficient of thermal expansion (CTE) and the large mismatch in lattice constant between GaN and silicon, often causing a micro-crack network and a high density of threading dislocations (TDs) in the GaN film. Al-composition graded AlGaN/AlN buffer layers have been utilized to not only build up a compressive strain during the high temperature growth for compensating the tensile stress generated during the cool down, but also filter out the TDs to achieve crack-free high-quality n-GaN film on Si substrates, with an X-ray rocking curve linewidth below 300 arcsec for both (0002) and (101¯2) diffractions. Upon the GaN-on-Si templates, prior to the deposition of p-AlGaN and p-GaN layers, high quality InGaN/GaN multiple quantum wells (MQWs) are overgrown with well-engineered V-defects intentionally incorporated to shield the TDs as non-radiative recombination centers and to enhance the hole injection into the MQWs through the via-like structures. The as-grown GaN-on-Si LED wafers are processed into vertical structure thin film LED chips with a reflective p-electrode and the N-face surface roughened after the removal of the epitaxial Si(111) substrates, to enhance the light extraction efficiency. We have commercialized GaN-on-Si LEDs with an average efficacy of 150-160 lm/W for 1mm2 LED chips at an injection current of 350 mA, which have passed the 10000-h LM80 reliability test. The as-produced GaN-on-Si LEDs featured with a single-side uniform emission and a nearly Lambertian distribution can adopt the wafer-level phosphor

  19. Using Synchrotron Radiation Microtomography to Investigate Multi-scale Three-dimensional Microelectronic Packages.

    Science.gov (United States)

    Carlton, Holly D; Elmer, John W; Li, Yan; Pacheco, Mario; Goyal, Deepak; Parkinson, Dilworth Y; MacDowell, Alastair A

    2016-04-13

    Synchrotron radiation micro-tomography (SRµT) is a non-destructive three-dimensional (3D) imaging technique that offers high flux for fast data acquisition times with high spatial resolution. In the electronics industry there is serious interest in performing failure analysis on 3D microelectronic packages, many which contain multiple levels of high-density interconnections. Often in tomography there is a trade-off between image resolution and the volume of a sample that can be imaged. This inverse relationship limits the usefulness of conventional computed tomography (CT) systems since a microelectronic package is often large in cross sectional area 100-3,600 mm(2), but has important features on the micron scale. The micro-tomography beamline at the Advanced Light Source (ALS), in Berkeley, CA USA, has a setup which is adaptable and can be tailored to a sample's properties, i.e., density, thickness, etc., with a maximum allowable cross-section of 36 x 36 mm. This setup also has the option of being either monochromatic in the energy range ~7-43 keV or operating with maximum flux in white light mode using a polychromatic beam. Presented here are details of the experimental steps taken to image an entire 16 x 16 mm system within a package, in order to obtain 3D images of the system with a spatial resolution of 8.7 µm all within a scan time of less than 3 min. Also shown are results from packages scanned in different orientations and a sectioned package for higher resolution imaging. In contrast a conventional CT system would take hours to record data with potentially poorer resolution. Indeed, the ratio of field-of-view to throughput time is much higher when using the synchrotron radiation tomography setup. The description below of the experimental setup can be implemented and adapted for use with many other multi-materials.

  20. Fabrication and design equation of film-type large-scale interdigitated supercapacitor chips.

    Science.gov (United States)

    Nam, Inho; Kim, Gil-Pyo; Park, Soomin; Park, Junsu; Kim, Nam Dong; Yi, Jongheop

    2012-12-07

    We report large-scale interdigitated supercapacitor chips based on pseudo-capacitive metal oxide electrodes. A novel method is presented, which provides a powerful fabrication technology of interdigitated supercapacitors operated by a pseudo-capacitive reaction. Also, we empirically develop an equation that describes the relationship between capacitance, mass, and sweep rate in an actual supercapacitor system.

  1. Miniature stick-packaging--an industrial technology for pre-storage and release of reagents in lab-on-a-chip systems.

    Science.gov (United States)

    van Oordt, Thomas; Barb, Yannick; Smetana, Jan; Zengerle, Roland; von Stetten, Felix

    2013-08-01

    Stick-packaging of goods in tubular-shaped composite-foil pouches has become a popular technology for food and drug packaging. We miniaturized stick-packaging for use in lab-on-a-chip (LOAC) systems to pre-store and on-demand release the liquid and dry reagents in a volume range of 80-500 μl. An integrated frangible seal enables the pressure-controlled release of reagents and simplifies the layout of LOAC systems, thereby making the package a functional microfluidic release unit. The frangible seal is adjusted to defined burst pressures ranging from 20 to 140 kPa. The applied ultrasonic welding process allows the packaging of temperature sensitive reagents. Stick-packs have been successfully tested applying recovery tests (where 99% (STDV = 1%) of 250 μl pre-stored liquid is released), long-term storage tests (where there is loss of only simulated 2 years) and air transport simulation tests. The developed technology enables the storage of a combination of liquid and dry reagents. It is a scalable technology suitable for rapid prototyping and low-cost mass production.

  2. Kinetic model for torrefaction of wood chips in a pilot-scale continuous reactor

    DEFF Research Database (Denmark)

    Shang, Lei; Ahrenfeldt, Jesper; Holm, Jens Kai

    2014-01-01

    accordance with the model data. In an additional step a continuous, pilot scale reactor was built to produce torrefied wood chips in large quantities. The "two-step reaction in series" model was applied to predict the mass yield of the torrefaction reaction. Parameters used for the calculation were...... the temperature along the reactor and the biomass feeding rate in combination with the kinetic parameters obtained from the tests in the TGA. Together with results from a laboratory scale, batch torrefaction reactor that was used to determine the higher heating value (HHV) and mass loss (y) of the same material...... at different torrefaction temperatures, it was possible to predict the HHV of torrefied wood chips from the pilot reactor. The results from this study and the presented modeling approach can be used to predict the product quality from pilot scale torrefaction reactors based on small scale experiments and could...

  3. Wafer-scale integration of sacrificial nanofluidic chips for detecting and manipulating single DNA molecules

    Science.gov (United States)

    Wang, Chao; Nam, Sung-Wook; Cotte, John M.; Jahnes, Christopher V.; Colgan, Evan G.; Bruce, Robert L.; Brink, Markus; Lofaro, Michael F.; Patel, Jyotica V.; Gignac, Lynne M.; Joseph, Eric A.; Rao, Satyavolu Papa; Stolovitzky, Gustavo; Polonsky, Stanislav; Lin, Qinghuang

    2017-01-01

    Wafer-scale fabrication of complex nanofluidic systems with integrated electronics is essential to realizing ubiquitous, compact, reliable, high-sensitivity and low-cost biomolecular sensors. Here we report a scalable fabrication strategy capable of producing nanofluidic chips with complex designs and down to single-digit nanometre dimensions over 200 mm wafer scale. Compatible with semiconductor industry standard complementary metal-oxide semiconductor logic circuit fabrication processes, this strategy extracts a patterned sacrificial silicon layer through hundreds of millions of nanoscale vent holes on each chip by gas-phase Xenon difluoride etching. Using single-molecule fluorescence imaging, we demonstrate these sacrificial nanofluidic chips can function to controllably and completely stretch lambda DNA in a two-dimensional nanofluidic network comprising channels and pillars. The flexible nanofluidic structure design, wafer-scale fabrication, single-digit nanometre channels, reliable fluidic sealing and low thermal budget make our strategy a potentially universal approach to integrating functional planar nanofluidic systems with logic circuits for lab-on-a-chip applications.

  4. Vacuum packaging research of optically readable infrared imaging chip%光读出红外成像芯片真空封装研究

    Institute of Scientific and Technical Information of China (English)

    张云胜; 冯飞; 魏旭东; 戈肖鸿; 王跃林

    2015-01-01

    为解决光读出红外成像焦平面阵列器件的真空封装,提出了一种新颖的真空封装方法。该封装结构由可见光窗口、硅垫片和红外窗口三部分构成。硅垫片和可见光窗口(玻璃)通过阳极键合形成封装腔体,用于放置芯片;红外窗口不仅选择性增透8~14μm波段的红外辐射,且作为封装盖板;封装腔体和红外窗口在真空室内通过焊料键合完成真空封装。该封装结构通过了气密检测,并测试得到了200℃电烙铁热像图。%A novel vacuum packaging method is proposed for vacuum packaging optically readable infrared imaging focal plane array( ORIRFPA)device. The vacuum packaging structure is made up of three parts,a visible light window,a silicon spacer,and an infrared window. The silicon spacer is bonded to visible light window-glass using anodic bonding to form packaging cavity,for chip placement;infrared window is not only used to selectively transmit infrared radiation ranges from 8μm to 14μm,but also is used as packaging cover board;packaging cavity is solder bonded to infrared window in vacuum chamber. Then the packaging structure passes air tightness test,and thermal images of soldering iron at temperature 200℃ are test and obtained.

  5. Towards Chip Scale Liquid Chromatography and High Throughput Immunosensing

    Energy Technology Data Exchange (ETDEWEB)

    Ni, Jing [Iowa State Univ., Ames, IA (United States)

    2000-09-21

    This work describes several research projects aimed towards developing new instruments and novel methods for high throughput chemical and biological analysis. Approaches are taken in two directions. The first direction takes advantage of well-established semiconductor fabrication techniques and applies them to miniaturize instruments that are workhorses in analytical laboratories. Specifically, the first part of this work focused on the development of micropumps and microvalves for controlled fluid delivery. The mechanism of these micropumps and microvalves relies on the electrochemically-induced surface tension change at a mercury/electrolyte interface. A miniaturized flow injection analysis device was integrated and flow injection analyses were demonstrated. In the second part of this work, microfluidic chips were also designed, fabricated, and tested. Separations of two fluorescent dyes were demonstrated in microfabricated channels, based on an open-tubular liquid chromatography (OT LC) or an electrochemically-modulated liquid chromatography (EMLC) format. A reduction in instrument size can potentially increase analysis speed, and allow exceedingly small amounts of sample to be analyzed under diverse separation conditions. The second direction explores the surface enhanced Raman spectroscopy (SERS) as a signal transduction method for immunoassay analysis. It takes advantage of the improved detection sensitivity as a result of surface enhancement on colloidal gold, the narrow width of Raman band, and the stability of Raman scattering signals to distinguish several different species simultaneously without exploiting spatially-separated addresses on a biochip. By labeling gold nanoparticles with different Raman reporters in conjunction with different detection antibodies, a simultaneous detection of a dual-analyte immunoassay was demonstrated. Using this scheme for quantitative analysis was also studied and preliminary dose-response curves from an immunoassay of a

  6. GMATA: An Integrated Software Package for Genome-Scale SSR Mining, Marker Development and Viewing

    Science.gov (United States)

    Wang, Xuewen; Wang, Le

    2016-01-01

    Simple sequence repeats (SSRs), also referred to as microsatellites, are highly variable tandem DNAs that are widely used as genetic markers. The increasing availability of whole-genome and transcript sequences provides information resources for SSR marker development. However, efficient software is required to efficiently identify and display SSR information along with other gene features at a genome scale. We developed novel software package Genome-wide Microsatellite Analyzing Tool Package (GMATA) integrating SSR mining, statistical analysis and plotting, marker design, polymorphism screening and marker transferability, and enabled simultaneously display SSR markers with other genome features. GMATA applies novel strategies for SSR analysis and primer design in large genomes, which allows GMATA to perform faster calculation and provides more accurate results than existing tools. Our package is also capable of processing DNA sequences of any size on a standard computer. GMATA is user friendly, only requires mouse clicks or types inputs on the command line, and is executable in multiple computing platforms. We demonstrated the application of GMATA in plants genomes and reveal a novel distribution pattern of SSRs in 15 grass genomes. The most abundant motifs are dimer GA/TC, the A/T monomer and the GCG/CGC trimer, rather than the rich G/C content in DNA sequence. We also revealed that SSR count is a linear to the chromosome length in fully assembled grass genomes. GMATA represents a powerful application tool that facilitates genomic sequence analyses. GAMTA is freely available at http://sourceforge.net/projects/gmata/?source=navbar. PMID:27679641

  7. GMATA: an integrated software package for genome-scale SSR mining, marker development and viewing

    Directory of Open Access Journals (Sweden)

    Xuewen Wang

    2016-09-01

    Full Text Available Simple sequence repeats (SSRs, also referred to as microsatellites, are highly variable tandem DNAs that are widely used as genetic markers. The increasing availability of whole-genome and transcript sequences provides information resources for SSR marker development. However, efficient software is required to efficiently identify and display SSR information along with other gene features at a genome scale. We developed novel software package Genome-wide Microsatellite Analyzing Tool Package (GMATA integrating SSR mining, statistical analysis and plotting, marker design, polymorphism screening and marker transferability, and enabled simultaneously display SSR markers with other genome features. GMATA applies novel strategies for SSR analysis and primer design in large genomes, which allows GMATA to perform faster calculation and provides more accurate results than existing tools. Our package is also capable of processing DNA sequences of any size on a standard computer. GMATA is user friendly, only requires mouse clicks or types inputs on the command line, and is executable in multiple computing platforms. We demonstrated the application of GMATA in plants genomes and reveal a novel distribution pattern of SSRs in 15 grass genomes. The most abundant motifs are dimer GA/TC, the A/T monomer and the GCG/CGC trimer, rather than the rich G/C content in DNA sequence. We also revealed that SSR count is a linear to the chromosome length in fully assembled grass genomes. GMATA represents a powerful application tool that facilitates genomic sequence analyses. GAMTA is freely available at http://sourceforge.net/projects/gmata/?source=navbar.

  8. Study of Thermally Enhanced 2.5D Packages with Multi-chips Molded on Silicon Interposer

    Science.gov (United States)

    Zhang, H. Y.; Zhang, X. W.

    2015-07-01

    The 2.5D package with distributed vias on silicon interposer has received great attention due to its potential for heterogeneous integration. The overmolded 2.5D package protects the silicon die and interposer from environmental damage, which, on the other hand, induces undesirable thermal resistance due to low thermal conductivity of the molding compound. In this paper, a thermally enhanced 2.5D package with exposed die is proposed, fabricated and examined from the thermal enhancement viewpoint. The high power thermal test die was first assembled on a silicon interposer with through silicon vias and connected to the substrate, which was followed by the overmolding and back-grinding processes to form the partially molded (PM) package with exposed die for direct heat sink attachments. Experiments were conducted to examine the thermal performance under different thermal conditions. Under natural convection without thermal enhancement, there was no performance difference between the PM package and the overmolded package. However, when the package top was mounted with a thermally enhanced structure such as a pin fin heat sink, the thermal resistance of PM package was significantly reduced. The advantage was more prominent with the attachment of a high performance liquid cooling heat sink. Thermal simulation models were also constructed to examine the thermal performances under different test conditions, and the realistic thermal interface resistance of 0.5 Kcm2/W was estimated based on the package warpage. The computed thermal resistances agreed with measurement results.

  9. Integrated microsystems packaging approach with LCP

    Science.gov (United States)

    Jaynes, Paul; Shacklette, Lawrence W.

    2006-05-01

    Within the government communication market there is an increasing push to further miniaturize systems with the use of chip-scale packages, flip-chip bonding, and other advances over traditional packaging techniques. Harris' approach to miniaturization includes these traditional packaging advances, but goes beyond this level of miniaturization by combining the functional and structural elements of a system, thus creating a Multi-Functional Structural Circuit (MFSC). An emerging high-frequency, near hermetic, thermoplastic electronic substrate material, Liquid Crystal Polymer (LCP), is the material that will enable the combination of the electronic circuit and the physical structure of the system. The first embodiment of this vision for Harris is the development of a battlefield acoustic sensor module. This paper will introduce LCP and its advantages for MFSC, present an example of the work that Harris has performed, and speak to LCP MFSCs' potential benefits to miniature communications modules and sensor platforms.

  10. Thermal chip fabrication with arrays of sensors and heaters for micro-scale impingement cooling heat transfer analysis and measurements.

    Science.gov (United States)

    Shen, C H; Gau, C

    2004-07-30

    The design and fabrication for a thermal chip with an array of temperature sensors and heaters for study of micro-jet impingement cooling heat transfer process are presented. This thermal chip can minimize the heat loss from the system to the ambient and provide a uniform heat flux along the wall, thus local heat transfer processes along the wall can be measured and obtained. The fabrication procedure presented can reach a chip yield of 100%, and every one of the sensors and heaters on the chip is in good condition. In addition, micro-jet impingement cooling experiments are performed to obtain the micro-scale local heat transfer Nusselt number along the wall. Flow visualization for the micro-impinging jet is also made. The experimental results indicate that both the micro-scale impinging jet flow structure and the heat transfer process along the wall is significantly different from the case of large-scale jet impingement cooling process.

  11. Small-Scale High Temperature Melter-1 (SSHTM-1) Data Package. Appendix B

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1996-03-01

    This appendix provides the data for Alternate HTM Flowsheet 2 (Glycolic Acid) melter feed preparation activities in both the laboratory- and small-scale testing. The first section provides an outline of this appendix. The melter feed preparation data are presented in the next two main sections, laboratory melter feed preparation data and small-scale melter feed preparation data. Section 3.0 provides the laboratory data which is discussed in the main body of the Small-Scale High Temperature-1 (SSHTM-1) Data Package, milestone C95-02.02Y. Section 3.1 gives the flowsheet in outline form as used in the laboratory-scale tests. This section also includes the ``Laboratory Melter Feed Preparation Activity Log`` which gives A chronological account of the test in terms of time, temperature, slurry pH, and specific observations about slurry appearance, acid addition rates, and samples taken. The ``Laboratory Melter Feed Preparation Activity Log`` provides a road map to the reader by which all the activity and data from the laboratory can be easily accessed. A summary of analytical data is presented next, section 3.2, which covers starting materials and progresses to the analysis of the melter feed. The next section, 3.3, characterizes the off-gas generation that occurs during the slurry processing. The following section, 3.4, provides the rheology data gathered including gram waste oxide loading information for the various slurries tested. The final section, 3.5, includes data from standard crucible redox testing. Section 4.0 provides the small-scale data in parallel form to section 3.0. Section 5.0 concludes with the references for this appendix.

  12. Surface Tension Directed Fluidic Self-Assembly of Semiconductor Chips across Length Scales and Material Boundaries

    Directory of Open Access Journals (Sweden)

    Shantonu Biswas

    2016-03-01

    Full Text Available This publication provides an overview and discusses some challenges of surface tension directed fluidic self-assembly of semiconductor chips which are transported in a liquid medium. The discussion is limited to surface tension directed self-assembly where the capture, alignment, and electrical connection process is driven by the surface free energy of molten solder bumps where the authors have made a contribution. The general context is to develop a massively parallel and scalable assembly process to overcome some of the limitations of current robotic pick and place and serial wire bonding concepts. The following parts will be discussed: (2 Single-step assembly of LED arrays containing a repetition of a single component type; (3 Multi-step assembly of more than one component type adding a sequence and geometrical shape confinement to the basic concept to build more complex structures; demonstrators contain (3.1 self-packaging surface mount devices, and (3.2 multi-chip assemblies with unique angular orientation. Subsequently, measures are discussed (4 to enable the assembly of microscopic chips (10 μm–1 mm; a different transport method is introduced; demonstrators include the assembly of photovoltaic modules containing microscopic silicon tiles. Finally, (5 the extension to enable large area assembly is presented; a first reel-to-reel assembly machine is realized; the machine is applied to the field of solid state lighting and the emerging field of stretchable electronics which requires the assembly and electrical connection of semiconductor devices over exceedingly large area substrates.

  13. Open Ended Microwave Oven for Packaging

    CERN Document Server

    Sinclair, K I; Desmulliez, M Y P; Goussetis, G; Bailey, C; Parrott, K; Sangster, A J

    2008-01-01

    A novel open waveguide cavity resonator is presented for the combined variable frequency microwave curing of bumps, underfills and encapsulants, as well as the alignment of devices for fast flip-chip assembly, direct chip attach (DCA) or wafer-scale level packaging (WSLP). This technology achieves radio frequency (RF) curing of adhesives used in microelectronics, optoelectronics and medical devices with potential simultaneous micron-scale alignment accuracy and bonding of devices. In principle, the open oven cavity can be fitted directly onto a flip-chip or wafer scale bonder and, as such, will allow for the bonding of devices through localised heating thus reducing the risk to thermally sensitive devices. Variable frequency microwave (VFM) heating and curing of an idealised polymer load is numerically simulated using a multi-physics approach. Electro-magnetic fields within a novel open ended microwave oven developed for use in micro-electronics manufacturing applications are solved using a de icated Yee sche...

  14. Monitoring CO2 invasion processes at the pore scale using geological labs on chip.

    Science.gov (United States)

    Morais, S; Liu, N; Diouf, A; Bernard, D; Lecoutre, C; Garrabos, Y; Marre, S

    2016-09-21

    In order to investigate at the pore scale the mechanisms involved during CO2 injection in a water saturated pore network, a series of displacement experiments is reported using high pressure micromodels (geological labs on chip - GLoCs) working under real geological conditions (25 < T (°C) < 75 and 4.5 < p (MPa) < 8). The experiments were focused on the influence of three experimental parameters: (i) the p, T conditions, (ii) the injection flow rates and (iii) the pore network characteristics. By using on-chip optical characterization and imaging approaches, the CO2 saturation curves as a function of either time or the number of pore volume injected were determined. Three main mechanisms were observed during CO2 injection, namely, invasion, percolation and drying, which are discussed in this paper. Interestingly, besides conventional mechanisms, two counterintuitive situations were observed during the invasion and drying processes.

  15. A stabilized chip-scale Kerr frequency comb via a high-Q reference photonic microresonator

    CERN Document Server

    Lim, Jinkang; Vinod, Abhinav K; Mortazavian, Parastou; Yu, Mingbin; Kwong, Dim-Lee; Savchenkov, Anatoliy A; Matsko, Andrey B; Maleki, Lute; Wong, Chee Wei

    2016-01-01

    We stabilize a chip-scale Si3N4 phase-locked Kerr frequency comb via locking the pump laser to an independent stable high-Q reference microresonator and locking the comb spacing to an external microwave oscillator. In this comb, the pump laser shift induces negligible impact on the comb spacing change. This scheme is a step towards miniaturization of the stabilized Kerr comb system as the microresonator reference can potentially be integrated on-chip. Fractional instability of the optical harmonics of the stabilized comb is limited by the microwave oscillator used for comb spacing lock below 1 s averaging time and coincides with the pump laser drift in the long term.

  16. Nature-Inspired Interconnects for Self-Assembled Large-Scale Network-on-Chip Designs

    CERN Document Server

    Teuscher, Christof

    2007-01-01

    Future nano-scale electronics built up from an Avogadro number of components needs efficient, highly scalable, and robust means of communication in order to be competitive with traditional silicon approaches. In recent years, the Networks-on-Chip (NoC) paradigm emerged as a promising solution to interconnect challenges in silicon-based electronics. Current NoC architectures are either highly regular or fully customized, both of which represent implausible assumptions for emerging bottom-up self-assembled molecular electronics that are generally assumed to have a high degree of irregularity and imperfection. Here, we pragmatically and experimentally investigate important design trade-offs and properties of an irregular, abstract, yet physically plausible 3D small-world interconnect fabric that is inspired by modern network-on-chip paradigms. We vary the framework's key parameters, such as the connectivity, the number of switch nodes, the distribution of long- versus short-range connections, and measure the net...

  17. Chip-Scale Continuously Tunable Optical Orbital Angular Momentum Generator

    CERN Document Server

    Sun, Jie; Moresco, Michele; Coolbaugh, Douglas; Watts, Michael R

    2014-01-01

    Light carrying orbital angular momentum (OAM) has potential to impact a wide variety of applications ranging from optical communications to quantum information and optical forces for the excitation and manipulation of atoms, molecules, and micro-particles. The unique advantage of utilizing OAM in these applications relies, to a large extent, on the use of multiple different OAM states. Therefore, it is desirable to have a device that is able to gen- erate light with freely adjustable OAM states in an integrated form for large- scale integration. We propose and demonstrate a compact silicon photonic integrated circuit to generate a free-space optical beam with OAM state con- tinuously tuned from a single electrical input signal, realizing both integer and non-integer OAM states. The compactness and flexibility of the device and its compatibility with complementary metal-oxide-semiconductor (CMOS) pro- cessing hold promise for integration with other silicon photonic components for wide-ranging applications.

  18. MEMS-Based Quartz Oscillators and Filters for On-Chip Integration

    Science.gov (United States)

    2005-01-01

    frequency RF electronics, and vacuum packaging the resulting chip at wafer level, are not possible with present techniques. Polysilicon surface...and is compatible with MEMS-based wafer-scale vacuum packaging . Fundamental mode operation above 2 GHz has been demonstrated with Q’s of 7,200 in air

  19. Chip scale mechanical spectrum analyzers based on high quality factor overmoded bulk acouslic wave resonators

    Energy Technology Data Exchange (ETDEWEB)

    Olsson, R. H., III

    2012-03-01

    The goal of this project was to develop high frequency quality factor (fQ) product acoustic resonators matched to a standard RF impedance of 50 {Omega} using overmoded bulk acoustic wave (BAW) resonators. These resonators are intended to serve as filters in a chip scale mechanical RF spectrum analyzer. Under this program different BAW resonator designs and materials were studied theoretically and experimentally. The effort resulted in a 3 GHz, 50 {Omega}, sapphire overmoded BAW with a fQ product of 8 x 10{sup 13}, among the highest values ever reported for an acoustic resonator.

  20. A chip-scale, telecommunications-band frequency conversion interface for quantum emitters.

    Science.gov (United States)

    Agha, Imad; Ates, Serkan; Davanço, Marcelo; Srinivasan, Kartik

    2013-09-09

    We describe a chip-scale, telecommunications-band frequency conversion interface designed for low-noise operation at wavelengths desirable for common single photon emitters. Four-wave-mixing Bragg scattering in silicon nitride waveguides is used to demonstrate frequency upconversion and downconversion between the 980 nm and 1550 nm wavelength regions, with signal-to-background levels > 10 and conversion efficiency of ≈ -60 dB at low continuous wave input pump powers ( 25 % in existing geometries. Finally, we present waveguide designs that can be used to connect shorter wavelength (637 nm to 852 nm) quantum emitters with 1550 nm.

  1. Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

    Directory of Open Access Journals (Sweden)

    Yin Zhen Tei

    2014-01-01

    Full Text Available This paper proposes a multiobjective application mapping technique targeted for large-scale network-on-chip (NoC. As the number of intellectual property (IP cores in multiprocessor system-on-chip (MPSoC increases, NoC application mapping to find optimum core-to-topology mapping becomes more challenging. Besides, the conflicting cost and performance trade-off makes multiobjective application mapping techniques even more complex. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA. The initial population of GA is initialized with network partitioning (NP while the crossover operator is guided with knowledge on communication demands. NP reduces the large-scale application mapping complexity and provides GA with a potential mapping search space. The proposed genetic operator is compared with state-of-the-art genetic operators in terms of solution quality. In this work, multiobjective optimization of energy and thermal-balance is considered. Through simulation, knowledge-based initial mapping shows significant improvement in Pareto front compared to random initial mapping that is widely used. The proposed knowledge-based crossover also shows better Pareto front compared to state-of-the-art knowledge-based crossover.

  2. Wafer-level packaging and laser bonding as an approach for silicon-into-lab-on-chip integration

    Science.gov (United States)

    Brettschneider, T.; Dorrer, C.; Bründel, M.; Zengerle, R.; Daub, M.

    2013-05-01

    A novel approach for the integration of silicon biosensors into microfluidics is presented. Our approach is based on wafer-level packaging of the silicon die and a laser-bonding process of the resulting mold package into a polymer-multilayer stack. The introduction of a flexible and 40 μm thin hot melt foil as an intermediate layer enables laser bonding between materials with different melting temperatures, where standard laser welding processes cannot be employed. All process steps are suitable for mass production, e.g. the approach does not involve any dispensing steps for glue or underfiller. The integration approach was demonstrated and evaluated regarding process technology by wafer-level redistribution of daisy chain silicon dies representing a generic biosensor. Electrical connection was successfully established and laser-bonding tensile strength of 5.7 N mm-2 and burst pressure of 587 kPa at a temperature of 100 °C were achieved for the new material combination. The feasibility of the complete packaging approach was shown by the fabrication of a microfluidic flow cell with embedded mold package.

  3. Large-field-of-view Chip-scale Talbot-grid-based Fluorescence Microscopy

    CERN Document Server

    Pang, Shuo; Kato, Mihoko; Sternberg, Paul W; Yang, Changhuei

    2012-01-01

    The fluorescence microscope is one of the most important tools in modern clinical diagnosis and biological science. However, its expense, size and limited field-of-view (FOV) are becoming bottlenecks in key applications such as large-scale phenotyping and low-resource-setting diagnostics. Here we report a low-cost, compact chip-scale fluorescence-imaging platform, termed the Fluorescence Talbot Microscopy (FTM), which utilizes the Talbot self-imaging effect to enable efficient fluorescence imaging over a large and directly-scalable FOV. The FTM prototype has a resolution of 1.2 microns and an FOV of 3.9 mm x 3.5 mm. We demonstrate the imaging capability of FTM on fluorescently labeled breast cancer cells (SK-BR-3) and HEK cells expressing green fluorescent protein.

  4. Development of the large-scale oligonucleotide chip for the diagnosis of plant viruses and its practical use.

    Science.gov (United States)

    Nam, Moon; Kim, Jeong-Seon; Lim, Seungmo; Park, Chung Youl; Kim, Jeong-Gyu; Choi, Hong-Soo; Lim, Hyoun-Sub; Moon, Jae Sun; Lee, Su-Heon

    2014-03-01

    A large-scale oligonucleotide (LSON) chip was developed for the detection of the plant viruses with known genetic information. The LSON chip contains two sets of 3,978 probes for 538 species of targets including plant viruses, satellite RNAs and viroids. A hundred forty thousand probes, consisting of isolate-, species- and genus-specific probes respectively, are designed from 20,000 of independent nucleotide sequence of plant viruses. Based on the economic importance, the amount of genome information, and the number of strains and/or isolates, one to fifty-one probes for each target virus are selected and spotted on the chip. The standard and field samples for the analysis of the LSON chip have been prepared and tested by RT-PCR. The probe's specific and/or nonspecific reaction patterns by LSON chip allow us to diagnose the unidentified viruses. Thus, the LSON chip in this study could be highly useful for the detection of unexpected plant viruses, the monitoring of emerging viruses and the fluctuation of the population of major viruses in each plant.

  5. Inducible packaging cells for large-scale production of lentiviral vectors in serum-free suspension culture.

    Science.gov (United States)

    Broussau, Sophie; Jabbour, Nadine; Lachapelle, Guillaume; Durocher, Yves; Tom, Rosanne; Transfiguracion, Julia; Gilbert, Rénald; Massie, Bernard

    2008-03-01

    We have developed new packaging cell lines (293SF-PacLV) that can produce lentiviral vectors (LVs) in serum-free suspension cultures. A cell line derived from 293SF cells, expressing the repressor (CymR) of the cumate switch and the reverse transactivator (rtTA2(S)-M2) of the tetracycline (Tet) switch, was established first. We next generated clones stably expressing the Gag/Pol and Rev genes of human immunodeficiency virus-1, and the glycoprotein of vesicular stomatitis virus (VSV-G). Expression of Rev and VSV-G was tightly regulated by the cumate and Tet switches. Our best packaging cells produced up to 2.6 x 10(7) transducing units (TU)/ml after transfection with the transfer vector. Up to 3.4 x 10(7) TU/ml were obtained using stable producers generated by transducing the packaging cells with conditional-SIN-LV. The 293SF-PacLV was stable, as shown by the fact that some producers maintained high-level LV production for 18 weeks without selective pressure. The utility of the 293SF-PacLV for scaling up production in serum-free medium was demonstrated in suspension cultures and in a 3.5-L bioreactor. In shake flasks, the best packaging cells produced between 3.0 and 8.0 x 10(6) TU/ml/day for 3 days, and the best producer cells, between 1.0 and 3.4 x 10(7) TU/ml/day for 5 days. In the bioreactor, 2.8 liters containing 2.0 x 10(6) TU/ml was obtained after 3 days of batch culture following the transfection of packaging cells. In summary, the 293SF-PacLV possesses all the attributes necessary to become a valuable tool for scaling up LV production for preclinical and clinical applications.

  6. 一种数字微镜器件的倒装封装设计%Design of the Flip-Chip Package for Digital Micromirror Devices

    Institute of Scientific and Technical Information of China (English)

    李中楠; 王淑仙

    2012-01-01

    数字微镜器件是由MEMS工艺制成的数字式光反射开关阵列组成,其I/O管脚工作频率高达800 MHz.针对数字微镜器件的对光电两方面性能的严格要求,设计了一种数字微镜器件的封装结构.首先选择倒装封装技术来减小寄生参数,提高器件响应速度;其次优化了板层结构,采用玻璃基底和遮光层来满足光学要求;最后通过对信号完整性和电源完整性问题的仿真设计,满足了电学性能要求,完善了封装基板设计流程.对制作出的微镜器件封装进行测试,在800 MHz的数据频率下,眼图结果与仿真结果较为吻合,降低了封装对信号完整性的影响,达到封装设计要求的指标.%Digital micromirror device is composed of arrays of fast reflective digital light switches which are made by the MEMS fabrication technology, and the highest frequency of I/O pins can be up to 800 MHz. According to the characteristics of this device, a special package design for the advanced digital micromirror device was proposed. This package used the flip-chip technology for smaller parasitic parameter and higher speed. An optimized package structure which used the glass substrate and light shield was adopted to satisfy the optical requests. An appropriate simulation method for signal integrity and power integrity was adopted to satisfy the electrical requests and improved the substrate design flow. The test for the device which has been produced indicates that the eyediagram tally well with the simulation waveform when the frequency of I/O pins is 800 MHz. It reduces the influence of the package on signal integrity problems and meets the requirement of this design.

  7. Statistical Power Supply Dynamic Noise Prediction in Hierarchical Power Grid and Package Networks

    OpenAIRE

    Piccinini, Gianluca; Graziano, Mariagrazia

    2008-01-01

    One of the most crucial high performance systems-on-chip design challenge is to front their power supply noise sufferance due to high frequencies, huge number of functional blocks and technology scaling down. Marking a difference from traditional post physical-design static voltage drop analysis, /a priori dynamic voltage drop/evaluation is the focus of this work. It takes into account transient currents and on-chip and package /RLC/ parasitics while exploring the power grid design solution s...

  8. Imaging and identification of waterborne parasites using a chip-scale microscope.

    Directory of Open Access Journals (Sweden)

    Seung Ah Lee

    Full Text Available We demonstrate a compact portable imaging system for the detection of waterborne parasites in resource-limited settings. The previously demonstrated sub-pixel sweeping microscopy (SPSM technique is a lens-less imaging scheme that can achieve high-resolution (<1 µm bright-field imaging over a large field-of-view (5.7 mm×4.3 mm. A chip-scale microscope system, based on the SPSM technique, can be used for automated and high-throughput imaging of protozoan parasite cysts for the effective diagnosis of waterborne enteric parasite infection. We successfully imaged and identified three major types of enteric parasite cysts, Giardia, Cryptosporidium, and Entamoeba, which can be found in fecal samples from infected patients. We believe that this compact imaging system can serve well as a diagnostic device in challenging environments, such as rural settings or emergency outbreaks.

  9. A scalable silicon photonic chip-scale optical switch for high performance computing systems.

    Science.gov (United States)

    Yu, Runxiang; Cheung, Stanley; Li, Yuliang; Okamoto, Katsunari; Proietti, Roberto; Yin, Yawei; Yoo, S J B

    2013-12-30

    This paper discusses the architecture and provides performance studies of a silicon photonic chip-scale optical switch for scalable interconnect network in high performance computing systems. The proposed switch exploits optical wavelength parallelism and wavelength routing characteristics of an Arrayed Waveguide Grating Router (AWGR) to allow contention resolution in the wavelength domain. Simulation results from a cycle-accurate network simulator indicate that, even with only two transmitter/receiver pairs per node, the switch exhibits lower end-to-end latency and higher throughput at high (>90%) input loads compared with electronic switches. On the device integration level, we propose to integrate all the components (ring modulators, photodetectors and AWGR) on a CMOS-compatible silicon photonic platform to ensure a compact, energy efficient and cost-effective device. We successfully demonstrate proof-of-concept routing functions on an 8 × 8 prototype fabricated using foundry services provided by OpSIS-IME.

  10. A magnetic bead-integrated chip for the large scale manufacture of normalized esiRNAs.

    Directory of Open Access Journals (Sweden)

    Zhao Wang

    Full Text Available The chemically-synthesized siRNA duplex has become a powerful and widely used tool for RNAi loss-of-function studies, but suffers from a high off-target effect problem. Recently, endoribonulease-prepared siRNA (esiRNA has been shown to be an attractive alternative due to its lower off-target effect and cost effectiveness. However, the current manufacturing method for esiRNA is complicated, mainly in regards to purification and normalization on a large-scale level. In this study, we present a magnetic bead-integrated chip that can immobilize amplification or transcription products on beads and accomplish transcription, digestion, normalization and purification in a robust and convenient manner. This chip is equipped to manufacture ready-to-use esiRNAs on a large-scale level. Silencing specificity and efficiency of these esiRNAs were validated at the transcriptional, translational and functional levels. Manufacture of several normalized esiRNAs in a single well, including those silencing PARP1 and BRCA1, was successfully achieved, and the esiRNAs were subsequently utilized to effectively investigate their synergistic effect on cell viability. A small esiRNA library targeting 68 tyrosine kinase genes was constructed for a loss-of-function study, and four genes were identified in regulating the migration capability of Hela cells. We believe that this approach provides a more robust and cost-effective choice for manufacturing esiRNAs than current approaches, and therefore these heterogeneous RNA strands may have utility in most intensive and extensive applications.

  11. A wafer-scale packaging structure with monolithic microwave integrated circuits and passives embedded in a silicon substrate for multichip modules for radio frequency applications

    Science.gov (United States)

    Geng, Fei; Ding, Xiao-yun; Xu, Gao-wei; Luo, Le

    2009-10-01

    A wafer-level packaging structure with chips and passive components embedded in a silicon substrate for multichip modules (MCM) is proposed for radio frequency (RF) applications. The packaging structure consists of two layers of benzocyclobutene (BCB) films and three layers of metalized films, in which the monolithic microwave ICs (MMICs), thin film resistors, striplines and microstrip lines are integrated. The low resistivity silicon wafer with etched cavities is used as a substrate. The BCB films serve as interlayer dielectrics (ILDs). Wirebonding gold bumps are used as electric interconnections between different layers, which eliminate the need of preparing vias by costly procedures including dry etching, metal sputtering and electroplating. The chemical mechanical planarization (CMP) is used to uncover the gold bumps, and the BCB curing profile is optimized to obtain the appropriate BCB film for CMP process. In this work, the thermal, mechanical, electrical as well as RF properties of the packaging structure are investigated. The packaging thermal resistance can be controlled below 2 °C W-1. The average shear strength of the gold bumps on the BCB surface is about 70 MPa. In addition, a Kelvin test structure is fabricated for resistance testing of the vertical vias. The performances of MMIC and interconnection structure at high frequency are simulated and tested. The testing results reveal that the slight shifting of S-parameter curves of the packaged MMIC indicates perfect transmission characteristics at high frequency. For the transition structure of transmission line, the experimental results are compatible with the simulation results. The insertion loss (S21) is below 0.4 dB from 0 to 40 GHz and the return loss (S11) is less than -20 dB from 0 to 40 GHz. For a low noise amplifier (LNA) chip, the S21 shifting caused by the packaging structure is below 0.5 dB, and S11 is less than -10 dB from 8 GHz to 14 GHz.

  12. Thermal simulation for the chip model based on RCP package%基于RCP封装的芯片模型电热模拟

    Institute of Scientific and Technical Information of China (English)

    张路

    2015-01-01

    基于集成电路重分布封装技术(redistributed chip packaging,RCP)的发展,通过提取芯片封装体的具体参数,建立并优化了RCP芯片的热学模型.采用有限元的方法计算了该模型在一定热耗散功率下,施加不同风速条件时的温度分布情况,结果表明:强制对流条件的施加显著增强了RCP芯片封装体的散热能力,4m/s的风速可使其系统热阻降低58%,但是随着风速的增大,其影响不断减弱.所得出的具体风速与芯片结温的关系,可为RCP封装技术的散热设计提供有价值的参考.

  13. Development of a small-scale protope of the GOSSIPO-2 chip in 0.13 um CMOS technology

    CERN Document Server

    Kluit, R; Gromov, V

    2007-01-01

    The GOSSIP (Gas On Slimmed Silicon Pixel) detector is a proposed alternative for silicon based pixel detectors. The Gossip Prototype (GOSSIPO) chip is being developed to serve as a prototype read-out chip for such a gas-filled detector. Thanks to the very low capacitance at the preamplifier input, the front-end of the chip demonstrates low-noise performance in combination with a fast peaking time and low analog power dissipation. Measurement of the drift time of every primary electron in the gas volume enables 3D reconstruction of the particle tracks. For this purpose a Time-to- Digital converter must be placed in each pixel. A small-scale prototype of the GOSSIP chip has been developed in the 0.13 μm CMOS technology. The prototype includes a 16 by 16 pixel array where each pixel is equipped with a front-end circuit, threshold DAC, and a 4-bit TDC. The chip is available for testing in May 2007 and after initial tests it will be postprocessed to build a prototype detector. This paper describes the detector de...

  14. Scaling and automation of a high-throughput single-cell-derived tumor sphere assay chip.

    Science.gov (United States)

    Cheng, Yu-Heng; Chen, Yu-Chih; Brien, Riley; Yoon, Euisik

    2016-10-07

    Recent research suggests that cancer stem-like cells (CSCs) are the key subpopulation for tumor relapse and metastasis. Due to cancer plasticity in surface antigen and enzymatic activity markers, functional tumorsphere assays are promising alternatives for CSC identification. To reliably quantify rare CSCs (1-5%), thousands of single-cell suspension cultures are required. While microfluidics is a powerful tool in handling single cells, previous works provide limited throughput and lack automatic data analysis capability required for high-throughput studies. In this study, we present the scaling and automation of high-throughput single-cell-derived tumor sphere assay chips, facilitating the tracking of up to ∼10 000 cells on a chip with ∼76.5% capture rate. The presented cell capture scheme guarantees sampling a representative population from the bulk cells. To analyze thousands of single-cells with a variety of fluorescent intensities, a highly adaptable analysis program was developed for cell/sphere counting and size measurement. Using a Pluronic® F108 (poly(ethylene glycol)-block-poly(propylene glycol)-block-poly(ethylene glycol)) coating on polydimethylsiloxane (PDMS), a suspension culture environment was created to test a controversial hypothesis: whether larger or smaller cells are more stem-like defined by the capability to form single-cell-derived spheres. Different cell lines showed different correlations between sphere formation rate and initial cell size, suggesting heterogeneity in pathway regulation among breast cancer cell lines. More interestingly, by monitoring hundreds of spheres, we identified heterogeneity in sphere growth dynamics, indicating the cellular heterogeneity even within CSCs. These preliminary results highlight the power of unprecedented high-throughput and automation in CSC studies.

  15. Exploring massive, genome scale datasets with the GenometriCorr package.

    Directory of Open Access Journals (Sweden)

    Alexander Favorov

    2012-05-01

    Full Text Available UNLABELLED: We have created a statistically grounded tool for determining the correlation of genomewide data with other datasets or known biological features, intended to guide biological exploration of high-dimensional datasets, rather than providing immediate answers. The software enables several biologically motivated approaches to these data and here we describe the rationale and implementation for each approach. Our models and statistics are implemented in an R package that efficiently calculates the spatial correlation between two sets of genomic intervals (data and/or annotated features, for use as a metric of functional interaction. The software handles any type of pointwise or interval data and instead of running analyses with predefined metrics, it computes the significance and direction of several types of spatial association; this is intended to suggest potentially relevant relationships between the datasets. AVAILABILITY AND IMPLEMENTATION: The package, GenometriCorr, can be freely downloaded at http://genometricorr.sourceforge.net/. Installation guidelines and examples are available from the sourceforge repository. The package is pending submission to Bioconductor.

  16. Chip-scale Photonic Devices for Light-matter Interactions and Quantum Information Processing

    Science.gov (United States)

    Gao, Jie

    Chip-scale photonic devices such as microdisks, photonic crystal cavities and slow-light photonic crystal waveguides possess strong light localization and long photon lifetime, which will significantly enhance the light-matter interactions and can be used to implement new functionalities for both classical and quantum information processing, optical computation and optical communication in integrated nanophotonic circuits. This thesis will focus on three topics about light matter interactions and quantum information processing with chip-scale photonic devices, including 1) Design and characterization of asymmetric resonate cavity with radiation directionality and air-slot photonic crystal cavity with ultrasmall effective mode volume, 2) Exciton-photon interactions between quantum dots and photonic crystal devices and non-classical photon source from a single quantum dot, and 3) Quantum controlled phase gate and phase switching based on quantum dots and photonic crystal waveguide. The first topic is engineered control of radiation directionality and effective mode volume for optical mode in chip-scale silicon micro-/nano-cavities. High quality factor (Q), subwavelength mode volume ( V) and controllable radiation directionality are the major properties for optical cavities designs. In Chapter 2, asymmetric resonant cavities with rational caustics are proposed and interior whispering gallery modes in monolithic silicon mesoscopic microcavities are experimentally demonstrated. These microcavities possess unique robustness of cavity quality factor against roughness Rayleigh scattering. In Chapter 3, air-slot mode-gap photonic crystal cavities with quality factor of 104 and effective mode volume ˜ 0.02 cubic wavelengths are experimentally demonstrated. The origin of the high Q air-slot cavity mode is the mode-gap effect from the slotted photonic crystal waveguide mode with negative dispersion. The second topic is exciton-photon coupling between quantum dots and

  17. Thermal hehavior of Surface Mounted Devices (SMD) packaging

    Science.gov (United States)

    Bloch, Werner; Moeller, Werner

    The thermal behavior of Surface Mounted Devices (SMD) packaging was investigated on an easily variable type. The effect of basic materials, chip carriers, and bonding, soldering, glueing and casting techniques was examined, considering the most important quantities, switching time and power. The test results show that cooling measures in the chip domain, such as chip bonding, chip casting, and chip carrier lining, are especially efficient for short switching times. The basic materials, even with heat sinks, become only important for longer switching times. The chip temperature of a conventional FR4/LCCC packaging was halved by the application of novel packaging materials, without changing the cooling mechanisms and the power.

  18. Advanced organics for electronic substrates and packages

    CERN Document Server

    Fletcher, Andrew E

    1992-01-01

    Advanced Organics for Electronic Substrates and Packages provides information on packaging, which is one of the most technologically intensive activities in the electronics industry. The electronics packaging community has realized that while semiconductor devices continue to be improved upon for performance, cost, and reliability, it is the interconnection or packaging of these devices that will limit the performance of the systems. Technology must develop packaging for transistor chips, with high levels of performance and integration providing cooling, power, and interconnection, and yet pre

  19. Very large scale heterogeneous integration (VLSHI) and wafer-level vacuum packaging for infrared bolometer focal plane arrays

    Science.gov (United States)

    Forsberg, Fredrik; Roxhed, Niclas; Fischer, Andreas C.; Samel, Björn; Ericsson, Per; Hoivik, Nils; Lapadatu, Adriana; Bring, Martin; Kittilsland, Gjermund; Stemme, Göran; Niklaus, Frank

    2013-09-01

    Imaging in the long wavelength infrared (LWIR) range from 8 to 14 μm is an extremely useful tool for non-contact measurement and imaging of temperature in many industrial, automotive and security applications. However, the cost of the infrared (IR) imaging components has to be significantly reduced to make IR imaging a viable technology for many cost-sensitive applications. This paper demonstrates new and improved fabrication and packaging technologies for next-generation IR imaging detectors based on uncooled IR bolometer focal plane arrays. The proposed technologies include very large scale heterogeneous integration for combining high-performance, SiGe quantum-well bolometers with electronic integrated read-out circuits and CMOS compatible wafer-level vacuum packing. The fabrication and characterization of bolometers with a pitch of 25 μm × 25 μm that are arranged on read-out-wafers in arrays with 320 × 240 pixels are presented. The bolometers contain a multi-layer quantum well SiGe thermistor with a temperature coefficient of resistance of -3.0%/K. The proposed CMOS compatible wafer-level vacuum packaging technology uses Cu-Sn solid-liquid interdiffusion (SLID) bonding. The presented technologies are suitable for implementation in cost-efficient fabless business models with the potential to bring about the cost reduction needed to enable low-cost IR imaging products for industrial, security and automotive applications.

  20. Developing technology for large-scale production of forest chips. Wood Energy Technology Programme 1999-2003. Final report

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2004-07-01

    The national Wood Energy Technology Programme was carried out by Tekes during the period 1999- 2003 to develop efficient technology for large- scale production of forest chips from small- sized trees and logging residues. This is the final report of the programme, and it outlines the general development of forest chip procurement and use during the programme period. In 2002, a sub-programme was established to address small-scale production and use of wood fuels. This sub-programme will continue to the end of 2004, and it is not reported here. The programme was coordinated by VTT Processes. As of January 2004, the programme consisted of 44 public research projects, 46 industrial or product development projects, and 29 demonstration projects. Altogether, 27 research organizations and 53 enterprises participated. The total cost of the programme was 42 M euro of which 13 M euro was provided by Tekes. The Ministry of Trade and Industry provided investment aid for the new technology employed in the demonstration projects. When the programme was launched at the end of the 1990s, the major barriers to the use of forest chips were high cost of production, shortage of reliable chip procurement organizations, and the unsatisfactory quality of fuel. Accordingly, the programme focused largely on these problems. In addition, upgrading of the fuel properties of bark was also studied. The production of forest chips must be adapted to the existing operating environment and infrastructure. In Finland, these are charaterized by rich bio-mass potential, a sophisticated and efficient organization for the procurement of industrial timber, a large capacity of heating and CHP plants to use wood fuels, the possibility to co-fire wood and peat, and the unreserved acceptance of society at large. A goal of Finnish energy and climate strategies is to use 5 million m3 (0.9 Mtoe) chips annually by 2010. The Wood Energy Technology Programme was an important link in the long chain of activities

  1. MICROELECTRONICS: Flip the Chip.

    Science.gov (United States)

    Wong, C P; Luo, S; Zhang, Z

    2000-12-22

    As integrated circuit fabrication advances rapidly and the market for faster, lighter, smaller, yet less expensive electronic products accelerates, electronic packaging faces its own challenges. In this Perspective, Wong, Luo, and Zhang describe recent advances in flip chip packaging. This technology has many advantages over the conventional wire bonding technology and offers the possibility of low-cost electronic assembly for modern electronic products.

  2. Chip-Scale Bioassays Based on Surface-Enhanced Raman Scattering: Fundamentals and Applications

    Energy Technology Data Exchange (ETDEWEB)

    Hye-Young Park

    2005-12-17

    This work explores the development and application of chip-scale bioassays based on surface-enhanced Raman scattering (SERS) for high throughput and high sensitivity analysis of biomolecules. The size effect of gold nanoparticles on the intensity of SERS is first presented. A sandwich immunoassay was performed using Raman-labeled immunogold nanoparticles with various sizes. The SERS responses were correlated to particle densities, which were obtained by atomic force microscopy (AFM). The response of individual particles was also investigated using Raman-microscope and an array of gold islands on a silicon substrate. The location and the size of individual particles were mapped using AFM. The next study describes a low-level detection of Escherichia coli 0157:H7 and simulants of biological warfare agents in a sandwich immunoassay format using SERS labels, which have been termed Extrinsic Raman labels (ERLs). A new ERL scheme based on a mixed monolayer is also introduced. The mixed monolayer ERLs were created by covering the gold nanoparticles with a mixture of two thiolates, one thiolate for covalently binding antibody to the particle and the other thiolate for producing a strong Raman signal. An assay platform based on mixed self-assembled monolayers (SAMs) on gold is then presented. The mixed SAMs were prepared from dithiobis(succinimidyl undecanoate) (DSU) to covalently bind antibodies on gold substrate and oligo(ethylene glycol)-terminated thiol to prevent nonspecific adsorption of antibodies. After the mixed SAMs surfaces, formed from various mole fraction of DSU were incubated with antibodies, AFM was used to image individual antibodies on the surface. The final study presents a collaborative work on the single molecule adsorption of YOYO-I labeled {lambda}-DNA at compositionally patterned SAMs using total internal reflection fluorescence microscopy. The role of solution pH, {lambda}-DNA concentration, and domain size was investigated. This work also revealed

  3. Chip-Scale Bioassays Based on Surface-Enhanced Raman Scattering: Fundamentals and Applications

    Energy Technology Data Exchange (ETDEWEB)

    Park, Hye-Young [Iowa State Univ., Ames, IA (United States)

    2005-01-01

    This work explores the development and application of chip-scale bioassays based on surface-enhanced Raman scattering (SERS) for high throughput and high sensitivity analysis of biomolecules. The size effect of gold nanoparticles on the intensity of SERS is first presented. A sandwich immunoassay was performed using Raman-labeled immunogold nanoparticles with various sizes. The SERS responses were correlated to particle densities, which were obtained by atomic force microscopy (AFM). The response of individual particles was also investigated using Raman-microscope and an array of gold islands on a silicon substrate. The location and the size of individual particles were mapped using AFM. The next study describes a low-level detection of Escherichia coli 0157:H7 and simulants of biological warfare agents in a sandwich immunoassay format using SERS labels, which have been termed Extrinsic Raman labels (ERLs). A new ERL scheme based on a mixed monolayer is also introduced. The mixed monolayer ERLs were created by covering the gold nanoparticles with a mixture of two thiolates, one thiolate for covalently binding antibody to the particle and the other thiolate for producing a strong Raman signal. An assay platform based on mixed self-assembled monolayers (SAMs) on gold is then presented. The mixed SAMs were prepared from dithiobis(succinimidyl undecanoate) (DSU) to covalently bind antibodies on gold substrate and oligo(ethylene glycol)-terminated thiol to prevent nonspecific adsorption of antibodies. After the mixed SAMs surfaces, formed from various mole fraction of DSU were incubated with antibodies, AFM was used to image individual antibodies on the surface. The final study presents a collaborative work on the single molecule adsorption of YOYO-I labeled {lambda}-DNA at compositionally patterned SAMs using total internal reflection fluorescence microscopy. The role of solution pH, {lambda}-DNA concentration, and domain size was investigated. This work also revealed

  4. GRASP92: a package for large-scale relativistic atomic structure calculations

    Science.gov (United States)

    Parpia, F. A.; Froese Fischer, C.; Grant, I. P.

    2006-12-01

    Program summaryTitle of program: GRASP92 Catalogue identifier: ADCU_v1_1 Program summary URL:http://cpc.cs.qub.ac.uk/summaries/ADCU_v1_1 Program obtainable from: CPC Program Library, Queen's University of Belfast, N. Ireland Licensing provisions: no Programming language used: Fortran Computer: IBM POWERstation 320H Operating system: IBM AIX 3.2.5+ RAM: 64M words No. of lines in distributed program, including test data, etc.: 65 224 No of bytes in distributed program, including test data, etc.: 409 198 Distribution format: tar.gz Catalogue identifier of previous version: ADCU_v1_0 Journal reference of previous version: Comput. Phys. Comm. 94 (1996) 249 Does the new version supersede the previous version?: Yes Nature of problem: Prediction of atomic spectra—atomic energy levels, oscillator strengths, and radiative decay rates—using a 'fully relativistic' approach. Solution method: Atomic orbitals are assumed to be four-component spinor eigenstates of the angular momentum operator, j=l+s, and the parity operator Π=βπ. Configuration state functions (CSFs) are linear combinations of Slater determinants of atomic orbitals, and are simultaneous eigenfunctions of the atomic electronic angular momentum operator, J, and the atomic parity operator, P. Lists of CSFs are either explicitly prescribed by the user or generated from a set of reference CSFs, a set of subshells, and rules for deriving other CSFs from these. Approximate atomic state functions (ASFs) are linear combinations of CSFs. A variational functional may be constructed by combining expressions for the energies of one or more ASFs. Average level (AL) functionals are weighted sums of energies of all possible ASFs that may be constructed from a set of CSFs; the number of ASFs is then the same as the number, n, of CSFs. Optimal level (OL) functionals are weighted sums of energies of some subset of ASFs; the GRASP92 package is optimized for this latter class of functionals. The composition of an ASF in terms

  5. Toward High-Energy-Density, High-Efficiency, and Moderate-Temperature Chip-Scale Thermophotovoltaics

    Science.gov (United States)

    2013-04-02

    capillary tubes that double as fluidic connections and vacuum packaging . In this design we use pure oxygen, instead of air, for the chemical reaction...higher-performance low-bandgap PV cells, vacuum packaging , and high-efficiency microreactor and recuperator designs. Indeed, we believe μTPV

  6. Developing technology for large-scale production of forest chips. Wood Energy Technology Programme 1999-2003. Interim report

    Energy Technology Data Exchange (ETDEWEB)

    Hakkila, P. [VTT Processes, Espoo (Finland)

    2003-07-01

    Finland is enhancing its use of renewable sources in energy production. From the 1995 level, the use of renewable energy is to be increased by 50 % by 2010, and 100 % by 2025. Wood-based fuels will play a leading role in this development. The main source of wood-based fuels is processing residues from the forest industries. However, as all processing residues are already in use, an increase is possible only as far as the capacity and wood consumption of the forest industries grow. Energy policy affects the production and availability of processing residues only indirectly. Another large source of wood-based energy is forest fuels, consisting of traditional firewood and chips comminuted from low-quality biomass. It is estimated that the reserve of technically harvest-able forest biomass is 10-16 Mm' annually, when no specific cost limit is applied. This corresponds to 2-3 Mtoe or 6-9 % of the present consumption of primary energy in Finland. How much of this re-serve it will actually be possible to harvest and utilize depends on the cost competitiveness of forest chips against alternative sources of energy. A goal of Finnish energy and climate strategies is to use 5 Mm' forest chips annually by 2010. The use of wood fuels is being promoted by means of taxation, investment aid and support for chip production from young forests. Furthermore, research and development is being supported in order to create techno-economic conditions for the competitive production of forest chips. In 1999, the National Technology Agency Tekes established the five-year Wood Energy Technology Programme to stimulate the development of efficient systems for the large-scale production of forest chips. Key tar-gets are competitive costs, reliable supply and good quality chips. The two guiding principles of the programme are: (1) close cooperation between researchers and practitioners and (2) to apply research and development to the practical applications and commercialization. As of

  7. Packaging a liquid metal ESD with micro-scale Mercury droplet.

    Energy Technology Data Exchange (ETDEWEB)

    Barnard, Casey Anderson

    2011-08-01

    A liquid metal ESD is being developed to provide electrical switching at different acceleration levels. The metal will act as both proof mass and electric contact. Mercury is chosen to comply with operation parameters. There are many challenges surrounding the deposition and containment of micro scale mercury droplets. Novel methods of micro liquid transfer are developed to deliver controllable amounts of mercury to the appropriate channels in volumes under 1 uL. Issues of hermetic sealing and avoidance of mercury contamination are also addressed.

  8. System on a Chip (SoC) Overview

    Science.gov (United States)

    LaBel, Kenneth A.

    2010-01-01

    System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions all on a single chip substrate. Complexity drives it all: Radiation tolerance and testability are challenges for fault isolation, propagation, and validation. Bigger single silicon die than flown before and technology is scaling below 90nm (new qual methods). Packages have changed and are bigger and more difficult to inspect, test, and understand. Add in embedded passives. Material interfaces are more complex (underfills, processing). New rules for board layouts. Mechanical and thermal designs, etc.

  9. Chip, Chip, Hooray!

    Science.gov (United States)

    Kelly, Susan

    2001-01-01

    Presents a science laboratory using different brands of potato chips in which students test their oiliness, size, thickness, saltiness, quality, and cost, then analyze the results to determine the best chip. Gives a brief history of potato chips. (YDS)

  10. Submission of the first full scale prototype chip for upgraded ATLAS pixel detector at LHC, FE-I4A

    Energy Technology Data Exchange (ETDEWEB)

    Barbero, Marlon, E-mail: barbero@physik.uni-bonn.de [Physikalisches Institut Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Arutinov, David [Physikalisches Institut Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Beccherle, Roberto; Darbo, Giovanni [INFN Genova, via Dodecaseno 33, IT-16146 Genova (Italy); Dube, Sourabh; Elledge, David; Fleury, Julien [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, CA 94720 (United States); Fougeron, Denis [CPPM Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Garcia-Sciveres, Maurice [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, CA 94720 (United States); Gensolen, Fabrice [CPPM Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Gnani, Dario [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, CA 94720 (United States); Gromov, Vladimir [NIKHEF, Science Park 105, 1098 XG Amsterdam (Netherlands); Jensen, Frank [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, CA 94720 (United States); Hemperek, Tomasz; Karagounis, Michael [Physikalisches Institut Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Kluit, Ruud [NIKHEF, Science Park 105, 1098 XG Amsterdam (Netherlands); Kruth, Andre [Physikalisches Institut Universitaet Bonn, Nussallee 12, 53115 Bonn (Germany); Mekkaoui, Abderrezak [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, CA 94720 (United States); Menouni, Mohsine [CPPM Aix-Marseille Universite, CNRS/IN2P3, Marseille (France); Schipper, Jan David [NIKHEF, Science Park 105, 1098 XG Amsterdam (Netherlands); and others

    2011-09-11

    A new ATLAS pixel chip FE-I4 is being developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer (IBL) upgrade. FE-I4 is designed in a 130 nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the 0.25{mu}m CMOS technology used for the current ATLAS pixel IC, FE-I3. The FE-I4 architecture is based on an array of 80x336 pixels, each 50x250{mu}m{sup 2}, consisting of analog and digital sections. In the summer 2010, a first full scale prototype FE-I4A was submitted for an engineering run. This IC features the full scale pixel array as well as the complex periphery of the future full-size FE-I4. The FE-I4A contains also various extra test features which should prove very useful for the chip characterization, but deviate from the needs for standard operation of the final FE-I4 for IBL. In this paper, focus will be brought to the various features implemented in the FE-I4A submission, while also underlining the main differences between the FE-I4A IC and the final FE-I4 as envisioned for IBL.

  11. A broadband chip-scale optical frequency synthesizer at 2.7 × 10(-16) relative uncertainty.

    Science.gov (United States)

    Huang, Shu-Wei; Yang, Jinghui; Yu, Mingbin; McGuyer, Bart H; Kwong, Dim-Lee; Zelevinsky, Tanya; Wong, Chee Wei

    2016-04-01

    Optical frequency combs-coherent light sources that connect optical frequencies with microwave oscillations-have become the enabling tool for precision spectroscopy, optical clockwork, and attosecond physics over the past decades. Current benchmark systems are self-referenced femtosecond mode-locked lasers, but Kerr nonlinear dynamics in high-Q solid-state microresonators has recently demonstrated promising features as alternative platforms. The advance not only fosters studies of chip-scale frequency metrology but also extends the realm of optical frequency combs. We report the full stabilization of chip-scale optical frequency combs. The microcomb's two degrees of freedom, one of the comb lines and the native 18-GHz comb spacing, are simultaneously phase-locked to known optical and microwave references. Active comb spacing stabilization improves long-term stability by six orders of magnitude, reaching a record instrument-limited residual instability of [Formula: see text]. Comparing 46 nitride frequency comb lines with a fiber laser frequency comb, we demonstrate the unprecedented microcomb tooth-to-tooth relative frequency uncertainty down to 50 mHz and 2.7 × 10(-16), heralding novel solid-state applications in precision spectroscopy, coherent communications, and astronomical spectrography.

  12. A broadband chip-scale optical frequency synthesizer at 2.7 × 10−16 relative uncertainty

    Science.gov (United States)

    Huang, Shu-Wei; Yang, Jinghui; Yu, Mingbin; McGuyer, Bart H.; Kwong, Dim-Lee; Zelevinsky, Tanya; Wong, Chee Wei

    2016-01-01

    Optical frequency combs—coherent light sources that connect optical frequencies with microwave oscillations—have become the enabling tool for precision spectroscopy, optical clockwork, and attosecond physics over the past decades. Current benchmark systems are self-referenced femtosecond mode-locked lasers, but Kerr nonlinear dynamics in high-Q solid-state microresonators has recently demonstrated promising features as alternative platforms. The advance not only fosters studies of chip-scale frequency metrology but also extends the realm of optical frequency combs. We report the full stabilization of chip-scale optical frequency combs. The microcomb’s two degrees of freedom, one of the comb lines and the native 18-GHz comb spacing, are simultaneously phase-locked to known optical and microwave references. Active comb spacing stabilization improves long-term stability by six orders of magnitude, reaching a record instrument-limited residual instability of 3.6mHz/τ. Comparing 46 nitride frequency comb lines with a fiber laser frequency comb, we demonstrate the unprecedented microcomb tooth-to-tooth relative frequency uncertainty down to 50 mHz and 2.7 × 10−16, heralding novel solid-state applications in precision spectroscopy, coherent communications, and astronomical spectrography. PMID:27152341

  13. On-chip photonic interconnects a computer architect's perspective

    CERN Document Server

    Nitta, Christopher J; Akella, Venkatesh

    2013-01-01

    As the number of cores on a chip continues to climb, architects will need to address both bandwidth and power consumption issues related to the interconnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated without special (and expensive) cooling and packaging techniques. Thus, there is a need to seek alternatives to electrical signaling for on-chip interconnection appli

  14. Packaging the MAMA module

    Science.gov (United States)

    Seals, J. Dennis

    1994-10-01

    The MAMA (Mixed Arithmetic, Multiprocessing Array) module is being developed to evaluate new packaging technologies and processing paradigms for advanced military processing systems. The architecture supports a tight mix of signal, data,and I/O processing at GFLOP throughput rates. It is fabricated using only commercial-on-the-sehlf (COTS) chips and will provide a high level of durability. Its attributes are largely the result of two new interconnection and packaging technologies. Chip-in-board packaging is used to reduce local x-y communication delays and solder joints, while significantly improving board-level packaging density. A unique 3-D interconnection technology called a cross-over cell has been developed to reduce board-to-board communication delays, drive power, glue logic, and card-edge pin-outs. These technologies enable true 3-D structures that are form, fit and connector compatible with conventional line-replacable modules. The module's design rational, packaging technology, and basic architecture will be presented in this paper.

  15. Three-dimensional packaging of very large scale integrated optics (VLSIO) for high-complexity optical systems

    Science.gov (United States)

    West, Lawrence C.; Roberts, Charles W.; Piscani, Emil C.; Dubey, Madan; Jones, Kenneth A.; McLane, George F.

    1996-03-01

    Optics has the fundamental capability of dramatically improving computer performance via the reduction of capacitance for intrinsic high bandwidth communications and low power usage. Yet optical devices have not displaced silicon VLSI in any measure to date. The reason is clear. When placed into systems, the optical devices have not had significantly greater performance in equally complex information processing circuits and similarly low manufacturing cost. An approach demonstrated here uses the same system integration techniques that have been successful for silicon electronics, only applied to optics. Essential for creation of very large scale integrated optics (VLSIO), with over 50,000 high speed logic gates per square centimeter, is a new class of ultra high confinement (UHC) waveguides. These waveguides are created with high index difference (as high as 4.0 to 1.0) between guide and cladding. The waveguides have been demonstrated with infrared cross sections less than 5% of a square free space wavelength. These waveguides can be manufactured today only in the mid-infrared, but the concepts should scale to the near-infrared as lithography improves. Waveguide corners have been designed and demonstrated with a bend radius of less than one free space wavelength. Resonators have been designed which have over 100 times smaller volume than VCSELs, yet efficiently inter-connected laterally in high densities. A connector to the UHC waveguides has been developed and demonstrated using diffractive optical element arrays on the back side of the substrate. The coupler arrays can allow up to 10,000 Gaussian beam connections per square centimeter. This connectivity also has advantages for low cost three dimensional packaging for reduced cost and thermal dissipation. Experimental results on the above concepts and components are presented.

  16. Large-scale analysis of antisense transcription in wheat using the Affymetrix GeneChip Wheat Genome Array

    Directory of Open Access Journals (Sweden)

    Settles Matthew L

    2009-05-01

    Full Text Available Abstract Background Natural antisense transcripts (NATs are transcripts of the opposite DNA strand to the sense-strand either at the same locus (cis-encoded or a different locus (trans-encoded. They can affect gene expression at multiple stages including transcription, RNA processing and transport, and translation. NATs give rise to sense-antisense transcript pairs and the number of these identified has escalated greatly with the availability of DNA sequencing resources and public databases. Traditionally, NATs were identified by the alignment of full-length cDNAs or expressed sequence tags to genome sequences, but an alternative method for large-scale detection of sense-antisense transcript pairs involves the use of microarrays. In this study we developed a novel protocol to assay sense- and antisense-strand transcription on the 55 K Affymetrix GeneChip Wheat Genome Array, which is a 3' in vitro transcription (3'IVT expression array. We selected five different tissue types for assay to enable maximum discovery, and used the 'Chinese Spring' wheat genotype because most of the wheat GeneChip probe sequences were based on its genomic sequence. This study is the first report of using a 3'IVT expression array to discover the expression of natural sense-antisense transcript pairs, and may be considered as proof-of-concept. Results By using alternative target preparation schemes, both the sense- and antisense-strand derived transcripts were labeled and hybridized to the Wheat GeneChip. Quality assurance verified that successful hybridization did occur in the antisense-strand assay. A stringent threshold for positive hybridization was applied, which resulted in the identification of 110 sense-antisense transcript pairs, as well as 80 potentially antisense-specific transcripts. Strand-specific RT-PCR validated the microarray observations, and showed that antisense transcription is likely to be tissue specific. For the annotated sense

  17. Physics of Failure Analysis of Xilinx Flip Chip CCGA Packages: Effects of Mission Environments on Properties of LP2 Underfill and ATI Lid Adhesive Materials

    Science.gov (United States)

    Suh, Jong-ook

    2013-01-01

    The Xilinx Virtex 4QV and 5QV (V4 and V5) are next-generation field-programmable gate arrays (FPGAs) for space applications. However, there have been concerns within the space community regarding the non-hermeticity of V4/V5 packages; polymeric materials such as the underfill and lid adhesive will be directly exposed to the space environment. In this study, reliability concerns associated with the non-hermeticity of V4/V5 packages were investigated by studying properties and behavior of the underfill and the lid adhesvie materials used in V4/V5 packages.

  18. Edible packaging materials.

    Science.gov (United States)

    Janjarasskul, Theeranun; Krochta, John M

    2010-01-01

    Research groups and the food and pharmaceutical industries recognize edible packaging as a useful alternative or addition to conventional packaging to reduce waste and to create novel applications for improving product stability, quality, safety, variety, and convenience for consumers. Recent studies have explored the ability of biopolymer-based food packaging materials to carry and control-release active compounds. As diverse edible packaging materials derived from various by-products or waste from food industry are being developed, the dry thermoplastic process is advancing rapidly as a feasible commercial edible packaging manufacturing process. The employment of nanocomposite concepts to edible packaging materials promises to improve barrier and mechanical properties and facilitate effective incorporation of bioactive ingredients and other designed functions. In addition to the need for a more fundamental understanding to enable design to desired specifications, edible packaging has to overcome challenges such as regulatory requirements, consumer acceptance, and scaling-up research concepts to commercial applications.

  19. Infrared vertically-illuminated photodiode for chip alignment feedback

    CERN Document Server

    Alloatti, Luca

    2016-01-01

    We report on vertically-illuminated photodiodes fabricated in the GlobalFoundries 45nm 12SOI node and on a packaging concept for optically-interconnected chips. The photodiodes are responsive at 1180 nm, a wavelength currently used in chip-to-chip communications. They have further a wide field-of-view which enables chip-to-board positional feedback in chip-board assemblies. Monolithic integration enables on-chip processing of the positional data.

  20. Fundamental study of microelectronic chip response under laser ultrasonic-interferometric inspection using C-scan method

    Science.gov (United States)

    Yang, Lei; Gong, Jie; Ume, I. Charles

    2014-02-01

    In modern surface mount packaging technologies, such as flip chips, chip scale packages, and ball grid arrays(BGA), chips are attached to the substrates/printed wiring board (PWB) using solder bump interconnections. The quality of solder bumps between the chips and the substrate/board is difficult to inspect. Laser ultrasonic-interferometric technique was proved to be a promising approach for solder bump inspection because of its noncontact and nondestructive characteristics. Different indicators extracted from received signals have been used to predict the potential defects, such as correlation coefficient, error ratio, frequency shifting, etc. However, the fundamental understanding of the chip behavior under laser ultrasonic inspection is still missing. Specifically, it is not sure whether the laser interferometer detected out-of-plane displacements were due to wave propagation or structural vibration when the chip was excited by pulsed laser. Plus, it is found that the received signals are chip dependent. Both challenges impede the interpretation of acquired signals. In this paper, a C-scan method was proposed to study the underlying phenomenon during laser ultrasonic inspection. The full chip was inspected. The response of the chip under laser excitation was visualized in a movie resulted from acquired signals. Specifically, a BGA chip was investigated to demonstrate the effectiveness of this method. By characterizing signals using discrete wavelet transform(DWT), both ultrasonic wave propagation and vibration were observed. Separation of them was successfully achieved using ideal band-pass filter and visualized in resultant movies, too. The observed ultrasonic waves were characterized and their respective speeds were measured by applying 2-D FFT. The C-scan method, combined with different digital signal processing techniques, was proved to be an very effective methodology to learn the behavior of chips under laser excitation. This general procedure can be

  1. Packaging fluency

    DEFF Research Database (Denmark)

    Mocanu, Ana; Chrysochou, Polymeros; Bogomolova, Svetlana

    2011-01-01

    Research on packaging stresses the need for packaging design to read easily, presuming fast and accurate processing of product-related information. In this paper we define this property of packaging as “packaging fluency”. Based on the existing marketing and cognitive psychology literature on pac...

  2. Development of gold based solder candidates for flip chip assembly

    DEFF Research Database (Denmark)

    Chidambaram, Vivek; Hald, John; Hattel, Jesper Henri

    2009-01-01

    Flip chip technology is now rapidly replacing the traditional wire bonding interconnection technology in the first level packaging applications due to the miniaturization drive in the microelectronics industry. Flip chip assembly currently involves the use of high lead containing solders for inte......Flip chip technology is now rapidly replacing the traditional wire bonding interconnection technology in the first level packaging applications due to the miniaturization drive in the microelectronics industry. Flip chip assembly currently involves the use of high lead containing solders...

  3. 100% foundry compatible packaging and full wafer release and die separation technique for surface micromachined devices

    Energy Technology Data Exchange (ETDEWEB)

    OLIVER,ANDREW D.; MATZKE,CAROLYN M.

    2000-04-06

    A completely foundry compatible chip-scale package for surface micromachines has been successfully demonstrated. A pyrex (Corning 7740) glass cover is placed over the released surface micromachined die and anodically bonded to a planarized polysilicon bonding ring. Electrical feedthroughs for the surface micromachine pass underneath the polysilicon sealing ring. The package has been found to be hermetic with a leak rate of less than 5 x 10{sup {minus}8} atm cm{sup {minus}3}/s. This technology has applications in the areas of hermetic encapsulation and wafer level release and die separation.

  4. Reliability, Durability and Packaging of Fibre Bragg Gratings for Large-Scale Structural Health Monitoring of Defence Platforms

    Science.gov (United States)

    2013-08-01

    2.1 VARTM Packaging ................................................................................................... 3 2.2 Redux Tape...Technical Data Sheet VARTM – Vacuum-Assisted Resin Transfer Moulding UNCLASSIFIED DSTO-TR-2880 UNCLASSIFIED...The first technique was a vacuum assisted resin transfer moulding ( VARTM ) process; the second technique involved curing the optical fibre into a

  5. Mechanically Flexible Active Silicon Chips and Systems Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Using innovative chip thinning technology married with recently available packaging technology, this effort will produce Mechanically Flexible Multifunctional Active...

  6. High performance microsystem packaging: A perspective

    Energy Technology Data Exchange (ETDEWEB)

    Romig, A.D. Jr.; Dressendorfer, P.V.; Palmer, D.W.

    1997-10-01

    The second silicon revolution will be based on intelligent, integrated microsystems where multiple technologies (such as analog, digital, memory, sensor, micro-electro-mechanical, and communication devices) are integrated onto a single chip or within a multichip module. A necessary element for such systems is cost-effective, high-performance packaging. This paper examines many of the issues associated with the packaging of integrated microsystems, with an emphasis on the areas of packaging design, manufacturability, and reliability.

  7. MEMS packaging

    CERN Document Server

    Hsu , Tai-Ran

    2004-01-01

    MEMS Packaging discusses the prevalent practices and enabling techniques in assembly, packaging and testing of microelectromechanical systems (MEMS). The entire spectrum of assembly, packaging and testing of MEMS and microsystems, from essential enabling technologies to applications in key industries of life sciences, telecommunications and aerospace engineering is covered. Other topics included are bonding and sealing of microcomponents, process flow of MEMS and microsystems packaging, automated microassembly, and testing and design for testing.The Institution of Engineering and Technology is

  8. Control Effect of Occupational Hazards in Construction Project of Chip Package%某芯片封装测试项目职业病危害控制效果评价

    Institute of Scientific and Technical Information of China (English)

    康晓熙; 张遵真

    2013-01-01

    目的 评价某芯片封装测试项目职业病危害因素控制效果,为项目竣工验收提供依据.方法 依据相关资料,进行现场职业卫生学调查和职业危害因素检测,采用工程分析、定性定量分析等方法进行评价.结果 噪声、化学毒物、工频电磁场是芯片封装测试生产的主要职业病危害因素.其中,4个噪声测定点超标,该4点均为巡视人员巡检岗位,其接触噪声8h等效声级为77.7dB(A);化学毒物、工频电磁场作业点检测结果均符合国家职业卫生标准.结论 该项目为职业病危害一般的建设项目,该项目采取了卫生工程防护措施与个人防护措施相结合的方法控制职业有害因素,对接触有毒有害作业人员进行职业健康监护,职业病防护措施效果良好.%Objective To evaluate the occupational hazards in construction project of chip package,so as to provide the basis for the inspection by health administrative departments.Methods According to the related data,occupational hygienic investigation was carried out,occupational hazards factors were detected and both qualitative and quantitative analysis methods were applied.Results The main occupational hazard factors in the chip package production were noise,poisonous chemicals and power frequency.Four noise sites for patrol inspection exceed the standard with the Lex8hintensities noise of 77.7dB (A).Poisonous chemicals,power frequency were in accord with the occupational exposure standards.Conclusion The project is a common construction project,the occupational hazard prevention facilities and control measures basically come up to the national occupational health requirements.

  9. 基于TSV技术的CIS芯片晶圆级封装工艺研究%The Research of CIS Chip Wafer Level Packaging Process Based on TSV

    Institute of Scientific and Technical Information of China (English)

    董西英; 徐成翔

    2011-01-01

    TSV-based packaging technology is a kind of high-end technology currently used in MEMS, memory and three-dimensional integrated circuits.This article discusses the TSV-based CIS chip wafer level packaging process which is in the mass production phase and in a leading position in our country.The emphasis of this work focuses on the theoretical and experimental investigations of executing aluminum etching and photoresist removal before metallic coating, and the induced Ni-breeding problem.It is found that the new process flow can shorten the time of photoresist removal, decrease the residua of photoresist and reduce the number of layers of metallic coating.Extending UPW rinse time in electroplating process each time, avoiding forming Nickel particles in plating solution in EN Ni.Lowering zinc concentration when zinc plating and increase nitric acid cleaning steps therefore circumvent the problem of Ni-breeding.The results are helpful to improve the efficiency, increase the passing rate of the chips greatly and reduce the costs.%基于TSV技术的封装技术是目前MEMS产品、存储器、3D IC封装中的高端和热点技术.本文论述了在国内处于领先并正在量产化研究阶段的基于TSV技术的CIS芯片晶圆级封装工艺流程.通过理论分析和实验,重点研究了在封装流程中将铝刻蚀、去胶提前到金属镀覆之前的意义和所出现的镍滋生问题.研究表明,将铝刻蚀、去胶提前到金属镀覆之前可以缩短去胶时间,减少光刻胶的残留和金属镀覆层数;通过延长金属镀覆过程中每次UPW冲洗时间,在EN Ni中防止镀液结镍,并在镀锌时降低锌液的粘附性和镀锌后增加硝酸清洗步骤,即可消除镍滋生.以上研究对于提高封装效率和合格芯片率,降低成本是很有意义的.

  10. Multilayered Microelectronic Device Package With An Integral Window

    Science.gov (United States)

    Peterson, Kenneth A.; Watson, Robert D.

    2004-10-26

    A microelectronic package with an integral window mounted in a recessed lip for housing a microelectronic device. The device can be a semiconductor chip, a CCD chip, a CMOS chip, a VCSEL chip, a laser diode, a MEMS device, or a IMEMS device. The package can be formed of a low temperature co-fired ceramic (LTCC) or high temperature cofired ceramic (HTCC) multilayered material, with the integral window being simultaneously joined (e.g. co-fired) to the package body during LTCC or HTCC processing. The microelectronic device can be flip-chip bonded and oriented so that a light-sensitive side is optically accessible through the window. The result is a compact, low profile package, having an integral window mounted in a recessed lip, that can be hermetically sealed.

  11. Processing and Validation of Whey-Protein-Coated Films and Laminates at Semi-Industrial Scale as Novel Recyclable Food Packaging Materials with Excellent Barrier Properties

    Directory of Open Access Journals (Sweden)

    E. Bugnicourt

    2013-01-01

    Full Text Available A biopolymer coating for plastic films was formulated based on whey protein, and its potential to replace current synthetic oxygen barrier layers used in food packaging such as ethylene vinyl alcohol copolymers (EVOH was tested. The whey-coating application was performed at semi-industrial scale. High barrier to oxygen with transmission rate down to ranges of 1 cm3 (STP m−2 d−1 bar−1 at and 50% relative humidity (r.h. but interesting humidity barrier down to ranges of 3 g m−2 d−1 (both normalized to 100 μm thickness were reached, outperforming most existing biopolymers. Coated films were validated for storing various food products showing that the shelf life and sensory attributes were maintained similar to reference packaging films while complying with food safety regulations. The developed whey coating could be enzymatically removed within 2 hours and is therefore compatible with plastic recycling operations to allow multilayer films to become recyclable by separating the other combined layers. A life cycle assessment was performed showing a significant reduction in the environmental impact of the packaging thanks in particular to the possibility of recycling materials as opposed to incinerating those containing EVOH or polyamide (PA, but due to the use of biosourced raw materials.

  12. Efficient large volume electroporation of dendritic cells through micrometer scale manipulation of flow in a disposable polymer chip

    DEFF Research Database (Denmark)

    Selmeczi, David; Hansen, Thomas; Met, Özcan

    2011-01-01

    We present a hybrid chip of polymer and stainless steel designed for high-throughput continuous electroporation of cells in suspension. The chip is constructed with two parallel stainless steel mesh electrodes oriented perpendicular to the liquid flow. The relatively high hydrodynamic resistance ...

  13. Final Design and Integration of Micro-Chip Inductive Edge Sensors for the Seven Segment Demonstrator. Testing of Integrated Edge Sensors in Test Packages

    Science.gov (United States)

    Karpinsky, John

    1997-01-01

    The contractor attended the critical design review and evaluated the presentations of other team members and presented data on the inductive edge sensor. The prototype micro-chip inductive edge sensor was evaluated, and devices were found to have a number of characteristics which made them unsuitable for installation on the seven segment demonstrator. The amplifier bandwidth was too low, the output drive current was too small, and there is an interaction between the digital circuitry and the amplifier that causes the amplifier to stop functioning. Therefore, the inductive edge sensors were not installed on the seven segment demonstrator. The contractor has participated in instruction, problem analysis, and provided technical assistance to NASA and its contractors for the development of 8 hexagonal mirror faceplates with electronics and edge sensors.

  14. Towards Dependable Network-on-Chip Architectures

    NARCIS (Netherlands)

    Chen, C.

    2015-01-01

    The aggressive semiconductor technology scaling provides the means for doubling the amount of transistors on a single chip each and every 18 months. To efficiently utilize these vast chip resources, Multi-Processor Systems on Chip (MPSoCs) integrated with a Network-on-Chip (NoC) communication infras

  15. Development of a One-package Epoxy Resin Sealant for Electronic Memory Chips%存储芯片用单组分环氧胶粘剂的研制

    Institute of Scientific and Technical Information of China (English)

    戚渭新

    2002-01-01

    A method of making a one-package epoxy resin sealant for electronic memory chips and the characteristics of the sealant were presented.. The process and the conditions of preparing the latent curing agent were discussed in detail. The principle of preparing the curing agent is to lower reactivity of a heterocyclic amine and envelop it simultaneously.This sealant can cure rapidly and completely in the condition of 110 ℃ and 30 min, and it is stable for storage at 20 ℃. Its application showed that the sealant can take the place of the imported sealant.%介绍了电子存储芯片用密封用单组分环氧胶粘剂的制备方法及产品特点,详细讨论了潜伏性固化剂的制备条件,本固化剂采用杂环胺减活性同时进行包裹的方法制备,110 ℃×30min可固化,20 ℃可贮存6个月,使用结果证明可以取代进口胶.

  16. Packaging Effects on RadFET Sensors for High Energy Physics Experiments

    CERN Document Server

    Mekki, J; Glaser, M; Guatelli, S; Moll, M; Pia, M G; Ravotti, F

    2009-01-01

    RadFETs in customized chip carrier packages are installed in the LHC Experiments as radiation monitors. The package influence on the dose measurement in the complex LHC radiation environment is evaluated using Geant4 simulations and experimental data.

  17. Impact of Scaling on CMOS Chip Failure Rate, and Design Rules for Hot Carrier Reliability

    OpenAIRE

    2001-01-01

    Silicon-hydrogen bonds passivate the interface defects at the silicon-silicon dioxide interface of CMOS transistors. The activation of these bonds and subsequent creation of interface traps is an important source of transistor degradation at current operating conditions. There is now evidence for a distribution in the activation energies of these bonds instead of a single threshold value. We show that conventional CMOS scaling rules are substantially affected by this energy dis...

  18. RF and microwave microelectronics packaging II

    CERN Document Server

    Sturdivant, Rick

    2017-01-01

    Reviews RF, microwave, and microelectronics assembly process, quality control, and failure analysis Bridges the gap between low cost commercial and hi-res RF/Microwave packaging technologies Engages in an in-depth discussion of challenges in packaging and assembly of advanced high-power amplifiers This book presents the latest developments in packaging for high-frequency electronics. It is a companion volume to “RF and Microwave Microelectronics Packaging” (2010) and covers the latest developments in thermal management, electrical/RF/thermal-mechanical designs and simulations, packaging and processing methods, and other RF and microwave packaging topics. Chapters provide detailed coverage of phased arrays, T/R modules, 3D transitions, high thermal conductivity materials, carbon nanotubes and graphene advanced materials, and chip size packaging for RF MEMS. It appeals to practicing engineers in the electronic packaging and high-frequency electronics domain, and to academic researchers interested in underst...

  19. SU-8 cantilever chip interconnection

    DEFF Research Database (Denmark)

    Johansson, Alicia Charlotte; Janting, Jakob; Schultz, Peter;

    2006-01-01

    the electrodes on the SU-8 chip to a printed circuit board. Here, we present two different methods of electrically connecting an SU-8 chip, which contains a microfluidic network and free-hanging mechanical parts. The tested electrical interconnection techniques are flip chip bonding using underfill or flip chip...... bonding using an anisotropic conductive film (ACF). These are both widely used in the Si industry and might also be used for the large scale interconnection of SU-8 chips. The SU-8 chip, to which the interconnections are made, has a microfluidic channel with integrated micrometer-sized cantilevers...... that can be used for label-free biochemical detection. All the bonding tests are compared with results obtained using similar Si chips. It is found that it is significantly more complicated to interconnect SU-8 than Si cantilever chips primarily due to the softness of SU-8....

  20. Users Guide on Scaled CMOS Reliability: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

    Science.gov (United States)

    White, Mark; Cooper, Mark; Johnston, Allan

    2011-01-01

    Reliability of advanced CMOS technology is a complex problem that is usually addressed from the standpoint of specific failure mechanisms rather than overall reliability of a finished microcircuit. A detailed treatment of CMOS reliability in scaled devices can be found in Ref. 1; it should be consulted for a more thorough discussion. The present document provides a more concise treatment of the scaled CMOS reliability problem, emphasizing differences in the recommended approach for these advanced devices compared to that of less aggressively scaled devices. It includes specific recommendations that can be used by flight projects that use advanced CMOS. The primary emphasis is on conventional memories, microprocessors, and related devices.

  1. Accurate macromolecular crystallographic refinement: incorporation of the linear scaling, semiempirical quantum-mechanics program DivCon into the PHENIX refinement package.

    Science.gov (United States)

    Borbulevych, Oleg Y; Plumley, Joshua A; Martin, Roger I; Merz, Kenneth M; Westerhoff, Lance M

    2014-05-01

    Macromolecular crystallographic refinement relies on sometimes dubious stereochemical restraints and rudimentary energy functionals to ensure the correct geometry of the model of the macromolecule and any covalently bound ligand(s). The ligand stereochemical restraint file (CIF) requires a priori understanding of the ligand geometry within the active site, and creation of the CIF is often an error-prone process owing to the great variety of potential ligand chemistry and structure. Stereochemical restraints have been replaced with more robust functionals through the integration of the linear-scaling, semiempirical quantum-mechanics (SE-QM) program DivCon with the PHENIX X-ray refinement engine. The PHENIX/DivCon package has been thoroughly validated on a population of 50 protein-ligand Protein Data Bank (PDB) structures with a range of resolutions and chemistry. The PDB structures used for the validation were originally refined utilizing various refinement packages and were published within the past five years. PHENIX/DivCon does not utilize CIF(s), link restraints and other parameters for refinement and hence it does not make as many a priori assumptions about the model. Across the entire population, the method results in reasonable ligand geometries and low ligand strains, even when the original refinement exhibited difficulties, indicating that PHENIX/DivCon is applicable to both single-structure and high-throughput crystallography.

  2. Accurate macromolecular crystallographic refinement: incorporation of the linear scaling, semiempirical quantum-mechanics program DivCon into the PHENIX refinement package

    Energy Technology Data Exchange (ETDEWEB)

    Borbulevych, Oleg Y.; Plumley, Joshua A.; Martin, Roger I. [QuantumBio Inc., 2790 West College Avenue, State College, PA 16801 (United States); Merz, Kenneth M. Jr [University of Florida, Gainesville, Florida (United States); Westerhoff, Lance M., E-mail: lance@quantumbioinc.com [QuantumBio Inc., 2790 West College Avenue, State College, PA 16801 (United States)

    2014-05-01

    Semiempirical quantum-chemical X-ray macromolecular refinement using the program DivCon integrated with PHENIX is described. Macromolecular crystallographic refinement relies on sometimes dubious stereochemical restraints and rudimentary energy functionals to ensure the correct geometry of the model of the macromolecule and any covalently bound ligand(s). The ligand stereochemical restraint file (CIF) requires a priori understanding of the ligand geometry within the active site, and creation of the CIF is often an error-prone process owing to the great variety of potential ligand chemistry and structure. Stereochemical restraints have been replaced with more robust functionals through the integration of the linear-scaling, semiempirical quantum-mechanics (SE-QM) program DivCon with the PHENIX X-ray refinement engine. The PHENIX/DivCon package has been thoroughly validated on a population of 50 protein–ligand Protein Data Bank (PDB) structures with a range of resolutions and chemistry. The PDB structures used for the validation were originally refined utilizing various refinement packages and were published within the past five years. PHENIX/DivCon does not utilize CIF(s), link restraints and other parameters for refinement and hence it does not make as many a priori assumptions about the model. Across the entire population, the method results in reasonable ligand geometries and low ligand strains, even when the original refinement exhibited difficulties, indicating that PHENIX/DivCon is applicable to both single-structure and high-throughput crystallography.

  3. Self-consistent implementation of meta-GGA functionals for the ONETEP linear-scaling electronic structure package

    Science.gov (United States)

    Womack, James C.; Mardirossian, Narbe; Head-Gordon, Martin; Skylaris, Chris-Kriton

    2016-11-01

    Accurate and computationally efficient exchange-correlation functionals are critical to the successful application of linear-scaling density functional theory (DFT). Local and semi-local functionals of the density are naturally compatible with linear-scaling approaches, having a general form which assumes the locality of electronic interactions and which can be efficiently evaluated by numerical quadrature. Presently, the most sophisticated and flexible semi-local functionals are members of the meta-generalized-gradient approximation (meta-GGA) family, and depend upon the kinetic energy density, τ, in addition to the charge density and its gradient. In order to extend the theoretical and computational advantages of τ-dependent meta-GGA functionals to large-scale DFT calculations on thousands of atoms, we have implemented support for τ-dependent meta-GGA functionals in the ONETEP program. In this paper we lay out the theoretical innovations necessary to implement τ-dependent meta-GGA functionals within ONETEP's linear-scaling formalism. We present expressions for the gradient of the τ-dependent exchange-correlation energy, necessary for direct energy minimization. We also derive the forms of the τ-dependent exchange-correlation potential and kinetic energy density in terms of the strictly localized, self-consistently optimized orbitals used by ONETEP. To validate the numerical accuracy of our self-consistent meta-GGA implementation, we performed calculations using the B97M-V and PKZB meta-GGAs on a variety of small molecules. Using only a minimal basis set of self-consistently optimized local orbitals, we obtain energies in excellent agreement with large basis set calculations performed using other codes. Finally, to establish the linear-scaling computational cost and applicability of our approach to large-scale calculations, we present the outcome of self-consistent meta-GGA calculations on amyloid fibrils of increasing size, up to tens of thousands of atoms.

  4. Additive manufacturing approaches for stress relief in semiconductor die packaging

    NARCIS (Netherlands)

    Zon, C.M.B. van der; Wiel, A. van der; Maalderink, H.H.; Vaes, M.H.E.; Aulbers, A.P.; Vorst, L.T.G. van de; Cate, A.T. ten; Furrer, J.F.; Burssens, J.W.; Chen, J.

    2012-01-01

    Packaging of semiconductor chips, especially MEMS-based, always causes stress on the functional areas of the die causing unpredictable changes in chip performance. As a consequence such devices can only be calibrated individually after complete assembly. Melexis and TNO have developed an approach to

  5. Heat transfer and structure stress analysis of micro packaging component of high power light emitting diode

    Directory of Open Access Journals (Sweden)

    Hsu Chih-Neng

    2013-01-01

    Full Text Available This paper focuses on the heat transfer and structural stress analysis of the micro- scale packaging structure of a high-power light emitting diode. The thermal-effect and thermal-stress of light emitting diode are determined numerically. Light emitting diode is attached to the silicon substrate through the wire bonding process by using epoxy as die bond material. The silicon substrate is etched with holes at the bottom and filled with high conductivity copper material. The chip temperature and structure stress increase with input power consumption. The micro light emitting diode is mounted on the heat sink to increase the heat dissipation performance, to decrease chip temperature, to enhance the material structure reliability and safety, and to avoid structure failure as well. This paper has successfully used the finite element method to the micro-scale light emitting diode heat transfer and stress concentration at the edges through etched holes.

  6. Comparison of different LED Packages

    Science.gov (United States)

    Dieker, Henning; Miesner, Christian; Püttjer, Dirk; Bachl, Bernhard

    2007-09-01

    In this paper different technologies for LED packaging are compared, focusing on Chip on Board (COB) and SMD technology. The package technology which is used depends on the LED application. A critical fact in LED technology is the thermal management, especially for high brightness LED applications because the thermal management is important for reliability, lifetime and electrooptical performance of the LED module. To design certain and long life LED applications knowledge of the heat flow from LEDs to the complete application is required. High sophisticated FEM simulations are indispensable for modern development of high power LED applications. We compare simulations of various substrate materials and packaging technologies simulated using FLOTHERM software. Thereby different substrates such as standard FR4, ceramic and metal core printed circuit boards are considered. For the verification of the simulated results and the testing of manufactured modules, advanced measurement tools are required. We show different ways to experimentally characterize the thermal behavior of LED modules. The thermal path is determined by the transient thermal analysis using the MicReD T3Ster analyzer. Afterwards it will be compared to the conventional method using thermocouples. The heat distribution over the module is investigated by an IR-Camera. We demonstrate and compare simulation and measurement results of Chip-on-Board (COB) and Sub-Mounted Devices (SMD) technology. The results reveal that for different applications certain packages are ideal.

  7. Green Packaging Management of Logistics Enterprises

    Science.gov (United States)

    Zhang, Guirong; Zhao, Zongjian

    From the connotation of green logistics management, we discuss the principles of green packaging, and from the two levels of government and enterprises, we put forward a specific management strategy. The management of green packaging can be directly and indirectly promoted by laws, regulations, taxation, institutional and other measures. The government can also promote new investment to the development of green packaging materials, and establish specialized institutions to identify new packaging materials, standardization of packaging must also be accomplished through the power of the government. Business units of large scale through the packaging and container-based to reduce the use of packaging materials, develop and use green packaging materials and easy recycling packaging materials for proper packaging.

  8. Human-machine Scale and Comfort in Packaging Container Modeling Design%包装容器造型设计的人机尺度与舒适度

    Institute of Scientific and Technical Information of China (English)

    黎英; 王建民

    2012-01-01

    Starting from ergonomic principles, it analyzed the human-machine factors in packaging container and the law of comfortable design based on the human-machine scales, systematically investigated the types of comfort from health and medical point of view. It is found that in order to gain physical and mental comfort while using the container so as to create an ideal lifestyle for consumers, scales including human body size, physiological and psychological needs and behaviour must be considered in packing design.%参考健康医学的观点,对舒适度的类型展开了分析,以人机工程学原理为启示,分析了包装容器造型设计的人机因素,探讨了基于人机尺度下包装容器造型的舒适性设计规律。在此基础上,提出了在包装造型设计中把握人体尺寸、生理需求、心理需求、使用行为的尺度,才能使容器在使用过程中获得生理和心理的舒适,从而为消费者营造理想的生活方式。

  9. Curbing variations in packaging process through Six Sigma way in a large-scale food-processing industry

    Science.gov (United States)

    Desai, Darshak A.; Kotadiya, Parth; Makwana, Nikheel; Patel, Sonalinkumar

    2015-08-01

    Indian industries need overall operational excellence for sustainable profitability and growth in the present age of global competitiveness. Among different quality and productivity improvement techniques, Six Sigma has emerged as one of the most effective breakthrough improvement strategies. Though Indian industries are exploring this improvement methodology to their advantage and reaping the benefits, not much has been presented and published regarding experience of Six Sigma in the food-processing industries. This paper is an effort to exemplify the application of Six Sigma quality improvement drive to one of the large-scale food-processing sectors in India. The paper discusses the phase wiz implementation of define, measure, analyze, improve, and control (DMAIC) on one of the chronic problems, variations in the weight of milk powder pouch. The paper wraps up with the improvements achieved and projected bottom-line gain to the unit by application of Six Sigma methodology.

  10. Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs

    OpenAIRE

    Kavadias, Stamatis; KATEVENIS, Manolis; Zampetakis, Michail; Nikolopoulos, Dimitrios S.

    2012-01-01

    Per-core scratchpad memories (or local stores) allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architectures become more distributed. We have designed cache-integrated network interfaces, appropriate for scalable multicores, that combine the best of two worlds – the flexibility of caches and the efficiency of scratchpad memories: on-chip SRAM is configurably shared among caching, scratchpad, and virtualized n...

  11. Challenges in the Packaging of MEMS

    Energy Technology Data Exchange (ETDEWEB)

    Malshe, A.P.; Singh, S.B.; Eaton, W.P.; O' Neal, C.; Brown, W.D.; Miller, W.M.

    1999-03-26

    The packaging of Micro-Electro-Mechanical Systems (MEMS) is a field of great importance to anyone using or manufacturing sensors, consumer products, or military applications. Currently much work has been done in the design and fabrication of MEMS devices but insufficient research and few publications have been completed on the packaging of these devices. This is despite the fact that packaging is a very large percentage of the total cost of MEMS devices. The main difference between IC packaging and MEMS packaging is that MEMS packaging is almost always application specific and greatly affected by its environment and packaging techniques such as die handling, die attach processes, and lid sealing. Many of these aspects are directly related to the materials used in the packaging processes. MEMS devices that are functional in wafer form can be rendered inoperable after packaging. MEMS dies must be handled only from the chip sides so features on the top surface are not damaged. This eliminates most current die pick-and-place fixtures. Die attach materials are key to MEMS packaging. Using hard die attach solders can create high stresses in the MEMS devices, which can affect their operation greatly. Low-stress epoxies can be high-outgassing, which can also affect device performance. Also, a low modulus die attach can allow the die to move during ultrasonic wirebonding resulting to low wirebond strength. Another source of residual stress is the lid sealing process. Most MEMS based sensors and devices require a hermetically sealed package. This can be done by parallel seam welding the package lid, but at the cost of further induced stress on the die. Another issue of MEMS packaging is the media compatibility of the packaged device. MEMS unlike ICS often interface with their environment, which could be high pressure or corrosive. The main conclusion we can draw about MEMS packaging is that the package affects the performance and reliability of the MEMS devices. There is a

  12. Gain chip design, power scaling and intra-cavity frequency doubling with LBO of optically pumped red-emitting AlGaInP-VECSELs

    Science.gov (United States)

    Kahle, Hermann; Mateo, Cherry M. N.; Brauch, Uwe; Bek, Roman; Schwarzbäck, Thomas; Jetter, Michael; Graf, Thomas; Michler, Peter

    2016-03-01

    The wide range of applications in biophotonics, television or projectors, spectroscopy and lithography made the optically-pumped semiconductor (OPS) vertical external cavity surface-emitting lasers (VECSELs) an important category of power scalable lasers. The possibility of bandgap engineering, inserting frequency selective and converting elements into the open laser cavity and laser emission in the fundamental Gaussian mode leads to ongoing growth of the area of applications for tuneable laser sources. We present an AlGaInP-VECSEL system with a multi quantum well structure consisting of compressively strained GaInP quantum wells in an AlxGa1-xInP separate confinement heterostructure with an emission wavelength around 665 nm. The VECSEL chip with its n-λ cavity is pumped by a 532nm Nd:YAG laser under an angle to the normal incidence of 50°. In comparison, a gain chip design for high absorption values at pump wavelengths around 640nm with the use of quantum dot layers as active material is also presented. Frequency doubling is now realized with an antireflection coated lithium borate crystal, while a birefringent filter, placed inside the laser cavity under Brewster's angle, is used for frequency tuning. Further, power-scaling methods like in-well pumping as well as embedding the active region of a VECSEL between two transparent ic heaspreaders are under investigation.

  13. Efficient large volume electroporation of dendritic cells through micrometer scale manipulation of flow in a disposable polymer chip

    DEFF Research Database (Denmark)

    Selmeczi, Dávid; Hansen, Thomas Steen; Met, Özcan

    2011-01-01

    of the micrometer sized holes in the meshes compared to the main channel enforces an almost homogeneous flow velocity between the meshes. Thereby, very uniform electroporation of the cells can be accomplished. Successful electroporation of 20 million human dendritic cells with mRNA is demonstrated. The performance...... of the chip is similar to that of the traditional electroporation cuvette, but without an upper limit on the number of cells to be electroporated. The device is constructed with two female Luer parts and can easily be integrated with other microfluidic components. Furthermore it is fabricated from injection...

  14. Preservation of forest wood chips

    Energy Technology Data Exchange (ETDEWEB)

    Kofman, P.D.; Thomsen, I.M.; Ohlsson, C.; Leer, E.; Ravn Schmidt, E.; Soerensen, M.; Knudsen, P.

    1999-01-01

    As part of the Danish Energy Research Programme on biomass utilisation for energy production (EFP), this project concerns problems connected to the handling and storing of wood chips. In this project, the possibility of preserving wood chips of the Norway Spruce (Picea Abies) is addressed, and the potential improvements by anaerobic storage are tested. Preservation of wood chips aims at reducing dry matter losses from extensive heating during storage and to reduce production of fungal spores. Fungal spores pose a health hazards to workers handling the chips. Further the producers of wood chips are interested in such a method since it would enable them to give a guarantee for the delivery of homogeneous wood chips also during the winter period. Three different types of wood chips were stored airtight and further one of these was stored in accordance with normal practise and use as reference. The results showed that airtight storage had a beneficial impact on the quality of the chips: no redistribution of moisture, low dry matter losses, unfavourable conditions for microbial activity of most fungi, and the promotion of yeasts instead of fungi with airborne spores. Likewise the firing tests showed that no combustion problems, and no increased risk to the environment or to the health of staff is caused by anaerobic storage of wood chips. In all, the tests of the anaerobic storage method of forest wood chips were a success and a large-scale test of the method will be carried out in 1999. (au)

  15. 5GHz LTCC-based aperture coupled wireless transmitter for system-on-package applications

    KAUST Repository

    Shamim, Atif

    2012-01-01

    A novel System-on-Package (SoP) implementation is presented for a transmitter (TX) module which makes use of electromagnetic coupling between the TX chip and the package antenna. The TX chip is realized in 0.13μm CMOS process and comprises an on-chip antenna, which serves as the oscillator\\'s inductor as well. The TX chip is housed in a Low Temperature Co-fired Ceramic (LTCC) package with a patch antenna. The on-chip antenna feeds the LTCC patch antenna through aperture coupling, thus negating the need for RF buffer amplifiers, matching elements, baluns, bond wires and package transmission lines. This is the first ever demonstration of wireless-interconnect between on-chip and package antennas which increases the gain and range of the TX module manyfold with respect to the on-chip antenna alone. Though the range of the TX SoP increases considerably, power consumption remains the same as that of the TX chip only. A simple analytical model for the new wireless-interconnect has been developed which helps determine the optimum position of the chip with respect to the aperture in the ground plane.

  16. Packaging Technologies for High Temperature Electronics and Sensors

    Science.gov (United States)

    Chen, Liangyu; Hunter, Gary W.; Neudeck, Philip G.; Beheim, Glenn M.; Spry, David J.; Meredith, Roger D.

    2013-01-01

    This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

  17. 新经济形式下的包装设计尺度%Discussion on Packaging Design Scale under New Economic Form

    Institute of Scientific and Technical Information of China (English)

    过山; 熊菀君

    2009-01-01

    从可持续发展观和创建和谐社会的思路出发,研究不同类型、不同材质、不同生产工艺和不同消费群体的现代包装设计所应该遵循的基本尺度,即观念尺度、行为尺度、人为尺度,使设计师有目的、有效率地进行包装设计.%An issue ignored by most packaging designers was put forward, which was the application of natural eco-friendly materials in packaging design. The feasibility of application of natural eco-friendly materials in packaging design under existing condition was discussed with examples of traditional paper materials, natural materials, and new materials. The purpose was to promote the application of natural eco-friendly materials in food packaging.

  18. GEM400: A front-end chip based on capacitor-switch array for pixel-based GEM detector

    Science.gov (United States)

    Li, H. S.; Jiang, X. S.; Liu, G.; Wang, N.; Sheng, H. Y.; Zhuang, B. A.; Zhao, J. W.

    2012-03-01

    The upgrade of Beijing Synchrotron Radiation Facility (BSRF) needs two-dimensional position-sensitive detection equipment to improve the experimental performance. Gas Electron Multiplier (GEM) detector, in particular, pixel-based GEM detector has good application prospects in the domain of synchrotron radiation. The read-out of larger scale pixel-based GEM detector is difficult for the high density of the pixels (PAD for collecting electrons). In order to reduce the number of cables, this paper presents a read-out scheme for pixel-based GEM detector, which is based on System-in-Package technology and ASIC technology. We proposed a circuit structure based on capacitor switch array circuit, and design a chip GEM400, which is a 400 channels ASIC. The proposed circuit can achieve good stability and low power dissipation. The chip is implemented in a 0.35μm CMOS process. The basic functional circuitry in ths chip includes analog switch, analog buffer, voltage amplifier, bandgap and control logic block, and the layout of this chip takes 5mm × 5mm area. The simulation results show that the chip can allow the maximum amount of input charge 70pC on the condition of 100pF external integrator capacitor. Besides, the chip has good channel uniformity (INL is better than 0.1%) and lower power dissipation.

  19. Large area LED package

    Science.gov (United States)

    Goullon, L.; Jordan, R.; Braun, T.; Bauer, J.; Becker, F.; Hutter, M.; Schneider-Ramelow, M.; Lang, K.-D.

    2015-03-01

    Solid state lighting using LED-dies is a rapidly growing market. LED-dies with the needed increasing luminous flux per chip area produce a lot of heat. Therefore an appropriate thermal management is required for general lighting with LEDdies. One way to avoid overheating and shorter lifetime is the use of many small LED-dies on a large area heat sink (down to 70 μm edge length), so that heat can spread into a large area while at the same time light also appears on a larger area. The handling with such small LED-dies is very difficult because they are too small to be picked with common equipment. Therefore a new concept called collective transfer bonding using a temporary carrier chip was developed. A further benefit of this new technology is the high precision assembly as well as the plane parallel assembly of the LED-dies which is necessary for wire bonding. It has been shown that hundred functional LED-dies were transferred and soldered at the same time. After the assembly a cost effective established PCB-technology was applied to produce a large-area light source consisting of many small LED-dies and electrically connected on a PCB-substrate. The top contacts of the LED-dies were realized by laminating an adhesive copper sheet followed by LDI structuring as known from PCB-via-technology. This assembly can be completed by adding converting and light forming optical elements. In summary two technologies based on standard SMD and PCB technology have been developed for panel level LED packaging up to 610x 457 mm2 area size.

  20. High Temperature Pt/Alumina Co-Fired System for 500 C Electronic Packaging Applications

    Science.gov (United States)

    Chen, Liang-Yu; Neudeck, Philip G.; Spry, David J.; Beheim, Glenn M.; Hunter, Gary W.

    2015-01-01

    Gold thick-film metallization and 96 alumina substrate based prototype packaging system developed for 500C SiC electronics and sensors is briefly reviewed, the needs of improvement are discussed. A high temperature co-fired alumina material system based packaging system composed of 32-pin chip-level package and printed circuit board is discussed for packaging 500C SiC electronics and sensors.

  1. Mikrofluidik-Chips

    NARCIS (Netherlands)

    Verpoorte, E.; Lichtenberg, J.

    2000-01-01

    Microfluidic chips are becoming the new paradigm for chemical processing and analysis in the laboratory. Hair-fine channels made in planar substrates using silicon processing technologies replace beakers and tubing for automated liquid transport and handling on a sub-μ L scale. Reduced conduit diame

  2. Atom chips

    CERN Document Server

    Reichel, Jakob

    2010-01-01

    This book provides a stimulating and multifaceted picture of a rapidly developing field. The first part reviews fundamentals of atom chip research in tutorial style, while subsequent parts focus on the topics of atom-surface interaction, coherence on atom chips, and possible future directions of atom chip research. The articles are written by leading researchers in the field in their characteristic and individual styles.

  3. Single Chip Sensing of Multiple Gas Flows

    CERN Document Server

    Bruschi, P; Piotto, M

    2008-01-01

    The fabrication and experimental characterization of a thermal flow meter, capable of detecting and measuring two independent gas flows with a single chip, is described. The device is based on a 4 x 4 mm2 silicon chip, where a series of differential micro-anemometers have been integrated together with standard electronic components by means of postprocessing techniques. The innovative aspect of the sensor is the use of a plastic adapter, thermally bonded to the chip, to convey the gas flow only to the areas where the sensors are located. The use of this inexpensive packaging procedure to include different sensing structures in distinct flow channels is demonstrated.

  4. Status and prospects for phosphor-based white LED packaging

    Institute of Scientific and Technical Information of China (English)

    Zongyuan LIU; Sheng LIU; Kai WANG; Xiaobing LUO

    2009-01-01

    The status and prospects for high-power, phosphor-based white light-emitting diode (LED) pack-aging have been presented. A system view for packaging design is proposed to address packaging issues. Four aspects of packaging are reviewed: optical control, thermal management, reliability and cost. Phosphor materials play the most important role in light extraction and color control. The conformal coating method improves the spatial color distribution (SCD) of LEDs. High refractive index (RI) encapsulants with high transmittance and modified surface morphology can enhance light extraction. Multi-phosphor-based packaging can realize the control of correlated color temperature (CCT) with high color rendering index (CRI). Effective thermal management can dissipate heat rapidly and reduce thermal stress caused by the mismatch of the coefficient of thermal expansion (CTE). Chip-on-board (COB) technology with a multi-layer ceramic substrate is the most promising method for high-power LED packaging. Low junction temperature will improve the reliability and provide longer life. Advanced processes, precise fabrication and careful operation are essential for high reliability LEDs. Cost is one of the biggest obstacles for the penetration of white LEDs into the market for general illumination products. Mass production in terms of CoB, system in packaging (SIP), 3D packaging and wafer level packaging (WLP) can reduce the cost significantly, especially when chip cost is lowered by using a large wafer size.

  5. White LED with High Package Extraction Efficiency

    Energy Technology Data Exchange (ETDEWEB)

    Yi Zheng; Matthew Stough

    2008-09-30

    The goal of this project is to develop a high efficiency phosphor converting (white) Light Emitting Diode (pcLED) 1-Watt package through an increase in package extraction efficiency. A transparent/translucent monolithic phosphor is proposed to replace the powdered phosphor to reduce the scattering caused by phosphor particles. Additionally, a multi-layer thin film selectively reflecting filter is proposed between blue LED die and phosphor layer to recover inward yellow emission. At the end of the project we expect to recycle approximately 50% of the unrecovered backward light in current package construction, and develop a pcLED device with 80 lm/W{sub e} using our technology improvements and commercially available chip/package source. The success of the project will benefit luminous efficacy of white LEDs by increasing package extraction efficiency. In most phosphor-converting white LEDs, the white color is obtained by combining a blue LED die (or chip) with a powdered phosphor layer. The phosphor partially absorbs the blue light from the LED die and converts it into a broad green-yellow emission. The mixture of the transmitted blue light and green-yellow light emerging gives white light. There are two major drawbacks for current pcLEDs in terms of package extraction efficiency. The first is light scattering caused by phosphor particles. When the blue photons from the chip strike the phosphor particles, some blue light will be scattered by phosphor particles. Converted yellow emission photons are also scattered. A portion of scattered light is in the backward direction toward the die. The amount of this backward light varies and depends in part on the particle size of phosphors. The other drawback is that yellow emission from phosphor powders is isotropic. Although some backward light can be recovered by the reflector in current LED packages, there is still a portion of backward light that will be absorbed inside the package and further converted to heat. Heat

  6. Effectiveness of a controlled release chlorhexidine chip (PerioColTM‑CG as an adjunctive to scaling and root planing when compared to scaling and root planing alone in the treatment of chronic periodontitis: A comparative study

    Directory of Open Access Journals (Sweden)

    Kameswari Kondreddy

    2012-01-01

    Full Text Available Aims and objectives: The aim of this study is to evaluate the effectiveness of a controlled-release chlorhexidine chip as an adjunctive therapy to scaling and root planing when compared with scaling and root planing alone in the treatment of chronic periodontitis. Materials and Methods: 20 patients with a total number of 40 posterior sites were selected. These sites were divided into two groups in a split mouth design,: Group A (control site had 20 sites treated with scaling and root planing alone and Group B (test site had 20 sites treated with scaling and root planing and PerioCol TM -CG. The clinical parameters (Plaque index, bleeding on probing, probing pocket depth, clinical attachment level were recorded at baseline, 90 th and 180 th day for both the groups. Results: When both groups were compared the change in Plaque index was significantly higher in Group B when compared to Group A on the 90 th day and 180 th day. However, there was no statistically significant difference in the mean percentage of gingival bleeding sites between the two groups on the 90 th day, though Group B showed a statistically higher reduction in the mean percentage of gingival bleeding sites at the end of 180 th day. There was no statistically significant difference in probing pocket depth between the two groups on both 90 th and 180 th day. Gain in clinical attachment level was significantly higher in Group B when compared to Group A on the 90 th and 180 th day. Conclusion: From the results observed in this study, it can be concluded that the adjunctive use of PerioCol TM -CG was safe and provided significant improvement in both Plaque index and gingival bleeding index. It was also more favorable than scaling and root planing alone for gain in clinical attachment level.

  7. Study on localized induction heating for wafer level packaging

    Institute of Scientific and Technical Information of China (English)

    2010-01-01

    Micro-electro-mechanical systems(MEMS)are being developed as a new multi-disciplinary technology,which will undoubtedly have a revolutionary impact on the future of human life.However,with the development of MEMS technology,the packaging has become the main technical obstacle to the commercialization of MEMS.An approach to MEMS packaging by high-frequency electromagnetic induction heating at wafer level is presented in terms of numerical simulation and experimental study.The structure of inductor is firstly designed and optimized.Then the heating situation of PCB board is verified.The results indicate that the heat impact on the chip during the packaging process can be effectively reduced by local induction heating packaging,therefore the thermal stress on the chip is considerably lowered.This method can effectively improve the reliability of the MEMS devices.

  8. PACE3 - front-end chip for the CMS Preshower

    CERN Multimedia

    Aspel, Paul

    2003-01-01

    This is PACE3 which is the front-end chip for the CMS Preshower. In fact PACE3 is the combination of two ASICs called Delta3 and PACEAM3. Delta3 is on the left and PACEAM3 is on the right. The two ASICs are bonded together and then packaged within a single 196 pin fpBGA package.

  9. Yucca Mountain Waste Package Closure System

    Energy Technology Data Exchange (ETDEWEB)

    shelton-davis; Colleen Shelton-Davis; Greg Housley

    2005-10-01

    The current disposal path for high-level waste is to place the material into secure waste packages that are inserted into a repository. The Idaho National Laboratory has been tasked with the development, design, and demonstration of the waste package closure system for the repository project. The closure system design includes welding three lids and a purge port cap, four methods of nondestructive examination, and evacuation and backfill of the waste package, all performed in a remote environment. A demonstration of the closure system will be performed with a full-scale waste package.

  10. Yucca Mountain Waste Package Closure System

    Energy Technology Data Exchange (ETDEWEB)

    Herschel Smartt; Arthur Watkins; David Pace; Rodney Bitsoi; Eric Larsen; Timothy McJunkin; Charles Tolle

    2006-04-01

    The current disposal path for high-level waste is to place the material into secure waste packages that are inserted into a repository. The Idaho National Laboratory has been tasked with the development, design, and demonstration of the waste package closure system for the repository project. The closure system design includes welding three lids and a purge port cap, four methods of nondestructive examination, and evacuation and backfill of the waste package, all performed in a remote environment. A demonstration of the closure system will be performed with a full-scale waste package.

  11. Identification and characterisation of factors affecting losses in the large-scale, non-ventilated bulk storage of wood chips and development of best storage practices

    Energy Technology Data Exchange (ETDEWEB)

    Garstang, J.; Weekes, A.; Poulter, R.; Bartlett, D.

    2002-07-01

    The report describes the findings of a study to determine the factors affecting the commercial storage of wood chips for biomass power generation in the UK. The UK's first such plant in North Yorkshire uses a mixture of forestry residues and short rotation coppice (SRC) willow, where problems with the stored fuel highlighted the need to determine best storage practices. Two wood chip piles were built (one with willow chip and the other with wood chips from board leaf forestry residues) and monitored (moisture, temperature, chemical composition, spore numbers and species, heat and air flows, bulk density, etc). Local weather data was also obtained. Recommendations for future storage practices are made.

  12. nu-TRLan User Guide Version 1.0: A High-Performance Software Package for Large-Scale Harmitian Eigenvalue Problems

    Energy Technology Data Exchange (ETDEWEB)

    Yamazaki, Ichitaro; Wu, Kesheng; Simon, Horst

    2008-10-27

    The original software package TRLan, [TRLan User Guide], page 24, implements the thick restart Lanczos method, [Wu and Simon 2001], page 24, for computing eigenvalues {lambda} and their corresponding eigenvectors v of a symmetric matrix A: Av = {lambda}v. Its effectiveness in computing the exterior eigenvalues of a large matrix has been demonstrated, [LBNL-42982], page 24. However, its performance strongly depends on the user-specified dimension of a projection subspace. If the dimension is too small, TRLan suffers from slow convergence. If it is too large, the computational and memory costs become expensive. Therefore, to balance the solution convergence and costs, users must select an appropriate subspace dimension for each eigenvalue problem at hand. To free users from this difficult task, nu-TRLan, [LNBL-1059E], page 23, adjusts the subspace dimension at every restart such that optimal performance in solving the eigenvalue problem is automatically obtained. This document provides a user guide to the nu-TRLan software package. The original TRLan software package was implemented in Fortran 90 to solve symmetric eigenvalue problems using static projection subspace dimensions. nu-TRLan was developed in C and extended to solve Hermitian eigenvalue problems. It can be invoked using either a static or an adaptive subspace dimension. In order to simplify its use for TRLan users, nu-TRLan has interfaces and features similar to those of TRLan: (1) Solver parameters are stored in a single data structure called trl-info, Chapter 4 [trl-info structure], page 7. (2) Most of the numerical computations are performed by BLAS, [BLAS], page 23, and LAPACK, [LAPACK], page 23, subroutines, which allow nu-TRLan to achieve optimized performance across a wide range of platforms. (3) To solve eigenvalue problems on distributed memory systems, the message passing interface (MPI), [MPI forum], page 23, is used. The rest of this document is organized as follows. In Chapter 2 [Installation

  13. Challenges in the Packaging of MEMS

    Energy Technology Data Exchange (ETDEWEB)

    BROWN, WILLIAM D.; EATON, WILLIAM P.; MALSHE, AJAY P.; MILLER, WILLIAM M.; O' NEAL, CHAD; SINGH, SUSHILA B.

    1999-09-24

    Microelectromechanical Systems (MEMS) packaging is much different from conventional integrated circuit (IC) packaging. Many MEMS devices must interface to the environment in order to perform their intended function, and the package must be able to facilitate access with the environment while protecting the device. The package must also not interfere with or impede the operation of the MEMS device. The die attachment material should be low stress, and low outgassing, while also minimizing stress relaxation overtime which can lead to scale factor shifts in sensor devices. The fabrication processes used in creating the devices must be compatible with each other, and not result in damage to the devices. Many devices are application specific requiring custom packages that are not commercially available. Devices may also need media compatible packages that can protect the devices from harsh environments in which the MEMS device may operate. Techniques are being developed to handle, process, and package the devices such that high yields of functional packaged parts will result. Currently, many of the processing steps are potentially harmful to MEMS devices and negatively affect yield. It is the objective of this paper to review and discuss packaging challenges that exist for MEMS systems and to expose these issues to new audiences from the integrated circuit packaging community.

  14. Packaging Aspects of Photodetector Modules for 100 Gbit/s Ethernet Applications

    DEFF Research Database (Denmark)

    Jiang, Chenhui; Mekonnen, G.G.; Krozer, Viktor;

    2008-01-01

    Packaging is a major problem at millimetre-wave frequencies approaching 100 GHz. In this paper we present that insertion losses in a multi-chip module (MCM) can be less IL <0.6 dB at 100 GHz. The paper also analyzes in detail resonance modes in the packages. The characteristic of conductor-backed...

  15. Packetizing OCP Transactions in the MANGO Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    The scaling of CMOS technology causes a widening gap between the performance of on-chip communication and computation. This calls for a communication-centric design flow. The MANGO network-on-chip architecture enables globally asynchronous locally synchronous (GALS) system-on-chip design, while...

  16. The ideal chip is not enough: Issues retarding the success of wide band-gap devices

    Science.gov (United States)

    Kaminski, Nando

    2017-04-01

    Semiconductor chips made from the wide band-gap (WBG) materials silicon carbide (SiC) or gallium nitride (GaN) are already approaching the theoretical limits given by the respective materials. Unfortunately, their advantages over silicon devices cannot be fully exploited due to limitations imposed by the device packaging or the circuitry around the semiconductors. Stray inductances slow down the switching speed and increase losses, packaging materials limit the maximum temperature and the maximum useful temperature swing, and passives limit the maximum switching frequency. All these issues have to be solved or at least minimised to make WBG attractive for a wider range of applications and, consequently, to profit from the economy of scale.

  17. Developments of optimum flip-chip bonding process

    Science.gov (United States)

    Jang, Dong H.; Kang, Sa Y.; Lee, Y. M.; Oh, S. Y.

    1997-08-01

    Flip-chip soldering is the critical technology for solving the current issues of electronic packaging industries that require the high I/O's. In order to increase the manufacturing ability of flip-chip technology, however, yield and reliability tissues should overcome. In this study, optimum flip-chip bonding process has been developed by using the test chips that had the electroplated solder bumps. Test chips are composed of three different types that are i) peripheral array pad chip, ii) peripheral array pad chip, and iii) area array pad chip. Each test chip has the daisy chain to consider the effect of reliability test. The electrical resistance was measured before and after reliability test. Based on these measurement, failure mode resulted from the moisture absorption was studied using scanning acoustic microscope. To achieve an optimum reflow profile of solder bump, correct temperature profile was set up with respect to the resin base flux. Different bonding forces were tested. Four underfill encapsulants were evaluated for minimum voids that caused the severe defects after reliability test. Also, the gap heights were measured with respect to applied bonding force after underfill was performed. Results from the moisture absorption and thermal cycling were discussed for flip-chip bonding on BT-resin substrates. The test vehicles using flip-chip technology have passed moisture preconditioning and temperature cycling tests.

  18. Alumina Based 500 C Electronic Packaging Systems and Future Development

    Science.gov (United States)

    Chen, Liang-Yu

    2012-01-01

    NASA space and aeronautical missions for probing the inner solar planets as well as for in situ monitoring and control of next-generation aeronautical engines require high-temperature environment operable sensors and electronics. A 96% aluminum oxide and Au thick-film metallization based packaging system including chip-level packages, printed circuit board, and edge-connector is in development for high temperature SiC electronics. An electronic packaging system based on this material system was successfully tested and demonstrated with SiC electronics at 500 C for over 10,000 hours in laboratory conditions previously. In addition to the tests in laboratory environments, this packaging system has more recently been tested with a SiC junction field effect transistor (JFET) on low earth orbit through the NASA Materials on the International Space Station Experiment 7 (MISSE7). A SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE7 suite to International Space Station via a Shuttle mission and tested on the orbit for eighteen months. A summary of results of tests in both laboratory and space environments will be presented. The future development of alumina based high temperature packaging using co-fired material systems for improved performance at high temperature and more feasible mass production will also be discussed.

  19. Micro packaged MEMS pressure sensor for intracranial pressure measurement

    Science.gov (United States)

    Xiong, Liu; Yan, Yao; Jiahao, Ma; Yanhang, Zhang; Qian, Wang; Zhaohua, Zhang; Tianling, Ren

    2015-06-01

    This paper presents a micro packaged MEMS pressure sensor for intracranial pressure measurement which belongs to BioMEMS. It can be used in lumbar puncture surgery to measure intracranial pressure. Miniaturization is key for lumbar puncture surgery because the sensor must be small enough to allow it be placed in the reagent chamber of the lumbar puncture needle. The size of the sensor is decided by the size of the sensor chip and package. Our sensor chip is based on silicon piezoresistive effect and the size is 400 × 400 μm2. It is much smaller than the reported polymer intracranial pressure sensors such as liquid crystal polymer sensors. In terms of package, the traditional dual in-line package obviously could not match the size need, the minimal size of recently reported MEMS-based intracranial pressure sensors after packaging is 10 × 10 mm2. In this work, we are the first to introduce a quad flat no-lead package as the package form of piezoresistive intracranial pressure sensors, the whole size of the sensor is minimized to only 3 × 3 mm2. Considering the liquid measurement environment, the sensor is gummed and waterproof performance is tested; the sensitivity of the sensor is 0.9 × 10-2 mV/kPa. Project supported by the National Natural Science Foundation of China (Nos. 61025021, 61434001), and the ‘Thousands Talents’ Program for Pioneer Researchers and Its Innovation Team, China.

  20. The reduction of packaging waste

    Energy Technology Data Exchange (ETDEWEB)

    Raney, E.A.; Hogan, J.J.; McCollom, M.L.; Meyer, R.J.

    1994-04-01

    Nationwide, packaging waste comprises approximately one-third of the waste disposed in sanitary landfills. the US Department of Energy (DOE) generated close to 90,000 metric tons of sanitary waste. With roughly one-third of that being packaging waste, approximately 30,000 metric tons are generated per year. The purpose of the Reduction of Packaging Waste project was to investigate opportunities to reduce this packaging waste through source reduction and recycling. The project was divided into three areas: procurement, onsite packaging and distribution, and recycling. Waste minimization opportunities were identified and investigated within each area, several of which were chosen for further study and small-scale testing at the Hanford Site. Test results, were compiled into five ``how-to`` recipes for implementation at other sites. The subject of the recipes are as follows: (1) Vendor Participation Program; (2) Reusable Containers System; (3) Shrink-wrap System -- Plastic and Corrugated Cardboard Waste Reduction; (4) Cardboard Recycling ; and (5) Wood Recycling.

  1. Comparison of the copper and gold wire bonding processes for LED packaging*

    Institute of Scientific and Technical Information of China (English)

    Chen Zhaohui; Liu Yong; Liu Sheng

    2011-01-01

    Wire bonding is one of the main processes of the LED packaging which provides electrical interconnection between the LED chip and lead frame The gold wire bonding process has been widely used in LED packaging industry currently. However, due to the high cost of gold wire, copper wire bonding is a good substitute for the gold wire bonding which can lead to significant cost saving. In this paper, the copper and gold wire bonding processes on the high power LED chip are compared and analyzed with finite element simulation. This modeling work may provide guidelines for the parameter optimization of coppor wire bonding process on the high power LED packaging.

  2. Microfabrication of MEMS alkali metal vapor cells for chip-scale atomic devices%芯片级原子器件MEMS碱金属蒸气腔室制作

    Institute of Scientific and Technical Information of China (English)

    尤政; 马波; 阮勇; 陈硕; 张高飞

    2013-01-01

    提出了基于两步低温阳极键合工艺的碱金属蒸气腔室制作方法,用于实现原子钟、原子磁力计及原子陀螺仪等器件的芯片级集成.由微机电系统(MEMS)体硅工艺制备了腔室结构.首先采用标准工艺将刻蚀有腔室的硅圆片与Pyrex玻璃阳极键合成预成型腔室,然后引入氮缓冲气体和由惰性石蜡包覆的微量碱金属铷或铯.通过两步阳极键合来密封腔室,键合温度低于石蜡燃点198℃.第一步键合预封装腔室,键合电压小于缓冲气体的击穿电压.第二步键合在大气氛围中进行,电压增至1 200 V来增强封装质量.通过高功率激光器局部加热释放碱金属,同时在腔壁上形成均匀的石蜡镀层以延长极化原子寿命.本文实现了160℃的低温阳极键合封装,键合率达到95%以上.封装的碱金属铷释放后仍具有金属光泽,实现的最小双腔室体积为6.5 mm×4.5 mm×2 mm.铷的吸收光谱表明铷有效地封装在腔室中,证明两步低温阳极键合工艺制作碱金属蒸气腔室是可行的.%This paper reported on the microfabrication of alkali metal vapor cells based on the two-step low temperature anodic bonding for the chip-scale integration of atomic clock,atomic magnetometer,atomic gyroscope and other atomic devices.Cell structures were fabricated by Micro-electromechanical System (MEMS) bulk silicon process,and the etched silicon with cells was firstly bonded to Pyrex glass to fabricate preformed chambers by the standard anodic bonding process.Then,nitrogen buffer gas and micro-scale alkali metal (rubidium or cesium) were introduced into the preformed cells.The two-step anodic bonding process was used to seal the cells at a temperature lower than the paraffin flash point (198 ℃).In the first step,bonding voltage was lower than the breakdown voltage of nitrogen buffer gas to pre-seal the cells.In the second step,the bonding was in air atmosphere,and the bonding voltage increased up to 1

  3. CH Packaging Operations Manual

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2005-06-13

    This procedure provides instructions for assembling the CH Packaging Drum payload assembly, Standard Waste Box (SWB) assembly, Abnormal Operations and ICV and OCV Preshipment Leakage Rate Tests on the packaging seals, using a nondestructive Helium (He) Leak Test.

  4. Merganser Download Package

    Data.gov (United States)

    U.S. Environmental Protection Agency — This data download package contains an Esri 10.0 MXD, file geodatabase and copy of this FGDC metadata record. The data in this package are used in support of the...

  5. Dual Use Packaging Project

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA seeks down-weighted packaging compatible with microwave preparation and perhaps high hydrostatic pressure processing. New packaging must satisfy NASA's 3-year...

  6. Chips 2020

    CERN Document Server

    2016-01-01

    The release of this second volume of CHIPS 2020 coincides with the 50th anniversary of Moore’s Law, a critical year marked by the end of the nanometer roadmap and by a significantly reduced annual rise in chip performance. At the same time, we are witnessing a data explosion in the Internet, which is consuming 40% more electrical power every year, leading to fears of a major blackout of the Internet by 2020. The messages of the first CHIPS 2020, published in 2012, concerned the realization of quantum steps for improving the energy efficiency of all chip functions. With this second volume, we review these messages and amplify upon the most promising directions: ultra-low-voltage electronics, nanoscale monolithic 3D integration, relevant-data, brain- and human-vision-inspired processing, and energy harvesting for chip autonomy. The team of authors, enlarged by more world leaders in low-power, monolithic 3D, video, and Silicon brains, presents new vistas in nanoelectronics, promising  Moore-like exponential g...

  7. High curvature bending characterization of ultra-thin chips and chip-on-foil assemblies

    NARCIS (Netherlands)

    Ende, D. van den; Verhoeven, F.; Eijnden, P. van der; Kusters, R.; Sridhar, A.; Cauwe, M.; Brand, J. van den

    2013-01-01

    Ultra-thin chips of less than 20μm become flexible, allowing integration of silicon IC technology with highly flexible electronics. This combination allows for highly intelligent products of unprecedented thinness, flexibility and cost. Examples include sensor systems integrated into food packaging

  8. Packaging Printing Today

    OpenAIRE

    Bolanča, Stanislav; Majnarić, Igor; Golubović, Kristijan

    2015-01-01

    Printing packaging covers today about 50% of all the printing products. Among the printing products there are printing on labels, printing on flexible packaging, printing on folding boxes, printing on the boxes of corrugated board, printing on glass packaging, synthetic and metal ones. The mentioned packaging are printed in flexo printing technique, offset printing technique, intaglio halftone process, silk – screen printing, ink ball printing, digital printing and hybrid print...

  9. Materials for advanced packaging

    CERN Document Server

    Lu, Daniel

    2010-01-01

    Significant progress has been made in advanced packaging in recent years. Several new packaging techniques have been developed and new packaging materials have been introduced. This book provides a comprehensive overview of the recent developments in this industry, particularly in the areas of microelectronics, optoelectronics, digital health, and bio-medical applications. The book discusses established techniques, as well as emerging technologies, in order to provide readers with the most up-to-date developments in advanced packaging.

  10. Materials for advanced packaging

    CERN Document Server

    Wong, CP

    2008-01-01

    Significant progress has been made in advanced packaging in recent years. Several new packaging techniques have been developed and new packaging materials have been introduced. This book provides a comprehensive overview of the recent developments in this industry, particularly in the areas of microelectronics, optoelectronics, digital health, and bio-medical applications. The book discusses established techniques, as well as emerging technologies, in order to provide readers with the most up-to-date developments in advanced packaging.

  11. Central heating: package boilers

    Energy Technology Data Exchange (ETDEWEB)

    Farahan, E.

    1977-05-01

    Performance and cost data for electrical and fossil-fired package boilers currently available from manufacturers are provided. Performance characteristics investigated include: unit efficiency, rated capacity, and average expected lifetime of units. Costs are tabulated for equipment and installation of various package boilers. The information supplied in this report will simplify the process of selecting package boilers required for industrial, commercial, and residential applications.

  12. Effect of Joint Scale and Processing on the Fracture of Sn-3Ag-0.5Cu Solder Joints: Application to Micro-bumps in 3D Packages

    Science.gov (United States)

    Talebanpour, B.; Huang, Z.; Chen, Z.; Dutta, I.

    2016-01-01

    In 3-dimensional (3D) packages, a stack of dies is vertically connected to each other using through-silicon vias and very thin solder micro-bumps. The thinness of the micro-bumps results in joints with a very high volumetric proportion of intermetallic compounds (IMCs), rendering them much more brittle compared to conventional joints. Because of this, the reliability of micro-bumps, and the dependence thereof on the proportion of IMC in the joint, is of substantial concern. In this paper, the growth kinetics of IMCs in thin Sn-3Ag-0.5Cu joints attached to Cu substrates were analyzed, and empirical kinetic laws for the growth of Cu6Sn5 and Cu3Sn in thin joints were obtained. Modified compact mixed mode fracture mechanics samples, with adhesive solder joints between massive Cu substrates, having similar thickness and IMC content as actual micro-bumps, were produced. The effects of IMC proportion and strain rate on fracture toughness and mechanisms were investigated. It was found that the fracture toughness G C decreased with decreasing joint thickness ( h Joint). In addition, the fracture toughness decreased with increasing strain rate. Aging also promoted alternation of the crack path between the two joint-substrate interfaces, possibly proffering a mechanism to enhance fracture toughness.

  13. Flexible packaging for PV modules

    Science.gov (United States)

    Dhere, Neelkanth G.

    2008-08-01

    Economic, flexible packages that provide needed level of protection to organic and some other PV cells over >25-years have not yet been developed. However, flexible packaging is essential in niche large-scale applications. Typical configuration used in flexible photovoltaic (PV) module packaging is transparent frontsheet/encapsulant/PV cells/flexible substrate. Besides flexibility of various components, the solder bonds should also be flexible and resistant to fatigue due to cyclic loading. Flexible front sheets should provide optical transparency, mechanical protection, scratch resistance, dielectric isolation, water resistance, UV stability and adhesion to encapsulant. Examples are Tefzel, Tedlar and Silicone. Dirt can get embedded in soft layers such as silicone and obscure light. Water vapor transmittance rate (WVTR) of polymer films used in the food packaging industry as moisture barriers are ~0.05 g/(m2.day) under ambient conditions. In comparison, light emitting diodes employ packaging components that have WVTR of ~10-6 g/(m2.day). WVTR of polymer sheets can be improved by coating them with dense inorganic/organic multilayers. Ethylene vinyl acetate, an amorphous copolymer used predominantly by the PV industry has very high O2 and H2O diffusivity. Quaternary carbon chains (such as acetate) in a polymer lead to cleavage and loss of adhesional strength at relatively low exposures. Reactivity of PV module components increases in presence of O2 and H2O. Adhesional strength degrades due to the breakdown of structure of polymer by reactive, free radicals formed by high-energy radiation. Free radical formation in polymers is reduced when the aromatic rings are attached at regular intervals. This paper will review flexible packaging for PV modules.

  14. Service Packages – Attractiveness Has Many Faces

    Directory of Open Access Journals (Sweden)

    Ilona Bondos

    2016-01-01

    Full Text Available This article is an attempt to identify the impact of the customer age (especially the Baby boomers generation and the X and the Y generation on the assessment of incentives to buy service package. Belonging to different age generations seems to be important for the effectiveness of service packages sales – the entrance by the consumers in subsequent phases of the life cycle is related to their perception of the market offer. The starting point for the empirical part of the article was to analyze the different average scores attractiveness of the ten packages service features (incentives to purchase. Then, using multidimensional scaling authors determined the similarity or dissimilarity data on a set of applied incentives to use service packages. Visible differences indicate a different perception of the attractiveness of packages representatives of the Baby boomer generation and Y generation. Managerial implications and directions for future research are discussed.

  15. Active Packaging Coatings

    Directory of Open Access Journals (Sweden)

    Luis J. Bastarrachea

    2015-11-01

    Full Text Available Active food packaging involves the packaging of foods with materials that provide an enhanced functionality, such as antimicrobial, antioxidant or biocatalytic functions. This can be achieved through the incorporation of active compounds into the matrix of the commonly used packaging materials, or by the application of coatings with the corresponding functionality through surface modification. The latter option offers the advantage of preserving the packaging materials’ bulk properties nearly intact. Herein, different coating technologies like embedding for controlled release, immobilization, layer-by-layer deposition, and photografting are explained and their potential application for active food packaging is explored and discussed.

  16. Coupling structure in LED System-in-Package design: a physical responses-based critical parameter sheet like approach

    NARCIS (Netherlands)

    Borst, E.C.M. de; Gielen, A.W.J.; Etman, L.F.P.

    2012-01-01

    This paper introduces an approach to study the coupling structure between the design parameters and design objectives of a LED system-in-package (SiP) design concept [1]. The LED SiP is an integrated device that combines the LED chip with driver chips and potential other components in a single packa

  17. System-in-package technologies for photonics

    Science.gov (United States)

    Tekin, Tolga

    2010-02-01

    System-in-package technology is announced as one of the key technologies, which enables the continued increase in functional density and decrease in cost per function required to maintain the progress of electronics by utilizing 3D through innovation in packaging and interconnect technology. A key bottleneck to the realization of high-performance microelectronic systems is the lack of low latency, high-bandwidth, and high density off-chip interconnects. Photonics could overcome these challenges and leverage low-latency and high bandwidth communication within next generation architectures. In this paper state-of-the-art approaches will be discussed and the requirements in 3D integration perspective of converging platforms will be addressed.

  18. Automating dChip: toward reproducible sharing of microarray data analysis

    Directory of Open Access Journals (Sweden)

    Li Cheng

    2008-05-01

    Full Text Available Abstract Background During the past decade, many software packages have been developed for analysis and visualization of various types of microarrays. We have developed and maintained the widely used dChip as a microarray analysis software package accessible to both biologist and data analysts. However, challenges arise when dChip users want to analyze large number of arrays automatically and share data analysis procedures and parameters. Improvement is also needed when the dChip user support team tries to identify the causes of reported analysis errors or bugs from users. Results We report here implementation and application of the dChip automation module. Through this module, dChip automation files can be created to include menu steps, parameters, and data viewpoints to run automatically. A data-packaging function allows convenient transfer from one user to another of the dChip software, microarray data, and analysis procedures, so that the second user can reproduce the entire analysis session of the first user. An analysis report file can also be generated during an automated run, including analysis logs, user comments, and viewpoint screenshots. Conclusion The dChip automation module is a step toward reproducible research, and it can prompt a more convenient and reproducible mechanism for sharing microarray software, data, and analysis procedures and results. Automation data packages can also be used as publication supplements. Similar automation mechanisms could be valuable to the research community if implemented in other genomics and bioinformatics software packages.

  19. APPLICATION OF NANOTECHNOLOGY IN FOOD PACKAGING

    Directory of Open Access Journals (Sweden)

    Renata Dobrucka

    2014-04-01

    Full Text Available Nanotechnology involves the design, production and use of structures through control of the size and shape of the materials at the nanometre scale. Also, nanomaterials have been already applied in many fields of human life. Nanocomposites have already led to several innovations with potential applications in the food packaging sector. The use of nanocomposite formulations is expected to considerably enhance the shelf-life of many types of food. This improvement can lead to lower weight packages because less material is needed to obtain the same or even better barrier properties. This, in turn, can lead to reduced package cost with less packaging waste. Antimicrobial packaging is another area with high potential for applying nanocomposite technology. Nanostructured antimicrobials have a higher surface area-to-volume ratio when compared with their higher scale counterparts. Therefore, antimicrobial nanocomposite packaging systems are supposed to be particularly efficient in their activities against microbial cells. In this review, definition of nanomaterials is presented. Besides, the paper shows examples of nanocomposities and antimicrobial nanopackaging mainly with the use of nanosilver. Moreover, nanoparticles such ZnO, TiO2, MgO and nanosensors in packaging were presented.

  20. Mechanical and electrical properties of ultra-thin chips and flexible electronics assemblies during bending

    NARCIS (Netherlands)

    Van Den Ende, D.A.; Van De Wiel, H.J.; Kusters, R.H.L.; Sridhar, A.; Schram, J.F.M.; Cauwe, M.; Van Den Brand, J.

    2014-01-01

    Ultra-thin chips of less than 20 μm become flexible, allowing integration of silicon IC technology with highly flexible electronics such as food packaging sensor systems or healthcare and sport monitoring tags as wearable patches or even directly in clothing textile. The ultra-thin chips in these pr

  1. Cleanup Verification Package for the 118-F-1 Burial Ground

    Energy Technology Data Exchange (ETDEWEB)

    E. J. Farris and H. M. Sulloway

    2008-01-10

    This cleanup verification package documents completion of remedial action for the 118-F-1 Burial Ground on the Hanford Site. This burial ground is a combination of two locations formerly called Minor Construction Burial Ground No. 2 and Solid Waste Burial Ground No. 2. This waste site received radioactive equipment and other miscellaneous waste from 105-F Reactor operations, including dummy elements and irradiated process tubing; gun barrel tips, steel sleeves, and metal chips removed from the reactor; filter boxes containing reactor graphite chips; and miscellaneous construction solid waste.

  2. Vacuum packaging technology for mass production of uncooled IRFPAs

    Science.gov (United States)

    Ito, Takuya; Tokuda, Takayuki; Kimata, Masafumi; Abe, Hideyuki; Tokashiki, Naotaka

    2009-05-01

    We developed vacuum packaging equipment and low-cost vacuum packaging technology for the mass production of uncooled IRFPAs. The equipment consists of two chambers with identical construction. Two-chamber architecture provides flexibility in the vacuum packaging process, so we can bake the components and achieve getter activation by heating, stem/cap soldering, and cap/window soldering in a series under high-vacuum conditions. Heaters and component-holding jigs are made of graphite to assure rapid and uniform heating to 500°C. The batch size is 27 if we choose a 15-mm diameter TO8 package and can be increased by enlarging the graphite heater area. We also developed a micro-vacuum gauge to evaluate the vacuum level in encapsulated packages. The operation principle of this vacuum gauge is based on thermal conduction by air molecules. It can be integrated in IRFPA chips since the fabrication process is compatible with that for IRFPAs. We encapsulated the vacuum gauges in TO8 packages with our vacuum packaging equipment, and confirmed that the pressure in fabricated packages is sufficiently low for high performance IRFPA operation (<< 1 Pa) with the micro-vacuum gauges.

  3. Packaging for Sustainability

    CERN Document Server

    Lewis, Helen; Fitzpatrick, Leanne

    2012-01-01

    The packaging industry is under pressure from regulators, customers and other stakeholders to improve packaging’s sustainability by reducing its environmental and societal impacts. This is a considerable challenge because of the complex interactions between products and their packaging, and the many roles that packaging plays in the supply chain. Packaging for Sustainability is a concise and readable handbook for practitioners who are trying to implement sustainability strategies for packaging. Industry case studies are used throughout the book to illustrate possible applications and scenarios. Packaging for Sustainability draws on the expertise of researchers and industry practitioners to provide information on business benefits, environmental issues and priorities, environmental evaluation tools, design for environment, marketing strategies, and challenges for the future.

  4. Packaged die heater

    Science.gov (United States)

    Spielberger, Richard; Ohme, Bruce Walker; Jensen, Ronald J.

    2011-06-21

    A heater for heating packaged die for burn-in and heat testing is described. The heater may be a ceramic-type heater with a metal filament. The heater may be incorporated into the integrated circuit package as an additional ceramic layer of the package, or may be an external heater placed in contact with the package to heat the die. Many different types of integrated circuit packages may be accommodated. The method provides increased energy efficiency for heating the die while reducing temperature stresses on testing equipment. The method allows the use of multiple heaters to heat die to different temperatures. Faulty die may be heated to weaken die attach material to facilitate removal of the die. The heater filament or a separate temperature thermistor located in the package may be used to accurately measure die temperature.

  5. Heterogeneously integrated microsystem-on-a-chip

    Science.gov (United States)

    Chanchani, Rajen

    2008-02-26

    A microsystem-on-a-chip comprises a bottom wafer of normal thickness and a series of thinned wafers can be stacked on the bottom wafer, glued and electrically interconnected. The interconnection layer comprises a compliant dielectric material, an interconnect structure, and can include embedded passives. The stacked wafer technology provides a heterogeneously integrated, ultra-miniaturized, higher performing, robust and cost-effective microsystem package. The highly integrated microsystem package, comprising electronics, sensors, optics, and MEMS, can be miniaturized both in volume and footprint to the size of a bottle-cap or less.

  6. Adapting MCM-D technology to a piezoresistive accelerometer packaging

    Science.gov (United States)

    Collado, A.; Plaza, J. A.; Cabruja, E.; Esteve, J.

    2003-07-01

    A silicon-on-silicon multichip module for a piezoresistive accelerometer is presented in this paper. This packaging technology, a type of wafer level packaging, offers fully complementary metal-oxide semiconductor compatible silicon substrates, so a pre-amplification stage can be included at substrate level. The electrical contacts and a partial sealing of the sensor mobile structures are performed at the same step using flip-chip technology, so the cost is reduced. As accelerometers are stress-sensitive devices, great care must be taken in the fabrication process and materials. Thus, test structures have been included to study the packaging effects. In this paper we report on the compatibility of accelerometer and wafer level packaging technologies.

  7. NASA Electronic Parts and Packaging (NEPP) Program - Update

    Science.gov (United States)

    LaBel, Kenneth A.; Sampson, Michael J.

    2010-01-01

    This slide presentation reviews the goals and mission of the NASA Electronic Parts and Packaging (NEPP) Program. The NEPP mission is to provide guidance to NASA for the selection and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission assurance needs. The program has been supporting NASA for over 20 years. The focus is on the reliability aspects of electronic devices. In this work the program also supports the electronics industry. There are several areas that the program is involved in: Memories, systems on a chip (SOCs), data conversion devices, power MOSFETS, power converters, scaled CMOS, capacitors, linear devices, fiber optics, and other electronics such as sensors, cryogenic and SiGe that are used in space systems. Each of these area are reviewed with the work that is being done in reliability and effects of radiation on these technologies.

  8. Packaging and testing of multi-wavelength DFB laser array using REC technology

    Science.gov (United States)

    Ni, Yi; Kong, Xuan; Gu, Xiaofeng; Chen, Xiangfei; Zheng, Guanghui; Luan, Jia

    2014-02-01

    Packaging of distributed feedback (DFB) laser array based on reconstruction-equivalent-chirp (REC) technology is a bridge from chip to system, and influences the practical process of REC chip. In this paper, DFB laser arrays of 4-channel @1310 nm and 8-channel @1550 nm are packaged. Our experimental results show that both these laser arrays have uniform wavelength spacing and larger than 35 dB average Side Mode Suppression Ratio (SMSR). When I=35 mA, we obtain the total output power of 1 mW for 4-channel @1310 nm, and 227 μw for 8-channel @1550 nm respectively. The high frequency characteristics of the packaged chips are also obtained, and the requirements for 4×10 G or even 8×10 G systems can be reached. Our results demonstrate the practical and low cost performance of REC technology and indicate its potential in the future fiber-to-the-home (FTTH) application.

  9. LED packaging for lighting applications design, manufacturing, and testing

    CERN Document Server

    Liu, Sheng

    2011-01-01

    Since the first light-emitting diode (LED) was invented by Holonyak and Bevacqua in 1962, LEDs have made remarkable progress in the past few decades with the rapid development of epitaxy growth, chip design and manufacture, packaging structure, processes, and packaging materials. LEDs have superior characteristics such as high efficiency, small size, long life, low power consumption, and high reliability. The market for white LED is growing rapidly in various applications. It has been widely accepted that white LEDs will be the fourth illumination source to substitute the incandescent, fluores

  10. Realtime 3D stress measurement in curing epoxy packaging

    DEFF Research Database (Denmark)

    Richter, Jacob; Hyldgård, A.; Birkelund, Karen;

    2007-01-01

    This paper presents a novel method to characterize stress in microsystem packaging. A circular p-type piezoresistor is implemented on a (001) silicon chip. We use the circular stress sensor to determine the packaging induced stress in a polystyrene tube filled with epoxy. The epoxy curing process...... is monitored by stress measurements. From the stress measurements we conclude that the epoxy cures in 8 hours at room temperature. We find the difference in in-plane normal stresses to be sigmaxx-sigmayy=6.7 MPa and (sigmaxx+sigmayy-0.4sigmazz)=232 MPa....

  11. Cool down computer chips with liquid metal device driven by the heat of chips

    Institute of Scientific and Technical Information of China (English)

    2008-01-01

    @@ With the soaring advances in computational speed, thermal management becomes a major concern in computer systems. To remove heat generated by computer chips or very large scale integrated circuits, a research team headed by Prof.

  12. WASTE PACKAGE TRANSPORTER DESIGN

    Energy Technology Data Exchange (ETDEWEB)

    D.C. Weddle; R. Novotny; J. Cron

    1998-09-23

    The purpose of this Design Analysis is to develop preliminary design of the waste package transporter used for waste package (WP) transport and related functions in the subsurface repository. This analysis refines the conceptual design that was started in Phase I of the Viability Assessment. This analysis supports the development of a reliable emplacement concept and a retrieval concept for license application design. The scope of this analysis includes the following activities: (1) Assess features of the transporter design and evaluate alternative design solutions for mechanical components. (2) Develop mechanical equipment details for the transporter. (3) Prepare a preliminary structural evaluation for the transporter. (4) Identify and recommend the equipment design for waste package transport and related functions. (5) Investigate transport equipment interface tolerances. This analysis supports the development of the waste package transporter for the transport, emplacement, and retrieval of packaged radioactive waste forms in the subsurface repository. Once the waste containers are closed and accepted, the packaged radioactive waste forms are termed waste packages (WP). This terminology was finalized as this analysis neared completion; therefore, the term disposal container is used in several references (i.e., the System Description Document (SDD)) (Ref. 5.6). In this analysis and the applicable reference documents, the term ''disposal container'' is synonymous with ''waste package''.

  13. User friendly packaging

    DEFF Research Database (Denmark)

    Geert Jensen, Birgitte

    2010-01-01

    Most consumers have experienced occasional problems with opening packaging. Tomato sauce from the tinned mackerel splattered all over the kitchen counter, the unrelenting pickle jar lid, and the package of sliced ham that cannot be opened without a knife or a pair of scissors. The research project...

  14. CYPROS - Cybernetic Program Packages

    Directory of Open Access Journals (Sweden)

    Arne Tyssø

    1980-10-01

    Full Text Available CYPROS is an interactive program system consisting of a number of special purpose packages for simulation, identification, parameter estimation and control system design. The programming language is standard FORTRAN IV and the system is implemented on a medium size computer system (Nord-10. The system is interactive and program control is obtained by the use of numeric terminals. Output is rapidly examined by extensive use of video colour graphics. The subroutines included in the packages are designed and documented according to standardization rules given by the SCL (Scandinavian Control Library organization. This simplifies the exchange of subroutines throughout the SCL system. Also, this makes the packages attractive for implementation by industrial users. In the simulation package, different integration methods are available and it can be easily used for off-line, as well as real time, simulation problems. The identification package consists of programs for single-input/single-output and multivariablc problems. Both transfer function models and state space models can be handled. Optimal test signals can be designed. The control package consists of programs based on multivariable time domain and frequency domain methods for analysis and design. In addition, there is a package for matrix and time series manipulation. CYPROS has been applied successfully to industrial problems of various kinds, and parts of the system have already been implemented on different computers in industry. This paper will, in some detail, describe the use and the contents of the packages and some examples of application will be discussed.

  15. Grooming. Learning Activity Package.

    Science.gov (United States)

    Stark, Pamela

    This learning activity package on grooming for health workers is one of a series of 12 titles developed for use in health occupations education programs. Materials in the package include objectives, a list of materials needed, information sheets, reviews (self evaluations) of portions of the content, and answers to reviews. These topics are…

  16. Packaging issues: avoiding delamination.

    Science.gov (United States)

    Hall, R

    2005-10-01

    Manufacturers can minimise delamination occurrence by applying the appropriate packaging design and process features. The end user can minimise the impact of fibre tear and reduce subsequent delamination by careful package opening. The occasional inconvenient delamination is a small price to pay for the high level of sterility assurance that comes with the use of Tyvek.

  17. 产品导向的先进封装设计%Product-Oriented Advanced Packaging Design

    Institute of Scientific and Technical Information of China (English)

    沈文龙; 符会利; 梁立慧; 陈有志; 林志荣; 仲镇华

    2006-01-01

    Cost-effective and reliable electronic packaging has been identified as not only a major driving force but also an enabling technology in today's highly competitive electronics industry, especially for the wireless/portable electronic products which require lighter, smaller form-factors electronic components or modules. In order to meet the demands from the above drivers, microelectronics packaging and interconnect related technologies have evolved from wire bond to flip chip, and eventually to wafer-level chip scale package (WLCSP); from peripheral to area array interconnects; from ceramic to organic substrate materials; and from single chip package to multi-chips system-in-package (SiP).In fact, SiP possesses a number of advantages over conventional packaging and therefore in this study we first present an overview on the recent developments and applications of SiP. It is also necessary to highlight that close co-ordination across the entire supply chain in the electronics industry is the key for prompt SiP implementation. Finally, we put forward to illustrate the critical demands on a centre with integrated packaging design, analysis and characterization capabilities to assist the industries in developingtheir own SiP products targeting for mass production.%在日益激烈竞争的电子工业中,高成本效益、高可靠性的电子封装方案不单是电子产品发展的主要驱动力,甚至往往成为当中的促成科技(Enabling Technology),用于轻巧、细小的无线电/可携带式消费性电子产品中尤见适合.其中更理想的性能效益(cost/performance ratio)、更短的产品开发周期、集多功能于一身的消费性电子产品亦是崭新科技应用的主要原动力.要达到以上目标,相关的微电子封装方案与焊接技术的进步是不可或缺的:例如从金属线焊接技术发展到倒装芯片技术,及至近年的晶圆级封装技术;从外围焊接(peripheral)发展到数组焊接(area-array);从陶制

  18. Packaging Technologies for 500 C SiC Electronics and Sensors: Challenges in Material Science and Technology

    Science.gov (United States)

    Chen, Liang-Yu; Neudeck, Philip G.; Behelm, Glenn M.; Spry, David J.; Meredith, Roger D.; Hunter, Gary W.

    2015-01-01

    This paper presents ceramic substrates and thick-film metallization based packaging technologies in development for 500C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550C. The 96 alumina packaging system composed of chip-level packages and PCBs has been successfully tested with high temperature SiC discrete transistor devices at 500C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC junction field-effect-transistor (JFET) with a packaging system composed of a 96 alumina chip-level package and an alumina printed circuit board was tested on low earth orbit for eighteen months via a NASA International Space Station experiment. In addition to packaging systems for electronics, a spark-plug type sensor package based on this high temperature interconnection system for high temperature SiC capacitive pressure sensors was also developed and tested. In order to further significantly improve the performance of packaging system for higher packaging density, higher operation frequency, power rating, and even higher temperatures, some fundamental material challenges must be addressed. This presentation will discuss previous development and some of the challenges in material science (technology) to improve high temperature dielectrics for packaging applications.

  19. Heat Transfer Characteristics in High Power LED Packaging

    OpenAIRE

    Chi-Hung Chung; Kai-Shing Yang; Kuo-Hsiang Chien; Ming-Shan Jeng; Ming-Tsang Lee

    2014-01-01

    This study uses the T3Ster transient thermal resistance measuring device to investigate the effects to heat transfer performances from different LED crystal grains, packaging methods and heat-sink substrates through the experimental method. The experimental parameters are six different types of LED modules that are made alternatively with the crystal grain structure, the die attach method and the carrying substrate. The crystal grain structure includes the lateral type, flip chip type and ver...

  20. Packaging Concerns/Techniques for Large Devices

    Science.gov (United States)

    Sampson, Michael J.

    2009-01-01

    This slide presentation reviews packaging challenges and options for electronic parts. The presentation includes information about non-hermetic packages, space challenges for packaging and complex package variations.

  1. 电子封装、QFP和MCM热变形的实验及数值分析%Experimental and Numerical Analysis of Thermal Deformation of Electronic Packages,QFP and MCM

    Institute of Scientific and Technical Information of China (English)

    2006-01-01

    Moiré inteferometry and FEA (finite element analysis) were used to evaluate the thermal deformation of two electronic packages, QFP (quad flat package) and MCM (multi chip module).Thermal loading was applied by cooling the packages from 100℃ to room temperature (25℃). Moiré fringes were obtained on the cross sections of the packages to clarify the effect of the CTE (coefficient of thermal expansion) mismatch of the micro components, such as silicon, metal and resin. In QFP, the effects of packaging resin and PCB (printed circuit board) on the thermal deformation were investigated. The effect of location of three silicon chips in MCM was also examined.

  2. PROSPECTS OF POLYMER PACKAGING MATERIALS

    Directory of Open Access Journals (Sweden)

    V. A. Sedykh

    2012-01-01

    Full Text Available The main types of materials used in the manufacture of packaging. Analyzed trends in further development of packaging materials. Shows how to improve the quality of plastic packaging materials in today's market.

  3. Hermeticity of electronic packages

    CERN Document Server

    Greenhouse, Hal; Romenesco, Bruce

    2011-01-01

    This is a book about the integrity of sealed packages to resist foreign gases and liquids penetrating the seal or an opening (crack) in the packageùespecially critical to the reliability and longevity of electronics. The author explains how to predict the reliability and the longevity of the packages based on leak rate measurements and the assumptions of impurities. Non-specialists in particular will benefit from the author's long involvement in the technology. Hermeticity is a subject that demands practical experience, and solving one problem does not necessarily give one the background to so

  4. Optoelectronic packaging: A review

    Energy Technology Data Exchange (ETDEWEB)

    Carson, R.F.

    1993-09-01

    Optoelectronics and photonics hold great potential for high data-rate communication and computing. Wide using in computing applications was limited first by device technologies and now suffers due to the need for high-precision, mass-produced packaging. The use of phontons as a medium of communication and control implies a unique set of packaging constraints that was not present in traditional telecommunications applications. The state-of-the-art in optoelectronic packaging is now driven by microelectric techniques that have potential for low cost and high volume manufacturing.

  5. Hermeticity of electronic packages

    CERN Document Server

    Greenhouse, Hal

    2000-01-01

    This is a book about the integrity of sealed packages to resist foreign gases and liquids penetrating the seal or an opening (crack) in the package-especially critical to the reliability and longevity of electronics. The author explains how to predict the reliability and the longevity of the packages based on leak rate measurements and the assumptions of impurities. Non-specialists in particular will benefit from the author's long involvement in the technology. Hermeticity is a subject that demands practical experience, and solving one problem does not necessarily give one the background to so

  6. 3-D readout-electronics packaging for high-bandwidth massively paralleled imager

    Science.gov (United States)

    Kwiatkowski, Kris; Lyke, James

    2007-12-18

    Dense, massively parallel signal processing electronics are co-packaged behind associated sensor pixels. Microchips containing a linear or bilinear arrangement of photo-sensors, together with associated complex electronics, are integrated into a simple 3-D structure (a "mirror cube"). An array of photo-sensitive cells are disposed on a stacked CMOS chip's surface at a 45.degree. angle from light reflecting mirror surfaces formed on a neighboring CMOS chip surface. Image processing electronics are held within the stacked CMOS chip layers. Electrical connections couple each of said stacked CMOS chip layers and a distribution grid, the connections for distributing power and signals to components associated with each stacked CSMO chip layer.

  7. Evaluation of thermal resistance constitution for packaged AlGaN/GaN high electron mobility transistors by structure function method

    Institute of Scientific and Technical Information of China (English)

    Zhang Guang-Chen; Feng Shi-Wei; Zhou Zhou; Li Jing-Wan; Guo Chun-Sheng

    2011-01-01

    The evaluation of thermal resistance constitution for packaged AlGaN/GaN high electron mobility transistor (HEMT) by structure function method is proposed in this paper. The evaluation is based on the transient heating measurement of the AlGaN/GaN HEMT by pulsed electrical temperature sensitive parameter method. The extracted chip-level and package-level thermal resistances of the packaged multi-finger AlGaN/GaN HEMT with 400-μn SiC substrate are 22.5 K/W and 7.2 K/W respectively, which provides a non-invasive method to evaluate the chip-level thermal resistance of packaged AlGaN/GaN HEMTs. It is also experimentally proved that the extraction of the chip-level thermal resistance by this proposed method is not influenced by package form of the tested device and temperature boundary condition of measurement stage.

  8. Dual Use Packaging Project

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA calculation that over a kg of packaging waste are generated per day for a 6 member crew. This represents over 1.5 metric tons of waste during a Mars mission....

  9. FLEXIBLE FOOD PACKAGING LABORATORY

    Data.gov (United States)

    Federal Laboratory Consortium — This laboratory contains equipment to fabricate and test prototype packages of many types and sizes (e.g., bags, pouches, trays, cartons, etc.). This equipment can...

  10. The RootChip: an integrated microfluidic chip for plant science.

    Science.gov (United States)

    Grossmann, Guido; Guo, Woei-Jiun; Ehrhardt, David W; Frommer, Wolf B; Sit, Rene V; Quake, Stephen R; Meier, Matthias

    2011-12-01

    Studying development and physiology of growing roots is challenging due to limitations regarding cellular and subcellular analysis under controlled environmental conditions. We describe a microfluidic chip platform, called RootChip, that integrates live-cell imaging of growth and metabolism of Arabidopsis thaliana roots with rapid modulation of environmental conditions. The RootChip has separate chambers for individual regulation of the microenvironment of multiple roots from multiple seedlings in parallel. We demonstrate the utility of The RootChip by monitoring time-resolved growth and cytosolic sugar levels at subcellular resolution in plants by a genetically encoded fluorescence sensor for glucose and galactose. The RootChip can be modified for use with roots from other plant species by adapting the chamber geometry and facilitates the systematic analysis of root growth and metabolism from multiple seedlings, paving the way for large-scale phenotyping of root metabolism and signaling.

  11. The RootChip: An Integrated Microfluidic Chip for Plant Science[W][OA

    Science.gov (United States)

    Grossmann, Guido; Guo, Woei-Jiun; Ehrhardt, David W.; Frommer, Wolf B.; Sit, Rene V.; Quake, Stephen R.; Meier, Matthias

    2011-01-01

    Studying development and physiology of growing roots is challenging due to limitations regarding cellular and subcellular analysis under controlled environmental conditions. We describe a microfluidic chip platform, called RootChip, that integrates live-cell imaging of growth and metabolism of Arabidopsis thaliana roots with rapid modulation of environmental conditions. The RootChip has separate chambers for individual regulation of the microenvironment of multiple roots from multiple seedlings in parallel. We demonstrate the utility of The RootChip by monitoring time-resolved growth and cytosolic sugar levels at subcellular resolution in plants by a genetically encoded fluorescence sensor for glucose and galactose. The RootChip can be modified for use with roots from other plant species by adapting the chamber geometry and facilitates the systematic analysis of root growth and metabolism from multiple seedlings, paving the way for large-scale phenotyping of root metabolism and signaling. PMID:22186371

  12. Lush Cosmetics packaging

    OpenAIRE

    Hudson, Frazer

    2014-01-01

    Frazer Hudson – Lush Cosmetics Packaging Commissioned by Suzie Hackney for Lush Cosmetics via illustration Agency - Debut Art - February 2014 I was approached in February 2014 via my London based Illustration agency Debut Art to create packaging illustration designs for the high street retailer and International cosmetics brand ‘Lush’. The illustrations would be used on an octagonal gift box set and be positioned amongst other bespoke gift box set designs within Lush Cosme...

  13. Assessment of the relationship between pre-chip and post-chip quality measures for Affymetrix GeneChip expression data

    Directory of Open Access Journals (Sweden)

    Augood Sarah J

    2006-04-01

    Full Text Available Abstract Background Gene expression microarray experiments are expensive to conduct and guidelines for acceptable quality control at intermediate steps before and after the samples are hybridised to chips are vague. We conducted an experiment hybridising RNA from human brain to 117 U133A Affymetrix GeneChips and used these data to explore the relationship between 4 pre-chip variables and 22 post-chip outcomes and quality control measures. Results We found that the pre-chip variables were significantly correlated with each other but that this correlation was strongest between measures of RNA quality and cRNA yield. Post-mortem interval was negatively correlated with these variables. Four principal components, reflecting array outliers, array adjustment, hybridisation noise and RNA integrity, explain about 75% of the total post-chip measure variability. Two significant canonical correlations existed between the pre-chip and post-chip variables, derived from MAS 5.0, dChip and the Bioconductor packages affy and affyPLM. The strongest (CANCOR 0.838, p Conclusion We have found that the post-chip variables having the strongest association with quantities measurable before hybridisation are those reflecting RNA integrity. Other aspects of quality, such as noise measures (reflecting the execution of the assay or measures reflecting data quality (outlier status and array adjustment variables are not well predicted by the variables we were able to determine ahead of time. There could be other variables measurable pre-hybridisation which may be better associated with expression data quality measures. Uncovering such connections could create savings on costly microarray experiments by eliminating poor samples before hybridisation.

  14. Optimal and robust design method for two-chip out-of-plane microaccelerometers.

    Science.gov (United States)

    Lee, Sangmin; Ko, Hyoungho; Choi, Byoungdoo; Cho, Dong-il Dan

    2010-01-01

    In this paper, an optimal and robust design method to implement a two-chip out-of-plane microaccelerometer system is presented. The two-chip microsystem consists of a MEMS chip for sensing the external acceleration and a CMOS chip for signal processing. An optimized design method to determine the device thickness, the sacrificial gap, and the vertical gap length of the M EMS sensing element is applied to minimize the fundamental noise level and also to achieve the robustness to the fabrication variations. In order to cancel out the offset and gain variations due to parasitic capacitances and process variations, a digitally trimmable architecture consisting of an 11 bit capacitor array is adopted in the analog front-end of the CMOS capacitive readout circuit. The out-of-plane microaccelerometer has the scale factor of 372 mV/g∼389 mV/g, the output nonlinearity of 0.43% FSO∼0.60% FSO, the input range of ±2 g and a bias instability of 122 μg∼229 μg. The signal-to-noise ratio and the noise equivalent resolution are measured to be 74.00 dB∼75.23 dB and 180 μg/rtHz∼190 μg/rtHz, respectively. The in-plane cross-axis sensitivities are measured to be 1.1%∼1.9% and 0.3%∼0.7% of the out-of-plane sensitivity, respectively. The results show that the optimal and robust design method for the MEMS sensing element and the highly trimmable capacity of the CMOS capacitive readout circuit are suitable to enhance the die-to-die uniformity of the packaged microsystem, without compromising the performance characteristics.

  15. Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers

    Directory of Open Access Journals (Sweden)

    Hyoungho Ko

    2010-11-01

    Full Text Available In this paper, an optimal and robust design method to implement a two-chip out-of-plane microaccelerometer system is presented. The two-chip microsystem consists of a MEMS chip for sensing the external acceleration and a CMOS chip for signal processing. An optimized design method to determine the device thickness, the sacrificial gap, and the vertical gap length of the M EMS sensing element is applied to minimize the fundamental noise level and also to achieve the robustness to the fabrication variations. In order to cancel out the offset and gain variations due to parasitic capacitances and process variations, a digitally trimmable architecture consisting of an 11 bit capacitor array is adopted in the analog front-end of the CMOS capacitive readout circuit. The out-of-plane microaccelerometer has the scale factor of 372 mV/g~389 mV/g, the output nonlinearity of 0.43% FSO~0.60% FSO, the input range of ±2 g and a bias instability of 122 μg~229 μg. The signal-to-noise ratio and the noise equivalent resolution are measured to be74.00 dB~75.23 dB and 180 μg/rtHz~190 μg/rtHz, respectively. The in-plane cross-axis sensitivities are measured to be 1.1%~1.9% and 0.3%~0.7% of the out-of-plane sensitivity, respectively. The results show that the optimal and robust design method for the MEMS sensing element and the highly trimmable capacity of the CMOS capacitive readout circuit are suitable to enhance the die-to-die uniformity of the packaged microsystem, without compromising the performance characteristics.

  16. Nondestructive diagnosis of flip chips based on vibration analysis using PCA-RBF

    Science.gov (United States)

    Su, Lei; Shi, Tielin; Liu, Zhiping; Zhou, Hongdi; Du, Li; Liao, Guanglan

    2017-02-01

    Flip chip technology combined with solder bump interconnection has been widely applied in IC package. The solder bumps are sandwiched between dies and substrates, leading to conventional techniques being difficult to diagnose the flip chips. Meanwhile, these conventional diagnosis methods are usually performed by human visual judgment. The human eye-fatigue can easily cause fault detection. Thus, it is difficult and crucial to detect the defects of flip chips automatically. In this paper, a nondestructive diagnosis system based on vibration analysis is proposed. The flip chip is excited by air-coupled ultrasounds and raw vibration signals are measured by a laser scanning vibrometer. Forty-two features are extracted for analysis, including ten time domain features, sixteen frequency domain features and sixteen wavelet packet energy features. Principal component analysis is used for feature reduction. Radial basis function neural network is adopted for classification and recognition. Flip chips in three states (good flip chips, flip chips with missing solder bumps and flip chips with open solder bumps) are utilized to validate the proposed method. The results demonstrate that this method is effective for defect inspection in flip chip package.

  17. Advanced Flip Chips in Extreme Temperature Environments

    Science.gov (United States)

    Ramesham, Rajeshuni

    2010-01-01

    material and the silicon die or chip, and also the underfill materials. Advanced packaging interconnects technology such as flip-chip interconnect test boards have been subjected to various extreme temperature ranges that cover military specifications and extreme Mars and asteroid environments. The eventual goal of each process step and the entire process is to produce components with 100 percent interconnect and satisfy the reliability requirements. Underfill materials, in general, may possibly meet demanding end use requirements such as low warpage, low stress, fine pitch, high reliability, and high adhesion.

  18. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2009-06-01

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the U.S. Department of Energy (DOE) or the Waste Isolation Pilot Plant (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required. In accordance with 10 CFR Part 71, certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21 regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to these regulations are

  19. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2008-09-11

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the pplication." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the U.S. Department of Energy (DOE) or the Waste Isolation Pilot Plant (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required. In accordance with 10 CFR Part 71, certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21 regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to these regulations are

  20. RH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2008-01-12

    The purpose of this program guidance document is to provide the technical requirements for use, operation, inspection, and maintenance of the RH-TRU 72-B Waste Shipping Package (also known as the "RH-TRU 72-B cask") and directly related components. This document complies with the requirements as specified in the RH-TRU 72-B Safety Analysis Report for Packaging (SARP), and Nuclear Regulatory Commission (NRC) Certificate of Compliance (C of C) 9212. If there is a conflict between this document and the SARP and/or C of C, the C of C shall govern. The C of C states: "...each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." It further states: "...each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP tasks the Waste Isolation Pilot Plant (WIPP) Management and Operating (M&O) Contractor with assuring the packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8, "Deliberate Misconduct." Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the U.S. Department of Energy (DOE) Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required.In accordance with 10 CFR Part 71, "Packaging and Transportation of Radioactive Material," certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21, "Reporting of Defects and Noncompliance," regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a

  1. RH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2006-11-07

    The purpose of this program guidance document is to provide the technical requirements for use, operation, inspection, and maintenance of the RH-TRU 72-B Waste Shipping Package and directly related components. This document complies with the requirements as specified in the RH-TRU 72-B Safety Analysis Report for Packaging (SARP), and Nuclear Regulatory Commission (NRC) Certificate of Compliance (C of C) 9212. If there is a conflict between this document and the SARP and/or C of C, the C of C shall govern. The C of C states: "...each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." It further states: "...each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP tasks the Waste Isolation Pilot Plant (WIPP) Management and Operating (M&O) Contractor with assuring the packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with 10 Code of Federal Regulations (CFR) §71.8, "Deliberate Misconduct." Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the U.S. Department of Energy (DOE) Carlsbad Field Office (CBFO) shall be notified immediately. CBFO will evaluate the issue and notify the NRC if required. In accordance with 10 CFR Part 71, "Packaging and Transportation of Radioactive Material," certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21, "Reporting of Defects and Noncompliance," regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to

  2. Wafer-level vacuum/hermetic packaging technologies for MEMS

    Science.gov (United States)

    Lee, Sang-Hyun; Mitchell, Jay; Welch, Warren; Lee, Sangwoo; Najafi, Khalil

    2010-02-01

    An overview of wafer-level packaging technologies developed at the University of Michigan is presented. Two sets of packaging technologies are discussed: (i) a low temperature wafer-level packaging processes for vacuum/hermeticity sealing, and (ii) an environmentally resistant packaging (ERP) technology for thermal and mechanical control as well as vacuum packaging. The low temperature wafer-level encapsulation processes are implemented using solder bond rings which are first patterned on a cap wafer and then mated with a device wafer in order to encircle and encapsulate the device at temperatures ranging from 200 to 390 °C. Vacuum levels below 10 mTorr were achieved with yields in an optimized process of better than 90%. Pressures were monitored for more than 4 years yielding important information on reliability and process control. The ERP adopts an environment isolation platform in the packaging substrate. The isolation platform is designed to provide low power oven-control, vibration isolation and shock protection. It involves batch flip-chip assembly of a MEMS device onto the isolation platform wafer. The MEMS device and isolation structure are encapsulated at the wafer-level by another substrate with vertical feedthroughs for vacuum/hermetic sealing and electrical signal connections. This technology was developed for high performance gyroscopes, but can be applied to any type of MEMS device.

  3. Hardware support for CSP on a Java chip multiprocessor

    DEFF Research Database (Denmark)

    Gruian, Flavius; Schoeberl, Martin

    2013-01-01

    Due to memory bandwidth limitations, chip multiprocessors (CMPs) adopting the convenient shared memory model for their main memory architecture scale poorly. On-chip core-to-core communication is a solution to this problem, that can lead to further performance increase for a number of multithread...

  4. Real time image processing with an analog vision chip system.

    Science.gov (United States)

    Kameda, S; Honda, A; Yagi, T

    1999-10-01

    A linear analog network model is proposed to characterize the function of the outer retinal circuit in terms of the standard regularization theory. Inspired by the function and the architecture of the model, a vision chip has been designed using analog CMOS Very Large Scale Integrated circuit technology. In the chip, sample/hold amplifier circuits are incorporated to compensate for statistic transistor mismatches. Accordingly, extremely low noise outputs were obtained from the chip. Using the chip and a zero-crossing detector, edges of given images were effectively extracted in indoor illumination.

  5. ANALYTICAL CHIP FORMATION MODEL OF MICRO-END-MILLING

    Institute of Scientific and Technical Information of China (English)

    LI Chengfeng; LAI Xinmin; LI Hongtao; PENG Linfa; NI Jun

    2008-01-01

    A new analytical chip formation model is proposed for micro-end-milling operations. The model calculates an instantaneous uncut chip thickness by considering the combination of exact trochoidal trajectory of the tool tip and tool run-out, while the simplified circular trajectory and the neglected run-out create negligible change in conventional-scale chip formation models. Newton-Raphson iterative method is employed during the calculation to obtain quadratic convergence. The proposed approach allows the calculation of instantaneous uncut chip thickness to be done accurately and rapidly, and the prediction accuracy of this model is also verified by comparing the simulation results to experimental cutting forces.

  6. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2007-12-13

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the U.S. Department of Energy (DOE) or the Waste Isolation Pilot Plant (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required.In accordance with 10 CFR Part 71, certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21 regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to these regulations are

  7. RH Packaging Operations Manual

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2003-09-17

    This procedure provides operating instructions for the RH-TRU 72-B Road Cask, Waste Shipping Package. In this document, ''Packaging'' refers to the assembly of components necessary to ensure compliance with the packaging requirements (not loaded with a payload). ''Package'' refers to a Type B packaging that, with its radioactive contents, is designed to retain the integrity of its containment and shielding when subject to the normal conditions of transport and hypothetical accident test conditions set forth in 10 CFR Part 71. Loading of the RH 72-B cask can be done two ways, on the RH cask trailer in the vertical position or by removing the cask from the trailer and loading it in a facility designed for remote-handling (RH). Before loading the 72-B cask, loading procedures and changes to the loading procedures for the 72-B cask must be sent to CBFO at sitedocuments@wipp.ws for approval.

  8. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  9. Packaging Solutions : Delivering customer value through Logistical Packaging: A Case Study at Stora Enso Packaging

    OpenAIRE

    Shan, Kun; Julius, Joezer

    2015-01-01

    AbstractBackground;Despite of the significant role of packaging within logistics and supply chain management, packaging is infrequently studied as focal point in supply chain. Most of the previous logistics research studies tend to explain the integration between packaging and logistics through logistical packaging. In very rare cases, the studies mentioned about customer value. Therefore the major disadvantage of these studies is that, they didn’t consider logistical packaging and customer v...

  10. Use of pilot plant scale continuous fryer to simulate industrial production of potato chips: thermal properties of palm olein blends under continuous frying conditions.

    Science.gov (United States)

    Tarmizi, Azmil Haizam Ahmad; Ismail, Razali

    2014-01-01

    Binary blends of palm olein (PO) with sunflower oil (SFO), canola oil (CNO), and cottonseed oil (CSO) were formulated to assess their stability under continuous frying conditions. The results were then compared with those obtained in PO. The oil blends studied were: (1) 60:40 for PO + SFO; (2) 70:30 for PO + CNO; and (3) 50:50 for PO + CSO. The PO and its blends were used to fry potato chips at 180°C for a total of 56 h of operation. The evolution of analytical parameters such as tocols, induction period, color, p-anisidine value, free fatty acid, smoke point, polar compounds, and polymer compounds were evaluated over the frying time. Blending PO with unsaturated oils was generally proved to keep most qualitative parameters comparable to those demonstrated in PO. Indeed, none of the oils surpassed the legislative limits for used frying. Overall, it was noted that oil containing PO and SFO showed higher resistance toward oxidative and hydrolytic behaviors as compared to the other oil blends.

  11. SPHINX experimenters information package

    Energy Technology Data Exchange (ETDEWEB)

    Zarick, T.A. [Sandia National Lab., Albuquerque, NM (United States). Radiation Effects Experimentation Dept.

    1996-08-01

    This information package was prepared for both new and experienced users of the SPHINX (Short Pulse High Intensity Nanosecond X-radiator) flash X-Ray facility. It was compiled to help facilitate experiment design and preparation for both the experimenter(s) and the SPHINX operational staff. The major areas covered include: Recording Systems Capabilities,Recording System Cable Plant, Physical Dimensions of SPHINX and the SPHINX Test cell, SPHINX Operating Parameters and Modes, Dose Rate Map, Experiment Safety Approval Form, and a Feedback Questionnaire. This package will be updated as the SPHINX facilities and capabilities are enhanced.

  12. Planar architecture for microstrip interfaced packaging of coplanar-waveguide-based radio frequency microelectromechanical system switches

    Science.gov (United States)

    Singh, Shailendra; Giridhar, Malalahalli Sreenivasamurthy; Rao, Cheemalamarri Venkata Narasimha; Bhalke, Sangam; Islam, Rifqul

    2015-01-01

    This paper describes the architecture of microstrip (MS) interfaced packaging of a coplanar-waveguide (CPW)-based radio frequency microelectromechanical systems (RF MEMS) switch in a hermetic metal-ceramic RF package. The switch is integrated along with CPW to MS (CPW-MS) transitions within the package itself. This makes the MS interfaced packaged switch module readily mountable on MS based RF boards and subsystems. The CPW-MS transition for the package was designed as a separate off-chip entity on an alumina substrate and utilizes via hole. The integrated three-dimensional model of the package consisting of the RF MEMS switch and the transitions was simulated using high frequency structure simulator. The realized module shows an insertion loss of 0.2 and 1.1 dB at 100 MHz and 7 GHz, respectively. The measured isolation is better than 60 dB at 100 MHz and 30 dB at 7 GHz. The return loss is better than 15 dB up to 7 GHz. The estimated packaging and transitioning loss is 0.5 dB at 5 GHz. This packaging architecture is a planar solution for the MS interfaced packaging of CPW based RF MEMS switches for designers who do not have access to high-end technologies, such as zero-level packaging, through silicon via or low temperature co-fired ceramics.

  13. Mathematical Simulation for Integrated Linear Fresnel Spectrometer Chip

    Science.gov (United States)

    Park, Yeonjoon; Yoon, Hargoon; Lee, Uhn; King, Glen C.; Choi, Sang H.

    2012-01-01

    A miniaturized solid-state optical spectrometer chip was designed with a linear gradient-gap Fresnel grating which was mounted perpendicularly to a sensor array surface and simulated for its performance and functionality. Unlike common spectrometers which are based on Fraunhoffer diffraction with a regular periodic line grating, the new linear gradient grating Fresnel spectrometer chip can be miniaturized to a much smaller form-factor into the Fresnel regime exceeding the limit of conventional spectrometers. This mathematical calculation shows that building a tiny motionless multi-pixel microspectrometer chip which is smaller than 1 cubic millimter of optical path volume is possible. The new Fresnel spectrometer chip is proportional to the energy scale (hc/lambda), while the conventional spectrometers are proportional to the wavelength scale (lambda). We report the theoretical optical working principle and new data collection algorithm of the new Fresnel spectrometer to build a compact integrated optical chip.

  14. Hybrid photonic chip interferometer for embedded metrology

    Science.gov (United States)

    Kumar, P.; Martin, H.; Maxwell, G.; Jiang, X.

    2014-03-01

    Embedded metrology is the provision of metrology on the manufacturing platform, enabling measurement without the removal of the work piece. Providing closer integration of metrology upon the manufacturing platform can lead to the better control and increased throughput. In this work we present the development of a high precision hybrid optical chip interferometer metrology device. The complete metrology sensor system is structured into two parts; optical chip and optical probe. The hybrid optical chip interferometer is based on a silica-on-silicon etched integrated-optic motherboard containing waveguide structures and evanescent couplers. Upon the motherboard, electro-optic components such as photodiodes and a semiconductor gain block are mounted and bonded to provide the required functionality. The key structure in the device is a tunable laser module based upon an external-cavity diode laser (ECDL). Within the cavity is a multi-layer thin film filter which is rotated to select the longitudinal mode at which the laser operates. An optical probe, which uses a blazed diffracting grating and collimating objective lens, focuses light of different wavelengths laterally over the measurand. Incident laser light is then tuned in wavelength time to effectively sweep an `optical stylus' over the surface. Wavelength scanning and rapid phase shifting can then retrieve the path length change and thus the surface height. We give an overview of the overall design of the final hybrid photonic chip interferometer, constituent components, device integration and packaging as well as experimental test results from the current version now under evaluation.

  15. affy - analysis of Affymetrix GeneChip data at the probe level

    DEFF Research Database (Denmark)

    Gautier, Laurent; Cope, L.; Bolstad, B.N.;

    2004-01-01

    The processing of the Affymetrix GeneChip data has been a recent focus for data analysts. Alternatives to the original procedure have been proposed and some of these new methods are widely used. Results: The affy package is an R package of functions and classes for the analysis of oligonucleotide...... arrays manufactured by Affymetrix. The package is currently in its second release, affy provides the user with extreme flexibility when carrying out an analysis and make it possible to access and manipulate probe intensity data. In this paper, we present the main classes and functions in the package...

  16. Electro-Microfluidic Packaging

    Science.gov (United States)

    Benavides, G. L.; Galambos, P. C.

    2002-06-01

    There are many examples of electro-microfluidic products that require cost effective packaging solutions. Industry has responded to a demand for products such as drop ejectors, chemical sensors, and biological sensors. Drop ejectors have consumer applications such as ink jet printing and scientific applications such as patterning self-assembled monolayers or ejecting picoliters of expensive analytes/reagents for chemical analysis. Drop ejectors can be used to perform chemical analysis, combinatorial chemistry, drug manufacture, drug discovery, drug delivery, and DNA sequencing. Chemical and biological micro-sensors can sniff the ambient environment for traces of dangerous materials such as explosives, toxins, or pathogens. Other biological sensors can be used to improve world health by providing timely diagnostics and applying corrective measures to the human body. Electro-microfluidic packaging can easily represent over fifty percent of the product cost and, as with Integrated Circuits (IC), the industry should evolve to standard packaging solutions. Standard packaging schemes will minimize cost and bring products to market sooner.

  17. Waste disposal package

    Science.gov (United States)

    Smith, M.J.

    1985-06-19

    This is a claim for a waste disposal package including an inner or primary canister for containing hazardous and/or radioactive wastes. The primary canister is encapsulated by an outer or secondary barrier formed of a porous ceramic material to control ingress of water to the canister and the release rate of wastes upon breach on the canister. 4 figs.

  18. Metric Education Evaluation Package.

    Science.gov (United States)

    Kansky, Bob; And Others

    This document was developed out of a need for a complete, carefully designed set of evaluation instruments and procedures that might be applied in metric inservice programs across the nation. Components of this package were prepared in such a way as to permit local adaptation to the evaluation of a broad spectrum of metric education activities.…

  19. The Swarm Magnetometry Package

    DEFF Research Database (Denmark)

    Merayo, José M.G.; Jørgensen, John Leif; Friis-Christensen, Eigil;

    2008-01-01

    The Swarm mission under the ESA's Living Planet Programme is planned for launch in 2010 and consists of a constellation of three satellites at LEO. The prime objective of Swarm is to measure the geomagnetic field with unprecedented accuracy in space and time. The magnetometry package consists...

  20. Geothermal Greenhouse Information Package

    Energy Technology Data Exchange (ETDEWEB)

    Rafferty, K. [P.E.; Boyd, T. [ed.

    1997-01-01

    This package of information is intended to provide a foundation of background information for developers of geothermal greenhouses. The material is divided into seven sections covering such issues as crop culture and prices, operating costs for greenhouses, heating system design, vendors and a list of other sources of information.

  1. Automatic Differentiation Package

    Energy Technology Data Exchange (ETDEWEB)

    2007-03-01

    Sacado is an automatic differentiation package for C++ codes using operator overloading and C++ templating. Sacado provide forward, reverse, and Taylor polynomial automatic differentiation classes and utilities for incorporating these classes into C++ codes. Users can compute derivatives of computations arising in engineering and scientific applications, including nonlinear equation solving, time integration, sensitivity analysis, stability analysis, optimization and uncertainity quantification.

  2. Aquaculture Information Package

    Energy Technology Data Exchange (ETDEWEB)

    Boyd, T.; Rafferty, K. [editors

    1998-01-01

    This package of information is intended to provide background to developers of geothermal aquaculture projects. The material is divided into eight sections and includes information on market and price information for typical species, aquaculture water quality issues, typical species culture information, pond heat loss calculations, an aquaculture glossary, regional and university aquaculture offices and state aquaculture permit requirements.

  3. Polymers in Waveguide Packaging

    Institute of Scientific and Technical Information of China (English)

    Zhiyi Zhang; G. Z.Xiao; Jiaren Liu; C. P. Grover

    2003-01-01

    Polymers were successfully used in the packaging of waveguide-based photonic components in the area of fiber-to-waveguide coupling, waveguide die attachment, strain relief, and waveguide encapsulation. The application results of these polymers were described in this paper.

  4. Development of Microreactor Array Chip-Based Measurement System for Massively Parallel Analysis of Enzymatic Activity

    Science.gov (United States)

    Hosoi, Yosuke; Akagi, Takanori; Ichiki, Takanori

    Microarray chip technology such as DNA chips, peptide chips and protein chips is one of the promising approaches for achieving high-throughput screening (HTS) of biomolecule function since it has great advantages in feasibility of automated information processing due to one-to-one indexing between array position and molecular function as well as massively parallel sample analysis as a benefit of down-sizing and large-scale integration. Mostly, however, the function that can be evaluated by such microarray chips is limited to affinity of target molecules. In this paper, we propose a new HTS system of enzymatic activity based on microreactor array chip technology. A prototype of the automated and massively parallel measurement system for fluorometric assay of enzymatic reactions was developed by the combination of microreactor array chips and a highly-sensitive fluorescence microscope. Design strategy of microreactor array chips and an optical measurement platform for the high-throughput enzyme assay are discussed.

  5. Heat transfer in high density electronics packaging

    Institute of Scientific and Technical Information of China (English)

    2001-01-01

    In order to get an insight into the thermal characteristic and to evaluate the thermal reliability of the "System in Packaging"(SIP), a new solution of electronics packaging, a heat transfer model of SIP was developed to predict the heat dissipation capacity and to investigate the effect of different factors on the temperature distribution in the electronics. The affecting parameters under consideration include the thermophysical properties of the substrates, the coefficient of convection heat transfer, the thickness of the chip, and the density of power dissipation. ALGOR, a kind of finite element analysis software,was used to do the model simulation. Based on the sinulation and analysis of the heat conduction and convection resistance, criteria for the thermal design were established and possible measurement for enhancing power dissipation was provided, The results show that the heat transfer model provides a new and effective way to the thermal design and thermal analysis of SIP and to the mechanical analysis for the further investigation of SIP.

  6. Nano Food Packages: from Food Preservation Efficiency to Consumer Legal Protection

    OpenAIRE

    Rodica Apan; Anca Mihaly Cozmuta; Anca Peter; Camelia Nicula

    2014-01-01

    The paper explores some aspects related to the application of nanomaterials in food packaging. Therefore, the paper is structured into two sections. In the first section, aspects that could restrict/restrain the application of nanomaterials in food packaging industry in terms of environmental and human risks, the consumer`s rights to be informed regarding the utilization of nano-packages and regulation issues in the field of large scale application of food nano-packages are discussed. In the ...

  7. Food packaging history and innovations.

    Science.gov (United States)

    Risch, Sara J

    2009-09-23

    Food packaging has evolved from simply a container to hold food to something today that can play an active role in food quality. Many packages are still simply containers, but they have properties that have been developed to protect the food. These include barriers to oxygen, moisture, and flavors. Active packaging, or that which plays an active role in food quality, includes some microwave packaging as well as packaging that has absorbers built in to remove oxygen from the atmosphere surrounding the product or to provide antimicrobials to the surface of the food. Packaging has allowed access to many foods year-round that otherwise could not be preserved. It is interesting to note that some packages have actually allowed the creation of new categories in the supermarket. Examples include microwave popcorn and fresh-cut produce, which owe their existence to the unique packaging that has been developed.

  8. Lakes Ecosystem Services Download Package

    Data.gov (United States)

    U.S. Environmental Protection Agency — This data download package contains Esri 10.0 MXDs, file geodatabases and copy of this FGDC metadata record. The data in this package are used in support of the Lake...

  9. Standard semiconductor packaging for high-reliability low-cost MEMS applications

    Science.gov (United States)

    Harney, Kieran P.

    2005-01-01

    Microelectronic packaging technology has evolved over the years in response to the needs of IC technology. The fundamental purpose of the package is to provide protection for the silicon chip and to provide electrical connection to the circuit board. Major change has been witnessed in packaging and today wafer level packaging technology has further revolutionized the industry. MEMS (Micro Electro Mechanical Systems) technology has created new challenges for packaging that do not exist in standard ICs. However, the fundamental objective of MEMS packaging is the same as traditional ICs, the low cost and reliable presentation of the MEMS chip to the next level interconnect. Inertial MEMS is one of the best examples of the successful commercialization of MEMS technology. The adoption of MEMS accelerometers for automotive airbag applications has created a high volume market that demands the highest reliability at low cost. The suppliers to these markets have responded by exploiting standard semiconductor packaging infrastructures. However, there are special packaging needs for MEMS that cannot be ignored. New applications for inertial MEMS devices are emerging in the consumer space that adds the imperative of small size to the need for reliability and low cost. These trends are not unique to MEMS accelerometers. For any MEMS technology to be successful the packaging must provide the basic reliability and interconnection functions, adding the least possible cost to the product. This paper will discuss the evolution of MEMS packaging in the accelerometer industry and identify the main issues that needed to be addressed to enable the successful commercialization of the technology in the automotive and consumer markets.

  10. Influence of ceramic package internal components on the performance of vacuum sealed uncooled bolometric detectors

    Science.gov (United States)

    Paquet, Alex; Deshaies, Sébastien; Desroches, Yan; Whalin, Jeff; Topart, Patrice

    2013-03-01

    INO has developed a hermetic vacuum packaging technology for uncooled bolometric detectors based on ceramic leadless chip carriers (LCC). Cavity pressures less than 3 mTorr are obtained. Processes are performed in a state-of-the art semi-automated vacuum furnace that allows for independent activation of non-evaporable thin film getters. The getter activation temperature is limited by both the anti-reflection coated silicon or germanium window and the MEMS device built on CMOS circuits. Temperature profiles used to achieve getter activation and vacuum sealing were optimized to meet lifetime and reliability requirements of packaged devices. Internal package components were carefully selected with respect to their outgassing behavior so that a good vacuum performance was obtained. In this paper, INO's packaging process is described. The influence of various package internal components, in particular the CMOS circuits, on vacuum performance is presented. The package cavity pressure was monitored using INO's pressure microsensors and the gas composition was determined by internal vapor analysis. Lifetime was derived from accelerated testing after storage of packaged detectors at various temperatures from room temperature to 120°C. A hermeticity yield over 80% was obtained for batches of twelve devices packaged simultaneously. Packaged FPAs submitted to standard MIL-STD-810 reliability testing (vibration, shock and temperature cycling) exhibited no change in IR response. Results show that vacuum performance strongly depends on CMOS circuit chips. Detectors packaged using a thin film getter show no change in cavity pressure after storage for more than 30 days at 120°C. Moreover, INO's vacuum sealing process is such that even without a thin film getter, a base pressure of less than 10 mTorr is obtained and no pressure change is observed after 40 days at 85°C.

  11. Integrated polymerase chain reaction chips utilizing digital microfluidics.

    Science.gov (United States)

    Chang, Yi-Hsien; Lee, Gwo-Bin; Huang, Fu-Chun; Chen, Yi-Yu; Lin, Jr-Lung

    2006-09-01

    This study reports an integrated microfluidic chip for polymerase chain reaction (PCR) applications utilizing digital microfluidic chip (DMC) technology. Several crucial procedures including sample transportation, mixing, and DNA amplification were performed on the integrated chip using electro-wetting-on-dielectric (EWOD) effect. An innovative concept of hydrophobic/hydrophilic structure has been successfully demonstrated to integrate the DMC chip with the on-chip PCR device. Sample droplets were generated, transported and mixed by the EWOD-actuation. Then the mixture droplets were transported to a PCR chamber by utilizing the hydrophilic/hydrophobic interface to generate required surface tension gradient. A micro temperature sensor and two micro heaters inside the PCR chamber along with a controller were used to form a micro temperature control module, which could perform precise PCR thermal cycling for DNA amplification. In order to demonstrate the performance of the integrated DMC/PCR chips, a detection gene for Dengue II virus was successfully amplified and detected. The new integrated DMC/PCR chips only required an operation voltage of 12V(RMS) at a frequency of 3 KHz for digital microfluidic actuation and 9V(DC) for thermal cycling. When compared to its large-scale counterparts for DNA amplification, the developed system consumed less sample and reagent and could reduce the detection time. The developed chips successfully demonstrated the feasibility of Lab-On-a-Chip (LOC) by utilizing EWOD-based digital microfluidics.

  12. Ensuring socially responsible packaging design

    DEFF Research Database (Denmark)

    Jensen, Birgitte Geert; Widding, Sofie Hartvig

    "User‐friendly Packaging" aims to create a platform for developing more user‐friendly packaging. One intended outcome of the project is a guideline that industry can use in development efforts. The project also points the way for more extended collaboration between companies and design researchers. How...... can design research help industry in packaging innovation?...

  13. Sustainable Library Development Training Package

    Science.gov (United States)

    Peace Corps, 2012

    2012-01-01

    This Sustainable Library Development Training Package supports Peace Corps' Focus In/Train Up strategy, which was implemented following the 2010 Comprehensive Agency Assessment. Sustainable Library Development is a technical training package in Peace Corps programming within the Education sector. The training package addresses the Volunteer…

  14. CHIP Reporting in the CPS

    Data.gov (United States)

    U.S. Department of Health & Human Services — CHIP reporting in the CPS is unreliable. Only 10 to 30 percent of those with CHIP (but not Medicaid) report this type of coverage in the CPS. Many with CHIP report...

  15. Design and characterization of an image acquisition system and its optomechanical module for chip defects inspection on chip sorters

    Science.gov (United States)

    Chen, Ming-Fu; Huang, Po-Hsuan; Chen, Yung-Hsiang; Cheng, Yu-Cheng

    2011-08-01

    Chip sorter is one of packaging facilities in chip manufactory. Defects will occur for a few of chips during manufacturing processes. If the size of chip defects is larger than a criterion of impacting chip quality, these flawed chips have to be detected and removed. Defects inspection system is usually developed with frame CCD imagers. There're some drawbacks for this system, such as mechanism of pause type for image acquisition, complicated acquisition control, easy damage for moving components, etc. And acquired images per chip have to be processed in radiometry and geometry and then pieced together before inspection. These processes impact the accuracy and efficiency of defects inspection. So approaches of image acquisition system and its opto-mechanical module will be critical for inspection system. In this article, design and characterization of a new image acquisition system and its opto-mechanical module are presented. Defects with size of greater than 15μm have to be inspected. Inspection performance shall be greater than 0.6 m/sec. Thus image acquisition system shall have the characteristics of having (1) the resolution of 5μm and 10μm for optical lens and linear CCD imager respectively; (2) the lens magnification of 2; (3) the line rate of greater than 120 kHz for imager output. The design of structure and outlines for new system and module are also described in this work. Proposed system has advantages of such as transporting chips in constant speed to acquire images, using one image only per chip for inspection, no image-mosaic process, simplifying the control of image acquisition. And the inspection efficiency and accuracy will be substantially improved.

  16. Anticounterfeit packaging technologies

    Directory of Open Access Journals (Sweden)

    Ruchir Y Shah

    2010-01-01

    Full Text Available Packaging is the coordinated system that encloses and protects the dosage form. Counterfeit drugs are the major cause of morbidity, mortality, and failure of public interest in the healthcare system. High price and well-known brands make the pharma market most vulnerable, which accounts for top priority cardiovascular, obesity, and antihyperlipidemic drugs and drugs like sildenafil. Packaging includes overt and covert technologies like barcodes, holograms, sealing tapes, and radio frequency identification devices to preserve the integrity of the pharmaceutical product. But till date all the available techniques are synthetic and although provide considerable protection against counterfeiting, have certain limitations which can be overcome by the application of natural approaches and utilization of the principles of nanotechnology.

  17. RH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions, LLC

    2003-08-25

    The purpose of this program guidance document is to provide technical requirements for use, operation, inspection, and maintenance of the RH-TRU 72-B Waste Shipping Package and directly related components. This document complies with the requirements as specified in the RH-TRU 72-B Safety Analysis Report for Packaging (SARP), and Nuclear Regulatory Commission (NRC) Certificate of Compliance (C of C) 9212. If there is a conflict between this document and the SARP and/or C of C, the SARP and/or C of C shall govern. The C of C states: ''...each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, ''Operating Procedures,'' of the application.'' It further states: ''...each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, ''Acceptance Tests and Maintenance Program of the Application.'' Chapter 9.0 of the SARP tasks the Waste Isolation Pilot Plant (WIPP) Management and Operating (M&O) contractor with assuring the packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC approved, users need to be familiar with 10 CFR {section} 71.11, ''Deliberate Misconduct.'' Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. CBFO will evaluate the issue and notify the NRC if required. This document details the instructions to be followed to operate, maintain, and test the RH-TRU 72-B packaging. This Program Guidance standardizes instructions for all users. Users shall follow these instructions. Following these instructions assures that operations are safe and meet the requirements of the SARP. This document is available on the Internet at: ttp://www.ws/library/t2omi/t2omi.htm. Users are responsible for ensuring they are using the current

  18. Three-dimensional optoelectronic stacked processor by use of free-space optical interconnection and three-dimensional VLSI chip stacks.

    Science.gov (United States)

    Li, Guoqiang; Huang, Dawei; Yuceturk, Emel; Marchand, Philippe J; Esener, Sadik C; Ozguz, Volkan H; Liu, Yue

    2002-01-10

    We present a demonstration system under the three-dimensional (3D) optoelectronic stacked processor consortium. The processor combines the advantages of optics in global, high-density, high-speed parallel interconnections with the density and computational power of 3D chip stacks. In particular, a compact and scalable optoelectronic switching system with a high bandwidth is designed. The system consists of three silicon chip stacks, each integrated with a single vertical-cavity-surface-emitting-laser-metal-semiconductor-metal detector array and an optical interconnection module. Any input signal at one end stack can be switched through the central crossbar stack to any output channel on the opposite end stack. The crossbar bandwidth is designed to be 256 Gb/s. For the free-space optical interconnection, a novel folded hybrid micro-macro optical system with a concave reflection mirror has been designed. The optics module can provide a high resolution, a large field of view, a high link efficiency, and low optical cross talk. It is also symmetric and modular. Off-the-shelf macro-optical components are used. The concave reflection mirror can significantly improve the image quality and tolerate a large misalignment of the optical components, and it can also compensate for the lateral shift of the chip stacks. Scaling of the macrolens can be used to adjust the interconnection length between the chip stacks or make the system more compact. The components are easy to align, and only passive alignment is required. Optics and electronics are separated until the final assembly step, and the optomechanic module can be removed and replaced. By use of 3D chip stacks, commercially available optical components, and simple passive packaging techniques, it is possible to achieve a high-performance optoelectronic switching system.

  19. Aquaculture information package

    Energy Technology Data Exchange (ETDEWEB)

    Boyd, T.; Rafferty, K.

    1998-08-01

    This package of information is intended to provide background information to developers of geothermal aquaculture projects. The material is divided into eight sections and includes information on market and price information for typical species, aquaculture water quality issues, typical species culture information, pond heat loss calculations, an aquaculture glossary, regional and university aquaculture offices and state aquaculture permit requirements. A bibliography containing 68 references is also included.

  20. The Ettention software package

    Energy Technology Data Exchange (ETDEWEB)

    Dahmen, Tim, E-mail: Tim.Dahmen@dfki.de [German Research Center for Artificial Intelligence GmbH (DFKI), 66123 Saarbrücken (Germany); Saarland University, 66123 Saarbrücken (Germany); Marsalek, Lukas [Eyen SE, Na Nivách 1043/16, 141 00 Praha 4 (Czech Republic); Saarland University, 66123 Saarbrücken (Germany); Marniok, Nico [Saarland University, 66123 Saarbrücken (Germany); Turoňová, Beata [Saarland University, 66123 Saarbrücken (Germany); IMPRS-CS, Max-Planck Institute for Informatics, Campus E 1.4, 66123 Saarbrücken (Germany); Bogachev, Sviatoslav [Saarland University, 66123 Saarbrücken (Germany); Trampert, Patrick; Nickels, Stefan [German Research Center for Artificial Intelligence GmbH (DFKI), 66123 Saarbrücken (Germany); Slusallek, Philipp [German Research Center for Artificial Intelligence GmbH (DFKI), 66123 Saarbrücken (Germany); Saarland University, 66123 Saarbrücken (Germany)

    2016-02-15

    We present a novel software package for the problem “reconstruction from projections” in electron microscopy. The Ettention framework consists of a set of modular building-blocks for tomographic reconstruction algorithms. The well-known block iterative reconstruction method based on Kaczmarz algorithm is implemented using these building-blocks, including adaptations specific to electron tomography. Ettention simultaneously features (1) a modular, object-oriented software design, (2) optimized access to high-performance computing (HPC) platforms such as graphic processing units (GPU) or many-core architectures like Xeon Phi, and (3) accessibility to microscopy end-users via integration in the IMOD package and eTomo user interface. We also provide developers with a clean and well-structured application programming interface (API) that allows for extending the software easily and thus makes it an ideal platform for algorithmic research while hiding most of the technical details of high-performance computing. - Highlights: • Novel software package for “reconstruction from projections” in electron microscopy. • Support for high-resolution reconstructions on iterative reconstruction algorithms. • Support for CPU, GPU and Xeon Phi. • Integration in the IMOD software. • Platform for algorithm researchers: object oriented, modular design.

  1. Chip Multithreaded Consistency Model

    Institute of Scientific and Technical Information of China (English)

    Zu-Song Li; Dan-Dan Huan; Wei-Wu Hu; Zhi-Min Tang

    2008-01-01

    Multithreaded technique is the developing trend of high performance processor. Memory consistency model is essential to the correctness, performance and complexity of multithreaded processor. The chip multithreaded consistency model adapting to multithreaded processor is proposed in this paper. The restriction imposed on memory event ordering by chip multithreaded consistency is presented and formalized. With the idea of critical cycle built by Wei-Wu Hu, we prove that the proposed chip multithreaded consistency model satisfies the criterion of correct execution of sequential consistency model. Chip multithreaded consistency model provides a way of achieving high performance compared with sequential consistency model and ensures the compatibility of software that the execution result in multithreaded processor is the same as the execution result in uniprocessor. The implementation strategy of chip multithreaded consistency model in Godson-2 SMT processor is also proposed. Godson-2 SMT processor supports chip multithreaded consistency model correctly by exception scheme based on the sequential memory access queue of each thread.

  2. Plutonium stabilization and packaging system

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1996-05-01

    This document describes the functional design of the Plutonium Stabilization and Packaging System (Pu SPS). The objective of this system is to stabilize and package plutonium metals and oxides of greater than 50% wt, as well as other selected isotopes, in accordance with the requirements of the DOE standard for safe storage of these materials for 50 years. This system will support completion of stabilization and packaging campaigns of the inventory at a number of affected sites before the year 2002. The package will be standard for all sites and will provide a minimum of two uncontaminated, organics free confinement barriers for the packaged material.

  3. UW VLSI chip tester

    Science.gov (United States)

    McKenzie, Neil

    1989-12-01

    We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

  4. A Versatile Chip Set For Image Processing Algorithms

    Science.gov (United States)

    Krishnan, M. S.

    1988-02-01

    This paper presents a versatile chip set that can realize signal/image processing algorithms used in several important image processing applications, including template-processing, spatial filtering and image scaling. This chip set architecture is superior in versatility, programmability and modularity to several schemes proposed in the literature. The first chip, called the Template Processor, can perform a variety of template functions on a pixel stream using a set of threshold matrices that can be modified or switched in real-time as a function of the image being processed. This chip can also be used to perform data scaling and image biasing. The second chip, called the Filter/Scaler chip, can perform two major functions. The first is a transversal filter function where the number of sample points is modularly extendable and the coefficients are programmable. The second major function performed by this chip is the interpolation function. Linear or cubic B-spline interpolation algorithms can be implemented by programming the coefficients appropriately. The essential features of these two basic building block processors and their significance in template-based computations, filtering, data-scaling and half-tone applications are discussed. Structured, testable implementations of these processors in VLSI technology and extensions to higher performance systems are presented.

  5. A survey of research and practices of network-on-chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Mahadevan, Shankar

    2006-01-01

    The scaling of microchip technologies has enabled large scale systems-on-chip (SoC). Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a move from computation-centric to communication-centric design and (ii) the implementation of scalable communication structures...

  6. Design and Fabrication of Complementary Metal-Oxide-Semiconductor Sensor Chip for Electrochemical Measurement

    Science.gov (United States)

    Yamazaki, Tomoyuki; Ikeda, Takaaki; Kano, Yoshiko; Takao, Hidekuni; Ishida, Makoto; Sawada, Kazuaki

    2010-04-01

    An electrochemical sensor has been developed on a single chip in which potentiostat and sensor electrodes are integrated. Sensor chips were fabricated using 5.0 µm complementary metal-oxide-semiconductor (CMOS) technology. All processes including the CMOS process, postprocessing for fabricating sensor electrodes and passivation layers, and packaging were performed at Toyohashi University of Technology. The integration makes it possible to measure electrochemical signals without having to use a bulky external electrochemical system. The potential between the working electrode and the reference electrode was controlled using an on-chip potentiostat composed of CMOS transistors. The chip characteristics were verified by electrochemical measurement, namely, by cyclic voltammetry. Potassium ferricyanide solution was measured to obtain results that fit well to the theoretical formula. A clear proportional relationship between peak height and the concentration of the sample solution was obtained using the proposed sensor chip, and the dynamic range obtained was 0.10 to 8.0 mM.

  7. Reliability of Semiconductor Laser Packaging in Space Applications

    Science.gov (United States)

    Gontijo, Ivair; Qiu, Yueming; Shapiro, Andrew A.

    2008-01-01

    A typical set up used to perform lifetime tests of packaged, fiber pigtailed semiconductor lasers is described, as well as tests performed on a set of four pump lasers. It was found that two lasers failed after 3200, and 6100 hours under device specified bias conditions at elevated temperatures. Failure analysis of the lasers indicates imperfections and carbon contamination of the laser metallization, possibly from improperly cleaned photo resist. SEM imaging of the front facet of one of the lasers, although of poor quality due to the optical fiber charging effects, shows evidence of catastrophic damage at the facet. More stringent manufacturing controls with 100% visual inspection of laser chips are needed to prevent imperfect lasers from proceeding to packaging and ending up in space applications, where failure can result in the loss of a space flight mission.

  8. Packaging - Materials review

    Energy Technology Data Exchange (ETDEWEB)

    Herrmann, Matthias [Hoppecke Advanced Battery Technology GmbH, 08056 Zwickau (Germany)

    2014-06-16

    Nowadays, a large number of different electrochemical energy storage systems are known. In the last two decades the development was strongly driven by a continuously growing market of portable electronic devices (e.g. cellular phones, lap top computers, camcorders, cameras, tools). Current intensive efforts are under way to develop systems for automotive industry within the framework of electrically propelled mobility (e.g. hybrid electric vehicles, plug-in hybrid electric vehicles, full electric vehicles) and also for the energy storage market (e.g. electrical grid stability, renewable energies). Besides the different systems (cell chemistries), electrochemical cells and batteries were developed and are offered in many shapes, sizes and designs, in order to meet performance and design requirements of the widespread applications. Proper packaging is thereby one important technological step for designing optimum, reliable and safe batteries for operation. In this contribution, current packaging approaches of cells and batteries together with the corresponding materials are discussed. The focus is laid on rechargeable systems for industrial applications (i.e. alkaline systems, lithium-ion, lead-acid). In principle, four different cell types (shapes) can be identified - button, cylindrical, prismatic and pouch. Cell size can be either in accordance with international (e.g. International Electrotechnical Commission, IEC) or other standards or can meet application-specific dimensions. Since cell housing or container, terminals and, if necessary, safety installations as inactive (non-reactive) materials reduce energy density of the battery, the development of low-weight packages is a challenging task. In addition to that, other requirements have to be fulfilled: mechanical stability and durability, sealing (e.g. high permeation barrier against humidity for lithium-ion technology), high packing efficiency, possible installation of safety devices (current interrupt device

  9. Packaging - Materials review

    Science.gov (United States)

    Herrmann, Matthias

    2014-06-01

    Nowadays, a large number of different electrochemical energy storage systems are known. In the last two decades the development was strongly driven by a continuously growing market of portable electronic devices (e.g. cellular phones, lap top computers, camcorders, cameras, tools). Current intensive efforts are under way to develop systems for automotive industry within the framework of electrically propelled mobility (e.g. hybrid electric vehicles, plug-in hybrid electric vehicles, full electric vehicles) and also for the energy storage market (e.g. electrical grid stability, renewable energies). Besides the different systems (cell chemistries), electrochemical cells and batteries were developed and are offered in many shapes, sizes and designs, in order to meet performance and design requirements of the widespread applications. Proper packaging is thereby one important technological step for designing optimum, reliable and safe batteries for operation. In this contribution, current packaging approaches of cells and batteries together with the corresponding materials are discussed. The focus is laid on rechargeable systems for industrial applications (i.e. alkaline systems, lithium-ion, lead-acid). In principle, four different cell types (shapes) can be identified - button, cylindrical, prismatic and pouch. Cell size can be either in accordance with international (e.g. International Electrotechnical Commission, IEC) or other standards or can meet application-specific dimensions. Since cell housing or container, terminals and, if necessary, safety installations as inactive (non-reactive) materials reduce energy density of the battery, the development of low-weight packages is a challenging task. In addition to that, other requirements have to be fulfilled: mechanical stability and durability, sealing (e.g. high permeation barrier against humidity for lithium-ion technology), high packing efficiency, possible installation of safety devices (current interrupt device

  10. Components of Adenovirus Genome Packaging

    Science.gov (United States)

    Ahi, Yadvinder S.; Mittal, Suresh K.

    2016-01-01

    Adenoviruses (AdVs) are icosahedral viruses with double-stranded DNA (dsDNA) genomes. Genome packaging in AdV is thought to be similar to that seen in dsDNA containing icosahedral bacteriophages and herpesviruses. Specific recognition of the AdV genome is mediated by a packaging domain located close to the left end of the viral genome and is mediated by the viral packaging machinery. Our understanding of the role of various components of the viral packaging machinery in AdV genome packaging has greatly advanced in recent years. Characterization of empty capsids assembled in the absence of one or more components involved in packaging, identification of the unique vertex, and demonstration of the role of IVa2, the putative packaging ATPase, in genome packaging have provided compelling evidence that AdVs follow a sequential assembly pathway. This review provides a detailed discussion on the functions of the various viral and cellular factors involved in AdV genome packaging. We conclude by briefly discussing the roles of the empty capsids, assembly intermediates, scaffolding proteins, portal vertex and DNA encapsidating enzymes in AdV assembly and packaging. PMID:27721809

  11. New package for CMOS sensors

    Science.gov (United States)

    Diot, Jean-Luc; Loo, Kum Weng; Moscicki, Jean-Pierre; Ng, Hun Shen; Tee, Tong Yan; Teysseyre, Jerome; Yap, Daniel

    2004-02-01

    Cost is the main drawback of existing packages for C-MOS sensors (mainly CLCC family). Alternative packages are thus developed world-wide. And in particular, S.T.Microelectronics has studied a low cost alternative packages based on QFN structure, still with a cavity. Intensive work was done to optimize the over-molding operation forming the cavity onto a metallic lead-frame (metallic lead-frame is a low cost substrate allowing very good mechanical definition of the final package). Material selection (thermo-set resin and glue for glass sealing) was done through standard reliability tests for cavity packages (Moisture Sensitivity Level 3 followed by temperature cycling, humidity storage and high temperature storage). As this package concept is new (without leads protruding the molded cavity), the effect of variation of package dimensions, as well as board lay-out design, are simulated on package life time (during temperature cycling, thermal mismatch between board and package leads to thermal fatigue of solder joints). These simulations are correlated with an experimental temperature cycling test with daisy-chain packages.

  12. Tunable on chip optofluidic laser

    DEFF Research Database (Denmark)

    Bakal, Avraham; Vannahme, Christoph; Kristensen, Anders

    2015-01-01

    A chip scale tunable laser in the visible spectral band is realized by generating a periodic droplet array inside a microfluidic channel. Combined with a gain medium within the droplets, the periodic structure provides the optical feedback of the laser. By controlling the pressure applied to two...... separate inlets we can change the period of the droplet array. As a result, the lasing frequency is tuned over a broad spectral range. Using this configuration, we demonstrate wavelength tunability of about 70 nm and lasing threshold of about 15 μJ/mm2....

  13. Submersible Packaging Techniques

    Science.gov (United States)

    1989-07-01

    Butyraldehyde E,K Aniline Hydrochloride E Butyric Acid V,E Fluid codes are defined in paragraph 40.2.1 and are listed in order of recommended use . 20...Furfuryl Alcohol E Ethyl Chloride E,B,N Gallic Acid V,FE Ethyl Chiorocarbonate V,F Gasoline BV,F Ethyl Chioroformate V,F Glycerine B,E Ethylene Chloride...This document describes packaging techniques that would allow sophisticated electronics to be used and transported reliably underwater. 20. DISTRIBUTION

  14. The PIDCalib package

    CERN Document Server

    Anderlini, Lucio; Jones, Christopher Rob; Malde, Sneha Sirirshkumar; Muller, Dominik; Ogilvy, Stephen; Otalora Goicochea, Juan Martin; Pearce, Alex; Polyakov, Ivan; Qian, Wenbin; Sciascia, Barbara; Vazquez Gomez, Ricardo; Zhang, Yanxi

    2016-01-01

    The PIDCalib package is a tool, widely used within the LHCb Collaboration, which provides access to the calibration samples of electrons, muons, pions, kaons and protons. This note covers both theoretical aspects related to the measurement of the efficiency of particle identification requirements, and more technical issues such as the selection of the calibration samples, the background subtraction procedure, and the storage of the data sets in the new data-processing scheme adopted by the LHCb experiment during the second run of the LHC.

  15. Safety Analysis Report for packaging (onsite) steel waste package

    Energy Technology Data Exchange (ETDEWEB)

    BOEHNKE, W.M.

    2000-07-13

    The steel waste package is used primarily for the shipment of remote-handled radioactive waste from the 324 Building to the 200 Area for interim storage. The steel waste package is authorized for shipment of transuranic isotopes. The maximum allowable radioactive material that is authorized is 500,000 Ci. This exceeds the highway route controlled quantity (3,000 A{sub 2}s) and is a type B packaging.

  16. Cluster-lensing: A Python Package for Galaxy Clusters & Miscentering

    OpenAIRE

    Ford, Jes; VanderPlas, Jake

    2016-01-01

    We describe a new open source package for calculating properties of galaxy clusters, including NFW halo profiles with and without the effects of cluster miscentering. This pure-Python package, cluster-lensing, provides well-documented and easy-to-use classes and functions for calculating cluster scaling relations, including mass-richness and mass-concentration relations from the literature, as well as the surface mass density $\\Sigma(R)$ and differential surface mass density $\\Delta\\Sigma(R)$...

  17. Chip-based quantum key distribution

    Science.gov (United States)

    Sibson, P.; Erven, C.; Godfrey, M.; Miki, S.; Yamashita, T.; Fujiwara, M.; Sasaki, M.; Terai, H.; Tanner, M. G.; Natarajan, C. M.; Hadfield, R. H.; O'Brien, J. L.; Thompson, M. G.

    2017-02-01

    Improvement in secure transmission of information is an urgent need for governments, corporations and individuals. Quantum key distribution (QKD) promises security based on the laws of physics and has rapidly grown from proof-of-concept to robust demonstrations and deployment of commercial systems. Despite these advances, QKD has not been widely adopted, and large-scale deployment will likely require chip-based devices for improved performance, miniaturization and enhanced functionality. Here we report low error rate, GHz clocked QKD operation of an indium phosphide transmitter chip and a silicon oxynitride receiver chip--monolithically integrated devices using components and manufacturing processes from the telecommunications industry. We use the reconfigurability of these devices to demonstrate three prominent QKD protocols--BB84, Coherent One Way and Differential Phase Shift--with performance comparable to state-of-the-art. These devices, when combined with integrated single photon detectors, pave the way for successfully integrating QKD into future telecommunications networks.

  18. CHIPS Neutrino Detector Research and Development

    Science.gov (United States)

    Salazar, Ramon; Vahle, Patricia; Chips Collaboration

    2015-04-01

    The CHIPS R&D project is an effort to develop affordable megaton-scale neutrino detectors. The CHIPS strategy calls for submerging water Cherenkov detectors deep under water. The surrounding water acts as structural support, minimizing large initial investments in costly infrastructure, and serves as an overburden, shielding the detector from cosmic rays and eliminating the need for expensive underground construction. Additional cost savings will be achieved through photodetector development and optimization of readout geometry. In summer 2014 a small prototype of the CHIPS detector was deployed in the flooded Wentworth Mine Pit in Northern Minnesota. The detector has been recording data underwater throughout the fall and winter. In this talk, we will discuss lessons learned from the prototyping experience and the plans for submerging much larger detectors in future years.

  19. Color temperature tunable white light emitting diodes packaged with an omni-directional reflector.

    Science.gov (United States)

    Su, Jung-Chieh; Lu, Chun-Lin

    2009-11-23

    This study proposed a correlated color temperature (CCT) tunable phosphor-converted white light emitting diode (LED) with an omni-directional reflector (ODR). Applying current to each individual InGaN based ultraviolet, purple and blue source LED chip of the white LED package, we can achieve the CCT tunability. The optimum color properties of the resulting white light are (0.3347, 0.3384), 5398 K, 81, 3137-8746 K for color coordinates, CCT, color rendering index (CRI) and CCT tuning range, respectively. Roughening the ODR substrate, we solve the non-uniformity color distribution caused by the reflectance of the ODR and positioning of source LED chips.

  20. Packaging's Contribution for the Effectiveness of the Space Station's Food Service Operation

    Science.gov (United States)

    Rausch, B. A.

    1985-01-01

    Storage limitations will have a major effect on space station food service. For example: foods with low bulk density such as ice cream, bread, cake, standard type potato chips and other low density snacks, flaked cereals, etc., will exacerbate the problem of space limitations; package containers are inherently volume consuming and refuse creating; and the useful observation that the optimum package is no package at all leads to the tentative conclusion that the least amount of packaging per unit of food, consistent with storage, aesthetics, preservation, cleanliness, cost and disposal criteria, is the most practical food package for the space station. A series of trade offs may have to be made to arrive at the most appropriate package design for a particular type of food taking all the criteria into account. Some of these trade offs are: single serve vs. bulk; conventional oven vs. microwave oven; nonmetallic aseptically vs. non-aseptically packaged foods; and comparison of aseptic vs. nonaseptic food packages. The advantages and disadvantages are discussed.

  1. ALICE chip processor

    CERN Multimedia

    Maximilien Brice

    2003-01-01

    This tiny chip provides data processing for the time projection chamber on ALICE. Known as the ALICE TPC Read Out (ALTRO), this device was designed to minimize the size and power consumption of the TPC front end electronics. This single chip contains 16 low-power analogue-to-digital converters with six million transistors of digital processing and 8 kbits of data storage.

  2. CH Packaging Operations Manual

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2009-05-27

    This document provides the user with instructions for assembling a payload. All the steps in Subsections 1.2, Preparing 55-Gallon Drum Payload Assembly; 1.3, Preparing "Short" 85-Gallon Drum Payload Assembly (TRUPACT-II and HalfPACT); 1.4, Preparing "Tall" 85-Gallon Drum Payload Assembly (HalfPACT only); 1.5, Preparing 100-Gallon Drum Payload Assembly; 1.6, Preparing Shielded Container Payload Assembly; 1.7, Preparing SWB Payload Assembly; and 1.8, Preparing TDOP Payload Assembly, must be completed, but may be performed in any order as long as radiological control steps are not bypassed. Transport trailer operations, package loading and unloading from transport trailers, hoisting and rigging activities such as ACGLF operations, equipment checkout and shutdown, and component inspection activities must be performed, but may be performed in any order and in parallel with other activities as long as radiological control steps are not bypassed. Steps involving OCA/ICV lid removal/installation and payload removal/loading may be performed in parallel if there are multiple operators working on the same packaging. Steps involving removal/installation of OCV/ICV upper and lower main O-rings must be performed in sequence, except as noted.

  3. CH Packaging Operations Manual

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2008-09-11

    This document provides the user with instructions for assembling a payload. All the steps in Subsections 1.2, Preparing 55-Gallon Drum Payload Assembly; 1.3, Preparing "Short" 85-Gallon Drum Payload Assembly (TRUPACT-II and HalfPACT); 1.4, Preparing "Tall" 85-gallon Drum Payload Assembly (HalfPACT only); 1.5, Preparing 100-Gallon Drum Payload Assembly; 1.6, Preparing SWB Payload Assembly; and 1.7, Preparing TDOP Payload Assembly, must be completed, but may be performed in any order as long as radiological control steps are not bypassed. Transport trailer operations, package loading and unloading from transport trailers, hoisting and rigging activities such as ACGLF operations, equipment checkout and shutdown, and component inspection activities must be performed, but may be performed in any order and in parallel with other activities as long as radiological control steps are not bypassed. Steps involving OCA/ICV lid removal/installation and payload removal/loading may be performed in parallel if there are multiple operators working on the same packaging. Steps involving removal/installation of OCV/ICV upper and lower main O-rings must be performed in sequence.

  4. Single-chip microprocessor that communicates directly using light.

    Science.gov (United States)

    Sun, Chen; Wade, Mark T; Lee, Yunsup; Orcutt, Jason S; Alloatti, Luca; Georgas, Michael S; Waterman, Andrew S; Shainline, Jeffrey M; Avizienis, Rimas R; Lin, Sen; Moss, Benjamin R; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H; Cook, Henry M; Ou, Albert J; Leu, Jonathan C; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J; Popović, Miloš A; Stojanović, Vladimir M

    2015-12-24

    Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems--from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a 'zero-change' approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

  5. Single-chip microprocessor that communicates directly using light

    Science.gov (United States)

    Sun, Chen; Wade, Mark T.; Lee, Yunsup; Orcutt, Jason S.; Alloatti, Luca; Georgas, Michael S.; Waterman, Andrew S.; Shainline, Jeffrey M.; Avizienis, Rimas R.; Lin, Sen; Moss, Benjamin R.; Kumar, Rajesh; Pavanello, Fabio; Atabaki, Amir H.; Cook, Henry M.; Ou, Albert J.; Leu, Jonathan C.; Chen, Yu-Hsin; Asanović, Krste; Ram, Rajeev J.; Popović, Miloš A.; Stojanović, Vladimir M.

    2015-12-01

    Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic-photonic systems enabled by silicon-based nanophotonic devices8. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic-photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic-photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic-photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

  6. Bioderadable Polymers in Food Packaging

    OpenAIRE

    P.A.Pawar

    2013-01-01

    In recent years, there has been a marked increase in the interest in use of biodegradable materials in packaging. The principal function of packaging is protection and preservation of food from external contamination. This function involves retardation of deterioration, extension of shelf life, and maintenance of quality and safety of packaged food. Biodegradable polymers are the one which fulfill all these functions without causing any threat to the environment. The belief is that biodegrada...

  7. Creating R Packages: A Tutorial

    OpenAIRE

    Leisch, Friedrich

    2008-01-01

    This tutorial gives a practical introduction to creating R packages. We discuss how object oriented programming and S formulas can be used to give R code the usual look and feel, how to start a package from a collection of R functions, and how to test the code once the package has been created. As running example we use functions for standard linear regression analysis which are developed from scratch.

  8. IN-PACKAGE CHEMISTRY ABSTRACTION

    Energy Technology Data Exchange (ETDEWEB)

    E. Thomas

    2005-07-14

    This report was developed in accordance with the requirements in ''Technical Work Plan for Postclosure Waste Form Modeling'' (BSC 2005 [DIRS 173246]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as a function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model, which uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model, which is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials, and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed (CDSP) waste packages containing high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor diffusing into the waste package, and (2) seepage water entering the waste package as a liquid from the drift. (1) Vapor-Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H{sub 2}O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Liquid-Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package.

  9. MEMS Devices Packaging Technology%MEMS器件封装技术

    Institute of Scientific and Technical Information of China (English)

    袁永举; 王静

    2012-01-01

    综述了微电子机械系统(MEMS)封装主流技术,包括芯片级封装、器件级封装和系统及封装技术进行了。重点介绍了圆片级键合、倒装焊等封装技术。并对MEMS封装的技术瓶颈进行了分析。%The technologies of MEMS packaging are introduced, including three promising technologies: Wafer Level Packaging, Device Level, System Level Packaging. And the emphasis about using wafer level bonding, flip chip bonding technology. Then several reliability issues in MEMS packaging are pointed out, and a forecast is given for its future trends.

  10. Polylactide nanocomposites for packaging materials: A review

    Science.gov (United States)

    Widiastuti, Indah

    2016-02-01

    This review aims at highlighting on an attempt for improving the properties of polylactide (PLA) as packaging material by application of nanocomposite technology. PLA is attracting considerable interest because of more eco-friendliness from its origin as contrast to the petrochemical-based polymers and its biodegradability. Despite possessing good mechanical and optical properties, deterioration of the material properties in PLA materials during their service time could occur after prolonged exposure to humidity and high temperature condition. Limited gas barrier is another drawback of PLA material that should be overcome to satisfy the requirement for packaging application. To further extend the range of mechanical and thermal properties achievable, several attempts have been made in modifying the material such as blending with other polymers, use of plasticizing material and development of PLA nanocomposites. Nanocomposite is a fairly new type of composite that has emerged in which the reinforcing filler has nanometer scale dimensions (at least one dimension of the filler is less than 100 nm). In this review, the critical properties of PLA as packaging materials and its degradation mechanism are presented. This paper discusses the current effort and key research challenges in the development of nanocomposites based on biodegradable polymer matrices and nano-fillers. The PLA layered silicate nanocomposites where the filler platelets can be dispersed in the polymer at the nanometer scale owing to the specific filler surface modification, frequently exhibits remarkable improvements of mechanical strength, gas barrier and thermal stability.

  11. CHIP, CHIP, ARRAY! THREE CHIPS FOR POST-GENOMIC RESEARCH

    Science.gov (United States)

    Cambridge Healthtech Institute recently held the 4th installment of their popular "Lab-on-a-Chip" series in Zurich, Switzerland. As usual, it was enthusiastically received and over 225 people attended the 2-1/2 day meeting to see and hear about some of the latest developments an...

  12. Large-scale horizontally aligned ZnO microrod arrays with controlled orientation, periodic distribution as building blocks for chip-in piezo-phototronic LEDs.

    Science.gov (United States)

    Guo, Zhen; Li, Haiwen; Zhou, Lianqun; Zhao, Dongxu; Wu, Yihui; Zhang, Zhiqiang; Zhang, Wei; Li, Chuanyu; Yao, Jia

    2015-01-27

    A novel method of fabricating large-scale horizontally aligned ZnO microrod arrays with controlled orientation and periodic distribution via combing technology is introduced. Horizontally aligned ZnO microrod arrays with uniform orientation and periodic distribution can be realized based on the conventional bottom-up method prepared vertically aligned ZnO microrod matrix via the combing method. When the combing parameters are changed, the orientation of horizontally aligned ZnO microrod arrays can be adjusted (θ = 90° or 45°) in a plane and a misalignment angle of the microrods (0.3° to 2.3°) with low-growth density can be obtained. To explore the potential applications based on the vertically and horizontally aligned ZnO microrods on p-GaN layer, piezo-phototronic devices such as heterojunction LEDs are built. Electroluminescence (EL) emission patterns can be adjusted for the vertically and horizontally aligned ZnO microrods/p-GaN heterojunction LEDs by applying forward bias. Moreover, the emission color from UV-blue to yellow-green can be tuned by investigating the piezoelectric properties of the materials. The EL emission mechanisms of the LEDs are discussed in terms of band diagrams of the heterojunctions and carrier recombination processes.

  13. About the ZOOM minimization package

    Energy Technology Data Exchange (ETDEWEB)

    Fischler, M.; Sachs, D.; /Fermilab

    2004-11-01

    A new object-oriented Minimization package is available for distribution in the same manner as CLHEP. This package, designed for use in HEP applications, has all the capabilities of Minuit, but is a re-write from scratch, adhering to modern C++ design principles. A primary goal of this package is extensibility in several directions, so that its capabilities can be kept fresh with as little maintenance effort as possible. This package is distinguished by the priority that was assigned to C++ design issues, and the focus on producing an extensible system that will resist becoming obsolete.

  14. Photonic Wire Bonds for Terabit/s Chip-to-Chip Interconnects

    CERN Document Server

    Lindenmann, Nicole; Hillerkuss, David; Schmogrow, Rene; Jordan, Meinert; Leuthold, Juerg; Freude, Wolfgang; Koos, Christian

    2011-01-01

    Photonic integration has witnessed tremendous progress over the last years, and chip-scale transceiver systems with Terabit/s data rates have come into reach. However, as on-chip integration density increases, efficient off-chip interfaces are becoming more and more crucial. A technological breakthrough is considered indispensable to cope with the challenges arising from large-scale photonic integration, and this particularly applies to short-distance optical interconnects. In this letter we introduce the concept of photonic wire bonding, where transparent waveguide wire bonds are used to bridge the gap between nanophotonic circuits located on different chips. We demonstrate for the first time the fabrication of three-dimensional freeform photonic wire bonds (PWB), and we confirm their viability in a multi-Terabit/s data transmission experiment. First-generation prototypes allow for efficient broadband coupling with overall losses of only 1.6 dB. Photonic wire bonding will enable flexible optical multi-chip a...

  15. Electronic equipment packaging technology

    CERN Document Server

    Ginsberg, Gerald L

    1992-01-01

    The last twenty years have seen major advances in the electronics industry. Perhaps the most significant aspect of these advances has been the significant role that electronic equipment plays in almost all product markets. Even though electronic equipment is used in a broad base of applications, many future applications have yet to be conceived. This versatility of electron­ ics has been brought about primarily by the significant advances that have been made in integrated circuit technology. The electronic product user is rarely aware of the integrated circuits within the equipment. However, the user is often very aware of the size, weight, mod­ ularity, maintainability, aesthetics, and human interface features of the product. In fact, these are aspects of the products that often are instrumental in deter­ mining its success or failure in the marketplace. Optimizing these and other product features is the primary role of Electronic Equipment Packaging Technology. As the electronics industry continues to pr...

  16. A Quality-of-Service Mechanism for Interconnection Networks in System-on-Chips

    CERN Document Server

    Weber, Wolf-Dietrich; Swarbrick, Ian; Wingard, Drew

    2011-01-01

    As Moore's Law continues to fuel the ability to build ever increasingly complex system-on-chips (SoCs), achieving performance goals is rising as a critical challenge to completing designs. In particular, the system interconnect must efficiently service a diverse set of data flows with widely ranging quality-of-service (QoS) requirements. However, the known solutions for off-chip interconnects such as large-scale networks are not necessarily applicable to the on-chip environment. Latency and memory constraints for on-chip interconnects are quite different from larger-scale interconnects. This paper introduces a novel on-chip interconnect arbitration scheme. We show how this scheme can be distributed across a chip for high-speed implementation. We compare the performance of the arbitration scheme with other known interconnect arbitration schemes. Existing schemes typically focus heavily on either low latency of service for some initiators, or alternatively on guaranteed bandwidth delivery for other initiators. ...

  17. Finite element modelling for the investigation of edge effect in acoustic micro imaging of microelectronic packages

    Science.gov (United States)

    Shen Lee, Chean; Zhang, Guang-Ming; Harvey, David M.; Ma, Hong-Wei; Braden, Derek R.

    2016-02-01

    In acoustic micro imaging of microelectronic packages, edge effect is often presented as artifacts of C-scan images, which may potentially obscure the detection of defects such as cracks and voids in the solder joints. The cause of edge effect is debatable. In this paper, a 2D finite element model is developed on the basis of acoustic micro imaging of a flip-chip package using a 230 MHz focused transducer to investigate acoustic propagation inside the package in attempt to elucidate the fundamental mechanism that causes the edge effect. A virtual transducer is designed in the finite element model to reduce the coupling fluid domain, and its performance is characterised against the physical transducer specification. The numerical results showed that the under bump metallization (UBM) structure inside the package has a significant impact on the edge effect. Simulated wavefields also showed that the edge effect is mainly attributed to the horizontal scatter, which is observed in the interface of silicon die-to-the outer radius of solder bump. The horizontal scatter occurs even for a flip-chip package without the UBM structure.

  18. Heat Transfer Characteristics in High Power LED Packaging

    Directory of Open Access Journals (Sweden)

    Chi-Hung Chung

    2014-03-01

    Full Text Available This study uses the T3Ster transient thermal resistance measuring device to investigate the effects to heat transfer performances from different LED crystal grains, packaging methods and heat-sink substrates through the experimental method. The experimental parameters are six different types of LED modules that are made alternatively with the crystal grain structure, the die attach method and the carrying substrate. The crystal grain structure includes the lateral type, flip chip type and vertical type. The die attach method includes silver paste and the eutectic structure. The carrying substrates are aluminum oxide (Alumina and aluminum nitride (AIN ceramic substrates and metal core PCB (MCPCB. The experimental results show that, under the conditions of the same crystal grain and die attach method, the thermal resistance values for the AIN substrate and the Alumina substrate are 2.1K/W and 5.1K/W, respectively and the total thermal resistance values are 7.3K/W and 10.8K/W. Compared to the Alumina substrate, the AIN substrate can effectively lower the total thermal resistance value by 32.4%. This is because the heat transfer coefficient of the AIN substrate is higher than that of the Alumina substrate, thus effectively increasing its thermal conductivity. In addition, under the conditions of the same crystal grain and the same substrate, the packaging methods are using silver paste and the eutectic structure for die attach. Their thermal resistance values are 5.7K/W and 2.7K/W, respectively, with a variance of 3K/W. Comparisons of the crystal grain structure show that the thermal resistance for the flip chip type is lower than that of the traditional lateral type by 0.9K/W. This is because the light emitting layer of the flip chip crystal grain is closer to the heat-sink substrate, shortening the heat dissipation route, and thus lowering the thermal resistance value. For the total thermal resistance, the crystal grain structure has a lesser

  19. M-Sequence-Based Single-Chip UWB-Radar Sensor

    Science.gov (United States)

    Kmec, M.; Helbig, M.; Herrmann, R.; Rauschenbach, P.; Sachs, J.; Schilling, K.

    The article deals with a fully monolithically integrated single-chip M-sequence-based UWB-radar sensor, its architecture, selected design aspects and first measurement results performed on wafer and with packaged IC modules. The discussed chip is equipped with one transmitter and two receivers. The IC was designed and manufactured in commercially available high-performance 0.25 μm SiGe BiCMOS technology (f t = 110 GHz). Due to the combination of fast digital and broadband analogue system blocks in one chip, special emphasis has been placed on the electrical isolation of these functional structures. The manufactured IC is enclosed in a low-cost QFN (quad flat-pack no-leads) package and mounted on a PCB permitting the creation of MIMO-sensor arrays by cascading a number of modules. In spite of its relatively high complexity, the sensor head features a compact design (chip size of 2 × 1 mm2, QFN package size 5 × 5 mm2) and moderate power consumption (below 1 W at -3 V supply). The assembled transceiver chip can handle signals in the frequency range from near DC up to 18 GHz. This leads to an impulse response (IRF) of FWHD ≈ 50 ps (full width at half duration).

  20. In vitro and in vivo on-chip biofluorescence imaging using a CMOS image sensor

    Science.gov (United States)

    Ng, David C.; Matsuo, Masamichi; Tokuda, Takashi; Kagawa, Keiichiro; Nunoshita, Masahiro; Ohta, Jun

    2006-02-01

    We have designed and fabricated a 176×144-pixels (QCIF) CMOS image sensor for on-chip bio-fluorescence imaging of the mouse brain. In our approach, a single CMOS image sensor chip without additional optics is used. This enables imaging at arbitrary depths into the brain; a clear advantage compared to existing optical microscopy methods. Packaging of the chip represents a challenge for in vivo imaging. We developed a novel packaging process whereby an excitation filter is applied onto the sensor. This eliminates the use of a filter cube found in conventional fluorescence microscopes. The fully packaged chip is about 350 μm thick. Using the device, we demonstrated in vitro on-chip fluorescence imaging of a 400 μm thick mouse brain slice detailing the hippocampus. The image obtained compares favorably to the image captured by conventional microscopes in terms of image resolution. In order to study imaging in vivo, we also developed a phantom media. In situ fluorophore measurement shows that detection through the turbid medium of up to 1 mm thickness is possible. We have successfully demonstrated imaging deep into the hippocampal region of the mouse brain where quantitative fluorometric measurements was made. This work is expected to lead to a promising new tool for imaging the brain in vivo.

  1. Development and application of compact models of packages based on DELPHI methodology

    CERN Document Server

    Parry, J; Shidore, S

    1997-01-01

    The accurate prediction of the temperatures of critical electronic parts at the package- board- and system-level is seriously hampered by the lack of reliable, standardised input data for the characterisation of the thermal $9 behaviour of these parts. The recently completed collaborative European project, DELPHI has been concerned with the creation and experimental validation of thermal models (both detailed and compact) of a range of electronic parts, $9 including mono-chip packages. This paper demonstrates the reliable performance of thermal compact models in a range of applications, by comparison with the detailed models from which they were derived. (31 refs).

  2. Heat management in integrated circuits on-chip and system-level monitoring and cooling

    CERN Document Server

    Ogrenci-Memik, Seda

    2016-01-01

    This essential overview covers the subject of thermal monitoring and management in integrated circuits. Specifically, it focuses on devices and materials that are intimately integrated on-chip (as opposed to in-package or on-board) for the purposes of thermal monitoring and thermal management.

  3. Reliability of High I/O High Density CCGA Interconnect Electronic Packages under Extreme Thermal Environment

    Science.gov (United States)

    Ramesham, Rajeshuni

    2012-01-01

    This paper provides the experimental test results of advanced CCGA packages tested in extreme temperature thermal environments. Standard optical inspection and x-ray non-destructive inspection tools were used to assess the reliability of high density CCGA packages for deep space extreme temperature missions. Ceramic column grid array (CCGA) packages have been increasing in use based on their advantages such as high interconnect density, very good thermal and electrical performances, compatibility with standard surface-mount packaging assembly processes, and so on. CCGA packages are used in space applications such as in logic and microprocessor functions, telecommunications, payload electronics, and flight avionics. As these packages tend to have less solder joint strain relief than leaded packages or more strain relief over lead-less chip carrier packages, the reliability of CCGA packages is very important for short-term and long-term deep space missions. We have employed high density CCGA 1152 and 1272 daisy chained electronic packages in this preliminary reliability study. Each package is divided into several daisy-chained sections. The physical dimensions of CCGA1152 package is 35 mm x 35 mm with a 34 x 34 array of columns with a 1 mm pitch. The dimension of the CCGA1272 package is 37.5 mm x 37.5 mm with a 36 x 36 array with a 1 mm pitch. The columns are made up of 80% Pb/20%Sn material. CCGA interconnect electronic package printed wiring polyimide boards have been assembled and inspected using non-destructive x-ray imaging techniques. The assembled CCGA boards were subjected to extreme temperature thermal atmospheric cycling to assess their reliability for future deep space missions. The resistance of daisy-chained interconnect sections were monitored continuously during thermal cycling. This paper provides the experimental test results of advanced CCGA packages tested in extreme temperature thermal environments. Standard optical inspection and x-ray non

  4. Polyhydroxyalkanoates (PHA) Bioplastic Packaging Materials

    Science.gov (United States)

    2010-05-01

    sheets is either expensive or logistically complicated3. Polyhydroxyalkanoates (PHA) are a family of biobased , biodegradable natural plastics that... plastic for foamed packaging and stretch/shrink film applications. PHA packaging foams and stretch-shrink films were produced and tested for...accelerated our success in developing PHA foaming technology. Page 1 Executive Summary Polyhydroxyalkanoates (PHA) are a family of biobased

  5. Oral Hygiene. Learning Activity Package.

    Science.gov (United States)

    Hime, Kirsten

    This learning activity package on oral hygiene is one of a series of 12 titles developed for use in health occupations education programs. Materials in the package include objectives, a list of materials needed, a list of definitions, information sheets, reviews (self evaluations) of portions of the content, and answers to reviews. These topics…

  6. 19 CFR 191.13 - Packaging materials.

    Science.gov (United States)

    2010-04-01

    ... 19 Customs Duties 2 2010-04-01 2010-04-01 false Packaging materials. 191.13 Section 191.13 Customs... (CONTINUED) DRAWBACK General Provisions § 191.13 Packaging materials. (a) Imported packaging material... packaging material when used to package or repackage merchandise or articles exported or destroyed...

  7. 49 CFR 173.411 - Industrial packagings.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 2 2010-10-01 2010-10-01 false Industrial packagings. 173.411 Section 173.411... SHIPMENTS AND PACKAGINGS Class 7 (Radioactive) Materials § 173.411 Industrial packagings. (a) General. Each industrial packaging must comply with the requirements of this section which specifies packaging tests,...

  8. Investigation of the mechanical and thermal reliability of quilt packaging

    Science.gov (United States)

    Zheng, Quanling

    An interchip interconnection approach based on a new 2-D system-in-package (SiP) method---Quilt Packaging (QP), invented at the University of Notre Dame, is discussed. The principal idea of QP is to assemble a planar mosaic, or "quilt," of dies interconnected by conductive nodules that protrude from vertical faces of ICs. QP offers reduced delay, ultrawide bandwidth, low electrical noise, decreased system size and weight, and the opportunity for heterogeneous integration. In this dissertation, modifications to previous QP fabrication processes are introduced. A new joining method for QP interconnection is presented, using solder paste applied with the pin transfer method, which greatly improves mechanical and thermal reliability, and manufacturability. Chip-to-chip alignment offsets smaller than 1 mum are demonstrated. Simulations and measurements indicate that the microwave performance of QP interconnects provides ultrawide bandwidth. Moreover, the use of solder paste does not significantly degrade the microwave performance of QP. In particular, the return loss associated with the chip-to-chip QP nodules is better than 12.5 dB, and the insertion loss is better than 0.8 dB, at frequencies up to 110 GHz. Mechanical and thermal reliability testing were performed on QP, including pull and thermal shock tests. A novel mechanical testing system that combines a force gauge and a micropull tester was designed and constructed. Pull tests were used to investigate the mechanical strength of QP, and it is found that individual nodules are about as strong as individual wirebonds, but acting together require several pounds of force to separate the chips. Investigations were conducted to learn the effects of thermal shock on all components of the nodule system, including the inter-nodule solder, the copper nodule itself, and the nodule-to-substrate interface layers. Pull tests were performed after thermal shock testing, and it was found that during the first 200 thermal shock

  9. Lab-on-a-chip pathogen sensors for food safety.

    Science.gov (United States)

    Yoon, Jeong-Yeol; Kim, Bumsang

    2012-01-01

    There have been a number of cases of foodborne illness among humans that are caused by pathogens such as Escherichia coli O157:H7, Salmonella typhimurium, etc. The current practices to detect such pathogenic agents are cell culturing, immunoassays, or polymerase chain reactions (PCRs). These methods are essentially laboratory-based methods that are not at all real-time and thus unavailable for early-monitoring of such pathogens. They are also very difficult to implement in the field. Lab-on-a-chip biosensors, however, have a strong potential to be used in the field since they can be miniaturized and automated; they are also potentially fast and very sensitive. These lab-on-a-chip biosensors can detect pathogens in farms, packaging/processing facilities, delivery/distribution systems, and at the consumer level. There are still several issues to be resolved before applying these lab-on-a-chip sensors to field applications, including the pre-treatment of a sample, proper storage of reagents, full integration into a battery-powered system, and demonstration of very high sensitivity, which are addressed in this review article. Several different types of lab-on-a-chip biosensors, including immunoassay- and PCR-based, have been developed and tested for detecting foodborne pathogens. Their assay performance, including detection limit and assay time, are also summarized. Finally, the use of optical fibers or optical waveguide is discussed as a means to improve the portability and sensitivity of lab-on-a-chip pathogen sensors.

  10. In-package P/G planes analysis and optimization based on transmission matrix method

    Institute of Scientific and Technical Information of China (English)

    Yin-jun WANG; Cheng ZHUO; Jun-yong DENG; Jin-fang ZHOU; Kang-sheng CHEN

    2008-01-01

    Power integrity (PI) has become a limiting factor for the chip's overall performance, and how to place in-package decoupling capacitors to improve a chip's PI performance has become a hot issue. In this paper, we propose an improved transmission matrix method (TMM) for fast decoupling capacitance allocation. An irregular grid partition mechanism is proposed, which helps speed up the impedance computation and complies better with the irregular power/ground (P/G) plane or planes with many vias and decoupling capacitors. Furthermore, we also ameliorate the computation procedure of the impedance matrix whenever decoupling capacitors are inserted or removed at specific ports. With the fast computation of impedance change, in-package decoupling capacitor allocation is done with an efficient change based method in the frequency domain. Experimental results show that our approach can gain about 5× speedup compared with a general TMM, and is efficient in restraining the noise on the P/G plane.

  11. Nanocomposite Sensors for Food Packaging

    Science.gov (United States)

    Avella, Maurizio; Errico, Maria Emanuela; Gentile, Gennaro; Volpe, Maria Grazia

    Nowadays nanotechnologies applied to the food packaging sector find always more applications due to a wide range of benefits that they can offer, such as improved barrier properties, improved mechanical performance, antimicrobial properties and so on. Recently many researches are addressed to the set up of new food packaging materials, in which polymer nanocomposites incorporate nanosensors, developing the so-called "smart" packaging. Some examples of nanocomposite sensors specifically realised for the food packaging industry are reported. The second part of this work deals with the preparation and characterisation of two new polymer-based nanocomposite systems that can be used as food packaging materials. Particularly the results concerning the following systems are illustrated: isotactic polypropylene (iPP) filled with CaCO3 nanoparticles and polycaprolactone (PCL) filled with SiO2 nanoparticles.

  12. Wafer level vacuum packaging of scanning micro-mirrors using glass-frit and anodic bonding methods

    Science.gov (United States)

    Langa, S.; Drabe, C.; Kunath, C.; Dreyhaupt, A.; Schenk, H.

    2013-03-01

    In this paper the authors report about the six inch wafer level vacuum packaging of electro-statically driven two dimensional micro-mirrors. The packaging was done by means of two types of wafer bonding methods: anodic and glass frit. The resulting chips after dicing are 4 mm wide, 6 mm long and 1.6 mm high and the residual pressure inside the package after dicing was estimated to be between 2 and 20 mbar. This allowed us to reduce the driving voltage of the micro-mirrors by more than 40% compared to the driving voltage without vacuum packaging. The vacuum stability after 5 months was verified by measurement using the so called "membrane method". Persistence of the vacuum was proven. No getter materials were used for packaging.

  13. 78 FR 13083 - Products Having Laminated Packaging, Laminated Packaging, and Components Thereof; Notice of...

    Science.gov (United States)

    2013-02-26

    ... COMMISSION Products Having Laminated Packaging, Laminated Packaging, and Components Thereof; Notice of... Commission has received a complaint entitled Products Having Laminated ] Packaging, Laminated Packaging, and Components Thereof, DN 2940; the Commission is soliciting comments on any public interest issues raised...

  14. 78 FR 19007 - Certain Products Having Laminated Packaging, Laminated Packaging, and Components Thereof...

    Science.gov (United States)

    2013-03-28

    ... COMMISSION Certain Products Having Laminated Packaging, Laminated Packaging, and Components Thereof... importation of certain products having laminated packaging, laminated packaging, and components thereof by... Investigation: Having considered the complaint, the U.S. International Trade Commission, on March 22,...

  15. Laser-assisted ultrathin bare die packaging: a route to a new class of microelectronic devices

    Science.gov (United States)

    Marinov, Val R.; Swenson, Orven; Atanasov, Yuriy; Schneck, Nathan

    2013-03-01

    Ultrathin flip-chip semiconductor die packaging on paper substrates is an enabling technology for a variety of extremely low-cost electronic devices with huge market potential such as RFID smart forms, smart labels, smart tickets, banknotes, security documents, etc. Highly flexible and imperceptible dice are possible only at a thickness of less than 50 μm, preferably down to 10-20 μm or less. Several cents per die cost is achievable only if the die size is technology today can package such die onto a flexible substrate at low cost and high rate. The laser-enabled advanced packaging (LEAP) technology has been developed at the Center for Nanoscale Science and Engineering, North Dakota State University in Fargo, North Dakota, to accomplish this objective. Presented are results using LEAP to assemble dice with various thicknesses, including 350 μm/side dice as thin as 20 μm and less. To the best of our knowledge, this is the first report of using a laser to package conventional silicon dice with such small size and thickness. LEAP-packaged RFID-enabled paper for financial and security applications is also demonstrated. The cost of packaging using LEAP is lower compared to the conventional pick-and-place methods while the rate of packaging is much higher and independent of the die size.

  16. Problem-based learning packages: considerations for neophyte package writers.

    Science.gov (United States)

    Hengstberger-Sims, C; McMillan, M A

    1993-02-01

    Adopting problem-based learning (PBL) as the major educational approach in the implementation of a nursing curriculum requires the development of numerous learning stimulus packages. When reviewing the experience of the Division of Nursing within the Faculty of Health at the University of Western Sydney, Macarthur in Australia, several considerations for package writers were identified and are discussed. These include needs assessment, integration of the curricula content strands, multi-media learning stimuli, context, role and the incorporation of ongoing client management. The need for nurturance of writers and peer review of the developed packages is also addressed, as is a review of the impact of different learning stimuli.

  17. China's first WLAN chips

    Institute of Scientific and Technical Information of China (English)

    2007-01-01

    @@ The wireless local area network (WLAN) chips independently developed by CAS researchers were in the limelight of the recent Electronic Manufacture Exposition held in Suzhou, east China's Jiangsu Province.

  18. CHIP Enrollment Reports

    Data.gov (United States)

    U.S. Department of Health & Human Services — CHIP quarterly and annual statistical enrollment reports. The quarterly reports contain point-in-time and ever enrolled data and the annual reports contain ever...

  19. Medicaid CHIP ESPC Database

    Data.gov (United States)

    U.S. Department of Health & Human Services — The Environmental Scanning and Program Characteristic (ESPC) Database is in a Microsoft (MS) Access format and contains Medicaid and CHIP data, for the 50 states and...

  20. In-Package Chemistry Abstraction

    Energy Technology Data Exchange (ETDEWEB)

    E. Thomas

    2004-11-09

    This report was developed in accordance with the requirements in ''Technical Work Plan for: Regulatory Integration Modeling and Analysis of the Waste Form and Waste Package'' (BSC 2004 [DIRS 171583]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model that uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model that is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed waste packages that contain both high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor that diffuses into the waste package, and (2) seepage water that enters the waste package from the drift as a liquid. (1) Vapor Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H2O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Water Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package. TSPA-LA uses the vapor influx case for the nominal scenario for simulations where the waste

  1. Perfume Packaging, Seduction and Gender

    Directory of Open Access Journals (Sweden)

    Magdalena Petersson McIntyre

    2013-06-01

    Full Text Available This article examines gender and cultural sense-making in relation to perfumes and their packaging. Gendered meanings of seduction, choice, consumption and taste are brought to the fore with the use of go-along interviews with consumers in per-fume stores. Meeting luxury packages in this feminized environment made the interviewed women speak of bottles as objects to fall in love with and they de-scribed packages as the active part in an act of seduction where they were expect-ing packages to persuade them into consumption. The interviewed men on the other hand portrayed themselves as active choice-makers and stressed that they were always in control and not seduced by packaging. However, while their ways of explaining their relationship with packaging on the surface seems to confirm cultural generalizations in relation to gender and seduction, the article argues that letting oneself be seduced is no less active than seducing. Based on a combination of actor network theories and theories of gender performativity the article points to the agency of packaging for constructions of gender and understands the inter-viewees as equally animated by the flows of passion which guide their actions.

  2. Bioderadable Polymers in Food Packaging

    Directory of Open Access Journals (Sweden)

    P.A.Pawar

    2013-01-01

    Full Text Available In recent years, there has been a marked increase in the interest in use of biodegradable materials in packaging. The principal function of packaging is protection and preservation of food from external contamination. This function involves retardation of deterioration, extension of shelf life, and maintenance of quality and safety of packaged food. Biodegradable polymers are the one which fulfill all these functions without causing any threat to the environment. The belief is that biodegradable polymer materials will reduce the need for synthetic polymer production (thus reducing pollution at a low cost, thereby producing a positive effect both environmentally and economically.

  3. Packaging systems for animal origin food

    Directory of Open Access Journals (Sweden)

    2011-03-01

    Full Text Available The main task of food packaging is to protect the product during storage and transport against the action of biological, chemical and mechanical factors. The paper presents packaging systems for food of animal origin. Vacuum and modified atmosphere packagings were characterised together with novel types of packagings, referred to as intelligent packaging and active packaging. The aim of this paper was to present all advantages and disadvantages of packaging used for meat products. Such list enables to choose the optimal type of packaging for given assortment of food and specific conditions of the transport and storing.

  4. Microelectronics packaging research directions for aerospace applications

    Science.gov (United States)

    Galbraith, L.

    2003-01-01

    The Roadmap begins with an assessment of needs from the microelectronics for aerospace applications viewpoint. Needs Assessment is divided into materials, packaging components, and radiation characterization of packaging.

  5. Development of a sensory test method for odor measurement in a package headspace

    DEFF Research Database (Denmark)

    Reinbach, Helene Christine; Allesen-Holm, Bodil Helene; Kristoffersson, Lars

    2011-01-01

    The aim of the present study was to develop a sensory method to evaluate off-odors in a package headspace relative to a reference scale. Selection of panelists was performed with a questionnaire and with the Sniffin' stick test. A 1-butanol reference scale and three types of scales (a 15-cm line......, a color-graded brightness line scale and a color-graded brightness category scale) were compared. 1-butanol proved to be a reliable reference scale for the off-odor intensity in the package headspace. The type of scales did not affect the odor intensity ratings; however, the color-graded brightness line...... scale tended to give a greater accuracy of scored odor intensity. The color-graded brightness scale may strengthen the repeatability of the intensity measures due to the cross-modal support in the judgment processes. The method allows the conversion of intensity judgment of a package headspace...

  6. Conceptual waste packaging options for deep borehole disposal

    Energy Technology Data Exchange (ETDEWEB)

    Su, Jiann -Cherng [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States); Hardin, Ernest L. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States)

    2015-07-01

    This report presents four concepts for packaging of radioactive waste for disposal in deep boreholes. Two of these are reference-size packages (11 inch outer diameter) and two are smaller (5 inch) for disposal of Cs/Sr capsules. All four have an assumed length of approximately 18.5 feet, which allows the internal length of the waste volume to be 16.4 feet. However, package length and volume can be scaled by changing the length of the middle, tubular section. The materials proposed for use are low-alloy steels, commonly used in the oil-and-gas industry. Threaded connections between packages, and internal threads used to seal the waste cavity, are common oilfield types. Two types of fill ports are proposed: flask-type and internal-flush. All four package design concepts would withstand hydrostatic pressure of 9,600 psi, with factor safety 2.0. The combined loading condition includes axial tension and compression from the weight of a string or stack of packages in the disposal borehole, either during lower and emplacement of a string, or after stacking of multiple packages emplaced singly. Combined loading also includes bending that may occur during emplacement, particularly for a string of packages threaded together. Flask-type packages would be fabricated and heat-treated, if necessary, before loading waste. The fill port would be narrower than the waste cavity inner diameter, so the flask type is suitable for directly loading bulk granular waste, or loading slim waste canisters (e.g., containing Cs/Sr capsules) that fit through the port. The fill port would be sealed with a tapered, threaded plug, with a welded cover plate (welded after loading). Threaded connections between packages and between packages and a drill string, would be standard drill pipe threads. The internal flush packaging concepts would use semi-flush oilfield tubing, which is internally flush but has a slight external upset at the joints. This type of tubing can be obtained with premium, low

  7. Error Control for Network-on-Chip Links

    CERN Document Server

    Fu, Bo

    2012-01-01

    As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed to address the reliability problem of on-chip communications. This book focuses on the use of error control codes (ECCs) to improve on-chip interconnect reliability. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance. Provides a detailed background on the state of error control methods for on-chip interconnects; Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links; Examines energy-efficient techniques for integrating multiple error...

  8. On-chip pretreatment of whole blood by using MEMS technology

    CERN Document Server

    Chen, Xing

    2012-01-01

    Microfabrication technology has stimulated a plurality of lab-on-a-chip research and development efforts aimed at enabling biomedical researchers and health care practitioners to manipulate and analyze complex biological fluids at the nano and microliter scale. On-chip pretreatment of whole blood is one of the hottest topics in lab-on-a-chip research since whole blood has been regarded as the most important clinical sample. Various microfluidic chips for blood sample pretreatment, such as plasma isolation, cells separation, cells lysis, gene or protein purification, etc., are described in this

  9. New Packaging for Amplifier Slabs

    Energy Technology Data Exchange (ETDEWEB)

    Riley, M. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Thorsness, C. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Suratwala, T. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Steele, R. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Rogowski, G. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2015-03-18

    The following memo provides a discussion and detailed procedure for a new finished amplifier slab shipping and storage container. The new package is designed to maintain an environment of <5% RH to minimize weathering.

  10. Packaging Review Guide for Reviewing Safety Analysis Reports for Packagings

    Energy Technology Data Exchange (ETDEWEB)

    DiSabatino, A; Biswas, D; DeMicco, M; Fisher, L E; Hafner, R; Haslam, J; Mok, G; Patel, C; Russell, E

    2007-04-12

    This Packaging Review Guide (PRG) provides guidance for Department of Energy (DOE) review and approval of packagings to transport fissile and Type B quantities of radioactive material. It fulfills, in part, the requirements of DOE Order 460.1B for the Headquarters Certifying Official to establish standards and to provide guidance for the preparation of Safety Analysis Reports for Packagings (SARPs). This PRG is intended for use by the Headquarters Certifying Official and his or her review staff, DOE Secretarial offices, operations/field offices, and applicants for DOE packaging approval. This PRG is generally organized at the section level in a format similar to that recommended in Regulatory Guide 7.9 (RG 7.9). One notable exception is the addition of Section 9 (Quality Assurance), which is not included as a separate chapter in RG 7.9. Within each section, this PRG addresses the technical and regulatory bases for the review, the manner in which the review is accomplished, and findings that are generally applicable for a package that meets the approval standards. This Packaging Review Guide (PRG) provides guidance for DOE review and approval of packagings to transport fissile and Type B quantities of radioactive material. It fulfills, in part, the requirements of DOE O 460.1B for the Headquarters Certifying Official to establish standards and to provide guidance for the preparation of Safety Analysis Reports for Packagings (SARPs). This PRG is intended for use by the Headquarters Certifying Official and his review staff, DOE Secretarial offices, operations/field offices, and applicants for DOE packaging approval. The primary objectives of this PRG are to: (1) Summarize the regulatory requirements for package approval; (2) Describe the technical review procedures by which DOE determines that these requirements have been satisfied; (3) Establish and maintain the quality and uniformity of reviews; (4) Define the base from which to evaluate proposed changes in scope

  11. Watermarking spot colors in packaging

    Science.gov (United States)

    Reed, Alastair; Filler, TomáÅ.¡; Falkenstern, Kristyn; Bai, Yang

    2015-03-01

    In January 2014, Digimarc announced Digimarc® Barcode for the packaging industry to improve the check-out efficiency and customer experience for retailers. Digimarc Barcode is a machine readable code that carries the same information as a traditional Universal Product Code (UPC) and is introduced by adding a robust digital watermark to the package design. It is imperceptible to the human eye but can be read by a modern barcode scanner at the Point of Sale (POS) station. Compared to a traditional linear barcode, Digimarc Barcode covers the whole package with minimal impact on the graphic design. This significantly improves the Items per Minute (IPM) metric, which retailers use to track the checkout efficiency since it closely relates to their profitability. Increasing IPM by a few percent could lead to potential savings of millions of dollars for retailers, giving them a strong incentive to add the Digimarc Barcode to their packages. Testing performed by Digimarc showed increases in IPM of at least 33% using the Digimarc Barcode, compared to using a traditional barcode. A method of watermarking print ready image data used in the commercial packaging industry is described. A significant proportion of packages are printed using spot colors, therefore spot colors needs to be supported by an embedder for Digimarc Barcode. Digimarc Barcode supports the PANTONE spot color system, which is commonly used in the packaging industry. The Digimarc Barcode embedder allows a user to insert the UPC code in an image while minimizing perceptibility to the Human Visual System (HVS). The Digimarc Barcode is inserted in the printing ink domain, using an Adobe Photoshop plug-in as the last step before printing. Since Photoshop is an industry standard widely used by pre-press shops in the packaging industry, a Digimarc Barcode can be easily inserted and proofed.

  12. Software package requirements and procurement

    OpenAIRE

    1996-01-01

    This paper outlines the problems of specifying requirements and deploying these requirements in the procurement of software packages. Despite the fact that software construction de novo is the exception rather than the rule, little or no support for the task of formulating requirements to support assessment and selection among existing software packages has been developed. We analyse the problems arising in this process and review related work. We outline the key components of a programme of ...

  13. Wirebond crosstalk and cavity modes in large chip mounts for superconducting qubits

    Energy Technology Data Exchange (ETDEWEB)

    Wenner, J; Neeley, M; Bialczak, Radoslaw C; Lenander, M; Lucero, Erik; O' Connell, A D; Sank, D; Wang, H; Weides, M; Cleland, A N; Martinis, John M, E-mail: martinis@physics.ucsb.edu [Department of Physics, University of California, Santa Barbara, CA 93106 (United States)

    2011-06-15

    We analyze the performance of a microwave chip mount that uses wirebonds to connect the chip and mount grounds. A simple impedance ladder model predicts that transmission crosstalk between two feedlines falls off exponentially with distance at low frequencies, but rises to near unity above a resonance frequency set by the chip to ground capacitance. Using SPICE simulations and experimental measurements of a scale model, the basic predictions of the ladder model were verified. In particular, by decreasing the capacitance between the chip and box grounds, the resonance frequency increased and transmission decreased. This model then influenced the design of a new mount that improved the isolation to - 65 dB at 6 GHz, even though the chip dimensions were increased to 1 cm x 1 cm, three times as large as our previous devices. We measured a coplanar resonator in this mount as preparation for larger qubit chips, and were able to identify cavity, slotline, and resonator modes.

  14. Packaging food for radiation processing

    Science.gov (United States)

    Komolprasert, Vanee

    2016-12-01

    Irradiation can play an important role in reducing pathogens that cause food borne illness. Food processors and food safety experts prefer that food be irradiated after packaging to prevent post-irradiation contamination. Food irradiation has been studied for the last century. However, the implementation of irradiation on prepackaged food still faces challenges on how to assess the suitability and safety of these packaging materials used during irradiation. Irradiation is known to induce chemical changes to the food packaging materials resulting in the formation of breakdown products, so called radiolysis products (RP), which may migrate into foods and affect the safety of the irradiated foods. Therefore, the safety of the food packaging material (both polymers and adjuvants) must be determined to ensure safety of irradiated packaged food. Evaluating the safety of food packaging materials presents technical challenges because of the range of possible chemicals generated by ionizing radiation. These challenges and the U.S. regulations on food irradiation are discussed in this article.

  15. Fuzzy Logic Control ASIC Chip

    Institute of Scientific and Technical Information of China (English)

    沈理

    1997-01-01

    A fuzzy logic control VLSI chip,F100,for industry process real-time control has been designed and fabricated with 0.8μm CMOS technology.The chip has the features of simplicity,felexibility and generality.This paper presents the Fuzzy control inrerence method of the chip,its VLSI implementation,and testing esign consideration.

  16. Antenna-in-package system integrated with meander line antenna based on LTCC technology

    Institute of Scientific and Technical Information of China (English)

    Gang DONG; Wei XIONG; Zhao-yao WU; Yin-tang YANG

    2016-01-01

    We present an antenna-in-package system integrated with a meander line antenna based on low temperature co-fi red ceramic (LTCC) technology. The proposed system employs a meander line patch antenna, a packaging layer, and a laminated multi-chip module (MCM) for integration of integrated circuit (IC) bare chips. A microstrip feed line is used to reduce the interaction between patch and package. To decrease electromagnetic coupling, a via hole structure is designed and analyzed. The meander line antenna achieved a bandwidth of 220 MHz with the center frequency at 2.4 GHz, a maximum gain of 2.2 dB, and a radiation efficiency about 90% over its operational frequency. The whole system, with a small size of 20.2 mm×6.1 mm×2.6 mm, can be easily realized by a standard LTCC process. This antenna-in-package system integrated with a meander line antenna was fabricated and the experimental results agreed with simulations well.

  17. Antenna-in-package system integrated with meander line antenna based on LTCC technology

    Institute of Scientific and Technical Information of China (English)

    Gang DONG; Wei XIONG; Zhao-yao WU; Yin-tang YANG

    2016-01-01

    We present an antenna-in-package system integrated with a meander line antenna based on low temperature co-fired ceramic (LTCC) technology. The proposed system employs a meander line patch antenna, a packaging layer, and a laminated multi-chip module (MCM) for integration of integrated circuit (IC) bare chips. A microstrip feed line is used to reduce the interaction between patch and package. To decrease electromagnetic coupling, a via hole structure is designed and analyzed. The meander line antenna achieved a bandwidth of 220 MHz with the center frequency at 2.4 GHz, a maximum gain of 2.2 dB, and a radiation efficiency about 90% over its operational frequency. The whole system, with a small size of 20.2 minx6.1 mmx2.6 mm, can be easily realized by a standard LTCC process. This antenna-in-package system integrated with a meander line antenna was fabricated and the experimental results agreed with simulations well.

  18. Packaging Challenges and Solutions for Multi-Stack Die Applications%多层芯片应用中的封装挑战和解决方案

    Institute of Scientific and Technical Information of China (English)

    BobChylak; IvyWeiQin

    2003-01-01

    The continuous growth of stacked die packages is resulting from the technology's ability to effectively increase the functionality and capacity of electronic devices within the same footprint as a single chip. The increased utilization of stacked die packages in cell phone and other consumer products drives technologies that enable multiple die stacks within a given package dimension.This paper reviews the technology requirements and challenges for stacked die packages. Foremost among these is meeting package height requirements. For example, a standard package height is 1.2 mm for a single die package. For stacked die packages, two or more die need to fit in the same area. That means every dimension in the package has to decrease, including the die thickness, the mold cap thickness,the bond line thickness and the wire bond loop profile. The technology enablers for stacked die packages include wafer thinning, thin die attachment, low profile wire bonding, bonding to unsupported edges and low sweep molding.This article focuses on stacked die interconnect requirements. Technologies including forward ball bonding, reverse ball bonding and stud bumping for flip chip applications are reviewed, and the advantages and trade-offs are discussed. Developments in ball bonder capabilities to meet the challenges of stacked die packages are presented, such as ultra-low loop shapes, long wire spans and overhang bonding. Packaging design guidelines to maximize productivity and assembly yield are proposed to address the critical design and assembly issues such as maximum die over hang length at different die thickness, wire bond parameter optimization to minimize yield loss due to wire shorts, die crack and other wire bonding defects.

  19. Practical steady-state temperature prediction of active embedded chips into high density electronic board

    Science.gov (United States)

    Monier-Vinard, Eric; Rogie, Brice; Nguyen, Nhat-Minh; Laraqi, Najib; Bissuel, Valentin; Daniel, Olivier

    2016-09-01

    Printed Wiring Board die embedding technology is an innovative packaging alternative to address a very high degree of integration by stacking multiple core layers housing active chips. Nevertheless this increases the thermal management challenges by concentrating heat dissipation at the heart of the substrate and exacerbates the need of adequate cooling. In order to allow the electronic designers to early analyse the limits of the in-layer power dissipation, depending on the chip location inside the board, various analytical thermal modelling approaches were investigated. Therefore the buried active chips can be represented using surface or volumetric heating sources according with the expected accuracy. Moreover the current work describes the comparison of the volumetric heating source analytical model with the state-of-art numerical detailed models of several embedded chips configurations, and debates about the need or not to simulate in full details the embedded chips as well as the surrounding layers and micro-via structures of the substrate. The results highlight that the thermal behaviour predictions of the analytical model are found to be within ±5% of relative error and so demonstrate their relevance to model an embedded chip and its neighbouring heating chips or components. Further this predictive model proves to be in good agreement with an experimental characterization performed on a thermal test vehicle. To summarize, the developed analytical approach promotes several practical solutions to achieve a more efficient design and to early identify the potential issues of board cooling.

  20. Inherent polarization entanglement generated from a monolithic semiconductor chip

    DEFF Research Database (Denmark)

    Horn, Rolf T.; Kolenderski, Piotr; Kang, Dongpeng

    2013-01-01

    Creating miniature chip scale implementations of optical quantum information protocols is a dream for many in the quantum optics community. This is largely because of the promise of stability and scalability. Here we present a monolithically integratable chip architecture upon which is built...... a photonic device primitive called a Bragg reflection waveguide (BRW). Implemented in gallium arsenide, we show that, via the process of spontaneous parametric down conversion, the BRW is capable of directly producing polarization entangled photons without additional path difference compensation, spectral...... as a serious contender on which to build large scale implementations of optical quantum processing devices....

  1. Prevention policies addressing packaging and packaging waste: Some emerging trends.

    Science.gov (United States)

    Tencati, Antonio; Pogutz, Stefano; Moda, Beatrice; Brambilla, Matteo; Cacia, Claudia

    2016-10-01

    Packaging waste is a major issue in several countries. Representing in industrialized countries around 30-35% of municipal solid waste yearly generated, this waste stream has steadily grown over the years even if, especially in Europe, specific recycling and recovery targets have been fixed. Therefore, an increasing attention starts to be devoted to prevention measures and interventions. Filling a gap in the current literature, this explorative paper is a first attempt to map the increasingly important phenomenon of prevention policies in the packaging sector. Through a theoretical sampling, 11 countries/states (7 in and 4 outside Europe) have been selected and analyzed by gathering and studying primary and secondary data. Results show evidence of three specific trends in packaging waste prevention policies: fostering the adoption of measures directed at improving packaging design and production through an extensive use of the life cycle assessment; raising the awareness of final consumers by increasing the accountability of firms; promoting collaborative efforts along the packaging supply chains.

  2. 7 CFR 58.626 - Packaging equipment.

    Science.gov (United States)

    2010-01-01

    ... 7 Agriculture 3 2010-01-01 2010-01-01 false Packaging equipment. 58.626 Section 58.626 Agriculture....626 Packaging equipment. Packaging equipment designed to mechanically fill and close single service... Standards for Equipment for Packaging Frozen Desserts and Cottage Cheese. Quality Specifications for...

  3. 21 CFR 820.130 - Device packaging.

    Science.gov (United States)

    2010-04-01

    ... 21 Food and Drugs 8 2010-04-01 2010-04-01 false Device packaging. 820.130 Section 820.130 Food and... QUALITY SYSTEM REGULATION Labeling and Packaging Control § 820.130 Device packaging. Each manufacturer shall ensure that device packaging and shipping containers are designed and constructed to protect...

  4. 40 CFR 157.27 - Unit packaging.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 23 2010-07-01 2010-07-01 false Unit packaging. 157.27 Section 157.27 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) PESTICIDE PROGRAMS PACKAGING REQUIREMENTS FOR PESTICIDES AND DEVICES Child-Resistant Packaging § 157.27 Unit packaging. Pesticide...

  5. A Low-Power Blocking-Capacitor-Free Charge-Balanced Electrode-Stimulator Chip With Less Than 6 nA DC Error for 1-mA Full-Scale Stimulation.

    Science.gov (United States)

    Ji-Jon Sit; Sarpeshkar, R

    2007-09-01

    Large dc blocking capacitors are a bottleneck in reducing the size and cost of neural implants. We describe an electrode-stimulator chip that removes the need for large dc blocking capacitors in neural implants by achieving precise charge-balanced stimulation with balance is achieved by dynamic current balancing to reduce the mismatch between the positive and negative phases of current to 0.4%, followed by a shorting phase of at least 1 ms between current pulses to further reduce the charge error. On +6 and -9 V rails in a 0.7-mum AMI high voltage process, the power consumption of a single channel of this chip is 47 muW when biasing power is shared by 16 channels.

  6. Terahertz MMICs and Antenna-in-Package Technology at 300 GHz for KIOSK Download System

    Science.gov (United States)

    Tajima, Takuro; Kosugi, Toshihiko; Song, Ho-Jin; Hamada, Hiroshi; El Moutaouakil, Amine; Sugiyama, Hiroki; Matsuzaki, Hideaki; Yaita, Makoto; Kagami, Osamu

    2016-12-01

    Toward the realization of ultra-fast wireless communications systems, the inherent broad bandwidth of the terahertz (THz) band is attracting attention, especially for short-range instant download applications. In this paper, we present our recent progress on InP-based THz MMICs and packaging techniques based on low-temperature co-fibered ceramic (LTCC) technology. The transmitter MMICs are based on 80-nm InP-based high electron mobility transistors (HEMTs). Using the transmitter packaged in an E-plane split-block waveguide and compact lens receiver packaged in LTCC multilayered substrates, we tested wireless data transmission up to 27 Gbps with the simple amplitude key shifting (ASK) modulation scheme. We also present several THz antenna-in-packaging solutions based on substrate integrated waveguide (SIW) technology. A vertical hollow (VH) SIW was applied to a compact medium-gain SIW antenna and low-loss interconnection integrated in LTCC multi-layer substrates. The size of the LTCC antennas with 15-dBi gain is less than 0.1 cm3. For feeding the antenna, we investigated an LTCC-integrated transition and polyimide transition to LTCC VH SIWs. These transitions exhibit around 1-dB estimated loss at 300 GHz and more than 35 GHz bandwidth with 10-dB return loss. The proposed package solutions make antennas and interconnections easy to integrate in a compact LTCC package with an MMIC chip for practical applications.

  7. Terahertz MMICs and Antenna-in-Package Technology at 300 GHz for KIOSK Download System

    Science.gov (United States)

    Tajima, Takuro; Kosugi, Toshihiko; Song, Ho-Jin; Hamada, Hiroshi; El Moutaouakil, Amine; Sugiyama, Hiroki; Matsuzaki, Hideaki; Yaita, Makoto; Kagami, Osamu

    2016-09-01

    Toward the realization of ultra-fast wireless communications systems, the inherent broad bandwidth of the terahertz (THz) band is attracting attention, especially for short-range instant download applications. In this paper, we present our recent progress on InP-based THz MMICs and packaging techniques based on low-temperature co-fibered ceramic (LTCC) technology. The transmitter MMICs are based on 80-nm InP-based high electron mobility transistors (HEMTs). Using the transmitter packaged in an E-plane split-block waveguide and compact lens receiver packaged in LTCC multilayered substrates, we tested wireless data transmission up to 27 Gbps with the simple amplitude key shifting (ASK) modulation scheme. We also present several THz antenna-in-packaging solutions based on substrate integrated waveguide (SIW) technology. A vertical hollow (VH) SIW was applied to a compact medium-gain SIW antenna and low-loss interconnection integrated in LTCC multi-layer substrates. The size of the LTCC antennas with 15-dBi gain is less than 0.1 cm3. For feeding the antenna, we investigated an LTCC-integrated transition and polyimide transition to LTCC VH SIWs. These transitions exhibit around 1-dB estimated loss at 300 GHz and more than 35 GHz bandwidth with 10-dB return loss. The proposed package solutions make antennas and interconnections easy to integrate in a compact LTCC package with an MMIC chip for practical applications.

  8. Documentation of the seawater intrusion (SWI2) package for MODFLOW

    Science.gov (United States)

    Bakker, Mark; Schaars, Frans; Hughes, Joseph D.; Langevin, Christian D.; Dausman, Alyssa M.

    2013-01-01

    . This reduction in number of required model cells and the elimination of the need to solve the advective-dispersive transport equation results in substantial model run-time savings, which can be large for regional aquifers. The accuracy and use of the SWI2 Package is demonstrated through comparison with existing exact solutions and numerical solutions with SEAWAT. Results for an unconfined aquifer are also presented to demonstrate application of the SWI2 Package to a large-scale regional problem.

  9. Survivability of MEMS Packages at High-G Loads

    Science.gov (United States)

    Pryputniewicz, Ryszard J.

    2014-10-01

    Advances in emerging technology of microelectromechanical systems (MEMS) are one of the most challenging tasks in today's experimental mechanics. More specifically, development of these miniature devices requires sophisticated design, analysis, fabrication, testing, and characterization tools that have multiphysics and multiscale capabilities, especially as MEMS are being developed for use at harsh conditions. In harsh-environment and high-performance (e.g., military) guidance applications inertial sensors must be sensitive to low rates of rotation yet survive the high blast loads associated with the initial launch. In this multi-year study, a set of tuning fork gyroscopes were subjected to a series of increasing g-loads (culminating at approximately 60,000 g's) with measurements of shape made after each test. A custom set of test sample packages (aka articles) were hermetically sealed with glass lids to allow optical inspection of components while preserving the operating environment (i.e., vacuum). Initial test measurements were made upon fabrication of the articles. Optical and interferometric measurements have been made prior to and after each shock g-loading. The shape of the tuning fork gyroscope (TFG) test articles was measured using a phase shifting Michelson interferometer with compensation for package cover glass. Full field shape was determined and traces of pertinent structures were extracted for comparison. Failure of the die was observed in the form of fractures below the chip surface as well as fractures in the glass lid sealing the package. Potential causes of the failure are discussed as well as a recommendation for modified packaging techniques to mitigate future component failures.

  10. Very Large Scale Integration (VLSI).

    Science.gov (United States)

    Yeaman, Andrew R. J.

    Very Large Scale Integration (VLSI), the state-of-the-art production techniques for computer chips, promises such powerful, inexpensive computing that, in the future, people will be able to communicate with computer devices in natural language or even speech. However, before full-scale VLSI implementation can occur, certain salient factors must be…

  11. The next generation of neural network chips

    Energy Technology Data Exchange (ETDEWEB)

    Beiu, V.

    1997-08-01

    There have been many national and international neural networks research initiatives: USA (DARPA, NIBS), Canada (IRIS), Japan (HFSP) and Europe (BRAIN, GALA TEA, NERVES, ELENE NERVES 2) -- just to mention a few. Recent developments in the field of neural networks, cognitive science, bioengineering and electrical engineering have made it possible to understand more about the functioning of large ensembles of identical processing elements. There are more research papers than ever proposing solutions and hardware implementations are by no means an exception. Two fields (computing and neuroscience) are interacting in ways nobody could imagine just several years ago, and -- with the advent of new technologies -- researchers are focusing on trying to copy the Brain. Such an exciting confluence may quite shortly lead to revolutionary new computers and it is the aim of this invited session to bring to light some of the challenging research aspects dealing with the hardware realizability of future intelligent chips. Present-day (conventional) technology is (still) mostly digital and, thus, occupies wider areas and consumes much more power than the solutions envisaged. The innovative algorithmic and architectural ideals should represent important breakthroughs, paving the way towards making neural network chips available to the industry at competitive prices, in relatively small packages and consuming a fraction of the power required by equivalent digital solutions.

  12. DNA Packaging in Bacteriophage: Is Twist Important?

    OpenAIRE

    Spakowitz, Andrew James; Wang, Zhen-Gang

    2005-01-01

    We study the packaging of DNA into a bacteriophage capsid using computer simulation, specifically focusing on the potential impact of twist on the final packaged conformation. We perform two dynamic simulations of packaging a polymer chain into a spherical confinement: one where the chain end is rotated as it is fed, and one where the chain is fed without end rotation. The final packaged conformation exhibits distinct differences in these two cases: the packaged conformation from feeding with...

  13. Semiconductor packaging materials interaction and reliability

    CERN Document Server

    Chen, Andrea

    2012-01-01

    In semiconductor manufacturing, understanding how various materials behave and interact is critical to making a reliable and robust semiconductor package. Semiconductor Packaging: Materials Interaction and Reliability provides a fundamental understanding of the underlying physical properties of the materials used in a semiconductor package. The book focuses on an important step in semiconductor manufacturing--package assembly and testing. It covers the basics of material properties and explains how to determine which behaviors are important to package performance. The authors also discuss how

  14. The paradox of packaging optimization – a characterization of packaging source reduction in the Netherlands

    NARCIS (Netherlands)

    van Sluisveld, M.A.E.; Worrell, E.

    2013-01-01

    The European Council Directive 94/62/EC for Packaging and Packaging Waste requires that Member States implement packaging waste prevention measures. However, consumption and subsequently packaging waste figures are still growing annually. It suggests that policies to accomplish packaging waste preve

  15. Nano Food Packages: from Food Preservation Efficiency to Consumer Legal Protection

    Directory of Open Access Journals (Sweden)

    Rodica Apan

    2014-05-01

    Full Text Available The paper explores some aspects related to the application of nanomaterials in food packaging. Therefore, the paper is structured into two sections. In the first section, aspects that could restrict/restrain the application of nanomaterials in food packaging industry in terms of environmental and human risks, the consumer`s rights to be informed regarding the utilization of nano-packages and regulation issues in the field of large scale application of food nano-packages are discussed. In the second section, the efficiency of a nano-package based on Ag/TiO2 to preserve for a longer time (6 days the physical attributes of wheat bread (moisture, specific volume, porosity by comparison with shorter ranges allowed by the common polyethylene bag (3 days and non-packaging respectively (1 day is demonstrated.

  16. Package power stations for export

    Energy Technology Data Exchange (ETDEWEB)

    1985-01-01

    The cheap and efficient generation of power is an essential requirement for the success and prosperity of any community and is especially important to third world countries. It is therefore logical that the more technologically advanced nations should seek to produce power stations for the developing countries. Power plant can now be designed into a packaged form that may be readily exported and commissioned. This valuable and interesting collection of papers were originally presented at a seminar organised by the Power Industries Division of the Institution of Mechanical Engineers. Topics considered include the developing world market for packaged power stations using indigenous fuels; multi-fuel systems for power generation; packaging, modularisation, and containerisation of equipment for power boilers for export; compact coal-fired industrial plant; rural woodburning power stations; biomass gasification based power generation technology and potential; gas fed reciprocating engine development; packaged heavy duty gas turbines for power generation; and criteria for assessing the appropriateness of package power technologies in developing countries.

  17. Reference waste package environment report

    Energy Technology Data Exchange (ETDEWEB)

    Glassley, W.E.

    1986-10-01

    One of three candidate repository sites for high-level radioactive waste packages is located at Yucca Mountain, Nevada, in rhyolitic tuff 700 to 1400 ft above the static water table. Calculations indicate that the package environment will experience a maximum temperature of {similar_to}230{sup 0}C at 9 years after emplacement. For the next 300 years the rock within 1 m of the waste packages will remain dehydrated. Preliminary results suggest that the waste package radiation field will have very little effect on the mechanical properties of the rock. Radiolysis products will have a negligible effect on the rock even after rehydration. Unfractured specimens of repository rock show no change in hydrologic characteristics during repeated dehydration-rehydration cycles. Fractured samples with initially high permeabilities show a striking permeability decrease during dehydration-rehydration cycling, which may be due to fracture healing via deposition of silica. Rock-water interaction studies demonstrate low and benign levels of anions and most cations. The development of sorptive secondary phases such as zeolites and clays suggests that anticipated rock-water interaction may produce beneficial changes in the package environment.

  18. Trapping molecules on chips

    CERN Document Server

    Santambrogio, Gabriele

    2015-01-01

    In the last years, it was demonstrated that neutral molecules can be loaded on a microchip directly from a supersonic beam. The molecules are confined in microscopic traps that can be moved smoothly over the surface of the chip. Once the molecules are trapped, they can be decelerated to a standstill, for instance, or pumped into selected quantum states by laser light or microwaves. Molecules are detected on the chip by time-resolved spatial imaging, which allows for the study of the distribution in the phase space of the molecular ensemble.

  19. SCAMPI: A code package for cross-section processing

    Energy Technology Data Exchange (ETDEWEB)

    Parks, C.V.; Petrie, L.M.; Bowman, S.M.; Broadhead, B.L.; Greene, N.M.; White, J.E.

    1996-04-01

    The SCAMPI code package consists of a set of SCALE and AMPX modules that have been assembled to facilitate user needs for preparation of problem-specific, multigroup cross-section libraries. The function of each module contained in the SCANTI code package is discussed, along with illustrations of their use in practical analyses. Ideas are presented for future work that can enable one-step processing from a fine-group, problem-independent library to a broad-group, problem-specific library ready for a shielding analysis.

  20. Industrial packaging and assembly infrastructure for MOEMS

    Science.gov (United States)

    van Heeren, Henne

    2004-01-01

    , packaging and assembly is from nature application specific and solutions found are not always transferable from one product to another. But designers can often benefit from experience from other and general available technologies. A number of companies offer packaging and assembly services for MEMS/MST and this report give typical examples of those commercial services. The companies range from small start-ups, offering very specialized services, to large semiconductor packaging companies, having production lines for microsystem based products. Selecting the proper packaging method may tip the scales towards a product success or towards a product failure, while it nearly always present s a substantial part of the cost of the product. This is therefore is not a marginal concern, but a crucial part of the product design. The presentation will also address mayor trends and technologies. Finally, the article provides sufficient levels of classification and categorisation for various aspects for the technologies, in specific, and the industry, in general, to provide particularly useful insights into the activities and the developments in this market. With over 50 companies studied and assessed, it provides an up to date account of the state of this business and its future potential.

  1. Chip-based quantum key distribution

    Science.gov (United States)

    Sibson, P.; Erven, C.; Godfrey, M.; Miki, S.; Yamashita, T.; Fujiwara, M.; Sasaki, M.; Terai, H.; Tanner, M. G.; Natarajan, C. M.; Hadfield, R. H.; O'Brien, J. L.; Thompson, M. G.

    2017-01-01

    Improvement in secure transmission of information is an urgent need for governments, corporations and individuals. Quantum key distribution (QKD) promises security based on the laws of physics and has rapidly grown from proof-of-concept to robust demonstrations and deployment of commercial systems. Despite these advances, QKD has not been widely adopted, and large-scale deployment will likely require chip-based devices for improved performance, miniaturization and enhanced functionality. Here we report low error rate, GHz clocked QKD operation of an indium phosphide transmitter chip and a silicon oxynitride receiver chip—monolithically integrated devices using components and manufacturing processes from the telecommunications industry. We use the reconfigurability of these devices to demonstrate three prominent QKD protocols—BB84, Coherent One Way and Differential Phase Shift—with performance comparable to state-of-the-art. These devices, when combined with integrated single photon detectors, pave the way for successfully integrating QKD into future telecommunications networks. PMID:28181489

  2. On-Chip Microwave Quantum Hall Circulator

    Science.gov (United States)

    Mahoney, A. C.; Colless, J. I.; Pauka, S. J.; Hornibrook, J. M.; Watson, J. D.; Gardner, G. C.; Manfra, M. J.; Doherty, A. C.; Reilly, D. J.

    2017-01-01

    Circulators are nonreciprocal circuit elements that are integral to technologies including radar systems, microwave communication transceivers, and the readout of quantum information devices. Their nonreciprocity arises from the interference of microwaves over the centimeter scale of the signal wavelength, in the presence of bulky magnetic media that breaks time-reversal symmetry. Here, we realize a completely passive on-chip microwave circulator with size 1 /1000 th the wavelength by exploiting the chiral, "slow-light" response of a two-dimensional electron gas in the quantum Hall regime. For an integrated GaAs device with 330 μ m diameter and about 1-GHz center frequency, a nonreciprocity of 25 dB is observed over a 50-MHz bandwidth. Furthermore, the nonreciprocity can be dynamically tuned by varying the voltage at the port, an aspect that may enable reconfigurable passive routing of microwave signals on chip.

  3. Invisibility Cloak Printed on a Photonic Chip

    Science.gov (United States)

    Feng, Zhen; Wu, Bing-Hong; Zhao, Yu-Xi; Gao, Jun; Qiao, Lu-Feng; Yang, Ai-Lin; Lin, Xiao-Feng; Jin, Xian-Min

    2016-01-01

    Invisibility cloak capable of hiding an object can be achieved by properly manipulating electromagnetic field. Such a remarkable ability has been shown in transformation and ray optics. Alternatively, it may be realistic to create a spatial cloak by means of confining electromagnetic field in three-dimensional arrayed waveguides and introducing appropriate collective curvature surrounding an object. We realize the artificial structure in borosilicate by femtosecond laser direct writing, where we prototype up to 5,000 waveguides to conceal millimeter-scale volume. We characterize the performance of the cloak by normalized cross correlation, tomography analysis and continuous three-dimensional viewing angle scan. Our results show invisibility cloak can be achieved in waveguide optics. Furthermore, directly printed invisibility cloak on a photonic chip may enable controllable study and novel applications in classical and quantum integrated photonics, such as invisualising a coupling or swapping operation with on-chip circuits of their own. PMID:27329510

  4. On-Chip Single-Photon Sifter

    CERN Document Server

    Elshaari, Ali W; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

    2016-01-01

    Quantum states of light play a pivotal role in modern science[1] and future photonic applications[2]. While impressive progress has been made in their generation and manipulation with high fidelities, the common table-top approach is reaching its limits for practical quantum applications. Since the advent of integrated quantum nanophotonics[3] different material platforms based on III-V nanostructures-, color centers-, and nonlinear waveguides[4-8] as on-chip light sources have been investigated. Each platform has unique advantages and limitations in terms of source properties, optical circuit complexity, and scaling potentials. However, all implementations face major challenges with efficient and tunable filtering of individual quantum states[4], scalable integration and deterministic multiplexing of on-demand selected quantum emitters[9], and on-chip excitation-suppression[10]. Here we overcome all of these challenges with a novel hybrid and scalable nanofabrication approach to generate quantum light on-chi...

  5. Cytometer on a Chip

    Science.gov (United States)

    Fernandez, Salvador M.

    2011-01-01

    A cytometer now under development exploits spatial sorting of sampled cells on a microarray chip followed by use of grating-coupled surface-plasmon-resonance imaging (GCSPRI) to detect the sorted cells. This cytometer on a chip is a prototype of contemplated future miniature cytometers that would be suitable for rapidly identifying pathogens and other cells of interest in both field and laboratory applications and that would be attractive as alternatives to conventional flow cytometers. The basic principle of operation of a conventional flow cytometer requires fluorescent labeling of sampled cells, stringent optical alignment of a laser beam with a narrow orifice, and flow of the cells through the orifice, which is subject to clogging. In contrast, the principle of operation of the present cytometer on a chip does not require fluorescent labeling of cells, stringent optical alignment, or flow through a narrow orifice. The basic principle of operation of the cytometer on a chip also reduces the complexity, mass, and power of the associated laser and detection systems, relative to those needed in conventional flow cytometry. Instead of making cells flow in single file through a narrow flow orifice for sequential interrogation as in conventional flow cytometry, a liquid containing suspended sampled cells is made to flow over the front surface of a microarray chip on which there are many capture spots. Each capture spot is coated with a thin (approximately 50-nm) layer of gold that is, in turn, coated with antibodies that bind to cell-surface molecules characteristic of one the cell species of interest. The multiplicity of capture spots makes it possible to perform rapid, massively parallel analysis of a large cell population. The binding of cells to each capture spot gives rise to a minute change in the index of refraction at the surface of the chip. This change in the index of refraction is what is sensed in GCSPRI, as described briefly below. The identities of the

  6. Nonparametric Econometrics: The np Package

    Directory of Open Access Journals (Sweden)

    Tristen Hayfield

    2008-07-01

    Full Text Available We describe the R np package via a series of applications that may be of interest to applied econometricians. The np package implements a variety of nonparametric and semiparametric kernel-based estimators that are popular among econometricians. There are also procedures for nonparametric tests of significance and consistent model specification tests for parametric mean regression models and parametric quantile regression models, among others. The np package focuses on kernel methods appropriate for the mix of continuous, discrete, and categorical data often found in applied settings. Data-driven methods of bandwidth selection are emphasized throughout, though we caution the user that data-driven bandwidth selection methods can be computationally demanding.

  7. Experiment list: SRX122496 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available || chip antibody=Rel || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip ant...ibody catalog number 1=sc-71 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc

  8. CMOS capacitive sensors for lab-on-chip applications a multidisciplinary approach

    CERN Document Server

    Ghafar-Zadeh, Ebrahim

    2010-01-01

    The main components of CMOS capacitive biosensors including sensing electrodes, bio-functionalized sensing layer, interface circuitries and microfluidic packaging are verbosely explained in chapters 2-6 after a brief introduction on CMOS based LoCs in Chapter 1. CMOS Capacitive Sensors for Lab-on-Chip Applications is written in a simple pedagogical way. It emphasises practical aspects of fully integrated CMOS biosensors rather than mathematical calculations and theoretical details. By using CMOS Capacitive Sensors for Lab-on-Chip Applications, the reader will have circuit design methodologies,

  9. Integration of optoelectronic technologies for chip-to- chip interconnections and parallel pipeline processing

    Science.gov (United States)

    Wu, Jenming

    Digital information services such as multimedia systems and data communications require the processing and transfer of tremendous amount of data. These data need to be stored, accessed and delivered efficiently and reliably at high speed for various user applications. This represents a great challenge for current electronic systems. Electronics is effective in providing high performance processing and computation, but its input/outputs (I/Os) bandwidth is unable to scale with its processing power. The signal I/Os or interconnections are needed between processors and input devices, between processors for multiprocessor systems, and between processors and storage devices. Novel chip-to-chip interconnect technologies are needed to meet this challenge. This work integrates optoelectronic technologies for chip-to-chip interconnects and parallel pipeline processing. Photonic and electronic technologies are complementary to each other in the sense that electronics is more suitable for high-speed, low cost computation, and photonics is more suitable for high-bandwidth information transmission. Smart pixel technology uses electronics for logic switching and optics for chip-to- chip interconnects, thus combining the abilities of photonics and electronics nicely. This work describes both vertical and horizontal integration of smart pixel technologies for chip-to-chip optical interconnects and its applications. We present smart pixel VLSI designs in both hybrid CMOS/MQW smart pixel and monolithic GaAs smart pixel technologies. We use the CMOS/MQW technology for smart pixel array cellular logic (SPARCL) processors for SIMD parallel pipeline processing. We have tested the chip and constructed a prototype system for device characterization and system demonstration. We have verified the functionality of the system and characterized the electrical functions of the chip and the optoelectronic properties of the MQW devices. We have developed algorithms that utilize SPARCL for various

  10. RF Calibration of On-Chip DfT Chain by DC Stimuli and Statistical Multivariate Regression Technique

    OpenAIRE

    Ramzan, Rashad; Dabrowski, Jerzy

    2015-01-01

    The problem of parameter variability in RF and analog circuits is escalating with CMOS scaling. Consequently every RF chip produced in nano-meter CMOS technologies needs to be tested. On-chip Design for Testability (DfT) features, which are meant to reduce test time and cost also suffer from parameter variability. Therefore, RF calibration of all on-chip test structures is mandatory. In this paper, Artificial Neural Networks (ANN) are employed as a multivariate regression technique to archite...

  11. Vacuum-Packaging Technology for IRFPAs

    Science.gov (United States)

    Matsumura, Takeshi; Tokuda, Takayuki; Tsutinaga, Akinobu; Kimata, Masafumi; Abe, Hideyuki; Tokashiki, Naotaka

    We developed vacuum-packaging equipment and low-cost vacuum packaging technology for IRFPAs. The equipment is versatile and can process packages with various materials and structures. Getters are activated before vacuum packaging, and we can solder caps/ceramic-packages and caps/windows in a high-vacuum condition using this equipment. We also developed a micro-vacuum gauge to measure pressure in vacuum packages. The micro-vacuum gauge uses the principle of thermal conduction of gases. We use a multi-ceramic package that consists of six packages fabricated on a ceramic sheet, and confirm that the pressure in the processed packages is sufficiently low for high-performance IRFPA.

  12. Radiometer on a Chip

    Science.gov (United States)

    Chattopadhyay, Goutam; Gill, John J.; Mehdi, Imran; Lee, Choonsup; Schlecht, Erich T.; Skalare, Anders; Ward, John S.; Siegel, Peter H.; Thomas, Bertrand C.

    2009-01-01

    The radiometer on a chip (ROC) integrates whole wafers together to p rovide a robust, extremely powerful way of making submillimeter rece ivers that provide vertically integrated functionality. By integratin g at the wafer level, customizing the interconnects, and planarizing the transmission media, it is possible to create a lightweight asse mbly performing the function of several pieces in a more conventiona l radiometer.

  13. Recovery and distribution of incinerated aluminum packaging waste.

    Science.gov (United States)

    Hu, Y; Bakker, M C M; de Heij, P G

    2011-12-01

    A study was performed into relations between physical properties of aluminum packaging waste and the corresponding aluminum scraps in bottom ash from three typical incineration processes. First, Dutch municipal solid waste incineration (MSWI) bottom ash was analyzed for the identifiable beverage can alloy scraps in the +2mm size ranges using chemical detection and X-ray fluorescence. Second, laboratory-scale pot furnace tests were conducted to investigate the relations between aluminum packaging in base household waste and the corresponding metal recovery rates. The representative packaging wastes include beverage cans, foil containers and thin foils. Third, small samples of aluminum packaging waste were incinerated in a high-temperature oven to determine leading factors influencing metal recovery rates. Packaging properties, combustion conditions, presence of magnesium and some specific contaminants commonly found in household waste were investigated independently in the high-temperature oven. In 2007, the bottom ash (+2mm fraction) from the AEB MSWI plant was estimated to be enriched by 0.1 wt.% of aluminum beverage cans scrap. Extrapolating from this number, the recovery potential of all eleven MSWI plants in the Netherlands is estimated at 720 ton of aluminum cans scrap. More than 85 wt.% of this estimate would end up in +6mm size fractions and were amenable for efficient recycling. The pot furnace tests showed that the average recovery rate of metallic aluminum typically decreases from beverage cans (93 wt.%) to foil containers (85 wt.%) to thin foils (77 wt.%). The oven tests showed that in order of decreasing impact the main factors promoting metallic aluminum losses are the packaging type, combustion temperature, residence time and salt contamination. To a lesser degree magnesium as alloying element, smaller packaging size and basic contaminations may also promote losses.

  14. [Wood chip alveolitis].

    Science.gov (United States)

    Müller-Wening, D; Renck, T; Neuhauss, M

    1999-07-01

    A 52 year old farmer was referred to us for investigation of suspected farmer's lung. For many years the farmer had been exposed to hay, straw, pigeons, and fuel chip dust. Under exertion he suffered from shortness of breath. In the farmer's own fuel chips we could identify Aspergillus fumigatus, Paecilomyces species and Mucor species. In the farmer's blood we found IgG-antibodies against his own fuel chips, thermophilic actinomycetes, Penicillium species, Mucor species and Aspergillus fumigatus. We did not detect any IgG-antibodies against pigeon serum or pigeon faeces. In order to determine the responsible allergen we performed two challenge tests. In the first test the farmer had to inhale his own hay and straw dust for one hour. This provocation was negative. A second one-hour inhalative challenge was carried out 16 days later using his own fuel chips. This time he experienced significant pulmonary and systemic reactions: body temperature rose by 3.3 degrees C, leucocytes by 12,200/mm3; PO2 fell by 39.4 mmHg, vital capacity by 52%, DLCO by 36%. After the challenge the farmer complained of coughing and dyspnoea. Rales could be heard on auscultation, and an interstitial infiltrate was seen to develop on chest x-rays. After the challenge the patient had to be treated with oxygen and systemic corticosteroids. We diagnosed a fuel chip-induced exogenous allergic alveolitis (EAA). Eight days later the parameters were back to normal and the farmer was discharged from our hospital with further corticosteroid medication. This method of inhalative provocation is very important in diagnosing an EAA. Problems arise when the mode and duration of exposure to substances has to be chosen. Because of the risk of severe reactions, inhalative provocations relating to EAAs should only be performed in special centres with an intensive care unit. In this paper we present a diagnosis of fuel chip lung, which is rarely seen in Germany. However, with the rising use of fuel chips as

  15. Color in packaging design : Case: ZheJiang JinSheng packaging Co,Ltd

    OpenAIRE

    Hu, Cuicui

    2010-01-01

    Color occupies an important position in packaging design, with the improvement of living standard, the higher requirement of color design in packaging. The aim of this thesis was to discuss key issues concerning aesthetics of packaging design. Topics will include an overview of the packaging design, the influence factor of packaging design, and introduce the aesthetics from packaging aspect. This thesis will also identify common problems of the production process, and list the phases of ho...

  16. Wood chips procurement and research project at the Mikkeli region; Puuhakkeen hankinta- ja tutkimusprojekti Mikkelin seudulla

    Energy Technology Data Exchange (ETDEWEB)

    Saksa, T. [Finnish Forest Research Inst., Suonenjoki (Finland). Suonenjoki Research Station; Auvinen, P. [Mikkeli city (Finland). Dept. of Agriculture and Forestry

    1996-12-31

    In 1993-94, a large-scale energywood production chain started as a co-operation project by the Mikkeli city forest office and local forestry societies. In 1995 over 115 000 m{sup 3} (about 85 000 MWh of energy) of wood chips were delivered to Pursiala heat and power plant in Mikkeli. About 75 % of these chips was forest processed chips. About 70 % of the forest processed chips was whole tree chips from improvement cuttings of young forest stands and the rest was logging waste chips from regeneration cutting areas. The average total delivery costs of forest processed chips after reduction of energywood and other subsidies were approximately 45 FIM/m{sup 3} (60 FIM/MWh) for the whole tree chips and 38 FIM/m{sup 3} (50 FIM/MWh) for logging waste chips. The delivery costs of forest processed chips could meet the target of Bioenergy Research Programme (45 FIM/MWh) only in the most favourable cases. In an average the delivery costs were about 9 FIM/MWh more than the price obtained when sold to the heat and power plant. However the wood chip production created 27 new jobs and the increase of income to the local economy was about 2.2 milj. FIM /year. The local communities got new tax revenue about 3 FIM/MWh. The gain for the forestry was approximated to be 5 - 6 FIM/MWh. The resources of forest processed chips were studied on the basis of stand measurements. According to the study the most remarkable energywood resources were in young thinning stands on Oxalis-Myrtillus and Myrtillus forest site types. On Oxalis-Myrtillus type almost every and on Myrtillus type every second stand included energywood more than 40 m{sup 3}/ha

  17. Quality assessment of packaged foods by optical oxygen sensing

    Science.gov (United States)

    Papkovsky, Dmitri B.; O'Mahony, Fiach C.; Kerry, Joe P.; Ogurtsov, Vladimir I.

    2005-11-01

    A phase-fluorometric oxygen sensor system has been developed, which allows non-destructive measurement of residual oxygen levels in sealed containers such as packaged foods. It operates with disposable solid-state sensors incorporated in each pack, and a portable detector which interrogates with the sensors through a (semi)transparent packaging material. The system has been optimized for packaging applications and validated in small and medium scale trials with different types of food, including MAP hams, cheese, convenience foods, smoked fish, bakery. It has demonstrated high efficiency in monitoring package integrity, oxygen profiles in packs, performance of packaging process and many other research and quality control tasks, allowing control of 100% of packs. The low-cost batch-calibrated sensors have demonstrated reliability, safety, stability including direct contact with food, high efficiency in the low oxygen range. Another system, which also employs the fluorescence-based oxygen sensing approach, provides rapid assessment of microbial contamination (total viable counts) in complex samples such as food homogenates, industrial waste, environmental samples, etc. It uses soluble oxygen-sensitive probes, standard microtitter plates and fluorescence measurements on conventional plate reader to monitor growth of aerobic bacteria in small test samples (e.g. food homogenates) via their oxygen respiration. The assay provides high sample through put, miniaturization, speed, and can serve as alternative to the established methods such as agar plate colony counts and turbidimetry.

  18. The Affordance Template ROS Package for Robot Task Programming

    Science.gov (United States)

    Hart, Stephen; Dinh, Paul; Hambuchen, Kimberly

    2015-01-01

    This paper introduces the Affordance Template ROS package for quickly programming, adjusting, and executing robot applications in the ROS RViz environment. This package extends the capabilities of RViz interactive markers by allowing an operator to specify multiple end-effector waypoint locations and grasp poses in object-centric coordinate frames and to adjust these waypoints in order to meet the run-time demands of the task (specifically, object scale and location). The Affordance Template package stores task specifications in a robot-agnostic XML description format such that it is trivial to apply a template to a new robot. As such, the Affordance Template package provides a robot-generic ROS tool appropriate for building semi-autonomous, manipulation-based applications. Affordance Templates were developed by the NASA-JSC DARPA Robotics Challenge (DRC) team and have since successfully been deployed on multiple platforms including the NASA Valkyrie and Robonaut 2 humanoids, the University of Texas Dreamer robot and the Willow Garage PR2. In this paper, the specification and implementation of the affordance template package is introduced and demonstrated through examples for wheel (valve) turning, pick-and-place, and drill grasping, evincing its utility and flexibility for a wide variety of robot applications.

  19. Hanford Site radioactive hazardous materials packaging directory

    Energy Technology Data Exchange (ETDEWEB)

    McCarthy, T.L.

    1995-12-01

    The Hanford Site Radioactive Hazardous Materials Packaging Directory (RHMPD) provides information concerning packagings owned or routinely leased by Westinghouse Hanford Company (WHC) for offsite shipments or onsite transfers of hazardous materials. Specific information is provided for selected packagings including the following: general description; approval documents/specifications (Certificates of Compliance and Safety Analysis Reports for Packaging); technical information (drawing numbers and dimensions); approved contents; areas of operation; and general information. Packaging Operations & Development (PO&D) maintains the RHMPD and may be contacted for additional information or assistance in obtaining referenced documentation or assistance concerning packaging selection, availability, and usage.

  20. Evaluation of carbon monoxide treatment in modified atmosphere packaging or vacuum packaging to increase color stability of fresh beef.

    Science.gov (United States)

    Jayasingh, P; Cornforth, D P; Carpenter, C E; Whittier, D

    2001-11-01

    Our goal was to obtain > 21 days red color stability for carbon monoxide (CO)-treated beef steaks in vacuum packaging (VP). In preliminary tests, pretreatment for 24 h in a 5% CO modified atmosphere package (MAP) was needed to maintain redness after re-packaging in VP. Pressure pretreatment with 5% CO for 2 h developed redness, but was impractical for large-scale application. Color stability and microbial load were then compared after treatment of steaks in 5% CO-MAP for 24 h, then VP; 100% CO-MAP for 1 h, then VP; steaks and ground beef in 0.5% CO-MAP; and steaks and ground beef in polyvinyl chloride (PVC) wrap. Steaks remained red for 5, 6, 8 and 10(6)cfu/cm(2)) at 5, 6, 7 and <2-weeks, respectively. Thus, extended color stability in VP was achieved by pretreatment with 5% CO for 24 h or 100% CO for 1 h.

  1. Food Nanotechnology - Food Packaging Applications

    Science.gov (United States)

    Astonishing growth in the market for nanofoods is predicted in the future, from the current market of $2.6 billion to $20.4 billion in 2010. The market for nanotechnology in food packaging alone is expected to reach $360 million in 2008. In large part, the impetus for this predicted growth is the ...

  2. Food Nanotechnology: Food Packaging Applications

    Science.gov (United States)

    Astonishing growth in the market for nanofoods is predicted in the future, from the current market of $2.6 billion to $20.4 billion in 2010. The market for nanotechnology in food packaging alone is expected to reach $360 million in 2008. In large part the impetus for this predicted growth is the e...

  3. Magnetic Package data quality overview

    DEFF Research Database (Denmark)

    Qamili, Enkelejda; Ottavianelli, Giuseppe; Olsen, Nils

    The ESA Swarm satellites, launched in November 2013, carry on-board instuments devoted to measure extremely accurate data necessary to improve our understanding of Earth’s magnetic field. The Swarm instrument package is made by two magnetometers (one vector and one scalar), one Electric field Ins...

  4. Emotional response towards food packaging

    DEFF Research Database (Denmark)

    Liao, Lewis Xinwei; Corsi, Armando M.; Chrysochou, Polymeros

    2015-01-01

    ) and typefaces (simple vs. ornate). A sample of 120 participants was exposed to mock package design concepts of chocolate blocks. The results suggest that images generate an emotional response that can be measured by both self-report and physiological measures, whereas colours and typefaces generate emotional...

  5. The Macro - Games Course Package.

    Science.gov (United States)

    Heriot-Watt Univ., Edinburgh (Scotland). Esmee Fairbairn Economics Research Centre.

    Part of an Economic Education Series, the course package is designed to teach basic concepts and fundamental principles of macroeconomics and how they can be applied to various world problems. For use with college students, learning is gained through lectures, discussion, simulation games, programmed learning, and text. Time allotment is a 15-week…

  6. Annual Symposium in Electronics Packaging

    CERN Document Server

    1991-01-01

    Each May, the Continuing Education Division of the T.J.Watson School of Engineering, Applied Science and Technology at the State University of New York at Binghamton sponsors an Annual Symposium in Electronics Packaging in cooperation with local professional societies (IEEE, ASME, SME, IEPS) and UnlPEG (the University-Industry Partnership for Economic Growth.) Each volume of this Electronics Packaging Forum series is based on the the preceding Symposium, with Volume Two based on the 1990 presentations. The Preface to Volume One included a brief definition of the broad scope of the electronics packaging field with some comments on why it has recently assumed such a more prominent priority for research and development. Those remarks will not be repeated here; at this point it is assumed that the reader is a professional in the packaging field, or possibly a student of one of the many academic disciplines which contribute to it. It is worthwhile repeating the series objectives, however, so the reader will be cle...

  7. SMART PACKAGING FOR FOOD PRESERVATION

    Directory of Open Access Journals (Sweden)

    Raquel Rodríguez-Sauceda

    2014-07-01

    Full Text Available One of the biggest challenges of the food industry is the preservation of its products, that is, to prevent them from being attacked by microorganisms that decompose them hauling economic losses and severe health damage to the consumer. Today, competition in the food industry is very high and any company that does not offer the quality products is doomed to fail. Consumers demand more and the industry still stands offering what is asked: quality, security and safety. The package, in addition to fulfilling its core functions is becoming a means of sophisticated interactions with content and a record of relevant information for both the end consumer and intermediate players in the value chain and concepts are born of active and intelligent packaging. A smart container is defined as a system that monitors the condition of the packaged product, being able to register and provide information about product quality or condition of the container, showing the possible "abnormal" practices that have suffered the product or the container during the entire supply chain, such as transportation or storage. These systems monitor the mechanisms of altered food due to physiological, chemical and biological processes that respond and communicate changes in the status of the product as time-temperature, Oxygen, Carbon dioxide, microbial growth, etc. There are different types of smart packaging such as time-temperature indicators, color indicators, indicators of pathogens and indicators of leaks, to name a few. Through literature review, arguments that demonstrate the usefulness and necessity of the use of smart packaging to preserve the quality and safety of the product it contains, from manufacturing to the time it is used by consumers were found, as these besides communicating or providing information about their state, acting as a marketing tool.

  8. Plastic food packaging and health

    Directory of Open Access Journals (Sweden)

    Raika Durusoy

    2011-02-01

    Full Text Available Plastics have a wide usage in our daily lives. One of their uses is for food packaging and food containers. The aim of this review is to introduce different types of chemicals that can leach from food packaging plastics into foods and cause human exposure and to mention their effects on health. The types of plastics were reviewed under the 13 headings in Turkish Codex Alimentarius and plastics recycling symbols were provided to enable the recognition of the type of plastic when applicable. Chemicals used during the production and that can cause health risks are investigated under the heading of the relevant type of plastic. The most important chemicals from plastic food packaging that can cause toxicity are styrene, 1,3-butadiene, melamine, formaldehyde, acrylamide, di-2-ethylhexyl phthalate, di-2-ethylhexyl adipate, vinyl chloride and bisphenol A. These chemicals have endocrine disrupting, carcinogenic and/or development disrupting effects. These chemicals may leach into foods depending on the chemical properties of the plastic or food, temperature during packaging, processing and storage, exposure to UV and duration of storage. Contact with fatty/oily or acidic foods, heating of the food inside the container, or drinking hot drinks from plastic cups, use of old and scratched plastics and some detergents increase the risk of leaching. The use of plastic containers and packaging for food and beveradges should be avoided whenever possible and when necessary, less harmful types of plastic should be preferred. [TAF Prev Med Bull 2011; 10(1.000: 87-96

  9. Manufacturing cost analysis of integrated photonic packages

    Science.gov (United States)

    Stirk, Charles W.; Liu, Qin; Ball, Matthew V.

    1999-04-01

    This paper analyzes the manufacturing cost of photonic system using software that combines several methods for accurate cost accounting. Activity based costing assigns al capital equipment, material and labor costs directly to the product rather than to overheads. Cost of ownership models determine the cost of using machines under different financial and utilization scenarios. Libraries of standard machines, process steps, and process sequences facilitate rapid model building and modification. Using libraries for semiconductor and photonics fabrication, along with packaging and optomechanical assembly, we construct cost models for 2D VCSEL array communication modules. The result of the analysis is that the model cost is driven mainly by the epitaxial material cost, and laser yield limits VCSEL arrays to small scale integration.

  10. The cost of a package plant membrane bioreactor.

    Science.gov (United States)

    Fletcher, H; Mackley, T; Judd, S

    2007-06-01

    The capital and operating costs associated with a small package plant MBR for small-scale domestic duty has been appraised based on a medium-strength municipal wastewater. The three main membrane configurations were considered, these being multi-tube, hollow fibre and flat sheet, with the most appropriate plant design chosen for each configuration. The analysis proceeded via a consideration of the estimated amortised capital costs of the plant individual components and their installation, coupled with operating costs based largely on energy demand and residuals management. Energy demand was calculated from aeration and pumping costs, with aeration based on a combination of empirical relationships for membrane aeration and mass balance, and the modified Activated Sludge Model version 2 used for estimating tank size and sludge generation. Results indicate that it is possible to produce a single household MBR at a capital cost similar to the current market cost for package treatment plants. Desludging and maintenance of these plants is similar but power requirements for an MBR are around 4 times that associated with more conventional package plants. Economies of scale exist from 6-20 p.e. plants but above 20 p.e. there is little cost difference per head, due to the design assumptions made. CAPEX and OPEX are to some extent interchangeable; reductions in CAPEX are associated with an increase in OPEX and vice versa. Whilst costs are high, the market for package MBRs is significantly influenced by the recycling potential of the effluent produced.

  11. Lab-on-a-Chip Pathogen Sensors for Food Safety

    Directory of Open Access Journals (Sweden)

    Bumsang Kim

    2012-08-01

    Full Text Available There have been a number of cases of foodborne illness among humans that are caused by pathogens such as Escherichia coli O157:H7, Salmonella typhimurium, etc. The current practices to detect such pathogenic agents are cell culturing, immunoassays, or polymerase chain reactions (PCRs. These methods are essentially laboratory-based methods that are not at all real-time and thus unavailable for early-monitoring of such pathogens. They are also very difficult to implement in the field. Lab-on-a-chip biosensors, however, have a strong potential to be used in the field since they can be miniaturized and automated; they are also potentially fast and very sensitive. These lab-on-a-chip biosensors can detect pathogens in farms, packaging/processing facilities, delivery/distribution systems, and at the consumer level. There are still several issues to be resolved before applying these lab-on-a-chip sensors to field applications, including the pre-treatment of a sample, proper storage of reagents, full integration into a battery-powered system, and demonstration of very high sensitivity, which are addressed in this review article. Several different types of lab-on-a-chip biosensors, including immunoassay- and PCR-based, have been developed and tested for detecting foodborne pathogens. Their assay performance, including detection limit and assay time, are also summarized. Finally, the use of optical fibers or optical waveguide is discussed as a means to improve the portability and sensitivity of lab-on-a-chip pathogen sensors.

  12. 3D Packaging for Microsystems%微系统三维(3D)封装技术

    Institute of Scientific and Technical Information of China (English)

    杨建生

    2011-01-01

    文章论述塑料三维(3D)结构微系统封装技术相关问题,描述了把微电机硅膜泵与3D塑料密封垂直多芯片模块封装(MCM-V)相结合的微系统集成化。采用有限元技术分析封装结构中的封装应力,根据有限元设计研究结果,改变芯片载体结构,降低其发生裂纹的危险。计划采用板上芯片和塑料无引线芯片载体的替代低应力和低成本的3D封装技术方案。%Issues associated with the packaging of microsystems in plastic and three-dimensional (3D) body styles are discussed. The integration of a microsystem incorporating a micromachined silicon membrane pump into a 3D plastic encapsulated vertical multichip module package (MCM-V) is described. Finite element techniques are used to analyze the encapsulation stress in the structure of the package. Cracks develop in the chip carrier due to thermornechanical stress. Based on the results of a finite element design study, the structures of the chip carriers are modified to reduce their risk of cracking. Alternative low stress 3D packaging methodologies based on chip on board and plastic leadless chip carriers are discussed.

  13. VLSI design of 3D display processing chip for binocular stereo displays

    Institute of Scientific and Technical Information of China (English)

    Ge Chenyang; Zheng Nanning

    2010-01-01

    In order to develop the core chip supporting binocular stereo displays for head mounted display(HMD)and glasses-TV,a very large scale integrated(VLSI)design scheme is proposed by using a pipeline architecture for 3D display processing chip(HMD100).Some key techniques including stereo display processing and high precision video scaling based bicubic interpolation,and their hardware implementations which improve the image quality are presented.The proposed HMD100 chip is verified by the field-programmable gate array(FPGA).As one of innovative and high integration SoC chips,HMD100 is designed by a digital and analog mixed circuit.It can support binocular stereo display,has better scaling effect and integration.Hence it is applicable in virtual reality(VR),3D games and other microdisplay domains.

  14. Demonstration of a Packaged Capacitive Pressure Sensor System Suitable for Jet Turbofan Engine Health Monitoring

    Science.gov (United States)

    Scardelletti, Maximilian C.; Jordan, Jennifer L.; Meredith, Roger D.; Harsh, Kevin; Pilant, Evan; Usrey, Michael W.; Beheim, Glenn M.; Hunter, Gary W.; Zorman, Christian A.

    2016-01-01

    In this paper, the development and characterization of a packaged pressure sensor system suitable for jet engine health monitoring is demonstrated. The sensing system operates from 97 to 117 MHz over a pressure range from 0 to 350 psi and a temperature range from 25 to 500 deg. The sensing system consists of a Clapp-type oscillator that is fabricated on an alumina substrate and is comprised of a Cree SiC MESFET, MIM capacitors, a wire-wound inductor, chip resistors and a SiCN capacitive pressure sensor. The pressure sensor is located in the LC tank circuit of the oscillator so that a change in pressure causes a change in capacitance, thus changing the resonant frequency of the sensing system. The chip resistors, wire-wound inductors and MIM capacitors have all been characterized at temperature and operational frequency, and perform with less than 5% variance in electrical performance. The measured capacitive pressure sensing system agrees very well with simulated results. The packaged pressure sensing system is specifically designed to measure the pressure on a jet turbofan engine. The packaged system can be installed by way of borescope plug adaptor fitted to a borescope port exposed to the gas path of a turbofan engine.

  15. Automated packaging employing real-time vision

    Science.gov (United States)

    Chang, Wen-Chung; Wu, Chia-Hung

    2016-07-01

    Existing packaging systems rely on human operation to position a box in the packaging device perform do the packaging task. Current facilities are not capable of handling boxes with different sizes in a flexible way. In order to improve the above-mentioned problems, an eye-to-hand visual servo automated packaging approach is proposed in this paper. The system employs two cameras to observe the box and the gripper mounted on the robotic manipulator to precisely control the manipulator to complete the packaging task. The system first employs two-camera vision to determine the box pose. With appropriate task encoding, a closed-loop visual servoing controller is designed to drive a manipulator to accomplish packaging tasks. The proposed approach can be used to complete automated packaging tasks in the case of uncertain location and size of the box. The system has been successfully validated by experimenting with an industrial robotic manipulator for postal box packaging.

  16. The impact of packaging on product competition

    Directory of Open Access Journals (Sweden)

    Maryam Masoumi

    2012-09-01

    Full Text Available The primary objective of this paper is to detect important factors, which are influencing competitive advantage. The proposed model of this paper uses sampling technique to measure characteristics of society. There are eight independent variables for the proposed study of this paper including packaging endurance, easy distribution, customer promotion through packaging, packaging structure, packaging as silent advertiser, diversity of packaging, clean and healthy packaging and innovation in packaging. The proposed study uses structural equation modeling to either accept or reject all hypotheses associated with the proposed study of this paper. The population of this study includes all managers and experts who are involved in packaging products. We used simple sampling technique and chooses 300 from a population of 450 people who are considered as the population of this survey. Cronbach alpha was determined as 0.732, which is above the minimum acceptable level. The results confirm that all mentioned factors influence competitiveness, effectively.

  17. A power efficient 2Gb/s transceiver in 90nm CMOS for 10mm On-Chip interconnect

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, D.; Klumperink, E.A.M.; Tuijl, van A.J.M.; Nauta, B.

    2007-01-01

    Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. In this paper a low-swing transceiver for 10mm long 0.54μm wide on-chip interconnect is presented, which achieves a similar data rate as previou

  18. Low-power multi-chip module and board-level links for data transfer

    Energy Technology Data Exchange (ETDEWEB)

    Carson, R.F.; Hardin, T.L.; Warren, M.E.; Lear, K.L.; Lovejoy, M.L.; Seigal, P.K.; Craft, D.C. [Sandia National Labs., Albuquerque, NM (United States); Enquist, P.J. [Research Triangle Inst., Research Triangle Park, NC (United States)

    1997-03-01

    Advanced device technologies such as Vertical Cavity Surface-Emitting Lasers (VCSELs) and diffractive micro lenses can be obtained with novel packaging techniques to allow low-power interconnection of parallel optical signals. These interconnections can be realized directly on circuit boards, in a multi-chip module format, or in packages that emulate electrical connectors. For applications such as stacking of Multi-Chip Module (MCM) layers, the links may be realized in bi-directional form using integrated diffractive microlenses. In the stacked MCM design, consumed electrical power is minimized by use of a relatively high laser output from high efficiency VCSELs, and a receiver design that is optimized for low power, at the expense of dynamic range. Within certain constraints, the design may be extended to other forms such as board-level interconnects.

  19. Whole trees for energy purposes from clearcuts. Studies on harvesting, forwarding, chipping and storage

    Energy Technology Data Exchange (ETDEWEB)

    Kofman, P.D.

    1991-12-31

    Storage of energy chips in situ in a forest is quite expensive, as storage loss due to biological activity can exceed 10% of the stored volume and covering of the stack costs roughly DKK 15 per m{sup 3} loose volume. The whole trees can be stored at the roadside without major storage losses and without expenses for covering the logs. A large-scale test was performed on a lodgepole pine (Pinus contorta) clearcut, including three different felling, forwarding of whole trees, and chipping on the area and at the roadside. A similar test was performed for a mountain pine (Pinus mugo) clearcut. This test was restricted to forwarding and chipping. For this purpose trees had been felled by chainsaw. Summer drying, chipping at roadside with or without previous storage, covering of chips by paper etc. were investigated. Moisture contents depending on the felling-storage cycle were determined. (EG)

  20. Development of packaging technologies for microsystems

    Institute of Scientific and Technical Information of China (English)

    JIN Yu-feng; WANG Zhen-feng; WEI Jun

    2003-01-01

    It is well known that packaging plays a very important role in developing microsystems. Packaging accounts for about 60%~80% of cost and function of a microsystem. Package is required to provide mechanical protection, media separation or coupling, signal conditioning, etc.

  1. 7 CFR 993.22 - Consumer package.

    Science.gov (United States)

    2010-01-01

    ... 7 Agriculture 8 2010-01-01 2010-01-01 false Consumer package. 993.22 Section 993.22 Agriculture Regulations of the Department of Agriculture (Continued) AGRICULTURAL MARKETING SERVICE (Marketing Agreements... Order Regulating Handling Definitions § 993.22 Consumer package. Consumer package means: (a)...

  2. 7 CFR 65.130 - Consumer package.

    Science.gov (United States)

    2010-01-01

    ... 7 Agriculture 3 2010-01-01 2010-01-01 false Consumer package. 65.130 Section 65.130 Agriculture Regulations of the Department of Agriculture (Continued) AGRICULTURAL MARKETING SERVICE (Standards..., PEANUTS, AND GINSENG General Provisions Definitions § 65.130 Consumer package. Consumer package means...

  3. Packaging of high power semiconductor lasers

    CERN Document Server

    Liu, Xingsheng; Xiong, Lingling; Liu, Hui

    2014-01-01

    This book introduces high power semiconductor laser packaging design. The characteristics and challenges of the design and various packaging, processing, and testing techniques are detailed by the authors. New technologies, in particular thermal technologies, current applications, and trends in high power semiconductor laser packaging are described at length and assessed.

  4. Disposability Characteristics of Military Packaging Materials

    Science.gov (United States)

    1974-03-06

    packaging material but repre- sents only a minor segment of all packaging materials. In terms of U. S. tonnage, wood packaging materials account for...motftontttctl Anotywu of Solid Hoof COMactwn. David H. Markt and Jon C. Uabman (of Jonnt Hopkint Univartity), for tha U.S. Dapartmant of Hoatth, Education

  5. 27 CFR 6.93 - Combination packaging.

    Science.gov (United States)

    2010-04-01

    ... 27 Alcohol, Tobacco Products and Firearms 1 2010-04-01 2010-04-01 false Combination packaging. 6..., DEPARTMENT OF THE TREASURY LIQUORS âTIED-HOUSEâ Exceptions § 6.93 Combination packaging. The act by an industry member of packaging and distributing distilled spirits, wine, or malt beverages in...

  6. 7 CFR 58.640 - Packaging.

    Science.gov (United States)

    2010-01-01

    ... 7 Agriculture 3 2010-01-01 2010-01-01 false Packaging. 58.640 Section 58.640 Agriculture Regulations of the Department of Agriculture (Continued) AGRICULTURAL MARKETING SERVICE (Standards... Procedures § 58.640 Packaging. The packaging of the semifrozen product shall be done by means which will...

  7. 9 CFR 381.144 - Packaging materials.

    Science.gov (United States)

    2010-01-01

    ... consistent with the Food and Drug Administration's regulations regarding such guaranties (21 CFR 7.12 and 7... 9 Animals and Animal Products 2 2010-01-01 2010-01-01 false Packaging materials. 381.144 Section... Packaging materials. (a) Edible products may not be packaged in a container which is composed in whole or...

  8. 9 CFR 354.72 - Packaging.

    Science.gov (United States)

    2010-01-01

    ... 9 Animals and Animal Products 2 2010-01-01 2010-01-01 false Packaging. 354.72 Section 354.72... CERTIFICATION VOLUNTARY INSPECTION OF RABBITS AND EDIBLE PRODUCTS THEREOF Supervision of Marking and Packaging § 354.72 Packaging. No container which bears or may bear any official identification or any...

  9. EDExpress Packaging Training, 2001-2002.

    Science.gov (United States)

    Office of Student Financial Assistance (ED), Washington, DC.

    Packaging is the process of finding the best combination of aid to meet a student's financial need for college, given limited resources and the institutional constraints that vary from school to school. This guide to packaging under the EDExpress software system outlines three steps to packaging. The first is determining the student's need for…

  10. 49 CFR 130.21 - Packaging requirements.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 2 2010-10-01 2010-10-01 false Packaging requirements. 130.21 Section 130.21 Transportation Other Regulations Relating to Transportation PIPELINE AND HAZARDOUS MATERIALS SAFETY... Packaging requirements. Each packaging used for the transportation of oil subject to this part must...

  11. 21 CFR 355.20 - Packaging conditions.

    Science.gov (United States)

    2010-04-01

    ... 21 Food and Drugs 5 2010-04-01 2010-04-01 false Packaging conditions. 355.20 Section 355.20 Food... HUMAN USE ANTICARIES DRUG PRODUCTS FOR OVER-THE-COUNTER HUMAN USE Active Ingredients § 355.20 Packaging... accord with § 355.60. (b) Tight container packaging. To minimize moisture contamination, all...

  12. Consumer perception: attributes considered important in packaging

    Directory of Open Access Journals (Sweden)

    Nara Medianeira Stefano

    2012-08-01

    Full Text Available Packaging has been considered the main vehicle for sales, brand building and product identity, since it is the first contact with the product that the consumer has, it is fundamental when choosing and buying a product. In this sense, the packaging is a silent salesperson, because it is up to the package to attract attention, create interest and desire, show the quality of the product and close the sale within seconds. Packaging has contributed to corporate communication with consumers; it provides product protection, storage and convenience, as products move through the value chain. Thinking about it, the product cannot be planned separately from its packaging, and it should not be defined based only on engineering, marketing, communications or economics. The packaging concept has expanded and gained product status; packaging is able to communicate the same language of convenience wherever it goes. Today, packaging industries are taking advantage of this opportunity to differentiate their products through packaging, finding that it is not enough for the package to be beautiful, unbreakable, or preserve the flavor and freshness of foods. Within this context, the objective of this research is to analyze, from the point of view of consumers, the most important product packaging attributes at the time of purchase. For this purpose, the data obtained in this study was run through the Statistica 8.0 and SPSS 16 (Statistical Package Social Sciences software’s.

  13. 7 CFR 33.6 - Package.

    Science.gov (United States)

    2010-01-01

    ... 7 Agriculture 2 2010-01-01 2010-01-01 false Package. 33.6 Section 33.6 Agriculture Regulations of the Department of Agriculture AGRICULTURAL MARKETING SERVICE (Standards, Inspections, Marketing... ISSUED UNDER AUTHORITY OF THE EXPORT APPLE ACT Definitions § 33.6 Package. Package means any container...

  14. Nanoparticle Reactions on Chip

    Science.gov (United States)

    Köhler, J. M.; Kirner, Th.; Wagner, J.; Csáki, A.; Möller, R.; Fritzsche, W.

    The handling of heterogenous systems in micro reactors is difficult due to their adhesion and transport behaviour. Therefore, the formation of precipitates and gas bubbles has to be avoided in micro reaction technology, in most cases. But, micro channels and other micro reactors offer interesting possibilities for the control of reaction conditions and transport by diffusion and convection due to the laminar flow caused by small Reynolds numbers. This can be used for the preparation and modification of objects, which are much smaller than the cross section of microchannels. The formation of colloidal solutions and the change of surface states of nano particles are two important tasks for the application of chip reactors in nanoparticle technology. Some concepts for the preparation and reaction of nanoparticles in modular chip reactor arrangements will be discussed.

  15. Development of an AOI system for chips with a hole on backside based on a frame imager

    Science.gov (United States)

    Chen, Ming-Fu; Chou, Chih-Chung; Lien, Chun-Chien; Weng, Rui-Cian

    2016-01-01

    Defects exist for a few of IC chips during fabrication and packaging. The cost for follow-up processes can be reduced if chips with defect size of impacting chip quality can be inspected and removed during the earlier sorting process. Products will be more cost-effective and competitive. According to the inspecting requirements for microphone chips, developed AOI system has to detect the boundary flaws and hole-inside defects with size of greater than criteria from chips backside. Both the length and width of chip size are less than 5 mm and there's depth difference between the surface of chip backside and the hole-inside membrance. Thus image acquisition device is designed and implemented by an area scan imager and a telecentric lenses with a coaxial LED lighting module. Therefore we can ignore the image radiometric and geometric calibration, and keep off the shadow inside the rim of hole. An algorithm to detect defects and derive their size based on the edge pixels statistic distribution and binary chip edge image is selected. Developed AOI system then can meet the requirements of real-time defect inspection with high accuracy and performance. Frame opto-mechanical device has the spatial resolution of 5μm and FOV of 6.4 x 5.1 mm. And defect inspection can be completed within 150 ms for the chip size of 2.5 x 3.0 mm. The processes of image acquisition and defect inspection can be accomplished during the chip sorting process to satisfy the real-time online inspection. Inspected chips are placed in GO/NG trays in real-time according to their quality. From the verification results compared with the ones by microscope, the inspection accuracy is better than system requirements. The over kill rate is less than 0.3% and 3% for chip boundary flaws and hole-inside defects respectively. But it still can't be inspected correctly for the hole-inside defects of only one membrance breakage. In the future, we will improve the illumination and detecting algorithm to solve this

  16. DNA packaging by lambda-like bacteriophages: mutations broadening the packaging specificity of terminase, the lambda-packaging enzyme.

    Science.gov (United States)

    Feiss, Michael; Reynolds, Erin; Schrock, Morgan; Sippy, Jean

    2010-01-01

    The DNA-packaging specificities of phages lambda and 21 depend on the specific DNA interactions of the small terminase subunits, which have support helix-turn-recognition helix-wing DNA-binding motifs. lambda-Terminase with the recognition helix of 21 preferentially packages 21 DNA. This chimeric terminase's ability to package lambdaDNA is reduced approximately 20-fold. Phage lambda with the chimeric terminase is unable to form plaques, but pseudorevertants are readily obtained. Some pseudorevertants have trans-acting suppressors that change codons of the recognition helix. Some of these codons appear to remove an unfavorable base-pair contact; others appear to create a novel nonspecific DNA contact. Helper-packaging experiments show that these mutant terminases have lost the ability to discriminate between lambda and 21 during DNA packaging. Two cis-acting suppressors affect cosB, the small subunit's DNA-binding site. Each changes a cosB(lambda)-specific base pair to a cosB(21)-specific base pair. These cosB suppressors cause enhanced DNA packaging by 21-specific terminase and reduce packaging by lambda-terminase. Both the cognate support helix and turn are required for strong packaging discrimination. The wing does not contribute to cosB specificity. Evolution of packaging specificity is discussed, including a model in which lambda- and 21-packaging specificities diverged from a common ancestor phage with broad packaging specificity.

  17. DNA Packaging by λ-Like Bacteriophages: Mutations Broadening the Packaging Specificity of Terminase, the λ-Packaging Enzyme

    Science.gov (United States)

    Feiss, Michael; Reynolds, Erin; Schrock, Morgan; Sippy, Jean

    2010-01-01

    The DNA-packaging specificities of phages λ and 21 depend on the specific DNA interactions of the small terminase subunits, which have support helix-turn-recognition helix-wing DNA-binding motifs. λ-Terminase with the recognition helix of 21 preferentially packages 21 DNA. This chimeric terminase's ability to package λDNA is reduced ∼20-fold. Phage λ with the chimeric terminase is unable to form plaques, but pseudorevertants are readily obtained. Some pseudorevertants have trans-acting suppressors that change codons of the recognition helix. Some of these codons appear to remove an unfavorable base-pair contact; others appear to create a novel nonspecific DNA contact. Helper-packaging experiments show that these mutant terminases have lost the ability to discriminate between λ and 21 during DNA packaging. Two cis-acting suppressors affect cosB, the small subunit's DNA-binding site. Each changes a cosBλ-specific base pair to a cosB21-specific base pair. These cosB suppressors cause enhanced DNA packaging by 21-specific terminase and reduce packaging by λ-terminase. Both the cognate support helix and turn are required for strong packaging discrimination. The wing does not contribute to cosB specificity. Evolution of packaging specificity is discussed, including a model in which λ- and 21-packaging specificities diverged from a common ancestor phage with broad packaging specificity. PMID:19841094

  18. The bacteriophage DNA packaging machine.

    Science.gov (United States)

    Feiss, Michael; Rao, Venigalla B

    2012-01-01

    Large dsDNA bacteriophages and herpesviruses encode a powerful ATP-driven DNA-translocating machine that encapsidates a viral genome into a preformed capsid shell or prohead. The key components of the packaging machine are the packaging enzyme (terminase, motor) and the portal protein that forms the unique DNA entrance vertex of prohead. The terminase complex, comprised of a recognition subunit (small terminase) and an endonuclease/translocase subunit (large terminase), cuts viral genome concatemers. The terminase-viral DNA complex docks on the portal vertex, assembling a motor complex containing five large terminase subunits. The pentameric motor processively translocates DNA until the head shell is full with one viral genome. The motor cuts the DNA again and dissociates from the full head, allowing head-finishing proteins to assemble on the portal, sealing the portal, and constructing a platform for tail attachment. A body of evidence from molecular genetics and biochemical, structural, and biophysical approaches suggests that ATP hydrolysis-driven conformational changes in the packaging motor (large terminase) power DNA motion. Various parts of the motor subunit, such as the ATPase, arginine finger, transmission domain, hinge, and DNA groove, work in concert to translocate about 2 bp of DNA per ATP hydrolyzed. Powerful single-molecule approaches are providing precise delineation of steps during each translocation event in a motor that has a speed as high as a millisecond/step. The phage packaging machine has emerged as an excellent model for understanding the molecular machines, given the mechanistic parallels between terminases, helicases, and numerous motor proteins.

  19. Transportation and packaging resource guide

    Energy Technology Data Exchange (ETDEWEB)

    Arendt, J.W.; Gove, R.M.; Welch, M.J.

    1994-12-01

    The purpose of this resource guide is to provide a convenient reference document of information that may be useful to the U.S. Department of Energy (DOE) and DOE contractor personnel involved in packaging and transportation activities. An attempt has been made to present the terminology of DOE community usage as it currently exists. DOE`s mission is changing with emphasis on environmental cleanup. The terminology or nomenclature that has resulted from this expanded mission is included for the packaging and transportation user for reference purposes. Older terms still in use during the transition have been maintained. The Packaging and Transportation Resource Guide consists of four sections: Sect. 1, Introduction; Sect. 2, Abbreviations and Acronyms; Sect. 3, Definitions; and Sect. 4, References for packaging and transportation of hazardous materials and related activities, and Appendices A and B. Information has been collected from DOE Orders and DOE documents; U.S Department of Transportation (DOT), U.S. Environmental Protection Agency (EPA), and U.S. Nuclear Regulatory Commission (NRC) regulations; and International Atomic Energy Agency (IAEA) standards and other international documents. The definitions included in this guide may not always be a regulatory definition but are the more common DOE usage. In addition, the definitions vary among regulatory agencies. It is, therefore, suggested that if a definition is to be used in a regulatory or a legal compliance issue, the definition should be verified with the appropriate regulation. To assist in locating definitions in the regulations, a listing of all definition sections in the regulations are included in Appendix B. In many instances, the appropriate regulatory reference is indicated in the right-hand margin.

  20. Food packaging and radiation sterilization

    Energy Technology Data Exchange (ETDEWEB)

    Kawamura, Yoko [Division of Food Additives, National Institute of Health Sciences, Tokyo (Japan)

    1998-12-31

    Radiation sterilization has several merits that it is a positively effective sterilization method, it can be used to sterilize low heat-resistant containers and high gas barrier films, and there is no possibility of residual chemicals being left in the packages. It has been commercially used in `Bag in a Box` and some food containers. The {gamma} ray and an electron beam are commonly used in radiation sterilization. The {gamma} ray can sterilize large size containers and containers with complex shapes or sealed containers due to its strong transmission capability. However, since the equipment tends to be large and expensive, it is generally used in off production lines. On the other hand, it is possible to install and electron beam system on food production lines since the food can be processed in a short time due to its high beam coefficient and its ease of maintenance, even though an electron beam has limited usage such as sterilizing relatively thin materials and surface sterilization due to the weak transmission. A typical sterilization dose is approximately 10-30 kGy. Direct effects impacting packaging materials, particularly plastics, include scission of polymer links, cross-linkage between polymers, and generating radiolysis products such as hydrogen, methane, aliphatic hydrocarbons, etc. Furthermore, under the existence of oxygen, the oxygen radicals generated by the radiation will oxidize and peroxidize polymer chains and will generate alcohol and carbonyl groups, which shear polymer links, and generate oxygen containing low molecular compounds. As a result, degradation of physical strength such as elongation and seal strength, generating foreign odor, and an increase in global migration values shown in an elution test are sometimes evident. The food packages have different shapes, materials, additives, number of microorganisms and purpose. Therefor the effects of radiation, the optimum dose and so on must be investigated on the individual package. (J.P.N.)

  1. Applications of superconductivity to packaging

    Energy Technology Data Exchange (ETDEWEB)

    Hilbert, C.; Koger, H.; Ghoshal, U.; Gibson, D.A.; Smith, L.

    1989-05-01

    The potential applications of high temperature superconductors to packaging - interconnect technology - are reviewed. The authors caution against naive assumptions such as that it is obvious that superconductors will make computers run faster. On the other hand, they present examples in which the use of superconductors can significantly improve digital systems. These examples, however, involve much more than the simple substitution of superconductors for copper. They argue that imaginative uses of superconductors will eventually have a major impact on digital systems.

  2. A numerical study of void nucleation and growth in a flip chip assembly process

    Science.gov (United States)

    Lee, Sangil; Zhou, Hao Min; Baldwin, Daniel F.

    2010-09-01

    In this study, we develop mathematical models and numerical simulations of void nucleation and growth induced by the chemical reaction in the flip chip package assembly process using a no-flow underfill. During the thermal assembly process, the underfill chemically reacts to the oxidation of solders I/O on the chip, achieving interconnection between chip and substrate. The chemical reaction causes a large number of voids in the thermal reflow process. The voids have been considered as a critical defect, reducing the life of the thermal reliability. This study investigates the mechanism of void nucleation and growth based on classical bubble nucleation theory and bubble dynamics, respectively. This knowledge can provide a theoretical foundation to achieve a void-free assembly process and high reliability performance.

  3. CMOS On-Chip Optoelectronic Neural Interface Device with Integrated Light Source for Optogenetics

    Science.gov (United States)

    Sawadsaringkarn, Y.; Kimura, H.; Maezawa, Y.; Nakajima, A.; Kobayashi, T.; Sasagawa, K.; Noda, T.; Tokuda, T.; Ohta, J.

    2012-03-01

    A novel optoelectronic neural interface device is proposed for target applications in optogenetics for neural science. The device consists of a light emitting diode (LED) array implemented on a CMOS image sensor for on-chip local light stimulation. In this study, we designed a suitable CMOS image sensor equipped with on-chip electrodes to drive the LEDs, and developed a device structure and packaging process for LED integration. The prototype device produced an illumination intensity of approximately 1 mW with a driving current of 2.0 mA, which is expected to be sufficient to activate channelrhodopsin (ChR2). We also demonstrated the functions of light stimulation and on-chip imaging using a brain slice from a mouse as a target sample.

  4. Hazardous Material Packaging and Transportation

    Energy Technology Data Exchange (ETDEWEB)

    Hypes, Philip A. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States)

    2016-02-04

    This is a student training course. Some course objectives are to: recognize and use standard international and US customary units to describe activities and exposure rates associated with radioactive material; determine whether a quantity of a single radionuclide meets the definition of a class 7 (radioactive) material; determine, for a given single radionuclide, the shipping quantity activity limits per 49 Code of Federal Regulations (CFR) 173.435; determine the appropriate radioactive material hazard class proper shipping name for a given material; determine when a single radionuclide meets the DOT definition of a hazardous substance; determine the appropriate packaging required for a given radioactive material; identify the markings to be placed on a package of radioactive material; determine the label(s) to apply to a given radioactive material package; identify the entry requirements for radioactive material labels; determine the proper placement for radioactive material label(s); identify the shipping paper entry requirements for radioactive material; select the appropriate placards for a given radioactive material shipment or vehicle load; and identify allowable transport limits and unacceptable transport conditions for radioactive material.

  5. Active packaging with antifungal activities.

    Science.gov (United States)

    Nguyen Van Long, N; Joly, Catherine; Dantigny, Philippe

    2016-03-01

    There have been many reviews concerned with antimicrobial food packaging, and with the use of antifungal compounds, but none provided an exhaustive picture of the applications of active packaging to control fungal spoilage. Very recently, many studies have been done in these fields, therefore it is timely to review this topic. This article examines the effects of essential oils, preservatives, natural products, chemical fungicides, nanoparticles coated to different films, and chitosan in vitro on the growth of moulds, but also in vivo on the mould free shelf-life of bread, cheese, and fresh fruits and vegetables. A short section is also dedicated to yeasts. All the applications are described from a microbiological point of view, and these were sorted depending on the name of the species. Methods and results obtained are discussed. Essential oils and preservatives were ranked by increased efficacy on mould growth. For all the tested molecules, Penicillium species were shown more sensitive than Aspergillus species. However, comparison between the results was difficult because it appeared that the efficiency of active packaging depended greatly on the environmental factors of food such as water activity, pH, temperature, NaCl concentration, the nature, the size, and the mode of application of the films, in addition to the fact that the amount of released antifungal compounds was not constant with time.

  6. Waste Package Design Methodology Report

    Energy Technology Data Exchange (ETDEWEB)

    D.A. Brownson

    2001-09-28

    The objective of this report is to describe the analytical methods and processes used by the Waste Package Design Section to establish the integrity of the various waste package designs, the emplacement pallet, and the drip shield. The scope of this report shall be the methodology used in criticality, risk-informed, shielding, source term, structural, and thermal analyses. The basic features and appropriateness of the methods are illustrated, and the processes are defined whereby input values and assumptions flow through the application of those methods to obtain designs that ensure defense-in-depth as well as satisfy requirements on system performance. Such requirements include those imposed by federal regulation, from both the U.S. Department of Energy (DOE) and U.S. Nuclear Regulatory Commission (NRC), and those imposed by the Yucca Mountain Project to meet repository performance goals. The report is to be used, in part, to describe the waste package design methods and techniques to be used for producing input to the License Application Report.

  7. The bacteriophage DNA packaging motor.

    Science.gov (United States)

    Rao, Venigalla B; Feiss, Michael

    2008-01-01

    An ATP-powered DNA translocation machine encapsidates the viral genome in the large dsDNA bacteriophages. The essential components include the empty shell, prohead, and the packaging enzyme, terminase. During translocation, terminase is docked on the prohead's portal protein. The translocation ATPase and the concatemer-cutting endonuclease reside in terminase. Remarkably, terminases, portal proteins, and shells of tailed bacteriophages and herpes viruses show conserved features. These DNA viruses may have descended from a common ancestor. Terminase's ATPase consists of a classic nucleotide binding fold, most closely resembling that of monomeric helicases. Intriguing models have been proposed for the mechanism of dsDNA translocation, invoking ATP hydrolysis-driven conformational changes of portal or terminase powering DNA motion. Single-molecule studies show that the packaging motor is fast and powerful. Recent advances permit experiments that can critically test the packaging models. The viral genome translocation mechanism is of general interest, given the parallels between terminases, helicases, and other motor proteins.

  8. Avaliação da aceitação de "chips" de mandioca Acceptance evaluation of cassava chips

    Directory of Open Access Journals (Sweden)

    Regina Kitagawa Grizotto

    2003-12-01

    Full Text Available Pré-tratamentos como o cozimento, a fermentação natural e a secagem parcial foram aplicados em raízes de mandioca, visando a obtenção de "chips" comestíveis. A avaliação sensorial foi feita com base na aceitação e aparência dos "chips" das variedades IAC Mantiqueira e IAC 576.70. Trinta consumidores potenciais do produto foram selecionados em função da disponibilidade e interesse em participar dos testes. Foi utilizada escala hedônica de 7 pontos, onde os provadores avaliaram as amostras delineadas em blocos casualizados. Os resultados obtidos mostraram que os "chips" controle e pré-cozidos foram aceitos sensorialmente, apresentado médias de 5,1 (gostei ligeiramente para IAC Mantiqueira e 6,0 (gostei moderadamente para IAC 576.70. Os "chips" pré-fermentados de ambas variedades foram rejeitados. Os termos de agrado mais comentados pelos provadores foram "sabor de mandioca", "crocância" e "textura". Os termos de desagrado mais citados incluem "textura dura", "falta sabor de mandioca" e "gosto de óleo". Os provadores consideraram adequada a aparência dos "chips" de ambas variedades, sendo ligeiramente preferida a aparência dos "chips" da IAC 576.70, com exceção dos "chips" cozidos por 8 minutos e os fermentados, rejeitados pelos consumidores. A cor amarela da polpa pode ter influenciado a aceitação da variedade IAC 576.70. A composição centesimal e o teor de fibras na mandioca in natura e, o teor de lipídeos em "chips" de mandioca, também foram apresentados.Pre-treatments such as cooking, natural fermentation and partial drying were applied to cassava roots, aimed at obtaining edible cassava chips. The sensory evaluation was based on the acceptance and appearance of the chips, using the varieties IAC Mantiqueira and IAC 576.70. Thirty potential consumers of the product were selected based on their availability and interest. A 7-point hedonic scale was used, all the judges evaluating all the samples using a randomised

  9. On-chip noninterference angular momentum multiplexing of broadband light.

    Science.gov (United States)

    Ren, Haoran; Li, Xiangping; Zhang, Qiming; Gu, Min

    2016-05-13

    Angular momentum division has emerged as a physically orthogonal multiplexing method in high-capacity optical information technologies. However, the typical bulky elements used for information retrieval from the overall diffracted field, based on the interference method, impose a fundamental limit toward realizing on-chip multiplexing. We demonstrate noninterference angular momentum multiplexing by using a mode-sorting nanoring aperture with a chip-scale footprint as small as 4.2 micrometers by 4.2 micrometers, where nanoring slits exhibit a distinctive outcoupling efficiency on tightly confined plasmonic modes. The nonresonant mode-sorting sensitivity and scalability of our approach enable on-chip parallel multiplexing over a bandwidth of 150 nanometers in the visible wavelength range. The results offer the possibility of ultrahigh-capacity and miniaturized nanophotonic devices harnessing angular momentum division.

  10. Vacuum-packaged piezoelectric vibration energy harvesters: damping contributions and autonomy for a wireless sensor system

    Science.gov (United States)

    Elfrink, R.; Renaud, M.; Kamel, T. M.; de Nooijer, C.; Jambunathan, M.; Goedbloed, M.; Hohlfeld, D.; Matova, S.; Pop, V.; Caballero, L.; van Schaijk, R.

    2010-10-01

    This paper describes the characterization of thin-film MEMS vibration energy harvesters based on aluminum nitride as piezoelectric material. A record output power of 85 µW is measured. The parasitic-damping and the energy-harvesting performances of unpackaged and packaged devices are investigated. Vacuum and atmospheric pressure levels are considered for the packaged devices. When dealing with packaged devices, it is found that vacuum packaging is essential for maximizing the output power. Therefore, a wafer-scale vacuum package process is developed. The energy harvesters are used to power a small prototype (1 cm3 volume) of a wireless autonomous sensor system. The average power consumption of the whole system is less than 10 µW, and it is continuously provided by the vibration energy harvester.

  11. Examination of SR101 shipping packages

    Energy Technology Data Exchange (ETDEWEB)

    Daugherty, W. L. [Savannah River Site (SRS), Aiken, SC (United States). Savannah River National Lab. (SRNL)

    2015-03-01

    Four SR101 shipping packages were removed from service and provided for disassembly and examination of the internal fiberboard assemblies. These packages were 20 years old, and had experienced varying levels of degradation. Two of the packages were successfully disassembled and fiberboard samples were removed from these packages and tested. Mechanical and thermal property values are generally comparable to or higher than baseline values measured on fiberboard from 9975 packages, which differs primarily in the specified density range. While baseline data for the SR101 material is not available, this comparison with 9975 material suggests that the material properties of the SR101 fiberboard have not significantly degraded.

  12. The Model 9977 Radioactive Material Packaging Primer

    Energy Technology Data Exchange (ETDEWEB)

    Abramczyk, G. [Savannah River Site (SRS), Aiken, SC (United States). Savannah River National Lab. (SRNL)

    2015-10-09

    The Model 9977 Packaging is a single containment drum style radioactive material (RAM) shipping container designed, tested and analyzed to meet the performance requirements of Title 10 the Code of Federal Regulations Part 71. A radioactive material shipping package, in combination with its contents, must perform three functions (please note that the performance criteria specified in the Code of Federal Regulations have alternate limits for normal operations and after accident conditions): Containment, the package must “contain” the radioactive material within it; Shielding, the packaging must limit its users and the public to radiation doses within specified limits; and Subcriticality, the package must maintain its radioactive material as subcritical

  13. OPIUM : optimal package install/ uninstall manager

    OpenAIRE

    Tucker, Christopher James

    2008-01-01

    Linux distributions often include package management tools such as apt-get in Debian or yum in RedHat. Using information about package dependencies and conflicts, such tools can determine how to install a new package (and its dependencies on a system of already installed packages. Using off-the-shelf SAT solvers, pseudo-boolean solvers, and Integer Linear Programming solvers, we have developed a new package-management tool, called Opium, that improves on current tools in two ways: (1) Opium i...

  14. ARPREC: An arbitrary precision computation package

    Energy Technology Data Exchange (ETDEWEB)

    Bailey, David H.; Yozo, Hida; Li, Xiaoye S.; Thompson, Brandon

    2002-09-01

    This paper describes a new software package for performing arithmetic with an arbitrarily high level of numeric precision. It is based on the earlier MPFUN package, enhanced with special IEEE floating-point numerical techniques and several new functions. This package is written in C++ code for high performance and broad portability and includes both C++ and Fortran-90 translation modules, so that conventional C++ and Fortran-90 programs can utilize the package with only very minor changes. This paper includes a survey of some of the interesting applications of this package and its predecessors.

  15. IMS Content Packaging v1.2 public draft specification

    NARCIS (Netherlands)

    Burgos, Daniel; Tattersall, Colin; Vogten, Hubert

    2006-01-01

    The IMS Content Packaging Specification provides the functionality to describe and package learning materials, such as an individual course or a collection of courses, into interoperable, distributable packages. Content Packaging addresses the description, structure, and location of online learning

  16. Perspectives on the Elements of Packaging Design : A Qualitative Study on the Communication of Packaging

    OpenAIRE

    Alervall, Viktoria; Saied, Juan Sdiq

    2013-01-01

    Background: In today’s markets almost all products we buy come packaged. We use packaging to protect, contain and identify products. Furthermore if this is executed in a skillful way consumers often choose products based on packaging. The work of a designer and marketer is therefore extremely valuable when it comes to the design of a package. Problem: How are packages used to communicate marketing information? Purpose: The focus of this thesis is to identify differences and similarities of a ...

  17. The art of packaging: An investigation into the role of color in packaging, marketing, and branding

    OpenAIRE

    Behzad Mohebbi

    2014-01-01

    The purpose of this study is to contribute to the existing research in the field of packaging and marketing and shed more light on the psychology of colors and their effect on packaging and marketing. Nowadays, packaging is proved to be one of the significant factors in the success of promoting product sale. However, there is a perceived gap with respect to the different aspects of packaging, in particular the graphics, design, and color of packaging. The current study provides...

  18. Chips in black boxes? Convenience life span, parafood, brandwidth, families, and co-creation.

    Science.gov (United States)

    Jacobs, Marc

    2015-11-01

    Any consumer who opens a bag of potato or corn chips (or crisps in the UK) knows there is no time to waste to enjoy or share them. The convenience life span of chips is limited: it is the shelf or storage life and a very limited time once outside the bag. Many technologies converge to generate the desired effect as a black box, not only of the packaging but also of the chips themselves. The concept of paratext can be applied to printed messages on the package, including the brand name and other texts like advertising (epitexts), which can be expanded into the concept of parafood. These concepts help to discuss technological developments and interpret why this has recently become a negotiation zone for co-creation (see the Do us a flavor campaigns). They are symptoms of changing relations between production, research and development, marketing, and consumption. This paper pays special attention to back stories, underdog brand biographies and narratives about origin. The concept of brandwidth is introduced to sensitize about the limits of combining different stories about chips. A recent brand biography, a family history and a cookery book are used to discuss the phenomenon of cooking with Fritos. Together with the concepts of parafood, brandwidth and black boxes, more reflection and dialogue about the role of history and heritage in marketing put new challenging perspectives on the agenda.

  19. Antimicrobial packaging with natural compunds - a review

    Directory of Open Access Journals (Sweden)

    Renata Dobrucka

    2016-12-01

    Full Text Available Background:  Packaging problems are an integral part of logistics and the implementation of packaging significantly affects the effectiveness of logistics processes, as a factor which increases the safety and the quality of products being transported. Active packaging is an area of technology needed to meet the requirements of the contemporary consumer. Active packaging creates additional opportunities in systems for packing goods, as well as offering a solution in which the packaging, the product and surroundings interact. Furthermore, active packaging allows packaging to interact with food and the environment and play a dynamic role in food preservation. The main role of antimicrobial packaging is to inhibit the growth of microorganisms that reduce the quality of the packaged product. Methods: The application of natural antimicrobial agents appears to be safe for food products. Also, these compounds have potential applications as a natural preservative in the food packaging industry. This study presents some antibacterial agents, namely chitosan, nisin and pectins. Results and conclusion: Natural substances used in active packaging can eliminate the danger of chemical substances migrating to food.

  20. Liquids on-chip: direct storage and release employing micro-perforated vapor barrier films.

    Science.gov (United States)

    Czurratis, Daniel; Beyl, Yvonne; Grimm, Alexander; Brettschneider, Thomas; Zinober, Sven; Lärmer, Franz; Zengerle, Roland

    2015-07-07

    Liquids on-chip describes a reagent storage concept for disposable pressure driven Lab-on-Chip (LoC) devices, which enables liquid storage in reservoirs without additional packaging. On-chip storage of liquids can be considered as one of the major challenges for the commercial break through of polymer-based LoC devices. Especially the ability for long-term storage and reagent release on demand are the most important aspects for a fully developed technology. On-chip storage not only replaces manual pipetting, it creates numerous advantages: fully automated processing, ease of use, reduction of contamination and transportation risks. Previous concepts for on-chip storage are based on liquid packaging solutions (e.g. stick packs, blisters, glass ampoules), which implicate manufacturing complexity and additional pick and place processes. That is why we prefer on-chip storage of liquids directly in reservoirs. The liquids are collected in reservoirs, which are made of high barrier polymers or coated by selected barrier layers. Therefore, commonly used polymers for LoC applications as cyclic olefin polymer (COP) and polycarbonate (PC) were investigated in the context of novel polymer composites. To ensure long-term stability the reservoirs are sealed with a commercially available barrier film by hot embossing. The barrier film is structured by pulsed laser ablation, which installs rated break points without affecting the barrier properties. A flexible membrane is actuated through pneumatic pressure for reagent release on demand. The membrane deflection breaks the barrier film and leads to efficient cleaning of the reservoirs in order to provide the liquids for further processing.

  1. Ultra-thin chip technology and applications

    CERN Document Server

    2010-01-01

    Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.

  2. Examination of shipping package 9975-02403

    Energy Technology Data Exchange (ETDEWEB)

    Daugherty, W. L. [Savannah River Site (SRS), Aiken, SC (United States). Savannah River National Lab. (SRNL)

    2016-03-01

    SRNL examined shipping package 9975-02403 following storage of nuclear material in K-Area Complex (KAC). As a result of field surveillance activities in KAC, this package was identified to contain several non-conforming and other conditions. Further examination of this package in SRNL confirmed significant moisture and mold in the bottom layers of the lower fiberboard assembly, and identified additional corrosion along the seam weld and on the bottom of the drum. It was recently recommended that checking for corrosion along the bottom edge of the drum be implemented for packages that are removed from storage, as well as high wattage packages remaining in storage. The appearance of such corrosion on 9975-02403 further indicates that such corrosion may provide an indication of significant moisture concentration and related degradation within the package. This condition is more likely to develop in packages with higher internal heat loads.

  3. Modelling of a DNA packaging motor

    Institute of Scientific and Technical Information of China (English)

    Qian Jun; Xie Ping; Xue Xiao-Guang; Wang Peng-Ye

    2009-01-01

    During the assembly of many viruses, a powerful molecular motor packages the genome into a preassembled capsid. The Bacillus subtilis phage φ29 is an excellent model system to investigate the DNA packaging mechanism because of its highly efficient in vitro DNA packaging activity and the development of a single-molecule packaging assay. Here we make use of structural and biochemical experimental data to build a physical model of DNA packaging by the φ29 DNA packaging motor. Based on the model, various dynamic behaviours such as the packaging rate, pause frequency and slip frequency under different ATP concentrations, ADP concentrations, external loads as well as capsid fillings are studied by using Monte Carlo simulation. Good agreement is obtained between the simulated and available experimental results. Moreover, we make testable predictions that should guide future experiments related to motor function.

  4. EXAMINATION OF SHIPPING PACKAGE 9975-05050

    Energy Technology Data Exchange (ETDEWEB)

    Daugherty, W.

    2014-11-06

    Shipping package 9975-05050 was examined in K-Area following its identification as a high wattage package. Elevated temperature and fiberboard moisture content are key parameters that impact the degradation rate of fiberboard within 9975 packages in a storage environment. The high wattage of this package contributes significantly to component temperatures. After examination in K-Area, the package was provided to SRNL for further examination of the fiberboard assembly. The moisture content of the fiberboard was relatively low (compared to packages examined previously), but the moisture gradient (between fiberboard ID and OD surfaces) was relatively high, as would be expected for the high heat load. The cane fiberboard appeared intact and displayed no apparent change in integrity relative to a new package.

  5. Biobased Packaging - Application in Meat Industry

    Directory of Open Access Journals (Sweden)

    S. Wilfred Ruban

    2009-04-01

    Full Text Available Because of growing problems of waste disposal and because petroleum is a nonrenewable resource with diminishing quantities, renewed interest in packaging research is underway to develop and promote the use of “bio-plastics.” In general, compared to conventional plastics derived from petroleum, bio-based polymers have more diverse stereochemistry and architecture of side chains which enable research scientists a greater number of opportunities to customize the properties of the final packaging material. The primary challenge facing the food (Meat industry in producing bio-plastic packaging, currently, is to match the durability of the packaging with product shelf-life. Notable advances in biopolymer production, consumer demand for more environmentally-friendly packaging, and technologies that allow packaging to do more than just encompass the food are driving new and novel research and developments in the area of packaging for muscle foods. [Vet. World 2009; 2(2.000: 79-82

  6. Theory of the Golden Packaging Design Art

    Institute of Scientific and Technical Information of China (English)

    韩玮

    2012-01-01

      Color as a design language, in the packaging design field with a strong visual impact, is not only the ele-ments of commodity packaging, is the soul of the sales package, has become an important means of advertising goods image one. And the golden packaging and packaging the most popular the most brilliant. Golden art design to use in packing, we must request in the system designer can grasp the basic theory on the basis of the color, pay attention to the market and adapt to the colour is applied law, gift packaging spirituality and attractive charm, so as to create a good packaging, arouse consumers' desire to buy, in order to meet the increasing material and cultural and spiritual needs.

  7. Multiscale analysis of river networks using the R package linbin

    Science.gov (United States)

    Welty, Ethan Z.; Torgersen, Christian E.; Brenkman, Samuel J.; Duda, Jeffrey J.; Armstrong, Jonathan B.

    2015-01-01

    Analytical tools are needed in riverine science and management to bridge the gap between GIS and statistical packages that were not designed for the directional and dendritic structure of streams. We introduce linbin, an R package developed for the analysis of riverscapes at multiple scales. With this software, riverine data on aquatic habitat and species distribution can be scaled and plotted automatically with respect to their position in the stream network or—in the case of temporal data—their position in time. The linbin package aggregates data into bins of different sizes as specified by the user. We provide case studies illustrating the use of the software for (1) exploring patterns at different scales by aggregating variables at a range of bin sizes, (2) comparing repeat observations by aggregating surveys into bins of common coverage, and (3) tailoring analysis to data with custom bin designs. Furthermore, we demonstrate the utility of linbin for summarizing patterns throughout an entire stream network, and we analyze the diel and seasonal movements of tagged fish past a stationary receiver to illustrate how linbin can be used with temporal data. In short, linbin enables more rapid analysis of complex data sets by fisheries managers and stream ecologists and can reveal underlying spatial and temporal patterns of fish distribution and habitat throughout a riverscape.

  8. Repairable chip bonding/interconnect process

    Science.gov (United States)

    Bernhardt, Anthony F.; Contolini, Robert J.; Malba, Vincent; Riddle, Robert A.

    1997-01-01

    A repairable, chip-to-board interconnect process which addresses cost and testability issues in the multi-chip modules. This process can be carried out using a chip-on-sacrificial-substrate technique, involving laser processing. This process avoids the curing/solvent evolution problems encountered in prior approaches, as well is resolving prior plating problems and the requirements for fillets. For repairable high speed chip-to-board connection, transmission lines can be formed on the sides of the chip from chip bond pads, ending in a gull wing at the bottom of the chip for subsequent solder.

  9. 3D stacked chips from emerging processes to heterogeneous systems

    CERN Document Server

    Fettweis, Gerhard

    2016-01-01

    This book explains for readers how 3D chip stacks promise to increase the level of on-chip integration, and to design new heterogeneous semiconductor devices that combine chips of different integration technologies (incl. sensors) in a single package of the smallest possible size.  The authors focus on heterogeneous 3D integration, addressing some of the most important challenges in this emerging technology, including contactless, optics-based, and carbon-nanotube-based 3D integration, as well as signal-integrity and thermal management issues in copper-based 3D integration. Coverage also includes the 3D heterogeneous integration of power sources, photonic devices, and non-volatile memories based on new materials systems.   •Provides single-source reference to the latest research in 3D optoelectronic integration: process, devices, and systems; •Explains the use of wireless 3D integration to improve 3D IC reliability and yield; •Describes techniques for monitoring and mitigating thermal behavior in 3D I...

  10. 49 CFR 178.915 - General Large Packaging standards.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 2 2010-10-01 2010-10-01 false General Large Packaging standards. 178.915 Section... PACKAGINGS Large Packagings Standards § 178.915 General Large Packaging standards. (a) Each Large Packaging.... Large Packagings intended for solid hazardous materials must be sift-proof and water-resistant. (b)...

  11. Methodology of Efficient Energy Design for Noisy Deep Submicron VLSI Chips

    Institute of Scientific and Technical Information of China (English)

    WANGJun

    2004-01-01

    Power dissipation is becoming increasingly important as technology continues to scale. This paper describes a way to consider the dynamic, static and shortcircuit power dissipation simultaneously for making complete, quantitative prediction on the total power dissipation of noisy VLSI chip. Especially, this new method elucidates the mechanism of power dissipation caused by the intrinsic noise of deep submicron VLSI chip. To capture the noise dependency of efficient energy design strategies for VLSI chip, the simulation of two illustrative cases are observed. Finally, the future works are proposed for the optimum tradeoff among the power, speed and area, which includes the use of floating-body partially depleted silicon-on-insulator CMOS technology.

  12. Measuring the Attenuation Length of Water in the CHIPS-M Water Cherenkov Detector

    CERN Document Server

    Amat, F; Bryant, J; Carroll, T J; Germani, S; Joyce, T; Kreisten, B; Marshak, M; Meier, J; Nelson, J; Perch, A; Pfuzner, M; De Rijck, S; Salazar, R; Thomas, J; Trokan-Tenorio, J; Vahle, P; Wade, R; Whitehead, L; Whitney, M

    2016-01-01

    The water at the proposed site of the CHIPS water Cherenkov detector has been studied to measure its attenuation length for Cherenkov light as a function of filtering time. A scaled model of the CHIPS detector filled with water from the Wentworth 2W pit, proposed site of the CHIPS deployment, in conjunction with a 3.2\\unit{m} vertical column filled with this water, was used to study the transmission of 405nm laser light. Results consistent with attenuation lengths of up to 100m were observed for this wavelength with filtration and UV sterilization alone.

  13. Measuring the attenuation length of water in the CHIPS-M water Cherenkov detector

    Science.gov (United States)

    Amat, F.; Bizouard, P.; Bryant, J.; Carroll, T. J.; Rijck, S. De; Germani, S.; Joyce, T.; Kriesten, B.; Marshak, M.; Meier, J.; Nelson, J. K.; Perch, A. J.; Pfützner, M. M.; Salazar, R.; Thomas, J.; Trokan-Tenorio, J.; Vahle, P.; Wade, R.; Wendt, C.; Whitehead, L. H.; Whitney, M.

    2017-02-01

    The water at the proposed site of the CHIPS water Cherenkov detector has been studied to measure its attenuation length for Cherenkov light as a function of filtering time. A scaled model of the CHIPS detector filled with water from the Wentworth 2W pit, proposed site of the CHIPS deployment, in conjunction with a 3.2 m vertical column filled with this water, was used to study the transmission of 405 nm laser light. Results consistent with attenuation lengths of up to 100 m were observed for this wavelength with filtration and UV sterilization alone.

  14. On-chip spectroscopy with thermally tuned high-Q photonic crystal cavities

    Energy Technology Data Exchange (ETDEWEB)

    Liapis, Andreas C., E-mail: andreas.liapis@gmail.com; Gao, Boshen; Siddiqui, Mahmudur R. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Shi, Zhimin [Department of Physics, University of South Florida, Tampa, Florida 33620 (United States); Boyd, Robert W. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Department of Physics and School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, Ontario K1N 6N5 (Canada)

    2016-01-11

    Spectroscopic methods are a sensitive way to determine the chemical composition of potentially hazardous materials. Here, we demonstrate that thermally tuned high-Q photonic crystal cavities can be used as a compact high-resolution on-chip spectrometer. We have used such a chip-scale spectrometer to measure the absorption spectra of both acetylene and hydrogen cyanide in the 1550 nm spectral band and show that we can discriminate between the two chemical species even though the two materials have spectral features in the same spectral region. Our results pave the way for the development of chip-size chemical sensors that can detect toxic substances.

  15. On-chip spectroscopy with thermally-tuned high-Q photonic crystal cavities

    CERN Document Server

    Liapis, Andreas C; Siddiqui, Mahmudur R; Shi, Zhimin; Boyd, Robert W

    2015-01-01

    Spectroscopic methods are a sensitive way to determine the chemical composition of potentially hazardous materials. Here, we demonstrate that thermally-tuned high-Q photonic crystal cavities can be used as a compact high-resolution on-chip spectrometer. We have used such a chip-scale spectrometer to measure the absorption spectra of both acetylene and hydrogen cyanide in the 1550 nm spectral band, and show that we can discriminate between the two chemical species even though the two materials have spectral features in the same spectral region. Our results pave the way for the development of chip-size chemical sensors that can detect toxic substances.

  16. Implementation of Guaranteed Services in the MANGO Clockless Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    the effects of scaling microchip technologies. Equally important, a NoC facilitates a truly modular and scalable design flow. The MANGO (message-passing asynchronous network-on-chip providing guaranteed services over open core protocol (OCP) interfaces) NoC is presented, and how its key characteristics......Shared, segmented, on-chip interconnection networks, known as networks-on-chip (NoC), may become the preferred way of interconnecting intellectual property (IP) cores in future giga-scale system-on-chip (SoC) designs. A NoC can provide the required communication bandwidth while accommodating...... (clockless implementation, standard socket access points, and guaranteed communication services) make MANGO suitable for a modular SoC design flow is explained. Among the advantages of using clockless circuit techniques are inherent global timing closure, low forward latency in pipelines, and zero dynamic...

  17. MMIC Package for Millimeter Wave Frequency

    Science.gov (United States)

    Bharj, Sarjit Singh; Yuan, Steve

    1997-01-01

    Princeton Microwave Technology has successfully demonstrated the transfer of technology for the MMIC package. During this contract the package design was licensed from Hughes Aircraft Company for manufacture within the U.S. A major effort was directed towards characterization of the ceramic material for its dielectric constant and loss tangent properties. After selection of a ceramic tape, the high temperature co-fired ceramic package was manufactured in the U.S. by Microcircuit Packaging of America, Inc. Microwave measurements of the MMIC package were conducted by an intercontinental microwave test fixture. The package demonstrated a typical insertion loss of 0.5 dB per transition up to 32 Ghz and a return loss of better than 15 db. The performance of the package has been demonstrated from 2 to 30 Ghz by assembling three different MMIC amplifiers. Two of the MMIC amplifiers were designed for the 26 Ghz to 30 Ghz operation while the third MMIC was a distributed amplifier from 2 to 26.5 Ghz. The measured gain of the amplifier is consistent with the device data. The package costs are substantially lower than comparable packages available commercially. Typically the price difference is greater than a factor of three. The package cost is well under $5.00 for a quantity of 10,000 pieces.

  18. Natural biopolimers in organic food packaging

    Science.gov (United States)

    Wieczynska, Justyna; Cavoski, Ivana; Chami, Ziad Al; Mondelli, Donato; Di Donato, Paola; Di Terlizzi, Biagio

    2014-05-01

    Concerns on environmental and waste problems caused by use of non-biodegradable and non-renewable based plastic packaging have caused an increase interest in developing biodegradable packaging using renewable natural biopolymers. Recently, different types of biopolymers like starch, cellulose, chitosan, casein, whey protein, collagen, egg white, soybean protein, corn zein, gelatin and wheat gluten have attracted considerable attention as potential food packaging materials. Recyclable or biodegradable packaging material in organic processing standards is preferable where possible but specific principles of packaging are not precisely defined and standards have to be assessed. There is evidence that consumers of organic products have specific expectations not only with respect to quality characteristics of processed food but also in social and environmental aspects of food production. Growing consumer sophistication is leading to a proliferation in food eco-label like carbon footprint. Biopolymers based packaging for organic products can help to create a green industry. Moreover, biopolymers can be appropriate materials for the development of an active surfaces designed to deliver incorporated natural antimicrobials into environment surrounding packaged food. Active packaging is an innovative mode of packaging in which the product and the environment interact to prolong shelf life or enhance safety or sensory properties, while maintaining the quality of the product. The work will discuss the various techniques that have been used for development of an active antimicrobial biodegradable packaging materials focusing on a recent findings in research studies. With the current focus on exploring a new generation of biopolymer-based food packaging materials with possible applications in organic food packaging. Keywords: organic food, active packaging, biopolymers , green technology

  19. Lab-on-a-chip devices and micro-total analysis systems a practical guide

    CERN Document Server

    Svendsen, Winnie

    2015-01-01

    This book covers all the steps in order to fabricate a lab-on-a-chip device starting from the idea, the design, simulation, fabrication and final evaluation. Additionally, it includes basic theory on microfluidics essential to understand how fluids behave at such reduced scale. Examples of successful histories of lab-on-a-chip systems that made an impact in fields like biomedicine and life sciences are also provided.

  20. On-Chip Manipulation of Protein-Coated Magnetic Beads via Domain-Wall Conduits

    DEFF Research Database (Denmark)

    Donolato, Marco; Vavassori, Paolo; Gobbi, Marco;

    2010-01-01

    Geometrically constrained magnetic domain walls (DWs) in magnetic nanowires can be manipulated at the nanometer scale. The inhomogeneous magnetic stray field generated by a DW can capture a magnetic nanoparticle in solution. On-chip nanomanipulation of individual magnetic beads coated with proteins...... is demonstrated through the motion of geometrically constrained DWs in specially designed magnetic nanoconduits fully integrated in a lab-on-a-chip platform....

  1. Electroplated solder alloys for flip chip interconnections

    Science.gov (United States)

    Annala, P.; Kaitila, J.; Salonen, J.

    1997-01-01

    Flip chip mounting of bare dice is gaining widespread use in microelectronics packaging. The main drivers for this technology are high packaging density, improved performance at high frequency, low parasitic effects and potentially high reliability and low cost. Many companies have made significant efforts to develop a technology for bump processing, bare die testing and underfill encapsulation to gain the benefit of all potential advantages. We have focussed on low cost bumping of fully processed silicon wafers to develop a flexible scheme for various reflow requirements. The bumping process is based on galvanic plating from an alloy solution or, alternatively, from several elemental plating baths. Sputtered Mo/Cu or Cr/Cu is used as a wettable base for electroplating. Excess base metal is removed by using the bumps as an etching mask. Variation of the alloy composition or the layer structure, allows the adjustment of the bump reflow temperature for the specific requirements of the assembly. Using binary tin-lead and ternary tin-lead-bismuth alloys, reflow temperatures from 100 °C (bismuth rich alloys) to above 300 °C (lead rich alloys) can be covered. The influence of the plating current density on the final alloy composition has been established by ion beam analysis of the plated layers and a series of reflow experiments. To control the plating uniformity and the alloy composition, a new cup plating system has been built with a random flow pattern and continuous adjustment of the current density. A well-controlled reflow of the bumps has been achieved in hot glycerol up to the eutectic point of tin-lead alloys. For high temperature alloys, high molecular weight organic liquids have been used. A tensile pull strength of 20 g per bump and resistance of 5 mΩ per bump have been measured for typical eutectic tin-lead bumps of 100 μm in diameter.

  2. Recent lab-on-chip developments for novel drug discovery.

    Science.gov (United States)

    Khalid, Nauman; Kobayashi, Isao; Nakajima, Mitsutoshi

    2017-02-17

    Microelectromechanical systems (MEMS) and micro total analysis systems (μTAS) revolutionized the biochemical and electronic industries, and this miniaturization process became a key driver for many markets. Now, it is a driving force for innovations in life sciences, diagnostics, analytical sciences, and chemistry, which are called 'lab-on-a-chip, (LOC)' devices. The use of these devices allows the development of fast, portable, and easy-to-use systems with a high level of functional integration for applications such as point-of-care diagnostics, forensics, the analysis of biomolecules, environmental or food analysis, and drug development. In this review, we report on the latest developments in fabrication methods and production methodologies to tailor LOC devices. A brief overview of scale-up strategies is also presented together with their potential applications in drug delivery and discovery. The impact of LOC devices on drug development and discovery has been extensively reviewed in the past. The current research focuses on fast and accurate detection of genomics, cell mutations and analysis, drug delivery, and discovery. The current research also differentiates the LOC devices into new terminology of microengineering, like organ-on-a-chip, stem cells-on-a-chip, human-on-a-chip, and body-on-a-chip. Key challenges will be the transfer of fabricated LOC devices from lab-scale to industrial large-scale production. Moreover, extensive toxicological studies are needed to justify the use of microfabricated drug delivery vehicles in biological systems. It will also be challenging to transfer the in vitro findings to suitable and promising in vivo models. For further resources related to this article, please visit the WIREs website.

  3. Experiment list: SRX122568 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ip antibody=Stat2 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody catalog... number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 h

  4. Experiment list: SRX122522 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Irf2 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http://

  5. Experiment list: SRX122566 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat2 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog... number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 http:/

  6. Experiment list: SRX122412 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Junb || treatment=LPS || time=120 min || chip antibody manufacturer 1=Abcam || chip antibody catalo...g number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http:/

  7. Experiment list: SRX122406 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Irf1 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog... number 1=ab52520 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-640 http:/

  8. Experiment list: SRX214070 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available =Undifferentiated || treatment=Overexpress Sox2-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacturer 2

  9. Experiment list: SRX214086 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available entiated || cell line=KH2 || chip antibody 1=none || chip antibody manufacturer 1=none || chip antibody 2=none || chip antibody manuf...acturer 2=none http://dbarchive.biosciencedbc.jp/kyushu-

  10. Experiment list: SRX122417 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  11. Experiment list: SRX122415 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  12. Experiment list: SRX122485 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Atf3 || treatment=LPS || time=120 min || chip antibody manufacturer 1=Santa Cruz || chip antibody ...catalog number 1=sc-188 || chip antibody manufacturer 2=Abcam || chip antibody catalog number 2=ab70005-100

  13. Experiment list: SRX122565 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available antibody=Stat2 || treatment=LPS || time=0 min || chip antibody manufacturer 1=Abcam || chip antibody catalog... number 1=ab53149 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-839 http:/

  14. Experiment list: SRX122520 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Irf2 || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http://

  15. Experiment list: SRX122414 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=30 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  16. Experiment list: SRX122416 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Junb || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab28838 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-46 http://d

  17. Experiment list: SRX214074 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ge=Undifferentiated || treatment=Overexpress Sox17EK-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacture

  18. Experiment list: SRX214072 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available e=Undifferentiated || treatment=Overexpress Sox2KE-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacture

  19. Experiment list: SRX122523 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available ntibody=Irf2 || treatment=LPS || time=60 min || chip antibody manufacturer 1=Abcam || chip antibody catalog ...number 1=ab65048 || chip antibody manufacturer 2=Santa Cruz || chip antibody catalog number 2=sc-498 http://

  20. Experiment list: SRX214071 [Chip-atlas[Archive

    Lifescience Database Archive (English)

    Full Text Available Undifferentiated || treatment=Overexpress Sox2-V5 tagged || cell line=KH2 || chip antibody 1=none || chip antibody manufacture...r 1=none || chip antibody 2=V5 || chip antibody manufacturer 2=