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Sample records for channel clear-pem frontend

  1. Experimental characterization of the 192 channel Clear-PEM frontend ASIC coupled to a multi-pixel APD readout of LYSO:Ce crystals

    Energy Technology Data Exchange (ETDEWEB)

    Albuquerque, Edgar; Bexiga, Vasco [INESC-ID, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Bugalho, Ricardo; Carrico, Bruno; Ferreira, Claudia S.; Ferreira, Miguel [LIP, Avenida Elias Garcia 14-1, 1000-149 Lisboa (Portugal); Godinho, Joaquim [INOV, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Goncalves, Fernando; Leong, Carlos [INESC-ID, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Lousa, Pedro [INOV, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Machado, Pedro [INESC-ID, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Moura, Rui [LIP, Avenida Elias Garcia 14-1, 1000-149 Lisboa (Portugal); Neves, Pedro [INOV, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Ortigao, Catarina [LIP, Avenida Elias Garcia 14-1, 1000-149 Lisboa (Portugal); Piedade, Fernando [INOV, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Pinheiro, Joao F. [LIP, Avenida Elias Garcia 14-1, 1000-149 Lisboa (Portugal); Rego, Joel [INOV, Rua Alves Redol 9, 1000-129 Lisboa (Portugal); Rivetti, Angelo [INFN, Torino (Italy); Rodrigues, Pedro [LIP, Avenida Elias Garcia 14-1, 1000-149 Lisboa (Portugal)], E-mail: psilva@lip.pt; Silva, Jose C. [LIP, Avenida Elias Garcia 14-1, 1000-149 Lisboa (Portugal)] (and others)

    2009-01-21

    In the framework of the Clear-PEM project for the construction of a high-resolution scanner for breast cancer imaging, a very compact and dense frontend electronics system has been developed for readout of multi-pixel S8550 Hamamatsu APDs. The frontend electronics are instrumented with a mixed-signal Application-Specific Integrated Circuit (ASIC), which incorporates 192 low-noise charge pre-amplifiers, shapers, analog memory cells and digital control blocks. Pulses are continuously stored in memory cells at clock frequency. Channels above a common threshold voltage are readout for digitization by off-chip free-sampling ADCs. The ASIC has a size of 7.3x9.8mm{sup 2} and was implemented in a AMS 0.35{mu}m CMOS technology. In this paper the experimental characterization of the Clear-PEM frontend ASIC, reading out multi-pixel APDs coupled to LYSO:Ce crystal matrices, is presented. The chips were mounted on a custom test board connected to six APD arrays and to the data acquisition system. Six 32-pixel LYSO:Ce crystal matrices coupled on both sides to APD arrays were readout by two test boards. All 384 channels were operational. The chip power consumption is 660 mW (3.4 mW per channel). A very stable behavior of the chip was observed, with an estimated ENC of 1200-1300e{sup -} at APD gain 100. The inter-channel noise dispersion and mean baseline variation is less than 8% and 0.5%, respectively. The spread in the gain between different channels is found to be 1.5%. Energy resolution of 16.5% at 511 keV and 12.8% at 662 keV has been measured. Timing measurements between the two APDs that readout the same crystal is extracted and compared with detailed Monte Carlo simulations. At 511 keV the measured single photon time RMS resolution is 1.30 ns, in very good agreement with the expected value of 1.34 ns.

  2. Experimental characterization of the Clear-PEM scanner spectrometric performance

    Science.gov (United States)

    Bugalho, R.; Carriço, B.; Ferreira, C. S.; Frade, M.; Ferreira, M.; Moura, R.; Ortigão, C.; Pinheiro, J. F.; Rodrigues, P.; Rolo, I.; Silva, J. C.; Trindade, A.; Varela, J.

    2009-10-01

    In the framework of the Clear-PEM project for the construction of a high-resolution and high-specificity scanner for breast cancer imaging, a Positron Emission Mammography tomograph has been developed and installed at the Instituto Português de Oncologia do Porto hospital. The Clear-PEM scanner is mainly composed by two planar detector heads attached to a robotic arm, trigger/data acquisition electronics system and computing servers. The detector heads hold crystal matrices built from 2 × 2 × 20 mm3 LYSO:Ce crystals readout by Hamamatsu S8550 APD arrays. The APDs are optically coupled to both ends of the 6144 crystals in order to extract the DOI information for each detected event. Each one of 12288 APD's pixels is read and controlled by Application Specific Integrated Circuits water-cooled by an external cooling unit. The Clear-PEM frontend boards innovative design results in a unprecedented integration of the crystal matrices, APDs and ASICs, making Clear-PEM the PET scanner with the highest number of APD pixels ever integrated so far. In this paper, the scanner's main technical characteristics, calibration strategies and the first spectrometric performance evaluation in a clinical environment are presented. The first commissioning results show 99.7% active channels, which, after calibration, have inter-pixel and absolute gain distributions with dispersions of, respectively, 12.2% and 15.3%, demonstrating that despite the large number of channels, the system is uniform. The mean energy resolution at 511 keV is of 15.9%, with a 8.8% dispersion, and the mean CDOI-1 is 5.9%/mm, with a 7.8% dispersion. The coincidence time resolution, at 511 keV, for a energy window between 400 and 600 keV, is 5.2 ns FWHM.

  3. Experimental characterization of the Clear-PEM scanner spectrometric performance

    Energy Technology Data Exchange (ETDEWEB)

    Bugalho, R; Carrico, B; Ferreira, C S; Frade, M; Ferreira, M; Moura, R; Ortigao, C; Pinheiro, J F; Rodrigues, P; Rolo, I; Silva, J C; Trindade, A; Varela, J [Laboratorio de Instrumentacao e Fisica Experimental de Particulas (LIP), Av. Elias Garcia 14-1, 1000-149 Lisboa (Portugal)], E-mail: frade@lip.pt

    2009-10-15

    In the framework of the Clear-PEM project for the construction of a high-resolution and high-specificity scanner for breast cancer imaging, a Positron Emission Mammography tomograph has been developed and installed at the Instituto Portugues de Oncologia do Porto hospital. The Clear-PEM scanner is mainly composed by two planar detector heads attached to a robotic arm, trigger/data acquisition electronics system and computing servers. The detector heads hold crystal matrices built from 2 x 2 x 20 mm{sup 3} LYSO:Ce crystals readout by Hamamatsu S8550 APD arrays. The APDs are optically coupled to both ends of the 6144 crystals in order to extract the DOI information for each detected event. Each one of 12288 APD's pixels is read and controlled by Application Specific Integrated Circuits water-cooled by an external cooling unit. The Clear-PEM frontend boards innovative design results in a unprecedented integration of the crystal matrices, APDs and ASICs, making Clear-PEM the PET scanner with the highest number of APD pixels ever integrated so far. In this paper, the scanner's main technical characteristics, calibration strategies and the first spectrometric performance evaluation in a clinical environment are presented. The first commissioning results show 99.7% active channels, which, after calibration, have inter-pixel and absolute gain distributions with dispersions of, respectively, 12.2% and 15.3%, demonstrating that despite the large number of channels, the system is uniform. The mean energy resolution at 511 keV is of 15.9%, with a 8.8% dispersion, and the mean C{sub DOI}{sup -1} is 5.9%/mm, with a 7.8% dispersion. The coincidence time resolution, at 511 keV, for a energy window between 400 and 600 keV, is 5.2 ns FWHM.

  4. ClearPEM: prototype PET device dedicated to breast imaging

    CERN Multimedia

    Joao Varela

    2009-01-01

    Clinical trials have begun in Portugal on a new breast imaging system (ClearPEM) using positron emission tomography (PET). The system, developed by a Portuguese consortium in collaboration with CERN and laboratories participating in the Crystal Clear collaboration, will detect even the smallest tumours and thus help avoid unnecessary biopsies.

  5. Clear-PEM system counting rates: a Monte Carlo study

    Science.gov (United States)

    Rodrigues, P.; Trindade, A.; Varela, J.

    2007-01-01

    Positron Emission Mammography (PEM) with 18F-Fluorodeoxyglucose (18F-FDG) is a functional imaging technique for breast cancer detection. The development of dedicated imaging systems with high sensitivity and spatial resolution are crucial for early breast cancer diagnosis and an efficient therapy. Clear-PEM is a dual planar scanner designed for high-resolution breast cancer imaging under development by the Portuguese PET Mammography consortium within the Crystal Clear Collaboration. It brings together a favorable combination of high-density scintillator crystals coupled to compact photodetectors, arranged in a double readout scheme capable of providing depth-of-interaction information. A Monte Carlo study of the Clear-PEM system counting rates is presented in this paper. Hypothetical breast exam scenarios were simulated to estimate the single event rates, true and random coincidence rates. A realistic description of the patient and detector geometry, radiation environment, physics and instrumentation factors was adopted in this work. Special attention was given to the 18F-FDG accumulation in the patient torso organs which, for the Clear-PEM scanner, represent significant activity outside the field-of-view (FOV) contributing to an increase of singles, randoms and scattered coincidences affecting the overall system performance. The potential benefits of patient shielding to minimize the influence of the out-of-field background was explored. The influence of LYSO:Ce crystal intrinsic natural activity due to the presence of the 176Lu isotope on the counting rate performance of the proposed scanner, was also investigated.

  6. Performance and quality control of Clear-PEM detector modules

    Energy Technology Data Exchange (ETDEWEB)

    Amaral, Pedro; Carrico, Bruno; Ferreira, Miguel [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Moura, Rui [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal)], E-mail: moura@lip.pt; Ortigao, Catarina; Rodrigues, Pedro; Da Silva, Jose C.; Trindade, Andreia [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Varela, Joao [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); IST, Av Rovisco Pais, 1049-001 Lisbon (Portugal)

    2007-10-01

    Clear-PEM is a dedicated PET scanner for breast and axilla cancer diagnosis, under development within the framework of the Crystal Clear Collaboration at CERN, aiming at the detection of tumors down to 2 mm in diameter. The camera consists of two planar detector heads with active dimensions 16.0x14.5 cm{sup 2}. Each head has 96 Clear-PEM detector modules consisting of 32 LYSO:Ce pixels with dimensions 2x2x20 mm{sup 3} packed in a 4x8 BaSO{sub 4} reflector matrix compressed between two Hamamatsu S8550 APD arrays in a double-readout configuration for Depth-of-Interaction (DoI) determination. The modules are individually measured and characterized before being grouped into Supermodules (comprised of 24 modules). Measured properties include photo-peak position, relative gain dispersion, energy resolution, cross-talk and DoI resolution. Optical inspection of matrices was also performed with the aid of a microscope, to search for pixel misalignments and matrix defects. Modules' performance was thoroughly evaluated with a 511 keV collimated beam to exactly determine DoI resolution. In addition, a fast quality control (QC) procedure using flood irradiations from a {sup 137}Cs source was applied systematically. The overall performance of the 24 detector modules complies with the design goals of the Clear-PEM detector, showing energy resolution around 15%, DoI resolution of about 2 mm and gain dispersion among pixels of 15%.

  7. Clear-PEM system counting rates: a Monte Carlo study

    Energy Technology Data Exchange (ETDEWEB)

    Rodrigues, P [Laboratorio de Instrumentacao e Fisica Experimental de Particulas (LIP), Av. Elias Garcia 14-1 1000-149 Lisbon (Portugal); Trindade, A [Laboratorio de Instrumentacao e Fisica Experimental de Particulas (LIP), Av. Elias Garcia 14-1 1000-149 Lisbon (Portugal); Varela, J [Laboratorio de Instrumentacao e Fisica Experimental de Particulas (LIP), Av. Elias Garcia 14-1 1000-149 Lisbon (Portugal)

    2007-01-15

    Positron Emission Mammography (PEM) with {sup 18}F-Fluorodeoxyglucose ({sup 18}F-FDG) is a functional imaging technique for breast cancer detection. The development of dedicated imaging systems with high sensitivity and spatial resolution are crucial for early breast cancer diagnosis and an efficient therapy. Clear-PEM is a dual planar scanner designed for high-resolution breast cancer imaging under development by the Portuguese PET Mammography consortium within the Crystal Clear Collaboration. It brings together a favorable combination of high-density scintillator crystals coupled to compact photodetectors, arranged in a double readout scheme capable of providing depth-of-interaction information. A Monte Carlo study of the Clear-PEM system counting rates is presented in this paper. Hypothetical breast exam scenarios were simulated to estimate the single event rates, true and random coincidence rates. A realistic description of the patient and detector geometry, radiation environment, physics and instrumentation factors was adopted in this work. Special attention was given to the {sup 18}F-FDG accumulation in the patient torso organs which, for the Clear-PEM scanner, represent significant activity outside the field-of-view (FOV) contributing to an increase of singles, randoms and scattered coincidences affecting the overall system performance. The potential benefits of patient shielding to minimize the influence of the out-of-field background was explored. The influence of LYSO:Ce crystal intrinsic natural activity due to the presence of the {sup 176}Lu isotope on the counting rate performance of the proposed scanner, was also investigated.

  8. Clear-PEM, a dedicated PET camera for mammography

    CERN Document Server

    Lecoq, P

    2002-01-01

    Preliminary results suggest that Positron Emission Mammography (PEM) can offer a noninvasive method for the diagnosis of breast cancer. Metabolic images from PEM contain unique information not available from conventional morphologic imaging techniques and aid in expeditiously establishing the diagnosis of cancer. A dedicated machine seems to offer better perspectives in terms of position resolution and sensitivity. This paper describes the concept of Clear-PEM, the system presently developed by the Crystal Clear Collaboration at CERN for an evaluation of this approach. This device is based on new crystals introduced by the Crystal Clear as well as on modern data acquisition techniques developed for the large experiments in high energy physics experiments.

  9. Clear-PEM, a dedicated PET camera for mammography

    Energy Technology Data Exchange (ETDEWEB)

    Lecoq, P. E-mail: paul.lecoq@cern.ch; Varela, J

    2002-06-21

    Preliminary results suggest that Positron Emission Mammography (PEM) can offer a noninvasive method for the diagnosis of breast cancer. Metabolic images from PEM contain unique information not available from conventional morphologic imaging techniques and aid in expeditiously establishing the diagnosis of cancer. A dedicated machine seems to offer better perspectives in terms of position resolution and sensitivity. This paper describes the concept of Clear-PEM, the system presently developed by the Crystal Clear Collaboration at CERN for an evaluation of this approach. This device is based on new crystals introduced by the Crystal Clear as well as on modern data acquisition techniques developed for the large experiments in high energy physics experiments.

  10. Clear-PEM: a dedicated PET camera for improved breast cancer detection.

    Science.gov (United States)

    Abreu, M C; Almeida, P; Balau, F; Ferreira, N C; Fetal, S; Fraga, F; Martins, M; Matela, N; Moura, R; Ortigão, C; Peralta, L; Rato, P; Ribeiro, R; Rodrigues, P; Santos, A I; Trindade, A; Varela, J

    2005-01-01

    Positron emission mammography (PEM) can offer a non-invasive method for the diagnosis of breast cancer. Metabolic images from PEM using 18F-fluoro-deoxy-glucose, contain unique information not available from conventional morphologic imaging techniques like X-ray radiography. In this work, the concept of Clear-PEM, the system presently developed in the frame of the Crystal Clear Collaboration at CERN, is described. Clear-PEM will be a dedicated scanner, offering better perspectives in terms of position resolution and detection sensitivity.

  11. Simulation results of a veto counter for the ClearPEM

    CERN Document Server

    Trummer, J; Lecoq, P

    2009-01-01

    The Crystal Clear Collaboration (CCC) has built a prototype of a novel positron emission tomograph dedicated to functional breast imaging, the ClearPEM. The ClearPEM uses the common radio pharmaceutical FDG for imaging cancer. As FDG is a rather non-specific radio tracer, it accumulates not only in cancer cells but in all cells with a high energy consumption, such as the heart and liver. This fact poses a problem especially in breast imaging, where the vicinity of the heart and other organs to the breast leads to a high background noise level in the scanner. In this work, a veto counter to reduce the background is described. Different configurations and their effectiveness were studied using the GATE simulation package.

  12. Clear-PEM: A PET imaging system dedicated to breast cancer diagnostics

    CERN Document Server

    Abreu, M C; Albuquerque, E; Almeida, F G; Almeida, P; Amaral, P; Auffray, Etiennette; Bento, P; Bruyndonckx, P; Bugalho, R; Carriço, B; Cordeiro, H; Ferreira, M; Ferreira, N C; Gonçalves, F; Lecoq, Paul; Leong, C; Lopes, F; Lousã, P; Luyten, J; Martins, M V; Matela, N; Rato-Mendes, P; Moura, R; Nobre, J; Oliveira, N; Ortigão, C; Peralta, L; Rego, J; Ribeiro, R; Rodrigues, P; Santos, A I; Silva, J C; Silva, M M; Tavernier, Stefaan; Teixeira, I C; Texeira, J P; Trindade, A; Trummer, Julia; Varela, J

    2007-01-01

    The Clear-PEM scanner for positron emission mammography under development is described. The detector is based on pixelized LYSO crystals optically coupled to avalanche photodiodes and readout by a fast low-noise electronic system. A dedicated digital trigger (TGR) and data acquisition (DAQ) system is used for on-line selection of coincidence events with high efficiency, large bandwidth and small dead-time. A specialized gantry allows to perform exams of the breast and of the axilla. In this paper we present results of the measurement of detector modules that integrate the system under construction as well as the imaging performance estimated from Monte Carlo simulated data.

  13. Clear-PEM: A PET imaging system dedicated to breast cancer diagnostics

    Energy Technology Data Exchange (ETDEWEB)

    Abreu, M.C. [LIP, Lab. de Instrumentacao e Fisica Exp. Particulas (Portugal); Aguiar, D. [INESC-ID and INOV, Lisbon (Portugal); Albuquerque, E. [INEGI Inst. Eng. Mecanica Gestao Industrial, Porto (Portugal)] (and others)

    2007-02-01

    The Clear-PEM scanner for positron emission mammography under development is described. The detector is based on pixelized LYSO crystals optically coupled to avalanche photodiodes and readout by a fast low-noise electronic system. A dedicated digital trigger (TGR) and data acquisition (DAQ) system is used for on-line selection of coincidence events with high efficiency, large bandwidth and small dead-time. A specialized gantry allows to perform exams of the breast and of the axilla. In this paper we present results of the measurement of detector modules that integrate the system under construction as well as the imaging performance estimated from Monte Carlo simulated data.

  14. Characterization and quality control of avalanche photodiode arrays for the Clear-PEM detector modules

    Energy Technology Data Exchange (ETDEWEB)

    Abreu, Conceicao [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); UALG, Campus de Gambelas, 8000-117 Faro (Portugal); Amaral, Pedro [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Carrico, Bruno [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal)]. E-mail: bruno@lip.pt; Ferreira, Miguel [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Luyten, Joan [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Moura, Rui [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Ortigao, Catarina [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Rato, Pedro [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); Varela, Joao [LIP, Av Elias Garcia 14, 1000-149 Lisbon (Portugal); IST, Av Rovisco Pais, 1049-001 Lisbon (Portugal)

    2007-06-11

    Clear-PEM is a Positron Emission Mammography (PEM) prototype being developed in the framework of the Crystal Clear Collaboration at CERN. This device is a dedicated PET camera for mammography, based on LYSO:Ce scintillator crystals, Avalanche PhotoDiodes (APD) and a fast, low-noise electronics readout system, designed to examine both the breast and the axillary lymph node areas, and aiming at the detection of tumors down to 2 mm in diameter. The prototype has two planar detector heads, each composed of 96 detector modules. The Clear-PEM detector module is composed of a matrix of 32 identical 2x2x20 mm{sup 3} LYSO:Ce crystals read at both ends by Hamamatsu S8550 APD arrays (4x8) for Depth-of-Interaction (DoI) capability. The APD arrays were characterized by the measurement of gain and dark current as a function of bias voltage, under controlled temperature conditions. Two independent setups were used. The full set of 398 APD arrays followed a well-defined quality control (QC) protocol, aiming at the rejection of arrays not complying within defined specifications. From a total of 398 arrays, only 2 (0.5%) were rejected, reassuring the trust in these detectors for prototype assembly and future developments.

  15. Choosing the ART relaxation parameter for Clear-PEM 2D image reconstruction.

    Science.gov (United States)

    Mesquita, J; Matela, N; Oliveira, N; Martins, M V; Almeida, P

    2010-05-01

    The Algebraic Reconstruction Technique (ART) is an iterative image reconstruction algorithm. During the development of the Clear-PEM device, a PET scanner designed for the evaluation of breast cancer, multiple tests were done in order to optimise the reconstruction process. The comparison between ART, MLEM and OSEM indicates that ART can perform faster and with better image quality than the other, most common algorithms. It is claimed in this paper that if ART's relaxation parameter is carefully adjusted to the reconstruction procedure it can produce high quality images in short computational time. This is confirmed by showing that with the relaxation parameter evolving as a logarithmic function, ART can match in terms of image quality and overcome in terms of computational time the performance of MLEM and OSEM algorithms. However, this study was performed only with simulated data and the level of noise with real data may be different. Copyright (c) 2009 Elsevier Ireland Ltd.. All rights reserved.

  16. Active Feedback Technique for RF Channel Selection in Front-End Receivers

    NARCIS (Netherlands)

    Youssef, S.S.T.; van der Zee, Ronan A.R.; Nauta, Bram

    2012-01-01

    Co-existence problems in a mobile terminal environment pose strict requirements on the linearity of a front-end receiver. In this paper, active feedback is explored as a means to relax such requirements by providing channel selectivity as early as possible in the receiver chain. The proposed

  17. Development of front-end readout electronics for multi-channel silicon detector

    International Nuclear Information System (INIS)

    Zhang Fei; Fan Ruirui; Peng Wenxi; Dong Yifan; Gong Ke; Wang Huanyu

    2014-01-01

    A front-end readout circuit used in charge measurement for multi-channel silicon detector and its performance test results are introduced in this paper. A 64-channel charge sensitive ASIC chip (VA140) from IDEAS company is adopted in this method. With its features of low power consumption (< 0.29 mW/ch), low noise (RMSE < O.l fC), large dynamic range (-200 fC∼ +200 fC) and high integration (include 64 channels preamplifier-shaper), it can be used in future particle detecting experiments base on silicon detector. (authors)

  18. Numerical study of a magnetically insulated front-end channel for a neutrino factory

    Directory of Open Access Journals (Sweden)

    Diktys Stratakis

    2011-01-01

    Full Text Available A neutrino factory, which can deliver an intense flux of ∼10^{21} neutrinos per year from a multi-GeV stored muon beam, is seemingly the ideal tool for studying neutrino oscillations and CP violations for leptons. The front end of this facility plays a critical role in determining the number of muons that can be accepted by the downstream accelerators. Delivering peak performance requires transporting the muon beams through long sections of a beam channel containing high-gradient rf cavities and strong focusing solenoids. Here, we propose a novel scheme to improve the performance of the cavities, thereby increasing the number of muons within the acceptance of the accelerator chain. The key element of our new scheme is to apply a tangential magnetic field to the rf surfaces, thus forcing any field-emitted electrons to return to the surface before gaining enough energy to damage the cavity. We incorporate this idea into a new lattice design for a neutrino factory, and detail its performance numerically. Although our proposed front-end channel requires more rf power than conventional pillbox designs, it provides enough beam cooling and muon production to be a feasible option for a neutrino factory.

  19. A 32-channel front-end ASIC for GEM detectors used in beam monitoring applications

    Science.gov (United States)

    Ciciriello, F.; Altieri, P. R.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Lorusso, L.; Marzocca, C.; Matarrese, G.; Ranieri, A.; Stamerra, A.

    2017-11-01

    A multichannel, mixed-signal, front-end ASIC for GEM detectors, intended for beam monitoring in hadron therapy applications, has been designed and prototyped in a standard 0.35 μm CMOS technology. The analog channels are based on the classic CSA + shaper processing chain, followed by a peak detector which can work as an analog memory, to simplifiy the analog-to-digital conversion of the peak voltage of the output pulse, proportional to the energy of the detected event. The available hardware resources include an 8-bit A/D converter and a standard-cell digital part, which manages the read-out procedure, in sparse or serial mode. The ASIC is self-triggered and transfers energy and address data to the external DAQ via a fast 100 MHz LVDS link. Preliminary characterization results show that the non-linearity error is limited to 5% for a maximum input charge of about 70 fC, the measured ENC is about 1400e- and the time jitter of the trigger signal generated in response to an injected charge of 60 fC is close to 200 ps.

  20. Channel Analysis for a 6.4 Gb s-1 DDR5 Data Buffer Receiver Front-End

    Science.gov (United States)

    Lehmann, Stefanie; Gerfers, Friedel

    2017-09-01

    In this contribution, the channel characteristic of the next generation DDR5-SDRAM architecture and possible approaches to overcome channel impairments are analysed. Because modern enterprise server applications and networks demand higher memory bandwidth, throughput and capacity, the DDR5-SDRAM specification is currently under development as a follow-up of DDR4-SDRAM technology. In this specification, the data rate is doubled to DDR5-6400 per IO as compared to the former DDR4-3200 architecture, resulting in a total per DIMM data rate of up to 409.6 Gb s-1. The single-ended multi-point-to-point CPU channel architecture in DDRX technology remains the same for DDR5 systems. At the specified target data rate, insertion loss, reflections, cross-talk as well as power supply noise become more severe and have to be considered. Using the data buffer receiver front-end of a load-reduced memory module, sophisticated equalisation techniques can be applied to ensure target BER at the increased data rate. In this work, the worst case CPU back-plane channel is analysed to derive requirements for receiver-side equalisation from the channel response characteristics. First, channel impairments such as inter-symbol-interference, reflections from the multi-point channel structure, and crosstalk from neighboring lines are analysed in detail. Based on these results, different correction methods for DDR5 data buffer front-ends are discussed. An architecture with 1-tap FFE in combination with a multi-tap DFE is proposed. Simulation of the architecture using a random input data stream is used to reveal the required DFE tap filter depth to effectively eliminate the dominant ISI and reflection based error components.

  1. FILTRES: a 128 channels VLSI mixed front-end readout electronic development for microstrip detectors

    International Nuclear Information System (INIS)

    Anstotz, F.; Hu, Y.; Michel, J.; Sohler, J.L.; Lachartre, D.

    1998-01-01

    We present a VLSI digital-analog readout electronic chain for silicon microstrip detectors. The characteristics of this circuit have been optimized for the high resolution tracker of the CERN CMS experiment. This chip consists of 128 channels at 50 μm pitch. Each channel is composed by a charge amplifier, a CR-RC shaper, an analog memory, an analog processor, an output FIFO read out serially by a multiplexer. This chip has been processed in the radiation hard technology DMILL. This paper describes the architecture of the circuit and presents test results of the 128 channel full chain chip. (orig.)

  2. 3D probe array integrated with a front-end 100-channel neural recording ASIC

    Science.gov (United States)

    Cheng, Ming-Yuan; Yao, Lei; Tan, Kwan Ling; Lim, Ruiqi; Li, Peng; Chen, Weiguo

    2014-12-01

    Brain-machine interface technology can improve the lives of spinal cord injury victims and amputees. A neural interface system, consisting of a 3D probe array and a custom low-power (1 mW) 100-channel (100-ch) neural recording application-specific integrated circuit (ASIC), was designed and implemented to monitor neural activity. In this study, a microassembly 3D probe array method using a novel lead transfer technique was proposed to overcome the bonding plane mismatch encountered during orthogonal assembly. The proposed lead transfer technique can be completed using standard micromachining and packaging processes. The ASIC can be stacking-integrated with the probe array, minimizing the form factor of the assembled module. To minimize trauma to brain cells, the profile of the integrated probe array was controlled within 730 μm. The average impedance of the assembled probe was approximately 0.55 MΩ at 1 kHz. To verify the functionality of the integrated neural probe array, bench-top signal acquisitions were performed and discussed.

  3. Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gan, Bo; Wei, Tingcun; Gao, Wu; Liu, Hui; Hu, Yann [School of Computer Science and Technology, Northwestern Polytechnical University, Xi' an (China)

    2015-07-01

    Cadmium zinc telluride (CdZnTe) detectors, as one of the principal detectors for the next-generation X-ray and γ-ray imagers, have high energy resolution and supporting electrode patterning in the radiation environment at room-temperature. In the present, a number of internationally renowned research institutions and universities are actively using these detector systems to carry out researches of energy spectrum analysis, medical imaging, materials characterization, high-energy physics, nuclear plant monitoring, and astrophysics. As the most important part of the readout system for the CdZnTe detector, the front-end readout application specific integrated circuit (ASIC) would have an important impact on the performances of the whole detector system. In order to ensure the small signal to noise ratio (SNR) and sufficient range of the output signal, it is necessary to design a front-end readout ASIC with very low noise and very high dynamic range. In addition, radiation hardness should be considered when the detectors are utilized in the space applications and high energy physics experiments. In this paper, we present measurements and performances of a novel multi-channel radiation-hardness low-noise front-end readout ASIC for CdZnTe detectors. The readout circuits in each channel consist of charge sensitive amplifier, leakage current compensation circuit (LCC), CR-RC shaper, S-K filter, inverse proportional amplifier, peak detect and hold circuit (PDH), discriminator and trigger logic, time sequence control circuit and driving buffer. All of 64 readout channels' outputs enter corresponding inputs of a 64 channel multiplexer. The output of the mux goes directly out of the chip via the output buffer. The 64-channel readout ASIC is implemented using the TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 2.7 mm x 8 mm. At room temperature, the equivalent noise level of a typical channel reaches 66 e{sup -} (rms) at zero farad for a

  4. Linearity enhancement design of a 16-channel low-noise front-end readout ASIC for CdZnTe detectors

    International Nuclear Information System (INIS)

    Zeng, Huiming; Wei, Tingcun; Wang, Jia

    2017-01-01

    A 16-channel front-end readout application-specific integrated circuit (ASIC) with linearity enhancement design for cadmium zinc telluride (CdZnTe) detectors is presented in this paper. The resistors in the slow shaper are realized using a high-Z circuit to obtain constant resistance value instead of using only a metal–oxide–semiconductor (MOS) transistor, thus the shaping time of the slow shaper can be kept constant for different amounts of input energies. As a result, the linearity of conversion gain is improved significantly. The ASIC was designed and fabricated in a 0.35 µm CMOS process with a die size of 2.60 mm×3.53 mm. The tested results show that a typical channel provides an equivalent noise charge (ENC) of 109.7e − +16.3e − /pF with a power consumption of 4 mW and achieves a conversion gain of 87 mV/fC with a nonlinearity of <0.4%. The linearity of conversion gain is improved by at least 86.6% as compared with the traditional approaches using the same front-end readout architecture and manufacture process. Moreover, the inconsistency among channels is <0.3%. An energy resolution of 2.975 keV (FWHM) for gamma rays of 59.5 keV was measured by connecting the ASIC to a 5 mm×5 mm ×2 mm CdZnTe detector at room temperature. The front-end readout ASIC presented in this paper achieves an outstanding linearity performance without compromising the noise, power consumption, and chip size performances.

  5. Linearity enhancement design of a 16-channel low-noise front-end readout ASIC for CdZnTe detectors

    Energy Technology Data Exchange (ETDEWEB)

    Zeng, Huiming; Wei, Tingcun, E-mail: weitc@nwpu.edu.cn; Wang, Jia

    2017-03-01

    A 16-channel front-end readout application-specific integrated circuit (ASIC) with linearity enhancement design for cadmium zinc telluride (CdZnTe) detectors is presented in this paper. The resistors in the slow shaper are realized using a high-Z circuit to obtain constant resistance value instead of using only a metal–oxide–semiconductor (MOS) transistor, thus the shaping time of the slow shaper can be kept constant for different amounts of input energies. As a result, the linearity of conversion gain is improved significantly. The ASIC was designed and fabricated in a 0.35 µm CMOS process with a die size of 2.60 mm×3.53 mm. The tested results show that a typical channel provides an equivalent noise charge (ENC) of 109.7e{sup −}+16.3e{sup −}/pF with a power consumption of 4 mW and achieves a conversion gain of 87 mV/fC with a nonlinearity of <0.4%. The linearity of conversion gain is improved by at least 86.6% as compared with the traditional approaches using the same front-end readout architecture and manufacture process. Moreover, the inconsistency among channels is <0.3%. An energy resolution of 2.975 keV (FWHM) for gamma rays of 59.5 keV was measured by connecting the ASIC to a 5 mm×5 mm ×2 mm CdZnTe detector at room temperature. The front-end readout ASIC presented in this paper achieves an outstanding linearity performance without compromising the noise, power consumption, and chip size performances.

  6. Linearity enhancement design of a 16-channel low-noise front-end readout ASIC for CdZnTe detectors

    Science.gov (United States)

    Zeng, Huiming; Wei, Tingcun; Wang, Jia

    2017-03-01

    A 16-channel front-end readout application-specific integrated circuit (ASIC) with linearity enhancement design for cadmium zinc telluride (CdZnTe) detectors is presented in this paper. The resistors in the slow shaper are realized using a high-Z circuit to obtain constant resistance value instead of using only a metal-oxide-semiconductor (MOS) transistor, thus the shaping time of the slow shaper can be kept constant for different amounts of input energies. As a result, the linearity of conversion gain is improved significantly. The ASIC was designed and fabricated in a 0.35 μm CMOS process with a die size of 2.60 mm×3.53 mm. The tested results show that a typical channel provides an equivalent noise charge (ENC) of 109.7e-+16.3e-/pF with a power consumption of 4 mW and achieves a conversion gain of 87 mV/fC with a nonlinearity of ASIC to a 5 mm×5 mm ×2 mm CdZnTe detector at room temperature. The front-end readout ASIC presented in this paper achieves an outstanding linearity performance without compromising the noise, power consumption, and chip size performances.

  7. Performance of a 128 channel analogue front-end chip for read-out of Si strip detector modules for LHC experiments

    CERN Document Server

    Chesi, Enrico Guido; Cindro, V; Dabrowski, W; Ferrère, D; Kramberger, G; Kaplon, J; Lacasta, C; Lozano-Bahilo, J; Mikuz, M; Morone, C; Roe, S; Szczygiel, R; Tadel, M; Weilhammer, Peter; Zsenei, A

    2000-01-01

    We present a 128-channel analogue front-end chip, SCT128A-HC, for readout of silicon strip detectors employed in the inner tracking detectors of the LHC experiment. The chip is produced in the radiation hard DMILL technology. The architecture of the chip and critical design issues are discussed. The performance of the chip has been evaluated in details in the test bench and is presented in the paper. The chip is used to read out prototype analogue modules compatible in size, functionality and performance with the ATLAS SCT base line modules. Several full size detector modules equipped with SCT128A-HC chips has been built and tested successfully in the lab with beta particles as well as in the test beam. The results concerning the signal-to-noise ratio, noise occupancy, efficiency and spatial resolution are presented. The radiation hardness issues are discussed. (5 refs).

  8. A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation.

    Science.gov (United States)

    Kim, Yoon-Jee; Cho, Sung-Eun; Um, Ji-Yong; Chae, Min-Kyun; Bang, Jihoon; Song, Jongkeun; Jeon, Taeho; Kim, Byungsub; Sim, Jae-Yoon; Park, Hong-June

    2017-02-01

    A 64-channel RX digital beamformer was implemented in a single chip for 3-D ultrasound medical imaging using 2-D phased-array transducers. The RX beamformer chip includes 64 analog front-end branches including 64 non-uniform sampling ADCs, a FIFO/Adder, and an on-chip look-up table (LUT). The LUT stores the information on the rising edge timing of the non-uniform ADC sampling clocks. To include the LUT inside the beamformer chip, the LUT size was reduced by around 240 times by approximating an ADC-sample-time profile w.r.t. focal points (FP) along a scanline (SL) for a channel into a piece-wise linear form. The maximum error between the approximated and accurate sample times of ADC is eight times the sample time resolution (Ts) that is 1/32 of the ultrasound signal period in this work. The non-uniform sampling reduces the FIFO size required for digital beamforming by around 20 times. By applying a 9-dot image from Field-II program and 2-D ultrasound phantom images to the fabricated RX beamformer chip, the original images were successfully reconstructed from the measured output. The chip in a 0.13-um CMOS occupies 30.25 [Formula: see text] and consumes 605 mW.

  9. Design and characterization of a 64 channels ASIC front-end electronics for high-flux particle beam detectors

    Science.gov (United States)

    Fausti, F.; Mazza, G.; Attili, A.; Mazinani, M. Fadavi; Giordanengo, S.; Lavagno, M.; Manganaro, L.; Marchetto, F.; Monaco, V.; Sacchi, R.; Vignati, A.; Cirio, R.

    2017-09-01

    A new wide-input range 64-channels current-to-frequency converter ASIC has been developed and characterized for applications in beam monitoring of therapeutic particle beams. This chip, named TERA09, has been designed to extend the input current range, compared to the previous versions of the chip, for dealing with high-flux pulsed beams. A particular care was devoted in achieving a good conversion linearity over a wide bipolar input current range. Using a charge quantum of 200 fC, a linearity within ±2% for an input current range between 3 nA and 12 μA is obtained for individual channels, with a gain spread among the channels of about 3%. By connecting all the 64 channels of the chip to a common input, the current range can be increased 64 times preserving a linearity within ±3% in the range between and 20 μA and 750 μA.

  10. A low-power current-reuse dual-band analog front-end for multi-channel neural signal recording.

    Science.gov (United States)

    Sepehrian, H; Gosselin, B

    2014-01-01

    Thoroughly studying the brain activity of freely moving subjects requires miniature data acquisition systems to measure and wirelessly transmit neural signals in real time. In this application, it is mandatory to simultaneously record the bioelectrical activity of a large number of neurons to gain a better knowledge of brain functions. However, due to limitations in transferring the entire raw data to a remote base station, employing dedicated data reduction techniques to extract the relevant part of neural signals is critical to decrease the amount of data to transfer. In this work, we present a new dual-band neural amplifier to separate the neuronal spike signals (SPK) and the local field potential (LFP) simultaneously in the analog domain, immediately after the pre-amplification stage. By separating these two bands right after the pre-amplification stage, it is possible to process LFP and SPK separately. As a result, the required dynamic range of the entire channel, which is determined by the signal-to-noise ratio of the SPK signal of larger bandwidth, can be relaxed. In this design, a new current-reuse low-power low-noise amplifier and a new dual-band filter that separates SPK and LFP while saving capacitors and pseudo resistors. A four-channel dual-band (SPK, LFP) analog front-end capable of simultaneously separating SPK and LFP is implemented in a TSMC 0.18 μm technology. Simulation results present a total power consumption per channel of 3.1 μw for an input referred noise of 3.28 μV and a NEF for 2.07. The cutoff frequency of the LFP band is fc=280 Hz, and fL=725 Hz and fL=11.2 KHz for SPK, with 36 dB gain for LFP band 46 dB gain for SPK band.

  11. ANUSANSKAR: a 16 channel frontend electronics (FEE) ASIC targeted for silicon pixel array detector based prototype Alice FOCAL

    International Nuclear Information System (INIS)

    Mukhopadhyay, Sourav; Chandratre, V.B.; Sukhwani, Menka; Pithawa, C.K.; Singaraju, Ramnarayan; Muhuri, Sanjib; Nayak, T.; Khan, S.A.; Saini, Jogendra

    2013-01-01

    ANUSANSKAR is a 16 channel pulse processing ASIC with analog multiplexed output designed in 0.7 um standard CMOS technology with each channel consisting of CSA, Semi Gaussian pulse shaper, DC cancellation and pedestal control, track and hold, output buffer blocks. The ASIC's analog multiplexed output can be read serially in daisy-chain topology. Testing, characterization and validation of ANUSANSKAR ASIC as readout for prototype ALICE forward calorimeter (FOCAL) has been carried out in PS beam line at CERN with up to 6 GeV of pion and electron beam. This paper describes the ANUSANSKAR ASIC along with the experimental results. (author)

  12. Performance of a radiation hard 128 channel analogue front-end chip for the readout of a silicon-based hybrid photon detector

    CERN Document Server

    Lacasta, C; Dulinski, W; Chesi, Enrico Guido; Joram, C; Kaplon, J; Lozano-Bahilo, J; Séguinot, Jacques; Szczygiel, R; Weilhammer, Peter; Ypsilantis, Thomas

    2003-01-01

    The performance is described of a front-end chip, the SCT128A-LC chip, originally developed for the readout of a silicon based Hybrid Photon Detector (HPD), which is part of an RICH detector to be run in an LHC experimental environment. The relatively low signal charge from single photoelectrons, impinging on the silicon pad sensor, put very stringent requirements on the noise performance of the front-end chip. An absolute noise calibration using X-ray sources and a **2**4**1Am gamma source was performed. It is demonstrated that sufficiently good signal over noise ratio can be obtained to use this chip for the read-out of an HPD in LHC experiments.

  13. Concepts for a Muon Accelerator Front-End

    Energy Technology Data Exchange (ETDEWEB)

    Stratakis, Diktys [Fermilab; Berg, Scott [Brookhaven; Neuffer, David [Fermilab

    2017-03-16

    We present a muon capture front-end scheme for muon based applications. In this Front-End design, a proton bunch strikes a target and creates secondary pions that drift into a capture channel, decaying into muons. A series of rf cavities forms the resulting muon beams into a series of bunches of differerent energies, aligns the bunches to equal central energies, and initiates ionization cooling. We also discuss the design of a chicane system for the removal of unwanted secondary particles from the muon capture region and thus reduce activation of the machine. With the aid of numerical simulations we evaluate the performance of this Front-End scheme as well as study its sensitivity against key parameters such as the type of target, the number of rf cavities and the gas pressure of the channel.

  14. MDT-ASD, CMOS front-end for ATLAS MDT

    CERN Document Server

    Posch, C; Oliver, J

    2007-01-01

    This document serves as the main reference and user`s manual for the read-out chip of the Monitored Drift Tubes in the ATLAS Muon Spectrometer. The eight-channel front-end ASIC is referred to as MDT-ASD. The document contains the requirements and complete specifications, a detailed description of the design with characteristics of all sub-circuits and building blocks, a comprehensive section on functionality and performance test results, and a complete bibliography.

  15. Front-end data processing the SLD data acquisition system

    International Nuclear Information System (INIS)

    Nielsen, B.S.

    1986-07-01

    The data acquisition system for the SLD detector will make extensive use of parallel at the front-end level. Fastbus acquisition modules are being built with powerful processing capabilities for calibration, data reduction and further pre-processing of the large amount of analog data handled by each module. This paper describes the read-out electronics chain and data pre-processing system adapted for most of the detector channels, exemplified by the central drift chamber waveform digitization and processing system

  16. Magnet Misalignment Studies for the Front-end of the Neutrino Factory

    CERN Document Server

    Prior, G; Stratakis, D; Neuffer, D; Snopok, P; Rogers, C

    2013-01-01

    In the Neutrino Factory front-end the muon beam coming from the interaction of a high-power (4 MW) proton beam on a mercury jet target is transformed through a buncher, a phase rotator and an ionization cooling channel before entering the downstream acceleration system. The muon front-end channel is densely packed with solenoid magnets, normal conducting radio-frequency cavities and absorber windows for the cooling section. The tolerance to the misalignment of the different components has to be determined in order on one hand to set the limits beyond which the performance of the front-end channel would be degraded; on the other hand to optimize the design and assembly of the front-end cells such that the component alignment can be checked and corrected for where crucial for the performance of the channel. In this paper we show the results of some of the simulations of the frontend channel performance where the magnetic field direction has been altered compared to the baseline.

  17. FRONT-END ASIC FOR A SILICON COMPTON TELESCOPE.

    Energy Technology Data Exchange (ETDEWEB)

    DE GERONIMO,G.; FRIED, J.; FROST, E.; PHLIPS, B.; VERNON, E.; WULF, E.A.

    2007-10-27

    We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detector process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.

  18. RPC performance vs. front-end electronics

    International Nuclear Information System (INIS)

    Cardarelli, R.; Aielli, G.; Camarri, P.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Pastori, E.; Santonico, R.; Zerbini, A.

    2012-01-01

    Moving the amplification from the gas to the front-end electronics was a milestone in the development of Resistive Plate Chambers. Here we discuss the historical evolution of RPCs and we show the results obtained with newly developed front-end electronics with threshold in the fC range.

  19. CODA : Compact front-end analog ASIC for silicon detectors

    International Nuclear Information System (INIS)

    Chandratre, V.B.; Sardesai, S.V.; Kataria, S.K.

    2004-01-01

    The paper presents the design of a front-end signal processing ASIC to be used with Silicon detectors having full depletion capacitance up to 40 pf. The ASIC channel consists of a charge amplifier, a shaper amplifier (CR-RC 3 ) and a comparator. There is provision for changing gain and polarity. The circuit has an estimated power dissipation of 16 mw. The ASIC is fabricated in 1.2 um CMOS technology. The 0pf noise is ∼400e. The chip has an area of 3 by 4 mm is packaged in 48 pin CLCC and COB option (Chip on Board). (author)

  20. Front-end electronics for the ALICE calorimeters

    Science.gov (United States)

    Wang, Yaping; Ma, Ke; Muller, Hans; Cai, Xu; Zhou, Daicui; Yin, Zhongbao; Awes, Terry C.; Wang, Dong

    2010-05-01

    The ALICE calorimeters PHOS and EMCal are based on Avalanche Photo-Diode (APD) photosensors with Charge Sensitive Preamplifiers (CSP) for readout of the scintillating elements. The amplified signals are read out via 32-channel shaper/digitizer front-end electronics (FEE) with 14-bit effective dynamic range. The electronics is based on second order shapers with dual gain for each channel, getting digitized by ALTRO chips. Each APD channel is equipped with an individual 10-bit APD gain adjustment and 2×2 channel clusters generate a 100 ns shaped analog sums output (Fast OR) for the associated Trigger Region Units (TRU). The Fast OR signals are generated by first order shapers with a dynamic range of 12-bit given by the ADC in the TRU cards. Board controller firmware in the FPGA provides local monitoring and configuration of all parameters via the ALICE DCS system. The signal to noise ratio for MIP at 215 MeV is ˜7 per channel with a noise level of 30 MeV at room temperature for a dynamic range of 80 GeV for PHOS, and the fast-OR RMS noise level is about 75 MeV for a dynamic range of 250 GeV for EMCal.

  1. Front-end Electronics for the ALICE Calorimeters

    Energy Technology Data Exchange (ETDEWEB)

    Aamodt, K. [University of Oslo, Norway; Awes, Terry C [ORNL; Enokizono, Akitomo [Oak Ridge National Laboratory (ORNL); Silvermyr, David O [ORNL; Zhang, Chun [University of Tennessee, Knoxville (UTK) & Oak Ridge National Laboratory (ORNL); Young, Glenn R [ORNL; The, ALICE [Collaboration affiliations

    2010-05-01

    The ALICE calorimeters PHOS and EMCal are based on Avalanche Photo-Diode (APD) photosensors with Charge Sensitive Preamplifiers (CSP) for readout of the scintillating elements. The amplified signals are read out via 32-channel shaper/digitizer front-end electronics (FEE) with 14-bit effective dynamic range. The electronics is based on second order shapers with dual gain for each channel, getting digitized by ALTRO chips. Each APD channel is equipped with an individual 10-bit APD gain adjustment and 2 x 2 channel clusters generate a 100 ns shaped analog sums output (Fast OR) for the associated Trigger Region Units (TRU). The Fast OR signals are generated by first order shapers with a dynamic range of 12-bit given by the ADC in the TRU cards. Board controller firmware in the FPGA provides local monitoring and configuration of all parameters via the ALICE DCS system. The signal to noise ratio for MIP at 215 MeV is {approx}7 per channel with a noise level of 30 MeV at room temperature for a dynamic range of 80 GeV for PHOS, and the fast-OR RMS noise level is about 75 MeV for a dynamic range of 250 GeV for EMCal.

  2. Front-end electronics for the ALICE calorimeters

    CERN Document Server

    Wang, Ya-Ping; Muller, Hans; Cai, Xu; Zhou, Daicui; Yin, Zhong-Bao; Awes, Terry C.; Wang, Dong

    2010-01-01

    The ALICE calorimeters PHOS and EMCal are based on Avalanche Photo-Diode (APD) photosensors with Charge Sensitive Preamplifiers (CSP) for readout of the scintillating elements. The amplified signals are read out via 32-channel shaper/digitizer front-end electronics (FEE) with 14-bit effective dynamic range. The electronics is based on second order shapers with dual gain for each channel, getting digitized by ALTRO chips. Each APD channel is equipped with an individual 10-bit APD gain adjustment and 2×2 channel clusters generate a 100 ns shaped analog sums output (Fast OR) for the associated Trigger Region Units (TRU). The Fast OR signals are generated by first order shapers with a dynamic range of 12-bit given by the ADC in the TRU cards. Board controller firmware in the FPGA provides local monitoring and configuration of all parameters via the ALICE DCS system. The signal to noise ratio for MIP at 215 MeV is not, vert, similar7 per channel with a noise level of 30 MeV at room temperature for a dynamic range...

  3. Front-end electronics for the ALICE calorimeters

    Energy Technology Data Exchange (ETDEWEB)

    Wang Yaping, E-mail: wangyaping@mail.ccnu.edu.c [Key Laboratory of Quark and Lepton Physics (Huazhong Normal University, CCNU), Ministry of Education, Wuhan 43079 (China); Institute of Particle Physics, Huazhong Normal University, Wuhan 430079 (China); Ma Ke [Institute of Particle Physics, Huazhong Normal University, Wuhan 430079 (China); Huazhong University of Science and Technology, Wuhan 430079 (China); Muller, Hans [CERN, PH-AID-DT, 1211 Geneva 23 (Switzerland); Cai Xu; Zhou Daicui; Yin Zhongbao [Key Laboratory of Quark and Lepton Physics (Huazhong Normal University, CCNU), Ministry of Education, Wuhan 43079 (China); Institute of Particle Physics, Huazhong Normal University, Wuhan 430079 (China); Awes, Terry C. [Oak Ridge National Laboratory, Oak Ridge, TN 37831 (United States); Wang Dong [Key Laboratory of Quark and Lepton Physics (Huazhong Normal University, CCNU), Ministry of Education, Wuhan 43079 (China); Institute of Particle Physics, Huazhong Normal University, Wuhan 430079 (China)

    2010-05-21

    The ALICE calorimeters PHOS and EMCal are based on Avalanche Photo-Diode (APD) photosensors with Charge Sensitive Preamplifiers (CSP) for readout of the scintillating elements. The amplified signals are read out via 32-channel shaper/digitizer front-end electronics (FEE) with 14-bit effective dynamic range. The electronics is based on second order shapers with dual gain for each channel, getting digitized by ALTRO chips. Each APD channel is equipped with an individual 10-bit APD gain adjustment and 2x2 channel clusters generate a 100 ns shaped analog sums output (Fast OR) for the associated Trigger Region Units (TRU). The Fast OR signals are generated by first order shapers with a dynamic range of 12-bit given by the ADC in the TRU cards. Board controller firmware in the FPGA provides local monitoring and configuration of all parameters via the ALICE DCS system. The signal to noise ratio for MIP at 215 MeV is {approx}7 per channel with a noise level of 30 MeV at room temperature for a dynamic range of 80 GeV for PHOS, and the fast-OR RMS noise level is about 75 MeV for a dynamic range of 250 GeV for EMCal.

  4. Simulation of frontend preamplifiers for the MSGC

    International Nuclear Information System (INIS)

    Schmitz, J.

    1993-01-01

    Two candidate architectures for frontend preamplifiers for the Microstrip Gas Counter are tested using a Monte Carlo simulation of the detector and frontend. The simulation describes ionisation in the gas, electron drift and diffusion, gas amplification, signal development and the discriminator. The first architecture is based on the current design of the Fastplex, while the alternative design uses a subtraction method. The simulations indicate that the current Fastplex-design matches the MSGC best when the shaping time is as high as possible (around 50 ns). The signal is extracted more accurately with the alternative design. (orig.)

  5. Design of analog front-ends for the RD53 demonstrator chip

    CERN Document Server

    Gaioni, L; Nodari, B; Manghisoni, M; Re, V; Traversi, G; Barbero, M B; Fougeron, D; Gensolen, F; Godiot, S; Menouni, M; Pangaud, P; Rozanov, A; Wang, A; Bomben, M; Calderini, G; Crescioli, F; Le Dortz, O; Marchiori, G; Dzahini, D; Rarbi, F E; Gaglione, R; Gonella, L; Hemperek, T; Huegging, F; Karagounis, M; Kishishita, T; Krueger, H; Rymaszewski, P; Wermes, N; Ciciriello, F; Corsi, F; Marzocca, C; De Robertis, G; Loddo, F; Licciulli, F; Andreazza, A; Liberali, V; Shojaii, S; Stabile, A; Bagatin, M; Bisello, D; Mattiazzo, S; Ding, L; Gerardin, S; Giubilato, P; Neviani, A; Paccagnella, A; Vogrig, D; Wyss, J; Bacchetta, N; Della Casa, G; Demaria, N; Mazza, G; Rivetti, A; Da Rocha Rolo, M D; Comotti, D; Ratti, L; Vacchi, C; Beccherle, R; Bellazzini, R; Magazzu, G; Minuti, M; Morsani, F; Palla, F; Poulios, S; Fanucci, L; Rizzi, A; Saponara, S; Androsov, K; Bilei, G M; Menichelli, M; Conti, E; Marconi, S; Passeri, D; Placidi, P; Monteil, E; Pacher, L; Paternò, A; Gajanana, D; Gromov, V; Hessey, N; Kluit, R; Zivkovic, V; Havranek, M; Janoska, Z; Marcisovsky, M; Neue, G; Tomasek, L; Kafka, V; Sicho, P; Vrba, V; Vila, I; Lopez-Morillo, E; Aguirre, M A; Palomo, F R; Muñoz, F; Abbaneo, D; Christiansen, J; Dannheim, D; Dobos, D; Linssen, L; Pernegger, H; Valerio, P; Alipour Tehrani, N; Bell, S; Prydderch, M L; Thomas, S; Christian, D C; Fahim, F; Hoff, J; Lipton, R; Liu, T; Zimmerman, T; Garcia-Sciveres, M; Gnani, D; Mekkaoui, A; Gorelov, I; Hoeferkamp, M; Seidel, S; Toms, K; De Witt, J N; Grillo, A

    2017-01-01

    The RD53 collaboration is developing a large scale pixel front-end chip, which will be a tool to evaluate the performance of 65 nm CMOS technology in view of its application to the readout of the innermost detector layers of ATLAS and CMS at the HL-LHC. Experimental results of the characterization of small prototypes will be discussed in the frame of the design work that is currently leading to the development of the large scale demonstrator chip RD53A to be submitted in early 2017. The paper is focused on the analog processors developed in the framework of the RD53 collaboration, including three time over threshold front-ends, designed by INFN Torino and Pavia, University of Bergamo and LBNL and a zero dead time front-end based on flash ADC designed by a joint collaboration between the Fermilab and INFN. The paper will also discuss the radiation tolerance features of the front-end channels, which were exposed to up to 800 Mrad of total ionizing dose to reproduce the system operation in the actual experiment.

  6. Front-end conceptual platform modeling

    DEFF Research Database (Denmark)

    Guðlaugsson, Tómas Vignir; Ravn, Poul Martin; Mortensen, Niels Henrik

    2014-01-01

    Platform thinking has been the subject of investigation and deployment in many projects in both academia and industry. Most contributions involve the restructuring of product programs, and only a few support front-end development of a new platform in parallel with technology development. This con......Platform thinking has been the subject of investigation and deployment in many projects in both academia and industry. Most contributions involve the restructuring of product programs, and only a few support front-end development of a new platform in parallel with technology development....... The conclusion is that the Conceptual Product Platform model supports stakeholders in achieving an overview of the development tasks and communicating these across multidisciplinary development teams, as well as making decisions on the contents of the platform and providing a link between technical solutions...

  7. Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays

    OpenAIRE

    Çiçek, İhsan; Cicek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

    2005-01-01

    Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMU...

  8. Hardware Architecture of Polyphase Filter Banks Performing Embedded Resampling for Software-Defined Radio Front-Ends

    DEFF Research Database (Denmark)

    Awan, Mehmood-Ur-Rehman; Le Moullec, Yannick; Koch, Peter

    2012-01-01

    In this paper, we describe resource-efficient hardware architectures for software-defined radio (SDR) front-ends. These architectures are made efficient by using a polyphase channelizer that performs arbitrary sample rate changes, frequency selection, and bandwidth control. We discuss area, time...... for maximally decimated, under-decimated, over-decimated, and combined up- and down-sampled scenarios is used as a case study, and an analysis of area, time, and power for their FPGA architectures is given. For resource-optimized SDR front-ends, RA is superior for reducing operating clock rates and dynamic...

  9. Parameters-adjustable front-end controller in digital nuclear measurement system

    International Nuclear Information System (INIS)

    Hao Dejian; Zhang Ruanyu; Yan Yangyang; Wang Peng; Tang Changjian

    2013-01-01

    Background: One digitizer is used to implement a digital nuclear measurement for the acquisition of nuclear information. Purpose: A principle and method of a parameter-adjustable front-end controller is presented for the sake of reducing the quantitative errors while getting the maximum ENOB (effective number of bits) of ADC (analog-to-digital converter) during waveform digitizing, as well as reducing the losing counts. Methods: First of all, the quantitative relationship among the radiation count rate (n), the amplitude of input signal (V in ), the conversion scale of ADC (±V) and the amplification factor (A) was derived. Secondly, the hardware and software of the front-end controller were designed to fulfill matching the output of different detectors, adjusting the amplification linearly through the control of channel switching, and setting of digital potentiometer by CPLD (Complex Programmable Logic Device). Results: (1) Through the measurement of γ-ray of Am-241 under our digital nuclear measurement set-up with CZT detector, it was validated that the amplitude of output signal of detectors of RC feedback type could be amplified linearly with adjustable amplification by the front-end controller. (2) Through the measurement of X-ray spectrum of Fe-5.5 under our digital nuclear measurement set-up with Si-PIN detector, it was validated that the front-end controller was suitable for the switch resetting type detectors, by which high precision measurement under various count rates could be fulfilled. Conclusion: The principle and method of the parameter-adjustable front-end controller presented in this paper is correct and feasible. (authors)

  10. Digital front-end electronics for COMPASS Muon-Wall 1 detector

    International Nuclear Information System (INIS)

    Alekseev, G.D.; Zhuravlev, N.I.; Maggiora, A.

    2005-01-01

    The digital front-end electronics for the COMPASS Muon-Wall 1 (CERN) detector is described. The digital card has been designed on the basis of the TDC chip F1. One card includes 6 F1 chips (192 channels), bus arbiter, DAC, power supply distribution, hot-link interface. The total number of the digital cards in the system is 44 housed in 5 euro-crates (6U), the total number of readout channels is 8448. The electronics has been designed by the Dzhelepov Laboratory of Nuclear Problems (JINR) and INFN (Torino, Italy) experts

  11. LHCb: Test Station for the LHCb Muon Front-End Electronic

    CERN Multimedia

    Polycarpo, E

    2005-01-01

    The LHCb Muon Group has developed the CMOS ASIC CARIOCA to readout its Multiwire Proportional Chambers (MWPC) and GEM detectors, using a rad-hard IBM 0.25um process. Each ASIC holds 8 identical current-mode ASDB channels with individual input thresholds. The Muon detector contains around 120000 physical channels, requiring production of 20000 front-end chips, roughly. CARIOCA has been developed to process MWPC cathode and anode signals and two different versions have been implemented to overcome the requirement of MWP and GEM chambers operation. The test station has been devised to accomplish bipolar tests and to measure characteristics of both CARIOCA versions.

  12. Noise Susceptibility Measurements of Front-End Electronics Systems

    CERN Document Server

    Allongue, B; Blanchot, G; Faccio, F; Fuentes, C; Michelis, S; Orlandi, S; Toro, A

    2008-01-01

    The conducted and radiated noise that is emitted by a power supply constrains the noise performance of the frontend electronics system that it powers. The characterization of the noise susceptibility of the front-end electronics allows setting proper requirements for the back-end power supply in order to achieve the expected system performance. A method to measure the common mode current susceptibility using current probes is presented. The compatibility between power supplies and various front-end systems is explored.

  13. MMIC front-ends for optical communication systems

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad

    1993-01-01

    Two different types of optical front-end MMIC amplifiers for a 2.5-Gb/s coherent heterodyne optical receiver are presented. A bandwidth of 6-12 GHz has been obtained for a tuned front-end and 3-13 GHz for a distributed front-end. An input noise current density of 5-15 pA/√Hz has been obtained for...

  14. The front-end electronics for LHCb calorimeters

    CERN Document Server

    Breton, D

    2002-01-01

    For the readout of the calorimeters of the LHCb experiment at CERN, specific front-end electronics have been designed. In particular, three different front-end analog chips were studied respectively for the ECAL/HCAL, preshower and scintillator pad detector. We will present the three front-end electronic chains, point out their specific requirements together with their common purpose, and describe the corresponding ASICs. (6 refs).

  15. The DIALOG Chip in the Front-End Electronics of the LHCb Muon Detector

    CERN Document Server

    Cadeddu, S; Lai, A

    2004-01-01

    We present a custom integrated circuit, named DIALOG, which is a fundamental building block in the front-end architecture of the LHCb Muon detector. DIALOG is realized in IBM 0.25 um technology, using radiation hardening layout techniques. DIALOG integrates important tools for detector time alignment procedures and time alignment monitoring on the front- end system. In particular, it integrates 16 programmable delays, which can be regulated in steps of 1 ns. Many other features, necessary for the Muon trigger operation and for a safe front-end monitoring are integrated: DIALOG generates the information used by the trigger as a combination of its 16 inputs from the Amplifier-Shaper-Discriminator (ASD) chips, it generates the thresholds of the ASD, it monitors the rate of all its input channels. We describe the circuit architecture, its internal blocks and its main modes of operation.

  16. System front-end design for concurrent acquisition of electroencephalograms and EIT data

    Science.gov (United States)

    Guardo, R.; Jehanne-Lacasse, J.; Moumbe, A. P.; Gagnon, H.

    2010-04-01

    There is recently considerable interest in medical imaging to combine recording of bioelectrical signals with imaging procedures. For example, electroencephalograms (EEGs) recorded during functional magnetic resonance imaging are increasingly being used for neurological and behavioural research. Concurrent acquisition of EEGs and electrical impedance tomography (EIT) data have been suggested as a non invasive technique that could help localize the area of the brain responsible for seizures in epileptic patients awaiting resective surgery. Despite reasonably distinct spectra, EEGs and EIT signals are difficult to record simultaneously because of their very different amplitudes. In this paper, we describe the front-end of a 24-channel system designed to acquire both signals from the same set of scalp electrodes using time-division multiplexing. We have developped a 10-layer 20×15 cm printed circuit board of the front-end and are currently performing circuit characterization tests. System performance parameters and in vivo images will be presented at the conference.

  17. A front-end electronics module for the PHENIX pad chamber

    International Nuclear Information System (INIS)

    Smith, M.C.; Bryan, W.L.; Smith, D.

    1999-01-01

    The Pad Chamber (PC) is part of the Tracking System of the PHENIX detector at the RHIC accelerator of Brookhaven National Laboratory. A front-end electronics module (FEM) has been developed for the PHENIX Pad Chamber. The module's control functions are performed by the heap manager unit, an FPGE-based circuit on the FEM. Each FEM processes signals from 2,160 channels of front-end electronics (FEE). Data readout and formatting are performed by an additional FPGA-based circuit of the FEM. Three external systems provide initialization, timing, and data information via serial interfaces. This paper discusses the application of the heap manager, data formatter, and serial interfaces to meet the specific control and data readout needs of the Pad Chamber subsystem. Unit functions, interfaces, timing, data format, and communication rates will be discussed. In addition, subsystem issues regarding mode control, serial architecture and functions, error handling and FPGA/Implementation and programming will be presented

  18. Front-end module readout and control electronics for the PHENIX Multiplicity Vertex Detector

    International Nuclear Information System (INIS)

    Ericson, M.N.; Allen, M.D.; Boissevain, J.

    1997-11-01

    Front-end module (FEM) readout and control are implemented as modular, high-density, reprogrammable functions in the PHENIX Multiplicity Vertex Detector. FEM control is performed by the heap manager, an FPGA-based circuit in the FEM unit. Each FEM has 256 channels of front-end electronics, readout, and control, all located on an MCM. Data readout, formatting, and control are performed by the heap manager along with 4 interface units that reside outside the MVD detector cylinder. This paper discusses the application of a generic heap manager and the addition of 4 interface module types to meet the specific control and data readout needs of the MVD. Unit functioning, interfaces, timing, data format, and communication rates will be discussed in detail. In addition, subsystem issues regarding mode control, serial architecture and functions, error handling, and FPGA implementation and programming will be presented

  19. UWB front-end for SAR-based imaging system

    NARCIS (Netherlands)

    Monni, S.; Grooters, R.; Neto, A.; Nennie, F.A.

    2010-01-01

    A planarly fed UWB leaky lens antenna is presented integrated with wide band transmit and receive front-end electronics, to be used in a SAR-based imaging system. The unique non-dispersive characteristics of this antenna over a very wide bandwidth, together with the dual band front-end electronics

  20. Petiroc and Citiroc: front-end ASICs for SiPM read-out and ToF applications

    International Nuclear Information System (INIS)

    Fleury, J; Ahmad, S; Callier, S; Taille, C de La; Seguin, N; Thienpont, D; Dulucq, F; Martin, G

    2014-01-01

    Petiroc and Citiroc are the two latest ASIC from Weeroc dedicated to SiPM read-out. Petiroc is a 16-channel front-end ASIC designed to readout silicon photomultipliers (SiPMs) for particle time-of-flight measurement applications. It combines a very fast and low-jitter trigger with an accurate charge measurement. Citiroc is a 32-channel front-end ASIC designed to readout silicon photo-multipliers (SiPM). It allows triggering down to 1/3 pe and provides the charge measurement with a good noise rejection. Moreover, Citiroc outputs the 32-channel triggers with a high accuracy (100 ps). Each channel of both ASICs combines a trigger path with an accurate charge measurement path. An adjustment of the SiPM high voltage is possible using a channel-by-channel input DAC. That allows a fine SiPM gain and dark noise adjustment at the system level to correct for the non-uniformity of SiPMs. Timing measurement down to 16 ps RMS jitter for Petiroc and 100 ps RMS for Citiroc is possible along with 1% linearity energy measurement up to 2500 pe. The power consumption is around 3.5 mW/channel for Petiroc and 3 mW/channel for Citiroc, excluding ASICs outing buffer

  1. Toward 5G software defined radio receiver front-ends

    CERN Document Server

    Spiridon, Silvian

    2016-01-01

    This book introduces a new intuitive design methodology for the optimal design path for next-generation software defined radio front-ends (SDRXs). The methodology described empowers designers to "attack" the multi-standard environment in a parallel way rather than serially, providing a critical tool for any design methodology targeting 5G circuits and systems. Throughout the book the SDRX design follows the key wireless standards of the moment (i.e., GSM, WCDMA, LTE, Bluetooth, WLAN), since a receiver compatible with these standards is the most likely candidate for the first design iteration in a 5G deployment. The author explains the fundamental choice the designer has to make regarding the optimal channel selection: how much of the blockers/interferers will be filtered in the analog domain and how much will remain to be filtered in the digital domain. The system-level analysis the author describes entails the direct sampling architecture is treated as a particular case of mixer-based direct conversion archi...

  2. Miniaturized ultrasound imaging probes enabled by CMUT arrays with integrated frontend electronic circuits.

    Science.gov (United States)

    Khuri-Yakub, B T; Oralkan, Omer; Nikoozadeh, Amin; Wygant, Ira O; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O'Donnell, Matthew; Truong, Uyen; Sahn, David J

    2010-01-01

    Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics.

  3. A new wire chamber front-end system, based on the ASD-8 B chip

    Energy Technology Data Exchange (ETDEWEB)

    Kruesemann, B.A.M. E-mail: kruesemann@kvi.nl; Bassini, R.; Ellinghaus, F.; Frekers, D.; Hagemann, M.; Hannen, V.M.; Heynitz, H. von; Heyse, J.; Rakers, S.; Sohlbach, H.; Woertche, H.J

    1999-07-11

    The Focal-Plane Polarimeter (FPP) for the Big-Bite Spectrometer van den Berg (Nucl. Instr. and Meth. B 99 (1995) 637ff) at the KVI requires the read-out of four large-area MWPCs and two VDCs with 3872 wires in total. The EUROSUPERNOVA collaboration (SNOVA) developed a digital 16 channel preamplifier front-end board, housing two amplifier-shaper-discriminatorchips ASD-8 B. The main features of this board are a fast single-wire readout, a high integration density, a low power consumption and compatibility to common instrumentation standards. The board represents the first successfully running application of the ASD-8 for wire chamber readout. (author)

  4. Development of ATLAS Liquid Argon Calorimeter Front-end Electronics for the HL-LHC

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00219286; The ATLAS collaboration

    2016-01-01

    The high-luminosity phase of the Large Hadron Collider will provide 5-7 times greater luminosities than assumed in the original detector design. An improved trigger system requires an upgrade of the readout electronics of the ATLAS Liquid Argon Calorimeter. Concepts for the future readout of the 182,500 calorimeter channels at 40-80 MHz and 16-bit dynamic range and the developments of radiation-tolerant, low-noise, low-power, and high-bandwidth front-end electronic components, including preamplifiers and shapers, 14-bit ADCs, and 10-Gb/s laser diode array drivers, are presented.

  5. FATALIC: A Dedicated Front-End ASIC for the ATLAS TileCal Upgrade

    CERN Document Server

    Royer, Laurent; The ATLAS collaboration

    2015-01-01

    A front-end ASIC (FATALIC) has been developed to fulfil the requirements of the Phase 2 upgrade of the ATLAS Tile Calorimeter. This electronics performs the complete processing of the signal delivered by each PM tube. The first stage is a current conveyor which splits the 17-bit dynamic range of the input signal into three ranges. Each channel is followed by a shaper and a dedicated pipeline 12-bit ADC operating at 40MHz. The chip is developed using a 130nm CMOS technology. Measurements show a linearity better than 0.5% for low energy particles, and an ENC limited to 10 fC.

  6. A new wire chamber front-end system, based on the ASD-8 B chip

    CERN Document Server

    Kruesemann, B A M; Ellinghaus, F; Frekers, D; Hagemann, M; Hannen, V M; Heynitz, H V; Heyse, J; Rakers, S; Sohlbach, H; Wörtche, H J

    1999-01-01

    The Focal-Plane Polarimeter (FPP) for the Big-Bite Spectrometer van den Berg (Nucl. Instr. and Meth. B 99 (1995) 637ff) at the KVI requires the read-out of four large-area MWPCs and two VDCs with 3872 wires in total. The EUROSUPERNOVA collaboration (SNOVA) developed a digital 16 channel preamplifier front-end board, housing two amplifier-shaper-discriminatorchips ASD-8 B. The main features of this board are a fast single-wire readout, a high integration density, a low power consumption and compatibility to common instrumentation standards. The board represents the first successfully running application of the ASD-8 for wire chamber readout. (author)

  7. Polyphase Filter Banks for Embedded Sample Rate Changes in Digital Radio Front-Ends

    DEFF Research Database (Denmark)

    Awan, Mehmood-Ur-Rehman; Le Moullec, Yannick; Koch, Peter

    2011-01-01

    This paper presents efficient processing engines for software-defined radio (SDR) front-ends. These engines, based on a polyphase channelizer, perform arbitrary sample-rate changes, frequency selection, and bandwidth control. This paper presents an M-path polyphase filter bank based on a modified N....... A non-maximally-decimated polyphase filter bank (where the number of data loads is not equal to the number of M subfilters) processes M subfilters in a time period that is less than or greater than the M data loads. A polyphase filter bank with five different resampling modes is used as a case study...

  8. Dedicated front-end and readout electronics developments for real time 3D directional detection of dark matter with MIMAC

    OpenAIRE

    Bourrion, O.; Bosson, G.; Grignon, C.; Richer, J. P.; Guillaudin, O.; Mayet, F.; Billard, J.; Santos, D.

    2011-01-01

    A complete dedicated electronics, from front-end to back-end, was developed to instrument a MIMAC prototype. A front end ASIC able to monitor 64 strips of pixels and to provide their individual "Time Over Threshold" information has been designed. An associated acquisition electronics and a real time track reconstruction software have been developed to monitor a 512 channel prototype. This auto-triggered electronic uses embedded processing to reduce the data transfer to its useful part only, i...

  9. Adaptive RF front-ends for hand-held applications

    CERN Document Server

    van Bezooijen, Andre; van Roermund, Arthur

    2010-01-01

    The RF front-end - antenna combination is a vital part of a mobile phone because its performance is very relevant to the link quality between hand-set and cellular network base-stations. The RF front-end performance suffers from changes in operating environment, like hand-effects, that are often unpredictable. ""Adaptive RF Front-Ends for Hand-Held Applications"" presents an analysis on the impact of fluctuating environmental parameters. In order to overcome undesired behavior two different adaptive control methods are treated that make RF frond-ends more resilient: adaptive impedance control,

  10. 40 CFR 63.492 - Batch front-end process vents-reporting requirements.

    Science.gov (United States)

    2010-07-01

    ... recorded under § 63.491(e)(3) when the batch front-end process vent is diverted away from the control... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents-reporting... Batch front-end process vents—reporting requirements. (a) The owner or operator of a batch front-end...

  11. Indico front-end: From spaghetti to lasagna

    CERN Multimedia

    CERN. Geneva

    2017-01-01

    We will present how we transitioned from legacy spaghetti UI code to a more coherent, easier to understand and maintain ecosystem of front-end technologies and facilities with a strong emphasis in reusable components. In particular, we will share with you: 1) how we use Sass to maintain our home-baked CSS, 2) how we survive in 2017 without front-end Javascript frameworks, and 3) how we use template macros and WTForms for generating consistent HTML transparently.

  12. Development of a dedicated front-end electronics for straw tube trackers in the bar PANDA experiment

    Science.gov (United States)

    Przyborowski, D.; Fiutowski, T.; Idzik, M.; Kajetanowicz, M.; Korcyl, G.; Salabura, P.; Smyrski, J.; Strzempek, P.; Swientek, K.; Terlecki, P.; Tokarz, J.

    2016-08-01

    The design and tests of front-end electronics for straw tube trackers in the bar PANDA experiment at FAIR are presented. The challenges for the front-end electronics, comprising operation at high counting rate up to 1 MHz per straw tube, are discussed and the proposed architecture comprising a switched gain charge sensitive preamplifier (CSP), a pole-zero cancellation circuit (PZC), a second order variable peaking time shaper, a trimming ion tail cancellation circuit, and a baseline holder (BLH), is described. The front-end provides an analogue output and a discriminator with LVDS differential driver for the Time-of-Arrival (ToA) and Time-over-Threshold (ToT) measurements. A prototype readout ASIC featuring four channels was fabricated in 0.35 μm CMOS technology consuming 15.5 mW (analog part) and 12 mW (LVDS) per channel. The results of measurements of peaking time (25-67 ns), gain, noise (ENC 800-2500 el. for various gains), time walk and jitter are presented as well as the first results obtained with prototype straw tubes connected.

  13. LTCC-Based Highly Integrated Millimeter-Wave Receiver Front-End Module

    Science.gov (United States)

    Xia, Lei; Xu, Ruimin; Yan, Bo

    2006-07-01

    This paper presents the design and fabrication of a highly integrated Low Temperature Co-fired Ceramic (LTCC) receiver front-end module. This LTCC module is a dual channel receiver module, works at Ka-band, and fabricated including six Ferro A6M dielectric layers and five metal layers, contains eight embedded resistors and eight MMICs. All MMICs are mounted into pre-making cavities on the top surface of the LTCC substrate. Three slot coupled waveguide-to-microstrip transitions are integrated at LTCC substrate to realize RF and LO signal input. The developed module is highly integrated and reliable, which has a compact size of 58 × 50 × 22 mm3 (including the metal cavity). Each channel of the receiver has the noise figure of less than 9 dB and the gain of more than 24 dB at Ka-band.

  14. A Novel Front-End ASIC With Post Digital Filtering and Calibration for CZT-Based PET Detector

    International Nuclear Information System (INIS)

    Gao, W.; Yin, J.; Li, C.; Zeng, H.; Gao, D.; Hu, Y.

    2015-01-01

    This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by a FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e - to 100000 e - , which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)

  15. Toward Realization of 2.4 GHz Balunless Narrowband Receiver Front-End for Short Range Wireless Applications

    Directory of Open Access Journals (Sweden)

    Munir M. El-Desouki

    2015-05-01

    Full Text Available The demand for radio frequency (RF transceivers operating at 2.4 GHz band has attracted considerable research interest due to the advancement in short range wireless technologies. The performance of RF transceivers depends heavily on the transmitter and receiver front-ends. The receiver front-end is comprised of a low-noise amplifier (LNA and a downconversion mixer. There are very few designs that focus on connecting the single-ended output LNA to a double-balanced mixer without the use of on-chip transformer, also known as a balun. The objective of designing such a receiver front-end is to achieve high integration and low power consumption. To meet these requirements, we present the design of fully-integrated 2.4 GHz receiver front-end, consisting of a narrow-band LNA and a double balanced mixer without using a balun. Here, the single-ended RF output signal of the LNA is translated into differential signal using an NMOS-PMOS (n-channel metal-oxide-semiconductor, p-channel metal-oxide-semiconductor transistor differential pair instead of the conventional NMOS-NMOS transistor configuration, for the RF amplification stage of the double-balanced mixer. The proposed receiver circuit fabricated using TSMC 0.18 µm CMOS technology operates at 2.4 GHz and produces an output signal at 300 MHz. The fabricated receiver achieves a gain of 16.3 dB and consumes only 6.74 mW operating at 1.5 V, while utilizing 2.08 mm2 of chip area. Measurement results demonstrate the effectiveness and suitability of the proposed receiver for short-range wireless applications, such as in wireless sensor network (WSN.

  16. Toward Realization of 2.4 GHz Balunless Narrowband Receiver Front-End for Short Range Wireless Applications.

    Science.gov (United States)

    El-Desouki, Munir M; Qasim, Syed Manzoor; BenSaleh, Mohammed S; Deen, M Jamal

    2015-05-07

    The demand for radio frequency (RF) transceivers operating at 2.4 GHz band has attracted considerable research interest due to the advancement in short range wireless technologies. The performance of RF transceivers depends heavily on the transmitter and receiver front-ends. The receiver front-end is comprised of a low-noise amplifier (LNA) and a downconversion mixer. There are very few designs that focus on connecting the single-ended output LNA to a double-balanced mixer without the use of on-chip transformer, also known as a balun. The objective of designing such a receiver front-end is to achieve high integration and low power consumption. To meet these requirements, we present the design of fully-integrated 2.4 GHz receiver front-end, consisting of a narrow-band LNA and a double balanced mixer without using a balun. Here, the single-ended RF output signal of the LNA is translated into differential signal using an NMOS-PMOS (n-channel metal-oxide-semiconductor, p-channel metal-oxide-semiconductor) transistor differential pair instead of the conventional NMOS-NMOS transistor configuration, for the RF amplification stage of the double-balanced mixer. The proposed receiver circuit fabricated using TSMC 0.18 µm CMOS technology operates at 2.4 GHz and produces an output signal at 300 MHz. The fabricated receiver achieves a gain of 16.3 dB and consumes only 6.74 mW operating at 1.5 V, while utilizing 2.08 mm2 of chip area. Measurement results demonstrate the effectiveness and suitability of the proposed receiver for short-range wireless applications, such as in wireless sensor network (WSN).

  17. Tunable multiband ferroelectric devices for reconfigurable RF-frontends

    CERN Document Server

    Zheng, Yuliang

    2013-01-01

    Reconfigurable RF-frontends aim to cope with the continuous pursuit of wider frequency coverage, higher efficiency, further compactness and lower cost of ownership. They are expected to lay the foundations of future software defined or cognitive radios. As a potential enabling technology for the frontends, the tunable ferroelectric devices have shown not only enhanced performance but also new functionalities. This book explores the recent developments in the field. It provides a cross-sectional perspective on the interdisciplinary research. With attention to the devices based on ceramic thick-films and crystal thin-films, the book reviews the adapted technologies of material synthesis, film deposition and multilayer circuitry. Next, it highlights the original classes of thin-film ferroelectric devices, including stratified metal-insulator-metal varactors with suppression of acoustic resonance and programmable bi-stable high frequency capacitors. At the end the book analyzes how the frontends can be reformed b...

  18. The STS-XYTER ASIC. A dedicated front-end chip for the CBM silicon tracking system

    Energy Technology Data Exchange (ETDEWEB)

    Sorokin, Iurii [GSI Helmholtzzentrum fuer Schwerionenforschung GmbH, Darmstadt (Germany); Kiev Institute for Nuclear Research, Kiev (Ukraine); Krzysztof, Krzysztof; Kleczek, Rafal; Otfinowski, Piotr; Szczygiel, Robert [AGH University of Science and Technology, Cracow (Poland); Kleipa, Volker [GSI Helmholtzzentrum fuer Schwerionenforschung GmbH, Darmstadt (Germany); Collaboration: CBM-Collaboration

    2015-07-01

    The STS-XYTER is a 128-channel charge-sensitive front-end chip, designed specifically for the Silicon Tracking System of the CBM experiment. The chip features a self-triggering architecture, which enables it to measure the signal amplitude and the time of arrival in each input channel autonomously, as soon as the signal in the given channel exceeds a predefined threshold. The design time resolution is about 10 ns, the dynamic range is 15 fC, and the amplitude is digitized with an integrated 5-bit flash ADC. Two shapers with distinct rise times are used to achieve low rate of noise hits in combination with the good time resolution, and low power consumption (6 mW/channel). The characterization of chips samples is ongoing. An overview of the chip architecture as well as the operation principle is given.

  19. Design of low noise front-end ASIC and DAQ system for CdZnTe detector

    International Nuclear Information System (INIS)

    Luo Jie; Deng Zhi; Liu Yinong

    2012-01-01

    A low noise front-end ASIC has been designed for CdZnTe detector. This chip contains 16 channels and each channel consists of a dual-stage charge sensitive preamplifier, 4th order semi-Gaussian shaper, leakage current compensation (LCC) circuit, discriminator and output buffer. This chip has been fabricated in Chartered 0.35 μm CMOS process, the preliminary results show that it works well. The total channel charge gain can be adjusted from 100 mV/fC to 400 mV/fC and the peaking time can be adjusted from 1 μs to 4 μs. The minimum measured ENC at zero input capacitance is 70 e and minimum noise slope is 20 e/pF. The peak detector and derandomizer (PDD) ASIC developed by BNL and an associated USB DAQ board are also introduced in this paper. Two front-end ASICs can be connected to the PDD ASIC on the USB DAQ board and compose a 32 channels DAQ system for CdZnTe detector. (authors)

  20. Planar millimeter wave radar frontend for automotive applications

    Directory of Open Access Journals (Sweden)

    J. Grubert

    2003-01-01

    Full Text Available A fully integrated planar sensor for 77 GHz automotive applications is presented. The frontend consists of a transceiver multichip module and an electronically steerable microstrip patch array. The antenna feed network is based on a modified Rotman-lens and connected to the array in a multilayer approach offering higher integration. Furthermore, the frontend comprises a phase lock loop to allow proper frequency-modulated continuous wave (FMCW radar operation. The latest experimental results verify the functionality of this advanced frontend design featuring automatic cruise control, precrash sensing and cut-in detection. These promising radar measurements give reason to a detailed theoretical investigation of system performance. Employing commercially available MMIC various circuit topologies are compared based on signal-tonoise considerations. Different scenarios for both sequential and parallel lobing hint to more advanced sensor designs and better performance. These improvements strongly depend on the availability of suitable MMIC and reliable packaging technologies. Within our present approach possible future MMIC developments are already considered and, thus, can be easily adapted by the flexible frontend design. Es wird ein integrierter planarer Sensor für 77 GHz Radaranwendungen vorgestellt. Das Frontend besteht aus einem Sende- und Empfangs-Multi-Chip-Modul und einer elektronisch schwenkbaren Antenne. Das Speisenetzwerk der Antenne basiert auf einer modifizierten Rotman- Linse. Für eine kompakte Bauweise sind Antenne und Speisenetzwerk mehrlagig integriert. Weiterhin umfasst das Frontend eine Phasenregelschleife für eine präzise Steuerung des frequenzmodulierten Dauerstrichradars. Die aktuellen Messergebnisse bestätigen die Funktionalit¨at dieses neuartigen Frontend-Designs, das automatische Geschwindigkeitsregelung, Kollisionswarnung sowie Nahbereichsüberwachung ermöglicht. Die Qualität der Messergebnisse hat weiterf

  1. CMOS front-end electronics for radiation sensors

    CERN Document Server

    AUTHOR|(CDS)2071026

    2015-01-01

    This book offers a comprehensive treatment of front-end electronics for radiation detection. It discusses the fundamental principles of signal processing for radiation detectors and describes circuits at the level of functional building blocks, omitting transistor-level implementation. It also covers important system-level topics commonly found in the world of front-end electronics for radiation sensors. The book develops the topics in detail, with a constant focus on practical problems. It also provides real implementation examples that offer insights and stimuli for more experienced engineers already working in the field.

  2. Self-calibrating quadrature mixing front-end for SDR

    CSIR Research Space (South Africa)

    De Witt, JJ

    2008-01-01

    Full Text Available ]. True SDR, however, implies a hardware radio front-end that is able to cope with different carrier frequencies and bandwidth requirements of various communication standards. The quadrature mixing front-end of zero-IF and digital low-IF transceivers... complex baseband message signal m(t) = mI(t) + jmQ(t), with frequency- domain representation M(f), are passed through these filters, the resulting signal, M ′(f), is given by M ′(f) = MI(f)HI,M (f) + jMQ(f)HQ,M (f). (1) After some algebraic...

  3. ASIC Wafer Test System for the ATLAS Semiconductor Tracker Front-End Chip

    Energy Technology Data Exchange (ETDEWEB)

    Anghinolfi, F.; Bialas, W.; Busek, N.; Ciocio, A.; Cosgrove, D.; Fadeyev, V.; Flacco, C.; Gilchriese, M.; Grillo, A.A.; Haber, C.; Kaplon, J.; Lacasta, C.; Murray, W.; Niggli, H.; Pritchard, T.; Rosenbaum, F.; Spieler, H.; Stezelberger, T.; Vu, C.; Wilder, M.; Yaver, H.; Zetti, F.

    2002-03-19

    An ASIC wafer test system has been developed to provide comprehensive production screening of the ATLAS Semiconductor Tracker front-end chip (ABCD3T). The ABCD3T[1] features a 128-channel analog front-end, a digital pipeline, and communication circuitry, clocked at 40 MHz, which is the bunch crossing frequency at the LHC (Large Hadron Collider). The tester measures values and tolerance ranges of all critical IC parameters, including DC parameters, electronic noise, time resolution, clock levels and clock timing. The tester is controlled by an FPGA (ORCA3T) programmed to issue the input commands to the IC and to interpret the output data. This allows the high-speed wafer-level IC testing necessary to meet the production schedule. To characterize signal amplitudes and phase margins, the tester utilizes pin-driver, delay, and DAC chips, which control the amplitudes and delays of signals sent to the IC under test. Output signals from the IC under test go through window comparator chips to measure their levels. A probe card has been designed specifically to reduce pick-up noise that can affect the measurements. The system can operate at frequencies up to 100 MHz to study the speed limits of the digital circuitry before and after radiation damage. Testing requirements and design solutions are presented.

  4. ASIC Wafer Test System for the ATLAS Semiconductor Tracker Front-End Chip

    International Nuclear Information System (INIS)

    Anghinolfi, F.; Bialas, W.; Busek, N.; Ciocio, A.; Cosgrove, D.; Fadeyev, V.; Flacco, C.; Gilchriese, M.; Grillo, A.A.; Haber, C.; Kaplon, J.; Lacasta, C.; Murray, W.; Niggli, H.; Pritchard, T.; Rosenbaum, F.; Spieler, H.; Stezelberger, T.; Vu, C.; Wilder, M.; Yaver, H.; Zetti, F.

    2002-01-01

    An ASIC wafer test system has been developed to provide comprehensive production screening of the ATLAS Semiconductor Tracker front-end chip (ABCD3T). The ABCD3T[1] features a 128-channel analog front-end, a digital pipeline, and communication circuitry, clocked at 40 MHz, which is the bunch crossing frequency at the LHC (Large Hadron Collider). The tester measures values and tolerance ranges of all critical IC parameters, including DC parameters, electronic noise, time resolution, clock levels and clock timing. The tester is controlled by an FPGA (ORCA3T) programmed to issue the input commands to the IC and to interpret the output data. This allows the high-speed wafer-level IC testing necessary to meet the production schedule. To characterize signal amplitudes and phase margins, the tester utilizes pin-driver, delay, and DAC chips, which control the amplitudes and delays of signals sent to the IC under test. Output signals from the IC under test go through window comparator chips to measure their levels. A probe card has been designed specifically to reduce pick-up noise that can affect the measurements. The system can operate at frequencies up to 100 MHz to study the speed limits of the digital circuitry before and after radiation damage. Testing requirements and design solutions are presented

  5. Prototype ALICE front-end card

    CERN Multimedia

    Maximilien Brice

    2004-01-01

    This circuit board is a prototype 48-channel front end digitizer card for the ALICE time projection chamber (TPC), which takes electrical signals from the wire sensors in the TPC and shapes the data before converting the analogue signal to digital data. A total of 4356 cards will be required to process the data from the ALICE TPC, the largest of this type of detector in the world.

  6. A fully integrated, low noise and low power BiCMOS front-end readout system for capacitive detectors

    CERN Document Server

    Guo, C C; Deptuch, G; Hu, Y Y

    2001-01-01

    Bipolar transistors are interesting for low noise front-end readout systems when high speed and low power consumption are required. This paper presents a fully integrated, low noise front-end design for the future Large Hadron Collider (LHC) experiments using the radiation hard SOI BiCMOS process. In the present prototype, the input-referred Equivalent Noise Charge (ENC) of 990 electrons (r.m.s.) for 12 pF detector capacitance with a shaping time of 25 ns and power consumption of 1.4 mW/channel has been measured. The gain of this front-end is 90 mV/MIP (Minimum Ionisation Particle: 1 MIP=3.84 fC) with non-linearity of less than 3% and linear input dynamic range is +or-5 MIP. These results are obtained at room temperature and before irradiation. The measurements after irradiations by high intensity pion beam with an integrated flux of 1.0*10/sup 14/ pions/cm/sup 2/ are also presented in this paper. (10 refs).

  7. Design of a 0.18 {mu}m CMOS multi-band compatible low power GNSS receiver RF frontend

    Energy Technology Data Exchange (ETDEWEB)

    Li Bing; Zhuang Yiqi; Long Qiang; Jin Zhao; Li Zhenrong; Jin Gang, E-mail: waxmax@126.com [Key Laboratory of the Ministry of Education for Wide Bandgap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi' an 710071 (China)

    2011-03-15

    This paper presents the design and implementation of a fully integrated multi-band RF receiver frontend for GNSS applications on L-band. A single RF signal channel with a low-IF architecture is adopted for multi-band operation on the RF section, which mainly consists of a low noise amplifier (LNA), a down-converter, polyphase filters and summing circuits. An improved cascode source degenerated LNA with a multi-band shared off-chip matching network and band switches is implemented in the first amplifying stage. Also, a re-designed wideband double balance mixer is implemented in the down conversion stage, which provides better gain, noise figure and linearity performances. Using a TSMC 0.18 {mu}m 1P4M RF CMOS process, a compact 1.27 GHz/1.575 GHz dual-band GNSS frontend is realized in the proposed low-IF topology. The measurements exhibit the gains of 45 dB and 43 dB, and noise figures are controlled at 3.35 dB and 3.9 dB of the two frequency bands, respectively. The frontend model consumes about 11.8-13.5 mA current on a 1.8 V power supply. The core occupies 1.91 x 0.53 mm{sup 2} while the total die area with ESD is 2.45 x 2.36 mm{sup 2}. (semiconductor integrated circuits)

  8. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Science.gov (United States)

    2010-07-01

    ... § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents... process vent, reduce organic HAP emissions for the batch cycle by 90 weight percent using a control device... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents-reference...

  9. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Science.gov (United States)

    2010-07-01

    ... operator of a batch front-end process vent or aggregate batch vent stream that uses a control device to... meets the conditions of § 63.490(b)(3). (i) For batch front-end process vents using a control device to... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents...

  10. 40 CFR 63.486 - Batch front-end process vent provisions.

    Science.gov (United States)

    2010-07-01

    ... sources with batch front-end process vents classified as Group 1 shall comply with the reference control... Group 2 batch front-end process vents shall comply with the applicable reference control technology... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vent provisions...

  11. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    Science.gov (United States)

    Ciciriello, F.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, C.; Matarrese, G.; Ranieri, A.

    2016-07-01

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e- for a detector capacitance of 10 pF.

  12. PACE3 - front-end chip for the CMS Preshower

    CERN Multimedia

    Aspel, Paul

    2003-01-01

    This is PACE3 which is the front-end chip for the CMS Preshower. In fact PACE3 is the combination of two ASICs called Delta3 and PACEAM3. Delta3 is on the left and PACEAM3 is on the right. The two ASICs are bonded together and then packaged within a single 196 pin fpBGA package.

  13. Calibration method for direct conversion receiver front-ends

    Directory of Open Access Journals (Sweden)

    R. Müller

    2008-05-01

    Full Text Available Technology induced process tolerances in analog circuits cause device characteristics different from specification. For direct conversion receiver front-ends a system level calibration method is presented. The malfunctions of the devices are compensated by tuning dominant circuit parameters. Thereto optimization techniques are applied which use measurement values and special evaluation functions.

  14. Managing Front-End Innovation through Idea Markets at Novozymes

    DEFF Research Database (Denmark)

    Lauto, Giancarlo; Valentin, Finn; Hatzack, Frank

    2013-01-01

    Online collaboration is a powerful tool for boosting idea generation in large corporations. However, management may experience an overload of proposals from employees. To improve front-end innovation, the Danish industrial biotech company Novozymes implemented an internal idea competition in whic...

  15. Prototype specification of antenna and radio front-end schemes for PAN devices

    DEFF Research Database (Denmark)

    Wang, Yu; Nguyen, Hung Tuan; johansson, Anders

    2007-01-01

    be implemented in the prototype directly, or used as references in antenna selections for the prototype. Interference mitigation on antenna system level for both HDR and LDR systems is investigated. For the LDR system, interference from the HDR system and UWB systems is identified as most critical. Front......-end filtering with high attenuation on 5.2 GHz is suggested to suppress interference from the HDR system. A low-complexity switching diversity antenna system is designed to mitigate UWB interference. The performance of proposed scheme is evaluated with measured channels. The implementation of the scheme......This document provides antenna system specifications for the MAGNET Beyond prototype. Requirements on selecting antenna elements and diversity antenna systems are presented. A number of antenna elements and diversity systems suitable for MAGNET systems are specified. Presented antennas can...

  16. The DIRC front-end electronics chain for BaBar

    CERN Document Server

    Bailly, P; Del Buono, L; Genat, J F; Lebbolo, H; Roos, L; Zhang, B; Beigbeder-Beau, C; Bernier, R; Breton, D; Cacéres, T; Chase, Robert L; Ducorps, A; Hrisoho, A; Imbert, P; Sen, S; Tocut, V; Truong, K; Wormser, G; Zomer, F; Bonneaud, G; Dohou, F; Gastaldi, F; Matricon, P; Renard, C; Thiebaux, C; Vasileiadis, G; Verderi, M; Oxoby, G; Vavra, J; Warner, D; Wilson, R J

    1999-01-01

    The detector of Internally Reflected Cherenkov light (DIRC) of the BaBar detector (SLAC Stanford, USA) measures better than 1 ns the arrival time of Cherenkov photoelectrons, detected in a 11 000 phototubes array and their amplitude spectra. It mainly comprises of 64-channel DIRC Front-End Boards (DFB) equipped with eight full-custom Analog chips performing zero-cross discrimination with 2 mV threshold and pulse shaping, four full-custom Digital TDC chips for timing measurements with 500 ps binning and a readout logic selecting hits in the trigger window, and DIRC Crate Controller cards (DCC) serializing the data collected from up to 16 DFBs onto a 1.2 Gb/s optical link. Extensive test of the pre-production chips have been performed as well as system tests.

  17. A front-end read out chip for the OPERA scintillator tracker

    CERN Document Server

    Lucotte, A; Borer, K; Campagne, J E; Cazes, A; Hess, M; de La Taille, C; Martin-Chassard, G; Raux, L; Repellin, J P

    2004-01-01

    Multi-anode photomultipliers H7546 are used to readout signal from the OPERA Scintillator Tracker (CERN/SPSC 2000-028, SPSC/P318, LNGSP 25/2000; CERN/SPSC 2001-025, SPSC/M668, LNGS-EXP30/2001). A 32- channel front-end Read Out Chip prototype accommodating the H7546 has been designed at LAL. This device features a low-noise, variable gain preamplifier to correct for multi-anode non-uniformity, an auto- trigger capability 100% efficient at a 0.3 photo-electron, and a charge measurement extending over a large dynamic range left bracket 0-100 right bracket photo-electrons. In this article we describe the ASIC architecture that is being implemented for the Target Tracker in OPERA, with a special emphasis put on the designs and the measured performance.

  18. The front-end data conversion and readout electronics for the CMS ECAL upgrade

    CERN Document Server

    Mazza, Gianni

    2017-01-01

    The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with 13 bit resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.

  19. A 2.5 mW/ch, 50 Mcps, 10-Analog Channel, Adaptively Biased Read-Out Front-End IC With Low Intrinsic Timing Resolution for Single-Photon Time-of-Flight PET Applications With Time-Dependent Noise Analysis in 90 nm CMOS.

    Science.gov (United States)

    Cruz, Hugo; Huang, Hong-Yi; Luo, Ching-Hsing; Lee, Shuenn-Yuh

    2017-04-01

    This paper presents a 10-channel time-of-flight application-specific integrated circuit (ASIC) for positron emission tomography in a 90 nm standard CMOS process. To overcome variations in channel-to-channel timing resolution caused by mismatch and process variations, adaptive biases and a digital-to-analog converter (DAC) are utilized. The main contributions of this work are as follows. First, multistage architectures reduce the total power consumption, and detection bandwidths of analog preamplifiers and comparators are increased to 1 and 1.5 GHz, respectively, relative to those in previous studies. Second, a total intrinsic electronic timing resolution of 9.71 ps root-mean-square (RMS) is achieved (13.88 ps peak and 11.8 ps average of the 10 channels in 5 ASICs). Third, the proposed architecture reduces variations in channel-to-channel timing resolution to 2.6 bits (equivalent to 4.17 ps RMS) by calibrating analog comparator threshold levels. A 181.5 ps full-width-at-half-maximum timing resolution is measured with an avalanche photo diode and a laser setup. The power consumption is 2.5 mW using 0.5 and 1.2 V power supplies. The proposed ASIC is implemented in a 90 nm TSMC CMOS process with a total area of 3.3 mm × 2.7 mm.

  20. The front-end chip of the SuperB SVT detector

    Science.gov (United States)

    Giorgi, F.; Comotti, D.; Manghisoni, M.; Re, V.; Traversi, G.; Fabbri, L.; Gabrielli, A.; Pellegrini, G.; Sbarra, C.; Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A.; Berra, A.; Lietti, D.; Prest, M.; Bevan, A.; Wilson, F.; Beck, G.; Morris, J.; Ganaway, F.; Cenci, R.; Bombelli, L.; Citterio, M.; Coelli, S.; Fiorini, C.; Liberali, V.; Monti, M.; Nasri, B.; Neri, N.; Palombo, F.; Stabile, A.; Balestri, G.; Batignani, G.; Bernardelli, A.; Bettarini, S.; Bosi, F.; Casarosa, G.; Ceccanti, M.; Forti, F.; Giorgi, M. A.; Lusiani, A.; Mammini, P.; Morsani, F.; Oberhof, B.; Paoloni, E.; Perez, A.; Petragnani, G.; Profeti, A.; Rizzo, G.; Soldani, A.; Walsh, J.; Gaioni, L.; Manazza, A.; Quartieri, E.; Ratti, L.; Zucca, S.; Dalla Betta, G.-F.; Fontana, G.; Pancheri, L.; Povoli, M.; Verzellesi, G.; Bosisio, L.; Lanceri, L.; Rashevskaya, I.; Stella, C.; Vitale, L.

    2013-08-01

    The asymmetric e+e- collider SuperB is designed to deliver a high luminosity, greater than 1036cm-2s-1, with moderate beam currents and a reduced center of mass boost with respect to earlier B-Factories. The innermost detector is the Silicon Vertex Tracker which is made of 5 layers of double sided silicon strip sensors plus a layer 0, that can be equipped with short striplets detectors in a first phase of the experiment. In order to achieve an overall track reconstruction efficiency above 98% it is crucial to optimize both analog and digital readout circuits. The readout architecture being developed for the front-end chips will be able to cope with the very high rates expected in the first layer. The digital readout will be optimized to be fully efficient for hit rates up to 2 MHz/strip, including large margins on the maximum expected background rates, but can potentially accommodate higher rates with a proper tuning of the buffer depth. The readout is based on a triggered architecture where each of the 128 strip channel is provided with a dedicated digital buffer. Each buffer collects the digitized charge information by means of a 4-bit TOT, storing it in conjunction with the related time stamp. The depth of buffers was dimensioned considering the expected trigger latency and hit rate including suitable safety margins. Every buffer is connected to a highly parallelized circuit handling the trigger logic, rejecting expired data in the buffers and channeling the parallel stream of triggered hits to the common output of the chip. The presented architecture has been modeled by HDL language and investigated with a Monte Carlo hit generator emulating the analog front-end behavior. The simulations showed that even applying the highest stressing conditions, about 2 MHz per strip, the efficiency of the digital readout remained above 99.8%.

  1. A low-power high dynamic range front-end ASIC for imaging calorimeters

    CERN Document Server

    Bagliesi, M G; Marrocchesi, P S; Meucci, M; Millucci, V; Morsani, F; Paoletti, R; Pilo, F; Scribano, A; Turini, N; Valle, G D

    2002-01-01

    High granularity calorimeters with shower imaging capabilities require dedicated front-end electronics. The ICON 4CH and VA4 PMT chip-set is suitable for very high dynamic range systems with strict noise requirements. The ICON 4CH is a 4 channel input, 12 channel output ASIC designed for use in a multi-anode photomultiplier system with very large dynamic range and low-noise requirements. Each of the four input signals to the ASIC is split equally into three branches by a current conveyor. Each of the three branches is scaled differently: 1:1, 1:8 and 1:80. The signal is read out by a 12 channel low noise/low power high dynamic range charge sensitive preamplifier-shaper circuit (VA4-PMT chip), with simultaneous sample- and-hold, multiplexed analog read-out, calibration facilities. Tests performed in our lab with a PMT are reported in terms of linearity, dynamic range and cross-talk of the system. (5 refs).

  2. Novel Front-end Electronics for Time Projection Chamber Detectors

    CERN Document Server

    García García, Eduardo José

    This work has been carried out in the European Organization for Nuclear Research (CERN) and it was supported by the European Union as part of the research and development towards the European detector the (EUDET) project, specifically for the International Linear Collider (ILC). In particle physics there are several different categories of particle detectors. The presented design is focused on a particular kind of tracking detector called Time Projection Chamber (TPC). The TPC provides a three dimensional image of electrically charged particles crossing a gaseous volume. The thesis includes a study of the requirements for future TPC detectors summarizing the parameters that the front-end readout electronics must fulfill. In addition, these requirements are compared with respect to the readouts used in existing TPC detectors. It is concluded that none of the existing front-end readout designs fulfill the stringent requirements. The main requirements for future TPC detectors are high integration, an increased n...

  3. RF-Frontend Design for Process-Variation-Tolerant Receivers

    CERN Document Server

    Sakian, Pooyan; van Roermund, Arthur

    2012-01-01

    This book discusses a number of challenges faced by designers of wireless receivers, given complications caused by the shrinking of electronic and mobile devices circuitry into ever-smaller sizes and the resulting complications on the manufacturability, production yield, and the end price of the products.  The authors describe the impact of process technology on the performance of the end product and equip RF designers with countermeasures to cope with such problems.  The mechanisms by which these problems arise are analyzed in detail and novel solutions are provided, including design guidelines for receivers with robustness to process variations and details of circuit blocks that obtain the required performance level. Describes RF receiver frontends and their building blocks from a system- and circuit-level perspective; Provides system-level analysis of a generic RF receiver frontend with robustness to process variations; Includes details of CMOS circuit design at 60GHz and reconfigurable circuits at 60GHz...

  4. Exploring the front-end of project management

    OpenAIRE

    Edkins, A. J.; Geraldi, J.; Morris, P.; Smith, A.

    2013-01-01

    This paper is a multi-case study exploratory investigation into the earliest stages of projects and their management. We refer to this throughout the paper as the ‘front-end’. We provide a definition of this phase of the project life cycle and conduct a literature review of the various topics that would suggest themselves to be apposite to the front-end. This includes governance and strategy; requirements and technology; estimating; risk and value; people and learning and development. Followi...

  5. Front-end electronics development for the SSC

    International Nuclear Information System (INIS)

    Levi, M.

    1990-12-01

    This is a status report on electronics development undertaken by the Front-End Electronics Collaboration. The overall goal of the collaboration remains the development by 1992 of complete, architecturally compatible, front end electronic systems for calorimeter, wire drift chamber, and silicon strip readout. We report here a few highlights to give a brief overview of the work underway. Performance requirements and capabilities, selected architectures, circuit designs and test results are presented. 13 refs., 21 figs., 1 tab

  6. Spike timing precision in the visual front-end

    OpenAIRE

    Borghuis, B.G. (Bart Gerard)

    2003-01-01

    This thesis describes a series of investigations into the reliability of neural responses in the primary visual pathway. The results described in subsequent chapters are primarily based on extracellular recordings from single neurons in anaesthetized cats and area MT of an awake monkey, and computational model analysis. Comparison of spike timing precision in recorded and Poisson-simulated spike trains shows that spike timing in the front-end visual system is considerably more precise than on...

  7. A Front-End Electronics Prototype Based on Gigabit Ethernet for the ATLAS Small-Strip Thin Gap Chamber

    Science.gov (United States)

    Hu, Kun; Lu, Houbing; Wang, Xu; Li, Feng; Wang, Xinxin; Geng, Tianru; Yang, Hang; Liu, Shengquan; Han, Liang; Jin, Ge

    2017-06-01

    A front-end electronics prototype for the ATLAS small-strip Thin Gap Chamber (sTGC) based on gigabit Ethernet has been developed. The prototype is designed to read out signals of pads, wires, and strips of the sTGC detector. The prototype includes two VMM2 chips developed to read out the signals of the sTGC, a Xilinx Kintex-7 field-programmable gate array (FPGA) used for the VMM2 configuration and the events storage, and a gigabit Ethernet transceiver PHY chip for interfacing with a computer. The VMM2 chip is designed for the readout of the Micromegas detector and sTGC detector, which is composed of 64 linear front-end channels. Each channel integrates a charge-sensitive amplifier, a shaper, several analog-to-digital converters, and other digital functions. For a bunch-crossing interval of 25 ns, events are continuously read out by the FPGA and forwarded to the computer. The interface between the computer and the prototype has been measured to reach an error-free rate of 900 Mb/s, therefore making a very effective use of the available bandwidth. Additionally, the computer can control several prototypes of this kind simultaneously via the Ethernet interface. At present, the prototype will be used for the sTGC performance test. The features of the prototype are described in detail.

  8. An updated front-end data link design for the Phase-2 upgrade of the ATLAS Tile Calorimeter

    CERN Document Server

    Silverstein, Samuel; The ATLAS collaboration

    2017-01-01

    We present a new design of the advanced Link Daughter Board (DB) for the front-end electronics upgrade of the ATLAS Tile Calorimeter (TileCal) for Phase-II. The new TileCal front-end comprises 1024 “mini-drawers” (MD) installed in 256 calorimeter modules. Each MD serves up to 12 PMT channels, with ADCs and calibration provided by one “main board” (MB) per MD. The DB is connected to the MB through a dense, high-speed FMC connector, and provides bi-directional multi-Gb/s optlcal links to the off-detector electronics for timing, control, and continuous high-speed readout of the ADC channels on the MB. The DB is designed for redundancy and fault-tolerance, and previous versions have already been successfully tested at CERN and elsewhere. The new revision includes Kintex Ultrascale+ FPGAs for improved link timing and radiation tolerance, an expanded role for the rad-tolerant GBTx ASICs, and a simpler design requiring fewer components and optical links.

  9. Dual stage beamforming in the absence of front-end receive focusing

    Science.gov (United States)

    Bera, Deep; Bosch, Johan G.; Verweij, Martin D.; de Jong, Nico; Vos, Hendrik J.

    2017-08-01

    Ultrasound front-end receive designs for miniature, wireless, and/or matrix transducers can be simplified considerably by direct-element summation in receive. In this paper we develop a dual-stage beamforming technique that is able to produce a high-quality image from scanlines that are produced with focused transmit, and simple summation in receive (no delays). We call this non-delayed sequential beamforming (NDSB). In the first stage, low-resolution RF scanlines are formed by simple summation of element signals from a running sub-aperture. In the second stage, delay-and-sum beamforming is performed in which the delays are calculated considering the transmit focal points as virtual sources emitting spherical waves, and the sub-apertures as large unfocused receive elements. The NDSB method is validated with simulations in Field II. For experimental validation, RF channel data were acquired with a commercial research scanner using a 5 MHz linear array, and were subsequently processed offline. For NDSB, good average lateral resolution (0.99 mm) and low grating lobe levels (spread function was on average 20% smaller than that of DRF except for at depths  <30 mm and 10% larger than SASB considering all the depths. NDSB showed only a minor degradation in contrast-to-noise ratio and contrast ratio compared to DRF and SASB when measured on an anechoic cyst embedded in a tissue-mimicking phantom. In conclusion, using simple receive electronics front-end, NDSB can attain an image quality better than DRF and slightly inferior to SASB.

  10. The front-end analog and digital signal processing electronics for the drift chambers of the Stanford Large Detector

    International Nuclear Information System (INIS)

    Haller, G.M.; Freytag, D.R.; Fox, J.; Olsen, J.; Paffrath, L.; Yim, A.; Honma, A.

    1990-10-01

    The front-end signal processing electronics for the drift-chambers of the Stanford Large Detector (SLD) at the Stanford Linear Collider is described. The system is implemented with printed-circuit boards which are shaped for direct mounting on the detector. Typically, a motherboard comprises 64 channels of transimpedance amplification and analog waveform sampling, A/D conversion, and associated control and readout circuitry. The loaded motherboard thus forms a processor which records low-level wave forms from 64 detector channels and transforms the information into a 64 k-byte serial data stream. In addition, the package performs calibration functions, measures leakage currents on the wires, and generates wire hit patterns for triggering purposes. The construction and operation of the electronic circuits utilizing monolithic, hybridized, and programmable components are discussed

  11. Simple Front-End Concept for the Complex Challenges of Multi-Band Communications

    DEFF Research Database (Denmark)

    Buskgaard, Emil Feldborg; Tatomirescu, Alexandru; Barrio, Samantha Caporal Del

    2015-01-01

    This paper proposes a new architecture for mobile phone front-ends that dramatically reduces the complexity of multi-band smart phones. Traditional smart phone front-ends consist of many parallel transmit (Tx) and receive (Rx) chains each dedicated to a single band. The proposed architecture simp...... bands realistic. Current 5G investigations show that the advantages of flexible front-ends will be even bigger as technology moves toward software defined radio. \\end{abstract}...

  12. Imaging X-ray detector front-end with high dynamic range: IDeF-X HD

    Science.gov (United States)

    Gevin, O.; Lemaire, O.; Lugiez, F.; Michalowska, A.; Baron, P.; Limousin, O.; Delagnes, E.

    2012-12-01

    Presented circuit, IDeF-X HD (Imaging Detector Front-end) is a member of the IDeF-X ASICs family for space applications. It has been optimized for a half millimeter pitch CdTe or CdZnTe pixelated detector arranged in 16×16 array. It is aimed to operate in the hard X-ray range from few keV up to 250 keV or more. The ASIC has been realized in AMS 0.35 μm CMOS process. The IDeF-X HD is a 32 channel analog front-end with self-triggering capability. The architecture of the analog channel includes a chain of charge sensitive amplifier with continuous reset system and non-stationary noise suppressor, adjustable gain stage, pole-zero cancellation stage, adjustable shaping time low pass filter, baseline holder and peak detector with discriminator. The power consumption of the IDeF-X HD is 800 μW per channel. With the in-channel variable gain stage the nominal 250 keV dynamic range of the ASIC can be extended up to 1 MeV anticipating future applications using thick sensors. Measuring the noise performance without a detector at the input with minimized leakage current (programmable) at the input, we achieved ENC of 33 electrons rms at 10.7 μs peak time. Measurements with CdTe detector show good energy resolution FWHM of 1.1 keV at 60 keV and 4.3 keV at 662 keV with detection threshold below 4 keV. In addition, an absolute temperature sensor has been integrated with resolution of 1.5 °C.

  13. Photodetectors and front-end electronics for the LHCb RICH upgrade

    Science.gov (United States)

    Cassina, L.; LHCb RICH

    2017-12-01

    The RICH detectors of the LHCb experiment provide identification of hadrons produced in high energy proton-proton collisions in the LHC at CERN over a wide momentum range (2-100 GeV/c). Cherenkov light is collected on photon detector planes sensitive to single photons. The RICH will be upgraded (in 2019) to read out every bunch crossing, at a rate of 40 MHz. The current hybrid photon detectors (HPD) will be replaced with multi-anode photomultiplier tubes (customisations of the Hamamatsu R11265 and the H12699 MaPMTs). These 8×8 pixel devices meet the experimental requirements thanks to their small pixel size, high gain, negligible dark count rate (∼50 Hz/cm2) and moderate cross-talk. The measured performance of several tubes is reported, together with their long-term stability. A new 8-channel front-end chip, named CLARO, has been designed in 0.35 μm CMOS AMS technology for the MaPMT readout. The CLARO chip operates in binary mode and combines low power consumption (∼1 mW/Ch), wide bandwidth (baseline restored in ⩽ 25 ns) and radiation hardness. A 12-bit digital register permits the optimisation of the dynamic range and the threshold level for each channel and provides tools for the on-site calibration. The design choices and the characterization of the electronics are presented.

  14. PARISROC, an autonomous front-end ASIC for triggerless acquisition in next generation neutrino experiments

    International Nuclear Information System (INIS)

    Conforti Di Lorenzo, S.; Campagne, J.E.; Drouet, S.; Dulucq, F.; El Berni, M.; Genolini, B.; La Taille, C. de; Martin-Chassard, G.; Seguin Moreau, N.; Wanlin, E.; Xiangbo, Y.

    2012-01-01

    PARISROC (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is a complete readout chip in AustriaMicroSystems (AMS) SiGe 0.35 μm technology designed to read array of 16 Photomultipliers (PMTs). The ASIC is realized in the context of the PMm2 (square meter PhotoMultiplier) project that has proposed a new system of “smart photo-detectors” composed by sensor and read-out electronics dedicated to next generation neutrino experiments. The future water Cherenkov detectors will take place in megaton size water tanks then with a large surface of photo-detection. We propose to segment the large surface in arrays with a single front-end electronics and only the useful data send in surface to be stocked and analyzed. This paper describes the second version of the ASIC and illustrates the chip principle of operation and the main characteristics thank to a series of measurements. It is a 16-channel ASIC with channels that work independently, in triggerless mode and all managed by a common digital part. Then main innovation is that all the channels are handled independently by the digital part so that only channels that have triggered are digitized. Then the data are transferred to the internal memory and sent out in a data driven way. The ASIC allows charge and time measurement. We measured a charge measurement range starting from 160 fC (1 photoelectron-p.e., at PMT gain of 10 6 ) to 100 pC (around 600 p.e.) at 1% of linearity; time tagging at 1 ns thanks to a 24-bit counter at 10 MHz and a Time to Digital Converter (TDC) on a 100 ns ramp.

  15. PARISROC, an autonomous front-end ASIC for triggerless acquisition in next generation neutrino experiments

    Science.gov (United States)

    Conforti Di Lorenzo, S.; Campagne, J. E.; Drouet, S.; Dulucq, F.; El Berni, M.; Genolini, B.; de La Taille, C.; Martin-Chassard, G.; Seguin Moreau, N.; Wanlin, E.; Xiangbo, Y.

    2012-12-01

    PARISROC (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is a complete readout chip in AustriaMicroSystems (AMS) SiGe 0.35 μm technology designed to read array of 16 Photomultipliers (PMTs). The ASIC is realized in the context of the PMm2 (square meter PhotoMultiplier) project that has proposed a new system of “smart photo-detectors” composed by sensor and read-out electronics dedicated to next generation neutrino experiments. The future water Cherenkov detectors will take place in megaton size water tanks then with a large surface of photo-detection. We propose to segment the large surface in arrays with a single front-end electronics and only the useful data send in surface to be stocked and analyzed. This paper describes the second version of the ASIC and illustrates the chip principle of operation and the main characteristics thank to a series of measurements. It is a 16-channel ASIC with channels that work independently, in triggerless mode and all managed by a common digital part. Then main innovation is that all the channels are handled independently by the digital part so that only channels that have triggered are digitized. Then the data are transferred to the internal memory and sent out in a data driven way. The ASIC allows charge and time measurement. We measured a charge measurement range starting from 160 fC (1 photoelectron-p.e., at PMT gain of 106) to 100 pC (around 600 p.e.) at 1% of linearity; time tagging at 1 ns thanks to a 24-bit counter at 10 MHz and a Time to Digital Converter (TDC) on a 100 ns ramp.

  16. System-level considerations for the front-end readout ASIC in the CBM experiment from the power supply perspective

    Science.gov (United States)

    Kasinski, K.; Koczon, P.; Ayet, S.; Löchner, S.; Schmidt, C. J.

    2017-03-01

    New fixed target experiments using high intensity beams with energy up to 10 AGeV from the SIS100 synchrotron presently being constructed at FAIR/GSI are under preparation. Most of the readout electronics and power supplies are expected to be exposed to a very high flux of nuclear reaction products and have to be radiation tolerant up to 3 MRad (TID) and sustain up to 1014/cm2 of 1 MeV neutron equivalent in their life time. Moreover, the mostly minimum ionising particles under investigation leave very little signal in the sensors. Therefore very low noise level amplitude measurements are required by the front-end electronics for effective tracking. Sensor and interconnecting micro-cable capacitance and series resistance in conjunction with intrinsic noise of the charge sensitive amplifier are dominant noise sources in the system. However, the single-ended architecture of the amplifiers employed for the charge processing channels implies a potential problem with noise contributions from power supply sources. Strict system-level constraints leave very little freedom in selecting a power supply structure optimal with respect to: power efficiency, cooling capabilities and power density on modules, but also noise injection to the front-end via the power supply lines. Design of the power supply and distribution system of the Silicon Tracking System in the CBM experiment together with details on the front-end ASICs (STS -XYTER2) and measurement results of power supply and conditioning electronics (selected DC/DC converter and LDO regulators) are presented.

  17. Structuring front-end innovation activities throughout strategic product planning

    Directory of Open Access Journals (Sweden)

    Thaisa Rodrigues

    Full Text Available Abstract Strategic product planning (SPP for new product development (NPD in the front-end of innovation (FEI is a great challenge for managers and practitioners. This article analyzes the structuring process of FEI activities during SPP. A research was carried out with 78 industries from both food and furniture in Brazil. Our study revealed that FEI activities are structured in an intricate network with a high level of complexity and interdependence. The large amount of activities and the complexity in structuring them denote that companies are concerned to reduce uncertainties and risks intensifying the planning phase.

  18. Instrument Front-Ends at Fermilab During Run II

    Energy Technology Data Exchange (ETDEWEB)

    Meyer, Thomas; Slimmer, David; Voy, Duane; /Fermilab

    2011-07-13

    The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved data collection and analysis during Run II. This paper describes the implementation of the two main systems used: National Instruments LabVIEW running on PCs, and WindRiver's VxWorks real-time operating system running in a VME crate processor.

  19. Performance of Front-End Readout System for PHENIX RICH

    International Nuclear Information System (INIS)

    Oyama, K.; Hamagaki, H.; Nishimura, S.; Shigaki, K.; Hayano, R.S.; Hibino, M.; Kametani, S.; Kikuchi, J.; Matsumoto, T.; Sakaguchi, T.; Ebisu, K.; Hara, H.; Tanaka, Y.; Ushiroda, T.; Moscone, C.G.; Wintenberg, A.L.; Young, G.R.

    1999-01-01

    A front-end electronics system has been developed for the Ring Imaging Cerenkov (RICH) detector of the PHENIX experiment at the Relativistic Heavy Ion Collider (RHIC), Brookhaven National Laboratory (BNL). A high speed custom back-plane with source synchronous bus architecture, a full custom analog ASIC, and board modules with FPGA's and CPLD's were developed for high performance real time data acquisition. The transfer rate of the back-lane has reached 640 MB/s with 128 bits data bus. Total transaction time is estimated to be less than 30 micros per event. The design specifications and test results of the system are presented in this paper

  20. Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    de La Taille, C

    2008-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  1. An ultrafast front-end ASIC for APD array detectors in X-ray time-resolved experiments

    Science.gov (United States)

    Zhou, Yang-Fan; Li, Qiu-Ju; Liu, Peng; Fan, Lei; Xu, Wei; Tao, Ye; Li, Zhen-Jie

    2017-06-01

    An ultrafast front-end ASIC chip has been developed for APD array detectors in X-ray time-resolved experiments. The chip has five channels: four complete channels and one test channel with an analog output. Each complete channel consists of a preamplifier, a voltage discriminator and an open-drain output driver. A prototype chip has been designed and fabricated using 0.13 μm CMOS technology with a chip size of 1.3 mm × 1.9 mm. The electrical characterizations of the circuit demonstrate a very good intrinsic time resolution (rms) on the output pulse leading edge, with the test result better than 30 ps for high input signal charges (> 75 fC) and better than 100 ps for low input signal charges (30-75 fC), while keeping a low power consumption of 5 mW per complete channel. Supported by the National Natural Science Foundation of China (11605227), High Energy Photon Source-Test Facility Project, and the State Key Laboratory of Particle Detection and Electronics. This research used resources of the BSRF.

  2. NINO an ultrafast low-power front-end amplifier discriminator for the time-of-flight detector in the ALICE experiment

    CERN Document Server

    Anghinolfi, F; Krummenacher, F; Usenko, E; Williams, M C S

    2004-01-01

    An ultrafast front-end preamplifier-discriminator chip called NINO has been developed for use in the ALICE time-of-flight detector. The chip has eight channels. Each channel is designed with an amplifier with less than 1-ns peaking time, a discriminator with a minimum detection threshold of 10 fC and an output stage. The output pulse has minimum time jitter (less than 25 ps) on the front edge, and the pulsewidth is dependent of the input signal charge. Each channel consumes 27 mW, and the eight channels fit in a 2*4 mm/sup 2/ ASIC processed in IBM 0.25- mu m CMOS technology. (3 refs).

  3. NINO, an ultra-fast, low-power, front-end amplifier discriminator for the Time-Of-Flight detector in ALICE experiment

    CERN Document Server

    Anghinolfi, F; Krummenacher, F; Usenko, E; Williams, M C S

    2004-01-01

    An ultra fast front-end preamplifier-discriminator chip NINO has been developed for use in the ALICE Time-Of-Flight detector. The chip has 8 channels. Each channel is designed with an amplifier with less than 1 ns peaking time, a discriminator with a minimum detection threshold of 10fC and an output stage. The output pulse has minimum time jitter (less than 25ps) on the front edge, and the pulse width is dependent of the input signal charge. Each channel consumes 27mW, and the 8 channels fit in a 2*4mm/sup 2/ ASIC processed in IBM 0.2 mu m CMOS technology. (3 refs).

  4. SENSROC4: An Multichannel Low-Noise Front-End Readout ASIC Dedicated to CZT Detectors for PET Imaging

    International Nuclear Information System (INIS)

    Gao, W.; Liu, H.; Gao, D.; Gan, B.; Wei, T.; Hu, Y.

    2013-06-01

    In this paper, we present the design of a novel low-noise front-end readout application-specific integrated circuit (ASIC) for our small animal PET systems which objective is to achieve the following performances, the spatial resolution of 1 mm 3 , the detection efficiency of 15 % and the time resolution of 1 ns. A cascade amplifier based on the PMOS input transistor is selected to realize the charge-sensitive amplifier (CSA) for the sake of good noise performances. The output of the CSA is split into two branches. One is connected to a slow shaper for energy measurements. The other is connected to a fast shaper for time acquisition. A novel monostable circuit is designed to adjust the time delay of the trigger signals so that the peak value of the shaped voltages can be sampled and stored. Based on the above techniques, an eight-channel front-end readout prototype chip is designed and implemented in 0.35 μm CMOS process. The die size is 2.286 mm x 2.282 mm. The input range of the ASIC is from 2000 e- to 180000 e-, reflecting to the energy of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 V/pC. The best test result of ENC is 86.5 e- at zero farad plus 9.3 e- per pico-farad. The nonlinearity is less than 3 %. The crosstalk is less than 2 %. The power dissipation is about 9 mW/channel (authors)

  5. Simulations of the pressure profiles of the PETRAIII frontends

    International Nuclear Information System (INIS)

    Amann, C; Uhahn; Hesse, M; Schulte-Schrepping, H

    2008-01-01

    PETRA III will be a high brilliance third generation synchrotron radiation source. The undulators will provide photon beams with small beam size and therefore the components in the frontend are as compact as feasible. The resulting narrow cross sections of the vacuum system will yield a small conductance in the whole beamline. The design of the frontends has reached an advanced state so that the initial design of the vacuum system can be finalized now. The vacuum specification of the beamline components demands for a hydrocarbon and dust free vacuum systems. To provide this, the beamline will be initially pumped down with dry pumping stations to a pressure of at least 10 -6 mbar. At this pressure a set of ion pumps will be switched on to pump the beamline continuously. For lifetime reasons of the ion pumps it is necessary that during operation the pressure in the pumps is below 10 -6 mbar. During the start up of the beamline system a high amount of gas will be photo desorbed especially at the high power slit systems. To cope with this, the pumping concept of the beamline has been revised. Monte Carlo simulations of the pressure profiles in the beamline show that additional pumping near the slit systems is mandatory for a long lifetime of the ion-pumps. The paper reports the layout process of the pumping system

  6. High-linearity CMOS RF front-end circuits

    CERN Document Server

    Ding, Yongwang

    2005-01-01

    This monograph presents techniques to improve the performance of linear integrated circuits (IC) in CMOS at high frequencies. Those circuits are primarily used in radio-frequency (RF) front-ends of wireless communication systems, such as low noise amplifiers (LNA) and mixers in a receiver and power amplifiers (PA) in a transmitter. A novel linearization technique is presented. With a small trade-off of gain and power consumption this technique can improve the linearity of the majority of circuits by tens of dB. Particularly, for modern CMOS processes, most of which has device matching better than 1%, the distortion can be compressed by up to 40 dB at the output. A prototype LNA has been fabricated in a 0.25um CMOS process, with a measured +18 dBm IIP3. This technique improves the dynamic range of a receiver RF front-end by 12 dB. A new class of power amplifier (parallel class A&B) is also presented to extend the linear operation range and save the DC power consumption. It has been shown by both simulation...

  7. Design and Characteristics of a Multichannel Front-End ASIC Using Current-Mode CSA for Small-Animal PET Imaging.

    Science.gov (United States)

    Ollivier-Henry, N; Wu Gao; Xiaochao Fang; Mbow, N A; Brasse, D; Humbert, B; Hu-Guo, C; Colledani, C; Yann Hu

    2011-02-01

    This paper presents the design and characteristics of a front-end readout application-specific integrated circuit (ASIC) dedicated to a multichannel-plate photodetector coupled to LYSO scintillating crystals. In our configuration, the crystals are oriented in the axial direction readout on both sides by individual photodetector channels allowing the spatial resolution and the detection efficiency to be independent of each other. Both energy signals and timing triggers from the photodetectors are required to be read out by the front-end ASIC. A current-mode charge-sensitive amplifier is proposed for this application. This paper presents performance characteristics of a 10-channel prototype chip designed and fabricated in a 0.35-μm complementary metal-oxide semiconductor process. The main results of simulations and measurements are presented and discussed. The gain of the chip is 13.1 mV/pC while the peak time of a CR-RC pulse shaper is 280 ns. The signal-to-noise ratio is 39 dB and the rms noise is 300 μV/√(Hz). The nonlinearity is less than 3% and the crosstalk is about 0.2%. The power dissipation is less than 15 mW/channel. This prototype will be extended to a 64-channel circuit with integrated time-to-digital converter and analog-to-digital converter together for a high-sensitive small-animal positron emission tomography imaging system.

  8. Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

    Science.gov (United States)

    Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

    2005-12-01

    Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

  9. Performance evaluation of the analogue front-end and ADC prototypes for the Gotthard-II development

    Science.gov (United States)

    Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.

    2017-12-01

    Gotthard-II is a silicon microstrip detector developed for the European X-ray Free-Electron Laser (XFEL.EU). Its potential scientific applications include X-ray absorption/emission spectroscopy, hard X-ray high resolution single-shot spectrometry (HiREX), energy dispersive experiments at 4.5 MHz frame rate, beam diagnostics, as well as veto signal generation for pixel detectors. Gotthard-II uses a silicon microstrip sensor with a pitch of 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to readout chips (ROCs). In the ROC, an adaptive gain switching pre-amplifier (PRE), a fully differential Correlated-Double-Sampling (CDS) stage, an Analog-to-Digital Converter (ADC) as well as a Static Random-Access Memory (SRAM) capable of storing all the 2700 images in an XFEL.EU bunch train will be implemented. Several prototypes with different designs of the analogue front-end (PRE and CDS) and ADC test structures have been fabricated in UMC-110 nm CMOS technology and their performance has been evaluated. In this paper, the performance of the analogue front-end and ADC will be summarized.

  10. An Updated Front-End Data Link Design for the Phase-2 Upgrade of the ATLAS Tile Calorimeter

    CERN Document Server

    Silverstein, Samuel; The ATLAS collaboration

    2017-01-01

    We present a new design for the advanced Link Daughter Board (DB) for the front-end electronics upgrade of the ATLAS hadronic Tile Calorimeter. The DB provides control, configuration and continuous ADC readout for the front-end, as well as bi-directional multi-GB/s optical links to the off-detector readout system. The DB will operate in high luminosity LHC conditions with limited detector access, so the design is fault tolerant with a high level of redundancy to avoid single-point failure modes. The DB is divided longitudinally, with an FPGA serving the ADC channels on its respective side. The new design is based on the new Xilinx Kintex Ultrascale+ FPGA family, which provides improved high-speed link timing performance as well as better signal compatibility with the CERN-developed GBTx link and timing distribution ASICs. Two GBTx ASICs each provide redundant phase-adjusted, LHC synchronous clocks, parallel control buses and remote JTAG configuration access to both FPGAs on the DB.

  11. 40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

    Science.gov (United States)

    2010-07-01

    ... combustion device to control halogenated batch front-end process vents or halogenated aggregate batch vent... periods of process or control device operation when monitors are not operating. (f) Aggregate batch vent... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents...

  12. Tuned Optical Front-End MMIC Amplifiers for a Coherent Optical Receiver

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad; Jagd, A M

    1992-01-01

    Two low noise tuned optical front-end GaAs MESFET MMIC amplifiers for a coherent optical CPFSK (Continuous Phase Frequency Shift Keying) receiver are presented. The receiver operates at 2.5 Gbit/s at an IF of approx. 9 GHz. The front-ends are based on full-custom designed MMICs and a commercially...

  13. Design, development, installation and commissioning of water-cooled pre-masks for undulator front-ends of Indus-2

    International Nuclear Information System (INIS)

    Raghuvanshi, V.K.; Prasad, Vijendra; Garg, S.R.; Jain, Vikas

    2015-01-01

    Recently two undulators U1 and U2 are installed in Indus-2 storage ring at RRCAT, Indore. When U1 and U2 are put in operation, a bright synchrotron radiation (SR) is produced which is transmitted through the zero degree port of the dipole vacuum chamber. In addition, a part of SR beam from the bending magnets, at the upstream and downstream of the undulator, is also overlapped with the undulator SR beam and transmitted in to the front-end through the same port. The front-end is a long ultra high vacuum (UHV) assembly consisting of water-cooled pre-mask, water-cooled shutters, UHV valves, diagnostic devices, safety shutter, vacuum pumps etc which acts as an interface between Indus-2 ring and beamline. Water-cooled pre- masks have been designed to cut a part of unwanted SR beam from the bending magnets. The pre-mask is a first active component in the undulator front-end which is also capable of absorbing high thermal load due to mis-steering of the SR beam from the undulator in the worst case scenario. The watercooled pre-mask consists of a copper block which has fixed aperture with slant faces to distribute the heat flux over a large surface area. The cooling channels are made on outer periphery of the block. The copper block is vacuum brazed with two conflat flanges of stainless steel at the two ends. The pre-mask is designed to absorb thermal load of 3 kW of synchrotron beam from undulator U1 and 2 kW of synchrotron beam from undulator U2. The thermal analysis of the pre-masks was carried out with the help of ANSYS® and the design was optimized with different cooling configurations. The main design criteria was to limit the maximum temperature of the mask less than 60 °C. This is to avoid substantial thermal outgassing from the heated portion which may deteriorate the ultra high vacuum. Pre-masks have been successfully tested, installed and commissioned with synchrotron beam in the undulator front-ends and are operating under vacuum of 5x10 -10 mbar. (author)

  14. Ultra-wideband wireless receiver front-end for high-speed indoor applications

    Directory of Open Access Journals (Sweden)

    Zhe-Yang Huang

    2014-12-01

    Full Text Available Low-noise, ultra-wideband (UWB wireless receiver front-end circuits were presented in this study. A two-stage common-source low-noise amplifier with wideband input impedance matching network, an active-balun and a double-balanced down-conversion mixer were adopted in the UWB wireless receiver front-end. The proposed wireless receiver front-end circuits were implemented in 0.18 μm radio-frequency-CMOS process. The maximum down-conversion power gain of the front-end is 25.8 dB; minimum single-sideband noise figure of the front-end is 4.9 dB over complete UWB band ranging from 3.1 to 10.6 GHz. Power consumption including buffers is 39.2 mW.

  15. Upgrade Design of TileCal Front-end Readout Electronics and Radiation Hardness Studies

    CERN Document Server

    Anderson, K; The ATLAS collaboration; Drake, G; Eriksson, D; Muschter, S; Oreglia, M; Pilcher, J; Price, L; Tang, F

    2011-01-01

    The ATLAS Tile Calorimeter (TileCal) is essential for measuring the energy and direction of hadrons and taus produced in LHC collisions. The TileCal consists of "tiles" of plastic scintillator dispersed in a fine-grained steel matrix . Optical fibers from the tiles are sent to ~10,000 photomultiplier tubes (PMT) and associated readout electronics. The TileCal front-end analog readout electronics process the signals from ~10,000 PMTs. Signals from each PMT are shaped with a 7-pole passive LC shaper and split it to two channels amplified by a pair of clamping amplifiers with a gain ratio of 32. Incorporated with two 40Msps 12-bit ADCs, the readout electronics provide a combined dynamic range of 17-bits. With this dynamic range, the readout system is capable of measuring the energy deposition in the calorimeter cells from ~220MeV to 1.3TeV with the least signal-to-noise ratio of greater than 20. The digitized data from each PMT are transmitted off-detector optically, where the data are further processed with ded...

  16. Frontend and Backend Electronics for the ATLAS New Small Wheel Upgrade

    CERN Document Server

    Martinez Outschoorn, Verena; The ATLAS collaboration

    2016-01-01

    The Phase-I and Phase-II upgrades of the LHC accelerator will increase the LHC instantaneous luminosity to 2×1034 cm-2s-1 and 7.5×1034 cm-2s-1, respectively. The luminosity increase drastically impacts the ATLAS trigger and readout data rates. The present ATLAS small wheel muon detector will be replaced with a New Small Wheel (NSW) detector in 2019. The NSW will feature two new detector technologies, Resistive Micromegas (MM) and small strip Thin Gap Chambers (sTGC) conforming a system of ~2.4 million readout channels. Both detectors will be used for muon triggering and precision tracking. A common readout path and two separate trigger paths are developed for these two detector technologies. The frontend electronics will be implemented in about 8000 boards including the design of 4 custom ASICs capable of driving trigger and tracking primitives to the backend trigger processor and readout system. The readout data flow is designed through a high-throughput network approach. The large number of readout channe...

  17. Front-end receiver electronics for a matrix transducer for 3-D transesophageal echocardiography.

    Science.gov (United States)

    Yu, Zili; Blaak, Sandra; Chang, Zu-yao; Yao, Jiajian; Bosch, Johan G; Prins, Christian; Lancée, Charles T; de Jong, Nico; Pertijs, Michiel A P; Meijer, Gerard C M

    2012-07-01

    There is a clear clinical need for creating 3-D images of the heart. One promising technique is the use of transesophageal echocardiography (TEE). To enable 3-D TEE, we are developing a miniature ultrasound probe containing a matrix piezoelectric transducer with more than 2000 elements. Because a gastroscopic tube cannot accommodate the cables needed to connect all transducer elements directly to an imaging system, a major challenge is to locally reduce the number of channels, while maintaining a sufficient signal-to-noise ratio. This can be achieved by using front-end receiver electronics bonded to the transducers to provide appropriate signal conditioning in the tip of the probe. This paper presents the design of such electronics, realizing time-gain compensation (TGC) and micro-beamforming using simple, low-power circuits. Prototypes of TGC amplifiers and micro-beamforming cells have been fabricated in 0.35-μm CMOS technology. These prototype chips have been combined on a printed circuit board (PCB) to form an ultrasound-receiver system capable of reading and combining the signals of three transducer elements. Experimental results show that this design is a suitable candidate for 3-D TEE.

  18. Front-end electronics and data acquisition system for imaging atmospheric Cherenkov telescopes

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Y.T., E-mail: chenytao@ynu.edu.cn [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Yunnan University, 650091 Kunming (China); La Taille, C. de [OMEGA (UMS 3605) - IN2P3/CNRS, Ecole Polytechnique, 91128 Palaiseau Cedex (France); Suomijärvi, T. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Cao, Z. [Institute of High Energy Physics, 100049 Beijing (China); Deligny, O. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Dulucq, F. [OMEGA (UMS 3605) - IN2P3/CNRS, Ecole Polytechnique, 91128 Palaiseau Cedex (France); Ge, M.M. [Yunnan University, 650091 Kunming (China); Lhenry-Yvon, I. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Martin-Chassard, G. [OMEGA (UMS 3605) - IN2P3/CNRS, Ecole Polytechnique, 91128 Palaiseau Cedex (France); Nguyen Trung, T.; Wanlin, E. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Xiao, G.; Yin, L.Q. [Institute of High Energy Physics, 100049 Beijing (China); Yun Ky, B. [Institut de Physique Nucléaire, IN2P3-CNRS, Université Paris-Sud, 91406 Orsay Cedex (France); Zhang, L. [Yunnan University, 650091 Kunming (China); Zhang, H.Y. [Tsinghua University, 100084 Beijing (China); Zhang, S.S.; Zhu, Z. [Institute of High Energy Physics, 100049 Beijing (China)

    2015-09-21

    In this paper, a front-end electronics based on an application-specific integrated circuit (ASIC) is presented for the future imaging atmospheric Cherenkov telescopes (IACTs). To achieve this purpose, a 16-channel ASIC chip, PARISROC 2 (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is used in the analog signal processing and digitization. The digitized results are sent to the server by a user-defined User Datagram Protocol/Internet Protocol (UDP/IP) hardcore engine through Ethernet that is managed by a FPGA. A prototype electronics fulfilling the requirements of the Wide Field of View Cherenkov Telescope Array (WFCTA) of the Large High Altitude Air Shower Observatory (LHAASO) project has been designed, fabricated and tested to prove the concept of the design. A detailed description of the development with the results of the test measurements are presented. By using a new input structure and a new configuration of the ASIC, the dynamic range of the circuit is extended. A highly precise-time calibrating algorithm is also proposed, verified and optimized for the mass production. The test results suggest that the proposed electronics design fulfills the general specification of the future IACTs.

  19. Fast front-end L0 trigger electronics for ALICE FMD-MCP tests and performance

    CERN Document Server

    Efimov, L G; Kasatkan, V; Klempt, W; Kuts, V; Lenti, V; Platanov, V; Rudge, A; Stolyarov, O I; Tsimbal, F A; Valiev, F F; Villalobos Baillie, O; Vinogradov, L I; Zhigunov, O

    1997-01-01

    We present design details and new measurements of the performance of fast electronics for the Forward Multiplicity Detector for ALICE. These detectors based on sector type Microchannel Plates (MCP) forming several disks gave the very first trigger decision in the experiment (L0). Fast passive summators integrated with the detectors are used for linear summation of up to eight isochronous signal channels from MCP pads belonging to one sector. Two types of microelectronics design thin film summators were produced. We present test results for these summators, working in the frequency range up to 1 Ghz. New low noise preamplifiers have been built to work with these summators. The new design shows a good performance with the usable frequency range extended up to 1 Ghz. An upgrade of the functional scheme for the L0 ALICE pre-trigger design is also presented.Abstract:List of figures Figure 1: ALICE L0 Trigger Front-End Electronics Functional Scheme. Figure 2: UHF design for a fast passive summator based on direct...

  20. Radiation induced Single Event Effects in the ATLAS MDT-ASD front-end chip

    CERN Document Server

    Posch, C

    2002-01-01

    Single Event Effect (SEE) tests of the MDT-ASD, the ATLAS MDT front-end chip have been performed at the Harvard Cyclotron Lab. The MDT-ASD is an 8-channel drift tube read-out ASIC fabricated in a commercial 0.5um CMOS process (AMOS14TB). The chip contains a 53 bit register which holds the setup information and an associated shift register of the same length plus some additional control logic. 10 test devices were exposed to a 160 MeV proton beam with a fluence of 1.05E9 p.cm-2.s-1 up to >4.4E p.cm-2 per device. After a total fluence of 4.46E13 p.cm-2, 7 soft SEEs (non-permanent bit flips in the registers) and 0 hard/destructive SEE (e.g. latch-ups, SEL) had occurred. The simulated fluence for 10 years of LHC operation at nominal luminosity for worst case location MDT components is 2.67E11 h.cm-2. The rate of SEUs in the ASD setup register for all of ATLAS, derived from these numbers, is 2.4 per day. It is foreseen to update the active registers of the on-detector electronics at regular intervals. Depending on...

  1. Front-end electronics for H.E.P

    International Nuclear Information System (INIS)

    Hrisoho, A.

    1990-07-01

    A simplified description of the front-end electronics used for High Energy Physics Detectors is given. A brief analysis of the speed limitation due to the time necessary for the detector charge transfer is given, which depends as well of the detector behaviour as of the preamplifier configuration. A description of the sample electronic circuits like differentiation, integration, pole zero circuit and preamplifier are given. Noise analysis is carried out to derive the relations for the equivalent noise signal for the measuring device with some description of practical noise measuring. The shaping of the signals to obtain an optimization for the noise is considered and some hints for shaping amplifier design, with a description of the noise weightling function for normal and time variant shaping are given

  2. Wide-band low-noise distributed front-end for multi-gigabit CPFSK receivers

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad; Ebskamp, F; Pedersen, Rune Johan Skullerud

    1994-01-01

    In this paper a distributed optical front-end amplifier for a coherent optical CPFSK receiver is presented. The measured average input noise current density is 20 pA/√(Hz) in a 3-13 GHz bandwidth. This is the lowest value reported for a distributed optical front-end in this frequency range....... The front-end is tested in a system set-up at a bit rate of 2.5 Gbit/s and a receiver sensitivity of -41.5 dBm is achieved at a 10-9 bit error rate...

  3. Test results of the front-end system for the Silicon Drift Detectors of ALICE

    CERN Document Server

    Mazza, G; Anelli, G; Martínez, M I; Rotondo, F; Tosello, F; Wheadon, R

    2001-01-01

    The front-end system of the Silicon Drift Detectors (SDDs) of the ALICE experiment is made of two ASICs. The first chip performs the preamplification, temporary analogue storage and analogue-to-digital conversion of the detector signals. The second chip is a digital buffer that allows for a significant reduction of the connection from the front-end module to the outside world. In this paper, the results achieved on the first complete prototype of the front-end system for the SDDs of ALICE are presented.

  4. Testing and commissioning of the LHCb Outer Tracker front-end electronic and a study for a background estimation in the decay B{sup 0}{sub s} {yields} J/{psi} {phi}; Tests und Inbetriebnahme der LHCb Outer Tracker Front-end Elektronik und eine Studie zur Abschaetzung des Untergrundes im Zerfall B{sup 0}{sub s} {yields} J/{psi} {phi}

    Energy Technology Data Exchange (ETDEWEB)

    Knopf, Jan

    2009-07-08

    The readout electronic of the LHCb outer tracker measures the drift time of a straw tube. The front-end electronic consists of three radiation hard chips. The ASDBLR preamplifier amplifies and discriminates the charge puls produced by the drift chamber. The OTIS-TDC chip measures the drift time every 25 ns on 32 detector channels. The generated data is send via an optical link with 1.6 GBit/s, making use of the GOL chip. The main part of this thesis is dedicated to the testing and commissioning of the outer tracker front-end electronic. Altogether three test systems were developed and operated. The first test system was built to thoroughly check the features of the OTIS-TDC chips on the wafer. The quality of the OTIS board and GOL-Aux board production was checked with another test system. The front-end electronic was also combined and tested to the LHCB readout chain. One of the main goals of the LHCb experiment is the measurement of the CP-violating phase {phi}{sub s}. It can be measured by using the golden decay mode B{sup 0}{sub s} {yields} J/{psi} {phi}. It is vital to have a good knowledge about the background for this decay in order to extract the phase. In this thesis a study was performed to overcome the current limitations due to low Monte-Carlo statistics in this area. (orig.)

  5. A digital Front-End and Readout MIcrosystem for calorimetry at LHC

    CERN Multimedia

    2002-01-01

    % RD-16 A Digital Front-End and Readout Microsystem for Calorimetry at LHC \\\\ \\\\Front-end signal processing for calorimetric detectors is essential in order to achieve adequate selectivity in the trigger function of an LHC experiment, with data identification and compaction before readout being required in the harsh, high rate environment of a high luminosity hadron machine. Other crucial considerations are the extremely wide dynamic range and bandwidth requirements, as well as the volume of data to be transferred to following stages of the trigger and readout system. These requirements are best met by an early digitalization of the detector information, followed by integrated digital signal processing and buffering functions covering the trigger latencies.\\\\ \\\\The FERMI (Front-End Readout MIcrosystem) is a digital implementation of the front-end and readout electronic chain for calorimeters. It is based on dynamic range compression, high speed A to D converters, a fully programmable pipeline/digital filter c...

  6. Installation and testing of the 112 boards for the front-end electronics.

    CERN Multimedia

    2006-01-01

    Installation and testing of the 112 boards for the front-end electronics. 28 boards are interconnected to a TPC type Readout Controller Unit trought the horizontal bus strips. The blue tubes are for the circulating cooling water.

  7. Desarrollo de un terminal punto de venta (TPV) : Arquitectura front-end con Angular2

    OpenAIRE

    López Jurado, Francisco Carlos

    2017-01-01

    Desarrollo de la arquitectura front-end para un terminal de punto de venta. Diseño y maquetación de las vistas de la aplicación. Implementación de todas las vistas, utilizando una arquitectura de componentes con Angular2. Definición de los endpoints del back-end que debe utilizar la capa front-end. Definición e implementación de los modelos de la capa front-end, que serán recibidos por la capa back-end como wrappers. Implantación de un plan de pruebas para la capa front-end, haciend...

  8. Computing challenges in the certification of ATLAS Tile Calorimeter front-end electronics during maintenance periods

    International Nuclear Information System (INIS)

    Solans, C; Carrió, F; Valero, A; Kim, H Y; Usai, G; Moreno, P; Reed, R; Sandrock, C; Ruan, X; Shalyugin, A; Schettino, V; Souza, J

    2014-01-01

    After two years of operation of the LHC, the ATLAS Tile calorimeter is undergoing a consolidation process of its front-end electronics. The certification is performed in the experimental area with a portable test-bench which is capable of controlling and reading out one front-end module through dedicated cables. This test-bench has been redesigned to improve the tests of the electronics functionality quality assessment of the data until the end of Phase I.

  9. Measurement of Design Process Front-End – Radical Innovation Approach

    DEFF Research Database (Denmark)

    Berg, Pekka; Pihlajamaa, Jussi; Hansen, Poul H. Kyvsgård

    2014-01-01

    The overall structure and the main characteristics of the future product are all decided in the front-end phase, which then strongly affects subsequent new product development activities. Recent studies indicate that these early front-end activities represent the most troublesome phase of the inn...... is flexible and can also be applied extensively to other purposes than manufacturing companies, like service sector, as well....

  10. Channelling and channelling radiation

    International Nuclear Information System (INIS)

    Soerensen, A.H.; Uggerhoej, E.

    1987-01-01

    The study of channelling phenomena has developed rapidly since the early 1960s and today channelling has found many applications. The radiation emitted by channelled megaelectronvolt and gigaelectronvolt electrons and positrons has been investigated extensively and the possibility of, for example, constructing intense tunable X- and γ-ray sources is being explored. Multi-gigaelectronvolt radiation and pair-creation processes in single crystals show similarities with strong-field effects and are of particular interest because of high production rates that persist far beyond the channelling regime. (author)

  11. Neural networks in front-end processing and control

    International Nuclear Information System (INIS)

    Lister, J.B.; Schnurrenberger, H.; Staeheli, N.; Stockhammer, N.; Duperrex, P.A.; Moret, J.M.

    1991-07-01

    Research into neural networks has gained a large following in recent years. In spite of the long term timescale of this Artificial Intelligence research, the tools which the community is developing can already find useful applications to real practical problems in experimental research. One of the main advantages of the parallel algorithms being developed in AI is the structural simplicity of the required hardware implementation, and the simple nature of the calculations involved. This makes these techniques ideal for problems in which both speed and data volume reduction are important, the case for most front-end processing tasks. In this paper we illustrate the use of a particular neural network known as the Multi-Layer Perceptron as a method for solving several different tasks, all drawn from the field of Tokamak research. We also briefly discuss the use of the Multi-Layer Perceptron as a non-linear controller in a feedback loop. We outline the type of problem which can be usefully addressed by these techniques, even before the large-scale parallel processing hardware currently under development becomes cheaply available. We also present some of the difficulties encountered in applying these networks. (author) 13 figs., 9 refs

  12. Neural networks in front-end processing and control

    International Nuclear Information System (INIS)

    Lister, J.B.; Schnurrenberger, H.; Staeheli, N.; Stockhammer, N.; Duperrex, P.A.; Moret, J.M.

    1992-01-01

    Research into neural networks has gained a large following in recent years. In spite of the long term timescale of this Artificial Intelligence research, the tools which the community is developing can already find useful applications to real practical problems in experimental research. One of the main advantages of the parallel algorithms being developed in AI is the structural simplicity of the required hardware implementation, and the simple nature of the calculations involved. This makes these techniques ideal for problems in which both speed and data volume reduction are important, the case for most front-end processing tasks. In this paper the authors illustrate the use of a particular neural network known as the Multi-Layer Perceptron as a method for solving several different tasks, all drawn from the field of Tokamak research. The authors also briefly discuss the use of the Multi-Layer Perceptron as a non-linear controller in a feedback loop. The authors outline the type of problem which can be usefully addressed by these techniques, even before the large-scale parallel processing hardware currently under development becomes cheaply available. The authors also present some of the difficulties encountered in applying these networks

  13. Front-End electronics configuration system for CMS

    CERN Document Server

    Gras, P; Funk, W; Gross, L; Vintache, D

    2001-01-01

    The four LHC experiments at CERN have decided to use a commercial SCADA (Supervisory Control And Data Acquisition) product for the supervision of their DCS (Detector Control System). The selected SCADA, which is therefore used for the CMS DCS, is PVSS II from the company ETM. This SCADA has its own database, which is suitable for storing conventional controls data such as voltages, temperatures and pressures. In addition, calibration data and FE (Front-End) electronics configuration need to be stored. The amount of these data is too large to be stored in the SCADA database [1]. Therefore an external database will be used for managing such data. However, this database should be completely integrated into the SCADA framework, it should be accessible from the SCADA and the SCADA features, e.g. alarming, logging should be benefited from. For prototyping, Oracle 8i was selected as the external database manager. The development of the control system for calibration constants and FE electronics configuration has bee...

  14. The control system for the CMS tracker front-end

    CERN Document Server

    Drouhin, F; Ljuslin, C; Maazouzi, C; Marchiero, A; Marinelli, N; Paillard, C; Siegrist, P; Tsirou, A L; Verdini, P G; Walsham, P; Zghiche, A

    2002-01-01

    The CMS Tracker uses complex, programmable embedded electronics for the readout of the Silicon sensors, for the control of the working point of the optical transmitters, for the phase adjustment of the 40 MHz LHC clock and for the monitoring of the voltages, currents and temperatures. In order to establish reliable, noise-free communication with the outside world the control chain has been designed to operate over a ribbon of optical fibers. The optical links, the Front End Controller board that carries their support electronics, the Clocking and Control Unit module receiving the signals over the high-speed link and fanning them out to the front- ends have recently become available. A multi-layered software architecture to handle these devices, and the front-ends, in a way transparent to the end-user, interfaced to an Oracle database for the retrieval of the parameters to be downloaded with the intent of building and operating a small-scale prototype of the control system for the CMS Tracker. The paper descri...

  15. Front-end electronics and trigger systems - status and challenges

    International Nuclear Information System (INIS)

    Spieler, Helmuth G; Spieler, Helmuth G

    2007-01-01

    The past quarter century has brought about a revolution in front-end electronics for large-scale detector systems. Custom integrated circuits specifically tailored to the requirements of large detector systems have provided unprecedented performance and enabled systems that once were deemed impossible. The evolution of integrated circuit readouts in strip detectors is summarized, the present status described, and challenges posed by the sLHC and ILC are discussed. Performance requirements increase, but key considerations remain as in the past: power dissipation, material, and services. Smaller CMOS feature sizes will not provide the required electronic noise at lower power, but will improve digital power efficiency. Significant improvements appear to be practical in more efficient power distribution. Enhanced digital electronics have provided powerful trigger processors that greatly improve the trigger efficiency. In data readout systems they also improve data throughput, while reducing power requirements. Concurrently with new developments in high energy physics, detector systems for cosmology and astrophysics have made great strides. As an example, a large-scale readout for superconducting bolometer arrays is described

  16. An open-loop front-end stage with signal compression capability and improved PSRR for mini-SDD pixel detectors

    Science.gov (United States)

    Grande, A.; Fiorini, C.; Erdinger, F.; Fischer, P.; Porro, M.

    2017-12-01

    In this work we present the design and the experimental characterization of a front-end stage for X-ray pixel sensors. Our study was carried out in the framework of the DSSC detector development for the European XFEL (X-ray Free Electron Laser). The DSSC detector is going to be used in photon science applications at the European XFEL GmbH in Hamburg, Germany, and must be able to cope with an image frame rate up to 4.5 MHz. Moreover, the single photon sensitivity and a dynamic range up to 104 photons/pixel/pulse, with a photon energy of 1 keV, is required at the same time. Therefore, to achieve these requirement the front-end must provide a non-linear amplification. The non-linear response is obtained with a simple circuit that pushes the input PMOSFET into triode region as the input signal increases. However, since the readout ASIC has more than 4000 channels operating in parallel, particular care was devoted to the robustness of the implemented solution, especially with respect to power supply rejection ratio and crosstalk among channels.

  17. NINO An ultra-fast and low-power front-end amplifier/discriminator ASIC designed for the multigap resistive plate chamber

    CERN Document Server

    Anghinolfi, F; Martemyanov, A N; Usenko, E; Wenninger, Horst; Williams, M C S; Zichichi, A

    2004-01-01

    For the full exploitation of the excellent timing properties of the Multigap Resistive Plate Chamber (MRPC), front-end electronics with special characteristics are needed. These are (a) differential input, to profit from the differential signal from the MRPC (b) a fast amplifier with less than 1 ns peaking time and (c) input charge measurement by Time-Over-Threshold for slewing correction. An 8- channel amplifier and discriminator chip has been developed to match these requirements. This is the NINO ASIC, fabricated with 0.25 omegam CMOS technology. The power requirement at 40mW/channel is low. Results on the performance of the MRPCs using the NINO ASIC are presented. Typical time resolution a of the MRPC system is in the 50 ps range, with an efficiency of 99.9%.

  18. Architecture and Implementation of the Front-End Electronics of the Time Projection Chambers in the T2K Experiment

    Science.gov (United States)

    Baron, P.; Besin, D.; Calvet, D.; Coquelet, C.; De La Broise, X.; Delagnes, E.; Druillole, F.; Le Coguie, A.; Monmarthe, E.; Zonca, E.

    2010-04-01

    The tracker of the near detector in the T2K neutrino oscillation experiment comprises three time projection chambers based on micro-pattern gaseous detectors. A new readout system is being developed to amplify, condition and acquire in real time the data produced by the 124.000 detector channels. The cornerstone of the system is a 72-channel application specific integrated circuit which is based on a switched capacitor array. Using analog memories combined with deferred digitization enables reducing the initial burstiness of traffic from 50 Tbps to 400 Gbps in a practical manner and with a very low power budget. Modern field programmable gate arrays coupled to commercial digital memories are the next elements in the chain. Multi-gigabit optical links provide 140 Gbps of aggregate bandwidth to carry data outside of the magnet surrounding the detector to concentrator cards that pack data and provide the interface to commercial PCs via a standard Gigabit Ethernet network. We describe the requirements and constraints for this application and justify our technical choices. We detail the design and the performance of several key elements and show the deployment of the front-end electronics on the first time projection chamber where the final tests before installation on-site are being conducted.

  19. The front-end electronics for the 1.8-kchannel SiPM tracking plane in the NEW detector

    International Nuclear Information System (INIS)

    Rodríguez, J.; Lorca, D.; Monrabal, F.; Toledo, J.; Esteve, R.

    2015-01-01

    NEW is the first phase of NEXT-100 experiment, an experiment aimed at searching for neutrinoless double-beta decay. NEXT technology combines an excellent energy resolution with tracking capabilities thanks to a combination of optical sensors, PMTs for the energy measurement and SiPMs for topology reconstruction. Those two tools result in one of the highest background rejection potentials in the field. This work describes the tracking plane that will be constructed for the NEW detector which consists of close to 1800 sensors with a 1-cm pitch arranged in twenty-eight 64-SiPM boards. Then it focuses in the development of the electronics needed to read the 1800 channels with a front-end board that includes per-channel differential transimpedance input amplifier, gated integrator, automatic offset voltage compensation and 12-bit ADC. Finally, a description of how the FPGA buffers data, carries out zero suppression and sends data to the DAQ interface using CERN RD-51 SRS's DTCC link specification complements the description of the electronics of the NEW detector tracking plane

  20. Fully Integrated Biopotential Acquisition Analog Front-End IC.

    Science.gov (United States)

    Song, Haryong; Park, Yunjong; Kim, Hyungseup; Ko, Hyoungho

    2015-09-30

    A biopotential acquisition analog front-end (AFE) integrated circuit (IC) is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA) to achieve low input referred noise (IRN) and to block unwanted DC potential signals. A DC servo loop (DSL) is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL) is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL) is designed to enhance the input impedance and common mode rejection ratio (CMRR) without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL) at each CCIA stage. The biopotential AFE is fabricated using a 0.18 μm one polysilicon and six metal layers (1P6M) complementary metal oxide semiconductor (CMOS) process. The core chip size of the AFE without input/output (I/O) pads is 10.5 mm². A fourth-order band-pass filter (BPF) with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 μVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions.

  1. Fully Integrated Biopotential Acquisition Analog Front-End IC

    Directory of Open Access Journals (Sweden)

    Haryong Song

    2015-09-01

    Full Text Available A biopotential acquisition analog front-end (AFE integrated circuit (IC is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA to achieve low input referred noise (IRN and to block unwanted DC potential signals. A DC servo loop (DSL is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL is designed to enhance the input impedance and common mode rejection ratio (CMRR without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL at each CCIA stage. The biopotential AFE is fabricated using a 0.18 μm one polysilicon and six metal layers (1P6M complementary metal oxide semiconductor (CMOS process. The core chip size of the AFE without input/output (I/O pads is 10.5 mm2. A fourth-order band-pass filter (BPF with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 μVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions.

  2. Realization of Miniaturized Multi-/Wideband Microwave Front-Ends

    Science.gov (United States)

    Al Shamaileh, Khair A.

    The ever-growing demand toward designing microwave front-end components with enhanced access to the radio spectrum (e.g., multi-/wideband functionality) and improved physical features (e.g., miniaturized circuitry, ease and cost of fabrication) is becoming more paramount than ever before. This dissertation proposes new design methodologies, simulations, and experimental validations of passive front-ends (i.e., antennas, couplers, dividers) at microwave frequencies. The presented design concepts optimize both electrical and physical characteristics without degrading the intended performance. The developed designs are essential to the upcoming wireless technologies. The first proposed component is a compact ultra-wideband (UWB) Wilkinson power divider (WPD). The design procedure is accomplished by replacing the uniform transmission lines in each arm of the conventional single-frequency divider with impedance-varying profiles governed by a truncated Fourier series. While such non-uniform transmission lines (NTLs) are obtained through the even-mode analysis, three isolation resistors are optimized in the odd-mode circuit to achieve proper isolation and output ports matching over the frequency range of interest. The proposed design methodology is systematic, and results in single-layered and compact structures. For verification purposes, an equal split WPD is designed, simulated, and measured. The obtained results show that the input and output ports matching as well as the isolation between the output ports are below --10 dB; whereas the transmission parameters vary between --3.2 dB and --5 dB across the 3.1--10.6 GHz band. The designed divider is expected to find applications in UWB antenna diversity, multiple-input-multiple-output (MIMO) schemes, and antenna arrays feeding networks. The second proposed component is a wideband multi-way Bagley power divider (BPD). Wideband functionality is achieved by replacing the single-frequency matching uniform microstrip lines in

  3. Custom single-photon avalanche diode with integrated front-end for parallel photon timing applications

    Science.gov (United States)

    Cammi, C.; Panzeri, F.; Gulinatti, A.; Rech, I.; Ghioni, M.

    2012-03-01

    Emerged as a solid state alternative to photo multiplier tubes (PMTs), single-photon avalanche diodes (SPADs) are nowadays widely used in the field of single-photon timing applications. Custom technology SPADs assure remarkable performance, in particular a 10 counts/s dark count rate (DCR) at low temperature, a high photon detection efficiency (PDE) with a 50% peak at 550 nm and a 30 ps (full width at half maximum, FWHM) temporal resolution, even with large area devices, have been obtained. Over the past few years, the birth of novel techniques of analysis has led to the parallelization of the measurement systems and to a consequent increasing demand for the development of monolithic arrays of detectors. Unfortunately, the implementation of a multidimensional system is a challenging task from the electrical point of view; in particular, the avalanche current pick-up circuit, used to obtain the previously reported performance, has to be modified in order to enable high parallel temporal resolution, while minimizing the electrical crosstalk probability between channels. In the past, the problem has been solved by integrating the front-end electronics next to the photodetector, in order to reduce the parasitic capacitances and consequently the filtering action on the current signal of the SPAD, leading to an improvement of the timing jitter at higher threshold. This solution has been implemented by using standard complementary metal-oxide-semiconductor (CMOS) technologies, which, however, do not allow a complete control on the SPAD structure; for this reason the intrinsic performance of CMOS SPADs, such as DCR, PDE, and afterpulsing probability, are worse than those attainable with custom detectors. In this paper, we propose a pixel architecture, which enables the development of custom SPAD arrays in which every channel maintains the performance of the best single photodetector. The system relies on the integration of the timing signal pick-up circuit next to the

  4. Control and Interlocking System for Bending Magnet Front-end at Indus-2

    Science.gov (United States)

    Kane, Sanjeev R.; Garg, Chander Kant; Nandedkar, R. V.

    2007-01-01

    We present control and interlock system developed for Indus-2 bending magnet front-end. The paper describes in detail the control of various signals associated with the front-end and the interlocking scheme implemented for the installed front-end. The number of signals associated with each front-end is ˜ 75. A control system is designed for monitoring temperature, pressure, airflow, water flow and control of vacuum gauges, fast shutter, water cooled shutter, safety shutter, pneumatic gate valves, sputter ion pump power supplies, beam position monitor etc. Two independent signals are generated for critical components that are used for software interlock and hard-wired interlock. The front-end control system is VME based and window 2000/XP workstation as an operator console. The CPU used is Motorola 68000-processor board of the VME bus having OS-9 real time operating system. One VME crate serves a cluster of 2-3 front ends. The communication between the VME and the workstation is linked over RS232 serial communication. The sputter ion power supplies are connected over isolated RS485 network. Critical protection features are implemented so that no single failure can render the system unsafe. This is implemented by providing two independent chains of protection (1) Hard wired in which relay logic is used and (2) Software. A Graphical User Interface (GUI) is developed using Lab view Version 7.0.

  5. SPIROC (SiPM Integrated Read-Out Chip) Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    Bouchel, Michel; Dulucq, Frédéric; Fleury, Julien; de La Taille, Christophe; Martin-Chassard, Gisèle; Raux, Ludovic

    2009-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  6. SPIROC (SiPM Integrated Read-Out Chip) Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    Bouchel, Michel; Fleury, Julien; de La Taille, Christophe; Martin-Chassard, Gisèle; Raux, Ludovic

    2007-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  7. Upgrade to the front-end electronics of the BESIII muon identification system

    International Nuclear Information System (INIS)

    Xi Jianbo; Liang Hao; Xiang Shitao

    2014-01-01

    Resistive Plate Chambers (RPCs) built from a new type of Bakelite developed at Institute of High Energy Physics (IHEP), Chinese Academy of Sciences have been used in the BESIII Muon identification system for several years without linseed oil coating, but characteristic aging performances were observed. To adapt to the RPCs in the aging state, the front-end electronics have been upgraded by enhancing the front-end protection, improving the threshold setting circuit, and separating power supplies of the comparator and the field programmable gate array (FPGA). Improvements in system stability, front-end protection and threshold consistency have been achieved. In this paper, the system upgrade and the test results are described in detail. (authors)

  8. LHCb calorimeter front-end electronics radiation dose and single event effects

    CERN Document Server

    Beigbeder-Beau, C; Charlet, D; Lefrançois, J; Machefert, F P; Tocut, V; Truong, K D

    2002-01-01

    The LHCb calorimeter front-end electronics will be located above the ECAL / HCAL, i.e. in a region which is not protected from radiations. We present here an estimation of the radiation effect for the electronics and the solutions we investigate to reduce it. Two irradiation tests of the calorimeter front-end shaper have been performed, in June 2001 at the Centre de Proton Thérapie (Orsay) and in December 2001 at GANIL (Caen). The results of the tests clearly show the satisfying resistance of the shaper to SEL.

  9. Hybrid circuit prototypes for the CMS Tracker upgrade front-end electronics

    International Nuclear Information System (INIS)

    Blanchot, G; Honma, A; Kovacs, M; Braga, D; Raymond, M

    2013-01-01

    New high-density interconnect hybrid circuits are under development for the CMS tracker modules at the HL-LHC. These hybrids will provide module connectivity between flip-chip front-end ASICs, strip sensors and a service board for the data transmission and powering. Rigid organic-based substrate prototypes and also a flexible hybrid design have been built, containing up to eight front-end flip chip ASICs. A description of the function of the hybrid circuit in the tracker, the first prototype designs, results of some electrical and mechanical properties from the prototypes, and examples of the integration of the hybrids into detector modules are presented

  10. A new approach to front-end electronics interfacing in the ATLAS experiment

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00015561; Borga, Andrea; Boterenbrood, Hendrik; Chen, Hucheng; Chen, Kai; Drake, Gary; Donszelmann, Mark; Francis, David; Gorini, Benedetto; Lanni, Francesco; Lehmann Miotto, Giovanna; Levinson, Lorne; Narevicius, Julia; Roich, Alexander; Ryu, Soo; Schreuder, Frans Philip; Schumacher, Jorn; Vandelli, Wainer; Vermeulen, Jos; Wu, Weihao; Zhang, Jinlong

    2016-01-01

    For new detector and trigger systems to be installed in the ATLAS experiment after LHC Run 2, a new approach will be followed for Front-End electronics interfacing. The FELIX (Front-End LInk eXchange) system will function as gateway connecting: on one side to detector and trigger electronics links, as well as providing timing and trigger (TTC) information; and on the other side a commodity switched network built using standard technology (either Ethernet or Infiniband). The new approach is described in this paper, and results achieved so far are presented.

  11. Tests und Inbetriebnahme der LHCb Outer Tracker Front-end Elektronik und eine Studie zur Abschätzung des Untergrundes im Zerfall $B^{0}_{s} \\to J\\Psi \\Phi$

    CERN Document Server

    Knopf, Jan

    2009-01-01

    The readout electronic of the LHCb outer tracker measures the drift time of a straw tube. The front-end electronic consists of three radiation hard chips. The ASDBLR preamplifier amplifies and discriminates the charge puls produced by the drift chamber. The OTIS-TDC chip measures the drift time every 25 ns on 32 detector channels. The generated data is send via an optical link with 1,6 GBit/s, making use of the GOL chip. The main part of this thesis is dedicated to the testing and commissioning of the outer tracker front-end electronic. Altogether three test systems were developed and operated. The first test system was built to thoroughly check the features of the OTIS-TDC chips on the wafer. The quality of the OTIS board and GOL-Aux board production was checked with another test system. The front-end electronic was also combined and tested to the LHCB readout chain. One of the main goals of the LHCb experiment is the measurement of the CP-violating phase Phi_s. It can be measured by using the golden decay m...

  12. Testing and commissioning of the LHCb Outer Tracker front-end electronic and a study for a background estimation in the decay B0s → J/ψ Φ

    International Nuclear Information System (INIS)

    Knopf, Jan

    2009-01-01

    The readout electronic of the LHCb outer tracker measures the drift time of a straw tube. The front-end electronic consists of three radiation hard chips. The ASDBLR preamplifier amplifies and discriminates the charge puls produced by the drift chamber. The OTIS-TDC chip measures the drift time every 25 ns on 32 detector channels. The generated data is send via an optical link with 1.6 GBit/s, making use of the GOL chip. The main part of this thesis is dedicated to the testing and commissioning of the outer tracker front-end electronic. Altogether three test systems were developed and operated. The first test system was built to thoroughly check the features of the OTIS-TDC chips on the wafer. The quality of the OTIS board and GOL-Aux board production was checked with another test system. The front-end electronic was also combined and tested to the LHCB readout chain. One of the main goals of the LHCb experiment is the measurement of the CP-violating phase Φ s . It can be measured by using the golden decay mode B 0 s → J/ψ Φ. It is vital to have a good knowledge about the background for this decay in order to extract the phase. In this thesis a study was performed to overcome the current limitations due to low Monte-Carlo statistics in this area. (orig.)

  13. Scintillating Fibre Tracker Front-End Electronics for LHCb upgrade

    CERN Multimedia

    Comerma, A

    2014-01-01

    The LHCb detector will be upgraded during the next LHC shutdown in 2018/19. The tracker system will undergo major changes. Its components will be replaced by new technologies in order to cope with the increased hit occupancy and the higher radiation dose. A detector made of scintillating fibres read out by silicon photomultipliers (SiPM) is envisaged for this upgrade. Even if this technology has proven to achieve high efficiency and spatial resolution, its integration within a LHC experiment bears new challenges. The detector will consist of 12 planes of 5 to 6 layers of 250μm fibres stacked covering a total area of 5x6m^2 . The desired spacial resolution on the reconstructed hit is 100μm. SiPMs have been adapted to the detector geometry reducing the dead area between channels. A total of 64 channels are arranged in a single die with common cathode connection and channel size of 0.23x1.32mm^2 . Two dies are packaged together with only 0.25mm of dead area between them. Radiation tolerance of such devices is ...

  14. POLARIS: ESA's airborne ice sounding radar front-end design, performance assessment and first results

    DEFF Research Database (Denmark)

    Hernández, Carlos Cilla; Krozer, Viktor; Vidkjær, Jens

    2009-01-01

    B noise figure, 160 ns receiver recovery time and -46 dBc 3rd order IMD products. The system comprises also, a digital front-end, a digital signal generator, a microstrip antenna array and a control unit. All the subsystems were integrated, certified and functionally tested, and in May 2008 a successful...

  15. Front-End Types. Automotive Mechanics. Steering & Suspension. Instructor's Guide [and] Student Guide.

    Science.gov (United States)

    Spignesi, B.

    This instructional package, one in a series of individualized instructional units on automotive steering and suspension, consists of a student guide and an instructor guide dealing with automobile front-end types. Covered in the module are three common types of passenger car front suspension systems and their major components as well as two types…

  16. Optical Module Front-End for a Neutrino Underwater Telescope PMT interface

    CERN Document Server

    Lo Presti, D; Caponetto, L

    2007-01-01

    A proposal for a new system to capture signals in the Optical Module (OM) of an Underwater Neutrino Telescope is described. It concentrates on the problem of power consumption in relation to precision. In particular, a solution for the interface between the photomultiplier (PMT) and the front-end electronics is presented.

  17. Front-end Electronics for Unattended Measurement (FEUM). Prototype Test Plan

    Energy Technology Data Exchange (ETDEWEB)

    Conrad, Ryan C.; Morris, Scott J.; Smith, Leon E.; Keller, Daniel T.

    2015-09-16

    The IAEA has requested that PNNL perform an initial set of tests on front-end electronics for unattended measurement (FEUM) prototypes. The FEUM prototype test plan details the tests to be performed, the criteria for evaluation, and the procedures used to execute the tests.

  18. Experimental demonstration of a scalable transmitter frontend technique in IMDD-OFDMA-PON upstream scheme

    Science.gov (United States)

    Ju, Cheng; Liu, Na; Wang, Dongdong; Zhang, Zhiguo; Chen, Xue

    2016-11-01

    Scalable transmitter frontend scheme is proposed to reduce the sampling rate of digital-to-analog converter (DAC) and the complexity of digital signal processing (DSP) in intensity modulation and direct detection (IMDD) OFDMA-PON upstream scenarios. The hardware cost of each ONU is substantially decreased. The feasibility of the proposed scheme is experimentally demonstrated.

  19. The ICARUS Front-end Preamplifier Working at Liquid Argon Temperature

    CERN Document Server

    Baibussinov, B; Casagrande, F; Cennini, P; Centro, S; Curioni, A; Meng, G; Picchi, P; Pietropaolo, F; Rubbia, C; Sergiampietri, F; Ventura, S

    2011-01-01

    We describe characteristics and performance of the low-noise front-end preamplifier used in the ICARUS 50-litre liquid Argon Time Projection Chamber installed in the CERN West Area Neutrino Facility during the 1997-98 neutrino runs. The preamplifiers were designed to work immersed in ultra-pure liquid Argon at a temperature of 87K.

  20. Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

    Science.gov (United States)

    Prele, D.

    2015-08-01

    As we have seen for digital camera market and a sensor resolution increasing to "megapixels", all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, "simple" and "efficient" techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described.

  1. Status on the development of front-end and readout electronics for ...

    Indian Academy of Sciences (India)

    Status on the development of front-end and readout electronics for large silicon trackers. J David M Dhellot J-F Genat F Kapusta H Lebbolo T-H Pham F Rossel A Savoy-Navarro E Deumens P Mallisse D Fougeron R Hermel Y Karyotakis S Vilalte. Tracking and Vertexing Volume 69 Issue 6 December 2007 pp 969-975 ...

  2. Compact Front-end Prototype for Next Generation RFI-rejecting Polarimetric L-band Radiometer

    DEFF Research Database (Denmark)

    Jensen, Brian Sveistrup; Søbjærg, Sten Schmidl; Skou, Niels

    2009-01-01

    Realizing the need for lower noise figure and smaller physical size in todays higly sensitive radiometers, this paper presents a new compact analog front-end (AFE) for use with the existing L-band (1400-1427 MHz) radiometer designed and operated by the Technical University of Denmark. Using subha...

  3. Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell

    DEFF Research Database (Denmark)

    Liscidini, Antonio; Mazzanti, Andrea; Tonietto, Riccardo

    2006-01-01

    This paper presents the first quadrature RF receiver front-end where, in a single stage, low-noise amplifier (LNA), mixer and voltage-controlled oscillator (VCO) share the same bias current. The new structure exploits the intrinsic mixing functionality of a classical LC-tank oscillator providing ...

  4. InP DHBT MMICs for millimeter-wave front-ends

    DEFF Research Database (Denmark)

    Johansen, Tom Keinicke; Hadziabdic, Dzenan; Krozer, Viktor

    2009-01-01

    In this paper, we show advanced MMIC's using InP DHBT technology. In particular, we demonstrate front-end circuits covering a broad frequency range from Q-band to E-band. Realizations of power amplifiers, quadrature VCOs, and sub-harmonic mixers, are presented and experimental results are discussed....

  5. A Low-Power Current-Reuse Analog Front-End for High-Density Neural Recording Implants.

    Science.gov (United States)

    Rezaei, Masoud; Maghsoudloo, Esmaeel; Bories, Cyril; De Koninck, Yves; Gosselin, Benoit

    2018-04-01

    Studying brain activity in vivo requires collecting bioelectrical signals from several microelectrodes simultaneously in order to capture neuron interactions. In this work, we present a new current-reuse analog front-end (AFE), which is scalable to very large numbers of recording channels, thanks to its small implementation silicon area and its low-power consumption. This current-reuse AFE, which is including a low-noise amplifier (LNA) and a programmable gain amplifier (PGA), employs a new fully differential current-mirror topology using fewer transistors, and improving several design parameters, such as power consumption and noise, over previous current-reuse amplifier circuit implementations. We show that the proposed current-reuse amplifier can provide a theoretical noise efficiency factor (NEF) as low as 1.01, which is the lowest reported theoretical NEF provided by an LNA topology. A foue-channel current-reuse AFE implemented in a CMOS 0.18-μm technology is presented as a proof-of-concept. T-network capacitive circuits are used to decrease the size of input capacitors and to increase the gain accuracy in the AFE. The measured performance of the whole AFE is presented. The total power consumption per channel, including the LNA and the PGA stage, is 9 μW (4.5 μW for LNA and 4.5 μW for PGA), for an input referred noise of 3.2 μV rms , achieving a measured NEF of 1.94. The entire AFE presents three selectable gains of 35.04, 43.1, and 49.5 dB, and occupies a die area of 0.072 mm 2 per channel. The implemented circuit has a measured inter-channel rejection ratio of 54 dB. In vivo recording results obtained with the proposed AFE are reported. It successfully allows collecting low-amplitude extracellular action potential signals from a tungsten wire microelectrode implanted in the hippocampus of a laboratory mouse.

  6. Cherenkov Ring Imaging Detector front-end electronics

    International Nuclear Information System (INIS)

    Antilogus, P.; Aston, D.; Bienz, T.; Bird, F.; Dasu, S.; Dunwoodie, W.; Hallewell, G.; Kawahara, H.; Kwon, Y.; Leith, D.; Marshall, D.; Muller, D.; Nagamine, T.; Oxoby, G.; Ratcliff, B.; Rensing, P.; Schultz, D.; Shapiro, S.; Simopoulos, C.; Solodov, E.; Suekane, F.; Toge, N.; Va'Vra, J.; Williams, S.; Wilson, R.J.; Whitaker, J.S.; Bean, A.; Caldwell, D.; Duboscq, J.; Huber, J.; Lu, A.; Mathys, L.; McHugh, S.; Morrison, R.; Witherell, M.; Yellin, S.; Coyle, P.; Coyne, D.; Spencer, E.; d'Oliveira, A.; Johnson, R.A.; Martinez, J.; Nussbaum, M.; Santha, A.K.S.; Shoup, A.; Stockdale, I.; Jacques, P.; Plano, R.; Stamer, P.; Abe, K.; Hasegawa, K.; Yuta, H.

    1990-10-01

    The SLD Cherenkov Ring Imaging Detector use a proportional wire detector for which a single channel hybrid has been developed. It consists of a preamplifier, gain selectable amplifier, load driver amplifier, power switching, and precision calibrator. For this hybrid, a bipolar, semicustom integrated circuit has been designed which includes video operational amplifiers for two of the gain stages. This approach allows maximization of the detector volume, allows DC coupling, and enables gain selection. System tests show good noise performance, calibration precision, system linearity, and signal shape uniformity over the full dynamic range. 10 refs., 8 figs

  7. A new design for multi-channel charge to digit conversion

    International Nuclear Information System (INIS)

    Li Yong; Ai Zhujun; Su Hong; Peng Yu

    2007-01-01

    In order to improve the performance and decrease the cost of the front-end electronics readout system of the Neutron Wall Detector, a new multi-channel charge to digit conversion (QDC) circuit designed by us is introduced briefly in this paper, which mainly consists of 32 channels QAC, a judgment circuit and a A/D converter. Since new ways and new devices are adopted, the circuit features high speed of conversion, good linear, low power consumption and low cost. The multi-channel QDC circuit we developed can be widely used in nuclear measurement system of physics experiment with large-scale detector array to form front-end electronics of data acquisition system. (authors)

  8. A Micromechanical RF Channelizer

    Science.gov (United States)

    Akgul, Mehmet

    The power consumption of a radio generally goes as the number and strength of the RF signals it must process. In particular, a radio receiver would consume much less power if the signal presented to its electronics contained only the desired signal in a tiny percent bandwidth frequency channel, rather than the typical mix of signals containing unwanted energy outside the desired channel. Unfortunately, a lack of filters capable of selecting single channel bandwidths at RF forces the front-ends of contemporary receivers to accept unwanted signals, and thus, to operate with sub-optimal efficiency. This dissertation focuses on the degree to which capacitive-gap transduced micromechanical resonators can achieve the aforementioned RF channel-selecting filters. It aims to first show theoretically that with appropriate scaling capacitive-gap transducers are strong enough to meet the needed coupling requirements; and second, to fully detail an architecture and design procedure needed to realize said filters. Finally, this dissertation provides an actual experimentally demonstrated RF channel-select filter designed using the developed procedures and confirming theoretical predictions. Specifically, this dissertation introduces four methods that make possible the design and fabrication of RF channel-select filters. The first of these introduces a small-signal equivalent circuit for parallel-plate capacitive-gap transduced micromechanical resonators that employs negative capacitance to model the dependence of resonance frequency on electrical stiffness in a way that facilitates the analysis of micromechanical circuits loaded with arbitrary electrical impedances. The new circuit model not only correctly predicts the dependence of electrical stiffness on the impedances loading the input and output electrodes of parallel-plate capacitive-gap transduced micromechanical device, but does so in a visually intuitive way that identifies current drive as most appropriate for

  9. FELIX: The New Approach for Interfacing to Front-end Electronics for the ATLAS Experiment

    CERN Document Server

    AUTHOR|(SzGeCERN)754725; The ATLAS collaboration; Anderson, John Thomas; Borga, Andrea; Boterenbrood, Hendrik; Chen, Hucheng; Chen, Kai; Drake, Gary; Donszelmann, Mark; Francis, David; Gorini, Benedetto; Guest, Daniel; Lanni, Francesco; Lehmann Miotto, Giovanna; Levinson, Lorne; Roich, Alexander; Schreuder, Frans Philip; Schumacher, J\\"orn; Vandelli, Wainer; Zhang, Jinlong

    2016-01-01

    From the ATLAS Phase-I upgrade and onward, new or upgraded detectors and trigger systems will be interfaced to the data acquisition, detector control and timing (TTC) systems by the Front-End Link eXchange (FELIX). FELIX is the core of the new ATLAS Trigger/DAQ architecture. Functioning as a router between custom serial links and a commodity network, FELIX is implemented by server PCs with commodity network interfaces and PCIe cards with large FPGAs and many high speed serial fiber transceivers. By separating data transport from data manipulation, the latter can be done by software in commodity servers attached to the network. Replacing traditional point-to-point links between Front-end components and the DAQ system by a switched network, FELIX provides scaling, flexibility uniformity and upgradability and reduces the diversity of custom hardware solutions in favour of software.

  10. Development of front-end electronics and TDC LSI for the ATLAS MDT

    CERN Document Server

    Arai, Y

    2000-01-01

    Architecture of the front-end electronics for the ATLAS muon precision chamber (MDT) is presented. Especially, test results of a prototype TDC chip are described in detail. The chip was fabricated in a 0.3 mu m CMOS gate-array technology. Measurements of critical elements of the chip such as the PLL, and data buffering circuits demonstrated adequate performance. The effect of gamma-ray irradiation, using a /sup 60/Co source, and neutron irradiation, were also examined. The test results revealed radiation tolerance adequate for the operation of the circuits in the environment of the ATLAS MDT. Mounting of the front-end electronics to the MDT is scheduled to start in the year 2001. (10 refs).

  11. An ASIC implementation of digital front-end electronics for a high resolution PET scanner

    International Nuclear Information System (INIS)

    Newport, D.F.; Young, J.W.

    1993-01-01

    AN Application Specific Integrated Circuit (ASIC) has been designed and fabricated which implements many of the current functions found in the digital front-end electronics for a high resolution Positron Emission Tomography (PET) scanner. The ASIC performs crystal selection, energy qualification, time correction, and event counting functions for block technology high resolution PET scanners. Digitized x and y position, event energy, and time information are used by the ASIC to determine block crystal number, qualify the event based on energy, and correct the event time. In addition, event counting and block dead time calculations are performed for system dead time corrections. A loadable sequencer for controlling the analog front-end electronics is also implemented. The ASIC is implemented in a 37,000 gate, 1.0 micron CMOS gate-array and is capable of handling 4 million events/second while reducing parts count, cost, and power consumption over current board-level designs

  12. Towards a new perspective of managing ideas in front-end innovation as actor networks

    DEFF Research Database (Denmark)

    Vagn, Anna Rose; Clausen, Christian; Gish, Liv

    2013-01-01

    been identified as front-end innovation processes. The front-end innovation is distinguished from linear product development and characterised as more informal, unstructured, and unpredictable. This paper presents the preliminary results of a PhD project concerning idea management in front......For decades the innovation process in R&D organisations has been discussed. Product development processes is well-established in R&D organisations and improvements has been implemented through theories as Lean product development and agile methods. In recent decades, more diffuse processes have......-end innovation of R&D organisations. Through theoretical and empirical investigations of managing activities of idea processes an indicative analysis in the perspective of actor network theory is performed. The analysis show how managers and employees navigate in a complex environment of organisational...

  13. Complementary bipolar application specific analog semicustom array, intended to implement front-end units

    CERN Document Server

    Atkin, E; Kondratenko, S; Maslennikov, V; Meshcheriakov, V; Mishin, Yu; Volkov, Yu

    2002-01-01

    The structure of an analog semicustom array, intended to implement front-end electronics ICs on its basis, is considered. The features of this array are: implementation with an inexpensive bipolar process despite containing an equal number of NPN and PNP structures with well matched characteristics, supply voltages from 1.5 V to 15 V, transistor current gains Bst~100 and unity gain frequencies Ft > 3 GHz at collector currents of (100...300) mu A, high- and low-ohmic resistors, MOS capacitors, minimum two variable plating levels available. Specific circuit diagrams and parameters of the front-end electronics ICs, created on the basis of the considered array, are presented. The results of their tests are given. (4 refs).

  14. Mitigating RF Front-End Nonlinearity of Sensor Nodes to Enhance Spectrum Sensing

    Directory of Open Access Journals (Sweden)

    Lin Hu

    2016-11-01

    Full Text Available The cognitive radio wireless sensor network (CR-WSN has gained worldwide attention in recent years for its potential applications. Reliable spectrum sensing is the premise for opportunistic access to sensor nodes. However, as a result of the radio frequency (RF front-end nonlinearity of sensor nodes, distortion products can easily degrade the spectrum sensing performance by causing false alarms and degrading the detection probability. Given the limitations of the widely-used adaptive interference cancellation (AIC algorithm, this paper develops several details to avoid these limitations and form a new mitigation architecture to alleviate nonlinear distortions. To demonstrate the efficiency of the proposed algorithm, verification tests for both simulations and actual RF front-end measurements are presented and discussed. The obtained results show that distortions can be suppressed significantly, thus improving the reliability of spectrum sensing. Moreover, compared to AIC, the proposed algorithm clearly shows better performance, especially at the band edges of the interferer signal.

  15. DSP-based Mitigation of RF Front-end Non-linearity in Cognitive Wideband Receivers

    Science.gov (United States)

    Grimm, Michael; Sharma, Rajesh K.; Hein, Matthias A.; Thomä, Reiner S.

    2012-09-01

    Software defined radios are increasingly used in modern communication systems, especially in cognitive radio. Since this technology has been commercially available, more and more practical deployments are emerging and its challenges and realistic limitations are being revealed. One of the main problems is the RF performance of the front-end over a wide bandwidth. This paper presents an analysis and mitigation of RF impairments in wideband front-ends for software defined radios, focussing on non-linear distortions in the receiver. We discuss the effects of non-linear distortions upon spectrum sensing in cognitive radio and analyse the performance of a typical wideband software-defined receiver. Digital signal processing techniques are used to alleviate non-linear distortions in the baseband signal. A feed-forward mitigation algorithm with an adaptive filter is implemented and applied to real measurement data. The results obtained show that distortions can be suppressed significantly and thus increasing the reliability of spectrum sensing.

  16. Development and Demonstration of a Magnesium-Intensive Vehicle Front-End Substructure

    Energy Technology Data Exchange (ETDEWEB)

    Logan, Stephen D. [United States Automotive Materials Partnership LLC, Southfield, MI (United States); Forsmark, Joy H. [United States Automotive Materials Partnership LLC, Southfield, MI (United States); Osborne, Richard [United States Automotive Materials Partnership LLC, Southfield, MI (United States)

    2016-07-01

    This project is the final phase (designated Phase III) of an extensive, nine-year effort with the objectives of developing a knowledge base and enabling technologies for the design, fabrication and performance evaluation of magnesium-intensive automotive front-end substructures intended to partially or completely replace all-steel comparators, providing a weight savings approaching 50% of the baseline. Benefits of extensive vehicle weight reduction in terms of fuel economy increase, extended vehicle range, vehicle performance and commensurate reductions in greenhouse gas emissions are well known. An exemplary vehicle substructure considered by the project is illustrated in Figure 1, along with the exterior vehicle appearance. This unibody front-end “substructure” is one physical objective of the ultimate design and engineering aspects established at the outset of the larger collective effort.

  17. Test system for the production of the Atlas Tile Calorimeter front-end electronics

    International Nuclear Information System (INIS)

    Calvet, David

    2004-01-01

    The Atlas hadronic Tile Calorimeter front-end electronics is fully included in the so-called 'super-drawers'. The 256 super-drawers needed for the entire calorimeter are assembled and extensively tested in Clermont-Ferrand before being sent to CERN to be inserted in the calorimeter modules. A mobile system has been developed to perform a complete test of the super-drawers during their insertion

  18. Design and characterization of integrated front-end transistors in a micro-strip detector technology

    International Nuclear Information System (INIS)

    Simi, G.; Angelini, C.; Batignani, G.; Bettarini, S.; Bondioli, M.; Boscardin, M.; Bosisio, L.; Dalla Betta, G.-F.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Morganti, M.; U. Pignatel, G.; Ratti, L.; Re, V.; Rizzo, G.; Speziali, V.; Zorzi, N.

    2002-01-01

    We present the developments in a research program aimed at the realization of silicon micro-strip detectors with front-end electronics integrated in a high resistivity substrate to be used in high-energy physics, space and medical/industrial imaging applications. We report on the fabrication process developed at IRST (Trento, Italy), the characterization of the basic wafer parameters and measurements of the relevant working characteristics of the integrated transistors and related test structures

  19. Transmitter Systems and Bidirectional RF Front-End for Millimeter-Wave Communications

    OpenAIRE

    Wu, Po-Yi

    2015-01-01

    In this dissertation, millimeter-wave transmitter systems and a bidirectional transceiver front-end circuit are presented. To reach high data rate for next generation communication systems, complex modulation schemes such as QAM are necessary to take advantage of the signal bandwidth. In a transmitter system, higher-order QAM not only requires the PA to operate in linear region, while the output power and efficiency are maintained, but also requires the calibrations for the modulator to minim...

  20. Front-end electronics for accurate energy measurement of double beta decays

    International Nuclear Information System (INIS)

    Gil, A.; Díaz, J.; Gómez-Cadenas, J.J.; Herrero, V.; Rodriguez, J.; Serra, L.; Toledo, J.; Esteve, R.; Monzó, J.M.; Monrabal, F.; Yahlali, N.

    2012-01-01

    NEXT, a double beta decay experiment that will operate in Canfranc Underground Laboratory (Spain), aims at measuring the neutrinoless double-β decay of the 136Xe isotope using a TPC filled with enriched Xenon gas at high pressure operated in electroluminescence mode. One technological challenge of the experiment is to achieve resolution better than 1% in the energy measurement using a plane of UV sensitive photomultipliers readout with appropriate custom-made front-end electronics. The front-end is designed to be sensitive to the single photo-electron to detect the weak primary scintillation light produced in the chamber, and also to be able to cope with the electroluminescence signal (several hundred times higher and with a duration of microseconds). For efficient primary scintillation detection and precise energy measurement of the electroluminescent signals the front-end electronics features low noise and adequate amplification. The signal shaping provided allows the digitization of the signals at a frequency as low as 40 MHz.

  1. The new front-end electronics for the ATLAS Tile Calorimeter Phase 2 Upgrade

    Science.gov (United States)

    Gomes, A.

    2016-02-01

    We present the plans, design, and performance results to date for the new front-end electronics being developed for the Phase 2 Upgrade of the ATLAS Tile Calorimeter. The front-end electronics will be replaced to address the increased luminosity at the HL-LHC around 2025, as well as to upgrade to faster, more modern components with higher radiation tolerance. The new electronics will operate dead-timelessly, pushing full data sets from each beam crossing to the data acquisition system that resides off-detector. The new on-detector electronics contains five main parts: the front-end boards that connect directly to the photomultiplier tubes; the Main Boards that digitize the data; the Daughter Boards that collect the data streams and contain the high speed optical communication links for writing data to the data acquisition system; a programmable high voltage control system; and a new low voltage power supply. There are different options for implementing these subcomponents, which will be described. The new system contains new features that in the current version include power system redundancy, data collection redundancy, data transmission redundancy with 2 QSFP optical transceivers and Kintex-7 FPGAs with firmware enhanced scheme for single event upset mitigation. To date, we have built a Demonstrator—a fully functional prototype of the new system. Performance results and plans are presented.

  2. 40-80 MHZ MUON front-end for the Neutrino factory design study

    CERN Document Server

    Prior, G; Alexandri, A E

    2011-01-01

    To understand better the neutrino properties, machines able to produce 1021 neutrinos per year have to be built. One of the proposed machines is called the neutrino factory. In this scenario, muons produced by the decay of pions coming from the interaction of a proton beam onto a target are accelerated to energies of several GeV and injected in a storage ring where they will decay in neutrinos. The so-called front-end section of the neutrino factory is conceived to reduce the transverse divergence of the muon beam and to adapt its temporal structure to the acceptance of the downstream accelerator to minimize losses. We present a re-evaluation of the muon front-end scenario which used 40-80 MHz radio-frequency (RF) cavities capturing one sign at a time in a single-bunch to bucket mode. The standard software environment of the International Design Study for the Neutrino Factory (IDS-NF) has been used, for comparison of its performance with the IDS-NF baseline front-end design which operates with higher frequen...

  3. Web-based DAQ systems: connecting the user and electronics front-ends

    International Nuclear Information System (INIS)

    Lenzi, Thomas

    2016-01-01

    Web technologies are quickly evolving and are gaining in computational power and flexibility, allowing for a paradigm shift in the field of Data Acquisition (DAQ) systems design. Modern web browsers offer the possibility to create intricate user interfaces and are able to process and render complex data. Furthermore, new web standards such as WebSockets allow for fast real-time communication between the server and the user with minimal overhead. Those improvements make it possible to move the control and monitoring operations from the back-end servers directly to the user and to the front-end electronics, thus reducing the complexity of the data acquisition chain. Moreover, web-based DAQ systems offer greater flexibility, accessibility, and maintainability on the user side than traditional applications which often lack portability and ease of use. As proof of concept, we implemented a simplified DAQ system on a mid-range Spartan6 Field Programmable Gate Array (FPGA) development board coupled to a digital front-end readout chip. The system is connected to the Internet and can be accessed from any web browser. It is composed of custom code to control the front-end readout and of a dual soft-core Microblaze processor to communicate with the client.

  4. The New Front-End Electronics for the ATLAS Tile Calorimeter Phase 2 Upgrade

    CERN Document Server

    Drake, Gary; The ATLAS collaboration

    2015-01-01

    We present the plans, design, and performance results to date ofor the new front-end electronics being developed for the Phase 2 Upgrade of the ATLAS Tile Calorimeter. The front-end electronics will be replaced to address the increase in beam energy and luminosity planned for the LHC around 2023, as well as to upgrade to faster, more modern components with higher radiation tolerance. The new electronics will operate dead-timelessly, pushing full data sets from each beam crossing to the data acquisition system that resides off-detector in the USA15 counting room. The new electronics contains five main parts: the front-end boards that connect directly to the photo-multiplier tubes; the Main Boards that digitize the data; the Daughter Boards that collect the data streams and contain the high-speed optical communication links for writing data to the data acquisition system; a programmable high voltage control system; and a new low-voltage power supply. There are different options for implementing these subcompone...

  5. Front-End Electronics in calorimetry: from LHC to ILC

    International Nuclear Information System (INIS)

    De La Taille, Ch.

    2009-09-01

    This report summarizes the electronics developments for liquid argon calorimeter read-out at LHC and the development carried out in the framework of the CALICE collaboration for those of the future linear collider (ILC). It also includes chips designed for multi-anode photomultipliers (MaPMT) used in the OPERA experiment or on ATLAS luminometer, which also find applications in medical imaging. Started in the early 90's, the development for ATLAS calorimetry was extremely challenging in terms of readout speed, radiation tolerance and measurement accuracy. The high speed has required a new approach using current-sensitive preamplifiers instead of charge sensitive ones and the redefinition of noise performance in terms of ENI. The preamplifiers developed at Orsay and the monolithic shapers are described in Chapter 1, including considerations of digital filtering, which was a new technique in our field. Chapter 2 is dedicated to the calibration system, designed and built by Orsay, for which the high performance and accuracy necessitated in-depth studies. The 3. chapter closes the studies for ATLAS with a summary of the detector measurements which had to be carried out on the 200 000 channels in order to understand and model the detector and achieve everywhere the accuracy and uniformity at per-cent level. These developments for ATLAS ended in 2004, although parallel work was also carried out for the NA48 and DO calorimeters which are not detailed here. The next generation of collider will require a new generation of calorimeters, much more granular, referred to as 'imaging calorimetry' with embedded read-out electronics. The ASICs developed for this purpose in the framework of the CALICE collaboration are described in Chapter 4. They integrate all the functionalities of amplification, digitization and read-out making them complex 'System-On-Chip' circuits extremely efficient that find many other applications. A family of 3 chips reads out the Si-W electromagnetic

  6. Development and characterisation of a front-end ASIC for macro array of photo-detectors of large dimensions

    International Nuclear Information System (INIS)

    Conforti Di Lorenzo, S.

    2010-10-01

    The coverage of large areas of photo-detection is a crucial element of experiments studying high energy atmospheric cosmic showers and neutrinos from different sources. The objective of this project is to realize big detectors using thousands of photomultipliers (PMT). The project proposes to segment the large surface of photo-detection into macro pixels consisting of an array of 16 PMT of 12 inches (2*2 m 2 ), connected to an autonomous front-end electronics which works in without-trigger data acquisition mode placed near the array. This is possible thanks to the microelectronics progress that allows to integrate the readout and the signal processing, of all the multipliers, in the same circuit (ASIC) named PARISROC (Photomultiplier Array Integrated ins SiGe Read Out Chip). The ASIC must only send out the digital data by network to the surface central data storage. The PARISROC chip made in AM's Silicon Germanium (SiGe) 0.35 μm technology, integrates 16 independent channels for each PMT of the array, providing charge and time measurements. The first prototype of PARISROC chip has a total surface of 19 mm 2 . The ASIC measurements have led to the realization of a second prototype. Important measurements were performed in terms of noise, dynamic range, readout frequency (from 10 MHz to 40 MHz), time measurements (TDC improvements) and charge measurements (Slow shaper improvements). This new prototype of PARISROC-2 has been tested and the characterisation has shown a good overall behavior and the verification of the improvements. (author)

  7. Development of the control system of the ALICE transition radiation detector and of a test environment for quality-assurance of its front-end electronics

    International Nuclear Information System (INIS)

    Mercado Perez, Jorge

    2008-01-01

    Within this thesis, the detector control system (DCS) for the Transition Radiation Detector (TRD) of the ALICE experiment at the Large Hadron Collider has been developed. The TRD DCS is fully implemented as a detector oriented hierarchy of objects behaving as finite state machines. It controls and monitors over 65 thousand front-end electronics (FEE) units, a few hundred low voltage and one thousand high voltage channels, and other sub-systems such as cooling and gas. Commissioning of the TRD DCS took place during several runs with ALICE using cosmic events. Another part of this thesis describes the development of a test environment for large-scale production quality-assurance of over 4 thousand FEE read-out boards containing in total about 1.2 million read-out channels. The hardware and software components are described in detail. Additionally, a series of performance studies were carried out earlier including radiation tolerance tests of the TRAP chip which is the core component of the TRD FEE. (orig.)

  8. Development of the control system of the ALICE Transition Radiation Detector and of a test environment for quality-assurance of its front-end electronics

    CERN Document Server

    Mercado Pérez, Jorge

    2008-01-01

    Within this thesis, the detector control system (DCS) for the Transition Radiation Detector (TRD) of the ALICE experiment at the Large Hadron Collider has been developed. The TRD DCS is fully implemented as a detector oriented hierarchy of objects behaving as finite state machines. It controls and monitors over 65 thousand front-end electronics (FEE) units, a few hundred low voltage and one thousand high voltage channels, and other sub-systems such as cooling and gas. Commissioning of the TRD DCS took place during several runs with ALICE using cosmic events. Another part of this thesis describes the development of a test environment for large-scale production quality-assurance of over 4 thousand FEE read-out boards containing in total about 1.2 million read-out channels. The hardware and software components are described in detail. Additionally, a series of performance studies were carried out earlier including radiation tolerance tests of the TRAP chip which is the core component of the TRD FEE.

  9. Development of the control system of the ALICE transition radiation detector and of a test environment for quality-assurance of its front-end electronics

    Energy Technology Data Exchange (ETDEWEB)

    Mercado Perez, Jorge

    2008-11-10

    Within this thesis, the detector control system (DCS) for the Transition Radiation Detector (TRD) of the ALICE experiment at the Large Hadron Collider has been developed. The TRD DCS is fully implemented as a detector oriented hierarchy of objects behaving as finite state machines. It controls and monitors over 65 thousand front-end electronics (FEE) units, a few hundred low voltage and one thousand high voltage channels, and other sub-systems such as cooling and gas. Commissioning of the TRD DCS took place during several runs with ALICE using cosmic events. Another part of this thesis describes the development of a test environment for large-scale production quality-assurance of over 4 thousand FEE read-out boards containing in total about 1.2 million read-out channels. The hardware and software components are described in detail. Additionally, a series of performance studies were carried out earlier including radiation tolerance tests of the TRAP chip which is the core component of the TRD FEE. (orig.)

  10. Ion channeling

    International Nuclear Information System (INIS)

    Erramli, H.; Blondiaux, G.

    1994-01-01

    Channeling phenomenon was predicted, many years ago, by stark. The first channeling experiments were performed in 1963 by Davies and his coworkers. Parallely Robinson and Oen have investigated this process by simulating trajectories of ions in monocrystals. This technique has been combined with many methods like Rutherford Backscattering Spectrometry (R.B.S.), Particles Induced X-rays Emission (P.I.X.E) and online Nuclear Reaction (N.R.A.) to localize trace elements in the crystal or to determine crystalline quality. To use channeling for material characterization we need data about the stopping power of the incident particle in the channeled direction. The ratios of channeled to random stopping powers of silicon for irradiation in the direction have been investigated and compared to the available theoretical results. We describe few applications of ion channeling in the field of materials characterization. Special attention is given to ion channeling combined with Charged Particle Activation Analysis (C.P.A.A.) for studying the behaviour of oxygen atoms in Czochralski silicon lattices under the influence of internal gettering and in different gaseous atmospheres. Association between ion channeling and C.P.A.A was also utilised for studying the influence of the growing conditions on concentration and position of carbon atoms at trace levels in the MOVPE Ga sub (1-x) Al sub x lattice. 6 figs., 1 tab., 32 refs. (author)

  11. Testing of the Front-End Hybrid Circuits for the CMS Tracker Upgrade

    CERN Document Server

    Gadek, Tomasz; Honma, Alan; Kovacs, Mark Istvan; Raymond, David Mark; Rose, Pierre

    2017-01-01

    The upgrade of the CMS tracker for the HL-LHC requires the design of new double-sensor, silicon detector modules, which implement Level 1 trigger functionality in the increased luminosity environment. These new modules will contain two different, high density front-end hybrid circuits, equipped with flip-chip ASICs, auxiliary electronic components and mechanical structures. The hybrids require qualification tests before they are assembled into modules. Test methods are proposed together with the corresponding test hardware and software. They include functional tests and signal injection in a cold environment to find possible failure modes of the hybrids under real operating conditions.

  12. Computer Aided Design of Microwave Front-End Components and Antennas for Ultrawideband Systems

    Science.gov (United States)

    Almalkawi, Mohammad J.

    This dissertation contributes to the development of novel designs, and implementation techniques for microwave front-end components and packaging employing both transmission line theory and classical circuit theory. For compact realization, all the presented components have been implemented using planar microstrip technology. Recently, there has been an increase in the demand for compact microwave front-ends which exhibit advanced functions. Under this trend, the development of multiband front-end components such as antennas with multiple band-notches, dual-band microwave filters, and high-Q reconfigurable filters play a pivotal role for more convenient and compact products. Therefore, the content of this dissertation is composed of three parts. The first part focuses on packaging as an essential process in RF/microwave integration that is used to mitigate unwanted radiations or crosstalk due to the connection traces. In printed circuit board (PCB) interconnects, crosstalk reduction has been achieved by adding a guard trace with/without vias or stitching capacitors that control the coupling between the traces. In this research, a new signal trace configuration to reduce crosstalk without adding additional components or guard traces is introduced. The second part of this dissertation considers the inherent challenges in the design of multiple-band notched ultrawideband antennas that include the integration of multilayer antennas with RF front-ends and the realization of compact size antennas. In this work, a compact UWB antenna with quad band-notched frequency characteristics was designed, fabricated, and tested demonstrating the desired performance. The third part discusses the design of single- and dual-band dual-mode filters exhibiting both symmetric and asymmetric transfer characteristics. In dual-mode filters, the numbers of resonators that determine the order of a filter are reduced by half while maintaining the performance of the actual filter order. Here, in

  13. A front-end ASIC for ionising radiation monitoring with femto-amp capabilities

    International Nuclear Information System (INIS)

    Voulgari, E.; Noy, M.; Anghinolfi, F.; Perrin, D.; Krummenacher, F.; Kayal, M.

    2016-01-01

    An ultra-low leakage current Application Specific Integrated Circuit (ASIC) called Utopia (Ultralow Picoammeter) has been designed and fabricated in AMS 0.35 μm CMOS, in order to be used as the front-end for ionising radiation monitoring at CERN. It is based on the topology of a Current to Frequency Converter (CFC) through charge balancing and demonstrates a wide dynamic range of 8.5 decades without range changing. Due to a design aimed at minimising input leakage currents, input currents as low as 01 fA can be measured

  14. Front-end development and multi-language implementation on Magento Platform

    OpenAIRE

    Lai, Chenjia

    2015-01-01

    Magento is a smart platform for E-commerce solutions. Aseanic Trading Oy plans to develop a website based on the Magento platform. The purpose of this project is to develop an E-commerce platform for middle and small companies, to improve product management, and to increase a company’s profit. This project is developed based on the Magento platform. The backend of the Magento platform uses PHP language, while the frontend uses DIV, CSS and jQuery. Also, MySQL is used as the database suppo...

  15. BGO front-end electronics and signal processing in the MXGS instrument for the ASIM mission

    DEFF Research Database (Denmark)

    Skogseide, Yngve; Cenkeramaddi, Linga Reddy; Genov, Georgi

    2012-01-01

    for the design and development of the detector layers and readout electronics for the MXGS instrument. The principal objective of the instrument is to detect Terrestrial Gamma ray Flashes (TGFs), which are related to thunderstorm activity. The digital pulse processing scheme used in the MXGS BGO detector gives......This paper presents the Bismuth Germanate Oxide (BGO) front-end electronics design and signal processing in Modular X- and Gamma ray sensor (MXGS) instrument onboard the Atmosphere Space Interaction Monitor (ASIM) mission, funded by the European Space Agency. University of Bergen is responsible...

  16. Control of SiC Based Front-End Rectifier under Unbalanced Supply Voltage

    DEFF Research Database (Denmark)

    Maheshwari, Ramkrishan; Trintis, Ionut; Gohil, Ghanshyamsinh Vijaysinh

    2015-01-01

    A voltage source converter is used as a front end converter typically. In this paper, a converter which is realized using SiC MOSFET is considered. Due to SiC MOSFET, a switching frequency more than 50 kHz can be achieved. This can help increasing the current control loop bandwidth, which is not ...... together with a positive-sequence current controller for the front-end rectifier. A gain in the feedforward term can be changed to control the negative-sequence current. Simulation results are presented to verify the theory....

  17. A CMOS self-powered front-end architecture for subcutaneous event-detector devices

    CERN Document Server

    Colomer-Farrarons, Jordi

    2011-01-01

    A CMOS Self-Powered Front-End Architecture for Subcutaneous Event-Detector Devices presents the conception and prototype realization of a Self-Powered architecture for subcutaneous detector devices. The architecture is designed to work as a true/false (event detector) or threshold level alarm of some substances, ions, etc. that are detected through a three-electrodes amperometric BioSensor approach. The device is conceived as a Low-Power subcutaneous implantable application powered by an inductive link, one emitter antenna at the external side of the skin and the receiver antenna under the ski

  18. A new design for SLAM front-end based on recursive SOM

    Science.gov (United States)

    Yang, Xuesi; Xia, Shengping

    2015-12-01

    Aiming at the graph optimization-based monocular SLAM, a novel design for the front-end in single camera SLAM is proposed, based on the recursive SOM. Pixel intensities are directly used to achieve image registration and motion estimation, which can save time compared with the current appearance-based frameworks, usually including feature extraction and matching. Once a key-frame is identified, a recursive SOM is used to actualize loop-closure detecting, resulting a more precise location. The experiment on a public dataset validates our method on a computer with a quicker and effective result.

  19. A protocol for hit and control synchronous transfer for the front-end electronics at the CBM experiment

    International Nuclear Information System (INIS)

    Kasinski, K.; Szczygiel, R.; Zabolotny, W.; Lehnert, J.; Schmidt, C.J.; Müller, W.F.J.

    2016-01-01

    The Silicon Tracking System, Muon Chamber, Transition Radiation Detector and Time-Of-Flight among others are the detector systems of the Compressed Baryonic Matter (CBM) experiment at the FAIR facility. These detector systems will be built with tens of thousands of front-end ASICs exposed to high radiation doses and difficult environmental and interference conditions. A CERN's GBTx-based solution was chosen for combining data from multiple front-end ASICs into an optical link before further concentration and preprocessing in the common Data Processing Board data hub. This paper presents the protocol design addressing the DAQ system requirements, simplifying the ASIC's back-end design and presents its adaptation for the STS and MUCH detector's conditions. A specific link synchronization technique, hit data bandwidth optimization and time synchronization method for the self-triggered front-end chip are presented.

  20. A protocol for hit and control synchronous transfer for the front-end electronics at the CBM experiment

    Energy Technology Data Exchange (ETDEWEB)

    Kasinski, K., E-mail: kasinski@agh.edu.pl [AGH University of Science and Technology, Department of Measurement and Electronics, Av. Mickiewicza 30, 30-059 Cracow (Poland); Szczygiel, R. [AGH University of Science and Technology, Department of Measurement and Electronics, Av. Mickiewicza 30, 30-059 Cracow (Poland); Zabolotny, W. [Institute of Electronic Systems, Warsaw University of Technology, ul. Nowowiejska 15/19, 00-665 Warsaw (Poland); Lehnert, J.; Schmidt, C.J. [GSI Helmholtzzentrum für Schwerionenforschung GmbH, Planckstrasse 1, 64-291 Darmstadt (Germany); Müller, W.F.J. [FAIR Facility for Antiproton and Ion Research in Europe GmbH, Planckstrasse 1, 64-291 Darmstadt (Germany)

    2016-11-01

    The Silicon Tracking System, Muon Chamber, Transition Radiation Detector and Time-Of-Flight among others are the detector systems of the Compressed Baryonic Matter (CBM) experiment at the FAIR facility. These detector systems will be built with tens of thousands of front-end ASICs exposed to high radiation doses and difficult environmental and interference conditions. A CERN's GBTx-based solution was chosen for combining data from multiple front-end ASICs into an optical link before further concentration and preprocessing in the common Data Processing Board data hub. This paper presents the protocol design addressing the DAQ system requirements, simplifying the ASIC's back-end design and presents its adaptation for the STS and MUCH detector's conditions. A specific link synchronization technique, hit data bandwidth optimization and time synchronization method for the self-triggered front-end chip are presented.

  1. Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management.

    Science.gov (United States)

    George, Libin; Gargiulo, Gaetano Dario; Lehmann, Torsten; Hamilton, Tara Julia

    2015-11-19

    Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm²), uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm) 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip.

  2. CPRF/ZTH front-end torus design and fabrication status

    International Nuclear Information System (INIS)

    Ballard, E.O.; Baker, C.; Gomez, T.; Prince, P.P.; Smith, R.L.

    1989-01-01

    Design of the ZTH front-end torus has been completed for a new generation Reversed Field Pinch (RFP) machine to be assembled at Los Alamos National Laboratory during FY 92. The Confinement Physics Research Facility (CPRF) houses the ZTH front-end torus. The ZTH torus consists of an Inconel 625 vacuum vessel supported by an external electrically conducting 304L stainless steel shell. Interspace support rings support the vacuum vessel to the shell and also provide accurate radial support for the interspace electrical diagnostics. The shell also supports 48 toroidal field coils that are mounted to the shell's external surface. The shell consists of an explosion bonded stainless steel-copper composite with water-cooling tube assemblies attached to the outer surface. The 0.135-in. thick copper is on the inside surface of the shell, and provides an electrically conducting path with the required electrical time constant of 50 ms. The shell plate will be formed to the required toroidal configuration, after which the poloidal and toroidal flanges will be welded to the structure and machined. The Inconel vacuum vessel consists of bellows segments, armor support rings, and diagnostic stations welded together to form the complete vacuum vessel assembly. The necessity for accurate positioning of the vacuum vessel within the shell requires that the shell and vacuum vessel be fabricated with major diameter tolerances within 0.050-in. true position of the nominal diameters of 188.0-in. and 188.820-in., respectively. 7 figs

  3. Programmer's guide to FFE: a fast front-end data-acquisition program

    International Nuclear Information System (INIS)

    Million, D.L.

    1983-05-01

    The Large Coil Test Facility project of the Fusion Energy Division has a data acquisition system which includes a large host computer and several small, peripheral front-end computers. The front-end processors handle details of data acquisition under the control of the host and pass data back to the host for storage. Some of the front ends are known as fast front ends and are required to collect a maximum of 64,000 samples each second. This speed and other hardware constraints resulted in a need for a stand-alone, assembly language task which could be downline loaded from the host system into the fast front ends. FFE (Fast Front End) was written to satisfy this need. It was written in the PDP-11 MACRO-11 assembly language for an LSI-11/23 processor. After the host loads the task into the front end, it controls the data acquisition process with a series of commands and parameters. This Programmer's Guide describes the structure and operation of FFE in detail from a programming point of view. A companion User's guide provides more information on the use of the program from the host system

  4. Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management

    Directory of Open Access Journals (Sweden)

    Libin George

    2015-11-01

    Full Text Available Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm2, uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip.

  5. Front-end Electronics for Unattended Measurement (FEUM). Results of Prototype Evaluation

    Energy Technology Data Exchange (ETDEWEB)

    Conrad, Ryan C. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Keller, Daniel T. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Morris, Scott J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Smith, Leon E. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

    2015-07-01

    The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, a technical evaluation of a candidate FEUM device produced by a commercial vendor has been performed. This evaluation assessed the device against the IAEA’s original technical specifications and a broad range of important parameters that include sensor types, cable lengths and types, industrial electromagnetic noise that can degrade signals from remotely located detectors, and high radiation fields. Testing data, interpretation, findings and recommendations are provided.

  6. Estimation of radiation effects in the front-end electronics of an ILC electromagnetic calorimeter

    International Nuclear Information System (INIS)

    Bartsch, V.; Postranecky, M.; Targett-Adams, C.; Warren, M.; Wing, M.

    2008-01-01

    The front-end electronics of the electromagnetic calorimeter of an International Linear Collider detector are situated in a radiation environment. This requires the effect of the radiation on the performance of the electronics, specifically FPGAs, to be examined. In this paper we study the flux, particle spectra and deposited doses at the front-end electronics of the electromagnetic calorimeter of a detector at the ILC. We also study the occupancy of the electromagnetic calorimeter. These estimates are compared with measurements, e.g. of the radiation damage of FPGAs, done elsewhere. The outcome of the study shows that the radiation doses and the annual flux is low enough to allow today's FPGAs to operate. The Single Event Upset rate, however, lies between 14 min and 12 h depending on the FPGA used and therefore needs to be considered in the design of the data acquisition system of the electromagnetic calorimeter. The occupancy is about 0.002 per bunch train not taking into account the effect of noise which depends on the choice of the detector

  7. A new portable test bench for the ATLAS Tile Calorimeter front-end electronics certification

    International Nuclear Information System (INIS)

    Alves, J.; Carrio, F.; Moreno, P.; Usai, G.; Valero, A.; Kim, H.Y.; Minashvili, I.; Shalyugin, A.; Reed, R.; Schettino, V.; Souza, J.; Solans, C.

    2013-06-01

    This paper describes the upgraded portable test bench for the Tile Calorimeter of the ATLAS experiment at CERN. The previous version of the portable test bench was extensively used for certification and qualification of the front-end electronics during the commissioning phase as well as during the short maintenance periods of 2010 and 2011. The new version described here is designed to be an easily upgradable version of the 10-year-old system, able to evaluate the new technologies planned for the ATLAS upgrade as well as provide new functionalities to the present system. It will be used in the consolidation of electronics campaign during the long shutdown of the LHC in 2013-14 and during future maintenance periods. The system, based on a global re-design with state-of-the-art devices, is based on a back-end electronics crate instrumented with commercial and custom modules and a front-end GUI that is executed on an external portable computer and communicates with the controller in the crate through an Ethernet connection. (authors)

  8. Instrumentation of a Track Trigger with Double Buffer Front-End Architecture

    CERN Document Server

    Wardrope, DR; The ATLAS collaboration

    2012-01-01

    The planned high luminosity upgrade for the LHC (SLHC), will increase the collision rate in the ATLAS detector by approximately a factor 5 beyond the present LHC design goal, while also increasing the number of pile-up collisions in each event by a similar factor. This means that the level-1 trigger must achieve a higher rejection factor in a more difficult environment. We describe a possible design which splits the level-1 trigger into a two-level system, where the first level, using only calorimetry and muon chambers, defines regions of interest in the tracker from which to extract information for a second, refined trigger. The use of a two-buffer front-end architecture will allow a significantly longer decision time to move data off the detector keeping the data bandwidth and buffer sizes moderate. We will describe the implementation of the scheme in the ATLAS tracker front-end electronics and the simulated performance of the system. Results on thresholds, rejection, bandwidth and trigger latency will be s...

  9. Characterisation of the VMM3 Front-end read-out ASIC

    CERN Document Server

    Bartels, Lara Maria

    2018-01-01

    This research project was conducted in the RD51 collaboration at CERN, which is involved in the development of micropattern gaseous detector technologies and read-out systems. One example in the broad range of possible applications of such gaseous detectors is the NMX macromolecular diffractometer instrument planned for the European spallation source (ESS) which is currently under construction in Lund, Sweden. For the NMX instrument neutron detectors with high rate capabilities, high stability and excellent spatial resolution are required. A group working in the RD51 collaboration at CERN within the BrightnESS project aims to fulfil those requirements using gas electron multiplier (GEM) detectors with Gadolinium foils as neutron converters [PFE]. In order to match the high rate capability of the detectors, new front-end read-out systems need to be tested and implemented. This project aims to understand and test the capabilities of the VMM3 as the front-end read-out ASIC for GEM detectors.

  10. arXiv Architecture of the LHCb muon Frontend control system upgrade

    CERN Document Server

    Bocci, Valerio

    2016-10-06

    The LHCb experiment(Fig. 1), that is presently taking data at CERN (European Center for Nuclear Research) Large Hadron Collider (LHC), aims at the study of CP violation in the B meson sector. Its key elements is the Muon detector [1], which allows triggering, and muon identification from inclusive b decays. The electronic system (Fig. 2) of the whole detector is very complex and its Muon detector Experiment Control System (ECS) allows monitoring and control of a number of Front-End boards in excess of 7000. The present system in charge of controlling Muon detector Front-End (FE) Electronics consists of 10 Crates of equipment; each crate contains two kinds of modules: a Pulse Distribution Module (PDM) and up to 20 Service Boards (SB) connected via a custom Backplane for a total amount of about 800 microcontrollers[2]. LHCb upgrade is planned for 2018/19, which will allow the detector to exploit higher luminosity running. This upgrade will allow the experiment to accumulate more luminosity to allow measurements...

  11. Front-End Data Reduction in Computer-Aided Diagnosis of Mammograms: A Pilot Study

    Energy Technology Data Exchange (ETDEWEB)

    Gleason, S.S.; Nishikawa, R.M.; Sari-Sarraf, H.

    1999-02-20

    This paper presents the results of a pilot study whose primary objective was to further substantiate the efficacy of front-end data reduction in computer-aided diagnosis (CAD) of mammograms. This concept is realized by a preprocessing module that can be utilized at the front-end of most mammographic CAD systems. Based on fractal encoding, this module takes a mammo-graphic image as its input and generates, as its output, a collection of subregions called focus-of-attention regions (FARs). These FARs contain all structures in the input image that appear to be different from the normal background tissue. Subsequently, the CAD systems need only to process the presented FARs, rather than the entire input image. This accomplishes two objectives simultaneously: (1) an increase in throughput via a reduction in the input data, and (2) a reduction in false detections by limiting the scope of the detection algorithms to FARs only. The pilot study consisted of using the preprocessing module to analyze 80 mammographic images. The results were an average data reduction of 83% over all 80 images and an average false detection reduction of 86%. Furthermore, out of a total of 507 marked microcalcifications, 467 fell within FW, representing a coverage rate of 92%.

  12. A front-end electronic system for large arrays of bolometers

    Science.gov (United States)

    Arnaboldi, C.; Carniti, P.; Cassina, L.; Gotti, C.; Liu, X.; Maino, M.; Pessina, G.; Rosenfeld, C.; Zhu, B. X.

    2018-02-01

    CUORE is an array of thermal calorimeters composed of 988 crystals held at about 10 mK, whose absorbed energy is read out with semiconductor thermistors. The composition of the crystal is TeO2, and the aim is the study of the double beta decay of 130Te on very long and stable runs. CUPID-0 is an array of 26 Zn82Se crystals with double thermistor readout to study the double beta decay of 82Se. In the present paper, we present an overview of the entire front-end electronic readout chain, from the preamplifier to the anti-aliasing filter. This overview includes motivations, design strategies, circuit implementation and performance results of the electronic system, including other auxiliary yet important elements like power supplies and the slow control communication system. The stringent requirements of stability on the very long experimental runs that are foreseen during CUORE and CUPID-0 operation, are achieved thanks to novel solutions of the front-end preamplifier and of the detector bias circuit setup.

  13. Front-End Intelligence for Large-Scale Application-Oriented Internet-of-Things

    KAUST Repository

    Bader, Ahmed

    2016-06-14

    The Internet-of-things (IoT) refers to the massive integration of electronic devices, vehicles, buildings, and other objects to collect and exchange data. It is the enabling technology for a plethora of applications touching various aspects of our lives such as healthcare, wearables, surveillance, home automation, smart manufacturing, and intelligent automotive systems. Existing IoT architectures are highly centralized and heavily rely on a back-end core network for all decision-making processes. This may lead to inefficiencies in terms of latency, network traffic management, computational processing, and power consumption. In this paper, we advocate the empowerment of front-end IoT devices to support the back-end network in fulfilling end-user applications requirements mainly by means of improved connectivity and efficient network management. A novel conceptual framework is presented for a new generation of IoT devices that will enable multiple new features for both the IoT administrators as well as end users. Exploiting the recent emergence of software-defined architecture, these smart IoT devices will allow fast, reliable, and intelligent management of diverse IoT-based applications. After highlighting relevant shortcomings of the existing IoT architectures, we outline some key design perspectives to enable front-end intelligence while shedding light on promising future research directions.

  14. Front-end electronics and readout system for the ILD TPC

    CERN Document Server

    Hedberg, V; Lundberg, B; Mjörnmark, U; Oskarsson, A; Österman, L; De Lentdecker, G; Yang, Y; Zhang, F

    2015-01-01

    A high resolution TPC is the main option for a central tracking detector at the future International Linear Collider (ILC). It is planned that the MPGD (Micro Pattern Gas Detector) technology will be used for the readout. A Large Prototype TPC at DESY has been used to test the performance of MPGDs in an electron beam of energies up to 6 GeV. The first step in the technology development was to demonstrate that the MPGDs are able to achieve the necessary performance set by the goals of ILC. For this ’proof of principle’ phase, the ALTRO front-end electronics from the ALICE TPC was used, modified to adapt to MPGD readout. The proof of principle has been verified and at present further improvement of the MPGD technology is going on, using the same readout electronics. The next step is the ’feasibility phase’, which aims at producing front-end electronics comparable in size (few mm2) to the readout pads of the TPC. This development work is based on the succeeding SALTRO16 chip, which combines the analogue ...

  15. The New Front-End Electronics for the ATLAS Tile Calorimeter Phase 2 Upgrade

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00029377; The ATLAS collaboration

    2015-01-01

    We present the design for the new front-end electronics being developed for the Phase 2 Upgrade of the ATLAS Tile Calorimeter. The front-end electronics will be replaced to address the increase in beam energy and luminosity planned for the LHC around 2023, as well as to upgrade to faster, more modern components with higher radiation tolerance. The new electronics will operate dead-timelessly, pushing full data sets from each beam crossing to the data acquisition system that resides off-detector in the USA15 counting room. The new electronics contains five main parts: the Front End Boards that connect directly to the photo-multiplier tubes; the Main Boards that digitize the data; the Daughter Boards that collect the data streams and contain the high-speed optical communication links for writing data to the data acquisition system; a programmable high voltage control system; and a new low-voltage power supply. There are different options for implementing these subcomponents, which will be described. The new sys...

  16. CPRF/ZTH front-end torus design and fabrication status

    International Nuclear Information System (INIS)

    Ballard, E.O.; Baker, C.; Gomez, T.; Prince, P.P.; Smith, R.L.

    1989-01-01

    Design of the ZTH front-end torus has been completed for a new generation Reversed Field Pinch (RFP) machine to be assembled at Los Alamos National Laboratory during FY 92. The Confinement Physics Research Facility (CPRF) houses the ZTH front-end. The ZTH torus consists of an Inconel 625 vacuum vessel supported by an external electrically conducting 304L stainless steel shell. Interspace support rings support the vacuum vessel to the shell and also provide accurate radial support for the interspace electrical diagnostics. The shell also supports 48 toroidal field coils that are mounted to the shell's external surface. The shell consists of an explosion bonded stainless steel-copper composite with water-cooling tube assemblies attached to the outer surface. The 0.135-in. thick copper is on the inside surface of the shell, and provides an electrically conducting path with the required electrical time constant of 50 ms. The shell plate will be formed to the required toroidal configuration, after which the poloidal and toroidal flanges will be welded to the structure and machined. The Inconel vacuum vessel consists of bellows segments, armor support rings, and diagnostic stations welded together to form the complete vacuum vessel assembly. The necessity for accurate positioning of the vacuum vessel within the shell requires that the shell and vacuum vessel be fabricated with major diameter tolerances within 0.050-in. true position of the nominal diameters of 188.0-in. and 188.820-in., respectively. 7 figs

  17. A low power dual-band multi-mode RF front-end for GNSS applications

    Energy Technology Data Exchange (ETDEWEB)

    Zhang Hao; Li Zhiqun; Wang Zhigong, E-mail: zhhseu@gmail.com [Institute of RF- and OE- ICs, Southeast University, Nanjing 210096 (China)

    2010-11-15

    A CMOS dual-band multi-mode RF front-end for the global navigation satellite system receivers of all GPS, Bei-Dou, Galileo and Glonass systems is presented. It consists of a reconfigurable low noise amplifier (LNA), a broadband active balun, a high linearity mixer and a bandgap reference (BGR) circuit. The effect of the input parasitic capacitance on the input impedance of the inductively degenerated common source LNA is analyzed in detail. By using two different LC networks at the input port and the switched capacitor at the output port, the LNA can work at two different frequency bands (1.2 GHz and 1.5 GHz) under low power consumption. The active balun uses a hybrid-connection structure to achieve high bandwidth. The mixer uses the multiple gated transistors technique to acquire a high linearity under low power consumption but does not deteriorate other performances. The measurement results of the proposed front-end achieve a noise figure of 2.1/2.0 dB, again of 33.9/33.8 dB and an input 1-dB compression point of 0/1 dBm at 1227.6/1575.42 MHz. The power consumption is about 16 mW under a 1.8 V power supply.

  18. The next generation FrontEnd Controller for the Phase 1 Upgrade of the CMS Hadron Calorimeters

    OpenAIRE

    Costanza, Francesco

    2016-01-01

    The ngFEC (next generation FrontEnd Controller) is the system responsible for slow and fast control within the Phase 1 Upgrade of the CMS Hadron Calorimeters. It is based on the FC7, a μ TCA compatible Advanced Mezzanine Card developed at CERN and built around the Xilinx Kintex®-7 FPGA. The ngFEC decodes the 40.0788 MHz LHC clock and the synchronization signals received from the backplane and distributes them to the frontend electronics using a GBT link. The latency of the fast control signal...

  19. Reliability Analysis of a Low Voltage Power Supply Design for the Front-End Electronics of the Atlas Tile Calorimeter

    CERN Document Server

    Drake, G; The ATLAS collaboration; Gopalakrishnan, A; Mahadik, S; Mellado, B; Proudfoot, J

    2012-01-01

    –We present a reliability study on a new low voltage power supply design for the front-end electronics of the ATLAS Tile Calorimeter. Using the reliability data from the manufacturers of the components, we derive an estimate of the expected number of failures per year during the normal operating lifetime of the power supply bricks. This may be useful for other power supply designs or front-end electronics designs where high reliability is required. We discuss the factors in the design that limit reliability, and present conclusions for improvements to the power distribution system for the LHC Phase 2 upgrade.

  20. Reliability Analysis of a Low Voltage Power Supply Design for the Front-End Electronics of the ATLAS Tile Calorimeter

    CERN Document Server

    Senthilkumaran, A; The ATLAS collaboration; Gopalakrishnan, A; Mahadik, S; Drake, G; Proudfoot, J

    2012-01-01

    We present a reliability study on a new low voltage power supply design for the front-end electronics of the ATLAS Tile Calorimeter. Using the reliability data from the manufacturers of the components, we derive an estimate of the expected number of failures per year during the normal operating lifetime of the power supply bricks. We will illustrate the technique, which may be useful for other power supply designs or front-end electronics designs where high reliability is required. We discuss the factors in the design that limit reliability, and present our preliminary design work for improvements in the power distribution system for the LHC Phase 2 upgrade.

  1. A generic firmware core to drive the Front-End GBT-SCAs for the LHCb ugprade

    CERN Document Server

    Alessio, F; Gaspar, C; Jacobsson, R; Wyllie, K

    2014-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well.

  2. LHCb : A generic firmware core to drive the Front-End GBT-SCAs for the LHCb ugprade

    CERN Multimedia

    Alessio, Federico; Gaspar, Clara; Jacobsson, Richard; Wyllie, Ken

    2014-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well

  3. MARKETING CHANNELS

    Directory of Open Access Journals (Sweden)

    Ljiljana Stošić Mihajlović

    2014-07-01

    Full Text Available Marketing channel is a set of entities and institutions, completion of distribution and marketing activities, attend the efficient and effective networking of producers and consumers. Marketing channels include the total flows of goods, money and information taking place between the institutions in the system of marketing, establishing a connection between them. The functions of the exchange, the physical supply and service activities, inherent in the system of marketing and trade. They represent paths which products and services are moving after the production, which will ultimately end up buying and eating by the user.

  4. FE-I2 a front-end readout chip designed in a commercial 025- mu m process for the ATLAS pixel detector at LHC

    CERN Document Server

    Blanquart, L; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I

    2004-01-01

    A new front-end chip (FE-I2) has been developed for the ATLAS pixel detector at the future Large Hadron Collider (LHC) accelerator facility of the European Laboratory for Particle Physics (CERN). This chip has been submitted in a commercial 0.25- mu m CMOS process using special layout techniques for radiation tolerance. It comprises 2880 pixels arranged into 18 columns of 160 channels. Each pixel element of dimension 50 mu m * 400 mu m is composed of a charge- sensitive amplifier followed by a fast discriminator with a detection threshold adjustable within a range of 0-6000 electrons and slow control logic incorporating a wired-hit-Or, preamplifier-kill, readout mask, and automatic threshold tuning circuitry. There are two single-event- upset (SEU)-tolerant DACs for reducing threshold (7-b) and recovery- time (3-b) mismatches from pixel to pixel along with digital hit emulation and a differential readout circuit aimed at transporting time-stamped data from each pixel to buffers at the bottom of the chip. In c...

  5. Artificial Neural Network based DC-link Capacitance Estimation in a Diode-bridge Front-end Inverter System

    DEFF Research Database (Denmark)

    Soliman, Hammam Abdelaal Hammam; Abdelsalam, Ibrahim; Wang, Huai

    2017-01-01

    , a proposed software condition monitoring methodology based on Artificial Neural Network (ANN) algorithm is presented. Matlab software is used to train and generate the proposed ANN. The proposed methodology estimates the capacitance of the DC-link capacitor in a three phase front-end diode bridge AC...

  6. High-Frequency Wireless Communications System: 2.45-GHz Front-End Circuit and System Integration

    Science.gov (United States)

    Chen, M.-H.; Huang, M.-C.; Ting, Y.-C.; Chen, H.-H.; Li, T.-L.

    2010-01-01

    In this article, a course on high-frequency wireless communications systems is presented. With the 145-MHz baseband subsystem available from a prerequisite course, the present course emphasizes the design and implementation of the 2.45-GHz front-end subsystem as well as system integration issues. In this curriculum, the 2.45-GHz front-end…

  7. Spatial Interferer Rejection in a 4-Element Beamforming Receiver Frontend with a Switched-Capacitor Vector Modulator

    NARCIS (Netherlands)

    Soer, M.C.M.; Klumperink, Eric A.M.; Nauta, Bram; van Vliet, Frank Edward

    2011-01-01

    A 1-4GHz 4-element phased array receiver frontend demonstrates spatial interferer rejection using null steering. Element phase and amplitude control are performed by a switchedcapacitor vector modulator with integrated downconversion, utilizing a rational sine/cosine approximation. The 65nm CMOS

  8. Interfirm collaboration in the fuzzy front-end of the innovation process - Exploring new forms of collaboration

    DEFF Research Database (Denmark)

    Bergenholtz, Carsten; Jørgensen, Jacob Høj; Goduscheit, Rene Chester

    The objective of this paper is to elaborate on the differentiating characteristics between intra-firm and inter-firm innovation projects in the Fuzzy Front-End (FFE) of the innovation process. Focus is on management methods of the collaboration and the CEO-commitment to the project. The main poin...

  9. Workshop on physics at the first muon collider and front-end of a muon collider: A brief summary

    International Nuclear Information System (INIS)

    Geer, S.

    1998-01-01

    In November 1997 a workshop was held at Fermilab to explore the physics potential of the first muon collider, and the physics potential of the accelerator complex at the 'front-end' of the collider. An extensive physics program emerged from the workshop. This paper attempts to summarize this physics program and identify the main conclusions from the workshop

  10. Digital front-end module (DFEM) series; Digital front end module (DFEM) series

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2000-03-01

    The digital front-end module (DFEM) is a module in which the processes ranging from the reception of digitally modulated radiofrequencies to the output of digital IF (Intermediate Frequency) signals or data streams are integrated. Beginning with a module for the MCNS (Multimedia Cable Network System) cable modem which was the first module in this business field approved by the Cable Labs, U.S., Toshiba has developed a series of DFEMs for various digital media for satellites, ground waves, and CATV (Cable Television) systems. The series is characterized by (1) the serialization of DFEMs compatible with various digital modulation techniques such as 8 PSK (Phase Shift Keying), OFDM (Orthogonal Frequency Division Multiplexing), and 256 QAM (Quadrature Amplitude Modulation), (2) easy connection with digital circuits thanks to the high shielding effect, and (3) the achievement of smaller size, higher performance, and lower power consumption. (translated by NEDO)

  11. Dead-time free pixel readout architecture for ATLAS front-end IC

    CERN Document Server

    Einsweiler, Kevin F; Kleinfelder, S A; Luo, L; Marchesini, R; Milgrome, O; Pengg, F X

    1999-01-01

    A low power sparse scan readout architecture has been developed for the ATLAS pixel front-end IC. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address $9 of the hits associating them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The $9 events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the $9 requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC provides dead-time-less ambiguity free readout at 40 MHz data rate.

  12. SEU rate estimates for the ATLAS/SCT front-end ASIC

    CERN Document Server

    Eklund, L; Grigson, C; Kramberger, G; Mandic, I; Mikuz, M; Phillips, P

    2003-01-01

    We present a method of estimating the sensitivity to radiation- induced Single Event Upset (SEU) in the front-end ASICs for the ATLAS Semiconductor Tracker. The method is using ASICs of the final design with limited read-back possibilities of internal registers. Hence the measurement is adapted to utilise the event-data flow in the digital part of the ASIC to detect bit-flips. Furthermore, we report on the application of this method to estimate the SEU sensitivity. The results presented are based on data from three irradiation periods using prototype electronics hybrids and detector modules. The measurements were done with 24 GeV/c protons and 200 MeV/c pions.

  13. Performance of the front-end electronics of the ANTARES neutrino telescope

    Science.gov (United States)

    Aguilar, J. A.; Al Samarai, I.; Albert, A.; Anghinolfi, M.; Anton, G.; Anvar, S.; Ardid, M.; Assis Jesus, A. C.; Astraatmadja, T.; Aubert, J.-J.; Auer, R.; Baret, B.; Basa, S.; Bazzotti, M.; Bertin, V.; Biagi, S.; Bigongiari, C.; Bou-Cabo, M.; Bouwhuis, M. C.; Brown, A.; Brunner, J.; Busto, J.; Camarena, F.; Capone, A.; Caponetto, L.; Cârloganu, C.; Carminati, G.; Carr, J.; Castorina, E.; Cavasinni, V.; Cecchini, S.; Chaleil, Th.; Charvis; Chiarusi, T.; Chon Sen, N.; Circella, M.; Costantini, H.; Cottini, N.; Coyle, P.; Curtil, C.; de Bonis, G.; de Botton, N.; Dekeyser, I.; Delagnes, E.; Deschamps, A.; Distefano, C.; Donzaud, C.; Dornic, D.; Drouhin, D.; Druillole, F.; Eberl, T.; Emanuele, U.; Ernenwein, J.-P.; Escoffier, S.; Falchini, E.; Fehr, F.; Feinstein, F.; Flaminio, V.; Fopma, J.; Fratini, K.; Fritsch, U.; Fuda, J.-L.; Gay, P.; Giacomelli, G.; Gómez-González, J. P.; Graf, K.; Guillard, G.; Halladjian, G.; Hallewell, G.; Hoffmann, C.; van Haren, H.; Heijboer, A. J.; Hello, Y.; Hernández-Rey, J. J.; Herold, B.; Hößl, J.; de Jong, M.; Kalantar-Nayestanaki, N.; Kalekin, O.; Kappes, A.; Katz, U.; Kooijman, P.; Kopper, C.; Kouchner, A.; Kretschmer, W.; Lachartre, D.; Lafoux, H.; Lahmann, R.; Lamare, P.; Lambard, G.; Larosa, G.; Laschinsky, H.; Le Provost, H.; Le van Suu, A.; Lefèvre, D.; Legou, T.; Lelaizant, G.; Lim, G.; Lo Presti, D.; Loehner, H.; Loucatos, S.; Lucarelli, F.; Mangano, S.; Marcelin, M.; Margiotta, A.; Martinez-Mora, J. A.; Mazure, A.; Monmarthe, E.; Montaruli, T.; Morganti, M.; Moscoso, L.; Motz, H.; Naumann, C.; Neff, M.; Olivetto, Ch.; Ostasch, R.; Palioselitis, D.; Păvăla, G. E.; Payre, P.; Petrovic, J.; Piattelli, P.; Picot-Clemente, N.; Picq, C.; Pineau, J.-P.; Poinsignon, J.; Popa, V.; Pradier, T.; Presani, E.; Racca, C.; Radu, A.; Reed, C.; Réthoré, F.; Riccobene, G.; Richardt, C.; Rujoiu, M.; Russo, G. V.; Salesa, F.; Sapienza, P.; Schöck, F.; Schuller, J. P.; Shanidze, R.; Simeone, F.; Spurio, M.; Steijger, J. J. M.; Stolarczyk, Th.; Tamburini, C.; Tasca, L.; Toscano, S.; Vallage, B.; van Elewyck, V.; Vannoni, G.; Vecchi, M.; Vernin, P.; Wijnker, G.; de Wolf, E.; Yepes, H.; Zaborov, D.; Zornoza, J. D.; Zúñiga, J.; ANTARES Collaboration

    2010-10-01

    ANTARES is a high-energy neutrino telescope installed in the Mediterranean Sea at a depth of 2475 m. It consists of a three-dimensional array of optical modules, each containing a large photomultiplier tube. A total of 2700 front-end ASICs named analogue ring samplers (ARS) process the phototube signals, measure their arrival time, amplitude and shape as well as perform monitoring and calibration tasks. The ARS chip processes the analogue signals from the optical modules and converts information into digital data. All the information is transmitted to shore through further multiplexing electronics and an optical link. This paper describes the performance of the ARS chip; results from the functionality and characterization tests in the laboratory are summarized and the long-term performance in the apparatus is illustrated.

  14. Commissioning of the SNS front-end systems at Berkeley Lab

    International Nuclear Information System (INIS)

    Keller, R.; Ayers, J.J.; Doolittle, L.; Greer, J.B.; Lewis, S.; Lionberger, C.; Monroy, M.; Pruyn, J.; Ratti, A.; Staples, J.W.; Syversrud, D.; Thomae, R.

    2002-01-01

    Construction of a 2.5-MeV linac injector, the Front-End (FE) for the Spallation Neutron Source (SNS) project, was completed in the spring of 2002. Of the major FE subsystems, the rf-driven H- ion source, the electrostatic LEBT, and the first of four RFQ modules had been commissioned by the spring of 2001, and commissioning of the remaining RFQ modules as well as the full system including the elaborate MEBT was carried out in Jan. through May, 2002. The Front End will be shipped to Oak Ridge, starting in June, 2002, and re-commissioned after installation at the SNS site. This paper gives an overview of FE major design features and experimental results obtained during the commissioning process at LBNL

  15. Physics at the front-end of a neutrino factory a quantitative appraisal

    CERN Document Server

    Mangano, Michelangelo L.; Anselmino, M.; Ball, R.D.; Boglione, Mariaelena; D'Alesio, U.; Davidson, S.; Lellis, De; Ellis, John R.; Forte, S.; Gambino, P.; Gehrmann, T.; Kataev, A.L.; Kotzinian, A.; Kulagin, Sergey A.; Lehmann-Dronke, B.; Migliozzi, P.; Murgia, F.; Ridolfi, G.

    2004-01-01

    We present a quantitative appraisal of the physics potential for neutrino experiments at the front-end of a muon storage ring. We estimate the forseeable accuracy in the determination of several interesting observables, and explore the consequences of these measurements. We discuss the extraction of individual quark and antiquark densities from polarized and unpolarized deep-inelastic scattering. In particular we study the implications for the undertanding of the nucleon spin structure. We assess the determination of alpha_s from scaling violation of structure functions, and from sum rules, and the determination of sin^2(theta_W) from elastic nu-e and deep-inelastic nu-p scattering. We then consider the production of charmed hadrons, and the measurement of their absolute branching ratios. We study the polarization of Lambda baryons produced in the current and target fragmentation regions. Finally, we discuss the sensitivity to physics beyond the Standard Model.

  16. Modeling, simulation, and optimization of a front-end system for acetylene hydrogenation reactors

    Directory of Open Access Journals (Sweden)

    R. Gobbo

    2004-12-01

    Full Text Available The modeling, simulation, and dynamic optimization of an industrial reaction system for acetylene hydrogenation are discussed in the present work. The process consists of three adiabatic fixed-bed reactors, in series, with interstage cooling. These reactors are located after the compression and the caustic scrubbing sections of an ethylene plant, characterizing a front-end system; in contrast to the tail-end system where the reactors are placed after the de-ethanizer unit. The acetylene conversion and selectivity profiles for the reactors are optimized, taking into account catalyst deactivation and process constraints. A dynamic optimal temperature profile that maximizes ethylene production and meets product specifications is obtained by controlling the feed and intercoolers temperatures. An industrial acetylene hydrogenation system is used to provide the necessary data to adjust kinetics and transport parameters and to validate the approach.

  17. Design of the Front-End Detector Control System of the ATLAS New Small Wheels

    CERN Document Server

    Koulouris, Aimilianos; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade is the New Small Wheel (NSW), which consists of 2 disks of Muon Gas detectors. The detector technologies used are Micromegas (MM) and sTGC, providing a total of 16 layers of tracking and trigger. The Slow Control Adapter (SCA) is part of the GigaBit Transceiver (GBT) - “Radiation Hard Optical Link Project” family of chips designed at CERN, EP-ESE department, which will be used at the NSW upgrade. The SCA offers several interfaces to read analog and digital inputs, and configure front-end Readout ASICs, FPGAs, or other chips. This poster gives an overview of the system, data flow, and software developed for communicating with the SCA.

  18. Design of a wideband CMOS impedance spectroscopy ASIC analog front-end for multichannel biosensor interfaces.

    Science.gov (United States)

    Valente, Virgilio; Dai Jiang; Demosthenous, Andreas

    2015-08-01

    This paper presents the preliminary design and simulation of a flexible and programmable analog front-end (AFE) circuit with current and voltage readout capabilities for electric impedance spectroscopy (EIS). The AFE is part of a fully integrated multifrequency EIS platform. The current readout comprises of a transimpedance stage and an automatic gain control (AGC) unit designed to accommodate impedance changes larger than 3 order of magnitude. The AGC is based on a dynamic peak detector that tracks changes in the input current over time and regulates the gain of a programmable gain amplifier in order to optimise the signal-to-noise ratio. The system works up to 1 MHz. The voltage readout consists of a 2 stages of fully differential current-feedback instrumentation amplifier which provide 100 dB of CMRR and a programmable gain up to 20 V/V per stage with a bandwidth in excess of 10MHz.

  19. Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

    CERN Document Server

    Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

    2012-01-01

    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

  20. PDP-11 front-end for a VAX-11/780

    International Nuclear Information System (INIS)

    Browne, M.J.; Granieri, C.; Sherden, D.J.; Weaver, L.J.

    1980-01-01

    An unpublicized feature of the VAX-11/780 is the provision for attaching a PDP-11 to the VAX UNIBUS Adapter. Doing this can give significantly improved I/O performance for applications which are limited by overhead in the VAX I/O driver rather than by the transfer speed of the UNIBUS itself. Such a system was implemented by using a PDP-11/04 as a front-end to a CAMAC data acquisition system. Both the PDP and the VAX have full access to the UNIBUS. That portion of the PDP address space that does not have UNIBUS memory can be mapped to buffers in the VAX memory; this approach allows the PDP to access VAX memory and to initiate DMA transfers directly to the VAX. The VAX also has full access to the PDP memory; a convenient means for developing and downloading the PDP software is thus provided. 5 figures

  1. Interfirm collaboration in the Fuzzy Front-End of the innovation process

    DEFF Research Database (Denmark)

    Jørgensen, Jacob Høj; Goduscheit, René Chester; Bergenholtz, Carsten

    Innovation and innovation processes has traditionally been considered from the manufacturing companies' perspective. The innovation process is typically divided into a series of succeeding stages where the Fuzzy Front-End is the first stage to encounter. Several research projects have formulated...... recommendations for the manufacturer to improve the innovation process and enhance the chances of success. However, the waist majority of these projects belong to an intra-organizational paradigm where the manufacturer is considered to be the only part involved in the process, controlling and influencing......, marketing, sales. The focus of this paper is on collaboration where innovation is the main part of the collaborative effort. Innovation refers to the research and development (R&D) activity devoted to increasing scientific or technical knowledge and the application of that knowledge to the creation of new...

  2. A full custom analog front-end for long-time ECG monitoring.

    Science.gov (United States)

    Wen, Meiying; Cheng, Yayu; Li, Ye

    2013-01-01

    An analog front-end (AFE) used in portable electrocardiogram (ECG) monitoring devices is proposed. This AFE has included all necessary functions for the commercial applications. The core circuit consists of the instrumentation amplifier (IA), a 2(nd) order Butterworth low pass filter, and the second amplifying stage. The driven-right-leg circuit is integrated in the IA to effectively suppress the common mode interference. And the power management circuits provide a stable supply voltage, bias current and reference voltage for the other circuits. To guarantee the validity of the continuous monitoring data, the leadoff monitoring circuit is developed to monitor the connection of the leads. The chip is taped out with SMIC 0.18 µm CMOS process, and the measured results show that the common mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) achieve 75 dB and 90dB respectively, and the equivalent input referred noise is 12 µV.

  3. Analog lightwave links for detector front-ends at the LHC

    International Nuclear Information System (INIS)

    Baird, A.; Dowell, J.; Duthie, P.

    1995-01-01

    Lightwave links are being developed for volume application in the transfer of analog signals from the tracking detector front-ends to the readout electronics. The links are based on electro-optic intensity modulators which are mounted on detectors and connected by optical fibers to remotely located transceivers (lasers and photoreceivers). The modulators are 3--5 semiconductor reflective devices based on multi-quantum well structures. The transceivers will be integrated devices of a novel design. Modulator prototypes have been fabricated and tested. Neutron and γ-ray irradiation studies have been performed on modulators and fibers. The main results achieved so far are reported and key system issues are reviewed. This work is part of the CERN DRDC project RD23 project RD23

  4. Optimizing read-out of the NECTAr front-end electronics

    Energy Technology Data Exchange (ETDEWEB)

    Vorobiov, S., E-mail: vorobiov@lpta.in2p3.fr [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); DESY-Zeuthen, Platanenallee 6, 15738 Zeuthen (Germany); Feinstein, F. [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); Bolmont, J.; Corona, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France); Delagnes, E. [IRFU/DSM/CEA, Saclay, Gif-sur-Yvette (France); Falvard, A. [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); Gascon, D. [ICC-UB, Universitat Barcelona, Barcelona (Spain); Glicenstein, J.-F. [IRFU/DSM/CEA, Saclay, Gif-sur-Yvette (France); Naumann, C.L.; Nayman, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France); Ribo, M.; Sanuy, A. [ICC-UB, Universitat Barcelona, Barcelona (Spain); Tavernet, J.-P.; Toussenel, F.; Vincent, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France)

    2012-12-11

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  5. Channel Power in Multi-Channel Environments

    NARCIS (Netherlands)

    M.G. Dekimpe (Marnik); B. Skiera (Bernd)

    2004-01-01

    textabstractIn the literature, little attention has been paid to instances where companies add an Internet channel to their direct channel portfolio. However, actively managing multiple sales channels requires knowing the customers’ channel preferences and the resulting channel power. Two key

  6. Starburst Channels

    Science.gov (United States)

    2007-01-01

    [figure removed for brevity, see original site] Figure 1 Translucent carbon dioxide ice covers the polar regions of Mars seasonally. It is warmed and sublimates (evaporates) from below, and escaping gas carves a numerous channel morphologies. In this example (figure 1) the channels form a 'starburst' pattern, radiating out into feathery extensions. The center of the pattern is being buried with dust and new darker dust fans ring the outer edges. This may be an example of an expanding morphology, where new channels are formed as the older ones fill and are no longer efficiently channeling the subliming gas out. Observation Geometry Image PSP_003443_0980 was taken by the High Resolution Imaging Science Experiment (HiRISE) camera onboard the Mars Reconnaissance Orbiter spacecraft on 21-Apr-2007. The complete image is centered at -81.8 degrees latitude, 76.2 degrees East longitude. The range to the target site was 247.1 km (154.4 miles). At this distance the image scale is 24.7 cm/pixel (with 1 x 1 binning) so objects 74 cm across are resolved. The image shown here has been map-projected to 25 cm/pixel. The image was taken at a local Mars time of 04:52 PM and the scene is illuminated from the west with a solar incidence angle of 71 degrees, thus the sun was about 19 degrees above the horizon. At a solar longitude of 223.4 degrees, the season on Mars is Northern Autumn.

  7. A −3 dBm RF transmitter front-end for 802.11g application

    International Nuclear Information System (INIS)

    Zhao Jinxin; Yan Jun; Shi Yin

    2013-01-01

    A 2.4 GHz, direct-conversion RF transmitter front-end with an up converter and PA driver is fabricated in a 0.13 μm CMOS process for the reliable transmission of 54 Mb/s OFDM signals. The front-end output power is −3 dBm while the corresponding EVM is −27 dB which is necessary for the 802.11g standard of EVM at −25 dB. With the adopted gain control strategy the output power changes from −14.3 to −3.7 dBm with every step 0.8 dB (20%) which covers the gain variation due to working temperature and process. A power detector indicates the output power and delivers a voltage to the baseband to control the output power. (semiconductor integrated circuits)

  8. Development of a data management front-end for use with a LANDSAT-based information system

    Science.gov (United States)

    Turner, B. J.

    1982-01-01

    The development and implementation of a data management front-end system for use with a LANDSAT based information system that facilitates the processsing of both LANDSAT and ancillary data was examined. The final tasks, reported on here, involved; (1) the implementation of the VICAR image processing software system at Penn State and the development of a user-friendly front-end for this system; (2) the implementation of JPL-developed software based on VICAR, for mosaicking LANDSAT scenes; (3) the creation and storage of a mosiac of 1981 summer LANDSAT data for the entire state of Pennsylvania; (4) demonstrations of the defoliation assessment procedure for Perry and Centre Counties, and presentation of the results at the 1982 National Gypsy Moth Review Meeting, and (5) the training of Pennsylvania Bureau of Forestry personnel in the use of the defoliation analysis system.

  9. One size does not fit all - understanding the front-end and back-ens of business model innovation

    DEFF Research Database (Denmark)

    Günzel, Franziska; Holm, Anna B.

    2013-01-01

    production and delivery have affected key components of these business models, namely value creation, proposition, delivery and capture in the period 2002–2011. Our findings suggest the need to distinguish between front-end and back-end business model innovation processes, and to recognize the importance......Business model innovation is becoming a central research topic in management. However, a lack of a common understanding of the nature of the business model leads to disregarding its multifaceted structure when analyzing the business model innovation process. This article proposes a more detailed...... understanding of the business model innovation process by drawing on existing knowledge from new product development literature and examining the front-end and the back-end of business model innovation of three leading Danish newspapers. We studied how changes introduced during the development of digital news...

  10. Coupling Front-End Separations, Ion Mobility Spectrometry, and Mass Spectrometry For Enhanced Multidimensional Biological and Environmental Analyses

    Science.gov (United States)

    Zheng, Xueyun; Wojcik, Roza; Zhang, Xing; Ibrahim, Yehia M.; Burnum-Johnson, Kristin E.; Orton, Daniel J.; Monroe, Matthew E.; Moore, Ronald J.; Smith, Richard D.; Baker, Erin S.

    2017-01-01

    Ion mobility spectrometry (IMS) is a widely used analytical technique for rapid molecular separations in the gas phase. Though IMS alone is useful, its coupling with mass spectrometry (MS) and front-end separations is extremely beneficial for increasing measurement sensitivity, peak capacity of complex mixtures, and the scope of molecular information available from biological and environmental sample analyses. In fact, multiple disease screening and environmental evaluations have illustrated that the IMS-based multidimensional separations extract information that cannot be acquired with each technique individually. This review highlights three-dimensional separations using IMS-MS in conjunction with a range of front-end techniques, such as gas chromatography, supercritical fluid chromatography, liquid chromatography, solid-phase extractions, capillary electrophoresis, field asymmetric ion mobility spectrometry, and microfluidic devices. The origination, current state, various applications, and future capabilities of these multidimensional approaches are described in detail to provide insight into their uses and benefits. PMID:28301728

  11. Coupling Front-End Separations, Ion Mobility Spectrometry, and Mass Spectrometry For Enhanced Multidimensional Biological and Environmental Analyses

    Energy Technology Data Exchange (ETDEWEB)

    Zheng, Xueyun; Wojcik, Roza; Zhang, Xing; Ibrahim, Yehia M.; Burnum-Johnson, Kristin E.; Orton, Daniel J.; Monroe, Matthew E.; Moore, Ronald J.; Smith, Richard D.; Baker, Erin M.

    2017-06-12

    Ion mobility spectrometry (IMS) is a widely used analytical technique for rapid molecular separations in the gas phase. IMS alone is useful, but its coupling with mass spectrometry (MS) and front-end separations has been extremely beneficial for increasing measurement sensitivity, peak capacity of complex mixtures, and the scope of molecular information in biological and environmental sample analyses. Multiple studies in disease screening and environmental evaluations have even shown these IMS-based multidimensional separations extract information not possible with each technique individually. This review highlights 3-dimensional separations using IMS-MS in conjunction with a range of front-end techniques, such as gas chromatography (GC), supercritical fluid chromatography (SFC), liquid chromatography (LC), solid phase extractions (SPE), capillary electrophoresis (CE), field asymmetric ion mobility spectrometry (FAIMS), and microfluidic devices. The origination, current state, various applications, and future capabilities for these multidimensional approaches are described to provide insight into the utility and potential of each technique.

  12. A 7-13 GHz low-noise tuned optical front-end amplifier for heterodyne transmission system application

    DEFF Research Database (Denmark)

    Ebskamp, Frank; Schiellerup, Gert; Høgdal, Morten

    1991-01-01

    The authors present a 7-13 GHz low-noise bandpass tuned optical front-end amplifier, showing 46±1 dBΩ transimpedance, and a noise spectral density of about 12 pA/√Hz. This is the first time such a flat response and such low noise were obtained simultaneously at these frequencies, without any...... further equalization. A new lay-out technique enabled close monitoring of each manufacturing step, and excellent agreement between the measurements and simulations was observed. The front-end was used in an optical 2.5 Gb/s coherent CPFSK continuous phase frequency shift keying system experiment......, resulting in a sensitivity of -41.7 dBm at a bit error rate of 10-9...

  13. UTD-CRSS Submission for MGB-3 Arabic Dialect Identification: Front-end and Back-end Advancements on Broadcast Speech

    OpenAIRE

    Bulut, Ahmet E.; Zhang, Qian; Zhang, Chunlei; Bahmaninezhad, Fahimeh; Hansen, John H. L.

    2017-01-01

    This study presents systems submitted by the University of Texas at Dallas, Center for Robust Speech Systems (UTD-CRSS) to the MGB-3 Arabic Dialect Identification (ADI) subtask. This task is defined to discriminate between five dialects of Arabic, including Egyptian, Gulf, Levantine, North African, and Modern Standard Arabic. We develop multiple single systems with different front-end representations and back-end classifiers. At the front-end level, feature extraction methods such as Mel-freq...

  14. Design, development, and verification of the Planck low frequency instrument 70 GHz front-end and back-end modules

    OpenAIRE

    J. Varis, N..J..H.; Laaninen, M.; Kilpiä, V..H.; Jukkala, P.; Tuovinen, J.; Ovaska, S.; Sjöman, P.; Kangaslahti, P.; Gaier, T.; Hoyland, R.; Meinhold, P.; Mennella, A.; Bersanelli, M.; Butler, R..C.; Cuttaia, F.

    2009-01-01

    70 GHz radiometer front-end and back-end modules for the Low Frequency Instrument of the European Space Agencys Planck Mission were built and tested. The operating principles and the design details of the mechanical structures are described along with the key InP MMIC low noise amplifiers and phase switches of the units. The units were tested in specially designed cryogenic vacuum chambers capable of producing the operating conditions required for Planck radiometers, specifically, a physical ...

  15. 60-GHz Band Copper Ball Vertical Interconnection for MMW 3-D System-in-Package Front-End Modules

    Science.gov (United States)

    Yoshida, Satoshi; Tanifuji, Shoichi; Kameda, Suguru; Suematsu, Noriharu; Takagi, Tadashi; Tsubouchi, Kazuo

    In order to realize millimeter-wave (MMW) 3-D system-in-package (SiP) front-end modules, we propose a 60-GHz band copper ball vertical interconnection structure, which interconnects between vertically stacked substrates. The structure enables ICs to be placed between the vertically stacked substrates. Since the diameter of the copper balls must exceed the thickness of the ICs, the distance between the substrates in the modules is larger than that of the flip-chip interconnection widely used in the MMW-band. Therefore, the conventional flip-chip interconnection does not scale for the interconnection between the substrates in MMW 3-D SiP front-end modules. The layout of grounded copper balls and the patterns of inner ground layers in the upper/lower substrates are designed using 3-D electromagnetic field simulation. The designed structure allows less than 1dB transmission loss up to 71.1GHz, compared with a through transmission line. The result is verified with fabrication and measurement and confirms the feasibility of MMW 3-D SiP front-end modules.

  16. Neural recording front-end IC using action potential detection and analog buffer with digital delay for data compression.

    Science.gov (United States)

    Liu, Lei; Yao, Lei; Zou, Xiaodan; Goh, Wang Ling; Je, Minkyu

    2013-01-01

    This paper presents a neural recording analog front-end IC intended for simultaneous neural recording with action potential (AP) detection for data compression in wireless multichannel neural implants. The proposed neural recording front-end IC detects the neural spikes and sends only the preserved AP information for wireless transmission in order to reduce the overall power consumption of the neural implant. The IC consists of a low-noise neural amplifier, an AP detection circuit and an analog buffer with digital delay. The neural amplifier makes use of a current-reuse technique to maximize the transconductance efficiency for attaining a good noise efficiency factor. The AP detection circuit uses an adaptive threshold voltage to generate an enable signal for the subsequent functional blocks. The analog buffer with digital delay is employed using a finite impulse response (FIR) filter which preserves the AP waveform before the enable signal as well as provides low-pass filtering. The neural recording front-end IC has been designed using standard CMOS 0.18-µm technology occupying a core area of 220 µm by 820 µm.

  17. Low Noise and Highly Linear Wideband CMOS RF Front-End for DVB-H Direct-Conversion Receiver

    Science.gov (United States)

    Nam, Ilku; Moon, Hyunwon; Woo, Doo Hyung

    In this paper, a wideband CMOS radio frequency (RF) front-end for digital video broadcasting-handheld (DVB-H) receiver is proposed. The RF front-end circuit is composed of a single-ended resistive feedback low noise amplifier (LNA), a single-to-differential amplifier, an I/Q down-conversion mixer with linearized transconductors employing third order intermodulation distortion cancellation, and a divide-by-two circuit with LO buffers. By employing a third order intermodulation (IMD3) cancellation technique and vertical NPN bipolar junction transistor (BJT) switching pair for an I/Q down-conversion mixer, the proposed RF front-end circuit has high linearity and low low-frequency noise performance. It is fabricated in a 0.18µm deep n-well CMOS technology and draws 12mA from a 1.8V supply voltage. It shows a voltage gain of 31dB, a noise figure (NF) lower than 2.6dB, and an IIP3 of -8dBm from 470MHz to 862MHz.

  18. A novel pseudo resistor structure for biomedical front-end amplifiers.

    Science.gov (United States)

    Yu-Chieh Huang; Tzu-Sen Yang; Shun-Hsi Hsu; Xin-Zhuang Chen; Jin-Chern Chiou

    2015-08-01

    This study proposes a novel pseudo resistor structure with a tunable DC bias voltage for biomedical front-end amplifiers (FEAs). In the proposed FEA, the high-pass filter composed of differential difference amplifier and a pseudo resistor is implemented. The FEA is manufactured by using a standard TSMC 0.35 μm CMOS process. In this study, three types FEAs included three different pseudo resistor are simulated, fabricated and measured for comparison and electrocorticography (ECoG) measurement, and all the results show the proposed pseudo resistor is superior to other two types in bandwidth. In chip implementation, the lower and upper cutoff frequencies of the high-pass filter with the proposed pseudo resistor are 0.15 Hz and 4.98 KHz, respectively. It also demonstrates lower total harmonic distortion performance of -58 dB at 1 kHz and higher stability with wide supply range (1.8 V and 3.3 V) and control voltage range (0.9 V and 1.65 V) than others. Moreover, the FEA with the proposed pseudo successfully recorded spike-and-wave discharges of ECoG signal in in vivo experiment on rat with pentylenetetrazol-induced seizures.

  19. CMOS Receiver Front-ends for Gigabit Short-Range Optical Communications

    CERN Document Server

    Aznar, Francisco; Calvo Lopez, Belén

    2013-01-01

    This book describes optical receiver solutions integrated in standard CMOS technology, attaining high-speed short-range transmission within cost-effective constraints.  These techniques support short reach applications, such as local area networks, fiber-to-the-home and multimedia systems in cars and homes. The authors show how to implement the optical front-end in the same technology as the subsequent digital circuitry, leading to integration of the entire receiver system in the same chip.  The presentation focuses on CMOS receiver design targeting gigabit transmission along a low-cost, standardized plastic optical fiber up to 50m in length.  This book includes a detailed study of CMOS optical receiver design – from building blocks to the system level. Reviews optical communications, including long-haul transmission systems and emerging applications focused on short-range; Explains necessary fundamentals, such as characteristics of a data signal, system requirements affecting receiver design and key par...

  20. Demonstration of an RF front-end based on GaN HEMT technology

    Science.gov (United States)

    Ture, Erdin; Musser, Markus; Hülsmann, Axel; Quay, Rüdiger; Ambacher, Oliver

    2017-05-01

    The effectiveness of the developed front-end on blocking the communication link of a commercial drone vehicle has been demonstrated in this work. A jamming approach has been taken in a broadband fashion by using GaN HEMT technology. Equipped with a modulated-signal generator, a broadband power amplifier, and an omni-directional antenna, the proposed system is capable of producing jamming signals in a very wide frequency range between 0.1 - 3 GHz. The maximum RF output power of the amplifier module has been software-limited to 27 dBm (500 mW), complying to the legal spectral regulations of the 2.4 GHz ISM band. In order to test the proof of concept, a real-world scenario has been prepared in which a commercially-available quadcopter UAV is flown in a controlled environment while the jammer system has been placed in a distance of about 10 m from the drone. It has been proven that the drone of interest can be neutralized as soon as it falls within the range of coverage (˜3 m) which endorses the promising potential of the broadband jamming approach.

  1. Development of pixel front-end electronics using advanced deep submicron CMOS technologies

    International Nuclear Information System (INIS)

    Havranek, Miroslav

    2014-09-01

    The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

  2. Dynamic testing for radiation induced failures in a standard CMOS submicron technology pixel front-end

    International Nuclear Information System (INIS)

    Venuto, D. de; Corsi, F.; Ohletz, M.J.

    1999-01-01

    A testing method for the detection of performance degradation induced by high-dose irradiation in high-energy experiments has been developed. The method used is based on a fault signature generation defined on the basis of the state-space analysis for linear circuits. By sampling the response of the circuit under test (CUT) to a single rectangular pulse, a set of parameters α are evaluated which are functions of the circuit singularities and constitute a signature for the CUT. Amplitude perturbations of these parameters engendered by element drift failure indicate a possible faulty condition. The effects of radiation induced faults in the analogue CMOS front-end of a silicon pixel detector employed in high energy physics experiments has been investigated. The results show that, even for the 800 krad dose, the test devised is able to detect the degradation of the amplifier performances. The results show also that hardened devices do not necessarily produce high circuit immunity to radiation and the proposed test method provides a mean to detect these performance deviations and to monitor them during the operating life of the chip. (A.C.)

  3. Continuous-time digital front-ends for multistandard wireless transmission

    CERN Document Server

    Nuyts, Pieter A J; Dehaene, Wim

    2014-01-01

    This book describes the design of fully digital multistandard transmitter front-ends which can directly drive one or more switching power amplifiers, thus eliminating all other analog components.  After reviewing different architectures, the authors focus on polar architectures using pulse width modulation (PWM), which are entirely based on unclocked delay lines and other continuous-time digital hardware.  As a result, readers are enabled to shift accuracy concerns from the voltage domain to the time domain, to coincide with submicron CMOS technology scaling.  The authors present different architectural options and compare them, based on their effect on the signal and spectrum quality.  Next, a high-level theoretical analysis of two different PWM-based architectures – baseband PWM and RF PWM – is made.  On the circuit level, traditional digital components and design techniques are revisited from the point of view of continuous-time digital circuits.  Important design criteria are identified and diff...

  4. A low-power high-sensitivity analog front-end for PPG sensor.

    Science.gov (United States)

    Binghui Lin; Atef, Mohamed; Guoxing Wang

    2017-07-01

    This paper presents a low-power analog front-end (AFE) photoplethysmography (PPG) sensor fabricated in 0.35 μm CMOS process. The AFE amplifies the weak photocurrent from the photodiode (PD) and converts it to a strong voltage at the output. In order to decrease the power consumption, the circuits are designed in subthreshold region; so the total biasing current of the AFE is 10 μ A. Since the large input DC photocurrent is a big issue for the PPG sensing circuit, we apply a DC photocurrent rejection technique by adding a DC current-cancellation loop to reject the large DC photocurrent up to 10 μA. In addition, a pseudo resistor is used to reduce the high-pass corner frequency below 0.5 Hz and Gm-C filter is adapted to reject the out-of-band noise higher than 16 Hz. For the whole sensor, the amplifier chain can achieve a total gain of 140 dBμ and an input integrated noise current of 68.87 pA rms up to 16 Hz.

  5. Irradiation studies of multimode optical fibres for use in ATLAS front-end links

    International Nuclear Information System (INIS)

    Mahout, G.; Pearce, M.; Andrieux, M-L.; Arvidsson, C-B.; Charlton, D.G.; Dinkespiler, B.; Dowell, J.D.; Gallin-Martel, L.; Homer, R.J.; Jovanovic, P.; Kenyon, I.R.; Kuyt, G.; Lundquist, J.; Mandic, I.; Martin, O.; Shaylor, H.R.; Stroynowski, R.; Troska, J.; Wastie, R.L.; Weidberg, A.R.; Wilson, J.A.; Ye, J.

    2000-01-01

    The radiation tolerance of three multimode optical fibres has been investigated to establish their suitability for the use in the front-end data links of the ATLAS experiment. Both gamma and neutron irradiation studies are reported. A step-index fibre with a pure silica core showed an induced attenuation of ∼0.05 dB/m at 330 kGy(Si) and 1x10 15 n(1 MeV Si)/cm 2 and is suitable for use with the inner detector links which operate at 40-80 Mb/s. A graded-index fibre with a predominantly germanium-doped core exhibits an induced attenuation of ∼0.1 dB/m at 800 Gy(Si) and 2x10 13 n(1 MeV Si)/cm 2 and is suitable for the calorimeter links which operate at 1.6 Gb/s. Measurements of the dose rate dependence of the induced attenuation indicate that the attenuation in ATLAS will be lower

  6. Low power frontend ASIC (Anusuchak) for dosimeter using Si-PIN detector

    International Nuclear Information System (INIS)

    Darad, A.; Chandratre, V.B.

    2010-01-01

    A low power ASIC (Anusuchak) for silicon PIN detector signal processing channel designed for pocket dosimeter in 0.35 μm CMOS process. The ASIC contains two channels one for Beta particle and other for Gamma ray. The channel is a CSA integrated with a shaper, gain stage and comparator with total power consumption of 4.6 mW. The ASIC has gain of 12 mV/fC and can be raised to 29 mV/fC without degrading the noise, power or linearity specification of the channel. The channel has a peaking time of 1.2 μs with baseline recovery within 5.3 μs and noise figure of 420 e- at 0 pF. The noise slope is 17 e-/pF. The ASIC is designed for single supply of 3.3 V for which battery is available. (author)

  7. Dynamic Channel Allocation

    Science.gov (United States)

    2003-09-01

    21 9. Beowulf Ethernet Channel Bonding.................................................22 F. SUMMARY...on demand, hybrid channel allocation in wireless networks, and 3 Beowulf Ethernet channel bonding. The background information presented in this...channels are available for dynamic allocation [Ref 32]. 9. Beowulf Ethernet Channel Bonding A by-product of using older computers in a NASA research lab

  8. Study of the violation of the T and CP symmetries in the reactions Λb0 → Λ0 + a vector meson. Validation of the Front-end electronics for the PreShower detector of the LHCb experiment

    International Nuclear Information System (INIS)

    Conte, E.

    2007-11-01

    This thesis probes the beauty baryon physics in the framework of the LHCb experiment. The present study deals with the Λ b 0 → Λ 0 V decays where V is a vector meson such as J/Ψ(μ + μ - ), φ(K + K - ), ω(π + π - π0) or the ρ 0 - ω 0 (π + π - ) mixing. These processes allow to test independently the CP symmetry, which violation has not been observed yet in the baryonic sector, and the T symmetry, which experimental proofs are limited. Among the possible perspectives, a precise measurement of the Λ b 0 lifetime could contribute to the resolution of the raising theoretical-experimental puzzle. A phenomenological model of the Λ b 0 → Λ 0 V decays has been performed, from which branching ratios and angular distributions have been estimated. An advanced study of the reconstruction and the selection of these reactions by the LHCb apparatus shows that the channel Λ b 0 → Λ 0 J/Ψ is the dominant channel on both statistics and purity aspects. The Λ b 0 lifetime measure is the most imminent result; the constrains on asymmetries due to CP and T violation require several data taking years. Besides, an instrumental work has been achieved on the read-out electronics, called Front-End, of the experiment pre-shower. This contribution takes into account the validation of the prototype boards and the development of tools required by the qualification of the 100 production boards. (author)

  9. A front-end wafer-level microsystem packaging technique with micro-cap array

    Science.gov (United States)

    Chiang, Yuh-Min

    2002-09-01

    The back-end packaging process is the remaining challenge for the micromachining industry to commercialize microsystem technology (MST) devices at low cost. This dissertation presents a novel wafer level protection technique as a final step of the front-end fabrication process for MSTs. It facilitates improved manufacturing throughput and automation in package assembly, wafer level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized micro-cap array, which consists of an assortment of small caps micro-molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments during packaging. The micro-cap array is first constructed by a micromachining process with micro-molding technique, then sealed to the device wafer at wafer level. Epoxy-based wafer-level micro cap array has been successfully fabricated and showed good compatibility with conventional back-end packaging processes. An adhesive transfer technique was demonstrated to seal the micro cap array with a MEMS device wafer. No damage or gross leak was observed while wafer dicing or later during a gross leak test. Applications of the micro cap array are demonstrated on MEMS, microactuators fabricated using CRONOS MUMPS process. Depending on the application needs, the micro-molded cap can be designed and modified to facilitate additional component functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. Successful fabrication of a micro cap array comprised with microlenses can provide active functions as well as passive protection. An optical tweezer array could be one possibility for applications of a micro cap with microlenses. The micro cap itself could serve as micro well for DNA or bacteria amplification as well.

  10. Integration of 2D CMUT arrays with front-end electronics for volumetric ultrasound imaging.

    Science.gov (United States)

    Wygant, Ira O; Zhuang, Xuefeng; Yeh, David T; Oralkan, Omer; Sanli Ergun, A; Karaman, Mustafa; Khuri-Yakub, Butrus T

    2008-02-01

    For three-dimensional (3D) ultrasound imaging, connecting elements of a two-dimensional (2D) transducer array to the imaging system's front-end electronics is a challenge because of the large number of array elements and the small element size. To compactly connect the transducer array with electronics, we flip-chip bond a 2D 16 x 16-element capacitive micromachined ultrasonic transducer (CMUT) array to a custom-designed integrated circuit (IC). Through-wafer interconnects are used to connect the CMUT elements on the top side of the array with flip-chip bond pads on the back side. The IC provides a 25-V pulser and a transimpedance preamplifier to each element of the array. For each of three characterized devices, the element yield is excellent (99 to 100% of the elements are functional). Center frequencies range from 2.6 MHz to 5.1 MHz. For pulse echo operation, the average - 6-dB fractional bandwidth is as high as 125%. Transmit pressures normalized to the face of the transducer are as high as 339 kPa and input-referred receiver noise is typically 1.2 to 2.1 mPa/pHz. The flip-chip bonded devices were used to acquire 3D synthetic aperture images of a wire-target phantom. Combining the transducer array and IC, as shown in this paper, allows for better utilization of large arrays, improves receive sensitivity, and may lead to new imaging techniques that depend on transducer arrays that are closely coupled to IC electronics.

  11. Wireless front-end with power management for an implantable cardiac microstimulator.

    Science.gov (United States)

    Lee, Shuenn-Yuh; Hsieh, Cheng-Han; Yang, Chung-Min

    2012-02-01

    Inductive coupling is presented with the help of a high-efficiency Class-E power amplifier for an implantable cardiac microstimulator. The external coil inductively transmits power and data with a carrier frequency of 256 kHz into the internal coil of electronic devices inside the body. The detected cardiac signal is fed back to the external device with the same pair of coils to save on space in the telemetry device. To maintain the power reliability of the microstimulator for long-term use, two small rechargeable batteries are employed to supply voltage to the internal circuits. The power management unit, which includes radio frequency front-end circuits with battery charging and detection functions, is used for the supply control. For cardiac stimulation, a high-efficiency charge pump is also proposed in the present paper to generate a stimulated voltage of 3.2 V under a 1 V supply voltage. A phase-locked-loop (PLL)-based phase shift keying demodulator is implemented to efficiently extract the data and clock from an inductive AC signal. The circuits, with an area of 0.45 mm², are implemented in a TSMC 0.35 μm 2P4M standard CMOS process. Measurement results reveal that power can be extracted from the inductive coupling and stored in rechargeable batteries, which are controlled by the power management unit, when one of the batteries is drained. Moreover, the data and clock can be precisely recovered from the coil coupling, and a stimulated voltage of 3.2 V can be readily generated by the proposed charge-pump circuits to stimulate cardiac tissues.

  12. Method of multi-channel data readout and acquisition

    Science.gov (United States)

    Degtiarenko, Pavel V.; Popov, Vladimir E.

    2010-06-15

    A method for dealing with the problem of simultaneous continuous readout of large number of data channels from the set of multiple sensors in instances where the use of multiple amplitude-to-digital converters is not practical or causes undesirable extra noise and distortion in the data. The new method uses sensor front-end s and subsequent electronics to transform the analog input signals and encode them into a series of short pulses that can be transmitted to a long distance via a high frequency transmission line without information loss. Upon arrival at a destination data decoder and analyzer device, the series of short pulses can be decoded and transformed back, to obtain, store, and utilize the sensor information with the required accuracy.

  13. Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gaioni, L. [INFN, Pavia; Braga, D. [Fermilab; Christian, D. [Fermilab; Deptuch, G. [Fermilab; Fahim. F., Fahim. F. [Fermilab; Nodari, B. [Lyon, IPN; Ratti, L. [INFN, Pavia; Re, V. [INFN, Pavia; Zimmerman, T. [Fermilab

    2017-09-01

    This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided

  14. Design of a New Switching Power Supply for the ATLAS TileCAL Front-End Electronics

    CERN Document Server

    Drake, G; The ATLAS collaboration

    2012-01-01

    We present the design of an upgraded switching power supply for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and improved reliability, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the steps taken to improve the design. We present the results from extensive radiation testing to qualify the design, including SEU sensitivity. We also present our reliability analysis. Production of 2400 new bricks for the detector is currently in progress, and we present preliminary results from the production checkout.

  15. Design of a New Switching Power Supply for the ATLAS TileCal Front-End Electronics

    CERN Document Server

    Drake, Gary; The ATLAS collaboration

    2012-01-01

    We present the design of an upgraded switching power supply for the front-end electronics of the ATLAS Hadron Tile Calorimeter. The new design features significant improvement in noise, improved fault detection, and improved reliability, while retaining the compact size, water-cooling, output control, and monitoring features. We discuss the steps taken to improve the design. We present the results from extensive radiation testing to qualify the design, including SEU sensitivity. We also present our reliability analysis. Production of 2400 new bricks for the detector is in progress, and we present preliminary results from the production checkout.

  16. An Upgraded Front-End Switching Power Supply Design For the ATLAS TileCAL Detector of the LHC

    CERN Document Server

    Drake, Gary; The ATLAS collaboration

    2011-01-01

    We present the design of an upgraded switching power supply brick for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and generally a more robust design, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the improvements to the design, and the radiation testing that we have done to qualify the design. We also present our plans for the production of 2400 new bricks for installation on the detector in 2013.

  17. An Upgraded Front-End Switching Power Supply Design for the ATLAS TileCAL Detector of the LHC

    CERN Document Server

    Drake, G; The ATLAS collaboration; De Lurgio, P; Henriques, A; Minashvili, I; Nemecek, S; Price, L; Proudfoot, J; Stanek, R

    2011-01-01

    We present the design of an upgraded switching power supply brick for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and generally a more robust design, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the improvements to the design, and the radiation testing that we have done to qualify the design. We also present our plans for the production of 2400 new bricks for installation on the detector in 2013.

  18. Design of an FPGA-based embedded system for the ATLAS Tile Calorimeter front-end electronics test-bench

    International Nuclear Information System (INIS)

    Carrió, F; Valero, A; Kim, H Y; Usai, G; Moreno, P; Reed, R; Sandrock, C; Schettino, V; Souza, J; Shalyugin, A; Solans, C

    2014-01-01

    The portable test-bench for the certification of the ATLAS tile hadronic calorimeter front-end electronics has been redesigned for the present Long Shutdown (LS1) of LHC, improving its portability and expanding its functionalities. This paper presents a new test-bench based on a Xilinx Virtex-5 FPGA that implements an embedded system using a PowerPC 440 microprocessor hard core and custom IP cores. A light Linux version runs on the PowerPC microprocessor and handles the IP cores which implement the different functionalities needed to perform the desired tests such as TTCvi emulation, G-Link decoding, ADC control and data reception

  19. Instrumentation of the upgraded ATLAS tracker with a double buffer front-end architecture for track triggering

    International Nuclear Information System (INIS)

    Wardrope, D

    2012-01-01

    The Large Hadron Collider will be upgraded to provide instantaneous luminosity L = 5 × 10 34 cm −2 s −1 , leading to excessive rates from the ATLAS Level-1 trigger. A double buffer front-end architecture for the ATLAS tracker replacement is proposed, that will enable the use of track information in trigger decisions within 20 μs in order to reduce the high trigger rates. Analysis of ATLAS simulations have found that using track information will enable the use of single lepton triggers with transverse momentum thresholds of p T ∼ 25 GeV, which will be of great benefit to the future physics programme of ATLAS.

  20. Irradiation induced effects in the FE-I4 front-end chip of the ATLAS IBL detector

    CERN Document Server

    La Rosa, Alessandro; The ATLAS collaboration

    2016-01-01

    The ATLAS Insertable B-Layer (IBL) detector was installed into the ATLAS experiment in 2014 and has been in operation since 2015. During the first year of IBL data taking an increase of the low voltage currents produced by the FE-I4 front-end chip was observed and this increase was traced back to the radiation damage in the chip. The dependence of the current on the total-ionising dose and temperature has been tested with Xray and proton irradiations and will be presented in this paper together with the detector operation guidelines.

  1. Front-end and back-end electrochemistry of molten salt in accelerator-driven transmutation systems

    International Nuclear Information System (INIS)

    Williamson, M.A.; Venneri, F.

    1995-01-01

    The objective of this work is to develop preparation and clean-up processes for the fuel and carrier salt in the Los Alamos Accelerator-Driven Transmutation Technology molten salt nuclear system. The front-end or fuel preparation process focuses on the removal of fission products, uranium, and zirconium from spent nuclear fuel by utilizing electrochemical methods (i.e., electrowinning). The same method provides the separation of the so-called noble metal fission products at the back-end of the fuel cycle. Both implementations would have important diversion safeguards. The proposed separation processes and a thermodynamic analysis of the electrochemical separation method are presented

  2. Production and performance of LHCb triple-GEM detectors equipped with the dedicated CARDIAC-GEM front-end electronics

    Energy Technology Data Exchange (ETDEWEB)

    Alfonsi, M. [Laboratori Nazionali di Frascati - INFN (Italy)]. E-mail: matteo.alfonsi@lnf.infn.it; Bencivenni, G. [Laboratori Nazionali di Frascati - INFN (Italy); Bonivento, W. [Sezione INFN di Cagliari (Italy); Cardelli, E. [Sezione INFN di Cagliari (Italy); Cardini, A. [Sezione INFN di Cagliari (Italy); De Simone, P. [Laboratori Nazionali di Frascati - INFN (Italy); Domenici, D. [Laboratori Nazionali di Frascati - INFN (Italy); Murtas, F. [Laboratori Nazionali di Frascati - INFN (Italy); Pinci, D. [Sezione INFN di Roma 1 (Italy); Poli Lener, M. [Laboratori Nazionali di Frascati - INFN (Italy); Raspino, D. [Sezione INFN di Cagliari (Italy); Saitta, B. [Sezione INFN di Cagliari (Italy)

    2007-03-01

    The production of the triple-GEM detectors for the innermost region of the first muon station of the LHCb experiment has started in February 2006, and is foreseen to be completed by the end of July. The final design of the detector and the construction procedure and tools, as well as the quality controls are defined. The performances of each detector, composed by two triple-GEM chambers equipped with dedicated CARDIAC-GEM front-end electronics, are studied with a cosmic ray telescope. The cosmic ray telescope has been set up including all the final off-detector components.

  3. Charge-sensitive amplifier front-end with an nJFET and a forward-biased reset diode

    Energy Technology Data Exchange (ETDEWEB)

    Fazzi, A. [Politecnico di Milano (Italy); Jalas, P. [Univ. of Helsinki, Espoo (Finland); Rehak, P. [Brookhaven National Lab., Upton, NY (United States); Holl, P. [Max Planck Inst., Garching (Germany)

    1996-12-01

    A new configuration of a resistorless charge sensitive preamplifier with an nJFET as an input device was tested. The dc level of the input of the amplifier was kept constant by a slightly forward-biased np junction connected between the input of the amplifier and ground. A noise level of 22 root mean square (r.m.s.) electrons is measured at 295 K and 15 r.m.s. electrons at 253 K. The dynamic behavior of the amplifier is investigated with different leakage current conditions. The technological benefits and the suitability of the front-end connection for room temperature detectors, particularly multianode drift chambers, are highlighted.

  4. Silicon photomultipliers: On ground characterizations and modelling for use in front-end electronics aimed to space-borne experiments

    Energy Technology Data Exchange (ETDEWEB)

    Badoni, Davide [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy)]. E-mail: davide.badoni@roma2.infn.it; Altamura, Francesco [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Basili, Alessandro [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Bencardino, Raffaele [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Bidoli, Vittorio [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Casolino, Marco [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); De Carli, Anna [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Froysland, Tom [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Marchetti, Marcello [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Messi, Roberto [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Minori, Mauro [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Picozza, Piergiorgio [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Salina, Gaetano [Phy. Dep. Univ. ' Tor Vergata' , Tor Vergata Sect. INFN (Italy); Galper, Arkady [Moscow Engineering and Physics Institute (Russian Federation); Korotkov, Mikhail [Moscow Engineering and Physics Institute (Russian Federation); Popov, Alexander [Moscow Engineering and Physics Institute (Russian Federation)

    2007-03-01

    Silicon Photomultipliers (Si-PM) consist of an array of semiconductor photodiodes joint on the common substrate and operating in limited geiger mode. A new generation of Si-PM is currently under test in INFN Rome Tor Vergata facilities: they consist of a 5625 element, 3*3mm{sup 2} array with an improved light response. These elements have been characterized. Furthermore, a functional model of the Si-PM has been developed to be used in a VLSI development of front-end electronics.

  5. A high dynamic range programmable CMOS front-end filter with a tuning range from 1850 to 2400 MHz

    DEFF Research Database (Denmark)

    Christensen, Kåre Tais; Lee, Thomas H.; Bruun, Erik

    2005-01-01

    This paper presents a highly programmable front-end filter and amplifier intended to replace SAW filters and low noise amplifiers (LNA) in multi-mode direct conversion radio receivers. The filter has a 42 MHz bandwidth, is tunable from 1850 to 2400 MHz, achieves a 5.8 dB NF, -25 dBm in-band 1-dB ......B input compression point (ICP) and 0 dBm out-of-band ICP while drawing 26 mA from a 2.5 V supply....

  6. Design of an FPGA-based embedded system for the ATLAS Tile Calorimeter front-end electronics test-bench

    CERN Document Server

    Carrio, F; The ATLAS collaboration; Moreno, P; Reed, R; Sandrock, C; Shalyugin, A; Schettino, V; Solans, C; Souza, J; Usai, G; Valero, A

    2013-01-01

    The portable test bench (VME based) used for the certification of the Tile calorimeter front-end electronics has been redesigned for the LHC Long Shutdown (2013-2014) improving its portability. The new version is based on a Xilinx Virtex 5 FPGA that implements an embedded system using a hard core PowerPC 440 microprocessor and custom IP cores. The PowerPC microprocessor runs a light Linux version and handles the IP cores written in VHDL that implement the different functionalities (TTC, G-Link, CAN-Bus) Description of the system and performance measurements of the different components will be shown.

  7. Status on the development of front-end and readout electronics for ...

    Indian Academy of Sciences (India)

    These technologies allow also to implement efficient data extraction and signal processing techniques such as analog sampling and on-chip digitization. For detectors that covers of the order of 100 square meters and millions of channels, the multiplexing of several tasks such as analog-to-digital conversion and zero sup-.

  8. Analog front-end electronics for the outer layers of the SuperB SVT: Design and expected performances

    Science.gov (United States)

    Bombelli, Luca; Fiorini, Carlo; Nasri, Bayan; Trigilio, Paolo; Citterio, Mauro; Neri, Nicola

    2013-08-01

    The Silicon Vertex Tracker (SVT) of the new SuperB collider will be composed of 6 different detector layers [1]. The innermost layer (L0) will be composed by striplets or pixels [2]; the other 5 detector layers will be double-sided long-strip detectors. The strip geometries and the foreseen hit-rates will change according to the different layers. As a consequence, different optimization of the analog read-out electronics is needed in order to provide high detection-efficiency and low noise level in the different layers. Two readout ASICs are currently developed, one for layers 0-3, another for layers 4 and 5; they differ mainly in the analog front-end. In this work, we present the design and the expected performances of the analog front-end for layers 4 and 5. For these layers, the strip detectors show a very high stray capacitance and high series resistance. In this condition, the noise optimization is our primary concern. A necessary compromise on the best peaking time to achieve an acceptable noise level together with efficiency and timing accuracy has been found. We will present the design of preamplifier and shaper and the results of simulation of noise performance and efficiency (with the expected background rates). In addition, the design of the time-over-threshold and its use to correct the time-walk of the event trigger is discussed as well as the achievable timing accuracy of the circuit.

  9. Real time access to commercial microwave link data: Details of the data acquisition software, the database and its web frontend

    Science.gov (United States)

    Keis, Felix; Chwala, Christian; Kunstmann, Harald

    2015-04-01

    Using commercial microwave link networks for precipitation estimation has become popular in the last years. Acquiring the necessary data from the network operators is however still difficult. Usually, data is provided to researches with large temporal delay and at irregular basis. Driven by the demand to facilitate this data accessibility, a custom acquisition software for microwave links has been developed in joint cooperation with our industry partner Ericsson. It is capable of recording data from a great number of microwave links simultaneously and of forwarding the data instantaneously to a newly established KIT-internal database. It makes use of the Simple Network Management Protocol (SNMP) and collects the transmitter and receiver power levels via asynchronous SNMP requests. The software is currently in its first operational test phase, recording data from several hundred Ericsson microwave links in southern Germany. Furthermore the software is used to acquire data with 1 Hz temporal resolution from four microwave links operated by the skiing resort in Garmisch-Partenkirchen. For convenient accessibility of this amount of data we have developed a web frontend for the emerging microwave link database. It provides dynamic real time visualization and basic processing of the recorded transmitter and receiver power levels. Here we will present details of the custom data acquisition software with focus on the design of the KIT microwave link database and on the specifically developed web frontend.

  10. 2.5 Gbit/s Optical Receiver Front-End Circuit with High Sensitivity and Wide Dynamic Range

    Science.gov (United States)

    Zhu, Tiezhu; Mo, Taishan; Ye, Tianchun

    2017-12-01

    An optical receiver front-end circuit is designed for passive optical network and fabricated in a 0.18 um CMOS technology. The whole circuit consists of a transimpedance amplifier (TIA), a single-ended to differential amplifier and an output driver. The TIA employs a cascode stage as the input stage and auxiliary amplifier to reduce the miller effect. Current injecting technique is employed to enlarge the input transistor's transconductance, optimize the noise performance and overcome the lack of voltage headroom. To achieve a wide dynamic range, an automatic gain control circuit with self-adaptive function is proposed. Experiment results show an optical sensitivity of -28 dBm for a bit error rate of 10-10 at 2.5 Gbit/s and a maxim input optical power of 2 dBm using an external photodiode. The chip occupies an area of 1×0.9 mm2 and consumes around 30 mW from single 1.8 V supply. The front-end circuit can be used in various optical receivers.

  11. The CBM Experiment at FAIR-New challenges for Front-End Electronics, Data Acquisition and Trigger Systems

    International Nuclear Information System (INIS)

    Mueller, Walter F J

    2006-01-01

    The 'Compressed Baryonic Matter' (CBM) experiment at the new 'Facility for Antiproton and Ion Research' (FAIR) in Darmstadt is designed to study the properties of highly compressed baryonic matter produced in nucleus-nucleus collisions in the 10 to 45 A GeV energy range. One of the key observables is hidden (J/ψ) and open (D 0 , D ± ) charm production. To achieve an adequate sensitivity extremely high interaction rates of up to 10 7 events/second are required, resulting in major technological challenges for the detectors, front-end electronics and data processing. The front-end electronics will be self-triggered, autonomously detect particle hits, and output hit parameter together with a precise absolute time-stamp. Several layers of feature extraction and event selection will reduce the primary data flow of about 1 TByte/sec to a level of 1 GByte/sec. This new architecture avoids many limitations of conventional DAQ/Trigger systems and is for example essential for open charm detection, which requires the reconstruction of displaced vertices, in a high-rate heavy ion environment

  12. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS upgrade framework

    CERN Document Server

    Schreuder, Frans Philip; The ATLAS collaboration

    2018-01-01

    Starting during the upcoming major LHC shutdown (2019-2021), the ATLAS experiment at CERN will move to the Front-End Link eXchange (FELIX) system as the interface between the data acquisition system and the trigger and detector front-end electronics. FELIX will function as a router between custom serial links and a commodity switch network, which will use industry standard technologies to communicate with data collection and processing components. This presentation will describe the FELIX system design as well as reporting on results of the ongoing development program.

  13. The new version of the LHCb SOL40-SCA core to drive front-end GBT-SCAs for the LHCb upgrade

    CERN Document Server

    Viana Barbosa, Joao Vitor; Gaspar, Clara

    2018-01-01

    The LHCb experiment is currently engaged in an upgrade effort that will implement a triggerless 40 MHz readout system. The upgraded Front-End Electronics profit from the GBT chipset functionalities and bidirectional optical fibers for readout, control and synchronization. This paper describes the new version of the firmware core that transmits slow control information from the Control System to thousands of Front-End chips and discusses the implementation that expedites and makes the operation more versatile. The detailed architecture, original interaction with the software control system and integration within the LHCb upgraded architecture are described.

  14. New Channels, New Possibilities

    DEFF Research Database (Denmark)

    Pieterson, Willem; Ebbers, Wolfgang; Østergaard Madsen, Christian

    2017-01-01

    In this contribution we discuss the characteristics of what we call the fourth generation of public sector service channels: social robots. Based on a review of relevant literature we discuss their characteristics and place into multi-channel models of service delivery. We argue that social robots...... is not one homogenous type of channels, but rather breaks down in different (sub)types of channels, each with different characteristics and possibilities to supplement and/or replace existing channels. Given the variety of channels, we foresee challenges in incorporating these new channels in multi-channel...... models of service delivery. This is especially relevant given the current lack of evaluations of such models, the broad range of channels available, and their different stages of deployment at governments around the world. Nevertheless, social robots offer an potentially very relevant addition...

  15. A compact front-end electronics module for the SDC strawtube outer tracker

    International Nuclear Information System (INIS)

    Emery, M.S.; Alley, G.T.; Leitch, R.M.; Maples, R.A.; Holmes, W.

    1993-01-01

    The challenges of building a detector for the Superconducting Super Collider have been talked about for the last several years. Those challenges are proving to be real and in some cases tougher than expected as prototype subsystem and component development continues within the different collaborations. Not to be daunted, engineers and scientists are using ingenuity and novel designs to meet the challenges. One such area has been in the development of the outer tracker readout electronics for the Solenoidal Detector Collaboration (SDC) detector. The tracker has over 100,000 channels and is composed of strawtubes that are 4 mm in diameter and 4 meters long. The sheer number of channels and small-diameter tubes require a very high density packaging scheme with critical attendant concerns, including power consumption, cooling, and crosstalk. This paper describes the novel approach taken to solve some of these challenges

  16. Analog frontend for multichannel neuronal recording system with spike and LFP separation.

    Science.gov (United States)

    Perelman, Yevgeny; Ginosar, Ran

    2006-05-15

    A 0.35microm CMOS integrated circuit for multi-channel neuronal recording with twelve true-differential channels, band separation and digital offset calibration is presented. The measured signal is separated into a low-frequency local field potential and high-frequency spike data. Digitally programmable gains of up to 60 and 80 dB for the local field potential and spike bands are provided. DC offsets are compensated on both bands by means of digitally programmable DACs. Spike band is limited by a second order low-pass filter with digitally programmable cutoff frequency. The IC has been fabricated and tested. 3microV input referred noise on the spike data band was measured.

  17. A bipolar analog front-end integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1993-11-01

    A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using AT ampersand T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Φ=10 14 protons/cm 2 have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process

  18. SPACIROC2: a front-end readout ASIC for the JEM-EUSO observatory

    International Nuclear Information System (INIS)

    Ahmad, S; Barrillon, P; Blin-Bondil, S; Dagoret-Campagne, S; Taille, C de La; Dulucq, F; Martin-Chassard, G; Kawasaki, Y; Miyamoto, H; Ikeda, H; Iguchi, T; Kajino, F

    2013-01-01

    The SPACIROC ASIC is designed for the JEM-EUSO observatory onboard of the International Space Station (ISS). The main goal of JEM-EUSO is to observe Extensive Air Shower (EAS) produced in the atmosphere by the passage of the high energetic extraterrestrial particles above a few 10 19 eV. A low-power, rad-hard ASIC is proposed for reading out the 64-channel Multi-Anode Photomultipliers which are going to equip the detection surface of JEM-EUSO. The two main features of this ASIC are the photon counting mode for each input and the charge-to-time (Q-to-T) conversion for the multiplexed channels. In the photon counting mode, the 100% triggering efficiency is achieved for 50 fC input charges. For the Q-to-T converter, the ASIC requires a minimum input of 2 pC. In order to comply with the strict power budget available from the ISS, the ASIC is needed to dissipate less than 1 mW/channel. The design of SPACIROC and the test results are presented in this paper.

  19. The front-end electronics of the LHCb ring-imaging-Cherenkov system

    International Nuclear Information System (INIS)

    Wyllie, K.

    2006-01-01

    The LHCb experiment at the CERN Large Hadron Collider will use ring-imaging Cherenkov detectors for particle identification. By measuring rings of Cherenkov photons generated by elementary particles traversing a radiative medium, these particles can be identified across a wide range of momenta. The photons will be measured by a new type of detector, the pixel hybrid photon detector (HPD). In total, 484 HPDs will be used, providing ∼500,000 channels of data. Specific readout electronics have been developed for processing the data from the HPDs, and this paper describes the design and testing of these devices together with the final system to be used in the experiment. Emphasis is on the application-specific integrated circuits that are encapsulated within the HPDs, allowing high channel density and low noise. These are subject to the strict requirements of efficient photon detection and reliability within the harsh environment of the experiment. Special interconnect techniques developed for this application are described. Finally, the additional electronics infrastructure to readout the full system of 500,000 channels is outlined, including data transmission and power distribution

  20. Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging.

    Science.gov (United States)

    Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F Levent

    2014-02-01

    Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

  1. Hadamard quantum broadcast channels

    Science.gov (United States)

    Wang, Qingle; Das, Siddhartha; Wilde, Mark M.

    2017-10-01

    We consider three different communication tasks for quantum broadcast channels, and we determine the capacity region of a Hadamard broadcast channel for these various tasks. We define a Hadamard broadcast channel to be such that the channel from the sender to one of the receivers is entanglement-breaking and the channel from the sender to the other receiver is complementary to this one. As such, this channel is a quantum generalization of a degraded broadcast channel, which is well known in classical information theory. The first communication task we consider is classical communication to both receivers, the second is quantum communication to the stronger receiver and classical communication to other, and the third is entanglement-assisted classical communication to the stronger receiver and unassisted classical communication to the other. The structure of a Hadamard broadcast channel plays a critical role in our analysis: The channel to the weaker receiver can be simulated by performing a measurement channel on the stronger receiver's system, followed by a preparation channel. As such, we can incorporate the classical output of the measurement channel as an auxiliary variable and solve all three of the above capacities for Hadamard broadcast channels, in this way avoiding known difficulties associated with quantum auxiliary variables.

  2. A Complete Readout Chain of the ATLAS Tile Calorimeter for the HL-LHC: from FATALIC Front-End Electronics to Signal Reconstruction

    CERN Document Server

    Senkin, Sergey; The ATLAS collaboration

    2017-01-01

    We present a front-end readout system, an ASIC called FATALIC, proposed for the high-luminosity phase LHC upgrade of the ATLAS Tile Calorimeter. Based on 130 nm CMOS technology, FATALIC performs the full signal processing, including amplification, shaping and digitisation.

  3. A Front-End ASIC with Receive Sub-array Beamforming Integrated with a 32 × 32 PZT Matrix Transducer for 3-D Transesophageal Echocardiography

    NARCIS (Netherlands)

    Chen, C.; Chen, Z.; Bera, Deep; Raghunathan, S.B.; ShabaniMotlagh, M.; Noothout, E.C.; Chang, Z.Y.; Ponte, Jacco; Prins, Christian; Vos, H.J.; Bosch, Johan G.; Verweij, M.D.; de Jong, N.; Pertijs, M.A.P.

    2017-01-01

    This paper presents a power-and area-efficient front-end application-specific integrated circuit (ASIC) that is directly integrated with an array of 32 × 32 piezoelectric transducer elements to enable next-generation miniature ultrasound probes for real-time 3-D transesophageal echocardiography.

  4. A self-interference cancelling front-end for in-band full-duplex wireless and its phase noise performance

    NARCIS (Netherlands)

    van den Broek, Dirk-Jan; Klumperink, Eric A.M.; Nauta, Bram

    2015-01-01

    This paper describes a frequency-agile RF front-end in 65nm CMOS targeting short-range full-duplex wireless communication. Complementing previous work on a self-interference cancelling receiver, this work describes the co-integrated transmitter and reports the phase noise advantages of using

  5. The VFAT3-Comm-Port: a complete communication port for front-end ASICs intended for use within the high luminosity radiation environments of the LHC

    International Nuclear Information System (INIS)

    Dabrowski, M.; Aspell, P.; Bonacini, S.; Ciaglia, D.; Kloukinas, K.; Lentdecker, G. De; Robertis, G. De; Kupiainen, M.; Talvitie, J.; Tuuva, T.; Leroux, P.; Tavernier, F.

    2015-01-01

    This paper presents the VFAT3 Comm-Port (V3CP), which offers a single port for all communication to and from a front-end ASIC within the HL-LHC environment. This includes synchronization to the LHC clock, slow control communication, the execution of fast control commands and the readout of data

  6. A Novel High Bandwidth Current Control Strategy for SiC mosfet Based Active Front-End Rectifiers Under Unbalanced Input Voltage Conditions

    DEFF Research Database (Denmark)

    Maheshwari, Ramkrishan; Trintis, Ionut; Török, Lajos

    2017-01-01

    SiC mosfet based converters are capable of high switching frequency operation. In this paper, the converter is operated with 50-kHz switching frequency for an active front-end rectifier application. Due to high switching frequency, the grid-side filter size is reduced, and the possibility of a high...

  7. A 64-channel readout ASIC for nanowire biosensor array with electrical calibration scheme.

    Science.gov (United States)

    Chai, Kevin T C; Choe, Kunil; Bernal, Olivier D; Gopalakrishnan, Pradeep K; Zhang, Guo-Jun; Kang, Tae Goo; Je, Minkyu

    2010-01-01

    A 1.8-mW, 18.5-mm(2) 64-channel current readout ASIC was implemented in 0.18-µm CMOS together with a new calibration scheme for silicon nanowire biosensor arrays. The ASIC consists of 64 channels of dedicated readout and conditioning circuits which incorporate correlated double sampling scheme to reduce the effect of 1/f noise and offset from the analog front-end. The ASIC provides a 10-bit digital output with a sampling rate of 300 S/s whilst achieving a minimum resolution of 7 pA(rms). A new electrical calibration method was introduced to mitigate the issue of large variations in the nano-scale sensor device parameters and optimize the sensor sensitivity. The experimental results show that the proposed calibration technique improved the sensitivity by 2 to 10 times and reduced the variation between dataset by 9 times.

  8. Calcium Channel Blockers

    Science.gov (United States)

    ... conditions, such as Raynaud's disease For people of African heritage and older people, calcium channel blockers might ... high-blood-pressure/in-depth/calcium-channel-blockers/ART-20047605 . Mayo Clinic Footer Legal Conditions and Terms ...

  9. TARGET: A multi-channel digitizer chip for very-high-energy gamma-ray telescopes

    Energy Technology Data Exchange (ETDEWEB)

    Bechtol, K.; Funk, S.; /Stanford U., HEPL /KIPAC, Menlo Park; Okumura, A.; /JAXA, Sagamihara /Stanford U., HEPL /KIPAC, Menlo Park; Ruckman, L.; /Hawaii U.; Simons, A.; Tajima, H.; Vandenbroucke, J.; /Stanford U., HEPL /KIPAC, Menlo Park; Varner, G.; /Hawaii U.

    2011-08-11

    The next-generation very-high-energy (VHE) gamma-ray observatory, the Cherenkov Telescope Array, will feature dozens of imaging atmospheric Cherenkov telescopes (IACTs), each with thousands of pixels of photosensors. To be affordable and reliable, reading out such a mega-channel array requires event recording technology that is highly integrated and modular, with a low cost per channel. We present the design and performance of a chip targeted to this application: the TeV Array Readout with GSa/s sampling and Event Trigger (TARGET). This application-specific integrated circuit (ASIC) has 16 parallel input channels, a 4096-sample buffer for each channel, adjustable input termination, self-trigger functionality, and tight window-selected readout. We report the performance of TARGET in terms of sampling frequency, power consumption, dynamic range, current-mode gain, analog bandwidth, and cross talk. The large number of channels per chip allows a low cost per channel ($10 to $20 including front-end and back-end electronics but not including photosensors) to be achieved with a TARGET-based IACT readout system. In addition to basic performance parameters of the TARGET chip itself, we present a camera module prototype as well as a second-generation chip (TARGET 2), both of which have been produced.

  10. A Wearable Channel Selection-Based Brain-Computer Interface for Motor Imagery Detection.

    Science.gov (United States)

    Lo, Chi-Chun; Chien, Tsung-Yi; Chen, Yu-Chun; Tsai, Shang-Ho; Fang, Wai-Chi; Lin, Bor-Shyh

    2016-02-06

    Motor imagery-based brain-computer interface (BCI) is a communication interface between an external machine and the brain. Many kinds of spatial filters are used in BCIs to enhance the electroencephalography (EEG) features related to motor imagery. The approach of channel selection, developed to reserve meaningful EEG channels, is also an important technique for the development of BCIs. However, current BCI systems require a conventional EEG machine and EEG electrodes with conductive gel to acquire multi-channel EEG signals and then transmit these EEG signals to the back-end computer to perform the approach of channel selection. This reduces the convenience of use in daily life and increases the limitations of BCI applications. In order to improve the above issues, a novel wearable channel selection-based brain-computer interface is proposed. Here, retractable comb-shaped active dry electrodes are designed to measure the EEG signals on a hairy site, without conductive gel. By the design of analog CAR spatial filters and the firmware of EEG acquisition module, the function of spatial filters could be performed without any calculation, and channel selection could be performed in the front-end device to improve the practicability of detecting motor imagery in the wearable EEG device directly or in commercial mobile phones or tablets, which may have relatively low system specifications. Finally, the performance of the proposed BCI is investigated, and the experimental results show that the proposed system is a good wearable BCI system prototype.

  11. A Wearable Channel Selection-Based Brain-Computer Interface for Motor Imagery Detection

    Directory of Open Access Journals (Sweden)

    Chi-Chun Lo

    2016-02-01

    Full Text Available Motor imagery-based brain-computer interface (BCI is a communication interface between an external machine and the brain. Many kinds of spatial filters are used in BCIs to enhance the electroencephalography (EEG features related to motor imagery. The approach of channel selection, developed to reserve meaningful EEG channels, is also an important technique for the development of BCIs. However, current BCI systems require a conventional EEG machine and EEG electrodes with conductive gel to acquire multi-channel EEG signals and then transmit these EEG signals to the back-end computer to perform the approach of channel selection. This reduces the convenience of use in daily life and increases the limitations of BCI applications. In order to improve the above issues, a novel wearable channel selection-based brain-computer interface is proposed. Here, retractable comb-shaped active dry electrodes are designed to measure the EEG signals on a hairy site, without conductive gel. By the design of analog CAR spatial filters and the firmware of EEG acquisition module, the function of spatial filters could be performed without any calculation, and channel selection could be performed in the front-end device to improve the practicability of detecting motor imagery in the wearable EEG device directly or in commercial mobile phones or tablets, which may have relatively low system specifications. Finally, the performance of the proposed BCI is investigated, and the experimental results show that the proposed system is a good wearable BCI system prototype.

  12. Optimization of DC-DC Converters for Improved Electromagnetic Compatibility With High Energy Physics Front-End Electronics

    CERN Document Server

    Fuentes, C; Michelis, S; Blanchot, G; Allongue, B; Faccio, F; Orlandi, S; Kayal, M; Pontt, J

    2011-01-01

    The upgrade of the Large Hadron Collider (LHC) experiments at CERN sets new challenges for the powering of the detectors. One of the powering schemes under study is based on DC-DC buck converters mounted on the front-end modules. The hard environmental conditions impose strict restrictions to the converters in terms of low volume, radiation and magnetic field tolerance. Furthermore, the noise emission of the switching converters must not affect the performance of the powered systems. A study of the sources and paths of noise of a synchronous buck converter has been made for identifying the critical parameters to reduce their emissions. As proof of principle, a converter was designed following the PCB layout considerations proposed and then used for powering a silicon strip module prototype for the ATLAS upgrade, in order to evaluate their compatibility.

  13. Design and construction of the front-end electronics data acquisition for the SLD CRID [Cherenkov Ring Imaging Detector

    International Nuclear Information System (INIS)

    Hoeflich, J.; McShurley, D.; Marshall, D.; Oxoby, G.; Shapiro, S.; Stiles, P.; Spencer, E.

    1990-10-01

    We describe the front-end electronics for the Cherenkov Ring Imaging Detector (CRID) of the SLD at the Stanford Linear Accelerator Center. The design philosophy and implementation are discussed with emphasis on the low-noise hybrid amplifiers, signal processing and data acquisition electronics. The system receives signals from a highly efficient single-photo electron detector. These signals are shaped and amplified before being stored in an analog memory and processed by a digitizing system. The data from several ADCs are multiplexed and transmitted via fiber optics to the SLD FASTBUS system. We highlight the technologies used, as well as the space, power dissipation, and environmental constraints imposed on the system. 16 refs., 10 figs

  14. Considerations on the design of front-end electronics for silicon calorimetry for the SSC [Superconducting Super Collider

    International Nuclear Information System (INIS)

    Wintenberg, A.L.; Bauer, M.L.; Britton, C.L. Jr.; Kennedy, E.J.; Todd, R.A.; Berridge, S.C.; Bugg, W.M.

    1990-01-01

    Some considerations are described for the design of a silicon-based sampling calorimetry detector for the Superconducting Super Collider (SSC). The use of silicon as the detection medium allows fast, accurate, and fine-grained energy measurements -- but for optimal performance, the front-end electronics must be matched to the detector characteristics and have the speed required by the high SSC interaction rates. The relation between the signal-to-noise ratio of the calorimeter electronics and the charge collection time, the preamplifier power dissipation, detector capacitance and leakage, charge gain, and signal shaping and sampling was studied. The electrostatic transformer connection was analyzed and found to be unusable for a tightly arranged calorimeter because of stray capacitance effects. The method of deconvolutional sampling was developed as a means for pileup correction following synchronous sampling and analog storage. 3 refs., 6 figs

  15. WNA's worldwide overview on front-end nuclear fuel cycle growth and health, safety and environmental issues.

    Science.gov (United States)

    Saint-Pierre, Sylvain; Kidd, Steve

    2011-01-01

    This paper presents the WNA's worldwide nuclear industry overview on the anticipated growth of the front-end nuclear fuel cycle from uranium mining to conversion and enrichment, and on the related key health, safety, and environmental (HSE) issues and challenges. It also puts an emphasis on uranium mining in new producing countries with insufficiently developed regulatory regimes that pose greater HSE concerns. It introduces the new WNA policy on uranium mining: Sustaining Global Best Practices in Uranium Mining and Processing-Principles for Managing Radiation, Health and Safety and the Environment, which is an outgrowth of an International Atomic Energy Agency (IAEA) cooperation project that closely involved industry and governmental experts in uranium mining from around the world. Copyright © 2010 Health Physics Society

  16. High-average-power, 50-fs parametric amplifier front-end at 1.55 μm.

    Science.gov (United States)

    Mero, Mark; Noack, Frank; Bach, Florian; Petrov, Valentin; Vrakking, Marc J J

    2015-12-28

    An average-power-scalable, two-stage optical parametric chirped pulse amplifier is presented providing 90-μJ signal pulses at 1.55 μm and 45-μJ idler pulses at 3.1 μm at a repetition rate of 100 kHz. The signal pulses were recompressible to within a few percent of their ~50-fs Fourier limit in anti-reflection coated fused silica at negligible losses. The overall energy conversion efficiency from the 1030-nm pump to the recompressed signal reached 19%, significantly reducing the cost per watt of pump power compared to similar systems. The two-stage source will serve as the front-end of a three-stage system permitting the development of novel experimental strategies towards laser-based imaging of molecular structures and chemical reactivity.

  17. A Nonlinearity Mitigation Method for a Broadband RF Front-End in a Sensor Based on Best Delay Searching.

    Science.gov (United States)

    Zhao, Wen; Ma, Hong; Zhang, Hua; Jin, Jiang; Dai, Gang; Hu, Lin

    2017-09-28

    The cognitive radio wireless sensor network (CR-WSN) is experiencing more and more attention for its capacity to automatically extract broadband instantaneous radio environment information. Obtaining sufficient linearity and spurious-free dynamic range (SFDR) is a significant premise of guaranteeing sensing performance which, however, usually suffers from the nonlinear distortion coming from the broadband radio frequency (RF) front-end in the sensor node. Moreover, unlike other existing methods, the joint effect of non-constant group delay distortion and nonlinear distortion is discussed, and its corresponding solution is provided in this paper. After that, the nonlinearity mitigation architecture based on best delay searching is proposed. Finally, verification experiments, both on simulation signals and signals from real-world measurement, are conducted and discussed. The achieved results demonstrate that with best delay searching, nonlinear distortion can be alleviated significantly and, in this way, spectrum sensing performance is more reliable and accurate.

  18. A Nonlinearity Mitigation Method for a Broadband RF Front-End in a Sensor Based on Best Delay Searching

    Directory of Open Access Journals (Sweden)

    Wen Zhao

    2017-09-01

    Full Text Available The cognitive radio wireless sensor network (CR-WSN is experiencing more and more attention for its capacity to automatically extract broadband instantaneous radio environment information. Obtaining sufficient linearity and spurious-free dynamic range (SFDR is a significant premise of guaranteeing sensing performance which, however, usually suffers from the nonlinear distortion coming from the broadband radio frequency (RF front-end in the sensor node. Moreover, unlike other existing methods, the joint effect of non-constant group delay distortion and nonlinear distortion is discussed, and its corresponding solution is provided in this paper. After that, the nonlinearity mitigation architecture based on best delay searching is proposed. Finally, verification experiments, both on simulation signals and signals from real-world measurement, are conducted and discussed. The achieved results demonstrate that with best delay searching, nonlinear distortion can be alleviated significantly and, in this way, spectrum sensing performance is more reliable and accurate.

  19. A wide dynamic range BF{sub 3} neutron monitor with front-end electronics based on a logarithmic amplifier

    Energy Technology Data Exchange (ETDEWEB)

    Ferrarini, M., E-mail: michele.ferrarini@polimi.i [Politecnico di Milano, Dipartimento Energia, via G. Ponzio 34/3, I-20133 Milano (Italy); Fondazione CNAO, via Caminadella 16, 20123 Milano (Italy); Varoli, V. [Politecnico di Milano, Dipartimento Energia, via G. Ponzio 34/3, I-20133 Milano (Italy); Favalli, A. [European Commission, Joint Research Centre, Institute for the Protection and Security of Citizen, TP 800, Via E. Fermi, 21027 Ispra (Vatican City State, Holy See) (Italy); Caresana, M. [Politecnico di Milano, Dipartimento Energia, via G. Ponzio 34/3, I-20133 Milano (Italy); Pedersen, B. [European Commission, Joint Research Centre, Institute for the Protection and Security of Citizen, TP 800, Via E. Fermi, 21027 Ispra (Italy)

    2010-02-01

    This paper describes a wide dynamic range neutron monitor based on a BF{sub 3} neutron detector. The detector is used in current mode, and front-end electronics based on a logarithmic amplifier are used in order to have a measurement capability ranging over many orders of magnitude. The system has been calibrated at the Polytechnic of Milan, CESNEF, with an AmBe neutron source, and has been tested in a pulsed field at the PUNITA facility at JRC, Ispra. The detector has achieved a dynamic range of over 6 orders of magnitude, being able to measure single neutron pulses and showing saturation-free response for a reaction rate up to 10{sup 6} s{sup -1}. It has also proved effective in measuring the PUNITA facility pulse integral fluence.

  20. Irradiation induced effects in the FE-I4 front-end chip of the ATLAS IBL detector

    CERN Document Server

    La Rosa, Alessandro; The ATLAS collaboration

    2016-01-01

    The ATLAS Insertable B-Layer (IBL) detector was installed into the ATLAS experiment in 2014 and has been in operation since 2015. During the first year of IBL data taking an increase of the low voltage currents associated with the FE-I4 During the first year of the IBL operation in 2015 a significant increase of the LV current of the front-end chip and the detuning of its parameters (threshold and time-over- threshold) have been observed in relation to the received TID. In this talk , the TID effects in the FE-I4 chip are reported based on studies performed in the laboratory using X-ray and proton irradiation sources for various temperature and irradiation intensity conditions. Based on these results, an operation guideline of the IBL detector is presented.

  1. JACoW Design of the front-end detector control system of the ATLAS New Small Wheels

    CERN Document Server

    Moschovakos, Paris

    2018-01-01

    The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade is the New Small Wheel (NSW) [1], which consists of 2 disks of Muon Gas detectors. The detector technologies used are Micromegas (MM) and sTGC, providing a total of 16 layers of tracking and trigger. The Slow Control Adapter (SCA) is part of the Gigabit Transceiver (GBT) - “Radiation Hard Optical Link Project” family of chips designed at CERN, EP-ESE department [2,3], which will be used at the NSW upgrade. The SCA offers several interfaces to read analogue and digital inputs, and configure front-end Readout ASICs, FPGAs, or other chips. The design of the NSW Detector Control System (DCS) takes advantage of this functionality, as described in this paper.

  2. Inter-firm collaboration in the Fuzzy Front-End of the innovation process - Exploring New Forms of Collaboration

    DEFF Research Database (Denmark)

    Jørgensen, Jacob Høj; Goduscheit, René Chester; Bergenholz, Carsten

    2007-01-01

    Innovation and innovation processes has traditionally been considered from the manufacturing companies' perspective. The innovation process is typically divided into a series of succeeding stages where the Fuzzy Front-End is the first stage to encounter. Several research projects have formulated...... recommendations for the manufacturer to improve the innovation process and enhance the chances of success. However, the waist majority of these projects belong to an intra-organizational paradigm where the manufacturer is considered to be the only part involved in the process, controlling and influencing......, marketing, sales. The focus of this paper is on collaboration where innovation is the main part of the collaborative effort. Innovation refers to the research and development (R&D) activity devoted to increasing scientific or technical knowledge and the application of that knowledge to the creation of new...

  3. A 410 μW, 70 dB SNR high performance analog front-end for portable audio application

    Science.gov (United States)

    Lan, Dai; Wenkai, Liu; Yan, Lu

    2014-10-01

    This paper describes an analog front-end (AFE) intended for portable audio application, which operates at 1 V and consumes only 410 μW. The AFE consists of a 30 dB-gain programmable gain amplifier (PGA) and a 2nd-order 3-bit sigma-delta modulator. The PGA with single input and on-chip common-mode bias voltage shows good noise-reduction performance. The modulator makes use of data weighted averaging to reduce the linearity requirements of the digital-to-analog converter in the feedback loop. The AFE is implemented in the SMIC 0.13 μm 1P8M CMOS process. The measurement results show that in a 1 V power supply, at 200 mVp-p, between 100 Hz and 20 kHz, the maximal signal-to-noise ratio is 70 dB, and the total power is 410 μW.

  4. Alternative Muon Front-end for the International Design Study (IDS)

    CERN Document Server

    Alekou, A; Martini, M; Prior, G; Rogers, C; Stratakis, D; Yoshikawa, C; Zisman, M

    2010-01-01

    We discuss alternative designs of the muon capture front end of the Neutrino Factory International Design Study (IDS). In the front end, a proton bunch on a target creates secondary pions that drift into a capture channel, decaying into muons. A sequence of RF cavities forms the resulting muon beams into strings of bunches of differing energies, aligns the bunches to (nearly) equal central energies, and initiates ionization cooling. This design is affected by limitations on accelerating gradients within magnetic fields. The effects of gradient limitations are explored, and mitigation strategies are presented

  5. KV7 potassium channels

    DEFF Research Database (Denmark)

    Stott, Jennifer B; Jepps, Thomas Andrew; Greenwood, Iain A

    2014-01-01

    Potassium channels are key regulators of smooth muscle tone, with increases in activity resulting in hyperpolarisation of the cell membrane, which acts to oppose vasoconstriction. Several potassium channels exist within smooth muscle, but the KV7 family of voltage-gated potassium channels have been...

  6. Quantum Channels With Memory

    International Nuclear Information System (INIS)

    Rybar, T.

    2012-01-01

    Quantum memory channels represent a very general, yet simple and comprehensible model for causal processes. As such they have attracted considerable research interest, mostly aimed on their transfer capabilities and structure properties. Most notably it was shown that memory channels can be implemented via physically naturally motivated collision models. We also define the concept of repeatable channels and show that only unital channels can be implemented repeat ably with pure memory channels. In the special case of qubit channels we also show that every unital qubit channel has a repeatable implementation. We also briefly explore the possibilities of stroboscopical simulation of channels and show that all random unitary channels can be stroboscopically simulated. Particularly in qubit case, all indivisible qubit channels are also random unitary, hence for qubit all indivisible channels can be stroboscopically simulated. Memory channels also naturally capture the framework of correlated experiments. We develop methods to gather and interpret data obtained in such setting and in detail examine the two qubit case. We also show that for control unitary interactions the measured data will never contradict a simple unitary evolution. Thus no memory effects can be spotted then. (author)

  7. Channel morphology [Chapter 5

    Science.gov (United States)

    Jonathan W. Long; Alvin L. Medina; Daniel G. Neary

    2012-01-01

    Channel morphology has become an increasingly important subject for analyzing the health of rivers and associated fish populations, particularly since the popularization of channel classification and assessment methods. Morphological data can help to evaluate the flows of sediment and water that influence aquatic and riparian habitat. Channel classification systems,...

  8. Can new passenger cars reduce pedestrian lower extremity injury? A review of geometrical changes of front-end design before and after regulatory efforts.

    Science.gov (United States)

    Nie, Bingbing; Zhou, Qing

    2016-10-02

    Pedestrian lower extremity represents the most frequently injured body region in car-to-pedestrian accidents. The European Directive concerning pedestrian safety was established in 2003 for evaluating pedestrian protection performance of car models. However, design changes have not been quantified since then. The goal of this study was to investigate front-end profiles of representative passenger car models and the potential influence on pedestrian lower extremity injury risk. The front-end styling of sedans and sport utility vehicles (SUV) released from 2008 to 2011 was characterized by the geometrical parameters related to pedestrian safety and compared to representative car models before 2003. The influence of geometrical design change on the resultant risk of injury to pedestrian lower extremity-that is, knee ligament rupture and long bone fracture-was estimated by a previously developed assessment tool assuming identical structural stiffness. Based on response surface generated from simulation results of a human body model (HBM), the tool provided kinematic and kinetic responses of pedestrian lower extremity resulted from a given car's front-end design. Newer passenger cars exhibited a "flatter" front-end design. The median value of the sedan models provided 87.5 mm less bottom depth, and the SUV models exhibited 94.7 mm less bottom depth. In the lateral impact configuration similar to that in the regulatory test methods, these geometrical changes tend to reduce the injury risk of human knee ligament rupture by 36.6 and 39.6% based on computational approximation. The geometrical changes did not significantly influence the long bone fracture risk. The present study reviewed the geometrical changes in car front-ends along with regulatory concerns regarding pedestrian safety. A preliminary quantitative benefit of the lower extremity injury reduction was estimated based on these geometrical features. Further investigation is recommended on the structural changes

  9. LHCb: The Front-End electronics for the LHCb scintillating fibres detector

    CERN Multimedia

    Chanal, H; Pillet, N

    2014-01-01

    The LHCb detector will be upgraded during the next LHC shutdown in 2018/19. The tracker system will have a major overhaul. Its components will be replaced with new technologies in order to cope with the increased hit occupancy and radiation environment. A detector made of scintillating fibres read out by silicon photomultipliers (SiPM) is studied for this upgrade. Even if this technology has proven to achieve high efficiency and spatial resolution, its integration within a LHC experiment bears new challenges. This detector will consist of 12 planes of 5 to 6 layers of 250 $\\mu$m fibres with an area of 5×6 m$^2$. Its lead to a total of 500k SiPM channels which need to will be read out at 40MHz. This talk gives an overview of the R&D status of the readout board and the PACIFIC chip. The readout board is connected to the SiPM on one side and to the experiment data-acquisition, experimental control system and services on the other side . The PACIFIC chip is a 128 channel ASIC which can be connected to one 12...

  10. The Front-End electronics for the LHCb scintillating fibres detector

    CERN Document Server

    Chanal, Hervé; Pillet, Nicolas

    2014-01-01

    The LHCb detector will be upgraded during the next LHC shutdown in 2018/19 [ 1 ]. The tracker system will have a major overhaul. Its components will be replaced with new technologies in order to cope with the increased hit occupancy and radiation environment. A detector made of scintillating fibres read out by silicon photomultipliers (SiPM) is studied for this upgrade. Even if this technology has proven to achieve high efficiency and spatial resolution, its integration within a LHC experiment bears new challenges. This detector will consist of 12 planes of 5 to 6 layers of 250 m m fibres with an area of 5 6 m 2 . It leads to a total of 500k SiPM channels which need to be read out at 40 MHz. This article gives an overview of the R&D; status of the readout board and the PACIFIC chip. The readout board is connected to the SiPM on one side and to the experiment data-acquisition, experimental control system and services on the other side. The PACIFIC chip is a 128-channels ASIC which can be connected to one 1...

  11. FRONT-END ASIC FOR HIGH RESOLUTION X-RAY SPECTROMETERS

    International Nuclear Information System (INIS)

    DE GERONIMO, G.; CHEN, W.; FRIED, J.; LI, Z.; PINELLI, D.A.; REHAK, P.; VERNON, E.; GASKIN, J.A.; RAMSEY, B.D.; ANELLI, G.

    2007-01-01

    We present an application specific integrated circuit (ASIC) for high-resolution x-ray spectrometers. The ASIC is designed to read out signals from a pixelated silicon drift detector (SDD). Each hexagonal pixel has an area of 15 mmz and an anode capacitance of less than 100 fF. There is no integrated Field Effect transistor (FET) in the pixel, rather, the readout is done by wirebonding the anodes to the inputs of the ASIC. The ASIC provides 14 channels of low-noise charge amplification, high-order shaping with baseline stabilization, and peak detection with analog memory. The readout is sparse and based on low voltage differential signaling. An interposer provides all the interconnections required to bias and operate the system. The channel dissipates 1.6 mW. The complete 14-pixel unit covers an area of 210 mm 2 , dissipates 12 mW cm -2 , and can be tiled to cover an arbitrarily large detection area. We measured a preliminary resolution of 172 eV at -35 C on the 6 keV peak of a 55 Fe source

  12. Front-End ASIC for High Resolution X-Ray Spectrometers

    Science.gov (United States)

    De Geronimo, Gianluigi; Chen, Wei; Fried, Jack; Li, Zheng; Pinelli, Donald A.; Rehak, Pavel; Vernon, Emerson; Gaskin, Jessica A.; Ramsey, Brian D.; Anelli, Giovanni

    2008-06-01

    We present an application specific integrated circuit (ASIC) for high-resolution X-ray spectrometers. The ASIC is designed to read out signals from a pixelated silicon drift detector (SDD). Each hexagonal pixel has an area of 15 mm2 and an anode capacitance of less than 100 fF. There is no integrated Field Effect transistor (FET) in the pixel, rather, the readout is done by wire-bonding the anodes to the inputs of the ASIC. The ASIC provides 14 channels of low-noise charge amplification, high-order shaping with baseline stabilization, and peak detection with analog memory. The readout is sparse and based on low voltage differential signaling. An interposer provides all the interconnections required to bias and operate the system. The channel dissipates 1.6 mW. The complete 14-pixel unit covers an area of 210 mm2, dissipates 12 mW cm-2, and can be tiled to cover an arbitrarily large detection area. We measured a preliminary resolution of 172 eV at -35 degC on the 6 keV peak of a 55Fe source.

  13. FRONT-END ASIC FOR HIGH RESOLUTION X-RAY SPECTROMETERS.

    Energy Technology Data Exchange (ETDEWEB)

    DE GERONIMO,G.; CHEN, W.; FRIED, J.; LI, Z.; PINELLI, D.A.; REHAK, P.; VERNON, E.; GASKIN, J.A.; RAMSEY, B.D.; ANELLI, G.

    2007-10-27

    We present an application specific integrated circuit (ASIC) for high-resolution x-ray spectrometers. The ASIC is designed to read out signals from a pixelated silicon drift detector (SDD). Each hexagonal pixel has an area of 15 mmz and an anode capacitance of less than 100 fF. There is no integrated Field Effect transistor (FET) in the pixel, rather, the readout is done by wirebonding the anodes to the inputs of the ASIC. The ASIC provides 14 channels of low-noise charge amplification, high-order shaping with baseline stabilization, and peak detection with analog memory. The readout is sparse and based on low voltage differential signaling. An interposer provides all the interconnections required to bias and operate the system. The channel dissipates 1.6 mW. The complete 14-pixel unit covers an area of 210 mm{sup 2}, dissipates 12 mW cm{sup -2}, and can be tiled to cover an arbitrarily large detection area. We measured a preliminary resolution of 172 eV at -35 C on the 6 keV peak of a {sup 55}Fe source.

  14. CMS Tracker Readout Prototype Front-End Driver PCI Mezzanine Card (Mk1) (connector side)

    CERN Multimedia

    J.Coughlan

    1998-01-01

    The tracking system of the CMS detector at the LHC employs Front End Driver (FED) cards to digitise, buffer and sparsify analogue data arriving via optical links from on detector pipeline chips. This paper describes a prototype version of the FED based upon the popular commercial PCI bus Mezzanine Card (PMC) form factor. The FED-PMC consists of an 8 channel, 9 bit ADC, card, providing a 1 MByte data buffer and operating at the LHC design frequency of 40 MHz. The core of the card is a re-programmable FPGA which allows the functionality of the card to be conveniently modified. The card is supplied with a comprehensive library of C routines.The PMC form factor allows the card to be plugged onto a wide variety of processor carrier boards and even directly into PCI based PCs. The flexibility of the FPGA based design permits the card to be used in a variety of ADC based applications.

  15. First results of the front-end ASIC for the strip detector of the PANDA MVD

    Science.gov (United States)

    Quagli, T.; Brinkmann, K.-T.; Calvo, D.; Di Pietro, V.; Lai, A.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Wheadon, R.; Zambanini, A.

    2017-03-01

    PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.

  16. HIPPI and Fibre Channel

    International Nuclear Information System (INIS)

    Tolmie, D.E.

    1992-01-01

    The High-Performance Parallel Interface (HIPPI) and Fibre Channel are near-gigabit per second data communications interfaces being developed in ANSI standards Task Group X3T9.3. HIPPI is the current interface of choice in the high-end and supercomputer arena, and Fibre Channel is a follow-on effort. HIPPI came from a local area network background, and Fibre Channel came from a mainframe to peripheral interface background

  17. Ion Channels in Leukocytes

    Science.gov (United States)

    1991-07-01

    be fitted to a Hodgkin - conductance. K (1.0) > Rb (0.77) > NH4 (0.10) > Cs Huxley type n4j model (17, 38). However, the rate of K0 (0.02) > Na (ɘ.01...15, 25 activated) T- and B-cells, murine B-cells? SCG, single-channel conductance under physiological ionic gradient- tfor ructif~ y ig ehannel, largest...the channel induces a confor- kat T-cell line (52). Fina:! y , single-channel recordings of mational change that ina.-tix ates the channel rather human T

  18. A channel profile analyser

    International Nuclear Information System (INIS)

    Gobbur, S.G.

    1983-01-01

    It is well understood that due to the wide band noise present in a nuclear analog-to-digital converter, events at the boundaries of adjacent channels are shared. It is a difficult and laborious process to exactly find out the shape of the channels at the boundaries. A simple scheme has been developed for the direct display of channel shape of any type of ADC on a cathode ray oscilliscope display. This has been accomplished by sequentially incrementing the reference voltage of a precision pulse generator by a fraction of a channel and storing ADC data in alternative memory locations of a multichannel pulse height analyser. Alternative channels are needed due to the sharing at the boundaries of channels. In the flat region of the profile alternate memory locations are channels with zero counts and channels with the full scale counts. At the boundaries all memory locations will have counts. The shape of this is a direct display of the channel boundaries. (orig.)

  19. A switched-capacitor front-end for velocity-selective ENG recording.

    Science.gov (United States)

    Rieger, Robert; Taylor, John

    2013-08-01

    Multi-electrode cuffs (MECs) have been proposed as a means for extracting additional information about the velocity and direction of nerve signals from multi-electrode recordings. This paper discusses certain aspects of the implementation of a system for velocity selective recording (VSR) where multiple neural signals are matched and summed to identify excited axon populations in terms of velocity. The approach outlined in the paper involves the replacement of the digital signal processing stages of a standard delay-matched VSR system with analogue switched-capacitor (SC) delay lines which promises significant savings in both size and power consumption. The system specifications are derived and two circuits, each composed of low-noise preamplifiers connecting to a 2nd rank SC gain stage, are evaluated. One of the systems provides a single-ended SC stage whereas the other system is fully differential. Both approaches are shown to provide the low-noise, low-power operation, practically identical channel gains and sample delay range required for VSR. Measured results obtained from chips fabricated in 0.8 μ m CMOS technology are reported.

  20. Characterization and performance of monolithic detector blocks with a dedicated ASIC front-end readout for PET imaging of the human brain

    International Nuclear Information System (INIS)

    Rato Mendes, Pedro; Sarasola Martin, Iciar; Canadas, Mario; Garcia de Acilu, Paz; Cuypers, Robin; Perez, Jose Manuel; Willmott, Carlos

    2011-01-01

    We are developing a human brain PET scanner prototype compatible with MRI based on monolithic scintillator crystals, APD matrices and a dedicated ASIC front-end readout. In this work we report on the performance of individual detector modules and on the operation of such modules in PET coincidence. Results will be presented on the individual characterization of detector blocks and its ASIC front-end readout, with measured energy resolutions of 13% full-width half-maximum (FWHM) at 511 keV and spatial resolutions of the order of 2 mm FWHM. First results on PET coincidence performance indicate spatial resolutions as good as 2.1 mm FWHM for SSRB/FBP reconstruction of tomographic data obtained using a simple PET demonstrator based on a pair of monolithic detector blocks with ASIC readout.

  1. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00015561; Bauer, Kevin Thomas; Borga, Andrea; Boterenbrood, Henk; Chen, Hucheng; Chen, Kai; Drake, Gary; Donszelmann, Mark; Francis, David; Guest, Daniel; Gorini, Benedetto; Joos, Markus; Lanni, Francesco; Lehmann Miotto, Giovanna; Levinson, Lorne; Narevicius, Julia; Panduro Vazquez, William; Roich, Alexander; Ryu, Soo; Schreuder, Frans Philip; Schumacher, Jorn; Vandelli, Wainer; Vermeulen, Jos; Whiteson, Daniel; Wu, Weihao; Zhang, Jinlong

    2016-01-01

    The ATLAS Phase-I upgrade (2018) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. The Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via FPGA PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. The FELIX system, the design of the PCIe prototype card and the integration test results are presented in this paper.

  2. A linearization of quantum channels

    Science.gov (United States)

    Crowder, Tanner

    2015-06-01

    Because the quantum channels form a compact, convex set, we can express any quantum channel as a convex combination of extremal channels. We give a Euclidean representation for the channels whose inverses are also valid channels; these are a subset of the extreme points. They form a compact, connected Lie group, and we calculate its Lie algebra. Lastly, we calculate a maximal torus for the group and provide a constructive approach to decomposing any invertible channel into a product of elementary channels.

  3. Development of the front-end board of a Xenon gas Time Projection Chamber at the AXEL neutrinoless double beta decay search experiment

    Science.gov (United States)

    Tanaka, Shunsuke; AXEL Collaboration

    2017-09-01

    AXEL is a project to search for 0νββ using a High pressure Xenon gas TPC. AXEL uses SiPM’s to measure the energies and the tracks of 0νββ events. About 50,000 SiPM’s are required for final 0νββ searching version, so developing Front-End Boards (FEB) are necessary. We develop FEB that has high energy resolution and wide dynamic range.

  4. The front-end electronics and slow control of large area SiPM for the SST-1M camera developed for the CTA experiment

    Czech Academy of Sciences Publication Activity Database

    Aguilar, J.A.; Bilnik, W.; Borkowski, J.; Mandát, Dušan; Pech, Miroslav; Schovánek, Petr

    2016-01-01

    Roč. 830, Sep (2016), s. 219-232 ISSN 0168-9002 R&D Projects: GA MŠk LM2015046; GA MŠk LE13012; GA MŠk LG14019 Institutional support: RVO:68378271 Keywords : CTA * SiPM * G-APD * preamplifier * front-end * slow-control * compensation Subject RIV: BF - Elementary Particles and High Energy Physics Impact factor: 1.362, year: 2016

  5. Measurement of the front-end dead-time of the LHCb muon detector and evaluation of its contribution to the muon detection inefficiency

    CERN Document Server

    INSPIRE-00357120; Archilli, F.; Auriemma, G.; Baldini, W.; Bencivenni, G.; Bizzeti, A.; Bocci, V.; Bondar, N.; Bonivento, W.; Bochin, B.; Bozzi, C.; Brundu, D.; Cadeddu, S.; Campana, P.; Carboni, G.; Cardini, A.; Carletti, M.; Casu, L.; Chubykin, A.; Ciambrone, P.; Dané, E.; De Simone, P.; Falabella, A.; Felici, G.; Fiore, M.; Fontana, M.; Fresch, P.; Furfaro, E.; Graziani, G.; Kashchuk, A.; Kotriakhova, S.; Lai, A.; Lanfranchi, G.; Loi, A.; Maev, O.; Manca, G.; Martellotti, G.; Neustroev, P.; Oldeman, R.G.C.; Palutan, M.; Passaleva, G.; Penso, G.; Pinci, D.; Polycarpo, E.; Saitta, B.; Santacesaria, R.; Santimaria, M.; Santovetti, E.; Saputi, A.; Sarti, A.; Satriano, C.; Satta, A.; Schmidt, B.; Schneider, T.; Sciascia, B.; Sciubba, A.; Siddi, B.G.; Tellarini, G.; Vacca, C.; Vazquez-Gomez, R.; Vecchi, S.; Veltri, M.; Vorobyev, A.

    2016-04-06

    A method is described which allows to deduce the dead-time of the front-end electronics of the LHCb muon detector from a series of measurements performed at different luminosities at a bunch-crossing rate of 20 MHz. The measured values of the dead-time range from 70 ns to 100 ns. These results allow to estimate the performance of the muon detector at the future bunch-crossing rate of 40 MHz and at higher luminosity.

  6. DESIGN OF PARABOLIC CHANNELS

    Directory of Open Access Journals (Sweden)

    A. K. Alibekov

    2015-01-01

    Full Text Available The dependence of the apparent location of the hydraulic parameters of parabolic channels in earthen channel and volume of dredging required in their design and construction, on the basis of conditions to ensure the stability of the slope at the maximum water flow rate. 

  7. Calcium channel blocker overdose

    Science.gov (United States)

    ... this page: //medlineplus.gov/ency/article/002580.htm Calcium-channel blocker overdose To use the sharing features on this ... vary. However, the main ingredient is called a calcium-channel antagonist. It helps decrease the heart's pumping strength, which ...

  8. CHANNEL ESTIMATION TECHNIQUE

    DEFF Research Database (Denmark)

    2015-01-01

    the communication channel. The method further includes determining a sequence of second coefficient estimates of the communication channel based on a decomposition of the first coefficient estimates in a dictionary matrix and a sparse vector of the second coefficient estimates, the dictionary matrix including...

  9. Athermalized channeled spectropolarimeter enhancement.

    Energy Technology Data Exchange (ETDEWEB)

    Jones, Julia Craven; Way, Brandyn Michael; Mercier, Jeffrey Alan; Hunt, Jeffery P.

    2013-09-01

    Channeled spectropolarimetry can measure the complete polarization state of light as a function of wavelength. Typically, a channeled spectropolarimeter uses high order retarders made of uniaxial crystal to amplitude modulate the measured spectrum with the spectrally-dependent Stokes polarization information. A primary limitation of conventional channeled spectropolarimeters is related to the thermal variability of the retarders. Thermal variation often forces frequent system recalibration, particularly for field deployed systems. However, implementing thermally stable retarders, made of biaxial crystal, results in an athermal channeled spectropolarimeter that relieves the need for frequent recalibration. This report presents experimental results for an anthermalized channeled spectropolarimeter prototype produced using potassium titanyl phosphate. The results of this prototype are compared to the current thermal stabilization state of the art. Finally, the application of the technique to the thermal infrared is studied, and the athermalization concept is applied to an infrared imaging spectropolarimeter design.

  10. Cardiac potassium channel subtypes

    DEFF Research Database (Denmark)

    Schmitt, Nicole; Grunnet, Morten; Olesen, Søren-Peter

    2014-01-01

    . The underlying posttranscriptional and posttranslational remodeling of the individual K(+) channels changes their activity and significance relative to each other, and they must be viewed together to understand their role in keeping a stable heart rhythm, also under menacing conditions like attacks of reentry......About 10 distinct potassium channels in the heart are involved in shaping the action potential. Some of the K(+) channels are primarily responsible for early repolarization, whereas others drive late repolarization and still others are open throughout the cardiac cycle. Three main K(+) channels...... that they could constitute targets for new pharmacological treatment of atrial fibrillation. The interplay between the different K(+) channel subtypes in both atria and ventricle is dynamic, and a significant up- and downregulation occurs in disease states such as atrial fibrillation or heart failure...

  11. Muon cooling channels

    CERN Document Server

    Eberhard-K-Kei

    2003-01-01

    A procedure uses the equations that govern ionization cooling, and leads to the most important parameters of a muon cooling channel that achieves assumed performance parameters. First, purely transverse cooling is considered, followed by both transverse and longitudinal cooling in quadrupole and solenoid channels. Similarities and differences in the results are discussed in detail, and a common notation is developed. Procedure and notation are applied to a few published cooling channels. The parameters of the cooling channels are derived step by step, starting from assumed values of the initial, final and equilibrium emittances, both transverse and longitudinal, the length of the cooling channel, and the material properties of the absorber. The results obtained include cooling lengths and partition numbers, amplitude functions and limits on the dispersion at the absorber, length, aperture and spacing of the absorber, parameters of the RF system that achieve the longitudinal amplitude function and bucket area ...

  12. High strength steels, stiffness of vehicle front-end structure, and risk of injury to rear seat occupants.

    Science.gov (United States)

    Sahraei, Elham; Digges, Kennerly; Marzougui, Dhafer; Roddis, Kim

    2014-05-01

    Previous research has shown that rear seat occupant protection has decreased over model years, and front-end stiffness is a possible factor causing this trend. In this research, the effects of a change in stiffness on protection of rear seat occupants in frontal crashes were investigated. The stiffness was adjusted by using higher strength steels (DP and TRIP), or thicker metal sheets. Finite element simulations were performed, using an LS Dyna vehicle model coupled with a MADYMO dummy. Simulation results showed that an increase in stiffness, to the extent it happened in recent model years, can increase the risk of AIS3+ head injuries from 4.8% in the original model (with a stiffness of 1,000 N/mm) to 24.2% in a modified model (with a stiffness of 2,356 N/mm). The simulations also showed an increased risk of chest injury from 9.1% in the original model to 11.8% in the modified model. Distribution of injuries from real world accident data confirms the findings of the simulations. Copyright © 2014 Elsevier Ltd. All rights reserved.

  13. A Study of the Effect of the Front-End Styling of Sport Utility Vehicles on Pedestrian Head Injuries

    Directory of Open Access Journals (Sweden)

    Guanjun Zhang

    2018-01-01

    Full Text Available Background. The number of sport utility vehicles (SUVs on China market is continuously increasing. It is necessary to investigate the relationships between the front-end styling features of SUVs and head injuries at the styling design stage for improving the pedestrian protection performance and product development efficiency. Methods. Styling feature parameters were extracted from the SUV side contour line. And simplified finite element models were established based on the 78 SUV side contour lines. Pedestrian headform impact simulations were performed and validated. The head injury criterion of 15 ms (HIC15 at four wrap-around distances was obtained. A multiple linear regression analysis method was employed to describe the relationships between the styling feature parameters and the HIC15 at each impact point. Results. The relationship between the selected styling features and the HIC15 showed reasonable correlations, and the regression models and the selected independent variables showed statistical significance. Conclusions. The regression equations obtained by multiple linear regression can be used to assess the performance of SUV styling in protecting pedestrians’ heads and provide styling designers with technical guidance regarding their artistic creations.

  14. Analog Circuit Design Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC

    CERN Document Server

    Roermund, Arthur; Baschirotto, Andrea

    2012-01-01

    The book contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design.  Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of Low-Voltage Low-Power Data Converters - Chaired by Prof. Anderea Baschirotto, University of Milan-Bicocca Short Range Wireless Front-Ends - Chaired by Prof. Arthur van Roermund, Eindhoven University of Technology Power management and DC-DC - Chaired by Prof. M. Steyaert, Katholieke University Leuven Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design.

  15. Exploring the mechanisms of vehicle front-end shape on pedestrian head injuries caused by ground impact.

    Science.gov (United States)

    Yin, Sha; Li, Jiani; Xu, Jun

    2017-09-01

    In pedestrian-vehicle accidents, pedestrians typically suffer from secondary impact with the ground after the primary contact with vehicles. However, information about the fundamental mechanism of pedestrian head injury from ground impact remains minimal, thereby hindering further improvement in pedestrian safety. This study addresses this issue by using multi-body modeling and computation to investigate the influence of vehicle front-end shape on pedestrian safety. Accordingly, a simulation matrix is constructed to vary bonnet leading-edge height, bonnet length, bonnet angle, and windshield angle. Subsequently, a set of 315 pedestrian-vehicle crash simulations are conducted using the multi-body simulation software MADYMO. Three vehicle velocities, i.e., 20, 30, and 40km/h, are set as the scenarios. Results show that the top governing factor is bonnet leading-edge height. The posture and head injury at the instant of head ground impact vary dramatically with increasing height because of the significant rise of the body bending point and the movement of the collision point. The bonnet angle is the second dominant factor that affects head-ground injury, followed by bonnet length and windshield angle. The results may elucidate one of the critical barriers to understanding head injury caused by ground impact and provide a solid theoretical guideline for considering pedestrian safety in vehicle design. Copyright © 2017 Elsevier Ltd. All rights reserved.

  16. LHCb: Dynamically Adaptive Header Generator and Front-End Source Emulator for a 100 Gbps FPGA Based DAQ

    CERN Multimedia

    Srikanth, S

    2014-01-01

    The proposed upgrade for the LHCb experiment envisages a system of 500 Data sources each generating data at 100 Gbps, the acquisition and processing of which is a big challenge even for the current state of the art FPGAs. This requires an FPGA DAQ module that not only handles the data generated by the experiment but also is versatile enough to dynamically adapt to potential inadequacies of other components like the network and PCs. Such a module needs to maintain real time operation while at the same time maintaining system stability and overall data integrity. This also creates a need for a Front-end source Emulator capable of generating the various data patterns, that acts as a testbed to validate the functionality and performance of the Header Generator. The rest of the abstract briefly describes these modules and their implementation. The Header Generator is used to packetize the streaming data from the detectors before it is sent to the PCs for further processing. This is achieved by continuously scannin...

  17. Image based overlay measurement improvements of 28nm FD-SOI CMOS front-end critical steps

    Science.gov (United States)

    Dettoni, F.; Shapoval, T.; Bouyssou, R.; Itzkovich, T.; Haupt, R.; Dezauzier, C.

    2017-03-01

    Technology shrinkage leads to tight specifications in advanced semiconductor industries. For several years', metrology for lithography has been a key technology to address this challenge and to improve yield. More specifically overlay metrology is the object of special attention for tool suppliers and semiconductor manufacturers. This work focuses on Image Based Overlay (IBO) metrology for 28 nm FD-SOI CMOS front-end critical steps (gate and contact). With Overlay specifications below 10 nm, accuracy of the measurement is critical. In this study we show specific cases where target designs need to be optimized in order to minimize process effects (CMP, etch, deposition, etc.) that could lead to overlay measurement errors. Another important aspect of the metrology target is that its design must be device-like in order to better control and correct overlay errors leading to yield loss. Methodologies to optimize overlay metrology recipes are also presented. If the process effects cannot be removed entirely by target design optimization, recipe parameters have to be carefully chosen and controlled to minimize the influence of the target imperfection on measured overlay. With target asymmetry being one of the main contributors to those residual overlay measurement errors the Qmerit accuracy flag can be used to quantify the measurement error and recipe parameters can be set accordingly in order to minimize the target asymmetry impact. Reference technique measurements (CD-SEM) were used to check accuracy of the optimized overlay measurements.

  18. A low-phase-noise wide-band CMOS quadrature VCO for multi-standard RF front-ends

    DEFF Research Database (Denmark)

    Fard, Ali; Andreani, Pietro

    2005-01-01

    A low phase noise CMOS LC quadrature VCO (QVCO) with a wide frequency range of 3.6-5.6 GHz, designed in a standard 0.18 μm process for multi-standard front-ends, is presented. A significant advantage of the topology is the larger oscillation amplitude when compared to other conventional QVCO...... structures. The QVCO is compared to a double cross-coupled LC-tank differential oscillator, both in theory and experiments, for evaluation of its phase noise, providing a good insight into its performance. The measured data displays up to 2 dBc/Hz lower phase noise in the 1/f2 region for the QVCO, when...... consuming twice the current of the differential VCO, based on an identical LC-tank. Experimental results on the QVCO show a phase noise level of -127.5 dBc/Hz at 3 MHz offset from a 5.6 GHz carrier while dissipating 8 mA of current, resulting in a figure of merit of 181.3 dBc/Hz....

  19. A GEM-TPC prototype with low-Noise highly integrated front-end electronics for linear collider studies

    CERN Document Server

    Kappler, Steffen; Kaminski, Jochen; Ledermann, Bernhard; Müller, Thomas; Ronan, Michael T; Ropelewski, Leszek; Sauli, Fabio; Settles, Ronald

    2004-01-01

    Connected to the linear collider project, studies on the readout of time projection chambers (TPCs) based on the gas electron multiplier (GEM) are ongoing. Higher granularity and intrinsically suppressed ion feedback are the major advantages of this technology. After a short discussion of these issues, we present the design of a small and very flexible TPC prototype, whose cylindrical drift volume can be equipped with endcaps of different gas detector types. An endcap with multi-GEM readout is currently set up and successfully operated with a low-noise highly integrated front-end electronics. We discuss results of measurements with this system in high intensity particle beams at CERN, where 99.3 plus or minus 0.2% single-pad-row efficiency could be achieved at an effective gain of 2.5 multiplied by 10**3 only, and spatial resolutions down to 63 plus or minus 3 mum could be demonstrated. Finally, these results are extrapolated to the high magnetic field in a linear collider TPC. 5 Refs.

  20. Analog front-end cell designed in a commercial 025 mu m process for the ATLAS pixel detector at LHC

    CERN Document Server

    Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I; Richardson, J

    2002-01-01

    A new analog pixel front-end cell has been developed for the ATLAS detector at the future Large Hadron Collider (LHC) at the European Laboratory for Particle Physics (CERN). This analog cell has been submitted in two commercial 0.25 mu m CMOS processes (in an analog test chip format), using special layout techniques for radiation hardness purposes. It is composed of two cascaded amplifiers followed by a fast discriminator featuring a detection threshold within the range of 1000 to 10000 electrons. The first preamplifier has the principal role of providing a large bandwidth, low input impedance, and fast rise time in order to enhance the time-walk and crosstalk performance, whereas the second fully differential amplifier is aimed at delivering a sufficiently high-voltage gain for optimum comparison. A new do feedback concept renders the cell tolerant of sensor leakage current up to 300 nA and provides monitoring of this current. Two 5-bit digital-to-analog converters tolerant to single- event upset have been i...

  1. A 0.18 {mu}m CMOS single-inductor single-stage quadrature frontend for GNSS receiver

    Energy Technology Data Exchange (ETDEWEB)

    Li Bing; Zhuang Yiqi; Han Yeqi; Xing Xiaoling; Li Zhenrong; Long Qiang, E-mail: waxmax@126.com [Key Laboratory of the Ministry of Education for Wide Bandgap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi' an 710071 (China)

    2011-09-15

    This paper presents an improved merged architecture for a low-IF GNSS receiver frontend, where the bias current and functions are reused in a stacked quadrature LNA-mixer-VCO. Only a single spiral inductor is implemented for the LC resonator and an extra 1/2 frequency divider is added as the quadrature LO signal generator. The details of the design are presented. The gain plan and noise figure are discussed. The phase noise, quadrature accuracy and power consumption are improved. The test chip is fabricated though a 0.18 {mu}m RF CMOS process. The measured noise figure is 5.4 dB on average, with a gain of 43 dB and a IIP3 of -39 dBm. The measured phase noise is better than -105 dBc/Hz at 1 MHz offset. The total power consumption is 19.8 mW with a 1.8 V supply. The experimental results satisfy the requirements for GNSS applications. (semiconductor integrated circuits)

  2. Note: A two-dimensional position-sensitive micro-channel plate detector with a cross-connected-pixels resistive anode and integrated spectroscopy amplifiers

    Science.gov (United States)

    Yang, Liping; Liu, Junliang; Zhang, Yuezhao; Wang, Wei; Yu, Deyang; Li, Xiaoxiao; Li, Xin; Zheng, Min; Ding, Baowei; Cai, Xiaohong

    2017-08-01

    Based on the charge-division method, a compact detector system for charged particles is constructed. The system consists of a pair of micro-channel plates, a novel two-dimensional position-sensitive cross-connected-pixels resistive anode, and specially designed front-end electronics that can directly drive analog-to-digital converters. The detector is tested with an 241Am α-source. A position resolution of better than 0.3 mm and a maximum distortion within 0.5 mm in the active dimensions of 100 mm diameter are achieved.

  3. Coherifying quantum channels

    Science.gov (United States)

    Korzekwa, Kamil; Czachórski, Stanisław; Puchała, Zbigniew; Życzkowski, Karol

    2018-04-01

    Is it always possible to explain random stochastic transitions between states of a finite-dimensional system as arising from the deterministic quantum evolution of the system? If not, then what is the minimal amount of randomness required by quantum theory to explain a given stochastic process? Here, we address this problem by studying possible coherifications of a quantum channel Φ, i.e., we look for channels {{{Φ }}}{ \\mathcal C } that induce the same classical transitions T, but are ‘more coherent’. To quantify the coherence of a channel Φ we measure the coherence of the corresponding Jamiołkowski state J Φ. We show that the classical transition matrix T can be coherified to reversible unitary dynamics if and only if T is unistochastic. Otherwise the Jamiołkowski state {J}{{Φ }}{ \\mathcal C } of the optimally coherified channel is mixed, and the dynamics must necessarily be irreversible. To assess the extent to which an optimal process {{{Φ }}}{ \\mathcal C } is indeterministic we find explicit bounds on the entropy and purity of {J}{{Φ }}{ \\mathcal C }, and relate the latter to the unitarity of {{{Φ }}}{ \\mathcal C }. We also find optimal coherifications for several classes of channels, including all one-qubit channels. Finally, we provide a non-optimal coherification procedure that works for an arbitrary channel Φ and reduces its rank (the minimal number of required Kraus operators) from {d}2 to d.

  4. Evaluation channel performance in multichannel environments

    NARCIS (Netherlands)

    Gensler, S.; Dekimpe, M.; Skiera, B.

    2007-01-01

    Evaluating channel performance is crucial for actively managing multiple sales channels, and requires understanding the customers' channel preferences. Two key components of channel performance are (i) the existing customers' intrinsic loyalty to a particular channel and (ii) the channel's ability

  5. Fractional channel multichannel analyzer

    Science.gov (United States)

    Brackenbush, L.W.; Anderson, G.A.

    1994-08-23

    A multichannel analyzer incorporating the features of the present invention obtains the effect of fractional channels thus greatly reducing the number of actual channels necessary to record complex line spectra. This is accomplished by using an analog-to-digital converter in the asynchronous mode, i.e., the gate pulse from the pulse height-to-pulse width converter is not synchronized with the signal from a clock oscillator. This saves power and reduces the number of components required on the board to achieve the effect of radically expanding the number of channels without changing the circuit board. 9 figs.

  6. Cl- channels in apoptosis

    DEFF Research Database (Denmark)

    Wanitchakool, Podchanart; Ousingsawat, Jiraporn; Sirianant, Lalida

    2016-01-01

    A remarkable feature of apoptosis is the initial massive cell shrinkage, which requires opening of ion channels to allow release of K(+), Cl(-), and organic osmolytes to drive osmotic water movement and cell shrinkage. This article focuses on the role of the Cl(-) channels LRRC8, TMEM16/anoctamin......, and cystic fibrosis transmembrane conductance regulator (CFTR) in cellular apoptosis. LRRC8A-E has been identified as a volume-regulated anion channel expressed in many cell types. It was shown to be required for regulatory and apoptotic volume decrease (RVD, AVD) in cultured cell lines. Its presence also...

  7. Direct channel problems and phenomena

    International Nuclear Information System (INIS)

    Cutkosky, R.E.

    1975-01-01

    Direct channel problems and phenomena are considered covering the need for precision hadron spectroscopy, the data base for precision hadron spectroscopy, some relations between direct-channel and cross-channel effects, and spin rotation phenomena

  8. Design and measurements of 64-channel ASIC for neural signal recording.

    Science.gov (United States)

    Kmon, P; Zoladz, M; Grybos, P; Szczygiel, R

    2009-01-01

    This paper presents the design and measurements of a low noise multi-channel front-end electronics for recording extra-cellular neuronal signals using microelectrode arrays. The integrated circuit contains 64 readout channels and was fabricated in CMOS 0.18 microm technology. A single readout channel is built of an AC coupling circuit at the input, a low noise preamplifier, a band-pass filter and a second amplifier. In order to reduce the number of output lines, the 64 analog signals from readout channels are multiplexed to a single output by an analog multiplexer. The chip is optimized for low noise and matching performance with the possibility of cut-off frequencies tuning. The low cut-off frequency can be tuned in the 1 Hz-60 Hz range and the high cut-off frequency can be tuned in the 3.5 kHz-15 kHz range. For the nominal gain setting at 44 dB and power dissipation per single channel of 220 microW the equivalent input noise is in the range from 6 microV-11 microV rms depending on the band-pass filter settings. The chip has good uniformity concerning the spread of its electrical parameters from channel to channel. The spread of gain calculated as standard deviation to mean value is about 4.4% and the spread of the low cut-off frequency is on the same level. The chip occupies 5x2.3 mm(2) of silicon area.

  9. Channel Choice: A Literature Review

    DEFF Research Database (Denmark)

    Østergaard Madsen, Christian; Kræmmergaard, Pernille

    2015-01-01

    The channel choice branch of e-government studies citizens’ and businesses’ choice of channels for interacting with government, and how government organizations can integrate channels and migrate users towards the most cost-efficient channels. In spite of the valuable contributions offered no sys...... no systematic overview exist of channel choice. We present a literature review of channel choice studies in government to citizen context identifying authors, countries, methods, concepts, units of analysis, and theories, and offer suggestionsfor future studies....

  10. Volume Regulated Channels

    DEFF Research Database (Denmark)

    Klausen, Thomas Kjær

    , controlled cell death and cellular migration. Volume regulatory mechanisms has long been in focus for regulating cellular proliferation and my thesis work have been focusing on the role of Cl- channels in proliferation with specific emphasis on ICl, swell. Pharmacological blockage of the ubiquitously...... but are also essential for a number of physiological processes such as proliferation, controlled cell death, migration and endocrinology. The thesis have been focusing on two Channels, namely the swelling activated Cl- channel (ICl, swell) and the transient receptor potential Vanilloid (TRPV4) channel. I: Cl...... understood. Potential agonist binding sites have been proposed in transmembrane domains 3 and 4, in congruence with agonist binding sites of TRPV1. However, the functional relationship between TRPV4 and agonist binding is not yet understood. In this thesis is further elaborate the structure...

  11. Sensing with Ion Channels

    CERN Document Server

    Martinac, Boris

    2008-01-01

    All living cells are able to detect and translate environmental stimuli into biologically meaningful signals. Sensations of touch, hearing, sight, taste, smell or pain are essential to the survival of all living organisms. The importance of sensory input for the existence of life thus justifies the effort made to understand its molecular origins. Sensing with Ion Channels focuses on ion channels as key molecules enabling biological systems to sense and process the physical and chemical stimuli that act upon cells in their living environment. Its aim is to serve as a reference to ion channel specialists and as a source of new information to non specialists who want to learn about the structural and functional diversity of ion channels and their role in sensory physiology.

  12. Calcium channel blocker poisoning

    Directory of Open Access Journals (Sweden)

    Miran Brvar

    2005-04-01

    Full Text Available Background: Calcium channel blockers act at L-type calcium channels in cardiac and vascular smooth muscles by preventing calcium influx into cells with resultant decrease in vascular tone and cardiac inotropy, chronotropy and dromotropy. Poisoning with calcium channel blockers results in reduced cardiac output, bradycardia, atrioventricular block, hypotension and shock. The findings of hypotension and bradycardia should suggest poisoning with calcium channel blockers.Conclusions: Treatment includes immediate gastric lavage and whole-bowel irrigation in case of ingestion of sustainedrelease products. All patients should receive an activated charcoal orally. Specific treatment includes calcium, glucagone and insulin, which proved especially useful in shocked patients. Supportive care including the use of catecholamines is not always effective. In the setting of failure of pharmacological therapy transvenous pacing, balloon pump and cardiopulmonary by-pass may be necessary.

  13. Coding for optical channels

    CERN Document Server

    Djordjevic, Ivan; Vasic, Bane

    2010-01-01

    This unique book provides a coherent and comprehensive introduction to the fundamentals of optical communications, signal processing and coding for optical channels. It is the first to integrate the fundamentals of coding theory and optical communication.

  14. Tritium in the Channel

    International Nuclear Information System (INIS)

    Masson, M.; Fievet, B.; Bailly-Du-Bois, P.; Olivier, A.; Tenailleau, L.

    2009-01-01

    After having recalled that sea waters entering the Channel exhibit a natural concentration of tritium, the authors outline that spent nuclear fuel reprocessing plants are now the main sources of tritium for marine ecosystems as some oceanographic campaigns showed it. If data about the presence of tritium in water are numerous, data concerning the presence of tritiated water and of organically bound tritium in organisms are much less frequent. However, some surveys have been performed along the Channel French coasts

  15. Channelling versus inversion

    DEFF Research Database (Denmark)

    Gale, A.S.; Surlyk, Finn; Anderskouv, Kresten

    2013-01-01

    Evidence from regional stratigraphical patterns in Santonian−Campanian chalk is used to infer the presence of a very broad channel system (5 km across) with a depth of at least 50 m, running NNW−SSE across the eastern Isle of Wight; only the western part of the channel wall and fill is exposed. W......−Campanian chalks in the eastern Isle of Wight, involving penecontemporaneous tectonic inversion of the underlying basement structure, are rejected....

  16. Course on Ionic Channels

    CERN Document Server

    1986-01-01

    This book is based on a series of lectures for a course on ionic channels held in Santiago, Chile, on November 17-20, 1984. It is intended as a tutorial guide on the properties, function, modulation, and reconstitution of ionic channels, and it should be accessible to graduate students taking their first steps in this field. In the presentation there has been a deliberate emphasis on the spe­ cific methodologies used toward the understanding of the workings and function of channels. Thus, in the first section, we learn to "read" single­ channel records: how to interpret them in the theoretical frame of kinetic models, which information can be extracted from gating currents in re­ lation to the closing and opening processes, and how ion transport through an open channel can be explained in terms of fluctuating energy barriers. The importance of assessing unequivocally the origin and purity of mem­ brane preparations and the use of membrane vesicles and optical tech­ niques in the stUGY of ionic channels a...

  17. A CMOS power-efficient low-noise current-mode front-end amplifier for neural signal recording.

    Science.gov (United States)

    Wu, Chung-Yu; Chen, Wei-Ming; Kuo, Liang-Ting

    2013-04-01

    In this paper, a new current-mode front-end amplifier (CMFEA) for neural signal recording systems is proposed. In the proposed CMFEA, a current-mode preamplifier with an active feedback loop operated at very low frequency is designed as the first gain stage to bypass any dc offset current generated by the electrode-tissue interface and to achieve a low high-pass cutoff frequency below 0.5 Hz. No reset signal or ultra-large pseudo resistor is required. The current-mode preamplifier has low dc operation current to enhance low-noise performance and decrease power consumption. A programmable current gain stage is adopted to provide adjustable gain for adaptive signal scaling. A following current-mode filter is designed to adjust the low-pass cutoff frequency for different neural signals. The proposed CMFEA is designed and fabricated in 0.18-μm CMOS technology and the area of the core circuit is 0.076 mm(2). The measured high-pass cutoff frequency is as low as 0.3 Hz and the low-pass cutoff frequency is adjustable from 1 kHz to 10 kHz. The measured maximum current gain is 55.9 dB. The measured input-referred current noise density is 153 fA /√Hz , and the power consumption is 13 μW at 1-V power supply. The fabricated CMFEA has been successfully applied to the animal test for recording the seizure ECoG of Long-Evan rats.

  18. New Reference PMHS Tests to Assess Whole-Body Pedestrian Impact Using a Simplified Generic Vehicle Front-End.

    Science.gov (United States)

    Song, Eric; Petit, Philippe; Trosseille, Xavier; Uriot, Jerome; Potier, Pascal; Dubois, Denis; Douard, Richard

    2017-11-01

    This study aims to provide a set of reference post-mortem human subject tests which can be used, with easily reproducible test conditions, for developing and/or validating pedestrian dummies and computational human body models against a road vehicle. An adjustable generic buck was first developed to represent vehicle front-ends. It was composed of four components: two steel cylindrical tubes screwed on rigid supports in V-form represent the bumper and spoiler respectively, a quarter of a steel cylindrical tube represents the bonnet leading edge, and a steel plate represents the bonnet. These components were positioned differently to represent three types of vehicle profile: a sedan, a SUV and a van. Eleven post-mortem human subjects were then impacted laterally in a mid-gait stance by the bucks at 40 km/h: three tests with the sedan, five with the SUV, and three with the van. Kinematics of the subjects were recorded via high speed videos, impact forces between the subjects and the bucks were measured via load cells behind each tube, femur and tibia deformation and fractures were monitored via gauges on these bones. Based on these tests, biofidelity corridors were established in terms of: 1) displacement time history and trajectory of the head, shoulder, T1, T4, T12, sacrum, knee and ankle, 2) impact forces between the subjects and the buck. Injury outcome was established for each PMHS via autopsy. Simplicity of its geometry and use of standard steel tubes and plates for the buck will make it easy to perform future, new post-mortem human subject tests in the same conditions, or to assess dummies or computational human body models using these reference tests.

  19. adequacy of drainage channels f drainage channels in a small

    African Journals Online (AJOL)

    eobe

    carried out and data obtain from drainage channels. The time of concentratio version of version of Kirpich equation (new equation of time new equation of time from the drainage channels were determined using results showed that most of the drainage channels h. All the drainage channels of basin A had velocities ra.

  20. Ion channelling in diamond

    International Nuclear Information System (INIS)

    Derry, T.E.

    1978-06-01

    Diamond is one of the most extreme cases from a channelling point of view, having the smallest thermal vibration amplitude and the lowest atomic number of commonly-encountered crystals. These are the two parameters most important for determining channelling behaviour. It is of consiberable interest therefore to see how well the theories explaining and predicting the channeling properties of other substance, succeed with diamond. Natural diamond, although the best available form for these experiments, is rather variable in its physical properties. Part of the project was devoted to considering and solving the problem of obtaining reproducible results representative of the ideal crystal. Channelling studies were performed on several good crystals, using the Rutherford backscattering method. Critical angles for proton channelling were measured for incident energies from 0.6 to 4.5 MeV, in the three most open axes and three most open planes of the diamond structure, and for α-particle channelling at 0.7 and 1.0 MeV (He + ) in the same axes and planes. For 1.0 MeV protons, the crystal temperature was varied from 20 degrees Celsius to 700 degrees Celsius. The results are presented as curves of backscattered yield versus angle in the region of each axis or plane, and summarised in the form of tables and graphs. Generally the critical angles, axial minimum yields, and temperature dependence are well predicted by the accepted theories. The most valuable overall conclusion is that the mean thermal vibration amplitude of the atoms in a crytical determines the critical approach distance to the channel walls at which an ion can remain channelled, even when this distance is much smaller than the Thomas-Fermi screening distance of the atomic potential, as is the case in diamond. A brief study was made of the radiation damage caused by α-particle bombardment, via its effect on the channelling phenomenon. It was possible to hold damage down to negligible levels during the

  1. Four-channel readout ASIC for silicon pad detectors

    CERN Document Server

    Baturitsky, M A

    2000-01-01

    A custom front-end readout ASIC has been designed for silicon calorimeters supposed to be used in high-energy physics experiments. The ASIC was produced using BJT-JFET technology. It contains four channels of a fast low-noise charge-sensitive preamplifier (CSP) with inverting outputs summed by a linear adder (LA) followed by an RC-CR shaping amplifier (SA) with 30 ns peaking time. Availability of separate outputs of the CSPs and the LA makes it possible to join any number of silicon detector layers to obtain the longitudinal and transversal resolution required using only this ASIC in any silicon calorimeter minitower configuration. Noise performance is ENC=1800e sup - +18e sup - /pF at 30 ns peaking time for detector capacitance up to C sub d =400 pF. Rise time is 8 ns at input capacitance C sub d =100 pF. Power dissipation is less than 50 mW/ chip at voltage supply 5 V.

  2. Four-channel readout ASIC for silicon pad detectors

    Energy Technology Data Exchange (ETDEWEB)

    Baturitsky, M.A. E-mail: batur@inp.minsk.by; Zamiatin, N.I

    2000-02-01

    A custom front-end readout ASIC has been designed for silicon calorimeters supposed to be used in high-energy physics experiments. The ASIC was produced using BJT-JFET technology. It contains four channels of a fast low-noise charge-sensitive preamplifier (CSP) with inverting outputs summed by a linear adder (LA) followed by an RC-CR shaping amplifier (SA) with 30 ns peaking time. Availability of separate outputs of the CSPs and the LA makes it possible to join any number of silicon detector layers to obtain the longitudinal and transversal resolution required using only this ASIC in any silicon calorimeter minitower configuration. Noise performance is ENC=1800e{sup -}+18e{sup -}/pF at 30 ns peaking time for detector capacitance up to C{sub d}=400 pF. Rise time is 8 ns at input capacitance C{sub d}=100 pF. Power dissipation is less than 50 mW/ chip at voltage supply 5 V.

  3. Four-channel readout ASIC for silicon pad detectors

    International Nuclear Information System (INIS)

    Baturitsky, M.A.; Zamiatin, N.I.

    2000-01-01

    A custom front-end readout ASIC has been designed for silicon calorimeters supposed to be used in high-energy physics experiments. The ASIC was produced using BJT-JFET technology. It contains four channels of a fast low-noise charge-sensitive preamplifier (CSP) with inverting outputs summed by a linear adder (LA) followed by an RC-CR shaping amplifier (SA) with 30 ns peaking time. Availability of separate outputs of the CSPs and the LA makes it possible to join any number of silicon detector layers to obtain the longitudinal and transversal resolution required using only this ASIC in any silicon calorimeter minitower configuration. Noise performance is ENC=1800e - +18e - /pF at 30 ns peaking time for detector capacitance up to C d =400 pF. Rise time is 8 ns at input capacitance C d =100 pF. Power dissipation is less than 50 mW/ chip at voltage supply 5 V

  4. Channel identification machines.

    Science.gov (United States)

    Lazar, Aurel A; Slutskiy, Yevgeniy B

    2012-01-01

    We present a formal methodology for identifying a channel in a system consisting of a communication channel in cascade with an asynchronous sampler. The channel is modeled as a multidimensional filter, while models of asynchronous samplers are taken from neuroscience and communications and include integrate-and-fire neurons, asynchronous sigma/delta modulators and general oscillators in cascade with zero-crossing detectors. We devise channel identification algorithms that recover a projection of the filter(s) onto a space of input signals loss-free for both scalar and vector-valued test signals. The test signals are modeled as elements of a reproducing kernel Hilbert space (RKHS) with a Dirichlet kernel. Under appropriate limiting conditions on the bandwidth and the order of the test signal space, the filter projection converges to the impulse response of the filter. We show that our results hold for a wide class of RKHSs, including the space of finite-energy bandlimited signals. We also extend our channel identification results to noisy circuits.

  5. Channel Identification Machines

    Directory of Open Access Journals (Sweden)

    Aurel A. Lazar

    2012-01-01

    Full Text Available We present a formal methodology for identifying a channel in a system consisting of a communication channel in cascade with an asynchronous sampler. The channel is modeled as a multidimensional filter, while models of asynchronous samplers are taken from neuroscience and communications and include integrate-and-fire neurons, asynchronous sigma/delta modulators and general oscillators in cascade with zero-crossing detectors. We devise channel identification algorithms that recover a projection of the filter(s onto a space of input signals loss-free for both scalar and vector-valued test signals. The test signals are modeled as elements of a reproducing kernel Hilbert space (RKHS with a Dirichlet kernel. Under appropriate limiting conditions on the bandwidth and the order of the test signal space, the filter projection converges to the impulse response of the filter. We show that our results hold for a wide class of RKHSs, including the space of finite-energy bandlimited signals. We also extend our channel identification results to noisy circuits.

  6. CARIOCA : A Fast Binary Front-End Implemented in 0.25Pm CMOS using a Novel Current-Mode Technique for the LHCb Muon Detector

    CERN Multimedia

    2000-01-01

    The CARIOCA front-end is an amplifier discriminator chip, using 0.25mm CMOS technology, developed with a very fast and low noise preamplifier. This prototype was designed to have input impedance below 10W. Measurements showed a peaking time of 14ns and noise of 450e- at zero input capacitance, with a noise slope of 37.4 e-/pF. The sensitivity of 8mV/fC remains almost unchanged up to a detector capacitance of 120pF.

  7. Front-end vision and multi-scale image analysis multi-scale computer vision theory and applications, written in Mathematica

    CERN Document Server

    Romeny, Bart M Haar

    2008-01-01

    Front-End Vision and Multi-Scale Image Analysis is a tutorial in multi-scale methods for computer vision and image processing. It builds on the cross fertilization between human visual perception and multi-scale computer vision (`scale-space') theory and applications. The multi-scale strategies recognized in the first stages of the human visual system are carefully examined, and taken as inspiration for the many geometric methods discussed. All chapters are written in Mathematica, a spectacular high-level language for symbolic and numerical manipulations. The book presents a new and effective

  8. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS upgrade framework

    CERN Document Server

    Chen, Kai; The ATLAS collaboration

    2016-01-01

    The ATLAS Phase-I upgrade requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. The FELIX system provides this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, routing between custom radiation tolerant optical links from front-end electronics, via FPGA PCIe Gen3 cards, and a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favor of software on commercial servers. The FELIX system, results of demonstrator, design and testing of prototype are described.

  9. Simulation study of n-XYTER front-end electronics in overflow situations for early prototyping of detectors in the CBM experiment

    Energy Technology Data Exchange (ETDEWEB)

    Balog, Tomas [GSI Darmstadt (Germany); Collaboration: CBM-Collaboration

    2011-07-01

    In high-rate experiments a situation can occur in which the data rate temporarily exceeds the available bandwidth. With self-triggered front end electronics such overload situations would lead, without further measures, to uncontrolled data losses and potentially large number of incomplete events. Mechanisms needed to control data losses and to ensure complete events can be understood using simulations performed by the hardware description language SystemC. Simulations of a simplified n-XYTER based front-end electronics are presented that give first insight in the behaviour of data flow and data losses in the DAQ system of the CBM experiment.

  10. Channel plate for DNA sequencing

    Science.gov (United States)

    Douthart, Richard J.; Crowell, Shannon L.

    1998-01-01

    This invention is a channel plate that facilitates data compaction in DNA sequencing. The channel plate has a length, a width and a thickness, and further has a plurality of channels that are parallel. Each channel has a depth partially through the thickness of the channel plate. Additionally an interface edge permits electrical communication across an interface through a buffer to a deposition membrane surface.

  11. Nanoscale Vacuum Channel Transistor.

    Science.gov (United States)

    Han, Jin-Woo; Moon, Dong-Il; Meyyappan, M

    2017-04-12

    Vacuum tubes that sparked the electronics era had given way to semiconductor transistors. Despite their faster operation and better immunity to noise and radiation compared to the transistors, the vacuum device technology became extinct due to the high power consumption, integration difficulties, and short lifetime of the vacuum tubes. We combine the best of vacuum tubes and modern silicon nanofabrication technology here. The surround gate nanoscale vacuum channel transistor consists of sharp source and drain electrodes separated by sub-50 nm vacuum channel with a source to gate distance of 10 nm. This transistor performs at a low voltage (3 microamperes). The nanoscale vacuum channel transistor can be a possible alternative to semiconductor transistors beyond Moore's law.

  12. Chaos in quantum channels

    Science.gov (United States)

    Hosur, Pavan; Qi, Xiao-Liang; Roberts, Daniel A.; Yoshida, Beni

    2016-02-01

    We study chaos and scrambling in unitary channels by considering their entanglement properties as states. Using out-of-time-order correlation functions to diagnose chaos, we characterize the ability of a channel to process quantum information. We show that the generic decay of such correlators implies that any input subsystem must have near vanishing mutual information with almost all partitions of the output. Additionally, we propose the negativity of the tripartite information of the channel as a general diagnostic of scrambling. This measures the delocalization of information and is closely related to the decay of out-of-time-order correlators. We back up our results with numerics in two non-integrable models and analytic results in a perfect tensor network model of chaotic time evolution. These results show that the butterfly effect in quantum systems implies the information-theoretic definition of scrambling.

  13. CANDU fuel channels

    International Nuclear Information System (INIS)

    Coleman, C.E.; Cheadle, B.A.

    1997-01-01

    The service life of CANDU fuel channels is determined by the component that has to withstand the most severe conditions, the Zr-2.5Nb pressure tube. The latest fuel channels are expected to have a lifetime of over 30 years. The properties that control service life are fracture and deformation. For fracture, a defence-in-depth approach is used - preventing crack initiation and invoking leak-before-break. Confidence in the serviceability of fuel channels is based on current knowledge of the state of health of the components evaluated by surveillance. Degradation of properties with service is slow, allowing sufficient time to judge and act when end-of-life is reached. Methods for improving the properties of components are outlined. (author)

  14. MITOCHONDRIAL BKCa CHANNEL

    Directory of Open Access Journals (Sweden)

    Enrique eBalderas

    2015-03-01

    Full Text Available Since its discovery in a glioma cell line 15 years ago, mitochondrial BKCa channel (mitoBKCa has been studied in brain cells and cardiomyocytes sharing general biophysical properties such as high K+ conductance (~300 pS, voltage-dependency and Ca2+-sensitivity. Main advances in deciphering the molecular composition of mitoBKCa have included establishing that it is encoded by the Kcnma1 gene, that a C-terminal splice insert confers mitoBKCa ability to be targeted to cardiac mitochondria, and evidence for its potential coassembly with β subunits. Notoriously, β1 subunit directly interacts with cytochrome c oxidase and mitoBKCa can be modulated by substrates of the respiratory chain. mitoBKCa channel has a central role in protecting the heart from ischemia, where pharmacological activation of the channel impacts the generation of reactive oxygen species and mitochondrial Ca2+ preventing cell death likely by impeding uncontrolled opening of the mitochondrial transition pore. Supporting this view, inhibition of mitoBKCa with Iberiotoxin, enhances cytochrome c release from glioma mitochondria. Many tantalizing questions remain. Some of them are: how is mitoBKCa coupled to the respiratory chain? Does mitoBKCa play non-conduction roles in mitochondria physiology? Which are the functional partners of mitoBKCa? What are the roles of mitoBKCa in other cell types? Answers to these questions are essential to define the impact of mitoBKCa channel in mitochondria biology and disease.

  15. Channels of Propaganda.

    Science.gov (United States)

    Sproule, J. Michael

    Defining propaganda as "efforts by special interests to win over the public covertly by infiltrating messages into various channels of public expression ordinarily viewed as politically neutral," this book argues that propaganda has become pervasive in American life. Pointing out that the 1990s society is inundated with propaganda from…

  16. Chemistry in Microfluidic Channels

    Science.gov (United States)

    Chia, Matthew C.; Sweeney, Christina M.; Odom, Teri W.

    2011-01-01

    General chemistry introduces principles such as acid-base chemistry, mixing, and precipitation that are usually demonstrated in bulk solutions. In this laboratory experiment, we describe how chemical reactions can be performed in a microfluidic channel to show advanced concepts such as laminar fluid flow and controlled precipitation. Three sets of…

  17. Channeling through Bent Crystals

    Energy Technology Data Exchange (ETDEWEB)

    Mack, Stephanie; /Ottawa U. /SLAC

    2012-09-07

    Bent crystals have demonstrated potential for use in beam collimation. A process called channeling is when accelerated particle beams are trapped by the nuclear potentials in the atomic planes within a crystal lattice. If the crystal is bent then the particles can follow the bending angle of the crystal. There are several different effects that are observed when particles travel through a bent crystal including dechanneling, volume capture, volume reflection and channeling. With a crystal placed at the edge of a particle beam, part of the fringe of the beam can be deflected away towards a detector or beam dump, thus helping collimate the beam. There is currently FORTRAN code by Igor Yazynin that has been used to model the passage of particles through a bent crystal. Using this code, the effects mentioned were explored for beam energy that would be seen at the Facility for Advanced Accelerator Experimental Tests (FACET) at a range of crystal orientations with respect to the incoming beam. After propagating 5 meters in vacuum space past the crystal the channeled particles were observed to separate from most of the beam with some noise due to dechanneled particles. Progressively smaller bending radii, with corresponding shorter crystal lengths, were compared and it was seen that multiple scattering decreases with the length of the crystal therefore allowing for cleaner detection of the channeled particles. The input beam was then modified and only a portion of the beam sent through the crystal. With the majority of the beam not affected by the crystal, most particles were not deflected and after propagation the channeled particles were seen to be deflected approximately 5mm. After a portion of the beam travels through the crystal, the entire beam was then sent through a quadrupole magnet, which increased the separation of the channeled particles from the remainder of the beam to a distance of around 20mm. A different code, which was developed at SLAC, was used to

  18. Characterization of silicon microstrip sensors, front-end electronics, and prototype tracking detectors for the CBM experiment at FAIR

    International Nuclear Information System (INIS)

    Sorokin, Iurii

    2013-01-01

    The Compressed Baryonic Matter (CBM) experiment will explore the phase diagram of strongly interacting matter in the region of high net baryonic densities. The matter at the extreme conditions will be studied in collisions of a heavy ion beam with a fixed heavy element target. The present work is devoted to the development of the main component of the CBM experiment - the Silicon Tracking System (STS). The STS has to enable reconstruction of up to 1000 charged particle tracks per nucleus-nucleus interaction at the rate of up to 10 MHz, provide a momentum resolution Δp/p of 1 %, and withstand the radiation load of up to 10 14 n eq /cm 2 (n eq -neutron equivalent). The STS will be based on double-sided silicon microstrip sensors, that will be arranged in 8 planes in the aperture of the dipole magnet. Selftriggering readout electronics will be located on the periphery of the detecting planes, and connected to the sensors with low mass microcables. In the stage of R and D, as well as in the stages of pre-series and series production, characterization of the sensors, of the front-end electronics, and of the complete detector modules has to be performed. In the present work the required techniques were developed, and the performance of the latest detector prototypes was evaluated. A particular attention is paid to evaluation of the signal amplitude, as it is one of the most important detector characteristics. Techniques for measuring the passive electrical characteristics of the sensors were developed. These include: the coupling and the interstrip capacitances, the interstrip resistance, the bias resistance, the strip leakage current, the bulk capacitance, and the bulk leakage current. The techniques will be applied for the quality assurance of the sensors during the pre-series and the series production. Extensive characterization of the prototype readout chip, n-XYTER, was performed. The register settings were optimized, and the dependence of the amplitude response on

  19. Characterization of silicon microstrip sensors, front-end electronics, and prototype tracking detectors for the CBM experiment at FAIR

    Energy Technology Data Exchange (ETDEWEB)

    Sorokin, Iurii

    2013-07-01

    The Compressed Baryonic Matter (CBM) experiment will explore the phase diagram of strongly interacting matter in the region of high net baryonic densities. The matter at the extreme conditions will be studied in collisions of a heavy ion beam with a fixed heavy element target. The present work is devoted to the development of the main component of the CBM experiment - the Silicon Tracking System (STS). The STS has to enable reconstruction of up to 1000 charged particle tracks per nucleus-nucleus interaction at the rate of up to 10 MHz, provide a momentum resolution Δp/p of 1 %, and withstand the radiation load of up to 10{sup 14} n{sub eq}/cm{sup 2} (n{sub eq}-neutron equivalent). The STS will be based on double-sided silicon microstrip sensors, that will be arranged in 8 planes in the aperture of the dipole magnet. Selftriggering readout electronics will be located on the periphery of the detecting planes, and connected to the sensors with low mass microcables. In the stage of R and D, as well as in the stages of pre-series and series production, characterization of the sensors, of the front-end electronics, and of the complete detector modules has to be performed. In the present work the required techniques were developed, and the performance of the latest detector prototypes was evaluated. A particular attention is paid to evaluation of the signal amplitude, as it is one of the most important detector characteristics. Techniques for measuring the passive electrical characteristics of the sensors were developed. These include: the coupling and the interstrip capacitances, the interstrip resistance, the bias resistance, the strip leakage current, the bulk capacitance, and the bulk leakage current. The techniques will be applied for the quality assurance of the sensors during the pre-series and the series production. Extensive characterization of the prototype readout chip, n-XYTER, was performed. The register settings were optimized, and the dependence of the

  20. Utilizing a Novel Approach at the Fuzzy Front-End of New Product Development: A Case Study in a Flexible Fabric Supercapacitor

    Directory of Open Access Journals (Sweden)

    Gwo-Tsuen Jou

    2016-08-01

    Full Text Available The fuzzy front-end plays a most crucial part in new product development (NPD, leading to the success of product development and product launch in the market. This study proposes a novel method, TTRI_MP, by combining Crawford and Di Benedetto’s model and Cooper’s model, to strengthen the management of the fuzzy front-end. The proposed method comprises four stages: market exploration and technology forecasting, idea generation and segmentation, portfolio analysis and technology roadmapping (TRM. In the first stage, SWOT was utilized to identify the key strategic areas, and the technology readiness level (TRL was adopted to position the level of developed technologies. In the second stage, the business concepts were required to go through the viability test and customers, collaborators, competitors and company (4C. In the third stage, the Strategic Position Analysis (SPAN and Financial Analysis (FAN developed by IBM were employed in the portfolio analysis to screen out potential NPD projects. In the last stage, the selected NPD projects were linked with their functions and technologies in the TRM chart. The method was successfully implemented by a research team working on a flexible fabric supercapacitor at the Taiwan Textile Research Institute (TTRI.

  1. Quantum communication under channel uncertainty

    International Nuclear Information System (INIS)

    Noetzel, Janis Christian Gregor

    2012-01-01

    This work contains results concerning transmission of entanglement and subspaces as well as generation of entanglement in the limit of arbitrary many uses of compound- and arbitrarily varying quantum channels (CQC, AVQC). In both cases, the channel is described by a set of memoryless channels. Only forward communication between one sender and one receiver is allowed. A code is said to be ''good'' only, if it is ''good'' for every channel out of the set. Both settings describe a scenario, in which sender and receiver have only limited channel knowledge. For different amounts of information about the channel available to sender or receiver, coding theorems are proven for the CQC. For the AVQC, both deterministic and randomised coding schemes are considered. Coding theorems are proven, as well as a quantum analogue of the Ahlswede-dichotomy. The connection to zero-error capacities of stationary memoryless quantum channels is investigated. The notion of symmetrisability is defined and used for both classes of channels.

  2. Learning Channels and Verbal Behavior

    Science.gov (United States)

    Lin, Fan-Yu; Kubina, Richard M., Jr.

    2004-01-01

    This article reviews the basics of learning channels and how specification of stimuli can help enhance verbal behavior. This article will define learning channels and the role of the ability matrix in training verbal behavior.

  3. ``Just Another Distribution Channel?''

    Science.gov (United States)

    Lemstra, Wolter; de Leeuw, Gerd-Jan; van de Kar, Els; Brand, Paul

    The telecommunications-centric business model of mobile operators is under attack due to technological convergence in the communication and content industries. This has resulted in a plethora of academic contributions on the design of new business models and service platform architectures. However, a discussion of the challenges that operators are facing in adopting these models is lacking. We assess these challenges by considering the mobile network as part of the value system of the content industry. We will argue that from the perspective of a content provider the mobile network is ‘just another’ distribution channel. Strategic options available for the mobile communication operators are to deliver an excellent distribution channel for content delivery or to move upwards in the value chain by becoming a content aggregator. To become a mobile content aggregator operators will have to develop or acquire complementary resources and capabilities. Whether this strategic option is sustainable remains open.

  4. Geysering in boiling channels

    Energy Technology Data Exchange (ETDEWEB)

    Aritomi, Masanori; Takemoto, Takatoshi [Tokyo Institute of Technology, Tokyo (Japan); Chiang, Jing-Hsien [Japan NUS Corp. Ltd., Toyko (Japan)] [and others

    1995-09-01

    A concept of natural circulation BWRs such as the SBWR has been proposed and seems to be promising in that the primary cooling system can be simplified. The authors have been investigating thermo-hydraulic instabilities which may appear during the start-up in natural circulation BWRs. In our previous works, geysering was investigated in parallel boiling channels for both natural and forced circulations, and its driving mechanism and the effect of system pressure on geysering occurrence were made clear. In this paper, geysering is investigated in a vertical column and a U-shaped vertical column heated in the lower parts. It is clarified from the results that the occurrence mechanism of geysering and the dependence of system pressure on geysering occurrence coincide between parallel boiling channels in circulation systems and vertical columns in non-circulation systems.

  5. Radar channel balancing with commutation

    Energy Technology Data Exchange (ETDEWEB)

    Doerry, Armin Walter

    2014-02-01

    When multiple channels are employed in a pulse-Doppler radar, achieving and maintaining balance between the channels is problematic. In some circumstances the channels may be commutated to achieve adequate balance. Commutation is the switching, trading, toggling, or multiplexing of the channels between signal paths. Commutation allows modulating the imbalance energy away from the balanced energy in Doppler, where it can be mitigated with filtering.

  6. Nuclear reactor coolant channels

    International Nuclear Information System (INIS)

    Macbeth, R.V.

    1978-01-01

    A nuclear reactor coolant channel is described that is suitable for sub-cooled reactors as in pressurised water reactors as well as for bulk boiling, as in boiling water reactors and steam generating nuclear reactors. The arrangement aims to improve heat transfer between the fuel elements and the coolant. Full constructional details are given. See also other similar patents by the author. (U.K.)

  7. Channel box compression device

    International Nuclear Information System (INIS)

    Nakamizo, Hiroshi; Tanaka, Yuki.

    1996-01-01

    The device of the present invention reduces the volume of spent fuel channel boxes of power plant facilities to eliminate secondary wastes, suppress generation of radiation sources and improve storage space efficiency. The device has a box-like shape. A support frame is disposed on the lateral side of the box for supporting spent channel boxes. A horizontal transferring unit and a vertical transferring compression unit driven by a driving mechanism are disposed in the support frame. Further, the compression unit may have a rotational compression roller so as to move freely in the transferring unit. In addition, the transferring unit and the driving mechanism may be disposed outside of pool water. With such a constitution, since spent channel boxes are compressed and bent by horizontal movement of the transferring unit and the vertical movement of the compression unit, no cut pieces or cut powders are generated. Further, if the transferring unit and the driving mechanism are disposed outside of the pool water, it is not necessary to make them waterproof, which facilitates the maintenance. (I.S.)

  8. Ion channeling revisited

    Energy Technology Data Exchange (ETDEWEB)

    Doyle, Barney Lee [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Corona, Aldo [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Nguyen, Anh [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2014-09-01

    A MS Excel program has been written that calculates accidental, or unintentional, ion channeling in cubic bcc, fcc and diamond lattice crystals or polycrystalline materials. This becomes an important issue when simulating the creation by energetic neutrons of point displacement damage and extended defects using beams of ions. All of the tables and graphs in the three Ion Beam Analysis Handbooks that previously had to be manually looked up and read from were programed into Excel in handy lookup tables, or parameterized, for the case of the graphs, using rather simple exponential functions with different powers of the argument. The program then offers an extremely convenient way to calculate axial and planar half-angles and minimum yield or dechanneling probabilities, effects on half-angles of amorphous overlayers, accidental channeling probabilities for randomly oriented crystals or crystallites, and finally a way to automatically generate stereographic projections of axial and planar channeling half-angles. The program can generate these projections and calculate these probabilities for axes and [hkl] planes up to (555).

  9. TRP channels in kidney disease.

    NARCIS (Netherlands)

    Hsu, Y.J.; Hoenderop, J.G.J.; Bindels, R.J.M.

    2007-01-01

    Mammalian TRP channel proteins form six-transmembrane cation-permeable channels that may be grouped into six subfamilies on the basis of amino acid sequence homology (TRPC, TRPV, TRPM, TRPA, TRPP, and TRPML). Recent studies of TRP channels indicate that they are involved in numerous fundamental cell

  10. Super-Altro 16: a Front-End System on Chip for DSP Based Readout of Gaseous Detectors

    CERN Document Server

    Aspell, P.; Franca, H.; Garcia Garcia, E.; Musa, L.

    2013-01-01

    This paper presents the architecture, design and test results of an ASIC specifically designed for the readout of gaseous detectors. The primary application is the readout of the Linear Collider Time Projection Chamber. The small area available (4mm2/channel) requires an innovative design, where sensitive analog components and massive digital functionalities are integrated on the same chip. Moreover, shut down (power pulsing) features are necessary in order to reduce the power consumption. The Super-Altro is a 16-channel demonstrator ASIC involving analog and digital signal processing. Each channel contains a low noise Pre-Amplifier and Shaping Amplifier (PASA), a pipeline ADC, and a Digital Signal Processor (DSP). The PASA is programmable in terms of gain and shaping time and can operate with both positive and negative polarities of input charge. The 10-bit ADC samples the output of the PASA at a frequency up to 40MHz before providing the digitized signal to the DSP which performs baseline subtraction, signa...

  11. Intracellular ion channels and cancer

    Directory of Open Access Journals (Sweden)

    Luigi eLeanza

    2013-09-01

    Full Text Available Several types of channels play a role in the maintenance of ion homeostasis in subcellular organelles including endoplasmatic reticulum, nucleus, lysosome, endosome and mitochondria. Here we give a brief overview of the contribution of various mitochondrial and other organellar channels to cancer cell proliferation or death. Much attention is focused on channels involved in intracellular calcium signaling and on ion fluxes in the ATP-producing organelle mitochondria. Mitochondrial K+ channels (Ca2+-dependent BKCa and IKCa, ATP-dependent KATP, Kv1.3, two-pore TWIK-related Acid-Sensitive K+ channel-3 (TASK-3, Ca2+ uniporter MCU, Mg2+-permeable Mrs2, anion channels (voltage-dependent chloride channel VDAC, intracellular chloride channel CLIC and the Permeability Transition Pore (MPTP contribute importantly to the regulation of function in this organelle. Since mitochondria play a central role in apoptosis, modulation of their ion channels by pharmacological means may lead to death of cancer cells. The nuclear potassium channel Kv10.1 and the nuclear chloride channel CLIC4 as well as the endoplasmatic reticulum (ER-located inositol 1,4,5-trisphosphate (IP3 receptor, the ER-located Ca2+ depletion sensor STIM1 (stromal interaction molecule 1, a component of the store-operated Ca2+ channel and the ER-resident TRPM8 are also mentioned. Furthermore, pharmacological tools affecting organellar channels and modulating cancer cell survival are discussed. The channels described in this review are summarized on Figure 1. Overall, the view is emerging that intracellular ion channels may represent a promising target for cancer treatment.

  12. Planar channeling observed by radiography

    International Nuclear Information System (INIS)

    Delsarte, Guy

    1970-06-01

    Radiographies of crystals by means of channeled particles exhibit channeling patterns. The origin of these patterns is studied, The role played by planar channeling is demonstrated. It is shown that these patterns are local amplifications of the process generating the images of a crystal on the radiography. It is deduced that planar channeling plays a determining role in the formation of these images. An orientation chamber using transmitted planar channels is described. The orientation of very small grains in a polycrystal can be very easily obtained, (author) [fr

  13. A multi-mode multi-band RF receiver front-end for a TD-SCDMA/LTE/LTE-advanced in 0.18-μm CMOS process

    International Nuclear Information System (INIS)

    Guo Rui; Zhang Haiying

    2012-01-01

    A fully integrated multi-mode multi-band directed-conversion radio frequency (RF) receiver front-end for a TD-SCDMA/LTE/LTE-advanced is presented. The front-end employs direct-conversion design, and consists of two differential tunable low noise amplifiers (LNA), a quadrature mixer, and two intermediate frequency (IF) amplifiers. The two independent tunable LNAs are used to cover all the four frequency bands, achieving sufficient low noise and high gain performance with low power consumption. Switched capacitor arrays perform a resonant frequency point calibration for the LNAs. The two LNAs are combined at the driver stage of the mixer, which employs a folded double balanced Gilbert structure, and utilizes PMOS transistors as local oscillator (LO) switches to reduce flicker noise. The front-end has three gain modes to obtain a higher dynamic range. Frequency band selection and mode of configuration is realized by an on-chip serial peripheral interface (SPI) module. The front-end is fabricated in a TSMC 0.18-μm RF CMOS process and occupies an area of 1.3 mm 2 . The measured double-sideband (DSB) noise figure is below 3.5 dB and the conversion gain is over 43 dB at all of the frequency bands. The total current consumption is 31 mA from a 1.8-V supply. (semiconductor integrated circuits)

  14. Optimization of the design of DC-DC converters for improving the electromagnetic compatibility with the Front-End electronic for the super Large Hadron Collider Trackers

    CERN Document Server

    Fuentes Rojas, Cristian Alejandro; Blanchot, G

    2011-01-01

    The upgrade of the Large Hadron Collider (LHC) experiments at CERN sets new challenges for the powering of the detectors. One of the powering schemes under study is based on DC-DC buck converters mounted on the front-end modules. The hard environmental conditions impose strict restrictions to the converters in terms of low volume, radiation and magnetic field tolerance. Furthermore, the noise emission of the switching converters must not affect the performance of the powered systems. A study of the sources and paths of noise of a synchronous buck converter has been made for identifying the critical parameters to reduce their emissions. As proof of principle, a converter was designed following the PCB layout considerations proposed and then used for powering a silicon strip module prototype for the ATLAS upgrade, in order to evaluate their compatibility.

  15. Design of the new front-end electronics for the readout of the upgraded CMS electromagnetic calorimeter for the HL-LHC

    CERN Document Server

    Cometti, Simona

    2017-01-01

    The Compact Muon Solenoid detector was originally designed to operate for about ten years, for LHC instantaneous luminosities up to $1 \\cdot 10^{34}$ cm$^{-2}$ s$^{-1}$ and integrated luminosity of 500 fb$^{-1}$. The High Luminosity LHC will increase the instantaneous luminosity by about a factor of 5 from current levels and CMS will accumulate an integrated luminosity of 3000 fb$^{-1}$ by about 2035. With such high luminosity the electromagnetic calorimeter of CMS will have to cope with a challenging increase in the number of interactions per bunch crossing and in radiation levels. The front-end readout electronics will be completely redesigned, with the goals of providing precision timing, low noise and added flexibility in the trigger system. It will use a faster pre-amplifier, increase the sampling frequency from 40 MS/s to 160 MS/s and implement a trigger system that resides entirely off-detector.

  16. A Complete Readout Chain of the ATLAS Tile Calorimeter for the HL-LHC: from FATALIC Front-End Electronics to Signal Reconstruction

    Science.gov (United States)

    Senkin, Sergey

    2018-01-01

    The ATLAS Collaboration has started a vast programme of upgrades in the context of high-luminosity LHC (HL-LHC) foreseen in 2024. We present here one of the frontend readout options, an ASIC called FATALIC, proposed for the high-luminosity phase LHC upgrade of the ATLAS Tile Calorimeter. Based on a 130 nm CMOS technology, FATALIC performs the complete signal processing, including amplification, shaping and digitisation. We describe the full characterisation of FATALIC and also the Optimal Filtering signal reconstruction method adapted to fully exploit the FATALIC three-range layout. Additionally we present the resolution performance of the whole chain measured using the charge injection system designed for calibration. Finally we discuss the results of the signal reconstruction used on real data collected during a preliminary beam test at CERN.

  17. A Complete Readout Chain of the ATLAS Tile Calorimeter for the HL-LHC: from FATALIC Front-End Electronics to Signal Reconstruction

    CERN Document Server

    Senkin, Sergey; The ATLAS collaboration

    2017-01-01

    The ATLAS Collaboration has started a vast programme of upgrades in the context of high-luminosity LHC (HL-LHC) foreseen in 2024. We present here one of the front-end readout options, an ASIC called FATALIC, which is proposed for the high-luminosity phase LHC upgrade of the ATLAS Tile Calorimeter. Based on a 130 nm CMOS technology, FATALIC performs the complete signal processing, including amplification, shaping and digitisation. Hereby we describe the full characterisation of FATALIC and also the signal reconstruction up to the observables of interest for physics: the energy and the arrival time of the particle. The Optimal Filtering signal reconstruction method is adapted to fully exploit the FATALIC three-range layout. Additionally, we present the performance in terms of resolution of the whole chain measured using the charge injection system designed for calibration. Finally, the results of the signal reconstruction used on real data collected during a preliminary beam test at CERN are discussed.

  18. A Complete Readout Chain of the ATLAS Tile Calorimeter for the HL-LHC: from FATALIC Front-End Electronics to Signal Reconstruction

    Directory of Open Access Journals (Sweden)

    Senkin Sergey

    2018-01-01

    Full Text Available The ATLAS Collaboration has started a vast programme of upgrades in the context of high-luminosity LHC (HL-LHC foreseen in 2024. We present here one of the frontend readout options, an ASIC called FATALIC, proposed for the high-luminosity phase LHC upgrade of the ATLAS Tile Calorimeter. Based on a 130 nm CMOS technology, FATALIC performs the complete signal processing, including amplification, shaping and digitisation. We describe the full characterisation of FATALIC and also the Optimal Filtering signal reconstruction method adapted to fully exploit the FATALIC three-range layout. Additionally we present the resolution performance of the whole chain measured using the charge injection system designed for calibration. Finally we discuss the results of the signal reconstruction used on real data collected during a preliminary beam test at CERN.

  19. Compact frontend-electronics and bidirectional 3.3 Gbps optical datalink for fast proportional chamber readout

    International Nuclear Information System (INIS)

    Lueders, S.; Baldinger, R.; Eichler, R.; Grab, C.; Meier, B.; Streuli, S.; Szeker, K.; Baumeister, D.; Loechner, S.; Feuerstack-Raible, M.; Stange, U.; Boesiger, K.; Robmann, P.; Schmid, B.A.; Steiner, S.; Straumann, U.; Truoel, P.

    2002-01-01

    The 9600 channels of the multi-wire proportional chamber of the H1 experiment at HERA have to be read out within 96 ns and made available to the trigger system. The tight spatial conditions at the rear end flange require a compact bidirectional readout electronics with minimal power consumption and dead material. A solution using 40 identical optical link modules, each transferring the trigger information with a physical rate of 4x832 Mbps via optical fibers, has been developed and commissioned. The analog pulses from the chamber can be monitored and the synchronization to the global HERA clock signal is ensured

  20. A High-Frequency Isolation (HFI Charging DC Port Combining a Front-End Three-Level Converter with a Back-End LLC Resonant Converter

    Directory of Open Access Journals (Sweden)

    Guowei Cai

    2017-09-01

    Full Text Available The high-frequency isolation (HFI charging DC port can serve as the interface between unipolar/bipolar DC buses and electric vehicles (EVs through the two-power-stage system structure that combines the front-end three-level converter with the back-end logical link control (LLC resonant converter. The DC output voltage can be maintained within the desired voltage range by the front-end converter. The electrical isolation can be realized by the back-end LLC converter, which has the bus converter function. According to the three-level topology, the low-voltage rating power devices can be adapted for half-voltage stress of the total DC grid, and the PWM phase-shift control can double the equivalent switching frequency to greatly reduce the filter volume. LLC resonant converters have advance characteristics of inverter-side zero-voltage-switching (ZVS and rectifier-side zero-current switching (ZCS. In particular, it can achieve better performance under quasi-resonant frequency mode. Additionally, the magnetizing current can be modified following different DC output voltages, which have the self-adaptation ZVS condition for decreasing the circulating current. Here, the principles of the proposed topology are analyzed in detail, and the design conditions of the three-level output filter and high-frequency isolation transformer are explored. Finally, a 20 kW prototype with the 760 V input and 200–500 V output are designed and tested. The experimental results are demonstrated to verify the validity and performance of this charging DC port system structure.

  1. A Low Cost Bluetooth Low Energy Transceiver for Wireless Sensor Network Applications with a Front-end Receiver-Matching Network-Reusing Power Amplifier Load Inductor.

    Science.gov (United States)

    Liang, Zhen; Li, Bin; Huang, Mo; Zheng, Yanqi; Ye, Hui; Xu, Ken; Deng, Fangming

    2017-04-19

    In this work, a low cost Bluetooth Low Energy (BLE) transceiver for wireless sensor network (WSN) applications, with a receiver (RX)-matching network-reusing power amplifier (PA) load inductor, is presented. In order to decrease the die area, only two inductors were used in this work. Besides the one used in the voltage control oscillator (VCO), the PA load inductor was reused as the RX impedance matching component in the front-end. Proper controls have been applied to achieve high transmitter (TX) input impedance when the transceiver is in the receiving mode, and vice versa. This allows the TRX-switch/matching network integration without significant performance degradation. The RX adopted a low-IF structure and integrated a single-ended low noise amplifier (LNA), a current bleeding mixer, a 4th complex filter and a delta-sigma continuous time (CT) analog-to-digital converter (ADC). The TX employed a two-point PLL-based architecture with a non-linear PA. The RX achieved a sensitivity of -93 dBm and consumes 9.7 mW, while the TX achieved a 2.97% error vector magnitude (EVM) with 9.4 mW at 0 dBm output power. This design was fabricated in a 0.11 μm complementary metal oxide semiconductor (CMOS) technology and the front-end circuit only occupies 0.24 mm². The measurement results verify the effectiveness and applicability of the proposed BLE transceiver for WSN applications.

  2. A Time-Domain Analog Spatial Compressed Sensing Encoder for Multi-Channel Neural Recording.

    Science.gov (United States)

    Okazawa, Takayuki; Akita, Ippei

    2018-01-11

    A time-domain analog spatial compressed sensing encoder for neural recording applications is proposed. Owing to the advantage of MEMS technologies, the number of channels on a silicon neural probe array has doubled in 7.4 years, and therefore, a greater number of recording channels and higher density of front-end circuitry is required. Since neural signals such as action potential (AP) have wider signal bandwidth than that of an image sensor, a data compression technique is essentially required for arrayed neural recording systems. In this paper, compressed sensing (CS) is employed for data reduction, and a novel time-domain analog CS encoder is proposed. A simpler and lower power circuit than conventional analog or digital CS encoders can be realized by using the proposed CS encoder. A prototype of the proposed encoder was fabricated in a 180 nm 1P6M CMOS process, and it achieved an active area of 0.0342 mm 2 / ch . and an energy efficiency of 25.0 pJ / ch . · conv .

  3. Channels in tokamak reactor shields

    International Nuclear Information System (INIS)

    Shchipakin, O.L.

    1981-01-01

    The results of calculations of neutron transport through the channels in the tokamak reactor radiation shields, obtained by the Monte Carlo method and by the method of discrete ordinates, are considered. The given data show that the structural materials of the channel and that of the blanket and shields in the regions close to it are subjected to almost the same irradiation as the first wall and therefore they should satisfy the technical requirements. The radiation energy release in the injector channel wall, caused by neutron shooting, substantially depends on the channel dimensions. At the channel large diameter (0.7-10 m) this dependence noticeably decreases. The investigation of the effect of the injector channel cross section form on the neutron flux density through the channel, testifies to weak dependence of shooting radiation intensity on the form of the channel cross section. It is concluded that measures to decrease unfavourable effect of the channels on the safety of the power tokamak reactor operation and maintenance cause substantial changes in reactor design due to which the channel protection must be developed at first stages. The Monte Carlo method is recommended to be used for variant calculations and when calculating the neutron flux functionals in specific points of the system the discrete ordinate method is preferred [ru

  4. Channel Wall Landslides

    Science.gov (United States)

    2005-01-01

    [figure removed for brevity, see original site] The multiple landslides in this VIS image occur along a steep channel wall. Note the large impact crater in the context image. The formation of the crater may have initially weakened that area of the surface prior to channel formation. Image information: VIS instrument. Latitude -2.7, Longitude 324.8 East (35.2 West). 19 meter/pixel resolution. Note: this THEMIS visual image has not been radiometrically nor geometrically calibrated for this preliminary release. An empirical correction has been performed to remove instrumental effects. A linear shift has been applied in the cross-track and down-track direction to approximate spacecraft and planetary motion. Fully calibrated and geometrically projected images will be released through the Planetary Data System in accordance with Project policies at a later time. NASA's Jet Propulsion Laboratory manages the 2001 Mars Odyssey mission for NASA's Office of Space Science, Washington, D.C. The Thermal Emission Imaging System (THEMIS) was developed by Arizona State University, Tempe, in collaboration with Raytheon Santa Barbara Remote Sensing. The THEMIS investigation is led by Dr. Philip Christensen at Arizona State University. Lockheed Martin Astronautics, Denver, is the prime contractor for the Odyssey project, and developed and built the orbiter. Mission operations are conducted jointly from Lockheed Martin and from JPL, a division of the California Institute of Technology in Pasadena.

  5. The GASSIPLEX0.7-2 Integrated Front-End Analog Processor for the HMPID and Muon Tracker of ALICE

    CERN Document Server

    Santiard, Jean-Claude

    1999-01-01

    The most recent member of the Gasplex family has been designed in a 0.7 µm n-well CMOS process to meet specifications for the ALICE applications: 500 fC linear dynamic range and a peaking time of 1.2 µs. Its internal circuitry is optimized for the readout of gaseous detectors. A dedicated filter compensates the long hyperbolic signal tail produced by the slow motion of the ions and allows the shaper to achieve perfect return to the base line after 5 µs. Measurement of fabricated chips showed a noise performance of 530 e- rms at 0 pF external input capacitance and 1.2 µs peaking-time, with a noise slope of 11.2 e- rms/pF. The gain is 3.6 mv/fC over a linear dynamic range of 560 fC.Summary:The Gasplex is a 16-channel low noise signal processor built in a 1.5 µm technology and specially designed for gaseous detectors. Each channel consists of a Charge Sensitive Amplifier (CSA) followed by a filter, a Semi-Gaussian shaper and a Track/Hold circuit. The peaking time acts as a delay allowing an external trigger...

  6. Evaluation of the PANDA silicon pixel front-end electronics and investigation of the anti ΛΛ final state

    Energy Technology Data Exchange (ETDEWEB)

    Esch, Simone

    2014-04-28

    high precision particle beams for several experiments. The AntiProton Annihilation at Darmstadt (PANDA) experiment is one of the large detectors at FAIR. PANDAs main physics objectives center around the properties of particles and excited particles made from quarks of the first and second quark family. It is a fixed target experiment within the High Energy Storage Ring (HESR), which delivers an intense, phase-space cooled antiproton beam in the momentum range of 1.5 to 15 GeV/c. With the high precision of the HESR, PANDA will be able to perform precise spectroscopic studies of hadronic states in the charm quark mass range. The luminosity will be up to 2.10{sup 32} cm{sup -2}s{sup -1}, thus enabling very rare processes to be studied. This high luminosity leads to a high particle flux and a high radiation environment which the sub-detectors must withstand. The most highly affected sub-detector of this high radiation environment is the Micro Vertex Detector (MVD), the innermost detector of PANDA. The main task of the MVD is the detection of the interaction points of events (vertexing). This vertex finding is crucial for the analysis of short living particles like e.g. D-mesons, particles consisting of a c-quark and a light antiquark. An essential part of the MVD detector is the readout of the semiconductor sensors. The ToPix (Torino Pixel) Application Specific Integrated Circuit (ASIC) is the front-end electronics for the MVD sensor, developed at the Istituto Nazionale di Fisica Nucleare (INFN) in Turin, Italy. It measures the spatial coordinate, the time and the deposited charge of incident charged particles. The most recent prototype of this ASIC is the ToPix 3, a version of reduced size and functionality. The Juelich Digital Readout System (JDRS) was adopted and extended to be able to readout this prototype, thus enabling specific test measurements of the prototype. In addition, the performance of PANDA for detecting long lived. particles was studied, and the

  7. The Channel Tunnel

    Science.gov (United States)

    2006-01-01

    The Channel Tunnel is a 50.5 km-long rail tunnel beneath the English Channel at the Straits of Dover. It connects Dover, Kent in England with Calais, northern France. The undersea section of the tunnel is unsurpassed in length in the world. A proposal for a Channel tunnel was first put forward by a French engineer in 1802. In 1881, a first attempt was made at boring a tunnel from the English side; the work was halted after 800 m. Again in 1922, English workers started boring a tunnel, and advanced 120 m before it too was halted for political reasons. The most recent attempt was begun in 1987, and the tunnel was officially opened in 1994. At completion it was estimated that the project cost around $18 billion. It has been operating at a significant loss since its opening, despite trips by over 7 million passengers per year on the Eurostar train, and over 3 million vehicles per year. With its 14 spectral bands from the visible to the thermal infrared wavelength region, and its high spatial resolution of 15 to 90 meters (about 50 to 300 feet), ASTER images Earth to map and monitor the changing surface of our planet. ASTER is one of five Earth-observing instruments launched December 18, 1999, on NASA's Terra satellite. The instrument was built by Japan's Ministry of Economy, Trade and Industry. A joint U.S./Japan science team is responsible for validation and calibration of the instrument and the data products. The broad spectral coverage and high spectral resolution of ASTER provides scientists in numerous disciplines with critical information for surface mapping, and monitoring of dynamic conditions and temporal change. Example applications are: monitoring glacial advances and retreats; monitoring potentially active volcanoes; identifying crop stress; determining cloud morphology and physical properties; wetlands evaluation; thermal pollution monitoring; coral reef degradation; surface temperature mapping of soils and geology; and measuring surface heat balance. The

  8. UPSO three channel fast photometer

    Science.gov (United States)

    Gupta, S. K.; Sagar, R.; Joshi, S.; Ashoka, B. N.; Babu, V. C.; Seetha, S.; Girish, V.

    2001-09-01

    The design and performance of a modular portable three channel fast photometer is described. It can be disassembled as single individual channels such that the system can also be used as a single channel photometer. The instrument is put into operation since November 1999 on the 1-m UPSO telescope at Nainital. Since then, it is used extensively for the survey of roAp stars in the northern sky at UPSO. The discoveries made using this new photometer are also mentioned.

  9. Upgrading a marketing channels role

    Directory of Open Access Journals (Sweden)

    Tišma-Borota Ankica

    2002-01-01

    Full Text Available As one of the marketing mix instruments, marketing channels were usually behind other instruments (product, price and promotion. Many companies regarded marketing channels as something that was 'left' after more important strategies of price, product and promotion were created. In recent past, things have changed and marketing channels became more interesting for research. This change came as a result of change in global market functioning especially in competitive advantage, distributors' strength and increasing technology.

  10. Pull Promotions and Channel Coordination

    OpenAIRE

    Eitan Gerstner; James D. Hess

    1995-01-01

    This paper recommends that manufacturers consider a pull price promotion as a coordination device in an independent channel of distribution. Uncoordinated decisions of both manufacturer and retailer to charge high prices can break down the effort to expand the market, resulting in losses to the channel as a whole. We show that manufacturers can enhance channel price coordination by designing pull price discounts that target price-conscious consumers. The increased price coordination improves ...

  11. Single-channel kinetics of BK (Slo1 channels

    Directory of Open Access Journals (Sweden)

    Yanyan eGeng

    2015-01-01

    Full Text Available Single-channel kinetics has proven a powerful tool to reveal information about the gating mechanisms that control the opening and closing of ion channels. This introductory review focuses on the gating of large conductance Ca2+- and voltage-activated K+ (BK or Slo1 channels at the single-channel level. It starts with single-channel current records and progresses to presentation and analysis of single-channel data and the development of gating mechanisms in terms of discrete state Markov (DSM models. The DSM models are formulated in terms of the tetrameric modular structure of BK channels, consisting of a central transmembrane pore-gate domain (PGD attached to four surrounding transmembrane voltage sensing domains (VSD and a large intracellular cytosolic domain (CTD, also referred to as the gating ring. The modular structure and data analysis shows that the Ca2+ and voltage dependent gating considered separately can each be approximated by 10-state two-tiered models with 5 closed states on the upper tier and 5 open states on the lower tier. The modular structure and joint Ca2+ and voltage dependent gating are consistent with a 50 state two-tiered model with 25 closed states on the upper tier and 25 open states on the lower tier. Adding an additional tier of brief closed (flicker states to the 10-state or 50-state models improved the description of the gating. For fixed experimental conditions a channel would gate in only a subset of the potential number of states. The detected number of states and the correlations between adjacent interval durations are consistent with the tiered models. The examined models can account for the single-channel kinetics and the bursting behavior of gating. Ca2+ and voltage activate BK channels by predominantly increasing the effective opening rate of the channel with a smaller decrease in the effective closing rate. Ca2+ and depolarization thus activate by mainly destabilizing the closed states.

  12. UMTS Common Channel Sensitivity Analysis

    DEFF Research Database (Denmark)

    Pratas, Nuno; Rodrigues, António; Santos, Frederico

    2006-01-01

    and as such it is necessary that both channels be available across the cell radius. This requirement makes the choice of the transmission parameters a fundamental one. This paper presents a sensitivity analysis regarding the transmission parameters of two UMTS common channels: RACH and FACH. Optimization of these channels...... is performed and values for the key transmission parameters in both common channels are obtained. On RACH these parameters are the message to preamble offset, the initial SIR target and the preamble power step while on FACH it is the transmission power offset....

  13. Characterisation of a radiation hard front-end chip for the vertex detector of the LHCb experiment at CERN

    International Nuclear Information System (INIS)

    Bakel, N. van; Baumeister, D.; Beuzekom, M. van; Bulten, H.J.; Feuerstack-Raible, M.; Jans, E.; Ketel, T.; Klous, S.; Loechner, S.; Sexauer, E.; Smale, N.; Snoek, H.; Trunk, U.; Verkooijen, H.

    2003-01-01

    The Beetle is a 128 channel analog pipelined readout chip which is intended for use in the silicon vertex locator (VELO) of the LHCb experiment at CERN. The Beetle chip is specially designed to withstand high radiation doses. Two Beetle1.1 chips bonded to a silicon strip detector have been tested with minimum ionizing particles. The main goal was to measure the signal-to-noise (S/N) ratio of the Beetle1.1 connected to a prototype VELO detector. Furthermore we investigated the general behaviour of the Beetle1.1. In this note we present the chip architecture, the measured (S/N) numbers as well as some characteristics (e.g. risetime, spillover) of the Beetle1.1 chip. Results from a total ionizing dose irradiation test are reported

  14. Design of a Single Channel Modulated Wideband Converter for Wideband Spectrum Sensing: Theory, Architecture and Hardware Implementation.

    Science.gov (United States)

    Liu, Weisong; Huang, Zhitao; Wang, Xiang; Sun, Weichao

    2017-05-04

    In a cognitive radio sensor network (CRSN), wideband spectrum sensing devices which aims to effectively exploit temporarily vacant spectrum intervals as soon as possible are of great importance. However, the challenge of increasingly high signal frequency and wide bandwidth requires an extremely high sampling rate which may exceed today's best analog-to-digital converters (ADCs) front-end bandwidth. Recently, the newly proposed architecture called modulated wideband converter (MWC), is an attractive analog compressed sensing technique that can highly reduce the sampling rate. However, the MWC has high hardware complexity owing to its parallel channel structure especially when the number of signals increases. In this paper, we propose a single channel modulated wideband converter (SCMWC) scheme for spectrum sensing of band-limited wide-sense stationary (WSS) signals. With one antenna or sensor, this scheme can save not only sampling rate but also hardware complexity. We then present a new, SCMWC based, single node CR prototype System, on which the spectrum sensing algorithm was tested. Experiments on our hardware prototype show that the proposed architecture leads to successful spectrum sensing. And the total sampling rate as well as hardware size is only one channel's consumption of MWC.

  15. Negative particle planar and axial channeling and channeling collimation

    Energy Technology Data Exchange (ETDEWEB)

    Carrigan, Richard A., Jr.; /Fermilab

    2009-12-01

    While information exists on high energy negative particle channeling there has been little study of the challenges of negative particle bending and channeling collimation. Partly this is because negative dechanneling lengths are relatively much shorter. Electrons are not particularly useful for investigating negative particle channeling effects because their material interactions are dominated by channeling radiation. Another important factor is that the current central challenge in channeling collimation is the proton-proton Large Hadron Collider (LHC) where both beams are positive. On the other hand in the future the collimation question might reemerge for electon-positron or muon colliders. Dechanneling lengths increase at higher energies so that part of the negative particle experimental challenge diminishes. In the article different approaches to determining negative dechanneling lengths are reviewed. The more complicated case for axial channeling is also discussed. Muon channeling as a tool to investigate dechanneling is also discussed. While it is now possible to study muon channeling it will probably not illuminate the study of negative dechanneling.

  16. ZnO-channel thin-film transistors: Channel mobility

    International Nuclear Information System (INIS)

    Hoffman, R.L.

    2004-01-01

    ZnO-channel thin-film transistor (TFT) test structures are fabricated using a bottom-gate structure on thermally oxidized Si; ZnO is deposited via RF sputtering from an oxide target, with an unheated substrate. Electrical characteristics are evaluated, with particular attention given to the extraction and interpretation of transistor channel mobility. ZnO-channel TFT mobility exhibits severe deviation from that assumed by ideal TFT models; mobility extraction methodology must accordingly be recast so as to provide useful insight into device operation. Two mobility metrics, μ avg and μ inc , are developed and proposed as relevant tools in the characterization of nonideal TFTs. These mobility metrics are employed to characterize the ZnO-channel TFTs reported herein; values for μ inc as high as 25 cm2/V s are measured, comprising a substantial increase in ZnO-channel TFT mobility as compared to previously reported performance for such devices

  17. One-sided asymptotically mean stationary channels

    OpenAIRE

    Simon, Francois

    2014-01-01

    This paper proposes an analysis of asymptotically mean stationary (AMS) communication channels. A hierarchy based on stability properties (stationarity, quasi-stationarity, recurrence and asymptotically mean stationarity) of channels is identified. Stationary channels are a subclass of quasi-stationary channels which are a subclass of recurrent AMS channels which are a subclass of AMS channels. These classes are proved to be stable under Markovian composition of channels (e.g., the cascade of...

  18. An improved channel assessment scheme

    KAUST Repository

    Bader, Ahmed

    2014-05-01

    A source node in a multihop network determines whether to transmit in a channel based on whether the channel is occupied by a packet transmission with a large number of relays; whether the source node is in the data tones back-off zone; and the source node is in the busy tone back-off zone.

  19. Perceived quality of channel zapping

    NARCIS (Netherlands)

    Kooij, R.E.; Ahmed, K.; Brunnström, K.

    2006-01-01

    The end user experience of service quality is critical to the success of a service provider's IPTV deployment program. A key element involved in validating IPTV quality of experience (QoE) is how quickly and reliably users can change TV channels, often referred to as channel zapping. Currently there

  20. Channel Communication and Reconfigurable Hardware

    NARCIS (Netherlands)

    Bos, M.; Havinga, Paul J.M.; Smit, Gerardus Johannes Maria; Karelse, F.

    2000-01-01

    Many applications can be structured as a set of processes or threads that communicate via channels. These threads can be executed on various platforms (e.g. general purpose CPU, DSP, FPGA, etc). In our research we apply channels as a basic communication mechanism between threads in a reconfigurable

  1. Hydraulic jumps in a channel

    DEFF Research Database (Denmark)

    Bonn, D.; Andersen, Anders Peter; Bohr, Tomas

    2009-01-01

    We present a study of hydraulic jumps with flow predominantly in one direction, created either by confining the flow to a narrow channel with parallel walls or by providing an inflow in the form of a narrow sheet. In the channel flow, we find a linear height profile upstream of the jump as expected...

  2. Defect Distributions in Channeling Experiments

    DEFF Research Database (Denmark)

    Andersen, Hans Henrik; Sigmund, P.

    1965-01-01

    A simple collision model allows to calculate energy losses of perfectly channeled particles. The maximum energy loss is related in a simple way to the displacement energy of lattice atoms perpendicular to the channel. From that, one obtains rather definite predictions on the possibility...

  3. Voltage-gated Proton Channels

    Science.gov (United States)

    DeCoursey, Thomas E.

    2014-01-01

    Voltage-gated proton channels, HV1, have vaulted from the realm of the esoteric into the forefront of a central question facing ion channel biophysicists, namely the mechanism by which voltage-dependent gating occurs. This transformation is the result of several factors. Identification of the gene in 2006 revealed that proton channels are homologues of the voltage-sensing domain of most other voltage-gated ion channels. Unique, or at least eccentric, properties of proton channels include dimeric architecture with dual conduction pathways, perfect proton selectivity, a single-channel conductance ~103 smaller than most ion channels, voltage-dependent gating that is strongly modulated by the pH gradient, ΔpH, and potent inhibition by Zn2+ (in many species) but an absence of other potent inhibitors. The recent identification of HV1 in three unicellular marine plankton species has dramatically expanded the phylogenetic family tree. Interest in proton channels in their own right has increased as important physiological roles have been identified in many cells. Proton channels trigger the bioluminescent flash of dinoflagellates, facilitate calcification by coccolithophores, regulate pH-dependent processes in eggs and sperm during fertilization, secrete acid to control the pH of airway fluids, facilitate histamine secretion by basophils, and play a signaling role in facilitating B-cell receptor mediated responses in B lymphocytes. The most elaborate and best-established functions occur in phagocytes, where proton channels optimize the activity of NADPH oxidase, an important producer of reactive oxygen species. Proton efflux mediated by HV1 balances the charge translocated across the membrane by electrons through NADPH oxidase, minimizes changes in cytoplasmic and phagosomal pH, limits osmotic swelling of the phagosome, and provides substrate H+ for the production of H2O2 and HOCl, reactive oxygen species crucial to killing pathogens. PMID:23798303

  4. Search for supersymmetric top-quark partners using support vector machines and upgrade of the hadron calorimeter front-end readout control system at CMS

    International Nuclear Information System (INIS)

    Sahin, Mehmet Oezguer

    2017-04-01

    In this thesis a search for direct pair production of supersymmetric top-quark partners as well as work on the upgrade of the front-end readout controller of the Hadron Calorimeter (HCAL) of the Compact Muon Solenoid (CMS) experiment are presented. The most appealing extension of the Standard Model (SM) is supersymmetry (SUSY), relating the integer spin (bosons) and half-integer spin elementary particles (fermions). Supersymmetric top-quark partners (t) around and below the TeV energy scale offer a solution to the hierarchy problem. Furthermore, R-parity conserving SUSY models propose a cold dark matter candidate in the form of stable lightest supersymmetric particles, e.g. lightest neutralinos (χ 0 ). The analysis performed in this thesis is a search for top-squark pair production in a final state consisting of a single isolated lepton, jets, among which at least one is tagged as bottom-quark jet, and large missing transverse energy at the CMS experiment at the CERN Large Hadron Collider (LHC) with 8 TeV center-of-mass energy. A new Support Vector Machines (SVM) High-Energy Physics interface (SVM-HINT) software is introduced to classify signal events originating from new physics processes and the SM background. SVM-HINT is enhanced with a novel statistical significance based optimization algorithm providing a state-of-the-art classification power. Monte Carlo simulations are used in the training and optimization procedure, and high signal purity search regions are determined in the search for top-squark pair production. The background event yields in each search region are predicted using a data-driven background estimation method. The results are interpreted within a simplified model assuming a branching ratio of 100% to t → tχ 0 . No significant discrepancy between the data and the SM predictions has been observed. Exclusion limits were derived to constrain the m t and m χ 0 of the investigated simplified model. The sensitivity of the previous searches with

  5. Search for supersymmetric top-quark partners using support vector machines and upgrade of the hadron calorimeter front-end readout control system at CMS

    Energy Technology Data Exchange (ETDEWEB)

    Sahin, Mehmet Oezguer

    2017-04-15

    In this thesis a search for direct pair production of supersymmetric top-quark partners as well as work on the upgrade of the front-end readout controller of the Hadron Calorimeter (HCAL) of the Compact Muon Solenoid (CMS) experiment are presented. The most appealing extension of the Standard Model (SM) is supersymmetry (SUSY), relating the integer spin (bosons) and half-integer spin elementary particles (fermions). Supersymmetric top-quark partners (t) around and below the TeV energy scale offer a solution to the hierarchy problem. Furthermore, R-parity conserving SUSY models propose a cold dark matter candidate in the form of stable lightest supersymmetric particles, e.g. lightest neutralinos (χ{sup 0}). The analysis performed in this thesis is a search for top-squark pair production in a final state consisting of a single isolated lepton, jets, among which at least one is tagged as bottom-quark jet, and large missing transverse energy at the CMS experiment at the CERN Large Hadron Collider (LHC) with 8 TeV center-of-mass energy. A new Support Vector Machines (SVM) High-Energy Physics interface (SVM-HINT) software is introduced to classify signal events originating from new physics processes and the SM background. SVM-HINT is enhanced with a novel statistical significance based optimization algorithm providing a state-of-the-art classification power. Monte Carlo simulations are used in the training and optimization procedure, and high signal purity search regions are determined in the search for top-squark pair production. The background event yields in each search region are predicted using a data-driven background estimation method. The results are interpreted within a simplified model assuming a branching ratio of 100% to t → tχ{sup 0}. No significant discrepancy between the data and the SM predictions has been observed. Exclusion limits were derived to constrain the m{sub t} and m{sub χ{sup 0}} of the investigated simplified model. The sensitivity of the

  6. Amazon floodplain channels regulate channel-floodplain water exchange

    Science.gov (United States)

    Bates, P. D.; Baugh, C.; Trigg, M.

    2017-12-01

    We examine the role of floodplain channels in regulating the exchange of water between the Amazon main stem and its extensive floodplains using a combination of field survey, remote sensing and numerical modelling for a 30,000 km2 area around the confluence of the Solimões and Purus rivers. From Landsat imagery we identified 1762 individual floodplain channel reaches with total length of nearly 9300 line km that range in width from 900m to 20m. Using a boat survey we measured width and depth along 509 line km of floodplain channels in 45 separate reaches and used these data to develop geomorphic relationships between width and depth. This enabled reconstruction of the depth of all other channels in the Landsat survey to an RMSE of 2.5m. We then constructed a 2D hydraulic model of this site which included all 9300km of floodplain channels as sub-grid scale features using a recently developed version of the LISFLOOD-FP code. The DEM for the model was derived from a version of the SRTM Digital Elevation Model that was processed to remove vegetation artefacts. The model was run at 270m resolution over the entire 30,000 km2 domain for the period from 2002-2009. Simulations were run with and without floodplain channels to examine the impact of these features on floodplain flow dynamics and storage. Simulated floodplain channel hydraulics were validated against a combination of in-situ and remotely sensed data. Our results show that approximately 100 km3 of water is exchanged between the channel and the floodplain during a typical annual cycle, and 8.5±2.1% of mainstem flows is routed through the floodplain. The overall effect of floodplains channels was to increase the duration of connections between the Amazon River and the floodplain. Inclusion of floodplain channels in the model increased inundation volume by 7.3% - 11.3% at high water, and decreased it at low water by 4.0% - 16.6%, with the range in these estimates due to potential errors in floodplain channel

  7. An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit.

    Science.gov (United States)

    Tao Tang; Wang Ling Goh; Lei Yao; Jia Hao Cheong; Yuan Gao

    2017-07-01

    This paper describes an integrated multichannel neural recording analog front end (AFE) with a novel area-efficient driven right leg (DRL) circuit to improve the system common mode rejection ratio (CMRR). The proposed AFE consists of an AC-coupled low-noise programmable-gain amplifier, an area-efficient DRL block and a 10-bit SAR ADC. Compared to conventional DRL circuit, the proposed capacitor-less DRL design achieves 90% chip area reduction with enhanced CMRR performance, making it ideal for multichannel biomedical recording applications. The AFE circuit has been designed in a standard 0.18-μm CMOS process. Post-layout simulation results show that the AFE provides two gain settings of 54dB/60dB while consuming 1 μA per channel under a supply voltage of 1 V. The input-referred noise of the AFE integrated from 1 Hz to 10k Hz is only 4 μVrms and the CMRR is 110 dB.

  8. NALCN ion channels have alternative selectivity filters resembling calcium channels or sodium channels

    NARCIS (Netherlands)

    Senatore, A.; Monteil, A.; van Minnen, J.; Smit, A.B.; Spafford, J.D.

    2013-01-01

    NALCN is a member of the family of ion channels with four homologous, repeat domains that include voltage-gated calcium and sodium channels. NALCN is a highly conserved gene from simple, extant multicellular organisms without nervous systems such as sponges and placozoans and mostly remains a single

  9. Enhanced analogue front-end for the measurement of the high state of wide-band voltage pulses with 87 dB common-mode rejection ratio and ±0.65 ppm 1-day offset stability

    CERN Document Server

    AUTHOR|(SzGeCERN)712364; Arpaia, Pasquale; Martino, Michele

    2015-01-01

    An improved analogue front-end for measuring the high state of trapezoidal voltage pulses with transition duration of 3 μs is presented. A new measurement system, composed by a front-end and the state-of-the-art acquisition board NI PXI-5922, has been realized with improved Common Mode Rejection Ratio (CMRR) of more than 87 dB at DC and 3-sigma stability of }0.65 ppm over 1 day. After highlighting the main design enhancements with respect to state-of-the-art solutions, the CMRR measurement is reported. The output drift due to temperature and humidity is assessed to be negligible. Finally, the worst-case repeatability is measured both with shorted-to-ground inputs and with an applied common-mode voltage of 10 V, which represents the nominal working condition.

  10. Enhanced analogue front-end for the measurement of the high state of wide-band voltage pulses with 87 dB common-mode rejection ratio and ±0.65 ppm 1-day offset stability

    Science.gov (United States)

    Arpaia, Pasquale; Baccigalupi, Carlo; Martino, Michele

    2015-09-01

    An improved analogue front-end for measuring the high state of trapezoidal voltage pulses with transition duration of 3 μs is presented. A new measurement system, composed by a front-end and the state-of-the-art acquisition board NI PXI-5922, has been realized with improved Common Mode Rejection Ratio (CMRR) of more than 87 dB at DC and 3-sigma stability of ±0.65 ppm over 1 day. After highlighting the main design enhancements with respect to state-of-the-art solutions, the CMRR measurement is reported. The output drift due to temperature and humidity is assessed to be negligible. Finally, the worst-case repeatability is measured both with shorted-to-ground inputs and with an applied common-mode voltage of 10 V, which represents the nominal working condition.

  11. Substrate channeling in proline metabolism

    Science.gov (United States)

    Arentson, Benjamin W.; Sanyal, Nikhilesh; Becker, Donald F.

    2012-01-01

    Proline metabolism is an important pathway that has relevance in several cellular functions such as redox balance, apoptosis, and cell survival. Results from different groups have indicated that substrate channeling of proline metabolic intermediates may be a critical mechanism. One intermediate is pyrroline-5-carboxylate (P5C), which upon hydrolysis opens to glutamic semialdehyde (GSA). Recent structural and kinetic evidence indicate substrate channeling of P5C/GSA occurs in the proline catabolic pathway between the proline dehydrogenase and P5C dehydrogenase active sites of bifunctional proline utilization A (PutA). Substrate channeling in PutA is proposed to facilitate the hydrolysis of P5C to GSA which is unfavorable at physiological pH. The second intermediate, gamma-glutamyl phosphate, is part of the proline biosynthetic pathway and is extremely labile. Substrate channeling of gamma-glutamyl phosphate is thought to be necessary to protect it from bulk solvent. Because of the unfavorable equilibrium of P5C/GSA and the reactivity of gamma-glutamyl phosphate, substrate channeling likely improves the efficiency of proline metabolism. Here, we outline general strategies for testing substrate channeling and review the evidence for channeling in proline metabolism. PMID:22201749

  12. Melt Channel Formation in Paraffin With Applications to Lava Channels

    Science.gov (United States)

    Whitehead, J. A.; Mills, C. J.

    2005-12-01

    We present the results from laboratory experiments designed to explore channel formation caused by instabilities in fluid flow, and to provide a simple experimental basis to facilitate the extension of lava channel theory. Kelemen et. al. [1995] reported on a series of experiments that explored channel formation resulting from fluid instabilities caused by the ``reactive infiltration instability'' (RII). However, the material used in portions of their experiments was undesirable because of a poorly suited rheology. Therefore, our experiments were initiated as an extension of those earlier experiments, using instead a material with more robust rheological properties. The material chosen for this series of experiments is a paraffin with a freezing temperature of 4°C, which is transparent when liquid and opaque-white when frozen. The paraffin is pumped at a constant and controlled rate into a narrow gap between two circular plates, both with a diameter of ~51cm. The gap is open along the circumference of the plates, allowing the paraffin to flow out of the gap once it reaches the edge of the plate. The upper plate is constructed of Plexiglas to allow observation of the wax below, and it has a hole in the center through which the paraffin is pumped. The lower plate is constructed of aluminum, painted black, and kept at -5°C by circulating coolant through a reservoir below the it. As the paraffin, which is kept at 20°C before being pumped into the gap, flows over the cold lower plate, it begins to freeze and eventually fills up the gap between the plates. A single channel then forms, surrounded by solid paraffin, and the liquid being pumped in is transported via this channel to the edge of the plate. This is a stable state for all but the lowest flow rates attempted and verifies the results from the earlier work exploring the RII. We conducted experiments at different flows rates from 270mL/min to <30mL/min, and recorded the dimensions of the steady state channel

  13. ACE Strategy with Virtual Channels

    Directory of Open Access Journals (Sweden)

    T. Tichy

    2008-12-01

    Full Text Available Cochlear implant is an electronic device, which can mediate hearing sensations to profoundly deaf people. Contemporary cochlear implants are sophisticated electronic devices; however, their performance could still be improved. This paper describes an experiment we made in that direction: additional 21 virtual channels were implemented by sequential stimulation of adjacent intracochlear electrodes, and the ACE strategy with virtual channels (ACEv, Advanced Combination Encoder strategy with virtual channels for the Nucleus® 24 Cochlear Implant System was created and verified in a clinical test with four patients.

  14. Entwicklung, Implementierung and Test eines FPGA-Designs für die Level-1-Frontend-Elektronik des Äusseren Spurkammersystems im LHCb-Detektor

    CERN Document Server

    Nedos, Mirco

    For measurements of CP-violation in the B-meson system, as well as the search for new physics, the LHCb-experiment has been built at the Large Hadron Collider at CERN. One component of the sophisticated LHCb-detector is the Outer Tracker. Its measured data is transmitted serially via optical links into the readout network. For the interface between the frontend electronics on the detector and the data acquisition network a common readout board is used. This FPGA-based board, dubbed the TELL1, preprocesses the data. In this thesis the developments of the detector specific parts of the TELL1 firmware and the integration of the TELL1 board into the readout chain of the Outer Tracker are described. It covers the synchronisation and the error detection of the data received, as well as the generation of the Outer Tracker DAQ data format. In addition a zero-suppression algorithm has been implemented in the FPGA in order to reduce the network payload and guarantee operation at maximum trigger rate.

  15. Current Controller for Multi-level Front-end Converter and Its Digital Implementation Considerations on Three-level Flying Capacitor Topology

    Science.gov (United States)

    Tekwani, P. N.; Shah, M. T.

    2017-10-01

    This paper presents behaviour analysis and digital implementation of current error space phasor based hysteresis controller applied to three-phase three-level flying capacitor converter as front-end topology. The controller is self-adaptive in nature, and takes the converter from three-level to two-level mode of operation and vice versa, following various trajectories of sector change with the change in reference dc-link voltage demanded by the load. It keeps current error space phasor within the prescribed hexagonal boundary. During the contingencies, the proposed controller takes the converter in over modulation mode to meet the load demand, and once the need is satisfied, controller brings back the converter in normal operating range. Simulation results are presented to validate behaviour of controller to meet the said contingencies. Unity power factor is assured by proposed controller with low current harmonic distortion satisfying limits prescribed in IEEE 519-2014. Proposed controller is implemented using TMS320LF2407 16-bit fixed-point digital signal processor. Detailed analysis of numerical format to avoid overflow of sensed variables in processor, and per-unit model implementation in software are discussed and hardware results are presented at various stages of signal conditioning to validate the experimental setup. Control logic for the generation of reference currents is implemented in TMS320LF2407A using assembly language and experimental results are also presented for the same.

  16. Feeding the nuclear fuel cycle with a long term view; AREVA's front-end business units, uranium mining, UF6 conversion and isotopic enrichment

    International Nuclear Information System (INIS)

    Capus, G.A.P.; Autegert, R.

    2005-01-01

    As a leading provider of technological solutions for nuclear power generation and electricity transmission, the AREVA group has the unique capability of offering a fully integrated fuel supply, when requested by its customers. At the core of the AREVA group, COGEMA Front End Division is an essential part of the overall fuel supply chain. Composed of three Business Units and gathering several subsidiaries and joint 'ventures, this division enjoys several leading positions as shown by its market shares and historical production records. Current Uranium market evolutions put the natural uranium supply under focus. The uranium conversion segment also recently revealed some concerning evolutions. And no doubt, the market pressure will soon be directed also at the enrichment segment. Looking towards the long term, AREVA strongly believes that a nuclear power renewal is needed, especially to help limiting green house effect gas release. Therefore, to address future supplies needed to fuel the existing fleet of nuclear power plants, but also new ones, the AREVA group is planning very significant investments to build new facilities in all the three front-end market segments. As far as uranium mining is concerned, these new mines will be based upon uranium reserves of outstanding quality. As for uranium conversion and enrichment, two large projects will be based on the most advanced technologies. This paper is aimed at recalling COGEMA Front End Division experience, the current status of its plants and operating entities and will provide a detailed overview of its major projects. (authors)

  17. The Development of High-Performance Front-End Electronics Based Upon the QIE12 Custom ASIC for the ATLAS TileCal Upgrade

    CERN Document Server

    Drake, Gary; The ATLAS collaboration

    2016-01-01

    We present the design of a new candidate front-end electronic readout system being developed for the ATLAS TileCal Phase 2 Upgrade. The system is based upon the QIE12 custom Application Specific Integrated Circuit. The chip features a least count sensitivity of 1.5 fC, more than 17 bits of dynamic range with logarithmic response, and an on-chip TDC with one nanosecond resolution. The design incorporates an on-board current integrator, and has several calibration systems. The new electronics will operate dead-timelessly at 40 MHz, pushing full data sets from each beam crossing to the data acquisition system that resides off-detector in the USA15 counting room using high-speed optical links. The system is one of three candidate systems for the Phase 2 Upgrade. We have built a “Demonstrator” – a fully functional prototype of the new system. Performance results from bench measurements and from a recent test beam campaign will be presented.

  18. Charge Pump Clock Generation PLL for the Data Output Block of the Upgraded ATLAS Pixel Front-End in 130 nm CMOS

    CERN Document Server

    Kruth, A; Arutinov, D; Barbero, M; Gronewald, M; Hemperek, T; Karagounis, M; Krueger, H; Wermes, N; Fougeron, D; Menouni, M; Beccherle, R; Dube, S; Ellege, D; Garcia-Sciveres, M; Gnani, D; Mekkaoui, A; Gromov, V; Kluit, R; Schipper, J

    2009-01-01

    FE-I4 is the 130 nm ATLAS pixel IC currently under development for upgraded Large Hadron Collider (LHC) luminosities. FE-I4 is based on a low-power analog pixel array and digital architecture concepts tuned to higher hit rates [1]. An integrated Phase Locked Loop (PLL) has been developed that locally generates a clock signal for the 160 Mbit/s output data stream from the 40 MHz bunch crossing reference clock. This block is designed for low power, low area consumption and recovers quickly from loss of lock related to single-event transients in the high radiation environment of the ATLAS pixel detector. After a general introduction to the new FE-I4 pixel front-end chip, this work focuses on the FE-I4 output blocks and on a first PLL prototype test chip submitted in early 2009. The PLL is nominally operated from a 1.2V supply and consumes 3.84mW of DC power. Under nominal operating conditions, the control voltage settles to within 2% of its nominal value in less than 700 ns. The nominal operating frequency for t...

  19. Search for Supersymmetric Top-Quark Partners Using Support Vector Machines and Upgrade of the Hadron Calorimeter Front-End Readout Control System at CMS

    CERN Document Server

    Sahin, Mehmet Ozgur; Schleper, Peter

    2017-01-01

    In this thesis a search for direct pair production of supersymmetric top-quark partners aswell as work on the upgrade of the front-end readout controller of the Hadron Calorimeter(HCAL) of the Compact Muon Solenoid (CMS) experiment are presented.The most appealing extension of the Standard Model (SM) is supersymmetry (SUSY), relating the integer spin (bosons) and half-integer spin elementary particles (fermions). Supersymmetric top-quark partners (t) around and below the TeV energy scale offer a solution to thehierarchy problem. Furthermore, R-parity conserving SUSY models propose a cold dark matter candidate in the form of stable lightest supersymmetric particles, e.g. lightest neutralinos(χ0 ).The analysis performed in this thesis is a search for top-squark pair production in a final state consisting of a single isolated lepton, jets, among which at least one is tagged asbottom-quark jet, and large missing transverse energy at the CMS experiment at the CERNLarge Hadron Collider (LHC) with 8 TeV center-of-...

  20. Performance of a resistive plate chamber equipped with a new prototype of amplified front-end electronics in the ALICE detector

    Science.gov (United States)

    Marchisone, Massimiliano

    2017-09-01

    ALICE is the LHC experiment dedicated to the study of heavy-ion collisions. At forward rapidity a muon spectrometer detects muons from low mass mesons, quarkonia (c\\bar{c} and b\\bar{b} mesons), open heavy-flavor hadrons (D and B mesons) as well as from weak bosons. A muon selection based on transverse momentum is made by a trigger system composed of 72 Resistive Plate Chambers (RPCs). For the LHC Run 1 and the ongoing Run 2 the RPCs have been equipped with a non-amplified Front-End Electronics (FEE) called ADULT. However, in view of an increase in luminosity expected for Run 3 (foreseen to start in 2021) the possibility to use an amplified FEE has been explored in order to improve the counting rate limitation and to prevent the aging of the detector by reducing the charge per hit. A prototype of this new electronics (FEERIC) has been developed and tested first with cosmic rays before equipping one RPC in the ALICE cavern with it. In this proceeding the most important performance indicators (such as efficiency, dark current, dark rate, cluster size, total charge and charge per hit) of the RPC equipped with this new FEE will be reviewed and compared to the others read out with ADULT.

  1. Sodium channels in planar lipid bilayers. Channel gating kinetics of purified sodium channels modified by batrachotoxin

    Science.gov (United States)

    1986-01-01

    Single channel currents of sodium channels purified from rat brain and reconstituted into planar lipid bilayers were recorded. The kinetics of channel gating were investigated in the presence of batrachotoxin to eliminate inactivation and an analysis was conducted on membranes with a single active channel at any given time. Channel opening is favored by depolarization and is strongly voltage dependent. Probability density analysis of dwell times in the closed and open states of the channel indicates the occurrence of one open state and several distinct closed states in the voltage (V) range-120 mV less than or equal to V less than or equal to +120 mV. For V less than or equal to 0, the transition rates between stages are exponentially dependent on the applied voltage, as described in mouse neuroblastoma cells (Huang, L. M., N. Moran, and G. Ehrenstein. 1984. Biophysical Journal. 45:313- 322). In contrast, for V greater than or equal to 0, the transition rates are virtually voltage independent. Autocorrelation analysis (Labarca, P., J. Rice, D. Fredkin, and M. Montal. 1985. Biophysical Journal. 47:469-478) shows that there is no correlation in the durations of successive open or closing events. Several kinetic schemes that are consistent with the experimental data are considered. This approach may provide information about the mechanism underlying the voltage dependence of channel activation. PMID:2426388

  2. Multi-channel Kondo necklace

    International Nuclear Information System (INIS)

    Fazekas, P.; Kee Haeyoung.

    1993-06-01

    A multi-channel generalization of Doniach's Kondo necklace model is formulated, and its phase diagram studied in the mean-field approximation. Our intention is to introduce the possible simplest model which displays some of the features expected from the overscreened Kondo lattice. The N conduction electron channels are represented by N sets of pseudospins τ J , j = 1 1,..., N which are all antiferromagnetically coupled to a periodic array of modul S = 1/2 spins. Exploiting permutation symmetry in the channel index j allows us to write down the self-consistency equation for general N. For N > 2, we find that the critical temperature is rising with increasing Kondo interaction; we interpret this effect by pointing out that the Kondo coupling creates the composite pseudospin objects which undergo an ordering transition. The relevance of our findings to the underlying fermionic multi-channel problem is discussed. (author). 33 refs, 1 fig

  3. FMCG companies specific distribution channels

    Directory of Open Access Journals (Sweden)

    Ioana Barin

    2009-12-01

    Full Text Available Distribution includes all activities undertaken by the producer, alone or in cooperation, since the end of the final finished products or services until they are in possession of consumers. The distribution consists of the following major components: distribution channels or marketing channels, which together form a distribution network; logistics o rphysical distribution. In order to effective achieve, distribution of goods requires an amount of activities and operational processes related to transit of goods from producer to consumer, the best conditions, using existing distribution channels and logistics system. One of the essential functions of a distribution is performing acts of sale, through which, with the actual movement of goods, their change of ownership takes place, that the successive transfer of ownership from producer to consumer. This is an itinerary in the economic cycle of goods, called the distribution channel.

  4. Potassium Channels in Neurofbromatosis-1

    National Research Council Canada - National Science Library

    Chen, Mingkui

    2006-01-01

    .... We were the first to investigate potential mechanisms of cognitive impairment in NF-1 at the molecular level involving potassium channels, and demonstrated a possible mechanism for the learning deficits seen in NF1...

  5. Marketing channel behaviour and performance

    OpenAIRE

    Duarte, Margarida

    2000-01-01

    Thesis submitted to University of Manchester for the degree of Doctor of Philosophy in the Faculty of Business Administration. A major aim of this study is to offer a relatively comprehensive picture of marketing channel behaviour and performance. Given the statistical difficulties in testing a very large, comprehensive model to achieve this aim, two separate but overlapping models are proposed. One model specifically addresses behaviour in marketing channels, while the other integrates k...

  6. Learning the MMSE Channel Estimator

    OpenAIRE

    Neumann, David; Wiese, Thomas; Utschick, Wolfgang

    2017-01-01

    We present a method for estimating conditionally Gaussian random vectors with random covariance matrices, which uses techniques from the field of machine learning. Such models are typical in communication systems, where the covariance matrix of the channel vector depends on random parameters, e.g., angles of propagation paths. If the covariance matrices exhibit certain Toeplitz and shift-invariance structures, the complexity of the MMSE channel estimator can be reduced to O(M log M) floating ...

  7. Eight channel telephone telemetry system

    Science.gov (United States)

    Smith, R. E.

    1973-01-01

    A portable, indirectly coupled telephone system is reported which transmits/to a central receiving site eight channels of EEG data of sufficient fidelity for screening and/or limited diagnostic use. The system requires no electrical connection to the telephone at the transmitter or at the receiver and is compatible with common EEG recording practice for real-time recording. It accepts 8 input channels simultaneously with one telephone transmitter and one telephone receiver operates from standard power sources.

  8. Electrophysiological characterisation of KCNQ channel modulators

    DEFF Research Database (Denmark)

    Schrøder, R.L

    Potassium (K+) ion channels are ubiquitously expressed in mammalian cells, and each channel serves a precise physiological role due to its specific biophysical characteristics and expression pattern. A few K+ channels are targets for certain drugs, and in this thesis it is suggested that the KCNQ K......+ channels may be targets for neuroprotective, anti-epileptic and anti-nociceptive compounds. The importance of these channels is underscored by the fact that four out of five KCNQ channel subtypes are involved in severe human diseases. However, the pharmacology of the KCNQ channels is yet poorly understood...... as these channels were identified only recently. Therefore, there is a need for understanding the biophysical behavior and pharmacology of these ion channels. KCNQ channels belong to the group of voltage-activated K+ channels. The subfamily consists of KCNQ1-5, which is primarily expressed in the CNS, heart, ear...

  9. Development of a 32-channel ASIC for an X-ray APD detector onboard the ISS

    Science.gov (United States)

    Arimoto, Makoto; Harita, Shohei; Sugita, Satoshi; Yatsu, Yoichi; Kawai, Nobuyuki; Ikeda, Hirokazu; Tomida, Hiroshi; Isobe, Naoki; Ueno, Shiro; Mihara, Tatehiro; Serino, Motoko; Kohmura, Takayoshi; Sakamoto, Takanori; Yoshida, Atsumasa; Tsunemi, Hiroshi; Hatori, Satoshi; Kume, Kyo; Hasegawa, Takashi

    2018-02-01

    We report on the design and performance of a mixed-signal application specific integrated circuit (ASIC) dedicated to avalanche photodiodes (APDs) in order to detect hard X-ray emissions in a wide energy band onboard the International Space Station. To realize wide-band detection from 20 keV to 1 MeV, we use Ce:GAGG scintillators, each coupled to an APD, with low-noise front-end electronics capable of achieving a minimum energy detection threshold of 20 keV. The developed ASIC has the ability to read out 32-channel APD signals using 0.35 μm CMOS technology, and an analog amplifier at the input stage is designed to suppress the capacitive noise primarily arising from the large detector capacitance of the APDs. The ASIC achieves a performance of 2099 e- + 1.5 e-/pF at root mean square (RMS) with a wide 300 fC dynamic range. Coupling a reverse-type APD with a Ce:GAGG scintillator, we obtain an energy resolution of 6.7% (FWHM) at 662 keV and a minimum detectable energy of 20 keV at room temperature (20 °C). Furthermore, we examine the radiation tolerance for space applications by using a 90 MeV proton beam, confirming that the ASIC is free of single-event effects and can operate properly without serious degradation in analog and digital processing.

  10. NALCN ion channels have alternative selectivity filters resembling calcium channels or sodium channels.

    Directory of Open Access Journals (Sweden)

    Adriano Senatore

    Full Text Available NALCN is a member of the family of ion channels with four homologous, repeat domains that include voltage-gated calcium and sodium channels. NALCN is a highly conserved gene from simple, extant multicellular organisms without nervous systems such as sponges and placozoans and mostly remains a single gene compared to the calcium and sodium channels which diversified into twenty genes in humans. The single NALCN gene has alternatively-spliced exons at exons 15 or exon 31 that splices in novel selectivity filter residues that resemble calcium channels (EEEE or sodium channels (EKEE or EEKE. NALCN channels with alternative calcium, (EEEE and sodium, (EKEE or EEKE -selective pores are conserved in simple bilaterally symmetrical animals like flatworms to non-chordate deuterostomes. The single NALCN gene is limited as a sodium channel with a lysine (K-containing pore in vertebrates, but originally NALCN was a calcium-like channel, and evolved to operate as both a calcium channel and sodium channel for different roles in many invertebrates. Expression patterns of NALCN-EKEE in pond snail, Lymnaea stagnalis suggest roles for NALCN in secretion, with an abundant expression in brain, and an up-regulation in secretory organs of sexually-mature adults such as albumen gland and prostate. NALCN-EEEE is equally abundant as NALCN-EKEE in snails, but is greater expressed in heart and other muscle tissue, and 50% less expressed in the brain than NALCN-EKEE. Transfected snail NALCN-EEEE and NALCN-EKEE channel isoforms express in HEK-293T cells. We were not able to distinguish potential NALCN currents from background, non-selective leak conductances in HEK293T cells. Native leak currents without expressing NALCN genes in HEK-293T cells are NMDG(+ impermeant and blockable with 10 µM Gd(3+ ions and are indistinguishable from the hallmark currents ascribed to mammalian NALCN currents expressed in vitro by Lu et al. in Cell. 2007 Apr 20;129(2:371-83.

  11. Performance Analysis of a Six-Port Receiver in a WCDMA Communication System including a Multipath Fading Channel

    Directory of Open Access Journals (Sweden)

    A. O. Olopade

    2014-01-01

    Full Text Available Third generation communication systems require receivers with wide bandwidth of operation to support high transmission rates and are also reconfigurable to support various communication standards with different frequency bands. An ideal software defined radio (SDR will be the absolute answer to this requirement but it is not achievable with the current level of technology. This paper proposes the use of a six-port receiver (SPR front-end (FE in a WCDMA communication system. A WCDMA end-to-end physical layer MATLAB demo which includes a multipath channel distortion block is used to determine the viability of the six-port based receiver. The WCDMA signal after passing through a multipath channel is received using a constructed SPR FE. The baseband signal is then calibrated and corrected in MATLAB. The six-port receiver performance is measured in terms of bit error rate (BER. The signal-to-noise ratio (SNR of the transmitted IQ data is varied and the BER profile of the communication system is plotted. The effect of the multipath fading on the receiver performance and the accuracy of the calibration algorithm are obtained by comparing two different measured BER curves for different calibration techniques to the simulated BER curve of an ideal receiver.

  12. Planar channeling in superlattices: Theory

    International Nuclear Information System (INIS)

    Ellison, J.A.; Picraux, S.T.; Allen, W.R.; Chu, W.K.

    1988-01-01

    The well-known continuum model theory for planar channeled energetic particles in perfect crystals is extended to layered crystalline structures and applied to superlattices. In a strained-layer structure, the planar channels with normals which are not perpendicular to the growth direction change their direction at each interface, and this dramatically influences the channeling behavior. The governing equation of motion for a planar channeled ion in a strained-layer superlattice with equal layer thicknesses is a one degree of freedom nonlinear oscillator which is periodically forced with a sequence of δ functions. These δ functions, which are of equal spacing and amplitude with alternating sign, represent the tilts at each of the interfaces. Thus upon matching an effective channeled particle wavelength, corresponding to a natural period of the nonlinear oscillator, to the period of the strained-layer superlattice, corresponding to the periodic forcing, strong resonance effects are expected. The condition of one effective wavelength per period corresponds to a rapid dechanneling at a well-defined depth (catastrophic dechanneling), whereas two wavelengths per period corresponds to no enhanced dechanneling after the first one or two layers (resonance channeling). A phase plane analysis is used to characterize the channeled particle motion. Detailed calculations using the Moliere continuum potential are compared with our previously described modified harmonic model, and new results are presented for the phase plane evolution, as well as the dechanneling as a function of depth, incident angle, energy, and layer thickness. General scaling laws are developed and nearly universal curves are obtained for the dechanneling versus depth under catastrophic dechanneling

  13. A low-cost, scalable, current-sensing digital headstage for high channel count μECoG.

    Science.gov (United States)

    Trumpis, Michael; Insanally, Michele; Zou, Jialin; Elsharif, Ashraf; Ghomashchi, Ali; Sertac Artan, N; Froemke, Robert C; Viventi, Jonathan

    2017-04-01

    High channel count electrode arrays allow for the monitoring of large-scale neural activity at high spatial resolution. Implantable arrays featuring many recording sites require compact, high bandwidth front-end electronics. In the present study, we investigated the use of a small, light weight, and low cost digital current-sensing integrated circuit for acquiring cortical surface signals from a 61-channel micro-electrocorticographic (μECoG) array. We recorded both acute and chronic μECoG signal from rat auditory cortex using our novel digital current-sensing headstage. For direct comparison, separate recordings were made in the same anesthetized preparations using an analog voltage headstage. A model of electrode impedance explained the transformation between current- and voltage-sensed signals, and was used to reconstruct cortical potential. We evaluated the digital headstage using several metrics of the baseline and response signals. The digital current headstage recorded neural signal with similar spatiotemporal statistics and auditory frequency tuning compared to the voltage signal. The signal-to-noise ratio of auditory evoked responses (AERs) was significantly stronger in the current signal. Stimulus decoding based on true and reconstructed voltage signals were not significantly different. Recordings from an implanted system showed AERs that were detectable and decodable for 52 d. The reconstruction filter mitigated the thermal current noise of the electrode impedance and enhanced overall SNR. We developed and validated a novel approach to headstage acquisition that used current-input circuits to independently digitize 61 channels of μECoG measurements of the cortical field. These low-cost circuits, intended to measure photo-currents in digital imaging, not only provided a signal representing the local cortical field with virtually the same sensitivity and specificity as a traditional voltage headstage but also resulted in a small, light headstage that can

  14. A low-cost, scalable, current-sensing digital headstage for high channel count μECoG

    Science.gov (United States)

    Trumpis, Michael; Insanally, Michele; Zou, Jialin; Elsharif, Ashraf; Ghomashchi, Ali; Sertac Artan, N.; Froemke, Robert C.; Viventi, Jonathan

    2017-04-01

    Objective. High channel count electrode arrays allow for the monitoring of large-scale neural activity at high spatial resolution. Implantable arrays featuring many recording sites require compact, high bandwidth front-end electronics. In the present study, we investigated the use of a small, light weight, and low cost digital current-sensing integrated circuit for acquiring cortical surface signals from a 61-channel micro-electrocorticographic (μECoG) array. Approach. We recorded both acute and chronic μECoG signal from rat auditory cortex using our novel digital current-sensing headstage. For direct comparison, separate recordings were made in the same anesthetized preparations using an analog voltage headstage. A model of electrode impedance explained the transformation between current- and voltage-sensed signals, and was used to reconstruct cortical potential. We evaluated the digital headstage using several metrics of the baseline and response signals. Main results. The digital current headstage recorded neural signal with similar spatiotemporal statistics and auditory frequency tuning compared to the voltage signal. The signal-to-noise ratio of auditory evoked responses (AERs) was significantly stronger in the current signal. Stimulus decoding based on true and reconstructed voltage signals were not significantly different. Recordings from an implanted system showed AERs that were detectable and decodable for 52 d. The reconstruction filter mitigated the thermal current noise of the electrode impedance and enhanced overall SNR. Significance. We developed and validated a novel approach to headstage acquisition that used current-input circuits to independently digitize 61 channels of μECoG measurements of the cortical field. These low-cost circuits, intended to measure photo-currents in digital imaging, not only provided a signal representing the local cortical field with virtually the same sensitivity and specificity as a traditional voltage headstage but

  15. Volume of the space of qubit-qubit channels and state transformations under random quantum channels

    OpenAIRE

    Lovas, Attila; Andai, Attila

    2017-01-01

    The simplest building blocks for quantum computations are the qubit-qubit quantum channels. In this paper, we analyze the structure of these channels via their Choi representation. The restriction of a quantum channel to the space of classical states (i.e. probability distributions) is called the underlying classical channel. The structure of quantum channels over a fixed classical channel is studied, the volume of general and unital qubit channels with respect to the Lebesgue measure is comp...

  16. 47 CFR 76.57 - Channel positioning.

    Science.gov (United States)

    2010-10-01

    ... 47 Telecommunication 4 2010-10-01 2010-10-01 false Channel positioning. 76.57 Section 76.57... CABLE TELEVISION SERVICE Carriage of Television Broadcast Signals § 76.57 Channel positioning. (a) At... choice of channel position when it requests carriage. Channel positioning requests from local commercial...

  17. Lithofacies characterization and channel development in the ...

    African Journals Online (AJOL)

    ... and multistory channel complex. The different stages of channel development can be considered in terms of low efficiency and high efficiency flows, which are related to slope equilibrium. Keywords: Outcrop, slope, channel development, channel architecture, process model, lowstand. Journal of Mining and Geology Vol.

  18. Information transfer through quantum channels

    International Nuclear Information System (INIS)

    Kretschmann, D.

    2007-01-01

    This PhD thesis represents work done between Aug. 2003 and Dec. 2006 in Reinhard F. Werner's quantum information theory group at Technische Universitaet Braunschweig, and Artur Ekert's Centre for Quantum Computation at the University of Cambridge. My thesis falls into the field of abstract quantum information theory. This work investigates both fundamental properties of quantum channels and their asymptotic capacities for classical as well as quantum information transfer. Stinespring's theorem is the basic structure theorem for quantum channels. It implies that every quantum channel can be represented as a unitary evolution on an enlarged system. In Ch. 3 we present a continuity theorem for Stinespring's representation: two quantum channels are similar if and only if it is possible to find unitary implementations that are likewise similar, with dimension-independent norm bounds. The continuity theorem allows to derive a formulation of the information-disturbance tradeoff in terms of quantum channels, and a continuity estimate for the no-broadcasting principle. In Ch. 4 we then apply the continuity theorem to give a strengthened no-go proof for quantum bit commitment, an important cryptographic primitive. This result also provides a natural characterization of those protocols that fall outside the standard setting of unconditional security, and thus may allow secure bit commitment. We present a new such protocol whose security relies on decoherence in the receiver's lab. Ch. 5 reviews the capacities of quantum channels for the transfer of both classical and quantum information, and investigates several variations in the notion of channel capacity. Memory effects are then investigated in detail in Ch. 6. We advertise a model which is sufficiently general to encompass all causal automata: every quantum process in which the outputs up to any given time t do not depend on the inputs at times t'>t can be represented as a concatenated memory channel. We then explain how

  19. Information transfer through quantum channels

    Energy Technology Data Exchange (ETDEWEB)

    Kretschmann, D.

    2007-03-12

    This PhD thesis represents work done between Aug. 2003 and Dec. 2006 in Reinhard F. Werner's quantum information theory group at Technische Universitaet Braunschweig, and Artur Ekert's Centre for Quantum Computation at the University of Cambridge. My thesis falls into the field of abstract quantum information theory. This work investigates both fundamental properties of quantum channels and their asymptotic capacities for classical as well as quantum information transfer. Stinespring's theorem is the basic structure theorem for quantum channels. It implies that every quantum channel can be represented as a unitary evolution on an enlarged system. In Ch. 3 we present a continuity theorem for Stinespring's representation: two quantum channels are similar if and only if it is possible to find unitary implementations that are likewise similar, with dimension-independent norm bounds. The continuity theorem allows to derive a formulation of the information-disturbance tradeoff in terms of quantum channels, and a continuity estimate for the no-broadcasting principle. In Ch. 4 we then apply the continuity theorem to give a strengthened no-go proof for quantum bit commitment, an important cryptographic primitive. This result also provides a natural characterization of those protocols that fall outside the standard setting of unconditional security, and thus may allow secure bit commitment. We present a new such protocol whose security relies on decoherence in the receiver's lab. Ch. 5 reviews the capacities of quantum channels for the transfer of both classical and quantum information, and investigates several variations in the notion of channel capacity. Memory effects are then investigated in detail in Ch. 6. We advertise a model which is sufficiently general to encompass all causal automata: every quantum process in which the outputs up to any given time t do not depend on the inputs at times t'>t can be represented as a concatenated memory

  20. Optimality of private quantum channels

    International Nuclear Information System (INIS)

    Bouda, Jan; Ziman, Mario

    2007-01-01

    We addressed the question of optimality of private quantum channels. We have shown that the Shannon entropy of the classical key necessary to securely transfer the quantum information is lower bounded by the entropy exchange of the private quantum channel E and the von Neumann entropy of the ciphertext state ρ (0) . Based on these bounds we have shown that decomposition of private quantum channels into orthogonal unitaries (if they exist) optimizes the entropy. For non-ancillary single-qubit PQC we have derived the optimal entropy for the arbitrary set of plaintexts. In particular, we have shown that except when the (closure of the) set of plaintexts contains all states, one bit key is sufficient. We characterized and analysed all the possible single-qubit private quantum channels for an arbitrary set of plaintexts. For the set of plaintexts consisting of all qubit states we have characterized all possible approximate private quantum channels and we have derived the relation between the security parameter and the corresponding minimal entropy